diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/errdb/errdb.pl ipxe-1.0.1~lliurex1505/contrib/errdb/errdb.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/errdb/errdb.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/errdb/errdb.pl	2012-01-06 23:49:04.000000000 +0000
@@ -73,7 +73,6 @@
 while ( <> ) {
   chomp;
   ( my $errno, my $filename, my $line, my $description ) = split ( /\t/ );
-  $errno = substr ( $errno, 0, 6 ) unless $errno =~ /^7f/;
   $errors->{$errno} = $description;
   $xrefs->{$errno} ||= {};
   $xrefs->{$errno}->{$filename} ||= {};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/bottom.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/bottom.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/bottom.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/bottom.php	2012-01-06 23:49:04.000000000 +0000
@@ -1,4 +1,4 @@
-<?php
+<?
 
 /**
  * Copyright (C) 2009 Marty Connor <mdc@etherboot.org>.
@@ -53,7 +53,7 @@
 <hr>
   <font size="-1">
     <br>
-    Please email <a href="mailto:<?php echo "${webmaster_email}" ?>"><?php echo "${webmaster_email}"?></a>
+    Please email <a href="mailto:<? echo "${webmaster_email}" ?>"><? echo "${webmaster_email}"?></a>
     with questions or comments about this website.
   </font>
   <br><br>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/build.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/build.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/build.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/build.php	2012-01-06 23:49:04.000000000 +0000
@@ -179,12 +179,7 @@
 
 // Make the requested image.  $status is set to 0 on success
 $make_target = "bin/${nic}.${fmt_extension}";
-$gitversion = exec('git describe --always --abbrev=1 --match "" 2>/dev/null');
-if ($gitversion) {
-	$gitversion = "GITVERSION=$gitversion";
-}
-
-$make_cmd = "make -C '$build_dir' '$make_target' $gitversion $emb_script_cmd 2>&1";
+$make_cmd = "make -C '$build_dir' '$make_target' $emb_script_cmd 2>&1";
 
 exec ( $make_cmd, $maketxt, $status );
 
@@ -244,7 +239,7 @@
             // Delete build directory as soon as it is not needed
             rm_build_dir ();
 
-            $output_filename = preg_replace('/[^a-z0-9\+\.\-]/i', '', "ipxe-${version}-${nic}.${fmt_extension}");
+            $output_filename = "ipxe-${version}-${nic}.${fmt_extension}";
 
             // Try to force IE to handle downloading right.
             Header ( "Cache-control: private");
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/customize-flags.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/customize-flags.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/customize-flags.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/customize-flags.php	2012-01-06 23:49:04.000000000 +0000
@@ -34,30 +34,30 @@
 ?>
 
 <form action="build.php" method=POST>
-  <input type="hidden" name="version" value = "<?php echo $version ?>">
+  <input type="hidden" name="version" value = "<? echo $version ?>">
   <input type="hidden" name="use_flags" value="1">
   <h3>
-    Make changes below and press <?php echo $build ?> to create an image, <br>
-    Or press <?php echo $restart ?> to return to the main page.
+    Make changes below and press <? echo $build ?> to create an image, <br>
+    Or press <? echo $restart ?> to return to the main page.
   </h3>
   <hr>
   <ul>
-  <?php require ( "directions.php" ); ?>
+  <? require ( "directions.php" ); ?>
   </ul>
   <hr>
-  <?php echo_flags( $flags ); ?>
+  <? echo_flags( $flags ); ?>
   <hr>
   <h3>Embedded Script:</h3>
-  <?php echo textarea ( "embedded_script", "", "10", "50" ); ?>
+  <? echo textarea ( "embedded_script", "", "10", "50" ); ?>
   <br><br>
   <hr>
   <center><table width="35%"><tr>
-  <td align="left"> <?php echo $build; ?> </td>
-  <td align="right"> <?php echo $restart ?></td>
+  <td align="left"> <? echo $build; ?> </td>
+  <td align="right"> <? echo $restart ?></td>
   </tr></table></center>
 </form>
 
-<?php include_once $bottom_inc; ?>
+<? include_once $bottom_inc; ?>
 <?
 // For emacs:
 //
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/directions.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/directions.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/directions.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/directions.php	2012-01-06 23:49:04.000000000 +0000
@@ -1,4 +1,4 @@
-<?php
+<?
 
 /**
  * Copyright (C) 2009 Marty Connor <mdc@etherboot.org>.
@@ -21,12 +21,12 @@
 
 ?>
     <li>
-      Choose an output format: <?php echo keys_menubox ( "ofmt", $ofmts,
+      Choose an output format: <? echo keys_menubox ( "ofmt", $ofmts,
       isset ( $_POST['ofmt'] ) ? $_POST['ofmt'] : "") ?>
       <br><br>
     </li>
     <li>
-      Choose a NIC type: <?php echo keys_menubox ( "nic", $nics,
+      Choose a NIC type: <? echo keys_menubox ( "nic", $nics,
       isset ( $_POST['nic'] ) ? $_POST['nic'] : "" ) ?>
       <br><br>
     </li>
@@ -40,11 +40,11 @@
       <a href="http://www.ipxe.org/howto/romburning"
       target="_blank">here</a>.
       <br><br>
-      PCI VENDOR CODE:  <?php echo textbox ( "pci_vendor_code",
+      PCI VENDOR CODE:  <? echo textbox ( "pci_vendor_code",
       isset ( $_POST['pci_vendor_code'] ) ? $_POST['pci_vendor_code']
               : "", 6 ); ?>
       &nbsp;&nbsp;
-      PCI DEVICE CODE:  <?php echo textbox ( "pci_device_code",
+      PCI DEVICE CODE:  <? echo textbox ( "pci_device_code",
       isset ( $_POST['pci_device_code'] ) ? $_POST['pci_device_code']
               : "", 6 ); ?>
       <h4>Please note for ROM images:</h4>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/flag-table.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/flag-table.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/flag-table.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/flag-table.php	2012-01-06 23:49:04.000000000 +0000
@@ -109,16 +109,6 @@
            "cfgsec" => "console"
            ),
 
-	"LOG_LEVEL"
-	=> array (
-	   "flag" => "LOG_LEVEL",
-	   "type" => "choice",
-	   "options" => array("LOG_NONE","LOG_EMERG","LOG_ALERT","LOG_CRIT","LOG_ERR",
-	      "LOG_WARNING","LOG_NOTICE","LOG_INFO","LOG_DEBUG","LOG_ALL"),
-	   "value" => "LOG_NONE",
-	   "cfgsec" => "console"
-	   ),
-
 	// End Console Options
 
 	// Begin Network Protocol Options:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/index.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/index.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/index.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/index.php	2012-01-06 23:49:04.000000000 +0000
@@ -27,10 +27,10 @@
 
 ?>
 <form action="build.php" method=POST>
-  <input type="hidden" name="version" value = "<?php echo $version ?>">
+  <input type="hidden" name="version" value = "<? echo $version ?>">
   <h3>To create an image:</h3>
   <ol>
-    <?php require ( "directions.php" ); ?>
+    <? require ( "directions.php" ); ?>
     <li>
       Generate and download an image:
       <input type="submit" name="A" value="Get Image">
@@ -44,4 +44,4 @@
   </ol>
 </form>
 
-<?php include_once $bottom_inc ?>
+<? include_once $bottom_inc ?>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/top.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/top.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/top.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/top.php	2012-01-06 23:49:04.000000000 +0000
@@ -1,6 +1,6 @@
 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
 
-<?php
+<?
 
 /**
  * Copyright (C) 2009 Marty Connor <mdc@etherboot.org>.
@@ -25,17 +25,17 @@
 
 <html>
 <head>
-  <link rev="made" href="mailto:<?php echo "${webmaster_email}" ?>">
+  <link rev="made" href="mailto:<? echo "${webmaster_email}" ?>">
   <meta name="keywords" content="rom, etherboot, ipxe, open source, rom-o-matic.net">
-  <title><?php echo $header_title ?></title>
-  <meta name="description" content="<?php echo $description ?>">
+  <title><? echo $header_title ?></title>
+  <meta name="description" content="<? echo $description ?>">
 </head>
 <h1>
-<?php echo "$html_title" ?>&nbsp;
+<? echo "$html_title" ?>&nbsp;
 </h1>
 <hr>
 <h2>
-<?php echo "$html_tagline" ?>
+<? echo "$html_tagline" ?>
 </h2>
 </form>
 <hr>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/utils.php ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/utils.php
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/rom-o-matic/utils.php	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/rom-o-matic/utils.php	2012-01-06 23:49:04.000000000 +0000
@@ -1,4 +1,4 @@
-<?php // -*- Mode: PHP; -*-
+<? // -*- Mode: PHP; -*-
 
 /**
  * Copyright (C) 2009 Marty Connor <mdc@etherboot.org>.
@@ -131,8 +131,7 @@
         if ( strpos ( $first_eight_chars, "family" ) === 0 ) {
 
             // get pathname of NIC driver
-            #list ( $dummy, $nic ) = split( "[ \t]+", $line );
-            list ( $dummy, $nic ) = explode("\t", $line);
+            list ( $dummy, $nic ) = split( "[ \t]+", $line );
             settype ( $nic, "string" );
 
             // extract filename name of driver from pathname
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/contrib/vm/bochsrc.txt ipxe-1.0.1~lliurex1505/contrib/vm/bochsrc.txt
--- ipxe-1.0.0+git-20131111.c3d1e78/contrib/vm/bochsrc.txt	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/contrib/vm/bochsrc.txt	2012-01-06 23:49:04.000000000 +0000
@@ -2,28 +2,14 @@
 # your pathname includes spaces.
 
 #=======================================================================
-# PLUGIN_CTRL:
-# Controls the presence of optional device plugins. These plugins are loaded
-# directly with this option and some of them install a config option that is
-# only available when the plugin device is loaded. The value "1" means to load
-# the plugin and "0" will unload it (if loaded before).
-# These plugins are currently supported: 'biosdev', 'e1000', 'es1370',
-# 'extfpuirq', 'gameport', 'iodebug', 'ne2k', 'parallel', 'pcidev', 'pcipnic',
-# 'sb16', 'serial', 'speaker', 'unmapped', 'usb_ohci', 'usb_uhci' and 'usb_xhci'.
-#=======================================================================
-plugin_ctrl: unmapped=1, biosdev=1, speaker=1, e1000=1, parallel=1, serial=1
-
-#=======================================================================
 # CONFIG_INTERFACE
 #
 # The configuration interface is a series of menus or dialog boxes that
 # allows you to change all the settings that control Bochs's behavior.
-# Depending on the platform there are up to 3 choices of configuration
-# interface: a text mode version called "textconfig" and two graphical versions
-# called "win32config" and "wx".  The text mode version uses stdin/stdout and
-# is always compiled in, unless Bochs is compiled for wx only. The choice
-# "win32config" is only available on win32 and it is the default there.
-# The choice "wx" is only available when you use "--with-wx" on the configure
+# There are two choices of configuration interface: a text mode version
+# called "textconfig" and a graphical version called "wx".  The text
+# mode version uses stdin/stdout and is always compiled in.  The graphical
+# version is only available when you use "--with-wx" on the configure
 # command.  If you do not write a config_interface line, Bochs will
 # choose a default for you.
 #
@@ -31,7 +17,6 @@
 # the "wx" display library.
 #=======================================================================
 #config_interface: textconfig
-#config_interface: win32config
 #config_interface: wx
 
 #=======================================================================
@@ -48,6 +33,7 @@
 #   x              use X windows interface, cross platform
 #   win32          use native win32 libraries
 #   carbon         use Carbon library (for MacOS X)
+#   beos           use native BeOS libraries
 #   macintosh      use MacOS pre-10
 #   amigaos        use native AmigaOS libraries
 #   sdl            use SDL library, cross platform
@@ -61,23 +47,18 @@
 # the "wx" display library.
 #
 # Specific options:
-# Some display libraries now support specific options to control their
-# behaviour. These options are supported by more than one display library:
-#
-# "gui_debug"   - use GTK debugger gui (sdl, x) / Win32 debugger gui (win32)
-# "hideIPS"     - disable IPS output in status bar (sdl, wx, x)
-# "nokeyrepeat" - turn off host keyboard repeat (sdl, win32, x)
-#
-# See the examples below for other currently supported options.
+# Some display libraries now support specific option to control their
+# behaviour. See the examples below for currently supported options.
 #=======================================================================
 #display_library: amigaos
+#display_library: beos
 #display_library: carbon
 #display_library: macintosh
 #display_library: nogui
 #display_library: rfb, options="timeout=60" # time to wait for client
 #display_library: sdl, options="fullscreen" # startup in fullscreen mode
 #display_library: term
-#display_library: win32
+#display_library: win32, options="legacyF12" # use F12 to toggle mouse
 #display_library: wx
 #display_library: x
 
@@ -86,245 +67,67 @@
 # The ROM BIOS controls what the PC does when it first powers on.
 # Normally, you can use a precompiled BIOS in the source or binary
 # distribution called BIOS-bochs-latest. The ROM BIOS is usually loaded
-# starting at address 0xf0000, and it is exactly 64k long. Another option
-# is 128k BIOS which is loaded at address 0xe0000.
+# starting at address 0xf0000, and it is exactly 64k long.
 # You can also use the environment variable $BXSHARE to specify the
 # location of the BIOS.
 # The usage of external large BIOS images (up to 512k) at memory top is
 # now supported, but we still recommend to use the BIOS distributed with
-# Bochs. The start address optional, since it can be calculated from image size.
+# Bochs. Now the start address can be calculated from image size.
 #=======================================================================
-#romimage: file=$BXSHARE/BIOS-bochs-latest
-#romimage: file=bios/seabios-1.6.3.bin
+romimage: file=bochs/bios/BIOS-bochs-latest, address=0xe0000
 #romimage: file=mybios.bin, address=0xfff80000 # 512k at memory top
-romimage: file=bochs/bios/BIOS-bochs-latest
+#romimage: file=mybios.bin # calculate start address from image size
 
 #=======================================================================
 # CPU:
 # This defines cpu-related parameters inside Bochs:
 #
-#  MODEL:
-#    Selects CPU configuration to emulate from pre-defined list of all
-#    supported configurations. When this option is used, the CPUID option
-#    has no effect anymore.
-#
-#  CPU configurations that can be selected:
-# -----------------------------------------------------------------
-#  pentium_mmx                Intel Pentium MMX
-#  amd_k6_2_chomper           AMD-K6(tm) 3D processor (Chomper)
-#  p2_klamath                 Intel Pentium II (Klamath)
-#  p3_katmai                  Intel Pentium III (Katmai)
-#  p4_willamette              Intel(R) Pentium(R) 4 (Willamette)
-#  core_duo_t2400_yonah       Intel(R) Core(TM) Duo CPU T2400 (Yonah)
-#  atom_n270                  Intel(R) Atom(TM) CPU N270
-#  athlon64_clawhammer        AMD Athlon(tm) 64 Processor 2800+ (Clawhammer)
-#  athlon64_venice            AMD Athlon(tm) 64 Processor 3000+ (Venice)
-#  turion64_tyler             AMD Turion(tm) 64 X2 Mobile TL-60 (Tyler)
-#  phenom_8650_toliman        AMD Phenom X3 8650 (Toliman)
-#  p4_prescott_celeron_336    Intel(R) Celeron(R) 336 (Prescott)
-#  core2_penryn_t9600         Intel Mobile Core 2 Duo T9600 (Penryn)
-#  corei5_lynnfield_750       Intel(R) Core(TM) i5   750 (Lynnfield)
-#  corei5_arrandale_m520      Intel(R) Core(TM) i5 M 520 (Arrandale)
-#  corei7_sandy_bridge_2600k  Intel(R) Core(TM) i7-2600K (Sandy Bridge)
-#  corei7_ivy_bridge_3770k    Intel(R) Core(TM) i7-3770K CPU (Ivy Bridge)
-#
 #  COUNT:
-#    Set the number of processors:cores per processor:threads per core
-#    when Bochs is compiled for SMP emulation.
-#    Bochs currently supports up to 8 threads running simultaniosly.
-#    If Bochs is compiled without SMP support, it won't accept values
-#    different from 1.
-#
-#  QUANTUM:
-#    Maximum amount of instructions allowed to execute by processor before
-#    returning control to another cpu. This option exists only in Bochs
-#    binary compiled with SMP support.
+#  Set the number of processors:cores per processor:threads per core
+#  when Bochs is compiled for SMP emulation.
+#  Bochs currently supports up to 8 threads running simultaniosly.
+#  If Bochs is compiled without SMP support, it won't accept values
+#  different from 1.
 #
 #  RESET_ON_TRIPLE_FAULT:
-#    Reset the CPU when triple fault occur (highly recommended) rather than
-#    PANIC. Remember that if you trying to continue after triple fault the
-#    simulation will be completely bogus !
-#
-#  CPUID_LIMIT_WINNT:
-#    Determine whether to limit maximum CPUID function to 2. This mode is
-#    required to workaround WinNT installation and boot issues.
-#
-#  MSRS:
-#    Define path to user CPU Model Specific Registers (MSRs) specification.
-#    See example in msrs.def.
-#
-#  IGNORE_BAD_MSRS:
-#    Ignore MSR references that Bochs does not understand; print a warning
-#    message instead of generating #GP exception. This option is enabled
-#    by default but will not be avaiable if configurable MSRs are enabled.
-#
-#  MWAIT_IS_NOP:
-#    When this option is enabled MWAIT will not put the CPU into a sleep state.
-#    This option exists only if Bochs compiled with --enable-monitor-mwait.
+#  Reset the CPU when triple fault occur (highly recommended) rather than
+#  PANIC. Remember that if you trying to continue after triple fault the
+#  simulation will be completely bogus !
 #
 #  IPS:
-#    Emulated Instructions Per Second. This is the number of IPS that bochs
-#    is capable of running on your machine. You can recompile Bochs with
-#    --enable-show-ips option enabled, to find your host's capability.
-#    Measured IPS value will then be logged into your log file or shown
-#    in the status bar (if supported by the gui).
-#
-#    IPS is used to calibrate many time-dependent events within the bochs
-#    simulation.  For example, changing IPS affects the frequency of VGA
-#    updates, the duration of time before a key starts to autorepeat, and
-#    the measurement of BogoMips and other benchmarks.
+#  Emulated Instructions Per Second.  This is the number of IPS that bochs
+#  is capable of running on your machine. You can recompile Bochs with
+#  --enable-show-ips option enabled, to find your workstation's capability.
+#  Measured IPS value will then be logged into your log file or status bar
+#  (if supported by the gui).
+#
+#  IPS is used to calibrate many time-dependent events within the bochs
+#  simulation.  For example, changing IPS affects the frequency of VGA
+#  updates, the duration of time before a key starts to autorepeat, and
+#  the measurement of BogoMips and other benchmarks.
 #
 #  Examples:
-#
-#  Bochs Machine/Compiler                                 Mips
-# ______________________________________________________________________
-#  2.4.6 3.4Ghz Intel Core i7 2600 with Win7x64/g++ 4.5.2 85 to 95 Mips
-#  2.3.7 3.2Ghz Intel Core 2 Q9770 with WinXP/g++ 3.4     50 to 55 Mips
-#  2.3.7 2.6Ghz Intel Core 2 Duo with WinXP/g++ 3.4       38 to 43 Mips
-#  2.2.6 2.6Ghz Intel Core 2 Duo with WinXP/g++ 3.4       21 to 25 Mips
-#  2.2.6 2.1Ghz Athlon XP with Linux 2.6/g++ 3.4          12 to 15 Mips
-#=======================================================================
-cpu: model=core2_penryn_t9600, count=1, ips=50000000, reset_on_triple_fault=1, ignore_bad_msrs=1, msrs="msrs.def"
-cpu: cpuid_limit_winnt=0
-
-#=======================================================================
-# CPUID:
-#
-# This defines features and functionality supported by Bochs emulated CPU.
-# The option has no offect if CPU model was selected in CPU option.
-#
-#  MMX:
-#    Select MMX instruction set support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 5.
-#
-#  APIC:
-#    Select APIC configuration (LEGACY/XAPIC/XAPIC_EXT/X2APIC).
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 5.
-#
-#  SEP:
-#    Select SYSENTER/SYSEXIT instruction set support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  SSE:
-#    Select SSE instruction set support.
-#    Any of NONE/SSE/SSE2/SSE3/SSSE3/SSE4_1/SSE4_2 could be selected.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  SSE4A:
-#    Select AMD SSE4A instructions support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  AES:
-#    Select AES instruction set support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  MOVBE:
-#    Select MOVBE Intel(R) Atom instruction support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  XSAVE:
-#    Select XSAVE extensions support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  XSAVEOPT:
-#    Select XSAVEOPT instruction support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  AVX:
-#    Select AVX/AVX2 instruction set support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  AVX_F16C:
-#    Select AVX float16 convert instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  AVX_FMA:
-#    Select AVX fused multiply add (FMA) instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  BMI:
-#    Select BMI1/BMI2 instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  XOP:
-#    Select AMD XOP instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  FMA4:
-#    Select AMD four operand FMA instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  TBM:
-#    Select AMD Trailing Bit Manipulation (TBM) instructions support.
-#    This option exists only if Bochs compiled with --enable-avx option.
-#
-#  X86-64:
-#    Enable x86-64 and long mode support.
-#    This option exists only if Bochs compiled with x86-64 support.
-#
-#  1G_PAGES:
-#    Enable 1G page size support in long mode.
-#    This option exists only if Bochs compiled with x86-64 support.
-#
-#  PCID:
-#    Enable Process-Context Identifiers (PCID) support in long mode.
-#    This option exists only if Bochs compiled with x86-64 support.
-#
-#  FSGSBASE:
-#    Enable GS/GS BASE access instructions support in long mode.
-#    This option exists only if Bochs compiled with x86-64 support.
-#
-#  SMEP:
-#    Enable Supervisor Mode Execution Protection (SMEP) support.
-#    This option exists only if Bochs compiled with BX_CPU_LEVEL >= 6.
-#
-#  MWAIT:
-#    Select MONITOR/MWAIT instructions support.
-#    This option exists only if Bochs compiled with --enable-monitor-mwait.
-#
-#  VMX:
-#    Select VMX extensions emulation support.
-#    This option exists only if Bochs compiled with --enable-vmx option.
-#
-#  VENDOR_STRING:
-#    Set the CPUID vendor string returned by CPUID(0x0). This should be a
-#    twelve-character ASCII string.
-#
-#  BRAND_STRING:
-#    Set the CPUID vendor string returned by CPUID(0x80000002 .. 0x80000004).
-#    This should be at most a forty-eight-character ASCII string.
-#
-#  FAMILY:
-#    Set model information returned by CPUID. Default family value determined
-#    by configure option --enable-cpu-level.
-#
-#  MODEL:
-#    Set model information returned by CPUID. Default model value is 3.
-#
-#  STEPPING:
-#    Set stepping information returned by CPUID. Default stepping value is 3.
+#  Machine                                         Mips
+# ________________________________________________________________
+#  2.1Ghz Athlon XP with Linux 2.6/g++ 3.4         12 to 15 Mips
+#  1.6Ghz Intel P4 with Win2000/g++ 3.3             5 to  7 Mips
+#  650Mhz Athlon K-7 with Linux 2.4.4/egcs-2.91.66  2 to  2.5 Mips
+#  400Mhz Pentium II with Linux 2.0.36/egcs-1.0.3   1 to  1.8 Mips
 #=======================================================================
-#cpuid: x86_64=1, mmx=1, sep=1, sse=sse4_2, apic=xapic, aes=1, movbe=1, xsave=1
-#cpuid: family=6, model=0x1a, stepping=5
+cpu: count=1, ips=10000000, reset_on_triple_fault=1
 
 #=======================================================================
-# MEMORY
-# Set the amount of physical memory you want to emulate.
-#
-# GUEST:
-# Set amount of guest physical memory to emulate. The default is 32MB,
-# the maximum amount limited only by physical address space limitations.
-#
-# HOST:
-# Set amount of host memory you want to allocate for guest RAM emulation.
-# It is possible to allocate less memory than you want to emulate in guest
-# system. This will fake guest to see the non-existing memory. Once guest
-# system touches new memory block it will be dynamically taken from the
-# memory pool. You will be warned (by FATAL PANIC) in case guest already
-# used all allocated host memory and wants more.
-#
+# MEGS
+# Set the number of Megabytes of physical memory you want to emulate.
+# The default is 32MB, most OS's won't need more than that.
+# The maximum amount of memory supported is 2048Mb.
 #=======================================================================
-memory: guest=512, host=256
+#megs: 256
+#megs: 128
+#megs: 64
+megs: 32
+#megs: 16
+#megs: 8
 
 #=======================================================================
 # OPTROMIMAGE[1-4]:
@@ -341,7 +144,8 @@
 #optromimage2: file=optionalrom.bin, address=0xd1000
 #optromimage3: file=optionalrom.bin, address=0xd2000
 #optromimage4: file=optionalrom.bin, address=0xd3000
-optromimage1: file=../../src/bin/intel.rom, address=0xcb000
+optromimage1: file=../../src/bin/pnic.rom, address=0xd0000
+#optromimage1: file=../../src/bin/rtl8029.rom, address=0xd0000
 
 #optramimage1: file=/path/file1.img, address=0x0010000
 #optramimage2: file=/path/file2.img, address=0x0020000
@@ -353,31 +157,18 @@
 # You now need to load a VGA ROM BIOS into C0000.
 #=======================================================================
 #vgaromimage: file=bios/VGABIOS-elpin-2.40
-#vgaromimage: file=$BXSHARE/VGABIOS-lgpl-latest
-#vgaromimage: file=bios/VGABIOS-lgpl-latest-cirrus
 vgaromimage: file=bochs/bios/VGABIOS-lgpl-latest
+#vgaromimage: file=bios/VGABIOS-lgpl-latest-cirrus
 
 #=======================================================================
 # VGA:
-# This defines parameters related to the VGA display
-#
-#   EXTENSION
-#     Here you can specify the display extension to be used. With the value
-#     'none' you can use standard VGA with no extension. Other supported
-#     values are 'vbe' for Bochs VBE and 'cirrus' for Cirrus SVGA support.
-#
-#   UPDATE_FREQ
-#     The VGA update frequency is based on the emulated clock and the default
-#     value is 5. Keep in mind that you must tweak the 'cpu: ips=N' directive
-#     to be as close to the number of emulated instructions-per-second your
-#     workstation can do, for this to be accurate. If the realtime sync is
-#     enabled with the 'clock' option, the value is based on the real time.
-#     This parameter can be changed at runtime.
-#
-# Examples:
-#   vga: extension=cirrus, update_freq=10
-#=======================================================================
-#vga: extension=vbe, update_freq=5
+# Here you can specify the display extension to be used. With the value
+# 'none' you can use standard VGA with no extension. Other supported
+# values are 'vbe' for Bochs VBE and 'cirrus' for Cirrus SVGA support.
+#=======================================================================
+#vga: extension=cirrus
+#vga: extension=vbe
+vga: extension=none
 
 #=======================================================================
 # FLOPPYA:
@@ -386,42 +177,36 @@
 # booting from 'a' (or 'floppy').
 #
 # You can set the initial status of the media to 'ejected' or 'inserted'.
-#   floppya: 2_88=path, status=ejected    (2.88M 3.5"  media)
-#   floppya: 1_44=path, status=inserted   (1.44M 3.5"  media)
-#   floppya: 1_2=path, status=ejected     (1.2M  5.25" media)
-#   floppya: 720k=path, status=inserted   (720K  3.5"  media)
-#   floppya: 360k=path, status=inserted   (360K  5.25" media)
-#   floppya: 320k=path, status=inserted   (320K  5.25" media)
-#   floppya: 180k=path, status=inserted   (180K  5.25" media)
-#   floppya: 160k=path, status=inserted   (160K  5.25" media)
-#   floppya: image=path, status=inserted  (guess media type from image size)
-#   floppya: 1_44=vvfat:path, status=inserted  (use directory as VFAT media)
-#   floppya: type=1_44                    (1.44M 3.5" floppy drive, no media)
+#   floppya: 2_88=path, status=ejected             (2.88M 3.5" floppy)
+#   floppya: 1_44=path, status=inserted            (1.44M 3.5" floppy)
+#   floppya: 1_2=path, status=ejected              (1.2M  5.25" floppy)
+#   floppya: 720k=path, status=inserted            (720K  3.5" floppy)
+#   floppya: 360k=path, status=inserted            (360K  5.25" floppy)
+#   floppya: 320k=path, status=inserted            (320K  5.25" floppy)
+#   floppya: 180k=path, status=inserted            (180K  5.25" floppy)
+#   floppya: 160k=path, status=inserted            (160K  5.25" floppy)
+#   floppya: image=path, status=inserted           (guess type from image size)
 #
 # The path should be the name of a disk image file.  On Unix, you can use a raw
 # device name such as /dev/fd0 on Linux.  On win32 platforms, use drive letters
 # such as a: or b: as the path.  The parameter 'image' works with image files
 # only. In that case the size must match one of the supported types.
-# The parameter 'type' can be used to enable the floppy drive without media
-# and status specified. Usually the drive type is set up based on the media type.
-# The optional parameter 'write_protected' can be used to control the media
-# write protect switch. By default it is turned off.
 #=======================================================================
 #floppya: 1_44=/dev/fd0, status=inserted
 #floppya: image=../1.44, status=inserted
 #floppya: 1_44=/dev/fd0H1440, status=inserted
 #floppya: 1_2=../1_2, status=inserted
 #floppya: 1_44=a:, status=inserted
-#floppya: 1_44=a.img, status=inserted, write_protected=1
+#floppya: 1_44=a.img, status=inserted
 #floppya: 1_44=/dev/rfd0a, status=inserted
-floppya: 1_44=../../src/bin/ipxe.dsk, status=inserted
+floppya: 1_44=../../src/bin/pnic.dsk, status=inserted
 
 #=======================================================================
 # FLOPPYB:
 # See FLOPPYA above for syntax
 #=======================================================================
 #floppyb: 1_44=b:, status=inserted
-#floppyb: 1_44=b.img, status=inserted
+floppyb: 1_44=b.img, status=inserted
 
 #=======================================================================
 # ATA0, ATA1, ATA2, ATA3
@@ -451,8 +236,8 @@
 # This defines the type and characteristics of all attached ata devices:
 #   type=       type of attached device [disk|cdrom]
 #   mode=       only valid for disks [flat|concat|external|dll|sparse|vmware3]
-#   mode=       only valid for disks [undoable|growing|volatile|vvfat]
-#   path=       path of the image / directory
+#   mode=       only valid for disks [undoable|growing|volatile]
+#   path=       path of the image
 #   cylinders=  only valid for disks
 #   heads=      only valid for disks
 #   spt=        only valid for disks
@@ -460,7 +245,7 @@
 #   biosdetect= type of biosdetection [none|auto], only for disks on ata0 [cmos]
 #   translation=type of translation of the bios, only for disks [none|lba|large|rechs|auto]
 #   model=      string returned by identify device command
-#   journal=    optional filename of the redolog for undoable, volatile and vvfat disks
+#   journal=    optional filename of the redolog for undoable and volatile disks
 #
 # Point this at a hard disk image file, cdrom iso file, or physical cdrom
 # device.  To create a hard disk image, try running bximage.  It will help you
@@ -474,11 +259,10 @@
 # access the "first" cdrom in the system.  On MacOSX, use path="drive"
 # to access the physical drive.
 #
-# The path is mandatory for hard disks. Disk geometry autodetection works with
-# images created by bximage if CHS is set to 0/0/0 (cylinders are calculated
-# using  heads=16 and spt=63). For other hard disk images and modes the
-# cylinders, heads, and spt are mandatory. In all cases the disk size reported
-# from the image must be exactly C*H*S*512.
+# The path is always mandatory. For flat hard disk images created with
+# bximage geometry autodetection can be used (cylinders=0 -> cylinders are
+# calculated using heads=16 and spt=63). For other hard disk images and modes
+# the cylinders, heads, and spt are mandatory.
 #
 # Default values are:
 #   mode=flat, biosdetect=auto, translation=auto, model="Generic 1234"
@@ -495,10 +279,7 @@
 #   ata3-master: type=disk, mode=flat, path=483M.sample, cylinders=1024, heads=15, spt=63
 #   ata3-slave:  type=cdrom, path=iso.sample, status=inserted
 #=======================================================================
-#ata0-master: type=disk, mode=flat, path="30M.sample"
 #ata0-master: type=disk, mode=flat, path="30M.sample", cylinders=615, heads=6, spt=17
-#ata0-master: type=disk, mode=flat, path="c.img", cylinders=0 # autodetect
-#ata0-slave: type=disk, mode=vvfat, path=/bochs/images/vvfat, journal=vvfat.redolog
 #ata0-slave: type=cdrom, path=D:, status=inserted
 #ata0-slave: type=cdrom, path=/dev/cdrom, status=inserted
 #ata0-slave: type=cdrom, path="drive", status=inserted
@@ -506,13 +287,15 @@
 
 #=======================================================================
 # BOOT:
-# This defines the boot sequence. Now you can specify up to 3 boot drives,
-# which can be 'floppy', 'disk', 'cdrom' or 'network' (boot ROM).
-# Legacy 'a' and 'c' are also supported.
+# This defines the boot sequence. Now you can specify up to 3 boot drives.
+# You can either boot from 'floppy', 'disk' or 'cdrom'
+# legacy 'a' and 'c' are also supported
 # Examples:
 #   boot: floppy
-#   boot: cdrom, disk
-#   boot: network, disk
+#   boot: disk
+#   boot: cdrom
+#   boot: c
+#   boot: a
 #   boot: cdrom, floppy, disk
 #=======================================================================
 #boot: floppy
@@ -524,17 +307,7 @@
 # This defines the parameters of the clock inside Bochs:
 #
 #  SYNC:
-#  This defines the method how to synchronize the Bochs internal time
-#  with realtime. With the value 'none' the Bochs time relies on the IPS
-#  value and no host time synchronization is used. The 'slowdown' method
-#  sacrifices performance to preserve reproducibility while allowing host
-#  time correlation. The 'realtime' method sacrifices reproducibility to
-#  preserve performance and host-time correlation.
-#  It is possible to enable both synchronization methods.
-#
-#  RTC_SYNC:
-#  If this option is enabled together with the realtime synchronization,
-#  the RTC runs at realtime speed. This feature is disabled by default.
+#  TO BE COMPLETED (see Greg explanation in feature request #536329)
 #
 #  TIME0:
 #  Specifies the start (boot) time of the virtual machine. Use a time
@@ -569,6 +342,7 @@
 #   floppy_bootsig_check: disabled=0
 #   floppy_bootsig_check: disabled=1
 #=======================================================================
+#floppy_bootsig_check: disabled=1
 floppy_bootsig_check: disabled=0
 
 #=======================================================================
@@ -604,7 +378,7 @@
 #=======================================================================
 # LOG CONTROLS
 #
-# Bochs has four severity levels for event logging.
+# Bochs now has four severity levels for event logging.
 #   panic: cannot proceed.  If you choose to continue after a panic,
 #          don't be surprised if you get strange behavior or crashes.
 #   error: something went wrong, but it is probably safe to continue the
@@ -613,13 +387,9 @@
 #   debug: messages useful only when debugging the code.  This may
 #          spit out thousands per second.
 #
-# For events of each level, you can choose to exit Bochs ('fatal'), 'report'
-# or 'ignore'. On some guis you have the additional choice 'ask'. A gui dialog
-# appears asks how to proceed.
-#
-# It is also possible to specify the 'action' to do for each Bochs facility
-# separately (e.g. crash on panics from everything except the cdrom, and only
-# report those). See the 'log function' module list in the user documentation.
+# For events of each level, you can choose to crash, report, or ignore.
+# TODO: allow choice based on the facility: e.g. crash on panics from
+#       everything except the cdrom, and only report those.
 #
 # If you are experiencing many panics, it can be helpful to change
 # the panic action to report instead of fatal.  However, be aware
@@ -630,7 +400,8 @@
 panic: action=ask
 error: action=report
 info: action=report
-debug: action=ignore, pci=report # report BX_DEBUG from module 'pci'
+debug: action=ignore
+#pass: action=fatal
 
 #=======================================================================
 # DEBUGGER_LOG:
@@ -654,29 +425,18 @@
 # Then do `sleep 1000000' in the com1 window to keep the shell from
 # messing with things, and run bochs in the other window.  Serial I/O to
 # com1 (port 0x3f8) will all go to the other window.
-# In socket* and pipe* (win32 only) modes Bochs becomes either socket/named pipe
-# client or server. In client mode it connects to an already running server (if
-# connection fails Bochs treats com port as not connected). In server mode it
-# opens socket/named pipe and waits until a client application connects to it
-# before starting simulation. This mode is useful for remote debugging (e.g.
-# with gdb's "target remote host:port" command or windbg's command line option
-# -k com:pipe,port=\\.\pipe\pipename). Note: 'socket' is a shorthand for
-# 'socket-client' and 'pipe' for 'pipe-client'. Socket modes use simple TCP
-# communication, pipe modes use duplex byte mode pipes.
 # Other serial modes are 'null' (no input/output), 'file' (output to a file
 # specified as the 'dev' parameter), 'raw' (use the real serial port - under
 # construction for win32), 'mouse' (standard serial mouse - requires
-# mouse option setting 'type=serial', 'type=serial_wheel' or 'type=serial_msys').
+# mouse option setting 'type=serial' or 'type=serial_wheel') and 'socket'
+# (connect a networking socket).
 #
 # Examples:
 #   com1: enabled=1, mode=null
 #   com1: enabled=1, mode=mouse
 #   com2: enabled=1, mode=file, dev=serial.out
 #   com3: enabled=1, mode=raw, dev=com1
-#   com3: enabled=1, mode=socket-client, dev=localhost:8888
-#   com3: enabled=1, mode=socket-server, dev=localhost:8888
-#   com4: enabled=1, mode=pipe-client, dev=\\.\pipe\mypipe
-#   com4: enabled=1, mode=pipe-server, dev=\\.\pipe\mypipe
+#   com3: enabled=1, mode=socket, dev=localhost:8888
 #=======================================================================
 #com1: enabled=1, mode=term, dev=/dev/ttyp9
 
@@ -701,9 +461,6 @@
 # This defines the SB16 sound emulation. It can have several of the
 # following properties.
 # All properties are in the format sb16: property=value
-# enabled:
-#      This optional property controls the presence of the SB16 emulation.
-#      The emulation is turned on unless this property is used and set to 0.
 # midi: The filename is where the midi data is sent. This can be a
 #       device or just a file if you want to record the midi data.
 # midimode:
@@ -731,25 +488,26 @@
 #      non-continuous sound.  750000 is usually a good value.  This needs a
 #      reasonably correct setting for the IPS parameter of the CPU option.
 #
-# Examples for output devices:
-#   sb16: midimode=1, midi="", wavemode=1, wave=""           # win32
-#   sb16: midimode=1, midi=alsa:128:0, wavemode=1, wave=alsa # Linux with ALSA
+# For an example look at the next line:
 #=======================================================================
+
 #sb16: midimode=1, midi=/dev/midi00, wavemode=1, wave=/dev/dsp, loglevel=2, log=sb16.log, dmatimer=600000
 
 #=======================================================================
-# ES1370:
-# This defines the ES1370 sound emulation. The parameter 'enabled' controls the
-# presence of the device. In addition to this, it must be loaded with 'plugin_ctrl'
-# and assigned to a PCI slot. The 'wavedev' parameter is similar to the 'wave'
-# parameter of the SB16 soundcard. The emulation supports recording and playback
-# (except DAC1+DAC2 output at the same time).
+# VGA_UPDATE_INTERVAL:
+# Video memory is scanned for updates and screen updated every so many
+# virtual seconds.  The default is 40000, about 25Hz. Keep in mind that
+# you must tweak the 'cpu: ips=N' directive to be as close to the number
+# of emulated instructions-per-second your workstation can do, for this
+# to be accurate.
 #
 # Examples:
-#   es1370: enabled=1, wavedev=""       # win32
-#   es1370: enabled=1, wavedev=alsa     # Linux with ALSA
+#   vga_update_interval: 250000
 #=======================================================================
-#es1370: enabled=1, wavedev=alsa
+vga_update_interval: 300000
+
+# using for Winstone '98 tests
+#vga_update_interval:  100000
 
 #=======================================================================
 # KEYBOARD_SERIAL_DELAY:
@@ -779,34 +537,24 @@
 
 #=======================================================================
 # MOUSE:
-# This defines parameters for the emulated mouse type, the initial status
-# of the mouse capture and the runtime method to toggle it.
-#
-#  TYPE:
-#  With the mouse type option you can select the type of mouse to emulate.
-#  The default value is 'ps2'. The other choices are 'imps2' (wheel mouse
-#  on PS/2), 'serial', 'serial_wheel' and 'serial_msys' (one com port requires
-#  setting 'mode=mouse'). To connect a mouse to an USB port, see the 'usb_uhci',
-#  'usb_ohci' or 'usb_xhci' options (requires PCI and USB support).
-#
-#  ENABLED:
-#  The Bochs gui creates mouse "events" unless the 'enabled' option is
-#  set to 0. The hardware emulation itself is not disabled by this.
-#  Unless you have a particular reason for enabling the mouse by default,
-#  it is recommended that you leave it off. You can also toggle the mouse
-#  usage at runtime (RFB, SDL, Win32, wxWidgets and X11 - see below).
-#
-#  TOGGLE:
-#  The default method to toggle the mouse capture at runtime is to press the
-#  CTRL key and the middle mouse button ('ctrl+mbutton'). This option allows
-#  to change the method to 'ctrl+f10' (like DOSBox), 'ctrl+alt' (like QEMU)
-#  or 'f12' (replaces win32 'legacyF12' option).
+# This option prevents Bochs from creating mouse "events" unless a mouse
+# is  enabled. The hardware emulation itself is not disabled by this.
+# You can turn the mouse on by setting enabled to 1, or turn it off by
+# setting enabled to 0. Unless you have a particular reason for enabling
+# the mouse by default, it is recommended that you leave it off.
+# You can also toggle the mouse usage at runtime (control key + middle
+# mouse button on X11, SDL, wxWidgets and Win32).
+# With the mouse type option you can select the type of mouse to emulate.
+# The default value is 'ps2'. The other choices are 'imps2' (wheel mouse
+# on PS/2), 'serial', 'serial_wheel' (one com port requires setting
+# 'mode=mouse') and 'usb' (3-button mouse - one of the USB ports must be
+# connected with the 'mouse' device - requires PCI and USB support).
 #
 # Examples:
 #   mouse: enabled=1
-#   mouse: type=imps2, enabled=1
-#   mouse: type=serial, enabled=1
-#   mouse: enabled=0, toggle=ctrl+f10
+#   mouse: enabled=1, type=imps2
+#   mouse: enabled=1, type=serial
+#   mouse: enabled=0
 #=======================================================================
 mouse: enabled=0
 
@@ -838,86 +586,54 @@
 #=======================================================================
 # ne2k: NE2000 compatible ethernet adapter
 #
-# Format:
-# ne2k: enabled=1, ioaddr=IOADDR, irq=IRQ, mac=MACADDR, ethmod=MODULE,
-#       ethdev=DEVICE, script=SCRIPT, bootrom=BOOTROM
-#
-# IOADDR, IRQ: You probably won't need to change ioaddr and irq, unless there
-# are IRQ conflicts. These arguments are ignored when assign the ne2k to a
-# PCI slot.
+# Examples:
+# ne2k: ioaddr=IOADDR, irq=IRQ, mac=MACADDR, ethmod=MODULE, ethdev=DEVICE, script=SCRIPT
+#
+# ioaddr, irq: You probably won't need to change ioaddr and irq, unless there
+# are IRQ conflicts.
 #
-# MAC: The MAC address MUST NOT match the address of any machine on the net.
+# mac: The MAC address MUST NOT match the address of any machine on the net.
 # Also, the first byte must be an even number (bit 0 set means a multicast
 # address), and you cannot use ff:ff:ff:ff:ff:ff because that's the broadcast
 # address.  For the ethertap module, you must use fe:fd:00:00:00:01.  There may
 # be other restrictions too.  To be safe, just use the b0:c4... address.
 #
-# ETHDEV: The ethdev value is the name of the network interface on your host
+# ethdev: The ethdev value is the name of the network interface on your host
 # platform.  On UNIX machines, you can get the name by running ifconfig.  On
 # Windows machines, you must run niclist to get the name of the ethdev.
 # Niclist source code is in misc/niclist.c and it is included in Windows
 # binary releases.
 #
-# SCRIPT: The script value is optional, and is the name of a script that
+# script: The script value is optional, and is the name of a script that
 # is executed after bochs initialize the network interface. You can use
 # this script to configure this network interface, or enable masquerading.
 # This is mainly useful for the tun/tap devices that only exist during
 # Bochs execution. The network interface name is supplied to the script
-# as first parameter.
-#
-# BOOTROM: The bootrom value is optional, and is the name of the ROM image
-# to load. Note that this feature is only implemented for the PCI version of
-# the NE2000.
+# as first parameter
 #
 # If you don't want to make connections to any physical networks,
 # you can use the following 'ethmod's to simulate a virtual network.
 #   null: All packets are discarded, but logged to a few files.
+#   arpback: ARP is simulated. Disabled by default.
 #   vde:  Virtual Distributed Ethernet
 #   vnet: ARP, ICMP-echo(ping), DHCP and read/write TFTP are simulated.
 #         The virtual host uses 192.168.10.1.
 #         DHCP assigns 192.168.10.2 to the guest.
-#         TFTP uses the 'ethdev' value for the root directory and doesn't
+#         TFTP uses the ethdev value for the root directory and doesn't
 #         overwrite files.
 #
 #=======================================================================
-# ne2k: ioaddr=0x300, irq=9, mac=fe:fd:00:00:00:01, ethmod=fbsd, ethdev=en0 #macosx
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:00, ethmod=fbsd, ethdev=xl0
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:00, ethmod=linux, ethdev=eth0
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:01, ethmod=win32, ethdev=MYCARD
-# ne2k: ioaddr=0x300, irq=9, mac=fe:fd:00:00:00:01, ethmod=tap, ethdev=tap0
-# ne2k: ioaddr=0x300, irq=9, mac=fe:fd:00:00:00:01, ethmod=tuntap, ethdev=/dev/net/tun0, script=./tunconfig
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:01, ethmod=null, ethdev=eth0
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:01, ethmod=vde, ethdev="/tmp/vde.ctl"
-# ne2k: ioaddr=0x300, irq=9, mac=b0:c4:20:00:00:01, ethmod=vnet, ethdev="c:/temp"
-# ne2k: mac=b0:c4:20:00:00:01, ethmod=slirp, script=/usr/local/bin/slirp, bootrom=ne2k_pci.rom
-
-#=======================================================================
-# pnic: Bochs/Etherboot pseudo-NIC
-#
-# Format:
-# pnic: enabled=1, mac=MACADDR, ethmod=MODULE, ethdev=DEVICE, script=SCRIPT,
-#       bootrom=BOOTROM
-#
-# The pseudo-NIC accepts the same syntax (for mac, ethmod, ethdev, script,
-# bootrom) and supports the same networking modules as the NE2000 adapter.
-# In addition to this, it must be loaded with 'plugin_ctrl' and assigned
-# to a PCI slot.
-#=======================================================================
-#pnic: enabled=1, mac=b0:c4:20:00:00:00, ethmod=vnet
-
-#=======================================================================
-# e1000: Intel(R) 82540EM Gigabit Ethernet adapter
-#
-# Format:
-# e1000: enabled=1, mac=MACADDR, ethmod=MODULE, ethdev=DEVICE, script=SCRIPT
-#        bootrom=BOOTROM
-#
-# The E1000 accepts the same syntax (for mac, ethmod, ethdev, script, bootrom)
-# and supports the same networking modules as the NE2000 adapter. In addition
-# to this, it must be loaded with 'plugin_ctrl' and assigned to a PCI slot.
-#=======================================================================
-#e1000: enabled=1, mac=52:54:00:12:34:56, ethmod=slirp, script=/usr/local/bin/slirp
-e1000: enabled=1, mac=52:54:00:12:34:56, ethmod=tuntap, ethdev=/dev/net/tun:tap0
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=fbsd, ethdev=en0 #macosx
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:00, ethmod=fbsd, ethdev=xl0
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:00, ethmod=linux, ethdev=eth0
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:01, ethmod=win32, ethdev=MYCARD
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=tap, ethdev=tap0
+# ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=tuntap, ethdev=/dev/net/tun0, script=./tunconfig
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:01, ethmod=null, ethdev=eth0
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:01, ethmod=vde, ethdev="/tmp/vde.ctl"
+# ne2k: ioaddr=0x240, irq=9, mac=b0:c4:20:00:00:01, ethmod=vnet, ethdev="c:/temp"
+pnic: mac=fe:fd:00:00:00:01, ethmod=tuntap, ethdev=/dev/net/tun:tap0
+#ne2k: ioaddr=0x240, irq=9, mac=fe:fd:00:00:00:01, ethmod=tuntap, ethdev=/dev/net/tun:tap0
 
 #=======================================================================
 # KEYBOARD_MAPPING:
@@ -946,88 +662,45 @@
 # USER_SHORTCUT:
 # This defines the keyboard shortcut to be sent when you press the "user"
 # button in the headerbar. The shortcut string is a combination of maximum
-# 3 key names (listed below) separated with a '-' character.
+# 3 key names (listed below) separated with a '-' character. The old-style
+# syntax (without the '-') still works for the key combinations supported
+# in Bochs 2.2.1.
 # Valid key names:
 # "alt", "bksl", "bksp", "ctrl", "del", "down", "end", "enter", "esc",
 # "f1", ... "f12", "home", "ins", "left", "menu", "minus", "pgdwn", "pgup",
-# "plus", "right", "shift", "space", "tab", "up", "win", "print" and "power".
+# "plus", "right", "shift", "space", "tab", "up", and "win".
 #
 # Example:
 #   user_shortcut: keys=ctrl-alt-del
 #=======================================================================
-#user_shortcut: keys=ctrl-alt-del
+user_shortcut: keys=ctrl-alt-del
 
 #=======================================================================
-# PCI:
-# This option controls the presence of a PCI chipset in Bochs. Currently it only
-# supports the i440FX chipset. You can also specify the devices connected to
-# PCI slots. Up to 5 slots are available. These devices are currently supported:
-# cirrus, e1000, es1370, ne2k, pcivga, pcidev, pcipnic, usb_ohci and usb_xhci.
+# I440FXSUPPORT:
+# This option controls the presence of the i440FX PCI chipset. You can
+# also specify the devices connected to PCI slots. Up to 5 slots are
+# available now. These devices are currently supported: ne2k, pcivga,
+# pcidev and pcipnic. If Bochs is compiled with Cirrus SVGA support
+# you'll have the additional choice 'cirrus'.
 #
 # Example:
-#   pci: enabled=1, chipset=i440fx, slot1=pcivga, slot2=ne2k
+#   i440fxsupport: enabled=1, slot1=pcivga, slot2=ne2k
 #=======================================================================
-pci: enabled=1, chipset=i440fx, slot1=e1000
+i440fxsupport: enabled=1, slot1=pcipnic
+#i440fxsupport: enabled=1, slot1=ne2k
 
 #=======================================================================
-# USB_UHCI:
+# USB1:
 # This option controls the presence of the USB root hub which is a part
-# of the i440FX PCI chipset. With the portX parameter you can connect devices
-# to the hub (currently supported: 'mouse', 'tablet', 'keypad', 'disk', 'cdrom'
-# 'hub' and 'printer'). NOTE: UHCI must be loaded with 'plugin_ctrl'.
-#
-# The optionsX parameter can be used to assign specific options to the device
-# connected to the corresponding USB port. Currently this feature is only used
-# to set the speed reported by device and by the 'disk' device to specify
-# an alternative redolog file of some image modes.
-#
-# If you connect the mouse or tablet to one of the ports, Bochs forwards the
-# mouse movement data to the USB device instead of the selected mouse type.
-# When connecting the keypad to one of the ports, Bochs forwards the input of
-# the numeric keypad to the USB device instead of the PS/2 keyboard.
-#
-# To connect a 'flat' mode image as an USB hardisk you can use the 'disk' device
-# with the path to the image separated with a colon. To use other disk image modes
-# similar to ATA disks the syntax 'disk:mode:filename' must be used (see below).
-#
-# To emulate an USB cdrom you can use the 'cdrom' device name and the path to
-# an ISO image or raw device name also separated with a colon. An option to
-# insert/eject media is available in the runtime configuration.
-#
-# The device name 'hub' connects an external hub with max. 8 ports (default: 4)
-# to the root hub. To specify the number of ports you have to add the value
-# separated with a colon. Connecting devices to the external hub ports is only
-# available in the runtime configuration.
-#
-# The device 'printer' emulates the HP Deskjet 920C printer. The PCL data is
-# sent to a file specified in bochsrc.txt. The current code appends the PCL
-# code to the file if the file already existed. It would probably be nice to
-# overwrite the file instead, asking user first.
-#=======================================================================
-#usb_uhci: enabled=1
-#usb_uhci: enabled=1, port1=mouse, port2=disk:usbstick.img
-#usb_uhci: enabled=1, port1=hub:7, port2=disk:growing:usbdisk.img
-#usb_uhci: enabled=1, port2=disk:undoable:usbdisk.img, options1=journal:redo.log
-#usb_uhci: enabled=1, port1=printer:printdata.bin, port2=cdrom:image.iso
-
-#=======================================================================
-# USB_OHCI:
-# This option controls the presence of the USB OHCI host controller with a
-# 2-port hub. The portX option accepts the same device types with the same
-# syntax as the UHCI controller (see above). The OHCI HC must be assigned to
-# a PCI slot and loaded with 'plugin_ctrl'.
-#=======================================================================
-#usb_ohci: enabled=1
-#usb_ohci: enabled=1, port1=printer:usbprinter.bin
-
-#=======================================================================
-# USB_XHCI:
-# This option controls the presence of the experimental USB xHCI host controller
-# with a 4-port hub. The portX option accepts the same device types with the
-# same syntax as the UHCI controller (see above). The xHCI HC must be assigned
-# to a PCI slot and loaded with 'plugin_ctrl'.
+# of the i440FX PCI chipset. With the portX option you can connect devices
+# to the hub (currently supported: 'mouse' and 'keypad'). If you connect
+# the mouse to one of the ports and use the mouse option 'type=usb' you'll
+# have a 3-button USB mouse.
+#
+# Example:
+#   usb1: enabled=1, port1=mouse, port2=keypad
 #=======================================================================
-#usb_xhci: enabled=1
+#usb1: enabled=1
 
 #=======================================================================
 # CMOSIMAGE:
@@ -1042,50 +715,12 @@
 #cmosimage: file=cmos.img, rtc_init=time0
 
 #=======================================================================
-# MAGIC_BREAK:
-# This enables the "magic breakpoint" feature when using the debugger.
-# The useless cpu instruction XCHG BX, BX causes Bochs to enter the
-# debugger mode. This might be useful for software development.
-#
-# Example:
-#   magic_break: enabled=1
-#=======================================================================
-#magic_break: enabled=1
-magic_break: enabled=1
-
-#=======================================================================
-# PORT_E9_HACK:
-# The 0xE9 port doesn't exists in normal ISA architecture. However, we
-# define a convention here, to display on the console of the system running
-# Bochs anything that is written to it. The idea is to provide debug output
-# very early when writing BIOS or OS code for example, without having to
-# bother with setting up a serial port or etc. Reading from port 0xE9 will
-# will return 0xe9 to let you know if the feature is available.
-# Leave this 0 unless you have a reason to use it.
-#
-# Example:
-#   port_e9_hack: enabled=1
-#=======================================================================
-port_e9_hack: enabled=1
-
-#=======================================================================
-# DEBUG_SYMBOLS:
-# This loads symbols from the specified file for use in Bochs' internal
-# debugger. Symbols are loaded into global context. This is equivalent to
-# issuing ldsym debugger command at start up.
-#
-# Example:
-#   debug_symbols: file="kernel.sym"
-#   debug_symbols: file="kernel.sym", offset=0x80000000
-#=======================================================================
-#debug_symbols: file="kernel.sym"
-
-#=======================================================================
 # other stuff
 #=======================================================================
+magic_break: enabled=1
 #load32bitOSImage: os=nullkernel, path=../kernel.img, iolog=../vga_io.log
 #load32bitOSImage: os=linux, path=../linux.img, iolog=../vga_io.log, initrd=../initrd.img
-#print_timestamps: enabled=1
+#text_snapshot_check: enable
 
 #-------------------------
 # PCI host device mapping
@@ -1100,12 +735,11 @@
 #gdbstub: enabled=0, port=1234, text_base=0, data_base=0, bss_base=0
 
 #=======================================================================
-# USER_PLUGIN:
-# Load user-defined plugin. This option is available only if Bochs is
-# compiled with plugin support. Maximum 8 different plugins are supported.
-# See the example in the Bochs sources how to write a plugin device.
+# IPS:
+# The IPS directive is DEPRECATED. Use the parameter IPS of the CPU
+# directive instead.
 #=======================================================================
-#user_plugin: name=testdev
+#ips: 10000000
 
 #=======================================================================
 # for Macintosh, use the style of pathnames in the following
@@ -1115,17 +749,3 @@
 # romimage: file=:bios:BIOS-bochs-latest, address=0xf0000
 # floppya: 1_44=[fd:], status=inserted
 #=======================================================================
-
-#=======================================================================
-# MEGS
-# Set the number of Megabytes of physical memory you want to emulate.
-# The default is 32MB, most OS's won't need more than that.
-# The maximum amount of memory supported is 2048Mb.
-# The 'MEGS' option is deprecated. Use 'MEMORY' option instead.
-#=======================================================================
-#megs: 256
-#megs: 128
-#megs: 64
-#megs: 32
-#megs: 16
-#megs: 8
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/bin/efirom-combine.py ipxe-1.0.1~lliurex1505/debian/bin/efirom-combine.py
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/bin/efirom-combine.py	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/bin/efirom-combine.py	1970-01-01 00:00:00.000000000 +0000
@@ -1,33 +0,0 @@
-#!/usr/bin/python3
-
-import argparse
-import logging
-
-
-class FileBinary:
-    pass
-
-
-class FileEfi:
-    pass
-
-
-class Main:
-    argparser = argparse.ArgumentParser()
-    argparser.add_argument('-o', '--output')
-    argparser.add_argument('-v', '--vendor')
-    argparser.add_argument('-d', '--device')
-    argparser.add_argument('-D', '--debug', action='store_true')
-    argparser.add_argument('-V', '--verbose', action='store_true')
-    argparser.add_argument('files', nargs='+', metavar='FILE')
-
-    def __init__(self, args):
-        pass
-
-
-if __name__ == '__main__':
-    args = Main.argparser.parse_args()
-    logging.basicConfig(level=args.debug and logging.DEBUG or
-                        args.verbose and logging.INFO or
-                        logging.WARN)
-    main = Main(args)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/changelog ipxe-1.0.1~lliurex1505/debian/changelog
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/changelog	2014-01-06 09:55:28.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/changelog	2015-04-14 12:55:38.000000000 +0000
@@ -1,156 +1,8 @@
-ipxe (1.0.0+git-20131111.c3d1e78-2ubuntu1) trusty; urgency=low
+ipxe (1.0.1~lliurex1505) trusty; urgency=high
 
-  * Merge from Debian unstable.  Remaining changes:
-    - d/p/enable-https.patch: Enable HTTPS support.
-    - d/control,grub-ipxe*: Split grub integration from ipxe->grub-ipxe.
-    - d/control: Transition kvm-ipxe->ipxe-qemu for LTS->LTS upgrade.
-    - d/ipxe-qemu.links: Add compat links from /usr/share/qemu to
-      /usr/lib/ipxe/qemu.
-    - d/ipxe-qemu.install: Install ne.rom as pxe-ne2k_isa.rom.
-  * Dropped changes, alternative fix in Debian:
-    - d/control: Add libiberty-dev to BD's to fix FTBFS.
-
- -- James Page <james.page@ubuntu.com>  Mon, 06 Jan 2014 09:55:25 +0000
-
-ipxe (1.0.0+git-20131111.c3d1e78-2) unstable; urgency=medium
-
-  * Don't use libiberty. (closes: #730910)
-
- -- Bastian Blank <waldi@debian.org>  Sun, 22 Dec 2013 20:05:03 +0100
-
-ipxe (1.0.0+git-20131111.c3d1e78-1ubuntu1) trusty; urgency=low
-
-  * Merge from Debian unstable, remaining changes:
-    - d/p/enable-https.patch: Enable HTTPS support.
-    - d/control,grub-ipxe*: Split grub integration from ipxe->grub-ipxe.
-    - d/control: Transition kvm-ipxe->ipxe-qemu for LTS->LTS upgrade.
-    - d/ipxe-qemu.links: Add compat links from /usr/share/qemu to
-      /usr/lib/ipxe/qemu.
-    - d/ipxe-qemu.install: Install ne.rom as pxe-ne2k_isa.rom.
-  * All other changes dropped in preference to upstream Debian
-    packaging.
-  * d/control: Add libiberty-dev to BD's to fix FTBFS.
+  * Reported from precise
 
- -- James Page <james.page@ubuntu.com>  Tue, 26 Nov 2013 17:50:47 +0000
-
-ipxe (1.0.0+git-20131111.c3d1e78-1) unstable; urgency=low
-
-  * New snapshot.
-  * Add undionly.kkpxe. (closes: #671340)
-  * Ignore result of update-grub invocation. (closes: #660459)
-  * Mark packages as multi-arch foreign. (closes: #728476)
-  * Use debhelper 9.
-  * Remove old breaks relations.
-  * Add 64-bit EFI images:
-    - Build-depend on binutils-dev, zlib1g-dev.
-    - Add combined EFI/legacy images for qemu.
-    - Properly clean build dir.
-  * Install images in ipxe-qemu to match names used by qemu:
-    - Add compatility symlink for e1000_82540.
-    - Use dh-exec to allow renames in dh_install.
-
- -- Bastian Blank <waldi@debian.org>  Thu, 21 Nov 2013 18:26:32 +0100
-
-ipxe (1.0.0+git-20130710.936134e-0ubuntu1) saucy; urgency=low
-
-  * New upstream snapshot:
-    - d/p/fix-bp-bug.patch: Dropped; included in snapshot.
-    - d/p/baseroms-target.diff: Dropped; no longer required.
-    - Refreshed all other patches.
-  * d/rules: Use date for snapshot prefix instead of increment.
-  * d/p/qemu-target-fix-names.diff: Consolidated into qemu-target.diff.
-  * d/p/*: Tidied redundant patches.
-  * d/control,rules: Move roms for use with qemu-kvm to ipxe-qemu, update
-    kvm-ipxe to be transitional.
-  * d/control: Drop Depends from grub-ipxe to ipxe as its not required.
-
- -- James Page <james.page@ubuntu.com>  Wed, 10 Jul 2013 12:23:26 +0100
-
-ipxe (1.0.0+git-20120202.f6840ba-3) unstable; urgency=low
-
-  * Fix to break qemu-system instead of qemu. (closes: #658982)
-  * Make ipxe-qemu break and replace ipxe. (closes: #658684)
-  * Add link for ipxe.lkrn, so all images can be found in one location.
-
- -- Bastian Blank <waldi@debian.org>  Tue, 07 Feb 2012 16:09:43 +0100
-
-ipxe (1.0.0+git-20120202.f6840ba-2) unstable; urgency=low
-
-  * Fix grub setup and restrict entry by default. (closes: #658465)
-  * Install only combined images into ipxe package.
-  * Install rom images needed for qemu into ipxe-qemu package.
-    - Add breaks against qemu and qemu-kvm.
-  * Disable rom banner timeout. (closes: #638574)
-
- -- Bastian Blank <waldi@debian.org>  Fri, 03 Feb 2012 19:04:56 +0100
-
-ipxe (1.0.0+git-20120202.f6840ba-1) unstable; urgency=low
-
-  * New snapshot.
-  * Disable ath9k roms.
-  * Fix tg3 build.
-  * Create grub entry. (closes: #626238)
-  * Override version string with package version.
-
- -- Bastian Blank <waldi@debian.org>  Thu, 02 Feb 2012 12:40:26 +0100
-
-ipxe (1.0.0+git-4.d6b0b76-0ubuntu3) saucy; urgency=low
-
-  * debian/patches/fix-bp-bug.patch: fixes FTBFS (LP: #1194914)
-
- -- Yolanda Robla <yolanda.robla@canonical.com>  Thu, 27 Jun 2013 11:22:43 +0200
-
-ipxe (1.0.0+git-4.d6b0b76-0ubuntu2) raring; urgency=low
-
-  * d/control: Add ipxe-qemu virtual package for use with qemu.
-
- -- Serge Hallyn <serge.hallyn@ubuntu.com>  Tue, 20 Nov 2012 16:08:21 -0600
-
-ipxe (1.0.0+git-4.d6b0b76-0ubuntu1) raring; urgency=low
-
-  * New upstream snapshot:
-    - d/p/iscsi*.patch: Dropped - included in snapshot.
-    - Refreshed all other patches.
-  * d/p/enable-https.patch: Enable HTTPS support (LP: #1025239).
-
- -- James Page <james.page@ubuntu.com>  Wed, 14 Nov 2012 15:47:31 +0000
-
-ipxe (1.0.0+git-3.55f6c88-0ubuntu5) quantal; urgency=low
-
-  * Fix input/output errors when using ipxe to boot from iSCSI storage
-    (LP: #1045923).
-    - d/p/iscsi-{report-reponse,send-padding-inline}.patch: Cherry picked
-      patches from upstream VCS which resolve two issues with iSCSI protocol
-      handling.
-
- -- James Page <james.page@ubuntu.com>  Thu, 06 Sep 2012 21:46:54 +0100
-
-ipxe (1.0.0+git-3.55f6c88-0ubuntu4) quantal; urgency=low
-
-  * debian/ipxe.install: add ipxe.dsk and ipxe.usb (LP: #1014005)
-
- -- Serge Hallyn <serge.hallyn@ubuntu.com>  Tue, 21 Aug 2012 14:48:44 -0500
-
-ipxe (1.0.0+git-3.55f6c88-0ubuntu3) quantal; urgency=low
-
-  [ Serge Hallyn ]
-  * debian/patches/rom-set-banner-timeout-0.diff: set rom banner timeout
-    to 0.  (LP: #921230)
-  
-  [ Stefan Bader ]
-  * Modify the ROM names in of the allqemu target to use 8086100e instead
-    of e1000_82540 and ne instead of ne2k_isa (LP: #948323)
-
- -- Serge Hallyn <serge.hallyn@ubuntu.com>  Mon, 28 May 2012 11:57:48 -0500
-
-ipxe (1.0.0+git-3.55f6c88-0ubuntu2) quantal; urgency=low
-
-  * debian/grub.d/25_ipxe: removed the space after "Found iPXE image"
-    to match other grub-update script fragments (LP: #990378).
-  * debian/control: fixed some Lintian warnings.
-    - TODO: lots of missing Copyright information.
-
- -- Martin-Éric Racine <q-funk@ubuntu.com>  Sat, 28 Apr 2012 11:41:28 +0300
+ -- Angel Berlanas Vicente <angel.berlanas@gmail.com>  Tue, 14 Apr 2015 14:55:07 +0200
 
 ipxe (1.0.0+git-3.55f6c88-0ubuntu1) precise; urgency=low
 
@@ -224,4 +76,3 @@
     - Remove linda infiniband driver.
 
  -- Bastian Blank <waldi@debian.org>  Sun, 03 Apr 2011 11:32:56 +0200
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/compat ipxe-1.0.1~lliurex1505/debian/compat
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/compat	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/compat	2012-02-10 17:00:50.000000000 +0000
@@ -1 +1 @@
-9
+7
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/config/general.h ipxe-1.0.1~lliurex1505/debian/config/general.h
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/config/general.h	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/config/general.h	1970-01-01 00:00:00.000000000 +0000
@@ -1 +0,0 @@
-#define ROM_BANNER_TIMEOUT 0
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/control ipxe-1.0.1~lliurex1505/debian/control
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/control	2014-01-06 09:48:16.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/control	2012-02-10 17:00:50.000000000 +0000
@@ -3,38 +3,30 @@
 Priority: optional
 Maintainer: Ubuntu Developers <ubuntu-devel-discuss@lists.ubuntu.com>
 XSBC-Original-Maintainer: Bastian Blank <waldi@debian.org>
-Build-Depends:
- debhelper (>> 9), dh-exec,
- genisoimage, syslinux,
- binutils-dev, zlib1g-dev
-Standards-Version: 3.9.1
+Build-Depends: debhelper (>= 7.0.50~),
+ genisoimage, syslinux
+Standards-Version: 3.9.2
 Homepage: http://ipxe.org/
 #Vcs-Git: git://git.debian.org/collab-maint/ipxe.git
 #Vcs-Browser: http://git.debian.org/?p=collab-maint/ipxe.git;a=summary
 
-Package: ipxe
+Package: kvm-ipxe
 Architecture: all
-Multi-Arch: foreign
-Depends: ipxe-qemu, grub-ipxe, ${misc:Depends}
-Description: PXE boot firmware
+Depends: ${misc:Depends}
+Breaks: ipxe (<< 1.0.0+git-2.149b50-1ubuntu3)
+Replaces: ipxe (<< 1.0.0+git-2.149b50-1ubuntu3)
+Description: PXE ROM's for KVM
  iPXE is network boot firmware.  It supports a variety of network cards,
  including some wireless cards, and variety of network protocols (traditional
  DHCP, BOOTP and TFTP and also HTTP, iSCSI, SAN via FCoE and Infiniband). It
  supports scripting.
  .
- It is possible to use iPXE as a PXE ROM in the network card or to
- chainload it from other boot methods.
- .
- This package provides boot code for all supported network cards in one
- binary and several bootable formats.
+ This package contains PXE ROM's made especially to pxeboot kvm vm's.
 
-Package: ipxe-qemu
+Package: ipxe
 Architecture: all
-Multi-Arch: foreign
-Depends: ${misc:Depends}
-Breaks: kvm-ipxe (<< 1.0.0+git-20130710.936134e-0ubuntu1)
-Replaces: kvm-ipxe (<< 1.0.0+git-20130710.936134e-0ubuntu1)
-Description: PXE boot firmware - ROM images for qemu
+Depends: ${misc:Depends}, kvm-ipxe
+Description: PXE boot firmware
  iPXE is network boot firmware.  It supports a variety of network cards,
  including some wireless cards, and variety of network protocols (traditional
  DHCP, BOOTP and TFTP and also HTTP, iSCSI, SAN via FCoE and Infiniband). It
@@ -43,24 +35,19 @@
  It is possible to use iPXE as a PXE ROM in the network card or to
  chainload it from other boot methods.
  .
- This package provides boot code for the qemu emulated network cards in
- as boot ROMs.
-
-Package: kvm-ipxe
-Architecture: all
-Depends: ipxe-qemu, ${misc:Depends}
-Section: oldlibs
-Description: transitional dummy package
- This is a transitional dummy package. It can safely be removed.
+ This package provides boot code for all supported network cards in one
+ binary, in several bootable formats, and also many boot ROMs to be
+ embedded in various network cards.
 
 Package: grub-ipxe
 Architecture: all
 Suggests: grub-pc (>= 1.96)
-Depends: ${misc:Depends}
+Depends:  ${misc:Depends}, ipxe
 Description: Network booting from GRUB using iPXE
  iPXE is network boot firmware.  It supports a variety of network cards,
  including some wireless cards, and variety of network protocols (traditional
  DHCP, BOOTP and TFTP and also HTTP, iSCSI, SAN via FCoE and Infiniband). It
  supports scripting.
  .
- This package adds a menu entry to grub2 for network booting using iPXE.
+ This package adds a menu entry to grub2 for network booting using iPXE. 
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/copyright ipxe-1.0.1~lliurex1505/debian/copyright
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/copyright	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/copyright	2012-02-10 17:00:50.000000000 +0000
@@ -1,6 +1,6 @@
-Format: http://www.debian.org/doc/packaging-manuals/copyright-format/1.0/
-Source: git://git.ipxe.org/ipxe.git
+Format: http://dep.debian.net/deps/dep5
 Upstream-Name: ipxe
+Source: git://git.ipxe.org/ipxe.git
 
 Files: *
 License: GPL-2+
@@ -65,7 +65,7 @@
  Permission to use, copy, modify, and distribute this software for any
  purpose with or without fee is hereby granted, provided that the above
  copyright notice and this permission notice appear in all copies.
- . 
+ .
  THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
@@ -93,7 +93,7 @@
  src/drivers/net/3c5x9.c
  src/drivers/net/ne2k_isa.c
  src/drivers/net/ns8390.c
-Copyright:
+Coypright:
  1993-1994 David Greenman, Martin Renters
  1993-1995 Andres Vega Garcia
  1994 Herb Peyerl <hpeyerl@novatel.ca>
@@ -107,7 +107,7 @@
  responsibility for damages incurred with its use.
 
 Files: src/drivers/net/3c595.h
-Copyright:
+Coypright:
  2000 Shusuke Nisiyama <shu@athena.qe.eng.hokudai.ac.jp>
 License: BSD-3-clause
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/grub.d/25_ipxe ipxe-1.0.1~lliurex1505/debian/grub.d/25_ipxe
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/grub.d/25_ipxe	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/grub.d/25_ipxe	2012-02-10 17:00:50.000000000 +0000
@@ -0,0 +1,42 @@
+#!/bin/sh
+set -e
+
+if [ -f /usr/lib/grub/grub-mkconfig_lib ]; then
+  . /usr/lib/grub/grub-mkconfig_lib
+  LX=linux16
+elif [ -f /usr/lib/grub/update-grub_lib ]; then
+  . /usr/lib/grub/update-grub_lib
+  LX=linux
+else
+  # no grub file, so we notify and exit gracefully
+  echo "Cannot find grub config file, exiting." >&2
+  exit 0
+fi
+
+# We can't cope with loop-mounted devices here.
+case ${GRUB_DEVICE_BOOT} in
+  /dev/loop/*|/dev/loop[0-9]) exit 0 ;;
+esac
+
+# iPXE is only supported on x86
+case $(dpkg --print-architecture) in
+	*i386|*amd64) ;;
+	*) exit 0 ;;
+esac
+
+prepare_boot_cache="$(prepare_grub_to_access_device ${GRUB_DEVICE_BOOT} | sed -e "s/^/\t/")"
+
+IPXE=/boot/ipxe.lkrn
+
+if test -e "$IPXE" ; then
+  IPXEPATH=$( make_system_path_relative_to_its_root "$IPXE" )
+  echo "Found iPXE image : $IPXEPATH" >&2
+  cat << EOF
+menuentry "Network boot (iPXE)" {
+EOF
+  printf '%s\n' "${prepare_boot_cache}"
+  cat << EOF
+	$LX $IPXEPATH
+}
+EOF
+fi
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.install ipxe-1.0.1~lliurex1505/debian/grub-ipxe.install
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.install	2013-11-26 15:55:10.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/grub-ipxe.install	2012-02-10 17:00:50.000000000 +0000
@@ -1,2 +1,2 @@
-debian/tree/ipxe/* .
-src/bin-x86_64-efi/ipxe.efi src/bin/ipxe.lkrn /boot
+debian/grub.d/25_ipxe etc/grub.d
+src/bin/ipxe.lkrn /boot
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.postinst ipxe-1.0.1~lliurex1505/debian/grub-ipxe.postinst
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.postinst	2013-11-26 17:47:25.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/grub-ipxe.postinst	2012-02-10 17:00:50.000000000 +0000
@@ -1,13 +1,10 @@
 #!/bin/sh
-
+# Calls update-grub for the new ipxe entry to show up in the grub menu.
 set -e
 
-case "$1" in
-    configure)
-        command -v update-grub > /dev/null && update-grub || :
-    ;;
-esac
+if [ -e /boot/grub/grub.cfg ] && which update-grub >/dev/null 2>&1
+then
+    update-grub || true
+fi
 
 #DEBHELPER#
-
-exit 0
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.postrm ipxe-1.0.1~lliurex1505/debian/grub-ipxe.postrm
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/grub-ipxe.postrm	2013-11-26 17:47:31.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/grub-ipxe.postrm	2012-02-10 17:00:50.000000000 +0000
@@ -1,13 +1,14 @@
 #!/bin/sh
-
+# Calls update-grub for the new ipxe entry to show up in the grub menu.
 set -e
 
-case "$1" in
-    remove)
-        command -v update-grub > /dev/null && update-grub || :
-    ;;      
-esac
+if [ "${1}" = "remove" ]
+then
 
-#DEBHELPER#
+	if [ -e /boot/grub/grub.cfg ] && which update-grub >/dev/null 2>&1
+	then
+    	update-grub || true
+	fi
+fi
 
-exit 0
+#DEBHELPER#
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe.install ipxe-1.0.1~lliurex1505/debian/ipxe.install
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe.install	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/ipxe.install	2012-02-10 17:00:50.000000000 +0000
@@ -1,3 +1,5 @@
-src/bin/ipxe.iso src/bin/ipxe.pxe usr/lib/ipxe
-src/bin/ipxe.dsk src/bin/ipxe.usb usr/lib/ipxe
-src/bin/undionly.kpxe src/bin/undionly.kkpxe usr/lib/ipxe
+src/bin/*.rom usr/lib/ipxe
+src/bin/ipxe.iso usr/lib/ipxe
+src/bin/ipxe.lkrn usr/lib/ipxe
+src/bin/ipxe.pxe usr/lib/ipxe
+src/bin/undionly.kpxe usr/lib/ipxe
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe.links ipxe-1.0.1~lliurex1505/debian/ipxe.links
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe.links	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/ipxe.links	2012-02-10 17:00:50.000000000 +0000
@@ -1,2 +1,5 @@
-/boot/ipxe.efi /usr/lib/ipxe/ipxe.efi
-/boot/ipxe.lkrn /usr/lib/ipxe/ipxe.lkrn
+usr/share/qemu/pxe-virtio.rom usr/lib/ipxe/virtio-net.rom
+usr/share/qemu/pxe-rtl8139.rom usr/lib/ipxe/rtl8139.rom
+usr/share/qemu/pxe-pcnet32.rom usr/lib/ipxe/pcnet32.rom
+usr/share/qemu/pxe-ne2k_isa.rom usr/lib/ipxe/ne2k_isa.rom
+usr/share/qemu/pxe-e1000.rom usr/lib/ipxe/e1000_82540.rom
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.install ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.install
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.install	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.install	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#! /usr/bin/dh-exec
-src/bin-efi/82540em.efirom => usr/lib/ipxe/qemu/efi-e1000.rom
-src/bin/82540em.rom => usr/lib/ipxe/qemu/pxe-e1000.rom
-src/bin-efi/eepro100.efirom => usr/lib/ipxe/qemu/efi-eepro100.rom
-src/bin/eepro100.rom => usr/lib/ipxe/qemu/pxe-eepro100.rom
-src/bin-efi/ns8390.efirom => usr/lib/ipxe/qemu/efi-ne2k_pci.rom
-src/bin/ns8390.rom => usr/lib/ipxe/qemu/pxe-ne2k_pci.rom
-src/bin-efi/pcnet32.efirom => usr/lib/ipxe/qemu/efi-pcnet.rom
-src/bin/pcnet32.rom => usr/lib/ipxe/qemu/pxe-pcnet.rom
-src/bin-efi/rtl8139.efirom => usr/lib/ipxe/qemu/efi-rtl8139.rom
-src/bin/rtl8139.rom => usr/lib/ipxe/qemu/pxe-rtl8139.rom
-src/bin-efi/virtio-net.efirom => usr/lib/ipxe/qemu/efi-virtio.rom
-src/bin/virtio-net.rom => usr/lib/ipxe/qemu/pxe-virtio.rom
-src/bin/ne.rom => usr/lib/ipxe/qemu/pxe-ne2k_isa.rom
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.install.old ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.install.old
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.install.old	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.install.old	1970-01-01 00:00:00.000000000 +0000
@@ -1,2 +0,0 @@
-src/bin/82540em.rom src/bin/eepro100.rom src/bin/ns8390.rom src/bin/pcnet32.rom src/bin/rtl8139.rom src/bin/virtio-net.rom usr/lib/ipxe
-#src/bin-combine/82540em.efirom src/bin/eepro100.efirom src/bin/ns8390.efirom src/bin/pcnet32.efirom src/bin/rtl8139.efirom src/bin/virtio-net.efirom usr/lib/ipxe
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.links ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.links
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/ipxe-qemu.links	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/ipxe-qemu.links	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-/usr/lib/ipxe/qemu/pxe-e1000.rom /usr/lib/ipxe/e1000_82540.rom
-/usr/lib/ipxe/qemu/pxe-e1000.rom /usr/lib/ipxe/82540em.rom
-/usr/lib/ipxe/qemu/pxe-eepro100.rom /usr/lib/ipxe/eepro100.rom
-/usr/lib/ipxe/qemu/pxe-ne2k_pci.rom /usr/lib/ipxe/ns8390.rom
-/usr/lib/ipxe/qemu/pxe-ne2k_isa.rom /usr/lib/ipxe/ne.rom
-/usr/lib/ipxe/qemu/pxe-pcnet.rom /usr/lib/ipxe/pcnet32.rom
-/usr/lib/ipxe/qemu/pxe-rtl8139.rom /usr/lib/ipxe/rtl8139.rom
-/usr/lib/ipxe/qemu/pxe-virtio.rom /usr/lib/ipxe/virtio-net.rom
-# Compat links for QEMU
-/usr/lib/ipxe/82540em.rom /usr/share/qemu/pxe-e1000.rom
-/usr/lib/ipxe/ne.rom /usr/share/qemu/pxe-ne2k_isa.rom
-/usr/lib/ipxe/rtl8139.rom /usr/share/qemu/pxe-rtl8139.rom
-/usr/lib/ipxe/virtio-net.rom /usr/share/qemu/pxe-virtio.rom
-/usr/lib/ipxe/pcnet32.rom /usr/share/qemu/pxe-pcnet32.rom
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/baseroms-target.diff ipxe-1.0.1~lliurex1505/debian/patches/baseroms-target.diff
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/baseroms-target.diff	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/baseroms-target.diff	2012-02-10 17:00:50.000000000 +0000
@@ -0,0 +1,10 @@
+--- a/src/Makefile.housekeeping
++++ b/src/Makefile.housekeeping
+@@ -928,6 +928,7 @@
+ #
+ allall: allroms allmroms allpxes allisos alldsks
+ allroms allmroms : all%s : $(foreach ROM,$(ROMS),$(BIN)/$(ROM).%)
++allbaseroms allbasemroms : allbase%s : $(foreach ROM,$(DRIVERS),$(BIN)/$(ROM).%)
+ allpxes allisos alldsks : all%s : $(foreach DRIVER,$(DRIVERS),$(BIN)/$(DRIVER).%)
+ 
+ # Alias for ipxe.%
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/disable-baddrivers.diff ipxe-1.0.1~lliurex1505/debian/patches/disable-baddrivers.diff
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/disable-baddrivers.diff	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/disable-baddrivers.diff	2012-02-10 17:00:50.000000000 +0000
@@ -0,0 +1,34 @@
+--- a/src/Makefile	2012-01-06 15:49:04.000000000 -0800
++++ b/src/Makefile	2012-01-10 14:10:28.120834619 -0800
+@@ -92,6 +92,31 @@
+ #
+ NON_AUTO_SRCS	:=
+ NON_AUTO_SRCS	+= drivers/net/prism2.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ani.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar5008_phy.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_calib.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_hw.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_mac.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_phy.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_calib.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_eeprom.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_hw.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_mac.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_phy.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_calib.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_common.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_4k.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_9287.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_def.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_hw.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_init.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_mac.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_main.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_recv.c
++NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_xmit.c
++
+ 
+ # INCDIRS lists the include path
+ #
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/enable-https.patch ipxe-1.0.1~lliurex1505/debian/patches/enable-https.patch
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/enable-https.patch	2013-11-26 15:08:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/enable-https.patch	1970-01-01 00:00:00.000000000 +0000
@@ -1,11 +0,0 @@
---- a/src/config/general.h
-+++ b/src/config/general.h
-@@ -57,7 +57,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
- 
- #define	DOWNLOAD_PROTO_TFTP	/* Trivial File Transfer Protocol */
- #define	DOWNLOAD_PROTO_HTTP	/* Hypertext Transfer Protocol */
--#undef	DOWNLOAD_PROTO_HTTPS	/* Secure Hypertext Transfer Protocol */
-+#define	DOWNLOAD_PROTO_HTTPS	/* Secure Hypertext Transfer Protocol */
- #undef	DOWNLOAD_PROTO_FTP	/* File Transfer Protocol */
- #undef	DOWNLOAD_PROTO_SLAM	/* Scalable Local Area Multicast */
- #undef	DOWNLOAD_PROTO_NFS	/* Network File System Protocol */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/qemu-target.diff ipxe-1.0.1~lliurex1505/debian/patches/qemu-target.diff
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/qemu-target.diff	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/qemu-target.diff	2012-02-10 17:00:50.000000000 +0000
@@ -0,0 +1,13 @@
+--- a/src/Makefile.housekeeping
++++ b/src/Makefile.housekeeping
+@@ -950,5 +950,10 @@
+ allpxes allisos alldsks : all%s : $(foreach DRIVER,$(DRIVERS),$(BIN)/$(DRIVER).%)
+ 
++# Create qemu target for qemu package
++#
++QEMUS = e1000_82540 ne2k_isa pcnet32 rtl8139 virtio-net
++allqemu : $(foreach ROM,$(QEMUS),$(BIN)/$(ROM).rom)
++
+ # Alias for ipxe.%
+ #
+ $(BIN)/etherboot.% : $(BIN)/ipxe.%
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/remove-libiberty.diff ipxe-1.0.1~lliurex1505/debian/patches/remove-libiberty.diff
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/remove-libiberty.diff	2013-12-22 18:55:56.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/remove-libiberty.diff	1970-01-01 00:00:00.000000000 +0000
@@ -1,15 +0,0 @@
-Description: Don't use libiberty
-Author: Bastian Blank <waldi@debian.org>
-Bug-Debian: http://bugs.debian.org/730910
----
---- ipxe-1.0.0+git-20131111.c3d1e78.orig/src/Makefile.housekeeping
-+++ ipxe-1.0.0+git-20131111.c3d1e78/src/Makefile.housekeeping
-@@ -1179,7 +1179,7 @@ CLEANUP += $(ZBIN)
- ELF2EFI_CFLAGS	:= -I$(BINUTILS_DIR)/include -I$(BFD_DIR)/include \
- 		   -I$(ZLIB_DIR)/include -idirafter include
- ELF2EFI_LDFLAGS	:= -L$(BINUTILS_DIR)/lib -L$(BFD_DIR)/lib -L$(ZLIB_DIR)/lib \
--		   -lbfd -ldl -liberty -lz -Wl,--no-warn-search-mismatch
-+		   -lbfd -ldl -lz -Wl,--no-warn-search-mismatch
- 
- $(ELF2EFI32) : util/elf2efi.c $(MAKEDEPS)
- 	$(QM)$(ECHO) "  [HOSTCC] $@"
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/rom-change-banner-timeout.diff ipxe-1.0.1~lliurex1505/debian/patches/rom-change-banner-timeout.diff
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/rom-change-banner-timeout.diff	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/rom-change-banner-timeout.diff	1970-01-01 00:00:00.000000000 +0000
@@ -1,12 +0,0 @@
---- a/src/arch/i386/prefix/romprefix.S
-+++ b/src/arch/i386/prefix/romprefix.S
-@@ -30,7 +30,9 @@
-  * doubled to allow for BIOSes that switch video modes immediately
-  * beforehand, so rendering the message almost invisible to the user.
-  */
-+#ifndef ROM_BANNER_TIMEOUT
- #define ROM_BANNER_TIMEOUT ( 2 * ( 18 * BANNER_TIMEOUT ) / 10 )
-+#endif
- 
- /* Allow payload to be excluded from ROM size
-  */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/series ipxe-1.0.1~lliurex1505/debian/patches/series
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/patches/series	2014-01-06 09:48:23.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/patches/series	2012-02-10 17:00:50.000000000 +0000
@@ -1,3 +1,3 @@
-rom-change-banner-timeout.diff
-enable-https.patch
-remove-libiberty.diff
+baseroms-target.diff
+disable-baddrivers.diff
+qemu-target.diff
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/rules ipxe-1.0.1~lliurex1505/debian/rules
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/rules	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/rules	2012-02-10 17:32:46.000000000 +0000
@@ -4,32 +4,29 @@
 # Uncomment this to turn on verbose mode.
 #export DH_VERBOSE=1
 
-VERSION := $(shell dpkg-parsechangelog | sed -ne 's,^Version: *\(.*\)$$,\1,p')
-
 %:
-	+dh $@ 
-
-override_dh_auto_configure:
-	cp debian/config/* src/config/local
-
-src/bin/% src/bin-x86_64-efi/%:
-	$(MAKE) -C src V=1 NO_WERROR=1 VERSION="$(VERSION)" $(subst src/,,$@)
+	dh $@ 
 
-src/bin-efi/%.efirom: src/bin/%.rom src/bin-x86_64-efi/%.efirom
-	@[ -d $(dir $@) ] || mkdir $(dir $@)
-	src/util/catrom.pl $^ > $@
-
-override_dh_auto_build: $(shell grep -hoE 'src/bin(-[^/]*)?/\S+' debian/*.install)
+override_dh_auto_build:
+	make -C src V=1 NO_WERROR=1 all allroms allqemu bin/ipxe.pxe bin/ipxe.lkrn
 
 override_dh_auto_clean:
-	$(MAKE) -C src veryclean
-	rm -fr src/bin-efi src/bin-x86_64-efi
+	make -C src veryclean
 	rm -f src/config/local/*
 
+override_dh_auto_install:
+	mkdir -p $(CURDIR)/debian/kvm-ipxe/usr/share/qemu
+	mv src/bin/e1000_82540.rom   $(CURDIR)/debian/kvm-ipxe/usr/share/qemu/pxe-e1000.rom
+	mv src/bin/ne2k_isa.rom      $(CURDIR)/debian/kvm-ipxe/usr/share/qemu/pxe-ne2k_isa.rom
+	mv src/bin/pcnet32.rom       $(CURDIR)/debian/kvm-ipxe/usr/share/qemu/pxe-pcnet32.rom
+	mv src/bin/rtl8139.rom       $(CURDIR)/debian/kvm-ipxe/usr/share/qemu/pxe-rtl8139.rom
+	mv src/bin/virtio-net.rom    $(CURDIR)/debian/kvm-ipxe/usr/share/qemu/pxe-virtio.rom
+
 # Stuff for get-orig-source.
 version_prefix := $(shell dpkg-parsechangelog | sed -ne 's/^Version.*git-\(.*\)\..*/\1/p')
-# Git short hash is prefixed with date of snapshot
-new_prefix := $(shell date +%Y%m%d)
+# Git short hash is prefixed with version number - 
+# increment for next snapshot
+new_prefix := $(shell expr $(version_prefix) + 1)
 
 get-orig-source:
 	# Grab the latest snapshot of the upstream git repository
@@ -37,9 +34,6 @@
 	git clone git://git.ipxe.org/ipxe.git ipxe-snapshot
 	cd ipxe-snapshot && \
 		commit=`git rev-parse --short HEAD` && \
-		git archive --format=tar --prefix=ipxe-1.0.0+git-$(new_prefix).$${commit}/ master |\
+		git archive --format=tar --prefix=ipxe-1.0.0+git-$(new_prefix).$${commit} master |\
 			gzip -9 --no-name > ../../ipxe_1.0.0+git-$(new_prefix).$${commit}.orig.tar.gz
 	rm -rf ipxe-snapshot
-
-.NOTPARALLEL:
-.SECONDARY:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/source/format ipxe-1.0.1~lliurex1505/debian/source/format
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/source/format	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/source/format	2015-04-14 12:56:07.000000000 +0000
@@ -1 +1 @@
-3.0 (quilt)
+1.0
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/debian/tree/ipxe/etc/grub.d/20_ipxe ipxe-1.0.1~lliurex1505/debian/tree/ipxe/etc/grub.d/20_ipxe
--- ipxe-1.0.0+git-20131111.c3d1e78/debian/tree/ipxe/etc/grub.d/20_ipxe	2013-12-22 21:40:08.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/debian/tree/ipxe/etc/grub.d/20_ipxe	1970-01-01 00:00:00.000000000 +0000
@@ -1,40 +0,0 @@
-#!/bin/sh
-set -e
-
-if [ -f /usr/lib/grub/grub-mkconfig_lib ]; then
-  . /usr/lib/grub/grub-mkconfig_lib
-  LX=linux16
-elif [ -f /usr/lib/grub/update-grub_lib ]; then
-  . /usr/lib/grub/update-grub_lib
-  LX=linux
-else
-  # no grub file, so we notify and exit gracefully
-  echo "Cannot find grub config file, exiting." >&2
-  exit 0
-fi
-
-# We can't cope with loop-mounted devices here.
-case ${GRUB_DEVICE_BOOT} in
-  /dev/loop/*|/dev/loop[0-9]) exit 0 ;;
-esac
-
-# iPXE is only supported on x86
-case $(dpkg --print-architecture) in
-	*i386|*amd64) ;;
-	*) exit 0 ;;
-esac
-
-prepare_boot_cache="$(prepare_grub_to_access_device ${GRUB_DEVICE_BOOT} | sed -e "s/^/\t/")"
-
-IPXE=/boot/ipxe.lkrn
-
-if test -e "$IPXE" ; then
-  IPXEPATH=$( make_system_path_relative_to_its_root "$IPXE" )
-  echo "Found iPXE image: $IPXEPATH" >&2
-  cat << EOF
-menuentry "Network boot (iPXE)" --users "" --class network {
-${prepare_boot_cache}
-    $LX $IPXEPATH
-}
-EOF
-fi
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/applied-patches ipxe-1.0.1~lliurex1505/.pc/applied-patches
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/applied-patches	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/applied-patches	2015-04-14 12:54:27.000000000 +0000
@@ -0,0 +1,3 @@
+baseroms-target.diff
+disable-baddrivers.diff
+qemu-target.diff
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/baseroms-target.diff/src/Makefile.housekeeping ipxe-1.0.1~lliurex1505/.pc/baseroms-target.diff/src/Makefile.housekeeping
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/baseroms-target.diff/src/Makefile.housekeeping	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/baseroms-target.diff/src/Makefile.housekeeping	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1153 @@
+# -*- makefile -*- : Force emacs to use Makefile mode
+#
+# This file contains various boring housekeeping functions that would
+# otherwise seriously clutter up the main Makefile.
+
+###############################################################################
+#
+# Find a usable "echo -e" substitute.
+#
+TAB 			:= $(shell $(PRINTF) '\t')
+ECHO_E_ECHO		:= $(ECHO)
+ECHO_E_ECHO_E		:= $(ECHO) -e
+ECHO_E_BIN_ECHO 	:= /bin/echo
+ECHO_E_BIN_ECHO_E 	:= /bin/echo -e
+ECHO_E_ECHO_TAB		:= $(shell $(ECHO_E_ECHO) '\t' | cat)
+ECHO_E_ECHO_E_TAB	:= $(shell $(ECHO_E_ECHO_E) '\t' | cat)
+ECHO_E_BIN_ECHO_TAB 	:= $(shell $(ECHO_E_BIN_ECHO) '\t')
+ECHO_E_BIN_ECHO_E_TAB 	:= $(shell $(ECHO_E_BIN_ECHO_E) '\t')
+
+ifeq ($(ECHO_E_ECHO_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_ECHO)
+endif
+ifeq ($(ECHO_E_ECHO_E_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_ECHO_E)
+endif
+ifeq ($(ECHO_E_BIN_ECHO_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_BIN_ECHO)
+endif
+ifeq ($(ECHO_E_BIN_ECHO_E_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_BIN_ECHO_E)
+endif
+
+.echocheck :
+ifdef ECHO_E
+	@$(TOUCH) $@
+else
+	@$(PRINTF) '%24s : x%sx\n' 'tab' '$(TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_ECHO) \t"' \
+				    '$(ECHO_E_ECHO_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_ECHO_E) \t"' \
+				    '$(ECHO_E_ECHO_E_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_BIN_ECHO) \t"' \
+				    '$(ECHO_E_BIN_ECHO_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_BIN_ECHO_E) \t"' \
+				    '$(ECHO_E_BIN_ECHO_E_TAB)'
+	@$(ECHO) "No usable \"echo -e\" substitute found"
+	@exit 1
+endif
+MAKEDEPS	+= .echocheck
+VERYCLEANUP	+= .echocheck
+
+echo :
+	@$(ECHO) "Using \"$(ECHO_E)\" for \"echo -e\""
+
+###############################################################################
+#
+# Generate a usable "seq" substitute
+#
+define seq
+	$(shell awk 'BEGIN { for ( i = $(1) ; i <= $(2) ; i++ ) print i }')
+endef
+
+###############################################################################
+#
+# Determine host OS
+#
+HOST_OS		:= $(shell uname -s)
+hostos :
+	@$(ECHO) $(HOST_OS)
+
+###############################################################################
+#
+# Determine compiler
+
+CCDEFS		:= $(shell $(CC) -E -x c -c /dev/null -dM | cut -d" " -f2)
+ccdefs:
+	@$(ECHO) $(CCDEFS)
+
+ifeq ($(filter __ICC,$(CCDEFS)),__ICC)
+CCTYPE		:= icc
+else
+CCTYPE		:= gcc
+endif
+cctype:
+	@$(ECHO) $(CCTYPE)
+
+###############################################################################
+#
+# Check for tools that can cause failed builds
+#
+
+ifeq ($(CCTYPE),gcc)
+GCC_2_96_BANNER := $(shell $(CC) -v 2>&1 | grep -is 'gcc version 2\.96')
+ifneq ($(GCC_2_96_BANNER),)
+$(warning gcc 2.96 is unsuitable for compiling iPXE)
+$(warning Use gcc 2.95 or a newer version instead)
+$(error Unsuitable build environment found)
+endif
+endif
+
+PERL_UNICODE_CHECK := $(shell $(PERL) -e 'use bytes; print chr(255)' | wc -c)
+ifeq ($(PERL_UNICODE_CHECK),2)
+$(warning Your Perl version has a Unicode handling bug)
+$(warning Execute this command before building iPXE:)
+$(warning export LANG=$${LANG%.UTF-8})
+$(error Unsuitable build environment found)
+endif
+
+LD_GOLD_BANNER := $(shell $(LD) -v 2>&1 | grep 'GNU gold')
+ifneq ($(LD_GOLD_BANNER),)
+$(warning GNU gold is unsuitable for building iPXE)
+$(warning Use GNU ld instead)
+$(error Unsuitable build environment found)
+endif
+
+###############################################################################
+#
+# Check for various tool workarounds
+#
+
+WORKAROUND_CFLAGS :=
+WORKAROUND_ASFLAGS :=
+WORKAROUND_LDFLAGS :=
+
+# Make syntax does not allow use of comma or space in certain places.
+# This ugly workaround is suggested in the manual.
+#
+COMMA	:= ,
+EMPTY	:=
+SPACE	:= $(EMPTY) $(EMPTY)
+
+# Check for an old version of gas (binutils 2.9.1)
+#
+OLDGAS	:= $(shell $(AS) --version | grep -q '2\.9\.1' && $(ECHO) -DGAS291)
+WORKAROUND_CFLAGS += $(OLDGAS)
+oldgas :
+	@$(ECHO) $(oldgas)
+
+# Some widespread patched versions of gcc include -fstack-protector by
+# default, even when -ffreestanding is specified.  We therefore need
+# to disable -fstack-protector if the compiler supports it.
+#
+ifeq ($(CCTYPE),gcc)
+SP_TEST = $(CC) -fno-stack-protector -x c -c /dev/null \
+		-o /dev/null >/dev/null 2>&1
+SP_FLAGS := $(shell $(SP_TEST) && $(ECHO) '-fno-stack-protector')
+WORKAROUND_CFLAGS += $(SP_FLAGS)
+endif
+
+# Some widespread patched versions of gcc include -fPIE -Wl,-pie by
+# default.  Note that gcc will exit *successfully* if it fails to
+# recognise an option that starts with "no", so we have to test for
+# output on stderr instead of checking the exit status.
+#
+ifeq ($(CCTYPE),gcc)
+PIE_TEST = [ -z "`$(CC) -fno-PIE -nopie -x c -c /dev/null -o /dev/null 2>&1`" ]
+PIE_FLAGS := $(shell $(PIE_TEST) && $(ECHO) '-fno-PIE -nopie')
+WORKAROUND_CFLAGS += $(PIE_FLAGS)
+endif
+
+# gcc 4.4 generates .eh_frame sections by default, which distort the
+# output of "size".  Inhibit this.
+#
+ifeq ($(CCTYPE),gcc)
+CFI_TEST = $(CC) -fno-dwarf2-cfi-asm -x c -c /dev/null \
+		 -o /dev/null >/dev/null 2>&1
+CFI_FLAGS := $(shell $(CFI_TEST) && $(ECHO) '-fno-dwarf2-cfi-asm')
+WORKAROUND_CFLAGS += $(CFI_FLAGS)
+endif
+
+# gcc 4.6 generates spurious warnings if -Waddress is in force.
+# Inhibit this.
+#
+ifeq ($(CCTYPE),gcc)
+WNA_TEST = $(CC) -Wno-address -x c -c /dev/null -o /dev/null >/dev/null 2>&1
+WNA_FLAGS := $(shell $(WNA_TEST) && $(ECHO) '-Wno-address')
+WORKAROUND_CFLAGS += $(WNA_FLAGS)
+endif
+
+# Some versions of gas choke on division operators, treating them as
+# comment markers.  Specifying --divide will work around this problem,
+# but isn't available on older gas versions.
+#
+DIVIDE_TEST = $(AS) --divide /dev/null -o /dev/null 2>/dev/null
+DIVIDE_FLAGS := $(shell $(DIVIDE_TEST) && $(ECHO) '--divide')
+WORKAROUND_ASFLAGS += $(DIVIDE_FLAGS)
+
+###############################################################################
+#
+# Build verbosity
+#
+ifeq ($(V),1)
+Q :=
+QM := @\#
+else
+Q := @
+QM := @
+endif
+
+###############################################################################
+#
+# Set BIN according to whatever was specified on the command line as
+# the build target.
+#
+
+# Determine how many different BIN directories are mentioned in the
+# make goals.
+#
+BIN_GOALS	:= $(filter bin/% bin-%,$(MAKECMDGOALS))
+BIN_GOALS_BINS	:= $(sort $(foreach BG,$(BIN_GOALS),\
+				    $(firstword $(subst /, ,$(BG)))))
+NUM_BINS	:= $(words $(BIN_GOALS_BINS))
+
+ifeq ($(NUM_BINS),0)
+
+# No BIN directory was specified.  Set BIN to "bin" as a sensible
+# default.
+
+BIN		:= bin
+
+else # NUM_BINS == 0
+
+ifeq ($(NUM_BINS),1)
+
+# If exactly one BIN directory was specified, set BIN to match this
+# directory.
+#
+BIN		:= $(firstword $(BIN_GOALS_BINS))
+
+else # NUM_BINS == 1
+
+# More than one BIN directory was specified.  We cannot handle the
+# latter case within a single make invocation, so set up recursive
+# targets for each BIN directory.  Use exactly one target for each BIN
+# directory since running multiple make invocations within the same
+# BIN directory is likely to cause problems.
+#
+# Leave $(BIN) undefined.  This has implications for any target that
+# depends on $(BIN); such targets should be made conditional upon the
+# existence of $(BIN).
+#
+BIN_GOALS_FIRST	:= $(foreach BGB,$(BIN_GOALS_BINS),\
+			     $(firstword $(filter $(BGB)/%,$(BIN_GOALS))))
+BIN_GOALS_OTHER	:= $(filter-out $(BIN_GOALS_FIRST),$(BIN_GOALS))
+
+$(BIN_GOALS_FIRST) : % : BIN_RECURSE
+	$(Q)$(MAKE) --no-print-directory BIN=$(firstword $(subst /, ,$@)) \
+	    $(filter $(firstword $(subst /, ,$@))/%, $(BIN_GOALS))
+$(BIN_GOALS_OTHER) : % : BIN_RECURSE
+	$(Q)$(TRUE)
+.PHONY : BIN_RECURSE
+
+endif # NUM_BINS == 1
+endif # NUM_BINS == 0
+
+ifdef BIN
+
+# Create $(BIN) directory if it doesn't exist yet
+#
+ifeq ($(wildcard $(BIN)),)
+$(shell $(MKDIR) -p $(BIN))
+endif
+
+# Target to allow e.g. "make bin-efi arch"
+#
+$(BIN) :
+	@# Do nothing, silently
+.PHONY : $(BIN)
+
+# Remove everything in $(BIN) for a "make clean"
+#
+CLEANUP	+= $(BIN)/*.* # Avoid picking up directories
+
+endif # defined(BIN)
+
+# Determine whether or not we need to include the dependency files
+#
+NO_DEP_TARGETS	:= $(BIN) clean veryclean
+ifeq ($(MAKECMDGOALS),)
+NEED_DEPS	:= 1
+endif
+ifneq ($(strip $(filter-out $(NO_DEP_TARGETS),$(MAKECMDGOALS))),)
+NEED_DEPS	:= 1
+endif
+
+###############################################################################
+#
+# Select build architecture and platform based on $(BIN)
+#
+# BIN has the form bin[-[arch-]platform]
+
+ARCHS		:= $(patsubst arch/%,%,$(wildcard arch/*))
+PLATFORMS	:= $(patsubst config/defaults/%.h,%,\
+		     $(wildcard config/defaults/*.h))
+archs :
+	@$(ECHO) $(ARCHS)
+
+platforms :
+	@$(ECHO) $(PLATFORMS)
+
+ifdef BIN
+
+# Determine architecture portion of $(BIN), if present
+BIN_ARCH	:= $(strip $(foreach A,$(ARCHS),\
+			     $(patsubst bin-$(A)-%,$(A),\
+			       $(filter bin-$(A)-%,$(BIN)))))
+
+# Determine platform portion of $(BIN), if present
+ifeq ($(BIN_ARCH),)
+BIN_PLATFORM	:= $(patsubst bin-%,%,$(filter bin-%,$(BIN)))
+else
+BIN_PLATFORM	:= $(patsubst bin-$(BIN_ARCH)-%,%,$(BIN))
+endif
+
+# Determine build architecture
+DEFAULT_ARCH	:= i386
+ARCH		:= $(firstword $(BIN_ARCH) $(DEFAULT_ARCH))
+CFLAGS		+= -DARCH=$(ARCH)
+arch :
+	@$(ECHO) $(ARCH)
+.PHONY : arch
+
+# Determine build platform
+DEFAULT_PLATFORM := pcbios
+PLATFORM	:= $(firstword $(BIN_PLATFORM) $(DEFAULT_PLATFORM))
+CFLAGS		+= -DPLATFORM=$(PLATFORM)
+platform :
+	@$(ECHO) $(PLATFORM)
+
+endif # defined(BIN)
+
+# Include architecture-specific Makefile
+ifdef ARCH
+MAKEDEPS	+= arch/$(ARCH)/Makefile
+include arch/$(ARCH)/Makefile
+endif
+
+# Include architecture-specific include path
+ifdef ARCH
+INCDIRS		+= arch/$(ARCH)/include
+INCDIRS		+= arch/$(ARCH)/include/$(PLATFORM)
+endif
+
+###############################################################################
+#
+# Source file handling
+
+# SRCDIRS lists all directories containing source files.
+srcdirs :
+	@$(ECHO) $(SRCDIRS)
+
+# SRCS lists all .c or .S files found in any SRCDIR
+#
+SRCS	+= $(wildcard $(patsubst %,%/*.c,$(SRCDIRS)))
+SRCS	+= $(wildcard $(patsubst %,%/*.S,$(SRCDIRS)))
+srcs :
+	@$(ECHO) $(SRCS)
+
+# AUTO_SRCS lists all files in SRCS that are not mentioned in
+# NON_AUTO_SRCS.  Files should be added to NON_AUTO_SRCS if they
+# cannot be built using the standard build template.
+#
+AUTO_SRCS = $(filter-out $(NON_AUTO_SRCS),$(SRCS))
+autosrcs :
+	@$(ECHO) $(AUTO_SRCS)
+
+# Just about everything else in this section depends upon having
+# $(BIN) set
+
+ifdef BIN
+
+# INCDIRS lists the include path
+incdirs :
+	@$(ECHO) $(INCDIRS)
+
+# Common flags
+#
+CFLAGS		+= $(foreach INC,$(INCDIRS),-I$(INC))
+CFLAGS		+= -Os
+CFLAGS		+= -g
+ifeq ($(CCTYPE),gcc)
+CFLAGS		+= -ffreestanding
+CFLAGS		+= -Wall -W -Wformat-nonliteral
+endif
+ifeq ($(CCTYPE),icc)
+CFLAGS		+= -fno-builtin
+CFLAGS		+= -no-ip
+CFLAGS		+= -no-gcc
+CFLAGS		+= -diag-disable 111 # Unreachable code
+CFLAGS		+= -diag-disable 128 # Unreachable loop
+CFLAGS		+= -diag-disable 170 # Array boundary checks
+CFLAGS		+= -diag-disable 177 # Unused functions
+CFLAGS		+= -diag-disable 181 # printf() format checks
+CFLAGS		+= -diag-disable 188 # enum strictness
+CFLAGS		+= -diag-disable 193 # Undefined preprocessor identifiers
+CFLAGS		+= -diag-disable 280 # switch ( constant )
+CFLAGS		+= -diag-disable 310 # K&R parameter lists
+CFLAGS		+= -diag-disable 424 # Extra semicolon
+CFLAGS		+= -diag-disable 589 # Declarations mid-code
+CFLAGS		+= -diag-disable 593 # Unused variables
+CFLAGS		+= -diag-disable 810 # Casting ints to smaller ints
+CFLAGS		+= -diag-disable 981 # Sequence point violations
+CFLAGS		+= -diag-disable 1292 # Ignored attributes
+CFLAGS		+= -diag-disable 1338 # void pointer arithmetic
+CFLAGS		+= -diag-disable 1361 # Variable-length arrays
+CFLAGS		+= -diag-disable 1418 # Missing prototypes
+CFLAGS		+= -diag-disable 1419 # Missing prototypes
+CFLAGS		+= -diag-disable 1599 # Hidden variables
+CFLAGS		+= -Wall -Wmissing-declarations
+endif
+CFLAGS		+= $(WORKAROUND_CFLAGS) $(EXTRA_CFLAGS)
+ASFLAGS		+= $(WORKAROUND_ASFLAGS) $(EXTRA_ASFLAGS)
+LDFLAGS		+= $(WORKAROUND_LDFLAGS) $(EXTRA_LDFLAGS)
+
+# Inhibit -Werror if NO_WERROR is specified on make command line
+#
+ifneq ($(NO_WERROR),1)
+CFLAGS		+= -Werror
+ASFLAGS		+= --fatal-warnings
+endif
+
+# Function trace recorder state in the last build.  This is needed
+# in order to correctly rebuild whenever the function recorder is
+# enabled/disabled.
+#
+FNREC_STATE	:= $(BIN)/.fnrec.state
+ifeq ($(wildcard $(FNREC_STATE)),)
+FNREC_OLD	:= <invalid>
+else
+FNREC_OLD	:= $(shell cat $(FNREC_STATE))
+endif
+ifeq ($(FNREC_OLD),$(FNREC))
+$(FNREC_STATE) :
+else
+$(FNREC_STATE) : clean
+$(shell $(ECHO) "$(FNREC)" > $(FNREC_STATE))
+endif
+
+VERYCLEANUP	+= $(FNREC_STATE)
+MAKEDEPS	+= $(FNREC_STATE)
+
+ifeq ($(FNREC),1)
+# Enabling -finstrument-functions affects gcc's analysis and leads to spurious
+# warnings about use of uninitialised variables.
+#
+CFLAGS		+= -Wno-uninitialized
+CFLAGS		+= -finstrument-functions
+CFLAGS		+= -finstrument-functions-exclude-file-list=core/fnrec.c
+endif
+
+# Enable per-item sections and section garbage collection.  Note that
+# some older versions of gcc support -fdata-sections but treat it as
+# implying -fno-common, which would break our build.  Some other older
+# versions issue a spurious and uninhibitable warning if
+# -ffunction-sections is used with -g, which would also break our
+# build since we use -Werror.
+#
+ifeq ($(CCTYPE),gcc)
+DS_TEST		= $(ECHO) 'char x;' | \
+		  $(CC) -fdata-sections -S -x c - -o - 2>/dev/null | \
+		  grep -E '\.comm' > /dev/null
+DS_FLAGS	:= $(shell $(DS_TEST) && $(ECHO) '-fdata-sections')
+FS_TEST		= $(CC) -ffunction-sections -g -c -x c /dev/null \
+		  -o /dev/null 2>/dev/null
+FS_FLAGS	:= $(shell $(FS_TEST) && $(ECHO) '-ffunction-sections')
+CFLAGS		+= $(FS_FLAGS) $(DS_FLAGS)
+endif
+LDFLAGS		+= --gc-sections
+
+# compiler.h is needed for our linking and debugging system
+#
+CFLAGS		+= -include compiler.h
+
+# CFLAGS for specific object types
+#
+CFLAGS_c	+=
+CFLAGS_S 	+= -DASSEMBLY
+
+# Base object name of the current target
+#
+OBJECT		= $(firstword $(subst ., ,$(@F)))
+
+# CFLAGS for specific object files.  You can define
+# e.g. CFLAGS_rtl8139, and have those flags automatically used when
+# compiling bin/rtl8139.o.
+#
+OBJ_CFLAGS	= $(CFLAGS_$(OBJECT)) -DOBJECT=$(subst -,_,$(OBJECT))
+$(BIN)/%.flags :
+	@$(ECHO) $(OBJ_CFLAGS)
+
+# ICC requires postprocessing objects to fix up table alignments
+#
+ifeq ($(CCTYPE),icc)
+POST_O		= && $(ICCFIX) $@
+POST_O_DEPS	:= $(ICCFIX)
+else
+POST_O		:=
+POST_O_DEPS	:=
+endif
+
+# Rules for specific object types.
+#
+COMPILE_c	= $(CC) $(CFLAGS) $(CFLAGS_c) $(OBJ_CFLAGS)
+RULE_c		= $(Q)$(COMPILE_c) -c $< -o $@ $(POST_O)
+RULE_c_to_dbg%.o = $(Q)$(COMPILE_c) -Ddebug_$(subst -,_,$(OBJECT))=$* -c $< -o $@ $(POST_O)
+RULE_c_to_c	= $(Q)$(COMPILE_c) -E -c $< > $@
+RULE_c_to_s	= $(Q)$(COMPILE_c) -S -g0 -c $< -o $@
+
+PREPROCESS_S	= $(CPP) $(CFLAGS) $(CFLAGS_S) $(OBJ_CFLAGS)
+ASSEMBLE_S	= $(AS) $(ASFLAGS)
+RULE_S		= $(Q)$(PREPROCESS_S) $< | $(ASSEMBLE_S) -o $@
+RULE_S_to_dbg%.o = $(Q)$(PREPROCESS_S) -Ddebug_$(subst -,_,$(OBJECT))=$* $< | $(ASSEMBLE_S) -o $@
+RULE_S_to_s	= $(Q)$(PREPROCESS_S) $< > $@
+
+DEBUG_TARGETS	+= dbg%.o c s
+
+# We automatically generate rules for any file mentioned in AUTO_SRCS
+# using the following set of templates.  It would be cleaner to use
+# $(eval ...), but this function exists only in GNU make >= 3.80.
+
+# deps_template : generate dependency list for a given source file
+#
+# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
+# $(2) is the source type (e.g. "c")
+# $(3) is the source base name (e.g. "rtl8139")
+#
+define deps_template
+	@$(ECHO) "  [DEPS] $(1)"
+	@$(MKDIR) -p $(BIN)/deps/$(dir $(1))
+	@$(CPP) $(CFLAGS) $(CFLAGS_$(2)) $(CFLAGS_$(3)) -DOBJECT=$(3) \
+		-Wno-error -M $(1) -MG -MP | \
+		sed 's/\.o\s*:/_DEPS =/' > $(BIN)/deps/$(1).d
+endef
+
+# rules_template : generate rules for a given source file
+#
+# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
+# $(2) is the source type (e.g. "c")
+# $(3) is the source base name (e.g. "rtl8139")
+#
+define rules_template
+	@$(ECHO) "  [RULES] $(1)"
+	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
+	@$(ECHO_E) '\n$$(BIN)/$(3).o :' \
+		 '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		 '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		 '\n\t$$(RULE_$(2))\n' \
+		 '\nBOBJS += $$(BIN)/$(3).o\n' \
+		 $(foreach TGT,$(DEBUG_TARGETS), \
+		    $(if $(RULE_$(2)_to_$(TGT)), \
+		    '\n$$(BIN)/$(3).$(TGT) :' \
+		    '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		    '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		    '\n\t$$(RULE_$(2)_to_$(TGT))\n' \
+		    '\n$(TGT)_OBJS += $$(BIN)/$(3).$(TGT)\n' ) ) \
+		 '\n$(BIN)/deps/$(1).d : $$($(3)_DEPS)\n' \
+		 '\nTAGS : $$($(3)_DEPS)\n' > $(BIN)/rules/$(1).r
+	@$(if $(findstring drivers/,$(1)),\
+	   $(PERL) $(PARSEROM) $(1) >> $(BIN)/rules/$(1).r)
+endef
+
+# Rule to generate the dependency list file
+#
+$(BIN)/deps/%.d : % $(MAKEDEPS)
+	$(call deps_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
+
+# Calculate and include the list of dependency list files
+#
+AUTO_DEPS	= $(patsubst %,$(BIN)/deps/%.d,$(AUTO_SRCS))
+ifdef NEED_DEPS
+ifneq ($(AUTO_DEPS),)
+-include $(AUTO_DEPS)
+endif
+endif
+autodeps :
+	@$(ECHO) $(AUTO_DEPS)
+VERYCLEANUP	+= $(BIN)/deps
+
+# Rule to generate the rules file
+#
+$(BIN)/rules/%.r : % $(MAKEDEPS) $(PARSEROM)
+	$(call rules_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
+
+# Calculate and include the list of rules files
+#
+AUTO_RULES	= $(patsubst %,$(BIN)/rules/%.r,$(AUTO_SRCS))
+ifdef NEED_DEPS
+ifneq ($(AUTO_RULES),)
+-include $(AUTO_RULES)
+endif
+endif
+autorules :
+	@$(ECHO) $(AUTO_RULES)
+VERYCLEANUP	+= $(BIN)/rules
+
+# The following variables are created by the rules files
+#
+bobjs :
+	@$(ECHO) $(BOBJS)
+drivers :
+	@$(ECHO) $(DRIVERS)
+.PHONY : drivers
+roms :
+	@$(ECHO) $(ROMS)
+
+# List of embedded images included in the last build of embedded.o.
+# This is needed in order to correctly rebuild embedded.o whenever the
+# list of objects changes.
+#
+EMBED		:= $(EMBEDDED_IMAGE) # Maintain backwards compatibility
+EMBEDDED_LIST	:= $(BIN)/.embedded.list
+ifeq ($(wildcard $(EMBEDDED_LIST)),)
+EMBED_OLD := <invalid>
+else
+EMBED_OLD := $(shell cat $(EMBEDDED_LIST))
+endif
+ifneq ($(EMBED_OLD),$(EMBED))
+$(shell $(ECHO) "$(EMBED)" > $(EMBEDDED_LIST))
+endif
+
+$(EMBEDDED_LIST) :
+
+VERYCLEANUP	+= $(EMBEDDED_LIST)
+
+EMBEDDED_FILES	:= $(subst $(COMMA), ,$(EMBED))
+EMBED_ALL	:= $(foreach i,$(call seq,1,$(words $(EMBEDDED_FILES))),\
+		     EMBED ( $(i), \"$(word $(i), $(EMBEDDED_FILES))\",\
+			     \"$(notdir $(word $(i),$(EMBEDDED_FILES)))\" ))
+
+$(BIN)/embedded.o : $(EMBEDDED_FILES) $(EMBEDDED_LIST)
+
+# This file uses .incbin inline assembly to include a binary file.
+# Unfortunately ccache does not detect this dependency and caches builds even
+# when the binary file has changed.
+#
+$(BIN)/embedded.o : override CC := env CCACHE_DISABLE=1 $(CC)
+
+CFLAGS_embedded = -DEMBED_ALL="$(EMBED_ALL)"
+
+# Generate error usage information
+#
+$(BIN)/%.einfo : $(BIN)/%.o
+	$(QM)$(ECHO) "  [EINFO] $@"
+	$(Q)$(OBJCOPY) -O binary -j .einfo --set-section-flags .einfo=alloc \
+		$< $@
+
+EINFOS		:= $(patsubst $(BIN)/%.o,$(BIN)/%.einfo,$(BOBJS))
+$(BIN)/errors : $(EINFOS) $(EINFO)
+	$(QM)$(ECHO) "  [EINFO] $@"
+	$(Q)$(EINFO) $(EINFOS) | sort > $@
+CLEANUP		+= $(BIN)/errors	# Doesn't match the $(BIN)/*.* pattern
+
+# Generate the NIC file from the parsed source files.  The NIC file is
+# only for rom-o-matic.
+#
+$(BIN)/NIC : $(AUTO_DEPS)
+	@$(ECHO) '# This is an automatically generated file, do not edit' > $@
+	@$(ECHO) '# It does not affect anything in the build, ' \
+	     'it is only for rom-o-matic' >> $@
+	@$(ECHO) >> $@
+	@perl -ne 'chomp; print "$$1\n" if /\# NIC\t(.*)$$/' $^ >> $@
+CLEANUP		+= $(BIN)/NIC	# Doesn't match the $(BIN)/*.* pattern
+
+# Analyse a target name (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and
+# derive the variables:
+# 
+# TGT_ELEMENTS : the elements of the target (e.g. "dfe538 prism2_pci")
+# TGT_PREFIX   : the prefix type (e.g. "zrom")
+# TGT_DRIVERS  : the driver for each element (e.g. "rtl8139 prism2_pci")
+# TGT_ROM_NAME : the ROM name (e.g. "dfe538")
+# TGT_MEDIA    : the media type (e.g. "rom")
+#
+DRIVERS_ipxe	= $(DRIVERS)
+CARD_DRIVER	= $(firstword $(DRIVER_$(1)) $(1))
+TGT_ELEMENTS	= $(subst --, ,$(firstword $(subst ., ,$(notdir $@))))
+TGT_PREFIX	= $(word 2,$(subst ., ,$(notdir $@)))
+TGT_ROM_NAME	= $(firstword $(TGT_ELEMENTS))
+TGT_DRIVERS	= $(strip $(if $(DRIVERS_$(TGT_ROM_NAME)), \
+			       $(DRIVERS_$(TGT_ROM_NAME)), \
+			       $(foreach TGT_ELEMENT,$(TGT_ELEMENTS), \
+			         $(call CARD_DRIVER,$(TGT_ELEMENT))) ))
+TGT_MEDIA	= $(subst z,,$(TGT_PREFIX))
+
+# Look up ROM IDs for the current target
+# (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the variables:
+#
+# TGT_PCI_VENDOR : the PCI vendor ID (e.g. "0x1186")
+# TGT_PCI_DEVICE : the PCI device ID (e.g. "0x1300")
+#
+TGT_PCI_VENDOR	= $(PCI_VENDOR_$(TGT_ROM_NAME))
+TGT_PCI_DEVICE	= $(PCI_DEVICE_$(TGT_ROM_NAME))
+
+# Calculate link-time options for the current target
+# (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the variables:
+#
+# TGT_LD_DRIVERS : symbols to require in order to drag in the relevant drivers
+#		   (e.g. "obj_rtl8139 obj_prism2_pci")
+# TGT_LD_IDS :     symbols to define in order to fill in ID structures in the
+#		   ROM header (e.g."pci_vendor_id=0x1186 pci_device_id=0x1300")
+#
+TGT_LD_DRIVERS	= $(subst -,_,$(patsubst %,obj_%,$(TGT_DRIVERS)))
+TGT_LD_IDS	= pci_vendor_id=$(firstword $(TGT_PCI_VENDOR) 0) \
+		  pci_device_id=$(firstword $(TGT_PCI_DEVICE) 0)
+TGT_LD_ENTRY	= _$(TGT_PREFIX)_start
+
+# Calculate linker flags based on link-time options for the current
+# target type (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the
+# variables:
+#
+# TGT_LD_FLAGS : target-specific flags to pass to linker (e.g.
+#		 "-u obj_zpciprefix -u obj_rtl8139 -u obj_prism2_pci
+#		  --defsym pci_vendor=0x1186 --defsym pci_device=0x1300")
+#
+TGT_LD_FLAGS	= $(foreach SYM,$(TGT_LD_ENTRY) $(TGT_LD_DRIVERS) obj_config,\
+		    -u $(SYM) --defsym check_$(SYM)=$(SYM) ) \
+		  $(patsubst %,--defsym %,$(TGT_LD_IDS)) \
+		  -e $(TGT_LD_ENTRY)
+
+# Calculate list of debugging versions of objects to be included in
+# the target.
+#
+DEBUG_LIST	= $(subst $(COMMA), ,$(DEBUG))
+DEBUG_OBJ_LEVEL	= $(firstword $(word 2,$(subst :, ,$(1))) 1)
+DEBUG_OBJ_BASE	= $(word 1,$(subst :, ,$(1))).dbg$(call DEBUG_OBJ_LEVEL,$(1))
+DEBUG_OBJ	= $(BIN)/$(call DEBUG_OBJ_BASE,$(1)).o
+DEBUG_ORIG_OBJ	= $(BIN)/$(word 1,$(subst :, ,$(1))).o
+DEBUG_OBJS	= $(foreach D,$(DEBUG_LIST),$(call DEBUG_OBJ,$(D)))
+DEBUG_ORIG_OBJS	= $(foreach D,$(DEBUG_LIST),$(call DEBUG_ORIG_OBJ,$(D)))
+BLIB_OBJS	= $(DEBUG_OBJS) $(filter-out $(DEBUG_ORIG_OBJS),$(BOBJS))
+
+# Print out all derived information for a given target.
+#
+$(BIN)/%.info :
+	@$(ECHO) 'Elements             : $(TGT_ELEMENTS)'
+	@$(ECHO) 'Prefix               : $(TGT_PREFIX)'
+	@$(ECHO) 'Drivers              : $(TGT_DRIVERS)'
+	@$(ECHO) 'ROM name             : $(TGT_ROM_NAME)'
+	@$(ECHO) 'Media                : $(TGT_MEDIA)'
+	@$(ECHO)
+	@$(ECHO) 'PCI vendor           : $(TGT_PCI_VENDOR)'
+	@$(ECHO) 'PCI device           : $(TGT_PCI_DEVICE)'
+	@$(ECHO)
+	@$(ECHO) 'LD driver symbols    : $(TGT_LD_DRIVERS)'
+	@$(ECHO) 'LD ID symbols        : $(TGT_LD_IDS)'
+	@$(ECHO) 'LD entry point       : $(TGT_LD_ENTRY)'
+	@$(ECHO)
+	@$(ECHO) 'LD target flags      : $(TGT_LD_FLAGS)'
+	@$(ECHO)
+	@$(ECHO) 'Debugging objects    : $(DEBUG_OBJS)'
+	@$(ECHO) 'Replaced objects     : $(DEBUG_ORIG_OBJS)'
+
+# List of objects included in the last build of blib.  This is needed
+# in order to correctly rebuild blib whenever the list of objects
+# changes.
+#
+BLIB_LIST	:= $(BIN)/.blib.list
+ifeq ($(wildcard $(BLIB_LIST)),)
+BLIB_OBJS_OLD	:= <invalid>
+else
+BLIB_OBJS_OLD	:= $(shell cat $(BLIB_LIST))
+endif
+ifneq ($(BLIB_OBJS_OLD),$(BLIB_OBJS))
+$(shell $(ECHO) "$(BLIB_OBJS)" > $(BLIB_LIST))
+endif
+
+$(BLIB_LIST) :
+
+VERYCLEANUP	+= $(BLIB_LIST)
+
+# Library of all objects
+#
+BLIB		= $(BIN)/blib.a
+$(BLIB) : $(BLIB_OBJS) $(BLIB_LIST) $(MAKEDEPS)
+	$(Q)$(RM) $(BLIB)
+	$(QM)$(ECHO) "  [AR] $@"
+	$(Q)$(AR) r $@ $(BLIB_OBJS)
+	$(Q)$(RANLIB) $@
+blib : $(BLIB)
+
+# Command to generate build ID.  Must be unique for each $(BIN)/%.tmp,
+# even within the same build run.
+#
+BUILD_ID_CMD	:= perl -e 'printf "0x%08x", int ( rand ( 0xffffffff ) );'
+
+# Build an intermediate object file from the objects required for the
+# specified target.
+#
+$(BIN)/%.tmp : $(BLIB) $(MAKEDEPS) $(LDSCRIPT)
+	$(QM)$(ECHO) "  [LD] $@"
+	$(Q)$(LD) $(LDFLAGS) -T $(LDSCRIPT) $(TGT_LD_FLAGS) $(BLIB) -o $@ \
+		--defsym _build_id=`$(BUILD_ID_CMD)` -Map $(BIN)/$*.tmp.map
+	$(Q)$(OBJDUMP) -ht $@ | $(PERL) $(SORTOBJDUMP) >> $(BIN)/$*.tmp.map
+
+# Keep intermediate object file (useful for debugging)
+.PRECIOUS : $(BIN)/%.tmp
+
+# Show a linker map for the specified target
+#
+$(BIN)/%.map : $(BIN)/%.tmp
+	@less $(BIN)/$*.tmp.map
+
+# Get objects list for the specified target
+#
+define objs_list
+	$(sort $(foreach OBJ_SYMBOL,\
+		 $(filter obj_%,$(shell $(NM) $(1) | cut -d" " -f3)),\
+		 $(patsubst obj_%,%,$(OBJ_SYMBOL))))
+endef
+$(BIN)/%.objs : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call objs_list,$<)
+$(BIN)/%.sizes : $(BIN)/%.tmp
+	$(Q)$(SIZE) -t $(foreach OBJ,$(call objs_list,$<),$(wildcard $(BIN)/$(subst _,?,$(OBJ)).o)) | \
+		sort -g
+
+# Get dependency list for the specified target
+#
+define deps_list
+	$(sort $(foreach OBJ,$(call objs_list,$(1)),$($(OBJ)_DEPS)))
+endef
+$(BIN)/%.deps : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call deps_list,$<)
+
+# Get unneeded source files for the specified target
+#
+define nodeps_list
+	$(sort $(filter-out $(call deps_list,$(1)),\
+		 $(foreach BOBJ,$(BOBJS),\
+		   $($(basename $(notdir $(BOBJ)))_DEPS))))
+endef
+$(BIN)/%.nodeps : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call nodeps_list,$<)
+
+# Get licensing verdict for the specified target
+#
+define licensable_deps_list
+	$(filter-out config/local/%.h,$(call deps_list,$(1)))
+endef
+define unlicensed_deps_list
+	$(shell grep -L FILE_LICENCE $(call licensable_deps_list,$(1)))
+endef
+define licence_list
+	$(patsubst __licence_%,%,\
+	  $(filter __licence_%,$(shell $(NM) $(1) | cut -d" " -f3)))
+endef
+$(BIN)/%.licence : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [LICENCE] $@"
+	$(Q)$(if $(strip $(call unlicensed_deps_list,$<)),\
+		echo -n "Unable to determine licence because the following " ;\
+		echo "files are missing a licence declaration:" ;\
+		echo $(call unlicensed_deps_list,$<);\
+		exit 1,\
+		$(PERL) $(LICENCE) $(call licence_list,$<))
+
+# Extract compression information from intermediate object file
+#
+$(BIN)/%.zinfo : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [ZINFO] $@"
+	$(Q)$(OBJCOPY) -O binary -j .zinfo $< $@
+
+# Build raw binary file from intermediate object file
+#
+$(BIN)/%.bin : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [BIN] $@"
+	$(Q)$(OBJCOPY) -O binary -R .zinfo $< $@
+
+# Compress raw binary file
+#
+$(BIN)/%.zbin : $(BIN)/%.bin $(BIN)/%.zinfo $(ZBIN)
+	$(QM)$(ECHO) "  [ZBIN] $@"
+	$(Q)$(ZBIN) $(BIN)/$*.bin $(BIN)/$*.zinfo > $@
+
+# Rules for each media format.  These are generated and placed in an
+# external Makefile fragment.  We could do this via $(eval ...), but
+# that would require make >= 3.80.
+# 
+# Note that there's an alternative way to generate most .rom images:
+# they can be copied from their 'master' ROM image using cp and
+# reprocessed with makerom to add the PCI IDs and ident string.  The
+# relevant rule would look something like:
+#
+#   $(BIN)/dfe538%rom : $(BIN)/rtl8139%rom
+#	cat $< $@
+#	$(FINALISE_rom)
+# 
+# You can derive the ROM/driver relationships using the variables
+# DRIVER_<rom> and/or ROMS_<driver>.
+# 
+# We don't currently do this, because (a) it would require generating
+# yet more Makefile fragments (since you need a rule for each ROM in
+# ROMS), and (b) the linker is so fast that it probably wouldn't make
+# much difference to the overall build time.
+
+# Add NON_AUTO_MEDIA to the media list, so that they show up in the
+# output of "make"
+#
+MEDIA		+= $(NON_AUTO_MEDIA)
+
+media :
+	@$(ECHO) $(MEDIA)
+
+AUTO_MEDIA	= $(filter-out $(NON_AUTO_MEDIA),$(MEDIA))
+automedia :
+	@$(ECHO) $(AUTO_MEDIA)
+
+# media_template : create Makefile rules for specified media
+#
+# $(1) is the media name (e.g. "rom")
+#
+define media_template
+	@$(ECHO) "  [MEDIARULES] $(1)"
+	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
+	@$(ECHO_E) '$$(BIN)/%.$(1) : $$(BIN)/%.$(1).zbin' \
+		  '\n\t$$(QM)$(ECHO) "  [FINISH] $$@"' \
+		  '\n\t$$(Q)$$(CP) $$< $$@' \
+		  '\n\t$$(Q)$$(PAD_$(1))' \
+		  '\n\t$$(Q)$$(FINALISE_$(1))' \
+		> $(BIN)/rules/$(1).media.r
+endef
+
+# Rule to generate the Makefile rules to be included
+#
+$(BIN)/rules/%.media.r : $(MAKEDEPS)
+	$(call media_template,$*)
+
+# Calculate and include the list of Makefile rules files
+#
+MEDIA_RULES		= $(patsubst %,$(BIN)/rules/%.media.r,$(AUTO_MEDIA))
+mediarules :
+	@$(ECHO) $(MEDIA_RULES)
+ifdef NEED_DEPS
+ifneq ($(MEDIA_RULES),)
+-include $(MEDIA_RULES)
+endif
+endif
+
+# Wrap up binary blobs (for embedded images)
+#
+$(BIN)/%.o : payload/%.img
+	$(QM)echo "  [WRAP] $@"
+	$(Q)$(LD) -b binary -r -o $@ $< --undefined obj_payload \
+		--defsym obj_$*=0
+
+BOBJS += $(patsubst payload/%.img,$(BIN)/%.o,$(wildcard payload/*.img))
+
+# The "allXXXs" targets for each suffix
+#
+allall: allroms allmroms allpxes allisos alldsks
+allroms allmroms : all%s : $(foreach ROM,$(ROMS),$(BIN)/$(ROM).%)
+allpxes allisos alldsks : all%s : $(foreach DRIVER,$(DRIVERS),$(BIN)/$(DRIVER).%)
+
+# Alias for ipxe.%
+#
+$(BIN)/etherboot.% : $(BIN)/ipxe.%
+	ln -sf $(notdir $<) $@
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# The compression utilities
+#
+$(NRV2B) : util/nrv2b.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG \
+		       -DBITSIZE=32 -DENDIAN=0 -o $@ $<
+CLEANUP	+= $(NRV2B)
+
+$(ZBIN) : util/zbin.c util/nrv2b.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -O2 -o $@ $<
+CLEANUP += $(ZBIN)
+
+###############################################################################
+#
+# The EFI image converter
+#
+ELF2EFI_CFLAGS	:= -I$(BINUTILS_DIR)/include -I$(BFD_DIR)/include \
+		   -I$(ZLIB_DIR)/include -idirafter include \
+		   -L$(BINUTILS_DIR)/lib -L$(BFD_DIR)/lib -L$(ZLIB_DIR)/lib \
+		   -lbfd -ldl -liberty -lz -Wl,--no-warn-search-mismatch
+
+$(ELF2EFI32) : util/elf2efi.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_IA32 -O2 -o $@
+CLEANUP += $(ELF2EFI32)
+
+$(ELF2EFI64) : util/elf2efi.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_X64 -O2 -o $@
+CLEANUP += $(ELF2EFI64)
+
+$(EFIROM) : util/efirom.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(EFIROM)
+
+###############################################################################
+#
+# The ICC fixup utility
+#
+$(ICCFIX) : util/iccfix.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(ICCFIX)
+
+###############################################################################
+#
+# The error usage information utility
+#
+$(EINFO) : util/einfo.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(EINFO)
+
+###############################################################################
+#
+# Local configs
+#
+config/local/%.h :
+	$(Q)touch $@
+
+###############################################################################
+#
+# Auto-incrementing build serial number.  Append "bs" to your list of
+# build targets to get a serial number printed at the end of the
+# build.  Enable -DBUILD_SERIAL in order to see it when the code runs.
+#
+BUILDSERIAL_H		= config/.buildserial.h
+BUILDSERIAL_NOW		= config/.buildserial.now
+BUILDSERIAL_NEXT	= config/.buildserial.next
+
+$(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT) :
+	$(ECHO) 1 > $@
+
+$(BUILDSERIAL_H) : $(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT)
+	$(ECHO) '#define BUILD_SERIAL_NUM $(shell cat $<)' > $@
+
+ifeq ($(filter bs,$(MAKECMDGOALS)),bs)
+$(shell diff -q $(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT) > /dev/null || \
+	cp -f $(BUILDSERIAL_NEXT) $(BUILDSERIAL_NOW))
+endif
+
+bs : $(BUILDSERIAL_NOW)
+	@$(ECHO) $$(( $(shell cat $<) + 1 )) > $(BUILDSERIAL_NEXT)
+	@$(ECHO) "Build serial number is $(shell cat $<)"
+
+###############################################################################
+#
+# Build the TAGS file(s) for emacs
+#
+TAGS :
+	ctags -e -R -f $@ --exclude=bin
+
+CLEANUP	+= TAGS
+
+###############################################################################
+#
+# Force rebuild for any given target
+#
+%.rebuild :
+	rm -f $*
+	$(Q)$(MAKE) $*
+
+###############################################################################
+#
+# Symbol table checks
+#
+
+ifdef BIN
+
+SYMTAB	= $(BIN)/symtab
+$(SYMTAB) : $(BLIB)
+	$(OBJDUMP) -w -t $< > $@
+
+CLEANUP	+= $(BIN)/symtab
+
+symcheck : $(SYMTAB)
+	$(PERL) $(SYMCHECK) $<
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Build bochs symbol table
+#
+
+ifdef BIN
+
+$(BIN)/%.bxs : $(BIN)/%.tmp
+	$(NM) $< | cut -d" " -f1,3 > $@
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Documentation
+#
+
+ifdef BIN
+
+$(BIN)/doxygen.cfg : doxygen.cfg $(MAKEDEPS)
+	$(Q)$(PERL) -pe 's{\@SRCDIRS\@}{$(SRCDIRS)}; ' \
+		-e  's{\@INCDIRS\@}{$(filter-out .,$(INCDIRS))}; ' \
+		-e  's{\@BIN\@}{$(BIN)}; ' \
+		-e  's{\@ARCH\@}{$(ARCH)}; ' \
+		$< > $@
+
+$(BIN)/doc : $(BIN)/doxygen.cfg
+	$(Q)$(DOXYGEN) $<
+
+.PHONY : $(BIN)/doc
+
+doc : $(BIN)/doc
+
+doc-clean :
+	$(Q)$(RM) -r $(BIN)/doc
+
+VERYCLEANUP	+= $(BIN)/doc
+
+docview :
+	@[ -f $(BIN)/doc/html/index.html ] || $(MAKE) $(BIN)/doc
+	@if [ -n "$$BROWSER" ] ; then \
+		( $$BROWSER $(BIN)/doc/html/index.html & ) ; \
+	else \
+		$(ECHO) "Documentation index in $(BIN)/doc/html/index.html" ; \
+	fi
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Keyboard maps
+#
+
+hci/keymap/keymap_%.c :
+	$(Q)$(PERL) $(GENKEYMAP) $* > $@
+
+###############################################################################
+#
+# Force deletion of incomplete targets
+#
+
+.DELETE_ON_ERROR :
+
+###############################################################################
+#
+# Clean-up
+#
+clean :
+	$(RM) $(CLEANUP)
+
+veryclean : clean
+	$(RM) -r $(VERYCLEANUP)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/disable-baddrivers.diff/src/Makefile ipxe-1.0.1~lliurex1505/.pc/disable-baddrivers.diff/src/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/disable-baddrivers.diff/src/Makefile	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/disable-baddrivers.diff/src/Makefile	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,179 @@
+###############################################################################
+#
+# Initialise various variables
+#
+
+CLEANUP		:=
+CFLAGS		:=
+ASFLAGS		:=
+LDFLAGS		:=
+MAKEDEPS	:= Makefile
+
+###############################################################################
+#
+# Locations of tools
+#
+HOST_CC		:= gcc
+RM		:= rm -f
+TOUCH		:= touch
+MKDIR		:= mkdir
+CP		:= cp
+ECHO		:= echo
+PRINTF		:= printf
+PERL		:= perl
+TRUE		:= true
+CC		:= $(CROSS_COMPILE)gcc
+CPP		:= $(CC) -E
+AS		:= $(CROSS_COMPILE)as
+LD		:= $(CROSS_COMPILE)ld
+SIZE		:= $(CROSS_COMPILE)size
+AR		:= $(CROSS_COMPILE)ar
+RANLIB		:= $(CROSS_COMPILE)ranlib
+OBJCOPY		:= $(CROSS_COMPILE)objcopy
+NM		:= $(CROSS_COMPILE)nm
+OBJDUMP		:= $(CROSS_COMPILE)objdump
+PARSEROM	:= ./util/parserom.pl
+FIXROM		:= ./util/fixrom.pl
+SYMCHECK	:= ./util/symcheck.pl
+SORTOBJDUMP	:= ./util/sortobjdump.pl
+PADIMG		:= ./util/padimg.pl
+LICENCE		:= ./util/licence.pl
+NRV2B		:= ./util/nrv2b
+ZBIN		:= ./util/zbin
+ELF2EFI32	:= ./util/elf2efi32
+ELF2EFI64	:= ./util/elf2efi64
+EFIROM		:= ./util/efirom
+ICCFIX		:= ./util/iccfix
+EINFO		:= ./util/einfo
+GENKEYMAP	:= ./util/genkeymap.pl
+DOXYGEN		:= doxygen
+BINUTILS_DIR	:= /usr
+BFD_DIR		:= $(BINUTILS_DIR)
+ZLIB_DIR	:= /usr
+
+###############################################################################
+#
+# SRCDIRS lists all directories containing source files.
+#
+SRCDIRS		:=
+SRCDIRS		+= libgcc
+SRCDIRS		+= core
+SRCDIRS		+= net net/tcp net/udp net/infiniband net/80211
+SRCDIRS		+= image
+SRCDIRS		+= drivers/bus
+SRCDIRS		+= drivers/net
+SRCDIRS		+= drivers/net/e1000
+SRCDIRS		+= drivers/net/e1000e
+SRCDIRS		+= drivers/net/igb
+SRCDIRS		+= drivers/net/igbvf
+SRCDIRS		+= drivers/net/phantom
+SRCDIRS		+= drivers/net/rtl818x
+SRCDIRS		+= drivers/net/ath
+SRCDIRS		+= drivers/net/ath/ath5k
+SRCDIRS		+= drivers/net/ath/ath9k
+SRCDIRS		+= drivers/net/vxge
+SRCDIRS		+= drivers/net/efi
+SRCDIRS		+= drivers/block
+SRCDIRS		+= drivers/nvs
+SRCDIRS		+= drivers/bitbash
+SRCDIRS		+= drivers/infiniband
+SRCDIRS		+= interface/pxe interface/efi interface/smbios
+SRCDIRS		+= interface/bofm
+SRCDIRS		+= tests
+SRCDIRS		+= crypto crypto/axtls crypto/matrixssl
+SRCDIRS		+= hci hci/commands hci/tui
+SRCDIRS		+= hci/mucurses hci/mucurses/widgets
+SRCDIRS		+= hci/keymap
+SRCDIRS		+= usr
+SRCDIRS		+= config
+
+# NON_AUTO_SRCS lists files that are excluded from the normal
+# automatic build system.
+#
+NON_AUTO_SRCS	:=
+NON_AUTO_SRCS	+= drivers/net/prism2.c
+
+# INCDIRS lists the include path
+#
+INCDIRS		:=
+INCDIRS		+= include .
+
+###############################################################################
+#
+# Default build target: build the most common targets and print out a
+# helpfully suggestive message
+#
+ALL		:= bin/blib.a bin/ipxe.dsk bin/ipxe.lkrn bin/ipxe.iso \
+		   bin/ipxe.usb bin/undionly.kpxe bin/rtl8139.rom
+all : $(ALL)
+	@$(ECHO) '==========================================================='
+	@$(ECHO)
+	@$(ECHO) 'To create a bootable floppy, type'
+	@$(ECHO) '    cat bin/ipxe.dsk > /dev/fd0'
+	@$(ECHO) 'where /dev/fd0 is your floppy drive.  This will erase any'
+	@$(ECHO) 'data already on the disk.'
+	@$(ECHO)
+	@$(ECHO) 'To create a bootable USB key, type'
+	@$(ECHO) '    cat bin/ipxe.usb > /dev/sdX'
+	@$(ECHO) 'where /dev/sdX is your USB key, and is *not* a real hard'
+	@$(ECHO) 'disk on your system.  This will erase any data already on'
+	@$(ECHO) 'the USB key.'
+	@$(ECHO)
+	@$(ECHO) 'To create a bootable CD-ROM, burn the ISO image '
+	@$(ECHO) 'bin/ipxe.iso to a blank CD-ROM.'
+	@$(ECHO)
+	@$(ECHO) 'These images contain drivers for all supported cards.  You'
+	@$(ECHO) 'can build more customised images, and ROM images, using'
+	@$(ECHO) '    make bin/<rom-name>.<output-format>'
+	@$(ECHO)
+	@$(ECHO) '==========================================================='
+
+###############################################################################
+#
+# Comprehensive build target: build a selection of cross-platform
+# targets to expose potential build errors that show up only on
+# certain platforms
+#
+everything :
+	$(Q)$(MAKE) --no-print-directory $(ALL) \
+		bin-i386-efi/ipxe.efi bin-i386-efi/ipxe.efidrv \
+		bin-i386-efi/ipxe.efirom \
+		bin-x86_64-efi/ipxe.efi bin-x86_64-efi/ipxe.efidrv \
+		bin-x86_64-efi/ipxe.efirom \
+		bin-i386-linux/tap.linux bin-x86_64-linux/tap.linux
+
+###############################################################################
+#
+# Build targets that do nothing but might be tried by users
+#
+configure :
+	@$(ECHO) "No configuration needed."
+
+install :
+	@$(ECHO) "No installation required."
+
+###############################################################################
+#
+# Version number calculations
+#
+VERSION_MAJOR	= 1
+VERSION_MINOR	= 0
+VERSION_PATCH	= 0
+EXTRAVERSION	= +
+MM_VERSION	= $(VERSION_MAJOR).$(VERSION_MINOR)
+VERSION		= $(MM_VERSION).$(VERSION_PATCH)$(EXTRAVERSION)
+CFLAGS		+= -DVERSION_MAJOR=$(VERSION_MAJOR) \
+		   -DVERSION_MINOR=$(VERSION_MINOR) \
+		   -DVERSION_PATCH=$(VERSION_PATCH) \
+		   -DVERSION=\"$(VERSION)\"
+IDENT		= '$(@F) $(VERSION) (GPL) ipxe.org'
+version :
+	@$(ECHO) $(VERSION)
+
+###############################################################################
+#
+# Drag in the bulk of the build system
+#
+
+MAKEDEPS	+= Makefile.housekeeping
+include Makefile.housekeeping
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/qemu-target.diff/src/Makefile.housekeeping ipxe-1.0.1~lliurex1505/.pc/qemu-target.diff/src/Makefile.housekeeping
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/qemu-target.diff/src/Makefile.housekeeping	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/qemu-target.diff/src/Makefile.housekeeping	2015-04-14 12:54:27.000000000 +0000
@@ -0,0 +1,1154 @@
+# -*- makefile -*- : Force emacs to use Makefile mode
+#
+# This file contains various boring housekeeping functions that would
+# otherwise seriously clutter up the main Makefile.
+
+###############################################################################
+#
+# Find a usable "echo -e" substitute.
+#
+TAB 			:= $(shell $(PRINTF) '\t')
+ECHO_E_ECHO		:= $(ECHO)
+ECHO_E_ECHO_E		:= $(ECHO) -e
+ECHO_E_BIN_ECHO 	:= /bin/echo
+ECHO_E_BIN_ECHO_E 	:= /bin/echo -e
+ECHO_E_ECHO_TAB		:= $(shell $(ECHO_E_ECHO) '\t' | cat)
+ECHO_E_ECHO_E_TAB	:= $(shell $(ECHO_E_ECHO_E) '\t' | cat)
+ECHO_E_BIN_ECHO_TAB 	:= $(shell $(ECHO_E_BIN_ECHO) '\t')
+ECHO_E_BIN_ECHO_E_TAB 	:= $(shell $(ECHO_E_BIN_ECHO_E) '\t')
+
+ifeq ($(ECHO_E_ECHO_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_ECHO)
+endif
+ifeq ($(ECHO_E_ECHO_E_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_ECHO_E)
+endif
+ifeq ($(ECHO_E_BIN_ECHO_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_BIN_ECHO)
+endif
+ifeq ($(ECHO_E_BIN_ECHO_E_TAB),$(TAB))
+ECHO_E		:= $(ECHO_E_BIN_ECHO_E)
+endif
+
+.echocheck :
+ifdef ECHO_E
+	@$(TOUCH) $@
+else
+	@$(PRINTF) '%24s : x%sx\n' 'tab' '$(TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_ECHO) \t"' \
+				    '$(ECHO_E_ECHO_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_ECHO_E) \t"' \
+				    '$(ECHO_E_ECHO_E_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_BIN_ECHO) \t"' \
+				    '$(ECHO_E_BIN_ECHO_TAB)'
+	@$(PRINTF) '%24s : x%sx\n' '"$(ECHO_E_BIN_ECHO_E) \t"' \
+				    '$(ECHO_E_BIN_ECHO_E_TAB)'
+	@$(ECHO) "No usable \"echo -e\" substitute found"
+	@exit 1
+endif
+MAKEDEPS	+= .echocheck
+VERYCLEANUP	+= .echocheck
+
+echo :
+	@$(ECHO) "Using \"$(ECHO_E)\" for \"echo -e\""
+
+###############################################################################
+#
+# Generate a usable "seq" substitute
+#
+define seq
+	$(shell awk 'BEGIN { for ( i = $(1) ; i <= $(2) ; i++ ) print i }')
+endef
+
+###############################################################################
+#
+# Determine host OS
+#
+HOST_OS		:= $(shell uname -s)
+hostos :
+	@$(ECHO) $(HOST_OS)
+
+###############################################################################
+#
+# Determine compiler
+
+CCDEFS		:= $(shell $(CC) -E -x c -c /dev/null -dM | cut -d" " -f2)
+ccdefs:
+	@$(ECHO) $(CCDEFS)
+
+ifeq ($(filter __ICC,$(CCDEFS)),__ICC)
+CCTYPE		:= icc
+else
+CCTYPE		:= gcc
+endif
+cctype:
+	@$(ECHO) $(CCTYPE)
+
+###############################################################################
+#
+# Check for tools that can cause failed builds
+#
+
+ifeq ($(CCTYPE),gcc)
+GCC_2_96_BANNER := $(shell $(CC) -v 2>&1 | grep -is 'gcc version 2\.96')
+ifneq ($(GCC_2_96_BANNER),)
+$(warning gcc 2.96 is unsuitable for compiling iPXE)
+$(warning Use gcc 2.95 or a newer version instead)
+$(error Unsuitable build environment found)
+endif
+endif
+
+PERL_UNICODE_CHECK := $(shell $(PERL) -e 'use bytes; print chr(255)' | wc -c)
+ifeq ($(PERL_UNICODE_CHECK),2)
+$(warning Your Perl version has a Unicode handling bug)
+$(warning Execute this command before building iPXE:)
+$(warning export LANG=$${LANG%.UTF-8})
+$(error Unsuitable build environment found)
+endif
+
+LD_GOLD_BANNER := $(shell $(LD) -v 2>&1 | grep 'GNU gold')
+ifneq ($(LD_GOLD_BANNER),)
+$(warning GNU gold is unsuitable for building iPXE)
+$(warning Use GNU ld instead)
+$(error Unsuitable build environment found)
+endif
+
+###############################################################################
+#
+# Check for various tool workarounds
+#
+
+WORKAROUND_CFLAGS :=
+WORKAROUND_ASFLAGS :=
+WORKAROUND_LDFLAGS :=
+
+# Make syntax does not allow use of comma or space in certain places.
+# This ugly workaround is suggested in the manual.
+#
+COMMA	:= ,
+EMPTY	:=
+SPACE	:= $(EMPTY) $(EMPTY)
+
+# Check for an old version of gas (binutils 2.9.1)
+#
+OLDGAS	:= $(shell $(AS) --version | grep -q '2\.9\.1' && $(ECHO) -DGAS291)
+WORKAROUND_CFLAGS += $(OLDGAS)
+oldgas :
+	@$(ECHO) $(oldgas)
+
+# Some widespread patched versions of gcc include -fstack-protector by
+# default, even when -ffreestanding is specified.  We therefore need
+# to disable -fstack-protector if the compiler supports it.
+#
+ifeq ($(CCTYPE),gcc)
+SP_TEST = $(CC) -fno-stack-protector -x c -c /dev/null \
+		-o /dev/null >/dev/null 2>&1
+SP_FLAGS := $(shell $(SP_TEST) && $(ECHO) '-fno-stack-protector')
+WORKAROUND_CFLAGS += $(SP_FLAGS)
+endif
+
+# Some widespread patched versions of gcc include -fPIE -Wl,-pie by
+# default.  Note that gcc will exit *successfully* if it fails to
+# recognise an option that starts with "no", so we have to test for
+# output on stderr instead of checking the exit status.
+#
+ifeq ($(CCTYPE),gcc)
+PIE_TEST = [ -z "`$(CC) -fno-PIE -nopie -x c -c /dev/null -o /dev/null 2>&1`" ]
+PIE_FLAGS := $(shell $(PIE_TEST) && $(ECHO) '-fno-PIE -nopie')
+WORKAROUND_CFLAGS += $(PIE_FLAGS)
+endif
+
+# gcc 4.4 generates .eh_frame sections by default, which distort the
+# output of "size".  Inhibit this.
+#
+ifeq ($(CCTYPE),gcc)
+CFI_TEST = $(CC) -fno-dwarf2-cfi-asm -x c -c /dev/null \
+		 -o /dev/null >/dev/null 2>&1
+CFI_FLAGS := $(shell $(CFI_TEST) && $(ECHO) '-fno-dwarf2-cfi-asm')
+WORKAROUND_CFLAGS += $(CFI_FLAGS)
+endif
+
+# gcc 4.6 generates spurious warnings if -Waddress is in force.
+# Inhibit this.
+#
+ifeq ($(CCTYPE),gcc)
+WNA_TEST = $(CC) -Wno-address -x c -c /dev/null -o /dev/null >/dev/null 2>&1
+WNA_FLAGS := $(shell $(WNA_TEST) && $(ECHO) '-Wno-address')
+WORKAROUND_CFLAGS += $(WNA_FLAGS)
+endif
+
+# Some versions of gas choke on division operators, treating them as
+# comment markers.  Specifying --divide will work around this problem,
+# but isn't available on older gas versions.
+#
+DIVIDE_TEST = $(AS) --divide /dev/null -o /dev/null 2>/dev/null
+DIVIDE_FLAGS := $(shell $(DIVIDE_TEST) && $(ECHO) '--divide')
+WORKAROUND_ASFLAGS += $(DIVIDE_FLAGS)
+
+###############################################################################
+#
+# Build verbosity
+#
+ifeq ($(V),1)
+Q :=
+QM := @\#
+else
+Q := @
+QM := @
+endif
+
+###############################################################################
+#
+# Set BIN according to whatever was specified on the command line as
+# the build target.
+#
+
+# Determine how many different BIN directories are mentioned in the
+# make goals.
+#
+BIN_GOALS	:= $(filter bin/% bin-%,$(MAKECMDGOALS))
+BIN_GOALS_BINS	:= $(sort $(foreach BG,$(BIN_GOALS),\
+				    $(firstword $(subst /, ,$(BG)))))
+NUM_BINS	:= $(words $(BIN_GOALS_BINS))
+
+ifeq ($(NUM_BINS),0)
+
+# No BIN directory was specified.  Set BIN to "bin" as a sensible
+# default.
+
+BIN		:= bin
+
+else # NUM_BINS == 0
+
+ifeq ($(NUM_BINS),1)
+
+# If exactly one BIN directory was specified, set BIN to match this
+# directory.
+#
+BIN		:= $(firstword $(BIN_GOALS_BINS))
+
+else # NUM_BINS == 1
+
+# More than one BIN directory was specified.  We cannot handle the
+# latter case within a single make invocation, so set up recursive
+# targets for each BIN directory.  Use exactly one target for each BIN
+# directory since running multiple make invocations within the same
+# BIN directory is likely to cause problems.
+#
+# Leave $(BIN) undefined.  This has implications for any target that
+# depends on $(BIN); such targets should be made conditional upon the
+# existence of $(BIN).
+#
+BIN_GOALS_FIRST	:= $(foreach BGB,$(BIN_GOALS_BINS),\
+			     $(firstword $(filter $(BGB)/%,$(BIN_GOALS))))
+BIN_GOALS_OTHER	:= $(filter-out $(BIN_GOALS_FIRST),$(BIN_GOALS))
+
+$(BIN_GOALS_FIRST) : % : BIN_RECURSE
+	$(Q)$(MAKE) --no-print-directory BIN=$(firstword $(subst /, ,$@)) \
+	    $(filter $(firstword $(subst /, ,$@))/%, $(BIN_GOALS))
+$(BIN_GOALS_OTHER) : % : BIN_RECURSE
+	$(Q)$(TRUE)
+.PHONY : BIN_RECURSE
+
+endif # NUM_BINS == 1
+endif # NUM_BINS == 0
+
+ifdef BIN
+
+# Create $(BIN) directory if it doesn't exist yet
+#
+ifeq ($(wildcard $(BIN)),)
+$(shell $(MKDIR) -p $(BIN))
+endif
+
+# Target to allow e.g. "make bin-efi arch"
+#
+$(BIN) :
+	@# Do nothing, silently
+.PHONY : $(BIN)
+
+# Remove everything in $(BIN) for a "make clean"
+#
+CLEANUP	+= $(BIN)/*.* # Avoid picking up directories
+
+endif # defined(BIN)
+
+# Determine whether or not we need to include the dependency files
+#
+NO_DEP_TARGETS	:= $(BIN) clean veryclean
+ifeq ($(MAKECMDGOALS),)
+NEED_DEPS	:= 1
+endif
+ifneq ($(strip $(filter-out $(NO_DEP_TARGETS),$(MAKECMDGOALS))),)
+NEED_DEPS	:= 1
+endif
+
+###############################################################################
+#
+# Select build architecture and platform based on $(BIN)
+#
+# BIN has the form bin[-[arch-]platform]
+
+ARCHS		:= $(patsubst arch/%,%,$(wildcard arch/*))
+PLATFORMS	:= $(patsubst config/defaults/%.h,%,\
+		     $(wildcard config/defaults/*.h))
+archs :
+	@$(ECHO) $(ARCHS)
+
+platforms :
+	@$(ECHO) $(PLATFORMS)
+
+ifdef BIN
+
+# Determine architecture portion of $(BIN), if present
+BIN_ARCH	:= $(strip $(foreach A,$(ARCHS),\
+			     $(patsubst bin-$(A)-%,$(A),\
+			       $(filter bin-$(A)-%,$(BIN)))))
+
+# Determine platform portion of $(BIN), if present
+ifeq ($(BIN_ARCH),)
+BIN_PLATFORM	:= $(patsubst bin-%,%,$(filter bin-%,$(BIN)))
+else
+BIN_PLATFORM	:= $(patsubst bin-$(BIN_ARCH)-%,%,$(BIN))
+endif
+
+# Determine build architecture
+DEFAULT_ARCH	:= i386
+ARCH		:= $(firstword $(BIN_ARCH) $(DEFAULT_ARCH))
+CFLAGS		+= -DARCH=$(ARCH)
+arch :
+	@$(ECHO) $(ARCH)
+.PHONY : arch
+
+# Determine build platform
+DEFAULT_PLATFORM := pcbios
+PLATFORM	:= $(firstword $(BIN_PLATFORM) $(DEFAULT_PLATFORM))
+CFLAGS		+= -DPLATFORM=$(PLATFORM)
+platform :
+	@$(ECHO) $(PLATFORM)
+
+endif # defined(BIN)
+
+# Include architecture-specific Makefile
+ifdef ARCH
+MAKEDEPS	+= arch/$(ARCH)/Makefile
+include arch/$(ARCH)/Makefile
+endif
+
+# Include architecture-specific include path
+ifdef ARCH
+INCDIRS		+= arch/$(ARCH)/include
+INCDIRS		+= arch/$(ARCH)/include/$(PLATFORM)
+endif
+
+###############################################################################
+#
+# Source file handling
+
+# SRCDIRS lists all directories containing source files.
+srcdirs :
+	@$(ECHO) $(SRCDIRS)
+
+# SRCS lists all .c or .S files found in any SRCDIR
+#
+SRCS	+= $(wildcard $(patsubst %,%/*.c,$(SRCDIRS)))
+SRCS	+= $(wildcard $(patsubst %,%/*.S,$(SRCDIRS)))
+srcs :
+	@$(ECHO) $(SRCS)
+
+# AUTO_SRCS lists all files in SRCS that are not mentioned in
+# NON_AUTO_SRCS.  Files should be added to NON_AUTO_SRCS if they
+# cannot be built using the standard build template.
+#
+AUTO_SRCS = $(filter-out $(NON_AUTO_SRCS),$(SRCS))
+autosrcs :
+	@$(ECHO) $(AUTO_SRCS)
+
+# Just about everything else in this section depends upon having
+# $(BIN) set
+
+ifdef BIN
+
+# INCDIRS lists the include path
+incdirs :
+	@$(ECHO) $(INCDIRS)
+
+# Common flags
+#
+CFLAGS		+= $(foreach INC,$(INCDIRS),-I$(INC))
+CFLAGS		+= -Os
+CFLAGS		+= -g
+ifeq ($(CCTYPE),gcc)
+CFLAGS		+= -ffreestanding
+CFLAGS		+= -Wall -W -Wformat-nonliteral
+endif
+ifeq ($(CCTYPE),icc)
+CFLAGS		+= -fno-builtin
+CFLAGS		+= -no-ip
+CFLAGS		+= -no-gcc
+CFLAGS		+= -diag-disable 111 # Unreachable code
+CFLAGS		+= -diag-disable 128 # Unreachable loop
+CFLAGS		+= -diag-disable 170 # Array boundary checks
+CFLAGS		+= -diag-disable 177 # Unused functions
+CFLAGS		+= -diag-disable 181 # printf() format checks
+CFLAGS		+= -diag-disable 188 # enum strictness
+CFLAGS		+= -diag-disable 193 # Undefined preprocessor identifiers
+CFLAGS		+= -diag-disable 280 # switch ( constant )
+CFLAGS		+= -diag-disable 310 # K&R parameter lists
+CFLAGS		+= -diag-disable 424 # Extra semicolon
+CFLAGS		+= -diag-disable 589 # Declarations mid-code
+CFLAGS		+= -diag-disable 593 # Unused variables
+CFLAGS		+= -diag-disable 810 # Casting ints to smaller ints
+CFLAGS		+= -diag-disable 981 # Sequence point violations
+CFLAGS		+= -diag-disable 1292 # Ignored attributes
+CFLAGS		+= -diag-disable 1338 # void pointer arithmetic
+CFLAGS		+= -diag-disable 1361 # Variable-length arrays
+CFLAGS		+= -diag-disable 1418 # Missing prototypes
+CFLAGS		+= -diag-disable 1419 # Missing prototypes
+CFLAGS		+= -diag-disable 1599 # Hidden variables
+CFLAGS		+= -Wall -Wmissing-declarations
+endif
+CFLAGS		+= $(WORKAROUND_CFLAGS) $(EXTRA_CFLAGS)
+ASFLAGS		+= $(WORKAROUND_ASFLAGS) $(EXTRA_ASFLAGS)
+LDFLAGS		+= $(WORKAROUND_LDFLAGS) $(EXTRA_LDFLAGS)
+
+# Inhibit -Werror if NO_WERROR is specified on make command line
+#
+ifneq ($(NO_WERROR),1)
+CFLAGS		+= -Werror
+ASFLAGS		+= --fatal-warnings
+endif
+
+# Function trace recorder state in the last build.  This is needed
+# in order to correctly rebuild whenever the function recorder is
+# enabled/disabled.
+#
+FNREC_STATE	:= $(BIN)/.fnrec.state
+ifeq ($(wildcard $(FNREC_STATE)),)
+FNREC_OLD	:= <invalid>
+else
+FNREC_OLD	:= $(shell cat $(FNREC_STATE))
+endif
+ifeq ($(FNREC_OLD),$(FNREC))
+$(FNREC_STATE) :
+else
+$(FNREC_STATE) : clean
+$(shell $(ECHO) "$(FNREC)" > $(FNREC_STATE))
+endif
+
+VERYCLEANUP	+= $(FNREC_STATE)
+MAKEDEPS	+= $(FNREC_STATE)
+
+ifeq ($(FNREC),1)
+# Enabling -finstrument-functions affects gcc's analysis and leads to spurious
+# warnings about use of uninitialised variables.
+#
+CFLAGS		+= -Wno-uninitialized
+CFLAGS		+= -finstrument-functions
+CFLAGS		+= -finstrument-functions-exclude-file-list=core/fnrec.c
+endif
+
+# Enable per-item sections and section garbage collection.  Note that
+# some older versions of gcc support -fdata-sections but treat it as
+# implying -fno-common, which would break our build.  Some other older
+# versions issue a spurious and uninhibitable warning if
+# -ffunction-sections is used with -g, which would also break our
+# build since we use -Werror.
+#
+ifeq ($(CCTYPE),gcc)
+DS_TEST		= $(ECHO) 'char x;' | \
+		  $(CC) -fdata-sections -S -x c - -o - 2>/dev/null | \
+		  grep -E '\.comm' > /dev/null
+DS_FLAGS	:= $(shell $(DS_TEST) && $(ECHO) '-fdata-sections')
+FS_TEST		= $(CC) -ffunction-sections -g -c -x c /dev/null \
+		  -o /dev/null 2>/dev/null
+FS_FLAGS	:= $(shell $(FS_TEST) && $(ECHO) '-ffunction-sections')
+CFLAGS		+= $(FS_FLAGS) $(DS_FLAGS)
+endif
+LDFLAGS		+= --gc-sections
+
+# compiler.h is needed for our linking and debugging system
+#
+CFLAGS		+= -include compiler.h
+
+# CFLAGS for specific object types
+#
+CFLAGS_c	+=
+CFLAGS_S 	+= -DASSEMBLY
+
+# Base object name of the current target
+#
+OBJECT		= $(firstword $(subst ., ,$(@F)))
+
+# CFLAGS for specific object files.  You can define
+# e.g. CFLAGS_rtl8139, and have those flags automatically used when
+# compiling bin/rtl8139.o.
+#
+OBJ_CFLAGS	= $(CFLAGS_$(OBJECT)) -DOBJECT=$(subst -,_,$(OBJECT))
+$(BIN)/%.flags :
+	@$(ECHO) $(OBJ_CFLAGS)
+
+# ICC requires postprocessing objects to fix up table alignments
+#
+ifeq ($(CCTYPE),icc)
+POST_O		= && $(ICCFIX) $@
+POST_O_DEPS	:= $(ICCFIX)
+else
+POST_O		:=
+POST_O_DEPS	:=
+endif
+
+# Rules for specific object types.
+#
+COMPILE_c	= $(CC) $(CFLAGS) $(CFLAGS_c) $(OBJ_CFLAGS)
+RULE_c		= $(Q)$(COMPILE_c) -c $< -o $@ $(POST_O)
+RULE_c_to_dbg%.o = $(Q)$(COMPILE_c) -Ddebug_$(subst -,_,$(OBJECT))=$* -c $< -o $@ $(POST_O)
+RULE_c_to_c	= $(Q)$(COMPILE_c) -E -c $< > $@
+RULE_c_to_s	= $(Q)$(COMPILE_c) -S -g0 -c $< -o $@
+
+PREPROCESS_S	= $(CPP) $(CFLAGS) $(CFLAGS_S) $(OBJ_CFLAGS)
+ASSEMBLE_S	= $(AS) $(ASFLAGS)
+RULE_S		= $(Q)$(PREPROCESS_S) $< | $(ASSEMBLE_S) -o $@
+RULE_S_to_dbg%.o = $(Q)$(PREPROCESS_S) -Ddebug_$(subst -,_,$(OBJECT))=$* $< | $(ASSEMBLE_S) -o $@
+RULE_S_to_s	= $(Q)$(PREPROCESS_S) $< > $@
+
+DEBUG_TARGETS	+= dbg%.o c s
+
+# We automatically generate rules for any file mentioned in AUTO_SRCS
+# using the following set of templates.  It would be cleaner to use
+# $(eval ...), but this function exists only in GNU make >= 3.80.
+
+# deps_template : generate dependency list for a given source file
+#
+# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
+# $(2) is the source type (e.g. "c")
+# $(3) is the source base name (e.g. "rtl8139")
+#
+define deps_template
+	@$(ECHO) "  [DEPS] $(1)"
+	@$(MKDIR) -p $(BIN)/deps/$(dir $(1))
+	@$(CPP) $(CFLAGS) $(CFLAGS_$(2)) $(CFLAGS_$(3)) -DOBJECT=$(3) \
+		-Wno-error -M $(1) -MG -MP | \
+		sed 's/\.o\s*:/_DEPS =/' > $(BIN)/deps/$(1).d
+endef
+
+# rules_template : generate rules for a given source file
+#
+# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
+# $(2) is the source type (e.g. "c")
+# $(3) is the source base name (e.g. "rtl8139")
+#
+define rules_template
+	@$(ECHO) "  [RULES] $(1)"
+	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
+	@$(ECHO_E) '\n$$(BIN)/$(3).o :' \
+		 '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		 '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		 '\n\t$$(RULE_$(2))\n' \
+		 '\nBOBJS += $$(BIN)/$(3).o\n' \
+		 $(foreach TGT,$(DEBUG_TARGETS), \
+		    $(if $(RULE_$(2)_to_$(TGT)), \
+		    '\n$$(BIN)/$(3).$(TGT) :' \
+		    '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		    '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		    '\n\t$$(RULE_$(2)_to_$(TGT))\n' \
+		    '\n$(TGT)_OBJS += $$(BIN)/$(3).$(TGT)\n' ) ) \
+		 '\n$(BIN)/deps/$(1).d : $$($(3)_DEPS)\n' \
+		 '\nTAGS : $$($(3)_DEPS)\n' > $(BIN)/rules/$(1).r
+	@$(if $(findstring drivers/,$(1)),\
+	   $(PERL) $(PARSEROM) $(1) >> $(BIN)/rules/$(1).r)
+endef
+
+# Rule to generate the dependency list file
+#
+$(BIN)/deps/%.d : % $(MAKEDEPS)
+	$(call deps_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
+
+# Calculate and include the list of dependency list files
+#
+AUTO_DEPS	= $(patsubst %,$(BIN)/deps/%.d,$(AUTO_SRCS))
+ifdef NEED_DEPS
+ifneq ($(AUTO_DEPS),)
+-include $(AUTO_DEPS)
+endif
+endif
+autodeps :
+	@$(ECHO) $(AUTO_DEPS)
+VERYCLEANUP	+= $(BIN)/deps
+
+# Rule to generate the rules file
+#
+$(BIN)/rules/%.r : % $(MAKEDEPS) $(PARSEROM)
+	$(call rules_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
+
+# Calculate and include the list of rules files
+#
+AUTO_RULES	= $(patsubst %,$(BIN)/rules/%.r,$(AUTO_SRCS))
+ifdef NEED_DEPS
+ifneq ($(AUTO_RULES),)
+-include $(AUTO_RULES)
+endif
+endif
+autorules :
+	@$(ECHO) $(AUTO_RULES)
+VERYCLEANUP	+= $(BIN)/rules
+
+# The following variables are created by the rules files
+#
+bobjs :
+	@$(ECHO) $(BOBJS)
+drivers :
+	@$(ECHO) $(DRIVERS)
+.PHONY : drivers
+roms :
+	@$(ECHO) $(ROMS)
+
+# List of embedded images included in the last build of embedded.o.
+# This is needed in order to correctly rebuild embedded.o whenever the
+# list of objects changes.
+#
+EMBED		:= $(EMBEDDED_IMAGE) # Maintain backwards compatibility
+EMBEDDED_LIST	:= $(BIN)/.embedded.list
+ifeq ($(wildcard $(EMBEDDED_LIST)),)
+EMBED_OLD := <invalid>
+else
+EMBED_OLD := $(shell cat $(EMBEDDED_LIST))
+endif
+ifneq ($(EMBED_OLD),$(EMBED))
+$(shell $(ECHO) "$(EMBED)" > $(EMBEDDED_LIST))
+endif
+
+$(EMBEDDED_LIST) :
+
+VERYCLEANUP	+= $(EMBEDDED_LIST)
+
+EMBEDDED_FILES	:= $(subst $(COMMA), ,$(EMBED))
+EMBED_ALL	:= $(foreach i,$(call seq,1,$(words $(EMBEDDED_FILES))),\
+		     EMBED ( $(i), \"$(word $(i), $(EMBEDDED_FILES))\",\
+			     \"$(notdir $(word $(i),$(EMBEDDED_FILES)))\" ))
+
+$(BIN)/embedded.o : $(EMBEDDED_FILES) $(EMBEDDED_LIST)
+
+# This file uses .incbin inline assembly to include a binary file.
+# Unfortunately ccache does not detect this dependency and caches builds even
+# when the binary file has changed.
+#
+$(BIN)/embedded.o : override CC := env CCACHE_DISABLE=1 $(CC)
+
+CFLAGS_embedded = -DEMBED_ALL="$(EMBED_ALL)"
+
+# Generate error usage information
+#
+$(BIN)/%.einfo : $(BIN)/%.o
+	$(QM)$(ECHO) "  [EINFO] $@"
+	$(Q)$(OBJCOPY) -O binary -j .einfo --set-section-flags .einfo=alloc \
+		$< $@
+
+EINFOS		:= $(patsubst $(BIN)/%.o,$(BIN)/%.einfo,$(BOBJS))
+$(BIN)/errors : $(EINFOS) $(EINFO)
+	$(QM)$(ECHO) "  [EINFO] $@"
+	$(Q)$(EINFO) $(EINFOS) | sort > $@
+CLEANUP		+= $(BIN)/errors	# Doesn't match the $(BIN)/*.* pattern
+
+# Generate the NIC file from the parsed source files.  The NIC file is
+# only for rom-o-matic.
+#
+$(BIN)/NIC : $(AUTO_DEPS)
+	@$(ECHO) '# This is an automatically generated file, do not edit' > $@
+	@$(ECHO) '# It does not affect anything in the build, ' \
+	     'it is only for rom-o-matic' >> $@
+	@$(ECHO) >> $@
+	@perl -ne 'chomp; print "$$1\n" if /\# NIC\t(.*)$$/' $^ >> $@
+CLEANUP		+= $(BIN)/NIC	# Doesn't match the $(BIN)/*.* pattern
+
+# Analyse a target name (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and
+# derive the variables:
+# 
+# TGT_ELEMENTS : the elements of the target (e.g. "dfe538 prism2_pci")
+# TGT_PREFIX   : the prefix type (e.g. "zrom")
+# TGT_DRIVERS  : the driver for each element (e.g. "rtl8139 prism2_pci")
+# TGT_ROM_NAME : the ROM name (e.g. "dfe538")
+# TGT_MEDIA    : the media type (e.g. "rom")
+#
+DRIVERS_ipxe	= $(DRIVERS)
+CARD_DRIVER	= $(firstword $(DRIVER_$(1)) $(1))
+TGT_ELEMENTS	= $(subst --, ,$(firstword $(subst ., ,$(notdir $@))))
+TGT_PREFIX	= $(word 2,$(subst ., ,$(notdir $@)))
+TGT_ROM_NAME	= $(firstword $(TGT_ELEMENTS))
+TGT_DRIVERS	= $(strip $(if $(DRIVERS_$(TGT_ROM_NAME)), \
+			       $(DRIVERS_$(TGT_ROM_NAME)), \
+			       $(foreach TGT_ELEMENT,$(TGT_ELEMENTS), \
+			         $(call CARD_DRIVER,$(TGT_ELEMENT))) ))
+TGT_MEDIA	= $(subst z,,$(TGT_PREFIX))
+
+# Look up ROM IDs for the current target
+# (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the variables:
+#
+# TGT_PCI_VENDOR : the PCI vendor ID (e.g. "0x1186")
+# TGT_PCI_DEVICE : the PCI device ID (e.g. "0x1300")
+#
+TGT_PCI_VENDOR	= $(PCI_VENDOR_$(TGT_ROM_NAME))
+TGT_PCI_DEVICE	= $(PCI_DEVICE_$(TGT_ROM_NAME))
+
+# Calculate link-time options for the current target
+# (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the variables:
+#
+# TGT_LD_DRIVERS : symbols to require in order to drag in the relevant drivers
+#		   (e.g. "obj_rtl8139 obj_prism2_pci")
+# TGT_LD_IDS :     symbols to define in order to fill in ID structures in the
+#		   ROM header (e.g."pci_vendor_id=0x1186 pci_device_id=0x1300")
+#
+TGT_LD_DRIVERS	= $(subst -,_,$(patsubst %,obj_%,$(TGT_DRIVERS)))
+TGT_LD_IDS	= pci_vendor_id=$(firstword $(TGT_PCI_VENDOR) 0) \
+		  pci_device_id=$(firstword $(TGT_PCI_DEVICE) 0)
+TGT_LD_ENTRY	= _$(TGT_PREFIX)_start
+
+# Calculate linker flags based on link-time options for the current
+# target type (e.g. "bin/dfe538--prism2_pci.zrom.tmp") and derive the
+# variables:
+#
+# TGT_LD_FLAGS : target-specific flags to pass to linker (e.g.
+#		 "-u obj_zpciprefix -u obj_rtl8139 -u obj_prism2_pci
+#		  --defsym pci_vendor=0x1186 --defsym pci_device=0x1300")
+#
+TGT_LD_FLAGS	= $(foreach SYM,$(TGT_LD_ENTRY) $(TGT_LD_DRIVERS) obj_config,\
+		    -u $(SYM) --defsym check_$(SYM)=$(SYM) ) \
+		  $(patsubst %,--defsym %,$(TGT_LD_IDS)) \
+		  -e $(TGT_LD_ENTRY)
+
+# Calculate list of debugging versions of objects to be included in
+# the target.
+#
+DEBUG_LIST	= $(subst $(COMMA), ,$(DEBUG))
+DEBUG_OBJ_LEVEL	= $(firstword $(word 2,$(subst :, ,$(1))) 1)
+DEBUG_OBJ_BASE	= $(word 1,$(subst :, ,$(1))).dbg$(call DEBUG_OBJ_LEVEL,$(1))
+DEBUG_OBJ	= $(BIN)/$(call DEBUG_OBJ_BASE,$(1)).o
+DEBUG_ORIG_OBJ	= $(BIN)/$(word 1,$(subst :, ,$(1))).o
+DEBUG_OBJS	= $(foreach D,$(DEBUG_LIST),$(call DEBUG_OBJ,$(D)))
+DEBUG_ORIG_OBJS	= $(foreach D,$(DEBUG_LIST),$(call DEBUG_ORIG_OBJ,$(D)))
+BLIB_OBJS	= $(DEBUG_OBJS) $(filter-out $(DEBUG_ORIG_OBJS),$(BOBJS))
+
+# Print out all derived information for a given target.
+#
+$(BIN)/%.info :
+	@$(ECHO) 'Elements             : $(TGT_ELEMENTS)'
+	@$(ECHO) 'Prefix               : $(TGT_PREFIX)'
+	@$(ECHO) 'Drivers              : $(TGT_DRIVERS)'
+	@$(ECHO) 'ROM name             : $(TGT_ROM_NAME)'
+	@$(ECHO) 'Media                : $(TGT_MEDIA)'
+	@$(ECHO)
+	@$(ECHO) 'PCI vendor           : $(TGT_PCI_VENDOR)'
+	@$(ECHO) 'PCI device           : $(TGT_PCI_DEVICE)'
+	@$(ECHO)
+	@$(ECHO) 'LD driver symbols    : $(TGT_LD_DRIVERS)'
+	@$(ECHO) 'LD ID symbols        : $(TGT_LD_IDS)'
+	@$(ECHO) 'LD entry point       : $(TGT_LD_ENTRY)'
+	@$(ECHO)
+	@$(ECHO) 'LD target flags      : $(TGT_LD_FLAGS)'
+	@$(ECHO)
+	@$(ECHO) 'Debugging objects    : $(DEBUG_OBJS)'
+	@$(ECHO) 'Replaced objects     : $(DEBUG_ORIG_OBJS)'
+
+# List of objects included in the last build of blib.  This is needed
+# in order to correctly rebuild blib whenever the list of objects
+# changes.
+#
+BLIB_LIST	:= $(BIN)/.blib.list
+ifeq ($(wildcard $(BLIB_LIST)),)
+BLIB_OBJS_OLD	:= <invalid>
+else
+BLIB_OBJS_OLD	:= $(shell cat $(BLIB_LIST))
+endif
+ifneq ($(BLIB_OBJS_OLD),$(BLIB_OBJS))
+$(shell $(ECHO) "$(BLIB_OBJS)" > $(BLIB_LIST))
+endif
+
+$(BLIB_LIST) :
+
+VERYCLEANUP	+= $(BLIB_LIST)
+
+# Library of all objects
+#
+BLIB		= $(BIN)/blib.a
+$(BLIB) : $(BLIB_OBJS) $(BLIB_LIST) $(MAKEDEPS)
+	$(Q)$(RM) $(BLIB)
+	$(QM)$(ECHO) "  [AR] $@"
+	$(Q)$(AR) r $@ $(BLIB_OBJS)
+	$(Q)$(RANLIB) $@
+blib : $(BLIB)
+
+# Command to generate build ID.  Must be unique for each $(BIN)/%.tmp,
+# even within the same build run.
+#
+BUILD_ID_CMD	:= perl -e 'printf "0x%08x", int ( rand ( 0xffffffff ) );'
+
+# Build an intermediate object file from the objects required for the
+# specified target.
+#
+$(BIN)/%.tmp : $(BLIB) $(MAKEDEPS) $(LDSCRIPT)
+	$(QM)$(ECHO) "  [LD] $@"
+	$(Q)$(LD) $(LDFLAGS) -T $(LDSCRIPT) $(TGT_LD_FLAGS) $(BLIB) -o $@ \
+		--defsym _build_id=`$(BUILD_ID_CMD)` -Map $(BIN)/$*.tmp.map
+	$(Q)$(OBJDUMP) -ht $@ | $(PERL) $(SORTOBJDUMP) >> $(BIN)/$*.tmp.map
+
+# Keep intermediate object file (useful for debugging)
+.PRECIOUS : $(BIN)/%.tmp
+
+# Show a linker map for the specified target
+#
+$(BIN)/%.map : $(BIN)/%.tmp
+	@less $(BIN)/$*.tmp.map
+
+# Get objects list for the specified target
+#
+define objs_list
+	$(sort $(foreach OBJ_SYMBOL,\
+		 $(filter obj_%,$(shell $(NM) $(1) | cut -d" " -f3)),\
+		 $(patsubst obj_%,%,$(OBJ_SYMBOL))))
+endef
+$(BIN)/%.objs : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call objs_list,$<)
+$(BIN)/%.sizes : $(BIN)/%.tmp
+	$(Q)$(SIZE) -t $(foreach OBJ,$(call objs_list,$<),$(wildcard $(BIN)/$(subst _,?,$(OBJ)).o)) | \
+		sort -g
+
+# Get dependency list for the specified target
+#
+define deps_list
+	$(sort $(foreach OBJ,$(call objs_list,$(1)),$($(OBJ)_DEPS)))
+endef
+$(BIN)/%.deps : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call deps_list,$<)
+
+# Get unneeded source files for the specified target
+#
+define nodeps_list
+	$(sort $(filter-out $(call deps_list,$(1)),\
+		 $(foreach BOBJ,$(BOBJS),\
+		   $($(basename $(notdir $(BOBJ)))_DEPS))))
+endef
+$(BIN)/%.nodeps : $(BIN)/%.tmp
+	$(Q)$(ECHO) $(call nodeps_list,$<)
+
+# Get licensing verdict for the specified target
+#
+define licensable_deps_list
+	$(filter-out config/local/%.h,$(call deps_list,$(1)))
+endef
+define unlicensed_deps_list
+	$(shell grep -L FILE_LICENCE $(call licensable_deps_list,$(1)))
+endef
+define licence_list
+	$(patsubst __licence_%,%,\
+	  $(filter __licence_%,$(shell $(NM) $(1) | cut -d" " -f3)))
+endef
+$(BIN)/%.licence : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [LICENCE] $@"
+	$(Q)$(if $(strip $(call unlicensed_deps_list,$<)),\
+		echo -n "Unable to determine licence because the following " ;\
+		echo "files are missing a licence declaration:" ;\
+		echo $(call unlicensed_deps_list,$<);\
+		exit 1,\
+		$(PERL) $(LICENCE) $(call licence_list,$<))
+
+# Extract compression information from intermediate object file
+#
+$(BIN)/%.zinfo : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [ZINFO] $@"
+	$(Q)$(OBJCOPY) -O binary -j .zinfo $< $@
+
+# Build raw binary file from intermediate object file
+#
+$(BIN)/%.bin : $(BIN)/%.tmp
+	$(QM)$(ECHO) "  [BIN] $@"
+	$(Q)$(OBJCOPY) -O binary -R .zinfo $< $@
+
+# Compress raw binary file
+#
+$(BIN)/%.zbin : $(BIN)/%.bin $(BIN)/%.zinfo $(ZBIN)
+	$(QM)$(ECHO) "  [ZBIN] $@"
+	$(Q)$(ZBIN) $(BIN)/$*.bin $(BIN)/$*.zinfo > $@
+
+# Rules for each media format.  These are generated and placed in an
+# external Makefile fragment.  We could do this via $(eval ...), but
+# that would require make >= 3.80.
+# 
+# Note that there's an alternative way to generate most .rom images:
+# they can be copied from their 'master' ROM image using cp and
+# reprocessed with makerom to add the PCI IDs and ident string.  The
+# relevant rule would look something like:
+#
+#   $(BIN)/dfe538%rom : $(BIN)/rtl8139%rom
+#	cat $< $@
+#	$(FINALISE_rom)
+# 
+# You can derive the ROM/driver relationships using the variables
+# DRIVER_<rom> and/or ROMS_<driver>.
+# 
+# We don't currently do this, because (a) it would require generating
+# yet more Makefile fragments (since you need a rule for each ROM in
+# ROMS), and (b) the linker is so fast that it probably wouldn't make
+# much difference to the overall build time.
+
+# Add NON_AUTO_MEDIA to the media list, so that they show up in the
+# output of "make"
+#
+MEDIA		+= $(NON_AUTO_MEDIA)
+
+media :
+	@$(ECHO) $(MEDIA)
+
+AUTO_MEDIA	= $(filter-out $(NON_AUTO_MEDIA),$(MEDIA))
+automedia :
+	@$(ECHO) $(AUTO_MEDIA)
+
+# media_template : create Makefile rules for specified media
+#
+# $(1) is the media name (e.g. "rom")
+#
+define media_template
+	@$(ECHO) "  [MEDIARULES] $(1)"
+	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
+	@$(ECHO_E) '$$(BIN)/%.$(1) : $$(BIN)/%.$(1).zbin' \
+		  '\n\t$$(QM)$(ECHO) "  [FINISH] $$@"' \
+		  '\n\t$$(Q)$$(CP) $$< $$@' \
+		  '\n\t$$(Q)$$(PAD_$(1))' \
+		  '\n\t$$(Q)$$(FINALISE_$(1))' \
+		> $(BIN)/rules/$(1).media.r
+endef
+
+# Rule to generate the Makefile rules to be included
+#
+$(BIN)/rules/%.media.r : $(MAKEDEPS)
+	$(call media_template,$*)
+
+# Calculate and include the list of Makefile rules files
+#
+MEDIA_RULES		= $(patsubst %,$(BIN)/rules/%.media.r,$(AUTO_MEDIA))
+mediarules :
+	@$(ECHO) $(MEDIA_RULES)
+ifdef NEED_DEPS
+ifneq ($(MEDIA_RULES),)
+-include $(MEDIA_RULES)
+endif
+endif
+
+# Wrap up binary blobs (for embedded images)
+#
+$(BIN)/%.o : payload/%.img
+	$(QM)echo "  [WRAP] $@"
+	$(Q)$(LD) -b binary -r -o $@ $< --undefined obj_payload \
+		--defsym obj_$*=0
+
+BOBJS += $(patsubst payload/%.img,$(BIN)/%.o,$(wildcard payload/*.img))
+
+# The "allXXXs" targets for each suffix
+#
+allall: allroms allmroms allpxes allisos alldsks
+allroms allmroms : all%s : $(foreach ROM,$(ROMS),$(BIN)/$(ROM).%)
+allbaseroms allbasemroms : allbase%s : $(foreach ROM,$(DRIVERS),$(BIN)/$(ROM).%)
+allpxes allisos alldsks : all%s : $(foreach DRIVER,$(DRIVERS),$(BIN)/$(DRIVER).%)
+
+# Alias for ipxe.%
+#
+$(BIN)/etherboot.% : $(BIN)/ipxe.%
+	ln -sf $(notdir $<) $@
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# The compression utilities
+#
+$(NRV2B) : util/nrv2b.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG \
+		       -DBITSIZE=32 -DENDIAN=0 -o $@ $<
+CLEANUP	+= $(NRV2B)
+
+$(ZBIN) : util/zbin.c util/nrv2b.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -O2 -o $@ $<
+CLEANUP += $(ZBIN)
+
+###############################################################################
+#
+# The EFI image converter
+#
+ELF2EFI_CFLAGS	:= -I$(BINUTILS_DIR)/include -I$(BFD_DIR)/include \
+		   -I$(ZLIB_DIR)/include -idirafter include \
+		   -L$(BINUTILS_DIR)/lib -L$(BFD_DIR)/lib -L$(ZLIB_DIR)/lib \
+		   -lbfd -ldl -liberty -lz -Wl,--no-warn-search-mismatch
+
+$(ELF2EFI32) : util/elf2efi.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_IA32 -O2 -o $@
+CLEANUP += $(ELF2EFI32)
+
+$(ELF2EFI64) : util/elf2efi.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_X64 -O2 -o $@
+CLEANUP += $(ELF2EFI64)
+
+$(EFIROM) : util/efirom.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(EFIROM)
+
+###############################################################################
+#
+# The ICC fixup utility
+#
+$(ICCFIX) : util/iccfix.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(ICCFIX)
+
+###############################################################################
+#
+# The error usage information utility
+#
+$(EINFO) : util/einfo.c $(MAKEDEPS)
+	$(QM)$(ECHO) "  [HOSTCC] $@"
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
+CLEANUP += $(EINFO)
+
+###############################################################################
+#
+# Local configs
+#
+config/local/%.h :
+	$(Q)touch $@
+
+###############################################################################
+#
+# Auto-incrementing build serial number.  Append "bs" to your list of
+# build targets to get a serial number printed at the end of the
+# build.  Enable -DBUILD_SERIAL in order to see it when the code runs.
+#
+BUILDSERIAL_H		= config/.buildserial.h
+BUILDSERIAL_NOW		= config/.buildserial.now
+BUILDSERIAL_NEXT	= config/.buildserial.next
+
+$(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT) :
+	$(ECHO) 1 > $@
+
+$(BUILDSERIAL_H) : $(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT)
+	$(ECHO) '#define BUILD_SERIAL_NUM $(shell cat $<)' > $@
+
+ifeq ($(filter bs,$(MAKECMDGOALS)),bs)
+$(shell diff -q $(BUILDSERIAL_NOW) $(BUILDSERIAL_NEXT) > /dev/null || \
+	cp -f $(BUILDSERIAL_NEXT) $(BUILDSERIAL_NOW))
+endif
+
+bs : $(BUILDSERIAL_NOW)
+	@$(ECHO) $$(( $(shell cat $<) + 1 )) > $(BUILDSERIAL_NEXT)
+	@$(ECHO) "Build serial number is $(shell cat $<)"
+
+###############################################################################
+#
+# Build the TAGS file(s) for emacs
+#
+TAGS :
+	ctags -e -R -f $@ --exclude=bin
+
+CLEANUP	+= TAGS
+
+###############################################################################
+#
+# Force rebuild for any given target
+#
+%.rebuild :
+	rm -f $*
+	$(Q)$(MAKE) $*
+
+###############################################################################
+#
+# Symbol table checks
+#
+
+ifdef BIN
+
+SYMTAB	= $(BIN)/symtab
+$(SYMTAB) : $(BLIB)
+	$(OBJDUMP) -w -t $< > $@
+
+CLEANUP	+= $(BIN)/symtab
+
+symcheck : $(SYMTAB)
+	$(PERL) $(SYMCHECK) $<
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Build bochs symbol table
+#
+
+ifdef BIN
+
+$(BIN)/%.bxs : $(BIN)/%.tmp
+	$(NM) $< | cut -d" " -f1,3 > $@
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Documentation
+#
+
+ifdef BIN
+
+$(BIN)/doxygen.cfg : doxygen.cfg $(MAKEDEPS)
+	$(Q)$(PERL) -pe 's{\@SRCDIRS\@}{$(SRCDIRS)}; ' \
+		-e  's{\@INCDIRS\@}{$(filter-out .,$(INCDIRS))}; ' \
+		-e  's{\@BIN\@}{$(BIN)}; ' \
+		-e  's{\@ARCH\@}{$(ARCH)}; ' \
+		$< > $@
+
+$(BIN)/doc : $(BIN)/doxygen.cfg
+	$(Q)$(DOXYGEN) $<
+
+.PHONY : $(BIN)/doc
+
+doc : $(BIN)/doc
+
+doc-clean :
+	$(Q)$(RM) -r $(BIN)/doc
+
+VERYCLEANUP	+= $(BIN)/doc
+
+docview :
+	@[ -f $(BIN)/doc/html/index.html ] || $(MAKE) $(BIN)/doc
+	@if [ -n "$$BROWSER" ] ; then \
+		( $$BROWSER $(BIN)/doc/html/index.html & ) ; \
+	else \
+		$(ECHO) "Documentation index in $(BIN)/doc/html/index.html" ; \
+	fi
+
+endif # defined(BIN)
+
+###############################################################################
+#
+# Keyboard maps
+#
+
+hci/keymap/keymap_%.c :
+	$(Q)$(PERL) $(GENKEYMAP) $* > $@
+
+###############################################################################
+#
+# Force deletion of incomplete targets
+#
+
+.DELETE_ON_ERROR :
+
+###############################################################################
+#
+# Clean-up
+#
+clean :
+	$(RM) $(CLEANUP)
+
+veryclean : clean
+	$(RM) -r $(VERYCLEANUP)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/.quilt_patches ipxe-1.0.1~lliurex1505/.pc/.quilt_patches
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/.quilt_patches	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/.quilt_patches	2015-04-14 12:54:27.000000000 +0000
@@ -0,0 +1 @@
+debian/patches
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/.quilt_series ipxe-1.0.1~lliurex1505/.pc/.quilt_series
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/.quilt_series	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/.quilt_series	2015-04-14 12:54:27.000000000 +0000
@@ -0,0 +1 @@
+series
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/.pc/.version ipxe-1.0.1~lliurex1505/.pc/.version
--- ipxe-1.0.0+git-20131111.c3d1e78/.pc/.version	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/.pc/.version	2015-04-14 12:54:27.000000000 +0000
@@ -0,0 +1 @@
+2
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/aout_loader.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/aout_loader.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/aout_loader.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/aout_loader.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,144 @@
+/* a.out */
+struct exec {
+	unsigned long      a_midmag;	/* flags<<26 | mid<<16 | magic */
+	unsigned long      a_text;	/* text segment size */
+	unsigned long      a_data;	/* initialized data size */
+	unsigned long      a_bss;	/* uninitialized data size */
+	unsigned long      a_syms;	/* symbol table size */
+	unsigned long      a_entry;	/* entry point */
+	unsigned long      a_trsize;	/* text relocation size */
+	unsigned long      a_drsize;	/* data relocation size */
+};
+
+struct aout_state {
+	struct exec head;
+	unsigned long curaddr;
+	int segment;			/* current segment number, -1 for none */
+	unsigned long loc;		/* start offset of current block */
+	unsigned long skip;		/* padding to be skipped to current segment */
+	unsigned long toread;		/* remaining data to be read in the segment */
+};
+
+static struct aout_state astate;
+
+static sector_t aout_download(unsigned char *data, unsigned int len, int eof);
+static inline os_download_t aout_probe(unsigned char *data, unsigned int len)
+{
+	unsigned long start, mid, end, istart, iend;
+	if (len < sizeof(astate.head)) {
+		return 0;
+	}
+	memcpy(&astate.head, data, sizeof(astate.head));
+	if ((astate.head.a_midmag & 0xffff) != 0x010BL) {
+		return 0;
+	}
+	
+	printf("(a.out");
+	aout_freebsd_probe();
+	printf(")... ");
+	/* Check the aout image */
+	start  = astate.head.a_entry;
+	mid    = (((start + astate.head.a_text) + 4095) & ~4095) + astate.head.a_data;
+	end    = ((mid + 4095) & ~4095) + astate.head.a_bss;
+	istart = 4096;
+	iend   = istart + (mid - start);
+	if (!prep_segment(start, mid, end, istart, iend))
+		return dead_download;
+	astate.segment = -1;
+	astate.loc = 0;
+	astate.skip = 0;
+	astate.toread = 0;
+	return aout_download;
+}
+
+static sector_t aout_download(unsigned char *data, unsigned int len, int eof)
+{
+	unsigned int offset;	/* working offset in the current data block */
+
+	offset = 0;
+
+#ifdef AOUT_LYNX_KDI
+	astate.segment++;
+	if (astate.segment == 0) {
+		astate.curaddr = 0x100000;
+		astate.head.a_entry = astate.curaddr + 0x20;
+	}
+	memcpy(phys_to_virt(astate.curaddr), data, len);
+	astate.curaddr += len;
+	return 0;
+#endif
+
+	do {
+		if (astate.segment != -1) {
+			if (astate.skip) {
+				if (astate.skip >= len - offset) {
+					astate.skip -= len - offset;
+					break;
+				}
+				offset += astate.skip;
+				astate.skip = 0;
+			}
+
+			if (astate.toread) {
+				if (astate.toread >= len - offset) {
+					memcpy(phys_to_virt(astate.curaddr), data+offset,
+						len - offset);
+					astate.curaddr += len - offset;
+					astate.toread -= len - offset;
+					break;
+				}
+				memcpy(phys_to_virt(astate.curaddr), data+offset, astate.toread);
+				offset += astate.toread;
+				astate.toread = 0;
+			}
+		}
+
+		/* Data left, but current segment finished - look for the next
+		 * segment.  This is quite simple for a.out files.  */
+		astate.segment++;
+		switch (astate.segment) {
+		case 0:
+			/* read text */
+			astate.curaddr = astate.head.a_entry;
+			astate.skip = 4096;
+			astate.toread = astate.head.a_text;
+			break;
+		case 1:
+			/* read data */
+			/* skip and curaddr may be wrong, but I couldn't find
+			 * examples where this failed.  There is no reasonable
+			 * documentation for a.out available.  */
+			astate.skip = ((astate.curaddr + 4095) & ~4095) - astate.curaddr;
+			astate.curaddr = (astate.curaddr + 4095) & ~4095;
+			astate.toread = astate.head.a_data;
+			break;
+		case 2:
+			/* initialize bss and start kernel */
+			astate.curaddr = (astate.curaddr + 4095) & ~4095;
+			astate.skip = 0;
+			astate.toread = 0;
+			memset(phys_to_virt(astate.curaddr), '\0', astate.head.a_bss);
+			goto aout_startkernel;
+		default:
+			break;
+		}
+	} while (offset < len);
+
+	astate.loc += len;
+
+	if (eof) {
+		unsigned long entry;
+
+aout_startkernel:
+		entry = astate.head.a_entry;
+		done(1);
+
+		aout_freebsd_boot();
+#ifdef AOUT_LYNX_KDI
+		xstart32(entry);
+#endif
+		printf("unexpected a.out variant\n");
+		longjmp(restart_etherboot, -2);
+	}
+	return 0;
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/basemem_packet.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/basemem_packet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/basemem_packet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/basemem_packet.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/cachedhcp.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/cachedhcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/cachedhcp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/cachedhcp.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,171 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <ipxe/dhcppkt.h>
-#include <ipxe/init.h>
-#include <ipxe/netdevice.h>
-#include <realmode.h>
-#include <pxe_api.h>
-
-/** @file
- *
- * Cached DHCP packet
- *
- */
-
-/** Cached DHCPACK physical address
- *
- * This can be set by the prefix.
- */
-uint32_t __bss16 ( cached_dhcpack_phys );
-#define cached_dhcpack_phys __use_data16 ( cached_dhcpack_phys )
-
-/** Colour for debug messages */
-#define colour &cached_dhcpack_phys
-
-/** Cached DHCPACK */
-static struct dhcp_packet *cached_dhcpack;
-
-/**
- * Cached DHCPACK startup function
- *
- */
-static void cachedhcp_init ( void ) {
-	struct dhcp_packet *dhcppkt;
-	struct dhcp_packet *tmp;
-	struct dhcphdr *dhcphdr;
-	size_t len;
-
-	/* Do nothing if no cached DHCPACK is present */
-	if ( ! cached_dhcpack_phys ) {
-		DBGC ( colour, "CACHEDHCP found no cached DHCPACK\n" );
-		return;
-	}
-
-	/* No reliable way to determine length before parsing packet;
-	 * start by assuming maximum length permitted by PXE.
-	 */
-	len = sizeof ( BOOTPLAYER_t );
-
-	/* Allocate and populate DHCP packet */
-	dhcppkt = zalloc ( sizeof ( *dhcppkt ) + len );
-	if ( ! dhcppkt ) {
-		DBGC ( colour, "CACHEDHCP could not allocate copy\n" );
-		return;
-	}
-	dhcphdr = ( ( ( void * ) dhcppkt ) + sizeof ( *dhcppkt ) );
-	copy_from_user ( dhcphdr, phys_to_user ( cached_dhcpack_phys ), 0,
-			 len );
-	dhcppkt_init ( dhcppkt, dhcphdr, len );
-
-	/* Resize packet to required length.  If reallocation fails,
-	 * just continue to use the original packet.
-	 */
-	len = dhcppkt_len ( dhcppkt );
-	tmp = realloc ( dhcppkt, ( sizeof ( *dhcppkt ) + len ) );
-	if ( tmp )
-		dhcppkt = tmp;
-
-	/* Reinitialise packet at new address */
-	dhcphdr = ( ( ( void * ) dhcppkt ) + sizeof ( *dhcppkt ) );
-	dhcppkt_init ( dhcppkt, dhcphdr, len );
-
-	/* Store as cached DHCPACK, and mark original copy as consumed */
-	DBGC ( colour, "CACHEDHCP found cached DHCPACK at %08x+%zx\n",
-	       cached_dhcpack_phys, len );
-	cached_dhcpack = dhcppkt;
-	cached_dhcpack_phys = 0;
-}
-
-/**
- * Cached DHCPACK startup function
- *
- */
-static void cachedhcp_startup ( void ) {
-
-	/* If cached DHCP packet was not claimed by any network device
-	 * during startup, then free it.
-	 */
-	if ( cached_dhcpack ) {
-		DBGC ( colour, "CACHEDHCP freeing unclaimed cached DHCPACK\n" );
-		dhcppkt_put ( cached_dhcpack );
-		cached_dhcpack = NULL;
-	}
-}
-
-/** Cached DHCPACK initialisation function */
-struct init_fn cachedhcp_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = cachedhcp_init,
-};
-
-/** Cached DHCPACK startup function */
-struct startup_fn cachedhcp_startup_fn __startup_fn ( STARTUP_LATE ) = {
-	.startup = cachedhcp_startup,
-};
-
-/**
- * Apply cached DHCPACK to network device, if applicable
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int cachedhcp_probe ( struct net_device *netdev ) {
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	int rc;
-
-	/* Do nothing unless we have a cached DHCPACK */
-	if ( ! cached_dhcpack )
-		return 0;
-
-	/* Do nothing unless cached DHCPACK's MAC address matches this
-	 * network device.
-	 */
-	if ( memcmp ( netdev->ll_addr, cached_dhcpack->dhcphdr->chaddr,
-		      ll_protocol->ll_addr_len ) != 0 ) {
-		DBGC ( colour, "CACHEDHCP cached DHCPACK does not match %s\n",
-		       netdev->name );
-		return 0;
-	}
-	DBGC ( colour, "CACHEDHCP cached DHCPACK is for %s\n", netdev->name );
-
-	/* Register as DHCP settings for this network device */
-	if ( ( rc = register_settings ( &cached_dhcpack->settings,
-					netdev_settings ( netdev ),
-					DHCP_SETTINGS_NAME ) ) != 0 ) {
-		DBGC ( colour, "CACHEDHCP could not register settings: %s\n",
-		       strerror ( rc ) );
-		return rc;
-	}
-
-	/* Claim cached DHCPACK */
-	dhcppkt_put ( cached_dhcpack );
-	cached_dhcpack = NULL;
-
-	return 0;
-}
-
-/** Cached DHCP packet network device driver */
-struct net_driver cachedhcp_driver __net_driver = {
-	.name = "cachedhcp",
-	.probe = cachedhcp_probe,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/cpu.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/cpu.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/cpu.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/cpu.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,73 @@
+#include <stdint.h>
+#include <string.h>
+#include <cpu.h>
+
+/** @file
+ *
+ * CPU identification
+ *
+ */
+
+/**
+ * Test to see if CPU flag is changeable
+ *
+ * @v flag		Flag to test
+ * @ret can_change	Flag is changeable
+ */
+static inline int flag_is_changeable ( unsigned int flag ) {
+	uint32_t f1, f2;
+
+	__asm__ ( "pushfl\n\t"
+		  "pushfl\n\t"
+		  "popl %0\n\t"
+		  "movl %0,%1\n\t"
+		  "xorl %2,%0\n\t"
+		  "pushl %0\n\t"
+		  "popfl\n\t"
+		  "pushfl\n\t"
+		  "popl %0\n\t"
+		  "popfl\n\t"
+		  : "=&r" ( f1 ), "=&r" ( f2 )
+		  : "ir" ( flag ) );
+
+	return ( ( ( f1 ^ f2 ) & flag ) != 0 );
+}
+
+/**
+ * Get CPU information
+ *
+ * @v cpu		CPU information structure to fill in
+ */
+void get_cpuinfo ( struct cpuinfo_x86 *cpu ) {
+	unsigned int cpuid_level;
+	unsigned int cpuid_extlevel;
+	unsigned int discard_1, discard_2, discard_3;
+
+	memset ( cpu, 0, sizeof ( *cpu ) );
+
+	/* Check for CPUID instruction */
+	if ( ! flag_is_changeable ( X86_EFLAGS_ID ) ) {
+		DBG ( "CPUID not supported\n" );
+		return;
+	}
+
+	/* Get features, if present */
+	cpuid ( 0x00000000, &cpuid_level, &discard_1,
+		&discard_2, &discard_3 );
+	if ( cpuid_level >= 0x00000001 ) {
+		cpuid ( 0x00000001, &discard_1, &discard_2,
+			&discard_3, &cpu->features );
+	} else {
+		DBG ( "CPUID cannot return capabilities\n" );
+	}
+
+	/* Get 64-bit features, if present */
+	cpuid ( 0x80000000, &cpuid_extlevel, &discard_1,
+		&discard_2, &discard_3 );
+	if ( ( cpuid_extlevel & 0xffff0000 ) == 0x80000000 ) {
+		if ( cpuid_extlevel >= 0x80000001 ) {
+			cpuid ( 0x80000001, &discard_1, &discard_2,
+				&discard_3, &cpu->amd_features );
+		}
+	}
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/freebsd_loader.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/freebsd_loader.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/freebsd_loader.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/freebsd_loader.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,377 @@
+/* bootinfo */
+#define BOOTINFO_VERSION 1
+#define NODEV           (-1)    /* non-existent device */
+#define PAGE_SHIFT      12              /* LOG2(PAGE_SIZE) */
+#define PAGE_SIZE       (1<<PAGE_SHIFT) /* bytes/page */
+#define PAGE_MASK       (PAGE_SIZE-1)
+#define N_BIOS_GEOM     8
+
+struct bootinfo {
+        unsigned int            bi_version;
+        const unsigned char     *bi_kernelname;
+        struct nfs_diskless     *bi_nfs_diskless;
+                                /* End of fields that are always present. */
+#define bi_endcommon            bi_n_bios_used
+        unsigned int            bi_n_bios_used;
+        unsigned long           bi_bios_geom[N_BIOS_GEOM];
+        unsigned int            bi_size;
+        unsigned char           bi_memsizes_valid;
+        unsigned char           bi_pad[3];
+        unsigned long           bi_basemem;
+        unsigned long           bi_extmem;
+        unsigned long           bi_symtab;
+        unsigned long           bi_esymtab;
+	/* Note that these are in the FreeBSD headers but were not here... */
+	unsigned long           bi_kernend;		/* end of kernel space */
+	unsigned long           bi_envp;		/* environment */
+	unsigned long           bi_modulep;		/* preloaded modules */
+};
+
+static struct bootinfo bsdinfo;
+
+#ifdef ELF_IMAGE
+static Elf32_Shdr *shdr;	/* To support the FreeBSD kludge! */
+static Address symtab_load;
+static Address symstr_load;
+static int symtabindex;
+static int symstrindex;
+#endif
+
+static enum {
+	Unknown, Tagged, Aout, Elf, Aout_FreeBSD, Elf_FreeBSD,
+} image_type = Unknown;
+
+static unsigned int off;
+
+
+#ifdef ELF_IMAGE
+static void elf_freebsd_probe(void)
+{
+	image_type = Elf;
+	if (	(estate.e.elf32.e_entry & 0xf0000000) && 
+		(estate.e.elf32.e_type == ET_EXEC))
+	{
+		image_type = Elf_FreeBSD;
+		printf("/FreeBSD");
+		off = -(estate.e.elf32.e_entry & 0xff000000);
+		estate.e.elf32.e_entry += off;
+	}
+	/* Make sure we have a null to start with... */
+	shdr = 0;
+	
+	/* Clear the symbol index values... */
+	symtabindex = -1;
+	symstrindex = -1;
+	
+	/* ...and the load addresses of the symbols  */
+	symtab_load = 0;
+	symstr_load = 0;
+}
+
+static void elf_freebsd_fixup_segment(void)
+{
+	if (image_type == Elf_FreeBSD) {
+		estate.p.phdr32[estate.segment].p_paddr += off;
+	}
+}
+
+static void elf_freebsd_find_segment_end(void)
+{
+	/* Count the bytes read even for the last block
+	 * as we will need to know where the last block
+	 * ends in order to load the symbols correctly.
+	 * (plus it could be useful elsewhere...)
+	 * Note that we need to count the actual size,
+	 * not just the end of the disk image size.
+	 */
+	estate.curaddr += 
+		(estate.p.phdr32[estate.segment].p_memsz - 
+		estate.p.phdr32[estate.segment].p_filesz);
+}
+
+static int elf_freebsd_debug_loader(unsigned int offset)
+{
+	/* No more segments to be loaded - time to start the
+	 * nasty state machine to support the loading of
+	 * FreeBSD debug symbols due to the fact that FreeBSD
+	 * uses/exports the kernel's debug symbols in order
+	 * to make much of the system work!  Amazing (arg!)
+	 *
+	 * We depend on the fact that for the FreeBSD kernel,
+	 * there is only one section of debug symbols and that
+	 * the section is after all of the loaded sections in
+	 * the file.  This assumes a lot but is somewhat required
+	 * to make this code not be too annoying.  (Where do you
+	 * load symbols when the code has not loaded yet?)
+	 * Since this function is actually just a callback from
+	 * the network data transfer code, we need to be able to
+	 * work with the data as it comes in.  There is no chance
+	 * for doing a seek other than forwards.
+	 *
+	 * The process we use is to first load the section
+	 * headers.  Once they are loaded (shdr != 0) we then
+	 * look for where the symbol table and symbol table
+	 * strings are and setup some state that we found
+	 * them and fall into processing the first one (which
+	 * is the symbol table) and after that has been loaded,
+	 * we try the symbol strings.  Note that the order is
+	 * actually required as the memory image depends on
+	 * the symbol strings being loaded starting at the
+	 * end of the symbol table.  The kernel assumes this
+	 * layout of the image.
+	 *
+	 * At any point, if we get to the end of the load file
+	 * or the section requested is earlier in the file than
+	 * the current file pointer, we just end up falling
+	 * out of this and booting the kernel without this
+	 * information.
+	 */
+
+	/* Make sure that the next address is long aligned... */
+	/* Assumes size of long is a power of 2... */
+	estate.curaddr = (estate.curaddr + sizeof(long) - 1) & ~(sizeof(long) - 1);
+	
+	/* If we have not yet gotten the shdr loaded, try that */
+	if (shdr == 0)
+	{
+		estate.toread = estate.e.elf32.e_shnum * estate.e.elf32.e_shentsize;
+		estate.skip = estate.e.elf32.e_shoff - (estate.loc + offset);
+		if (estate.toread)
+		{
+#if ELF_DEBUG
+			printf("shdr *, size %lX, curaddr %lX\n", 
+				estate.toread, estate.curaddr);
+#endif
+			
+			/* Start reading at the curaddr and make that the shdr */
+			shdr = (Elf32_Shdr *)phys_to_virt(estate.curaddr);
+			
+			/* Start to read... */
+			return 1;
+		}
+	}
+	else
+	{
+		/* We have the shdr loaded, check if we have found
+		 * the indexs where the symbols are supposed to be */
+		if ((symtabindex == -1) && (symstrindex == -1))
+		{
+			int i;
+			/* Make sure that the address is page aligned... */
+			/* Symbols need to start in their own page(s)... */
+			estate.curaddr = (estate.curaddr + 4095) & ~4095;
+			
+			/* Need to make new indexes... */
+			for (i=0; i < estate.e.elf32.e_shnum; i++)
+			{
+				if (shdr[i].sh_type == SHT_SYMTAB)
+				{
+					int j;
+					for (j=0; j < estate.e.elf32.e_phnum; j++)
+					{
+						/* Check only for loaded sections */
+						if ((estate.p.phdr32[j].p_type | 0x80) == (PT_LOAD | 0x80))
+						{
+							/* Only the extra symbols */
+							if ((shdr[i].sh_offset >= estate.p.phdr32[j].p_offset) &&
+								((shdr[i].sh_offset + shdr[i].sh_size) <=
+									(estate.p.phdr32[j].p_offset + estate.p.phdr32[j].p_filesz)))
+							{
+								shdr[i].sh_offset=0;
+								shdr[i].sh_size=0;
+								break;
+							}
+						}
+					}
+					if ((shdr[i].sh_offset != 0) && (shdr[i].sh_size != 0))
+					{
+						symtabindex = i;
+						symstrindex = shdr[i].sh_link;
+					}
+				}
+			}
+		}
+		
+		/* Check if we have a symbol table index and have not loaded it */
+		if ((symtab_load == 0) && (symtabindex >= 0))
+		{
+			/* No symbol table yet?  Load it first... */
+			
+			/* This happens to work out in a strange way.
+			 * If we are past the point in the file already,
+			 * we will skip a *large* number of bytes which
+			 * ends up bringing us to the end of the file and
+			 * an old (default) boot.  Less code and lets
+			 * the state machine work in a cleaner way but this
+			 * is a nasty side-effect trick... */
+			estate.skip = shdr[symtabindex].sh_offset - (estate.loc + offset);
+			
+			/* And we need to read this many bytes... */
+			estate.toread = shdr[symtabindex].sh_size;
+			
+			if (estate.toread)
+			{
+#if ELF_DEBUG
+				printf("db sym, size %lX, curaddr %lX\n", 
+					estate.toread, estate.curaddr);
+#endif
+				/* Save where we are loading this... */
+				symtab_load = estate.curaddr;
+				
+				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
+				estate.curaddr += sizeof(long);
+				
+				/* Start to read... */
+				return 1;
+			}
+		}
+		else if ((symstr_load == 0) && (symstrindex >= 0))
+		{
+			/* We have already loaded the symbol table, so
+			 * now on to the symbol strings... */
+			
+			
+			/* Same nasty trick as above... */
+			estate.skip = shdr[symstrindex].sh_offset - (estate.loc + offset);
+			
+			/* And we need to read this many bytes... */
+			estate.toread = shdr[symstrindex].sh_size;
+			
+			if (estate.toread)
+			{
+#if ELF_DEBUG
+				printf("db str, size %lX, curaddr %lX\n", 
+					estate.toread, estate.curaddr);
+#endif
+				/* Save where we are loading this... */
+				symstr_load = estate.curaddr;
+				
+				*((long *)phys_to_virt(estate.curaddr)) = estate.toread;
+				estate.curaddr += sizeof(long);
+				
+				/* Start to read... */
+				return 1;
+			}
+		}
+	}
+	/* all done */
+	return 0;
+}
+
+static void elf_freebsd_boot(unsigned long entry) 
+{
+	if (image_type != Elf_FreeBSD)
+		return;
+
+	memset(&bsdinfo, 0, sizeof(bsdinfo));
+	bsdinfo.bi_basemem = meminfo.basememsize;
+	bsdinfo.bi_extmem = meminfo.memsize;
+	bsdinfo.bi_memsizes_valid = 1;
+	bsdinfo.bi_version = BOOTINFO_VERSION;
+	bsdinfo.bi_kernelname = virt_to_phys(KERNEL_BUF);
+	bsdinfo.bi_nfs_diskless = NULL;
+	bsdinfo.bi_size = sizeof(bsdinfo);
+#define RB_BOOTINFO     0x80000000      /* have `struct bootinfo *' arg */  
+	if(freebsd_kernel_env[0] != '\0'){
+		freebsd_howto |= RB_BOOTINFO;
+		bsdinfo.bi_envp = (unsigned long)freebsd_kernel_env;
+	}
+	
+	/* Check if we have symbols loaded, and if so,
+	 * made the meta_data needed to pass those to
+	 * the kernel. */
+	if ((symtab_load !=0) && (symstr_load != 0))
+	{
+		unsigned long *t;
+		
+		bsdinfo.bi_symtab = symtab_load;
+		
+		/* End of symbols (long aligned...) */
+		/* Assumes size of long is a power of 2... */
+		bsdinfo.bi_esymtab = (symstr_load +
+			sizeof(long) +
+			*((long *)phys_to_virt(symstr_load)) +
+			sizeof(long) - 1) & ~(sizeof(long) - 1);
+		
+		/* Where we will build the meta data... */
+		t = phys_to_virt(bsdinfo.bi_esymtab);
+		
+#if ELF_DEBUG
+		printf("Metadata at %lX\n",t);
+#endif
+		
+		/* Set up the pointer to the memory... */
+		bsdinfo.bi_modulep = virt_to_phys(t);
+		
+		/* The metadata structure is an array of 32-bit
+		 * words where we store some information about the
+		 * system.  This is critical, as FreeBSD now looks
+		 * only for the metadata for the extended symbol
+		 * information rather than in the bootinfo.
+		 */
+		/* First, do the kernel name and the kernel type */
+		/* Note that this assumed x86 byte order... */
+		
+		/* 'kernel\0\0' */
+		*t++=MODINFO_NAME; *t++= 7; *t++=0x6E72656B; *t++=0x00006C65;
+		
+		/* 'elf kernel\0\0' */
+		*t++=MODINFO_TYPE; *t++=11; *t++=0x20666C65; *t++=0x6E72656B; *t++ = 0x00006C65;
+		
+		/* Now the symbol start/end - note that they are
+		 * here in local/physical address - the Kernel
+		 * boot process will relocate the addresses. */
+		*t++=MODINFOMD_SSYM | MODINFO_METADATA; *t++=sizeof(*t); *t++=bsdinfo.bi_symtab;
+		*t++=MODINFOMD_ESYM | MODINFO_METADATA; *t++=sizeof(*t); *t++=bsdinfo.bi_esymtab;
+		
+		*t++=MODINFO_END; *t++=0; /* end of metadata */
+		
+		/* Since we have symbols we need to make
+		 * sure that the kernel knows its own end
+		 * of memory...  It is not _end but after
+		 * the symbols and the metadata... */
+		bsdinfo.bi_kernend = virt_to_phys(t);
+		
+		/* Signal locore.s that we have a valid bootinfo
+		 * structure that was completely filled in. */
+		freebsd_howto |= 0x80000000;
+	}
+	
+	xstart32(entry, freebsd_howto, NODEV, 0, 0, 0, 
+		virt_to_phys(&bsdinfo), 0, 0, 0);
+	longjmp(restart_etherboot, -2);
+}
+#endif
+
+#ifdef AOUT_IMAGE
+static void aout_freebsd_probe(void)
+{
+	image_type = Aout;
+	if (((astate.head.a_midmag >> 16) & 0xffff) == 0) {
+		/* Some other a.out variants have a different
+		 * value, and use other alignments (e.g. 1K),
+		 * not the 4K used by FreeBSD.  */
+		image_type = Aout_FreeBSD;
+		printf("/FreeBSD");
+		off = -(astate.head.a_entry & 0xff000000);
+		astate.head.a_entry += off;
+	}
+}
+
+static void aout_freebsd_boot(void)
+{
+	if (image_type == Aout_FreeBSD) {
+		memset(&bsdinfo, 0, sizeof(bsdinfo));
+		bsdinfo.bi_basemem = meminfo.basememsize;
+		bsdinfo.bi_extmem = meminfo.memsize;
+		bsdinfo.bi_memsizes_valid = 1;
+		bsdinfo.bi_version = BOOTINFO_VERSION;
+		bsdinfo.bi_kernelname = virt_to_phys(KERNEL_BUF);
+		bsdinfo.bi_nfs_diskless = NULL;
+		bsdinfo.bi_size = sizeof(bsdinfo);
+		xstart32(astate.head.a_entry, freebsd_howto, NODEV, 0, 0, 0, 
+			virt_to_phys(&bsdinfo), 0, 0, 0);
+		longjmp(restart_etherboot, -2);
+	}
+}
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/gdbmach.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/gdbmach.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/gdbmach.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/gdbmach.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/pic8259.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/pic8259.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/pic8259.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/pic8259.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/rdtsc_timer.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/rdtsc_timer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/rdtsc_timer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/rdtsc_timer.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/relocate.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/relocate.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/relocate.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/relocate.c	2012-01-06 23:49:04.000000000 +0000
@@ -33,10 +33,8 @@
 /**
  * Relocate iPXE
  *
- * @v ebp		Maximum address to use for relocation
- * @ret esi		Current physical address
- * @ret edi		New physical address
- * @ret ecx		Length to copy
+ * @v ix86		x86 register dump from prefix
+ * @ret ix86		x86 registers to return to prefix
  *
  * This finds a suitable location for iPXE near the top of 32-bit
  * address space, and returns the physical address of the new location
@@ -61,7 +59,7 @@
 
 	/* Determine maximum usable address */
 	max = MAX_ADDR;
-	if ( ix86->regs.ebp < max ) {
+	if ( ix86->regs.ebp && ( ix86->regs.ebp < max ) ) {
 		max = ix86->regs.ebp;
 		DBG ( "Limiting relocation to [0,%lx)\n", max );
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/runtime.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/runtime.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/runtime.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/runtime.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -28,7 +27,6 @@
 #include <stddef.h>
 #include <stdint.h>
 #include <stdlib.h>
-#include <ctype.h>
 #include <errno.h>
 #include <assert.h>
 #include <ipxe/init.h>
@@ -134,11 +132,7 @@
 	}
 	cmdline = cmdline_copy;
 	copy_from_user ( cmdline, cmdline_user, 0, len );
-	DBGC ( colour, "RUNTIME found command line \"%s\" at %08x\n",
-	       cmdline, cmdline_phys );
-
-	/* Mark command line as consumed */
-	cmdline_phys = 0;
+	DBGC ( colour, "RUNTIME found command line \"%s\"\n", cmdline );
 
 	/* Strip unwanted cruft from the command line */
 	cmdline_strip ( cmdline, "BOOT_IMAGE=" );
@@ -191,34 +185,25 @@
 	       initrd_phys, ( initrd_phys + initrd_len ) );
 
 	/* Allocate image */
-	image = alloc_image ( NULL );
+	image = alloc_image();
 	if ( ! image ) {
 		DBGC ( colour, "RUNTIME could not allocate image for "
 		       "initrd\n" );
-		rc = -ENOMEM;
 		goto err_alloc_image;
 	}
-	if ( ( rc = image_set_name ( image, "<INITRD>" ) ) != 0 ) {
-		DBGC ( colour, "RUNTIME could not set image name: %s\n",
-		       strerror ( rc ) );
-		goto err_set_name;
-	}
+	image_set_name ( image, "<INITRD>" );
 
 	/* Allocate and copy initrd content */
 	image->data = umalloc ( initrd_len );
 	if ( ! image->data ) {
-		DBGC ( colour, "RUNTIME could not allocate %d bytes for "
+		DBGC ( colour, "RUNTIME could not allocate %zd bytes for "
 		       "initrd\n", initrd_len );
-		rc = -ENOMEM;
 		goto err_umalloc;
 	}
 	image->len = initrd_len;
 	memcpy_user ( image->data, 0, phys_to_user ( initrd_phys ), 0,
 		      initrd_len );
 
-	/* Mark initrd as consumed */
-	initrd_phys = 0;
-
 	/* Register image */
 	if ( ( rc = register_image ( image ) ) != 0 ) {
 		DBGC ( colour, "RUNTIME could not register initrd: %s\n",
@@ -233,7 +218,6 @@
 
  err_register_image:
  err_umalloc:
- err_set_name:
 	image_put ( image );
  err_alloc_image:
 	return rc;
@@ -260,6 +244,6 @@
 }
 
 /** Command line and initrd initialisation function */
-struct startup_fn runtime_startup_fn __startup_fn ( STARTUP_NORMAL ) = {
-	.startup = runtime_init,
+struct init_fn runtime_init_fn __init_fn ( INIT_NORMAL ) = {
+	.initialise = runtime_init,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/video_subr.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/video_subr.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/video_subr.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/video_subr.c	2012-01-06 23:49:04.000000000 +0000
@@ -11,14 +11,6 @@
 #include <ipxe/console.h>
 #include <ipxe/init.h>
 #include "vga.h"
-#include <config/console.h>
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_DIRECT_VGA ) && \
-	CONSOLE_EXPLICIT ( CONSOLE_DIRECT_VGA ) )
-#undef CONSOLE_DIRECT_VGA
-#define CONSOLE_DIRECT_VGA ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_LOG )
-#endif
 
 struct console_driver vga_console __console_driver;
 
@@ -105,7 +97,6 @@
 struct console_driver vga_console __console_driver = {
 	.putchar = vga_putc,
 	.disabled = 1,
-	.usage = CONSOLE_DIRECT_VGA,
 };
 
 struct init_fn video_init_fn __init_fn ( INIT_EARLY ) = {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/wince_loader.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/wince_loader.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/wince_loader.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/wince_loader.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,273 @@
+#define LOAD_DEBUG	0
+
+static int get_x_header(unsigned char *data, unsigned long now);
+static void jump_2ep();
+static unsigned char ce_signature[] = {'B', '0', '0', '0', 'F', 'F', '\n',};
+static char ** ep;
+
+#define BOOT_ARG_PTR_LOCATION 0x001FFFFC
+
+typedef struct _BOOT_ARGS{
+	unsigned char ucVideoMode;
+	unsigned char ucComPort;
+	unsigned char ucBaudDivisor;
+	unsigned char ucPCIConfigType;
+	
+	unsigned long dwSig;
+	#define BOOTARG_SIG 0x544F4F42
+	unsigned long dwLen;
+	
+	unsigned char ucLoaderFlags;
+	unsigned char ucEshellFlags;
+	unsigned char ucEdbgAdapterType;
+	unsigned char ucEdbgIRQ;
+	
+	unsigned long dwEdbgBaseAddr;
+	unsigned long dwEdbgDebugZone;	
+	unsigned long dwDHCPLeaseTime;
+	unsigned long dwEdbgFlags;
+	
+	unsigned long dwEBootFlag;
+	unsigned long dwEBootAddr;
+	unsigned long dwLaunchAddr;
+	
+	unsigned long pvFlatFrameBuffer;
+	unsigned short vesaMode;
+	unsigned short cxDisplayScreen;
+	unsigned short cyDisplayScreen;
+	unsigned short cxPhysicalScreen;
+	unsigned short cyPhysicalScreen;
+	unsigned short cbScanLineLength;
+	unsigned short bppScreen;
+	
+	unsigned char RedMaskSize;
+	unsigned char REdMaskPosition;
+	unsigned char GreenMaskSize;
+	unsigned char GreenMaskPosition;
+	unsigned char BlueMaskSize;
+	unsigned char BlueMaskPosition;
+} BOOT_ARGS;
+
+BOOT_ARGS BootArgs;
+
+static struct segment_info{
+	unsigned long addr;		// Section Address
+	unsigned long size;		// Section Size
+	unsigned long checksum;		// Section CheckSum
+} X;
+
+#define PSIZE	(1500)			//Max Packet Size
+#define DSIZE  (PSIZE+12)
+static unsigned long dbuffer_available =0;
+static unsigned long not_loadin =0;
+static unsigned long d_now =0;
+
+unsigned long entry;
+static unsigned long ce_curaddr;
+
+
+static sector_t ce_loader(unsigned char *data, unsigned int len, int eof);
+static os_download_t wince_probe(unsigned char *data, unsigned int len)
+{
+	if (strncmp(ce_signature, data, sizeof(ce_signature)) != 0) {
+		return 0;
+	}
+	printf("(WINCE)");
+	return ce_loader;
+}
+
+static sector_t ce_loader(unsigned char *data, unsigned int len, int eof)
+{
+	static unsigned char dbuffer[DSIZE];
+	int this_write = 0;
+	static int firsttime = 1;
+
+	/*
+	 *	new packet in, we have to 
+	 *	[1] copy data to dbuffer,
+	 *
+	 *	update...
+	 *	[2]  dbuffer_available
+	 */
+	memcpy( (dbuffer+dbuffer_available), data, len);	//[1]
+	dbuffer_available += len;	// [2]
+	len = 0;
+
+	d_now = 0;
+	
+#if 0
+	printf("dbuffer_available =%ld \n", dbuffer_available);
+#endif 
+	
+	if (firsttime) 
+	{
+		d_now = sizeof(ce_signature);
+		printf("String Physical Address = %lx \n", 
+			*(unsigned long *)(dbuffer+d_now));
+		
+		d_now += sizeof(unsigned long);
+		printf("Image Size = %ld [%lx]\n", 
+			*(unsigned long *)(dbuffer+d_now), 
+			*(unsigned long *)(dbuffer+d_now));
+		
+		d_now += sizeof(unsigned long);
+		dbuffer_available -= d_now;			
+		
+		d_now = (unsigned long)get_x_header(dbuffer, d_now);
+		firsttime = 0;
+	}
+	
+	if (not_loadin == 0)
+	{
+		d_now = get_x_header(dbuffer, d_now);
+	}
+	
+	while ( not_loadin > 0 )
+	{
+		/* dbuffer do not have enough data to loading, copy all */
+#if LOAD_DEBUG
+		printf("[0] not_loadin = [%ld], dbuffer_available = [%ld] \n", 
+			not_loadin, dbuffer_available);
+		printf("[0] d_now = [%ld] \n", d_now);
+#endif
+		
+		if( dbuffer_available <= not_loadin)
+		{
+			this_write = dbuffer_available ;
+			memcpy(phys_to_virt(ce_curaddr), (dbuffer+d_now), this_write );
+			ce_curaddr += this_write;
+			not_loadin -= this_write;
+			
+			/* reset index and available in the dbuffer */
+			dbuffer_available = 0;
+			d_now = 0;
+#if LOAD_DEBUG
+			printf("[1] not_loadin = [%ld], dbuffer_available = [%ld] \n", 
+				not_loadin, dbuffer_available);
+			printf("[1] d_now = [%ld], this_write = [%d] \n", 
+				d_now, this_write);
+#endif
+				
+			// get the next packet...
+			return (0);
+		}
+			
+		/* dbuffer have more data then loading ... , copy partital.... */
+		else
+		{
+			this_write = not_loadin;
+			memcpy(phys_to_virt(ce_curaddr), (dbuffer+d_now), this_write);
+			ce_curaddr += this_write;
+			not_loadin = 0;
+			
+			/* reset index and available in the dbuffer */
+			dbuffer_available -= this_write;
+			d_now += this_write;
+#if LOAD_DEBUG
+			printf("[2] not_loadin = [%ld], dbuffer_available = [%ld] \n", 
+				not_loadin, dbuffer_available);
+			printf("[2] d_now = [%ld], this_write = [%d] \n\n", 
+				d_now, this_write);
+#endif
+			
+			/* dbuffer not empty, proceed processing... */
+			
+			// don't have enough data to get_x_header..
+			if ( dbuffer_available < (sizeof(unsigned long) * 3) )
+			{
+//				printf("we don't have enough data remaining to call get_x. \n");
+				memcpy( (dbuffer+0), (dbuffer+d_now), dbuffer_available);
+				return (0);
+			}
+			else
+			{
+#if LOAD_DEBUG				
+				printf("with remaining data to call get_x \n");
+				printf("dbuffer available = %ld , d_now = %ld\n", 
+					dbuffer_available, d_now);
+#endif					
+				d_now = get_x_header(dbuffer, d_now);
+			}
+		}
+	}
+	return (0);
+}
+
+static int get_x_header(unsigned char *dbuffer, unsigned long now)
+{
+	X.addr = *(unsigned long *)(dbuffer + now);
+	X.size = *(unsigned long *)(dbuffer + now + sizeof(unsigned long));
+	X.checksum = *(unsigned long *)(dbuffer + now + sizeof(unsigned long)*2);
+
+	if (X.addr == 0)
+	{
+		entry = X.size;
+		done(1);
+		printf("Entry Point Address = [%lx] \n", entry);
+		jump_2ep();		
+	}
+
+	if (!prep_segment(X.addr, X.addr + X.size, X.addr + X.size, 0, 0)) {
+		longjmp(restart_etherboot, -2);
+	}
+
+	ce_curaddr = X.addr;
+	now += sizeof(unsigned long)*3;
+
+	/* re-calculate dbuffer available... */
+	dbuffer_available -= sizeof(unsigned long)*3;
+
+	/* reset index of this section */
+	not_loadin = X.size;
+	
+#if 1
+	printf("\n");
+	printf("\t Section Address = [%lx] \n", X.addr);
+	printf("\t Size = %d [%lx]\n", X.size, X.size);
+	printf("\t Checksum = %ld [%lx]\n", X.checksum, X.checksum);
+#endif
+#if LOAD_DEBUG
+	printf("____________________________________________\n");
+	printf("\t dbuffer_now = %ld \n", now);
+	printf("\t dbuffer available = %ld \n", dbuffer_available);
+	printf("\t not_loadin = %ld \n", not_loadin);
+#endif
+
+	return now;
+}
+
+static void jump_2ep()
+{
+	BootArgs.ucVideoMode = 1;
+	BootArgs.ucComPort = 1;
+	BootArgs.ucBaudDivisor = 1;
+	BootArgs.ucPCIConfigType = 1;	// do not fill with 0
+	
+	BootArgs.dwSig = BOOTARG_SIG;
+	BootArgs.dwLen = sizeof(BootArgs);
+	
+	if(BootArgs.ucVideoMode == 0)
+	{
+		BootArgs.cxDisplayScreen = 640;
+		BootArgs.cyDisplayScreen = 480;
+		BootArgs.cxPhysicalScreen = 640;
+		BootArgs.cyPhysicalScreen = 480;
+		BootArgs.bppScreen = 16;
+		BootArgs.cbScanLineLength  = 1024;
+		BootArgs.pvFlatFrameBuffer = 0x800a0000;	// ollie say 0x98000000
+	}	
+	else if(BootArgs.ucVideoMode != 0xFF)
+	{
+		BootArgs.cxDisplayScreen = 0;
+		BootArgs.cyDisplayScreen = 0;
+		BootArgs.cxPhysicalScreen = 0;
+		BootArgs.cyPhysicalScreen = 0;
+		BootArgs.bppScreen = 0;
+		BootArgs.cbScanLineLength  = 0;
+		BootArgs.pvFlatFrameBuffer = 0;	
+	}
+
+	ep = phys_to_virt(BOOT_ARG_PTR_LOCATION);
+	*ep= virt_to_phys(&BootArgs);
+	xstart32(entry);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/x86_io.c ipxe-1.0.1~lliurex1505/src/arch/i386/core/x86_io.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/core/x86_io.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/core/x86_io.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,96 @@
+/*
+ * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <ipxe/io.h>
+#include <ipxe/x86_io.h>
+
+/** @file
+ *
+ * iPXE I/O API for x86
+ *
+ */
+
+/**
+ * Read 64-bit qword from memory-mapped device
+ *
+ * @v io_addr		I/O address
+ * @ret data		Value read
+ *
+ * This routine uses MMX instructions.
+ */
+static uint64_t x86_readq ( volatile uint64_t *io_addr ) {
+	uint64_t data;
+        __asm__ __volatile__ ( "pushl %%edx\n\t"
+			       "pushl %%eax\n\t"
+			       "movq (%1), %%mm0\n\t"
+			       "movq %%mm0, (%%esp)\n\t"
+			       "popl %%eax\n\t"
+			       "popl %%edx\n\t"
+			       "emms\n\t"
+                               : "=A" ( data ) : "r" ( io_addr ) );
+	return data;
+}
+
+/**
+ * Write 64-bit qword to memory-mapped device
+ *
+ * @v data		Value to write
+ * @v io_addr		I/O address
+ *
+ * This routine uses MMX instructions.
+ */
+static void x86_writeq ( uint64_t data, volatile uint64_t *io_addr ) {
+	__asm__ __volatile__ ( "pushl %%edx\n\t"
+			       "pushl %%eax\n\t"
+			       "movq (%%esp), %%mm0\n\t"
+			       "movq %%mm0, (%1)\n\t"
+			       "popl %%eax\n\t"
+			       "popl %%edx\n\t"
+			       "emms\n\t"
+			       : : "A" ( data ), "r" ( io_addr ) );
+}
+
+PROVIDE_IOAPI_INLINE ( x86, phys_to_bus );
+PROVIDE_IOAPI_INLINE ( x86, bus_to_phys );
+PROVIDE_IOAPI_INLINE ( x86, ioremap );
+PROVIDE_IOAPI_INLINE ( x86, iounmap );
+PROVIDE_IOAPI_INLINE ( x86, io_to_bus );
+PROVIDE_IOAPI_INLINE ( x86, readb );
+PROVIDE_IOAPI_INLINE ( x86, readw );
+PROVIDE_IOAPI_INLINE ( x86, readl );
+PROVIDE_IOAPI ( x86, readq, x86_readq );
+PROVIDE_IOAPI_INLINE ( x86, writeb );
+PROVIDE_IOAPI_INLINE ( x86, writew );
+PROVIDE_IOAPI_INLINE ( x86, writel );
+PROVIDE_IOAPI ( x86, writeq, x86_writeq );
+PROVIDE_IOAPI_INLINE ( x86, inb );
+PROVIDE_IOAPI_INLINE ( x86, inw );
+PROVIDE_IOAPI_INLINE ( x86, inl );
+PROVIDE_IOAPI_INLINE ( x86, outb );
+PROVIDE_IOAPI_INLINE ( x86, outw );
+PROVIDE_IOAPI_INLINE ( x86, outl );
+PROVIDE_IOAPI_INLINE ( x86, insb );
+PROVIDE_IOAPI_INLINE ( x86, insw );
+PROVIDE_IOAPI_INLINE ( x86, insl );
+PROVIDE_IOAPI_INLINE ( x86, outsb );
+PROVIDE_IOAPI_INLINE ( x86, outsw );
+PROVIDE_IOAPI_INLINE ( x86, outsl );
+PROVIDE_IOAPI_INLINE ( x86, iodelay );
+PROVIDE_IOAPI_INLINE ( x86, mb );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undi.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undiload.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undiload.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undiload.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undiload.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -38,12 +37,6 @@
  *
  */
 
-/* Disambiguate the various error causes */
-#define EINFO_EUNDILOAD							\
-	__einfo_uniqify ( EINFO_EPLATFORM, 0x01,			\
-			  "UNDI loader error" )
-#define EUNDILOAD( status ) EPLATFORM ( EINFO_EUNDILOAD, status )
-
 /** Parameter block for calling UNDI loader */
 static struct s_UNDI_LOADER __bss16 ( undi_loader );
 #define undi_loader __use_data16 ( undi_loader )
@@ -103,21 +96,21 @@
 
 	/* Call loader */
 	undi_loader_entry = undirom->loader_entry;
-	__asm__ __volatile__ ( REAL_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-					   "pushw %%ds\n\t"
+	__asm__ __volatile__ ( REAL_CODE ( "pushw %%ds\n\t"
 					   "pushw %%ax\n\t"
 					   "lcall *undi_loader_entry\n\t"
-					   "popl %%ebp\n\t" /* discard */
-					   "popl %%ebp\n\t" /* gcc bug */ )
+					   "addw $4, %%sp\n\t" )
 			       : "=a" ( exit )
 			       : "a" ( __from_data16 ( &undi_loader ) )
-			       : "ebx", "ecx", "edx", "esi", "edi" );
+			       : "ebx", "ecx", "edx", "esi", "edi", "ebp" );
 
 	if ( exit != PXENV_EXIT_SUCCESS ) {
 		/* Clear entry point */
 		memset ( &undi_loader_entry, 0, sizeof ( undi_loader_entry ) );
 
-		rc = -EUNDILOAD ( undi_loader.Status );
+		rc = -undi_loader.Status;
+		if ( rc == 0 ) /* Paranoia */
+			rc = -EIO;
 		DBGC ( undi, "UNDI %p loader failed: %s\n",
 		       undi, strerror ( rc ) );
 		return rc;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undinet.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undinet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undinet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undinet.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,15 +13,13 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <string.h>
 #include <unistd.h>
-#include <byteswap.h>
 #include <pxe.h>
 #include <realmode.h>
 #include <pic8259.h>
@@ -71,9 +69,6 @@
 /** Delay between retries of PXENV_UNDI_INITIALIZE */
 #define UNDI_INITIALIZE_RETRY_DELAY_MS 200
 
-/** Alignment of received frame payload */
-#define UNDI_RX_ALIGN 16
-
 static void undinet_close ( struct net_device *netdev );
 
 /** Address of UNDI entry point */
@@ -171,10 +166,6 @@
 static struct s_PXENV_UNDI_TBD __data16 ( undinet_tbd );
 #define undinet_tbd __use_data16 ( undinet_tbd )
 
-/** UNDI transmit destination address */
-static uint8_t __data16_array ( undinet_destaddr, [ETH_ALEN] );
-#define undinet_destaddr __use_data16 ( undinet_destaddr )
-
 /**
  * Transmit packet
  *
@@ -184,14 +175,8 @@
  */
 static int undinet_transmit ( struct net_device *netdev,
 			      struct io_buffer *iobuf ) {
-	struct undi_nic *undinic = netdev->priv;
 	struct s_PXENV_UNDI_TRANSMIT undi_transmit;
-	const void *ll_dest;
-	const void *ll_source;
-	uint16_t net_proto;
-	unsigned int flags;
-	uint8_t protocol;
-	size_t len;
+	size_t len = iob_len ( iobuf );
 	int rc;
 
 	/* Technically, we ought to make sure that the previous
@@ -204,49 +189,15 @@
 	 * transmit the next packet.
 	 */
 
-	/* Some PXE stacks are unable to cope with P_UNKNOWN, and will
-	 * always try to prepend a link-layer header.  Work around
-	 * these stacks by stripping the existing link-layer header
-	 * and allowing the PXE stack to (re)construct the link-layer
-	 * header itself.
-	 */
-	if ( ( rc = eth_pull ( netdev, iobuf, &ll_dest, &ll_source,
-			       &net_proto, &flags ) ) != 0 ) {
-		DBGC ( undinic, "UNDINIC %p could not strip Ethernet header: "
-		       "%s\n", undinic, strerror ( rc ) );
-		return rc;
-	}
-	memcpy ( undinet_destaddr, ll_dest, sizeof ( undinet_destaddr ) );
-	switch ( net_proto ) {
-	case htons ( ETH_P_IP ) :
-		protocol = P_IP;
-		break;
-	case htons ( ETH_P_ARP ) :
-		protocol = P_ARP;
-		break;
-	case htons ( ETH_P_RARP ) :
-		protocol = P_RARP;
-		break;
-	default:
-		/* Unknown protocol; restore the original link-layer header */
-		iob_push ( iobuf, sizeof ( struct ethhdr ) );
-		protocol = P_UNKNOWN;
-		break;
-	}
-
 	/* Copy packet to UNDI I/O buffer */
-	len = iob_len ( iobuf );
 	if ( len > sizeof ( basemem_packet ) )
 		len = sizeof ( basemem_packet );
 	memcpy ( &basemem_packet, iobuf->data, len );
 
 	/* Create PXENV_UNDI_TRANSMIT data structure */
 	memset ( &undi_transmit, 0, sizeof ( undi_transmit ) );
-	undi_transmit.Protocol = protocol;
-	undi_transmit.XmitFlag = ( ( flags & LL_BROADCAST ) ?
-				   XMT_BROADCAST : XMT_DESTADDR );
 	undi_transmit.DestAddr.segment = rm_ds;
-	undi_transmit.DestAddr.offset = __from_data16 ( &undinet_destaddr );
+	undi_transmit.DestAddr.offset = __from_data16 ( &undinet_tbd );
 	undi_transmit.TBD.segment = rm_ds;
 	undi_transmit.TBD.offset = __from_data16 ( &undinet_tbd );
 
@@ -303,7 +254,6 @@
 	struct s_PXENV_UNDI_ISR undi_isr;
 	struct io_buffer *iobuf = NULL;
 	size_t len;
-	size_t reserve_len;
 	size_t frag_len;
 	size_t max_frag_len;
 	int rc;
@@ -351,8 +301,6 @@
 			/* Packet fragment received */
 			len = undi_isr.FrameLength;
 			frag_len = undi_isr.BufferLength;
-			reserve_len = ( -undi_isr.FrameHeaderLength &
-					( UNDI_RX_ALIGN - 1 ) );
 			if ( ( len == 0 ) || ( len < frag_len ) ) {
 				/* Don't laugh.  VMWare does it. */
 				DBGC ( undinic, "UNDINIC %p reported insane "
@@ -361,17 +309,15 @@
 				netdev_rx_err ( netdev, NULL, -EINVAL );
 				break;
 			}
+			if ( ! iobuf )
+				iobuf = alloc_iob ( len );
 			if ( ! iobuf ) {
-				iobuf = alloc_iob ( reserve_len + len );
-				if ( ! iobuf ) {
-					DBGC ( undinic, "UNDINIC %p could not "
-					       "allocate %zd bytes for RX "
-					       "buffer\n", undinic, len );
-					/* Fragment will be dropped */
-					netdev_rx_err ( netdev, NULL, -ENOMEM );
-					goto done;
-				}
-				iob_reserve ( iobuf, reserve_len );
+				DBGC ( undinic, "UNDINIC %p could not "
+				       "allocate %zd bytes for RX buffer\n",
+				       undinic, len );
+				/* Fragment will be dropped */
+				netdev_rx_err ( netdev, NULL, -ENOMEM );
+				goto done;
 			}
 			max_frag_len = iob_tailroom ( iobuf );
 			if ( frag_len > max_frag_len ) {
@@ -531,53 +477,6 @@
 	.irq   		= undinet_irq,
 };
 
-/** A device with broken support for generating interrupts */
-struct undinet_irq_broken {
-	/** PCI vendor ID */
-	uint16_t pci_vendor;
-	/** PCI device ID */
-	uint16_t pci_device;
-};
-
-/**
- * List of devices with broken support for generating interrupts
- *
- * Some PXE stacks are known to claim that IRQs are supported, but
- * then never generate interrupts.  No satisfactory solution has been
- * found to this problem; the workaround is to add the PCI vendor and
- * device IDs to this list.  This is something of a hack, since it
- * will generate false positives for identical devices with a working
- * PXE stack (e.g. those that have been reflashed with iPXE), but it's
- * an improvement on the current situation.
- */
-static const struct undinet_irq_broken undinet_irq_broken_list[] = {
-	/* HP XX70x laptops */
-	{ .pci_vendor = 0x8086, .pci_device = 0x1502 },
-	{ .pci_vendor = 0x8086, .pci_device = 0x1503 },
-};
-
-/**
- * Check for devices with broken support for generating interrupts
- *
- * @v undi		UNDI device
- * @ret irq_is_broken	Interrupt support is broken; no interrupts are generated
- */
-static int undinet_irq_is_broken ( struct undi_device *undi ) {
-	const struct undinet_irq_broken *broken;
-	unsigned int i;
-
-	for ( i = 0 ; i < ( sizeof ( undinet_irq_broken_list ) /
-			    sizeof ( undinet_irq_broken_list[0] ) ) ; i++ ) {
-		broken = &undinet_irq_broken_list[i];
-		if ( ( undi->dev.desc.bus_type == BUS_TYPE_PCI ) &&
-		     ( undi->dev.desc.vendor == broken->pci_vendor ) &&
-		     ( undi->dev.desc.device == broken->pci_device ) ) {
-			return 1;
-		}
-	}
-	return 0;
-}
-
 /**
  * Probe UNDI device
  *
@@ -694,11 +593,6 @@
 		       undinic );
 		undinic->hacks |= UNDI_HACK_EB54;
 	}
-	if ( undinet_irq_is_broken ( undi ) ) {
-		DBGC ( undinic, "UNDINIC %p forcing polling mode due to "
-		       "broken interrupts\n", undinic );
-		undinic->irq_supported = 0;
-	}
 
 	/* Register network device */
 	if ( ( rc = register_netdev ( netdev ) ) != 0 )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undionly.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undionly.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undionly.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undionly.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undipreload.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undipreload.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undipreload.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undipreload.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undirom.c ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undirom.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/drivers/net/undirom.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/drivers/net/undirom.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/basemem.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/basemem.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/basemem.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/basemem.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/bios_console.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/bios_console.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/bios_console.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/bios_console.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -24,7 +23,6 @@
 #include <ipxe/console.h>
 #include <ipxe/ansiesc.h>
 #include <ipxe/keymap.h>
-#include <config/console.h>
 
 #define ATTR_BOLD		0x08
 
@@ -50,12 +48,6 @@
 
 #define ATTR_DEFAULT		ATTR_FCOL_WHITE
 
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_PCBIOS ) && CONSOLE_EXPLICIT ( CONSOLE_PCBIOS ) )
-#undef CONSOLE_PCBIOS
-#define CONSOLE_PCBIOS ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_LOG )
-#endif
-
 /** Current character attribute */
 static unsigned int bios_attr = ATTR_DEFAULT;
 
@@ -97,7 +89,7 @@
 					   "int $0x10\n\t"
 					   "cli\n\t" )
 			       : : "a" ( 0x0600 ), "b" ( bios_attr << 8 ),
-			           "c" ( 0 ), "d" ( 0xfefe ) );
+			           "c" ( 0 ), "d" ( 0xffff ) );
 }
 
 /**
@@ -167,19 +159,10 @@
 		return;
 
 	/* Print character with attribute */
-	__asm__ __volatile__ ( REAL_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-					   "sti\n\t"
+	__asm__ __volatile__ ( REAL_CODE ( "sti\n\t"
 					   /* Skip non-printable characters */
 					   "cmpb $0x20, %%al\n\t"
 					   "jb 1f\n\t"
-					   /* Read attribute */
-					   "movb %%al, %%cl\n\t"
-					   "movb $0x08, %%ah\n\t"
-					   "int $0x10\n\t"
-					   "xchgb %%al, %%cl\n\t"
-					   /* Skip if attribute matches */
-					   "cmpb %%ah, %%bl\n\t"
-					   "je 1f\n\t"
 					   /* Set attribute */
 					   "movw $0x0001, %%cx\n\t"
 					   "movb $0x09, %%ah\n\t"
@@ -189,11 +172,11 @@
 					   "xorw %%bx, %%bx\n\t"
 					   "movb $0x0e, %%ah\n\t"
 					   "int $0x10\n\t"
-					   "cli\n\t"
-					   "popl %%ebp\n\t" /* gcc bug */ )
+					   "cli\n\t" )
 			       : "=a" ( discard_a ), "=b" ( discard_b ),
 			         "=c" ( discard_c )
-			       : "a" ( character ), "b" ( bios_attr ) );
+			       : "a" ( character ), "b" ( bios_attr )
+			       : "ebp" );
 }
 
 /**
@@ -218,8 +201,6 @@
 	BIOS_KEY ( "\x4d", "[C" )	/* Right arrow */
 	BIOS_KEY ( "\x47", "[H" )	/* Home */
 	BIOS_KEY ( "\x4f", "[F" )	/* End */
-	BIOS_KEY ( "\x49", "[5~" )	/* Page up */
-	BIOS_KEY ( "\x51", "[6~" )	/* Page down */
 	BIOS_KEY ( "\x3f", "[15~" )	/* F5 */
 	BIOS_KEY ( "\x40", "[17~" )	/* F6 */
 	BIOS_KEY ( "\x41", "[18~" )	/* F7 */
@@ -330,5 +311,4 @@
 	.putchar = bios_putchar,
 	.getchar = bios_getchar,
 	.iskey = bios_iskey,
-	.usage = CONSOLE_PCBIOS,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/e820mangler.S ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/e820mangler.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/e820mangler.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/e820mangler.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/fakee820.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/fakee820.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/fakee820.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/fakee820.c	2012-01-06 23:49:04.000000000 +0000
@@ -12,8 +12,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/hidemem.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/hidemem.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/hidemem.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/hidemem.c	2012-01-06 23:49:04.000000000 +0000
@@ -12,8 +12,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -190,8 +189,6 @@
  * possible.
  */
 static void unhide_etherboot ( int flags __unused ) {
-	struct memory_map memmap;
-	int rc;
 
 	/* If we have more than one hooked interrupt at this point, it
 	 * means that some other vector is still hooked, in which case
@@ -205,23 +202,15 @@
 		return;
 	}
 
-	/* Try to unhook INT 15 */
-	if ( ( rc = unhook_bios_interrupt ( 0x15, ( unsigned int ) int15,
-					    &int15_vector ) ) != 0 ) {
-		DBG ( "Cannot unhook INT15: %s\n", strerror ( rc ) );
-		/* Leave it hooked; there's nothing else we can do,
-		 * and it should be intrinsically safe (though
-		 * wasteful of RAM).
-		 */
-	}
+	/* Try to unhook INT 15.  If it fails, then just leave it
+	 * hooked; it takes care of protecting itself.  :)
+	 */
+	unhook_bios_interrupt ( 0x15, ( unsigned int ) int15,
+				&int15_vector );
 
 	/* Unhook fake E820 map, if used */
 	if ( FAKE_E820 )
 		unfake_e820();
-
-	/* Dump memory map after unhiding */
-	DBG ( "Unhidden iPXE from system memory map\n" );
-	get_memmap ( &memmap );
 }
 
 /** Hide Etherboot startup function */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/memmap.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/memmap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/memmap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/memmap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -63,10 +62,6 @@
 static struct e820_entry __bss16 ( e820buf );
 #define e820buf __use_data16 ( e820buf )
 
-/** We are running during POST; inhibit INT 15,e820 and INT 15,e801 */
-uint8_t __bss16 ( memmap_post );
-#define memmap_post __use_data16 ( memmap_post )
-
 /**
  * Get size of extended memory via INT 15,e801
  *
@@ -78,12 +73,6 @@
 	unsigned int flags;
 	unsigned int extmem;
 
-	/* Inhibit INT 15,e801 during POST */
-	if ( memmap_post ) {
-		DBG ( "INT 15,e801 not available during POST\n" );
-		return 0;
-	}
-
 	__asm__ __volatile__ ( REAL_CODE ( "stc\n\t"
 					   "int $0x15\n\t"
 					   "pushfw\n\t"
@@ -174,12 +163,6 @@
 	unsigned int flags;
 	unsigned int discard_D;
 
-	/* Inhibit INT 15,e820 during POST */
-	if ( memmap_post ) {
-		DBG ( "INT 15,e820 not available during POST\n" );
-		return -ENOTTY;
-	}
-
 	/* Clear the E820 buffer.  Do this once before starting,
 	 * rather than on each call; some BIOSes rely on the contents
 	 * being preserved between calls.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/pnpbios.c ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/pnpbios.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/firmware/pcbios/pnpbios.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/firmware/pcbios/pnpbios.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/hci/commands/pxe_cmd.c ipxe-1.0.1~lliurex1505/src/arch/i386/hci/commands/pxe_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/hci/commands/pxe_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/hci/commands/pxe_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <ipxe/netdevice.h>
@@ -31,21 +30,18 @@
  *
  */
 
-/** "startpxe" options */
-struct startpxe_options {};
-
-/** "startpxe" option list */
-static struct option_descriptor startpxe_opts[] = {};
+/** "startpxe" command descriptor */
+static struct command_descriptor startpxe_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>]" );
 
 /**
  * "startpxe" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int startpxe_payload ( struct net_device *netdev,
-			      struct startpxe_options *opts __unused ) {
+static int startpxe_payload ( struct net_device *netdev ) {
 
 	if ( netdev_is_open ( netdev ) )
 		pxe_activate ( netdev );
@@ -53,12 +49,6 @@
 	return 0;
 }
 
-/** "startpxe" command descriptor */
-static struct ifcommon_command_descriptor startpxe_cmd =
-	IFCOMMON_COMMAND_DESC ( struct startpxe_options, startpxe_opts,
-				0, MAX_ARGUMENTS, "[<interface>]",
-				startpxe_payload, 0 );
-
 /**
  * The "startpxe" command
  *
@@ -67,7 +57,7 @@
  * @ret rc		Return status code
  */
 static int startpxe_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &startpxe_cmd );
+	return ifcommon_exec ( argc, argv, &startpxe_cmd, startpxe_payload, 0 );
 }
 
 /** "stoppxe" options */
@@ -78,7 +68,7 @@
 
 /** "stoppxe" command descriptor */
 static struct command_descriptor stoppxe_cmd =
-	COMMAND_DESC ( struct stoppxe_options, stoppxe_opts, 0, 0, NULL );
+	COMMAND_DESC ( struct stoppxe_options, stoppxe_opts, 0, 0, "" );
 
 /**
  * The "stoppxe" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/hci/commands/reboot_cmd.c ipxe-1.0.1~lliurex1505/src/arch/i386/hci/commands/reboot_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/hci/commands/reboot_cmd.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/hci/commands/reboot_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <realmode.h>
+#include <ipxe/command.h>
+#include <ipxe/parseopt.h>
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/** @file
+ *
+ * Reboot command
+ *
+ */
+
+/** "reboot" options */
+struct reboot_options {};
+
+/** "reboot" option list */
+static struct option_descriptor reboot_opts[] = {};
+
+/** "reboot" command descriptor */
+static struct command_descriptor reboot_cmd =
+	COMMAND_DESC ( struct reboot_options, reboot_opts, 0, 0, "" );
+
+/**
+ * The "reboot" command
+ *
+ * @v argc		Argument count
+ * @v argv		Argument list
+ * @ret rc		Return status code
+ */
+static int reboot_exec ( int argc, char **argv ) {
+	struct reboot_options opts;
+	int rc;
+
+	/* Parse options */
+	if ( ( rc = parse_options ( argc, argv, &reboot_cmd, &opts ) ) != 0 )
+		return rc;
+
+	/* Reboot system */
+	__asm__ __volatile__ ( REAL_CODE ( "ljmp $0xf000, $0xfff0" ) : : );
+
+	return 0;
+}
+
+/** "reboot" command */
+struct command reboot_command __command = {
+	.name = "reboot",
+	.exec = reboot_exec,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/bootsector.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/bootsector.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/bootsector.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/bootsector.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -80,35 +79,17 @@
 					   "movw %%ss, %%ax\n\t"
 					   "movw %%ax, %%cs:saved_ss\n\t"
 					   "movw %%sp, %%cs:saved_sp\n\t"
-					   /* Save frame pointer (gcc bug) */
-					   "movl %%ebp, %%cs:saved_ebp\n\t"
-					   /* Prepare jump to boot sector */
+					   /* Jump to boot sector */
 					   "pushw %%bx\n\t"
 					   "pushw %%di\n\t"
-					   /* Clear all registers */
-					   "xorl %%eax, %%eax\n\t"
-					   "xorl %%ebx, %%ebx\n\t"
-					   "xorl %%ecx, %%ecx\n\t"
-					   /* %edx contains drive number */
-					   "xorl %%esi, %%esi\n\t"
-					   "xorl %%edi, %%edi\n\t"
-					   "xorl %%ebp, %%ebp\n\t"
-					   "movw %%ax, %%ds\n\t"
-					   "movw %%ax, %%es\n\t"
-					   "movw %%ax, %%fs\n\t"
-					   "movw %%ax, %%gs\n\t"
-					   /* Jump to boot sector */
 					   "sti\n\t"
 					   "lret\n\t"
 					   /* Preserved variables */
-					   "\nsaved_ebp: .long 0\n\t"
 					   "\nsaved_ss: .word 0\n\t"
 					   "\nsaved_sp: .word 0\n\t"
 					   "\nsaved_retaddr: .word 0\n\t"
 					   /* Boot failure return point */
 					   "\nbootsector_exec_fail:\n\t"
-					   /* Restore frame pointer (gcc bug) */
-					   "movl %%cs:saved_ebp, %%ebp\n\t"
 					   /* Restore stack pointer */
 					   "movw %%cs:saved_ss, %%ax\n\t"
 					   "movw %%ax, %%ss\n\t"
@@ -119,7 +100,7 @@
 			         "=d" ( discard_d )
 			       : "b" ( segment ), "D" ( offset ),
 			         "d" ( drive )
-			       : "eax", "ecx", "esi" );
+			       : "eax", "ecx", "esi", "ebp" );
 
 	DBG ( "Booted disk returned via INT 18 or 19\n" );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/bzimage.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/bzimage.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/bzimage.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/bzimage.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -33,7 +32,6 @@
 #include <assert.h>
 #include <realmode.h>
 #include <bzimage.h>
-#include <initrd.h>
 #include <ipxe/uaccess.h>
 #include <ipxe/image.h>
 #include <ipxe/segment.h>
@@ -216,8 +214,7 @@
 	} else {
 		bzimg->cmdline_magic.magic = BZI_CMDLINE_MAGIC;
 		bzimg->cmdline_magic.offset = bzimg->rm_cmdline;
-		if ( bzimg->version >= 0x0200 )
-			bzimg->bzhdr.setup_move_size = bzimg->rm_memsz;
+		bzimg->bzhdr.setup_move_size = bzimg->rm_memsz;
 	}
 
 	/* Set video mode */
@@ -305,10 +302,11 @@
  * @v image		bzImage image
  * @v bzimg		bzImage context
  * @v cmdline		Kernel command line
+ * @ret rc		Return status code
  */
-static void bzimage_set_cmdline ( struct image *image,
-				  struct bzimage_context *bzimg,
-				  const char *cmdline ) {
+static int bzimage_set_cmdline ( struct image *image,
+				 struct bzimage_context *bzimg,
+				 const char *cmdline ) {
 	size_t cmdline_len;
 
 	/* Copy command line down to real-mode portion */
@@ -318,32 +316,8 @@
 	copy_to_user ( bzimg->rm_kernel, bzimg->rm_cmdline,
 		       cmdline, cmdline_len );
 	DBGC ( image, "bzImage %p command line \"%s\"\n", image, cmdline );
-}
 
-/**
- * Parse standalone image command line for cpio parameters
- *
- * @v image		bzImage file
- * @v cpio		CPIO header
- * @v cmdline		Command line
- */
-static void bzimage_parse_cpio_cmdline ( struct image *image,
-					 struct cpio_header *cpio,
-					 const char *cmdline ) {
-	char *arg;
-	char *end;
-	unsigned int mode;
-
-	/* Look for "mode=" */
-	if ( ( arg = strstr ( cmdline, "mode=" ) ) ) {
-		arg += 5;
-		mode = strtoul ( arg, &end, 8 /* Octal for file mode */ );
-		if ( *end && ( *end != ' ' ) ) {
-			DBGC ( image, "bzImage %p strange \"mode=\""
-			       "terminator '%c'\n", image, *end );
-		}
-		cpio_set_field ( cpio->c_mode, ( 0100000 | mode ) );
-	}
+	return 0;
 }
 
 /**
@@ -352,190 +326,120 @@
  * @v image		bzImage image
  * @v initrd		initrd image
  * @v address		Address at which to load, or UNULL
- * @ret len		Length of loaded image, rounded up to INITRD_ALIGN
+ * @ret len		Length of loaded image, rounded up to 4 bytes
  */
 static size_t bzimage_load_initrd ( struct image *image,
 				    struct image *initrd,
 				    userptr_t address ) {
 	char *filename = initrd->cmdline;
-	char *cmdline;
 	struct cpio_header cpio;
-	size_t offset;
-	size_t name_len;
-	size_t pad_len;
+        size_t offset = 0;
 
 	/* Do not include kernel image itself as an initrd */
 	if ( initrd == image )
 		return 0;
 
-	/* Create cpio header for non-prebuilt images */
+	/* Create cpio header before non-prebuilt images */
 	if ( filename && filename[0] ) {
-		cmdline = strchr ( filename, ' ' );
-		name_len = ( ( cmdline ? ( ( size_t ) ( cmdline - filename ) )
-			       : strlen ( filename ) ) + 1 /* NUL */ );
+		size_t name_len = ( strlen ( filename ) + 1 );
+
+		DBGC ( image, "bzImage %p inserting initrd %p as %s\n",
+		       image, initrd, filename );
 		memset ( &cpio, '0', sizeof ( cpio ) );
 		memcpy ( cpio.c_magic, CPIO_MAGIC, sizeof ( cpio.c_magic ) );
 		cpio_set_field ( cpio.c_mode, 0100644 );
 		cpio_set_field ( cpio.c_nlink, 1 );
 		cpio_set_field ( cpio.c_filesize, initrd->len );
 		cpio_set_field ( cpio.c_namesize, name_len );
-		if ( cmdline ) {
-			bzimage_parse_cpio_cmdline ( image, &cpio,
-						     ( cmdline + 1 /* ' ' */ ));
+		if ( address ) {
+			copy_to_user ( address, offset, &cpio,
+				       sizeof ( cpio ) );
 		}
-		offset = ( ( sizeof ( cpio ) + name_len + 0x03 ) & ~0x03 );
-	} else {
-		offset = 0;
-		name_len = 0;
-	}
-
-	/* Copy in initrd image body (and cpio header if applicable) */
-	if ( address ) {
-		memmove_user ( address, offset, initrd->data, 0, initrd->len );
-		if ( offset ) {
-			memset_user ( address, 0, 0, offset );
-			copy_to_user ( address, 0, &cpio, sizeof ( cpio ) );
-			copy_to_user ( address, sizeof ( cpio ), filename,
-				       ( name_len - 1 /* NUL (or space) */ ) );
+		offset += sizeof ( cpio );
+		if ( address ) {
+			copy_to_user ( address, offset, filename,
+				       name_len );
 		}
-		DBGC ( image, "bzImage %p initrd %p [%#08lx,%#08lx,%#08lx)"
-		       "%s%s\n", image, initrd, user_to_phys ( address, 0 ),
-		       user_to_phys ( address, offset ),
-		       user_to_phys ( address, ( offset + initrd->len ) ),
-		       ( filename ? " " : "" ), ( filename ? filename : "" ) );
-		DBGC2_MD5A ( image, user_to_phys ( address, offset ),
-			     user_to_virt ( address, offset ), initrd->len );
+		offset += name_len;
+		offset = ( ( offset + 0x03 ) & ~0x03 );
 	}
-	offset += initrd->len;
 
-	/* Round up to multiple of INITRD_ALIGN and zero-pad */
-	pad_len = ( ( -offset ) & ( INITRD_ALIGN - 1 ) );
+	/* Copy in initrd image body */
 	if ( address )
-		memset_user ( address, offset, 0, pad_len );
-	offset += pad_len;
+		memcpy_user ( address, offset, initrd->data, 0, initrd->len );
+	offset += initrd->len;
+	if ( address ) {
+		DBGC ( image, "bzImage %p has initrd %p at [%lx,%lx)\n",
+		       image, initrd, user_to_phys ( address, 0 ),
+		       user_to_phys ( address, offset ) );
+	}
 
+	/* Round up to 4-byte boundary */
+	offset = ( ( offset + 0x03 ) & ~0x03 );
 	return offset;
 }
 
 /**
- * Check that initrds can be loaded
+ * Load initrds, if any
  *
  * @v image		bzImage image
  * @v bzimg		bzImage context
  * @ret rc		Return status code
  */
-static int bzimage_check_initrds ( struct image *image,
-				   struct bzimage_context *bzimg ) {
+static int bzimage_load_initrds ( struct image *image,
+				  struct bzimage_context *bzimg ) {
 	struct image *initrd;
-	userptr_t bottom;
-	size_t len = 0;
+	size_t total_len = 0;
+	physaddr_t address;
 	int rc;
 
-	/* Calculate total loaded length of initrds */
-	for_each_image ( initrd ) {
+	/* Add up length of all initrd images */
+	for_each_image ( initrd )
+		total_len += bzimage_load_initrd ( image, initrd, UNULL );
 
-		/* Skip kernel */
-		if ( initrd == image )
-			continue;
-
-		/* Calculate length */
-		len += bzimage_load_initrd ( image, initrd, UNULL );
+	/* Give up if no initrd images found */
+	if ( ! total_len )
+		return 0;
 
-		DBGC ( image, "bzImage %p initrd %p from [%#08lx,%#08lx)%s%s\n",
-		       image, initrd, user_to_phys ( initrd->data, 0 ),
-		       user_to_phys ( initrd->data, initrd->len ),
-		       ( initrd->cmdline ? " " : "" ),
-		       ( initrd->cmdline ? initrd->cmdline : "" ) );
-		DBGC2_MD5A ( image, user_to_phys ( initrd->data, 0 ),
-			     user_to_virt ( initrd->data, 0 ), initrd->len );
-	}
-
-	/* Calculate lowest usable address */
-	bottom = userptr_add ( bzimg->pm_kernel, bzimg->pm_sz );
-
-	/* Check that total length fits within space available for
-	 * reshuffling.  This is a conservative check, since CPIO
-	 * headers are not present during reshuffling, but this
-	 * doesn't hurt and keeps the code simple.
+	/* Find a suitable start address.  Try 1MB boundaries,
+	 * starting from the downloaded kernel image itself and
+	 * working downwards until we hit an available region.
 	 */
-	if ( ( rc = initrd_reshuffle_check ( len, bottom ) ) != 0 ) {
-		DBGC ( image, "bzImage %p failed reshuffle check: %s\n",
-		       image, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Check that total length fits within kernel's memory limit */
-	if ( user_to_phys ( bottom, len ) > bzimg->mem_limit ) {
-		DBGC ( image, "bzImage %p not enough space for initrds\n",
-		       image );
-		return -ENOBUFS;
-	}
-
-	return 0;
-}
-
-/**
- * Load initrds, if any
- *
- * @v image		bzImage image
- * @v bzimg		bzImage context
- */
-static void bzimage_load_initrds ( struct image *image,
-				   struct bzimage_context *bzimg ) {
-	struct image *initrd;
-	struct image *highest = NULL;
-	struct image *other;
-	userptr_t top;
-	userptr_t dest;
-	size_t len;
-
-	/* Reshuffle initrds into desired order */
-	initrd_reshuffle ( userptr_add ( bzimg->pm_kernel, bzimg->pm_sz ) );
-
-	/* Find highest initrd */
-	for_each_image ( initrd ) {
-		if ( ( highest == NULL ) ||
-		     ( userptr_sub ( initrd->data, highest->data ) > 0 ) ) {
-			highest = initrd;
+	for ( address = ( user_to_phys ( image->data, 0 ) & ~0xfffff ) ; ;
+	      address -= 0x100000 ) {
+		/* Check that we're not going to overwrite the
+		 * kernel itself.  This check isn't totally
+		 * accurate, but errs on the side of caution.
+		 */
+		if ( address <= ( BZI_LOAD_HIGH_ADDR + image->len ) ) {
+			DBGC ( image, "bzImage %p could not find a location "
+			       "for initrd\n", image );
+			return -ENOBUFS;
 		}
+		/* Check that we are within the kernel's range */
+		if ( ( address + total_len - 1 ) > bzimg->mem_limit )
+			continue;
+		/* Prepare and verify segment */
+		if ( ( rc = prep_segment ( phys_to_user ( address ), 0,
+					   total_len ) ) != 0 )
+			continue;
+		/* Use this address */
+		break;
 	}
 
-	/* Do nothing if there are no initrds */
-	if ( ! highest )
-		return;
-
-	/* Find highest usable address */
-	top = userptr_add ( highest->data,
-			    ( ( highest->len + INITRD_ALIGN - 1 ) &
-			      ~( INITRD_ALIGN - 1 ) ) );
-	if ( user_to_phys ( top, 0 ) > bzimg->mem_limit )
-		top = phys_to_user ( bzimg->mem_limit );
-	DBGC ( image, "bzImage %p loading initrds from %#08lx downwards\n",
-	       image, user_to_phys ( top, 0 ) );
+	/* Record initrd location */
+	bzimg->ramdisk_image = address;
+	bzimg->ramdisk_size = total_len;
 
-	/* Load initrds in order */
+	/* Construct initrd */
+	DBGC ( image, "bzImage %p constructing initrd at [%lx,%lx)\n",
+	       image, address, ( address + total_len ) );
 	for_each_image ( initrd ) {
-
-		/* Calculate cumulative length of following
-		 * initrds (including padding).
-		 */
-		len = 0;
-		for_each_image ( other ) {
-			if ( other == initrd )
-				len = 0;
-			len += bzimage_load_initrd ( image, other, UNULL );
-		}
-
-		/* Load initrd at this address */
-		dest = userptr_add ( top, -len );
-		bzimage_load_initrd ( image, initrd, dest );
-
-		/* Record initrd location */
-		if ( ! bzimg->ramdisk_image ) {
-			bzimg->ramdisk_image = user_to_phys ( dest, 0 );
-			bzimg->ramdisk_size = len;
-		}
+		address += bzimage_load_initrd ( image, initrd,
+						 phys_to_user ( address ) );
 	}
+
+	return 0;
 }
 
 /**
@@ -568,37 +472,33 @@
 		return rc;
 	}
 
-	/* Parse command line for bootloader parameters */
-	if ( ( rc = bzimage_parse_cmdline ( image, &bzimg, cmdline ) ) != 0)
-		return rc;
-
-	/* Check that initrds can be loaded */
-	if ( ( rc = bzimage_check_initrds ( image, &bzimg ) ) != 0 )
-		return rc;
-
-	/* Remove kernel from image list (without invalidating image pointer) */
-	unregister_image ( image_get ( image ) );
-
 	/* Load segments */
 	memcpy_user ( bzimg.rm_kernel, 0, image->data,
 		      0, bzimg.rm_filesz );
 	memcpy_user ( bzimg.pm_kernel, 0, image->data,
 		      bzimg.rm_filesz, bzimg.pm_sz );
 
-	/* Store command line */
-	bzimage_set_cmdline ( image, &bzimg, cmdline );
+	/* Update and write out header */
+	bzimage_update_header ( image, &bzimg, bzimg.rm_kernel );
 
-	/* Prepare for exiting.  Must do this before loading initrds,
-	 * since loading the initrds will corrupt the external heap.
-	 */
-	shutdown_boot();
+	/* Parse command line for bootloader parameters */
+	if ( ( rc = bzimage_parse_cmdline ( image, &bzimg, cmdline ) ) != 0)
+		return rc;
+
+	/* Store command line */
+	if ( ( rc = bzimage_set_cmdline ( image, &bzimg, cmdline ) ) != 0 )
+		return rc;
 
 	/* Load any initrds */
-	bzimage_load_initrds ( image, &bzimg );
+	if ( ( rc = bzimage_load_initrds ( image, &bzimg ) ) != 0 )
+		return rc;
 
 	/* Update kernel header */
 	bzimage_update_header ( image, &bzimg, bzimg.rm_kernel );
 
+	/* Prepare for exiting */
+	shutdown_boot();
+
 	DBGC ( image, "bzImage %p jumping to RM kernel at %04x:0000 "
 	       "(stack %04x:%04zx)\n", image, ( bzimg.rm_kernel_seg + 0x20 ),
 	       bzimg.rm_kernel_seg, bzimg.rm_heap );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/com32.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/com32.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/com32.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/com32.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/comboot.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/comboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/comboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/comboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 /**
@@ -229,7 +228,7 @@
 
 	++ext;
 
-	if ( strcasecmp( ext, "cbt" ) ) {
+	if ( strcasecmp( ext, "com" ) && strcasecmp( ext, "cbt" ) ) {
 		DBGC ( image, "COMBOOT %p: unrecognized extension %s\n",
 		       image, ext );
 		return -ENOEXEC;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/elfboot.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/elfboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/elfboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/elfboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -43,11 +42,10 @@
  */
 static int elfboot_exec ( struct image *image ) {
 	physaddr_t entry;
-	physaddr_t max;
 	int rc;
 
 	/* Load the image using core ELF support */
-	if ( ( rc = elf_load ( image, &entry, &max ) ) != 0 ) {
+	if ( ( rc = elf_load ( image, &entry ) ) != 0 ) {
 		DBGC ( image, "ELF %p could not load: %s\n",
 		       image, strerror ( rc ) );
 		return rc;
@@ -60,11 +58,10 @@
 
 	/* Jump to OS with flat physical addressing */
 	DBGC ( image, "ELF %p starting execution at %lx\n", image, entry );
-	__asm__ __volatile__ ( PHYS_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-					   "call *%%edi\n\t"
-					   "popl %%ebp\n\t" /* gcc bug */ )
+	__asm__ __volatile__ ( PHYS_CODE ( "call *%%edi\n\t" )
 			       : : "D" ( entry )
-			       : "eax", "ebx", "ecx", "edx", "esi", "memory" );
+			       : "eax", "ebx", "ecx", "edx", "esi", "ebp",
+			         "memory" );
 
 	DBGC ( image, "ELF %p returned\n", image );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/initrd.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/initrd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/initrd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/initrd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,300 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <errno.h>
-#include <initrd.h>
-#include <ipxe/image.h>
-#include <ipxe/uaccess.h>
-#include <ipxe/init.h>
-#include <ipxe/memblock.h>
-
-/** @file
- *
- * Initial ramdisk (initrd) reshuffling
- *
- */
-
-/** Maximum address available for initrd */
-userptr_t initrd_top;
-
-/** Minimum address available for initrd */
-userptr_t initrd_bottom;
-
-/**
- * Squash initrds as high as possible in memory
- *
- * @v top		Highest possible address
- * @ret used		Lowest address used by initrds
- */
-static userptr_t initrd_squash_high ( userptr_t top ) {
-	userptr_t current = top;
-	struct image *initrd;
-	struct image *highest;
-	size_t len;
-
-	/* Squash up any initrds already within or below the region */
-	while ( 1 ) {
-
-		/* Find the highest image not yet in its final position */
-		highest = NULL;
-		for_each_image ( initrd ) {
-			if ( ( userptr_sub ( initrd->data, current ) < 0 ) &&
-			     ( ( highest == NULL ) ||
-			       ( userptr_sub ( initrd->data,
-					       highest->data ) > 0 ) ) ) {
-				highest = initrd;
-			}
-		}
-		if ( ! highest )
-			break;
-
-		/* Move this image to its final position */
-		len = ( ( highest->len + INITRD_ALIGN - 1 ) &
-			~( INITRD_ALIGN - 1 ) );
-		current = userptr_sub ( current, len );
-		DBGC ( &images, "INITRD squashing %s [%#08lx,%#08lx)->"
-		       "[%#08lx,%#08lx)\n", highest->name,
-		       user_to_phys ( highest->data, 0 ),
-		       user_to_phys ( highest->data, highest->len ),
-		       user_to_phys ( current, 0 ),
-		       user_to_phys ( current, highest->len ) );
-		memmove_user ( current, 0, highest->data, 0, highest->len );
-		highest->data = current;
-	}
-
-	/* Copy any remaining initrds (e.g. embedded images) to the region */
-	for_each_image ( initrd ) {
-		if ( userptr_sub ( initrd->data, top ) >= 0 ) {
-			len = ( ( initrd->len + INITRD_ALIGN - 1 ) &
-				~( INITRD_ALIGN - 1 ) );
-			current = userptr_sub ( current, len );
-			DBGC ( &images, "INITRD copying %s [%#08lx,%#08lx)->"
-			       "[%#08lx,%#08lx)\n", initrd->name,
-			       user_to_phys ( initrd->data, 0 ),
-			       user_to_phys ( initrd->data, initrd->len ),
-			       user_to_phys ( current, 0 ),
-			       user_to_phys ( current, initrd->len ) );
-			memcpy_user ( current, 0, initrd->data, 0,
-				      initrd->len );
-			initrd->data = current;
-		}
-	}
-
-	return current;
-}
-
-/**
- * Swap position of two adjacent initrds
- *
- * @v low		Lower initrd
- * @v high		Higher initrd
- * @v free		Free space
- * @v free_len		Length of free space
- */
-static void initrd_swap ( struct image *low, struct image *high,
-			  userptr_t free, size_t free_len ) {
-	size_t len = 0;
-	size_t frag_len;
-	size_t new_len;
-
-	DBGC ( &images, "INITRD swapping %s [%#08lx,%#08lx)<->[%#08lx,%#08lx) "
-	       "%s\n", low->name, user_to_phys ( low->data, 0 ),
-	       user_to_phys ( low->data, low->len ),
-	       user_to_phys ( high->data, 0 ),
-	       user_to_phys ( high->data, high->len ), high->name );
-
-	/* Round down length of free space */
-	free_len &= ~( INITRD_ALIGN - 1 );
-	assert ( free_len > 0 );
-
-	/* Swap image data */
-	while ( len < high->len ) {
-
-		/* Calculate maximum fragment length */
-		frag_len = ( high->len - len );
-		if ( frag_len > free_len )
-			frag_len = free_len;
-		new_len = ( ( len + frag_len + INITRD_ALIGN - 1 ) &
-			    ~( INITRD_ALIGN - 1 ) );
-
-		/* Swap fragments */
-		memcpy_user ( free, 0, high->data, len, frag_len );
-		memmove_user ( low->data, new_len, low->data, len, low->len );
-		memcpy_user ( low->data, len, free, 0, frag_len );
-		len = new_len;
-	}
-
-	/* Adjust data pointers */
-	high->data = low->data;
-	low->data = userptr_add ( low->data, len );
-}
-
-/**
- * Swap position of any two adjacent initrds not currently in the correct order
- *
- * @v free		Free space
- * @v free_len		Length of free space
- * @ret swapped		A pair of initrds was swapped
- */
-static int initrd_swap_any ( userptr_t free, size_t free_len ) {
-	struct image *low;
-	struct image *high;
-	size_t padded_len;
-	userptr_t adjacent;
-
-	/* Find any pair of initrds that can be swapped */
-	for_each_image ( low ) {
-
-		/* Calculate location of adjacent image (if any) */
-		padded_len = ( ( low->len + INITRD_ALIGN - 1 ) &
-			       ~( INITRD_ALIGN - 1 ) );
-		adjacent = userptr_add ( low->data, padded_len );
-
-		/* Search for adjacent image */
-		for_each_image ( high ) {
-
-			/* If we have found the adjacent image, swap and exit */
-			if ( high->data == adjacent ) {
-				initrd_swap ( low, high, free, free_len );
-				return 1;
-			}
-
-			/* Stop search if all remaining potential
-			 * adjacent images are already in the correct
-			 * order.
-			 */
-			if ( high == low )
-				break;
-		}
-	}
-
-	/* Nothing swapped */
-	return 0;
-}
-
-/**
- * Dump initrd locations (for debug)
- *
- */
-static void initrd_dump ( void ) {
-	struct image *initrd;
-
-	/* Do nothing unless debugging is enabled */
-	if ( ! DBG_LOG )
-		return;
-
-	/* Dump initrd locations */
-	for_each_image ( initrd ) {
-		DBGC ( &images, "INITRD %s at [%#08lx,%#08lx)\n",
-		       initrd->name, user_to_phys ( initrd->data, 0 ),
-		       user_to_phys ( initrd->data, initrd->len ) );
-		DBGC2_MD5A ( &images, user_to_phys ( initrd->data, 0 ),
-			     user_to_virt ( initrd->data, 0 ), initrd->len );
-	}
-}
-
-/**
- * Reshuffle initrds into desired order at top of memory
- *
- * @v bottom		Lowest address available for initrds
- *
- * After this function returns, the initrds have been rearranged in
- * memory and the external heap structures will have been corrupted.
- * Reshuffling must therefore take place immediately prior to jumping
- * to the loaded OS kernel; no further execution within iPXE is
- * permitted.
- */
-void initrd_reshuffle ( userptr_t bottom ) {
-	userptr_t top;
-	userptr_t used;
-	userptr_t free;
-	size_t free_len;
-
-	/* Calculate limits of available space for initrds */
-	top = initrd_top;
-	if ( userptr_sub ( initrd_bottom, bottom ) > 0 )
-		bottom = initrd_bottom;
-
-	/* Debug */
-	DBGC ( &images, "INITRD region [%#08lx,%#08lx)\n",
-	       user_to_phys ( bottom, 0 ), user_to_phys ( top, 0 ) );
-	initrd_dump();
-
-	/* Squash initrds as high as possible in memory */
-	used = initrd_squash_high ( top );
-
-	/* Calculate available free space */
-	free = bottom;
-	free_len = userptr_sub ( used, free );
-
-	/* Bubble-sort initrds into desired order */
-	while ( initrd_swap_any ( free, free_len ) ) {}
-
-	/* Debug */
-	initrd_dump();
-}
-
-/**
- * Check that there is enough space to reshuffle initrds
- *
- * @v len		Total length of initrds (including padding)
- * @v bottom		Lowest address available for initrds
- * @ret rc		Return status code
- */
-int initrd_reshuffle_check ( size_t len, userptr_t bottom ) {
-	userptr_t top;
-	size_t available;
-
-	/* Calculate limits of available space for initrds */
-	top = initrd_top;
-	if ( userptr_sub ( initrd_bottom, bottom ) > 0 )
-		bottom = initrd_bottom;
-	available = userptr_sub ( top, bottom );
-
-	/* Allow for a sensible minimum amount of free space */
-	len += INITRD_MIN_FREE_LEN;
-
-	/* Check for available space */
-	return ( ( len < available ) ? 0 : -ENOBUFS );
-}
-
-/**
- * initrd startup function
- *
- */
-static void initrd_startup ( void ) {
-	size_t len;
-
-	/* Record largest memory block available.  Do this after any
-	 * allocations made during driver startup (e.g. large host
-	 * memory blocks for Infiniband devices, which may still be in
-	 * use at the time of rearranging if a SAN device is hooked)
-	 * but before any allocations for downloaded images (which we
-	 * can safely reuse when rearranging).
-	 */
-	len = largest_memblock ( &initrd_bottom );
-	initrd_top = userptr_add ( initrd_bottom, len );
-}
-
-/** initrd startup function */
-struct startup_fn startup_initrd __startup_fn ( STARTUP_LATE ) = {
-	.startup = initrd_startup,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/multiboot.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/multiboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/multiboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/multiboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -38,8 +37,6 @@
 #include <ipxe/elf.h>
 #include <ipxe/init.h>
 #include <ipxe/features.h>
-#include <ipxe/uri.h>
-#include <ipxe/version.h>
 
 FEATURE ( FEATURE_IMAGE, "MBOOT", DHCP_EB_FEATURE_MULTIBOOT, 1 );
 
@@ -142,60 +139,53 @@
 /**
  * Add command line in base memory
  *
- * @v image		Image
+ * @v imgname		Image name
+ * @v cmdline		Command line
  * @ret physaddr	Physical address of command line
  */
-static physaddr_t multiboot_add_cmdline ( struct image *image ) {
-	char *mb_cmdline = ( mb_cmdlines + mb_cmdline_offset );
-	size_t remaining = ( sizeof ( mb_cmdlines ) - mb_cmdline_offset );
-	char *buf = mb_cmdline;
-	size_t len;
-
-	/* Copy image URI to base memory buffer as start of command line */
-	len = ( unparse_uri ( buf, remaining, image->uri,
-			      URI_ALL ) + 1 /* NUL */ );
-	if ( len > remaining )
-		len = remaining;
-	mb_cmdline_offset += len;
-	buf += len;
-	remaining -= len;
-
-	/* Copy command line to base memory buffer, if present */
-	if ( image->cmdline ) {
-		mb_cmdline_offset--; /* Strip NUL */
-		buf--;
-		remaining++;
-		len = ( snprintf ( buf, remaining, " %s",
-				   image->cmdline ) + 1 /* NUL */ );
-		if ( len > remaining )
-			len = remaining;
-		mb_cmdline_offset += len;
-	}
+physaddr_t multiboot_add_cmdline ( const char *imgname, const char *cmdline ) {
+	char *mb_cmdline;
+
+	if ( ! cmdline )
+		cmdline = "";
+
+	/* Copy command line to base memory buffer */
+	mb_cmdline = ( mb_cmdlines + mb_cmdline_offset );
+	mb_cmdline_offset +=
+		( snprintf ( mb_cmdline,
+			     ( sizeof ( mb_cmdlines ) - mb_cmdline_offset ),
+			     "%s %s", imgname, cmdline ) + 1 );
+
+	/* Truncate to terminating NUL in buffer if necessary */
+	if ( mb_cmdline_offset > sizeof ( mb_cmdlines ) )
+		mb_cmdline_offset = ( sizeof ( mb_cmdlines ) - 1 );
 
 	return virt_to_phys ( mb_cmdline );
 }
 
 /**
- * Add multiboot modules
+ * Build multiboot module list
  *
  * @v image		Multiboot image
- * @v start		Start address for modules
- * @v mbinfo		Multiboot information structure
- * @v modules		Multiboot module list
- * @ret rc		Return status code
+ * @v modules		Module list to fill, or NULL
+ * @ret count		Number of modules
  */
-static int multiboot_add_modules ( struct image *image, physaddr_t start,
-				   struct multiboot_info *mbinfo,
-				   struct multiboot_module *modules,
-				   unsigned int limit ) {
+static unsigned int
+multiboot_build_module_list ( struct image *image,
+			      struct multiboot_module *modules,
+			      unsigned int limit ) {
 	struct image *module_image;
 	struct multiboot_module *module;
-	int rc;
+	unsigned int count = 0;
+	unsigned int insert;
+	physaddr_t start;
+	physaddr_t end;
+	unsigned int i;
 
 	/* Add each image as a multiboot module */
 	for_each_image ( module_image ) {
 
-		if ( mbinfo->mods_count >= limit ) {
+		if ( count >= limit ) {
 			DBGC ( image, "MULTIBOOT %p limit of %d modules "
 			       "reached\n", image, limit );
 			break;
@@ -205,36 +195,38 @@
 		if ( module_image == image )
 			continue;
 
-		/* Page-align the module */
-		start = ( ( start + 0xfff ) & ~0xfff );
-
-		/* Prepare segment */
-		if ( ( rc = prep_segment ( phys_to_user ( start ),
-					   module_image->len,
-					   module_image->len ) ) != 0 ) {
-			DBGC ( image, "MULTIBOOT %p could not prepare module "
-			       "%s: %s\n", image, module_image->name,
-			       strerror ( rc ) );
-			return rc;
+		/* At least some OSes expect the multiboot modules to
+		 * be in ascending order, so we have to support it.
+		 */
+		start = user_to_phys ( module_image->data, 0 );
+		end = user_to_phys ( module_image->data, module_image->len );
+		for ( insert = 0 ; insert < count ; insert++ ) {
+			if ( start < modules[insert].mod_start )
+				break;
 		}
-
-		/* Copy module */
-		memcpy_user ( phys_to_user ( start ), 0,
-			      module_image->data, 0, module_image->len );
-
-		/* Add module to list */
-		module = &modules[mbinfo->mods_count++];
+		module = &modules[insert];
+		memmove ( ( module + 1 ), module,
+			  ( ( count - insert ) * sizeof ( *module ) ) );
 		module->mod_start = start;
-		module->mod_end = ( start + module_image->len );
-		module->string = multiboot_add_cmdline ( module_image );
+		module->mod_end = end;
+		module->string = multiboot_add_cmdline ( module_image->name,
+						       module_image->cmdline );
 		module->reserved = 0;
-		DBGC ( image, "MULTIBOOT %p module %s is [%x,%x)\n",
-		       image, module_image->name, module->mod_start,
-		       module->mod_end );
-		start += module_image->len;
+		
+		/* We promise to page-align modules */
+		assert ( ( module->mod_start & 0xfff ) == 0 );
+
+		count++;
 	}
 
-	return 0;
+	/* Dump module configuration */
+	for ( i = 0 ; i < count ; i++ ) {
+		DBGC ( image, "MULTIBOOT %p module %d is [%x,%x)\n",
+		       image, i, modules[i].mod_start,
+		       modules[i].mod_end );
+	}
+
+	return count;
 }
 
 /**
@@ -248,7 +240,7 @@
 #define mbinfo __use_data16 ( mbinfo )
 
 /** The multiboot bootloader name */
-static char __bss16_array ( mb_bootloader_name, [32] );
+static char __data16_array ( mb_bootloader_name, [] ) = "iPXE " VERSION;
 #define mb_bootloader_name __use_data16 ( mb_bootloader_name )
 
 /** The multiboot memory map */
@@ -313,12 +305,11 @@
  * @v image		Multiboot file
  * @v hdr		Multiboot header descriptor
  * @ret entry		Entry point
- * @ret max		Maximum used address
  * @ret rc		Return status code
  */
 static int multiboot_load_raw ( struct image *image,
 				struct multiboot_header_info *hdr,
-				physaddr_t *entry, physaddr_t *max ) {
+				physaddr_t *entry ) {
 	size_t offset;
 	size_t filesz;
 	size_t memsz;
@@ -349,9 +340,8 @@
 	/* Copy image to segment */
 	memcpy_user ( buffer, 0, image->data, offset, filesz );
 
-	/* Record execution entry point and maximum used address */
+	/* Record execution entry point */
 	*entry = hdr->mb.entry_addr;
-	*max = ( hdr->mb.load_addr + memsz );
 
 	return 0;
 }
@@ -361,15 +351,13 @@
  *
  * @v image		Multiboot file
  * @ret entry		Entry point
- * @ret max		Maximum used address
  * @ret rc		Return status code
  */
-static int multiboot_load_elf ( struct image *image, physaddr_t *entry,
-				physaddr_t *max ) {
+static int multiboot_load_elf ( struct image *image, physaddr_t *entry ) {
 	int rc;
 
 	/* Load ELF image*/
-	if ( ( rc = elf_load ( image, entry, max ) ) != 0 ) {
+	if ( ( rc = elf_load ( image, entry ) ) != 0 ) {
 		DBGC ( image, "MULTIBOOT %p ELF image failed to load: %s\n",
 		       image, strerror ( rc ) );
 		return rc;
@@ -387,7 +375,6 @@
 static int multiboot_exec ( struct image *image ) {
 	struct multiboot_header_info hdr;
 	physaddr_t entry;
-	physaddr_t max;
 	int rc;
 
 	/* Locate multiboot header, if present */
@@ -409,8 +396,8 @@
 	 * the ELF header if present, and Solaris relies on this
 	 * behaviour.
 	 */
-	if ( ( ( rc = multiboot_load_elf ( image, &entry, &max ) ) != 0 ) &&
-	     ( ( rc = multiboot_load_raw ( image, &hdr, &entry, &max ) ) != 0 ))
+	if ( ( ( rc = multiboot_load_elf ( image, &entry ) ) != 0 ) &&
+	     ( ( rc = multiboot_load_raw ( image, &hdr, &entry ) ) != 0 ) )
 		return rc;
 
 	/* Populate multiboot information structure */
@@ -418,16 +405,12 @@
 	mbinfo.flags = ( MBI_FLAG_LOADER | MBI_FLAG_MEM | MBI_FLAG_MMAP |
 			 MBI_FLAG_CMDLINE | MBI_FLAG_MODS );
 	mb_cmdline_offset = 0;
-	mbinfo.cmdline = multiboot_add_cmdline ( image );
+	mbinfo.cmdline = multiboot_add_cmdline ( image->name, image->cmdline );
+	mbinfo.mods_count = multiboot_build_module_list ( image, mbmodules,
+				( sizeof(mbmodules) / sizeof(mbmodules[0]) ) );
 	mbinfo.mods_addr = virt_to_phys ( mbmodules );
 	mbinfo.mmap_addr = virt_to_phys ( mbmemmap );
-	snprintf ( mb_bootloader_name, sizeof ( mb_bootloader_name ),
-		   "iPXE %s", product_version );
 	mbinfo.boot_loader_name = virt_to_phys ( mb_bootloader_name );
-	if ( ( rc = multiboot_add_modules ( image, max, &mbinfo, mbmodules,
-					    ( sizeof ( mbmodules ) /
-					      sizeof ( mbmodules[0] ) ) ) ) !=0)
-		return rc;
 
 	/* Multiboot images may not return and have no callback
 	 * interface, so shut everything down prior to booting the OS.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/nbi.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/nbi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/nbi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/nbi.c	2012-01-06 23:49:04.000000000 +0000
@@ -10,7 +10,6 @@
 #include <ipxe/fakedhcp.h>
 #include <ipxe/image.h>
 #include <ipxe/features.h>
-#include <ipxe/version.h>
 
 /** @file
  *
@@ -95,6 +94,12 @@
 	uint16_t flags;         /* Bit flags */
 };
 
+/** Info passed to NBI image */
+static struct ebinfo loaderinfo = {
+	VERSION_MAJOR, VERSION_MINOR,
+	0
+};
+
 /**
  * Prepare a segment for an NBI image
  *
@@ -248,8 +253,7 @@
 	       imgheader->execaddr.segoff.offset );
 
 	__asm__ __volatile__ (
-		REAL_CODE ( "pushl %%ebp\n\t"	/* gcc bug */
-			    "pushw %%ds\n\t"	/* far pointer to bootp data */
+		REAL_CODE ( "pushw %%ds\n\t"	/* far pointer to bootp data */
 			    "pushw %%bx\n\t"
 			    "pushl %%esi\n\t"	/* location */
 			    "pushw %%cs\n\t"	/* lcall execaddr */
@@ -259,14 +263,13 @@
 			    "pushl %%edi\n\t"
 			    "lret\n\t"
 			    "\n2:\n\t"
-			    "addw $8,%%sp\n\t"	/* clean up stack */
-			    "popl %%ebp\n\t"	/* gcc bug */ )
+			    "addw $8,%%sp\n\t"	/* clean up stack */ )
 		: "=a" ( rc ), "=D" ( discard_D ), "=S" ( discard_S ),
 		  "=b" ( discard_b )
 		: "D" ( imgheader->execaddr.segoff ),
 		  "S" ( imgheader->location ),
 		  "b" ( __from_data16 ( basemem_packet ) )
-		: "ecx", "edx" );
+		: "ecx", "edx", "ebp" );
 
 	return rc;
 }
@@ -278,10 +281,6 @@
  * @ret rc		Return status code, if image returns
  */
 static int nbi_boot32 ( struct image *image, struct imgheader *imgheader ) {
-	struct ebinfo loaderinfo = {
-		product_major_version, product_minor_version,
-		0
-	};
 	int discard_D, discard_S, discard_b;
 	int rc;
 
@@ -290,13 +289,11 @@
 
 	/* Jump to OS with flat physical addressing */
 	__asm__ __volatile__ (
-		PHYS_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-			    "pushl %%ebx\n\t" /* bootp data */
+		PHYS_CODE ( "pushl %%ebx\n\t" /* bootp data */
 			    "pushl %%esi\n\t" /* imgheader */
 			    "pushl %%eax\n\t" /* loaderinfo */
 			    "call *%%edi\n\t"
-			    "addl $12, %%esp\n\t" /* clean up stack */
-			    "popl %%ebp\n\t" /* gcc bug */ )
+			    "addl $12, %%esp\n\t" /* clean up stack */ )
 		: "=a" ( rc ), "=D" ( discard_D ), "=S" ( discard_S ),
 		  "=b" ( discard_b )
 		: "D" ( imgheader->execaddr.linear ),
@@ -304,7 +301,7 @@
 			imgheader->location.offset ),
 		  "b" ( virt_to_phys ( basemem_packet ) ),
 		  "a" ( virt_to_phys ( &loaderinfo ) )
-		: "ecx", "edx", "memory" );
+		: "ecx", "edx", "ebp", "memory" );
 
 	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/pxe_image.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/pxe_image.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/pxe_image.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/pxe_image.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -36,9 +35,6 @@
 
 FEATURE ( FEATURE_IMAGE, "PXE", DHCP_EB_FEATURE_PXE, 1 );
 
-/** PXE command line */
-const char *pxe_cmdline;
-
 /**
  * Execute PXE image
  *
@@ -66,29 +62,16 @@
 		       image );
 		return -ENODEV;
 	}
-	netdev_get ( netdev );
 
 	/* Activate PXE */
 	pxe_activate ( netdev );
 
-	/* Set PXE command line */
-	pxe_cmdline = image->cmdline;
-
 	/* Start PXE NBP */
 	rc = pxe_start_nbp();
 
-	/* Clear PXE command line */
-	pxe_cmdline = NULL;
-
 	/* Deactivate PXE */
 	pxe_deactivate();
 
-	/* Try to reopen network device.  Ignore errors, since the NBP
-	 * may have called PXENV_STOP_UNDI.
-	 */
-	netdev_open ( netdev );
-	netdev_put ( netdev );
-
 	return rc;
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/sdi.c ipxe-1.0.1~lliurex1505/src/arch/i386/image/sdi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/image/sdi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/image/sdi.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,136 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <errno.h>
-#include <realmode.h>
-#include <sdi.h>
-#include <ipxe/image.h>
-#include <ipxe/features.h>
-
-/** @file
- *
- * System Deployment Image (SDI)
- *
- * Based on the MSDN article "RAM boot using SDI in Windows XP
- * Embedded with Service Pack 1", available at the time of writing
- * from:
- *
- *   http://msdn.microsoft.com/en-us/library/ms838543.aspx
- */
-
-FEATURE ( FEATURE_IMAGE, "SDI", DHCP_EB_FEATURE_SDI, 1 );
-
-/**
- * Parse SDI image header
- *
- * @v image		SDI file
- * @v sdi		SDI header to fill in
- * @ret rc		Return status code
- */
-static int sdi_parse_header ( struct image *image, struct sdi_header *sdi ) {
-
-	/* Sanity check */
-	if ( image->len < sizeof ( *sdi ) ) {
-		DBGC ( image, "SDI %p too short for SDI header\n", image );
-		return -ENOEXEC;
-	}
-
-	/* Read in header */
-	copy_from_user ( sdi, image->data, 0, sizeof ( *sdi ) );
-
-	/* Check signature */
-	if ( sdi->magic != SDI_MAGIC ) {
-		DBGC ( image, "SDI %p is not an SDI image\n", image );
-		return -ENOEXEC;
-	}
-
-	return 0;
-}
-
-/**
- * Execute SDI image
- *
- * @v image		SDI file
- * @ret rc		Return status code
- */
-static int sdi_exec ( struct image *image ) {
-	struct sdi_header sdi;
-	uint32_t sdiptr;
-	int rc;
-
-	/* Parse image header */
-	if ( ( rc = sdi_parse_header ( image, &sdi ) ) != 0 )
-		return rc;
-
-	/* Check that image is bootable */
-	if ( sdi.boot_size == 0 ) {
-		DBGC ( image, "SDI %p is not bootable\n", image );
-		return -ENOTTY;
-	}
-	DBGC ( image, "SDI %p image at %08lx+%08zx\n",
-	       image, user_to_phys ( image->data, 0 ), image->len );
-	DBGC ( image, "SDI %p boot code at %08lx+%llx\n", image,
-	       user_to_phys ( image->data, sdi.boot_offset ), sdi.boot_size );
-
-	/* Copy boot code */
-	memcpy_user ( real_to_user ( SDI_BOOT_SEG, SDI_BOOT_OFF ), 0,
-		      image->data, sdi.boot_offset, sdi.boot_size );
-
-	/* Jump to boot code */
-	sdiptr = ( user_to_phys ( image->data, 0 ) | SDI_WTF );
-	__asm__ __volatile__ ( REAL_CODE ( "ljmp %0, %1\n\t" )
-			       : : "i" ( SDI_BOOT_SEG ),
-				   "i" ( SDI_BOOT_OFF ),
-				   "d" ( sdiptr ) );
-
-	/* There is no way for the image to return, since we provide
-	 * no return address.
-	 */
-	assert ( 0 );
-
-	return -ECANCELED; /* -EIMPOSSIBLE */
-}
-
-/**
- * Probe SDI image
- *
- * @v image		SDI file
- * @ret rc		Return status code
- */
-static int sdi_probe ( struct image *image ) {
-	struct sdi_header sdi;
-	int rc;
-
-	/* Parse image */
-	if ( ( rc = sdi_parse_header ( image, &sdi ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/** SDI image type */
-struct image_type sdi_image_type __image_type ( PROBE_NORMAL ) = {
-	.name = "SDI",
-	.probe = sdi_probe,
-	.exec = sdi_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bios.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bios.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bios.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bios.h	2012-01-06 23:49:04.000000000 +0000
@@ -4,10 +4,7 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #define BDA_SEG 0x0040
-#define BDA_EQUIPMENT_WORD 0x0010
 #define BDA_FBMS 0x0013
-#define BDA_REBOOT 0x0072
-#define BDA_REBOOT_WARM 0x1234
 #define BDA_NUM_DRIVES 0x0075
 
 #endif /* BIOS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/byteswap.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/byteswap.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/byteswap.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/byteswap.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,70 +1,43 @@
-#ifndef _BITS_BYTESWAP_H
-#define _BITS_BYTESWAP_H
-
-/** @file
- *
- * Byte-order swapping functions
- *
- */
-
-#include <stdint.h>
+#ifndef ETHERBOOT_BITS_BYTESWAP_H
+#define ETHERBOOT_BITS_BYTESWAP_H
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-static inline __attribute__ (( always_inline, const )) uint16_t
-__bswap_variable_16 ( uint16_t x ) {
-	__asm__ ( "xchgb %b0,%h0" : "=q" ( x ) : "0" ( x ) );
+static inline __attribute__ ((always_inline, const)) uint16_t
+__bswap_variable_16(uint16_t x)
+{
+	__asm__("xchgb %b0,%h0\n\t"
+		: "=q" (x)
+		: "0" (x));
 	return x;
 }
 
-static inline __attribute__ (( always_inline )) void
-__bswap_16s ( uint16_t *x ) {
-	__asm__ ( "rorw $8, %0" : "+m" ( *x ) );
-}
-
-static inline __attribute__ (( always_inline, const )) uint32_t
-__bswap_variable_32 ( uint32_t x ) {
-	__asm__ ( "bswapl %0" : "=r" ( x ) : "0" ( x ) );
+static inline __attribute__ ((always_inline, const)) uint32_t
+__bswap_variable_32(uint32_t x)
+{
+	__asm__("xchgb %b0,%h0\n\t"
+		"rorl $16,%0\n\t"
+		"xchgb %b0,%h0"
+		: "=q" (x)
+		: "0" (x));
 	return x;
 }
 
-static inline __attribute__ (( always_inline )) void
-__bswap_32s ( uint32_t *x ) {
-	__asm__ ( "bswapl %0" : "=r" ( *x ) : "0" ( *x ) );
-}
-
-static inline __attribute__ (( always_inline, const )) uint64_t
-__bswap_variable_64 ( uint64_t x ) {
-	uint32_t in_high = ( x >> 32 );
-	uint32_t in_low = ( x & 0xffffffffUL );
-	uint32_t out_high;
-	uint32_t out_low;
-
-	__asm__ ( "bswapl %0\n\t"
-		  "bswapl %1\n\t"
-		  "xchgl %0,%1\n\t"
-		  : "=r" ( out_high ), "=r" ( out_low )
-		  : "0" ( in_high ), "1" ( in_low ) );
-
-	return ( ( ( ( uint64_t ) out_high ) << 32 ) |
-		 ( ( uint64_t ) out_low ) );
-}
-
-static inline __attribute__ (( always_inline )) void
-__bswap_64s ( uint64_t *x ) {
-	struct {
-		uint32_t __attribute__ (( may_alias )) low;
-		uint32_t __attribute__ (( may_alias )) high;
-	} __attribute__ (( may_alias )) *dwords = ( ( void * ) x );
-	uint32_t discard;
-
-	__asm__ ( "movl %0,%2\n\t"
-		  "bswapl %2\n\t"
-		  "xchgl %2,%1\n\t"
-		  "bswapl %2\n\t"
-		  "movl %2,%0\n\t"
-		  : "+m" ( dwords->low ), "+m" ( dwords->high ),
-		    "=r" ( discard ) );
+static inline __attribute__ ((always_inline, const)) uint64_t
+__bswap_variable_64(uint64_t x)
+{
+	union {
+		uint64_t qword;
+		uint32_t dword[2]; 
+	} u;
+
+	u.qword = x;
+	u.dword[0] = __bswap_variable_32(u.dword[0]);
+	u.dword[1] = __bswap_variable_32(u.dword[1]);
+	__asm__("xchgl %0,%1"
+		: "=r" ( u.dword[0] ), "=r" ( u.dword[1] )
+		: "0" ( u.dword[0] ), "1" ( u.dword[1] ) );
+	return u.qword;
 }
 
-#endif /* _BITS_BYTESWAP_H */
+#endif /* ETHERBOOT_BITS_BYTESWAP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/cpu.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/cpu.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/cpu.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/cpu.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,86 @@
+#ifndef I386_BITS_CPU_H
+#define I386_BITS_CPU_H
+
+/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
+#define X86_FEATURE_FPU		0 /* Onboard FPU */
+#define X86_FEATURE_VME		1 /* Virtual Mode Extensions */
+#define X86_FEATURE_DE		2 /* Debugging Extensions */
+#define X86_FEATURE_PSE 	3 /* Page Size Extensions */
+#define X86_FEATURE_TSC		4 /* Time Stamp Counter */
+#define X86_FEATURE_MSR		5 /* Model-Specific Registers, RDMSR, WRMSR */
+#define X86_FEATURE_PAE		6 /* Physical Address Extensions */
+#define X86_FEATURE_MCE		7 /* Machine Check Architecture */
+#define X86_FEATURE_CX8		8 /* CMPXCHG8 instruction */
+#define X86_FEATURE_APIC	9 /* Onboard APIC */
+#define X86_FEATURE_SEP		11 /* SYSENTER/SYSEXIT */
+#define X86_FEATURE_MTRR	12 /* Memory Type Range Registers */
+#define X86_FEATURE_PGE		13 /* Page Global Enable */
+#define X86_FEATURE_MCA		14 /* Machine Check Architecture */
+#define X86_FEATURE_CMOV	15 /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
+#define X86_FEATURE_PAT		16 /* Page Attribute Table */
+#define X86_FEATURE_PSE36	17 /* 36-bit PSEs */
+#define X86_FEATURE_PN		18 /* Processor serial number */
+#define X86_FEATURE_CLFLSH	19 /* Supports the CLFLUSH instruction */
+#define X86_FEATURE_DTES	21 /* Debug Trace Store */
+#define X86_FEATURE_ACPI	22 /* ACPI via MSR */
+#define X86_FEATURE_MMX		23 /* Multimedia Extensions */
+#define X86_FEATURE_FXSR	24 /* FXSAVE and FXRSTOR instructions (fast save and restore */
+				          /* of FPU context), and CR4.OSFXSR available */
+#define X86_FEATURE_XMM		25 /* Streaming SIMD Extensions */
+#define X86_FEATURE_XMM2	26 /* Streaming SIMD Extensions-2 */
+#define X86_FEATURE_SELFSNOOP	27 /* CPU self snoop */
+#define X86_FEATURE_HT		28 /* Hyper-Threading */
+#define X86_FEATURE_ACC		29 /* Automatic clock control */
+#define X86_FEATURE_IA64	30 /* IA-64 processor */
+
+/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
+/* Don't duplicate feature flags which are redundant with Intel! */
+#define X86_FEATURE_SYSCALL	11 /* SYSCALL/SYSRET */
+#define X86_FEATURE_MMXEXT	22 /* AMD MMX extensions */
+#define X86_FEATURE_LM		29 /* Long Mode (x86-64) */
+#define X86_FEATURE_3DNOWEXT	30 /* AMD 3DNow! extensions */
+#define X86_FEATURE_3DNOW	31 /* 3DNow! */
+
+/** x86 CPU information */
+struct cpuinfo_x86 {
+	/** CPU features */
+	unsigned int features;
+	/** 64-bit CPU features */
+	unsigned int amd_features;
+};
+
+/*
+ * EFLAGS bits
+ */
+#define X86_EFLAGS_CF	0x00000001 /* Carry Flag */
+#define X86_EFLAGS_PF	0x00000004 /* Parity Flag */
+#define X86_EFLAGS_AF	0x00000010 /* Auxillary carry Flag */
+#define X86_EFLAGS_ZF	0x00000040 /* Zero Flag */
+#define X86_EFLAGS_SF	0x00000080 /* Sign Flag */
+#define X86_EFLAGS_TF	0x00000100 /* Trap Flag */
+#define X86_EFLAGS_IF	0x00000200 /* Interrupt Flag */
+#define X86_EFLAGS_DF	0x00000400 /* Direction Flag */
+#define X86_EFLAGS_OF	0x00000800 /* Overflow Flag */
+#define X86_EFLAGS_IOPL	0x00003000 /* IOPL mask */
+#define X86_EFLAGS_NT	0x00004000 /* Nested Task */
+#define X86_EFLAGS_RF	0x00010000 /* Resume Flag */
+#define X86_EFLAGS_VM	0x00020000 /* Virtual Mode */
+#define X86_EFLAGS_AC	0x00040000 /* Alignment Check */
+#define X86_EFLAGS_VIF	0x00080000 /* Virtual Interrupt Flag */
+#define X86_EFLAGS_VIP	0x00100000 /* Virtual Interrupt Pending */
+#define X86_EFLAGS_ID	0x00200000 /* CPUID detection flag */
+
+/*
+ * Generic CPUID function
+ */
+static inline __attribute__ (( always_inline )) void
+cpuid ( int op, unsigned int *eax, unsigned int *ebx,
+	unsigned int *ecx, unsigned int *edx ) {
+	__asm__ ( "cpuid" :
+		  "=a" ( *eax ), "=b" ( *ebx ), "=c" ( *ecx ), "=d" ( *edx )
+		: "0" ( op ) );
+}
+
+extern void get_cpuinfo ( struct cpuinfo_x86 *cpu );
+
+#endif /* I386_BITS_CPU_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/entropy.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _BITS_ENTROPY_H
-#define _BITS_ENTROPY_H
-
-/** @file
- *
- * i386-specific entropy API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/rtc_entropy.h>
-
-#endif /* _BITS_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/errfile.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/errfile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/errfile.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/errfile.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,43 @@
+#ifndef _BITS_ERRFILE_H
+#define _BITS_ERRFILE_H
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/**
+ * @addtogroup errfile Error file identifiers
+ * @{
+ */
+
+#define ERRFILE_memtop_umalloc	( ERRFILE_ARCH | ERRFILE_CORE | 0x00000000 )
+#define ERRFILE_memmap		( ERRFILE_ARCH | ERRFILE_CORE | 0x00010000 )
+#define ERRFILE_pnpbios		( ERRFILE_ARCH | ERRFILE_CORE | 0x00020000 )
+#define ERRFILE_bios_smbios	( ERRFILE_ARCH | ERRFILE_CORE | 0x00030000 )
+#define ERRFILE_biosint		( ERRFILE_ARCH | ERRFILE_CORE | 0x00040000 )
+#define ERRFILE_int13		( ERRFILE_ARCH | ERRFILE_CORE | 0x00050000 )
+#define ERRFILE_pxeparent	( ERRFILE_ARCH | ERRFILE_CORE | 0x00060000 )
+#define ERRFILE_runtime		( ERRFILE_ARCH | ERRFILE_CORE | 0x00070000 )
+
+#define ERRFILE_bootsector     ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00000000 )
+#define ERRFILE_bzimage	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00010000 )
+#define ERRFILE_eltorito       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00020000 )
+#define ERRFILE_multiboot      ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00030000 )
+#define ERRFILE_nbi	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00040000 )
+#define ERRFILE_pxe_image      ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00050000 )
+#define ERRFILE_elfboot	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00060000 )
+#define ERRFILE_comboot        ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00070000 )
+#define ERRFILE_com32          ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00080000 )
+#define ERRFILE_comboot_resolv ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00090000 )
+#define ERRFILE_comboot_call   ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000a0000 )
+
+#define ERRFILE_undi		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00000000 )
+#define ERRFILE_undiload	 ( ERRFILE_ARCH | ERRFILE_NET | 0x00010000 )
+#define ERRFILE_undinet		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00020000 )
+#define ERRFILE_undionly	 ( ERRFILE_ARCH | ERRFILE_NET | 0x00030000 )
+#define ERRFILE_undirom		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00040000 )
+
+#define ERRFILE_timer_rdtsc    ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00000000 )
+#define ERRFILE_timer_bios     ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00010000 )
+
+/** @} */
+
+#endif /* _BITS_ERRFILE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/io.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/io.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/io.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,14 @@
+#ifndef _BITS_IO_H
+#define _BITS_IO_H
+
+/** @file
+ *
+ * i386-specific I/O API implementations
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <ipxe/x86_io.h>
+
+#endif /* _BITS_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/reboot.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _BITS_REBOOT_H
-#define _BITS_REBOOT_H
-
-/** @file
- *
- * i386-specific reboot API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/bios_reboot.h>
-
-#endif /* _BITS_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/time.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/bits/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/bits/time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _BITS_TIME_H
-#define _BITS_TIME_H
-
-/** @file
- *
- * i386-specific time API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/rtc_time.h>
-
-#endif /* _BITS_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/initrd.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/initrd.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/initrd.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/initrd.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,30 +0,0 @@
-#ifndef _INITRD_H
-#define _INITRD_H
-
-/** @file
- *
- * Initial ramdisk (initrd) reshuffling
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/uaccess.h>
-
-/** Minimum alignment for initrds
- *
- * Some versions of Linux complain about initrds that are not
- * page-aligned.
- */
-#define INITRD_ALIGN 4096
-
-/** Minimum free space required to reshuffle initrds
- *
- * Chosen to avoid absurdly long reshuffling times
- */
-#define INITRD_MIN_FREE_LEN ( 512 * 1024 )
-
-extern void initrd_reshuffle ( userptr_t bottom );
-extern int initrd_reshuffle_check ( size_t len, userptr_t bottom );
-
-#endif /* _INITRD_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/int13.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/int13.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/int13.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/int13.h	2012-01-06 23:49:04.000000000 +0000
@@ -71,19 +71,6 @@
 /** Block size for non-extended INT 13 calls */
 #define INT13_BLKSIZE 512
 
-/** @defgroup int13fddtype INT 13 floppy disk drive types
- * @{
- */
-
-/** 360K */
-#define INT13_FDD_TYPE_360K		0x01
-/** 1.2M */
-#define INT13_FDD_TYPE_1M2		0x02
-/** 720K */
-#define INT13_FDD_TYPE_720K		0x03
-/** 1.44M */
-#define INT13_FDD_TYPE_1M44		0x04
-
 /** An INT 13 disk address packet */
 struct int13_disk_address {
 	/** Size of the packet, in bytes */
@@ -291,43 +278,120 @@
 /** MBR magic signature */
 #define INT13_MBR_MAGIC 0xaa55
 
-/** A floppy disk geometry */
-struct int13_fdd_geometry {
-	/** Number of tracks */
-	uint8_t tracks;
-	/** Number of heads and sectors per track */
-	uint8_t heads_spt;
+/** ISO9660 block size */
+#define ISO9660_BLKSIZE 2048
+
+/** An ISO9660 Primary Volume Descriptor (fixed portion) */
+struct iso9660_primary_descriptor_fixed {
+	/** Descriptor type */
+	uint8_t type;
+	/** Identifier ("CD001") */
+	uint8_t id[5];
+} __attribute__ (( packed ));
+
+/** An ISO9660 Primary Volume Descriptor */
+struct iso9660_primary_descriptor {
+	/** Fixed portion */
+	struct iso9660_primary_descriptor_fixed fixed;
+} __attribute__ (( packed ));
+
+/** ISO9660 Primary Volume Descriptor type */
+#define ISO9660_TYPE_PRIMARY 0x01
+
+/** ISO9660 identifier */
+#define ISO9660_ID "CD001"
+
+/** ISO9660 Primary Volume Descriptor block address */
+#define ISO9660_PRIMARY_LBA 16
+
+/** An El Torito Boot Record Volume Descriptor (fixed portion) */
+struct eltorito_descriptor_fixed {
+	/** Descriptor type */
+	uint8_t type;
+	/** Identifier ("CD001") */
+	uint8_t id[5];
+	/** Version, must be 1 */
+	uint8_t version;
+	/** Boot system indicator; must be "EL TORITO SPECIFICATION" */
+	uint8_t system_id[32];
+} __attribute__ (( packed ));
+
+/** An El Torito Boot Record Volume Descriptor */
+struct eltorito_descriptor {
+	/** Fixed portion */
+	struct eltorito_descriptor_fixed fixed;
+	/** Unused */
+	uint8_t unused[32];
+	/** Boot catalog sector */
+	uint32_t sector;
+} __attribute__ (( packed ));
+
+/** ISO9660 Boot Volume Descriptor type */
+#define ISO9660_TYPE_BOOT 0x00
+
+/** El Torito Boot Record Volume Descriptor block address */
+#define ELTORITO_LBA 17
+
+/** An El Torito Boot Catalog Validation Entry */
+struct eltorito_validation_entry {
+	/** Header ID; must be 1 */
+	uint8_t header_id;
+	/** Platform ID
+	 *
+	 * 0 = 80x86
+	 * 1 = PowerPC
+	 * 2 = Mac
+	 */
+	uint8_t platform_id;
+	/** Reserved */
+	uint16_t reserved;
+	/** ID string */
+	uint8_t id_string[24];
+	/** Checksum word */
+	uint16_t checksum;
+	/** Signature; must be 0xaa55 */
+	uint16_t signature;
+} __attribute__ (( packed ));
+
+/** El Torito platform IDs */
+enum eltorito_platform_id {
+	ELTORITO_PLATFORM_X86 = 0x00,
+	ELTORITO_PLATFORM_POWERPC = 0x01,
+	ELTORITO_PLATFORM_MAC = 0x02,
 };
 
-/** Define a floppy disk geometry */
-#define INT13_FDD_GEOMETRY( cylinders, heads, sectors )			\
-	{								\
-		.tracks = (cylinders),					\
-		.heads_spt = ( ( (heads) << 6 ) | (sectors) ),		\
-	}
-
-/** Get floppy disk number of cylinders */
-#define INT13_FDD_CYLINDERS( geometry ) ( (geometry)->tracks )
-
-/** Get floppy disk number of heads */
-#define INT13_FDD_HEADS( geometry ) ( (geometry)->heads_spt >> 6 )
-
-/** Get floppy disk number of sectors per track */
-#define INT13_FDD_SECTORS( geometry ) ( (geometry)->heads_spt & 0x3f )
-
-/** A floppy drive parameter table */
-struct int13_fdd_parameters {
-	uint8_t step_rate__head_unload;
-	uint8_t head_load__ndma;
-	uint8_t motor_off_delay;
-	uint8_t bytes_per_sector;
-	uint8_t sectors_per_track;
-	uint8_t gap_length;
-	uint8_t data_length;
-	uint8_t format_gap_length;
-	uint8_t format_filler;
-	uint8_t head_settle_time;
-	uint8_t motor_start_time;
+/** A bootable entry in the El Torito Boot Catalog */
+struct eltorito_boot_entry {
+	/** Boot indicator
+	 *
+	 * Must be @c ELTORITO_BOOTABLE for a bootable ISO image
+	 */
+	uint8_t indicator;
+	/** Media type
+	 *
+	 */
+	uint8_t media_type;
+	/** Load segment */
+	uint16_t load_segment;
+	/** System type */
+	uint8_t filesystem;
+	/** Unused */
+	uint8_t reserved_a;
+	/** Sector count */
+	uint16_t length;
+	/** Starting sector */
+	uint32_t start;
+	/** Unused */
+	uint8_t reserved_b[20];
 } __attribute__ (( packed ));
 
+/** Boot indicator for a bootable ISO image */
+#define ELTORITO_BOOTABLE 0x88
+
+/** El Torito media types */
+enum eltorito_media_type {
+	/** No emulation */
+	ELTORITO_NO_EMULATION = 0,
+};
+
 #endif /* INT13_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/bios_reboot.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/bios_reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/bios_reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/bios_reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_BIOS_REBOOT_H
-#define _IPXE_BIOS_REBOOT_H
-
-/** @file
- *
- * Standard PC-BIOS reboot mechanism
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef REBOOT_PCBIOS
-#define REBOOT_PREFIX_pcbios
-#else
-#define REBOOT_PREFIX_pcbios __pcbios_
-#endif
-
-#endif /* _IPXE_BIOS_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/errno/pcbios.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/errno/pcbios.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/errno/pcbios.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/errno/pcbios.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,115 +0,0 @@
-#ifndef _IPXE_ERRNO_PCBIOS_H
-#define _IPXE_ERRNO_PCBIOS_H
-
-/**
- * @file
- *
- * PC-BIOS platform error codes
- *
- * We use the PXE-specified error codes as the platform error codes
- * for the PC-BIOS platform.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <pxe_error.h>
-
-/**
- * Convert platform error code to platform component of iPXE error code
- *
- * @v platform		Platform error code
- * @ret errno		Platform component of iPXE error code
- */
-#define PLATFORM_TO_ERRNO( platform ) ( (platform) & 0xff )
-
-/**
- * Convert iPXE error code to platform error code
- *
- * @v errno		iPXE error code
- * @ret platform	Platform error code
- */
-#define ERRNO_TO_PLATFORM( errno ) ( (errno) & 0xff )
-
-/* Platform-specific error codes */
-#define PLATFORM_ENOERR		PXENV_STATUS_SUCCESS
-#define PLATFORM_E2BIG		PXENV_STATUS_BAD_FUNC
-#define PLATFORM_EACCES		PXENV_STATUS_TFTP_ACCESS_VIOLATION
-#define PLATFORM_EADDRINUSE	PXENV_STATUS_UDP_OPEN
-#define PLATFORM_EADDRNOTAVAIL	PXENV_STATUS_UDP_OPEN
-#define PLATFORM_EAFNOSUPPORT	PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_EAGAIN		PXENV_STATUS_FAILURE
-#define PLATFORM_EALREADY	PXENV_STATUS_UDP_OPEN
-#define PLATFORM_EBADF		PXENV_STATUS_TFTP_CLOSED
-#define PLATFORM_EBADMSG	PXENV_STATUS_FAILURE
-#define PLATFORM_EBUSY		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ECANCELED	PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE
-#define PLATFORM_ECHILD		PXENV_STATUS_TFTP_FILE_NOT_FOUND
-#define PLATFORM_ECONNABORTED	PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION
-#define PLATFORM_ECONNREFUSED	PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION
-#define PLATFORM_ECONNRESET	PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION
-#define PLATFORM_EDEADLK	PXENV_STATUS_FAILURE
-#define PLATFORM_EDESTADDRREQ	PXENV_STATUS_BAD_FUNC
-#define PLATFORM_EDOM		PXENV_STATUS_FAILURE
-#define PLATFORM_EDQUOT		PXENV_STATUS_FAILURE
-#define PLATFORM_EEXIST		PXENV_STATUS_FAILURE
-#define PLATFORM_EFAULT		PXENV_STATUS_MCOPY_PROBLEM
-#define PLATFORM_EFBIG		PXENV_STATUS_MCOPY_PROBLEM
-#define PLATFORM_EHOSTUNREACH	PXENV_STATUS_ARP_TIMEOUT
-#define PLATFORM_EIDRM		PXENV_STATUS_FAILURE
-#define PLATFORM_EILSEQ		PXENV_STATUS_FAILURE
-#define PLATFORM_EINPROGRESS	PXENV_STATUS_FAILURE
-#define PLATFORM_EINTR		PXENV_STATUS_FAILURE
-#define PLATFORM_EINVAL		PXENV_STATUS_BAD_FUNC
-#define PLATFORM_EIO		PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION
-#define PLATFORM_EISCONN	PXENV_STATUS_UDP_OPEN
-#define PLATFORM_EISDIR		PXENV_STATUS_FAILURE
-#define PLATFORM_ELOOP		PXENV_STATUS_FAILURE
-#define PLATFORM_EMFILE		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_EMLINK		PXENV_STATUS_FAILURE
-#define PLATFORM_EMSGSIZE	PXENV_STATUS_BAD_FUNC
-#define PLATFORM_EMULTIHOP	PXENV_STATUS_FAILURE
-#define PLATFORM_ENAMETOOLONG	PXENV_STATUS_FAILURE
-#define PLATFORM_ENETDOWN	PXENV_STATUS_ARP_TIMEOUT
-#define PLATFORM_ENETRESET	PXENV_STATUS_FAILURE
-#define PLATFORM_ENETUNREACH	PXENV_STATUS_ARP_TIMEOUT
-#define PLATFORM_ENFILE		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ENOBUFS	PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ENODATA	PXENV_STATUS_FAILURE
-#define PLATFORM_ENODEV		PXENV_STATUS_TFTP_FILE_NOT_FOUND
-#define PLATFORM_ENOENT		PXENV_STATUS_TFTP_FILE_NOT_FOUND
-#define PLATFORM_ENOEXEC	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOLCK		PXENV_STATUS_FAILURE
-#define PLATFORM_ENOLINK	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOMEM		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ENOMSG		PXENV_STATUS_FAILURE
-#define PLATFORM_ENOPROTOOPT	PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_ENOSPC		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ENOSR		PXENV_STATUS_OUT_OF_RESOURCES
-#define PLATFORM_ENOSTR		PXENV_STATUS_FAILURE
-#define PLATFORM_ENOSYS		PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_ENOTCONN	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOTDIR	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOTEMPTY	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOTSOCK	PXENV_STATUS_FAILURE
-#define PLATFORM_ENOTSUP	PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_ENOTTY		PXENV_STATUS_FAILURE
-#define PLATFORM_ENXIO		PXENV_STATUS_TFTP_FILE_NOT_FOUND
-#define PLATFORM_EOPNOTSUPP	PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_EOVERFLOW	PXENV_STATUS_FAILURE
-#define PLATFORM_EPERM		PXENV_STATUS_TFTP_ACCESS_VIOLATION
-#define PLATFORM_EPIPE		PXENV_STATUS_FAILURE
-#define PLATFORM_EPROTO		PXENV_STATUS_FAILURE
-#define PLATFORM_EPROTONOSUPPORT PXENV_STATUS_UNSUPPORTED
-#define PLATFORM_EPROTOTYPE	PXENV_STATUS_FAILURE
-#define PLATFORM_ERANGE		PXENV_STATUS_FAILURE
-#define PLATFORM_EROFS		PXENV_STATUS_FAILURE
-#define PLATFORM_ESPIPE		PXENV_STATUS_FAILURE
-#define PLATFORM_ESRCH		PXENV_STATUS_TFTP_FILE_NOT_FOUND
-#define PLATFORM_ESTALE		PXENV_STATUS_FAILURE
-#define PLATFORM_ETIME		PXENV_STATUS_FAILURE
-#define PLATFORM_ETIMEDOUT	PXENV_STATUS_TFTP_READ_TIMEOUT
-#define PLATFORM_ETXTBSY	PXENV_STATUS_FAILURE
-#define PLATFORM_EWOULDBLOCK	PXENV_STATUS_TFTP_OPEN
-#define PLATFORM_EXDEV		PXENV_STATUS_FAILURE
-
-#endif /* _IPXE_ERRNO_PCBIOS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/guestrpc.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/guestrpc.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/guestrpc.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/guestrpc.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,68 +0,0 @@
-#ifndef _IPXE_GUESTRPC_H
-#define _IPXE_GUESTRPC_H
-
-/** @file
- *
- * VMware GuestRPC mechanism
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/vmware.h>
-
-/** GuestRPC magic number */
-#define GUESTRPC_MAGIC 0x49435052 /* "RPCI" */
-
-/** Open RPC channel */
-#define GUESTRPC_OPEN 0x00
-
-/** Open RPC channel success status */
-#define GUESTRPC_OPEN_SUCCESS 0x00010000
-
-/** Send RPC command length */
-#define GUESTRPC_COMMAND_LEN 0x01
-
-/** Send RPC command length success status */
-#define GUESTRPC_COMMAND_LEN_SUCCESS 0x00810000
-
-/** Send RPC command data */
-#define GUESTRPC_COMMAND_DATA 0x02
-
-/** Send RPC command data success status */
-#define GUESTRPC_COMMAND_DATA_SUCCESS 0x00010000
-
-/** Receive RPC reply length */
-#define GUESTRPC_REPLY_LEN 0x03
-
-/** Receive RPC reply length success status */
-#define GUESTRPC_REPLY_LEN_SUCCESS 0x00830000
-
-/** Receive RPC reply data */
-#define GUESTRPC_REPLY_DATA 0x04
-
-/** Receive RPC reply data success status */
-#define GUESTRPC_REPLY_DATA_SUCCESS 0x00010000
-
-/** Finish receiving RPC reply */
-#define GUESTRPC_REPLY_FINISH 0x05
-
-/** Finish receiving RPC reply success status */
-#define GUESTRPC_REPLY_FINISH_SUCCESS 0x00010000
-
-/** Close RPC channel */
-#define GUESTRPC_CLOSE 0x06
-
-/** Close RPC channel success status */
-#define GUESTRPC_CLOSE_SUCCESS 0x00010000
-
-/** RPC command success status */
-#define GUESTRPC_SUCCESS 0x2031 /* "1 " */
-
-extern int guestrpc_open ( void );
-extern void guestrpc_close ( int channel );
-extern int guestrpc_command ( int channel, const char *command, char *reply,
-			      size_t reply_len );
-
-#endif /* _IPXE_GUESTRPC_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/rtc_entropy.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/rtc_entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/rtc_entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/rtc_entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,62 +0,0 @@
-#ifndef _IPXE_RTC_ENTROPY_H
-#define _IPXE_RTC_ENTROPY_H
-
-/** @file
- *
- * RTC-based entropy source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-#ifdef ENTROPY_RTC
-#define ENTROPY_PREFIX_rtc
-#else
-#define ENTROPY_PREFIX_rtc __rtc_
-#endif
-
-/**
- * min-entropy per sample
- *
- * @ret min_entropy	min-entropy of each sample
- */
-static inline __always_inline double
-ENTROPY_INLINE ( rtc, min_entropy_per_sample ) ( void ) {
-
-	/* The min-entropy has been measured on several platforms
-	 * using the entropy_sample test code.  Modelling the samples
-	 * as independent, and using a confidence level of 99.99%, the
-	 * measurements were as follows:
-	 *
-	 *    qemu-kvm		: 7.38 bits
-	 *    VMware		: 7.46 bits
-	 *    Physical hardware	: 2.67 bits
-	 *
-	 * We choose the lowest of these (2.67 bits) and apply a 50%
-	 * safety margin to allow for some potential non-independence
-	 * of samples.
-	 */
-	return 1.3;
-}
-
-extern uint8_t rtc_sample ( void );
-
-/**
- * Get noise sample
- *
- * @ret noise		Noise sample
- * @ret rc		Return status code
- */
-static inline __always_inline int
-ENTROPY_INLINE ( rtc, get_noise ) ( noise_sample_t *noise ) {
-
-	/* Get sample */
-	*noise = rtc_sample();
-
-	/* Always successful */
-	return 0;
-}
-
-#endif /* _IPXE_RTC_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/rtc_time.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/rtc_time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/rtc_time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/rtc_time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_RTC_TIME_H
-#define _IPXE_RTC_TIME_H
-
-/** @file
- *
- * RTC-based time source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef TIME_RTC
-#define TIME_PREFIX_rtc
-#else
-#define TIME_PREFIX_rtc __rtc_
-#endif
-
-#endif /* _IPXE_RTC_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/vmware.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/vmware.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/vmware.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/vmware.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,81 +0,0 @@
-#ifndef _IPXE_VMWARE_H
-#define _IPXE_VMWARE_H
-
-/** @file
- *
- * VMware backdoor mechanism
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-/** VMware backdoor I/O port */
-#define VMW_PORT 0x5658
-
-/** VMware backdoor magic value */
-#define VMW_MAGIC 0x564d5868 /* "VMXh" */
-
-/** VMware backdoor magic instruction */
-#define VMW_BACKDOOR "inl %%dx, %%eax"
-
-/** Get VMware version */
-#define VMW_CMD_GET_VERSION 0x0a
-
-/** Issue GuestRPC command */
-#define VMW_CMD_GUESTRPC 0x1e
-
-/**
- * Get VMware version
- *
- * @ret version		VMware version(?)
- * @ret magic		VMware magic number, if present
- * @ret product_type	VMware product type
- */
-static inline __attribute__ (( always_inline )) void
-vmware_cmd_get_version ( uint32_t *version, uint32_t *magic,
-			 uint32_t *product_type ) {
-	uint32_t discard_d;
-
-	/* Perform backdoor call */
-	__asm__ __volatile__ ( VMW_BACKDOOR
-			       : "=a" ( *version ), "=b" ( *magic ),
-				 "=c" ( *product_type ), "=d" ( discard_d )
-			       : "0" ( VMW_MAGIC ), "1" ( 0 ),
-				 "2" ( VMW_CMD_GET_VERSION ),
-				 "3" ( VMW_PORT ) );
-}
-
-/**
- * Issue GuestRPC command
- *
- * @v channel		Channel number
- * @v subcommand	GuestRPC subcommand
- * @v parameter		Subcommand-specific parameter
- * @ret edxhi		Subcommand-specific result
- * @ret ebx		Subcommand-specific result
- * @ret status		Command status
- */
-static inline __attribute__ (( always_inline )) uint32_t
-vmware_cmd_guestrpc ( int channel, uint16_t subcommand, uint32_t parameter,
-		      uint16_t *edxhi, uint32_t *ebx ) {
-	uint32_t discard_a;
-	uint32_t status;
-	uint32_t edx;
-
-	/* Perform backdoor call */
-	__asm__ __volatile__ ( VMW_BACKDOOR
-			       : "=a" ( discard_a ), "=b" ( *ebx ),
-				 "=c" ( status ), "=d" ( edx )
-			       : "0" ( VMW_MAGIC ), "1" ( parameter ),
-				 "2" ( VMW_CMD_GUESTRPC | ( subcommand << 16 )),
-				 "3" ( VMW_PORT | ( channel << 16 ) ) );
-	*edxhi = ( edx >> 16 );
-
-	return status;
-}
-
-extern int vmware_present ( void );
-
-#endif /* _IPXE_VMWARE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/x86_io.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/x86_io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/ipxe/x86_io.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/ipxe/x86_io.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,153 @@
+#ifndef _IPXE_X86_IO_H
+#define _IPXE_X86_IO_H
+
+/** @file
+ *
+ * iPXE I/O API for x86
+ *
+ * i386 uses direct pointer dereferences for accesses to memory-mapped
+ * I/O space, and the inX/outX instructions for accesses to
+ * port-mapped I/O space.
+ *
+ * 64-bit atomic accesses (readq() and writeq()) use MMX instructions,
+ * and will crash original Pentium and earlier CPUs.  Fortunately, no
+ * hardware that requires atomic 64-bit accesses will physically fit
+ * into a machine with such an old CPU anyway.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifdef IOAPI_X86
+#define IOAPI_PREFIX_x86
+#else
+#define IOAPI_PREFIX_x86 __x86_
+#endif
+
+/*
+ * Memory space mappings
+ *
+ */
+
+/*
+ * Physical<->Bus and Bus<->I/O address mappings
+ *
+ */
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( x86, phys_to_bus ) ( unsigned long phys_addr ) {
+	return phys_addr;
+}
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( x86, bus_to_phys ) ( unsigned long bus_addr ) {
+	return bus_addr;
+}
+
+static inline __always_inline void *
+IOAPI_INLINE ( x86, ioremap ) ( unsigned long bus_addr, size_t len __unused ) {
+	return phys_to_virt ( bus_addr );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( x86, iounmap ) ( volatile const void *io_addr __unused ) {
+	/* Nothing to do */
+}
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( x86, io_to_bus ) ( volatile const void *io_addr ) {
+	return virt_to_phys ( io_addr );
+}
+
+/*
+ * MMIO reads and writes up to 32 bits
+ *
+ */
+
+#define X86_READX( _api_func, _type )					      \
+static inline __always_inline _type					      \
+IOAPI_INLINE ( x86, _api_func ) ( volatile _type *io_addr ) {		      \
+	return *io_addr;						      \
+}
+X86_READX ( readb, uint8_t );
+X86_READX ( readw, uint16_t );
+X86_READX ( readl, uint32_t );
+
+#define X86_WRITEX( _api_func, _type )					      \
+static inline __always_inline void					      \
+IOAPI_INLINE ( x86, _api_func ) ( _type data,				      \
+				  volatile _type *io_addr ) {		      \
+	*io_addr = data;						      \
+}
+X86_WRITEX ( writeb, uint8_t );
+X86_WRITEX ( writew, uint16_t );
+X86_WRITEX ( writel, uint32_t );
+
+/*
+ * PIO reads and writes up to 32 bits
+ *
+ */
+
+#define X86_INX( _insn_suffix, _type, _reg_prefix )			      \
+static inline __always_inline _type					      \
+IOAPI_INLINE ( x86, in ## _insn_suffix ) ( volatile _type *io_addr ) {	      \
+	_type data;							      \
+	__asm__ __volatile__ ( "in" #_insn_suffix " %w1, %" _reg_prefix "0"   \
+			       : "=a" ( data ) : "Nd" ( io_addr ) );	      \
+	return data;							      \
+}									      \
+static inline __always_inline void					      \
+IOAPI_INLINE ( x86, ins ## _insn_suffix ) ( volatile _type *io_addr,	      \
+					    _type *data,		      \
+					    unsigned int count ) {	      \
+	unsigned int discard_D;						      \
+	__asm__ __volatile__ ( "rep ins" #_insn_suffix			      \
+			       : "=D" ( discard_D )			      \
+			       : "d" ( io_addr ), "c" ( count ),	      \
+				 "0" ( data ) );			      \
+}
+X86_INX ( b, uint8_t, "b" );
+X86_INX ( w, uint16_t, "w" );
+X86_INX ( l, uint32_t, "k" );
+
+#define X86_OUTX( _insn_suffix, _type, _reg_prefix )			      \
+static inline __always_inline void					      \
+IOAPI_INLINE ( x86, out ## _insn_suffix ) ( _type data,			      \
+					    volatile _type *io_addr ) {	      \
+	__asm__ __volatile__ ( "out" #_insn_suffix " %" _reg_prefix "0, %w1"  \
+			       : : "a" ( data ), "Nd" ( io_addr ) );	      \
+}									      \
+static inline __always_inline void					      \
+IOAPI_INLINE ( x86, outs ## _insn_suffix ) ( volatile _type *io_addr,	      \
+					     const _type *data,		      \
+					     unsigned int count ) {	      \
+	unsigned int discard_S;						      \
+	__asm__ __volatile__ ( "rep outs" #_insn_suffix			      \
+			       : "=S" ( discard_S )			      \
+			       : "d" ( io_addr ), "c" ( count ),	      \
+				 "0" ( data ) );			      \
+}
+X86_OUTX ( b, uint8_t, "b" );
+X86_OUTX ( w, uint16_t, "w" );
+X86_OUTX ( l, uint32_t, "k" );
+
+/*
+ * Slow down I/O
+ *
+ */
+
+static inline __always_inline void
+IOAPI_INLINE ( x86, iodelay ) ( void ) {
+	__asm__ __volatile__ ( "outb %al, $0x80" );
+}
+
+/*
+ * Memory barrier
+ *
+ */
+
+static inline __always_inline void
+IOAPI_INLINE ( x86, mb ) ( void ) {
+	__asm__ __volatile__ ( "lock; addl $0, 0(%%esp)" : : : "memory" );
+}
+
+#endif /* _IPXE_X86_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/librm.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/librm.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/librm.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/librm.h	2012-01-06 23:49:04.000000000 +0000
@@ -68,12 +68,6 @@
 	return trivial_userptr_add ( userptr, offset );
 }
 
-static inline __always_inline off_t
-UACCESS_INLINE ( librm, userptr_sub ) ( userptr_t userptr,
-					userptr_t subtrahend ) {
-	return trivial_userptr_sub ( userptr, subtrahend );
-}
-
 static inline __always_inline void
 UACCESS_INLINE ( librm, memcpy_user ) ( userptr_t dest, off_t dest_off,
 					userptr_t src, off_t src_off,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pic8259.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/pic8259.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pic8259.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/pic8259.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,8 +9,6 @@
 #ifndef PIC8259_H
 #define PIC8259_H
 
-#include <ipxe/io.h>
-
 /* For segoff_t */
 #include "realmode.h"
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe_api.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe_api.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe_api.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe_api.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * As an alternative, at your option, you may use this file under the
  * following terms, known as the "MIT license":
@@ -1691,27 +1690,6 @@
 
 /** @} */ /* pxenv_file_exit_hook */
 
-/** @defgroup pxenv_file_cmdline PXENV_FILE_CMDLINE
- *
- * FILE CMDLINE
- *
- * @{
- */
-
-/** PXE API function code for pxenv_file_cmdline() */
-#define PXENV_FILE_CMDLINE			0x00e8
-
-/** Parameter block for pxenv_file_cmdline() */
-struct s_PXENV_FILE_CMDLINE {
-	PXENV_STATUS_t Status;		/**< PXE status code */
-	UINT16_t BufferSize;		/**< Data buffer size */
-	SEGOFF16_t Buffer;		/**< Data buffer */
-} __attribute__ (( packed ));
-
-typedef struct s_PXENV_FILE_CMDLINE PXENV_FILE_CMDLINE_t;
-
-/** @} */ /* pxe_file_cmdline */
-
 /** @} */ /* pxe_file_api */
 
 /** @defgroup pxe_loader_api PXE Loader API
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe_error.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe_error.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe_error.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe_error.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,123 +0,0 @@
-#ifndef PXE_ERROR_H
-#define PXE_ERROR_H
-
-/** @file
- *
- * Preboot eXecution Environment (PXE) error definitions
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @defgroup pxeerrors PXE error codes
- *
- * @{
- */
-
-/* Generic errors */
-#define	PXENV_STATUS_SUCCESS					       0x0000
-#define	PXENV_STATUS_FAILURE					       0x0001
-#define	PXENV_STATUS_BAD_FUNC					       0x0002
-#define	PXENV_STATUS_UNSUPPORTED				       0x0003
-#define	PXENV_STATUS_KEEP_UNDI					       0x0004
-#define	PXENV_STATUS_KEEP_ALL					       0x0005
-#define	PXENV_STATUS_OUT_OF_RESOURCES				       0x0006
-
-/* ARP errors (0x0010 to 0x001f) */
-#define	PXENV_STATUS_ARP_TIMEOUT				       0x0011
-
-/* Base-Code state errors */
-#define	PXENV_STATUS_UDP_CLOSED					       0x0018
-#define	PXENV_STATUS_UDP_OPEN					       0x0019
-#define	PXENV_STATUS_TFTP_CLOSED				       0x001a
-#define	PXENV_STATUS_TFTP_OPEN					       0x001b
-
-/* BIOS/system errors (0x0020 to 0x002f) */
-#define	PXENV_STATUS_MCOPY_PROBLEM				       0x0020
-#define	PXENV_STATUS_BIS_INTEGRITY_FAILURE			       0x0021
-#define	PXENV_STATUS_BIS_VALIDATE_FAILURE			       0x0022
-#define	PXENV_STATUS_BIS_INIT_FAILURE				       0x0023
-#define	PXENV_STATUS_BIS_SHUTDOWN_FAILURE			       0x0024
-#define	PXENV_STATUS_BIS_GBOA_FAILURE				       0x0025
-#define	PXENV_STATUS_BIS_FREE_FAILURE				       0x0026
-#define	PXENV_STATUS_BIS_GSI_FAILURE				       0x0027
-#define	PXENV_STATUS_BIS_BAD_CKSUM				       0x0028
-
-/* TFTP/MTFTP errors (0x0030 to 0x003f) */
-#define	PXENV_STATUS_TFTP_CANNOT_ARP_ADDRESS			       0x0030
-#define	PXENV_STATUS_TFTP_OPEN_TIMEOUT				       0x0032
-#define	PXENV_STATUS_TFTP_UNKNOWN_OPCODE			       0x0033
-#define	PXENV_STATUS_TFTP_READ_TIMEOUT				       0x0035
-#define	PXENV_STATUS_TFTP_ERROR_OPCODE				       0x0036
-#define	PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION		       0x0038
-#define	PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION		       0x0039
-#define	PXENV_STATUS_TFTP_TOO_MANY_PACKAGES			       0x003a
-#define	PXENV_STATUS_TFTP_FILE_NOT_FOUND			       0x003b
-#define	PXENV_STATUS_TFTP_ACCESS_VIOLATION			       0x003c
-#define	PXENV_STATUS_TFTP_NO_MCAST_ADDRESS			       0x003d
-#define	PXENV_STATUS_TFTP_NO_FILESIZE				       0x003e
-#define	PXENV_STATUS_TFTP_INVALID_PACKET_SIZE			       0x003f
-
-/* Reserved errors 0x0040 to 0x004f) */
-
-/* DHCP/BOOTP errors (0x0050 to 0x005f) */
-#define	PXENV_STATUS_DHCP_TIMEOUT				       0x0051
-#define	PXENV_STATUS_DHCP_NO_IP_ADDRESS				       0x0052
-#define	PXENV_STATUS_DHCP_NO_BOOTFILE_NAME			       0x0053
-#define	PXENV_STATUS_DHCP_BAD_IP_ADDRESS			       0x0054
-
-/* Driver errors (0x0060 to 0x006f) */
-#define	PXENV_STATUS_UNDI_INVALID_FUNCTION			       0x0060
-#define	PXENV_STATUS_UNDI_MEDIATEST_FAILED			       0x0061
-#define	PXENV_STATUS_UNDI_CANNOT_INIT_NIC_FOR_MCAST		       0x0062
-#define	PXENV_STATUS_UNDI_CANNOT_INITIALIZE_NIC			       0x0063
-#define	PXENV_STATUS_UNDI_CANNOT_INITIALIZE_PHY			       0x0064
-#define	PXENV_STATUS_UNDI_CANNOT_READ_CONFIG_DATA		       0x0065
-#define	PXENV_STATUS_UNDI_CANNOT_READ_INIT_DATA			       0x0066
-#define	PXENV_STATUS_UNDI_BAD_MAC_ADDRESS			       0x0067
-#define	PXENV_STATUS_UNDI_BAD_EEPROM_CHECKSUM			       0x0068
-#define	PXENV_STATUS_UNDI_ERROR_SETTING_ISR			       0x0069
-#define	PXENV_STATUS_UNDI_INVALID_STATE				       0x006a
-#define	PXENV_STATUS_UNDI_TRANSMIT_ERROR			       0x006b
-#define	PXENV_STATUS_UNDI_INVALID_PARAMETER			       0x006c
-
-/* ROM and NBP bootstrap errors (0x0070 to 0x007f) */
-#define	PXENV_STATUS_BSTRAP_PROMPT_MENU				       0x0074
-#define	PXENV_STATUS_BSTRAP_MCAST_ADDR				       0x0076
-#define	PXENV_STATUS_BSTRAP_MISSING_LIST			       0x0077
-#define	PXENV_STATUS_BSTRAP_NO_RESPONSE				       0x0078
-#define	PXENV_STATUS_BSTRAP_FILE_TOO_BIG			       0x0079
-
-/* Environment NBP errors (0x0080 to 0x008f) */
-
-/* Reserved errors (0x0090 to 0x009f) */
-
-/* Miscellaneous errors (0x00a0 to 0x00af) */
-#define	PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE			       0x00a0
-#define	PXENV_STATUS_BINL_NO_PXE_SERVER				       0x00a1
-#define	PXENV_STATUS_NOT_AVAILABLE_IN_PMODE			       0x00a2
-#define	PXENV_STATUS_NOT_AVAILABLE_IN_RMODE			       0x00a3
-
-/* BUSD errors (0x00b0 to 0x00bf) */
-#define	PXENV_STATUS_BUSD_DEVICE_NOT_SUPPORTED			       0x00b0
-
-/* Loader errors (0x00c0 to 0x00cf) */
-#define	PXENV_STATUS_LOADER_NO_FREE_BASE_MEMORY			       0x00c0
-#define	PXENV_STATUS_LOADER_NO_BC_ROMID				       0x00c1
-#define	PXENV_STATUS_LOADER_BAD_BC_ROMID			       0x00c2
-#define	PXENV_STATUS_LOADER_BAD_BC_RUNTIME_IMAGE		       0x00c3
-#define	PXENV_STATUS_LOADER_NO_UNDI_ROMID			       0x00c4
-#define	PXENV_STATUS_LOADER_BAD_UNDI_ROMID			       0x00c5
-#define	PXENV_STATUS_LOADER_BAD_UNDI_DRIVER_IMAGE		       0x00c6
-#define	PXENV_STATUS_LOADER_NO_PXE_STRUCT			       0x00c8
-#define	PXENV_STATUS_LOADER_NO_PXENV_STRUCT			       0x00c9
-#define	PXENV_STATUS_LOADER_UNDI_START				       0x00ca
-#define	PXENV_STATUS_LOADER_BC_START				       0x00cb
-
-/** @} */
-
-/** Derive PXENV_STATUS code from iPXE error number */
-#define PXENV_STATUS( rc ) ( (-(rc)) & 0x00ff )
-
-#endif /* PXE_ERROR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/pxe.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/pxe.h	2012-01-06 23:49:04.000000000 +0000
@@ -4,7 +4,6 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include "pxe_types.h"
-#include "pxe_error.h"
 #include "pxe_api.h"
 #include <ipxe/device.h>
 #include <ipxe/tables.h>
@@ -189,7 +188,6 @@
 	( ( 'P' << 0 ) + ( 'C' << 8 ) + ( 'I' << 16 ) + ( 'R' << 24 ) )
 
 extern struct net_device *pxe_netdev;
-extern const char *pxe_cmdline;
 
 extern void pxe_set_netdev ( struct net_device *netdev );
 extern PXENV_EXIT_t pxenv_tftp_read_file ( struct s_PXENV_TFTP_READ_FILE
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/rtc.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/rtc.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/rtc.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/rtc.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,83 +0,0 @@
-#ifndef _RTC_H
-#define _RTC_H
-
-/** @file
- *
- * CMOS Real-Time Clock (RTC)
- *
- * The CMOS/RTC registers are documented (with varying degrees of
- * accuracy and consistency) at
- *
- *    http://www.nondot.org/sabre/os/files/MiscHW/RealtimeClockFAQ.txt
- *    http://wiki.osdev.org/RTC
- *    http://wiki.osdev.org/CMOS
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <pic8259.h>
-
-/** RTC IRQ */
-#define RTC_IRQ 8
-
-/** RTC interrupt vector */
-#define RTC_INT IRQ_INT ( RTC_IRQ )
-
-/** CMOS/RTC address (and NMI) register */
-#define CMOS_ADDRESS 0x70
-
-/** NMI disable bit */
-#define CMOS_DISABLE_NMI 0x80
-
-/** CMOS/RTC data register */
-#define CMOS_DATA 0x71
-
-/** RTC seconds */
-#define RTC_SEC 0x00
-
-/** RTC minutes */
-#define RTC_MIN 0x02
-
-/** RTC hours */
-#define RTC_HOUR 0x04
-
-/** RTC weekday */
-#define RTC_WDAY 0x06
-
-/** RTC day of month */
-#define RTC_MDAY 0x07
-
-/** RTC month */
-#define RTC_MON 0x08
-
-/** RTC year */
-#define RTC_YEAR 0x09
-
-/** RTC status register A */
-#define RTC_STATUS_A 0x0a
-
-/** RTC update in progress bit */
-#define RTC_STATUS_A_UPDATE_IN_PROGRESS 0x80
-
-/** RTC status register B */
-#define RTC_STATUS_B 0x0b
-
-/** RTC 24 hour format bit */
-#define RTC_STATUS_B_24_HOUR 0x02
-
-/** RTC binary mode bit */
-#define RTC_STATUS_B_BINARY 0x04
-
-/** RTC Periodic Interrupt Enabled bit */
-#define RTC_STATUS_B_PIE 0x40
-
-/** RTC status register C */
-#define RTC_STATUS_C 0x0c
-
-/** RTC status register D */
-#define RTC_STATUS_D 0x0d
-
-/** CMOS default address */
-#define CMOS_DEFAULT_ADDRESS RTC_STATUS_D
-
-#endif /* _RTC_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/sdi.h ipxe-1.0.1~lliurex1505/src/arch/i386/include/sdi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/include/sdi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/include/sdi.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,39 +0,0 @@
-#ifndef _SDI_H
-#define _SDI_H
-
-/** @file
- *
- * System Deployment Image (SDI)
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** SDI image header */
-struct sdi_header {
-	/** Signature */
-	uint32_t magic;
-	/** Version (as an ASCII string) */
-	uint32_t version;
-	/** Reserved */
-	uint8_t reserved[8];
-	/** Boot code offset */
-	uint64_t boot_offset;
-	/** Boot code size */
-	uint64_t boot_size;
-} __attribute__ (( packed ));
-
-/** SDI image signature */
-#define SDI_MAGIC \
-	( ( '$' << 0 ) | ( 'S' << 8 ) | ( 'D' << 16 ) | ( 'I' << 24 ) )
-
-/** SDI boot segment */
-#define SDI_BOOT_SEG 0x0000
-
-/** SDI boot offset */
-#define SDI_BOOT_OFF 0x7c00
-
-/** Constant to binary-OR with physical address of SDI image */
-#define SDI_WTF 0x41
-
-#endif /* _SDI_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/apm.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/apm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/apm.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/apm.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,108 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * Advanced Power Management
- *
- */
-
-#include <errno.h>
-#include <realmode.h>
-#include <ipxe/reboot.h>
-
-/**
- * Power off the computer using APM
- *
- * @ret rc		Return status code
- */
-static int apm_poweroff ( void ) {
-	uint16_t apm_version;
-	uint16_t apm_signature;
-	uint16_t apm_flags;
-	uint16_t carry;
-
-	/* APM check */
-	__asm__ __volatile__ ( REAL_CODE ( "int $0x15\n\t"
-	                                   "adc %%edx,0\n\t" )
-	                       : "=a" ( apm_version ), "=b" ( apm_signature ),
-                                 "=c" ( apm_flags ), "=d" ( carry )
-	                       : "a" ( 0x5300 ), "b" ( 0x0000 ),
-				 "d" ( 0x0000 ) );
-	if ( carry ) {
-		DBG ( "APM not present\n" );
-		return -ENOTSUP;
-	}
-	if ( apm_signature != 0x504d ) { /* signature 'PM' */
-		DBG ( "APM not present\n" );
-		return -ENOTSUP;
-	}
-	if ( apm_version < 0x0101 ) { /* Need version 1.1+ */
-		DBG ( "APM 1.1+ not supported\n" );
-		return -ENOTSUP;
-	}
-	if ( ( apm_flags & 0x8 ) == 0x8 ) {
-		DBG ( "APM power management disabled\n" );
-		return -EPERM;
-	}
-	DBG2 ( "APM check completed\n" );
-
-	/* APM initialisation */
-	__asm__ __volatile__ ( REAL_CODE ( "int $0x15\n\t"
-	                                   "adc %%edx,0\n\t" )
-	                       : "=d" ( carry )
-	                       : "a" ( 0x5301 ), "b" ( 0x0000 ),
-	                         "d" ( 0x0000 ) );
-	if ( carry ) {
-		DBG ( "APM initialisation failed\n" );
-		return -EIO;
-	}
-	DBG2 ( "APM initialisation completed\n" );
-
-	/* Set APM driver version */
-	__asm__ __volatile__ ( REAL_CODE ( "int $0x15\n\t"
-	                                   "adc %%edx,0\n\t" )
-	                       : "=d" ( carry )
-	                       : "a" ( 0x530e ), "b" ( 0x0000 ),
-	                         "c" ( 0x0101 ), "d" ( 0x0000 ) );
-	if ( carry ) {
-		DBG ( "APM setting driver version failed\n" );
-		return -EIO;
-	}
-	DBG2 ( "APM driver version set\n" );
-
-	/* Setting power state to off */
-	__asm__ __volatile__ ( REAL_CODE ( "int $0x15\n\t"
-	                                   "adc %%edx,0\n\t" )
-	                       : "=d" ( carry )
-	                       : "a" ( 0x5307 ), "b" ( 0x0001 ),
-	                         "c" ( 0x0003 ), "d" ( 0x0000) );
-	if ( carry ) {
-		DBG ( "APM setting power state failed\n" );
-		return -ENOTTY;
-	}
-
-	/* Should never happen */
-	return -ECANCELED;
-}
-
-PROVIDE_REBOOT ( pcbios, poweroff, apm_poweroff );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_reboot.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_reboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_reboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_reboot.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,48 +0,0 @@
-/*
- * Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Standard PC-BIOS reboot mechanism
- *
- */
-
-#include <ipxe/reboot.h>
-#include <realmode.h>
-#include <bios.h>
-
-/**
- * Reboot system
- *
- * @v warm		Perform a warm reboot
- */
-static void bios_reboot ( int warm ) {
-	uint16_t flag;
-
-	/* Configure BIOS for cold/warm reboot */
-	flag = ( warm ? BDA_REBOOT_WARM : 0 );
-	put_real ( flag, BDA_SEG, BDA_REBOOT );
-
-	/* Jump to system reset vector */
-	__asm__ __volatile__ ( REAL_CODE ( "ljmp $0xf000, $0xfff0" ) : : );
-}
-
-PROVIDE_REBOOT ( pcbios, reboot, bios_reboot );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_smbios.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_smbios.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_smbios.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_smbios.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -77,8 +76,6 @@
 		smbios->address = phys_to_user ( u.entry.smbios_address );
 		smbios->len = u.entry.smbios_len;
 		smbios->count = u.entry.smbios_count;
-		smbios->version =
-			SMBIOS_VERSION ( u.entry.major, u.entry.minor );
 		return 0;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_timer.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_timer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/bios_timer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/bios_timer.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/int13.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/int13.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/int13.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/int13.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -38,8 +37,6 @@
 #include <ipxe/sanboot.h>
 #include <ipxe/device.h>
 #include <ipxe/pci.h>
-#include <ipxe/iso9660.h>
-#include <ipxe/eltorito.h>
 #include <realmode.h>
 #include <bios.h>
 #include <biosint.h>
@@ -78,9 +75,9 @@
 	/** Underlying block device interface */
 	struct interface block;
 
-	/** BIOS in-use drive number (0x00-0xff) */
+	/** BIOS in-use drive number (0x80-0xff) */
 	unsigned int drive;
-	/** BIOS natural drive number (0x00-0xff)
+	/** BIOS natural drive number (0x80-0xff)
 	 *
 	 * This is the drive number that would have been assigned by
 	 * 'naturally' appending the drive to the end of the BIOS
@@ -145,44 +142,17 @@
 /** Assembly wrapper */
 extern void int13_wrapper ( void );
 
-/** Dummy floppy disk parameter table */
-static struct int13_fdd_parameters __data16 ( int13_fdd_params ) = {
-	/* 512 bytes per sector */
-	.bytes_per_sector = 0x02,
-	/* Highest sectors per track that we ever return */
-	.sectors_per_track = 48,
-};
-#define int13_fdd_params __use_data16 ( int13_fdd_params )
-
 /** List of registered emulated drives */
 static LIST_HEAD ( int13s );
 
 /**
- * Equipment word
- *
- * This is a cached copy of the BIOS Data Area equipment word at
- * 40:10.
- */
-static uint16_t equipment_word;
-
-/**
- * Number of BIOS floppy disk drives
+ * Number of BIOS drives
  *
- * This is derived from the equipment word.  It is held in .text16 to
- * allow for easy access by the INT 13,08 wrapper.
+ * Note that this is the number of drives in the system as a whole
+ * (i.e. a mirror of the counter at 40:75), rather than a count of the
+ * number of emulated drives.
  */
-static uint8_t __text16 ( num_fdds );
-#define num_fdds __use_text16 ( num_fdds )
-
-/**
- * Number of BIOS hard disk drives
- *
- * This is a cached copy of the BIOS Data Area number of hard disk
- * drives at 40:75.  It is held in .text16 to allow for easy access by
- * the INT 13,08 wrapper.
- */
-static uint8_t __text16 ( num_drives );
-#define num_drives __use_text16 ( num_drives )
+static uint8_t num_drives;
 
 /**
  * Calculate INT 13 drive sector size
@@ -190,7 +160,7 @@
  * @v int13		Emulated drive
  * @ret blksize		Sector size
  */
-static inline size_t int13_blksize ( struct int13_drive *int13 ) {
+static inline unsigned int int13_blksize ( struct int13_drive *int13 ) {
 	return ( int13->capacity.blksize << int13->blksize_shift );
 }
 
@@ -215,16 +185,6 @@
 	return ( ( capacity <= 0xffffffffUL ) ? capacity : 0xffffffff );
 }
 
-/**
- * Test if INT 13 drive is a floppy disk drive
- *
- * @v int13		Emulated drive
- * @ret is_fdd		Emulated drive is a floppy disk
- */
-static inline int int13_is_fdd ( struct int13_drive *int13 ) {
-	return ( ! ( int13->drive & 0x80 ) );
-}
-
 /** An INT 13 command */
 struct int13_command {
 	/** Status */
@@ -539,33 +499,33 @@
 }
 
 /**
- * Guess INT 13 hard disk drive geometry
+ * Guess INT 13 drive geometry
  *
  * @v int13		Emulated drive
  * @v scratch		Scratch area for single-sector reads
- * @ret heads		Guessed number of heads
- * @ret sectors		Guessed number of sectors per track
  * @ret rc		Return status code
  *
  * Guesses the drive geometry by inspecting the partition table.
  */
-static int int13_guess_geometry_hdd ( struct int13_drive *int13, void *scratch,
-				      unsigned int *heads,
-				      unsigned int *sectors ) {
+static int int13_guess_geometry ( struct int13_drive *int13, void *scratch ) {
 	struct master_boot_record *mbr = scratch;
 	struct partition_table_entry *partition;
+	unsigned int guessed_heads = 255;
+	unsigned int guessed_sectors_per_track = 63;
+	unsigned int blocks;
+	unsigned int blocks_per_cyl;
 	unsigned int i;
 	int rc;
 
-	/* Default guess is xx/255/63 */
-	*heads = 255;
-	*sectors = 63;
+	/* Don't even try when the blksize is invalid for C/H/S access */
+	if ( int13_blksize ( int13 ) != INT13_BLKSIZE )
+		return 0;
 
 	/* Read partition table */
 	if ( ( rc = int13_rw ( int13, 0, 1, virt_to_user ( mbr ),
 			       block_read ) ) != 0 ) {
-		DBGC ( int13, "INT13 drive %02x could not read "
-		       "partition table to guess geometry: %s\n",
+		DBGC ( int13, "INT13 drive %02x could not read partition "
+		       "table to guess geometry: %s\n",
 		       int13->drive, strerror ( rc ) );
 		return rc;
 	}
@@ -574,126 +534,25 @@
 	DBGC ( int13, "INT13 drive %02x has signature %08x\n",
 	       int13->drive, mbr->signature );
 
-	/* Scan through partition table and modify guesses for
-	 * heads and sectors_per_track if we find any used
-	 * partitions.
+	/* Scan through partition table and modify guesses for heads
+	 * and sectors_per_track if we find any used partitions.
 	 */
 	for ( i = 0 ; i < 4 ; i++ ) {
 		partition = &mbr->partitions[i];
 		if ( ! partition->type )
 			continue;
-		*heads = ( PART_HEAD ( partition->chs_end ) + 1 );
-		*sectors = PART_SECTOR ( partition->chs_end );
+		guessed_heads = ( PART_HEAD ( partition->chs_end ) + 1 );
+		guessed_sectors_per_track = PART_SECTOR ( partition->chs_end );
 		DBGC ( int13, "INT13 drive %02x guessing C/H/S xx/%d/%d based "
-		       "on partition %d\n",
-		       int13->drive, *heads, *sectors, ( i + 1 ) );
-	}
-
-	return 0;
-}
-
-/** Recognised floppy disk geometries */
-static const struct int13_fdd_geometry int13_fdd_geometries[] = {
-	INT13_FDD_GEOMETRY ( 40, 1, 8 ),
-	INT13_FDD_GEOMETRY ( 40, 1, 9 ),
-	INT13_FDD_GEOMETRY ( 40, 2, 8 ),
-	INT13_FDD_GEOMETRY ( 40, 1, 9 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 8 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 9 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 15 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 18 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 20 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 21 ),
-	INT13_FDD_GEOMETRY ( 82, 2, 21 ),
-	INT13_FDD_GEOMETRY ( 83, 2, 21 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 22 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 23 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 24 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 36 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 39 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 40 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 44 ),
-	INT13_FDD_GEOMETRY ( 80, 2, 48 ),
-};
-
-/**
- * Guess INT 13 floppy disk drive geometry
- *
- * @v int13		Emulated drive
- * @ret heads		Guessed number of heads
- * @ret sectors		Guessed number of sectors per track
- * @ret rc		Return status code
- *
- * Guesses the drive geometry by inspecting the disk size.
- */
-static int int13_guess_geometry_fdd ( struct int13_drive *int13,
-				      unsigned int *heads,
-				      unsigned int *sectors ) {
-	unsigned int blocks = int13_capacity ( int13 );
-	const struct int13_fdd_geometry *geometry;
-	unsigned int cylinders;
-	unsigned int i;
-
-	/* Look for a match against a known geometry */
-	for ( i = 0 ; i < ( sizeof ( int13_fdd_geometries ) /
-			    sizeof ( int13_fdd_geometries[0] ) ) ; i++ ) {
-		geometry = &int13_fdd_geometries[i];
-		cylinders = INT13_FDD_CYLINDERS ( geometry );
-		*heads = INT13_FDD_HEADS ( geometry );
-		*sectors = INT13_FDD_SECTORS ( geometry );
-		if ( ( cylinders * (*heads) * (*sectors) ) == blocks ) {
-			DBGC ( int13, "INT13 drive %02x guessing C/H/S "
-			       "%d/%d/%d based on size %dK\n", int13->drive,
-			       cylinders, *heads, *sectors, ( blocks / 2 ) );
-			return 0;
-		}
-	}
-
-	/* Otherwise, assume a partial disk image in the most common
-	 * format (1440K, 80/2/18).
-	 */
-	*heads = 2;
-	*sectors = 18;
-	DBGC ( int13, "INT13 drive %02x guessing C/H/S xx/%d/%d based on size "
-	       "%dK\n", int13->drive, *heads, *sectors, ( blocks / 2 ) );
-	return 0;
-}
-
-/**
- * Guess INT 13 drive geometry
- *
- * @v int13		Emulated drive
- * @v scratch		Scratch area for single-sector reads
- * @ret rc		Return status code
- */
-static int int13_guess_geometry ( struct int13_drive *int13, void *scratch ) {
-	unsigned int guessed_heads;
-	unsigned int guessed_sectors;
-	unsigned int blocks;
-	unsigned int blocks_per_cyl;
-	int rc;
-
-	/* Don't even try when the blksize is invalid for C/H/S access */
-	if ( int13_blksize ( int13 ) != INT13_BLKSIZE )
-		return 0;
-
-	/* Guess geometry according to drive type */
-	if ( int13_is_fdd ( int13 ) ) {
-		if ( ( rc = int13_guess_geometry_fdd ( int13, &guessed_heads,
-						       &guessed_sectors )) != 0)
-			return rc;
-	} else {
-		if ( ( rc = int13_guess_geometry_hdd ( int13, scratch,
-						       &guessed_heads,
-						       &guessed_sectors )) != 0)
-			return rc;
+		       "on partition %d\n", int13->drive, guessed_heads,
+		       guessed_sectors_per_track, ( i + 1 ) );
 	}
 
 	/* Apply guesses if no geometry already specified */
 	if ( ! int13->heads )
 		int13->heads = guessed_heads;
 	if ( ! int13->sectors_per_track )
-		int13->sectors_per_track = guessed_sectors;
+		int13->sectors_per_track = guessed_sectors_per_track;
 	if ( ! int13->cylinders ) {
 		/* Avoid attempting a 64-bit divide on a 32-bit system */
 		blocks = int13_capacity32 ( int13 );
@@ -710,40 +569,19 @@
 /**
  * Update BIOS drive count
  */
-static void int13_sync_num_drives ( void ) {
+static void int13_set_num_drives ( void ) {
 	struct int13_drive *int13;
-	uint8_t *counter;
-	uint8_t max_drive;
-	uint8_t required;
 
-	/* Get current drive counts */
-	get_real ( equipment_word, BDA_SEG, BDA_EQUIPMENT_WORD );
+	/* Get current drive count */
 	get_real ( num_drives, BDA_SEG, BDA_NUM_DRIVES );
-	num_fdds = ( ( equipment_word & 0x0001 ) ?
-		     ( ( ( equipment_word >> 6 ) & 0x3 ) + 1 ) : 0 );
 
 	/* Ensure count is large enough to cover all of our emulated drives */
 	list_for_each_entry ( int13, &int13s, list ) {
-		counter = ( int13_is_fdd ( int13 ) ? &num_fdds : &num_drives );
-		max_drive = int13->drive;
-		if ( max_drive < int13->natural_drive )
-			max_drive = int13->natural_drive;
-		required = ( ( max_drive & 0x7f ) + 1 );
-		if ( *counter < required ) {
-			*counter = required;
-			DBGC ( int13, "INT13 drive %02x added to drive count: "
-			       "%d HDDs, %d FDDs\n",
-			       int13->drive, num_drives, num_fdds );
-		}
+		if ( num_drives <= ( int13->drive & 0x7f ) )
+			num_drives = ( ( int13->drive & 0x7f ) + 1 );
 	}
 
 	/* Update current drive count */
-	equipment_word &= ~( ( 0x3 << 6 ) | 0x0001 );
-	if ( num_fdds ) {
-		equipment_word |= ( 0x0001 |
-				    ( ( ( num_fdds - 1 ) & 0x3 ) << 6 ) );
-	}
-	put_real ( equipment_word, BDA_SEG, BDA_EQUIPMENT_WORD );
 	put_real ( num_drives, BDA_SEG, BDA_NUM_DRIVES );
 }
 
@@ -751,14 +589,13 @@
  * Check number of drives
  */
 static void int13_check_num_drives ( void ) {
-	uint16_t check_equipment_word;
 	uint8_t check_num_drives;
 
-	get_real ( check_equipment_word, BDA_SEG, BDA_EQUIPMENT_WORD );
 	get_real ( check_num_drives, BDA_SEG, BDA_NUM_DRIVES );
-	if ( ( check_equipment_word != equipment_word ) ||
-	     ( check_num_drives != num_drives ) ) {
-		int13_sync_num_drives();
+	if ( check_num_drives != num_drives ) {
+		int13_set_num_drives();
+		DBG ( "INT13 fixing up number of drives from %d to %d\n",
+		      check_num_drives, num_drives );
 	}
 }
 
@@ -832,19 +669,14 @@
 		       int13->drive, int13_blksize ( int13 ) );
 		return -INT13_STATUS_INVALID;
 	}
-
+	
 	/* Calculate parameters */
 	cylinder = ( ( ( ix86->regs.cl & 0xc0 ) << 2 ) | ix86->regs.ch );
+	assert ( cylinder < int13->cylinders );
 	head = ix86->regs.dh;
+	assert ( head < int13->heads );
 	sector = ( ix86->regs.cl & 0x3f );
-	if ( ( cylinder >= int13->cylinders ) ||
-	     ( head >= int13->heads ) ||
-	     ( sector < 1 ) || ( sector > int13->sectors_per_track ) ) {
-		DBGC ( int13, "C/H/S %d/%d/%d out of range for geometry "
-		       "%d/%d/%d\n", cylinder, head, sector, int13->cylinders,
-		       int13->heads, int13->sectors_per_track );
-		return -INT13_STATUS_INVALID;
-	}
+	assert ( ( sector >= 1 ) && ( sector <= int13->sectors_per_track ) );
 	lba = ( ( ( ( cylinder * int13->heads ) + head )
 		  * int13->sectors_per_track ) + sector - 1 );
 	count = ix86->regs.al;
@@ -929,19 +761,10 @@
 		return -INT13_STATUS_INVALID;
 	}
 
-	/* Common parameters */
 	ix86->regs.ch = ( max_cylinder & 0xff );
 	ix86->regs.cl = ( ( ( max_cylinder >> 8 ) << 6 ) | max_sector );
 	ix86->regs.dh = max_head;
-	ix86->regs.dl = ( int13_is_fdd ( int13 ) ? num_fdds : num_drives );
-
-	/* Floppy-specific parameters */
-	if ( int13_is_fdd ( int13 ) ) {
-		ix86->regs.bl = INT13_FDD_TYPE_1M44;
-		ix86->segs.es = rm_ds;
-		ix86->regs.di = __from_data16 ( &int13_fdd_params );
-	}
-
+	get_real ( ix86->regs.dl, BDA_SEG, BDA_NUM_DRIVES );
 	return 0;
 }
 
@@ -958,15 +781,10 @@
 	uint32_t blocks;
 
 	DBGC2 ( int13, "Get disk type\n" );
-
-	if ( int13_is_fdd ( int13 ) ) {
-		return INT13_DISK_TYPE_FDD;
-	} else {
-		blocks = int13_capacity32 ( int13 );
-		ix86->regs.cx = ( blocks >> 16 );
-		ix86->regs.dx = ( blocks & 0xffff );
-		return INT13_DISK_TYPE_HDD;
-	}
+	blocks = int13_capacity32 ( int13 );
+	ix86->regs.cx = ( blocks >> 16 );
+	ix86->regs.dx = ( blocks & 0xffff );
+	return INT13_DISK_TYPE_HDD;
 }
 
 /**
@@ -1015,13 +833,6 @@
 	userptr_t buffer;
 	int rc;
 
-	/* Extended reads are not allowed on floppy drives.
-	 * ELTORITO.SYS seems to assume that we are really a CD-ROM if
-	 * we support extended reads for a floppy drive.
-	 */
-	if ( int13_is_fdd ( int13 ) )
-		return -INT13_STATUS_INVALID;
-
 	/* Get buffer size */
 	get_real ( bufsize, ix86->segs.ds,
 		   ( ix86->regs.si + offsetof ( typeof ( addr ), bufsize ) ) );
@@ -1489,28 +1300,26 @@
 			     "popw 6(%%bp)\n\t"
 			     /* Fix up %dl:
 			      *
-			      * INT 13,15 : do nothing if hard disk
+			      * INT 13,15 : do nothing
 			      * INT 13,08 : load with number of drives
 			      * all others: restore original value
 			      */
 			     "cmpb $0x15, -1(%%bp)\n\t"
-			     "jne 2f\n\t"
-			     "testb $0x80, -4(%%bp)\n\t"
-			     "jnz 3f\n\t"
-			     "\n2:\n\t"
+			     "je 2f\n\t"
 			     "movb -4(%%bp), %%dl\n\t"
 			     "cmpb $0x08, -1(%%bp)\n\t"
-			     "jne 3f\n\t"
-			     "testb $0x80, %%dl\n\t"
-			     "movb %%cs:num_drives, %%dl\n\t"
-			     "jnz 3f\n\t"
-			     "movb %%cs:num_fdds, %%dl\n\t"
+			     "jne 2f\n\t"
+			     "pushw %%ds\n\t"
+			     "pushw %1\n\t"
+			     "popw %%ds\n\t"
+			     "movb %c2, %%dl\n\t"
+			     "popw %%ds\n\t"
 			     /* Return */
-			     "\n3:\n\t"
+			     "\n2:\n\t"
 			     "movw %%bp, %%sp\n\t"
 			     "popw %%bp\n\t"
 			     "iret\n\t" )
-	       : : "i" ( int13 ) );
+	       : : "i" ( int13 ), "i" ( BDA_SEG ), "i" ( BDA_NUM_DRIVES ) );
 
 	hook_bios_interrupt ( 0x13, ( unsigned int ) int13_wrapper,
 			      &int13_vector );
@@ -1595,13 +1404,14 @@
  */
 static int int13_hook ( struct uri *uri, unsigned int drive ) {
 	struct int13_drive *int13;
+	uint8_t num_drives;
 	unsigned int natural_drive;
 	void *scratch;
 	int rc;
 
 	/* Calculate natural drive number */
-	int13_sync_num_drives();
-	natural_drive = ( ( drive & 0x80 ) ? ( num_drives | 0x80 ) : num_fdds );
+	get_real ( num_drives, BDA_SEG, BDA_NUM_DRIVES );
+	natural_drive = ( num_drives | 0x80 );
 
 	/* Check that drive number is not in use */
 	list_for_each_entry ( int13, &int13s, list ) {
@@ -1658,7 +1468,7 @@
 	list_add ( &int13->list, &int13s );
 
 	/* Update BIOS drive count */
-	int13_sync_num_drives();
+	int13_set_num_drives();
 
 	free ( scratch );
 	return 0;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/memtop_umalloc.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/memtop_umalloc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/memtop_umalloc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/memtop_umalloc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -31,7 +30,6 @@
 #include <ipxe/uaccess.h>
 #include <ipxe/hidemem.h>
 #include <ipxe/io.h>
-#include <ipxe/memblock.h>
 #include <ipxe/umalloc.h>
 
 /** Alignment of external allocated memory */
@@ -54,20 +52,56 @@
 /** Bottom of heap (current lowest allocated block) */
 static userptr_t bottom = UNULL;
 
-/** Remaining space on heap */
-static size_t heap_size;
-
 /**
  * Initialise external heap
  *
+ * @ret rc		Return status code
  */
-static void init_eheap ( void ) {
-	userptr_t base;
+static int init_eheap ( void ) {
+	struct memory_map memmap;
+	unsigned long heap_size = 0;
+	unsigned int i;
+
+	DBG ( "Allocating external heap\n" );
+
+	get_memmap ( &memmap );
+	for ( i = 0 ; i < memmap.count ; i++ ) {
+		struct memory_region *region = &memmap.regions[i];
+		unsigned long r_start, r_end;
+		unsigned long r_size;
+
+		DBG ( "Considering [%llx,%llx)\n", region->start, region->end);
+
+		/* Truncate block to 4GB */
+		if ( region->start > UINT_MAX ) {
+			DBG ( "...starts after 4GB\n" );
+			continue;
+		}
+		r_start = region->start;
+		if ( region->end > UINT_MAX ) {
+			DBG ( "...end truncated to 4GB\n" );
+			r_end = 0; /* =4GB, given the wraparound */
+		} else {
+			r_end = region->end;
+		}
+
+		/* Use largest block */
+		r_size = ( r_end - r_start );
+		if ( r_size > heap_size ) {
+			DBG ( "...new best block found\n" );
+			top = bottom = phys_to_user ( r_end );
+			heap_size = r_size;
+		}
+	}
+
+	if ( ! heap_size ) {
+		DBG ( "No external heap available\n" );
+		return -ENOMEM;
+	}
 
-	heap_size = largest_memblock ( &base );
-	bottom = top = userptr_add ( base, heap_size );
-	DBG ( "External heap grows downwards from %lx (size %zx)\n",
-	      user_to_phys ( top, 0 ), heap_size );
+	DBG ( "External heap grows downwards from %lx\n",
+	      user_to_phys ( top, 0 ) );
+	return 0;
 }
 
 /**
@@ -76,7 +110,6 @@
  */
 static void ecollect_free ( void ) {
 	struct external_memory extmem;
-	size_t len;
 
 	/* Walk the free list and collect empty blocks */
 	while ( bottom != top ) {
@@ -86,9 +119,8 @@
 			break;
 		DBG ( "EXTMEM freeing [%lx,%lx)\n", user_to_phys ( bottom, 0 ),
 		      user_to_phys ( bottom, extmem.size ) );
-		len = ( extmem.size + sizeof ( extmem ) );
-		bottom = userptr_add ( bottom, len );
-		heap_size += len;
+		bottom = userptr_add ( bottom,
+				       ( extmem.size + sizeof ( extmem ) ) );
 	}
 }
 
@@ -106,10 +138,13 @@
 	struct external_memory extmem;
 	userptr_t new = ptr;
 	size_t align;
+	int rc;
 
-	/* (Re)initialise external memory allocator if necessary */
-	if ( bottom == top )
-		init_eheap();
+	/* Initialise external memory allocator if necessary */
+	if ( bottom == top ) {
+		if ( ( rc = init_eheap() ) != 0 )
+			return UNULL;
+	}
 
 	/* Get block properties into extmem */
 	if ( ptr && ( ptr != UNOWHERE ) ) {
@@ -118,12 +153,7 @@
 				 sizeof ( extmem ) );
 	} else {
 		/* Create a zero-length block */
-		if ( heap_size < sizeof ( extmem ) ) {
-			DBG ( "EXTMEM out of space\n" );
-			return UNULL;
-		}
 		ptr = bottom = userptr_add ( bottom, -sizeof ( extmem ) );
-		heap_size -= sizeof ( extmem );
 		DBG ( "EXTMEM allocating [%lx,%lx)\n",
 		      user_to_phys ( ptr, 0 ), user_to_phys ( ptr, 0 ) );
 		extmem.size = 0;
@@ -133,10 +163,6 @@
 	/* Expand/shrink block if possible */
 	if ( ptr == bottom ) {
 		/* Update block */
-		if ( new_size > ( heap_size - extmem.size ) ) {
-			DBG ( "EXTMEM out of space\n" );
-			return UNULL;
-		}
 		new = userptr_add ( ptr, - ( new_size - extmem.size ) );
 		align = ( user_to_phys ( new, 0 ) & ( EM_ALIGN - 1 ) );
 		new_size += align;
@@ -148,9 +174,8 @@
 		      user_to_phys ( new, new_size ));
 		memmove_user ( new, 0, ptr, 0, ( ( extmem.size < new_size ) ?
 						 extmem.size : new_size ) );
-		bottom = new;
-		heap_size -= ( new_size - extmem.size );
 		extmem.size = new_size;
+		bottom = new;
 	} else {
 		/* Cannot expand; can only pretend to shrink */
 		if ( new_size > extmem.size ) {
@@ -168,8 +193,7 @@
 
 	/* Collect any free blocks and update hidden memory region */
 	ecollect_free();
-	hide_umalloc ( user_to_phys ( bottom, ( ( bottom == top ) ?
-						0 : -sizeof ( extmem ) ) ),
+	hide_umalloc ( user_to_phys ( bottom, -sizeof ( extmem ) ),
 		       user_to_phys ( top, 0 ) );
 
 	return ( new_size ? new : UNOWHERE );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/pcibios.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/pcibios.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/pcibios.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/pcibios.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/rtc_entropy.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/rtc_entropy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/rtc_entropy.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/rtc_entropy.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,199 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * RTC-based entropy source
- *
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <biosint.h>
-#include <pic8259.h>
-#include <rtc.h>
-#include <ipxe/entropy.h>
-
-/** RTC "interrupt triggered" flag */
-static uint8_t __text16 ( rtc_flag );
-#define rtc_flag __use_text16 ( rtc_flag )
-
-/** RTC interrupt handler */
-extern void rtc_isr ( void );
-
-/** Previous RTC interrupt handler */
-static struct segoff rtc_old_handler;
-
-/**
- * Hook RTC interrupt handler
- *
- */
-static void rtc_hook_isr ( void ) {
-
-	/* RTC interrupt handler */
-	__asm__ __volatile__ (
-		TEXT16_CODE ( "\nrtc_isr:\n\t"
-			      /* Preserve registers */
-			      "pushw %%ax\n\t"
-			      /* Set "interrupt triggered" flag */
-			      "cs movb $0x01, %c0\n\t"
-			      /* Read RTC status register C to
-			       * acknowledge interrupt
-			       */
-			      "movb %3, %%al\n\t"
-			      "outb %%al, %1\n\t"
-			      "inb %2\n\t"
-			      /* Send EOI */
-			      "movb $0x20, %%al\n\t"
-			      "outb %%al, $0xa0\n\t"
-			      "outb %%al, $0x20\n\t"
-			      /* Restore registers and return */
-			      "popw %%ax\n\t"
-			      "iret\n\t" )
-		:
-		: "p" ( __from_text16 ( &rtc_flag ) ),
-		  "i" ( CMOS_ADDRESS ), "i" ( CMOS_DATA ),
-		  "i" ( RTC_STATUS_C ) );
-
-	hook_bios_interrupt ( RTC_INT, ( unsigned int ) rtc_isr,
-			      &rtc_old_handler );
-}
-
-/**
- * Unhook RTC interrupt handler
- *
- */
-static void rtc_unhook_isr ( void ) {
-	int rc;
-
-	rc = unhook_bios_interrupt ( RTC_INT, ( unsigned int ) rtc_isr,
-				     &rtc_old_handler );
-	assert ( rc == 0 ); /* Should always be able to unhook */
-}
-
-/**
- * Enable RTC interrupts
- *
- */
-static void rtc_enable_int ( void ) {
-	uint8_t status_b;
-
-	/* Set Periodic Interrupt Enable bit in status register B */
-	outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
-	status_b = inb ( CMOS_DATA );
-	outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
-	outb ( ( status_b | RTC_STATUS_B_PIE ), CMOS_DATA );
-
-	/* Re-enable NMI and reset to default address */
-	outb ( CMOS_DEFAULT_ADDRESS, CMOS_ADDRESS );
-	inb ( CMOS_DATA ); /* Discard; may be needed on some platforms */
-}
-
-/**
- * Disable RTC interrupts
- *
- */
-static void rtc_disable_int ( void ) {
-	uint8_t status_b;
-
-	/* Clear Periodic Interrupt Enable bit in status register B */
-	outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
-	status_b = inb ( CMOS_DATA );
-	outb ( ( RTC_STATUS_B | CMOS_DISABLE_NMI ), CMOS_ADDRESS );
-	outb ( ( status_b & ~RTC_STATUS_B_PIE ), CMOS_DATA );
-
-	/* Re-enable NMI and reset to default address */
-	outb ( CMOS_DEFAULT_ADDRESS, CMOS_ADDRESS );
-	inb ( CMOS_DATA ); /* Discard; may be needed on some platforms */
-}
-
-/**
- * Enable entropy gathering
- *
- * @ret rc		Return status code
- */
-static int rtc_entropy_enable ( void ) {
-
-	rtc_hook_isr();
-	enable_irq ( RTC_IRQ );
-	rtc_enable_int();
-
-	return 0;
-}
-
-/**
- * Disable entropy gathering
- *
- */
-static void rtc_entropy_disable ( void ) {
-
-	rtc_disable_int();
-	disable_irq ( RTC_IRQ );
-	rtc_unhook_isr();
-}
-
-/**
- * Measure a single RTC tick
- *
- * @ret delta		Length of RTC tick (in TSC units)
- */
-uint8_t rtc_sample ( void ) {
-	uint32_t before;
-	uint32_t after;
-	uint32_t temp;
-
-	__asm__ __volatile__ (
-		REAL_CODE ( /* Enable interrupts */
-			    "sti\n\t"
-			    /* Wait for RTC interrupt */
-			    "cs movb %b2, %c4\n\t"
-			    "\n1:\n\t"
-			    "cs xchgb %b2, %c4\n\t" /* Serialize */
-			    "testb %b2, %b2\n\t"
-			    "jz 1b\n\t"
-			    /* Read "before" TSC */
-			    "rdtsc\n\t"
-			    /* Store "before" TSC on stack */
-			    "pushl %0\n\t"
-			    /* Wait for another RTC interrupt */
-			    "xorb %b2, %b2\n\t"
-			    "cs movb %b2, %c4\n\t"
-			    "\n1:\n\t"
-			    "cs xchgb %b2, %c4\n\t" /* Serialize */
-			    "testb %b2, %b2\n\t"
-			    "jz 1b\n\t"
-			    /* Read "after" TSC */
-			    "rdtsc\n\t"
-			    /* Retrieve "before" TSC on stack */
-			    "popl %1\n\t"
-			    /* Disable interrupts */
-			    "cli\n\t"
-			    )
-		: "=a" ( after ), "=d" ( before ), "=q" ( temp )
-		: "2" ( 0 ), "p" ( __from_text16 ( &rtc_flag ) ) );
-
-	return ( after - before );
-}
-
-PROVIDE_ENTROPY_INLINE ( rtc, min_entropy_per_sample );
-PROVIDE_ENTROPY ( rtc, entropy_enable, rtc_entropy_enable );
-PROVIDE_ENTROPY ( rtc, entropy_disable, rtc_entropy_disable );
-PROVIDE_ENTROPY_INLINE ( rtc, get_noise );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/rtc_time.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/rtc_time.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pcbios/rtc_time.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pcbios/rtc_time.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,138 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * RTC-based time source
- *
- */
-
-#include <stdint.h>
-#include <time.h>
-#include <rtc.h>
-#include <ipxe/time.h>
-
-/**
- * Read RTC register
- *
- * @v address		Register address
- * @ret data		Data
- */
-static unsigned int rtc_readb ( int address ) {
-	outb ( address, CMOS_ADDRESS );
-	return inb ( CMOS_DATA );
-}
-
-/**
- * Check if RTC update is in progress
- *
- * @ret is_busy		RTC update is in progress
- */
-static int rtc_is_busy ( void ) {
-	return ( rtc_readb ( RTC_STATUS_A ) & RTC_STATUS_A_UPDATE_IN_PROGRESS );
-}
-
-/**
- * Read RTC BCD register
- *
- * @v address		Register address
- * @ret value		Value
- */
-static unsigned int rtc_readb_bcd ( int address ) {
-	unsigned int bcd;
-
-	bcd = rtc_readb ( address );
-	return ( bcd - ( 6 * ( bcd >> 4 ) ) );
-}
-
-/**
- * Read RTC time
- *
- * @ret time		Time, in seconds
- */
-static time_t rtc_read_time ( void ) {
-	unsigned int status_b;
-	int is_binary;
-	int is_24hour;
-	unsigned int ( * read_component ) ( int address );
-	struct tm tm;
-	int is_pm;
-	unsigned int hour;
-	time_t time;
-
-	/* Wait for any in-progress update to complete */
-	while ( rtc_is_busy() ) {}
-
-	/* Determine RTC mode */
-	status_b = rtc_readb ( RTC_STATUS_B );
-	is_binary = ( status_b & RTC_STATUS_B_BINARY );
-	is_24hour = ( status_b & RTC_STATUS_B_24_HOUR );
-	read_component = ( is_binary ? rtc_readb : rtc_readb_bcd );
-
-	/* Read time values */
-	tm.tm_sec = read_component ( RTC_SEC );
-	tm.tm_min = read_component ( RTC_MIN );
-	hour = read_component ( RTC_HOUR );
-	if ( ! is_24hour ) {
-		is_pm = ( hour >= 80 );
-		hour = ( ( ( ( hour & 0x7f ) % 80 ) % 12 ) +
-			 ( is_pm ? 12 : 0 ) );
-	}
-	tm.tm_hour = hour;
-	tm.tm_mday = read_component ( RTC_MDAY );
-	tm.tm_mon = ( read_component ( RTC_MON ) - 1 );
-	tm.tm_year = ( read_component ( RTC_YEAR ) +
-		       100 /* Assume we are in the 21st century, since
-			    * this code was written in 2012 */ );
-
-	DBGC ( RTC_STATUS_A, "RTCTIME is %04d-%02d-%02d %02d:%02d:%02d "
-	       "(%s,%d-hour)\n", ( tm.tm_year + 1900 ), ( tm.tm_mon + 1 ),
-	       tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec,
-	       ( is_binary ? "binary" : "BCD" ), ( is_24hour ? 24 : 12 ) );
-
-	/* Convert to seconds since the Epoch */
-	time = mktime ( &tm );
-
-	return time;
-}
-
-/**
- * Get current time in seconds
- *
- * @ret time		Time, in seconds
- */
-static time_t rtc_now ( void ) {
-	time_t time = 0;
-	time_t last_time;
-
-	/* Read time until we get two matching values in a row, in
-	 * case we end up reading a corrupted value in the middle of
-	 * an update.
-	 */
-	do {
-		last_time = time;
-		time = rtc_read_time();
-	} while ( time != last_time );
-
-	return time;
-}
-
-PROVIDE_TIME ( rtc, time_now, rtc_now );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_call.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_call.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_call.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_call.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -32,12 +31,6 @@
  * PXE API entry point
  */
 
-/* Disambiguate the various error causes */
-#define EINFO_EPXENBP							\
-	__einfo_uniqify ( EINFO_EPLATFORM, 0x01,			\
-			  "External PXE NBP error" )
-#define EPXENBP( status ) EPLATFORM ( EINFO_EPXENBP, status )
-
 /** Vector for chaining INT 1A */
 extern struct segoff __text16 ( pxe_int_1a_vector );
 #define pxe_int_1a_vector __use_text16 ( pxe_int_1a_vector )
@@ -263,7 +256,7 @@
 int pxe_start_nbp ( void ) {
 	int jmp;
 	int discard_b, discard_c, discard_d, discard_D;
-	uint16_t status;
+	uint16_t rc;
 
 	/* Allow restarting NBP via PXENV_RESTART_TFTP */
 	jmp = rmsetjmp ( pxe_restart_nbp );
@@ -271,26 +264,22 @@
 		DBG ( "Restarting NBP (%x)\n", jmp );
 
 	/* Far call to PXE NBP */
-	__asm__ __volatile__ ( REAL_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-					   "movw %%cx, %%es\n\t"
+	__asm__ __volatile__ ( REAL_CODE ( "movw %%cx, %%es\n\t"
 					   "pushw %%es\n\t"
 					   "pushw %%di\n\t"
 					   "sti\n\t"
 					   "lcall $0, $0x7c00\n\t"
-					   "popl %%ebp\n\t" /* discard */
-					   "popl %%ebp\n\t" /* gcc bug */ )
-			       : "=a" ( status ), "=b" ( discard_b ),
+					   "addw $4, %%sp\n\t" )
+			       : "=a" ( rc ), "=b" ( discard_b ),
 				 "=c" ( discard_c ), "=d" ( discard_d ),
 				 "=D" ( discard_D )
 			       : "a" ( 0 ), "b" ( __from_text16 ( &pxenv ) ),
 			         "c" ( rm_cs ),
 			         "d" ( virt_to_phys ( &pxenv ) ),
 				 "D" ( __from_text16 ( &ppxe ) )
-			       : "esi", "memory" );
-	if ( status )
-		return -EPXENBP ( status );
+			       : "esi", "ebp", "memory" );
 
-	return 0;
+	return rc;
 }
 
 REQUIRE_OBJECT ( pxe_preboot );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_entry.S ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_entry.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_entry.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_entry.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_exit_hook.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_exit_hook.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_exit_hook.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_exit_hook.c	2012-01-06 23:49:04.000000000 +0000
@@ -19,8 +19,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_file.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_file.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_file.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_file.c	2012-01-06 23:49:04.000000000 +0000
@@ -29,8 +29,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -234,42 +233,6 @@
 }
 
 /**
- * FILE CMDLINE
- *
- * @v file_cmdline			Pointer to a struct s_PXENV_FILE_CMDLINE
- * @v s_PXENV_FILE_CMDLINE::Buffer	Buffer to contain command line
- * @v s_PXENV_FILE_CMDLINE::BufferSize	Size of buffer
- * @ret #PXENV_EXIT_SUCCESS		Command was executed successfully
- * @ret #PXENV_EXIT_FAILURE		Command was not executed successfully
- * @ret s_PXENV_FILE_EXEC::Status	PXE status code
- * @ret s_PXENV_FILE_EXEC::BufferSize	Length of command line (including NUL)
- *
- */
-static PXENV_EXIT_t
-pxenv_file_cmdline ( struct s_PXENV_FILE_CMDLINE *file_cmdline ) {
-	userptr_t buffer;
-	size_t max_len;
-	size_t len;
-
-	DBG ( "PXENV_FILE_CMDLINE to %04x:%04x+%04x \"%s\"\n",
-	      file_cmdline->Buffer.segment, file_cmdline->Buffer.offset,
-	      file_cmdline->BufferSize, pxe_cmdline );
-
-	buffer = real_to_user ( file_cmdline->Buffer.segment,
-				file_cmdline->Buffer.offset );
-	len = file_cmdline->BufferSize;
-	max_len = ( pxe_cmdline ?
-		    ( strlen ( pxe_cmdline ) + 1 /* NUL */ ) : 0 );
-	if ( len > max_len )
-		len = max_len;
-	copy_to_user ( buffer, 0, pxe_cmdline, len );
-	file_cmdline->BufferSize = max_len;
-
-	file_cmdline->Status = PXENV_STATUS_SUCCESS;
-	return PXENV_EXIT_SUCCESS;
-}
-
-/**
  * FILE API CHECK
  *
  * @v file_exec				Pointer to a struct s_PXENV_FILE_API_CHECK
@@ -335,8 +298,6 @@
 		       struct s_PXENV_GET_FILE_SIZE ),
 	PXE_API_CALL ( PXENV_FILE_EXEC, pxenv_file_exec,
 		       struct s_PXENV_FILE_EXEC ),
-	PXE_API_CALL ( PXENV_FILE_CMDLINE, pxenv_file_cmdline,
-		       struct s_PXENV_FILE_CMDLINE ),
 	PXE_API_CALL ( PXENV_FILE_API_CHECK, pxenv_file_api_check,
 		       struct s_PXENV_FILE_API_CHECK ),
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_loader.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_loader.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_loader.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_loader.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_preboot.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_preboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_preboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_preboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_tftp.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_tftp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_tftp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_tftp.c	2012-01-06 23:49:04.000000000 +0000
@@ -19,8 +19,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -72,17 +71,6 @@
 }
 
 /**
- * Check flow control window
- *
- * @v pxe_tftp		PXE TFTP connection
- * @ret len		Length of window
- */
-static size_t pxe_tftp_xfer_window ( struct pxe_tftp_connection *pxe_tftp ) {
-
-	return pxe_tftp->blksize;
-}
-
-/**
  * Receive new data
  *
  * @v pxe_tftp		PXE TFTP connection
@@ -139,8 +127,6 @@
 static struct interface_operation pxe_tftp_xfer_ops[] = {
 	INTF_OP ( xfer_deliver, struct pxe_tftp_connection *,
 		  pxe_tftp_xfer_deliver ),
-	INTF_OP ( xfer_window, struct pxe_tftp_connection *,
-		  pxe_tftp_xfer_window ),
 	INTF_OP ( intf_close, struct pxe_tftp_connection *, pxe_tftp_close ),
 };
 
@@ -180,19 +166,19 @@
 	/* Reset PXE TFTP connection structure */
 	memset ( &pxe_tftp, 0, sizeof ( pxe_tftp ) );
 	intf_init ( &pxe_tftp.xfer, &pxe_tftp_xfer_desc, NULL );
-	if ( blksize < TFTP_DEFAULT_BLKSIZE )
-		blksize = TFTP_DEFAULT_BLKSIZE;
-	pxe_tftp.blksize = blksize;
 	pxe_tftp.rc = -EINPROGRESS;
 
 	/* Construct URI string */
 	address.s_addr = ipaddress;
 	if ( ! port )
 		port = htons ( TFTP_PORT );
-	snprintf ( uri_string, sizeof ( uri_string ), "tftp%s://%s:%d%s%s",
-		   sizeonly ? "size" : "", inet_ntoa ( address ),
-		   ntohs ( port ), ( ( filename[0] == '/' ) ? "" : "/" ),
-		   filename );
+	if ( blksize < TFTP_DEFAULT_BLKSIZE )
+		blksize = TFTP_DEFAULT_BLKSIZE;
+	snprintf ( uri_string, sizeof ( uri_string ),
+		   "tftp%s://%s:%d%s%s?blksize=%zd",
+		   sizeonly ? "size" : "",
+		   inet_ntoa ( address ), ntohs ( port ),
+		   ( ( filename[0] == '/' ) ? "" : "/" ), filename, blksize );
 	DBG ( " %s", uri_string );
 
 	/* Open PXE TFTP connection */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_udp.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_udp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_udp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_udp.c	2012-01-06 23:49:04.000000000 +0000
@@ -28,8 +28,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_undi.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_undi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxe/pxe_undi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxe/pxe_undi.c	2012-01-06 23:49:04.000000000 +0000
@@ -19,8 +19,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -358,8 +357,7 @@
 	}
 
 	/* Allocate and fill I/O buffer */
-	iobuf = alloc_iob ( MAX_LL_HEADER_LEN +
-			    ( ( len > IOB_ZLEN ) ? len : IOB_ZLEN ) );
+	iobuf = alloc_iob ( MAX_LL_HEADER_LEN + len );
 	if ( ! iobuf ) {
 		DBGC2 ( &pxe_netdev, " could not allocate iobuf\n" );
 		undi_transmit->Status = PXENV_STATUS_OUT_OF_RESOURCES;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxeparent/pxeparent.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxeparent/pxeparent.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxeparent/pxeparent.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxeparent/pxeparent.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -31,12 +30,6 @@
  *
  */
 
-/* Disambiguate the various error causes */
-#define EINFO_EPXECALL							\
-	__einfo_uniqify ( EINFO_EPLATFORM, 0x01,			\
-			  "External PXE API error" )
-#define EPXECALL( status ) EPLATFORM ( EINFO_EPXECALL, status )
-
 /**
  * Name PXE API call
  *
@@ -143,24 +136,30 @@
 	/* Call real-mode entry point.  This calling convention will
 	 * work with both the !PXE and the PXENV+ entry points.
 	 */
-	__asm__ __volatile__ ( REAL_CODE ( "pushl %%ebp\n\t" /* gcc bug */
-					   "pushw %%es\n\t"
+	__asm__ __volatile__ ( REAL_CODE ( "pushw %%es\n\t"
 					   "pushw %%di\n\t"
 					   "pushw %%bx\n\t"
 					   "lcall *pxeparent_entry_point\n\t"
-					   "addw $6, %%sp\n\t"
-					   "popl %%ebp\n\t" /* gcc bug */ )
+					   "addw $6, %%sp\n\t" )
 			       : "=a" ( exit ), "=b" ( discard_b ),
 			         "=D" ( discard_D )
 			       : "b" ( function ),
 			         "D" ( __from_data16 ( &pxeparent_params ) )
-			       : "ecx", "edx", "esi" );
+			       : "ecx", "edx", "esi", "ebp" );
 
 	/* Determine return status code based on PXENV_EXIT and
 	 * PXENV_STATUS
 	 */
-	rc = ( ( exit == PXENV_EXIT_SUCCESS ) ?
-	       0 : -EPXECALL ( pxeparent_params.Status ) );
+	if ( exit == PXENV_EXIT_SUCCESS ) {
+		rc = 0;
+	} else {
+		rc = -pxeparent_params.Status;
+		/* Paranoia; don't return success for the combination
+		 * of PXENV_EXIT_FAILURE but PXENV_STATUS_SUCCESS
+		 */
+		if ( rc == 0 )
+			rc = -EIO;
+	}
 
 	/* If anything goes wrong, print as much debug information as
 	 * it's possible to give.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxeparent/pxeparent_dhcp.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxeparent/pxeparent_dhcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/pxeparent/pxeparent_dhcp.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/pxeparent/pxeparent_dhcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2009 Joshua Oreman <oremanj@rwcr.net>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <string.h>
+#include <ipxe/dhcp.h>
+#include <ipxe/netdevice.h>
+#include <undipreload.h>
+#include <pxeparent.h>
+#include <realmode.h>
+#include <pxe_api.h>
+
+/**
+ * Present cached DHCP packet if it exists
+ */
+void get_cached_dhcpack ( void ) {
+	struct undi_device *undi;
+	struct s_PXENV_GET_CACHED_INFO get_cached_info;
+	int rc;
+
+	/* Use preloaded UNDI device to get at PXE entry point */
+	undi = &preloaded_undi;
+	if ( ! undi->entry.segment ) {
+		DBG ( "PXEDHCP no preloaded UNDI device found\n" );
+		return;
+	}
+
+	/* Check that stack is available to get cached info */
+	if ( ! ( undi->flags & UNDI_FL_KEEP_ALL ) ) {
+		DBG ( "PXEDHCP stack was unloaded, no cache available\n" );
+		return;
+	}
+
+	/* Obtain cached DHCP packet */
+	memset ( &get_cached_info, 0, sizeof ( get_cached_info ) );
+	get_cached_info.PacketType = PXENV_PACKET_TYPE_DHCP_ACK;
+
+	if ( ( rc = pxeparent_call ( undi->entry, PXENV_GET_CACHED_INFO,
+				     &get_cached_info,
+				     sizeof ( get_cached_info ) ) ) != 0 ) {
+		DBG ( "PXEDHCP GET_CACHED_INFO failed: %s\n", strerror ( rc ) );
+		return;
+	}
+
+	DBG ( "PXEDHCP got cached info at %04x:%04x length %d\n",
+	      get_cached_info.Buffer.segment, get_cached_info.Buffer.offset,
+	      get_cached_info.BufferSize );
+
+	/* Present cached DHCP packet */
+	store_cached_dhcpack ( real_to_user ( get_cached_info.Buffer.segment,
+					      get_cached_info.Buffer.offset ),
+			       get_cached_info.BufferSize );
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/com32_call.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/com32_call.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/com32_call.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/com32_call.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/com32_wrapper.S ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/com32_wrapper.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/com32_wrapper.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/com32_wrapper.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/comboot_call.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/comboot_call.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/syslinux/comboot_call.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/syslinux/comboot_call.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 /**
@@ -39,13 +38,12 @@
 #include <ipxe/serial.h>
 #include <ipxe/init.h>
 #include <ipxe/image.h>
-#include <ipxe/version.h>
 #include <usr/imgmgmt.h>
 #include "config/console.h"
 #include "config/serial.h"
 
 /** The "SYSLINUX" version string */
-static char __bss16_array ( syslinux_version, [32] );
+static char __data16_array ( syslinux_version, [] ) = "\r\niPXE " VERSION;
 #define syslinux_version __use_data16 ( syslinux_version )
 
 /** The "SYSLINUX" copyright string */
@@ -168,8 +166,6 @@
  * Fetch kernel and optional initrd
  */
 static int comboot_fetch_kernel ( char *kernel_file, char *cmdline ) {
-	struct image *kernel;
-	struct image *initrd;
 	char *initrd_file;
 	int rc;
 
@@ -188,7 +184,8 @@
 		DBG ( "COMBOOT: fetching initrd '%s'\n", initrd_file );
 
 		/* Fetch initrd */
-		if ( ( rc = imgdownload_string ( initrd_file, &initrd ) ) != 0){
+		if ( ( rc = imgdownload_string ( initrd_file, NULL, NULL,
+						 NULL ) ) != 0 ) {
 			DBG ( "COMBOOT: could not fetch initrd: %s\n",
 			      strerror ( rc ) );
 			return rc;
@@ -201,20 +198,14 @@
 
 	DBG ( "COMBOOT: fetching kernel '%s'\n", kernel_file );
 
-	/* Fetch kernel */
-	if ( ( rc = imgdownload_string ( kernel_file, &kernel ) ) != 0 ) {
+	/* Allocate and fetch kernel */
+	if ( ( rc = imgdownload_string ( kernel_file, NULL, cmdline,
+					 image_replace ) ) != 0 ) {
 		DBG ( "COMBOOT: could not fetch kernel: %s\n",
 		      strerror ( rc ) );
 		return rc;
 	}
 
-	/* Replace comboot image with kernel */
-	if ( ( rc = image_replace ( kernel ) ) != 0 ) {
-		DBG ( "COMBOOT: could not replace with kernel: %s\n",
-		      strerror ( rc ) );
-		return rc;
-	}
-
 	return 0;
 }
 
@@ -327,10 +318,6 @@
 		/* SYSLINUX derivative ID */
 		ix86->regs.dl = BZI_LOADER_TYPE_IPXE;
 
-		/* SYSLINUX version */
-		snprintf ( syslinux_version, sizeof ( syslinux_version ),
-			   "\r\niPXE %s", product_version );
-
 		/* SYSLINUX version and copyright strings */
 		ix86->segs.es = rm_ds;
 		ix86->regs.si = ( ( unsigned ) __from_data16 ( syslinux_version ) );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/guestinfo.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/guestinfo.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/guestinfo.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/guestinfo.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,271 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * VMware GuestInfo settings
- *
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/init.h>
-#include <ipxe/settings.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/guestrpc.h>
-
-/** GuestInfo GuestRPC channel */
-static int guestinfo_channel;
-
-/**
- * Fetch value of typed GuestInfo setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v type		Setting type to attempt (or NULL for default)
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret found		Setting found in GuestInfo
- * @ret len		Length of setting data, or negative error
- */
-static int guestinfo_fetch_type ( struct settings *settings,
-				  struct setting *setting,
-				  struct setting_type *type,
-				  void *data, size_t len, int *found ) {
-	const char *parent_name = settings->parent->name;
-	char command[ 24 /* "info-get guestinfo.ipxe." */ +
-		      strlen ( parent_name ) + 1 /* "." */ +
-		      strlen ( setting->name ) + 1 /* "." */ +
-		      ( type ? strlen ( type->name ) : 0 ) + 1 /* NUL */ ];
-	struct setting *predefined;
-	char *info;
-	int info_len;
-	int check_len;
-	int ret;
-
-	/* Construct info-get command */
-	snprintf ( command, sizeof ( command ),
-		   "info-get guestinfo.ipxe.%s%s%s%s%s",
-		   parent_name, ( parent_name[0] ? "." : "" ), setting->name,
-		   ( type ? "." : "" ), ( type ? type->name : "" ) );
-
-	/* Check for existence and obtain length of GuestInfo value */
-	info_len = guestrpc_command ( guestinfo_channel, command, NULL, 0 );
-	if ( info_len < 0 ) {
-		ret = info_len;
-		goto err_get_info_len;
-	}
-
-	/* Mark as found */
-	*found = 1;
-
-	/* Determine default type if necessary */
-	if ( ! type ) {
-		predefined = find_setting ( setting->name );
-		type = ( predefined ? predefined->type : &setting_type_string );
-	}
-	assert ( type != NULL );
-
-	/* Allocate temporary block to hold GuestInfo value */
-	info = zalloc ( info_len + 1 /* NUL */ );
-	if ( ! info ) {
-		DBGC ( settings, "GuestInfo %p could not allocate %d bytes\n",
-		       settings, info_len );
-		ret = -ENOMEM;
-		goto err_alloc;
-	}
-	info[info_len] = '\0';
-
-	/* Fetch GuestInfo value */
-	check_len = guestrpc_command ( guestinfo_channel, command,
-				       info, info_len );
-	if ( check_len < 0 ) {
-		ret = check_len;
-		goto err_get_info;
-	}
-	if ( check_len != info_len ) {
-		DBGC ( settings, "GuestInfo %p length mismatch (expected %d, "
-		       "got %d)\n", settings, info_len, check_len );
-		ret = -EIO;
-		goto err_get_info;
-	}
-	DBGC2 ( settings, "GuestInfo %p found %s = \"%s\"\n",
-		settings, &command[9] /* Skip "info-get " */, info );
-
-	/* Parse GuestInfo value according to type */
-	ret = setting_parse ( type, info, data, len );
-	if ( ret < 0 ) {
-		DBGC ( settings, "GuestInfo %p could not parse \"%s\" as %s: "
-		       "%s\n", settings, info, type->name, strerror ( ret ) );
-		goto err_parse;
-	}
-
- err_parse:
- err_get_info:
-	free ( info );
- err_alloc:
- err_get_info_len:
-	return ret;
-}
-
-/**
- * Fetch value of GuestInfo setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int guestinfo_fetch ( struct settings *settings,
-			     struct setting *setting,
-			     void *data, size_t len ) {
-	struct setting_type *type;
-	int found = 0;
-	int ret;
-
-	/* Try default type first */
-	ret = guestinfo_fetch_type ( settings, setting, NULL,
-				     data, len, &found );
-	if ( found )
-		return ret;
-
-	/* Otherwise, try all possible types */
-	for_each_table_entry ( type, SETTING_TYPES ) {
-		ret = guestinfo_fetch_type ( settings, setting, type,
-					     data, len, &found );
-		if ( found )
-			return ret;
-	}
-
-	/* Not found */
-	return -ENOENT;
-}
-
-/** GuestInfo settings operations */
-static struct settings_operations guestinfo_settings_operations = {
-	.fetch = guestinfo_fetch,
-};
-
-/** GuestInfo settings */
-static struct settings guestinfo_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( guestinfo_settings.siblings ),
-	.children = LIST_HEAD_INIT ( guestinfo_settings.children ),
-	.op = &guestinfo_settings_operations,
-};
-
-/** Initialise GuestInfo settings */
-static void guestinfo_init ( void ) {
-	int rc;
-
-	/* Open GuestRPC channel */
-	guestinfo_channel = guestrpc_open();
-	if ( guestinfo_channel < 0 ) {
-		rc = guestinfo_channel;
-		DBG ( "GuestInfo could not open channel: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-
-	/* Register root GuestInfo settings */
-	if ( ( rc = register_settings ( &guestinfo_settings, NULL,
-					"vmware" ) ) != 0 ) {
-		DBG ( "GuestInfo could not register settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** GuestInfo settings initialiser */
-struct init_fn guestinfo_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = guestinfo_init,
-};
-
-/**
- * Create per-netdevice GuestInfo settings
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int guestinfo_net_probe ( struct net_device *netdev ) {
-	struct settings *settings;
-	int rc;
-
-	/* Do nothing unless we have a GuestInfo channel available */
-	if ( guestinfo_channel < 0 )
-		return 0;
-
-	/* Allocate and initialise settings block */
-	settings = zalloc ( sizeof ( *settings ) );
-	if ( ! settings ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	settings_init ( settings, &guestinfo_settings_operations, NULL, NULL );
-
-	/* Register settings */
-	if ( ( rc = register_settings ( settings, netdev_settings ( netdev ),
-					"vmware" ) ) != 0 ) {
-		DBGC ( settings, "GuestInfo %p could not register for %s: %s\n",
-		       settings, netdev->name, strerror ( rc ) );
-		goto err_register;
-	}
-	DBGC ( settings, "GuestInfo %p registered for %s\n",
-	       settings, netdev->name );
-
-	return 0;
-
- err_register:
-	free ( settings );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove per-netdevice GuestInfo settings
- *
- * @v netdev		Network device
- */
-static void guestinfo_net_remove ( struct net_device *netdev ) {
-	struct settings *parent = netdev_settings ( netdev );
-	struct settings *settings;
-
-	list_for_each_entry ( settings, &parent->children, siblings ) {
-		if ( settings->op == &guestinfo_settings_operations ) {
-			DBGC ( settings, "GuestInfo %p unregistered for %s\n",
-			       settings, netdev->name );
-			unregister_settings ( settings );
-			free ( settings );
-			return;
-		}
-	}
-}
-
-/** GuestInfo per-netdevice driver */
-struct net_driver guestinfo_net_driver __net_driver = {
-	.name = "GuestInfo",
-	.probe = guestinfo_net_probe,
-	.remove = guestinfo_net_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/guestrpc.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/guestrpc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/guestrpc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/guestrpc.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,328 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * VMware GuestRPC mechanism
- *
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <errno.h>
-#include <assert.h>
-#include <ipxe/vmware.h>
-#include <ipxe/guestrpc.h>
-
-/* Disambiguate the various error causes */
-#define EPROTO_OPEN __einfo_error ( EINFO_EPROTO_OPEN )
-#define EINFO_EPROTO_OPEN \
-	__einfo_uniqify ( EINFO_EPROTO, 0x00, "GuestRPC open failed" )
-#define EPROTO_COMMAND_LEN __einfo_error ( EINFO_EPROTO_COMMAND_LEN )
-#define EINFO_EPROTO_COMMAND_LEN \
-	__einfo_uniqify ( EINFO_EPROTO, 0x01, "GuestRPC command length failed" )
-#define EPROTO_COMMAND_DATA __einfo_error ( EINFO_EPROTO_COMMAND_DATA )
-#define EINFO_EPROTO_COMMAND_DATA \
-	__einfo_uniqify ( EINFO_EPROTO, 0x02, "GuestRPC command data failed" )
-#define EPROTO_REPLY_LEN __einfo_error ( EINFO_EPROTO_REPLY_LEN )
-#define EINFO_EPROTO_REPLY_LEN \
-	__einfo_uniqify ( EINFO_EPROTO, 0x03, "GuestRPC reply length failed" )
-#define EPROTO_REPLY_DATA __einfo_error ( EINFO_EPROTO_REPLY_DATA )
-#define EINFO_EPROTO_REPLY_DATA \
-	__einfo_uniqify ( EINFO_EPROTO, 0x04, "GuestRPC reply data failed" )
-#define EPROTO_REPLY_FINISH __einfo_error ( EINFO_EPROTO_REPLY_FINISH )
-#define EINFO_EPROTO_REPLY_FINISH \
-	__einfo_uniqify ( EINFO_EPROTO, 0x05, "GuestRPC reply finish failed" )
-#define EPROTO_CLOSE __einfo_error ( EINFO_EPROTO_CLOSE )
-#define EINFO_EPROTO_CLOSE \
-	__einfo_uniqify ( EINFO_EPROTO, 0x06, "GuestRPC close failed" )
-
-/**
- * Open GuestRPC channel
- *
- * @ret channel		Channel number, or negative error
- */
-int guestrpc_open ( void ) {
-	uint16_t channel;
-	uint32_t discard_b;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( 0, GUESTRPC_OPEN, GUESTRPC_MAGIC,
-				       &channel, &discard_b );
-	if ( status != GUESTRPC_OPEN_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC open failed: status %08x\n",
-		       status );
-		return -EPROTO_OPEN;
-	}
-
-	DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d opened\n", channel );
-	return channel;
-}
-
-/**
- * Send GuestRPC command length
- *
- * @v channel		Channel number
- * @v len		Command length
- * @ret rc		Return status code
- */
-static int guestrpc_command_len ( int channel, size_t len ) {
-	uint16_t discard_d;
-	uint32_t discard_b;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_COMMAND_LEN, len,
-				       &discard_d, &discard_b );
-	if ( status != GUESTRPC_COMMAND_LEN_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d send command "
-		       "length %zd failed: status %08x\n",
-		       channel, len, status );
-		return -EPROTO_COMMAND_LEN;
-	}
-
-	return 0;
-}
-
-/**
- * Send GuestRPC command data
- *
- * @v channel		Channel number
- * @v data		Command data
- * @ret rc		Return status code
- */
-static int guestrpc_command_data ( int channel, uint32_t data ) {
-	uint16_t discard_d;
-	uint32_t discard_b;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_COMMAND_DATA, data,
-				       &discard_d, &discard_b );
-	if ( status != GUESTRPC_COMMAND_DATA_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d send command "
-		       "data %08x failed: status %08x\n",
-		       channel, data, status );
-		return -EPROTO_COMMAND_DATA;
-	}
-
-	return 0;
-}
-
-/**
- * Receive GuestRPC reply length
- *
- * @v channel		Channel number
- * @ret reply_id	Reply ID
- * @ret len		Reply length, or negative error
- */
-static int guestrpc_reply_len ( int channel, uint16_t *reply_id ) {
-	uint32_t len;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_REPLY_LEN, 0,
-				       reply_id, &len );
-	if ( status != GUESTRPC_REPLY_LEN_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d receive reply "
-		       "length failed: status %08x\n", channel, status );
-		return -EPROTO_REPLY_LEN;
-	}
-
-	return len;
-}
-
-/**
- * Receive GuestRPC reply data
- *
- * @v channel		Channel number
- * @v reply_id		Reply ID
- * @ret data		Reply data
- * @ret rc		Return status code
- */
-static int guestrpc_reply_data ( int channel, uint16_t reply_id,
-				 uint32_t *data ) {
-	uint16_t discard_d;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_REPLY_DATA, reply_id,
-				       &discard_d, data );
-	if ( status != GUESTRPC_REPLY_DATA_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d receive reply "
-		       "%d data failed: status %08x\n",
-		       channel, reply_id, status );
-		return -EPROTO_REPLY_DATA;
-	}
-
-	return 0;
-}
-
-/**
- * Finish receiving GuestRPC reply
- *
- * @v channel		Channel number
- * @v reply_id		Reply ID
- * @ret rc		Return status code
- */
-static int guestrpc_reply_finish ( int channel, uint16_t reply_id ) {
-	uint16_t discard_d;
-	uint32_t discard_b;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_REPLY_FINISH, reply_id,
-				       &discard_d, &discard_b );
-	if ( status != GUESTRPC_REPLY_FINISH_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d finish reply %d "
-		       "failed: status %08x\n", channel, reply_id, status );
-		return -EPROTO_REPLY_FINISH;
-	}
-
-	return 0;
-}
-
-/**
- * Close GuestRPC channel
- *
- * @v channel		Channel number
- */
-void guestrpc_close ( int channel ) {
-	uint16_t discard_d;
-	uint32_t discard_b;
-	uint32_t status;
-
-	/* Issue GuestRPC command */
-	status = vmware_cmd_guestrpc ( channel, GUESTRPC_CLOSE, 0,
-				       &discard_d, &discard_b );
-	if ( status != GUESTRPC_CLOSE_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d close failed: "
-		       "status %08x\n", channel, status );
-		return;
-	}
-
-	DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d closed\n", channel );
-}
-
-/**
- * Issue GuestRPC command
- *
- * @v channel		Channel number
- * @v command		Command
- * @v reply		Reply buffer
- * @v reply_len		Length of reply buffer
- * @ret len		Length of reply, or negative error
- *
- * The actual length of the reply will be returned even if the buffer
- * was too small.
- */
-int guestrpc_command ( int channel, const char *command, char *reply,
-		       size_t reply_len ) {
-	const uint8_t *command_bytes = ( ( const void * ) command );
-	uint8_t *reply_bytes = ( ( void * ) reply );
-	size_t command_len = strlen ( command );
-	int orig_reply_len = reply_len;
-	uint16_t status;
-	uint8_t *status_bytes = ( ( void * ) &status );
-	size_t status_len = sizeof ( status );
-	uint32_t data;
-	uint16_t reply_id;
-	int len;
-	int remaining;
-	unsigned int i;
-	int rc;
-
-	DBGC2 ( GUESTRPC_MAGIC, "GuestRPC channel %d issuing command:\n",
-		channel );
-	DBGC2_HDA ( GUESTRPC_MAGIC, 0, command, command_len );
-
-	/* Sanity check */
-	assert ( ( reply != NULL ) || ( reply_len == 0 ) );
-
-	/* Send command length */
-	if ( ( rc = guestrpc_command_len ( channel, command_len ) ) < 0 )
-		return rc;
-
-	/* Send command data */
-	while ( command_len ) {
-		data = 0;
-		for ( i = sizeof ( data ) ; i ; i-- ) {
-			if ( command_len ) {
-				data = ( ( data & ~0xff ) |
-					 *(command_bytes++) );
-				command_len--;
-			}
-			data = ( ( data << 24 ) | ( data >> 8 ) );
-		}
-		if ( ( rc = guestrpc_command_data ( channel, data ) ) < 0 )
-			return rc;
-	}
-
-	/* Receive reply length */
-	if ( ( len = guestrpc_reply_len ( channel, &reply_id ) ) < 0 ) {
-		rc = len;
-		return rc;
-	}
-
-	/* Receive reply */
-	for ( remaining = len ; remaining > 0 ; remaining -= sizeof ( data ) ) {
-		if ( ( rc = guestrpc_reply_data ( channel, reply_id,
-						  &data ) ) < 0 ) {
-			return rc;
-		}
-		for ( i = sizeof ( data ) ; i ; i-- ) {
-			if ( status_len ) {
-				*(status_bytes++) = ( data & 0xff );
-				status_len--;
-				len--;
-			} else if ( reply_len ) {
-				*(reply_bytes++) = ( data & 0xff );
-				reply_len--;
-			}
-			data = ( ( data << 24 ) | ( data >> 8 ) );
-		}
-	}
-
-	/* Finish receiving RPC reply */
-	if ( ( rc = guestrpc_reply_finish ( channel, reply_id ) ) < 0 )
-		return rc;
-
-	DBGC2 ( GUESTRPC_MAGIC, "GuestRPC channel %d received reply (id %d, "
-		"length %d):\n", channel, reply_id, len );
-	DBGC2_HDA ( GUESTRPC_MAGIC, 0, &status, sizeof ( status ) );
-	DBGC2_HDA ( GUESTRPC_MAGIC, sizeof ( status ), reply,
-		    ( ( len < orig_reply_len ) ? len : orig_reply_len ) );
-
-	/* Check reply status */
-	if ( status != GUESTRPC_SUCCESS ) {
-		DBGC ( GUESTRPC_MAGIC, "GuestRPC channel %d command failed "
-		       "(status %04x, reply id %d, reply length %d):\n",
-		       channel, status, reply_id, len );
-		DBGC_HDA ( GUESTRPC_MAGIC, 0, command, command_len );
-		DBGC_HDA ( GUESTRPC_MAGIC, 0, &status, sizeof ( status ) );
-		DBGC_HDA ( GUESTRPC_MAGIC, sizeof ( status ), reply,
-			   ( ( len < orig_reply_len ) ? len : orig_reply_len ));
-		return -EIO;
-	}
-
-	return len;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/vmconsole.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/vmconsole.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/vmconsole.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/vmconsole.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,134 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * VMware logfile console
- *
- */
-
-#include <string.h>
-#include <ipxe/console.h>
-#include <ipxe/lineconsole.h>
-#include <ipxe/init.h>
-#include <ipxe/guestrpc.h>
-#include <config/console.h>
-
-/** VMware logfile console buffer size */
-#define VMCONSOLE_BUFSIZE 128
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_VMWARE ) && CONSOLE_EXPLICIT ( CONSOLE_VMWARE ) )
-#undef CONSOLE_VMWARE
-#define CONSOLE_VMWARE ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_TUI )
-#endif
-
-/** VMware logfile console GuestRPC channel */
-static int vmconsole_channel;
-
-/** VMware logfile console line buffer */
-static struct {
-	char prefix[4];
-	char message[VMCONSOLE_BUFSIZE];
-} vmconsole_buffer = {
-	.prefix = "log ",
-};
-
-/** VMware logfile console ANSI escape sequence handlers */
-static struct ansiesc_handler vmconsole_handlers[] = {
-	{ 0, NULL }
-};
-
-/** VMware logfile line console */
-static struct line_console vmconsole_line = {
-	.buffer = vmconsole_buffer.message,
-	.len = sizeof ( vmconsole_buffer.message ),
-	.ctx = {
-		.handlers = vmconsole_handlers,
-	},
-};
-
-/** VMware logfile console recursion marker */
-static int vmconsole_entered;
-
-/**
- * Print a character to VMware logfile console
- *
- * @v character		Character to be printed
- */
-static void vmconsole_putchar ( int character ) {
-	int rc;
-
-	/* Ignore if we are already mid-logging */
-	if ( vmconsole_entered )
-		return;
-
-	/* Fill line buffer */
-	if ( line_putchar ( &vmconsole_line, character ) == 0 )
-		return;
-
-	/* Guard against re-entry */
-	vmconsole_entered = 1;
-
-	/* Send log message */
-	if ( ( rc = guestrpc_command ( vmconsole_channel,
-				       vmconsole_buffer.prefix, NULL, 0 ) ) <0){
-		DBG ( "VMware console could not send log message: %s\n",
-		      strerror ( rc ) );
-	}
-
-	/* Clear re-entry flag */
-	vmconsole_entered = 0;
-}
-
-/** VMware logfile console driver */
-struct console_driver vmconsole __console_driver = {
-	.putchar = vmconsole_putchar,
-	.disabled = 1,
-	.usage = CONSOLE_VMWARE,
-};
-
-/**
- * Initialise VMware logfile console
- *
- */
-static void vmconsole_init ( void ) {
-	int rc;
-
-	/* Attempt to open console */
-	vmconsole_channel = guestrpc_open();
-	if ( vmconsole_channel < 0 ) {
-		rc = vmconsole_channel;
-		DBG ( "VMware console could not be initialised: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-
-	/* Mark console as available */
-	vmconsole.disabled = 0;
-}
-
-/**
- * VMware logfile console initialisation function
- */
-struct init_fn vmconsole_init_fn __init_fn ( INIT_CONSOLE ) = {
-	.initialise = vmconsole_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/vmware.c ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/vmware.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/interface/vmware/vmware.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/interface/vmware/vmware.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * VMware backdoor mechanism
- *
- * Based on the unofficial documentation at
- *
- *   http://sites.google.com/site/chitchatvmback/backdoor
- *
- */
-
-#include <stdint.h>
-#include <errno.h>
-#include <ipxe/vmware.h>
-
-/**
- * Detect VMware presence
- *
- * @ret rc		Return status code
- */
-int vmware_present ( void ) {
-	uint32_t version;
-	uint32_t magic;
-	uint32_t product_type;
-
-	/* Perform backdoor call */
-	vmware_cmd_get_version ( &version, &magic, &product_type );
-
-	/* Check for VMware presence */
-	if ( magic != VMW_MAGIC ) {
-		DBGC ( VMW_MAGIC, "VMware not present\n" );
-		return -ENOENT;
-	}
-
-	DBGC ( VMW_MAGIC, "VMware product type %04x version %08x detected\n",
-	       product_type, version );
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/Makefile ipxe-1.0.1~lliurex1505/src/arch/i386/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/Makefile	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/Makefile	2012-01-06 23:49:04.000000000 +0000
@@ -54,8 +54,6 @@
 ASFLAGS		+= --32
 ifeq ($(HOST_OS),FreeBSD)
 LDFLAGS		+= -m elf_i386_fbsd
-else ifeq ($(HOST_OS),OpenBSD)
-LDFLAGS		+= -m elf_i386_obsd
 else
 LDFLAGS		+= -m elf_i386
 endif
@@ -87,9 +85,15 @@
 SRCDIRS		+= arch/i386/interface/pxe
 SRCDIRS		+= arch/i386/interface/pxeparent
 SRCDIRS 	+= arch/i386/interface/syslinux
-SRCDIRS		+= arch/i386/interface/vmware
 SRCDIRS		+= arch/i386/hci/commands
 
+# The various xxx_loader.c files are #included into core/loader.c and
+# should not be compiled directly.
+#
+NON_AUTO_SRCS	+= arch/i386/core/aout_loader.c
+NON_AUTO_SRCS	+= arch/i386/core/freebsd_loader.c
+NON_AUTO_SRCS	+= arch/i386/core/wince_loader.c
+
 # Include common x86 Makefile
 #
 MAKEDEPS	+= arch/x86/Makefile
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/Makefile.pcbios ipxe-1.0.1~lliurex1505/src/arch/i386/Makefile.pcbios
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/Makefile.pcbios	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/Makefile.pcbios	2012-01-06 23:49:04.000000000 +0000
@@ -29,22 +29,17 @@
 
 # Padding rules
 #
-PAD_rom		= $(PERL) $(PADIMG) --blksize=512 --byte=0xff
+PAD_rom		= $(PERL) $(PADIMG) --blksize=512 --byte=0xff $@
 PAD_mrom	= $(PAD_rom)
-PAD_dsk		= $(PERL) $(PADIMG) --blksize=512
-PAD_hd		= $(PERL) $(PADIMG) --blksize=32768
-PAD_exe		= $(PERL) $(PADIMG) --blksize=512
+PAD_dsk		= $(PERL) $(PADIMG) --blksize=512 $@
+PAD_hd		= $(PERL) $(PADIMG) --blksize=32768 $@
+PAD_exe		= $(PERL) $(PADIMG) --blksize=512 $@
 
 # Finalisation rules
 #
-FINALISE_rom	= $(PERL) $(FIXROM)
+FINALISE_rom	= $(PERL) $(FIXROM) $@
 FINALISE_mrom	= $(FINALISE_rom)
 
-# Use $(ROMS) rather than $(DRIVERS) for "allroms" and "allmroms"
-#
-LIST_NAME_rom := ROMS
-LIST_NAME_mrom := ROMS
-
 # rule to make a non-emulation ISO boot image
 NON_AUTO_MEDIA	+= iso
 %iso:	%lkrn util/geniso
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/exeprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/exeprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/exeprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/exeprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
@@ -114,7 +113,7 @@
 	call	alloc_basemem
 	xorl	%esi, %esi
 	movl	$EXE_DECOMPRESS_ADDRESS, %edi
-	orl	$0xffffffff, %ebp	/* Allow arbitrary relocation */
+	xorl	%ebp, %ebp
 	call	install_prealloc
 
 	/* Set up real-mode stack */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/libprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/libprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/libprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/libprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
@@ -50,7 +49,7 @@
 	.section ".prefix.data", "aw", @progbits
 progress_\@:
 	.asciz	"\message"
-	.size	progress_\@, . - progress_\@
+	.size	progress_\@, . - progress\@
 	.previous
 	.endm
 #endif
@@ -545,7 +544,8 @@
  * Free space allocated with alloc_basemem.
  *
  * Parameters:
- *   none (.text16 segment address is implicit in %cs)
+ *   %ax : .text16 segment address
+ *   %bx : .data16 segment address
  * Returns:
  *   %ax : 0 if successfully freed
  * Corrupts:
@@ -558,14 +558,14 @@
 free_basemem:
 	/* Preserve registers */
 	pushw	%fs
-	pushw	%ax
 
 	/* Check FBMS counter */
-	movw	%cs, %ax
+	pushw	%ax
 	shrw	$6, %ax
 	pushw	$0x40
 	popw	%fs
 	cmpw	%ax, %fs:0x13
+	popw	%ax
 	jne	1f
 
 	/* Check hooked interrupt count */
@@ -573,7 +573,6 @@
 	jne	1f
 
 	/* OK to free memory */
-	movw	%cs, %ax
 	addw	$_text16_memsz_pgh, %ax
 	addw	$_data16_memsz_pgh, %ax
 	shrw	$6, %ax
@@ -581,7 +580,6 @@
 	xorw	%ax, %ax
 
 1:	/* Restore registers and return */
-	popw	%ax
 	popw	%fs
 	ret
 	.size free_basemem, . - free_basemem
@@ -622,7 +620,7 @@
 	/* Image destination = default */
 	xorl	%edi, %edi
 	/* Allow arbitrary relocation */
-	orl	$0xffffffff, %ebp
+	xorl	%ebp, %ebp
 	/* Install text and data segments */
 	call	install_prealloc
 	/* Restore registers and return */
@@ -642,9 +640,7 @@
  *   %bx  : .data16 segment address
  *   %esi : Image source physical address (or zero for %cs:0000)
  *   %edi : Decompression temporary area physical address (or zero for default)
- *   %ebp : Maximum end address for relocation
- *          - 0xffffffff for no maximum
- *          - 0x00000000 to inhibit use of INT 15,e820 and INT 15,e801
+ *   %ebp : Maximum end address for relocation (or zero for no maximum)
  * Corrupts:
  *   none
  ****************************************************************************
@@ -667,22 +663,18 @@
 	/* Save decompression temporary area physical address */
 	pushl	%edi
 
-	/* Install .text16.early and calculate %ecx as offset to next block */
+	/* Install .text16.early */
 	progress "  .text16.early\n"
 	pushl	%esi
 	xorl	%esi, %esi
 	movw	%cs, %si
 	shll	$4, %esi
-	pushl	%esi			/* Save original %cs:0000 */
 	addl	$_text16_early_lma, %esi
 	movzwl	%ax, %edi
 	shll	$4, %edi
 	movl	$_text16_early_filesz, %ecx
 	movl	$_text16_early_memsz, %edx
 	call	install_block		/* .text16.early */
-	popl	%ecx			/* Calculate offset to next block */
-	subl	%esi, %ecx
-	negl	%ecx
 	popl	%esi
 
 #ifndef KEEP_IT_REAL
@@ -737,7 +729,7 @@
 	jnz	1f
 	movw	%cs, %si
 	shll	$4, %esi
-1:	addl	%ecx, %esi
+1:	addl	payload_lma, %esi
 
 	/* Install .text16.late and .data16 */
 	progress "  .text16.late\n"
@@ -798,13 +790,6 @@
 	movw	%ax, (init_librm_vector+2)
 	lcall	*init_librm_vector
 
-	/* Inhibit INT 15,e820 and INT 15,e801 if applicable */
-	testl	%ebp, %ebp
-	jnz	1f
-	incb	memmap_post
-	decl	%ebp
-1:
-
 	/* Call relocate() to determine target address for relocation.
 	 * relocate() will return with %esi, %edi and %ecx set up
 	 * ready for the copy to the new location.
@@ -865,6 +850,17 @@
 	.word 0
 	.size close_payload_vector, . - close_payload_vector
 
+	/* Payload address */
+	.section ".prefix.lib", "awx", @progbits
+payload_lma:
+	.long 0
+	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
+	.ascii	"ADHL"
+	.long	payload_lma
+	.long	1
+	.long	0
+	.previous
+
 	/* Dummy routines to open and close payload */
 	.section ".text16.early.data", "aw", @progbits
 	.weak	open_payload
@@ -882,7 +878,8 @@
  * Uninstall all text and data segments.
  *
  * Parameters:
- *   none (.text16 segment address is implicit in %cs)
+ *   %ax  : .text16 segment address
+ *   %bx  : .data16 segment address
  * Returns:
  *   none
  * Corrupts:
@@ -917,10 +914,6 @@
 	.ascii	"PAYL"
 	.long	0
 	.long	0
-	.long	_payload_align
-	.ascii	"COPY"
-	.long	_pprefix_lma
-	.long	_pprefix_filesz
 	.long	_max_align
 	.ascii	PACK_OR_COPY
 	.long	_text16_late_lma
@@ -934,6 +927,3 @@
 	.long	_textdata_lma
 	.long	_textdata_filesz
 	.long	_max_align
-
-	.weak	_payload_align
-	.equ	_payload_align, 1
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/lkrnprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/lkrnprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/lkrnprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/lkrnprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -188,55 +188,17 @@
 	We're now at the beginning of the kernel proper.
  */
 run_ipxe:
-	/* Set up stack just below 0x7c00 and clear direction flag */
+	/* Set up stack just below 0x7c00 */
 	xorw	%ax, %ax
 	movw	%ax, %ss
 	movw	$0x7c00, %sp
-	cld
 
 	/* Retrieve command-line pointer */
-	movl	%ds:cmd_line_ptr, %edx
-	testl	%edx, %edx
-	jz	no_cmd_line
-
-	/* Set up %es:%di to point to command line */
-	movl	%edx, %edi
-	andl	$0xf, %edi
-	rorl	$4, %edx
-	movw	%dx, %es
-
-	/* Find length of command line */
-	pushw	%di
-	movw	$0xffff, %cx
-	repnz scasb
-	notw	%cx
-	popw	%si
-
-	/* Make space for command line on stack */
-	movw	%sp, %di
-	subw	%cx, %di
-	andw	$~0xf, %di
-	movw	%di, %sp
-
-	/* Copy command line to stack */
-	pushw	%ds
-	pushw	%es
-	popw	%ds
-	pushw	%ss
-	popw	%es
-	rep movsb
-	popw	%ds
-
-	/* Store new command-line pointer */
-	movzwl	%sp, %edx
-no_cmd_line:
-
-	/* Calculate maximum relocation address */
-	movl	ramdisk_image, %ebp
-	testl	%ebp, %ebp
-	jnz	1f
-	orl	$0xffffffff, %ebp /* Allow arbitrary relocation if no initrd */
-1:
+	movl	%es:cmd_line_ptr, %edx
+
+	/* Retrieve initrd pointer and size */
+	movl	%es:ramdisk_image, %ebp
+	movl	%es:ramdisk_size, %ecx
 
 	/* Install iPXE */
 	call	alloc_basemem
@@ -254,10 +216,6 @@
 	lret
 	.section ".text16", "awx", @progbits
 1:
-	/* Retrieve initrd pointer and size */
-	movl	ramdisk_image, %ebp
-	movl	ramdisk_size, %ecx
-
 	/* Set up %ds for access to .data16 */
 	movw	%bx, %ds
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/mromprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/mromprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/mromprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/mromprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
@@ -31,7 +30,6 @@
 #define PCI_BAR_EXPROM			0x30
 
 #define ROMPREFIX_EXCLUDE_PAYLOAD 1
-#define ROMPREFIX_MORE_IMAGES 1
 #define _rom_start _mrom_start
 #include "romprefix.S"
 
@@ -48,10 +46,8 @@
  * Parameters:
  *   %ds:0000 : Prefix
  *   %esi : Buffer for copy of image source (or zero if no buffer available)
- *   %ecx : Expected offset within buffer of first payload block
  * Returns:
  *   %esi : Valid image source address (buffered or unbuffered)
- *   %ecx : Actual offset within buffer of first payload block
  *   CF set on error
  */
 	.section ".text16.early", "awx", @progbits
@@ -60,25 +56,23 @@
 	/* Preserve registers */
 	pushl	%eax
 	pushw	%bx
+	pushl	%ecx
 	pushl	%edx
 	pushl	%edi
 	pushw	%bp
-	pushw	%es
 	pushw	%ds
 
-	/* Retrieve bus:dev.fn from .prefix */
+	/* Retrieve bus:dev.fn and image source length from .prefix */
 	movw	init_pci_busdevfn, %bx
+	movl	image_source_len_dword, %ecx
 
 	/* Set up %ds for access to .text16.early */
 	pushw	%cs
 	popw	%ds
 
-	/* Set up %es for access to flat address space */
-	xorw	%ax, %ax
-	movw	%ax, %es
-
-	/* Store bus:dev.fn to .text16.early */
+	/* Store bus:dev.fn and image source length to .text16.early */
 	movw	%bx, payload_pci_busdevfn
+	movl	%ecx, rom_bar_copy_len_dword
 
 	/* Get expansion ROM BAR current value */
 	movw	$PCI_BAR_EXPROM, %di
@@ -98,7 +92,6 @@
 	cmpw	$PCI_BAR_5, %di
 	jle	1f
 	stc
-	movl	$0xbabababa, %esi	/* Report "No suitable BAR" */
 	jmp	99f
 1:	movw	$4, %bp
 
@@ -156,20 +149,6 @@
 	movw	$PCI_BAR_EXPROM, %di
 	call	pci_write_config_dword
 
-	/* Locate our ROM image */
-1:	addr32 es cmpw $0xaa55, (%eax)
-	je	2f
-	stc
-	movl	%eax, %esi		/* Report failure address */
-	jmp	99f
-2:	addr32 es cmpl $_build_id, build_id(%eax)
-	je	3f
-	addr32 es movzbl 2(%eax), %ecx
-	shll	$9, %ecx
-	addl	%ecx, %eax
-	jmp	1b
-3:
-
 	/* Copy payload to buffer, or set buffer address to BAR address */
 	testl	%esi, %esi
 	jz	1f
@@ -180,32 +159,27 @@
 	 * properly support flat real mode, it will die horribly.)
 	 */
 	pushl	%esi
+	pushw	%es
 	movl	%esi, %edi
 	movl	%eax, %esi
-	addr32 es movzbl 2(%esi), %ecx
-	shll	$7, %ecx
-	addr32 es movzbl 2(%esi,%ecx,4), %edx
-	shll	$7, %edx
-	addl	%edx, %ecx
+	movl	rom_bar_copy_len_dword, %ecx
+	xorw	%ax, %ax
+	movw	%ax, %es
 	addr32 es rep movsl
+	popw	%es
 	popl	%esi
 	jmp	2f
 1:	/* We have no buffer; set %esi to the BAR address */
 	movl	%eax, %esi
 2:
 
-	/* Locate first payload block (after the dummy ROM header) */
-	addr32 es movzbl 2(%esi), %ecx
-	shll	$9, %ecx
-	addl	$_pprefix_skip, %ecx
-
 	clc
 	/* Restore registers and return */
 99:	popw	%ds
-	popw	%es
 	popw	%bp
 	popl	%edi
 	popl	%edx
+	popl	%ecx
 	popw	%bx
 	popl	%eax
 	lret
@@ -227,6 +201,11 @@
 	.size	rom_bar_size, . - rom_bar_size
 
 	.section ".text16.early.data", "aw", @progbits
+rom_bar_copy_len_dword:
+	.long	0
+	.size	rom_bar_copy_len_dword, . - rom_bar_copy_len_dword
+
+	.section ".text16.early.data", "aw", @progbits
 stolen_bar_register:
 	.word	0
 	.size	stolen_bar_register, . - stolen_bar_register
@@ -440,68 +419,16 @@
 	ret
 	.size	pci_set_mem_access, . - pci_set_mem_access
 
-/* Payload prefix
+/* Image source area length (in dwords)
  *
- * We include a dummy ROM header to cover the "hidden" portion of the
- * overall ROM image.
  */
-	.globl	_payload_align
-	.equ	_payload_align, 512
-	.section ".pprefix", "ax", @progbits
-	.org	0x00
-mromheader:
-	.word	0xaa55			/* BIOS extension signature */
-mromheader_size: .byte 0		/* Size in 512-byte blocks */
-	.org	0x18
-	.word	mpciheader
-	.org	0x1a
-	.word	0
-	.size	mromheader, . - mromheader
-
-	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
-	.ascii	"APPB"
-	.long	mromheader_size
-	.long	512
+	.section ".prefix", "ax", @progbits
+image_source_len_dword:
 	.long	0
-	.previous
-
-mpciheader:
-	.ascii	"PCIR"			/* Signature */
-	.word	pci_vendor_id		/* Vendor identification */
-	.word	pci_device_id		/* Device identification */
-	.word	0x0000			/* Device list pointer */
-	.word	mpciheader_len		/* PCI data structure length */
-	.byte	0x03			/* PCI data structure revision */
-	.byte	0x02, 0x00, 0x00	/* Class code */
-mpciheader_image_length:
-	.word	0			/* Image length */
-	.word	0x0001			/* Revision level */
-	.byte	0xff			/* Code type */
-	.byte	0x80			/* Last image indicator */
-mpciheader_runtime_length:
-	.word	0			/* Maximum run-time image length */
-	.word	0x0000			/* Configuration utility code header */
-	.word	0x0000			/* DMTF CLP entry point */
-	.equ	mpciheader_len, . - mpciheader
-	.size	mpciheader, . - mpciheader
-
-	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
-	.ascii	"APPW"
-	.long	mpciheader_image_length
-	.long	512
-	.long	0
-	.ascii	"APPW"
-	.long	mpciheader_runtime_length
-	.long	512
-	.long	0
-	.previous
-
-/* Fix up additional image source size
- *
- */
+	.size	image_source_len_dword, . - image_source_len_dword
 	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
-	.ascii	"ADPW"
-	.long	extra_size
-	.long	512
+	.ascii	"ADDL"
+	.long	image_source_len_dword
+	.long	4
 	.long	0
 	.previous
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/nbiprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/nbiprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/nbiprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/nbiprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -54,10 +54,6 @@
 	/* Install iPXE */
 	call	install
 
-	/* Set up real-mode stack */
-	movw	%bx, %ss
-	movw	$_estack16, %sp
-
 	/* Jump to .text16 segment */
 	pushw	%ax
 	pushw	$1f
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/pxeprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/pxeprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/pxeprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/pxeprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -5,9 +5,6 @@
 #define PXENV_UNDI_GET_IFACE_INFO	0x0013
 #define	PXENV_STOP_UNDI			0x0015
 #define PXENV_UNLOAD_STACK		0x0070
-#define PXENV_GET_CACHED_INFO		0x0071
-#define PXENV_PACKET_TYPE_DHCP_ACK		0x0002
-#define PXENV_FILE_CMDLINE		0x00e8
 
 #define PXE_HACK_EB54			0x0001
 
@@ -22,19 +19,6 @@
 #define EB_MAGIC_1 ( 'E' + ( 't' << 8 ) + ( 'h' << 16 ) + ( 'e' << 24 ) )
 #define EB_MAGIC_2 ( 'r' + ( 'b' << 8 ) + ( 'o' << 16 ) + ( 'o' << 24 ) )
 
-/* Prefix memory layout:
- *
- *     iPXE binary image
- *     Temporary stack
- *     Temporary copy of DHCPACK packet
- *     Temporary copy of command line
- */
-#define PREFIX_STACK_SIZE 2048
-#define PREFIX_TEMP_DHCPACK PREFIX_STACK_SIZE
-#define PREFIX_TEMP_DHCPACK_SIZE ( 1260 /* sizeof ( BOOTPLAYER_t ) */ )
-#define PREFIX_TEMP_CMDLINE ( PREFIX_TEMP_DHCPACK + PREFIX_TEMP_DHCPACK_SIZE )
-#define PREFIX_TEMP_CMDLINE_SIZE 4096
-
 /*****************************************************************************
  * Entry point:	set operating context, print welcome message
  *****************************************************************************
@@ -62,11 +46,10 @@
 	movw	%ax, %ds
 	movw	$0x40, %ax		/* BIOS data segment access */
 	movw	%ax, %fs
-	/* Set up temporary stack immediately after the iPXE image */
-	movw	%cs, %ax
-	addw	image_size_pgh, %ax
+	/* Set up stack just below 0x7c00 */
+	xorw	%ax, %ax
 	movw	%ax, %ss
-	movl	$PREFIX_STACK_SIZE, %esp
+	movl	$0x7c00, %esp
 	/* Clear direction flag, for the sake of sanity */
 	cld
 	/* Print welcome message */
@@ -77,18 +60,6 @@
 10:	.asciz	"PXE->EB:"
 	.previous
 
-	/* Image size (for stack placement calculation) */
-	.section ".prefix.data", "aw", @progbits
-image_size_pgh:
-	.word	0
-	.previous
-	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
-	.ascii	"ADDW"
-	.long	image_size_pgh
-	.long	16
-	.long	0
-	.previous
-
 /*****************************************************************************
  * Find us a usable !PXE or PXENV+ entry point
  *****************************************************************************
@@ -396,61 +367,6 @@
 	call	print_character
 
 /*****************************************************************************
- * Get cached DHCP_ACK packet
- *****************************************************************************
- */
-get_dhcpack:
-	/* Issue PXENV_GET_CACHED_INFO */
-	xorl	%esi, %esi
-	movw	%ss, %si
-	movw	%si, ( pxe_parameter_structure + 0x08 )
-	movw	$PREFIX_TEMP_DHCPACK, ( pxe_parameter_structure + 0x06 )
-	movw	$PREFIX_TEMP_DHCPACK_SIZE, ( pxe_parameter_structure +0x04 )
-	movw	$PXENV_PACKET_TYPE_DHCP_ACK, ( pxe_parameter_structure + 0x02 )
-	movw	$PXENV_GET_CACHED_INFO, %bx
-	call	pxe_call
-	jnc	1f
-	call	print_pxe_error
-	jmp	99f
-1:	/* Store physical address of packet */
-	shll	$4, %esi
-	addl	$PREFIX_TEMP_DHCPACK, %esi
-	movl	%esi, pxe_cached_dhcpack
-99:
-	.section ".prefix.data", "aw", @progbits
-pxe_cached_dhcpack:
-	.long	0
-	.previous
-
-/*****************************************************************************
- * Check for a command line
- *****************************************************************************
- */
-get_cmdline:
-	/* Issue PXENV_FILE_CMDLINE */
-	xorl	%esi, %esi
-	movw	%ss, %si
-	movw	%si, ( pxe_parameter_structure + 0x06 )
-	movw	$PREFIX_TEMP_CMDLINE, ( pxe_parameter_structure + 0x04 )
-	movw	$PREFIX_TEMP_CMDLINE_SIZE, ( pxe_parameter_structure + 0x02 )
-	movw	$PXENV_FILE_CMDLINE, %bx
-	call	pxe_call
-	jc	99f  /* Suppress errors; this is an iPXE extension API call */
-	/* Check for non-NULL command line */
-	movw	( pxe_parameter_structure + 0x02 ), %ax
-	testw	%ax, %ax
-	jz	99f
-	/* Record command line */
-	shll	$4, %esi
-	addl	$PREFIX_TEMP_CMDLINE, %esi
-	movl	%esi, pxe_cmdline
-99:
-	.section ".prefix.data", "aw", @progbits
-pxe_cmdline:
-	.long	0
-	.previous
-
-/*****************************************************************************
  * Leave NIC in a safe state
  *****************************************************************************
  */
@@ -797,12 +713,6 @@
 	movw	pxe_ss,	%di
 	movl	pxe_esp, %ebp
 
-	/* Retrieve PXE command line, if any */
-	movl	pxe_cmdline, %esi
-
-	/* Retrieve cached DHCPACK, if any */
-	movl	pxe_cached_dhcpack, %ecx
-
 	/* Jump to .text16 segment with %ds pointing to .data16 */
 	movw	%bx, %ds
 	pushw	%ax
@@ -813,12 +723,6 @@
 	/* Update the exit hook */
 	movw	%cs, ( pxe_exit_hook + 2 )
 
-	/* Store command-line pointer */
-	movl	%esi, cmdline_phys
-
-	/* Store cached DHCPACK pointer */
-	movl	%ecx, cached_dhcpack_phys
-
 	/* Run main program */
 	pushl	$main
 	pushw	%cs
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/romprefix.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/romprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/romprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/romprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -23,7 +23,6 @@
 	( PMM_HANDLE_BASE | 0x00001000 )
 #define PMM_HANDLE_BASE_DECOMPRESS_TO \
 	( PMM_HANDLE_BASE | 0x00002000 )
-#define PCI_FUNC_MASK 0x07
 
 /* ROM banner timeout.  Based on the configurable BANNER_TIMEOUT in
  * config.h, but converted to a number of (18Hz) timer ticks, and
@@ -42,14 +41,6 @@
 #define	ZINFO_TYPE_ADxW "ADDW"
 #endif
 
-/* Allow ROM to be marked as containing multiple images
- */
-#if ROMPREFIX_MORE_IMAGES
-#define INDICATOR 0x00
-#else
-#define INDICATOR 0x80
-#endif
-
 	.text
 	.code16
 	.arch i386
@@ -64,8 +55,6 @@
 	jmp	init			/* Initialisation vector */
 checksum:
 	.byte	0
-	.org	0x10
-	.word	ipxeheader
 	.org	0x16
 	.word	undiheader
 	.org	0x18
@@ -81,6 +70,9 @@
 	.long	0
 	.previous
 
+build_id:
+	.long	_build_id		/* Randomly-generated build ID */
+
 pciheader:
 	.ascii	"PCIR"			/* Signature */
 	.word	pci_vendor_id		/* Vendor identification */ 
@@ -93,7 +85,7 @@
 	.word	0			/* Image length */
 	.word	0x0001			/* Revision level */
 	.byte	0x00			/* Code type */
-	.byte	INDICATOR		/* Last image indicator */
+	.byte	0x80			/* Last image indicator */
 pciheader_runtime_length:
 	.word	0			/* Maximum run-time image length */
 	.word	0x0000			/* Configuration utility code header */
@@ -175,25 +167,6 @@
 	.equ undiheader_len, . - undiheader
 	.size undiheader, . - undiheader
 
-ipxeheader:
-	.ascii	"iPXE"			/* Signature */
-	.byte	ipxeheader_len		/* Length of structure */
-	.byte	0			/* Checksum */
-shrunk_rom_size:
-	.byte	0			/* Shrunk size (in 512-byte blocks) */
-	.byte	0			/* Reserved */
-build_id:
-	.long	_build_id		/* Randomly-generated build ID */
-	.equ ipxeheader_len, . - ipxeheader
-	.size ipxeheader, . - ipxeheader
-
-	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
-	.ascii	"ADHB"
-	.long	shrunk_rom_size
-	.long	512
-	.long	0
-	.previous
-
 /* Initialisation (called once during POST)
  *
  * Determine whether or not this is a PnP system via a signature
@@ -353,19 +326,14 @@
 	call	print_message
 	/* We have PMM and so a 1kB stack: preserve whole registers */
 	pushal
-	/* Allocate image source PMM block.  Round up the size to the
-	 * nearest 4kB (8 512-byte sectors) to work around AMI BIOS bugs.
-	 */
-	movzbl	romheader_size, %ecx
-	addw	extra_size, %cx
-	addw	$0x0007, %cx	/* Round up to multiple of 8 512-byte sectors */
-	andw	$0xfff8, %cx
+	/* Allocate image source PMM block */
+	movzwl	image_source_size, %ecx
 	shll	$5, %ecx
 	movl	$PMM_HANDLE_BASE_IMAGE_SOURCE, %ebx
 	movw	$get_pmm_image_source, %bp
 	call	get_pmm
 	movl	%esi, image_source
-	jz	1f
+	jc	1f
 	/* Copy ROM to image source PMM block */
 	pushw	%es
 	xorw	%ax, %ax
@@ -373,8 +341,8 @@
 	movl	%esi, %edi
 	xorl	%esi, %esi
 	movzbl	romheader_size, %ecx
-	shll	$7, %ecx
-	addr32 rep movsl	/* PMM presence implies flat real mode */
+	shll	$9, %ecx
+	addr32 rep movsb	/* PMM presence implies flat real mode */
 	popw	%es
 	/* Shrink ROM */
 	movb	shrunk_rom_size, %al
@@ -423,9 +391,6 @@
 	xorw	%di, %di
 	cs rep	movsb
 
-	/* Skip prompt if this is not the first PCI function */
-	testb	$PCI_FUNC_MASK, init_pci_busdevfn
-	jnz	no_shell
 	/* Prompt for POST-time shell */
 	movw	$init_message_prompt, %si
 	xorw	%di, %di
@@ -444,19 +409,15 @@
 	movw	$init_message_done, %si
 	call	print_message
 	popf
-	jnz	no_shell
+	jnz	2f
 	/* Ctrl-B was pressed: invoke iPXE.  The keypress will be
 	 * picked up by the initial shell prompt, and we will drop
 	 * into a shell.
 	 */
-	xorl	%ebp, %ebp	/* Inhibit use of INT 15,e820 and INT 15,e801 */
+	movl	$0xa0000, %ebp	/* Inhibit relocation during POST */
 	pushw	%cs
 	call	exec
-no_shell:
-	movb	$( '\n' ), %al
-	xorw	%di, %di
-	call	print_character
-
+2:
 	/* Restore registers */
 	popw	%gs
 	popw	%fs
@@ -478,7 +439,7 @@
  *  %es:0000 : PMM structure
  * Returns:
  *  %ebx : PMM handle
- *  %esi : allocated block address, or zero (with ZF set) if allocation failed
+ *  %esi : allocated block address, or zero (with CF set) if allocation failed
  */
 get_pmm:
 	/* Preserve registers */
@@ -494,10 +455,7 @@
 	pushw	%dx
 	pushw	%ax
 	popl	%esi
-	/* Treat 0xffffffff (not supported) as 0x00000000 (not found) */
-	incl	%esi
-	jz	get_pmm_allocate
-	decl	%esi
+	testl	%esi, %esi
 	jz	get_pmm_allocate
 	/* Block found - check acceptability */
 	call	*%bp
@@ -517,20 +475,19 @@
 	pushw	%ax
 	popl	%esi
 	movw	$( '+' ), %di	/* Indicate allocation attempt */
+	testl	%esi, %esi
+	jnz	get_pmm_done
+	stc
 get_pmm_done:
 	/* Print block address */
+	pushfw
 	movw	%di, %ax
 	xorw	%di, %di
 	call	print_character
 	movl	%esi, %eax
 	call	print_hex_dword
-	/* Treat 0xffffffff (not supported) as 0x00000000 (allocation
-	 * failed), and set ZF to indicate a zero result.
-	 */
-	incl	%esi
-	jz	1f
-	decl	%esi
-1:	/* Restore registers and return */
+	popfw
+	/* Restore registers and return */
 	popw	%di
 	popl	%eax
 	ret
@@ -603,7 +560,7 @@
  *
  */
 init_pci_busdevfn:
-	.word	0
+	.word	0xffff
 	.size	init_pci_busdevfn, . - init_pci_busdevfn
 
 /* Image source area
@@ -616,12 +573,31 @@
 	.long	0
 	.size	image_source, . - image_source
 
-/* Additional image source size (in 512-byte sectors)
+/* Image source size (in 512-byte sectors)
  *
  */
-extra_size:
+image_source_size:
 	.word	0
-	.size	extra_size, . - extra_size
+	.size	image_source_size, . - image_source_size
+	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
+	.ascii	"ADDW"
+	.long	image_source_size
+	.long	512
+	.long	0
+	.previous
+
+/* Shrunk ROM size (in 512-byte sectors)
+ *
+ */
+shrunk_rom_size:
+	.byte	0
+	.size	shrunk_rom_size, . - shrunk_rom_size
+	.section ".zinfo.fixup", "a", @progbits	/* Compressor fixups */
+	.ascii	"ADHB"
+	.long	shrunk_rom_size
+	.long	512
+	.long	0
+	.previous
 
 /* Temporary decompression area
  *
@@ -638,7 +614,7 @@
  * Called by the PnP BIOS when it wants to boot us.
  */
 bev_entry:
-	orl	$0xffffffff, %ebp	/* Allow arbitrary relocation */
+	xorl	%ebp, %ebp	/* Allow relocation */
 	pushw	%cs
 	call	exec
 	lret
@@ -673,7 +649,7 @@
 	/* Leave keypress in buffer and start iPXE.  The keypress will
 	 * cause the usual initial Ctrl-B prompt to be skipped.
 	 */
-	orl	$0xffffffff, %ebp	/* Allow arbitrary relocation */
+	xorl	%ebp, %ebp	/* Allow relocation */
 	pushw	%cs
 	call	exec
 1:	/* Try to call original INT 19 vector */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/undiloader.S ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/undiloader.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/prefix/undiloader.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/prefix/undiloader.S	2012-01-06 23:49:04.000000000 +0000
@@ -23,15 +23,15 @@
 	popw	%ds
 	/* UNDI loader parameter structure address into %es:%di */
 	movw	%sp, %bx
-	movw	%ss:22(%bx), %di
-	movw	%ss:24(%bx), %es
+	movw	%ss:18(%bx), %di
+	movw	%ss:20(%bx), %es
 	/* Install to specified real-mode addresses */
 	pushw	%di
 	movw	%es:12(%di), %bx
 	movw	%es:14(%di), %ax
 	movl	image_source, %esi
 	movl	decompress_to, %edi
-	orl	$0xffffffff, %ebp	/* Allow arbitrary relocation */
+	xorl	%ebp, %ebp		/* Allow relocation */
 	call	install_prealloc
 	popw	%di
 	/* Call UNDI loader C code */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/i386-kir.lds ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/i386-kir.lds
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/i386-kir.lds	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/i386-kir.lds	2012-01-06 23:49:04.000000000 +0000
@@ -98,8 +98,6 @@
 	*(.data)
 	*(.data.*)
 	KEEP(*(SORT(.tbl.*)))	/* Various tables.  See include/tables.h */
-	KEEP(*(.provided))
-	KEEP(*(.provided.*))
 	_edata16_progbits = .;
     }
     .bss16 : AT ( _data16_load_offset + __bss16 ) {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/i386.lds ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/i386.lds
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/i386.lds	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/i386.lds	2012-01-06 23:49:04.000000000 +0000
@@ -1,4 +1,4 @@
-/* -*- ld-script -*- */
+/* -*- sh -*- */
 
 /*
  * Linker script for i386 images
@@ -109,8 +109,6 @@
 	*(.data)
 	*(.data.*)
 	KEEP(*(SORT(.tbl.*)))	/* Various tables.  See include/tables.h */
-	KEEP(*(.provided))
-	KEEP(*(.provided.*))
 	_mtextdata = .;
     } .bss.textdata (NOLOAD) : AT ( _end_lma ) {
 	*(.bss)
@@ -124,23 +122,6 @@
     _textdata_memsz	= ABSOLUTE ( _etextdata ) - ABSOLUTE ( _textdata );
 
     /*
-     * Payload prefix
-     *
-     * If present, this will be placed between .text16.early and .text16.late.
-     *
-     */
-    .pprefix 0x0 : AT ( _pprefix_lma ) {
-	_pprefix = .;
-	KEEP(*(.pprefix))
-	KEEP(*(.pprefix.*))
-	_mpprefix = .;
-    } .bss.pprefix (NOLOAD) : AT ( _end_lma ) {
-	_epprefix = .;
-    }
-    _pprefix_filesz	= ABSOLUTE ( _mpprefix ) - ABSOLUTE ( _pprefix );
-    _pprefix_memsz	= ABSOLUTE ( _epprefix ) - ABSOLUTE ( _pprefix );
-
-    /*
      * Compressor information block
      *
      */
@@ -207,13 +188,7 @@
     .			+= _text16_early_filesz;
 
     .			= ALIGN ( _max_align );
-    .			= ALIGN ( _payload_align );
-    _pprefix_lma	= .;
-    .			+= _pprefix_filesz;
-
-    .			= ALIGN ( _max_align );
     _payload_lma	= .;
-    _pprefix_skip	= ABSOLUTE ( _payload_lma ) - ABSOLUTE ( _pprefix_lma );
     _text16_late_lma	= .;
     .			+= _text16_late_filesz;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/linux.lds ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/linux.lds
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/scripts/linux.lds	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/scripts/linux.lds	2012-01-06 23:49:04.000000000 +0000
@@ -53,8 +53,6 @@
 		*(.data)
 		*(.data.*)
 		KEEP(*(SORT(.tbl.*)))
-		KEEP(*(.provided))
-		KEEP(*(.provided.*))
 		_edata = .;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/transitions/liba20.S ipxe-1.0.1~lliurex1505/src/arch/i386/transitions/liba20.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/i386/transitions/liba20.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/i386/transitions/liba20.S	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/cpuid.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/cpuid.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/cpuid.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/cpuid.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,137 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <ipxe/cpuid.h>
-
-/** @file
- *
- * x86 CPU feature detection
- *
- */
-
-/**
- * Check whether or not CPUID instruction is supported
- *
- * @ret is_supported	CPUID instruction is supported
- */
-int cpuid_is_supported ( void ) {
-	unsigned long original;
-	unsigned long inverted;
-
-	__asm__ ( "pushf\n\t"
-		  "pushf\n\t"
-		  "pop %0\n\t"
-		  "mov %0,%1\n\t"
-		  "xor %2,%1\n\t"
-		  "push %1\n\t"
-		  "popf\n\t"
-		  "pushf\n\t"
-		  "pop %1\n\t"
-		  "popf\n\t"
-		  : "=&r" ( original ), "=&r" ( inverted )
-		  : "ir" ( CPUID_FLAG ) );
-	return ( ( original ^ inverted ) & CPUID_FLAG );
-}
-
-/**
- * Get Intel-defined x86 CPU features
- *
- * @v features		x86 CPU features to fill in
- */
-static void x86_intel_features ( struct x86_features *features ) {
-	uint32_t max_level;
-	uint32_t discard_a;
-	uint32_t discard_b;
-	uint32_t discard_c;
-	uint32_t discard_d;
-
-	/* Check that features are available via CPUID */
-	cpuid ( CPUID_VENDOR_ID, &max_level, &discard_b, &discard_c,
-		&discard_d );
-	if ( max_level < CPUID_FEATURES ) {
-		DBGC ( features, "CPUID has no Intel-defined features (max "
-		       "level %08x)\n", max_level );
-		return;
-	}
-
-	/* Get features */
-	cpuid ( CPUID_FEATURES, &discard_a, &discard_b,
-		&features->intel.ecx, &features->intel.edx );
-	DBGC ( features, "CPUID Intel features: %%ecx=%08x, %%edx=%08x\n",
-	       features->intel.ecx, features->intel.edx );
-
-}
-
-/**
- * Get AMD-defined x86 CPU features
- *
- * @v features		x86 CPU features to fill in
- */
-static void x86_amd_features ( struct x86_features *features ) {
-	uint32_t max_level;
-	uint32_t discard_a;
-	uint32_t discard_b;
-	uint32_t discard_c;
-	uint32_t discard_d;
-
-	/* Check that features are available via CPUID */
-	cpuid ( CPUID_AMD_MAX_FN, &max_level, &discard_b, &discard_c,
-		&discard_d );
-	if ( ( max_level & CPUID_AMD_CHECK_MASK ) != CPUID_AMD_CHECK ) {
-		DBGC ( features, "CPUID has no extended functions\n" );
-		return;
-	}
-	if ( max_level < CPUID_AMD_FEATURES ) {
-		DBGC ( features, "CPUID has no AMD-defined features (max "
-		       "level %08x)\n", max_level );
-		return;
-	}
-
-	/* Get features */
-	cpuid ( CPUID_AMD_FEATURES, &discard_a, &discard_b,
-		&features->amd.ecx, &features->amd.edx );
-	DBGC ( features, "CPUID AMD features: %%ecx=%08x, %%edx=%08x\n",
-	       features->amd.ecx, features->amd.edx );
-}
-
-/**
- * Get x86 CPU features
- *
- * @v features		x86 CPU features to fill in
- */
-void x86_features ( struct x86_features *features ) {
-
-	/* Clear all features */
-	memset ( features, 0, sizeof ( *features ) );
-
-	/* Check that CPUID instruction is available */
-	if ( ! cpuid_is_supported() ) {
-		DBGC ( features, "CPUID instruction is not supported\n" );
-		return;
-	}
-
-	/* Get Intel-defined features */
-	x86_intel_features ( features );
-
-	/* Get AMD-defined features */
-	x86_amd_features ( features );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/cpuid_settings.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/cpuid_settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/cpuid_settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/cpuid_settings.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,272 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/init.h>
-#include <ipxe/settings.h>
-#include <ipxe/cpuid.h>
-
-/** @file
- *
- * x86 CPUID settings
- *
- * CPUID settings are numerically encoded as:
- *
- *  Bit  31	Extended function
- *  Bits 30-28	Unused
- *  Bits 27-24	Number of consecutive functions to call, minus one
- *  Bit  23	Return result as little-endian (used for strings)
- *  Bits 22-18	Unused
- *  Bits 17-16	Number of registers in register array, minus one
- *  Bits 15-8	Array of register indices.  First entry in array is in
- *		bits 9-8.  Indices are 0-%eax, 1-%ebx, 2-%ecx, 3-%edx.
- *  Bits 7-0	Starting function number (excluding "extended" bit)
- *
- * This encoding scheme is designed to allow the common case of
- * extracting a single register from a single function to be encoded
- * using "cpuid/<register>.<function>", e.g. "cpuid/2.0x80000001" to
- * retrieve the value of %ecx from calling CPUID with %eax=0x80000001.
- */
-
-/** CPUID setting tag register indices */
-enum cpuid_registers {
-	CPUID_EAX = 0,
-	CPUID_EBX = 1,
-	CPUID_ECX = 2,
-	CPUID_EDX = 3,
-};
-
-/**
- * Construct CPUID setting tag
- *
- * @v function		Starting function number
- * @v num_functions	Number of consecutive functions
- * @v little_endian	Return result as little-endian
- * @v num_registers	Number of registers in register array
- * @v register1		First register in register array (or zero, if empty)
- * @v register2		Second register in register array (or zero, if empty)
- * @v register3		Third register in register array (or zero, if empty)
- * @v register4		Fourth register in register array (or zero, if empty)
- * @ret tag		Setting tag
- */
-#define CPUID_TAG( function, num_functions, little_endian, num_registers, \
-		   register1, register2, register3, register4 )		  \
-	( (function) | ( ( (num_functions) - 1 ) << 24 ) |		  \
-	  ( (little_endian) << 23 ) | ( ( (num_registers) - 1) << 16 ) |  \
-	  ( (register1) << 8 ) | ( (register2) << 10 ) |		  \
-	  ( (register3) << 12 ) | ( (register4) << 14 ) )
-
-/**
- * Extract endianness from CPUID setting tag
- *
- * @v tag		Setting tag
- * @ret little_endian	Result should be returned as little-endian
- */
-#define CPUID_LITTLE_ENDIAN( tag ) ( (tag) & 0x00800000UL )
-
-/**
- * Extract starting function number from CPUID setting tag
- *
- * @v tag		Setting tag
- * @ret function	Starting function number
- */
-#define CPUID_FUNCTION( tag ) ( (tag) & 0x800000ffUL )
-
-/**
- * Extract number of consecutive functions from CPUID setting tag
- *
- * @v tag		Setting tag
- * @ret num_functions	Number of consecutive functions
- */
-#define CPUID_NUM_FUNCTIONS( tag ) ( ( ( (tag) >> 24 ) & 0xf ) + 1 )
-
-/**
- * Extract register array from CPUID setting tag
- *
- * @v tag		Setting tag
- * @ret registers	Register array
- */
-#define CPUID_REGISTERS( tag ) ( ( (tag) >> 8 ) & 0xff )
-
-/**
- * Extract number of registers from CPUID setting tag
- *
- * @v tag		Setting tag
- * @ret num_registers	Number of registers within register array
- */
-#define CPUID_NUM_REGISTERS( tag ) ( ( ( (tag) >> 16 ) & 0x3 ) + 1 )
-
-/** CPUID settings scope */
-static struct settings_scope cpuid_settings_scope;
-
-/**
- * Check applicability of CPUID setting
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @ret applies		Setting applies within this settings block
- */
-static int cpuid_settings_applies ( struct settings *settings __unused,
-				    struct setting *setting ) {
-
-	return ( setting->scope == &cpuid_settings_scope );
-}
-
-/**
- * Fetch value of CPUID setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int cpuid_settings_fetch ( struct settings *settings,
-				  struct setting *setting,
-				  void *data, size_t len ) {
-	uint32_t function;
-	uint32_t max_function;
-	uint32_t num_functions;
-	uint32_t registers;
-	uint32_t num_registers;
-	uint32_t buf[4];
-	uint32_t output;
-	uint32_t discard_b;
-	uint32_t discard_c;
-	uint32_t discard_d;
-	size_t frag_len;
-	size_t result_len = 0;
-
-	/* Fail unless CPUID is supported */
-	if ( ! cpuid_is_supported() ) {
-		DBGC ( settings, "CPUID not supported\n" );
-		return -ENOTSUP;
-	}
-
-	/* Find highest supported function number within this set */
-	function = CPUID_FUNCTION ( setting->tag );
-	cpuid ( function & CPUID_EXTENDED, &max_function, &discard_b,
-		&discard_c, &discard_d );
-
-	/* Fail if maximum function number is meaningless (e.g. if we
-	 * are attempting to call an extended function on a CPU which
-	 * does not support them).
-	 */
-	if ( ( max_function & CPUID_AMD_CHECK_MASK ) !=
-	     ( function & CPUID_AMD_CHECK_MASK ) ) {
-		DBGC ( settings, "CPUID invalid maximum function\n" );
-		return -ENOTSUP;
-	}
-
-	/* Call each function in turn */
-	num_functions = CPUID_NUM_FUNCTIONS ( setting->tag );
-	for ( ; num_functions-- ; function++ ) {
-
-		/* Fail if this function is not supported */
-		if ( function > max_function ) {
-			DBGC ( settings, "CPUID function %#08x not supported\n",
-			       function );
-			return -ENOTSUP;
-		}
-
-		/* Issue CPUID */
-		cpuid ( function, &buf[CPUID_EAX], &buf[CPUID_EBX],
-			&buf[CPUID_ECX], &buf[CPUID_EDX] );
-		DBGC ( settings, "CPUID %#08x => %#08x:%#08x:%#08x:%#08x\n",
-		       function, buf[0], buf[1], buf[2], buf[3] );
-
-		/* Copy results to buffer */
-		registers = CPUID_REGISTERS ( setting->tag );
-		num_registers = CPUID_NUM_REGISTERS ( setting->tag );
-		for ( ; num_registers-- ; registers >>= 2 ) {
-			output = buf[ registers & 0x3 ];
-			if ( ! CPUID_LITTLE_ENDIAN ( setting->tag ) )
-				output = cpu_to_be32 ( output );
-			frag_len = sizeof ( output );
-			if ( frag_len > len )
-				frag_len = len;
-			memcpy ( data, &output, frag_len );
-			data += frag_len;
-			len -= frag_len;
-			result_len += sizeof ( output );
-		}
-	}
-
-	/* Set type if not already specified */
-	if ( ! setting->type )
-		setting->type = &setting_type_hexraw;
-
-	return result_len;
-}
-
-/** CPUID settings operations */
-static struct settings_operations cpuid_settings_operations = {
-	.applies = cpuid_settings_applies,
-	.fetch = cpuid_settings_fetch,
-};
-
-/** CPUID settings */
-static struct settings cpuid_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( cpuid_settings.siblings ),
-	.children = LIST_HEAD_INIT ( cpuid_settings.children ),
-	.op = &cpuid_settings_operations,
-	.default_scope = &cpuid_settings_scope,
-};
-
-/** Initialise CPUID settings */
-static void cpuid_settings_init ( void ) {
-	int rc;
-
-	if ( ( rc = register_settings ( &cpuid_settings, NULL,
-					"cpuid" ) ) != 0 ) {
-		DBG ( "CPUID could not register settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** CPUID settings initialiser */
-struct init_fn cpuid_settings_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = cpuid_settings_init,
-};
-
-/** CPUID predefined settings */
-struct setting cpuid_predefined_settings[] __setting ( SETTING_HOST_EXTRA ) = {
-	{
-		.name = "cpuvendor",
-		.description = "CPU vendor",
-		.tag = CPUID_TAG ( CPUID_VENDOR_ID, 1, 1, 3,
-				   CPUID_EBX, CPUID_EDX, CPUID_ECX, 0 ),
-		.type = &setting_type_string,
-		.scope = &cpuid_settings_scope,
-	},
-	{
-		.name = "cpumodel",
-		.description = "CPU model",
-		.tag = CPUID_TAG ( CPUID_MODEL, 3, 1, 4,
-				   CPUID_EAX, CPUID_EBX, CPUID_ECX, CPUID_EDX ),
-		.type = &setting_type_string,
-		.scope = &cpuid_settings_scope,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/debugcon.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/debugcon.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/debugcon.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/debugcon.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,86 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Debug port console
- *
- * The debug port is supported by bochs (via the "port_e9_hack"
- * configuration file directive) and by qemu (via the "-debugcon"
- * command-line option).
- */
-
-#include <stdint.h>
-#include <ipxe/io.h>
-#include <ipxe/console.h>
-#include <ipxe/init.h>
-#include <config/console.h>
-
-/** Debug port */
-#define DEBUG_PORT 0xe9
-
-/** Debug port installation check magic value */
-#define DEBUG_PORT_CHECK 0xe9
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_DEBUGCON ) && CONSOLE_EXPLICIT ( CONSOLE_DEBUGCON ) )
-#undef CONSOLE_DEBUGCON
-#define CONSOLE_DEBUGCON ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_TUI )
-#endif
-
-/**
- * Print a character to debug port console
- *
- * @v character		Character to be printed
- */
-static void debugcon_putchar ( int character ) {
-
-	/* Write character to debug port */
-	outb ( character, DEBUG_PORT );
-}
-
-/** Debug port console driver */
-struct console_driver debugcon_console __console_driver = {
-	.putchar = debugcon_putchar,
-	.usage = CONSOLE_DEBUGCON,
-};
-
-/**
- * Initialise debug port console
- *
- */
-static void debugcon_init ( void ) {
-	uint8_t check;
-
-	/* Check if console is present */
-	check = inb ( DEBUG_PORT );
-	if ( check != DEBUG_PORT_CHECK ) {
-		DBG ( "Debug port not present; disabling console\n" );
-		debugcon_console.disabled = 1;
-	}
-}
-
-/**
- * Debug port console initialisation function
- */
-struct init_fn debugcon_init_fn __init_fn ( INIT_EARLY ) = {
-	.initialise = debugcon_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/linux/linux_api.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/linux/linux_api.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/linux/linux_api.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/linux/linux_api.c	2012-01-06 23:49:04.000000000 +0000
@@ -37,10 +37,6 @@
 	return linux_syscall ( __NR_close, fd );
 }
 
-off_t linux_lseek ( int fd, off_t offset, int whence ) {
-	return linux_syscall ( __NR_lseek, fd, offset, whence );
-}
-
 __kernel_ssize_t linux_read ( int fd, void *buf, __kernel_size_t count ) {
 	return linux_syscall ( __NR_read, fd, buf, count );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/pcidirect.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/pcidirect.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/pcidirect.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/pcidirect.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_bigint.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_bigint.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_bigint.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_bigint.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,91 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/bigint.h>
-
-/** @file
- *
- * Big integer support
- */
-
-/**
- * Multiply big integers
- *
- * @v multiplicand0	Element 0 of big integer to be multiplied
- * @v multiplier0	Element 0 of big integer to be multiplied
- * @v result0		Element 0 of big integer to hold result
- * @v size		Number of elements
- */
-void bigint_multiply_raw ( const uint32_t *multiplicand0,
-			   const uint32_t *multiplier0,
-			   uint32_t *result0, unsigned int size ) {
-	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplicand =
-		( ( const void * ) multiplicand0 );
-	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplier =
-		( ( const void * ) multiplier0 );
-	bigint_t ( size * 2 ) __attribute__ (( may_alias )) *result =
-		( ( void * ) result0 );
-	unsigned int i;
-	unsigned int j;
-	uint32_t multiplicand_element;
-	uint32_t multiplier_element;
-	uint32_t *result_elements;
-	uint32_t discard_a;
-	uint32_t discard_d;
-	long index;
-
-	/* Zero result */
-	memset ( result, 0, sizeof ( *result ) );
-
-	/* Multiply integers one element at a time */
-	for ( i = 0 ; i < size ; i++ ) {
-		multiplicand_element = multiplicand->element[i];
-		for ( j = 0 ; j < size ; j++ ) {
-			multiplier_element = multiplier->element[j];
-			result_elements = &result->element[ i + j ];
-			/* Perform a single multiply, and add the
-			 * resulting double-element into the result,
-			 * carrying as necessary.  The carry can
-			 * never overflow beyond the end of the
-			 * result, since:
-			 *
-			 *     a < 2^{n}, b < 2^{n} => ab < 2^{2n}
-			 */
-			__asm__ __volatile__ ( "mull %4\n\t"
-					       "addl %%eax, (%5,%2,4)\n\t"
-					       "adcl %%edx, 4(%5,%2,4)\n\t"
-					       "\n1:\n\t"
-					       "adcl $0, 8(%5,%2,4)\n\t"
-					       "inc %2\n\t"
-						       /* Does not affect CF */
-					       "jc 1b\n\t"
-					       : "=&a" ( discard_a ),
-						 "=&d" ( discard_d ),
-						 "=&r" ( index )
-					       : "0" ( multiplicand_element ),
-						 "g" ( multiplier_element ),
-						 "r" ( result_elements ),
-						 "2" ( 0 ) );
-		}
-	}
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_io.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_io.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_io.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_io.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,102 +0,0 @@
-/*
- * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/io.h>
-#include <ipxe/x86_io.h>
-
-/** @file
- *
- * iPXE I/O API for x86
- *
- */
-
-/**
- * Read 64-bit qword from memory-mapped device
- *
- * @v io_addr		I/O address
- * @ret data		Value read
- *
- * This routine uses MMX instructions.
- */
-static __unused uint64_t i386_readq ( volatile uint64_t *io_addr ) {
-	uint64_t data;
-        __asm__ __volatile__ ( "pushl %%edx\n\t"
-			       "pushl %%eax\n\t"
-			       "movq (%1), %%mm0\n\t"
-			       "movq %%mm0, (%%esp)\n\t"
-			       "popl %%eax\n\t"
-			       "popl %%edx\n\t"
-			       "emms\n\t"
-                               : "=A" ( data ) : "r" ( io_addr ) );
-	return data;
-}
-
-/**
- * Write 64-bit qword to memory-mapped device
- *
- * @v data		Value to write
- * @v io_addr		I/O address
- *
- * This routine uses MMX instructions.
- */
-static __unused void i386_writeq ( uint64_t data, volatile uint64_t *io_addr ) {
-	__asm__ __volatile__ ( "pushl %%edx\n\t"
-			       "pushl %%eax\n\t"
-			       "movq (%%esp), %%mm0\n\t"
-			       "movq %%mm0, (%1)\n\t"
-			       "popl %%eax\n\t"
-			       "popl %%edx\n\t"
-			       "emms\n\t"
-			       : : "A" ( data ), "r" ( io_addr ) );
-}
-
-PROVIDE_IOAPI_INLINE ( x86, phys_to_bus );
-PROVIDE_IOAPI_INLINE ( x86, bus_to_phys );
-PROVIDE_IOAPI_INLINE ( x86, ioremap );
-PROVIDE_IOAPI_INLINE ( x86, iounmap );
-PROVIDE_IOAPI_INLINE ( x86, io_to_bus );
-PROVIDE_IOAPI_INLINE ( x86, readb );
-PROVIDE_IOAPI_INLINE ( x86, readw );
-PROVIDE_IOAPI_INLINE ( x86, readl );
-PROVIDE_IOAPI_INLINE ( x86, writeb );
-PROVIDE_IOAPI_INLINE ( x86, writew );
-PROVIDE_IOAPI_INLINE ( x86, writel );
-PROVIDE_IOAPI_INLINE ( x86, inb );
-PROVIDE_IOAPI_INLINE ( x86, inw );
-PROVIDE_IOAPI_INLINE ( x86, inl );
-PROVIDE_IOAPI_INLINE ( x86, outb );
-PROVIDE_IOAPI_INLINE ( x86, outw );
-PROVIDE_IOAPI_INLINE ( x86, outl );
-PROVIDE_IOAPI_INLINE ( x86, insb );
-PROVIDE_IOAPI_INLINE ( x86, insw );
-PROVIDE_IOAPI_INLINE ( x86, insl );
-PROVIDE_IOAPI_INLINE ( x86, outsb );
-PROVIDE_IOAPI_INLINE ( x86, outsw );
-PROVIDE_IOAPI_INLINE ( x86, outsl );
-PROVIDE_IOAPI_INLINE ( x86, iodelay );
-PROVIDE_IOAPI_INLINE ( x86, mb );
-#ifdef __x86_64__
-PROVIDE_IOAPI_INLINE ( x86, readq );
-PROVIDE_IOAPI_INLINE ( x86, writeq );
-#else
-PROVIDE_IOAPI ( x86, readq, i386_readq );
-PROVIDE_IOAPI ( x86, writeq, i386_writeq );
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_string.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_string.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_string.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_string.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 /** @file
@@ -35,8 +34,7 @@
  * @v len		Length
  * @ret dest		Destination address
  */
-void * __attribute__ (( noinline )) __memcpy ( void *dest, const void *src,
-					       size_t len ) {
+void * __memcpy ( void *dest, const void *src, size_t len ) {
 	void *edi = dest;
 	const void *esi = src;
 	int discard_ecx;
@@ -45,146 +43,21 @@
 	 * moves.  Using movsl rather than movsb speeds these up by
 	 * around 32%.
 	 */
-	__asm__ __volatile__ ( "rep movsl"
-			       : "=&D" ( edi ), "=&S" ( esi ),
-				 "=&c" ( discard_ecx )
-			       : "0" ( edi ), "1" ( esi ), "2" ( len >> 2 )
-			       : "memory" );
-	__asm__ __volatile__ ( "rep movsb"
-			       : "=&D" ( edi ), "=&S" ( esi ),
-				 "=&c" ( discard_ecx )
-			       : "0" ( edi ), "1" ( esi ), "2" ( len & 3 )
-			       : "memory" );
-	return dest;
-}
-
-/**
- * Copy memory area backwards
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
-void * __attribute__ (( noinline )) __memcpy_reverse ( void *dest,
-						       const void *src,
-						       size_t len ) {
-	void *edi = ( dest + len - 1 );
-	const void *esi = ( src + len - 1 );
-	int discard_ecx;
-
-	/* Assume memmove() is not performance-critical, and perform a
-	 * bytewise copy for simplicity.
-	 */
-	__asm__ __volatile__ ( "std\n\t"
-			       "rep movsb\n\t"
-			       "cld\n\t"
-			       : "=&D" ( edi ), "=&S" ( esi ),
-				 "=&c" ( discard_ecx )
-			       : "0" ( edi ), "1" ( esi ),
-				 "2" ( len )
-			       : "memory" );
-	return dest;
-}
-
-
-/**
- * Copy (possibly overlapping) memory area
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
-void * __memmove ( void *dest, const void *src, size_t len ) {
-
-	if ( dest <= src ) {
-		return __memcpy ( dest, src, len );
-	} else {
-		return __memcpy_reverse ( dest, src, len );
+	if ( len >> 2 ) {
+		__asm__ __volatile__ ( "rep movsl"
+				       : "=&D" ( edi ), "=&S" ( esi ),
+				         "=&c" ( discard_ecx )
+				       : "0" ( edi ), "1" ( esi ),
+				         "2" ( len >> 2 )
+				       : "memory" );
+	}
+	if ( len & 0x02 ) {
+		__asm__ __volatile__ ( "movsw" : "=&D" ( edi ), "=&S" ( esi )
+				       : "0" ( edi ), "1" ( esi ) : "memory" );
+	}
+	if ( len & 0x01 ) {
+		__asm__ __volatile__ ( "movsb" : "=&D" ( edi ), "=&S" ( esi )
+				       : "0" ( edi ), "1" ( esi ) : "memory" );
 	}
-}
-
-/**
- * Swap memory areas
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
-void * memswap ( void *dest, void *src, size_t len ) {
-	size_t discard_c;
-	int discard;
-
-	__asm__ __volatile__ ( "\n1:\n\t"
-			       "dec %2\n\t"
-			       "js 2f\n\t"
-			       "movb (%0,%2), %b3\n\t"
-			       "xchgb (%1,%2), %b3\n\t"
-			       "movb %b3, (%0,%2)\n\t"
-			       "jmp 1b\n\t"
-			       "2:\n\t"
-			       : "=r" ( src ), "=r" ( dest ),
-				 "=&c" ( discard_c ), "=&q" ( discard )
-			       : "0" ( src ), "1" ( dest ), "2" ( len )
-			       : "memory" );
-
 	return dest;
 }
-
-/**
- * Calculate length of string
- *
- * @v string		String
- * @ret len		Length (excluding NUL)
- */
-size_t strlen ( const char *string ) {
-	const char *discard_D;
-	size_t len_plus_one;
-
-	__asm__ __volatile__ ( "repne scasb\n\t"
-			       "not %1\n\t"
-			       : "=&D" ( discard_D ), "=&c" ( len_plus_one )
-			       : "0" ( string ), "1" ( -1UL ), "a" ( 0 ) );
-
-	return ( len_plus_one - 1 );
-}
-
-/**
- * Compare strings (up to a specified length)
- *
- * @v str1		First string
- * @v str2		Second string
- * @v len		Maximum length
- * @ret diff		Difference
- */
-int strncmp ( const char *str1, const char *str2, size_t len ) {
-	const void *discard_S;
-	const void *discard_D;
-	size_t discard_c;
-	int diff;
-
-	__asm__ __volatile__ ( "\n1:\n\t"
-			       "dec %2\n\t"
-			       "js 2f\n\t"
-			       "lodsb\n\t"
-			       "scasb\n\t"
-			       "jne 3f\n\t"
-			       "testb %b3, %b3\n\t"
-			       "jnz 1b\n\t"
-			       /* Equal */
-			       "\n2:\n\t"
-			       "xor %3, %3\n\t"
-			       "jmp 4f\n\t"
-			       /* Not equal; CF indicates difference */
-			       "\n3:\n\t"
-			       "sbb %3, %3\n\t"
-			       "orb $1, %b3\n\t"
-			       "\n4:\n\t"
-			       : "=&S" ( discard_S ), "=&D" ( discard_D ),
-				 "=&c" ( discard_c ), "=&a" ( diff )
-			       : "0" ( str1 ), "1" ( str2 ), "2" ( len ) );
-
-	return diff;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_tcpip.c ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_tcpip.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/core/x86_tcpip.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/core/x86_tcpip.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,169 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * TCP/IP checksum
- *
- */
-
-#include <limits.h>
-#include <ipxe/tcpip.h>
-
-extern char x86_tcpip_loop_end[];
-
-/**
- * Calculate continued TCP/IP checkum
- *
- * @v partial		Checksum of already-summed data, in network byte order
- * @v data		Data buffer
- * @v len		Length of data buffer
- * @ret cksum		Updated checksum, in network byte order
- */
-uint16_t x86_tcpip_continue_chksum ( uint16_t partial,
-				     const void *data, size_t len ) {
-	unsigned long sum = ( ( ~partial ) & 0xffff );
-	unsigned long initial_word_count;
-	unsigned long loop_count;
-	unsigned long loop_partial_count;
-	unsigned long final_word_count;
-	unsigned long final_byte;
-	unsigned long discard_S;
-	unsigned long discard_c;
-	unsigned long discard_a;
-	unsigned long discard_r1;
-	unsigned long discard_r2;
-
-	/* Calculate number of initial 16-bit words required to bring
-	 * the main loop into alignment.  (We don't care about the
-	 * speed for data aligned to less than 16 bits, since this
-	 * situation won't occur in practice.)
-	 */
-	if ( len >= sizeof ( sum ) ) {
-		initial_word_count = ( ( -( ( intptr_t ) data ) &
-					 ( sizeof ( sum ) - 1 ) ) >> 1 );
-	} else {
-		initial_word_count = 0;
-	}
-	len -= ( initial_word_count * 2 );
-
-	/* Calculate number of iterations of the main loop.  This loop
-	 * processes native machine words (32-bit or 64-bit), and is
-	 * unrolled 16 times.  We calculate an overall iteration
-	 * count, and a starting point for the first iteration.
-	 */
-	loop_count = ( len / ( sizeof ( sum ) * 16 ) );
-	loop_partial_count =
-		( ( len % ( sizeof ( sum ) * 16 ) ) / sizeof ( sum ) );
-
-	/* Calculate number of 16-bit words remaining after the main
-	 * loop completes.
-	 */
-	final_word_count = ( ( len % sizeof ( sum ) ) / 2 );
-
-	/* Calculate whether or not a final byte remains at the end */
-	final_byte = ( len & 1 );
-
-	/* Calculate the checksum */
-	__asm__ ( /* Calculate position at which to jump into the
-		   * unrolled loop.
-		   */
-		  "imul $( -x86_tcpip_loop_step_size ), %4\n\t"
-		  "add %5, %4\n\t"
-
-		  /* Clear carry flag before starting checksumming */
-		  "clc\n\t"
-
-		  /* Checksum initial words */
-		  "jmp 2f\n\t"
-		  "\n1:\n\t"
-		  "lodsw\n\t"
-		  "adcw %w2, %w0\n\t"
-		  "\n2:\n\t"
-		  "loop 1b\n\t"
-
-		  /* Main "lods;adc" loop, unrolled x16 */
-		  "mov %12, %3\n\t"
-		  "jmp *%4\n\t"
-		  "\nx86_tcpip_loop_start:\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "lods%z2\n\tadc %2, %0\n\t"
-		  "\nx86_tcpip_loop_end:\n\t"
-		  "loop x86_tcpip_loop_start\n\t"
-		  ".equ x86_tcpip_loop_step_size, "
-		  "  ( ( x86_tcpip_loop_end - x86_tcpip_loop_start ) >> 4 )\n\t"
-
-		  /* Checksum remaining whole words */
-		  "mov %13, %3\n\t"
-		  "jmp 2f\n\t"
-		  "\n1:\n\t"
-		  "lodsw\n\t"
-		  "adcw %w2, %w0\n\t"
-		  "\n2:\n\t"
-		  "loop 1b\n\t"
-
-		  /* Checksum final byte if applicable */
-		  "mov %14, %3\n\t"
-		  "loop 1f\n\t"
-		  "adcb (%1), %b0\n\t"
-		  "adcb $0, %h0\n\t"
-		  "\n1:\n\t"
-
-		  /* Fold down to a uint16_t */
-		  "push %0\n\t"
-		  "popw %w0\n\t"
-		  "popw %w2\n\t"
-		  "adcw %w2, %w0\n\t"
-#if ULONG_MAX > 0xffffffffUL /* 64-bit only */
-		  "popw %w2\n\t"
-		  "adcw %w2, %w0\n\t"
-		  "popw %w2\n\t"
-		  "adcw %w2, %w0\n\t"
-#endif /* 64-bit only */
-
-		  /* Consume CF */
-		  "adcw $0, %w0\n\t"
-		  "adcw $0, %w0\n\t"
-
-		  : "=&Q" ( sum ), "=&S" ( discard_S ), "=&a" ( discard_a ),
-		    "=&c" ( discard_c ), "=&r" ( discard_r1 ),
-		    "=&r" ( discard_r2 )
-		  : "0" ( sum ), "1" ( data ), "2" ( 0 ),
-		    "3" ( initial_word_count + 1 ), "4" ( loop_partial_count ),
-		    "5" ( x86_tcpip_loop_end ), "g" ( loop_count + 1 ),
-		    "g" ( final_word_count + 1 ), "g" ( final_byte ) );
-
-	return ( ~sum & 0xffff );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/hci/commands/cpuid_cmd.c ipxe-1.0.1~lliurex1505/src/arch/x86/hci/commands/cpuid_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/hci/commands/cpuid_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/hci/commands/cpuid_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,97 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdio.h>
-#include <errno.h>
-#include <getopt.h>
-#include <ipxe/cpuid.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-
-/** @file
- *
- * x86 CPU feature detection command
- *
- */
-
-/** "cpuid" options */
-struct cpuid_options {
-	/** Check AMD-defined features (%eax=0x80000001) */
-	int amd;
-	/** Check features defined via %ecx */
-	int ecx;
-};
-
-/** "cpuid" option list */
-static struct option_descriptor cpuid_opts[] = {
-	OPTION_DESC ( "ext", 'e', no_argument,
-		      struct cpuid_options, amd, parse_flag ),
-	/* "--amd" retained for backwards compatibility */
-	OPTION_DESC ( "amd", 'a', no_argument,
-		      struct cpuid_options, amd, parse_flag ),
-	OPTION_DESC ( "ecx", 'c', no_argument,
-		      struct cpuid_options, ecx, parse_flag ),
-};
-
-/** "cpuid" command descriptor */
-static struct command_descriptor cpuid_cmd =
-	COMMAND_DESC ( struct cpuid_options, cpuid_opts, 1, 1, "<bit>" );
-
-/**
- * The "cpuid" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int cpuid_exec ( int argc, char **argv ) {
-	struct cpuid_options opts;
-	struct x86_features features;
-	struct x86_feature_registers *feature_regs;
-	uint32_t feature_reg;
-	unsigned int bit;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &cpuid_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Parse bit number */
-	if ( ( rc = parse_integer ( argv[optind], &bit ) ) != 0 )
-		return rc;
-
-	/* Get CPU features */
-	x86_features ( &features );
-
-	/* Extract relevant feature register */
-	feature_regs = ( opts.amd ? &features.amd : &features.intel );
-	feature_reg = ( opts.ecx ? feature_regs->ecx : feature_regs->edx );
-
-	/* Check presence of specified feature */
-	return ( ( feature_reg & ( 1 << bit ) ) ? 0 : -ENOENT );
-}
-
-/** x86 CPU feature detection command */
-struct command cpuid_command __command = {
-	.name = "cpuid",
-	.exec = cpuid_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/bigint.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/bigint.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/bigint.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/bigint.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,318 +0,0 @@
-#ifndef _BITS_BIGINT_H
-#define _BITS_BIGINT_H
-
-/** @file
- *
- * Big integer support
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-
-/** Element of a big integer */
-typedef uint32_t bigint_element_t;
-
-/**
- * Initialise big integer
- *
- * @v value0		Element 0 of big integer to initialise
- * @v size		Number of elements
- * @v data		Raw data
- * @v len		Length of raw data
- */
-static inline __attribute__ (( always_inline )) void
-bigint_init_raw ( uint32_t *value0, unsigned int size,
-		  const void *data, size_t len ) {
-	long pad_len = ( sizeof ( bigint_t ( size ) ) - len );
-	void *discard_D;
-	long discard_c;
-
-	/* Copy raw data in reverse order, padding with zeros */
-	__asm__ __volatile__ ( "\n1:\n\t"
-			       "movb -1(%2,%1), %%al\n\t"
-			       "stosb\n\t"
-			       "loop 1b\n\t"
-			       "xorl %%eax, %%eax\n\t"
-			       "mov %3, %1\n\t"
-			       "rep stosb\n\t"
-			       : "=&D" ( discard_D ), "=&c" ( discard_c )
-			       : "r" ( data ), "g" ( pad_len ), "0" ( value0 ),
-				 "1" ( len )
-			       : "eax" );
-}
-
-/**
- * Add big integers
- *
- * @v addend0		Element 0 of big integer to add
- * @v value0		Element 0 of big integer to be added to
- * @v size		Number of elements
- */
-static inline __attribute__ (( always_inline )) void
-bigint_add_raw ( const uint32_t *addend0, uint32_t *value0,
-		 unsigned int size ) {
-	long index;
-	void *discard_S;
-	long discard_c;
-
-	__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
-			       "\n1:\n\t"
-			       "lodsl\n\t"
-			       "adcl %%eax, (%3,%0,4)\n\t"
-			       "inc %0\n\t" /* Does not affect CF */
-			       "loop 1b\n\t"
-			       : "=&r" ( index ), "=&S" ( discard_S ),
-				 "=&c" ( discard_c )
-			       : "r" ( value0 ), "1" ( addend0 ), "2" ( size )
-			       : "eax" );
-}
-
-/**
- * Subtract big integers
- *
- * @v subtrahend0	Element 0 of big integer to subtract
- * @v value0		Element 0 of big integer to be subtracted from
- * @v size		Number of elements
- */
-static inline __attribute__ (( always_inline )) void
-bigint_subtract_raw ( const uint32_t *subtrahend0, uint32_t *value0,
-		      unsigned int size ) {
-	long index;
-	void *discard_S;
-	long discard_c;
-
-	__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
-			       "\n1:\n\t"
-			       "lodsl\n\t"
-			       "sbbl %%eax, (%3,%0,4)\n\t"
-			       "inc %0\n\t" /* Does not affect CF */
-			       "loop 1b\n\t"
-			       : "=&r" ( index ), "=&S" ( discard_S ),
-				 "=&c" ( discard_c )
-			       : "r" ( value0 ), "1" ( subtrahend0 ),
-				 "2" ( size )
-			       : "eax" );
-}
-
-/**
- * Rotate big integer left
- *
- * @v value0		Element 0 of big integer
- * @v size		Number of elements
- */
-static inline __attribute__ (( always_inline )) void
-bigint_rol_raw ( uint32_t *value0, unsigned int size ) {
-	long index;
-	long discard_c;
-
-	__asm__ __volatile__ ( "xor %0, %0\n\t" /* Zero %0 and clear CF */
-			       "\n1:\n\t"
-			       "rcll $1, (%2,%0,4)\n\t"
-			       "inc %0\n\t" /* Does not affect CF */
-			       "loop 1b\n\t"
-			       : "=&r" ( index ), "=&c" ( discard_c )
-			       : "r" ( value0 ), "1" ( size ) );
-}
-
-/**
- * Rotate big integer right
- *
- * @v value0		Element 0 of big integer
- * @v size		Number of elements
- */
-static inline __attribute__ (( always_inline )) void
-bigint_ror_raw ( uint32_t *value0, unsigned int size ) {
-	long discard_c;
-
-	__asm__ __volatile__ ( "clc\n\t"
-			       "\n1:\n\t"
-			       "rcrl $1, -4(%1,%0,4)\n\t"
-			       "loop 1b\n\t"
-			       : "=&c" ( discard_c )
-			       : "r" ( value0 ), "0" ( size ) );
-}
-
-/**
- * Test if big integer is equal to zero
- *
- * @v value0		Element 0 of big integer
- * @v size		Number of elements
- * @ret is_zero		Big integer is equal to zero
- */
-static inline __attribute__ (( always_inline, pure )) int
-bigint_is_zero_raw ( const uint32_t *value0, unsigned int size ) {
-	void *discard_D;
-	long discard_c;
-	int result;
-
-	__asm__ __volatile__ ( "xor %0, %0\n\t" /* Set ZF */
-			       "repe scasl\n\t"
-			       "sete %b0\n\t"
-			       : "=&a" ( result ), "=&D" ( discard_D ),
-				 "=&c" ( discard_c )
-			       : "1" ( value0 ), "2" ( size ) );
-	return result;
-}
-
-/**
- * Compare big integers
- *
- * @v value0		Element 0 of big integer
- * @v reference0	Element 0 of reference big integer
- * @v size		Number of elements
- * @ret geq		Big integer is greater than or equal to the reference
- */
-static inline __attribute__ (( always_inline, pure )) int
-bigint_is_geq_raw ( const uint32_t *value0, const uint32_t *reference0,
-		    unsigned int size ) {
-	const bigint_t ( size ) __attribute__ (( may_alias )) *value =
-		( ( const void * ) value0 );
-	const bigint_t ( size ) __attribute__ (( may_alias )) *reference =
-		( ( const void * ) reference0 );
-	void *discard_S;
-	void *discard_D;
-	long discard_c;
-	int result;
-
-	__asm__ __volatile__ ( "std\n\t"
-			       "\n1:\n\t"
-			       "lodsl\n\t"
-			       "scasl\n\t"
-			       "loope 1b\n\t"
-			       "setae %b0\n\t"
-			       "cld\n\t"
-			       : "=q" ( result ), "=&S" ( discard_S ),
-				 "=&D" ( discard_D ), "=&c" ( discard_c )
-			       : "0" ( 0 ), "1" ( &value->element[ size - 1 ] ),
-				 "2" ( &reference->element[ size - 1 ] ),
-				 "3" ( size )
-			       : "eax" );
-	return result;
-}
-
-/**
- * Test if bit is set in big integer
- *
- * @v value0		Element 0 of big integer
- * @v size		Number of elements
- * @v bit		Bit to test
- * @ret is_set		Bit is set
- */
-static inline __attribute__ (( always_inline )) int
-bigint_bit_is_set_raw ( const uint32_t *value0, unsigned int size,
-			unsigned int bit ) {
-	const bigint_t ( size ) __attribute__ (( may_alias )) *value =
-		( ( const void * ) value0 );
-	unsigned int index = ( bit / ( 8 * sizeof ( value->element[0] ) ) );
-	unsigned int subindex = ( bit % ( 8 * sizeof ( value->element[0] ) ) );
-
-	return ( value->element[index] & ( 1 << subindex ) );
-}
-
-/**
- * Find highest bit set in big integer
- *
- * @v value0		Element 0 of big integer
- * @v size		Number of elements
- * @ret max_bit		Highest bit set + 1 (or 0 if no bits set)
- */
-static inline __attribute__ (( always_inline )) int
-bigint_max_set_bit_raw ( const uint32_t *value0, unsigned int size ) {
-	long discard_c;
-	int result;
-
-	__asm__ __volatile__ ( "\n1:\n\t"
-			       "bsrl -4(%2,%1,4), %0\n\t"
-			       "loopz 1b\n\t"
-			       "rol %1\n\t" /* Does not affect ZF */
-			       "rol %1\n\t"
-			       "leal 1(%k0,%k1,8), %k0\n\t"
-			       "jnz 2f\n\t"
-			       "xor %0, %0\n\t"
-			       "\n2:\n\t"
-			       : "=&r" ( result ), "=&c" ( discard_c )
-			       : "r" ( value0 ), "1" ( size ) );
-	return result;
-}
-
-/**
- * Grow big integer
- *
- * @v source0		Element 0 of source big integer
- * @v source_size	Number of elements in source big integer
- * @v dest0		Element 0 of destination big integer
- * @v dest_size		Number of elements in destination big integer
- */
-static inline __attribute__ (( always_inline )) void
-bigint_grow_raw ( const uint32_t *source0, unsigned int source_size,
-		  uint32_t *dest0, unsigned int dest_size ) {
-	long pad_size = ( dest_size - source_size );
-	void *discard_D;
-	void *discard_S;
-	long discard_c;
-
-	__asm__ __volatile__ ( "rep movsl\n\t"
-			       "xorl %%eax, %%eax\n\t"
-			       "mov %3, %2\n\t"
-			       "rep stosl\n\t"
-			       : "=&D" ( discard_D ), "=&S" ( discard_S ),
-				 "=&c" ( discard_c )
-			       : "g" ( pad_size ), "0" ( dest0 ),
-				 "1" ( source0 ), "2" ( source_size )
-			       : "eax" );
-}
-
-/**
- * Shrink big integer
- *
- * @v source0		Element 0 of source big integer
- * @v source_size	Number of elements in source big integer
- * @v dest0		Element 0 of destination big integer
- * @v dest_size		Number of elements in destination big integer
- */
-static inline __attribute__ (( always_inline )) void
-bigint_shrink_raw ( const uint32_t *source0, unsigned int source_size __unused,
-		    uint32_t *dest0, unsigned int dest_size ) {
-	void *discard_D;
-	void *discard_S;
-	long discard_c;
-
-	__asm__ __volatile__ ( "rep movsl\n\t"
-			       : "=&D" ( discard_D ), "=&S" ( discard_S ),
-				 "=&c" ( discard_c )
-			       : "0" ( dest0 ), "1" ( source0 ),
-				 "2" ( dest_size )
-			       : "eax" );
-}
-
-/**
- * Finalise big integer
- *
- * @v value0		Element 0 of big integer to finalise
- * @v size		Number of elements
- * @v out		Output buffer
- * @v len		Length of output buffer
- */
-static inline __attribute__ (( always_inline )) void
-bigint_done_raw ( const uint32_t *value0, unsigned int size __unused,
-		  void *out, size_t len ) {
-	void *discard_D;
-	long discard_c;
-
-	/* Copy raw data in reverse order */
-	__asm__ __volatile__ ( "\n1:\n\t"
-			       "movb -1(%2,%1), %%al\n\t"
-			       "stosb\n\t"
-			       "loop 1b\n\t"
-			       : "=&D" ( discard_D ), "=&c" ( discard_c )
-			       : "r" ( value0 ), "0" ( out ), "1" ( len )
-			       : "eax" );
-}
-
-extern void bigint_multiply_raw ( const uint32_t *multiplicand0,
-				  const uint32_t *multiplier0,
-				  uint32_t *value0, unsigned int size );
-
-#endif /* _BITS_BIGINT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/errfile.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/errfile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/errfile.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/errfile.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,53 +0,0 @@
-#ifndef _BITS_ERRFILE_H
-#define _BITS_ERRFILE_H
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @addtogroup errfile Error file identifiers
- * @{
- */
-
-#define ERRFILE_memtop_umalloc	( ERRFILE_ARCH | ERRFILE_CORE | 0x00000000 )
-#define ERRFILE_memmap		( ERRFILE_ARCH | ERRFILE_CORE | 0x00010000 )
-#define ERRFILE_pnpbios		( ERRFILE_ARCH | ERRFILE_CORE | 0x00020000 )
-#define ERRFILE_bios_smbios	( ERRFILE_ARCH | ERRFILE_CORE | 0x00030000 )
-#define ERRFILE_biosint		( ERRFILE_ARCH | ERRFILE_CORE | 0x00040000 )
-#define ERRFILE_int13		( ERRFILE_ARCH | ERRFILE_CORE | 0x00050000 )
-#define ERRFILE_pxeparent	( ERRFILE_ARCH | ERRFILE_CORE | 0x00060000 )
-#define ERRFILE_runtime		( ERRFILE_ARCH | ERRFILE_CORE | 0x00070000 )
-#define ERRFILE_vmware		( ERRFILE_ARCH | ERRFILE_CORE | 0x00080000 )
-#define ERRFILE_guestrpc	( ERRFILE_ARCH | ERRFILE_CORE | 0x00090000 )
-#define ERRFILE_guestinfo	( ERRFILE_ARCH | ERRFILE_CORE | 0x000a0000 )
-#define ERRFILE_apm		( ERRFILE_ARCH | ERRFILE_CORE | 0x000b0000 )
-
-#define ERRFILE_bootsector     ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00000000 )
-#define ERRFILE_bzimage	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00010000 )
-#define ERRFILE_eltorito       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00020000 )
-#define ERRFILE_multiboot      ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00030000 )
-#define ERRFILE_nbi	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00040000 )
-#define ERRFILE_pxe_image      ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00050000 )
-#define ERRFILE_elfboot	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00060000 )
-#define ERRFILE_comboot        ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00070000 )
-#define ERRFILE_com32          ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00080000 )
-#define ERRFILE_comboot_resolv ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x00090000 )
-#define ERRFILE_comboot_call   ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000a0000 )
-#define ERRFILE_sdi	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000b0000 )
-#define ERRFILE_initrd	       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000c0000 )
-#define ERRFILE_pxe_call       ( ERRFILE_ARCH | ERRFILE_IMAGE | 0x000d0000 )
-
-#define ERRFILE_undi		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00000000 )
-#define ERRFILE_undiload	 ( ERRFILE_ARCH | ERRFILE_NET | 0x00010000 )
-#define ERRFILE_undinet		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00020000 )
-#define ERRFILE_undionly	 ( ERRFILE_ARCH | ERRFILE_NET | 0x00030000 )
-#define ERRFILE_undirom		 ( ERRFILE_ARCH | ERRFILE_NET | 0x00040000 )
-
-#define ERRFILE_timer_rdtsc   ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00000000 )
-#define ERRFILE_timer_bios    ( ERRFILE_ARCH | ERRFILE_DRIVER | 0x00010000 )
-
-#define ERRFILE_cpuid_cmd      ( ERRFILE_ARCH | ERRFILE_OTHER | 0x00000000 )
-#define ERRFILE_cpuid_settings ( ERRFILE_ARCH | ERRFILE_OTHER | 0x00010000 )
-
-/** @} */
-
-#endif /* _BITS_ERRFILE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/io.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/io.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/io.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _BITS_IO_H
-#define _BITS_IO_H
-
-/** @file
- *
- * x86-specific I/O API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/x86_io.h>
-
-#endif /* _BITS_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/string.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/string.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/string.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/string.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,46 +1,44 @@
-#ifndef X86_BITS_STRING_H
-#define X86_BITS_STRING_H
-
+#ifndef ETHERBOOT_BITS_STRING_H
+#define ETHERBOOT_BITS_STRING_H
 /*
- * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
+ * Taken from Linux /usr/include/asm/string.h
+ * All except memcpy, memmove, memset and memcmp removed.
  *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Non-standard memswap() function added because it saves quite a bit
+ * of code (mbrown@fensystems.co.uk).
  */
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Optimised string operations
+/*
+ * This string-include defines all string functions as inline
+ * functions. Use gcc. It also assumes ds=es=data space, this should be
+ * normal. Most of the string-functions are rather heavily hand-optimized,
+ * see especially strtok,strstr,str[c]spn. They should work, but are not
+ * very easy to understand. Everything is done entirely within the register
+ * set, making the functions fast and clean. String instructions have been
+ * used through-out, making for "slightly" unclear code :-)
  *
+ *		NO Copyright (C) 1991, 1992 Linus Torvalds,
+ *		consider these trivial functions to be PD.
  */
 
+FILE_LICENCE ( PUBLIC_DOMAIN );
+
 #define __HAVE_ARCH_MEMCPY
 
 extern void * __memcpy ( void *dest, const void *src, size_t len );
-extern void * __memcpy_reverse ( void *dest, const void *src, size_t len );
 
-/**
- * Copy memory area (where length is a compile-time constant)
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
+#if 0
+static inline __attribute__ (( always_inline )) void *
+__memcpy ( void *dest, const void *src, size_t len ) {
+	int d0, d1, d2;
+	__asm__ __volatile__ ( "rep ; movsb"
+			       : "=&c" ( d0 ), "=&S" ( d1 ), "=&D" ( d2 )
+			       : "0" ( len ), "1" ( src ), "2" ( dest )
+			       : "memory" );
+	return dest; 
+}
+#endif
+
 static inline __attribute__ (( always_inline )) void *
 __constant_memcpy ( void *dest, const void *src, size_t len ) {
 	union {
@@ -152,81 +150,103 @@
 	return dest;
 }
 
-/**
- * Copy memory area
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
-static inline __attribute__ (( always_inline )) void *
-memcpy ( void *dest, const void *src, size_t len ) {
-	if ( __builtin_constant_p ( len ) ) {
-		return __constant_memcpy ( dest, src, len );
-	} else {
-		return __memcpy ( dest, src, len );
-	}
-}
+#define memcpy( dest, src, len )			\
+	( __builtin_constant_p ( (len) ) ?		\
+	  __constant_memcpy ( (dest), (src), (len) ) :	\
+	  __memcpy ( (dest), (src), (len) ) )
 
 #define __HAVE_ARCH_MEMMOVE
-
-extern void * __memmove ( void *dest, const void *src, size_t len );
-
-/**
- * Copy (possibly overlapping) memory area
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length
- * @ret dest		Destination address
- */
-static inline __attribute__ (( always_inline )) void *
-memmove ( void *dest, const void *src, size_t len ) {
-	ssize_t offset = ( dest - src );
-
-	if ( __builtin_constant_p ( offset ) ) {
-		if ( offset <= 0 ) {
-			return memcpy ( dest, src, len );
-		} else {
-			return __memcpy_reverse ( dest, src, len );
-		}
-	} else {
-		return __memmove ( dest, src, len );
-	}
+static inline void * memmove(void * dest,const void * src, size_t n)
+{
+int d0, d1, d2;
+if (dest<src)
+__asm__ __volatile__(
+	"cld\n\t"
+	"rep\n\t"
+	"movsb"
+	: "=&c" (d0), "=&S" (d1), "=&D" (d2)
+	:"0" (n),"1" (src),"2" (dest)
+	: "memory");
+else
+__asm__ __volatile__(
+	"std\n\t"
+	"rep\n\t"
+	"movsb\n\t"
+	"cld"
+	: "=&c" (d0), "=&S" (d1), "=&D" (d2)
+	:"0" (n),
+	 "1" (n-1+(const char *)src),
+	 "2" (n-1+(char *)dest)
+	:"memory");
+return dest;
 }
 
 #define __HAVE_ARCH_MEMSET
-
-/**
- * Fill memory region
- *
- * @v dest		Destination address
- * @v fill		Fill pattern
- * @v len		Length
- * @ret dest		Destination address
- */
-static inline void * memset ( void *dest, int fill, size_t len ) {
-	void *discard_D;
-	size_t discard_c;
-
-	__asm__ __volatile__ ( "rep stosb"
-			       : "=&D" ( discard_D ), "=&c" ( discard_c )
-			       : "0" ( dest ), "1" ( len ), "a" ( fill )
-			       : "memory" );
-	return dest;
+static inline void * memset(void *s, int c,size_t count)
+{
+int d0, d1;
+__asm__ __volatile__(
+	"cld\n\t"
+	"rep\n\t"
+	"stosb"
+	: "=&c" (d0), "=&D" (d1)
+	:"a" (c),"1" (s),"0" (count)
+	:"memory");
+return s;
 }
 
 #define __HAVE_ARCH_MEMSWAP
-
-extern void * memswap ( void *dest, void *src, size_t len );
+static inline void * memswap(void *dest, void *src, size_t n)
+{
+long d0, d1, d2, d3;
+__asm__ __volatile__(
+	"\n1:\t"
+	"movb (%2),%%al\n\t"
+	"xchgb (%1),%%al\n\t"
+	"inc %1\n\t"
+	"stosb\n\t"
+	"loop 1b"
+	: "=&c" (d0), "=&S" (d1), "=&D" (d2), "=&a" (d3)
+	: "0" (n), "1" (src), "2" (dest)
+	: "memory" );
+return dest;
+}
 
 #define __HAVE_ARCH_STRNCMP
-
-extern int strncmp ( const char *str1, const char *str2, size_t len );
+static inline int strncmp(const char * cs,const char * ct,size_t count)
+{
+register int __res;
+int d0, d1, d2;
+__asm__ __volatile__(
+	"1:\tdecl %3\n\t"
+	"js 2f\n\t"
+	"lodsb\n\t"
+	"scasb\n\t"
+	"jne 3f\n\t"
+	"testb %%al,%%al\n\t"
+	"jne 1b\n"
+	"2:\txorl %%eax,%%eax\n\t"
+	"jmp 4f\n"
+	"3:\tsbbl %%eax,%%eax\n\t"
+	"orb $1,%%al\n"
+	"4:"
+		     :"=a" (__res), "=&S" (d0), "=&D" (d1), "=&c" (d2)
+		     :"1" (cs),"2" (ct),"3" (count));
+return __res;
+}
 
 #define __HAVE_ARCH_STRLEN
+static inline size_t strlen(const char * s)
+{
+int d0;
+register int __res;
+__asm__ __volatile__(
+	"repne\n\t"
+	"scasb\n\t"
+	"notl %0\n\t"
+	"decl %0"
+	:"=c" (__res), "=&D" (d0) :"1" (s),"a" (0), "0" (0xffffffff));
+return __res;
+}
 
-extern size_t strlen ( const char *string );
-
-#endif /* X86_BITS_STRING_H */
+#endif /* ETHERBOOT_BITS_STRING_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/tcpip.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/tcpip.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/bits/tcpip.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/bits/tcpip.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,17 +0,0 @@
-#ifndef _BITS_TCPIP_H
-#define _BITS_TCPIP_H
-
-/** @file
- *
- * Transport-network layer interface
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-extern uint16_t x86_tcpip_continue_chksum ( uint16_t partial,
-					    const void *data, size_t len );
-
-#define tcpip_continue_chksum x86_tcpip_continue_chksum
-
-#endif /* _BITS_TCPIP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/ipxe/cpuid.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/ipxe/cpuid.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/ipxe/cpuid.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/ipxe/cpuid.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,78 +0,0 @@
-#ifndef _IPXE_CPUID_H
-#define _IPXE_CPUID_H
-
-/** @file
- *
- * x86 CPU feature detection
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-/** An x86 CPU feature register set */
-struct x86_feature_registers {
-	/** Features returned via %ecx */
-	uint32_t ecx;
-	/** Features returned via %edx */
-	uint32_t edx;
-};
-
-/** x86 CPU features */
-struct x86_features {
-	/** Intel-defined features (%eax=0x00000001) */
-	struct x86_feature_registers intel;
-	/** AMD-defined features (%eax=0x80000001) */
-	struct x86_feature_registers amd;
-};
-
-/** CPUID support flag */
-#define CPUID_FLAG 0x00200000UL
-
-/** CPUID extended function */
-#define CPUID_EXTENDED 0x80000000UL
-
-/** Get vendor ID and largest standard function */
-#define CPUID_VENDOR_ID 0x00000000UL
-
-/** Get standard features */
-#define CPUID_FEATURES 0x00000001UL
-
-/** Get largest extended function */
-#define CPUID_AMD_MAX_FN 0x80000000UL
-
-/** Extended function existence check */
-#define CPUID_AMD_CHECK 0x80000000UL
-
-/** Extended function existence check mask */
-#define CPUID_AMD_CHECK_MASK 0xffff0000UL
-
-/** Get extended features */
-#define CPUID_AMD_FEATURES 0x80000001UL
-
-/** Get CPU model */
-#define CPUID_MODEL 0x80000002UL
-
-/**
- * Issue CPUID instruction
- *
- * @v operation		CPUID operation
- * @v eax		Output via %eax
- * @v ebx		Output via %ebx
- * @v ecx		Output via %ecx
- * @v edx		Output via %edx
- */
-static inline __attribute__ (( always_inline )) void
-cpuid ( uint32_t operation, uint32_t *eax, uint32_t *ebx, uint32_t *ecx,
-	uint32_t *edx ) {
-
-	__asm__ ( "cpuid"
-		  : "=a" ( *eax ), "=b" ( *ebx ), "=c" ( *ecx ), "=d" ( *edx )
-		  : "0" ( operation ) );
-}
-
-extern int cpuid_is_supported ( void );
-extern void x86_features ( struct x86_features *features );
-
-#endif /* _IPXE_CPUID_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/ipxe/x86_io.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/ipxe/x86_io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/ipxe/x86_io.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/ipxe/x86_io.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,159 +0,0 @@
-#ifndef _IPXE_X86_IO_H
-#define _IPXE_X86_IO_H
-
-/** @file
- *
- * iPXE I/O API for x86
- *
- * x86 uses direct pointer dereferences for accesses to memory-mapped
- * I/O space, and the inX/outX instructions for accesses to
- * port-mapped I/O space.
- *
- * 64-bit atomic accesses (readq() and writeq()) use MMX instructions
- * under i386, and will crash original Pentium and earlier CPUs.
- * Fortunately, no hardware that requires atomic 64-bit accesses will
- * physically fit into a machine with such an old CPU anyway.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef IOAPI_X86
-#define IOAPI_PREFIX_x86
-#else
-#define IOAPI_PREFIX_x86 __x86_
-#endif
-
-/*
- * Memory space mappings
- *
- */
-
-/*
- * Physical<->Bus and Bus<->I/O address mappings
- *
- */
-
-static inline __always_inline unsigned long
-IOAPI_INLINE ( x86, phys_to_bus ) ( unsigned long phys_addr ) {
-	return phys_addr;
-}
-
-static inline __always_inline unsigned long
-IOAPI_INLINE ( x86, bus_to_phys ) ( unsigned long bus_addr ) {
-	return bus_addr;
-}
-
-static inline __always_inline void *
-IOAPI_INLINE ( x86, ioremap ) ( unsigned long bus_addr, size_t len __unused ) {
-	return phys_to_virt ( bus_addr );
-}
-
-static inline __always_inline void
-IOAPI_INLINE ( x86, iounmap ) ( volatile const void *io_addr __unused ) {
-	/* Nothing to do */
-}
-
-static inline __always_inline unsigned long
-IOAPI_INLINE ( x86, io_to_bus ) ( volatile const void *io_addr ) {
-	return virt_to_phys ( io_addr );
-}
-
-/*
- * MMIO reads and writes up to native word size
- *
- */
-
-#define X86_READX( _api_func, _type )					      \
-static inline __always_inline _type					      \
-IOAPI_INLINE ( x86, _api_func ) ( volatile _type *io_addr ) {		      \
-	return *io_addr;						      \
-}
-X86_READX ( readb, uint8_t );
-X86_READX ( readw, uint16_t );
-X86_READX ( readl, uint32_t );
-#ifdef __x86_64__
-X86_READX ( readq, uint64_t );
-#endif
-
-#define X86_WRITEX( _api_func, _type )					      \
-static inline __always_inline void					      \
-IOAPI_INLINE ( x86, _api_func ) ( _type data,				      \
-				  volatile _type *io_addr ) {		      \
-	*io_addr = data;						      \
-}
-X86_WRITEX ( writeb, uint8_t );
-X86_WRITEX ( writew, uint16_t );
-X86_WRITEX ( writel, uint32_t );
-#ifdef __x86_64__
-X86_WRITEX ( writeq, uint64_t );
-#endif
-
-/*
- * PIO reads and writes up to 32 bits
- *
- */
-
-#define X86_INX( _insn_suffix, _type, _reg_prefix )			      \
-static inline __always_inline _type					      \
-IOAPI_INLINE ( x86, in ## _insn_suffix ) ( volatile _type *io_addr ) {	      \
-	_type data;							      \
-	__asm__ __volatile__ ( "in" #_insn_suffix " %w1, %" _reg_prefix "0"   \
-			       : "=a" ( data ) : "Nd" ( io_addr ) );	      \
-	return data;							      \
-}									      \
-static inline __always_inline void					      \
-IOAPI_INLINE ( x86, ins ## _insn_suffix ) ( volatile _type *io_addr,	      \
-					    _type *data,		      \
-					    unsigned int count ) {	      \
-	unsigned int discard_D;						      \
-	__asm__ __volatile__ ( "rep ins" #_insn_suffix			      \
-			       : "=D" ( discard_D )			      \
-			       : "d" ( io_addr ), "c" ( count ),	      \
-				 "0" ( data ) );			      \
-}
-X86_INX ( b, uint8_t, "b" );
-X86_INX ( w, uint16_t, "w" );
-X86_INX ( l, uint32_t, "k" );
-
-#define X86_OUTX( _insn_suffix, _type, _reg_prefix )			      \
-static inline __always_inline void					      \
-IOAPI_INLINE ( x86, out ## _insn_suffix ) ( _type data,			      \
-					    volatile _type *io_addr ) {	      \
-	__asm__ __volatile__ ( "out" #_insn_suffix " %" _reg_prefix "0, %w1"  \
-			       : : "a" ( data ), "Nd" ( io_addr ) );	      \
-}									      \
-static inline __always_inline void					      \
-IOAPI_INLINE ( x86, outs ## _insn_suffix ) ( volatile _type *io_addr,	      \
-					     const _type *data,		      \
-					     unsigned int count ) {	      \
-	unsigned int discard_S;						      \
-	__asm__ __volatile__ ( "rep outs" #_insn_suffix			      \
-			       : "=S" ( discard_S )			      \
-			       : "d" ( io_addr ), "c" ( count ),	      \
-				 "0" ( data ) );			      \
-}
-X86_OUTX ( b, uint8_t, "b" );
-X86_OUTX ( w, uint16_t, "w" );
-X86_OUTX ( l, uint32_t, "k" );
-
-/*
- * Slow down I/O
- *
- */
-
-static inline __always_inline void
-IOAPI_INLINE ( x86, iodelay ) ( void ) {
-	__asm__ __volatile__ ( "outb %al, $0x80" );
-}
-
-/*
- * Memory barrier
- *
- */
-
-static inline __always_inline void
-IOAPI_INLINE ( x86, mb ) ( void ) {
-	__asm__ __volatile__ ( "lock; addl $0, 0(%%esp)" : : : "memory" );
-}
-
-#endif /* _IPXE_X86_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/valgrind/memcheck.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/valgrind/memcheck.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/valgrind/memcheck.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/valgrind/memcheck.h	2012-01-06 23:49:04.000000000 +0000
@@ -60,8 +60,6 @@
 #ifndef __MEMCHECK_H
 #define __MEMCHECK_H
 
-FILE_LICENCE ( BSD3 );
-
 
 /* This file is for inclusion into client (your!) code.
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/valgrind/valgrind.h ipxe-1.0.1~lliurex1505/src/arch/x86/include/valgrind/valgrind.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/include/valgrind/valgrind.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/include/valgrind/valgrind.h	2012-01-06 23:49:04.000000000 +0000
@@ -73,8 +73,6 @@
 #ifndef __VALGRIND_H
 #define __VALGRIND_H
 
-FILE_LICENCE ( BSD3 );
-
 
 /* ------------------------------------------------------------------ */
 /* VERSION NUMBER OF VALGRIND                                         */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/interface/efi/efix86_nap.c ipxe-1.0.1~lliurex1505/src/arch/x86/interface/efi/efix86_nap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/interface/efi/efix86_nap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/interface/efi/efix86_nap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/Makefile ipxe-1.0.1~lliurex1505/src/arch/x86/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/Makefile	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/Makefile	2012-01-06 23:49:04.000000000 +0000
@@ -7,7 +7,6 @@
 SRCDIRS		+= arch/x86/core
 SRCDIRS		+= arch/x86/interface/efi
 SRCDIRS		+= arch/x86/prefix
-SRCDIRS		+= arch/x86/hci/commands
 
 # breaks building some of the linux-related objects
 CFLAGS		+= -Ulinux
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/Makefile.efi ipxe-1.0.1~lliurex1505/src/arch/x86/Makefile.efi
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/Makefile.efi	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/Makefile.efi	2012-01-06 23:49:04.000000000 +0000
@@ -12,8 +12,6 @@
 #
 NON_AUTO_MEDIA	+= efi
 NON_AUTO_MEDIA	+= efidrv
-NON_AUTO_MEDIA	+= drv.efi
-NON_AUTO_MEDIA	+= efirom
 
 # Rules for building EFI files
 #
@@ -25,14 +23,6 @@
 	$(QM)$(ECHO) "  [FINISH] $@"
 	$(Q)$(ELF2EFI) --subsystem=11 $< $@
 
-$(BIN)/%.drv.efi : $(BIN)/%.efidrv
-	$(QM)$(ECHO) "  [FINISH] $@"
-	$(Q)$(CP) $< $@
-
 $(BIN)/%.efirom : $(BIN)/%.efidrv $(EFIROM)
 	$(QM)$(ECHO) "  [FINISH] $@"
 	$(Q)$(EFIROM) -v $(TGT_PCI_VENDOR) -d $(TGT_PCI_DEVICE) $< $@
-
-$(BIN)/efidrv.cab : $(BIN)/alldrv.efis # $(ALL_drv.efi) is not yet defined
-	$(QM)$(ECHO) "  [CAB] $@"
-	$(Q)$(LCAB) -n -q $(ALL_drv.efi) $@
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/prefix/efidrvprefix.c ipxe-1.0.1~lliurex1505/src/arch/x86/prefix/efidrvprefix.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/prefix/efidrvprefix.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/prefix/efidrvprefix.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/prefix/efiprefix.c ipxe-1.0.1~lliurex1505/src/arch/x86/prefix/efiprefix.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/prefix/efiprefix.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/prefix/efiprefix.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,12 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdlib.h>
-#include <errno.h>
 #include <ipxe/efi/efi.h>
 
 /**
@@ -39,5 +37,5 @@
 		return efirc;
 
 	/* Call to main() */
-	return EFIRC ( main () );
+	return RC_TO_EFIRC ( main () );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/scripts/efi.lds ipxe-1.0.1~lliurex1505/src/arch/x86/scripts/efi.lds
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86/scripts/efi.lds	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86/scripts/efi.lds	2012-01-06 23:49:04.000000000 +0000
@@ -55,8 +55,6 @@
 	*(.data)
 	*(.data.*)
 	KEEP(*(SORT(.tbl.*)))	/* Various tables.  See include/tables.h */
-	KEEP(*(.provided))
-	KEEP(*(.provided.*))
 	_edata = .;
     }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/core/linux/linuxprefix.S ipxe-1.0.1~lliurex1505/src/arch/x86_64/core/linux/linuxprefix.S
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/core/linux/linuxprefix.S	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/core/linux/linuxprefix.S	2012-01-06 23:49:04.000000000 +0000
@@ -22,4 +22,4 @@
 	movq	$__NR_exit, %rax
 	syscall
 
-	.size _linux_start, . - _linux_start
+	.size _start, . - _start
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/byteswap.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/byteswap.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/byteswap.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/byteswap.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,47 +1,22 @@
 #ifndef _BITS_BYTESWAP_H
 #define _BITS_BYTESWAP_H
 
-/** @file
- *
- * Byte-order swapping functions
- *
- */
-
-#include <stdint.h>
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
 static inline __attribute__ (( always_inline, const )) uint16_t
 __bswap_variable_16 ( uint16_t x ) {
 	__asm__ ( "xchgb %b0,%h0" : "=Q" ( x ) : "0" ( x ) );
 	return x;
 }
 
-static inline __attribute__ (( always_inline )) void
-__bswap_16s ( uint16_t *x ) {
-	__asm__ ( "rorw $8, %0" : "+m" ( *x ) );
-}
-
 static inline __attribute__ (( always_inline, const )) uint32_t
 __bswap_variable_32 ( uint32_t x ) {
 	__asm__ ( "bswapl %k0" : "=r" ( x ) : "0" ( x ) );
 	return x;
 }
 
-static inline __attribute__ (( always_inline )) void
-__bswap_32s ( uint32_t *x ) {
-	__asm__ ( "bswapl %k0" : "=r" ( *x ) : "0" ( *x ) );
-}
-
 static inline __attribute__ (( always_inline, const )) uint64_t
 __bswap_variable_64 ( uint64_t x ) {
 	__asm__ ( "bswapq %q0" : "=r" ( x ) : "0" ( x ) );
 	return x;
 }
 
-static inline __attribute__ (( always_inline )) void
-__bswap_64s ( uint64_t *x ) {
-	__asm__ ( "bswapq %q0" : "=r" ( *x ) : "0" ( *x ) );
-}
-
 #endif /* _BITS_BYTESWAP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/entropy.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,12 +0,0 @@
-#ifndef _BITS_ENTROPY_H
-#define _BITS_ENTROPY_H
-
-/** @file
- *
- * x86_64-specific entropy API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#endif /* _BITS_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/errfile.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/errfile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/errfile.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/errfile.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,11 @@
+#ifndef _BITS_ERRFILE_H
+#define _BITS_ERRFILE_H
+
+/**
+ * @addtogroup errfile Error file identifiers
+ * @{
+ */
+
+/** @} */
+
+#endif /* _BITS_ERRFILE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/io.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/io.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/io.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,10 @@
+#ifndef _BITS_IO_H
+#define _BITS_IO_H
+
+/** @file
+ *
+ * x86_64-specific I/O API implementations
+ *
+ */
+
+#endif /* _BITS_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/reboot.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,12 +0,0 @@
-#ifndef _BITS_REBOOT_H
-#define _BITS_REBOOT_H
-
-/** @file
- *
- * x86_64-specific reboot API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#endif /* _BITS_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/time.h ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/include/bits/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/include/bits/time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,12 +0,0 @@
-#ifndef _BITS_TIME_H
-#define _BITS_TIME_H
-
-/** @file
- *
- * x86_64-specific time API implementations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#endif /* _BITS_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/Makefile ipxe-1.0.1~lliurex1505/src/arch/x86_64/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/Makefile	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/Makefile	2012-01-06 23:49:04.000000000 +0000
@@ -26,18 +26,6 @@
 #
 CFLAGS			+= -Ui386
 
-# Add -maccumulate-outgoing-args if required by this version of gcc
-#
-ifeq ($(CCTYPE),gcc)
-MS_ABI_TEST_CODE := extern void __attribute__ (( ms_abi )) ms_abi(); \
-		    void sysv_abi ( void ) { ms_abi(); }
-MS_ABI_TEST = $(ECHO) '$(MS_ABI_TEST_CODE)' | \
-	      $(CC) -m64 -mno-accumulate-outgoing-args -x c -c - -o /dev/null \
-		    >/dev/null 2>&1
-MS_ABI_FLAGS := $(shell $(MS_ABI_TEST) || $(ECHO) '-maccumulate-outgoing-args')
-WORKAROUND_CFLAGS += $(MS_ABI_FLAGS)
-endif
-
 # x86_64-specific directories containing source files
 #
 SRCDIRS		+= arch/x86_64/prefix
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/scripts/linux.lds ipxe-1.0.1~lliurex1505/src/arch/x86_64/scripts/linux.lds
--- ipxe-1.0.0+git-20131111.c3d1e78/src/arch/x86_64/scripts/linux.lds	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/arch/x86_64/scripts/linux.lds	2012-01-06 23:49:04.000000000 +0000
@@ -53,8 +53,6 @@
 		*(.data)
 		*(.data.*)
 		KEEP(*(SORT(.tbl.*)))
-		KEEP(*(.provided))
-		KEEP(*(.provided.*))
 		_edata = .;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/colour.h ipxe-1.0.1~lliurex1505/src/config/colour.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/colour.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/colour.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,32 +0,0 @@
-#ifndef CONFIG_COLOUR_H
-#define CONFIG_COLOUR_H
-
-/** @file
- *
- * Display colour configuration
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#define COLOR_NORMAL_FG		COLOR_WHITE
-#define COLOR_NORMAL_BG		COLOR_BLUE
-
-#define COLOR_SELECT_FG		COLOR_WHITE
-#define COLOR_SELECT_BG		COLOR_RED
-
-#define COLOR_SEPARATOR_FG	COLOR_CYAN
-#define COLOR_SEPARATOR_BG	COLOR_BLUE
-
-#define COLOR_EDIT_FG		COLOR_BLACK
-#define COLOR_EDIT_BG		COLOR_CYAN
-
-#define COLOR_ALERT_FG		COLOR_WHITE
-#define COLOR_ALERT_BG		COLOR_RED
-
-#define COLOR_URL_FG		COLOR_CYAN
-#define COLOR_URL_BG		COLOR_BLUE
-
-#include <config/local/colour.h>
-
-#endif /* CONFIG_COLOUR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/config.c ipxe-1.0.1~lliurex1505/src/config/config.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/config.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/config.c	2012-01-06 23:49:04.000000000 +0000
@@ -10,7 +10,6 @@
 #include <config/general.h>
 #include <config/console.h>
 #include <config/sideband.h>
-#include <config/settings.h>
 
 /** @file
  *
@@ -72,27 +71,21 @@
 #ifdef CONSOLE_DIRECT_VGA
 REQUIRE_OBJECT ( video_subr );
 #endif
+#ifdef CONSOLE_BTEXT
+REQUIRE_OBJECT ( btext );
+#endif
 #ifdef CONSOLE_PC_KBD
 REQUIRE_OBJECT ( pc_kbd );
 #endif
 #ifdef CONSOLE_SYSLOG
 REQUIRE_OBJECT ( syslog );
 #endif
-#ifdef CONSOLE_SYSLOGS
-REQUIRE_OBJECT ( syslogs );
-#endif
 #ifdef CONSOLE_EFI
 REQUIRE_OBJECT ( efi_console );
 #endif
 #ifdef CONSOLE_LINUX
 REQUIRE_OBJECT ( linux_console );
 #endif
-#ifdef CONSOLE_VMWARE
-REQUIRE_OBJECT ( vmconsole );
-#endif
-#ifdef CONSOLE_DEBUGCON
-REQUIRE_OBJECT ( debugcon );
-#endif
 
 /*
  * Drag in all requested network protocols
@@ -101,9 +94,6 @@
 #ifdef NET_PROTO_IPV4
 REQUIRE_OBJECT ( ipv4 );
 #endif
-#ifdef NET_PROTO_IPV6
-REQUIRE_OBJECT ( ipv6 );
-#endif
 
 /*
  * Drag in all requested PXE support
@@ -132,8 +122,8 @@
 #ifdef DOWNLOAD_PROTO_FTP
 REQUIRE_OBJECT ( ftp );
 #endif
-#ifdef DOWNLOAD_PROTO_NFS
-REQUIRE_OBJECT ( nfs_open );
+#ifdef DOWNLOAD_PROTO_TFTM
+REQUIRE_OBJECT ( tftm );
 #endif
 #ifdef DOWNLOAD_PROTO_SLAM
 REQUIRE_OBJECT ( slam );
@@ -165,9 +155,18 @@
 #ifdef IMAGE_ELF
 REQUIRE_OBJECT ( elfboot );
 #endif
+#ifdef IMAGE_FREEBSD
+REQUIRE_OBJECT ( freebsd );
+#endif
 #ifdef IMAGE_MULTIBOOT
 REQUIRE_OBJECT ( multiboot );
 #endif
+#ifdef IMAGE_AOUT
+REQUIRE_OBJECT ( aout );
+#endif
+#ifdef IMAGE_WINCE
+REQUIRE_OBJECT ( wince );
+#endif
 #ifdef IMAGE_PXE
 REQUIRE_OBJECT ( pxe_image );
 #endif
@@ -191,9 +190,6 @@
 #ifdef IMAGE_EFI
 REQUIRE_OBJECT ( efi_image );
 #endif
-#ifdef IMAGE_SDI
-REQUIRE_OBJECT ( sdi );
-#endif
 
 /*
  * Drag in all requested commands
@@ -218,18 +214,12 @@
 #ifdef IMAGE_CMD
 REQUIRE_OBJECT ( image_cmd );
 #endif
-#ifdef IMAGE_TRUST_CMD
-REQUIRE_OBJECT ( image_trust_cmd );
-#endif
 #ifdef DHCP_CMD
 REQUIRE_OBJECT ( dhcp_cmd );
 #endif
 #ifdef SANBOOT_CMD
 REQUIRE_OBJECT ( sanboot_cmd );
 #endif
-#ifdef MENU_CMD
-REQUIRE_OBJECT ( menu_cmd );
-#endif
 #ifdef LOGIN_CMD
 REQUIRE_OBJECT ( login_cmd );
 #endif
@@ -248,33 +238,9 @@
 #ifdef VLAN_CMD
 REQUIRE_OBJECT ( vlan_cmd );
 #endif
-#ifdef POWEROFF_CMD
-REQUIRE_OBJECT ( poweroff_cmd );
-#endif
 #ifdef REBOOT_CMD
 REQUIRE_OBJECT ( reboot_cmd );
 #endif
-#ifdef CPUID_CMD
-REQUIRE_OBJECT ( cpuid_cmd );
-#endif
-#ifdef SYNC_CMD
-REQUIRE_OBJECT ( sync_cmd );
-#endif
-#ifdef NSLOOKUP_CMD
-REQUIRE_OBJECT ( nslookup_cmd );
-#endif
-#ifdef PCI_CMD
-REQUIRE_OBJECT ( pci_cmd );
-#endif
-#ifdef PARAM_CMD
-REQUIRE_OBJECT ( param_cmd );
-#endif
-#ifdef NEIGHBOUR_CMD
-REQUIRE_OBJECT ( neighbour_cmd );
-#endif
-#ifdef PING_CMD
-REQUIRE_OBJECT ( ping_cmd );
-#endif
 
 /*
  * Drag in miscellaneous objects
@@ -308,7 +274,7 @@
 #endif
 
 /*
- * Drag in relevant sideband entry points
+ * Drag in relevant BOFM entry points
  */
 #ifdef CONFIG_BOFM
 #ifdef BOFM_EFI
@@ -317,22 +283,6 @@
 #endif /* CONFIG_BOFM */
 
 /*
- * Drag in relevant settings sources
- */
-#ifdef PCI_SETTINGS
-REQUIRE_OBJECT ( pci_settings );
-#endif
-#ifdef VMWARE_SETTINGS
-REQUIRE_OBJECT ( guestinfo );
-#endif
-#ifdef CPUID_SETTINGS
-REQUIRE_OBJECT ( cpuid_settings );
-#endif
-#ifdef MEMMAP_SETTINGS
-REQUIRE_OBJECT ( memmap_settings );
-#endif
-
-/*
  * Drag in selected keyboard map
  */
 #define REQUIRE_KEYMAP_OBJECT( _map ) REQUIRE_OBJECT ( keymap_ ## _map )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/config_route.c ipxe-1.0.1~lliurex1505/src/config/config_route.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/config_route.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/config_route.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,27 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2, or (at
- * your option) any later version.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <config/general.h>
-
-/** @file
- *
- * Routing management configuration options
- *
- */
-
-/*
- * Drag in routing management for relevant protocols
- *
- */
-#ifdef NET_PROTO_IPV4
-REQUIRE_OBJECT ( route_ipv4 );
-#endif
-#ifdef NET_PROTO_IPV6
-REQUIRE_OBJECT ( route_ipv6 );
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/console.h ipxe-1.0.1~lliurex1505/src/config/console.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/console.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/console.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,16 +17,12 @@
 //#define	CONSOLE_PCBIOS		/* Default BIOS console */
 //#define	CONSOLE_SERIAL		/* Serial port */
 //#define	CONSOLE_DIRECT_VGA	/* Direct access to VGA card */
+//#define	CONSOLE_BTEXT		/* Who knows what this does? */
 //#define	CONSOLE_PC_KBD		/* Direct access to PC keyboard */
 //#define	CONSOLE_SYSLOG		/* Syslog console */
-//#define	CONSOLE_SYSLOGS		/* Encrypted syslog console */
-//#define	CONSOLE_VMWARE		/* VMware logfile console */
-//#define	CONSOLE_DEBUGCON	/* Debug port console */
 
 #define	KEYBOARD_MAP	us
 
-#define	LOG_LEVEL	LOG_NONE
-
 #include <config/local/console.h>
 
 #endif /* CONFIG_CONSOLE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/efi.h ipxe-1.0.1~lliurex1505/src/config/defaults/efi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/efi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/defaults/efi.h	2012-01-06 23:49:04.000000000 +0000
@@ -7,10 +7,8 @@
  *
  */
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
 #define UACCESS_EFI
-#define IOAPI_X86
+#define IOAPI_EFI
 #define PCIAPI_EFI
 #define CONSOLE_EFI
 #define TIMER_EFI
@@ -19,14 +17,8 @@
 #define SMBIOS_EFI
 #define SANBOOT_NULL
 #define BOFM_EFI
-#define ENTROPY_NULL
-#define TIME_NULL
-#define REBOOT_EFI
 
 #define	IMAGE_EFI		/* EFI image support */
 #define	IMAGE_SCRIPT		/* iPXE script image support */
 
-#define	REBOOT_CMD		/* Reboot command */
-#define	CPUID_CMD		/* x86 CPU feature detection command */
-
 #endif /* CONFIG_DEFAULTS_EFI_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/linux.h ipxe-1.0.1~lliurex1505/src/config/defaults/linux.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/linux.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/defaults/linux.h	2012-01-06 23:49:04.000000000 +0000
@@ -7,8 +7,6 @@
  *
  */
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
 #define CONSOLE_LINUX
 #define TIMER_LINUX
 #define UACCESS_LINUX
@@ -16,10 +14,6 @@
 #define NAP_LINUX
 #define SMBIOS_LINUX
 #define SANBOOT_NULL
-#define ENTROPY_LINUX
-#define TIME_LINUX
-#define REBOOT_NULL
-#define PCIAPI_LINUX
 
 #define DRIVERS_LINUX
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/pcbios.h ipxe-1.0.1~lliurex1505/src/config/defaults/pcbios.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/defaults/pcbios.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/defaults/pcbios.h	2012-01-06 23:49:04.000000000 +0000
@@ -18,15 +18,13 @@
 #define UMALLOC_MEMTOP
 #define SMBIOS_PCBIOS
 #define SANBOOT_PCBIOS
-#define ENTROPY_RTC
-#define TIME_RTC
-#define REBOOT_PCBIOS
 
 #define	IMAGE_ELF		/* ELF image support */
 #define	IMAGE_MULTIBOOT		/* MultiBoot image support */
 #define	IMAGE_PXE		/* PXE image support */
 #define IMAGE_SCRIPT		/* iPXE script image support */
 #define IMAGE_BZIMAGE		/* Linux bzImage image support */
+#define IMAGE_COMBOOT		/* SYSLINUX COMBOOT image support */
 
 #define PXE_STACK		/* PXE stack in iPXE - required for PXELINUX */
 #define PXE_MENU		/* PXE menu booting */
@@ -37,6 +35,5 @@
 #define	SANBOOT_PROTO_FCP	/* Fibre Channel protocol */
 
 #define	REBOOT_CMD		/* Reboot command */
-#define	CPUID_CMD		/* x86 CPU feature detection command */
 
 #endif /* CONFIG_DEFAULTS_PCBIOS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/entropy.h ipxe-1.0.1~lliurex1505/src/config/entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef CONFIG_ENTROPY_H
-#define CONFIG_ENTROPY_H
-
-/** @file
- *
- * Entropy API configuration
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <config/defaults.h>
-
-#include <config/local/entropy.h>
-
-#endif /* CONFIG_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/general.h ipxe-1.0.1~lliurex1505/src/config/general.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/general.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/general.h	2012-01-06 23:49:04.000000000 +0000
@@ -40,7 +40,6 @@
  */
 
 #define	NET_PROTO_IPV4		/* IPv4 protocol */
-#undef	NET_PROTO_IPV6		/* IPv6 protocol */
 #undef	NET_PROTO_FCOE		/* Fibre Channel over Ethernet protocol */
 
 /*
@@ -59,8 +58,8 @@
 #define	DOWNLOAD_PROTO_HTTP	/* Hypertext Transfer Protocol */
 #undef	DOWNLOAD_PROTO_HTTPS	/* Secure Hypertext Transfer Protocol */
 #undef	DOWNLOAD_PROTO_FTP	/* File Transfer Protocol */
+#undef	DOWNLOAD_PROTO_TFTM	/* Multicast Trivial File Transfer Protocol */
 #undef	DOWNLOAD_PROTO_SLAM	/* Scalable Local Area Multicast */
-#undef	DOWNLOAD_PROTO_NFS	/* Network File System Protocol */
 
 /*
  * SAN boot protocols
@@ -96,13 +95,15 @@
  */
 //#define	IMAGE_NBI		/* NBI image support */
 //#define	IMAGE_ELF		/* ELF image support */
+//#define	IMAGE_FREEBSD		/* FreeBSD kernel image support */
 //#define	IMAGE_MULTIBOOT		/* MultiBoot image support */
+//#define	IMAGE_AOUT		/* a.out image support */
+//#define	IMAGE_WINCE		/* WinCE image support */
 //#define	IMAGE_PXE		/* PXE image support */
 //#define	IMAGE_SCRIPT		/* iPXE script image support */
 //#define	IMAGE_BZIMAGE		/* Linux bzImage image support */
 //#define	IMAGE_COMBOOT		/* SYSLINUX COMBOOT image support */
 //#define	IMAGE_EFI		/* EFI image support */
-//#define	IMAGE_SDI		/* SDI image support */
 
 /*
  * Command-line commands to include
@@ -118,22 +119,13 @@
 #define IMAGE_CMD		/* Image management commands */
 #define DHCP_CMD		/* DHCP management commands */
 #define SANBOOT_CMD		/* SAN boot commands */
-#define MENU_CMD		/* Menu commands */
 #define LOGIN_CMD		/* Login command */
-#define SYNC_CMD		/* Sync command */
-//#define NSLOOKUP_CMD		/* DNS resolving command */
 //#define TIME_CMD		/* Time commands */
 //#define DIGEST_CMD		/* Image crypto digest commands */
 //#define LOTEST_CMD		/* Loopback testing commands */
 //#define VLAN_CMD		/* VLAN commands */
 //#define PXE_CMD		/* PXE commands */
 //#define REBOOT_CMD		/* Reboot command */
-//#define POWEROFF_CMD		/* Power off command */
-//#define IMAGE_TRUST_CMD	/* Image trust management commands */
-//#define PCI_CMD		/* PCI commands */
-//#define PARAM_CMD		/* Form parameter commands */
-//#define NEIGHBOUR_CMD		/* Neighbour management commands */
-//#define PING_CMD		/* Ping command */
 
 /*
  * ROM-specific options
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/reboot.h ipxe-1.0.1~lliurex1505/src/config/reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef CONFIG_REBOOT_H
-#define CONFIG_REBOOT_H
-
-/** @file
- *
- * Reboot API configuration
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <config/defaults.h>
-
-#include <config/local/reboot.h>
-
-#endif /* CONFIG_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/settings.h ipxe-1.0.1~lliurex1505/src/config/settings.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/settings.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/settings.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,19 +0,0 @@
-#ifndef CONFIG_SETTINGS_H
-#define CONFIG_SETTINGS_H
-
-/** @file
- *
- * Configuration settings sources
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#define	PCI_SETTINGS	/* PCI device settings */
-//#define	CPUID_SETTINGS	/* CPUID settings */
-//#define	MEMMAP_SETTINGS	/* Memory map settings */
-//#define	VMWARE_SETTINGS	/* VMware GuestInfo settings */
-
-#include <config/local/settings.h>
-
-#endif /* CONFIG_SETTINGS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/sideband.h ipxe-1.0.1~lliurex1505/src/config/sideband.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/sideband.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/sideband.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,6 +11,4 @@
 
 //#define	CONFIG_BOFM	/* IBM's BladeCenter Open Fabric Manager */
 
-#include <config/local/sideband.h>
-
 #endif /* CONFIG_SIDEBAND_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/config/time.h ipxe-1.0.1~lliurex1505/src/config/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/config/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/config/time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef CONFIG_TIME_H
-#define CONFIG_TIME_H
-
-/** @file
- *
- * Time API configuration
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <config/defaults.h>
-
-#include <config/local/time.h>
-
-#endif /* CONFIG_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/acpi.c ipxe-1.0.1~lliurex1505/src/core/acpi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/acpi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/acpi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/ansiesc.c ipxe-1.0.1~lliurex1505/src/core/ansiesc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/ansiesc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/ansiesc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/assert.c ipxe-1.0.1~lliurex1505/src/core/assert.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/assert.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/assert.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/base16.c ipxe-1.0.1~lliurex1505/src/core/base16.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/base16.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/base16.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -51,62 +50,16 @@
 	char *encoded_bytes = encoded;
 	size_t remaining = len;
 
-	/* Encode each byte */
 	for ( ; remaining-- ; encoded_bytes += 2 ) {
 		sprintf ( encoded_bytes, "%02x", *(raw_bytes++) );
 	}
 
-	/* Ensure terminating NUL exists even if length was zero */
-	*encoded_bytes = '\0';
-
 	DBG ( "Base16-encoded to \"%s\":\n", encoded );
 	DBG_HDA ( 0, raw, len );
 	assert ( strlen ( encoded ) == base16_encoded_len ( len ) );
 }
 
 /**
- * Decode hexadecimal string
- *
- * @v encoded		Encoded string
- * @v separator		Byte separator character, or 0 for no separator
- * @v data		Buffer
- * @v len		Length of buffer
- * @ret len		Length of data, or negative error
- */
-int hex_decode ( const char *encoded, char separator, void *data, size_t len ) {
-	uint8_t *out = data;
-	unsigned int count = 0;
-	unsigned int sixteens;
-	unsigned int units;
-
-	while ( *encoded ) {
-
-		/* Check separator, if applicable */
-		if ( count && separator && ( ( *(encoded++) != separator ) ) )
-			return -EINVAL;
-
-		/* Extract digits.  Note that either digit may be NUL,
-		 * which would be interpreted as an invalid value by
-		 * strtoul_charval(); there is therefore no need for an
-		 * explicit end-of-string check.
-		 */
-		sixteens = strtoul_charval ( *(encoded++) );
-		if ( sixteens >= 16 )
-			return -EINVAL;
-		units = strtoul_charval ( *(encoded++) );
-		if ( units >= 16 )
-			return -EINVAL;
-
-		/* Store result */
-		if ( count < len )
-			out[count] = ( ( sixteens << 4 ) | units );
-		count++;
-
-	}
-	return count;
-}
-
-/**
  * Base16-decode data
  *
  * @v encoded		Encoded string
@@ -121,15 +74,33 @@
  * to provide a buffer of the correct size.
  */
 int base16_decode ( const char *encoded, uint8_t *raw ) {
-	int len;
-
-	len = hex_decode ( encoded, 0, raw, -1UL );
-	if ( len < 0 )
-		return len;
+	const char *encoded_bytes = encoded;
+	uint8_t *raw_bytes = raw;
+	char buf[3];
+	char *endp;
+	size_t len;
+
+	while ( encoded_bytes[0] ) {
+		if ( ! encoded_bytes[1] ) {
+			DBG ( "Base16-encoded string \"%s\" has invalid "
+			      "length\n", encoded );
+			return -EINVAL;
+		}
+		memcpy ( buf, encoded_bytes, 2 );
+		buf[2] = '\0';
+		*(raw_bytes++) = strtoul ( buf, &endp, 16 );
+		if ( *endp != '\0' ) {
+			DBG ( "Base16-encoded string \"%s\" has invalid "
+			      "byte \"%s\"\n", encoded, buf );
+			return -EINVAL;
+		}
+		encoded_bytes += 2;
+	}
+	len = ( raw_bytes - raw );
 
 	DBG ( "Base16-decoded \"%s\" to:\n", encoded );
 	DBG_HDA ( 0, raw, len );
 	assert ( len <= base16_decoded_max_len ( encoded ) );
 
-	return len;
+	return ( len );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/base64.c ipxe-1.0.1~lliurex1505/src/core/base64.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/base64.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/base64.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -55,16 +54,11 @@
 	uint8_t *encoded_bytes = ( ( uint8_t * ) encoded );
 	size_t raw_bit_len = ( 8 * len );
 	unsigned int bit;
-	unsigned int byte;
-	unsigned int shift;
 	unsigned int tmp;
 
 	for ( bit = 0 ; bit < raw_bit_len ; bit += 6 ) {
-		byte = ( bit / 8 );
-		shift = ( bit % 8 );
-		tmp = ( raw_bytes[byte] << shift );
-		if ( ( byte + 1 ) < len )
-			tmp |= ( raw_bytes[ byte + 1 ] >> ( 8 - shift ) );
+		tmp = ( ( raw_bytes[ bit / 8 ] << ( bit % 8 ) ) |
+			( raw_bytes[ bit / 8 + 1 ] >> ( 8 - ( bit % 8 ) ) ) );
 		tmp = ( ( tmp >> 2 ) & 0x3f );
 		*(encoded_bytes++) = base64[tmp];
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/basename.c ipxe-1.0.1~lliurex1505/src/core/basename.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/basename.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/basename.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/bitmap.c ipxe-1.0.1~lliurex1505/src/core/bitmap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/bitmap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/bitmap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/blockdev.c ipxe-1.0.1~lliurex1505/src/core/blockdev.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/blockdev.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/blockdev.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/btext.c ipxe-1.0.1~lliurex1505/src/core/btext.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/btext.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/btext.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,5039 @@
+#if 0
+
+/*
+ * Procedures for drawing on the screen early on in the boot process.
+ *
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ *
+ *   move to LinuxBIOS by LYH yhlu@tyan.com
+ *   move to Etherboot by LYH
+ */
+
+#include <ipxe/console.h>
+#include <ipxe/init.h>
+#include <ipxe/pci.h>
+
+#undef __BIG_ENDIAN
+#if 0
+#define __LITTLE_ENDIAN 
+#endif
+
+#include "btext.h"
+
+//#define NO_SCROLL
+
+#ifndef NO_SCROLL
+static void scrollscreen(void);
+#endif
+
+static void draw_byte(const unsigned char c, u32 locX, u32 locY);
+#if 0
+static void draw_byte_32(const unsigned char *bits, u32 *base, u32 rb);
+static void draw_byte_16(const unsigned char *bits, u32 *base, u32 rb);
+#endif
+static void draw_byte_8(const unsigned char *bits, u32 *base, u32 rb);
+
+static u32 g_loc_X;
+static u32 g_loc_Y;
+static u32 g_max_loc_X;
+static u32 g_max_loc_Y;
+
+#define CHAR_256 0
+
+#if CHAR_256==1
+#define cmapsz	(16*256)
+#else
+#define cmapsz  (16*96)
+#endif
+
+static const unsigned char vga_font[cmapsz];
+
+u32 boot_text_mapped;
+
+boot_infos_t disp_bi;
+
+#define BTEXT		
+#define BTDATA	
+
+
+/* This function will enable the early boot text when doing OF booting. This
+ * way, xmon output should work too
+ */
+static void
+btext_setup_display(u32 width, u32 height, u32 depth, u32 pitch,
+		    unsigned long address)
+{
+	boot_infos_t* bi = &disp_bi;
+
+	g_loc_X = 0;
+	g_loc_Y = 0;
+	g_max_loc_X = width / 8;
+	g_max_loc_Y = height / 16;
+//	bi->logicalDisplayBase = (unsigned char *)address;
+	bi->dispDeviceBase = address;
+	bi->dispDeviceRowBytes = pitch;
+	bi->dispDeviceDepth = depth;
+	bi->dispDeviceRect[0] = bi->dispDeviceRect[1] = 0;
+	bi->dispDeviceRect[2] = width;
+	bi->dispDeviceRect[3] = height;
+	boot_text_mapped = 0;
+}
+
+/* Here's a small text engine to use during early boot
+ * or for debugging purposes
+ *
+ * todo:
+ *
+ *  - build some kind of vgacon with it to enable early printk
+ *  - move to a separate file
+ *  - add a few video driver hooks to keep in sync with display
+ *    changes.
+ */
+
+static void 
+map_boot_text(void)
+{
+	boot_infos_t *bi = &disp_bi;
+	
+	if (bi->dispDeviceBase == 0)
+		return;
+
+	boot_text_mapped = 0;	
+
+	bi->logicalDisplayBase = phys_to_virt(bi->dispDeviceBase);
+	
+	boot_text_mapped = 1;
+}
+
+/* Calc the base address of a given point (x,y) */
+static unsigned char * BTEXT
+calc_base(boot_infos_t *bi, u32 x, u32 y)
+{
+	unsigned char *base;
+	base = bi->logicalDisplayBase;
+#if 0
+	/* Ummm... which moron wrote this? */
+	if (base == 0)
+		base = bi->dispDeviceBase;
+#endif
+	base += (x + bi->dispDeviceRect[0]) * (bi->dispDeviceDepth >> 3);
+	base += (y + bi->dispDeviceRect[1]) * bi->dispDeviceRowBytes;
+	return base;
+}
+
+
+static void BTEXT btext_clearscreen(void)
+{
+	boot_infos_t* bi	= &disp_bi;
+	u32 *base	= (u32 *)calc_base(bi, 0, 0);
+	u32 width 	= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
+					(bi->dispDeviceDepth >> 3)) >> 2;
+	u32 i,j;
+
+	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
+	{
+		u32 *ptr = base;
+		for(j=width; j; --j)
+			*(ptr++) = 0;
+		base += (bi->dispDeviceRowBytes >> 2);
+	}
+}
+
+#if 0
+__inline__ void dcbst(const void* addr)
+{
+	__asm__ __volatile__ ("dcbst 0,%0" :: "r" (addr));
+}
+
+static void BTEXT btext_flushscreen(void)
+{
+	boot_infos_t* bi	= &disp_bi;
+	u32  *base	= (unsigned long *)calc_base(bi, 0, 0);
+	u32 width 	= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
+					(bi->dispDeviceDepth >> 3)) >> 2;
+	u32 i,j;
+
+	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1]); i++)
+	{
+		u32 *ptr = base;
+		for(j=width; j>0; j-=8) {
+			dcbst(ptr);
+			ptr += 8;
+		}
+		base += (bi->dispDeviceRowBytes >> 2);
+	}
+}
+#endif
+
+
+#ifndef NO_SCROLL
+static BTEXT void
+scrollscreen(void)
+{
+	boot_infos_t* bi		= &disp_bi;
+	u32 *src		= (u32 *)calc_base(bi,0,16);
+	u32 *dst		= (u32 *)calc_base(bi,0,0);
+	u32 width		= ((bi->dispDeviceRect[2] - bi->dispDeviceRect[0]) *
+						(bi->dispDeviceDepth >> 3)) >> 2;
+	u32 i,j;
+
+	for (i=0; i<(bi->dispDeviceRect[3] - bi->dispDeviceRect[1] - 16); i++)
+	{
+		u32 *src_ptr = src;
+		u32 *dst_ptr = dst;
+		for(j=width; j; --j)
+			*(dst_ptr++) = *(src_ptr++);
+		src += (bi->dispDeviceRowBytes >> 2);
+		dst += (bi->dispDeviceRowBytes >> 2);
+	}
+	for (i=0; i<16; i++)
+	{
+		u32 *dst_ptr = dst;
+		for(j=width; j; --j)
+			*(dst_ptr++) = 0;
+		dst += (bi->dispDeviceRowBytes >> 2);
+	}
+}
+#endif /* ndef NO_SCROLL */
+
+static void BTEXT btext_drawchar(char c)
+{
+	u32 cline = 0;
+
+	if (!boot_text_mapped)
+		return;
+
+	switch (c) {
+	case '\b':
+		if (g_loc_X > 0)
+			--g_loc_X;
+		break;
+	case '\t':
+		g_loc_X = (g_loc_X & -8) + 8;
+		break;
+	case '\r':
+		g_loc_X = 0;
+		break;
+	case '\n':
+		g_loc_X = 0;
+		g_loc_Y++;
+		cline = 1;
+		break;
+	default:
+		draw_byte(c, g_loc_X++, g_loc_Y);
+	}
+	if (g_loc_X >= g_max_loc_X) {
+		g_loc_X = 0;
+		g_loc_Y++;
+		cline = 1;
+	}
+#ifndef NO_SCROLL
+	while (g_loc_Y >= g_max_loc_Y) {
+		scrollscreen();
+		g_loc_Y--;
+	}
+#else
+	/* wrap around from bottom to top of screen so we don't
+	   waste time scrolling each line.  -- paulus. */
+	if (g_loc_Y >= g_max_loc_Y)
+		g_loc_Y = 0;
+	if (cline) {
+		for (x = 0; x < g_max_loc_X; ++x)
+			draw_byte(' ', x, g_loc_Y);
+	}
+#endif
+}
+#if 0
+static void BTEXT
+btext_drawstring(const char *c)
+{
+	if (!boot_text_mapped)
+		return;
+	while (*c)
+		btext_drawchar(*c++);
+}
+static void BTEXT
+btext_drawhex(u32 v)
+{
+	static char hex_table[] = "0123456789abcdef";
+
+	if (!boot_text_mapped)
+		return;
+	btext_drawchar(hex_table[(v >> 28) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >> 24) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >> 20) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >> 16) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >> 12) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >>  8) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >>  4) & 0x0000000FUL]);
+	btext_drawchar(hex_table[(v >>  0) & 0x0000000FUL]);
+	btext_drawchar(' ');
+}
+#endif
+
+static void BTEXT
+draw_byte(const unsigned char c, u32 locX, u32 locY)
+{
+	boot_infos_t* bi	= &disp_bi;
+	unsigned char *base	= calc_base(bi, locX << 3, locY << 4);
+#if CHAR_256==1
+        unsigned const char *font     = &vga_font[(((u32)c)) * 16];
+#else
+	unsigned const char *font	= &vga_font[(((u32)c-0x20)) * 16];
+#endif
+
+	u32 rb			= bi->dispDeviceRowBytes;
+
+	switch(bi->dispDeviceDepth) {
+#if 0
+	case 24:
+	case 32:
+		draw_byte_32(font, (u32 *)base, rb);
+		break;
+	case 15:
+	case 16:
+		draw_byte_16(font, (u32 *)base, rb);
+		break;
+#endif
+	case 8:
+		draw_byte_8(font, (u32 *)base, rb);
+		break;
+	}
+}
+static u32 expand_bits_8[16] BTDATA = {
+#if defined(__BIG_ENDIAN)
+    0x00000000,0x000000ff,0x0000ff00,0x0000ffff,
+    0x00ff0000,0x00ff00ff,0x00ffff00,0x00ffffff,
+    0xff000000,0xff0000ff,0xff00ff00,0xff00ffff,
+    0xffff0000,0xffff00ff,0xffffff00,0xffffffff
+#elif defined(__LITTLE_ENDIAN)
+    0x00000000,0xff000000,0x00ff0000,0xffff0000,
+    0x0000ff00,0xff00ff00,0x00ffff00,0xffffff00,
+    0x000000ff,0xff0000ff,0x00ff00ff,0xffff00ff,
+    0x0000ffff,0xff00ffff,0x00ffffff,0xffffffff
+#else
+#error FIXME: No endianness??
+#endif                      
+};
+#if 0
+static const u32 expand_bits_16[4] BTDATA = {
+#if defined(__BIG_ENDIAN)
+    0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff
+#elif defined(__LITTLE_ENDIAN)
+    0x00000000, 0xffff0000, 0x0000ffff, 0xffffffff
+#else
+#error FIXME: No endianness??
+#endif
+};
+#endif
+#if 0
+static void BTEXT
+draw_byte_32(const unsigned char *font, u32 *base, u32 rb)
+{
+	u32 l, bits;
+	u32 fg = 0xFFFFFFFF;
+	u32 bg = 0x00000000;
+
+	for (l = 0; l < 16; ++l)
+	{
+		bits = *font++;
+		base[0] = (-(bits >> 7) & fg) ^ bg;
+		base[1] = (-((bits >> 6) & 1) & fg) ^ bg;
+		base[2] = (-((bits >> 5) & 1) & fg) ^ bg;
+		base[3] = (-((bits >> 4) & 1) & fg) ^ bg;
+		base[4] = (-((bits >> 3) & 1) & fg) ^ bg;
+		base[5] = (-((bits >> 2) & 1) & fg) ^ bg;
+		base[6] = (-((bits >> 1) & 1) & fg) ^ bg;
+		base[7] = (-(bits & 1) & fg) ^ bg;
+		base = (u32 *) ((char *)base + rb);
+	}
+}
+
+static void BTEXT
+draw_byte_16(const unsigned char *font, u32 *base, u32 rb)
+{
+	u32 l, bits;
+	u32 fg = 0xFFFFFFFF;
+	u32 bg = 0x00000000;
+	u32 *eb = expand_bits_16;
+
+	for (l = 0; l < 16; ++l)
+	{
+		bits = *font++;
+		base[0] = (eb[bits >> 6] & fg) ^ bg;
+		base[1] = (eb[(bits >> 4) & 3] & fg) ^ bg;
+		base[2] = (eb[(bits >> 2) & 3] & fg) ^ bg;
+		base[3] = (eb[bits & 3] & fg) ^ bg;
+		base = (u32 *) ((char *)base + rb);
+	}
+}
+#endif
+static void BTEXT
+draw_byte_8(const unsigned char *font, u32 *base, u32 rb)
+{
+	u32 l, bits;
+	u32 fg = 0x0F0F0F0F;
+	u32 bg = 0x00000000;
+	u32 *eb = expand_bits_8;
+
+	for (l = 0; l < 16; ++l)
+	{
+		bits = *font++;
+		base[0] = (eb[bits >> 4] & fg) ^ bg;
+		base[1] = (eb[bits & 0xf] & fg) ^ bg;
+		base = (u32 *) ((char *)base + rb);
+	}
+}
+
+static void btext_init(void)
+{
+#if 0
+// for debug
+#define frame_buffer 0xfc000000
+#else
+    uint32_t frame_buffer;//  0xfc000000
+
+    struct pci_device dev;
+
+    #warning "pci_find_device_x no longer exists; use find_pci_device instead"
+    /*    pci_find_device_x(0x1002, 0x4752, 0, &dev); */
+    if(dev.vendor==0) return; // no fb
+
+    frame_buffer = (uint32_t)dev.membase;
+#endif
+
+	btext_setup_display(640, 480, 8, 640,frame_buffer);
+	btext_clearscreen();
+	map_boot_text();
+}
+static void btext_putc(int c)
+{	
+        btext_drawchar((unsigned char)c);
+}
+
+struct console_driver btext_console __console_driver = {
+	.putchar = btext_putc,
+	.disabled = 1,
+};
+
+//come from linux/drivers/video/font-8x16.c
+/**********************************************/
+/*                                            */
+/*       Font file generated by cpi2fnt       */
+/*                                            */
+/**********************************************/
+
+
+static const unsigned char vga_font[cmapsz] BTDATA = {
+#if CHAR_256==1
+	/* 0 0x00 '^@' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 1 0x01 '^A' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x81, /* 10000001 */
+	0xa5, /* 10100101 */
+	0x81, /* 10000001 */
+	0x81, /* 10000001 */
+	0xbd, /* 10111101 */
+	0x99, /* 10011001 */
+	0x81, /* 10000001 */
+	0x81, /* 10000001 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 2 0x02 '^B' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0xff, /* 11111111 */
+	0xdb, /* 11011011 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xc3, /* 11000011 */
+	0xe7, /* 11100111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 3 0x03 '^C' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x6c, /* 01101100 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0x7c, /* 01111100 */
+	0x38, /* 00111000 */
+	0x10, /* 00010000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 4 0x04 '^D' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x7c, /* 01111100 */
+	0xfe, /* 11111110 */
+	0x7c, /* 01111100 */
+	0x38, /* 00111000 */
+	0x10, /* 00010000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 5 0x05 '^E' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0xe7, /* 11100111 */
+	0xe7, /* 11100111 */
+	0xe7, /* 11100111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 6 0x06 '^F' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x7e, /* 01111110 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 7 0x07 '^G' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 8 0x08 '^H' */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xe7, /* 11100111 */
+	0xc3, /* 11000011 */
+	0xc3, /* 11000011 */
+	0xe7, /* 11100111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+
+	/* 9 0x09 '^I' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x42, /* 01000010 */
+	0x42, /* 01000010 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 10 0x0a '^J' */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xc3, /* 11000011 */
+	0x99, /* 10011001 */
+	0xbd, /* 10111101 */
+	0xbd, /* 10111101 */
+	0x99, /* 10011001 */
+	0xc3, /* 11000011 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+
+	/* 11 0x0b '^K' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1e, /* 00011110 */
+	0x0e, /* 00001110 */
+	0x1a, /* 00011010 */
+	0x32, /* 00110010 */
+	0x78, /* 01111000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 12 0x0c '^L' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 13 0x0d '^M' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3f, /* 00111111 */
+	0x33, /* 00110011 */
+	0x3f, /* 00111111 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x70, /* 01110000 */
+	0xf0, /* 11110000 */
+	0xe0, /* 11100000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 14 0x0e '^N' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7f, /* 01111111 */
+	0x63, /* 01100011 */
+	0x7f, /* 01111111 */
+	0x63, /* 01100011 */
+	0x63, /* 01100011 */
+	0x63, /* 01100011 */
+	0x63, /* 01100011 */
+	0x67, /* 01100111 */
+	0xe7, /* 11100111 */
+	0xe6, /* 11100110 */
+	0xc0, /* 11000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 15 0x0f '^O' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xdb, /* 11011011 */
+	0x3c, /* 00111100 */
+	0xe7, /* 11100111 */
+	0x3c, /* 00111100 */
+	0xdb, /* 11011011 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 16 0x10 '^P' */
+	0x00, /* 00000000 */
+	0x80, /* 10000000 */
+	0xc0, /* 11000000 */
+	0xe0, /* 11100000 */
+	0xf0, /* 11110000 */
+	0xf8, /* 11111000 */
+	0xfe, /* 11111110 */
+	0xf8, /* 11111000 */
+	0xf0, /* 11110000 */
+	0xe0, /* 11100000 */
+	0xc0, /* 11000000 */
+	0x80, /* 10000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 17 0x11 '^Q' */
+	0x00, /* 00000000 */
+	0x02, /* 00000010 */
+	0x06, /* 00000110 */
+	0x0e, /* 00001110 */
+	0x1e, /* 00011110 */
+	0x3e, /* 00111110 */
+	0xfe, /* 11111110 */
+	0x3e, /* 00111110 */
+	0x1e, /* 00011110 */
+	0x0e, /* 00001110 */
+	0x06, /* 00000110 */
+	0x02, /* 00000010 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 18 0x12 '^R' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 19 0x13 '^S' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 20 0x14 '^T' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7f, /* 01111111 */
+	0xdb, /* 11011011 */
+	0xdb, /* 11011011 */
+	0xdb, /* 11011011 */
+	0x7b, /* 01111011 */
+	0x1b, /* 00011011 */
+	0x1b, /* 00011011 */
+	0x1b, /* 00011011 */
+	0x1b, /* 00011011 */
+	0x1b, /* 00011011 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 21 0x15 '^U' */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0x60, /* 01100000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x0c, /* 00001100 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 22 0x16 '^V' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 23 0x17 '^W' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 24 0x18 '^X' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 25 0x19 '^Y' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 26 0x1a '^Z' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0xfe, /* 11111110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 27 0x1b '^[' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xfe, /* 11111110 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 28 0x1c '^\' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 29 0x1d '^]' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x28, /* 00101000 */
+	0x6c, /* 01101100 */
+	0xfe, /* 11111110 */
+	0x6c, /* 01101100 */
+	0x28, /* 00101000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 30 0x1e '^^' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x38, /* 00111000 */
+	0x7c, /* 01111100 */
+	0x7c, /* 01111100 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 31 0x1f '^_' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0x7c, /* 01111100 */
+	0x7c, /* 01111100 */
+	0x38, /* 00111000 */
+	0x38, /* 00111000 */
+	0x10, /* 00010000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+#endif
+	/* 32 0x20 ' ' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 33 0x21 '!' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 34 0x22 '"' */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x24, /* 00100100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 35 0x23 '#' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0xfe, /* 11111110 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0xfe, /* 11111110 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 36 0x24 '$' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc2, /* 11000010 */
+	0xc0, /* 11000000 */
+	0x7c, /* 01111100 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x86, /* 10000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 37 0x25 '%' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc2, /* 11000010 */
+	0xc6, /* 11000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc6, /* 11000110 */
+	0x86, /* 10000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 38 0x26 '&' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 39 0x27 ''' */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 40 0x28 '(' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 41 0x29 ')' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 42 0x2a '*' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0xff, /* 11111111 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 43 0x2b '+' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 44 0x2c ',' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 45 0x2d '-' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 46 0x2e '.' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 47 0x2f '/' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x02, /* 00000010 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0x80, /* 10000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 48 0x30 '0' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 49 0x31 '1' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x38, /* 00111000 */
+	0x78, /* 01111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 50 0x32 '2' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 51 0x33 '3' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x3c, /* 00111100 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 52 0x34 '4' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x0c, /* 00001100 */
+	0x1c, /* 00011100 */
+	0x3c, /* 00111100 */
+	0x6c, /* 01101100 */
+	0xcc, /* 11001100 */
+	0xfe, /* 11111110 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x1e, /* 00011110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 53 0x35 '5' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xfc, /* 11111100 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 54 0x36 '6' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xfc, /* 11111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 55 0x37 '7' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 56 0x38 '8' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 57 0x39 '9' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7e, /* 01111110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 58 0x3a ':' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 59 0x3b ';' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 60 0x3c '<' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x06, /* 00000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 61 0x3d '=' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 62 0x3e '>' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 63 0x3f '?' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 64 0x40 '@' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xde, /* 11011110 */
+	0xde, /* 11011110 */
+	0xde, /* 11011110 */
+	0xdc, /* 11011100 */
+	0xc0, /* 11000000 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 65 0x41 'A' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 66 0x42 'B' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfc, /* 11111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0xfc, /* 11111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 67 0x43 'C' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0xc2, /* 11000010 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc2, /* 11000010 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 68 0x44 'D' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xf8, /* 11111000 */
+	0x6c, /* 01101100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x6c, /* 01101100 */
+	0xf8, /* 11111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 69 0x45 'E' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x66, /* 01100110 */
+	0x62, /* 01100010 */
+	0x68, /* 01101000 */
+	0x78, /* 01111000 */
+	0x68, /* 01101000 */
+	0x60, /* 01100000 */
+	0x62, /* 01100010 */
+	0x66, /* 01100110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 70 0x46 'F' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x66, /* 01100110 */
+	0x62, /* 01100010 */
+	0x68, /* 01101000 */
+	0x78, /* 01111000 */
+	0x68, /* 01101000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xf0, /* 11110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 71 0x47 'G' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0xc2, /* 11000010 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xde, /* 11011110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x66, /* 01100110 */
+	0x3a, /* 00111010 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 72 0x48 'H' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 73 0x49 'I' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 74 0x4a 'J' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1e, /* 00011110 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 75 0x4b 'K' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xe6, /* 11100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x6c, /* 01101100 */
+	0x78, /* 01111000 */
+	0x78, /* 01111000 */
+	0x6c, /* 01101100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0xe6, /* 11100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 76 0x4c 'L' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xf0, /* 11110000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x62, /* 01100010 */
+	0x66, /* 01100110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 77 0x4d 'M' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xee, /* 11101110 */
+	0xfe, /* 11111110 */
+	0xfe, /* 11111110 */
+	0xd6, /* 11010110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 78 0x4e 'N' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xe6, /* 11100110 */
+	0xf6, /* 11110110 */
+	0xfe, /* 11111110 */
+	0xde, /* 11011110 */
+	0xce, /* 11001110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 79 0x4f 'O' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 80 0x50 'P' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfc, /* 11111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xf0, /* 11110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 81 0x51 'Q' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xd6, /* 11010110 */
+	0xde, /* 11011110 */
+	0x7c, /* 01111100 */
+	0x0c, /* 00001100 */
+	0x0e, /* 00001110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 82 0x52 'R' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfc, /* 11111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x6c, /* 01101100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0xe6, /* 11100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 83 0x53 'S' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x60, /* 01100000 */
+	0x38, /* 00111000 */
+	0x0c, /* 00001100 */
+	0x06, /* 00000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 84 0x54 'T' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x5a, /* 01011010 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 85 0x55 'U' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 86 0x56 'V' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x10, /* 00010000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 87 0x57 'W' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xfe, /* 11111110 */
+	0xee, /* 11101110 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 88 0x58 'X' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x7c, /* 01111100 */
+	0x38, /* 00111000 */
+	0x38, /* 00111000 */
+	0x7c, /* 01111100 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 89 0x59 'Y' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 90 0x5a 'Z' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0x86, /* 10000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc2, /* 11000010 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 91 0x5b '[' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 92 0x5c '\' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x80, /* 10000000 */
+	0xc0, /* 11000000 */
+	0xe0, /* 11100000 */
+	0x70, /* 01110000 */
+	0x38, /* 00111000 */
+	0x1c, /* 00011100 */
+	0x0e, /* 00001110 */
+	0x06, /* 00000110 */
+	0x02, /* 00000010 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 93 0x5d ']' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 94 0x5e '^' */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 95 0x5f '_' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 96 0x60 '`' */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 97 0x61 'a' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 98 0x62 'b' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xe0, /* 11100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x78, /* 01111000 */
+	0x6c, /* 01101100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 99 0x63 'c' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 100 0x64 'd' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1c, /* 00011100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x3c, /* 00111100 */
+	0x6c, /* 01101100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 101 0x65 'e' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 102 0x66 'f' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1c, /* 00011100 */
+	0x36, /* 00110110 */
+	0x32, /* 00110010 */
+	0x30, /* 00110000 */
+	0x78, /* 01111000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 103 0x67 'g' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x7c, /* 01111100 */
+	0x0c, /* 00001100 */
+	0xcc, /* 11001100 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+
+	/* 104 0x68 'h' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xe0, /* 11100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x6c, /* 01101100 */
+	0x76, /* 01110110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0xe6, /* 11100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 105 0x69 'i' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 106 0x6a 'j' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x00, /* 00000000 */
+	0x0e, /* 00001110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+
+	/* 107 0x6b 'k' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xe0, /* 11100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x66, /* 01100110 */
+	0x6c, /* 01101100 */
+	0x78, /* 01111000 */
+	0x78, /* 01111000 */
+	0x6c, /* 01101100 */
+	0x66, /* 01100110 */
+	0xe6, /* 11100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 108 0x6c 'l' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 109 0x6d 'm' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xec, /* 11101100 */
+	0xfe, /* 11111110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 110 0x6e 'n' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xdc, /* 11011100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 111 0x6f 'o' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 112 0x70 'p' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xdc, /* 11011100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xf0, /* 11110000 */
+	0x00, /* 00000000 */
+
+	/* 113 0x71 'q' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x7c, /* 01111100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x1e, /* 00011110 */
+	0x00, /* 00000000 */
+
+	/* 114 0x72 'r' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xdc, /* 11011100 */
+	0x76, /* 01110110 */
+	0x66, /* 01100110 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xf0, /* 11110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 115 0x73 's' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0x60, /* 01100000 */
+	0x38, /* 00111000 */
+	0x0c, /* 00001100 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 116 0x74 't' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0xfc, /* 11111100 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x36, /* 00110110 */
+	0x1c, /* 00011100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 117 0x75 'u' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 118 0x76 'v' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 119 0x77 'w' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xd6, /* 11010110 */
+	0xfe, /* 11111110 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 120 0x78 'x' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x38, /* 00111000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 121 0x79 'y' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7e, /* 01111110 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0xf8, /* 11111000 */
+	0x00, /* 00000000 */
+
+	/* 122 0x7a 'z' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xcc, /* 11001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 123 0x7b '{' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x0e, /* 00001110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x70, /* 01110000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x0e, /* 00001110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 124 0x7c '|' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 125 0x7d '}' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x70, /* 01110000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x0e, /* 00001110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 126 0x7e '~' */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 127 0x7f '' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+#if CHAR_256256==1
+	/* 128 0x80 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0xc2, /* 11000010 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc2, /* 11000010 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 129 0x81 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 130 0x82 '�' */
+	0x00, /* 00000000 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 131 0x83 '�' */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 132 0x84 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 133 0x85 '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 134 0x86 '�' */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 135 0x87 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x18, /* 00011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 136 0x88 '�' */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 137 0x89 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 138 0x8a '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 139 0x8b '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 140 0x8c '�' */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 141 0x8d '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 142 0x8e '�' */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 143 0x8f '�' */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 144 0x90 '�' */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x66, /* 01100110 */
+	0x62, /* 01100010 */
+	0x68, /* 01101000 */
+	0x78, /* 01111000 */
+	0x68, /* 01101000 */
+	0x62, /* 01100010 */
+	0x66, /* 01100110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 145 0x91 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xec, /* 11101100 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x7e, /* 01111110 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0x6e, /* 01101110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 146 0x92 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3e, /* 00111110 */
+	0x6c, /* 01101100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xfe, /* 11111110 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xce, /* 11001110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 147 0x93 '�' */
+	0x00, /* 00000000 */
+	0x10, /* 00010000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 148 0x94 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 149 0x95 '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 150 0x96 '�' */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x78, /* 01111000 */
+	0xcc, /* 11001100 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 151 0x97 '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 152 0x98 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7e, /* 01111110 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x78, /* 01111000 */
+	0x00, /* 00000000 */
+
+	/* 153 0x99 '�' */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 154 0x9a '�' */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 155 0x9b '�' */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 156 0x9c '�' */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x64, /* 01100100 */
+	0x60, /* 01100000 */
+	0xf0, /* 11110000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xe6, /* 11100110 */
+	0xfc, /* 11111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 157 0x9d '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 158 0x9e '�' */
+	0x00, /* 00000000 */
+	0xf8, /* 11111000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xf8, /* 11111000 */
+	0xc4, /* 11000100 */
+	0xcc, /* 11001100 */
+	0xde, /* 11011110 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 159 0x9f '�' */
+	0x00, /* 00000000 */
+	0x0e, /* 00001110 */
+	0x1b, /* 00011011 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xd8, /* 11011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 160 0xa0 '�' */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0x0c, /* 00001100 */
+	0x7c, /* 01111100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 161 0xa1 '�' */
+	0x00, /* 00000000 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 162 0xa2 '�' */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 163 0xa3 '�' */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x00, /* 00000000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 164 0xa4 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x00, /* 00000000 */
+	0xdc, /* 11011100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 165 0xa5 '�' */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x00, /* 00000000 */
+	0xc6, /* 11000110 */
+	0xe6, /* 11100110 */
+	0xf6, /* 11110110 */
+	0xfe, /* 11111110 */
+	0xde, /* 11011110 */
+	0xce, /* 11001110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 166 0xa6 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x3e, /* 00111110 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 167 0xa7 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 168 0xa8 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x7c, /* 01111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 169 0xa9 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 170 0xaa '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 171 0xab '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0xe0, /* 11100000 */
+	0x62, /* 01100010 */
+	0x66, /* 01100110 */
+	0x6c, /* 01101100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xdc, /* 11011100 */
+	0x86, /* 10000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x3e, /* 00111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 172 0xac '�' */
+	0x00, /* 00000000 */
+	0x60, /* 01100000 */
+	0xe0, /* 11100000 */
+	0x62, /* 01100010 */
+	0x66, /* 01100110 */
+	0x6c, /* 01101100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x66, /* 01100110 */
+	0xce, /* 11001110 */
+	0x9a, /* 10011010 */
+	0x3f, /* 00111111 */
+	0x06, /* 00000110 */
+	0x06, /* 00000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 173 0xad '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 174 0xae '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x36, /* 00110110 */
+	0x6c, /* 01101100 */
+	0xd8, /* 11011000 */
+	0x6c, /* 01101100 */
+	0x36, /* 00110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 175 0xaf '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xd8, /* 11011000 */
+	0x6c, /* 01101100 */
+	0x36, /* 00110110 */
+	0x6c, /* 01101100 */
+	0xd8, /* 11011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 176 0xb0 '�' */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+	0x11, /* 00010001 */
+	0x44, /* 01000100 */
+
+	/* 177 0xb1 '�' */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+	0x55, /* 01010101 */
+	0xaa, /* 10101010 */
+
+	/* 178 0xb2 '�' */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+	0xdd, /* 11011101 */
+	0x77, /* 01110111 */
+
+	/* 179 0xb3 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 180 0xb4 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 181 0xb5 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 182 0xb6 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xf6, /* 11110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 183 0xb7 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 184 0xb8 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 185 0xb9 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xf6, /* 11110110 */
+	0x06, /* 00000110 */
+	0xf6, /* 11110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 186 0xba '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 187 0xbb '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x06, /* 00000110 */
+	0xf6, /* 11110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 188 0xbc '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xf6, /* 11110110 */
+	0x06, /* 00000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 189 0xbd '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 190 0xbe '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 191 0xbf '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xf8, /* 11111000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 192 0xc0 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 193 0xc1 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 194 0xc2 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 195 0xc3 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 196 0xc4 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 197 0xc5 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xff, /* 11111111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 198 0xc6 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 199 0xc7 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x37, /* 00110111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 200 0xc8 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x37, /* 00110111 */
+	0x30, /* 00110000 */
+	0x3f, /* 00111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 201 0xc9 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3f, /* 00111111 */
+	0x30, /* 00110000 */
+	0x37, /* 00110111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 202 0xca '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xf7, /* 11110111 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 203 0xcb '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0xf7, /* 11110111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 204 0xcc '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x37, /* 00110111 */
+	0x30, /* 00110000 */
+	0x37, /* 00110111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 205 0xcd '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 206 0xce '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xf7, /* 11110111 */
+	0x00, /* 00000000 */
+	0xf7, /* 11110111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 207 0xcf '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 208 0xd0 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 209 0xd1 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 210 0xd2 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 211 0xd3 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x3f, /* 00111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 212 0xd4 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 213 0xd5 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 214 0xd6 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x3f, /* 00111111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 215 0xd7 '�' */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0xff, /* 11111111 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+
+	/* 216 0xd8 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xff, /* 11111111 */
+	0x18, /* 00011000 */
+	0xff, /* 11111111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 217 0xd9 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xf8, /* 11111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 218 0xda '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1f, /* 00011111 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 219 0xdb '�' */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+
+	/* 220 0xdc '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+
+	/* 221 0xdd '�' */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+	0xf0, /* 11110000 */
+
+	/* 222 0xde '�' */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+	0x0f, /* 00001111 */
+
+	/* 223 0xdf '�' */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0xff, /* 11111111 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 224 0xe0 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xdc, /* 11011100 */
+	0x76, /* 01110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 225 0xe1 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x78, /* 01111000 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xcc, /* 11001100 */
+	0xd8, /* 11011000 */
+	0xcc, /* 11001100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xcc, /* 11001100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 226 0xe2 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0xc0, /* 11000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 227 0xe3 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 228 0xe4 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 229 0xe5 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 230 0xe6 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x7c, /* 01111100 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0x00, /* 00000000 */
+
+	/* 231 0xe7 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 232 0xe8 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 233 0xe9 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xfe, /* 11111110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 234 0xea '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0xee, /* 11101110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 235 0xeb '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1e, /* 00011110 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x3e, /* 00111110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x66, /* 01100110 */
+	0x3c, /* 00111100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 236 0xec '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0xdb, /* 11011011 */
+	0xdb, /* 11011011 */
+	0xdb, /* 11011011 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 237 0xed '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x03, /* 00000011 */
+	0x06, /* 00000110 */
+	0x7e, /* 01111110 */
+	0xdb, /* 11011011 */
+	0xdb, /* 11011011 */
+	0xf3, /* 11110011 */
+	0x7e, /* 01111110 */
+	0x60, /* 01100000 */
+	0xc0, /* 11000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 238 0xee '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x1c, /* 00011100 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x7c, /* 01111100 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x1c, /* 00011100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 239 0xef '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7c, /* 01111100 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0xc6, /* 11000110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 240 0xf0 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0xfe, /* 11111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 241 0xf1 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x7e, /* 01111110 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 242 0xf2 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x06, /* 00000110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 243 0xf3 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x30, /* 00110000 */
+	0x60, /* 01100000 */
+	0x30, /* 00110000 */
+	0x18, /* 00011000 */
+	0x0c, /* 00001100 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 244 0xf4 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x0e, /* 00001110 */
+	0x1b, /* 00011011 */
+	0x1b, /* 00011011 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+
+	/* 245 0xf5 '�' */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0xd8, /* 11011000 */
+	0x70, /* 01110000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 246 0xf6 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 247 0xf7 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x00, /* 00000000 */
+	0x76, /* 01110110 */
+	0xdc, /* 11011100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 248 0xf8 '�' */
+	0x00, /* 00000000 */
+	0x38, /* 00111000 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x38, /* 00111000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 249 0xf9 '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 250 0xfa '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x18, /* 00011000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 251 0xfb '�' */
+	0x00, /* 00000000 */
+	0x0f, /* 00001111 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0x0c, /* 00001100 */
+	0xec, /* 11101100 */
+	0x6c, /* 01101100 */
+	0x6c, /* 01101100 */
+	0x3c, /* 00111100 */
+	0x1c, /* 00011100 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 252 0xfc '�' */
+	0x00, /* 00000000 */
+	0x6c, /* 01101100 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x36, /* 00110110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 253 0xfd '�' */
+	0x00, /* 00000000 */
+	0x3c, /* 00111100 */
+	0x66, /* 01100110 */
+	0x0c, /* 00001100 */
+	0x18, /* 00011000 */
+	0x32, /* 00110010 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 254 0xfe '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x7e, /* 01111110 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+
+	/* 255 0xff '�' */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+	0x00, /* 00000000 */
+#endif
+};
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/console.c ipxe-1.0.1~lliurex1505/src/core/console.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/console.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/console.c	2012-01-06 23:49:04.000000000 +0000
@@ -7,9 +7,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-/** Current console usage */
-int console_usage = CONSOLE_USAGE_STDOUT;
-
 /**
  * Write a single character to each console device.
  *
@@ -29,9 +26,7 @@
 		putchar ( '\r' );
 
 	for_each_table_entry ( console, CONSOLES ) {
-		if ( ( ! console->disabled ) &&
-		     ( console_usage & console->usage ) &&
-		     console->putchar )
+		if ( ( ! console->disabled ) && console->putchar )
 			console->putchar ( character );
 	}
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/cpio.c ipxe-1.0.1~lliurex1505/src/core/cpio.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/cpio.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/cpio.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/ctype.c ipxe-1.0.1~lliurex1505/src/core/ctype.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/ctype.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/ctype.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/cwuri.c ipxe-1.0.1~lliurex1505/src/core/cwuri.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/cwuri.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/cwuri.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/debug.c ipxe-1.0.1~lliurex1505/src/core/debug.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/debug.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/debug.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -22,38 +21,17 @@
 #include <stdio.h>
 #include <stdint.h>
 #include <stdarg.h>
+#include <ipxe/io.h>
 #include <ipxe/console.h>
 
 /**
- * Print debug message
- *
- * @v fmt		Format string
- * @v ...		Arguments
- */
-void dbg_printf ( const char *fmt, ... ) {
-	int saved_usage;
-	va_list args;
-
-	/* Mark console as in use for debugging messages */
-	saved_usage = console_set_usage ( CONSOLE_USAGE_DEBUG );
-
-	/* Print message */
-	va_start ( args, fmt );
-	vprintf ( fmt, args );
-	va_end ( args );
-
-	/* Restore console usage */
-	console_set_usage ( saved_usage );
-}
-
-/**
  * Pause until a key is pressed
  *
  */
 void dbg_pause ( void ) {
-	dbg_printf ( "\nPress a key..." );
+	printf ( "\nPress a key..." );
 	getchar();
-	dbg_printf ( "\r              \r" );
+	printf ( "\r              \r" );
 }
 
 /**
@@ -61,9 +39,9 @@
  *
  */
 void dbg_more ( void ) {
-	dbg_printf ( "---more---" );
+	printf ( "---more---" );
 	getchar();
-	dbg_printf ( "\r          \r" );
+	printf ( "\r          \r" );
 }
 
 /**
@@ -80,27 +58,27 @@
 	unsigned int i;
 	uint8_t byte;
 
-	dbg_printf ( "%08lx :", ( dispaddr + offset ) );
+	printf ( "%08lx :", ( dispaddr + offset ) );
 	for ( i = offset ; i < ( offset + 16 ) ; i++ ) {
 		if ( i >= len ) {
-			dbg_printf ( "   " );
+			printf ( "   " );
 			continue;
 		}
-		dbg_printf ( "%c%02x",
-			     ( ( ( i % 16 ) == 8 ) ? '-' : ' ' ), bytes[i] );
+		printf ( "%c%02x",
+			 ( ( ( i % 16 ) == 8 ) ? '-' : ' ' ), bytes[i] );
 	}
-	dbg_printf ( " : " );
+	printf ( " : " );
 	for ( i = offset ; i < ( offset + 16 ) ; i++ ) {
 		if ( i >= len ) {
-			dbg_printf ( " " );
+			printf ( " " );
 			continue;
 		}
 		byte = bytes[i];
 		if ( ( byte < 0x20 ) || ( byte >= 0x7f ) )
 			byte = '.';
-		dbg_printf ( "%c", byte );
+		printf ( "%c", byte );
 	}
-	dbg_printf ( "\n" );
+	printf ( "\n" );
 }
 
 /**
@@ -180,8 +158,8 @@
  * @v stream		Message stream ID
  */
 void dbg_autocolourise ( unsigned long stream ) {
-	dbg_printf ( "\033[%dm",
-		     ( stream ? ( 31 + dbg_autocolour ( stream ) ) : 0 ) );
+	printf ( "\033[%dm",
+		 ( stream ? ( 31 + dbg_autocolour ( stream ) ) : 0 ) );
 }
 
 /**
@@ -189,5 +167,5 @@
  *
  */
 void dbg_decolourise ( void ) {
-	dbg_printf ( "\033[0m" );
+	printf ( "\033[0m" );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/debug_md5.c ipxe-1.0.1~lliurex1505/src/core/debug_md5.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/debug_md5.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/debug_md5.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/device.c ipxe-1.0.1~lliurex1505/src/core/device.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/device.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/device.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/downloader.c ipxe-1.0.1~lliurex1505/src/core/downloader.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/downloader.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/downloader.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -22,7 +21,6 @@
 #include <stdlib.h>
 #include <stdarg.h>
 #include <errno.h>
-#include <syslog.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/xfer.h>
 #include <ipxe/open.h>
@@ -75,15 +73,6 @@
  */
 static void downloader_finished ( struct downloader *downloader, int rc ) {
 
-	/* Log download status */
-	if ( rc == 0 ) {
-		syslog ( LOG_NOTICE, "Downloaded \"%s\"\n",
-			 downloader->image->name );
-	} else {
-		syslog ( LOG_ERR, "Download of \"%s\" failed: %s\n",
-			 downloader->image->name, strerror ( rc ) );
-	}
-
 	/* Shut down interfaces */
 	intf_shutdown ( &downloader->xfer, rc );
 	intf_shutdown ( &downloader->job, rc );
@@ -112,7 +101,7 @@
 	if ( ! new_buffer ) {
 		DBGC ( downloader, "Downloader %p could not extend buffer to "
 		       "%zd bytes\n", downloader, len );
-		return -ENOSPC;
+		return -ENOBUFS;
 	}
 	downloader->image->data = new_buffer;
 	downloader->image->len = len;
@@ -131,10 +120,9 @@
  *
  * @v downloader	Downloader
  * @v progress		Progress report to fill in
- * @ret ongoing_rc	Ongoing job status code (if known)
  */
-static int downloader_progress ( struct downloader *downloader,
-				 struct job_progress *progress ) {
+static void downloader_progress ( struct downloader *downloader,
+				  struct job_progress *progress ) {
 
 	/* This is not entirely accurate, since downloaded data may
 	 * arrive out of order (e.g. with multicast protocols), but
@@ -142,8 +130,6 @@
 	 */
 	progress->completed = downloader->pos;
 	progress->total = downloader->image->len;
-
-	return 0;
 }
 
 /****************************************************************************
@@ -187,8 +173,6 @@
 
  done:
 	free_iob ( iobuf );
-	if ( rc != 0 )
-		downloader_finished ( downloader, rc );
 	return rc;
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/edd.c ipxe-1.0.1~lliurex1505/src/core/edd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/edd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/edd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/errno.c ipxe-1.0.1~lliurex1505/src/core/errno.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/errno.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/errno.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,5 @@
 #include <errno.h>
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
 /** @file
  *
  * Error codes
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/exec.c ipxe-1.0.1~lliurex1505/src/core/exec.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/exec.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/exec.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -60,22 +59,18 @@
 int execv ( const char *command, char * const argv[] ) {
 	struct command *cmd;
 	int argc;
-	int rc;
 
 	/* Count number of arguments */
 	for ( argc = 0 ; argv[argc] ; argc++ ) {}
 
 	/* An empty command is deemed to do nothing, successfully */
-	if ( command == NULL ) {
-		rc = 0;
-		goto done;
-	}
+	if ( command == NULL )
+		return 0;
 
 	/* Sanity checks */
 	if ( argc == 0 ) {
 		DBG ( "%s: empty argument list\n", command );
-		rc = -EINVAL;
-		goto done;
+		return -EINVAL;
 	}
 
 	/* Reset getopt() library ready for use by the command.  This
@@ -87,24 +82,12 @@
 
 	/* Hand off to command implementation */
 	for_each_table_entry ( cmd, COMMANDS ) {
-		if ( strcmp ( command, cmd->name ) == 0 ) {
-			rc = cmd->exec ( argc, ( char ** ) argv );
-			goto done;
-		}
+		if ( strcmp ( command, cmd->name ) == 0 )
+			return cmd->exec ( argc, ( char ** ) argv );
 	}
 
 	printf ( "%s: command not found\n", command );
-	rc = -ENOEXEC;
-
- done:
-	/* Store error number, if an error occurred */
-	if ( rc ) {
-		errno = rc;
-		if ( errno < 0 )
-			errno = -errno;
-	}
-
-	return rc;
+	return -ENOEXEC;
 }
 
 /**
@@ -375,7 +358,7 @@
 	ptr = string;
 	for ( arg = args ; *arg ; arg++ ) {
 		ptr += sprintf ( ptr, "%s%s",
-				 ( ( arg == args ) ? "" : " " ), *arg );
+				 ( ( ptr == string ) ? "" : " " ), *arg );
 	}
 	assert ( ptr < ( string + len ) );
 
@@ -397,7 +380,7 @@
 /** "echo" command descriptor */
 static struct command_descriptor echo_cmd =
 	COMMAND_DESC ( struct echo_options, echo_opts, 0, MAX_ARGUMENTS,
-		       "[...]" );
+		       "[-n] [...]" );
 
 /**
  * "echo" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/fnrec.c ipxe-1.0.1~lliurex1505/src/core/fnrec.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/fnrec.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/fnrec.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbserial.c ipxe-1.0.1~lliurex1505/src/core/gdbserial.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbserial.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/gdbserial.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbstub.c ipxe-1.0.1~lliurex1505/src/core/gdbstub.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbstub.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/gdbstub.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbudp.c ipxe-1.0.1~lliurex1505/src/core/gdbudp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/gdbudp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/gdbudp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/getkey.c ipxe-1.0.1~lliurex1505/src/core/getkey.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/getkey.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/getkey.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -24,7 +23,6 @@
 #include <ipxe/process.h>
 #include <ipxe/keys.h>
 #include <ipxe/timer.h>
-#include <ipxe/nap.h>
 
 /** @file
  *
@@ -47,7 +45,6 @@
 		step();
 		if ( iskey() )
 			return getchar();
-		cpu_nap();
 	}
 
 	return -1;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/getopt.c ipxe-1.0.1~lliurex1505/src/core/getopt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/getopt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/getopt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/image.c ipxe-1.0.1~lliurex1505/src/core/image.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/image.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/image.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -26,7 +25,6 @@
 #include <errno.h>
 #include <assert.h>
 #include <libgen.h>
-#include <syslog.h>
 #include <ipxe/list.h>
 #include <ipxe/umalloc.h>
 #include <ipxe/uri.h>
@@ -38,28 +36,12 @@
  *
  */
 
-/* Disambiguate the various error causes */
-#define EACCES_UNTRUSTED \
-	__einfo_error ( EINFO_EACCES_UNTRUSTED )
-#define EINFO_EACCES_UNTRUSTED \
-	__einfo_uniqify ( EINFO_EACCES, 0x01, "Untrusted image" )
-#define EACCES_PERMANENT \
-	__einfo_error ( EINFO_EACCES_PERMANENT )
-#define EINFO_EACCES_PERMANENT \
-	__einfo_uniqify ( EINFO_EACCES, 0x02, "Trust requirement is permanent" )
-
 /** List of registered images */
 struct list_head images = LIST_HEAD_INIT ( images );
 
 /** Currently-executing image */
 struct image *current_image;
 
-/** Current image trust requirement */
-static int require_trusted_images = 0;
-
-/** Prevent changes to image trust requirement */
-static int require_trusted_images_permanent = 0;
-
 /**
  * Free executable image
  *
@@ -68,70 +50,48 @@
 static void free_image ( struct refcnt *refcnt ) {
 	struct image *image = container_of ( refcnt, struct image, refcnt );
 
-	DBGC ( image, "IMAGE %s freed\n", image->name );
-	free ( image->name );
 	free ( image->cmdline );
 	uri_put ( image->uri );
 	ufree ( image->data );
 	image_put ( image->replacement );
 	free ( image );
+	DBGC ( image, "IMAGE %s freed\n", image->name );
 }
 
 /**
  * Allocate executable image
  *
- * @v uri		URI, or NULL
  * @ret image		Executable image
  */
-struct image * alloc_image ( struct uri *uri ) {
-	const char *name;
+struct image * alloc_image ( void ) {
 	struct image *image;
-	int rc;
 
-	/* Allocate image */
 	image = zalloc ( sizeof ( *image ) );
-	if ( ! image )
-		goto err_alloc;
-
-	/* Initialise image */
-	ref_init ( &image->refcnt, free_image );
-	if ( uri ) {
-		image->uri = uri_get ( uri );
-		if ( uri->path ) {
-			name = basename ( ( char * ) uri->path );
-			if ( ( rc = image_set_name ( image, name ) ) != 0 )
-				goto err_set_name;
-		}
+	if ( image ) {
+		ref_init ( &image->refcnt, free_image );
 	}
-
 	return image;
-
- err_set_name:
-	image_put ( image );
- err_alloc:
-	return NULL;
 }
 
 /**
- * Set image name
+ * Set image URI
  *
  * @v image		Image
- * @v name		New image name
- * @ret rc		Return status code
+ * @v URI		New image URI
+ *
+ * If no name is set, the name will be updated to the base name of the
+ * URI path (if any).
  */
-int image_set_name ( struct image *image, const char *name ) {
-	char *name_copy;
+void image_set_uri ( struct image *image, struct uri *uri ) {
+	const char *path = uri->path;
 
-	/* Duplicate name */
-	name_copy = strdup ( name );
-	if ( ! name_copy )
-		return -ENOMEM;
-
-	/* Replace existing name */
-	free ( image->name );
-	image->name = name_copy;
+	/* Replace URI reference */
+	uri_put ( image->uri );
+	image->uri = uri_get ( uri );
 
-	return 0;
+	/* Set name if none already specified */
+	if ( path && ( ! image->name[0] ) )
+		image_set_name ( image, basename ( ( char * ) path ) );
 }
 
 /**
@@ -161,14 +121,11 @@
  */
 int register_image ( struct image *image ) {
 	static unsigned int imgindex = 0;
-	char name[8]; /* "imgXXXX" */
-	int rc;
 
 	/* Create image name if it doesn't already have one */
-	if ( ! image->name ) {
-		snprintf ( name, sizeof ( name ), "img%d", imgindex++ );
-		if ( ( rc = image_set_name ( image, name ) ) != 0 )
-			return rc;
+	if ( ! image->name[0] ) {
+		snprintf ( image->name, sizeof ( image->name ), "img%d",
+			   imgindex++ );
 	}
 
 	/* Avoid ending up with multiple "selected" images on
@@ -195,10 +152,6 @@
  */
 void unregister_image ( struct image *image ) {
 
-	/* Do nothing unless image is registered */
-	if ( ! ( image->flags & IMAGE_REGISTERED ) )
-		return;
-
 	DBGC ( image, "IMAGE %s unregistered\n", image->name );
 	list_del ( &image->list );
 	image->flags &= ~IMAGE_REGISTERED;
@@ -264,13 +217,17 @@
  */
 int image_exec ( struct image *image ) {
 	struct image *saved_current_image;
-	struct image *replacement = NULL;
+	struct image *replacement;
 	struct uri *old_cwuri;
 	int rc;
 
 	/* Sanity check */
 	assert ( image->flags & IMAGE_REGISTERED );
 
+	/* Check that this image can be selected for execution */
+	if ( ( rc = image_select ( image ) ) != 0 )
+		return rc;
+
 	/* Switch current working directory to be that of the image itself */
 	old_cwuri = uri_get ( cwuri );
 	churi ( image->uri );
@@ -284,20 +241,6 @@
 	 */
 	current_image = image_get ( image );
 
-	/* Check that this image can be selected for execution */
-	if ( ( rc = image_select ( image ) ) != 0 )
-		goto err;
-
-	/* Check that image is trusted (if applicable) */
-	if ( require_trusted_images && ! ( image->flags & IMAGE_TRUSTED ) ) {
-		DBGC ( image, "IMAGE %s is not trusted\n", image->name );
-		rc = -EACCES_UNTRUSTED;
-		goto err;
-	}
-
-	/* Record boot attempt */
-	syslog ( LOG_NOTICE, "Executing \"%s\"\n", image->name );
-
 	/* Try executing the image */
 	if ( ( rc = image->type->exec ( image ) ) != 0 ) {
 		DBGC ( image, "IMAGE %s could not execute: %s\n",
@@ -305,15 +248,6 @@
 		/* Do not return yet; we still have clean-up to do */
 	}
 
-	/* Record result of boot attempt */
-	if ( rc == 0 ) {
-		syslog ( LOG_NOTICE, "Execution of \"%s\" completed\n",
-			 image->name );
-	} else {
-		syslog ( LOG_ERR, "Execution of \"%s\" failed: %s\n",
-			 image->name, strerror ( rc ) );
-	}
-
 	/* Pick up replacement image before we drop the original
 	 * image's temporary reference.  The replacement image must
 	 * already be registered, so we don't need to hold a temporary
@@ -323,19 +257,6 @@
 	if ( replacement )
 		assert ( replacement->flags & IMAGE_REGISTERED );
 
- err:
-	/* Unregister image if applicable */
-	if ( image->flags & IMAGE_AUTO_UNREGISTER )
-		unregister_image ( image );
-
-	/* Debug message for tail-recursion.  Placed here because the
-	 * image_put() may end up freeing the image.
-	 */
-	if ( replacement ) {
-		DBGC ( image, "IMAGE %s replacing self with IMAGE %s\n",
-		       image->name, replacement->name );
-	}
-
 	/* Drop temporary reference to the original image */
 	image_put ( image );
 
@@ -347,8 +268,12 @@
 	uri_put ( old_cwuri );
 
 	/* Tail-recurse into replacement image, if one exists */
-	if ( replacement )
-		return image_exec ( replacement );
+	if ( replacement ) {
+		DBGC ( image, "IMAGE %s replacing self with IMAGE %s\n",
+		       image->name, replacement->name );
+		if ( ( rc = image_exec ( replacement ) ) != 0 )
+			return rc;
+	}
 
 	return rc;
 }
@@ -430,27 +355,3 @@
 	}
 	return NULL;
 }
-
-/**
- * Change image trust requirement
- *
- * @v require_trusted	Require trusted images
- * @v permanent		Make trust requirement permanent
- * @ret rc		Return status code
- */
-int image_set_trust ( int require_trusted, int permanent ) {
-
-	/* Update trust requirement, if permitted to do so */
-	if ( ! require_trusted_images_permanent ) {
-		require_trusted_images = require_trusted;
-		require_trusted_images_permanent = permanent;
-	}
-
-	/* Fail if we attempted to change the trust requirement but
-	 * were not permitted to do so.
-	 */
-	if ( require_trusted_images != require_trusted )
-		return -EACCES_PERMANENT;
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/init.c ipxe-1.0.1~lliurex1505/src/core/init.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/init.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/init.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/interface.c ipxe-1.0.1~lliurex1505/src/core/interface.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/interface.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/interface.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -34,24 +33,8 @@
  *
  */
 
-/**
- * Close null interface
- *
- * @v intf		Null interface
- * @v rc		Reason for close
- */
-static void null_intf_close ( struct interface *intf __unused,
-			      int rc __unused ) {
-
-	/* Do nothing.  In particular, do not call intf_restart(),
-	 * since that would result in an infinite loop.
-	 */
-}
-
 /** Null interface operations */
-static struct interface_operation null_intf_op[] = {
-	INTF_OP ( intf_close, struct interface *, null_intf_close ),
-};
+static struct interface_operation null_intf_op[] = {};
 
 /** Null interface descriptor */
 struct interface_descriptor null_intf_desc =
@@ -249,8 +232,7 @@
 	if ( op ) {
 		op ( object, rc );
 	} else {
-		/* Default is to restart the interface */
-		intf_restart ( dest, rc );
+		/* Default is to ignore intf_close() */
 	}
 
 	intf_put ( dest );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/iobuf.c ipxe-1.0.1~lliurex1505/src/core/iobuf.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/iobuf.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/iobuf.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,12 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <strings.h>
 #include <errno.h>
 #include <ipxe/malloc.h>
 #include <ipxe/iobuf.h>
@@ -32,80 +30,35 @@
  */
 
 /**
- * Allocate I/O buffer with specified alignment and offset
- *
- * @v len	Required length of buffer
- * @v align	Physical alignment
- * @v offset	Offset from physical alignment
- * @ret iobuf	I/O buffer, or NULL if none available
- *
- * @c align will be rounded up to the nearest power of two.
- */
-struct io_buffer * alloc_iob_raw ( size_t len, size_t align, size_t offset ) {
-	struct io_buffer *iobuf;
-	void *data;
-
-	/* Align buffer length to ensure that struct io_buffer is aligned */
-	len = ( len + __alignof__ ( *iobuf ) - 1 ) &
-		~( __alignof__ ( *iobuf ) - 1 );
-
-	/* Round up alignment to the nearest power of two */
-	align = ( 1 << fls ( align - 1 ) );
-
-	/* Allocate buffer plus descriptor as a single unit, unless
-	 * doing so will push the total size over the alignment
-	 * boundary.
-	 */
-	if ( ( len + sizeof ( *iobuf ) ) <= align ) {
-
-		/* Allocate memory for buffer plus descriptor */
-		data = malloc_dma_offset ( len + sizeof ( *iobuf ), align,
-					   offset );
-		if ( ! data )
-			return NULL;
-		iobuf = ( data + len );
-
-	} else {
-
-		/* Allocate memory for buffer */
-		data = malloc_dma_offset ( len, align, offset );
-		if ( ! data )
-			return NULL;
-
-		/* Allocate memory for descriptor */
-		iobuf = malloc ( sizeof ( *iobuf ) );
-		if ( ! iobuf ) {
-			free_dma ( data, len );
-			return NULL;
-		}
-	}
-
-	/* Populate descriptor */
-	iobuf->head = iobuf->data = iobuf->tail = data;
-	iobuf->end = ( data + len );
-
-	return iobuf;
-}
-
-/**
  * Allocate I/O buffer
  *
  * @v len	Required length of buffer
  * @ret iobuf	I/O buffer, or NULL if none available
  *
- * The I/O buffer will be physically aligned on its own size (rounded
- * up to the nearest power of two).
+ * The I/O buffer will be physically aligned to a multiple of
+ * @c IOBUF_SIZE.
  */
 struct io_buffer * alloc_iob ( size_t len ) {
+	struct io_buffer *iobuf = NULL;
+	void *data;
 
 	/* Pad to minimum length */
 	if ( len < IOB_ZLEN )
 		len = IOB_ZLEN;
 
-	/* Align buffer on its own size to avoid potential problems
-	 * with boundary-crossing DMA.
-	 */
-	return alloc_iob_raw ( len, len, 0 );
+	/* Align buffer length */
+	len = ( len + __alignof__( *iobuf ) - 1 ) &
+		~( __alignof__( *iobuf ) - 1 );
+	
+	/* Allocate memory for buffer plus descriptor */
+	data = malloc_dma ( len + sizeof ( *iobuf ), IOB_ALIGN );
+	if ( ! data )
+		return NULL;
+
+	iobuf = ( struct io_buffer * ) ( data + len );
+	iobuf->head = iobuf->data = iobuf->tail = data;
+	iobuf->end = iobuf;
+	return iobuf;
 }
 
 /**
@@ -114,29 +67,12 @@
  * @v iobuf	I/O buffer
  */
 void free_iob ( struct io_buffer *iobuf ) {
-	size_t len;
-
-	/* Allow free_iob(NULL) to be valid */
-	if ( ! iobuf )
-		return;
-
-	/* Sanity checks */
-	assert ( iobuf->head <= iobuf->data );
-	assert ( iobuf->data <= iobuf->tail );
-	assert ( iobuf->tail <= iobuf->end );
-
-	/* Free buffer */
-	len = ( iobuf->end - iobuf->head );
-	if ( iobuf->end == iobuf ) {
-
-		/* Descriptor is inline */
-		free_dma ( iobuf->head, ( len + sizeof ( *iobuf ) ) );
-
-	} else {
-
-		/* Descriptor is detached */
-		free_dma ( iobuf->head, len );
-		free ( iobuf );
+	if ( iobuf ) {
+		assert ( iobuf->head <= iobuf->data );
+		assert ( iobuf->data <= iobuf->tail );
+		assert ( iobuf->tail <= iobuf->end );
+		free_dma ( iobuf->head,
+			   ( iobuf->end - iobuf->head ) + sizeof ( *iobuf ) );
 	}
 }
 
@@ -158,45 +94,3 @@
 	return -ENOBUFS;
 }
 
-/**
- * Concatenate I/O buffers into a single buffer
- *
- * @v list	List of I/O buffers
- * @ret iobuf	Concatenated I/O buffer, or NULL on allocation failure
- *
- * After a successful concatenation, the list will be empty.
- */
-struct io_buffer * iob_concatenate ( struct list_head *list ) {
-	struct io_buffer *iobuf;
-	struct io_buffer *tmp;
-	struct io_buffer *concatenated;
-	size_t len = 0;
-
-	/* If the list contains only a single entry, avoid an
-	 * unnecessary additional allocation.
-	 */
-	if ( list_is_singular ( list ) ) {
-		iobuf = list_first_entry ( list, struct io_buffer, list );
-		INIT_LIST_HEAD ( list );
-		return iobuf;
-	}
-
-	/* Calculate total length */
-	list_for_each_entry ( iobuf, list, list )
-		len += iob_len ( iobuf );
-
-	/* Allocate new I/O buffer */
-	concatenated = alloc_iob_raw ( len, __alignof__ ( *iobuf ), 0 );
-	if ( ! concatenated )
-		return NULL;
-
-	/* Move data to new I/O buffer */
-	list_for_each_entry_safe ( iobuf, tmp, list, list ) {
-		list_del ( &iobuf->list );
-		memcpy ( iob_put ( concatenated, iob_len ( iobuf ) ),
-			 iobuf->data, iob_len ( iobuf ) );
-		free_iob ( iobuf );
-	}
-
-	return concatenated;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/job.c ipxe-1.0.1~lliurex1505/src/core/job.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/job.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/job.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -34,30 +33,22 @@
  *
  * @v intf		Object interface
  * @v progress		Progress data to fill in
- * @ret ongoing_rc	Ongoing job status code (if known)
  */
-int job_progress ( struct interface *intf, struct job_progress *progress ) {
+void job_progress ( struct interface *intf, struct job_progress *progress ) {
 	struct interface *dest;
 	job_progress_TYPE ( void * ) *op =
 		intf_get_dest_op ( intf, job_progress, &dest );
 	void *object = intf_object ( dest );
-	int ongoing_rc;
 
 	DBGC ( INTF_COL ( intf ), "INTF " INTF_INTF_FMT " job_progress\n",
 	       INTF_INTF_DBG ( intf, dest ) );
 
-	/* Initialise progress to zero */
-	memset ( progress, 0, sizeof ( *progress ) );
-
 	if ( op ) {
-		ongoing_rc = op ( object, progress );
+		op ( object, progress );
 	} else {
-		/* Default is to leave progress as zero and have no
-		 * known return status code.
-		 */
-		ongoing_rc = 0;
+		/* Default is to mark progress as zero */
+		memset ( progress, 0, sizeof ( *progress ) );
 	}
 
 	intf_put ( dest );
-	return ongoing_rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/linebuf.c ipxe-1.0.1~lliurex1505/src/core/linebuf.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/linebuf.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/linebuf.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/lineconsole.c ipxe-1.0.1~lliurex1505/src/core/lineconsole.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/lineconsole.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/lineconsole.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,67 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Line-based console
- *
- */
-
-#include <stdint.h>
-#include <stddef.h>
-#include <ipxe/ansiesc.h>
-#include <ipxe/lineconsole.h>
-
-/**
- * Print a character to a line-based console
- *
- * @v character		Character to be printed
- * @ret print		Print line
- */
-size_t line_putchar ( struct line_console *line, int character ) {
-
-	/* Strip ANSI escape sequences */
-	character = ansiesc_process ( &line->ctx, character );
-	if ( character < 0 )
-		return 0;
-
-	/* Ignore carriage return */
-	if ( character == '\r' )
-		return 0;
-
-	/* Treat newline as a terminator */
-	if ( character == '\n' )
-		character = 0;
-
-	/* Add character to buffer */
-	line->buffer[line->index++] = character;
-
-	/* Do nothing more unless we reach end-of-line (or end-of-buffer) */
-	if ( ( character != 0 ) &&
-	     ( line->index < ( line->len - 1 /* NUL */ ) ) ) {
-		return 0;
-	}
-
-	/* Reset to start of buffer */
-	line->index = 0;
-
-	return 1;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/list.c ipxe-1.0.1~lliurex1505/src/core/list.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/list.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/list.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,84 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Linked lists
- *
- */
-
-#include <ipxe/list.h>
-
-void extern_list_add ( struct list_head *new, struct list_head *head ) {
-	inline_list_add ( new, head );
-}
-
-void extern_list_add_tail ( struct list_head *new, struct list_head *head ) {
-	inline_list_add_tail ( new, head );
-}
-
-void extern_list_del ( struct list_head *list ) {
-	inline_list_del ( list );
-}
-
-int extern_list_empty ( const struct list_head *list ) {
-	return inline_list_empty ( list );
-}
-
-int extern_list_is_singular ( const struct list_head *list ) {
-	return inline_list_is_singular ( list );
-}
-
-int extern_list_is_last ( const struct list_head *list,
-			  const struct list_head *head ) {
-	return inline_list_is_last ( list, head );
-}
-
-void extern_list_cut_position ( struct list_head *new,
-				struct list_head *list,
-				struct list_head *entry ) {
-	inline_list_cut_position ( new, list, entry );
-}
-
-void extern_list_splice ( const struct list_head *list,
-			  struct list_head *entry ) {
-	inline_list_splice ( list, entry );
-}
-
-void extern_list_splice_tail ( const struct list_head *list,
-			       struct list_head *entry ) {
-	inline_list_splice_tail ( list, entry );
-}
-
-void extern_list_splice_init ( struct list_head *list,
-			       struct list_head *entry ) {
-	inline_list_splice_init ( list, entry );
-}
-
-void extern_list_splice_tail_init ( struct list_head *list,
-				    struct list_head *entry ) {
-	inline_list_splice_tail_init ( list, entry );
-}
-
-int extern_list_contains ( struct list_head *entry,
-			   struct list_head *head ) {
-	return inline_list_contains ( entry, head );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/log.c ipxe-1.0.1~lliurex1505/src/core/log.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/log.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/log.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,63 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * System logger
- *
- */
-
-#include <stdarg.h>
-#include <syslog.h>
-#include <ipxe/console.h>
-
-/**
- * Write message to system log
- *
- * @v fmt		Format string
- * @v args		Arguments
- */
-void log_vprintf ( const char *fmt, va_list args ) {
-	int saved_usage;
-
-	/* Mark console as in use for log messages */
-	saved_usage = console_set_usage ( CONSOLE_USAGE_LOG );
-
-	/* Print message */
-	vprintf ( fmt, args );
-
-	/* Restore console usage */
-	console_set_usage ( saved_usage );
-}
-
-/**
- * Write message to system log
- *
- * @v fmt		Format string
- * @v ...		Arguments
- */
-void log_printf ( const char *fmt, ... ) {
-	va_list args;
-
-	va_start ( args, fmt );
-	log_vprintf ( fmt, args );
-	va_end ( args );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/main.c ipxe-1.0.1~lliurex1505/src/core/main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/main.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/main.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,18 +14,53 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <stddef.h>
 #include <stdio.h>
+#include <stdlib.h>
 #include <ipxe/init.h>
+#include <ipxe/features.h>
+#include <ipxe/shell.h>
+#include <ipxe/image.h>
+#include <ipxe/keys.h>
+#include <usr/prompt.h>
 #include <usr/autoboot.h>
 #include <config/general.h>
 
+#define NORMAL	"\033[0m"
+#define BOLD	"\033[1m"
+#define CYAN	"\033[36m"
+
+/** The "scriptlet" setting */
+struct setting scriptlet_setting __setting ( SETTING_MISC ) = {
+	.name = "scriptlet",
+	.description = "Boot scriptlet",
+	.tag = DHCP_EB_SCRIPTLET,
+	.type = &setting_type_string,
+};
+
+/**
+ * Prompt for shell entry
+ *
+ * @ret	enter_shell		User wants to enter shell
+ */
+static int shell_banner ( void ) {
+
+	/* Skip prompt if timeout is zero */
+	if ( BANNER_TIMEOUT <= 0 )
+		return 0;
+
+	return ( prompt ( "\nPress Ctrl-B for the iPXE command line...",
+			  ( BANNER_TIMEOUT * 100 ), CTRL_B ) == 0 );
+}
+
 /**
  * Main entry point
  *
  * @ret rc		Return status code
  */
 __asmcall int main ( void ) {
+	struct feature *feature;
+	struct image *image;
+	char *scriptlet;
 
 	/* Some devices take an unreasonably long time to initialise */
 	printf ( PRODUCT_SHORT_NAME " initialising devices..." );
@@ -33,7 +68,49 @@
 	startup();
 	printf ( "ok\n" );
 
-	ipxe ( NULL );
+	/*
+	 * Print welcome banner
+	 *
+	 *
+	 * If you wish to brand this build of iPXE, please do so by
+	 * defining the string PRODUCT_NAME in config/general.h.
+	 *
+	 * While nothing in the GPL prevents you from removing all
+	 * references to iPXE or http://ipxe.org, we prefer you not to
+	 * do so.
+	 *
+	 */
+	printf ( NORMAL "\n\n" PRODUCT_NAME "\n" BOLD "iPXE " VERSION
+		 NORMAL " -- Open Source Network Boot Firmware -- "
+		 CYAN "http://ipxe.org" NORMAL "\n"
+		 "Features:" );
+	for_each_table_entry ( feature, FEATURES )
+		printf ( " %s", feature->name );
+	printf ( "\n" );
+
+	/* Boot system */
+	if ( ( image = first_image() ) != NULL ) {
+		/* We have an embedded image; execute it */
+		image_exec ( image );
+	} else if ( shell_banner() ) {
+		/* User wants shell; just give them a shell */
+		shell();
+	} else {
+		fetch_string_setting_copy ( NULL, &scriptlet_setting,
+					    &scriptlet );
+		if ( scriptlet ) {
+			/* User has defined a scriptlet; execute it */
+			system ( scriptlet );
+			free ( scriptlet );
+		} else {
+			/* Try booting.  If booting fails, offer the
+			 * user another chance to enter the shell.
+			 */
+			autoboot();
+			if ( shell_banner() )
+				shell();
+		}
+	}
 
 	shutdown_exit();
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/malloc.c ipxe-1.0.1~lliurex1505/src/core/malloc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/malloc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/malloc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -92,9 +91,9 @@
 /**
  * Heap size
  *
- * Currently fixed at 512kB.
+ * Currently fixed at 128kB.
  */
-#define HEAP_SIZE ( 512 * 1024 )
+#define HEAP_SIZE ( 128 * 1024 )
 
 /** The heap itself */
 static char heap[HEAP_SIZE] __attribute__ (( aligned ( __alignof__(void *) )));
@@ -106,36 +105,11 @@
 static inline void valgrind_make_blocks_defined ( void ) {
 	struct memory_block *block;
 
-	if ( RUNNING_ON_VALGRIND <= 0 )
-		return;
-
-	/* Traverse free block list, marking each block structure as
-	 * defined.  Some contortions are necessary to avoid errors
-	 * from list_check().
-	 */
-
-	/* Mark block list itself as defined */
-	VALGRIND_MAKE_MEM_DEFINED ( &free_blocks, sizeof ( free_blocks ) );
-
-	/* Mark areas accessed by list_check() as defined */
-	VALGRIND_MAKE_MEM_DEFINED ( &free_blocks.prev->next,
-				    sizeof ( free_blocks.prev->next ) );
-	VALGRIND_MAKE_MEM_DEFINED ( free_blocks.next,
-				    sizeof ( *free_blocks.next ) );
-	VALGRIND_MAKE_MEM_DEFINED ( &free_blocks.next->next->prev,
-				    sizeof ( free_blocks.next->next->prev ) );
-
-	/* Mark each block in list as defined */
-	list_for_each_entry ( block, &free_blocks, list ) {
-
-		/* Mark block as defined */
-		VALGRIND_MAKE_MEM_DEFINED ( block, sizeof ( *block ) );
-
-		/* Mark areas accessed by list_check() as defined */
-		VALGRIND_MAKE_MEM_DEFINED ( block->list.next,
-					    sizeof ( *block->list.next ) );
-		VALGRIND_MAKE_MEM_DEFINED ( &block->list.next->next->prev,
-				      sizeof ( block->list.next->next->prev ) );
+	if ( RUNNING_ON_VALGRIND > 0 ) {
+		VALGRIND_MAKE_MEM_DEFINED ( &free_blocks,
+					    sizeof ( free_blocks ) );
+		list_for_each_entry ( block, &free_blocks, list )
+			VALGRIND_MAKE_MEM_DEFINED ( block, sizeof ( *block ) );
 	}
 }
 
@@ -145,45 +119,14 @@
  */
 static inline void valgrind_make_blocks_noaccess ( void ) {
 	struct memory_block *block;
-	struct memory_block *prev = NULL;
-
-	if ( RUNNING_ON_VALGRIND <= 0 )
-		return;
-
-	/* Traverse free block list, marking each block structure as
-	 * inaccessible.  Some contortions are necessary to avoid
-	 * errors from list_check().
-	 */
-
-	/* Mark each block in list as inaccessible */
-	list_for_each_entry ( block, &free_blocks, list ) {
+	struct memory_block *tmp;
 
-		/* Mark previous block (if any) as inaccessible. (Current
-		 * block will be accessed by list_check().)
-		 */
-		if ( prev )
-			VALGRIND_MAKE_MEM_NOACCESS ( prev, sizeof ( *prev ) );
-		prev = block;
-
-		/* At the end of the list, list_check() will end up
-		 * accessing the first list item.  Temporarily mark
-		 * this area as defined.
-		 */
-		VALGRIND_MAKE_MEM_DEFINED ( &free_blocks.next->prev,
-					    sizeof ( free_blocks.next->prev ) );
+	if ( RUNNING_ON_VALGRIND > 0 ) {
+		list_for_each_entry_safe ( block, tmp, &free_blocks, list )
+			VALGRIND_MAKE_MEM_NOACCESS ( block, sizeof ( *block ) );
+		VALGRIND_MAKE_MEM_NOACCESS ( &free_blocks,
+					     sizeof ( free_blocks ) );
 	}
-	/* Mark last block (if any) as inaccessible */
-	if ( prev )
-		VALGRIND_MAKE_MEM_NOACCESS ( prev, sizeof ( *prev ) );
-
-	/* Mark as inaccessible the area that was temporarily marked
-	 * as defined to avoid errors from list_check().
-	 */
-	VALGRIND_MAKE_MEM_NOACCESS ( &free_blocks.next->prev,
-				     sizeof ( free_blocks.next->prev ) );
-
-	/* Mark block list itself as inaccessible */
-	VALGRIND_MAKE_MEM_NOACCESS ( &free_blocks, sizeof ( free_blocks ) );
 }
 
 /**
@@ -193,26 +136,12 @@
  */
 static unsigned int discard_cache ( void ) {
 	struct cache_discarder *discarder;
-	unsigned int discarded;
+	unsigned int discarded = 0;
 
 	for_each_table_entry ( discarder, CACHE_DISCARDERS ) {
-		discarded = discarder->discard();
-		if ( discarded )
-			return discarded;
+		discarded += discarder->discard();
 	}
-	return 0;
-}
-
-/**
- * Discard all cached data
- *
- */
-static void discard_all_cache ( void ) {
-	unsigned int discarded;
-
-	do {
-		discarded = discard_cache();
-	} while ( discarded );
+	return discarded;
 }
 
 /**
@@ -220,7 +149,6 @@
  *
  * @v size		Requested size
  * @v align		Physical alignment
- * @v offset		Offset from physical alignment
  * @ret ptr		Memory block, or NULL
  *
  * Allocates a memory block @b physically aligned as requested.  No
@@ -228,7 +156,7 @@
  *
  * @c align must be a power of two.  @c size may not be zero.
  */
-void * alloc_memblock ( size_t size, size_t align, size_t offset ) {
+void * alloc_memblock ( size_t size, size_t align ) {
 	struct memory_block *block;
 	size_t align_mask;
 	size_t pre_size;
@@ -245,13 +173,12 @@
 	size = ( size + MIN_MEMBLOCK_SIZE - 1 ) & ~( MIN_MEMBLOCK_SIZE - 1 );
 	align_mask = ( align - 1 ) | ( MIN_MEMBLOCK_SIZE - 1 );
 
-	DBG ( "Allocating %#zx (aligned %#zx+%zx)\n", size, align, offset );
+	DBG ( "Allocating %#zx (aligned %#zx)\n", size, align );
 	while ( 1 ) {
 		/* Search through blocks for the first one with enough space */
 		list_for_each_entry ( block, &free_blocks, list ) {
-			pre_size = ( ( offset - virt_to_phys ( block ) )
-				     & align_mask );
-			post_size = ( block->size - pre_size - size );
+			pre_size = ( - virt_to_phys ( block ) ) & align_mask;
+			post_size = block->size - pre_size - size;
 			if ( post_size >= 0 ) {
 				/* Split block into pre-block, block, and
 				 * post-block.  After this split, the "pre"
@@ -420,7 +347,7 @@
 	if ( new_size ) {
 		new_total_size = ( new_size +
 				   offsetof ( struct autosized_block, data ) );
-		new_block = alloc_memblock ( new_total_size, 1, 0 );
+		new_block = alloc_memblock ( new_total_size, 1 );
 		if ( ! new_block )
 			return NULL;
 		VALGRIND_MAKE_MEM_UNDEFINED ( new_block, offsetof ( struct autosized_block, data ) );
@@ -531,19 +458,6 @@
 	.initialise = init_heap,
 };
 
-/**
- * Discard all cached data on shutdown
- *
- */
-static void shutdown_cache ( int booting __unused ) {
-	discard_all_cache();
-}
-
-/** Memory allocator shutdown function */
-struct startup_fn heap_startup_fn __startup_fn ( STARTUP_EARLY ) = {
-	.shutdown = shutdown_cache,
-};
-
 #if 0
 #include <stdio.h>
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/memblock.c ipxe-1.0.1~lliurex1505/src/core/memblock.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/memblock.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/memblock.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,81 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Largest memory block
- *
- */
-
-#include <stdint.h>
-#include <ipxe/uaccess.h>
-#include <ipxe/io.h>
-#include <ipxe/memblock.h>
-
-/**
- * Find largest usable memory region
- *
- * @ret start		Start of region
- * @ret len		Length of region
- */
-size_t largest_memblock ( userptr_t *start ) {
-	struct memory_map memmap;
-	struct memory_region *region;
-	physaddr_t max = ~( ( physaddr_t ) 0 );
-	physaddr_t region_start;
-	physaddr_t region_end;
-	size_t region_len;
-	unsigned int i;
-	size_t len = 0;
-
-	/* Avoid returning uninitialised data on error */
-	*start = UNULL;
-
-	/* Scan through all memory regions */
-	get_memmap ( &memmap );
-	for ( i = 0 ; i < memmap.count ; i++ ) {
-		region = &memmap.regions[i];
-		DBG ( "Considering [%llx,%llx)\n", region->start, region->end );
-
-		/* Truncate block to maximum physical address */
-		if ( region->start > max ) {
-			DBG ( "...starts after maximum address %lx\n", max );
-			continue;
-		}
-		region_start = region->start;
-		if ( region->end > max ) {
-			DBG ( "...end truncated to maximum address %lx\n", max);
-			region_end = 0; /* =max, given the wraparound */
-		} else {
-			region_end = region->end;
-		}
-		region_len = ( region_end - region_start );
-
-		/* Use largest block */
-		if ( region_len > len ) {
-			DBG ( "...new best block found\n" );
-			*start = phys_to_user ( region_start );
-			len = region_len;
-		}
-	}
-
-	return len;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/memmap_settings.c ipxe-1.0.1~lliurex1505/src/core/memmap_settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/memmap_settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/memmap_settings.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,242 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/init.h>
-#include <ipxe/settings.h>
-#include <ipxe/io.h>
-
-/** @file
- *
- * Memory map settings
- *
- * Memory map settings are numerically encoded as:
- *
- *  Bits 31-24	Number of regions, minus one
- *  Bits 23-16	Starting region
- *  Bits 15-11	Unused
- *  Bit  10	Ignore non-existent regions (rather than generating an error)
- *  Bit  9	Include length
- *  Bit  8	Include start address
- *  Bits 7-6	Unused
- *  Bits 5-0	Scale factor (i.e. right shift count)
- */
-
-/**
- * Construct memory map setting tag
- *
- * @v start		Starting region
- * @v count		Number of regions
- * @v include_start	Include start address
- * @v include_length	Include length
- * @v ignore		Ignore non-existent regions
- * @v scale		Scale factor
- * @ret tag		Setting tag
- */
-#define MEMMAP_TAG( start, count, include_start, include_length,	\
-		    ignore, scale )					\
-	( ( (start) << 16 ) | ( ( (count) - 1 ) << 24 ) |		\
-	  ( (ignore) << 10 ) | ( (include_length) << 9 ) |		\
-	  ( (include_start) << 8 ) | (scale) )
-
-/**
- * Extract number of regions from setting tag
- *
- * @v tag		Setting tag
- * @ret count		Number of regions
- */
-#define MEMMAP_COUNT( tag ) ( ( ( (tag) >> 24 ) & 0xff ) + 1 )
-
-/**
- * Extract starting region from setting tag
- *
- * @v tag		Setting tag
- * @ret start		Starting region
- */
-#define MEMMAP_START( tag ) ( ( (tag) >> 16 ) & 0xff )
-
-/**
- * Extract ignore flag from setting tag
- *
- * @v tag		Setting tag
- * @ret ignore		Ignore non-existent regions
- */
-#define MEMMAP_IGNORE_NONEXISTENT( tag ) ( (tag) & 0x00000400UL )
-
-/**
- * Extract length inclusion flag from setting tag
- *
- * @v tag		Setting tag
- * @ret include_length	Include length
- */
-#define MEMMAP_INCLUDE_LENGTH( tag ) ( (tag) & 0x00000200UL )
-
-/**
- * Extract start address inclusion flag from setting tag
- *
- * @v tag		Setting tag
- * @ret include_start	Include start address
- */
-#define MEMMAP_INCLUDE_START( tag ) ( (tag) & 0x00000100UL )
-
-/**
- * Extract scale factor from setting tag
- *
- * @v tag		Setting tag
- * @v scale		Scale factor
- */
-#define MEMMAP_SCALE( tag ) ( (tag) & 0x3f )
-
-/** Memory map settings scope */
-static struct settings_scope memmap_settings_scope;
-
-/**
- * Check applicability of memory map setting
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @ret applies		Setting applies within this settings block
- */
-static int memmap_settings_applies ( struct settings *settings __unused,
-				     struct setting *setting ) {
-
-	return ( setting->scope == &memmap_settings_scope );
-}
-
-/**
- * Fetch value of memory map setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int memmap_settings_fetch ( struct settings *settings,
-				   struct setting *setting,
-				   void *data, size_t len ) {
-	struct memory_map memmap;
-	struct memory_region *region;
-	uint64_t result = 0;
-	unsigned int i;
-	unsigned int count;
-
-	DBGC ( settings, "MEMMAP start %d count %d %s%s%s%s scale %d\n",
-	       MEMMAP_START ( setting->tag ), MEMMAP_COUNT ( setting->tag ),
-	       ( MEMMAP_INCLUDE_START ( setting->tag ) ? "start" : "" ),
-	       ( ( MEMMAP_INCLUDE_START ( setting->tag ) &&
-		   MEMMAP_INCLUDE_LENGTH ( setting->tag ) ) ? "+" : "" ),
-	       ( MEMMAP_INCLUDE_LENGTH ( setting->tag ) ? "length" : "" ),
-	       ( MEMMAP_IGNORE_NONEXISTENT ( setting->tag ) ? " ignore" : "" ),
-	       MEMMAP_SCALE ( setting->tag ) );
-
-	/* Fetch memory map */
-	get_memmap ( &memmap );
-
-	/* Extract results from memory map */
-	count = MEMMAP_COUNT ( setting->tag );
-	for ( i = MEMMAP_START ( setting->tag ) ; count-- ; i++ ) {
-
-		/* Check that region exists */
-		if ( i >= memmap.count ) {
-			if ( MEMMAP_IGNORE_NONEXISTENT ( setting->tag ) ) {
-				continue;
-			} else {
-				DBGC ( settings, "MEMMAP region %d does not "
-				       "exist\n", i );
-				return -ENOENT;
-			}
-		}
-
-		/* Extract results from this region */
-		region = &memmap.regions[i];
-		if ( MEMMAP_INCLUDE_START ( setting->tag ) ) {
-			result += region->start;
-			DBGC ( settings, "MEMMAP %d start %08llx\n",
-			       i, region->start );
-		}
-		if ( MEMMAP_INCLUDE_LENGTH ( setting->tag ) ) {
-			result += ( region->end - region->start );
-			DBGC ( settings, "MEMMAP %d length %08llx\n",
-			       i, ( region->end - region->start ) );
-		}
-	}
-
-	/* Scale result */
-	result >>= MEMMAP_SCALE ( setting->tag );
-
-	/* Return result */
-	result = cpu_to_be64 ( result );
-	if ( len > sizeof ( result ) )
-		len = sizeof ( result );
-	memcpy ( data, &result, len );
-
-	/* Set type if not already specified */
-	if ( ! setting->type )
-		setting->type = &setting_type_hexraw;
-
-	return sizeof ( result );
-}
-
-/** Memory map settings operations */
-static struct settings_operations memmap_settings_operations = {
-	.applies = memmap_settings_applies,
-	.fetch = memmap_settings_fetch,
-};
-
-/** Memory map settings */
-static struct settings memmap_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( memmap_settings.siblings ),
-	.children = LIST_HEAD_INIT ( memmap_settings.children ),
-	.op = &memmap_settings_operations,
-	.default_scope = &memmap_settings_scope,
-};
-
-/** Initialise memory map settings */
-static void memmap_settings_init ( void ) {
-	int rc;
-
-	if ( ( rc = register_settings ( &memmap_settings, NULL,
-					"memmap" ) ) != 0 ) {
-		DBG ( "MEMMAP could not register settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** Memory map settings initialiser */
-struct init_fn memmap_settings_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = memmap_settings_init,
-};
-
-/** Memory map predefined settings */
-struct setting memmap_predefined_settings[] __setting ( SETTING_MISC ) = {
-	{
-		.name = "memsize",
-		.description = "Memory size (in MB)",
-		.tag = MEMMAP_TAG ( 0, 0x100, 0, 1, 1, 20 ),
-		.type = &setting_type_int32,
-		.scope = &memmap_settings_scope,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/menu.c ipxe-1.0.1~lliurex1505/src/core/menu.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/menu.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/menu.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,178 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Menu selection
- *
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <ipxe/list.h>
-#include <ipxe/menu.h>
-
-/** List of all menus */
-static LIST_HEAD ( menus );
-
-/**
- * Create menu
- *
- * @v name		Menu name, or NULL
- * @v title		Menu title, or NULL
- * @ret menu		Menu, or NULL on failure
- */
-struct menu * create_menu ( const char *name, const char *title ) {
-	size_t name_len;
-	size_t title_len;
-	size_t len;
-	struct menu *menu;
-	char *name_copy;
-	char *title_copy;
-
-	/* Destroy any existing menu of this name */
-	menu = find_menu ( name );
-	if ( menu )
-		destroy_menu ( menu );
-
-	/* Use empty title if none given */
-	if ( ! title )
-		title = "";
-
-	/* Allocate menu */
-	name_len = ( name ? ( strlen ( name ) + 1 /* NUL */ ) : 0 );
-	title_len = ( strlen ( title ) + 1 /* NUL */ );
-	len = ( sizeof ( *menu ) + name_len + title_len );
-	menu = zalloc ( len );
-	if ( ! menu )
-		return NULL;
-	name_copy = ( ( void * ) ( menu + 1 ) );
-	title_copy = ( name_copy + name_len );
-
-	/* Initialise menu */
-	if ( name ) {
-		strcpy ( name_copy, name );
-		menu->name = name_copy;
-	}
-	strcpy ( title_copy, title );
-	menu->title = title_copy;
-	INIT_LIST_HEAD ( &menu->items );
-
-	/* Add to list of menus */
-	list_add_tail ( &menu->list, &menus );
-
-	DBGC ( menu, "MENU %s created with title \"%s\"\n",
-	       menu->name, menu->title );
-
-	return menu;
-}
-
-/**
- * Add menu item
- *
- * @v menu		Menu
- * @v label		Label, or NULL
- * @v text		Text, or NULL
- * @v shortcut		Shortcut key
- * @v is_default	Item is the default item
- * @ret item		Menu item, or NULL on failure
- */
-struct menu_item * add_menu_item ( struct menu *menu, const char *label,
-				   const char *text, int shortcut,
-				   int is_default ) {
-	size_t label_len;
-	size_t text_len;
-	size_t len;
-	struct menu_item *item;
-	char *label_copy;
-	char *text_copy;
-
-	/* Use empty text if none given */
-	if ( ! text )
-		text = "";
-
-	/* Allocate item */
-	label_len = ( label ? ( strlen ( label ) + 1 /* NUL */ ) : 0 );
-	text_len = ( strlen ( text ) + 1 /* NUL */ );
-	len = ( sizeof ( *item ) + label_len + text_len );
-	item = zalloc ( len );
-	if ( ! item )
-		return NULL;
-	label_copy = ( ( void * ) ( item + 1 ) );
-	text_copy = ( label_copy + label_len );
-
-	/* Initialise item */
-	if ( label ) {
-		strcpy ( label_copy, label );
-		item->label = label_copy;
-	}
-	strcpy ( text_copy, text );
-	item->text = text_copy;
-	item->shortcut = shortcut;
-	item->is_default = is_default;
-
-	/* Add to list of items */
-	list_add_tail ( &item->list, &menu->items );
-
-	return item;
-}
-
-/**
- * Destroy menu
- *
- * @v menu		Menu
- */
-void destroy_menu ( struct menu *menu ) {
-	struct menu_item *item;
-	struct menu_item *tmp;
-
-	/* Remove from list of menus */
-	list_del ( &menu->list );
-
-	/* Free items */
-	list_for_each_entry_safe ( item, tmp, &menu->items, list ) {
-		list_del ( &item->list );
-		free ( item );
-	}
-
-	/* Free menu */
-	free ( menu );
-}
-
-/**
- * Find menu
- *
- * @v name		Menu name, or NULL
- * @ret menu		Menu, or NULL if not found
- */
-struct menu * find_menu ( const char *name ) {
-	struct menu *menu;
-
-	list_for_each_entry ( menu, &menus, list ) {
-		if ( ( menu->name == name ) ||
-		     ( strcmp ( menu->name, name ) == 0 ) ) {
-			return menu;
-		}
-	}
-
-	return NULL;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/misc.c ipxe-1.0.1~lliurex1505/src/core/misc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/misc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/misc.c	2012-01-06 23:49:04.000000000 +0000
@@ -33,32 +33,10 @@
 	return 0;
 }
 
-unsigned int strtoul_charval ( unsigned int charval ) {
-
-	if ( charval >= 'a' ) {
-		charval = ( charval - 'a' + 10 );
-	} else if ( charval >= 'A' ) {
-		charval = ( charval - 'A' + 10 );
-	} else if ( charval <= '9' ) {
-		charval = ( charval - '0' );
-	}
-
-	return charval;
-}
-
 unsigned long strtoul ( const char *p, char **endp, int base ) {
 	unsigned long ret = 0;
-	int negative = 0;
 	unsigned int charval;
 
-	while ( isspace ( *p ) )
-		p++;
-
-	if ( *p == '-' ) {
-		negative = 1;
-		p++;
-	}
-
 	base = strtoul_base ( &p, base );
 
 	while ( 1 ) {
@@ -69,9 +47,6 @@
 		p++;
 	}
 
-	if ( negative )
-		ret = -ret;
-
 	if ( endp )
 		*endp = ( char * ) p;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/monojob.c ipxe-1.0.1~lliurex1505/src/core/monojob.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/monojob.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/monojob.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -54,65 +53,40 @@
 /**
  * Wait for single foreground job to complete
  *
- * @v string		Job description to display, or NULL to be silent
- * @v timeout		Timeout period, in ticks (0=indefinite)
+ * @v string		Job description to display
  * @ret rc		Job final status code
  */
-int monojob_wait ( const char *string, unsigned long timeout ) {
+int monojob_wait ( const char *string ) {
 	struct job_progress progress;
-	unsigned long start;
-	unsigned long last_keycheck;
+	int key;
+	int rc;
 	unsigned long last_progress;
-	unsigned long now;
 	unsigned long elapsed;
 	unsigned long completed;
 	unsigned long total;
 	unsigned int percentage;
 	int shown_percentage = 0;
-	int ongoing_rc;
-	int key;
-	int rc;
 
-	if ( string )
-		printf ( "%s...", string );
+	printf ( "%s...", string );
 	monojob_rc = -EINPROGRESS;
-	last_keycheck = last_progress = start = currticks();
+	last_progress = currticks();
 	while ( monojob_rc == -EINPROGRESS ) {
-
-		/* Allow job to progress */
 		step();
-		now = currticks();
-
-		/* Check for keypresses.  This can be time-consuming,
-		 * so check only once per clock tick.
-		 */
-		elapsed = ( now - last_keycheck );
-		if ( elapsed ) {
-			if ( iskey() ) {
-				key = getchar();
-				if ( key == CTRL_C ) {
-					monojob_rc = -ECANCELED;
-					break;
-				}
+		if ( iskey() ) {
+			key = getchar();
+			switch ( key ) {
+			case CTRL_C:
+				monojob_close ( &monojob, -ECANCELED );
+				break;
+			default:
+				break;
 			}
-			last_keycheck = now;
 		}
-
-		/* Monitor progress */
-		ongoing_rc = job_progress ( &monojob, &progress );
-
-		/* Check for timeout, if applicable */
-		elapsed = ( now - start );
-		if ( timeout && ( elapsed >= timeout ) ) {
-			monojob_rc = ( ongoing_rc ? ongoing_rc : -ETIMEDOUT );
-			break;
-		}
-
-		/* Display progress, if applicable */
-		elapsed = ( now - last_progress );
-		if ( string && ( elapsed >= TICKS_PER_SEC ) ) {
+		elapsed = ( currticks() - last_progress );
+		if ( elapsed >= TICKS_PER_SEC ) {
 			if ( shown_percentage )
 				printf ( "\b\b\b\b    \b\b\b\b" );
+			job_progress ( &monojob, &progress );
 			/* Normalise progress figures to avoid overflow */
 			completed = ( progress.completed / 128 );
 			total = ( progress.total / 128 );
@@ -124,22 +98,18 @@
 				printf ( "." );
 				shown_percentage = 0;
 			}
-			last_progress = now;
+			last_progress = currticks();
 		}
 	}
 	rc = monojob_rc;
-	monojob_close ( &monojob, rc );
 
 	if ( shown_percentage )
 		printf ( "\b\b\b\b    \b\b\b\b" );
 
-	if ( string ) {
-		if ( rc ) {
-			printf ( " %s\n", strerror ( rc ) );
-		} else {
-			printf ( " ok\n" );
-		}
+	if ( rc ) {
+		printf ( " %s\n", strerror ( rc ) );
+	} else {
+		printf ( " ok\n" );
 	}
-
 	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_reboot.c ipxe-1.0.1~lliurex1505/src/core/null_reboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_reboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/null_reboot.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,55 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * Null reboot mechanism
- *
- */
-
-#include <stdio.h>
-#include <errno.h>
-#include <ipxe/reboot.h>
-
-/**
- * Reboot system
- *
- * @v warm		Perform a warm reboot
- */
-static void null_reboot ( int warm __unused ) {
-
-	printf ( "Cannot reboot; not implemented\n" );
-	while ( 1 ) {}
-}
-
-/**
- * Power off system
- *
- * @ret rc		Return status code
- */
-static int null_poweroff ( void ) {
-
-	return -ENOTSUP;
-}
-
-PROVIDE_REBOOT ( null, reboot, null_reboot );
-PROVIDE_REBOOT ( null, poweroff, null_poweroff );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_sanboot.c ipxe-1.0.1~lliurex1505/src/core/null_sanboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_sanboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/null_sanboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_time.c ipxe-1.0.1~lliurex1505/src/core/null_time.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/null_time.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/null_time.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,30 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Nonexistent time source
- *
- */
-
-#include <ipxe/time.h>
-
-PROVIDE_TIME_INLINE ( null, time_now );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/nvo.c ipxe-1.0.1~lliurex1505/src/core/nvo.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/nvo.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/nvo.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -192,11 +191,10 @@
  * @v setting		Setting
  * @ret applies		Setting applies within this settings block
  */
-int nvo_applies ( struct settings *settings __unused,
-		  struct setting *setting ) {
+static int nvo_applies ( struct settings *settings __unused,
+			 struct setting *setting ) {
 
-	return ( ( setting->scope == NULL ) &&
-		 dhcpopt_applies ( setting->tag ) );
+	return dhcpopt_applies ( setting->tag );
 }
 
 /**
@@ -275,8 +273,7 @@
 	nvo->len = len;
 	nvo->resize = resize;
 	dhcpopt_init ( &nvo->dhcpopts, NULL, 0, nvo_realloc_dhcpopt );
-	settings_init ( &nvo->settings, &nvo_settings_operations,
-			refcnt, NULL );
+	settings_init ( &nvo->settings, &nvo_settings_operations, refcnt, 0 );
 }
 
 /**
@@ -298,8 +295,7 @@
 		goto err_load;
 
 	/* Register settings */
-	if ( ( rc = register_settings ( &nvo->settings, parent,
-					NVO_SETTINGS_NAME ) ) != 0 )
+	if ( ( rc = register_settings ( &nvo->settings, parent, "nvo" ) ) != 0 )
 		goto err_register;
 
 	DBGC ( nvo, "NVO %p registered\n", nvo );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/open.c ipxe-1.0.1~lliurex1505/src/core/open.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/open.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/open.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/params.c ipxe-1.0.1~lliurex1505/src/core/params.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/params.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/params.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,165 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Form parameters
- *
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/params.h>
-
-/** List of all parameter lists */
-static LIST_HEAD ( parameters );
-
-/**
- * Find form parameter list by name
- *
- * @v name		Parameter list name (may be NULL)
- * @ret params		Parameter list, or NULL if not found
- */
-struct parameters * find_parameters ( const char *name ) {
-	struct parameters *params;
-
-	list_for_each_entry ( params, &parameters, list ) {
-		if ( ( params->name == name ) ||
-		     ( strcmp ( params->name, name ) == 0 ) ) {
-			return params;
-		}
-	}
-	return NULL;
-}
-
-/**
- * Create form parameter list
- *
- * @v name		Parameter list name (may be NULL)
- * @ret params		Parameter list, or NULL on failure
- */
-struct parameters * create_parameters ( const char *name ) {
-	struct parameters *params;
-	size_t name_len;
-	char *name_copy;
-
-	/* Destroy any existing parameter list of this name */
-	params = find_parameters ( name );
-	if ( params )
-		destroy_parameters ( params );
-
-	/* Allocate parameter list */
-	name_len = ( name ? ( strlen ( name ) + 1 /* NUL */ ) : 0 );
-	params = zalloc ( sizeof ( *params ) + name_len );
-	if ( ! params )
-		return NULL;
-	name_copy = ( ( void * ) ( params + 1 ) );
-
-	/* Populate parameter list */
-	if ( name ) {
-		strcpy ( name_copy, name );
-		params->name = name_copy;
-	}
-	INIT_LIST_HEAD ( &params->entries );
-
-	/* Add to list of parameter lists */
-	list_add_tail ( &params->list, &parameters );
-
-	DBGC ( params, "PARAMS \"%s\" created\n", params->name );
-	return params;
-}
-
-/**
- * Add form parameter
- *
- * @v params		Parameter list
- * @v key		Parameter key
- * @v value		Parameter value
- * @ret param		Parameter, or NULL on failure
- */
-struct parameter * add_parameter ( struct parameters *params,
-				   const char *key, const char *value ) {
-	struct parameter *param;
-	size_t key_len;
-	size_t value_len;
-	char *key_copy;
-	char *value_copy;
-
-	/* Allocate parameter */
-	key_len = ( strlen ( key ) + 1 /* NUL */ );
-	value_len = ( strlen ( value ) + 1 /* NUL */ );
-	param = zalloc ( sizeof ( *param ) + key_len + value_len );
-	if ( ! param )
-		return NULL;
-	key_copy = ( ( void * ) ( param + 1 ) );
-	value_copy = ( key_copy + key_len );
-
-	/* Populate parameter */
-	strcpy ( key_copy, key );
-	param->key = key_copy;
-	strcpy ( value_copy, value );
-	param->value = value_copy;
-
-	/* Add to list of parameters */
-	list_add_tail ( &param->list, &params->entries );
-
-	DBGC ( params, "PARAMS \"%s\" added \"%s\"=\"%s\"\n",
-	       params->name, param->key, param->value );
-	return param;
-}
-
-/**
- * Destroy form parameter list
- *
- * @v params		Parameter list
- */
-void destroy_parameters ( struct parameters *params ) {
-	struct parameter *param;
-	struct parameter *tmp;
-
-	DBGC ( params, "PARAMS \"%s\" destroyed\n", params->name );
-
-	/* Free all parameters */
-	list_for_each_entry_safe ( param, tmp, &params->entries, list ) {
-		list_del ( &param->list );
-		free ( param );
-	}
-
-	/* Free parameter list */
-	list_del ( &params->list );
-	free ( params );
-}
-
-/**
- * Claim ownership of form parameter list
- *
- * @v params		Parameter list
- */
-void claim_parameters ( struct parameters *params ) {
-
-	DBGC ( params, "PARAMS \"%s\" claimed\n", params->name );
-
-	/* Remove from list of parameter lists */
-	list_del ( &params->list );
-
-	/* Reinitialise list to allow for subsequent destroy_parameters() */
-	INIT_LIST_HEAD ( &params->list );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/parseopt.c ipxe-1.0.1~lliurex1505/src/core/parseopt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/parseopt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/parseopt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -27,10 +26,7 @@
 #include <errno.h>
 #include <getopt.h>
 #include <ipxe/netdevice.h>
-#include <ipxe/menu.h>
-#include <ipxe/settings.h>
-#include <ipxe/params.h>
-#include <ipxe/timer.h>
+#include <ipxe/image.h>
 #include <ipxe/parseopt.h>
 
 /** @file
@@ -62,7 +58,7 @@
  * @ret value		String value
  * @ret rc		Return status code
  */
-int parse_string ( char *text, char **value ) {
+int parse_string ( const char *text, const char **value ) {
 
 	/* Sanity check */
 	assert ( text != NULL );
@@ -80,7 +76,7 @@
  * @ret value		Integer value
  * @ret rc		Return status code
  */
-int parse_integer ( char *text, unsigned int *value ) {
+int parse_integer ( const char *text, unsigned int *value ) {
 	char *endp;
 
 	/* Sanity check */
@@ -97,34 +93,13 @@
 }
 
 /**
- * Parse timeout value (in ms)
- *
- * @v text		Text
- * @ret value		Integer value
- * @ret rc		Return status code
- */
-int parse_timeout ( char *text, unsigned long *value ) {
-	unsigned int value_ms;
-	int rc;
-
-	/* Parse raw integer value */
-	if ( ( rc = parse_integer ( text, &value_ms ) ) != 0 )
-		return rc;
-
-	/* Convert to a number of timer ticks */
-	*value = ( ( value_ms * TICKS_PER_SEC ) / 1000 );
-
-	return 0;
-}
-
-/**
  * Parse network device name
  *
  * @v text		Text
  * @ret netdev		Network device
  * @ret rc		Return status code
  */
-int parse_netdev ( char *text, struct net_device **netdev ) {
+int parse_netdev ( const char *text, struct net_device **netdev ) {
 
 	/* Sanity check */
 	assert ( text != NULL );
@@ -140,45 +115,21 @@
 }
 
 /**
- * Parse network device configurator name
+ * Parse image name
  *
  * @v text		Text
- * @ret configurator	Network device configurator
+ * @ret image		Image
  * @ret rc		Return status code
  */
-int parse_netdev_configurator ( char *text,
-				struct net_device_configurator **configurator ){
+int parse_image ( const char *text, struct image **image ) {
 
 	/* Sanity check */
 	assert ( text != NULL );
 
-	/* Find network device configurator */
-	*configurator = find_netdev_configurator ( text );
-	if ( ! *configurator ) {
-		printf ( "\"%s\": no such configurator\n", text );
-		return -ENOTSUP;
-	}
-
-	return 0;
-}
-
-/**
- * Parse menu name
- *
- * @v text		Text
- * @ret menu		Menu
- * @ret rc		Return status code
- */
-int parse_menu ( char *text, struct menu **menu ) {
-
-	/* Find menu */
-	*menu = find_menu ( text );
-	if ( ! *menu ) {
-		if ( text ) {
-			printf ( "\"%s\": no such menu\n", text );
-		} else {
-			printf ( "No default menu\n" );
-		}
+	/* Find network device */
+	*image = find_image ( text );
+	if ( ! *image ) {
+		printf ( "\"%s\": no such image\n", text );
 		return -ENOENT;
 	}
 
@@ -192,7 +143,7 @@
  * @ret flag		Flag to set
  * @ret rc		Return status code
  */
-int parse_flag ( char *text __unused, int *flag ) {
+int parse_flag ( const char *text __unused, int *flag ) {
 
 	/* Set flag */
 	*flag = 1;
@@ -201,150 +152,14 @@
 }
 
 /**
- * Parse key
- *
- * @v text		Text
- * @ret key		Key
- * @ret rc		Return status code
- */
-int parse_key ( char *text, unsigned int *key ) {
-
-	/* Interpret single characters as being a literal key character */
-	if ( text[0] && ! text[1] ) {
-		*key = text[0];
-		return 0;
-	}
-
-	/* Otherwise, interpret as an integer */
-	return parse_integer ( text, key );
-}
-
-/**
- * Parse settings block name
- *
- * @v text		Text
- * @ret value		Integer value
- * @ret rc		Return status code
- */
-int parse_settings ( char *text, struct settings **value ) {
-
-	/* Sanity check */
-	assert ( text != NULL );
-
-	/* Parse scope name */
-	*value = find_settings ( text );
-	if ( ! *value ) {
-		printf ( "\"%s\": no such scope\n", text );
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-/**
- * Parse setting name
- *
- * @v text		Text
- * @v setting		Named setting to fill in
- * @v get_child		Function to find or create child settings block
- * @ret rc		Return status code
- *
- * Note that this function modifies the original @c text.
- */
-int parse_setting ( char *text, struct named_setting *setting,
-		    get_child_settings_t get_child ) {
-	int rc;
-
-	/* Sanity check */
-	assert ( text != NULL );
-
-	/* Parse setting name */
-	if ( ( rc = parse_setting_name ( text, get_child, &setting->settings,
-					 &setting->setting ) ) != 0 ) {
-		printf ( "\"%s\": invalid setting\n", text );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Parse existing setting name
- *
- * @v text		Text
- * @v setting		Named setting to fill in
- * @ret rc		Return status code
- *
- * Note that this function modifies the original @c text.
- */
-int parse_existing_setting ( char *text, struct named_setting *setting ) {
-
-	return parse_setting ( text, setting, find_child_settings );
-}
-
-/**
- * Parse and autovivify setting name
- *
- * @v text		Text
- * @v setting		Named setting to fill in
- * @ret rc		Return status code
- *
- * Note that this function modifies the original @c text.
- */
-int parse_autovivified_setting ( char *text, struct named_setting *setting ) {
-
-	return parse_setting ( text, setting, autovivify_child_settings );
-}
-
-/**
- * Parse form parameter list name
- *
- * @v text		Text
- * @ret params		Parameter list
- * @ret rc		Return status code
- */
-int parse_parameters ( char *text, struct parameters **params ) {
-
-	/* Find parameter list */
-	*params = find_parameters ( text );
-	if ( ! *params ) {
-		if ( text ) {
-			printf ( "\"%s\": no such parameter list\n", text );
-		} else {
-			printf ( "No default parameter list\n" );
-		}
-		return -ENOENT;
-	}
-
-	return 0;
-}
-
-/**
  * Print command usage message
  *
  * @v cmd		Command descriptor
  * @v argv		Argument list
  */
 void print_usage ( struct command_descriptor *cmd, char **argv ) {
-	struct option_descriptor *option;
-	unsigned int i;
-	int is_optional;
-
-	printf ( "Usage:\n\n  %s", argv[0] );
-	for ( i = 0 ; i < cmd->num_options ; i++ ) {
-		option = &cmd->options[i];
-		printf ( " [-%c|--%s", option->shortopt, option->longopt );
-		if ( option->has_arg ) {
-			is_optional = ( option->has_arg == optional_argument );
-			printf ( " %s<%s>%s", ( is_optional ? "[" : "" ),
-				 option->longopt, ( is_optional ? "]" : "" ) );
-		}
-		printf ( "]" );
-	}
-	if ( cmd->usage )
-		printf ( " %s", cmd->usage );
-	printf ( "\n\nSee http://ipxe.org/cmd/%s for further information\n",
-		 argv[0] );
+	printf ( "Usage:\n\n  %s %s\n\nSee http://ipxe.org/cmd/%s for further "
+		 "information\n", argv[0], cmd->usage, argv[0] );
 }
 
 /**
@@ -362,7 +177,7 @@
 	char shortopts[ cmd->num_options * 3 /* possible "::" */ + 1 /* "h" */
 			+ 1 /* NUL */ ];
 	unsigned int shortopt_idx = 0;
-	int ( * parse ) ( char *text, void *value );
+	int ( * parse ) ( const char *text, void *value );
 	void *value;
 	unsigned int i;
 	unsigned int j;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/pcmcia.c ipxe-1.0.1~lliurex1505/src/core/pcmcia.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/pcmcia.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/pcmcia.c	2012-01-06 23:49:04.000000000 +0000
@@ -34,6 +34,7 @@
 #define CODE_STATUS "alpha"
 #define	CODE_VERSION "0.1.3"
 #include <pcmcia-opts.h>
+#include <ipxe/console.h>
 #include <ipxe/init.h>
 
 int	sockets; /* AHTODO: Phase this out! */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/pending.c ipxe-1.0.1~lliurex1505/src/core/pending.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/pending.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/pending.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,62 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <errno.h>
-#include <ipxe/process.h>
-#include <ipxe/timer.h>
-#include <ipxe/pending.h>
-
-/** @file
- *
- * Pending operations
- *
- */
-
-/** Total count of pending operations */
-int pending_total;
-
-/**
- * Mark an operation as pending
- *
- * @v pending		Pending operation
- */
-void pending_get ( struct pending_operation *pending ) {
-
-	pending->count++;
-	pending_total++;
-	DBGC ( pending, "PENDING %p incremented to %d (total %d)\n",
-	       pending, pending->count, pending_total );
-}
-
-/**
- * Mark an operation as no longer pending
- *
- * @v pending		Pending operation
- */
-void pending_put ( struct pending_operation *pending ) {
-
-	if ( pending->count ) {
-		pending_total--;
-		pending->count--;
-		DBGC ( pending, "PENDING %p decremented to %d (total %d)\n",
-		       pending, pending->count, pending_total );
-	}
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/pinger.c ipxe-1.0.1~lliurex1505/src/core/pinger.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/pinger.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/pinger.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,303 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/interface.h>
-#include <ipxe/job.h>
-#include <ipxe/xfer.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/open.h>
-#include <ipxe/socket.h>
-#include <ipxe/retry.h>
-#include <ipxe/pinger.h>
-
-/** @file
- *
- * ICMP ping sender
- *
- */
-
-/* Disambiguate the various error causes */
-#define EPROTO_LEN __einfo_error ( EINFO_EPROTO_LEN )
-#define EINFO_EPROTO_LEN __einfo_uniqify ( EINFO_EPROTO, 0x01, \
-					   "Incorrect reply length" )
-#define EPROTO_DATA __einfo_error ( EINFO_EPROTO_DATA )
-#define EINFO_EPROTO_DATA __einfo_uniqify ( EINFO_EPROTO, 0x02, \
-					    "Incorrect reply data" )
-#define EPROTO_SEQ __einfo_error ( EINFO_EPROTO_SEQ )
-#define EINFO_EPROTO_SEQ __einfo_uniqify ( EINFO_EPROTO, 0x03, \
-					   "Delayed or out-of-sequence reply" )
-
-/** A pinger */
-struct pinger {
-	/** Reference count */
-	struct refcnt refcnt;
-
-	/** Job control interface */
-	struct interface job;
-	/** Data transfer interface */
-	struct interface xfer;
-
-	/** Timer */
-	struct retry_timer timer;
-	/** Timeout */
-	unsigned long timeout;
-
-	/** Payload length */
-	size_t len;
-	/** Current sequence number */
-	uint16_t sequence;
-
-	/** Callback function
-	 *
-	 * @v src		Source socket address
-	 * @v sequence		Sequence number
-	 * @v len		Payload length
-	 * @v rc		Status code
-	 */
-	void ( * callback ) ( struct sockaddr *src, unsigned int sequence,
-			      size_t len, int rc );
-};
-
-/**
- * Generate payload
- *
- * @v pinger		Pinger
- * @v data		Data buffer
- */
-static void pinger_generate ( struct pinger *pinger, void *data ) {
-	uint8_t *bytes = data;
-	unsigned int i;
-
-	/* Generate byte sequence */
-	for ( i = 0 ; i < pinger->len ; i++ )
-		bytes[i] = ( i & 0xff );
-}
-
-/**
- * Verify payload
- *
- * @v pinger		Pinger
- * @v data		Data buffer
- * @ret rc		Return status code
- */
-static int pinger_verify ( struct pinger *pinger, const void *data ) {
-	const uint8_t *bytes = data;
-	unsigned int i;
-
-	/* Check byte sequence */
-	for ( i = 0 ; i < pinger->len ; i++ ) {
-		if ( bytes[i] != ( i & 0xff ) )
-			return -EPROTO_DATA;
-	}
-
-	return 0;
-}
-
-/**
- * Close pinger
- *
- * @v pinger		Pinger
- * @v rc		Reason for close
- */
-static void pinger_close ( struct pinger *pinger, int rc ) {
-
-	/* Stop timer */
-	stop_timer ( &pinger->timer );
-
-	/* Shut down interfaces */
-	intf_shutdown ( &pinger->xfer, rc );
-	intf_shutdown ( &pinger->job, rc );
-}
-
-/**
- * Handle data transfer window change
- *
- * @v pinger		Pinger
- */
-static void pinger_window_changed ( struct pinger *pinger ) {
-
-	/* Do nothing if timer is already running */
-	if ( timer_running ( &pinger->timer ) )
-		return;
-
-	/* Start timer when window opens for the first time */
-	if ( xfer_window ( &pinger->xfer ) )
-		start_timer_nodelay ( &pinger->timer );
-}
-
-/**
- * Handle timer expiry
- *
- * @v timer		Timer
- * @v over		Failure indicator
- */
-static void pinger_expired ( struct retry_timer *timer, int over __unused ) {
-	struct pinger *pinger = container_of ( timer, struct pinger, timer );
-	struct xfer_metadata meta;
-	struct io_buffer *iobuf;
-	int rc;
-
-	/* Increase sequence number */
-	pinger->sequence++;
-
-	/* Restart timer.  Do this before attempting to transmit, in
-	 * case the transmission attempt fails.
-	 */
-	start_timer_fixed ( &pinger->timer, pinger->timeout );
-
-	/* Allocate I/O buffer */
-	iobuf = xfer_alloc_iob ( &pinger->xfer, pinger->len );
-	if ( ! iobuf ) {
-		DBGC ( pinger, "PINGER %p could not allocate I/O buffer\n",
-		       pinger );
-		return;
-	}
-
-	/* Generate payload */
-	pinger_generate ( pinger, iob_put ( iobuf, pinger->len ) );
-
-	/* Generate metadata */
-	memset ( &meta, 0, sizeof ( meta ) );
-	meta.flags = XFER_FL_ABS_OFFSET;
-	meta.offset = pinger->sequence;
-
-	/* Transmit packet */
-	if ( ( rc = xfer_deliver ( &pinger->xfer, iobuf, &meta ) ) != 0 ) {
-		DBGC ( pinger, "PINGER %p could not transmit: %s\n",
-		       pinger, strerror ( rc ) );
-		return;
-	}
-}
-
-/**
- * Handle received data
- *
- * @v pinger		Pinger
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-static int pinger_deliver ( struct pinger *pinger, struct io_buffer *iobuf,
-			    struct xfer_metadata *meta ) {
-	size_t len = iob_len ( iobuf );
-	uint16_t sequence = meta->offset;
-	int rc;
-
-	/* Check for errors */
-	if ( len != pinger->len ) {
-		DBGC ( pinger, "PINGER %p received incorrect length %zd "
-		       "(expected %zd)\n", pinger, len, pinger->len );
-		rc = -EPROTO_LEN;
-	} else if ( ( rc = pinger_verify ( pinger, iobuf->data ) ) != 0 ) {
-		DBGC ( pinger, "PINGER %p received incorrect data:\n", pinger );
-		DBGC_HDA ( pinger, 0, iobuf->data, iob_len ( iobuf ) );
-	} else if ( sequence != pinger->sequence ) {
-		DBGC ( pinger, "PINGER %p received sequence %d (expected %d)\n",
-		       pinger, sequence, pinger->sequence );
-		rc = -EPROTO_SEQ;
-	} else {
-		rc = 0;
-	}
-
-	/* Discard I/O buffer */
-	free_iob ( iobuf );
-
-	/* Notify callback function */
-	pinger->callback ( meta->src, sequence, len, rc );
-
-	return rc;
-}
-
-/** Pinger data transfer interface operations */
-static struct interface_operation pinger_xfer_op[] = {
-	INTF_OP ( xfer_deliver, struct pinger *, pinger_deliver ),
-	INTF_OP ( xfer_window_changed, struct pinger *, pinger_window_changed ),
-	INTF_OP ( intf_close, struct pinger *, pinger_close ),
-};
-
-/** Pinger data transfer interface descriptor */
-static struct interface_descriptor pinger_xfer_desc =
-	INTF_DESC ( struct pinger, xfer, pinger_xfer_op );
-
-/** Pinger job control interface operations */
-static struct interface_operation pinger_job_op[] = {
-	INTF_OP ( intf_close, struct pinger *, pinger_close ),
-};
-
-/** Pinger job control interface descriptor */
-static struct interface_descriptor pinger_job_desc =
-	INTF_DESC ( struct pinger, job, pinger_job_op );
-
-/**
- * Create pinger
- *
- * @v job		Job control interface
- * @v hostname		Hostname to ping
- * @v timeout		Timeout (in ticks)
- * @v len		Payload length
- * @ret rc		Return status code
- */
-int create_pinger ( struct interface *job, const char *hostname,
-		    unsigned long timeout, size_t len,
-		    void ( * callback ) ( struct sockaddr *src,
-					  unsigned int sequence, size_t len,
-					  int rc ) ) {
-	struct pinger *pinger;
-	int rc;
-
-	/* Sanity check */
-	if ( ! timeout )
-		return -EINVAL;
-
-	/* Allocate and initialise structure */
-	pinger = zalloc ( sizeof ( *pinger ) );
-	if ( ! pinger )
-		return -ENOMEM;
-	ref_init ( &pinger->refcnt, NULL );
-	intf_init ( &pinger->job, &pinger_job_desc, &pinger->refcnt );
-	intf_init ( &pinger->xfer, &pinger_xfer_desc, &pinger->refcnt );
-	timer_init ( &pinger->timer, pinger_expired, &pinger->refcnt );
-	pinger->timeout = timeout;
-	pinger->len = len;
-	pinger->callback = callback;
-
-	/* Open socket */
-	if ( ( rc = xfer_open_named_socket ( &pinger->xfer, SOCK_ECHO, NULL,
-					     hostname, NULL ) ) != 0 ) {
-		DBGC ( pinger, "PINGER %p could not open socket: %s\n",
-		       pinger, strerror ( rc ) );
-		goto err;
-	}
-
-	/* Attach parent interface, mortalise self, and return */
-	intf_plug_plug ( &pinger->job, job );
-	ref_put ( &pinger->refcnt );
-	return 0;
-
- err:
-	pinger_close ( pinger, rc );
-	ref_put ( &pinger->refcnt );
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/posix_io.c ipxe-1.0.1~lliurex1505/src/core/posix_io.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/posix_io.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/posix_io.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/process.c ipxe-1.0.1~lliurex1505/src/core/process.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/process.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/process.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/refcnt.c ipxe-1.0.1~lliurex1505/src/core/refcnt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/refcnt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/refcnt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/resolv.c ipxe-1.0.1~lliurex1505/src/core/resolv.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/resolv.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/resolv.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -23,10 +22,10 @@
 #include <stdlib.h>
 #include <string.h>
 #include <errno.h>
+#include <ipxe/in.h>
 #include <ipxe/xfer.h>
 #include <ipxe/open.h>
 #include <ipxe/process.h>
-#include <ipxe/socket.h>
 #include <ipxe/resolv.h>
 
 /** @file
@@ -100,6 +99,7 @@
 static int numeric_resolv ( struct interface *resolv,
 			    const char *name, struct sockaddr *sa ) {
 	struct numeric_resolv *numeric;
+	struct sockaddr_in *sin;
 
 	/* Allocate and initialise structure */
 	numeric = zalloc ( sizeof ( *numeric ) );
@@ -111,8 +111,16 @@
 		       &numeric->refcnt );
 	memcpy ( &numeric->sa, sa, sizeof ( numeric->sa ) );
 
+	DBGC ( numeric, "NUMERIC %p attempting to resolve \"%s\"\n",
+	       numeric, name );
+
 	/* Attempt to resolve name */
-	numeric->rc = sock_aton ( name, &numeric->sa );
+	sin = ( ( struct sockaddr_in * ) &numeric->sa );
+	if ( inet_aton ( name, &sin->sin_addr ) != 0 ) {
+		sin->sin_family = AF_INET;
+	} else {
+		numeric->rc = -EINVAL;
+	}
 
 	/* Attach to parent interface, mortalise self, and return */
 	intf_plug_plug ( &numeric->resolv, resolv );
@@ -184,8 +192,8 @@
 static void resmux_child_resolv_done ( struct resolv_mux *mux,
 				       struct sockaddr *sa ) {
 
-	DBGC ( mux, "RESOLV %p resolved \"%s\" to %s using method %s\n",
-	       mux, mux->name, sock_ntoa ( sa ), mux->resolver->name );
+	DBGC ( mux, "RESOLV %p resolved \"%s\" using method %s\n",
+	       mux, mux->name, mux->resolver->name );
 
 	/* Pass resolution to parent */
 	resolv_done ( &mux->parent, sa );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/serial.c ipxe-1.0.1~lliurex1505/src/core/serial.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/serial.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/serial.c	2012-01-06 23:49:04.000000000 +0000
@@ -93,9 +93,6 @@
 #define uart_writeb(val,addr) outb((val),(addr))
 #endif
 
-/* Boolean for the state of serial driver initialization */
-int serial_initialized = 0;
-
 /*
  * void serial_putc(int ch);
  *	Write character `ch' to port UART_BASE.
@@ -210,6 +207,7 @@
 	/* Set clear to send, so flow control works... */
 	uart_writeb((1<<1), UART_BASE + UART_MCR);
 
+
 	/* Flush the input buffer. */
 	do {
 		/* rx buffer reg
@@ -219,9 +217,6 @@
 		/* line status reg */
 		status = uart_readb(UART_BASE + UART_LSR);
 	} while(status & UART_LSR_DR);
-
-	/* Note that serial support has been initialized */
-	serial_initialized = 1;
  out:
 	return;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/serial_console.c ipxe-1.0.1~lliurex1505/src/core/serial_console.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/serial_console.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/serial_console.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,6 @@
 #include <ipxe/init.h>
 #include <ipxe/serial.h>
 #include <ipxe/console.h>
-#include <config/console.h>
 
 /** @file
  *
@@ -9,21 +8,12 @@
  *
  */
 
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_SERIAL ) && CONSOLE_EXPLICIT ( CONSOLE_SERIAL ) )
-#undef CONSOLE_SERIAL
-#define CONSOLE_SERIAL ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_LOG )
-#endif
-
 struct console_driver serial_console __console_driver;
 
 static void serial_console_init ( void ) {
-	/*
-	 * Check if serial driver initialization is done.
-	 * If so, it's time to enable the serial console.
-	 */
-	if ( serial_initialized )
-		serial_console.disabled = 0;
+	/* Serial driver initialization should already be done,
+	 * time to enable the serial console. */
+	serial_console.disabled = 0;
 }
 
 struct console_driver serial_console __console_driver = {
@@ -31,7 +21,6 @@
 	.getchar = serial_getc,
 	.iskey = serial_ischar,
 	.disabled = 1,
-	.usage = CONSOLE_SERIAL,
 };
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/settings.c ipxe-1.0.1~lliurex1505/src/core/settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/settings.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -32,10 +31,6 @@
 #include <ipxe/dhcp.h>
 #include <ipxe/uuid.h>
 #include <ipxe/uri.h>
-#include <ipxe/base16.h>
-#include <ipxe/pci.h>
-#include <ipxe/init.h>
-#include <ipxe/version.h>
 #include <ipxe/settings.h>
 
 /** @file
@@ -183,11 +178,6 @@
 	if ( len > generic->data_len )
 		len = generic->data_len;
 	memcpy ( data, generic_setting_data ( generic ), len );
-
-	/* Set setting type, if not yet specified */
-	if ( ! setting->type )
-		setting->type = generic->setting.type;
-
 	return generic->data_len;
 }
 
@@ -262,19 +252,16 @@
 }
 
 /**
- * Find child settings block
+ * Find child named settings block
  *
  * @v parent		Parent settings block
  * @v name		Name within this parent
  * @ret settings	Settings block, or NULL
  */
-struct settings * find_child_settings ( struct settings *parent,
-					const char *name ) {
+static struct settings * find_child_settings ( struct settings *parent,
+					       const char *name ) {
 	struct settings *settings;
 
-	/* Find target parent settings block */
-	parent = settings_target ( parent );
-
 	/* Treat empty name as meaning "this block" */
 	if ( ! *name )
 		return parent;
@@ -282,30 +269,27 @@
 	/* Look for child with matching name */
 	list_for_each_entry ( settings, &parent->children, siblings ) {
 		if ( strcmp ( settings->name, name ) == 0 )
-			return settings_target ( settings );
+			return settings;
 	}
 
 	return NULL;
 }
 
 /**
- * Find or create child settings block
+ * Find or create child named settings block
  *
  * @v parent		Parent settings block
  * @v name		Name within this parent
  * @ret settings	Settings block, or NULL
  */
-struct settings * autovivify_child_settings ( struct settings *parent,
-					      const char *name ) {
+static struct settings * autovivify_child_settings ( struct settings *parent,
+						     const char *name ) {
 	struct {
 		struct autovivified_settings autovivified;
 		char name[ strlen ( name ) + 1 /* NUL */ ];
 	} *new_child;
 	struct settings *settings;
 
-	/* Find target parent settings block */
-	parent = settings_target ( parent );
-
 	/* Return existing settings, if existent */
 	if ( ( settings = find_child_settings ( parent, name ) ) != NULL )
 		return settings;
@@ -337,10 +321,6 @@
 	static char buf[16];
 	char tmp[ sizeof ( buf ) ];
 
-	/* Find target settings block */
-	settings = settings_target ( settings );
-
-	/* Construct name */
 	for ( buf[2] = buf[0] = 0 ; settings ; settings = settings->parent ) {
 		memcpy ( tmp, buf, sizeof ( tmp ) );
 		snprintf ( buf, sizeof ( buf ), ".%s%s", settings->name, tmp );
@@ -356,7 +336,9 @@
  * @ret settings	Settings block, or NULL
  */
 static struct settings *
-parse_settings_name ( const char *name, get_child_settings_t get_child ) {
+parse_settings_name ( const char *name,
+		      struct settings * ( * get_child ) ( struct settings *,
+							  const char * ) ) {
 	struct settings *settings = &settings_root;
 	char name_copy[ strlen ( name ) + 1 ];
 	char *subname;
@@ -368,11 +350,20 @@
 
 	/* Parse each name component in turn */
 	while ( remainder ) {
+		struct net_device *netdev;
+
 		subname = remainder;
 		remainder = strchr ( subname, '.' );
 		if ( remainder )
 			*(remainder++) = '\0';
-		settings = get_child ( settings, subname );
+
+		/* Special case "netX" root settings block */
+		if ( ( subname == name_copy ) && ! strcmp ( subname, "netX" ) &&
+		     ( ( netdev = last_opened_netdev() ) != NULL ) )
+			settings = get_child ( settings, netdev->name );
+		else
+			settings = get_child ( settings, subname );
+
 		if ( ! settings )
 			break;
 	}
@@ -381,7 +372,7 @@
 }
 
 /**
- * Find settings block
+ * Find named settings block
  *
  * @v name		Name
  * @ret settings	Settings block, or NULL
@@ -460,11 +451,10 @@
 			const char *name ) {
 	struct settings *old_settings;
 
-	/* Sanity check */
+	/* NULL parent => add to settings root */
 	assert ( settings != NULL );
-
-	/* Find target parent settings block */
-	parent = settings_target ( parent );
+	if ( parent == NULL )
+		parent = &settings_root;
 
 	/* Apply settings block name */
 	settings->name = name;
@@ -525,26 +515,6 @@
  */
 
 /**
- * Redirect to target settings block
- *
- * @v settings		Settings block, or NULL
- * @ret settings	Underlying settings block
- */
-struct settings * settings_target ( struct settings *settings ) {
-
-	/* NULL settings implies the global settings root */
-	if ( ! settings )
-		settings = &settings_root;
-
-	/* Redirect to underlying settings block, if applicable */
-	if ( settings->op->redirect )
-		return settings->op->redirect ( settings );
-
-	/* Otherwise, return this settings block */
-	return settings;
-}
-
-/**
  * Check applicability of setting
  *
  * @v settings		Settings block
@@ -553,10 +523,6 @@
  */
 int setting_applies ( struct settings *settings, struct setting *setting ) {
 
-	/* Find target settings block */
-	settings = settings_target ( settings );
-
-	/* Check applicability of setting */
 	return ( settings->op->applies ?
 		 settings->op->applies ( settings, setting ) : 1 );
 }
@@ -574,8 +540,9 @@
 		    const void *data, size_t len ) {
 	int rc;
 
-	/* Find target settings block */
-	settings = settings_target ( settings );
+	/* NULL settings implies storing into the global settings root */
+	if ( ! settings )
+		settings = &settings_root;
 
 	/* Fail if tag does not apply to this settings block */
 	if ( ! setting_applies ( settings, setting ) )
@@ -633,8 +600,9 @@
 	if ( origin )
 		*origin = NULL;
 
-	/* Find target settings block */
-	settings = settings_target ( settings );
+	/* NULL settings implies starting at the global settings root */
+	if ( ! settings )
+		settings = &settings_root;
 
 	/* Sanity check */
 	if ( ! settings->op->fetch )
@@ -644,12 +612,8 @@
 	if ( setting_applies ( settings, setting ) &&
 	     ( ( ret = settings->op->fetch ( settings, setting,
 					     data, len ) ) >= 0 ) ) {
-		/* Record origin, if applicable */
 		if ( origin )
 			*origin = settings;
-		/* Default to string setting type, if not yet specified */
-		if ( ! setting->type )
-			setting->type = &setting_type_string;
 		return ret;
 	}
 
@@ -713,41 +677,6 @@
 }
 
 /**
- * Fetch copy of setting
- *
- * @v settings		Settings block, or NULL to search all blocks
- * @v setting		Setting to fetch
- * @v data		Buffer to allocate and fill with setting data
- * @ret len		Length of setting, or negative error
- *
- * The caller is responsible for eventually freeing the allocated
- * buffer.
- */
-int fetch_setting_copy ( struct settings *settings, struct setting *setting,
-			 void **data ) {
-	int len;
-	int check_len;
-
-	/* Avoid returning uninitialised data on error */
-	*data = NULL;
-
-	/* Check existence, and fetch setting length */
-	len = fetch_setting_len ( settings, setting );
-	if ( len < 0 )
-		return len;
-
-	/* Allocate buffer */
-	*data = malloc ( len );
-	if ( ! *data )
-		return -ENOMEM;
-
-	/* Fetch setting */
-	check_len = fetch_setting ( settings, setting, *data, len );
-	assert ( check_len == len );
-	return len;
-}
-
-/**
  * Fetch value of string setting
  *
  * @v settings		Settings block, or NULL to search all blocks
@@ -848,75 +777,39 @@
 }
 
 /**
- * Extract numeric value of setting
- *
- * @v is_signed		Treat value as a signed integer
- * @v raw		Raw setting data
- * @v len		Length of raw setting data
- * @ret value		Numeric value
- * @ret len		Length of setting, or negative error
- */
-static int numeric_setting_value ( int is_signed, const void *raw, size_t len,
-				   unsigned long *value ) {
-	const uint8_t *unsigned_bytes = raw;
-	const int8_t *signed_bytes = raw;
-	int is_negative;
-	unsigned int i;
-	uint8_t pad;
-	uint8_t byte;
-
-	/* Convert to host-ordered longs */
-	is_negative = ( len && ( signed_bytes[0] < 0 ) );
-	*value = ( ( is_signed && is_negative ) ? -1L : 0 );
-	pad = *value;
-	for ( i = 0 ; i < len ; i++ ) {
-		byte = unsigned_bytes[i];
-		*value = ( ( *value << 8 ) | byte );
-		if ( ( ( i + sizeof ( *value ) ) < len ) && ( byte != pad ) )
-			return -ERANGE;
-	}
-
-	return len;
-}
-
-/**
- * Fetch value of numeric setting
+ * Fetch value of signed integer setting
  *
  * @v settings		Settings block, or NULL to search all blocks
  * @v setting		Setting to fetch
  * @v value		Integer value to fill in
  * @ret len		Length of setting, or negative error
  */
-int fetch_numeric_setting ( struct settings *settings, struct setting *setting,
-			    unsigned long *value, int is_signed ) {
-	unsigned long tmp;
+int fetch_int_setting ( struct settings *settings, struct setting *setting,
+			long *value ) {
+	union {
+		uint8_t u8[ sizeof ( long ) ];
+		int8_t s8[ sizeof ( long ) ];
+	} buf;
 	int len;
+	int i;
 
 	/* Avoid returning uninitialised data on error */
 	*value = 0;
 
 	/* Fetch raw (network-ordered, variable-length) setting */
-	len = fetch_setting ( settings, setting, &tmp, sizeof ( tmp ) );
+	len = fetch_setting ( settings, setting, &buf, sizeof ( buf ) );
 	if ( len < 0 )
 		return len;
+	if ( len > ( int ) sizeof ( buf ) )
+		return -ERANGE;
 
-	/* Extract numeric value */
-	return numeric_setting_value ( is_signed, &tmp, len, value );
-}
-
-/**
- * Fetch value of signed integer setting
- *
- * @v settings		Settings block, or NULL to search all blocks
- * @v setting		Setting to fetch
- * @v value		Integer value to fill in
- * @ret len		Length of setting, or negative error
- */
-int fetch_int_setting ( struct settings *settings, struct setting *setting,
-			long *value ) {
+	/* Convert to host-ordered signed long */
+	*value = ( ( buf.s8[0] >= 0 ) ? 0 : -1L );
+	for ( i = 0 ; i < len ; i++ ) {
+		*value = ( ( *value << 8 ) | buf.u8[i] );
+	}
 
-	return fetch_numeric_setting ( settings, setting,
-				       ( ( unsigned long * ) value ), 1 );
+	return len;
 }
 
 /**
@@ -929,8 +822,22 @@
  */
 int fetch_uint_setting ( struct settings *settings, struct setting *setting,
 			 unsigned long *value ) {
+	long svalue;
+	int len;
+
+	/* Avoid returning uninitialised data on error */
+	*value = 0;
+
+	/* Fetch as a signed long */
+	len = fetch_int_setting ( settings, setting, &svalue );
+	if ( len < 0 )
+		return len;
 
-	return fetch_numeric_setting ( settings, setting, value, 0 );
+	/* Mask off sign-extended bits */
+	assert ( len <= ( int ) sizeof ( long ) );
+	*value = ( svalue & ( -1UL >> ( 8 * ( sizeof ( long ) - len ) ) ) );
+
+	return len;
 }
 
 /**
@@ -941,9 +848,9 @@
  * @ret value		Setting value, or zero
  */
 long fetch_intz_setting ( struct settings *settings, struct setting *setting ){
-	unsigned long value;
+	long value;
 
-	fetch_numeric_setting ( settings, setting, &value, 1 );
+	fetch_int_setting ( settings, setting, &value );
 	return value;
 }
 
@@ -958,7 +865,7 @@
 				    struct setting *setting ) {
 	unsigned long value;
 
-	fetch_numeric_setting ( settings, setting, &value, 0 );
+	fetch_uint_setting ( settings, setting, &value );
 	return value;
 }
 
@@ -988,11 +895,6 @@
  * @v settings		Settings block
  */
 void clear_settings ( struct settings *settings ) {
-
-	/* Find target settings block */
-	settings = settings_target ( settings );
-
-	/* Clear settings, if applicable */
 	if ( settings->op->clear )
 		settings->op->clear ( settings );
 }
@@ -1008,7 +910,7 @@
 int setting_cmp ( struct setting *a, struct setting *b ) {
 
 	/* If the settings have tags, compare them */
-	if ( a->tag && ( a->tag == b->tag ) && ( a->scope == b->scope ) )
+	if ( a->tag && ( a->tag == b->tag ) )
 		return 0;
 
 	/* Otherwise, if the settings have names, compare them */
@@ -1027,299 +929,32 @@
  */
 
 /**
- * Format setting value as a string
- *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @v buf		Buffer to contain formatted value
- * @v len		Length of buffer
- * @ret len		Length of formatted value, or negative error
- */
-int setting_format ( struct setting_type *type, const void *raw,
-		     size_t raw_len, char *buf, size_t len ) {
-
-	/* Sanity check */
-	if ( ! type->format )
-		return -ENOTSUP;
-
-	return type->format ( type, raw, raw_len, buf, len );
-}
-
-/**
- * Parse formatted string to setting value
- *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
- */
-int setting_parse ( struct setting_type *type, const char *value,
-		    void *buf, size_t len ) {
-
-	/* Sanity check */
-	if ( ! type->parse )
-		return -ENOTSUP;
-
-	return type->parse ( type, value, buf, len );
-}
-
-/**
- * Convert setting value to number
- *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @ret value		Numeric value
- * @ret rc		Return status code
- */
-int setting_numerate ( struct setting_type *type, const void *raw,
-		       size_t raw_len, unsigned long *value ) {
-
-	/* Sanity check */
-	if ( ! type->numerate )
-		return -ENOTSUP;
-
-	return type->numerate ( type, raw, raw_len, value );
-}
-
-/**
- * Convert number to setting value
- *
- * @v type		Setting type
- * @v value		Numeric value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
- */
-int setting_denumerate ( struct setting_type *type, unsigned long value,
-			 void *buf, size_t len ) {
-
-	/* Sanity check */
-	if ( ! type->denumerate )
-		return -ENOTSUP;
-
-	return type->denumerate ( type, value, buf, len );
-}
-
-/**
- * Fetch formatted value of setting
- *
- * @v settings		Settings block, or NULL to search all blocks
- * @v setting		Setting to fetch
- * @v buf		Buffer to contain formatted value
- * @v len		Length of buffer
- * @ret len		Length of formatted value, or negative error
- */
-int fetchf_setting ( struct settings *settings, struct setting *setting,
-		     char *buf, size_t len ) {
-	void *raw;
-	int raw_len;
-	int ret;
-
-	/* Fetch raw value */
-	raw_len = fetch_setting_copy ( settings, setting, &raw );
-	if ( raw_len < 0 ) {
-		ret = raw_len;
-		goto err_fetch_copy;
-	}
-
-	/* Sanity check */
-	assert ( setting->type != NULL );
-
-	/* Format setting */
-	if ( ( ret = setting_format ( setting->type, raw, raw_len, buf,
-				      len ) ) < 0 )
-		goto err_format;
-
- err_format:
-	free ( raw );
- err_fetch_copy:
-	return ret;
-}
-
-/**
- * Fetch copy of formatted value of setting
- *
- * @v settings		Settings block, or NULL to search all blocks
- * @v setting		Setting to fetch
- * @v value		Buffer to allocate and fill with formatted value
- * @ret len		Length of formatted value, or negative error
- *
- * The caller is responsible for eventually freeing the allocated
- * buffer.
- */
-int fetchf_setting_copy ( struct settings *settings, struct setting *setting,
-			  char **value ) {
-	int len;
-	int check_len;
-
-	/* Avoid returning uninitialised data on error */
-	*value = NULL;
-
-	/* Check existence, and fetch formatted value length */
-	len = fetchf_setting ( settings, setting, NULL, 0 );
-	if ( len < 0 )
-		return len;
-
-	/* Allocate buffer */
-	*value = zalloc ( len + 1 /* NUL */ );
-	if ( ! *value )
-		return -ENOMEM;
-
-	/* Fetch formatted value */
-	check_len = fetchf_setting ( settings, setting, *value,
-				     ( len + 1 /* NUL */ ) );
-	assert ( check_len == len );
-	return len;
-}
-
-/**
- * Store formatted value of setting
+ * Store value of typed setting
  *
  * @v settings		Settings block
  * @v setting		Setting to store
+ * @v type		Settings type
  * @v value		Formatted setting data, or NULL
  * @ret rc		Return status code
  */
 int storef_setting ( struct settings *settings, struct setting *setting,
 		     const char *value ) {
-	void *raw;
-	int raw_len;
-	int check_len;
-	int rc;
 
-	/* NULL value or empty string implies deletion */
-	if ( ( ! value ) || ( ! value[0] ) )
+	/* NULL value implies deletion.  Avoid imposing the burden of
+	 * checking for NULL values on each typed setting's storef()
+	 * method.
+	 */
+	if ( ! value )
 		return delete_setting ( settings, setting );
-
-	/* Sanity check */
-	assert ( setting->type != NULL );
-
-	/* Get raw value length */
-	raw_len = setting_parse ( setting->type, value, NULL, 0 );
-	if ( raw_len < 0 ) {
-		rc = raw_len;
-		goto err_raw_len;
-	}
-
-	/* Allocate buffer for raw value */
-	raw = malloc ( raw_len );
-	if ( ! raw ) {
-		rc = -ENOMEM;
-		goto err_alloc_raw;
-	}
-
-	/* Parse formatted value */
-	check_len = setting_parse ( setting->type, value, raw, raw_len );
-	assert ( check_len == raw_len );
-
-	/* Store raw value */
-	if ( ( rc = store_setting ( settings, setting, raw, raw_len ) ) != 0 )
-		goto err_store;
-
- err_store:
-	free ( raw );
- err_alloc_raw:
- err_raw_len:
-	return rc;
-}
-
-/**
- * Fetch numeric value of setting
- *
- * @v settings		Settings block, or NULL to search all blocks
- * @v setting		Setting to fetch
- * @v value		Numeric value to fill in
- * @ret rc		Return status code
- */
-int fetchn_setting ( struct settings *settings, struct setting *setting,
-		     unsigned long *value ) {
-	void *raw;
-	int raw_len;
-	int rc;
-
-	/* Fetch raw value */
-	raw_len = fetch_setting_copy ( settings, setting, &raw );
-	if ( raw_len < 0 ) {
-		rc = raw_len;
-		goto err_fetch_copy;
-	}
-
-	/* Sanity check */
-	assert ( setting->type != NULL );
-
-	/* Numerate setting */
-	if ( ( rc = setting_numerate ( setting->type, raw, raw_len,
-				       value ) ) < 0 )
-		goto err_numerate;
-
- err_numerate:
-	free ( raw );
- err_fetch_copy:
-	return rc;
-}
-
-/**
- * Store numeric value of setting
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @v value		Numeric value
- * @ret rc		Return status code
- */
-int storen_setting ( struct settings *settings, struct setting *setting,
-		     unsigned long value ) {
-	void *raw;
-	int raw_len;
-	int check_len;
-	int rc;
-
-	/* Sanity check */
-	assert ( setting->type != NULL );
-
-	/* Get raw value length */
-	raw_len = setting_denumerate ( setting->type, value, NULL, 0 );
-	if ( raw_len < 0 ) {
-		rc = raw_len;
-		goto err_raw_len;
-	}
-
-	/* Allocate buffer for raw value */
-	raw = malloc ( raw_len );
-	if ( ! raw ) {
-		rc = -ENOMEM;
-		goto err_alloc_raw;
-	}
-
-	/* Denumerate value */
-	check_len = setting_denumerate ( setting->type, value, raw, raw_len );
-	assert ( check_len == raw_len );
-
-	/* Store raw value */
-	if ( ( rc = store_setting ( settings, setting, raw, raw_len ) ) != 0 )
-		goto err_store;
-
- err_store:
-	free ( raw );
- err_alloc_raw:
- err_raw_len:
-	return rc;
+		
+	return setting->type->storef ( settings, setting, value );
 }
 
-/******************************************************************************
- *
- * Named settings
- *
- ******************************************************************************
- */
-
 /**
- * Find predefined setting
+ * Find named setting
  *
  * @v name		Name
- * @ret setting		Setting, or NULL
+ * @ret setting		Named setting, or NULL
  */
 struct setting * find_setting ( const char *name ) {
 	struct setting *setting;
@@ -1334,17 +969,19 @@
 /**
  * Parse setting name as tag number
  *
+ * @v settings		Settings block
  * @v name		Name
  * @ret tag		Tag number, or 0 if not a valid number
  */
-static unsigned int parse_setting_tag ( const char *name ) {
+static unsigned int parse_setting_tag ( struct settings *settings,
+					const char *name ) {
 	char *tmp = ( ( char * ) name );
 	unsigned int tag = 0;
 
 	while ( 1 ) {
 		tag = ( ( tag << 8 ) | strtoul ( tmp, &tmp, 0 ) );
 		if ( *tmp == 0 )
-			return tag;
+			return ( tag | settings->tag_magic );
 		if ( *tmp != '.' )
 			return 0;
 		tmp++;
@@ -1374,34 +1011,40 @@
  * @v get_child		Function to find or create child settings block
  * @v settings		Settings block to fill in
  * @v setting		Setting to fill in
+ * @v tmp_name		Buffer for copy of setting name
  * @ret rc		Return status code
  *
  * Interprets a name of the form
  * "[settings_name/]tag_name[:type_name]" and fills in the appropriate
  * fields.
  *
- * Note that on success, this function will have modified the original
- * setting @c name.
+ * The @c tmp_name buffer must be large enough to hold a copy of the
+ * setting name.
  */
-int parse_setting_name ( char *name, get_child_settings_t get_child,
-			 struct settings **settings, struct setting *setting ) {
+static int
+parse_setting_name ( const char *name,
+		     struct settings * ( * get_child ) ( struct settings *,
+							 const char * ),
+		     struct settings **settings, struct setting *setting,
+		     char *tmp_name ) {
 	char *settings_name;
 	char *setting_name;
 	char *type_name;
-	struct setting *predefined;
-	int rc;
+	struct setting *named_setting;
 
 	/* Set defaults */
 	*settings = &settings_root;
 	memset ( setting, 0, sizeof ( *setting ) );
 	setting->name = "";
+	setting->type = &setting_type_string;
 
 	/* Split name into "[settings_name/]setting_name[:type_name]" */
-	if ( ( setting_name = strchr ( name, '/' ) ) != NULL ) {
+	strcpy ( tmp_name, name );
+	if ( ( setting_name = strchr ( tmp_name, '/' ) ) != NULL ) {
 		*(setting_name++) = 0;
-		settings_name = name;
+		settings_name = tmp_name;
 	} else {
-		setting_name = name;
+		setting_name = tmp_name;
 		settings_name = NULL;
 	}
 	if ( ( type_name = strchr ( setting_name, ':' ) ) != NULL )
@@ -1413,19 +1056,17 @@
 		if ( *settings == NULL ) {
 			DBG ( "Unrecognised settings block \"%s\" in \"%s\"\n",
 			      settings_name, name );
-			rc = -ENODEV;
-			goto err;
+			return -ENODEV;
 		}
 	}
 
 	/* Identify setting */
-	setting->tag = parse_setting_tag ( setting_name );
-	setting->scope = (*settings)->default_scope;
+	setting->tag = parse_setting_tag ( *settings, setting_name );
 	setting->name = setting_name;
-	for_each_table_entry ( predefined, SETTINGS ) {
-		/* Matches a predefined setting; use that setting */
-		if ( setting_cmp ( predefined, setting ) == 0 ) {
-			memcpy ( setting, predefined, sizeof ( *setting ) );
+	for_each_table_entry ( named_setting, SETTINGS ) {
+		/* Matches a defined named setting; use that setting */
+		if ( setting_cmp ( named_setting, setting ) == 0 ) {
+			memcpy ( setting, named_setting, sizeof ( *setting ) );
 			break;
 		}
 	}
@@ -1436,20 +1077,11 @@
 		if ( setting->type == NULL ) {
 			DBG ( "Invalid setting type \"%s\" in \"%s\"\n",
 			      type_name, name );
-			rc = -ENOTSUP;
-			goto err;
+			return -ENOTSUP;
 		}
 	}
 
 	return 0;
-
- err:
-	/* Restore original name */
-	if ( settings_name )
-		*( setting_name - 1 ) = '/';
-	if ( type_name )
-		*( type_name - 1 ) = ':';
-	return rc;
 }
 
 /**
@@ -1465,624 +1097,514 @@
 		   char *buf, size_t len ) {
 	const char *name;
 
-	settings = settings_target ( settings );
+	if ( ! settings )
+		settings = &settings_root;
+
 	name = settings_name ( settings );
 	return snprintf ( buf, len, "%s%s%s:%s", name, ( name[0] ? "/" : "" ),
 			  setting->name, setting->type->name );
 }
 
-/******************************************************************************
- *
- * Setting types
- *
- ******************************************************************************
- */
-
 /**
- * Parse string setting value
+ * Parse and store value of named setting
  *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
+ * @v name		Name of setting
+ * @v value		Formatted setting data, or NULL
+ * @ret rc		Return status code
  */
-static int parse_string_setting ( struct setting_type *type __unused,
-				  const char *value, void *buf, size_t len ) {
-	size_t raw_len = strlen ( value ); /* Exclude terminating NUL */
+int storef_named_setting ( const char *name, const char *value ) {
+	struct settings *settings;
+	struct setting setting;
+	char tmp_name[ strlen ( name ) + 1 ];
+	int rc;
+
+	/* Parse setting name */
+	if ( ( rc = parse_setting_name ( name, autovivify_child_settings,
+					 &settings, &setting, tmp_name )) != 0)
+		return rc;
 
-	/* Copy string to buffer */
-	if ( len > raw_len )
-		len = raw_len;
-	memcpy ( buf, value, len );
+	/* Store setting */
+	if ( ( rc = storef_setting ( settings, &setting, value ) ) != 0 )
+		return rc;
 
-	return raw_len;
+	return 0;
 }
 
 /**
- * Format string setting value
+ * Fetch and format value of named setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @v buf		Buffer to contain formatted value
- * @v len		Length of buffer
+ * @v name		Name of setting
+ * @v name_buf		Buffer to contain canonicalised name
+ * @v name_len		Length of canonicalised name buffer
+ * @v value_buf		Buffer to contain formatted value
+ * @v value_len		Length of formatted value buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_string_setting ( struct setting_type *type __unused,
-				   const void *raw, size_t raw_len, char *buf,
-				   size_t len ) {
-
-	/* Copy string to buffer, and terminate */
-	memset ( buf, 0, len );
-	if ( len > raw_len )
-		len = raw_len;
-	memcpy ( buf, raw, len );
-
-	return raw_len;
-}
+int fetchf_named_setting ( const char *name,
+			   char *name_buf, size_t name_len,
+			   char *value_buf, size_t value_len ) {
+	struct settings *settings;
+	struct setting setting;
+	struct settings *origin;
+	char tmp_name[ strlen ( name ) + 1 ];
+	int len;
+	int rc;
+
+	/* Parse setting name */
+	if ( ( rc = parse_setting_name ( name, find_child_settings,
+					 &settings, &setting, tmp_name )) != 0)
+		return rc;
+
+	/* Fetch setting */
+	if ( ( len = fetchf_setting ( settings, &setting, value_buf,
+				     value_len ) ) < 0 )
+		return len;
+
+	/* Construct setting name */
+	origin = fetch_setting_origin ( settings, &setting );
+	assert ( origin != NULL );
+	setting_name ( origin, &setting, name_buf, name_len );
+
+	return len;
+}
+
+/******************************************************************************
+ *
+ * Setting types
+ *
+ ******************************************************************************
+ */
+
+/**
+ * Parse and store value of string setting
+ *
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @ret rc		Return status code
+ */
+static int storef_string ( struct settings *settings, struct setting *setting,
+			   const char *value ) {
+	return store_setting ( settings, setting, value, strlen ( value ) );
+}
+
+/**
+ * Fetch and format value of string setting
+ *
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
+ * @v buf		Buffer to contain formatted value
+ * @v len		Length of buffer
+ * @ret len		Length of formatted value, or negative error
+ */
+static int fetchf_string ( struct settings *settings, struct setting *setting,
+			   char *buf, size_t len ) {
+	return fetch_string_setting ( settings, setting, buf, len );
+}
 
 /** A string setting type */
 struct setting_type setting_type_string __setting_type = {
 	.name = "string",
-	.parse = parse_string_setting,
-	.format = format_string_setting,
+	.storef = storef_string,
+	.fetchf = fetchf_string,
 };
 
 /**
- * Parse URI-encoded string setting value
+ * Parse and store value of URI-encoded string setting
  *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @ret rc		Return status code
  */
-static int parse_uristring_setting ( struct setting_type *type __unused,
-				     const char *value, void *buf, size_t len ){
-	char tmp[ len + 1 /* NUL */ ];
-	size_t raw_len;
-
-	/* Decode to temporary buffer (including NUL) */
-	raw_len = uri_decode ( value, tmp, sizeof ( tmp ) );
-
-	/* Copy to output buffer (excluding NUL) */
-	if ( len > raw_len )
-		len = raw_len;
-	memcpy ( buf, tmp, len );
+static int storef_uristring ( struct settings *settings,
+			      struct setting *setting,
+			      const char *value ) {
+	char buf[ strlen ( value ) + 1 ]; /* Decoding never expands string */
+	size_t len;
 
-	return raw_len;
+	len = uri_decode ( value, buf, sizeof ( buf ) );
+	return store_setting ( settings, setting, buf, len );
 }
 
 /**
- * Format URI-encoded string setting value
+ * Fetch and format value of URI-encoded string setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_uristring_setting ( struct setting_type *type __unused,
-				      const void *raw, size_t raw_len,
-				      char *buf, size_t len ) {
-	char tmp[ raw_len + 1 /* NUL */ ];
-
-	/* Copy to temporary buffer and terminate */
-	memcpy ( tmp, raw, raw_len );
-	tmp[raw_len] = '\0';
+static int fetchf_uristring ( struct settings *settings,
+			      struct setting *setting,
+			      char *buf, size_t len ) {
+	ssize_t raw_len;
 
-	/* Encode directly into output buffer */
-	return uri_encode ( tmp, buf, len, URI_FRAGMENT );
+	/* We need to always retrieve the full raw string to know the
+	 * length of the encoded string.
+	 */
+	raw_len = fetch_setting ( settings, setting, NULL, 0 );
+	if ( raw_len < 0 )
+		return raw_len;
+
+	{
+		char raw_buf[ raw_len + 1 ];
+       
+		fetch_string_setting ( settings, setting, raw_buf,
+				       sizeof ( raw_buf ) );
+		return uri_encode ( raw_buf, buf, len, URI_FRAGMENT );
+	}
 }
 
 /** A URI-encoded string setting type */
 struct setting_type setting_type_uristring __setting_type = {
 	.name = "uristring",
-	.parse = parse_uristring_setting,
-	.format = format_uristring_setting,
+	.storef = storef_uristring,
+	.fetchf = fetchf_uristring,
 };
 
 /**
- * Parse IPv4 address setting value
+ * Parse and store value of IPv4 address setting
  *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @ret rc		Return status code
  */
-static int parse_ipv4_setting ( struct setting_type *type __unused,
-				const char *value, void *buf, size_t len ) {
+static int storef_ipv4 ( struct settings *settings, struct setting *setting,
+			 const char *value ) {
 	struct in_addr ipv4;
 
-	/* Parse IPv4 address */
 	if ( inet_aton ( value, &ipv4 ) == 0 )
 		return -EINVAL;
-
-	/* Copy to buffer */
-	if ( len > sizeof ( ipv4 ) )
-		len = sizeof ( ipv4 );
-	memcpy ( buf, &ipv4, len );
-
-	return ( sizeof ( ipv4 ) );
+	return store_setting ( settings, setting, &ipv4, sizeof ( ipv4 ) );
 }
 
 /**
- * Format IPv4 address setting value
+ * Fetch and format value of IPv4 address setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_ipv4_setting ( struct setting_type *type __unused,
-				 const void *raw, size_t raw_len, char *buf,
-				 size_t len ) {
-	const struct in_addr *ipv4 = raw;
+static int fetchf_ipv4 ( struct settings *settings, struct setting *setting,
+			 char *buf, size_t len ) {
+	struct in_addr ipv4;
+	int raw_len;
 
-	if ( raw_len < sizeof ( *ipv4 ) )
-		return -EINVAL;
-	return snprintf ( buf, len, "%s", inet_ntoa ( *ipv4 ) );
+	if ( ( raw_len = fetch_ipv4_setting ( settings, setting, &ipv4 ) ) < 0)
+		return raw_len;
+	return snprintf ( buf, len, "%s", inet_ntoa ( ipv4 ) );
 }
 
 /** An IPv4 address setting type */
 struct setting_type setting_type_ipv4 __setting_type = {
 	.name = "ipv4",
-	.parse = parse_ipv4_setting,
-	.format = format_ipv4_setting,
+	.storef = storef_ipv4,
+	.fetchf = fetchf_ipv4,
 };
 
 /**
- * Integer setting type indices
- *
- * These indexes are defined such that (1<<index) gives the width of
- * the integer, in bytes.
- */
-enum setting_type_int_index {
-	SETTING_TYPE_INT8 = 0,
-	SETTING_TYPE_INT16 = 1,
-	SETTING_TYPE_INT32 = 2,
-};
-
-/**
- * Integer setting type names
- *
- * These names exist as a static array in order to allow the type's
- * integer size and signedness to be determined from the type's name.
- * Note that there are no separate entries for the signed integer
- * types: the name pointers simply point to the second character of
- * the relevant string.
- */
-static const char setting_type_int_name[][8] = {
-	[SETTING_TYPE_INT8] = "uint8",
-	[SETTING_TYPE_INT16] = "uint16",
-	[SETTING_TYPE_INT32] = "uint32",
-};
-
-/**
- * Get unsigned integer setting type name
- *
- * @v index		Integer setting type index
- * @ret name		Setting type name
- */
-#define SETTING_TYPE_UINT_NAME( index ) setting_type_int_name[index]
-
-/**
- * Get signed integer setting type name
- *
- * @v index		Integer setting type index
- * @ret name		Setting type name
- */
-#define SETTING_TYPE_INT_NAME( index ) ( setting_type_int_name[index] + 1 )
-
-/**
- * Get integer setting type index
- *
- * @v type		Setting type
- * @ret index		Integer setting type index
- */
-static unsigned int setting_type_int_index ( struct setting_type *type ) {
-
-	return ( ( type->name - setting_type_int_name[0] ) /
-		 sizeof ( setting_type_int_name[0] ) );
-}
-
-/**
- * Get integer setting type width
+ * Parse and store value of integer setting
  *
- * @v type		Setting type
- * @ret index		Integer setting type width
- */
-static unsigned int setting_type_int_width ( struct setting_type *type ) {
-
-	return ( 1 << setting_type_int_index ( type ) );
-}
-
-/**
- * Get integer setting type signedness
- *
- * @v type		Setting type
- * @ret is_signed	Integer setting type is signed
- */
-static int setting_type_int_is_signed ( struct setting_type *type ) {
-	return ( ( type->name - setting_type_int_name[0] ) & 1 );
-}
-
-/**
- * Convert number to setting value
- *
- * @v type		Setting type
- * @v value		Numeric value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @v size		Integer size, in bytes
+ * @ret rc		Return status code
  */
-static int denumerate_int_setting ( struct setting_type *type,
-				    unsigned long value, void *buf,
-				    size_t len ) {
-	unsigned int size = setting_type_int_width ( type );
+static int storef_int ( struct settings *settings, struct setting *setting,
+			const char *value, unsigned int size ) {
 	union {
 		uint32_t num;
 		uint8_t bytes[4];
 	} u;
+	char *endp;
 
-	u.num = htonl ( value );
-	if ( len > size )
-		len = size;
-	memcpy ( buf, &u.bytes[ sizeof ( u ) - size ], len );
-
-	return size;
+	u.num = htonl ( strtoul ( value, &endp, 0 ) );
+	if ( *endp )
+		return -EINVAL;
+	return store_setting ( settings, setting, 
+			       &u.bytes[ sizeof ( u ) - size ], size );
 }
 
 /**
- * Convert setting value to number
+ * Parse and store value of 8-bit integer setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @v value		Numeric value to fill in
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @v size		Integer size, in bytes
  * @ret rc		Return status code
  */
-static int numerate_int_setting ( struct setting_type *type,
-				  const void *raw, size_t raw_len,
-				  unsigned long *value ) {
-	int is_signed = setting_type_int_is_signed ( type );
-	int check_len;
-
-	/* Extract numeric value */
-	check_len = numeric_setting_value ( is_signed, raw, raw_len, value );
-	if ( check_len < 0 )
-		return check_len;
-	assert ( check_len == ( int ) raw_len );
-
-	return 0;
+static int storef_int8 ( struct settings *settings, struct setting *setting,
+			 const char *value ) {
+	return storef_int ( settings, setting, value, 1 );
 }
 
 /**
- * Parse integer setting value
+ * Parse and store value of 16-bit integer setting
  *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @ret len		Length of raw value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @v size		Integer size, in bytes
+ * @ret rc		Return status code
  */
-static int parse_int_setting ( struct setting_type *type, const char *value,
-			       void *buf, size_t len ) {
-	char *endp;
-	unsigned long num_value;
-
-	/* Parse value */
-	num_value = strtoul ( value, &endp, 0 );
-	if ( *endp )
-		return -EINVAL;
+static int storef_int16 ( struct settings *settings, struct setting *setting,
+			  const char *value ) {
+	return storef_int ( settings, setting, value, 2 );
+}
 
-	return type->denumerate ( type, num_value, buf, len );
+/**
+ * Parse and store value of 32-bit integer setting
+ *
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @v size		Integer size, in bytes
+ * @ret rc		Return status code
+ */
+static int storef_int32 ( struct settings *settings, struct setting *setting,
+			  const char *value ) {
+	return storef_int ( settings, setting, value, 4 );
 }
 
 /**
- * Format signed integer setting value
+ * Fetch and format value of signed integer setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_int_setting ( struct setting_type *type, const void *raw,
-				size_t raw_len, char *buf, size_t len ) {
-	unsigned long value;
-	int ret;
-
-	/* Extract numeric value */
-	if ( ( ret = type->numerate ( type, raw, raw_len, &value ) ) < 0 )
-		return ret;
+static int fetchf_int ( struct settings *settings, struct setting *setting,
+			char *buf, size_t len ) {
+	long value;
+	int rc;
 
-	/* Format value */
+	if ( ( rc = fetch_int_setting ( settings, setting, &value ) ) < 0 )
+		return rc;
 	return snprintf ( buf, len, "%ld", value );
 }
 
 /**
- * Format unsigned integer setting value
+ * Fetch and format value of unsigned integer setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_uint_setting ( struct setting_type *type, const void *raw,
-				 size_t raw_len, char *buf, size_t len ) {
+static int fetchf_uint ( struct settings *settings, struct setting *setting,
+			 char *buf, size_t len ) {
 	unsigned long value;
-	int ret;
-
-	/* Extract numeric value */
-	if ( ( ret = type->numerate ( type, raw, raw_len, &value ) ) < 0 )
-		return ret;
+	int rc;
 
-	/* Format value */
+	if ( ( rc = fetch_uint_setting ( settings, setting, &value ) ) < 0 )
+		return rc;
 	return snprintf ( buf, len, "%#lx", value );
 }
 
-/**
- * Define a signed integer setting type
- *
- * @v index		Integer setting type index
- * @ret type		Setting type
- */
-#define SETTING_TYPE_INT( index ) {				\
-	.name = SETTING_TYPE_INT_NAME ( index ),		\
-	.parse = parse_int_setting,				\
-	.format = format_int_setting,				\
-	.denumerate = denumerate_int_setting,			\
-	.numerate = numerate_int_setting,			\
-}
-
-/**
- * Define an unsigned integer setting type
- *
- * @v index		Integer setting type index
- * @ret type		Setting type
- */
-#define SETTING_TYPE_UINT( index ) {				\
-	.name = SETTING_TYPE_UINT_NAME ( index ),		\
-	.parse = parse_int_setting,				\
-	.format = format_uint_setting,				\
-	.denumerate = denumerate_int_setting,			\
-	.numerate = numerate_int_setting,			\
-}
-
 /** A signed 8-bit integer setting type */
-struct setting_type setting_type_int8 __setting_type =
-	SETTING_TYPE_INT ( SETTING_TYPE_INT8 );
+struct setting_type setting_type_int8 __setting_type = {
+	.name = "int8",
+	.storef = storef_int8,
+	.fetchf = fetchf_int,
+};
 
 /** A signed 16-bit integer setting type */
-struct setting_type setting_type_int16 __setting_type =
-	SETTING_TYPE_INT ( SETTING_TYPE_INT16 );
+struct setting_type setting_type_int16 __setting_type = {
+	.name = "int16",
+	.storef = storef_int16,
+	.fetchf = fetchf_int,
+};
 
 /** A signed 32-bit integer setting type */
-struct setting_type setting_type_int32 __setting_type =
-	SETTING_TYPE_INT ( SETTING_TYPE_INT32 );
+struct setting_type setting_type_int32 __setting_type = {
+	.name = "int32",
+	.storef = storef_int32,
+	.fetchf = fetchf_int,
+};
 
 /** An unsigned 8-bit integer setting type */
-struct setting_type setting_type_uint8 __setting_type =
-	SETTING_TYPE_UINT ( SETTING_TYPE_INT8 );
+struct setting_type setting_type_uint8 __setting_type = {
+	.name = "uint8",
+	.storef = storef_int8,
+	.fetchf = fetchf_uint,
+};
 
 /** An unsigned 16-bit integer setting type */
-struct setting_type setting_type_uint16 __setting_type =
-	SETTING_TYPE_UINT ( SETTING_TYPE_INT16 );
+struct setting_type setting_type_uint16 __setting_type = {
+	.name = "uint16",
+	.storef = storef_int16,
+	.fetchf = fetchf_uint,
+};
 
 /** An unsigned 32-bit integer setting type */
-struct setting_type setting_type_uint32 __setting_type =
-	SETTING_TYPE_UINT ( SETTING_TYPE_INT32 );
+struct setting_type setting_type_uint32 __setting_type = {
+	.name = "uint32",
+	.storef = storef_int32,
+	.fetchf = fetchf_uint,
+};
 
 /**
- * Format hex string setting value
+ * Parse and store value of hex string setting
  *
- * @v delimiter		Byte delimiter
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @v buf		Buffer to contain formatted value
- * @v len		Length of buffer
- * @ret len		Length of formatted value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @ret rc		Return status code
  */
-static int format_hex_setting ( const char *delimiter, const void *raw,
-				size_t raw_len, char *buf, size_t len ) {
-	const uint8_t *bytes = raw;
-	int used = 0;
-	unsigned int i;
+static int storef_hex ( struct settings *settings, struct setting *setting,
+			const char *value ) {
+	char *ptr = ( char * ) value;
+	uint8_t bytes[ strlen ( value ) ]; /* cannot exceed strlen(value) */
+	unsigned int len = 0;
 
-	if ( len )
-		buf[0] = 0; /* Ensure that a terminating NUL exists */
-	for ( i = 0 ; i < raw_len ; i++ ) {
-		used += ssnprintf ( ( buf + used ), ( len - used ),
-				    "%s%02x", ( used ? delimiter : "" ),
-				    bytes[i] );
+	while ( 1 ) {
+		bytes[len++] = strtoul ( ptr, &ptr, 16 );
+		switch ( *ptr ) {
+		case '\0' :
+			return store_setting ( settings, setting, bytes, len );
+		case ':' :
+		case '-' :
+			ptr++;
+			break;
+		default :
+			return -EINVAL;
+		}
 	}
-	return used;
-}
-
-/**
- * Parse hex string setting value (using colon delimiter)
- *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @v size		Integer size, in bytes
- * @ret len		Length of raw value, or negative error
- */
-static int parse_hex_setting ( struct setting_type *type __unused,
-			       const char *value, void *buf, size_t len ) {
-	return hex_decode ( value, ':', buf, len );
 }
 
 /**
- * Format hex string setting value (using colon delimiter)
+ * Fetch and format value of hex string setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
+ * @v delimiter		Byte delimiter
  * @ret len		Length of formatted value, or negative error
  */
-static int format_hex_colon_setting ( struct setting_type *type __unused,
-				      const void *raw, size_t raw_len,
-				      char *buf, size_t len ) {
-	return format_hex_setting ( ":", raw, raw_len, buf, len );
-}
+static int fetchf_hex ( struct settings *settings, struct setting *setting,
+			char *buf, size_t len, const char *delimiter ) {
+	int raw_len;
+	int check_len;
+	int used = 0;
+	int i;
 
-/**
- * Parse hex string setting value (using hyphen delimiter)
- *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @v size		Integer size, in bytes
- * @ret len		Length of raw value, or negative error
- */
-static int parse_hex_hyphen_setting ( struct setting_type *type __unused,
-				      const char *value, void *buf,
-				      size_t len ) {
-	return hex_decode ( value, '-', buf, len );
+	raw_len = fetch_setting_len ( settings, setting );
+	if ( raw_len < 0 )
+		return raw_len;
+
+	{
+		uint8_t raw[raw_len];
+
+		check_len = fetch_setting ( settings, setting, raw,
+					    sizeof ( raw ) );
+		if ( check_len < 0 )
+			return check_len;
+		assert ( check_len == raw_len );
+		
+		if ( len )
+			buf[0] = 0; /* Ensure that a terminating NUL exists */
+		for ( i = 0 ; i < raw_len ; i++ ) {
+			used += ssnprintf ( ( buf + used ), ( len - used ),
+					    "%s%02x", ( used ? delimiter : "" ),
+					    raw[i] );
+		}
+		return used;
+	}
 }
 
 /**
- * Format hex string setting value (using hyphen delimiter)
+ * Fetch and format value of hex string setting (using colon delimiter)
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_hex_hyphen_setting ( struct setting_type *type __unused,
-				       const void *raw, size_t raw_len,
-				       char *buf, size_t len ) {
-	return format_hex_setting ( "-", raw, raw_len, buf, len );
+static int fetchf_hex_colon ( struct settings *settings,
+			      struct setting *setting,
+			      char *buf, size_t len ) {
+	return fetchf_hex ( settings, setting, buf, len, ":" );
 }
 
 /**
- * Parse hex string setting value (using no delimiter)
+ * Fetch and format value of hex string setting (using hyphen delimiter)
  *
- * @v type		Setting type
- * @v value		Formatted setting value
- * @v buf		Buffer to contain raw value
- * @v len		Length of buffer
- * @v size		Integer size, in bytes
- * @ret len		Length of raw value, or negative error
- */
-static int parse_hex_raw_setting ( struct setting_type *type __unused,
-				   const char *value, void *buf, size_t len ) {
-	return hex_decode ( value, 0, buf, len );
-}
-
-/**
- * Format hex string setting value (using no delimiter)
- *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_hex_raw_setting ( struct setting_type *type __unused,
-				    const void *raw, size_t raw_len,
-				    char *buf, size_t len ) {
-	return format_hex_setting ( "", raw, raw_len, buf, len );
+static int fetchf_hex_hyphen ( struct settings *settings,
+			       struct setting *setting,
+			       char *buf, size_t len ) {
+	return fetchf_hex ( settings, setting, buf, len, "-" );
 }
 
 /** A hex-string setting (colon-delimited) */
 struct setting_type setting_type_hex __setting_type = {
 	.name = "hex",
-	.parse = parse_hex_setting,
-	.format = format_hex_colon_setting,
+	.storef = storef_hex,
+	.fetchf = fetchf_hex_colon,
 };
 
 /** A hex-string setting (hyphen-delimited) */
 struct setting_type setting_type_hexhyp __setting_type = {
 	.name = "hexhyp",
-	.parse = parse_hex_hyphen_setting,
-	.format = format_hex_hyphen_setting,
-};
-
-/** A hex-string setting (non-delimited) */
-struct setting_type setting_type_hexraw __setting_type = {
-	.name = "hexraw",
-	.parse = parse_hex_raw_setting,
-	.format = format_hex_raw_setting,
+	.storef = storef_hex,
+	.fetchf = fetchf_hex_hyphen,
 };
 
 /**
- * Format UUID setting value
+ * Parse and store value of UUID setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
- * @v buf		Buffer to contain formatted value
- * @v len		Length of buffer
- * @ret len		Length of formatted value, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting to store
+ * @v value		Formatted setting data
+ * @ret rc		Return status code
  */
-static int format_uuid_setting ( struct setting_type *type __unused,
-				 const void *raw, size_t raw_len, char *buf,
-				 size_t len ) {
-	const union uuid *uuid = raw;
-
-	/* Range check */
-	if ( raw_len != sizeof ( *uuid ) )
-		return -ERANGE;
-
-	/* Format value */
-	return snprintf ( buf, len, "%s", uuid_ntoa ( uuid ) );
+static int storef_uuid ( struct settings *settings __unused,
+			 struct setting *setting __unused,
+			 const char *value __unused ) {
+	return -ENOTSUP;
 }
 
-/** UUID setting type */
-struct setting_type setting_type_uuid __setting_type = {
-	.name = "uuid",
-	.format = format_uuid_setting,
-};
-
 /**
- * Format PCI bus:dev.fn setting value
+ * Fetch and format value of UUID setting
  *
- * @v type		Setting type
- * @v raw		Raw setting value
- * @v raw_len		Length of raw setting value
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
  * @v buf		Buffer to contain formatted value
  * @v len		Length of buffer
  * @ret len		Length of formatted value, or negative error
  */
-static int format_busdevfn_setting ( struct setting_type *type __unused,
-				     const void *raw, size_t raw_len, char *buf,
-				     size_t len ) {
-	unsigned long busdevfn;
-	int check_len;
+static int fetchf_uuid ( struct settings *settings, struct setting *setting,
+			 char *buf, size_t len ) {
+	union uuid uuid;
+	int raw_len;
 
-	/* Extract numeric value */
-	check_len = numeric_setting_value ( 0, raw, raw_len, &busdevfn );
-	if ( check_len < 0 )
-		return check_len;
-	assert ( check_len == ( int ) raw_len );
-
-	/* Format value */
-	return snprintf ( buf, len, "%02lx:%02lx.%lx", PCI_BUS ( busdevfn ),
-			  PCI_SLOT ( busdevfn ), PCI_FUNC ( busdevfn ) );
+	if ( ( raw_len = fetch_uuid_setting ( settings, setting, &uuid ) ) < 0)
+		return raw_len;
+	return snprintf ( buf, len, "%s", uuid_ntoa ( &uuid ) );
 }
 
-/** PCI bus:dev.fn setting type */
-struct setting_type setting_type_busdevfn __setting_type = {
-	.name = "busdevfn",
-	.format = format_busdevfn_setting,
+/** UUID setting type */
+struct setting_type setting_type_uuid __setting_type = {
+	.name = "uuid",
+	.storef = storef_uuid,
+	.fetchf = fetchf_uuid,
 };
 
 /******************************************************************************
@@ -2102,18 +1624,15 @@
  * eventually free() it.
  */
 char * expand_settings ( const char *string ) {
-	struct settings *settings;
-	struct setting setting;
 	char *expstr;
 	char *start;
 	char *end;
 	char *head;
 	char *name;
 	char *tail;
-	char *value;
-	char *tmp;
+	int setting_len;
 	int new_len;
-	int rc;
+	char *tmp;
 
 	/* Obtain temporary modifiable copy of string */
 	expstr = strdup ( string );
@@ -2143,27 +1662,27 @@
 		*end = '\0';
 		tail = ( end + 1 );
 
-		/* Expand setting */
-		if ( ( rc = parse_setting_name ( name, find_child_settings,
-						 &settings,
-						 &setting ) ) != 0 ) {
-			/* Treat invalid setting names as empty */
-			value = NULL;
-		} else {
-			/* Fetch and format setting value.  Ignore
-			 * errors; treat non-existent settings as empty.
-			 */
-			fetchf_setting_copy ( settings, &setting, &value );
+		/* Determine setting length */
+		setting_len = fetchf_named_setting ( name, NULL, 0, NULL, 0 );
+		if ( setting_len < 0 )
+			setting_len = 0; /* Treat error as empty setting */
+
+		/* Read setting into temporary buffer */
+		{
+			char setting_buf[ setting_len + 1 ];
+
+			setting_buf[0] = '\0';
+			fetchf_named_setting ( name, NULL, 0, setting_buf,
+					       sizeof ( setting_buf ) );
+
+			/* Construct expanded string and discard old string */
+			tmp = expstr;
+			new_len = asprintf ( &expstr, "%s%s%s",
+					     head, setting_buf, tail );
+			free ( tmp );
+			if ( new_len < 0 )
+				return NULL;
 		}
-
-		/* Construct expanded string and discard old string */
-		tmp = expstr;
-		new_len = asprintf ( &expstr, "%s%s%s",
-				     head, ( value ? value : "" ), tail );
-		free ( value );
-		free ( tmp );
-		if ( new_len < 0 )
-			return NULL;
 	}
 
 	return expstr;
@@ -2184,22 +1703,6 @@
 	.type = &setting_type_string,
 };
 
-/** Domain name setting */
-struct setting domain_setting __setting ( SETTING_IPv4_EXTRA ) = {
-	.name = "domain",
-	.description = "DNS domain",
-	.tag = DHCP_DOMAIN_NAME,
-	.type = &setting_type_string,
-};
-
-/** TFTP server setting */
-struct setting next_server_setting __setting ( SETTING_BOOT ) = {
-	.name = "next-server",
-	.description = "TFTP server",
-	.tag = DHCP_EB_SIADDR,
-	.type = &setting_type_ipv4,
-};
-
 /** Filename setting */
 struct setting filename_setting __setting ( SETTING_BOOT ) = {
 	.name = "filename",
@@ -2239,192 +1742,3 @@
 	.tag = DHCP_EB_PRIORITY,
 	.type = &setting_type_int8,
 };
-
-/******************************************************************************
- *
- * Built-in settings block
- *
- ******************************************************************************
- */
-
-/** Built-in setting scope */
-struct settings_scope builtin_scope;
-
-/**
- * Fetch error number setting
- *
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int errno_fetch ( void *data, size_t len ) {
-	uint32_t content;
-
-	/* Return current error */
-	content = htonl ( errno );
-	if ( len > sizeof ( content ) )
-		len = sizeof ( content );
-	memcpy ( data, &content, len );
-	return sizeof ( content );
-}
-
-/** Error number setting */
-struct setting errno_setting __setting ( SETTING_MISC ) = {
-	.name = "errno",
-	.description = "Last error",
-	.type = &setting_type_uint32,
-	.scope = &builtin_scope,
-};
-
-/** Error number built-in setting */
-struct builtin_setting errno_builtin_setting __builtin_setting = {
-	.setting = &errno_setting,
-	.fetch = errno_fetch,
-};
-
-/**
- * Fetch build architecture setting
- *
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int buildarch_fetch ( void *data, size_t len ) {
-	static const char buildarch[] = _S2 ( ARCH );
-
-	strncpy ( data, buildarch, len );
-	return ( sizeof ( buildarch ) - 1 /* NUL */ );
-}
-
-/** Build architecture setting */
-struct setting buildarch_setting __setting ( SETTING_MISC ) = {
-	.name = "buildarch",
-	.description = "Build architecture",
-	.type = &setting_type_string,
-	.scope = &builtin_scope,
-};
-
-/** Build architecture built-in setting */
-struct builtin_setting buildarch_builtin_setting __builtin_setting = {
-	.setting = &buildarch_setting,
-	.fetch = buildarch_fetch,
-};
-
-/**
- * Fetch platform setting
- *
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int platform_fetch ( void *data, size_t len ) {
-	static const char platform[] = _S2 ( PLATFORM );
-
-	strncpy ( data, platform, len );
-	return ( sizeof ( platform ) - 1 /* NUL */ );
-}
-
-/** Platform setting */
-struct setting platform_setting __setting ( SETTING_MISC ) = {
-	.name = "platform",
-	.description = "Platform",
-	.type = &setting_type_string,
-	.scope = &builtin_scope,
-};
-
-/** Platform built-in setting */
-struct builtin_setting platform_builtin_setting __builtin_setting = {
-	.setting = &platform_setting,
-	.fetch = platform_fetch,
-};
-
-/**
- * Fetch version setting
- *
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int version_fetch ( void *data, size_t len ) {
-	strncpy ( data, product_version, len );
-	return ( strlen ( product_version ) );
-}
-
-/** Version setting */
-struct setting version_setting __setting ( SETTING_MISC ) = {
-	.name = "version",
-	.description = "Version",
-	.type = &setting_type_string,
-	.scope = &builtin_scope,
-};
-
-/** Version built-in setting */
-struct builtin_setting version_builtin_setting __builtin_setting = {
-	.setting = &version_setting,
-	.fetch = version_fetch,
-};
-
-/**
- * Fetch built-in setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int builtin_fetch ( struct settings *settings __unused,
-			   struct setting *setting,
-			   void *data, size_t len ) {
-	struct builtin_setting *builtin;
-
-	for_each_table_entry ( builtin, BUILTIN_SETTINGS ) {
-		if ( setting_cmp ( setting, builtin->setting ) == 0 )
-			return builtin->fetch ( data, len );
-	}
-	return -ENOENT;
-}
-
-/**
- * Check applicability of built-in setting
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @ret applies		Setting applies within this settings block
- */
-static int builtin_applies ( struct settings *settings __unused,
-			     struct setting *setting ) {
-
-	return ( setting->scope == &builtin_scope );
-}
-
-/** Built-in settings operations */
-static struct settings_operations builtin_settings_operations = {
-	.applies = builtin_applies,
-	.fetch = builtin_fetch,
-};
-
-/** Built-in settings */
-static struct settings builtin_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( builtin_settings.siblings ),
-	.children = LIST_HEAD_INIT ( builtin_settings.children ),
-	.op = &builtin_settings_operations,
-};
-
-/** Initialise built-in settings */
-static void builtin_init ( void ) {
-	int rc;
-
-	if ( ( rc = register_settings ( &builtin_settings, NULL,
-					"builtin" ) ) != 0 ) {
-		DBG ( "Could not register built-in settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** Built-in settings initialiser */
-struct init_fn builtin_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = builtin_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/strtoull.c ipxe-1.0.1~lliurex1505/src/core/strtoull.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/strtoull.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/strtoull.c	2012-01-06 23:49:04.000000000 +0000
@@ -29,17 +29,8 @@
  */
 unsigned long long strtoull ( const char *p, char **endp, int base ) {
 	unsigned long long ret = 0;
-	int negative = 0;
 	unsigned int charval;
 
-	while ( isspace ( *p ) )
-		p++;
-
-	if ( *p == '-' ) {
-		negative = 1;
-		p++;
-	}
-
 	base = strtoul_base ( &p, base );
 
 	while ( 1 ) {
@@ -50,9 +41,6 @@
 		p++;
 	}
 
-	if ( negative )
-		ret = -ret;
-
 	if ( endp )
 		*endp = ( char * ) p;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/time.c ipxe-1.0.1~lliurex1505/src/core/time.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/time.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/time.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,138 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <time.h>
-
-/** @file
- *
- * Date and time
- *
- * POSIX:2008 section 4.15 defines "seconds since the Epoch" as an
- * abstract measure approximating the number of seconds that have
- * elapsed since the Epoch, excluding leap seconds.  The formula given
- * is
- *
- *    tm_sec + tm_min*60 + tm_hour*3600 + tm_yday*86400 +
- *    (tm_year-70)*31536000 + ((tm_year-69)/4)*86400 -
- *    ((tm_year-1)/100)*86400 + ((tm_year+299)/400)*86400
- *
- * This calculation assumes that leap years occur in each year that is
- * either divisible by 4 but not divisible by 100, or is divisible by
- * 400.
- */
-
-/** Days of week (for debugging) */
-static const char *weekdays[] = {
-	"Sun", "Mon", "Tue", "Wed", "Thu", "Fri", "Sat"
-};
-
-/**
- * Determine whether or not year is a leap year
- *
- * @v tm_year		Years since 1900
- * @v is_leap_year	Year is a leap year
- */
-static int is_leap_year ( int tm_year ) {
-	int leap_year = 0;
-
-	if ( ( tm_year % 4 ) == 0 )
-		leap_year = 1;
-	if ( ( tm_year % 100 ) == 0 )
-		leap_year = 0;
-	if ( ( tm_year % 400 ) == 100 )
-		leap_year = 1;
-
-	return leap_year;
-}
-
-/**
- * Calculate number of leap years since 1900
- *
- * @v tm_year		Years since 1900
- * @v num_leap_years	Number of leap years
- */
-static int leap_years_to_end ( int tm_year ) {
-	int leap_years = 0;
-
-	leap_years += ( tm_year / 4 );
-	leap_years -= ( tm_year / 100 );
-	leap_years += ( ( tm_year + 300 ) / 400 );
-
-	return leap_years;
-}
-
-/**
- * Calculate day of week
- *
- * @v tm_year		Years since 1900
- * @v tm_mon		Month of year [0,11]
- * @v tm_day		Day of month [1,31]
- */
-static int day_of_week ( int tm_year, int tm_mon, int tm_mday ) {
-	static const uint8_t offset[12] =
-		{ 1, 4, 3, 6, 1, 4, 6, 2, 5, 0, 3, 5 };
-	int pseudo_year = tm_year;
-
-	if ( tm_mon < 2 )
-		pseudo_year--;
-	return ( ( pseudo_year + leap_years_to_end ( pseudo_year ) +
-		   offset[tm_mon] + tm_mday ) % 7 );
-}
-
-/** Days from start of year until start of months (in non-leap years) */
-static const uint16_t days_to_month_start[] =
-	{ 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
-
-/**
- * Calculate seconds since the Epoch
- *
- * @v tm		Broken-down time
- * @ret time		Seconds since the Epoch
- */
-time_t mktime ( struct tm *tm ) {
-	int days_since_epoch;
-	int seconds_since_day;
-	time_t seconds;
-
-	/* Calculate day of year */
-	tm->tm_yday = ( ( tm->tm_mday - 1 ) +
-			days_to_month_start[ tm->tm_mon ] );
-	if ( ( tm->tm_mon >= 2 ) && is_leap_year ( tm->tm_year ) )
-		tm->tm_yday++;
-
-	/* Calculate day of week */
-	tm->tm_wday = day_of_week ( tm->tm_year, tm->tm_mon, tm->tm_mday );
-
-	/* Calculate seconds since the Epoch */
-	days_since_epoch = ( tm->tm_yday + ( 365 * tm->tm_year ) - 25567 +
-			     leap_years_to_end ( tm->tm_year - 1 ) );
-	seconds_since_day =
-		( ( ( ( tm->tm_hour * 60 ) + tm->tm_min ) * 60 ) + tm->tm_sec );
-	seconds = ( ( ( ( time_t ) days_since_epoch ) * ( ( time_t ) 86400 ) ) +
-		    seconds_since_day );
-
-	DBGC ( &weekdays, "TIME %04d-%02d-%02d %02d:%02d:%02d => %lld (%s, "
-	       "day %d)\n", ( tm->tm_year + 1900 ), ( tm->tm_mon + 1 ),
-	       tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec, seconds,
-	       weekdays[ tm->tm_wday ], tm->tm_yday );
-
-	return seconds;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/timer.c ipxe-1.0.1~lliurex1505/src/core/timer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/timer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/timer.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/uri.c ipxe-1.0.1~lliurex1505/src/core/uri.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/uri.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/uri.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -31,7 +30,6 @@
 #include <libgen.h>
 #include <ctype.h>
 #include <ipxe/vsprintf.h>
-#include <ipxe/params.h>
 #include <ipxe/uri.h>
 
 /**
@@ -60,21 +58,6 @@
 		DBG ( " query \"%s\"", uri->query );
 	if ( uri->fragment )
 		DBG ( " fragment \"%s\"", uri->fragment );
-	if ( uri->params )
-		DBG ( " params \"%s\"", uri->params->name );
-}
-
-/**
- * Free URI
- *
- * @v refcnt		Reference count
- */
-static void free_uri ( struct refcnt *refcnt ) {
-	struct uri *uri = container_of ( refcnt, struct uri, refcnt );
-
-	if ( uri->params )
-		destroy_parameters ( uri->params );
-	free ( uri );
 }
 
 /**
@@ -101,25 +84,12 @@
 	uri = zalloc ( sizeof ( *uri ) + raw_len );
 	if ( ! uri )
 		return NULL;
-	ref_init ( &uri->refcnt, free_uri );
 	raw = ( ( ( char * ) uri ) + sizeof ( *uri ) );
 
 	/* Copy in the raw string */
 	memcpy ( raw, uri_string, raw_len );
 
-	/* Identify the parameter list, if present */
-	if ( ( tmp = strstr ( raw, "##params" ) ) ) {
-		*tmp = '\0';
-		tmp += 8 /* "##params" */;
-		uri->params = find_parameters ( *tmp ? ( tmp + 1 ) : NULL );
-		if ( uri->params ) {
-			claim_parameters ( uri->params );
-		} else {
-			/* Ignore non-existent submission blocks */
-		}
-	}
-
-	/* Chop off the fragment, if it exists */
+	/* Start by chopping off the fragment, if it exists */
 	if ( ( tmp = strchr ( raw, '#' ) ) ) {
 		*(tmp++) = '\0';
 		uri->fragment = tmp;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/uuid.c ipxe-1.0.1~lliurex1505/src/core/uuid.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/uuid.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/uuid.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -36,7 +35,7 @@
  * @v uuid		UUID
  * @ret string		UUID in canonical form
  */
-char * uuid_ntoa ( const union uuid *uuid ) {
+char * uuid_ntoa ( union uuid *uuid ) {
 	static char buf[37]; /* "00000000-0000-0000-0000-000000000000" */
 
 	sprintf ( buf, "%08x-%04x-%04x-%04x-%02x%02x%02x%02x%02x%02x",
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/version.c ipxe-1.0.1~lliurex1505/src/core/version.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/version.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/version.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Version number
- *
- */
-
-#include <ipxe/features.h>
-#include <ipxe/version.h>
-
-/** Version number feature */
-FEATURE_VERSION ( VERSION_MAJOR, VERSION_MINOR, VERSION_PATCH );
-
-/** Product major version */
-const int product_major_version = VERSION_MAJOR;
-
-/** Product minor version */
-const int product_minor_version = VERSION_MINOR;
-
-/** Product version string */
-const char *product_version = VERSION;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/vsprintf.c ipxe-1.0.1~lliurex1505/src/core/vsprintf.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/vsprintf.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/vsprintf.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -22,8 +21,8 @@
 #include <stddef.h>
 #include <stdarg.h>
 #include <stdio.h>
+#include <ipxe/console.h>
 #include <errno.h>
-#include <wchar.h>
 #include <ipxe/vsprintf.h>
 
 /** @file */
@@ -187,7 +186,6 @@
 	char *ptr;
 	char tmp_buf[32]; /* 32 is enough for all numerical formats.
 			   * Insane width fields could overflow this buffer. */
-	wchar_t *wptr;
 
 	/* Initialise context */
 	ctx->len = 0;
@@ -237,26 +235,11 @@
 		/* Process conversion specifier */
 		ptr = tmp_buf + sizeof ( tmp_buf ) - 1;
 		*ptr = '\0';
-		wptr = NULL;
 		if ( *fmt == 'c' ) {
-			if ( length < &type_sizes[LONG_LEN] ) {
-				cputchar ( ctx, va_arg ( args, unsigned int ) );
-			} else {
-				wchar_t wc;
-				size_t len;
-
-				wc = va_arg ( args, wint_t );
-				len = wcrtomb ( tmp_buf, wc, NULL );
-				tmp_buf[len] = '\0';
-				ptr = tmp_buf;
-			}
+			cputchar ( ctx, va_arg ( args, unsigned int ) );
 		} else if ( *fmt == 's' ) {
-			if ( length < &type_sizes[LONG_LEN] ) {
-				ptr = va_arg ( args, char * );
-			} else {
-				wptr = va_arg ( args, wchar_t * );
-			}
-			if ( ( ptr == NULL ) && ( wptr == NULL ) )
+			ptr = va_arg ( args, char * );
+			if ( ! ptr )
 				ptr = "<NULL>";
 		} else if ( *fmt == 'p' ) {
 			intptr_t ptrval;
@@ -289,17 +272,8 @@
 			*(--ptr) = *fmt;
 		}
 		/* Write out conversion result */
-		if ( wptr == NULL ) {
-			for ( ; *ptr ; ptr++ ) {
-				cputchar ( ctx, *ptr );
-			}
-		} else {
-			for ( ; *wptr ; wptr++ ) {
-				size_t len = wcrtomb ( tmp_buf, *wptr, NULL );
-				for ( ptr = tmp_buf ; len-- ; ptr++ ) {
-					cputchar ( ctx, *ptr );
-				}
-			}
+		for ( ; *ptr ; ptr++ ) {
+			cputchar ( ctx, *ptr );
 		}
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/wchar.c ipxe-1.0.1~lliurex1505/src/core/wchar.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/wchar.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/wchar.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,43 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * Wide-character strings
- *
- */
-
-#include <wchar.h>
-
-/**
- * Calculate length of wide-character string
- *
- * @v string		String
- * @ret len		Length (excluding terminating NUL)
- */
-size_t wcslen ( const wchar_t *string ) {
-	size_t len = 0;
-
-	while ( *(string++) )
-		len++;
-	return len;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/xferbuf.c ipxe-1.0.1~lliurex1505/src/core/xferbuf.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/xferbuf.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/xferbuf.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,108 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/xfer.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xferbuf.h>
-
-/** @file
- *
- * Data transfer buffer
- *
- */
-
-/**
- * Finish using data transfer buffer
- *
- * @v xferbuf		Data transfer buffer
- */
-void xferbuf_done ( struct xfer_buffer *xferbuf ) {
-	free ( xferbuf->data );
-	xferbuf->data = NULL;
-	xferbuf->len = 0;
-	xferbuf->pos = 0;
-}
-
-/**
- * Ensure that data transfer buffer is large enough for the specified size
- *
- * @v xferbuf		Data transfer buffer
- * @v len		Required minimum size
- * @ret rc		Return status code
- */
-static int xferbuf_ensure_size ( struct xfer_buffer *xferbuf, size_t len ) {
-	void *new_data;
-
-	/* If buffer is already large enough, do nothing */
-	if ( len <= xferbuf->len )
-		return 0;
-
-	/* Extend buffer */
-	new_data = realloc ( xferbuf->data, len );
-	if ( ! new_data ) {
-		DBGC ( xferbuf, "XFERBUF %p could not extend buffer to "
-		       "%zd bytes\n", xferbuf, len );
-		return -ENOSPC;
-	}
-	xferbuf->data = new_data;
-	xferbuf->len = len;
-
-	return 0;
-}
-
-/**
- * Add received data to data transfer buffer
- *
- * @v xferbuf		Data transfer buffer
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-int xferbuf_deliver ( struct xfer_buffer *xferbuf, struct io_buffer *iobuf,
-		      struct xfer_metadata *meta ) {
-	size_t len;
-	size_t max;
-	int rc;
-
-	/* Calculate new buffer position */
-	if ( meta->flags & XFER_FL_ABS_OFFSET )
-		xferbuf->pos = 0;
-	xferbuf->pos += meta->offset;
-
-	/* Ensure that we have enough buffer space for this data */
-	len = iob_len ( iobuf );
-	max = ( xferbuf->pos + len );
-	if ( ( rc = xferbuf_ensure_size ( xferbuf, max ) ) != 0 )
-		goto done;
-
-	/* Copy data to buffer */
-	memcpy ( ( xferbuf->data + xferbuf->pos ), iobuf->data, len );
-
-	/* Update current buffer position */
-	xferbuf->pos += len;
-
- done:
-	free_iob ( iobuf );
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/core/xfer.c ipxe-1.0.1~lliurex1505/src/core/xfer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/core/xfer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/core/xfer.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,12 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <string.h>
-#include <stdlib.h>
 #include <stdio.h>
 #include <errno.h>
 #include <ipxe/iobuf.h>
@@ -299,28 +297,17 @@
  */
 int xfer_vprintf ( struct interface *intf, const char *format,
 		   va_list args ) {
+	size_t len;
 	va_list args_tmp;
-	char *buf;
-	int len;
-	int rc;
 
-	/* Create temporary string */
 	va_copy ( args_tmp, args );
-	len = vasprintf ( &buf, format, args );
-	if ( len < 0 ) {
-		rc = len;
-		goto err_asprintf;
+	len = vsnprintf ( NULL, 0, format, args );
+	{
+		char buf[len + 1];
+		vsnprintf ( buf, sizeof ( buf ), format, args_tmp );
+		va_end ( args_tmp );
+		return xfer_deliver_raw ( intf, buf, len );
 	}
-	va_end ( args_tmp );
-
-	/* Transmit string */
-	if ( ( rc = xfer_deliver_raw ( intf, buf, len ) ) != 0 )
-		goto err_deliver;
-
- err_deliver:
-	free ( buf );
- err_asprintf:
-	return rc;
 }
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/aes_wrap.c ipxe-1.0.1~lliurex1505/src/crypto/aes_wrap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/aes_wrap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/aes_wrap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -49,7 +48,7 @@
 	cipher_setkey ( &aes_algorithm, aes_ctx, kek, 16 );
 
 	/* Set up */
-	memset ( A, 0xA6, 8 );
+	memset ( A, 0xA6, sizeof ( A ) );
 	memmove ( dest + 8, src, nblk * 8 );
 
 	/* Wrap */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/arc4.c ipxe-1.0.1~lliurex1505/src/crypto/arc4.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/arc4.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/arc4.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/asn1.c ipxe-1.0.1~lliurex1505/src/crypto/asn1.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/asn1.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/asn1.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,20 +13,14 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
 #include <stddef.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ctype.h>
 #include <errno.h>
-#include <time.h>
-#include <ipxe/tables.h>
 #include <ipxe/asn1.h>
 
 /** @file
@@ -48,52 +42,12 @@
 	__einfo_error ( EINFO_EINVAL_ASN1_LEN )
 #define EINFO_EINVAL_ASN1_LEN \
 	__einfo_uniqify ( EINFO_EINVAL, 0x03, "Field overruns cursor" )
-#define EINVAL_ASN1_BOOLEAN \
-	__einfo_error ( EINFO_EINVAL_ASN1_BOOLEAN )
-#define EINFO_EINVAL_ASN1_BOOLEAN \
-	__einfo_uniqify ( EINFO_EINVAL, 0x04, "Invalid boolean" )
-#define EINVAL_ASN1_INTEGER \
-	__einfo_error ( EINFO_EINVAL_ASN1_INTEGER )
-#define EINFO_EINVAL_ASN1_INTEGER \
-	__einfo_uniqify ( EINFO_EINVAL, 0x04, "Invalid integer" )
-#define EINVAL_ASN1_TIME \
-	__einfo_error ( EINFO_EINVAL_ASN1_TIME )
-#define EINFO_EINVAL_ASN1_TIME \
-	__einfo_uniqify ( EINFO_EINVAL, 0x05, "Invalid time" )
-#define EINVAL_ASN1_ALGORITHM \
-	__einfo_error ( EINFO_EINVAL_ASN1_ALGORITHM )
-#define EINFO_EINVAL_ASN1_ALGORITHM \
-	__einfo_uniqify ( EINFO_EINVAL, 0x06, "Invalid algorithm" )
-#define EINVAL_BIT_STRING \
-	__einfo_error ( EINFO_EINVAL_BIT_STRING )
-#define EINFO_EINVAL_BIT_STRING \
-	__einfo_uniqify ( EINFO_EINVAL, 0x07, "Invalid bit string" )
-#define ENOTSUP_ALGORITHM \
-	__einfo_error ( EINFO_ENOTSUP_ALGORITHM )
-#define EINFO_ENOTSUP_ALGORITHM \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01, "Unsupported algorithm" )
-#define ENOTTY_ALGORITHM \
-	__einfo_error ( EINFO_ENOTTY_ALGORITHM )
-#define EINFO_ENOTTY_ALGORITHM \
-	__einfo_uniqify ( EINFO_ENOTTY, 0x01, "Inappropriate algorithm" )
-
-/**
- * Invalidate ASN.1 object cursor
- *
- * @v cursor		ASN.1 object cursor
- */
-void asn1_invalidate_cursor ( struct asn1_cursor *cursor ) {
-	static uint8_t asn1_invalid_object[] = { ASN1_END, 0 };
-
-	cursor->data = asn1_invalid_object;
-	cursor->len = 0;
-}
 
 /**
  * Start parsing ASN.1 object
  *
  * @v cursor		ASN.1 object cursor
- * @v type		Expected type, or ASN1_ANY
+ * @v type		Expected type
  * @ret len		Length of object body, or negative error
  *
  * The object cursor will be updated to point to the start of the
@@ -113,7 +67,7 @@
 	}
 
 	/* Check the tag byte */
-	if ( ( type != ASN1_ANY ) && ( type != asn1_type ( cursor ) ) ) {
+	if ( *( ( uint8_t * ) cursor->data ) != type ) {
 		DBGC ( cursor, "ASN1 %p type mismatch (expected %d, got %d)\n",
 		       cursor, type, *( ( uint8_t * ) cursor->data ) );
 		return -ENXIO;
@@ -156,7 +110,7 @@
  * Enter ASN.1 object
  *
  * @v cursor		ASN.1 object cursor
- * @v type		Expected type, or ASN1_ANY
+ * @v type		Expected type
  * @ret rc		Return status code
  *
  * The object cursor will be updated to point to the body of the
@@ -183,7 +137,7 @@
  * Skip ASN.1 object if present
  *
  * @v cursor		ASN.1 object cursor
- * @v type		Expected type, or ASN1_ANY
+ * @v type		Expected type
  * @ret rc		Return status code
  *
  * The object cursor will be updated to point to the next ASN.1
@@ -214,7 +168,7 @@
  * Skip ASN.1 object
  *
  * @v cursor		ASN.1 object cursor
- * @v type		Expected type, or ASN1_ANY
+ * @v type		Expected type
  * @ret rc		Return status code
  *
  * The object cursor will be updated to point to the next ASN.1
@@ -224,624 +178,10 @@
 int asn1_skip ( struct asn1_cursor *cursor, unsigned int type ) {
 	int rc;
 
-	if ( ( rc = asn1_skip_if_exists ( cursor, type ) ) != 0 ) {
+	if ( ( rc = asn1_skip_if_exists ( cursor, type ) ) < 0 ) {
 		asn1_invalidate_cursor ( cursor );
 		return rc;
 	}
 
 	return 0;
 }
-
-/**
- * Shrink ASN.1 cursor to fit object
- *
- * @v cursor		ASN.1 object cursor
- * @v type		Expected type, or ASN1_ANY
- * @ret rc		Return status code
- *
- * The object cursor will be shrunk to contain only the current ASN.1
- * object.  If any error occurs, the object cursor will be
- * invalidated.
- */
-int asn1_shrink ( struct asn1_cursor *cursor, unsigned int type ) {
-	struct asn1_cursor temp;
-	const void *end;
-	int len;
-
-	/* Find end of object */
-	memcpy ( &temp, cursor, sizeof ( temp ) );
-	len = asn1_start ( &temp, type );
-	if ( len < 0 ) {
-		asn1_invalidate_cursor ( cursor );
-		return len;
-	}
-	end = ( temp.data + len );
-
-	/* Shrink original cursor to contain only its first object */
-	cursor->len = ( end - cursor->data );
-
-	return 0;
-}
-
-/**
- * Enter ASN.1 object of any type
- *
- * @v cursor		ASN.1 object cursor
- * @ret rc		Return status code
- */
-int asn1_enter_any ( struct asn1_cursor *cursor ) {
-	return asn1_enter ( cursor, ASN1_ANY );
-}
-
-/**
- * Skip ASN.1 object of any type
- *
- * @v cursor		ASN.1 object cursor
- * @ret rc		Return status code
- */
-int asn1_skip_any ( struct asn1_cursor *cursor ) {
-	return asn1_skip ( cursor, ASN1_ANY );
-}
-
-/**
- * Shrink ASN.1 object of any type
- *
- * @v cursor		ASN.1 object cursor
- * @ret rc		Return status code
- */
-int asn1_shrink_any ( struct asn1_cursor *cursor ) {
-	return asn1_shrink ( cursor, ASN1_ANY );
-}
-
-/**
- * Parse value of ASN.1 boolean
- *
- * @v cursor		ASN.1 object cursor
- * @ret value		Value, or negative error
- */
-int asn1_boolean ( const struct asn1_cursor *cursor ) {
-	struct asn1_cursor contents;
-	const struct {
-		uint8_t value;
-	} __attribute__ (( packed )) *boolean;
-
-	/* Enter boolean */
-	memcpy ( &contents, cursor, sizeof ( contents ) );
-	asn1_enter ( &contents, ASN1_BOOLEAN );
-	if ( contents.len != sizeof ( *boolean ) )
-		return -EINVAL_ASN1_BOOLEAN;
-
-	/* Extract value */
-	boolean = contents.data;
-	return boolean->value;
-}
-
-/**
- * Parse value of ASN.1 integer
- *
- * @v cursor		ASN.1 object cursor
- * @v value		Value to fill in
- * @ret rc		Return status code
- */
-int asn1_integer ( const struct asn1_cursor *cursor, int *value ) {
-	struct asn1_cursor contents;
-	uint8_t high_byte;
-	int rc;
-
-	/* Enter integer */
-	memcpy ( &contents, cursor, sizeof ( contents ) );
-	if ( ( rc = asn1_enter ( &contents, ASN1_INTEGER ) ) != 0 )
-		return rc;
-	if ( contents.len < 1 )
-		return -EINVAL_ASN1_INTEGER;
-
-	/* Initialise value according to sign byte */
-	*value = *( ( int8_t * ) contents.data );
-	contents.data++;
-	contents.len--;
-
-	/* Process value */
-	while ( contents.len ) {
-		high_byte = ( (*value) >> ( 8 * ( sizeof ( *value ) - 1 ) ) );
-		if ( ( high_byte != 0x00 ) && ( high_byte != 0xff ) ) {
-			DBGC ( cursor, "ASN1 %p integer overflow\n", cursor );
-			return -EINVAL_ASN1_INTEGER;
-		}
-		*value = ( ( *value << 8 ) | *( ( uint8_t * ) contents.data ) );
-		contents.data++;
-		contents.len--;
-	}
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 bit string
- *
- * @v cursor		ASN.1 cursor
- * @v bits		Bit string to fill in
- * @ret rc		Return status code
- */
-int asn1_bit_string ( const struct asn1_cursor *cursor,
-		      struct asn1_bit_string *bits ) {
-	struct asn1_cursor contents;
-	const struct {
-		uint8_t unused;
-		uint8_t data[0];
-	} __attribute__ (( packed )) *bit_string;
-	size_t len;
-	unsigned int unused;
-	uint8_t unused_mask;
-	const uint8_t *last;
-	int rc;
-
-	/* Enter bit string */
-	memcpy ( &contents, cursor, sizeof ( contents ) );
-	if ( ( rc = asn1_enter ( &contents, ASN1_BIT_STRING ) ) != 0 ) {
-		DBGC ( cursor, "ASN1 %p cannot locate bit string:\n", cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return rc;
-	}
-
-	/* Validity checks */
-	if ( contents.len < sizeof ( *bit_string ) ) {
-		DBGC ( cursor, "ASN1 %p invalid bit string:\n", cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_BIT_STRING;
-	}
-	bit_string = contents.data;
-	len = ( contents.len - offsetof ( typeof ( *bit_string ), data ) );
-	unused = bit_string->unused;
-	unused_mask = ( 0xff >> ( 8 - unused ) );
-	last = ( bit_string->data + len - 1 );
-	if ( ( unused >= 8 ) ||
-	     ( ( unused > 0 ) && ( len == 0 ) ) ||
-	     ( ( *last & unused_mask ) != 0 ) ) {
-		DBGC ( cursor, "ASN1 %p invalid bit string:\n", cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_BIT_STRING;
-	}
-
-	/* Populate bit string */
-	bits->data = &bit_string->data;
-	bits->len = len;
-	bits->unused = unused;
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 bit string that must be an integral number of bytes
- *
- * @v cursor		ASN.1 cursor
- * @v bits		Bit string to fill in
- * @ret rc		Return status code
- */
-int asn1_integral_bit_string ( const struct asn1_cursor *cursor,
-			       struct asn1_bit_string *bits ) {
-	int rc;
-
-	/* Parse bit string */
-	if ( ( rc = asn1_bit_string ( cursor, bits ) ) != 0 )
-		return rc;
-
-	/* Check that there are no unused bits at end of string */
-	if ( bits->unused ) {
-		DBGC ( cursor, "ASN1 %p invalid integral bit string:\n",
-		       cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_BIT_STRING;
-	}
-
-	return 0;
-}
-
-/**
- * Compare two ASN.1 objects
- *
- * @v cursor1		ASN.1 object cursor
- * @v cursor2		ASN.1 object cursor
- * @ret difference	Difference as returned by memcmp()
- *
- * Note that invalid and empty cursors will compare as equal with each
- * other.
- */
-int asn1_compare ( const struct asn1_cursor *cursor1,
-		   const struct asn1_cursor *cursor2 ) {
-	int difference;
-
-	difference = ( cursor2->len - cursor1->len );
-	return ( difference ? difference :
-		 memcmp ( cursor1->data, cursor2->data, cursor1->len ) );
-}
-
-/**
- * Identify ASN.1 algorithm by OID
- *
- * @v cursor		ASN.1 object cursor
-
- * @ret algorithm	Algorithm, or NULL
- */
-static struct asn1_algorithm *
-asn1_find_algorithm ( const struct asn1_cursor *cursor ) {
-	struct asn1_algorithm *algorithm;
-
-	for_each_table_entry ( algorithm, ASN1_ALGORITHMS ) {
-		if ( asn1_compare ( &algorithm->oid, cursor ) == 0 )
-			return algorithm;
-	}
-
-	return NULL;
-}
-
-/**
- * Parse ASN.1 OID-identified algorithm
- *
- * @v cursor		ASN.1 object cursor
- * @ret algorithm	Algorithm
- * @ret rc		Return status code
- */
-int asn1_algorithm ( const struct asn1_cursor *cursor,
-		     struct asn1_algorithm **algorithm ) {
-	struct asn1_cursor contents;
-	int rc;
-
-	/* Enter signatureAlgorithm */
-	memcpy ( &contents, cursor, sizeof ( contents ) );
-	asn1_enter ( &contents, ASN1_SEQUENCE );
-
-	/* Enter algorithm */
-	if ( ( rc = asn1_enter ( &contents, ASN1_OID ) ) != 0 ) {
-		DBGC ( cursor, "ASN1 %p cannot locate algorithm OID:\n",
-		       cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_ASN1_ALGORITHM;
-	}
-
-	/* Identify algorithm */
-	*algorithm = asn1_find_algorithm ( &contents );
-	if ( ! *algorithm ) {
-		DBGC ( cursor, "ASN1 %p unrecognised algorithm:\n", cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -ENOTSUP_ALGORITHM;
-	}
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 OID-identified public-key algorithm
- *
- * @v cursor		ASN.1 object cursor
- * @ret algorithm	Algorithm
- * @ret rc		Return status code
- */
-int asn1_pubkey_algorithm ( const struct asn1_cursor *cursor,
-			    struct asn1_algorithm **algorithm ) {
-	int rc;
-
-	/* Parse algorithm */
-	if ( ( rc = asn1_algorithm ( cursor, algorithm ) ) != 0 )
-		return rc;
-
-	/* Check algorithm has a public key */
-	if ( ! (*algorithm)->pubkey ) {
-		DBGC ( cursor, "ASN1 %p algorithm %s is not a public-key "
-		       "algorithm:\n", cursor, (*algorithm)->name );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -ENOTTY_ALGORITHM;
-	}
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 OID-identified digest algorithm
- *
- * @v cursor		ASN.1 object cursor
- * @ret algorithm	Algorithm
- * @ret rc		Return status code
- */
-int asn1_digest_algorithm ( const struct asn1_cursor *cursor,
-			    struct asn1_algorithm **algorithm ) {
-	int rc;
-
-	/* Parse algorithm */
-	if ( ( rc = asn1_algorithm ( cursor, algorithm ) ) != 0 )
-		return rc;
-
-	/* Check algorithm has a digest */
-	if ( ! (*algorithm)->digest ) {
-		DBGC ( cursor, "ASN1 %p algorithm %s is not a digest "
-		       "algorithm:\n", cursor, (*algorithm)->name );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -ENOTTY_ALGORITHM;
-	}
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 OID-identified signature algorithm
- *
- * @v cursor		ASN.1 object cursor
- * @ret algorithm	Algorithm
- * @ret rc		Return status code
- */
-int asn1_signature_algorithm ( const struct asn1_cursor *cursor,
-			       struct asn1_algorithm **algorithm ) {
-	int rc;
-
-	/* Parse algorithm */
-	if ( ( rc = asn1_algorithm ( cursor, algorithm ) ) != 0 )
-		return rc;
-
-	/* Check algorithm has a public key */
-	if ( ! (*algorithm)->pubkey ) {
-		DBGC ( cursor, "ASN1 %p algorithm %s is not a signature "
-		       "algorithm:\n", cursor, (*algorithm)->name );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -ENOTTY_ALGORITHM;
-	}
-
-	/* Check algorithm has a digest */
-	if ( ! (*algorithm)->digest ) {
-		DBGC ( cursor, "ASN1 %p algorithm %s is not a signature "
-		       "algorithm:\n", cursor, (*algorithm)->name );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -ENOTTY_ALGORITHM;
-	}
-
-	return 0;
-}
-
-/**
- * Parse ASN.1 GeneralizedTime
- *
- * @v cursor		ASN.1 cursor
- * @v time		Time to fill in
- * @ret rc		Return status code
- *
- * RFC 5280 section 4.1.2.5 places several restrictions on the allowed
- * formats for UTCTime and GeneralizedTime, and mandates the
- * interpretation of centuryless year values.
- */
-int asn1_generalized_time ( const struct asn1_cursor *cursor, time_t *time ) {
-	struct asn1_cursor contents;
-	unsigned int have_century;
-	unsigned int type;
-	union {
-		struct {
-			uint8_t century;
-			uint8_t year;
-			uint8_t month;
-			uint8_t day;
-			uint8_t hour;
-			uint8_t minute;
-			uint8_t second;
-		} __attribute__ (( packed )) named;
-		uint8_t raw[7];
-	} pairs;
-	struct tm tm;
-	const uint8_t *data;
-	size_t remaining;
-	unsigned int tens;
-	unsigned int units;
-	unsigned int i;
-	int rc;
-
-	/* Determine time format utcTime/generalizedTime */
-	memcpy ( &contents, cursor, sizeof ( contents ) );
-	type = asn1_type ( &contents );
-	switch ( type ) {
-	case ASN1_UTC_TIME:
-		have_century = 0;
-		break;
-	case ASN1_GENERALIZED_TIME:
-		have_century = 1;
-		break;
-	default:
-		DBGC ( cursor, "ASN1 %p invalid time type %02x\n",
-		       cursor, type );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_ASN1_TIME;
-	}
-
-	/* Enter utcTime/generalizedTime */
-	if ( ( rc = asn1_enter ( &contents, type ) ) != 0 ) {
-		DBGC ( cursor, "ASN1 %p cannot locate %s time:\n", cursor,
-		       ( ( type == ASN1_UTC_TIME ) ? "UTC" : "generalized" ) );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return rc;
-	}
-
-	/* Parse digit string a pair at a time */
-	memset ( &pairs, 0, sizeof ( pairs ) );
-	data = contents.data;
-	remaining = contents.len;
-	for ( i = ( have_century ? 0 : 1 ) ; i < sizeof ( pairs.raw ) ; i++ ) {
-		if ( remaining < 2 ) {
-			/* Some certificates violate the X.509 RFC by
-			 * omitting the "seconds" value.
-			 */
-			if ( i == ( sizeof ( pairs.raw ) - 1 ) )
-				break;
-			DBGC ( cursor, "ASN1 %p invalid time:\n", cursor );
-			DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-			return -EINVAL_ASN1_TIME;
-		}
-		tens = data[0];
-		units = data[1];
-		if ( ! ( isdigit ( tens ) && isdigit ( units ) ) ) {
-			DBGC ( cursor, "ASN1 %p invalid time:\n", cursor );
-			DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-			return -EINVAL_ASN1_TIME;
-		}
-		pairs.raw[i] = ( ( 10 * ( tens - '0' ) ) + ( units - '0' ) );
-		data += 2;
-		remaining -= 2;
-	}
-
-	/* Determine century if applicable */
-	if ( ! have_century )
-		pairs.named.century = ( ( pairs.named.year >= 50 ) ? 19 : 20 );
-
-	/* Check for trailing "Z" */
-	if ( ( remaining != 1 ) || ( data[0] != 'Z' ) ) {
-		DBGC ( cursor, "ASN1 %p invalid time:\n", cursor );
-		DBGC_HDA ( cursor, 0, cursor->data, cursor->len );
-		return -EINVAL_ASN1_TIME;
-	}
-
-	/* Fill in time */
-	tm.tm_year = ( ( ( pairs.named.century - 19 ) * 100 ) +
-		       pairs.named.year );
-	tm.tm_mon = ( pairs.named.month - 1 );
-	tm.tm_mday = pairs.named.day;
-	tm.tm_hour = pairs.named.hour;
-	tm.tm_min = pairs.named.minute;
-	tm.tm_sec = pairs.named.second;
-
-	/* Convert to seconds since the Epoch */
-	*time = mktime ( &tm );
-
-	return 0;
-}
-
-/**
- * Construct ASN.1 header
- *
- * @v header		ASN.1 builder header
- * @v type		Type
- * @v len		Content length
- * @ret header_len	Header length
- */
-static size_t asn1_header ( struct asn1_builder_header *header,
-			    unsigned int type, size_t len ) {
-	unsigned int header_len = 2;
-	unsigned int len_len = 0;
-	size_t temp;
-
-	/* Construct header */
-	header->type = type;
-	if ( len < 0x80 ) {
-		header->length[0] = len;
-	} else {
-		for ( temp = len ; temp ; temp >>= 8 )
-			len_len++;
-		header->length[0] = ( 0x80 | len_len );
-		header_len += len_len;
-		for ( temp = len ; temp ; temp >>= 8 )
-			header->length[len_len--] = ( temp & 0xff );
-	}
-
-	return header_len;
-}
-
-/**
- * Grow ASN.1 builder
- *
- * @v builder		ASN.1 builder
- * @v extra		Extra space to prepend
- * @ret rc		Return status code
- */
-static int asn1_grow ( struct asn1_builder *builder, size_t extra ) {
-	size_t new_len;
-	void *new;
-
-	/* As with the ASN1 parsing functions, make errors permanent */
-	if ( builder->len && ! builder->data )
-		return -ENOMEM;
-
-	/* Reallocate data buffer */
-	new_len = ( builder->len + extra );
-	new = realloc ( builder->data, new_len );
-	if ( ! new ) {
-		free ( builder->data );
-		builder->data = NULL;
-		return -ENOMEM;
-	}
-	builder->data = new;
-
-	/* Move existing data to end of buffer */
-	memmove ( ( builder->data + extra ), builder->data, builder->len );
-	builder->len = new_len;
-
-	return 0;
-}
-
-/**
- * Prepend raw data to ASN.1 builder
- *
- * @v builder		ASN.1 builder
- * @v data		Data to prepend
- * @v len		Length of data to prepend
- * @ret rc		Return status code
- */
-int asn1_prepend_raw ( struct asn1_builder *builder, const void *data,
-		       size_t len ) {
-	int rc;
-
-	/* Grow buffer */
-	if ( ( rc = asn1_grow ( builder, len ) ) != 0 )
-		return rc;
-
-	/* Populate data buffer */
-	memcpy ( builder->data, data, len );
-
-	return 0;
-}
-
-/**
- * Prepend data to ASN.1 builder
- *
- * @v builder		ASN.1 builder
- * @v type		Type
- * @v data		Data to prepend
- * @v len		Length of data to prepend
- * @ret rc		Return status code
- */
-int asn1_prepend ( struct asn1_builder *builder, unsigned int type,
-		   const void *data, size_t len ) {
-	struct asn1_builder_header header;
-	size_t header_len;
-	int rc;
-
-	/* Construct header */
-	header_len = asn1_header ( &header, type, len );
-
-	/* Grow buffer */
-	if ( ( rc = asn1_grow ( builder, header_len + len ) ) != 0 )
-		return rc;
-
-	/* Populate data buffer */
-	memcpy ( builder->data, &header, header_len );
-	memcpy ( ( builder->data + header_len ), data, len );
-
-	return 0;
-}
-
-/**
- * Wrap ASN.1 builder
- *
- * @v builder		ASN.1 builder
- * @v type		Type
- * @ret rc		Return status code
- */
-int asn1_wrap ( struct asn1_builder *builder, unsigned int type ) {
-	struct asn1_builder_header header;
-	size_t header_len;
-	int rc;
-
-	/* Construct header */
-	header_len = asn1_header ( &header, type, builder->len );
-
-	/* Grow buffer */
-	if ( ( rc = asn1_grow ( builder, header_len ) ) != 0 )
-		return rc;
-
-	/* Populate data buffer */
-	memcpy ( builder->data, &header, header_len );
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/aes.c ipxe-1.0.1~lliurex1505/src/crypto/axtls/aes.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/aes.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/aes.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,33 +1,23 @@
 /*
- * Copyright (c) 2007, Cameron Rich
+ *  Copyright(C) 2006 Cameron Rich
  *
- * All rights reserved.
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
  *
- * * Redistributions of source code must retain the above copyright notice,
- *   this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright notice,
- *   this list of conditions and the following disclaimer in the documentation
- *   and/or other materials provided with the distribution.
- * * Neither the name of the axTLS project nor the names of its contributors
- *   may be used to endorse or promote products derived from this software
- *   without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+FILE_LICENCE ( GPL2_OR_LATER );
+
 /**
  * AES implementation - this is a small code version. There are much faster
  * versions around but they are much larger in size (i.e. they use large 
@@ -35,7 +25,6 @@
  */
 
 #include <string.h>
-#include "os_port.h"
 #include "crypto.h"
 
 /* all commented out in skeleton mode */
@@ -75,6 +64,10 @@
 			(f8)^=rot2(f4), \
 			(f8)^rot1(f9))
 
+/* some macros to do endian independent byte extraction */
+#define n2l(c,l) l=ntohl(*c); c++
+#define l2n(l,c) *c++=htonl(l)
+
 /*
  * AES S-box
  */
@@ -161,15 +154,11 @@
 	0xb3,0x7d,0xfa,0xef,0xc5,0x91,
 };
 
-/* ----- static functions ----- */
-static void AES_encrypt(const AES_CTX *ctx, uint32_t *data);
-static void AES_decrypt(const AES_CTX *ctx, uint32_t *data);
-
 /* Perform doubling in Galois Field GF(2^8) using the irreducible polynomial
    x^8+x^4+x^3+x+1 */
 static unsigned char AES_xtime(uint32_t x)
 {
-	return (x&0x80) ? (x<<1)^0x1b : x<<1;
+	return x = (x&0x80) ? (x<<1)^0x1b : x<<1;
 }
 
 /**
@@ -258,7 +247,7 @@
     k = ctx->ks;
     k += 4;
 
-    for (i= ctx->rounds*4; i > 4; i--)
+    for (i=ctx->rounds*4; i>4; i--)
     {
         w= *k;
         w = inv_mix_col(w,t1,t2,t3,t4);
@@ -266,43 +255,52 @@
     }
 }
 
+#if 0
 /**
  * Encrypt a byte sequence (with a block size 16) using the AES cipher.
  */
 void AES_cbc_encrypt(AES_CTX *ctx, const uint8_t *msg, uint8_t *out, int length)
 {
-    int i;
-    uint32_t tin[4], tout[4], iv[4];
-
-    memcpy(iv, ctx->iv, AES_IV_SIZE);
-    for (i = 0; i < 4; i++)
-        tout[i] = ntohl(iv[i]);
+    uint32_t tin0, tin1, tin2, tin3;
+    uint32_t tout0, tout1, tout2, tout3;
+    uint32_t tin[4];
+    uint32_t *iv = (uint32_t *)ctx->iv;
+    uint32_t *msg_32 = (uint32_t *)msg;
+    uint32_t *out_32 = (uint32_t *)out;
+
+    n2l(iv, tout0);
+    n2l(iv, tout1);
+    n2l(iv, tout2);
+    n2l(iv, tout3);
+    iv -= 4;
 
-    for (length -= AES_BLOCKSIZE; length >= 0; length -= AES_BLOCKSIZE)
+    for (length -= 16; length >= 0; length -= 16)
     {
-        uint32_t msg_32[4];
-        uint32_t out_32[4];
-        memcpy(msg_32, msg, AES_BLOCKSIZE);
-        msg += AES_BLOCKSIZE;
-
-        for (i = 0; i < 4; i++)
-            tin[i] = ntohl(msg_32[i])^tout[i];
+        n2l(msg_32, tin0);
+        n2l(msg_32, tin1);
+        n2l(msg_32, tin2);
+        n2l(msg_32, tin3);
+        tin[0] = tin0^tout0;
+        tin[1] = tin1^tout1;
+        tin[2] = tin2^tout2;
+        tin[3] = tin3^tout3;
 
         AES_encrypt(ctx, tin);
 
-        for (i = 0; i < 4; i++)
-        {
-            tout[i] = tin[i];
-            out_32[i] = htonl(tout[i]);
-        }
-
-        memcpy(out, out_32, AES_BLOCKSIZE);
-        out += AES_BLOCKSIZE;
+        tout0 = tin[0]; 
+        l2n(tout0, out_32);
+        tout1 = tin[1]; 
+        l2n(tout1, out_32);
+        tout2 = tin[2]; 
+        l2n(tout2, out_32);
+        tout3 = tin[3]; 
+        l2n(tout3, out_32);
     }
 
-    for (i = 0; i < 4; i++)
-        iv[i] = htonl(tout[i]);
-    memcpy(ctx->iv, iv, AES_IV_SIZE);
+    l2n(tout0, iv);
+    l2n(tout1, iv);
+    l2n(tout2, iv);
+    l2n(tout3, iv);
 }
 
 /**
@@ -310,48 +308,61 @@
  */
 void AES_cbc_decrypt(AES_CTX *ctx, const uint8_t *msg, uint8_t *out, int length)
 {
-    int i;
-    uint32_t tin[4], xor[4], tout[4], data[4], iv[4];
+    uint32_t tin0, tin1, tin2, tin3;
+    uint32_t xor0,xor1,xor2,xor3;
+    uint32_t tout0,tout1,tout2,tout3;
+    uint32_t data[4];
+    uint32_t *iv = (uint32_t *)ctx->iv;
+    uint32_t *msg_32 = (uint32_t *)msg;
+    uint32_t *out_32 = (uint32_t *)out;
+
+    n2l(iv ,xor0);
+    n2l(iv, xor1);
+    n2l(iv, xor2);
+    n2l(iv, xor3);
+    iv -= 4;
 
-    memcpy(iv, ctx->iv, AES_IV_SIZE);
-    for (i = 0; i < 4; i++)
-        xor[i] = ntohl(iv[i]);
-
-    for (length -= 16; length >= 0; length -= 16)
+    for (length-=16; length >= 0; length -= 16)
     {
-        uint32_t msg_32[4];
-        uint32_t out_32[4];
-        memcpy(msg_32, msg, AES_BLOCKSIZE);
-        msg += AES_BLOCKSIZE;
-
-        for (i = 0; i < 4; i++)
-        {
-            tin[i] = ntohl(msg_32[i]);
-            data[i] = tin[i];
-        }
+        n2l(msg_32, tin0);
+        n2l(msg_32, tin1);
+        n2l(msg_32, tin2);
+        n2l(msg_32, tin3);
+
+        data[0] = tin0;
+        data[1] = tin1;
+        data[2] = tin2;
+        data[3] = tin3;
 
         AES_decrypt(ctx, data);
 
-        for (i = 0; i < 4; i++)
-        {
-            tout[i] = data[i]^xor[i];
-            xor[i] = tin[i];
-            out_32[i] = htonl(tout[i]);
-        }
-
-        memcpy(out, out_32, AES_BLOCKSIZE);
-        out += AES_BLOCKSIZE;
+        tout0 = data[0]^xor0;
+        tout1 = data[1]^xor1;
+        tout2 = data[2]^xor2;
+        tout3 = data[3]^xor3;
+
+        xor0 = tin0;
+        xor1 = tin1;
+        xor2 = tin2;
+        xor3 = tin3;
+
+        l2n(tout0, out_32);
+        l2n(tout1, out_32);
+        l2n(tout2, out_32);
+        l2n(tout3, out_32);
     }
 
-    for (i = 0; i < 4; i++)
-        iv[i] = htonl(xor[i]);
-    memcpy(ctx->iv, iv, AES_IV_SIZE);
+    l2n(xor0, iv);
+    l2n(xor1, iv);
+    l2n(xor2, iv);
+    l2n(xor3, iv);
 }
+#endif
 
 /**
  * Encrypt a single block (16 bytes) of data
  */
-static void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
+void AES_encrypt(const AES_CTX *ctx, uint32_t *data)
 {
     /* To make this code smaller, generate the sbox entries on the fly.
      * This will have a really heavy effect upon performance.
@@ -364,7 +375,9 @@
 
     /* Pre-round key addition */
     for (row = 0; row < 4; row++)
+    {
         data[row] ^= *(k++);
+    }
 
     /* Encrypt one block. */
     for (curr_rnd = 0; curr_rnd < rounds; curr_rnd++)
@@ -382,10 +395,12 @@
             {
                 tmp1 = a0 ^ a1 ^ a2 ^ a3;
                 old_a0 = a0;
+
                 a0 ^= tmp1 ^ AES_xtime(a0 ^ a1);
                 a1 ^= tmp1 ^ AES_xtime(a1 ^ a2);
                 a2 ^= tmp1 ^ AES_xtime(a2 ^ a3);
                 a3 ^= tmp1 ^ AES_xtime(a3 ^ old_a0);
+
             }
 
             tmp[row] = ((a0 << 24) | (a1 << 16) | (a2 << 8) | a3);
@@ -394,28 +409,32 @@
         /* KeyAddition - note that it is vital that this loop is separate from
            the MixColumn operation, which must be atomic...*/ 
         for (row = 0; row < 4; row++)
+        {
             data[row] = tmp[row] ^ *(k++);
+        }
     }
 }
 
 /**
  * Decrypt a single block (16 bytes) of data
  */
-static void AES_decrypt(const AES_CTX *ctx, uint32_t *data)
+void AES_decrypt(const AES_CTX *ctx, uint32_t *data)
 { 
     uint32_t tmp[4];
     uint32_t xt0,xt1,xt2,xt3,xt4,xt5,xt6;
     uint32_t a0, a1, a2, a3, row;
     int curr_rnd;
     int rounds = ctx->rounds;
-    const uint32_t *k = ctx->ks + ((rounds+1)*4);
+    uint32_t *k = (uint32_t*)ctx->ks + ((rounds+1)*4);
 
     /* pre-round key addition */
     for (row=4; row > 0;row--)
+    {
         data[row-1] ^= *(--k);
+    }
 
     /* Decrypt one block */
-    for (curr_rnd = 0; curr_rnd < rounds; curr_rnd++)
+    for (curr_rnd=0; curr_rnd < rounds; curr_rnd++)
     {
         /* Perform ByteSub and ShiftRow operations together */
         for (row = 4; row > 0; row--)
@@ -450,7 +469,9 @@
         }
 
         for (row = 4; row > 0; row--)
+        {
             data[row-1] = tmp[row-1] ^ *(--k);
+        }
     }
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint.c ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1496 @@
+/*
+ *  Copyright(C) 2006 Cameron Rich
+ *
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2.1 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
+ *
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/**
+ * @defgroup bigint_api Big Integer API
+ * @brief The bigint implementation as used by the axTLS project.
+ *
+ * The bigint library is for RSA encryption/decryption as well as signing.
+ * This code tries to minimise use of malloc/free by maintaining a small 
+ * cache. A bigint context may maintain state by being made "permanent". 
+ * It be be later released with a bi_depermanent() and bi_free() call.
+ *
+ * It supports the following reduction techniques:
+ * - Classical
+ * - Barrett
+ * - Montgomery
+ *
+ * It also implements the following:
+ * - Karatsuba multiplication
+ * - Squaring
+ * - Sliding window exponentiation
+ * - Chinese Remainder Theorem (implemented in rsa.c).
+ *
+ * All the algorithms used are pretty standard, and designed for different
+ * data bus sizes. Negative numbers are not dealt with at all, so a subtraction
+ * may need to be tested for negativity.
+ *
+ * This library steals some ideas from Jef Poskanzer
+ * <http://cs.marlboro.edu/term/cs-fall02/algorithms/crypto/RSA/bigint>
+ * and GMP <http://www.swox.com/gmp>. It gets most of its implementation
+ * detail from "The Handbook of Applied Cryptography"
+ * <http://www.cacr.math.uwaterloo.ca/hac/about/chap14.pdf>
+ * @{
+ */
+
+#include <stdlib.h>
+#include <limits.h>
+#include <string.h>
+#include <stdio.h>
+#include <time.h>
+#include "bigint.h"
+#include "crypto.h"
+
+static bigint *bi_int_multiply(BI_CTX *ctx, bigint *bi, comp i);
+static bigint *bi_int_divide(BI_CTX *ctx, bigint *biR, comp denom);
+static bigint __malloc *alloc(BI_CTX *ctx, int size);
+static bigint *trim(bigint *bi);
+static void more_comps(bigint *bi, int n);
+#if defined(CONFIG_BIGINT_KARATSUBA) || defined(CONFIG_BIGINT_BARRETT) || \
+    defined(CONFIG_BIGINT_MONTGOMERY)
+static bigint *comp_right_shift(bigint *biR, int num_shifts);
+static bigint *comp_left_shift(bigint *biR, int num_shifts);
+#endif
+
+#ifdef CONFIG_BIGINT_CHECK_ON
+static void check(const bigint *bi);
+#endif
+
+/**
+ * @brief Start a new bigint context.
+ * @return A bigint context.
+ */
+BI_CTX *bi_initialize(void)
+{
+    /* calloc() sets everything to zero */
+    BI_CTX *ctx = (BI_CTX *)calloc(1, sizeof(BI_CTX));
+   
+    /* the radix */
+    ctx->bi_radix = alloc(ctx, 2); 
+    ctx->bi_radix->comps[0] = 0;
+    ctx->bi_radix->comps[1] = 1;
+    bi_permanent(ctx->bi_radix);
+    return ctx;
+}
+
+/**
+ * @brief Close the bigint context and free any resources.
+ *
+ * Free up any used memory - a check is done if all objects were not 
+ * properly freed.
+ * @param ctx [in]   The bigint session context.
+ */
+void bi_terminate(BI_CTX *ctx)
+{
+    bigint *p, *pn;
+
+    bi_depermanent(ctx->bi_radix); 
+    bi_free(ctx, ctx->bi_radix);
+
+    if (ctx->active_count != 0)
+    {
+#ifdef CONFIG_SSL_FULL_MODE
+        printf("bi_terminate: there were %d un-freed bigints\n",
+                       ctx->active_count);
+#endif
+        abort();
+    }
+
+    for (p = ctx->free_list; p != NULL; p = pn)
+    {
+        pn = p->next;
+        free(p->comps);
+        free(p);
+    }
+
+    free(ctx);
+}
+
+/**
+ * @brief Increment the number of references to this object. 
+ * It does not do a full copy.
+ * @param bi [in]   The bigint to copy.
+ * @return A reference to the same bigint.
+ */
+bigint *bi_copy(bigint *bi)
+{
+    check(bi);
+    if (bi->refs != PERMANENT)
+        bi->refs++;
+    return bi;
+}
+
+/**
+ * @brief Simply make a bigint object "unfreeable" if bi_free() is called on it.
+ *
+ * For this object to be freed, bi_depermanent() must be called.
+ * @param bi [in]   The bigint to be made permanent.
+ */
+void bi_permanent(bigint *bi)
+{
+    check(bi);
+    if (bi->refs != 1)
+    {
+#ifdef CONFIG_SSL_FULL_MODE
+        printf("bi_permanent: refs was not 1\n");
+#endif
+        abort();
+    }
+
+    bi->refs = PERMANENT;
+}
+
+/**
+ * @brief Take a permanent object and make it eligible for freedom.
+ * @param bi [in]   The bigint to be made back to temporary.
+ */
+void bi_depermanent(bigint *bi)
+{
+    check(bi);
+    if (bi->refs != PERMANENT)
+    {
+#ifdef CONFIG_SSL_FULL_MODE
+        printf("bi_depermanent: bigint was not permanent\n");
+#endif
+        abort();
+    }
+
+    bi->refs = 1;
+}
+
+/**
+ * @brief Free a bigint object so it can be used again. 
+ *
+ * The memory itself it not actually freed, just tagged as being available 
+ * @param ctx [in]   The bigint session context.
+ * @param bi [in]    The bigint to be freed.
+ */
+void bi_free(BI_CTX *ctx, bigint *bi)
+{
+    check(bi);
+    if (bi->refs == PERMANENT)
+    {
+        return;
+    }
+
+    if (--bi->refs > 0)
+    {
+        return;
+    }
+
+    bi->next = ctx->free_list;
+    ctx->free_list = bi;
+    ctx->free_count++;
+
+    if (--ctx->active_count < 0)
+    {
+#ifdef CONFIG_SSL_FULL_MODE
+        printf("bi_free: active_count went negative "
+                "- double-freed bigint?\n");
+#endif
+        abort();
+    }
+}
+
+/**
+ * @brief Convert an (unsigned) integer into a bigint.
+ * @param ctx [in]   The bigint session context.
+ * @param i [in]     The (unsigned) integer to be converted.
+ * 
+ */
+bigint *int_to_bi(BI_CTX *ctx, comp i)
+{
+    bigint *biR = alloc(ctx, 1);
+    biR->comps[0] = i;
+    return biR;
+}
+
+/**
+ * @brief Do a full copy of the bigint object.
+ * @param ctx [in]   The bigint session context.
+ * @param bi  [in]   The bigint object to be copied.
+ */
+bigint *bi_clone(BI_CTX *ctx, const bigint *bi)
+{
+    bigint *biR = alloc(ctx, bi->size);
+    check(bi);
+    memcpy(biR->comps, bi->comps, bi->size*COMP_BYTE_SIZE);
+    return biR;
+}
+
+/**
+ * @brief Perform an addition operation between two bigints.
+ * @param ctx [in]  The bigint session context.
+ * @param bia [in]  A bigint.
+ * @param bib [in]  Another bigint.
+ * @return The result of the addition.
+ */
+bigint *bi_add(BI_CTX *ctx, bigint *bia, bigint *bib)
+{
+    int n;
+    comp carry = 0;
+    comp *pa, *pb;
+
+    check(bia);
+    check(bib);
+
+    n = max(bia->size, bib->size);
+    more_comps(bia, n+1);
+    more_comps(bib, n);
+    pa = bia->comps;
+    pb = bib->comps;
+
+    do
+    {
+        comp  sl, rl, cy1;
+        sl = *pa + *pb++;
+        rl = sl + carry;
+        cy1 = sl < *pa;
+        carry = cy1 | (rl < sl);
+        *pa++ = rl;
+    } while (--n != 0);
+
+    *pa = carry;                  /* do overflow */
+    bi_free(ctx, bib);
+    return trim(bia);
+}
+
+/**
+ * @brief Perform a subtraction operation between two bigints.
+ * @param ctx [in]  The bigint session context.
+ * @param bia [in]  A bigint.
+ * @param bib [in]  Another bigint.
+ * @param is_negative [out] If defined, indicates that the result was negative.
+ * is_negative may be null.
+ * @return The result of the subtraction. The result is always positive.
+ */
+bigint *bi_subtract(BI_CTX *ctx, 
+        bigint *bia, bigint *bib, int *is_negative)
+{
+    int n = bia->size;
+    comp *pa, *pb, carry = 0;
+
+    check(bia);
+    check(bib);
+
+    more_comps(bib, n);
+    pa = bia->comps;
+    pb = bib->comps;
+
+    do 
+    {
+        comp sl, rl, cy1;
+        sl = *pa - *pb++;
+        rl = sl - carry;
+        cy1 = sl > *pa;
+        carry = cy1 | (rl > sl);
+        *pa++ = rl;
+    } while (--n != 0);
+
+    if (is_negative)    /* indicate a negative result */
+    {
+        *is_negative = carry;
+    }
+
+    bi_free(ctx, trim(bib));    /* put bib back to the way it was */
+    return trim(bia);
+}
+
+/**
+ * Perform a multiply between a bigint an an (unsigned) integer
+ */
+static bigint *bi_int_multiply(BI_CTX *ctx, bigint *bia, comp b)
+{
+    int j = 0, n = bia->size;
+    bigint *biR = alloc(ctx, n + 1);
+    comp carry = 0;
+    comp *r = biR->comps;
+    comp *a = bia->comps;
+
+    check(bia);
+
+    /* clear things to start with */
+    memset(r, 0, ((n+1)*COMP_BYTE_SIZE));
+
+    do
+    {
+        long_comp tmp = *r + (long_comp)a[j]*b + carry;
+        *r++ = (comp)tmp;              /* downsize */
+        carry = (comp)(tmp >> COMP_BIT_SIZE);
+    } while (++j < n);
+
+    *r = carry;
+    bi_free(ctx, bia);
+    return trim(biR);
+}
+
+/**
+ * @brief Does both division and modulo calculations. 
+ *
+ * Used extensively when doing classical reduction.
+ * @param ctx [in]  The bigint session context.
+ * @param u [in]    A bigint which is the numerator.
+ * @param v [in]    Either the denominator or the modulus depending on the mode.
+ * @param is_mod [n] Determines if this is a normal division (0) or a reduction
+ * (1).
+ * @return  The result of the division/reduction.
+ */
+bigint *bi_divide(BI_CTX *ctx, bigint *u, bigint *v, int is_mod)
+{
+    int n = v->size, m = u->size-n;
+    int j = 0, orig_u_size = u->size;
+    uint8_t mod_offset = ctx->mod_offset;
+    comp d;
+    bigint *quotient, *tmp_u;
+    comp q_dash;
+
+    check(u);
+    check(v);
+
+    /* if doing reduction and we are < mod, then return mod */
+    if (is_mod && bi_compare(v, u) > 0)
+    {
+        bi_free(ctx, v);
+        return u;
+    }
+
+    quotient = alloc(ctx, m+1);
+    tmp_u = alloc(ctx, n+1);
+    v = trim(v);        /* make sure we have no leading 0's */
+    d = (comp)((long_comp)COMP_RADIX/(V1+1));
+
+    /* clear things to start with */
+    memset(quotient->comps, 0, ((quotient->size)*COMP_BYTE_SIZE));
+
+    /* normalise */
+    if (d > 1)
+    {
+        u = bi_int_multiply(ctx, u, d);
+
+        if (is_mod)
+        {
+            v = ctx->bi_normalised_mod[mod_offset];
+        }
+        else
+        {
+            v = bi_int_multiply(ctx, v, d);
+        }
+    }
+
+    if (orig_u_size == u->size)  /* new digit position u0 */
+    {
+        more_comps(u, orig_u_size + 1);
+    }
+
+    do
+    {
+        /* get a temporary short version of u */
+        memcpy(tmp_u->comps, &u->comps[u->size-n-1-j], (n+1)*COMP_BYTE_SIZE);
+
+        /* calculate q' */
+        if (U(0) == V1)
+        {
+            q_dash = COMP_RADIX-1;
+        }
+        else
+        {
+            q_dash = (comp)(((long_comp)U(0)*COMP_RADIX + U(1))/V1);
+        }
+
+        if (v->size > 1 && V2)
+        {
+            /* we are implementing the following:
+            if (V2*q_dash > (((U(0)*COMP_RADIX + U(1) - 
+                    q_dash*V1)*COMP_RADIX) + U(2))) ... */
+            comp inner = (comp)((long_comp)COMP_RADIX*U(0) + U(1) - 
+                                        (long_comp)q_dash*V1);
+            if ((long_comp)V2*q_dash > (long_comp)inner*COMP_RADIX + U(2))
+            {
+                q_dash--;
+            }
+        }
+
+        /* multiply and subtract */
+        if (q_dash)
+        {
+            int is_negative;
+            tmp_u = bi_subtract(ctx, tmp_u, 
+                    bi_int_multiply(ctx, bi_copy(v), q_dash), &is_negative);
+            more_comps(tmp_u, n+1);
+
+            Q(j) = q_dash; 
+
+            /* add back */
+            if (is_negative)
+            {
+                Q(j)--;
+                tmp_u = bi_add(ctx, tmp_u, bi_copy(v));
+
+                /* lop off the carry */
+                tmp_u->size--;
+                v->size--;
+            }
+        }
+        else
+        {
+            Q(j) = 0; 
+        }
+
+        /* copy back to u */
+        memcpy(&u->comps[u->size-n-1-j], tmp_u->comps, (n+1)*COMP_BYTE_SIZE);
+    } while (++j <= m);
+
+    bi_free(ctx, tmp_u);
+    bi_free(ctx, v);
+
+    if (is_mod)     /* get the remainder */
+    {
+        bi_free(ctx, quotient);
+        return bi_int_divide(ctx, trim(u), d);
+    }
+    else            /* get the quotient */
+    {
+        bi_free(ctx, u);
+        return trim(quotient);
+    }
+}
+
+/*
+ * Perform an integer divide on a bigint.
+ */
+static bigint *bi_int_divide(BI_CTX *ctx __unused, bigint *biR, comp denom)
+{
+    int i = biR->size - 1;
+    long_comp r = 0;
+
+    check(biR);
+
+    do
+    {
+        r = (r<<COMP_BIT_SIZE) + biR->comps[i];
+        biR->comps[i] = (comp)(r / denom);
+        r %= denom;
+    } while (--i != 0);
+
+    return trim(biR);
+}
+
+#ifdef CONFIG_BIGINT_MONTGOMERY
+/**
+ * There is a need for the value of integer N' such that B^-1(B-1)-N^-1N'=1, 
+ * where B^-1(B-1) mod N=1. Actually, only the least significant part of 
+ * N' is needed, hence the definition N0'=N' mod b. We reproduce below the 
+ * simple algorithm from an article by Dusse and Kaliski to efficiently 
+ * find N0' from N0 and b */
+static comp modular_inverse(bigint *bim)
+{
+    int i;
+    comp t = 1;
+    comp two_2_i_minus_1 = 2;   /* 2^(i-1) */
+    long_comp two_2_i = 4;      /* 2^i */
+    comp N = bim->comps[0];
+
+    for (i = 2; i <= COMP_BIT_SIZE; i++)
+    {
+        if ((long_comp)N*t%two_2_i >= two_2_i_minus_1)
+        {
+            t += two_2_i_minus_1;
+        }
+
+        two_2_i_minus_1 <<= 1;
+        two_2_i <<= 1;
+    }
+
+    return (comp)(COMP_RADIX-t);
+}
+#endif
+
+#if defined(CONFIG_BIGINT_KARATSUBA) || defined(CONFIG_BIGINT_BARRETT) || \
+    defined(CONFIG_BIGINT_MONTGOMERY)
+/**
+ * Take each component and shift down (in terms of components) 
+ */
+static bigint *comp_right_shift(bigint *biR, int num_shifts)
+{
+    int i = biR->size-num_shifts;
+    comp *x = biR->comps;
+    comp *y = &biR->comps[num_shifts];
+
+    check(biR);
+
+    if (i <= 0)     /* have we completely right shifted? */
+    {
+        biR->comps[0] = 0;  /* return 0 */
+        biR->size = 1;
+        return biR;
+    }
+
+    do
+    {
+        *x++ = *y++;
+    } while (--i > 0);
+
+    biR->size -= num_shifts;
+    return biR;
+}
+
+/**
+ * Take each component and shift it up (in terms of components) 
+ */
+static bigint *comp_left_shift(bigint *biR, int num_shifts)
+{
+    int i = biR->size-1;
+    comp *x, *y;
+
+    check(biR);
+
+    if (num_shifts <= 0)
+    {
+        return biR;
+    }
+
+    more_comps(biR, biR->size + num_shifts);
+
+    x = &biR->comps[i+num_shifts];
+    y = &biR->comps[i];
+
+    do
+    {
+        *x-- = *y--;
+    } while (i--);
+
+    memset(biR->comps, 0, num_shifts*COMP_BYTE_SIZE); /* zero LS comps */
+    return biR;
+}
+#endif
+
+/**
+ * @brief Allow a binary sequence to be imported as a bigint.
+ * @param ctx [in]  The bigint session context.
+ * @param data [in] The data to be converted.
+ * @param size [in] The number of bytes of data.
+ * @return A bigint representing this data.
+ */
+bigint *bi_import(BI_CTX *ctx, const uint8_t *data, int size)
+{
+    bigint *biR = alloc(ctx, (size+COMP_BYTE_SIZE-1)/COMP_BYTE_SIZE);
+    int i, j = 0, offset = 0;
+
+    memset(biR->comps, 0, biR->size*COMP_BYTE_SIZE);
+
+    for (i = size-1; i >= 0; i--)
+    {
+        biR->comps[offset] += data[i] << (j*8);
+
+        if (++j == COMP_BYTE_SIZE)
+        {
+            j = 0;
+            offset ++;
+        }
+    }
+
+    return trim(biR);
+}
+
+#ifdef CONFIG_SSL_FULL_MODE
+/**
+ * @brief The testharness uses this code to import text hex-streams and 
+ * convert them into bigints.
+ * @param ctx [in]  The bigint session context.
+ * @param data [in] A string consisting of hex characters. The characters must
+ * be in upper case.
+ * @return A bigint representing this data.
+ */
+bigint *bi_str_import(BI_CTX *ctx, const char *data)
+{
+    int size = strlen(data);
+    bigint *biR = alloc(ctx, (size+COMP_NUM_NIBBLES-1)/COMP_NUM_NIBBLES);
+    int i, j = 0, offset = 0;
+    memset(biR->comps, 0, biR->size*COMP_BYTE_SIZE);
+
+    for (i = size-1; i >= 0; i--)
+    {
+        int num = (data[i] <= '9') ? (data[i] - '0') : (data[i] - 'A' + 10);
+        biR->comps[offset] += num << (j*4);
+
+        if (++j == COMP_NUM_NIBBLES)
+        {
+            j = 0;
+            offset ++;
+        }
+    }
+
+    return biR;
+}
+
+void bi_print(const char *label, bigint *x)
+{
+    int i, j;
+
+    if (x == NULL)
+    {
+        printf("%s: (null)\n", label);
+        return;
+    }
+
+    printf("%s: (size %d)\n", label, x->size);
+    for (i = x->size-1; i >= 0; i--)
+    {
+        for (j = COMP_NUM_NIBBLES-1; j >= 0; j--)
+        {
+            comp mask = 0x0f << (j*4);
+            comp num = (x->comps[i] & mask) >> (j*4);
+            putc((num <= 9) ? (num + '0') : (num + 'A' - 10), stdout);
+        }
+    }  
+
+    printf("\n");
+}
+#endif
+
+/**
+ * @brief Take a bigint and convert it into a byte sequence. 
+ *
+ * This is useful after a decrypt operation.
+ * @param ctx [in]  The bigint session context.
+ * @param x [in]  The bigint to be converted.
+ * @param data [out] The converted data as a byte stream.
+ * @param size [in] The maximum size of the byte stream. Unused bytes will be
+ * zeroed.
+ */
+void bi_export(BI_CTX *ctx, bigint *x, uint8_t *data, int size)
+{
+    int i, j, k = size-1;
+
+    check(x);
+    memset(data, 0, size);  /* ensure all leading 0's are cleared */
+
+    for (i = 0; i < x->size; i++)
+    {
+        for (j = 0; j < COMP_BYTE_SIZE; j++)
+        {
+            comp mask = 0xff << (j*8);
+            int num = (x->comps[i] & mask) >> (j*8);
+            data[k--] = num;
+
+            if (k < 0)
+            {
+                break;
+            }
+        }
+    }
+
+    bi_free(ctx, x);
+}
+
+/**
+ * @brief Pre-calculate some of the expensive steps in reduction. 
+ *
+ * This function should only be called once (normally when a session starts).
+ * When the session is over, bi_free_mod() should be called. bi_mod_power()
+ * relies on this function being called.
+ * @param ctx [in]  The bigint session context.
+ * @param bim [in]  The bigint modulus that will be used.
+ * @param mod_offset [in] There are three moduluii that can be stored - the
+ * standard modulus, and its two primes p and q. This offset refers to which
+ * modulus we are referring to.
+ * @see bi_free_mod(), bi_mod_power().
+ */
+void bi_set_mod(BI_CTX *ctx, bigint *bim, int mod_offset)
+{
+    int k = bim->size;
+    comp d = (comp)((long_comp)COMP_RADIX/(bim->comps[k-1]+1));
+#ifdef CONFIG_BIGINT_MONTGOMERY
+    bigint *R, *R2;
+#endif
+
+    ctx->bi_mod[mod_offset] = bim;
+    bi_permanent(ctx->bi_mod[mod_offset]);
+    ctx->bi_normalised_mod[mod_offset] = bi_int_multiply(ctx, bim, d);
+    bi_permanent(ctx->bi_normalised_mod[mod_offset]);
+
+#if defined(CONFIG_BIGINT_MONTGOMERY)
+    /* set montgomery variables */
+    R = comp_left_shift(bi_clone(ctx, ctx->bi_radix), k-1);     /* R */
+    R2 = comp_left_shift(bi_clone(ctx, ctx->bi_radix), k*2-1);  /* R^2 */
+    ctx->bi_RR_mod_m[mod_offset] = bi_mod(ctx, R2);             /* R^2 mod m */
+    ctx->bi_R_mod_m[mod_offset] = bi_mod(ctx, R);               /* R mod m */
+
+    bi_permanent(ctx->bi_RR_mod_m[mod_offset]);
+    bi_permanent(ctx->bi_R_mod_m[mod_offset]);
+
+    ctx->N0_dash[mod_offset] = modular_inverse(ctx->bi_mod[mod_offset]);
+
+#elif defined (CONFIG_BIGINT_BARRETT)
+    ctx->bi_mu[mod_offset] = 
+        bi_divide(ctx, comp_left_shift(
+            bi_clone(ctx, ctx->bi_radix), k*2-1), ctx->bi_mod[mod_offset], 0);
+    bi_permanent(ctx->bi_mu[mod_offset]);
+#endif
+}
+
+/**
+ * @brief Used when cleaning various bigints at the end of a session.
+ * @param ctx [in]  The bigint session context.
+ * @param mod_offset [in] The offset to use.
+ * @see bi_set_mod().
+ */
+void bi_free_mod(BI_CTX *ctx, int mod_offset)
+{
+    bi_depermanent(ctx->bi_mod[mod_offset]);
+    bi_free(ctx, ctx->bi_mod[mod_offset]);
+#if defined (CONFIG_BIGINT_MONTGOMERY)
+    bi_depermanent(ctx->bi_RR_mod_m[mod_offset]);
+    bi_depermanent(ctx->bi_R_mod_m[mod_offset]);
+    bi_free(ctx, ctx->bi_RR_mod_m[mod_offset]);
+    bi_free(ctx, ctx->bi_R_mod_m[mod_offset]);
+#elif defined(CONFIG_BIGINT_BARRETT)
+    bi_depermanent(ctx->bi_mu[mod_offset]); 
+    bi_free(ctx, ctx->bi_mu[mod_offset]);
+#endif
+    bi_depermanent(ctx->bi_normalised_mod[mod_offset]); 
+    bi_free(ctx, ctx->bi_normalised_mod[mod_offset]);
+}
+
+/** 
+ * Perform a standard multiplication between two bigints.
+ */
+static bigint *regular_multiply(BI_CTX *ctx, bigint *bia, bigint *bib)
+{
+    int i, j, i_plus_j;
+    int n = bia->size; 
+    int t = bib->size;
+    bigint *biR = alloc(ctx, n + t);
+    comp *sr = biR->comps;
+    comp *sa = bia->comps;
+    comp *sb = bib->comps;
+
+    check(bia);
+    check(bib);
+
+    /* clear things to start with */
+    memset(biR->comps, 0, ((n+t)*COMP_BYTE_SIZE));
+    i = 0;
+
+    do 
+    {
+        comp carry = 0;
+        comp b = *sb++;
+        i_plus_j = i;
+        j = 0;
+
+        do
+        {
+            long_comp tmp = sr[i_plus_j] + (long_comp)sa[j]*b + carry;
+            sr[i_plus_j++] = (comp)tmp;              /* downsize */
+            carry = (comp)(tmp >> COMP_BIT_SIZE);
+        } while (++j < n);
+
+        sr[i_plus_j] = carry;
+    } while (++i < t);
+
+    bi_free(ctx, bia);
+    bi_free(ctx, bib);
+    return trim(biR);
+}
+
+#ifdef CONFIG_BIGINT_KARATSUBA
+/*
+ * Karatsuba improves on regular multiplication due to only 3 multiplications 
+ * being done instead of 4. The additional additions/subtractions are O(N) 
+ * rather than O(N^2) and so for big numbers it saves on a few operations 
+ */
+static bigint *karatsuba(BI_CTX *ctx, bigint *bia, bigint *bib, int is_square)
+{
+    bigint *x0, *x1;
+    bigint *p0, *p1, *p2;
+    int m;
+
+    if (is_square)
+    {
+        m = (bia->size + 1)/2;
+    }
+    else
+    {
+        m = (max(bia->size, bib->size) + 1)/2;
+    }
+
+    x0 = bi_clone(ctx, bia);
+    x0->size = m;
+    x1 = bi_clone(ctx, bia);
+    comp_right_shift(x1, m);
+    bi_free(ctx, bia);
+
+    /* work out the 3 partial products */
+    if (is_square)
+    {
+        p0 = bi_square(ctx, bi_copy(x0));
+        p2 = bi_square(ctx, bi_copy(x1));
+        p1 = bi_square(ctx, bi_add(ctx, x0, x1));
+    }
+    else /* normal multiply */
+    {
+        bigint *y0, *y1;
+        y0 = bi_clone(ctx, bib);
+        y0->size = m;
+        y1 = bi_clone(ctx, bib);
+        comp_right_shift(y1, m);
+        bi_free(ctx, bib);
+
+        p0 = bi_multiply(ctx, bi_copy(x0), bi_copy(y0));
+        p2 = bi_multiply(ctx, bi_copy(x1), bi_copy(y1));
+        p1 = bi_multiply(ctx, bi_add(ctx, x0, x1), bi_add(ctx, y0, y1));
+    }
+
+    p1 = bi_subtract(ctx, 
+            bi_subtract(ctx, p1, bi_copy(p2), NULL), bi_copy(p0), NULL);
+
+    comp_left_shift(p1, m);
+    comp_left_shift(p2, 2*m);
+    return bi_add(ctx, p1, bi_add(ctx, p0, p2));
+}
+#endif
+
+/**
+ * @brief Perform a multiplication operation between two bigints.
+ * @param ctx [in]  The bigint session context.
+ * @param bia [in]  A bigint.
+ * @param bib [in]  Another bigint.
+ * @return The result of the multiplication.
+ */
+bigint *bi_multiply(BI_CTX *ctx, bigint *bia, bigint *bib)
+{
+    check(bia);
+    check(bib);
+
+#ifdef CONFIG_BIGINT_KARATSUBA
+    if (min(bia->size, bib->size) < MUL_KARATSUBA_THRESH)
+    {
+        return regular_multiply(ctx, bia, bib);
+    }
+
+    return karatsuba(ctx, bia, bib, 0);
+#else
+    return regular_multiply(ctx, bia, bib);
+#endif
+}
+
+#ifdef CONFIG_BIGINT_SQUARE
+/*
+ * Perform the actual square operion. It takes into account overflow.
+ */
+static bigint *regular_square(BI_CTX *ctx, bigint *bi)
+{
+    int t = bi->size;
+    int i = 0, j;
+    bigint *biR = alloc(ctx, t*2);
+    comp *w = biR->comps;
+    comp *x = bi->comps;
+    comp carry;
+
+    memset(w, 0, biR->size*COMP_BYTE_SIZE);
+
+    do
+    {
+        long_comp tmp = w[2*i] + (long_comp)x[i]*x[i];
+        comp u = 0;
+        w[2*i] = (comp)tmp;
+        carry = (comp)(tmp >> COMP_BIT_SIZE);
+
+        for (j = i+1; j < t; j++)
+        {
+            long_comp xx = (long_comp)x[i]*x[j];
+            long_comp blob = (long_comp)w[i+j]+carry;
+
+            if (u)                  /* previous overflow */
+            {
+                blob += COMP_RADIX;
+            }
+
+            u = 0;
+            if (xx & COMP_BIG_MSB)  /* check for overflow */
+            {
+                u = 1;
+            }
+
+            tmp = 2*xx + blob;
+            w[i+j] = (comp)tmp;
+            carry = (comp)(tmp >> COMP_BIT_SIZE);
+        }
+
+        w[i+t] += carry;
+
+        if (u)
+        {
+            w[i+t+1] = 1;   /* add carry */
+        }
+    } while (++i < t);
+
+    bi_free(ctx, bi);
+    return trim(biR);
+}
+
+/**
+ * @brief Perform a square operation on a bigint.
+ * @param ctx [in]  The bigint session context.
+ * @param bia [in]  A bigint.
+ * @return The result of the multiplication.
+ */
+bigint *bi_square(BI_CTX *ctx, bigint *bia)
+{
+    check(bia);
+
+#ifdef CONFIG_BIGINT_KARATSUBA
+    if (bia->size < SQU_KARATSUBA_THRESH) 
+    {
+        return regular_square(ctx, bia);
+    }
+
+    return karatsuba(ctx, bia, NULL, 1);
+#else
+    return regular_square(ctx, bia);
+#endif
+}
+#endif
+
+/**
+ * @brief Compare two bigints.
+ * @param bia [in]  A bigint.
+ * @param bib [in]  Another bigint.
+ * @return -1 if smaller, 1 if larger and 0 if equal.
+ */
+int bi_compare(bigint *bia, bigint *bib)
+{
+    int r, i;
+
+    check(bia);
+    check(bib);
+
+    if (bia->size > bib->size)
+        r = 1;
+    else if (bia->size < bib->size)
+        r = -1;
+    else
+    {
+        comp *a = bia->comps; 
+        comp *b = bib->comps; 
+
+        /* Same number of components.  Compare starting from the high end
+         * and working down. */
+        r = 0;
+        i = bia->size - 1;
+
+        do 
+        {
+            if (a[i] > b[i])
+            { 
+                r = 1;
+                break; 
+            }
+            else if (a[i] < b[i])
+            { 
+                r = -1;
+                break; 
+            }
+        } while (--i >= 0);
+    }
+
+    return r;
+}
+
+/*
+ * Allocate and zero more components.  Does not consume bi. 
+ */
+static void more_comps(bigint *bi, int n)
+{
+    if (n > bi->max_comps)
+    {
+        bi->max_comps = max(bi->max_comps * 2, n);
+        bi->comps = (comp*)realloc(bi->comps, bi->max_comps * COMP_BYTE_SIZE);
+    }
+
+    if (n > bi->size)
+    {
+        memset(&bi->comps[bi->size], 0, (n-bi->size)*COMP_BYTE_SIZE);
+    }
+
+    bi->size = n;
+}
+
+/*
+ * Make a new empty bigint. It may just use an old one if one is available.
+ * Otherwise get one off the heap.
+ */
+static bigint *alloc(BI_CTX *ctx, int size)
+{
+    bigint *biR;
+
+    /* Can we recycle an old bigint? */
+    if (ctx->free_list != NULL)
+    {
+        biR = ctx->free_list;
+        ctx->free_list = biR->next;
+        ctx->free_count--;
+
+        if (biR->refs != 0)
+        {
+#ifdef CONFIG_SSL_FULL_MODE
+            printf("alloc: refs was not 0\n");
+#endif
+            abort();    /* create a stack trace from a core dump */
+        }
+
+        more_comps(biR, size);
+    }
+    else
+    {
+        /* No free bigints available - create a new one. */
+        biR = (bigint *)malloc(sizeof(bigint));
+        biR->comps = (comp*)malloc(size * COMP_BYTE_SIZE);
+        biR->max_comps = size;  /* give some space to spare */
+    }
+
+    biR->size = size;
+    biR->refs = 1;
+    biR->next = NULL;
+    ctx->active_count++;
+    return biR;
+}
+
+/*
+ * Work out the highest '1' bit in an exponent. Used when doing sliding-window
+ * exponentiation.
+ */
+static int find_max_exp_index(bigint *biexp)
+{
+    int i = COMP_BIT_SIZE-1;
+    comp shift = COMP_RADIX/2;
+    comp test = biexp->comps[biexp->size-1];    /* assume no leading zeroes */
+
+    check(biexp);
+
+    do
+    {
+        if (test & shift)
+        {
+            return i+(biexp->size-1)*COMP_BIT_SIZE;
+        }
+
+        shift >>= 1;
+    } while (--i != 0);
+
+    return -1;      /* error - must have been a leading 0 */
+}
+
+/*
+ * Is a particular bit is an exponent 1 or 0? Used when doing sliding-window
+ * exponentiation.
+ */
+static int exp_bit_is_one(bigint *biexp, int offset)
+{
+    comp test = biexp->comps[offset / COMP_BIT_SIZE];
+    int num_shifts = offset % COMP_BIT_SIZE;
+    comp shift = 1;
+    int i;
+
+    check(biexp);
+
+    for (i = 0; i < num_shifts; i++)
+    {
+        shift <<= 1;
+    }
+
+    return test & shift;
+}
+
+#ifdef CONFIG_BIGINT_CHECK_ON
+/*
+ * Perform a sanity check on bi.
+ */
+static void check(const bigint *bi)
+{
+    if (bi->refs <= 0)
+    {
+        printf("check: zero or negative refs in bigint\n");
+        abort();
+    }
+
+    if (bi->next != NULL)
+    {
+        printf("check: attempt to use a bigint from "
+                "the free list\n");
+        abort();
+    }
+}
+#endif
+
+/*
+ * Delete any leading 0's (and allow for 0).
+ */
+static bigint *trim(bigint *bi)
+{
+    check(bi);
+
+    while (bi->comps[bi->size-1] == 0 && bi->size > 1)
+    {
+        bi->size--;
+    }
+
+    return bi;
+}
+
+#if defined(CONFIG_BIGINT_MONTGOMERY)
+/**
+ * @brief Perform a single montgomery reduction.
+ * @param ctx [in]  The bigint session context.
+ * @param bixy [in]  A bigint.
+ * @return The result of the montgomery reduction.
+ */
+bigint *bi_mont(BI_CTX *ctx, bigint *bixy)
+{
+    int i = 0, n;
+    uint8_t mod_offset = ctx->mod_offset;
+    bigint *bim = ctx->bi_mod[mod_offset];
+    comp mod_inv = ctx->N0_dash[mod_offset];
+
+    check(bixy);
+
+    if (ctx->use_classical)     /* just use classical instead */
+    {
+        return bi_mod(ctx, bixy);
+    }
+
+    n = bim->size;
+
+    do
+    {
+        bixy = bi_add(ctx, bixy, comp_left_shift(
+                    bi_int_multiply(ctx, bim, bixy->comps[i]*mod_inv), i));
+    } while (++i < n);
+
+    comp_right_shift(bixy, n);
+
+    if (bi_compare(bixy, bim) >= 0)
+    {
+        bixy = bi_subtract(ctx, bixy, bim, NULL);
+    }
+
+    return bixy;
+}
+
+#elif defined(CONFIG_BIGINT_BARRETT)
+/*
+ * Stomp on the most significant components to give the illusion of a "mod base
+ * radix" operation 
+ */
+static bigint *comp_mod(bigint *bi, int mod)
+{
+    check(bi);
+
+    if (bi->size > mod)
+    {
+        bi->size = mod;
+    }
+
+    return bi;
+}
+
+/*
+ * Barrett reduction has no need for some parts of the product, so ignore bits
+ * of the multiply. This routine gives Barrett its big performance
+ * improvements over Classical/Montgomery reduction methods. 
+ */
+static bigint *partial_multiply(BI_CTX *ctx, bigint *bia, bigint *bib, 
+        int inner_partial, int outer_partial)
+{
+    int i = 0, j, n = bia->size, t = bib->size;
+    bigint *biR;
+    comp carry;
+    comp *sr, *sa, *sb;
+
+    check(bia);
+    check(bib);
+
+    biR = alloc(ctx, n + t);
+    sa = bia->comps;
+    sb = bib->comps;
+    sr = biR->comps;
+
+    if (inner_partial)
+    {
+        memset(sr, 0, inner_partial*COMP_BYTE_SIZE); 
+    }
+    else    /* outer partial */
+    {
+        if (n < outer_partial || t < outer_partial) /* should we bother? */
+        {
+            bi_free(ctx, bia);
+            bi_free(ctx, bib);
+            biR->comps[0] = 0;      /* return 0 */
+            biR->size = 1;
+            return biR;
+        }
+
+        memset(&sr[outer_partial], 0, (n+t-outer_partial)*COMP_BYTE_SIZE);
+    }
+
+    do 
+    {
+        comp *a = sa;
+        comp b = *sb++;
+        long_comp tmp;
+        int i_plus_j = i;
+        carry = 0;
+        j = n;
+
+        if (outer_partial && i_plus_j < outer_partial)
+        {
+            i_plus_j = outer_partial;
+            a = &sa[outer_partial-i];
+            j = n-(outer_partial-i);
+        }
+
+        do
+        {
+            if (inner_partial && i_plus_j >= inner_partial) 
+            {
+                break;
+            }
+
+            tmp = sr[i_plus_j] + ((long_comp)*a++)*b + carry;
+            sr[i_plus_j++] = (comp)tmp;              /* downsize */
+            carry = (comp)(tmp >> COMP_BIT_SIZE);
+        } while (--j != 0);
+
+        sr[i_plus_j] = carry;
+    } while (++i < t);
+
+    bi_free(ctx, bia);
+    bi_free(ctx, bib);
+    return trim(biR);
+}
+
+/**
+ * @brief Perform a single Barrett reduction.
+ * @param ctx [in]  The bigint session context.
+ * @param bi [in]  A bigint.
+ * @return The result of the Barrett reduction.
+ */
+bigint *bi_barrett(BI_CTX *ctx, bigint *bi)
+{
+    bigint *q1, *q2, *q3, *r1, *r2, *r;
+    uint8_t mod_offset = ctx->mod_offset;
+    bigint *bim = ctx->bi_mod[mod_offset];
+    int k = bim->size;
+
+    check(bi);
+    check(bim);
+
+    /* use Classical method instead  - Barrett cannot help here */
+    if (bi->size > k*2)
+    {
+        return bi_mod(ctx, bi);
+    }
+
+    q1 = comp_right_shift(bi_clone(ctx, bi), k-1);
+
+    /* do outer partial multiply */
+    q2 = partial_multiply(ctx, q1, ctx->bi_mu[mod_offset], 0, k-1); 
+    q3 = comp_right_shift(q2, k+1);
+    r1 = comp_mod(bi, k+1);
+
+    /* do inner partial multiply */
+    r2 = comp_mod(partial_multiply(ctx, q3, bim, k+1, 0), k+1);
+    r = bi_subtract(ctx, r1, r2, NULL);
+
+    /* if (r >= m) r = r - m; */
+    if (bi_compare(r, bim) >= 0)
+    {
+        r = bi_subtract(ctx, r, bim, NULL);
+    }
+
+    return r;
+}
+#endif /* CONFIG_BIGINT_BARRETT */
+
+#ifdef CONFIG_BIGINT_SLIDING_WINDOW
+/*
+ * Work out g1, g3, g5, g7... etc for the sliding-window algorithm 
+ */
+static void precompute_slide_window(BI_CTX *ctx, int window, bigint *g1)
+{
+    int k = 1, i;
+    bigint *g2;
+
+    for (i = 0; i < window-1; i++)   /* compute 2^(window-1) */
+    {
+        k <<= 1;
+    }
+
+    ctx->g = (bigint **)malloc(k*sizeof(bigint *));
+    ctx->g[0] = bi_clone(ctx, g1);
+    bi_permanent(ctx->g[0]);
+    g2 = bi_residue(ctx, bi_square(ctx, ctx->g[0]));   /* g^2 */
+
+    for (i = 1; i < k; i++)
+    {
+        ctx->g[i] = bi_residue(ctx, bi_multiply(ctx, ctx->g[i-1], bi_copy(g2)));
+        bi_permanent(ctx->g[i]);
+    }
+
+    bi_free(ctx, g2);
+    ctx->window = k;
+}
+#endif
+
+/**
+ * @brief Perform a modular exponentiation.
+ *
+ * This function requires bi_set_mod() to have been called previously. This is 
+ * one of the optimisations used for performance.
+ * @param ctx [in]  The bigint session context.
+ * @param bi  [in]  The bigint on which to perform the mod power operation.
+ * @param biexp [in] The bigint exponent.
+ * @see bi_set_mod().
+ */
+bigint *bi_mod_power(BI_CTX *ctx, bigint *bi, bigint *biexp)
+{
+    int i = find_max_exp_index(biexp), j, window_size = 1;
+    bigint *biR = int_to_bi(ctx, 1);
+
+#if defined(CONFIG_BIGINT_MONTGOMERY)
+    uint8_t mod_offset = ctx->mod_offset;
+    if (!ctx->use_classical)
+    {
+        /* preconvert */
+        bi = bi_mont(ctx, 
+                bi_multiply(ctx, bi, ctx->bi_RR_mod_m[mod_offset]));    /* x' */
+        bi_free(ctx, biR);
+        biR = ctx->bi_R_mod_m[mod_offset];                              /* A */
+    }
+#endif
+
+    check(bi);
+    check(biexp);
+
+#ifdef CONFIG_BIGINT_SLIDING_WINDOW
+    for (j = i; j > 32; j /= 5) /* work out an optimum size */
+        window_size++;
+
+    /* work out the slide constants */
+    precompute_slide_window(ctx, window_size, bi);
+#else   /* just one constant */
+    ctx->g = (bigint **)malloc(sizeof(bigint *));
+    ctx->g[0] = bi_clone(ctx, bi);
+    ctx->window = 1;
+    bi_permanent(ctx->g[0]);
+#endif
+
+    /* if sliding-window is off, then only one bit will be done at a time and
+     * will reduce to standard left-to-right exponentiation */
+    do
+    {
+        if (exp_bit_is_one(biexp, i))
+        {
+            int l = i-window_size+1;
+            int part_exp = 0;
+
+            if (l < 0)  /* LSB of exponent will always be 1 */
+                l = 0;
+            else
+            {
+                while (exp_bit_is_one(biexp, l) == 0)
+                    l++;    /* go back up */
+            }
+
+            /* build up the section of the exponent */
+            for (j = i; j >= l; j--)
+            {
+                biR = bi_residue(ctx, bi_square(ctx, biR));
+                if (exp_bit_is_one(biexp, j))
+                    part_exp++;
+
+                if (j != l)
+                    part_exp <<= 1;
+            }
+
+            part_exp = (part_exp-1)/2;  /* adjust for array */
+            biR = bi_residue(ctx, bi_multiply(ctx, biR, ctx->g[part_exp]));
+            i = l-1;
+        }
+        else    /* square it */
+        {
+            biR = bi_residue(ctx, bi_square(ctx, biR));
+            i--;
+        }
+    } while (i >= 0);
+     
+    /* cleanup */
+    for (i = 0; i < ctx->window; i++)
+    {
+        bi_depermanent(ctx->g[i]);
+        bi_free(ctx, ctx->g[i]);
+    }
+
+    free(ctx->g);
+    bi_free(ctx, bi);
+    bi_free(ctx, biexp);
+#if defined CONFIG_BIGINT_MONTGOMERY
+    return ctx->use_classical ? biR : bi_mont(ctx, biR); /* convert back */
+#else /* CONFIG_BIGINT_CLASSICAL or CONFIG_BIGINT_BARRETT */
+    return biR;
+#endif
+}
+
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+/**
+ * @brief Perform a modular exponentiation using a temporary modulus.
+ *
+ * We need this function to check the signatures of certificates. The modulus
+ * of this function is temporary as it's just used for authentication.
+ * @param ctx [in]  The bigint session context.
+ * @param bi  [in]  The bigint to perform the exp/mod.
+ * @param bim [in]  The temporary modulus.
+ * @param biexp [in] The bigint exponent.
+ * @see bi_set_mod().
+ */
+bigint *bi_mod_power2(BI_CTX *ctx, bigint *bi, bigint *bim, bigint *biexp)
+{
+    bigint *biR, *tmp_biR;
+
+    /* Set up a temporary bigint context and transfer what we need between
+     * them. We need to do this since we want to keep the original modulus
+     * which is already in this context. This operation is only called when
+     * doing peer verification, and so is not expensive :-) */
+    BI_CTX *tmp_ctx = bi_initialize();
+    bi_set_mod(tmp_ctx, bi_clone(tmp_ctx, bim), BIGINT_M_OFFSET);
+    tmp_biR = bi_mod_power(tmp_ctx, 
+                bi_clone(tmp_ctx, bi), 
+                bi_clone(tmp_ctx, biexp));
+    biR = bi_clone(ctx, tmp_biR);
+    bi_free(tmp_ctx, tmp_biR);
+    bi_free_mod(tmp_ctx, BIGINT_M_OFFSET);
+    bi_terminate(tmp_ctx);
+
+    bi_free(ctx, bi);
+    bi_free(ctx, bim);
+    bi_free(ctx, biexp);
+    return biR;
+}
+#endif
+/** @} */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint.h ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,43 +1,44 @@
 /*
- * Copyright (c) 2007, Cameron Rich
+ *  Copyright(C) 2006 Cameron Rich
  *
- * All rights reserved.
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
  *
- * * Redistributions of source code must retain the above copyright notice,
- *   this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright notice,
- *   this list of conditions and the following disclaimer in the documentation
- *   and/or other materials provided with the distribution.
- * * Neither the name of the axTLS project nor the names of its contributors
- *   may be used to endorse or promote products derived from this software
- *   without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+FILE_LICENCE ( GPL2_OR_LATER );
+
 #ifndef BIGINT_HEADER
 #define BIGINT_HEADER
 
-#include "crypto.h"
+/* enable features based on a 'super-set' capbaility. */
+#if defined(CONFIG_SSL_FULL_MODE) 
+#define CONFIG_SSL_ENABLE_CLIENT
+#define CONFIG_SSL_CERT_VERIFICATION
+#elif defined(CONFIG_SSL_ENABLE_CLIENT)
+#define CONFIG_SSL_CERT_VERIFICATION
+#endif
+
+#include "os_port.h"
+#include "bigint_impl.h"
 
+#ifndef CONFIG_BIGINT_CHECK_ON
+#define check(A)                /**< disappears in normal production mode */
+#endif
 BI_CTX *bi_initialize(void);
 void bi_terminate(BI_CTX *ctx);
 void bi_permanent(bigint *bi);
 void bi_depermanent(bigint *bi);
-void bi_clear_cache(BI_CTX *ctx);
 void bi_free(BI_CTX *ctx, bigint *bi);
 bigint *bi_copy(bigint *bi);
 bigint *bi_clone(BI_CTX *ctx, const bigint *bi);
@@ -89,11 +90,4 @@
 #define bi_square(A, B)     bi_multiply(A, bi_copy(B), B)
 #endif
 
-#ifdef CONFIG_BIGINT_CRT
-bigint *bi_crt(BI_CTX *ctx, bigint *bi,
-        bigint *dP, bigint *dQ,
-        bigint *p, bigint *q,
-        bigint *qInv);
-#endif
-
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint_impl.h ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint_impl.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/bigint_impl.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/bigint_impl.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,31 +1,19 @@
 /*
- * Copyright (c) 2007, Cameron Rich
+ *  Copyright(C) 2006 Cameron Rich
  *
- * All rights reserved.
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2.1 of the License, or
+ *  (at your option) any later version.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
  *
- * * Redistributions of source code must retain the above copyright notice,
- *   this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright notice,
- *   this list of conditions and the following disclaimer in the documentation
- *   and/or other materials provided with the distribution.
- * * Neither the name of the axTLS project nor the names of its contributors
- *   may be used to endorse or promote products derived from this software
- *   without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
 #ifndef BIGINT_IMPL_HEADER
@@ -42,39 +30,20 @@
 #endif
 
 /* Architecture specific functions for big ints */
-#if defined(CONFIG_INTEGER_8BIT)
-#define COMP_RADIX          256U       /**< Max component + 1 */
-#define COMP_MAX            0xFFFFU/**< (Max dbl comp -1) */
-#define COMP_BIT_SIZE       8   /**< Number of bits in a component. */
-#define COMP_BYTE_SIZE      1   /**< Number of bytes in a component. */
-#define COMP_NUM_NIBBLES    2   /**< Used For diagnostics only. */
-typedef uint8_t comp;	        /**< A single precision component. */
-typedef uint16_t long_comp;     /**< A double precision component. */
-typedef int16_t slong_comp;     /**< A signed double precision component. */
-#elif defined(CONFIG_INTEGER_16BIT)
-#define COMP_RADIX          65536U       /**< Max component + 1 */
-#define COMP_MAX            0xFFFFFFFFU/**< (Max dbl comp -1) */
-#define COMP_BIT_SIZE       16  /**< Number of bits in a component. */
-#define COMP_BYTE_SIZE      2   /**< Number of bytes in a component. */
-#define COMP_NUM_NIBBLES    4   /**< Used For diagnostics only. */
-typedef uint16_t comp;	        /**< A single precision component. */
-typedef uint32_t long_comp;     /**< A double precision component. */
-typedef int32_t slong_comp;     /**< A signed double precision component. */
-#else /* regular 32 bit */
 #ifdef WIN32
 #define COMP_RADIX          4294967296i64         
-#define COMP_MAX            0xFFFFFFFFFFFFFFFFui64
+#define COMP_BIG_MSB        0x8000000000000000i64 
 #else
 #define COMP_RADIX          4294967296ULL         /**< Max component + 1 */
-#define COMP_MAX            0xFFFFFFFFFFFFFFFFULL/**< (Max dbl comp -1) */
+#define COMP_BIG_MSB        0x8000000000000000ULL /**< (Max dbl comp + 1)/ 2 */
 #endif
 #define COMP_BIT_SIZE       32  /**< Number of bits in a component. */
 #define COMP_BYTE_SIZE      4   /**< Number of bytes in a component. */
 #define COMP_NUM_NIBBLES    8   /**< Used For diagnostics only. */
+
 typedef uint32_t comp;	        /**< A single precision component. */
 typedef uint64_t long_comp;     /**< A double precision component. */
 typedef int64_t slong_comp;     /**< A signed double precision component. */
-#endif
 
 /**
  * @struct  _bigint
@@ -128,4 +97,9 @@
 
 #define PERMANENT           0x7FFF55AA  /**< A magic number for permanents. */
 
+#define V1      v->comps[v->size-1]                 /**< v1 for division */
+#define V2      v->comps[v->size-2]                 /**< v2 for division */
+#define U(j)    tmp_u->comps[tmp_u->size-j-1]       /**< uj for division */
+#define Q(j)    quotient->comps[quotient->size-j-1] /**< qj for division */
+
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/config.h ipxe-1.0.1~lliurex1505/src/crypto/axtls/config.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/config.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/config.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,13 +0,0 @@
-#ifndef AXTLS_CONFIG_H
-#define AXTLS_CONFIG_H
-
-/**
- * @file config.h
- *
- * Trick the axtls code into building within our build environment.
- */
-
-#define CONFIG_SSL_ENABLE_CLIENT 1
-#define CONFIG_BIGINT_CLASSICAL 1
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/crypto.h ipxe-1.0.1~lliurex1505/src/crypto/axtls/crypto.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/crypto.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/crypto.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,33 +1,23 @@
 /*
- * Copyright (c) 2007, Cameron Rich
+ *  Copyright(C) 2006 Cameron Rich
  *
- * All rights reserved.
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
  *
- * * Redistributions of source code must retain the above copyright notice,
- *   this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright notice,
- *   this list of conditions and the following disclaimer in the documentation
- *   and/or other materials provided with the distribution.
- * * Neither the name of the axTLS project nor the names of its contributors
- *   may be used to endorse or promote products derived from this software
- *   without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
- * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
- * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
- * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
- * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
+FILE_LICENCE ( GPL2_OR_LATER );
+
 /**
  * @file crypto.h
  */
@@ -39,40 +29,20 @@
 extern "C" {
 #endif
 
-#include "config.h"
-#include "bigint_impl.h"
 #include "bigint.h"
 
-#ifndef STDCALL
-#define STDCALL
-#endif
-#ifndef EXP_FUNC
-#define EXP_FUNC
-#endif
-
-
-/* enable features based on a 'super-set' capbaility. */
-#if defined(CONFIG_SSL_FULL_MODE)
-#define CONFIG_SSL_ENABLE_CLIENT
-#define CONFIG_SSL_CERT_VERIFICATION
-#elif defined(CONFIG_SSL_ENABLE_CLIENT)
-#define CONFIG_SSL_CERT_VERIFICATION
-#endif
-
 /**************************************************************************
  * AES declarations 
  **************************************************************************/
 
 #define AES_MAXROUNDS			14
-#define AES_BLOCKSIZE           16
-#define AES_IV_SIZE             16
 
 typedef struct aes_key_st 
 {
     uint16_t rounds;
     uint16_t key_size;
     uint32_t ks[(AES_MAXROUNDS+1)*8];
-    uint8_t iv[AES_IV_SIZE];
+    uint8_t iv[16];
 } AES_CTX;
 
 typedef enum
@@ -87,6 +57,8 @@
         uint8_t *out, int length);
 void AES_cbc_decrypt(AES_CTX *ks, const uint8_t *in, uint8_t *out, int length);
 void AES_convert_key(AES_CTX *ctx);
+void AES_encrypt(const AES_CTX *ctx, uint32_t *data);
+void AES_decrypt(const AES_CTX *ctx, uint32_t *data);
 
 /**************************************************************************
  * RC4 declarations 
@@ -94,7 +66,7 @@
 
 typedef struct 
 {
-    uint8_t x, y, m[256];
+    int x, y, m[256];
 } RC4_CTX;
 
 void RC4_setup(RC4_CTX *s, const uint8_t *key, int length);
@@ -112,38 +84,22 @@
  */
 typedef struct 
 {
-    uint32_t Intermediate_Hash[SHA1_SIZE/4]; /* Message Digest */
-    uint32_t Length_Low;            /* Message length in bits */
-    uint32_t Length_High;           /* Message length in bits */
+    uint32_t Intermediate_Hash[SHA1_SIZE/4]; /* Message Digest  */
+    uint32_t Length_Low;            /* Message length in bits      */
+    uint32_t Length_High;           /* Message length in bits      */
     uint16_t Message_Block_Index;   /* Index into message block array   */
-    uint8_t Message_Block[64];      /* 512-bit message blocks */
+    uint8_t Message_Block[64];      /* 512-bit message blocks      */
 } SHA1_CTX;
 
-void SHA1_Init(SHA1_CTX *);
-void SHA1_Update(SHA1_CTX *, const uint8_t * msg, int len);
-void SHA1_Final(uint8_t *digest, SHA1_CTX *);
+void SHA1Init(SHA1_CTX *);
+void SHA1Update(SHA1_CTX *, const uint8_t * msg, int len);
+void SHA1Final(SHA1_CTX *, uint8_t *digest);
 
 /**************************************************************************
- * MD2 declarations
+ * MD5 declarations 
  **************************************************************************/
 
-#define MD2_SIZE 16
-
-typedef struct
-{
-    unsigned char cksum[16];    /* checksum of the data block */
-    unsigned char state[48];    /* intermediate digest state */
-    unsigned char buffer[16];   /* data block being processed */
-    int left;                   /* amount of data in buffer */
-} MD2_CTX;
-
-EXP_FUNC void STDCALL MD2_Init(MD2_CTX *ctx);
-EXP_FUNC void STDCALL MD2_Update(MD2_CTX *ctx, const uint8_t *input, int ilen);
-EXP_FUNC void STDCALL MD2_Final(uint8_t *digest, MD2_CTX *ctx);
-
-/**************************************************************************
- * MD5 declarations
- **************************************************************************/
+/* MD5 context. */
 
 #define MD5_SIZE    16
 
@@ -154,9 +110,9 @@
   uint8_t buffer[64];       /* input buffer */
 } MD5_CTX;
 
-EXP_FUNC void STDCALL MD5_Init(MD5_CTX *);
-EXP_FUNC void STDCALL MD5_Update(MD5_CTX *, const uint8_t *msg, int len);
-EXP_FUNC void STDCALL MD5_Final(uint8_t *digest, MD5_CTX *);
+void MD5Init(MD5_CTX *);
+void MD5Update(MD5_CTX *, const uint8_t *msg, int len);
+void MD5Final(MD5_CTX *, uint8_t *digest);
 
 /**************************************************************************
  * HMAC declarations 
@@ -167,6 +123,19 @@
         int key_len, uint8_t *digest);
 
 /**************************************************************************
+ * RNG declarations 
+ **************************************************************************/
+void RNG_initialize(const uint8_t *seed_buf, int size);
+void RNG_terminate(void);
+void get_random(int num_rand_bytes, uint8_t *rand_data);
+//void get_random_NZ(int num_rand_bytes, uint8_t *rand_data);
+
+#include <string.h>
+static inline void get_random_NZ(int num_rand_bytes, uint8_t *rand_data) {
+	memset ( rand_data, 0x01, num_rand_bytes );
+}
+
+/**************************************************************************
  * RSA declarations 
  **************************************************************************/
 
@@ -183,6 +152,7 @@
     bigint *qInv;           /* q^-1 mod p */
 #endif
     int num_octets;
+    bigint *sig_m;         /* signature modulus */
     BI_CTX *bi_ctx;
 } RSA_CTX;
 
@@ -205,22 +175,125 @@
 int RSA_decrypt(const RSA_CTX *ctx, const uint8_t *in_data, uint8_t *out_data,
         int is_decryption);
 bigint *RSA_private(const RSA_CTX *c, bigint *bi_msg);
-#if defined(CONFIG_SSL_CERT_VERIFICATION) || defined(CONFIG_SSL_GENERATE_X509_CERT)
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+bigint *RSA_raw_sign_verify(RSA_CTX *c, bigint *bi_msg);
 bigint *RSA_sign_verify(BI_CTX *ctx, const uint8_t *sig, int sig_len,
         bigint *modulus, bigint *pub_exp);
-bigint *RSA_public(const RSA_CTX * c, bigint *bi_msg);
+bigint *RSA_public(const RSA_CTX *c, bigint *bi_msg);
 int RSA_encrypt(const RSA_CTX *ctx, const uint8_t *in_data, uint16_t in_len, 
         uint8_t *out_data, int is_signing);
 void RSA_print(const RSA_CTX *ctx);
 #endif
 
 /**************************************************************************
- * RNG declarations
+ * ASN1 declarations 
  **************************************************************************/
-EXP_FUNC void STDCALL RNG_initialize(const uint8_t *seed_buf, int size);
-EXP_FUNC void STDCALL RNG_terminate(void);
-EXP_FUNC void STDCALL get_random(int num_rand_bytes, uint8_t *rand_data);
-void get_random_NZ(int num_rand_bytes, uint8_t *rand_data);
+#define X509_OK                             0
+#define X509_NOT_OK                         -1
+#define X509_VFY_ERROR_NO_TRUSTED_CERT      -2
+#define X509_VFY_ERROR_BAD_SIGNATURE        -3      
+#define X509_VFY_ERROR_NOT_YET_VALID        -4
+#define X509_VFY_ERROR_EXPIRED              -5
+#define X509_VFY_ERROR_SELF_SIGNED          -6
+#define X509_VFY_ERROR_INVALID_CHAIN        -7
+#define X509_VFY_ERROR_UNSUPPORTED_DIGEST   -8
+#define X509_INVALID_PRIV_KEY               -9
+
+/*
+ * The Distinguished Name
+ */
+#define X509_NUM_DN_TYPES                   3
+#define X509_COMMON_NAME                    0
+#define X509_ORGANIZATION                   1
+#define X509_ORGANIZATIONAL_TYPE            2
+
+#define ASN1_INTEGER            0x02
+#define ASN1_BIT_STRING         0x03
+#define ASN1_OCTET_STRING       0x04
+#define ASN1_NULL               0x05
+#define ASN1_OID                0x06
+#define ASN1_PRINTABLE_STR      0x13
+#define ASN1_TELETEX_STR        0x14
+#define ASN1_IA5_STR            0x16
+#define ASN1_UTC_TIME           0x17
+#define ASN1_SEQUENCE           0x30
+#define ASN1_SET                0x31
+#define ASN1_IMPLICIT_TAG       0x80
+#define ASN1_EXPLICIT_TAG       0xa0
+
+#define SALT_SIZE               8
+
+struct _x509_ctx
+{
+    char *ca_cert_dn[X509_NUM_DN_TYPES];
+    char *cert_dn[X509_NUM_DN_TYPES];
+#if defined(_WIN32_WCE)
+    long not_before;
+    long not_after;
+#else
+    time_t not_before;
+    time_t not_after;
+#endif
+    uint8_t *signature;
+    uint16_t sig_len;
+    uint8_t sig_type;
+    RSA_CTX *rsa_ctx;
+    bigint *digest;
+    struct _x509_ctx *next;
+};
+
+typedef struct _x509_ctx X509_CTX;
+
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+typedef struct 
+{
+    X509_CTX *cert[CONFIG_X509_MAX_CA_CERTS];
+} CA_CERT_CTX;
+#endif
+
+int asn1_get_private_key(const uint8_t *buf, int len, RSA_CTX **rsa_ctx);
+int asn1_next_obj(const uint8_t *buf, int *offset, int obj_type);
+int asn1_skip_obj(const uint8_t *buf, int *offset, int obj_type);
+int asn1_get_int(const uint8_t *buf, int *offset, uint8_t **object);
+int x509_new(const uint8_t *cert, int *len, X509_CTX **ctx);
+void x509_free(X509_CTX *x509_ctx);
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+int x509_verify(const CA_CERT_CTX *ca_cert_ctx, const X509_CTX *cert);
+const uint8_t *x509_get_signature(const uint8_t *asn1_signature, int *len);
+#endif
+#ifdef CONFIG_SSL_FULL_MODE
+void x509_print(CA_CERT_CTX *ca_cert_ctx, const X509_CTX *cert);
+void x509_display_error(int error);
+#endif
+
+/**************************************************************************
+ * MISC declarations 
+ **************************************************************************/
+
+extern const char * const unsupported_str;
+
+typedef void (*crypt_func)(void *, const uint8_t *, uint8_t *, int);
+typedef void (*hmac_func)(const uint8_t *msg, int length, const uint8_t *key, 
+        int key_len, uint8_t *digest);
+
+typedef struct
+{
+    uint8_t *pre_data;	/* include the ssl record bytes */
+    uint8_t *data;	/* the regular ssl data */
+    int max_len;
+    int index;
+} BUF_MEM;
+
+BUF_MEM buf_new(void);
+void buf_grow(BUF_MEM *bm, int len);
+void buf_free(BUF_MEM *bm);
+int get_file(const char *filename, uint8_t **buf);
+
+#if defined(CONFIG_SSL_FULL_MODE) || defined(WIN32) || defined(CONFIG_DEBUG)
+void print_blob(const char *format, const uint8_t *data, int size, ...);
+#else
+    #define print_blob(...)
+#endif
 
 #ifdef __cplusplus
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/os_port.h ipxe-1.0.1~lliurex1505/src/crypto/axtls/os_port.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/os_port.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/os_port.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,54 +1,61 @@
-#ifndef AXTLS_OS_PORT_H
-#define AXTLS_OS_PORT_H
-
 /**
  * @file os_port.h
  *
  * Trick the axtls code into building within our build environment.
  */
 
+#ifndef HEADER_OS_PORT_H
+#define HEADER_OS_PORT_H
+
 #include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include <time.h>
+#include <sys/time.h>
 #include <byteswap.h>
 
-/** All imported axTLS files are licensed using the three-clause BSD licence */
-FILE_LICENCE ( BSD3 );
+#define STDCALL
+#define EXP_FUNC
+#define TTY_FLUSH()
 
 /** We can't actually abort, since we are effectively a kernel... */
 #define abort() assert ( 0 )
 
-/** rsa.c uses alloca() */
-#define alloca( size ) __builtin_alloca ( size )
-
-#include <ipxe/random_nz.h>
-static inline void get_random_NZ ( int num_rand_bytes, uint8_t *rand_data ) {
-	/* AXTLS does not check for failures when generating random
-	 * data.  Rely on the fact that get_random_nz() does not
-	 * request prediction resistance (and so cannot introduce new
-	 * failures) and therefore any potential failure must already
-	 * have been encountered by e.g. tls_generate_random(), which
-	 * does check for failures.
-	 */
-	get_random_nz ( rand_data, num_rand_bytes );
+/** crypto_misc.c has a bad #ifdef */
+static inline void close ( int fd __unused ) {
+	/* Do nothing */
 }
 
-/* Expose AES_encrypt() and AES_decrypt() in aes.o */
-#define aes 1
-#if OBJECT
+typedef void FILE;
 
-struct aes_key_st;
+static inline FILE * fopen ( const char *filename __unused,
+			     const char *mode __unused ) {
+	return NULL;
+}
 
-static void AES_encrypt ( const struct aes_key_st *ctx, uint32_t *data );
-static void AES_decrypt ( const struct aes_key_st *ctx, uint32_t *data );
+static inline int fseek ( FILE *stream __unused, long offset __unused,
+			  int whence __unused ) {
+	return -1;
+}
+
+static inline long ftell ( FILE *stream __unused ) {
+	return -1;
+}
 
-void axtls_aes_encrypt ( void *ctx, uint32_t *data ) {
-	AES_encrypt ( ctx, data );
+static inline size_t fread ( void *ptr __unused, size_t size __unused,
+			     size_t nmemb __unused, FILE *stream __unused ) {
+	return -1;
 }
 
-void axtls_aes_decrypt ( void *ctx, uint32_t *data ) {
-	AES_decrypt ( ctx, data );
+static inline int fclose ( FILE *stream __unused ) {
+	return -1;
 }
 
-#endif
-#undef aes
+#define CONFIG_SSL_CERT_VERIFICATION 1
+#define CONFIG_SSL_MAX_CERTS 1
+#define CONFIG_X509_MAX_CA_CERTS 1
+#define CONFIG_SSL_EXPIRY_TIME 24
+#define CONFIG_SSL_ENABLE_CLIENT 1
+#define CONFIG_BIGINT_CLASSICAL 1
 
 #endif 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/rsa.c ipxe-1.0.1~lliurex1505/src/crypto/axtls/rsa.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/rsa.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/rsa.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,332 @@
+/*
+ *  Copyright(C) 2006 Cameron Rich
+ *
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2.1 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
+ *
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/**
+ * Implements the RSA public encryption algorithm. Uses the bigint library to
+ * perform its calculations.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include <time.h>
+#include <stdlib.h>
+#include "crypto.h"
+
+#ifdef CONFIG_BIGINT_CRT
+static bigint *bi_crt(const RSA_CTX *rsa, bigint *bi);
+#endif
+
+void RSA_priv_key_new(RSA_CTX **ctx, 
+        const uint8_t *modulus, int mod_len,
+        const uint8_t *pub_exp, int pub_len,
+        const uint8_t *priv_exp, int priv_len
+#if CONFIG_BIGINT_CRT
+      , const uint8_t *p, int p_len,
+        const uint8_t *q, int q_len,
+        const uint8_t *dP, int dP_len,
+        const uint8_t *dQ, int dQ_len,
+        const uint8_t *qInv, int qInv_len
+#endif
+    )
+{
+    RSA_CTX *rsa_ctx;
+    BI_CTX *bi_ctx;
+    RSA_pub_key_new(ctx, modulus, mod_len, pub_exp, pub_len);
+    rsa_ctx = *ctx;
+    bi_ctx = rsa_ctx->bi_ctx;
+    rsa_ctx->d = bi_import(bi_ctx, priv_exp, priv_len);
+    bi_permanent(rsa_ctx->d);
+
+#ifdef CONFIG_BIGINT_CRT
+    rsa_ctx->p = bi_import(bi_ctx, p, p_len);
+    rsa_ctx->q = bi_import(bi_ctx, q, q_len);
+    rsa_ctx->dP = bi_import(bi_ctx, dP, dP_len);
+    rsa_ctx->dQ = bi_import(bi_ctx, dQ, dQ_len);
+    rsa_ctx->qInv = bi_import(bi_ctx, qInv, qInv_len);
+    bi_permanent(rsa_ctx->dP);
+    bi_permanent(rsa_ctx->dQ);
+    bi_permanent(rsa_ctx->qInv);
+    bi_set_mod(bi_ctx, rsa_ctx->p, BIGINT_P_OFFSET);
+    bi_set_mod(bi_ctx, rsa_ctx->q, BIGINT_Q_OFFSET);
+#endif
+}
+
+void RSA_pub_key_new(RSA_CTX **ctx, 
+        const uint8_t *modulus, int mod_len,
+        const uint8_t *pub_exp, int pub_len)
+{
+    RSA_CTX *rsa_ctx;
+    BI_CTX *bi_ctx = bi_initialize();
+    *ctx = (RSA_CTX *)calloc(1, sizeof(RSA_CTX));
+    rsa_ctx = *ctx;
+    rsa_ctx->bi_ctx = bi_ctx;
+    rsa_ctx->num_octets = (mod_len & 0xFFF0);
+    rsa_ctx->m = bi_import(bi_ctx, modulus, mod_len);
+    bi_set_mod(bi_ctx, rsa_ctx->m, BIGINT_M_OFFSET);
+    rsa_ctx->e = bi_import(bi_ctx, pub_exp, pub_len);
+    bi_permanent(rsa_ctx->e);
+}
+
+/**
+ * Free up any RSA context resources.
+ */
+void RSA_free(RSA_CTX *rsa_ctx)
+{
+    BI_CTX *bi_ctx;
+    if (rsa_ctx == NULL)                /* deal with ptrs that are null */
+        return;
+
+    bi_ctx = rsa_ctx->bi_ctx;
+
+    bi_depermanent(rsa_ctx->e);
+    bi_free(bi_ctx, rsa_ctx->e);
+    bi_free_mod(rsa_ctx->bi_ctx, BIGINT_M_OFFSET);
+
+    if (rsa_ctx->d)
+    {
+        bi_depermanent(rsa_ctx->d);
+        bi_free(bi_ctx, rsa_ctx->d);
+#ifdef CONFIG_BIGINT_CRT
+        bi_depermanent(rsa_ctx->dP);
+        bi_depermanent(rsa_ctx->dQ);
+        bi_depermanent(rsa_ctx->qInv);
+        bi_free(bi_ctx, rsa_ctx->dP);
+        bi_free(bi_ctx, rsa_ctx->dQ);
+        bi_free(bi_ctx, rsa_ctx->qInv);
+        bi_free_mod(rsa_ctx->bi_ctx, BIGINT_P_OFFSET);
+        bi_free_mod(rsa_ctx->bi_ctx, BIGINT_Q_OFFSET);
+#endif
+    }
+
+    bi_terminate(bi_ctx);
+    free(rsa_ctx);
+}
+
+/**
+ * @brief Use PKCS1.5 for decryption/verification.
+ * @param ctx [in] The context
+ * @param in_data [in] The data to encrypt (must be < modulus size-11)
+ * @param out_data [out] The encrypted data.
+ * @param is_decryption [in] Decryption or verify operation.
+ * @return  The number of bytes that were originally encrypted. -1 on error.
+ * @see http://www.rsasecurity.com/rsalabs/node.asp?id=2125
+ */
+int RSA_decrypt(const RSA_CTX *ctx, const uint8_t *in_data, 
+                            uint8_t *out_data, int is_decryption)
+{
+    int byte_size = ctx->num_octets;
+    uint8_t *block;
+    int i, size;
+    bigint *decrypted_bi, *dat_bi;
+
+    memset(out_data, 0, byte_size); /* initialise */
+
+    /* decrypt */
+    dat_bi = bi_import(ctx->bi_ctx, in_data, byte_size);
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+    decrypted_bi = is_decryption ?  /* decrypt or verify? */
+            RSA_private(ctx, dat_bi) : RSA_public(ctx, dat_bi);
+#else   /* always a decryption */
+    decrypted_bi = RSA_private(ctx, dat_bi);
+#endif
+
+    /* convert to a normal block */
+    block = (uint8_t *)malloc(byte_size);
+    bi_export(ctx->bi_ctx, decrypted_bi, block, byte_size);
+
+    i = 10; /* start at the first possible non-padded byte */
+
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+    if (is_decryption == 0) /* PKCS1.5 signing pads with "0xff"s */
+    {
+        while (block[i++] == 0xff && i < byte_size);
+
+        if (block[i-2] != 0xff)
+            i = byte_size;     /*ensure size is 0 */   
+    }
+    else                    /* PKCS1.5 encryption padding is random */
+#endif
+    {
+        while (block[i++] && i < byte_size);
+    }
+    size = byte_size - i;
+
+    /* get only the bit we want */
+    if (size > 0)
+        memcpy(out_data, &block[i], size);
+    
+    free(block);
+    return size ? size : -1;
+}
+
+/**
+ * Performs m = c^d mod n
+ */
+bigint *RSA_private(const RSA_CTX *c, bigint *bi_msg)
+{
+#ifdef CONFIG_BIGINT_CRT
+    return bi_crt(c, bi_msg);
+#else
+    BI_CTX *ctx = c->bi_ctx;
+    ctx->mod_offset = BIGINT_M_OFFSET;
+    return bi_mod_power(ctx, bi_msg, c->d);
+#endif
+}
+
+#ifdef CONFIG_BIGINT_CRT
+/**
+ * Use the Chinese Remainder Theorem to quickly perform RSA decrypts.
+ * This should really be in bigint.c (and was at one stage), but needs 
+ * access to the RSA_CTX context...
+ */
+static bigint *bi_crt(const RSA_CTX *rsa, bigint *bi)
+{
+    BI_CTX *ctx = rsa->bi_ctx;
+    bigint *m1, *m2, *h;
+
+    /* Montgomery has a condition the 0 < x, y < m and these products violate
+     * that condition. So disable Montgomery when using CRT */
+#if defined(CONFIG_BIGINT_MONTGOMERY)
+    ctx->use_classical = 1;
+#endif
+    ctx->mod_offset = BIGINT_P_OFFSET;
+    m1 = bi_mod_power(ctx, bi_copy(bi), rsa->dP);
+
+    ctx->mod_offset = BIGINT_Q_OFFSET;
+    m2 = bi_mod_power(ctx, bi, rsa->dQ);
+
+    h = bi_subtract(ctx, bi_add(ctx, m1, rsa->p), bi_copy(m2), NULL);
+    h = bi_multiply(ctx, h, rsa->qInv);
+    ctx->mod_offset = BIGINT_P_OFFSET;
+    h = bi_residue(ctx, h);
+#if defined(CONFIG_BIGINT_MONTGOMERY)
+    ctx->use_classical = 0;         /* reset for any further operation */
+#endif
+    return bi_add(ctx, m2, bi_multiply(ctx, rsa->q, h));
+}
+#endif
+
+#ifdef CONFIG_SSL_FULL_MODE
+/**
+ * Used for diagnostics.
+ */
+void RSA_print(const RSA_CTX *rsa_ctx) 
+{
+    if (rsa_ctx == NULL)
+        return;
+
+    printf("-----------------   RSA DEBUG   ----------------\n");
+    printf("Size:\t%d\n", rsa_ctx->num_octets);
+    bi_print("Modulus", rsa_ctx->m);
+    bi_print("Public Key", rsa_ctx->e);
+    bi_print("Private Key", rsa_ctx->d);
+}
+#endif
+
+#ifdef CONFIG_SSL_CERT_VERIFICATION
+/**
+ * Performs c = m^e mod n
+ */
+bigint *RSA_public(const RSA_CTX * c, bigint *bi_msg)
+{
+    c->bi_ctx->mod_offset = BIGINT_M_OFFSET;
+    return bi_mod_power(c->bi_ctx, bi_msg, c->e);
+}
+
+/**
+ * Use PKCS1.5 for encryption/signing.
+ * see http://www.rsasecurity.com/rsalabs/node.asp?id=2125
+ */
+int RSA_encrypt(const RSA_CTX *ctx, const uint8_t *in_data, uint16_t in_len, 
+        uint8_t *out_data, int is_signing)
+{
+    int byte_size = ctx->num_octets;
+    int num_pads_needed = byte_size-in_len-3;
+    bigint *dat_bi, *encrypt_bi;
+
+    /* note: in_len+11 must be > byte_size */
+    out_data[0] = 0;     /* ensure encryption block is < modulus */
+
+    if (is_signing)
+    {
+        out_data[1] = 1;        /* PKCS1.5 signing pads with "0xff"'s */
+        memset(&out_data[2], 0xff, num_pads_needed);
+    }
+    else /* randomize the encryption padding with non-zero bytes */   
+    {
+        out_data[1] = 2;
+        get_random_NZ(num_pads_needed, &out_data[2]);
+    }
+
+    out_data[2+num_pads_needed] = 0;
+    memcpy(&out_data[3+num_pads_needed], in_data, in_len);
+
+    /* now encrypt it */
+    dat_bi = bi_import(ctx->bi_ctx, out_data, byte_size);
+    encrypt_bi = is_signing ? RSA_private(ctx, dat_bi) : 
+        RSA_public(ctx, dat_bi);
+    bi_export(ctx->bi_ctx, encrypt_bi, out_data, byte_size);
+    return byte_size;
+}
+
+#if 0
+/**
+ * Take a signature and decrypt it.
+ */
+bigint *RSA_sign_verify(BI_CTX *ctx, const uint8_t *sig, int sig_len,
+        bigint *modulus, bigint *pub_exp)
+{
+    uint8_t *block;
+    int i, size;
+    bigint *decrypted_bi, *dat_bi;
+    bigint *bir = NULL;
+
+    block = (uint8_t *)malloc(sig_len);
+
+    /* decrypt */
+    dat_bi = bi_import(ctx, sig, sig_len);
+    ctx->mod_offset = BIGINT_M_OFFSET;
+
+    /* convert to a normal block */
+    decrypted_bi = bi_mod_power2(ctx, dat_bi, modulus, pub_exp);
+
+    bi_export(ctx, decrypted_bi, block, sig_len);
+    ctx->mod_offset = BIGINT_M_OFFSET;
+
+    i = 10; /* start at the first possible non-padded byte */
+    while (block[i++] && i < sig_len);
+    size = sig_len - i;
+
+    /* get only the bit we want */
+    if (size > 0)
+    {
+        int len;
+        const uint8_t *sig_ptr = x509_get_signature(&block[i], &len);
+
+        if (sig_ptr)
+        {
+            bir = bi_import(ctx, sig_ptr, len);
+        }
+    }
+
+    free(block);
+    return bir;
+}
+#endif
+
+#endif  /* CONFIG_SSL_CERT_VERIFICATION */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/sha1.c ipxe-1.0.1~lliurex1505/src/crypto/axtls/sha1.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls/sha1.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls/sha1.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,240 @@
+/*
+ *  Copyright(C) 2006 Cameron Rich
+ *
+ *  This library is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU Lesser General Public License as published by
+ *  the Free Software Foundation; either version 2.1 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This library is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU Lesser General Public License for more details.
+ *
+ *  You should have received a copy of the GNU Lesser General Public License
+ *  along with this library; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+/**
+ * SHA1 implementation - as defined in FIPS PUB 180-1 published April 17, 1995.
+ * This code was originally taken from RFC3174
+ */
+
+#include <string.h>
+#include "crypto.h"
+
+/*
+ *  Define the SHA1 circular left shift macro
+ */
+#define SHA1CircularShift(bits,word) \
+                (((word) << (bits)) | ((word) >> (32-(bits))))
+
+/* ----- static functions ----- */
+static void SHA1PadMessage(SHA1_CTX *ctx);
+static void SHA1ProcessMessageBlock(SHA1_CTX *ctx);
+
+/**
+ * Initialize the SHA1 context 
+ */
+void SHA1Init(SHA1_CTX *ctx)
+{
+    ctx->Length_Low             = 0;
+    ctx->Length_High            = 0;
+    ctx->Message_Block_Index    = 0;
+    ctx->Intermediate_Hash[0]   = 0x67452301;
+    ctx->Intermediate_Hash[1]   = 0xEFCDAB89;
+    ctx->Intermediate_Hash[2]   = 0x98BADCFE;
+    ctx->Intermediate_Hash[3]   = 0x10325476;
+    ctx->Intermediate_Hash[4]   = 0xC3D2E1F0;
+}
+
+/**
+ * Accepts an array of octets as the next portion of the message.
+ */
+void SHA1Update(SHA1_CTX *ctx, const uint8_t *msg, int len)
+{
+    while (len--)
+    {
+        ctx->Message_Block[ctx->Message_Block_Index++] = (*msg & 0xFF);
+
+        ctx->Length_Low += 8;
+        if (ctx->Length_Low == 0)
+        {
+            ctx->Length_High++;
+        }
+
+        if (ctx->Message_Block_Index == 64)
+        {
+            SHA1ProcessMessageBlock(ctx);
+        }
+
+        msg++;
+    }
+}
+
+/**
+ * Return the 160-bit message digest into the user's array
+ */
+void SHA1Final(SHA1_CTX *ctx, uint8_t *digest)
+{
+    int i;
+
+    SHA1PadMessage(ctx);
+    memset(ctx->Message_Block, 0, 64);
+    ctx->Length_Low = 0;    /* and clear length */
+    ctx->Length_High = 0;
+
+    for  (i = 0; i < SHA1_SIZE; i++)
+    {
+        digest[i] = ctx->Intermediate_Hash[i>>2] >> 8 * ( 3 - ( i & 0x03 ) );
+    }
+}
+
+/**
+ * Process the next 512 bits of the message stored in the array.
+ */
+static void SHA1ProcessMessageBlock(SHA1_CTX *ctx)
+{
+    const uint32_t K[] =    {       /* Constants defined in SHA-1   */
+                            0x5A827999,
+                            0x6ED9EBA1,
+                            0x8F1BBCDC,
+                            0xCA62C1D6
+                            };
+    int        t;                 /* Loop counter                */
+    uint32_t      temp;              /* Temporary word value        */
+    uint32_t      W[80];             /* Word sequence               */
+    uint32_t      A, B, C, D, E;     /* Word buffers                */
+
+    /*
+     *  Initialize the first 16 words in the array W
+     */
+    for  (t = 0; t < 16; t++)
+    {
+        W[t] = ctx->Message_Block[t * 4] << 24;
+        W[t] |= ctx->Message_Block[t * 4 + 1] << 16;
+        W[t] |= ctx->Message_Block[t * 4 + 2] << 8;
+        W[t] |= ctx->Message_Block[t * 4 + 3];
+    }
+
+    for (t = 16; t < 80; t++)
+    {
+       W[t] = SHA1CircularShift(1,W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16]);
+    }
+
+    A = ctx->Intermediate_Hash[0];
+    B = ctx->Intermediate_Hash[1];
+    C = ctx->Intermediate_Hash[2];
+    D = ctx->Intermediate_Hash[3];
+    E = ctx->Intermediate_Hash[4];
+
+    for (t = 0; t < 20; t++)
+    {
+        temp =  SHA1CircularShift(5,A) +
+                ((B & C) | ((~B) & D)) + E + W[t] + K[0];
+        E = D;
+        D = C;
+        C = SHA1CircularShift(30,B);
+
+        B = A;
+        A = temp;
+    }
+
+    for (t = 20; t < 40; t++)
+    {
+        temp = SHA1CircularShift(5,A) + (B ^ C ^ D) + E + W[t] + K[1];
+        E = D;
+        D = C;
+        C = SHA1CircularShift(30,B);
+        B = A;
+        A = temp;
+    }
+
+    for (t = 40; t < 60; t++)
+    {
+        temp = SHA1CircularShift(5,A) +
+               ((B & C) | (B & D) | (C & D)) + E + W[t] + K[2];
+        E = D;
+        D = C;
+        C = SHA1CircularShift(30,B);
+        B = A;
+        A = temp;
+    }
+
+    for (t = 60; t < 80; t++)
+    {
+        temp = SHA1CircularShift(5,A) + (B ^ C ^ D) + E + W[t] + K[3];
+        E = D;
+        D = C;
+        C = SHA1CircularShift(30,B);
+        B = A;
+        A = temp;
+    }
+
+    ctx->Intermediate_Hash[0] += A;
+    ctx->Intermediate_Hash[1] += B;
+    ctx->Intermediate_Hash[2] += C;
+    ctx->Intermediate_Hash[3] += D;
+    ctx->Intermediate_Hash[4] += E;
+    ctx->Message_Block_Index = 0;
+}
+
+/*
+ * According to the standard, the message must be padded to an even
+ * 512 bits.  The first padding bit must be a '1'.  The last 64
+ * bits represent the length of the original message.  All bits in
+ * between should be 0.  This function will pad the message
+ * according to those rules by filling the Message_Block array
+ * accordingly.  It will also call the ProcessMessageBlock function
+ * provided appropriately.  When it returns, it can be assumed that
+ * the message digest has been computed.
+ *
+ * @param ctx [in, out] The SHA1 context
+ */
+static void SHA1PadMessage(SHA1_CTX *ctx)
+{
+    /*
+     *  Check to see if the current message block is too small to hold
+     *  the initial padding bits and length.  If so, we will pad the
+     *  block, process it, and then continue padding into a second
+     *  block.
+     */
+    if (ctx->Message_Block_Index > 55)
+    {
+        ctx->Message_Block[ctx->Message_Block_Index++] = 0x80;
+        while(ctx->Message_Block_Index < 64)
+        {
+            ctx->Message_Block[ctx->Message_Block_Index++] = 0;
+        }
+
+        SHA1ProcessMessageBlock(ctx);
+
+        while (ctx->Message_Block_Index < 56)
+        {
+            ctx->Message_Block[ctx->Message_Block_Index++] = 0;
+        }
+    }
+    else
+    {
+        ctx->Message_Block[ctx->Message_Block_Index++] = 0x80;
+        while(ctx->Message_Block_Index < 56)
+        {
+
+            ctx->Message_Block[ctx->Message_Block_Index++] = 0;
+        }
+    }
+
+    /*
+     *  Store the message length as the last 8 octets
+     */
+    ctx->Message_Block[56] = ctx->Length_High >> 24;
+    ctx->Message_Block[57] = ctx->Length_High >> 16;
+    ctx->Message_Block[58] = ctx->Length_High >> 8;
+    ctx->Message_Block[59] = ctx->Length_High;
+    ctx->Message_Block[60] = ctx->Length_Low >> 24;
+    ctx->Message_Block[61] = ctx->Length_Low >> 16;
+    ctx->Message_Block[62] = ctx->Length_Low >> 8;
+    ctx->Message_Block[63] = ctx->Length_Low;
+    SHA1ProcessMessageBlock(ctx);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls_aes.c ipxe-1.0.1~lliurex1505/src/crypto/axtls_aes.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls_aes.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls_aes.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,15 +13,13 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <string.h>
 #include <errno.h>
-#include <assert.h>
 #include <byteswap.h>
 #include <ipxe/crypto.h>
 #include <ipxe/cbc.h>
@@ -121,7 +119,7 @@
 	assert ( len == AES_BLOCKSIZE );
 	if ( aes_ctx->decrypting )
 		assert ( 0 );
-	aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, axtls_aes_encrypt );
+	aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, AES_encrypt );
 }
 
 /**
@@ -141,7 +139,7 @@
 		AES_convert_key ( &aes_ctx->axtls_ctx );
 		aes_ctx->decrypting = 1;
 	}
-	aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, axtls_aes_decrypt );
+	aes_call_axtls ( &aes_ctx->axtls_ctx, src, dst, AES_decrypt );
 }
 
 /** Basic AES algorithm */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls_sha1.c ipxe-1.0.1~lliurex1505/src/crypto/axtls_sha1.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/axtls_sha1.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/axtls_sha1.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,25 @@
+#include "crypto/axtls/crypto.h"
+#include <ipxe/crypto.h>
+#include <ipxe/sha1.h>
+
+static void sha1_init ( void *ctx ) {
+	SHA1Init ( ctx );
+}
+
+static void sha1_update ( void *ctx, const void *data, size_t len ) {
+	SHA1Update ( ctx, data, len );
+}
+
+static void sha1_final ( void *ctx, void *out ) {
+	SHA1Final ( ctx, out );
+}
+
+struct digest_algorithm sha1_algorithm = {
+	.name		= "sha1",
+	.ctxsize	= SHA1_CTX_SIZE,
+	.blocksize	= 64,
+	.digestsize	= SHA1_DIGEST_SIZE,
+	.init		= sha1_init,
+	.update		= sha1_update,
+	.final		= sha1_final,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/bigint.c ipxe-1.0.1~lliurex1505/src/crypto/bigint.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/bigint.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/bigint.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,135 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-#include <ipxe/bigint.h>
-
-/** @file
- *
- * Big integer support
- */
-
-/**
- * Perform modular multiplication of big integers
- *
- * @v multiplicand0	Element 0 of big integer to be multiplied
- * @v multiplier0	Element 0 of big integer to be multiplied
- * @v modulus0		Element 0 of big integer modulus
- * @v result0		Element 0 of big integer to hold result
- * @v size		Number of elements in base, modulus, and result
- * @v tmp		Temporary working space
- */
-void bigint_mod_multiply_raw ( const bigint_element_t *multiplicand0,
-			       const bigint_element_t *multiplier0,
-			       const bigint_element_t *modulus0,
-			       bigint_element_t *result0,
-			       unsigned int size, void *tmp ) {
-	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplicand =
-		( ( const void * ) multiplicand0 );
-	const bigint_t ( size ) __attribute__ (( may_alias )) *multiplier =
-		( ( const void * ) multiplier0 );
-	const bigint_t ( size ) __attribute__ (( may_alias )) *modulus =
-		( ( const void * ) modulus0 );
-	bigint_t ( size ) __attribute__ (( may_alias )) *result =
-		( ( void * ) result0 );
-	struct {
-		bigint_t ( size * 2 ) result;
-		bigint_t ( size * 2 ) modulus;
-	} *temp = tmp;
-	int rotation;
-	int i;
-
-	/* Sanity check */
-	assert ( sizeof ( *temp ) == bigint_mod_multiply_tmp_len ( modulus ) );
-
-	/* Perform multiplication */
-	bigint_multiply ( multiplicand, multiplier, &temp->result );
-
-	/* Rescale modulus to match result */
-	bigint_grow ( modulus, &temp->modulus );
-	rotation = ( bigint_max_set_bit ( &temp->result ) -
-		     bigint_max_set_bit ( &temp->modulus ) );
-	for ( i = 0 ; i < rotation ; i++ )
-		bigint_rol ( &temp->modulus );
-
-	/* Subtract multiples of modulus */
-	for ( i = 0 ; i <= rotation ; i++ ) {
-		if ( bigint_is_geq ( &temp->result, &temp->modulus ) )
-			bigint_subtract ( &temp->modulus, &temp->result );
-		bigint_ror ( &temp->modulus );
-	}
-
-	/* Resize result */
-	bigint_shrink ( &temp->result, result );
-
-	/* Sanity check */
-	assert ( bigint_is_geq ( modulus, result ) );
-}
-
-/**
- * Perform modular exponentiation of big integers
- *
- * @v base0		Element 0 of big integer base
- * @v modulus0		Element 0 of big integer modulus
- * @v exponent0		Element 0 of big integer exponent
- * @v result0		Element 0 of big integer to hold result
- * @v size		Number of elements in base, modulus, and result
- * @v exponent_size	Number of elements in exponent
- * @v tmp		Temporary working space
- */
-void bigint_mod_exp_raw ( const bigint_element_t *base0,
-			  const bigint_element_t *modulus0,
-			  const bigint_element_t *exponent0,
-			  bigint_element_t *result0,
-			  unsigned int size, unsigned int exponent_size,
-			  void *tmp ) {
-	const bigint_t ( size ) __attribute__ (( may_alias )) *base =
-		( ( const void * ) base0 );
-	const bigint_t ( size ) __attribute__ (( may_alias )) *modulus =
-		( ( const void * ) modulus0 );
-	const bigint_t ( exponent_size ) __attribute__ (( may_alias ))
-		*exponent = ( ( const void * ) exponent0 );
-	bigint_t ( size ) __attribute__ (( may_alias )) *result =
-		( ( void * ) result0 );
-	size_t mod_multiply_len = bigint_mod_multiply_tmp_len ( modulus );
-	struct {
-		bigint_t ( size ) base;
-		bigint_t ( exponent_size ) exponent;
-		uint8_t mod_multiply[mod_multiply_len];
-	} *temp = tmp;
-	static const uint8_t start[1] = { 0x01 };
-
-	memcpy ( &temp->base, base, sizeof ( temp->base ) );
-	memcpy ( &temp->exponent, exponent, sizeof ( temp->exponent ) );
-	bigint_init ( result, start, sizeof ( start ) );
-
-	while ( ! bigint_is_zero ( &temp->exponent ) ) {
-		if ( bigint_bit_is_set ( &temp->exponent, 0 ) ) {
-			bigint_mod_multiply ( result, &temp->base, modulus,
-					      result, temp->mod_multiply );
-		}
-		bigint_ror ( &temp->exponent );
-		bigint_mod_multiply ( &temp->base, &temp->base, modulus,
-				      &temp->base, temp->mod_multiply );
-	}
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/cbc.c ipxe-1.0.1~lliurex1505/src/crypto/cbc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/cbc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/cbc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -88,15 +87,13 @@
 void cbc_decrypt ( void *ctx, const void *src, void *dst, size_t len,
 		   struct cipher_algorithm *raw_cipher, void *cbc_ctx ) {
 	size_t blocksize = raw_cipher->blocksize;
-	uint8_t next_cbc_ctx[blocksize];
 
 	assert ( ( len % blocksize ) == 0 );
 
 	while ( len ) {
-		memcpy ( next_cbc_ctx, src, blocksize );
 		cipher_decrypt ( raw_cipher, ctx, src, dst, blocksize );
 		cbc_xor ( cbc_ctx, dst, blocksize );
-		memcpy ( cbc_ctx, next_cbc_ctx, blocksize );
+		memcpy ( cbc_ctx, src, blocksize );
 		dst += blocksize;
 		src += blocksize;
 		len -= blocksize;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/chap.c ipxe-1.0.1~lliurex1505/src/crypto/chap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/chap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/chap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/clientcert.c ipxe-1.0.1~lliurex1505/src/crypto/clientcert.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/clientcert.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/clientcert.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,170 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/dhcp.h>
-#include <ipxe/settings.h>
-#include <ipxe/clientcert.h>
-
-/** @file
- *
- * Client certificate store
- *
- * Life would in theory be easier if we could use a single file to
- * hold both the certificate and corresponding private key.
- * Unfortunately, the only common format which supports this is
- * PKCS#12 (aka PFX), which is too ugly to be allowed anywhere near my
- * codebase.  See, for reference and amusement:
- *
- *    http://www.cs.auckland.ac.nz/~pgut001/pubs/pfx.html
- *
- */
-
-/* Sanity checks */
-#if defined(CERTIFICATE) && ! defined(PRIVATE_KEY)
-#warning "Attempting to embed certificate with no corresponding private key"
-#endif
-#if defined(PRIVATE_KEY) && ! defined(CERTIFICATE)
-#warning "Attempting to embed private key with no corresponding certificate"
-#endif
-
-/* Allow client certificates to be overridden if not explicitly specified */
-#ifdef CERTIFICATE
-#define ALLOW_CERT_OVERRIDE 0
-#else
-#define ALLOW_CERT_OVERRIDE 1
-#endif
-
-/* Raw client certificate data */
-extern char client_certificate_data[];
-extern char client_certificate_len[];
-__asm__ ( ".section \".rodata\", \"a\", @progbits\n\t"
-	  "\nclient_certificate_data:\n\t"
-#ifdef CERTIFICATE
-	  ".incbin \"" CERTIFICATE "\"\n\t"
-#endif /* CERTIFICATE */
-	  ".size client_certificate_data, ( . - client_certificate_data )\n\t"
-	  ".equ client_certificate_len, ( . - client_certificate_data )\n\t"
-	  ".previous\n\t" );
-
-/* Raw client private key data */
-extern char client_private_key_data[];
-extern char client_private_key_len[];
-__asm__ ( ".section \".rodata\", \"a\", @progbits\n\t"
-	  "\nclient_private_key_data:\n\t"
-#ifdef PRIVATE_KEY
-	  ".incbin \"" PRIVATE_KEY "\"\n\t"
-#endif /* PRIVATE_KEY */
-	  ".size client_private_key_data, ( . - client_private_key_data )\n\t"
-	  ".equ client_private_key_len, ( . - client_private_key_data )\n\t"
-	  ".previous\n\t" );
-
-/** Client certificate */
-struct client_certificate client_certificate = {
-	.data = client_certificate_data,
-	.len = ( ( size_t ) client_certificate_len ),
-};
-
-/** Client private key */
-struct client_private_key client_private_key = {
-	.data = client_private_key_data,
-	.len = ( ( size_t ) client_private_key_len ),
-};
-
-/** Client certificate setting */
-static struct setting cert_setting __setting ( SETTING_CRYPTO ) = {
-	.name = "cert",
-	.description = "Client certificate",
-	.tag = DHCP_EB_CERT,
-	.type = &setting_type_hex,
-};
-
-/** Client private key setting */
-static struct setting privkey_setting __setting ( SETTING_CRYPTO ) = {
-	.name = "privkey",
-	.description = "Client private key",
-	.tag = DHCP_EB_KEY,
-	.type = &setting_type_hex,
-};
-
-/**
- * Apply client certificate store configuration settings
- *
- * @ret rc		Return status code
- */
-static int clientcert_apply_settings ( void ) {
-	static void *cert = NULL;
-	static void *key = NULL;
-	int len;
-
-	/* Allow client certificate to be overridden only if
-	 * not explicitly specified at build time.
-	 */
-	if ( ALLOW_CERT_OVERRIDE ) {
-
-		/* Restore default client certificate */
-		client_certificate.data = client_certificate_data;
-		client_certificate.len = ( ( size_t ) client_certificate_len );
-
-		/* Fetch new client certificate, if any */
-		free ( cert );
-		if ( ( len = fetch_setting_copy ( NULL, &cert_setting,
-						  &cert ) ) >= 0 ) {
-			client_certificate.data = cert;
-			client_certificate.len = len;
-		}
-
-		/* Restore default client private key */
-		client_private_key.data = client_private_key_data;
-		client_private_key.len = ( ( size_t ) client_private_key_len );
-
-		/* Fetch new client private key, if any */
-		free ( key );
-		if ( ( len = fetch_setting_copy ( NULL, &privkey_setting,
-						  &key ) ) >= 0 ) {
-			client_private_key.data = key;
-			client_private_key.len = len;
-		}
-	}
-
-	/* Debug */
-	if ( have_client_certificate() ) {
-		DBGC ( &client_certificate, "CLIENTCERT using %s "
-		       "certificate:\n", ( cert ? "external" : "built-in" ) );
-		DBGC_HDA ( &client_certificate, 0, client_certificate.data,
-			   client_certificate.len );
-		DBGC ( &client_certificate, "CLIENTCERT using %s private "
-		       "key:\n", ( key ? "external" : "built-in" ) );
-		DBGC_HDA ( &client_certificate, 0, client_private_key.data,
-			   client_private_key.len );
-	} else {
-		DBGC ( &client_certificate, "CLIENTCERT has no certificate\n" );
-	}
-
-	return 0;
-}
-
-/** Client certificate store settings applicator */
-struct settings_applicator clientcert_applicator __settings_applicator = {
-	.apply = clientcert_apply_settings,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/cms.c ipxe-1.0.1~lliurex1505/src/crypto/cms.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/cms.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/cms.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,705 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Cryptographic Message Syntax (PKCS #7)
- *
- * The format of CMS messages is defined in RFC 5652.
- *
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <time.h>
-#include <errno.h>
-#include <ipxe/asn1.h>
-#include <ipxe/x509.h>
-#include <ipxe/malloc.h>
-#include <ipxe/uaccess.h>
-#include <ipxe/cms.h>
-
-/* Disambiguate the various error causes */
-#define EACCES_NON_SIGNING \
-	__einfo_error ( EINFO_EACCES_NON_SIGNING )
-#define EINFO_EACCES_NON_SIGNING \
-	__einfo_uniqify ( EINFO_EACCES, 0x01, "Not a signing certificate" )
-#define EACCES_NON_CODE_SIGNING \
-	__einfo_error ( EINFO_EACCES_NON_CODE_SIGNING )
-#define EINFO_EACCES_NON_CODE_SIGNING \
-	__einfo_uniqify ( EINFO_EACCES, 0x02, "Not a code-signing certificate" )
-#define EACCES_WRONG_NAME \
-	__einfo_error ( EINFO_EACCES_WRONG_NAME )
-#define EINFO_EACCES_WRONG_NAME \
-	__einfo_uniqify ( EINFO_EACCES, 0x04, "Incorrect certificate name" )
-#define EACCES_NO_SIGNATURES \
-	__einfo_error ( EINFO_EACCES_NO_SIGNATURES )
-#define EINFO_EACCES_NO_SIGNATURES \
-	__einfo_uniqify ( EINFO_EACCES, 0x05, "No signatures present" )
-#define EINVAL_DIGEST \
-	__einfo_error ( EINFO_EINVAL_DIGEST )
-#define EINFO_EINVAL_DIGEST \
-	__einfo_uniqify ( EINFO_EINVAL, 0x01, "Not a digest algorithm" )
-#define EINVAL_PUBKEY \
-	__einfo_error ( EINFO_EINVAL_PUBKEY )
-#define EINFO_EINVAL_PUBKEY \
-	__einfo_uniqify ( EINFO_EINVAL, 0x02, "Not a public-key algorithm" )
-#define ENOTSUP_SIGNEDDATA \
-	__einfo_error ( EINFO_ENOTSUP_SIGNEDDATA )
-#define EINFO_ENOTSUP_SIGNEDDATA \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01, "Not a digital signature" )
-
-/** "pkcs7-signedData" object identifier */
-static uint8_t oid_signeddata[] = { ASN1_OID_SIGNEDDATA };
-
-/** "pkcs7-signedData" object identifier cursor */
-static struct asn1_cursor oid_signeddata_cursor =
-	ASN1_OID_CURSOR ( oid_signeddata );
-
-/**
- * Parse CMS signature content type
- *
- * @v sig		CMS signature
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_content_type ( struct cms_signature *sig,
-				    const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-
-	/* Enter contentType */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_OID );
-
-	/* Check OID is pkcs7-signedData */
-	if ( asn1_compare ( &cursor, &oid_signeddata_cursor ) != 0 ) {
-		DBGC ( sig, "CMS %p does not contain signedData:\n", sig );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return -ENOTSUP_SIGNEDDATA;
-	}
-
-	DBGC ( sig, "CMS %p contains signedData\n", sig );
-	return 0;
-}
-
-/**
- * Parse CMS signature certificate list
- *
- * @v sig		CMS signature
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_certificates ( struct cms_signature *sig,
-				    const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct x509_certificate *cert;
-	int rc;
-
-	/* Enter certificates */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-
-	/* Add each certificate */
-	while ( cursor.len ) {
-
-		/* Add certificate to chain */
-		if ( ( rc = x509_append_raw ( sig->certificates, cursor.data,
-					      cursor.len ) ) != 0 ) {
-			DBGC ( sig, "CMS %p could not append certificate: %s\n",
-			       sig, strerror ( rc) );
-			DBGC_HDA ( sig, 0, cursor.data, cursor.len );
-			return rc;
-		}
-		cert = x509_last ( sig->certificates );
-		DBGC ( sig, "CMS %p found certificate %s\n",
-		       sig, cert->subject.name );
-
-		/* Move to next certificate */
-		asn1_skip_any ( &cursor );
-	}
-
-	return 0;
-}
-
-/**
- * Identify CMS signature certificate by issuer and serial number
- *
- * @v sig		CMS signature
- * @v issuer		Issuer
- * @v serial		Serial number
- * @ret cert		X.509 certificate, or NULL if not found
- */
-static struct x509_certificate *
-cms_find_issuer_serial ( struct cms_signature *sig,
-			 const struct asn1_cursor *issuer,
-			 const struct asn1_cursor *serial ) {
-	struct x509_link *link;
-	struct x509_certificate *cert;
-
-	/* Scan through certificate list */
-	list_for_each_entry ( link, &sig->certificates->links, list ) {
-
-		/* Check issuer and serial number */
-		cert = link->cert;
-		if ( ( asn1_compare ( issuer, &cert->issuer.raw ) == 0 ) &&
-		     ( asn1_compare ( serial, &cert->serial.raw ) == 0 ) )
-			return cert;
-	}
-
-	return NULL;
-}
-
-/**
- * Parse CMS signature signer identifier
- *
- * @v sig		CMS signature
- * @v info		Signer information to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_signer_identifier ( struct cms_signature *sig,
-					 struct cms_signer_info *info,
-					 const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct asn1_cursor serial;
-	struct asn1_cursor issuer;
-	struct x509_certificate *cert;
-	int rc;
-
-	/* Enter issuerAndSerialNumber */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Identify issuer */
-	memcpy ( &issuer, &cursor, sizeof ( issuer ) );
-	if ( ( rc = asn1_shrink ( &issuer, ASN1_SEQUENCE ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not locate issuer: %s\n",
-		       sig, info, strerror ( rc ) );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return rc;
-	}
-	DBGC ( sig, "CMS %p/%p issuer is:\n", sig, info );
-	DBGC_HDA ( sig, 0, issuer.data, issuer.len );
-	asn1_skip_any ( &cursor );
-
-	/* Identify serialNumber */
-	memcpy ( &serial, &cursor, sizeof ( serial ) );
-	if ( ( rc = asn1_shrink ( &serial, ASN1_INTEGER ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not locate serialNumber: %s\n",
-		       sig, info, strerror ( rc ) );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return rc;
-	}
-	DBGC ( sig, "CMS %p/%p serial number is:\n", sig, info );
-	DBGC_HDA ( sig, 0, serial.data, serial.len );
-
-	/* Identify certificate */
-	cert = cms_find_issuer_serial ( sig, &issuer, &serial );
-	if ( ! cert ) {
-		DBGC ( sig, "CMS %p/%p could not identify signer's "
-		       "certificate\n", sig, info );
-		return -ENOENT;
-	}
-
-	/* Append certificate to chain */
-	if ( ( rc = x509_append ( info->chain, cert ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not append certificate: %s\n",
-		       sig, info, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Append remaining certificates to chain */
-	if ( ( rc = x509_auto_append ( info->chain,
-				       sig->certificates ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not append certificates: %s\n",
-		       sig, info, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Parse CMS signature digest algorithm
- *
- * @v sig		CMS signature
- * @v info		Signer information to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_digest_algorithm ( struct cms_signature *sig,
-					struct cms_signer_info *info,
-					const struct asn1_cursor *raw ) {
-	struct asn1_algorithm *algorithm;
-	int rc;
-
-	/* Identify algorithm */
-	if ( ( rc = asn1_digest_algorithm ( raw, &algorithm ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not identify digest algorithm: "
-		       "%s\n", sig, info, strerror ( rc ) );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return rc;
-	}
-
-	/* Record digest algorithm */
-	info->digest = algorithm->digest;
-	DBGC ( sig, "CMS %p/%p digest algorithm is %s\n",
-	       sig, info, algorithm->name );
-
-	return 0;
-}
-
-/**
- * Parse CMS signature algorithm
- *
- * @v sig		CMS signature
- * @v info		Signer information to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_signature_algorithm ( struct cms_signature *sig,
-					   struct cms_signer_info *info,
-					   const struct asn1_cursor *raw ) {
-	struct asn1_algorithm *algorithm;
-	int rc;
-
-	/* Identify algorithm */
-	if ( ( rc = asn1_pubkey_algorithm ( raw, &algorithm ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not identify public-key "
-		       "algorithm: %s\n", sig, info, strerror ( rc ) );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return rc;
-	}
-
-	/* Record signature algorithm */
-	info->pubkey = algorithm->pubkey;
-	DBGC ( sig, "CMS %p/%p public-key algorithm is %s\n",
-	       sig, info, algorithm->name );
-
-	return 0;
-}
-
-/**
- * Parse CMS signature value
- *
- * @v sig		CMS signature
- * @v info		Signer information to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_signature_value ( struct cms_signature *sig,
-				       struct cms_signer_info *info,
-				       const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter signature */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	if ( ( rc = asn1_enter ( &cursor, ASN1_OCTET_STRING ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not locate signature:\n",
-		       sig, info );
-		DBGC_HDA ( sig, 0, raw->data, raw->len );
-		return rc;
-	}
-
-	/* Record signature */
-	info->signature_len = cursor.len;
-	info->signature = malloc ( info->signature_len );
-	if ( ! info->signature )
-		return -ENOMEM;
-	memcpy ( info->signature, cursor.data, info->signature_len );
-	DBGC ( sig, "CMS %p/%p signature value is:\n", sig, info );
-	DBGC_HDA ( sig, 0, info->signature, info->signature_len );
-
-	return 0;
-}
-
-/**
- * Parse CMS signature signer information
- *
- * @v sig		CMS signature
- * @v info		Signer information to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse_signer_info ( struct cms_signature *sig,
-				   struct cms_signer_info *info,
-				   const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter signerInfo */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Skip version */
-	asn1_skip ( &cursor, ASN1_INTEGER );
-
-	/* Parse sid */
-	if ( ( rc = cms_parse_signer_identifier ( sig, info, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse digestAlgorithm */
-	if ( ( rc = cms_parse_digest_algorithm ( sig, info, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Skip signedAttrs, if present */
-	asn1_skip_if_exists ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-
-	/* Parse signatureAlgorithm */
-	if ( ( rc = cms_parse_signature_algorithm ( sig, info, &cursor ) ) != 0)
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse signature */
-	if ( ( rc = cms_parse_signature_value ( sig, info, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse CMS signature from ASN.1 data
- *
- * @v sig		CMS signature
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int cms_parse ( struct cms_signature *sig,
-		       const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct cms_signer_info *info;
-	int rc;
-
-	/* Enter contentInfo */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse contentType */
-
-	if ( ( rc = cms_parse_content_type ( sig, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Enter content */
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-
-	/* Enter signedData */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Skip version */
-	asn1_skip ( &cursor, ASN1_INTEGER );
-
-	/* Skip digestAlgorithms */
-	asn1_skip ( &cursor, ASN1_SET );
-
-	/* Skip encapContentInfo */
-	asn1_skip ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse certificates */
-	if ( ( rc = cms_parse_certificates ( sig, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Skip crls, if present */
-	asn1_skip_if_exists ( &cursor, ASN1_EXPLICIT_TAG ( 1 ) );
-
-	/* Enter signerInfos */
-	asn1_enter ( &cursor, ASN1_SET );
-
-	/* Add each signerInfo.  Errors are handled by ensuring that
-	 * cms_put() will always be able to free any allocated memory.
-	 */
-	while ( cursor.len ) {
-
-		/* Allocate signer information block */
-		info = zalloc ( sizeof ( *info ) );
-		if ( ! info )
-			return -ENOMEM;
-		list_add ( &info->list, &sig->info );
-
-		/* Allocate certificate chain */
-		info->chain = x509_alloc_chain();
-		if ( ! info->chain )
-			return -ENOMEM;
-
-		/* Parse signerInfo */
-		if ( ( rc = cms_parse_signer_info ( sig, info,
-						    &cursor ) ) != 0 )
-			return rc;
-		asn1_skip_any ( &cursor );
-	}
-
-	return 0;
-}
-
-/**
- * Free CMS signature
- *
- * @v refcnt		Reference count
- */
-static void cms_free ( struct refcnt *refcnt ) {
-	struct cms_signature *sig =
-		container_of ( refcnt, struct cms_signature, refcnt );
-	struct cms_signer_info *info;
-	struct cms_signer_info *tmp;
-
-	list_for_each_entry_safe ( info, tmp, &sig->info, list ) {
-		list_del ( &info->list );
-		x509_chain_put ( info->chain );
-		free ( info->signature );
-		free ( info );
-	}
-	x509_chain_put ( sig->certificates );
-	free ( sig );
-}
-
-/**
- * Create CMS signature
- *
- * @v data		Raw signature data
- * @v len		Length of raw data
- * @ret sig		CMS signature
- * @ret rc		Return status code
- *
- * On success, the caller holds a reference to the CMS signature, and
- * is responsible for ultimately calling cms_put().
- */
-int cms_signature ( const void *data, size_t len, struct cms_signature **sig ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Allocate and initialise signature */
-	*sig = zalloc ( sizeof ( **sig ) );
-	if ( ! *sig ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	ref_init ( &(*sig)->refcnt, cms_free );
-	INIT_LIST_HEAD ( &(*sig)->info );
-
-	/* Allocate certificate list */
-	(*sig)->certificates = x509_alloc_chain();
-	if ( ! (*sig)->certificates ) {
-		rc = -ENOMEM;
-		goto err_alloc_chain;
-	}
-
-	/* Initialise cursor */
-	cursor.data = data;
-	cursor.len = len;
-	asn1_shrink_any ( &cursor );
-
-	/* Parse signature */
-	if ( ( rc = cms_parse ( *sig, &cursor ) ) != 0 )
-		goto err_parse;
-
-	return 0;
-
- err_parse:
- err_alloc_chain:
-	cms_put ( *sig );
- err_alloc:
-	return rc;
-}
-
-/**
- * Calculate digest of CMS-signed data
- *
- * @v sig		CMS signature
- * @v info		Signer information
- * @v data		Signed data
- * @v len		Length of signed data
- * @v out		Digest output
- */
-static void cms_digest ( struct cms_signature *sig,
-			 struct cms_signer_info *info,
-			 userptr_t data, size_t len, void *out ) {
-	struct digest_algorithm *digest = info->digest;
-	uint8_t ctx[ digest->ctxsize ];
-	uint8_t block[ digest->blocksize ];
-	size_t offset = 0;
-	size_t frag_len;
-
-	/* Initialise digest */
-	digest_init ( digest, ctx );
-
-	/* Process data one block at a time */
-	while ( len ) {
-		frag_len = len;
-		if ( frag_len > sizeof ( block ) )
-			frag_len = sizeof ( block );
-		copy_from_user ( block, data, offset, frag_len );
-		digest_update ( digest, ctx, block, frag_len );
-		offset += frag_len;
-		len -= frag_len;
-	}
-
-	/* Finalise digest */
-	digest_final ( digest, ctx, out );
-
-	DBGC ( sig, "CMS %p/%p digest value:\n", sig, info );
-	DBGC_HDA ( sig, 0, out, digest->digestsize );
-}
-
-/**
- * Verify digest of CMS-signed data
- *
- * @v sig		CMS signature
- * @v info		Signer information
- * @v cert		Corresponding certificate
- * @v data		Signed data
- * @v len		Length of signed data
- * @ret rc		Return status code
- */
-static int cms_verify_digest ( struct cms_signature *sig,
-			       struct cms_signer_info *info,
-			       struct x509_certificate *cert,
-			       userptr_t data, size_t len ) {
-	struct digest_algorithm *digest = info->digest;
-	struct pubkey_algorithm *pubkey = info->pubkey;
-	struct x509_public_key *public_key = &cert->subject.public_key;
-	uint8_t digest_out[ digest->digestsize ];
-	uint8_t ctx[ pubkey->ctxsize ];
-	int rc;
-
-	/* Generate digest */
-	cms_digest ( sig, info, data, len, digest_out );
-
-	/* Initialise public-key algorithm */
-	if ( ( rc = pubkey_init ( pubkey, ctx, public_key->raw.data,
-				  public_key->raw.len ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not initialise public key: %s\n",
-		       sig, info, strerror ( rc ) );
-		goto err_init;
-	}
-
-	/* Verify digest */
-	if ( ( rc = pubkey_verify ( pubkey, ctx, digest, digest_out,
-				    info->signature,
-				    info->signature_len ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p signature verification failed: %s\n",
-		       sig, info, strerror ( rc ) );
-		goto err_verify;
-	}
-
- err_verify:
-	pubkey_final ( pubkey, ctx );
- err_init:
-	return rc;
-}
-
-/**
- * Verify CMS signature signer information
- *
- * @v sig		CMS signature
- * @v info		Signer information
- * @v data		Signed data
- * @v len		Length of signed data
- * @v time		Time at which to validate certificates
- * @v root		Root certificate store, or NULL to use default
- * @ret rc		Return status code
- */
-static int cms_verify_signer_info ( struct cms_signature *sig,
-				    struct cms_signer_info *info,
-				    userptr_t data, size_t len,
-				    time_t time, struct x509_root *root ) {
-	struct x509_certificate *cert;
-	int rc;
-
-	/* Validate certificate chain */
-	if ( ( rc = x509_validate_chain ( info->chain, time, root ) ) != 0 ) {
-		DBGC ( sig, "CMS %p/%p could not validate chain: %s\n",
-		       sig, info, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Extract code-signing certificate */
-	cert = x509_first ( info->chain );
-	assert ( cert != NULL );
-
-	/* Check that certificate can create digital signatures */
-	if ( ! ( cert->extensions.usage.bits & X509_DIGITAL_SIGNATURE ) ) {
-		DBGC ( sig, "CMS %p/%p certificate cannot create signatures\n",
-		       sig, info );
-		return -EACCES_NON_SIGNING;
-	}
-
-	/* Check that certificate can sign code */
-	if ( ! ( cert->extensions.ext_usage.bits & X509_CODE_SIGNING ) ) {
-		DBGC ( sig, "CMS %p/%p certificate is not code-signing\n",
-		       sig, info );
-		return -EACCES_NON_CODE_SIGNING;
-	}
-
-	/* Verify digest */
-	if ( ( rc = cms_verify_digest ( sig, info, cert, data, len ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Verify CMS signature
- *
- * @v sig		CMS signature
- * @v data		Signed data
- * @v len		Length of signed data
- * @v name		Required common name, or NULL to check all signatures
- * @v time		Time at which to validate certificates
- * @v root		Root certificate store, or NULL to use default
- * @ret rc		Return status code
- */
-int cms_verify ( struct cms_signature *sig, userptr_t data, size_t len,
-		 const char *name, time_t time, struct x509_root *root ) {
-	struct cms_signer_info *info;
-	struct x509_certificate *cert;
-	int count = 0;
-	int rc;
-
-	/* Verify using all signerInfos */
-	list_for_each_entry ( info, &sig->info, list ) {
-		cert = x509_first ( info->chain );
-		if ( name && ( ( cert->subject.name == NULL ) ||
-			       ( strcmp ( cert->subject.name, name ) != 0 ) ) )
-			continue;
-		if ( ( rc = cms_verify_signer_info ( sig, info, data, len,
-						     time, root ) ) != 0 )
-			return rc;
-		count++;
-	}
-
-	/* Check that we have verified at least one signature */
-	if ( count == 0 ) {
-		if ( name ) {
-			DBGC ( sig, "CMS %p had no signatures matching name "
-			       "%s\n", sig, name );
-			return -EACCES_WRONG_NAME;
-		} else {
-			DBGC ( sig, "CMS %p had no signatures\n", sig );
-			return -EACCES_NO_SIGNATURES;
-		}
-	}
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crandom.c ipxe-1.0.1~lliurex1505/src/crypto/crandom.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crandom.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/crandom.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,55 @@
+/*
+ * Copyright (c) 2009 Joshua Oreman <oremanj@rwcr.net>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/** @file
+ *
+ * Cryptographically strong random number generator
+ *
+ * Currently the cryptographic part is not implemented, and this just
+ * uses random().
+ */
+
+#include <ipxe/crypto.h>
+#include <stdlib.h>
+
+/**
+ * Get cryptographically strong random bytes
+ *
+ * @v buf	Buffer in which to store random bytes
+ * @v len	Number of random bytes to generate
+ *
+ * @b WARNING: This function is currently underimplemented, and does
+ * not give numbers any stronger than random()!
+ */
+void get_random_bytes ( void *buf, size_t len )
+{
+	u8 *bufp = buf;
+
+	/*
+	 * Somewhat arbitrarily, choose the 0x00FF0000-masked byte
+	 * returned by random() as having good entropy. PRNGs often
+	 * don't provide good entropy in lower bits, and the top byte
+	 * might show a pattern because of sign issues.
+	 */
+
+	while ( len-- ) {
+		*bufp++ = ( random() >> 16 ) & 0xFF;
+	}
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crc32.c ipxe-1.0.1~lliurex1505/src/crypto/crc32.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crc32.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/crc32.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crypto_null.c ipxe-1.0.1~lliurex1505/src/crypto/crypto_null.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/crypto_null.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/crypto_null.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -82,56 +81,7 @@
 	.decrypt = cipher_null_decrypt,
 };
 
-static int pubkey_null_init ( void *ctx __unused, const void *key __unused,
-			      size_t key_len __unused ) {
-	return 0;
-}
-
-static size_t pubkey_null_max_len ( void *ctx __unused ) {
-	return 0;
-}
-
-static int pubkey_null_encrypt ( void *ctx __unused,
-				 const void *plaintext __unused,
-				 size_t plaintext_len __unused,
-				 void *ciphertext __unused ) {
-	return 0;
-}
-
-static int pubkey_null_decrypt ( void *ctx __unused,
-				 const void *ciphertext __unused,
-				 size_t ciphertext_len __unused,
-				 void *plaintext __unused ) {
-	return 0;
-}
-
-static int pubkey_null_sign ( void *ctx __unused,
-			      struct digest_algorithm *digest __unused,
-			      const void *value __unused,
-			      void *signature __unused ) {
-	return 0;
-}
-
-static int pubkey_null_verify ( void *ctx __unused,
-				struct digest_algorithm *digest __unused,
-				const void *value __unused,
-				const void *signature __unused ,
-				size_t signature_len __unused ) {
-	return 0;
-}
-
-static void pubkey_null_final ( void *ctx __unused ) {
-	/* Do nothing */
-}
-
 struct pubkey_algorithm pubkey_null = {
 	.name = "null",
 	.ctxsize = 0,
-	.init = pubkey_null_init,
-	.max_len = pubkey_null_max_len,
-	.encrypt = pubkey_null_encrypt,
-	.decrypt = pubkey_null_decrypt,
-	.sign = pubkey_null_sign,
-	.verify = pubkey_null_verify,
-	.final = pubkey_null_final,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/drbg.c ipxe-1.0.1~lliurex1505/src/crypto/drbg.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/drbg.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/drbg.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,427 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * DRBG mechanism
- *
- * This mechanism is designed to comply with ANS X9.82 Part 3-2007
- * Section 9.  This standard is not freely available, but most of the
- * text appears to be shared with NIST SP 800-90, which can be
- * downloaded from
- *
- *     http://csrc.nist.gov/publications/nistpubs/800-90/SP800-90revised_March2007.pdf
- *
- * Where possible, references are given to both documents.  In the
- * case of any disagreement, ANS X9.82 takes priority over NIST SP
- * 800-90.  (In particular, note that some algorithms that are
- * Approved by NIST SP 800-90 are not Approved by ANS X9.82.)
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <errno.h>
-#include <assert.h>
-#include <ipxe/entropy.h>
-#include <ipxe/drbg.h>
-
-/**
- * Instantiate DRBG
- *
- * @v state		Algorithm state to be initialised
- * @v personal		Personalisation string
- * @v personal_len	Length of personalisation string
- * @ret rc		Return status code
- *
- * This is the Instantiate_function defined in ANS X9.82 Part 3-2007
- * Section 9.2 (NIST SP 800-90 Section 9.1).
- *
- * Only a single security strength is supported, and prediction
- * resistance is always enabled.  The nonce is accounted for by
- * increasing the entropy input, as per ANS X9.82 Part 3-2007 Section
- * 8.4.2 (NIST SP 800-90 Section 8.6.7).
- */
-int drbg_instantiate ( struct drbg_state *state, const void *personal,
-		       size_t personal_len ) {
-	unsigned int entropy_bits = ( ( 3 * DRBG_SECURITY_STRENGTH + 1 ) / 2 );
-	size_t min_len = DRBG_MIN_ENTROPY_LEN_BYTES;
-	size_t max_len = DRBG_MAX_ENTROPY_LEN_BYTES;
-	uint8_t data[max_len];
-	int len;
-	int rc;
-
-	DBGC ( state, "DRBG %p instantiate\n", state );
-
-	/* Sanity checks */
-	assert ( state != NULL );
-
-	/* 1.  If requested_instantiation_security_strength >
-	 *     highest_supported_security_strength, then return an
-	 *     ERROR_FLAG
-	 */
-	if ( DRBG_SECURITY_STRENGTH > DRBG_MAX_SECURITY_STRENGTH ) {
-		DBGC ( state, "DRBG %p cannot support security strength %d\n",
-		       state, DRBG_SECURITY_STRENGTH );
-		return -ENOTSUP;
-	}
-
-	/* 2.  If prediction_resistance_flag is set, and prediction
-	 *     resistance is not supported, then return an ERROR_FLAG
-	 *
-	 * (Nothing to do since prediction resistance is always
-	 * supported.)
-	 */
-
-	/* 3.  If the length of the personalization_string >
-	 *     max_personalization_string_length, return an ERROR_FLAG
-	 */
-	if ( personal_len > DRBG_MAX_PERSONAL_LEN_BYTES ) {
-		DBGC ( state, "DRBG %p personalisation string too long (%zd "
-		       "bytes)\n", state, personal_len );
-		return -ERANGE;
-	}
-
-	/* 4.  Set security_strength to the nearest security strength
-	 *     greater than or equal to
-	 *     requested_instantiation_security_strength.
-	 *
-	 * (Nothing to do since we support only a single security
-	 * strength.)
-	 */
-
-	/* 5.  Using the security_strength, select appropriate DRBG
-	 *     mechanism parameters.
-	 *
-	 * (Nothing to do since we support only a single security
-	 * strength.)
-	 */
-
-	/* 6.  ( status, entropy_input ) = Get_entropy_input (
-	 *     security_strength, min_length, max_length,
-	 *     prediction_resistance_request )
-	 * 7.  If an ERROR is returned in step 6, return a
-	 *     CATASTROPHIC_ERROR_FLAG.
-	 * 8.  Obtain a nonce.
-	 */
-	len = get_entropy_input ( entropy_bits, data, min_len,
-				  sizeof ( data ) );
-	if ( len < 0 ) {
-		rc = len;
-		DBGC ( state, "DRBG %p could not get entropy input: %s\n",
-		       state, strerror ( rc ) );
-		return rc;
-	}
-	assert ( len >= ( int ) min_len );
-	assert ( len <= ( int ) sizeof ( data ) );
-
-	/* 9.  initial_working_state = Instantiate_algorithm (
-	 *     entropy_input, nonce, personalization_string ).
-	 */
-	drbg_instantiate_algorithm ( state, data, len, personal, personal_len );
-
-	/* 10.  Get a state_handle for a currently empty state.  If an
-	 *      empty internal state cannot be found, return an
-	 *      ERROR_FLAG.
-	 * 11.  Set the internal state indicated by state_handle to
-	 *      the initial values for the internal state (i.e. set
-	 *      the working_state to the values returned as
-	 *      initial_working_state in step 9 and any other values
-	 *      required for the working_state, and set the
-	 *      administrative information to the appropriate values.
-	 *
-	 * (Almost nothing to do since the memory to hold the state
-	 * was passed in by the caller and has already been updated
-	 * in-situ.)
-	 */
-	state->reseed_required = 0;
-	state->valid = 1;
-
-	/* 12.  Return SUCCESS and state_handle. */
-	return 0;
-}
-
-/**
- * Reseed DRBG
- *
- * @v state		Algorithm state
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- * @ret rc		Return status code
- *
- * This is the Reseed_function defined in ANS X9.82 Part 3-2007
- * Section 9.3 (NIST SP 800-90 Section 9.2).
- *
- * Prediction resistance is always enabled.
- */
-int drbg_reseed ( struct drbg_state *state, const void *additional,
-		  size_t additional_len ) {
-	unsigned int entropy_bits = DRBG_SECURITY_STRENGTH;
-	size_t min_len = DRBG_MIN_ENTROPY_LEN_BYTES;
-	size_t max_len = DRBG_MAX_ENTROPY_LEN_BYTES;
-	uint8_t data[max_len];
-	int len;
-	int rc;
-
-	DBGC ( state, "DRBG %p reseed\n", state );
-
-	/* Sanity checks */
-	assert ( state != NULL );
-
-	/* 1.  Using state_handle, obtain the current internal state.
-	 *     If state_handle indicates an invalid or empty internal
-	 *     state, return an ERROR_FLAG.
-	 *
-	 * (Almost nothing to do since the memory holding the internal
-	 * state was passed in by the caller.)
-	 */
-	if ( ! state->valid ) {
-		DBGC ( state, "DRBG %p not valid\n", state );
-		return -EINVAL;
-	}
-
-	/* 2.  If prediction_resistance_request is set, and
-	 *     prediction_resistance_flag is not set, then return an
-	 *     ERROR_FLAG.
-	 *
-	 * (Nothing to do since prediction resistance is always
-	 * supported.)
-	 */
-
-	/* 3.  If the length of the additional_input >
-	 *     max_additional_input_length, return an ERROR_FLAG.
-	 */
-	if ( additional_len > DRBG_MAX_ADDITIONAL_LEN_BYTES ) {
-		DBGC ( state, "DRBG %p additional input too long (%zd bytes)\n",
-		       state, additional_len );
-		return -ERANGE;
-	}
-
-	/* 4.  ( status, entropy_input ) = Get_entropy_input (
-	 *     security_strength, min_length, max_length,
-	 *     prediction_resistance_request ).
-	 *
-	 * 5.  If an ERROR is returned in step 4, return a
-	 *     CATASTROPHIC_ERROR_FLAG.
-	 */
-	len = get_entropy_input ( entropy_bits, data, min_len,
-				  sizeof ( data ) );
-	if ( len < 0 ) {
-		rc = len;
-		DBGC ( state, "DRBG %p could not get entropy input: %s\n",
-		       state, strerror ( rc ) );
-		return rc;
-	}
-
-	/* 6.  new_working_state = Reseed_algorithm ( working_state,
-	 *     entropy_input, additional_input ).
-	 */
-	drbg_reseed_algorithm ( state, data, len, additional, additional_len );
-
-	/* 7.  Replace the working_state in the internal state
-	 *     indicated by state_handle with the values of
-	 *     new_working_state obtained in step 6.
-	 *
-	 * (Nothing to do since the state has already been updated in-situ.)
-	 */
-
-	/* 8.  Return SUCCESS. */
-	return 0;
-}
-
-/**
- * Generate pseudorandom bits using DRBG
- *
- * @v state		Algorithm state
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- * @v prediction_resist	Prediction resistance is required
- * @v data		Output buffer
- * @v len		Length of output buffer
- * @ret rc		Return status code
- *
- * This is the Generate_function defined in ANS X9.82 Part 3-2007
- * Section 9.4 (NIST SP 800-90 Section 9.3).
- *
- * Requests must be for an integral number of bytes.  Only a single
- * security strength is supported.  Prediction resistance is supported
- * if requested.
- */
-int drbg_generate ( struct drbg_state *state, const void *additional,
-		    size_t additional_len, int prediction_resist,
-		    void *data, size_t len ) {
-	int rc;
-
-	DBGC ( state, "DRBG %p generate\n", state );
-
-	/* Sanity checks */
-	assert ( state != NULL );
-	assert ( data != NULL );
-
-	/* 1.  Using state_handle, obtain the current internal state
-	 *     for the instantiation.  If state_handle indicates an
-	 *     invalid or empty internal state, then return an ERROR_FLAG.
-	 *
-	 * (Almost nothing to do since the memory holding the internal
-	 * state was passed in by the caller.)
-	 */
-	if ( ! state->valid ) {
-		DBGC ( state, "DRBG %p not valid\n", state );
-		return -EINVAL;
-	}
-
-	/* 2.  If requested_number_of_bits >
-	 *     max_number_of_bits_per_request, then return an
-	 *     ERROR_FLAG.
-	 */
-	if ( len > DRBG_MAX_GENERATED_LEN_BYTES ) {
-		DBGC ( state, "DRBG %p request too long (%zd bytes)\n",
-		       state, len );
-		return -ERANGE;
-	}
-
-	/* 3.  If requested_security_strength > the security_strength
-	 *     indicated in the internal state, then return an
-	 *     ERROR_FLAG.
-	 *
-	 * (Nothing to do since only a single security strength is
-	 * supported.)
-	 */
-
-	/* 4.  If the length of the additional_input >
-	 *     max_additional_input_length, then return an ERROR_FLAG.
-	 */
-	if ( additional_len > DRBG_MAX_ADDITIONAL_LEN_BYTES ) {
-		DBGC ( state, "DRBG %p additional input too long (%zd bytes)\n",
-		       state, additional_len );
-		return -ERANGE;
-	}
-
-	/* 5.  If prediction_resistance_request is set, and
-	 *     prediction_resistance_flag is not set, then return an
-	 *     ERROR_FLAG.
-	 *
-	 * (Nothing to do since prediction resistance is always
-	 * supported.)
-	 */
-
-	/* 6.  Clear the reseed_required_flag. */
-	state->reseed_required = 0;
-
- step_7:
-	/* 7.  If reseed_required_flag is set, or if
-	 *     prediction_resistance_request is set, then
-	 */
-	if ( state->reseed_required || prediction_resist ) {
-
-		/* 7.1  status = Reseed_function ( state_handle,
-		 *      prediction_resistance_request,
-		 *      additional_input )
-		 * 7.2  If status indicates an ERROR, then return
-		 *      status.
-		 */
-		if ( ( rc = drbg_reseed ( state, additional,
-					  additional_len ) ) != 0 ) {
-			DBGC ( state, "DRBG %p could not reseed: %s\n",
-			       state, strerror ( rc ) );
-			return rc;
-		}
-
-		/* 7.3  Using state_handle, obtain the new internal
-		 *      state.
-		 *
-		 * (Nothing to do since the internal state has been
-		 * updated in-situ.)
-		 */
-
-		/* 7.4  additional_input = the Null string. */
-		additional = NULL;
-		additional_len = 0;
-
-		/* 7.5  Clear the reseed_required_flag. */
-		state->reseed_required = 0;
-	}
-
-	/* 8.  ( status, pseudorandom_bits, new_working_state ) =
-	 *     Generate_algorithm ( working_state,
-	 *     requested_number_of_bits, additional_input ).
-	 */
-	rc = drbg_generate_algorithm ( state, additional, additional_len,
-				       data, len );
-
-	/* 9.  If status indicates that a reseed is required before
-	 *     the requested bits can be generated, then
-	 */
-	if ( rc != 0 ) {
-
-		/* 9.1  Set the reseed_required_flag. */
-		state->reseed_required = 1;
-
-		/* 9.2  If the prediction_resistance_flag is set, then
-		 *      set the prediction_resistance_request
-		 *      indication.
-		 */
-		prediction_resist = 1;
-
-		/* 9.3  Go to step 7. */
-		goto step_7;
-	}
-
-	/* 10.  Replace the old working_state in the internal state
-	 *      indicated by state_handle with the values of
-	 *      new_working_state.
-	 *
-	 * (Nothing to do since the working state has already been
-	 * updated in-situ.)
-	 */
-
-	/* 11.  Return SUCCESS and pseudorandom_bits. */
-	return 0;
-}
-
-/**
- * Uninstantiate DRBG
- *
- * @v state		Algorithm state
- *
- * This is the Uninstantiate_function defined in ANS X9.82 Part 3-2007
- * Section 9.5 (NIST SP 800-90 Section 9.4).
- */
-void drbg_uninstantiate ( struct drbg_state *state ) {
-
-	DBGC ( state, "DRBG %p uninstantiate\n", state );
-
-	/* Sanity checks */
-	assert ( state != NULL );
-
-	/* 1.  If state_handle indicates an invalid state, then return
-	 *     an ERROR_FLAG.
-	 *
-	 * (Nothing to do since the memory holding the internal state
-	 * was passed in by the caller.)
-	 */
-
-	/* 2.  Erase the contents of the internal state indicated by
-	 *     state_handle.
-	 */
-	memset ( state, 0, sizeof ( *state ) );
-
-	/* 3.  Return SUCCESS. */
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/entropy.c ipxe-1.0.1~lliurex1505/src/crypto/entropy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/entropy.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/entropy.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,479 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Entropy source
- *
- * This algorithm is designed to comply with ANS X9.82 Part 4 (April
- * 2011 Draft) Section 13.3.  This standard is unfortunately not
- * freely available.
- */
-
-#include <stdint.h>
-#include <assert.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/crypto.h>
-#include <ipxe/hash_df.h>
-#include <ipxe/entropy.h>
-
-/* Disambiguate the various error causes */
-#define EPIPE_REPETITION_COUNT_TEST \
-	__einfo_error ( EINFO_EPIPE_REPETITION_COUNT_TEST )
-#define EINFO_EPIPE_REPETITION_COUNT_TEST \
-	__einfo_uniqify ( EINFO_EPIPE, 0x01, "Repetition count test failed" )
-#define EPIPE_ADAPTIVE_PROPORTION_TEST \
-	__einfo_error ( EINFO_EPIPE_ADAPTIVE_PROPORTION_TEST )
-#define EINFO_EPIPE_ADAPTIVE_PROPORTION_TEST \
-	__einfo_uniqify ( EINFO_EPIPE, 0x02, "Adaptive proportion test failed" )
-
-/**
- * Calculate cutoff value for the repetition count test
- *
- * @ret cutoff		Cutoff value
- *
- * This is the cutoff value for the Repetition Count Test defined in
- * ANS X9.82 Part 2 (October 2011 Draft) Section 8.5.2.1.2.
- */
-static inline __attribute__ (( always_inline )) unsigned int
-repetition_count_cutoff ( void ) {
-	double max_repetitions;
-	unsigned int cutoff;
-
-	/* The cutoff formula for the repetition test is:
-	 *
-	 *   C = ( 1 + ( -log2(W) / H_min ) )
-	 *
-	 * where W is set at 2^(-30) (in ANS X9.82 Part 2 (October
-	 * 2011 Draft) Section 8.5.2.1.3.1).
-	 */
-	max_repetitions = ( 1 + ( 30 / min_entropy_per_sample() ) );
-
-	/* Round up to a whole number of repetitions.  We don't have
-	 * the ceil() function available, so do the rounding by hand.
-	 */
-	cutoff = max_repetitions;
-	if ( cutoff < max_repetitions )
-		cutoff++;
-	linker_assert ( ( cutoff >= max_repetitions ), rounding_error );
-
-	/* Floating-point operations are not allowed in iPXE since we
-	 * never set up a suitable environment.  Abort the build
-	 * unless the calculated number of repetitions is a
-	 * compile-time constant.
-	 */
-	linker_assert ( __builtin_constant_p ( cutoff ),
-			repetition_count_cutoff_not_constant );
-
-	return cutoff;
-}
-
-/**
- * Perform repetition count test
- *
- * @v sample		Noise sample
- * @ret rc		Return status code
- *
- * This is the Repetition Count Test defined in ANS X9.82 Part 2
- * (October 2011 Draft) Section 8.5.2.1.2.
- */
-static int repetition_count_test ( noise_sample_t sample ) {
-	static noise_sample_t most_recent_sample;
-	static unsigned int repetition_count = 0;
-
-	/* A = the most recently seen sample value
-	 * B = the number of times that value A has been seen in a row
-	 * C = the cutoff value above which the repetition test should fail
-	 */
-
-	/* 1.  For each new sample processed:
-	 *
-	 * (Note that the test for "repetition_count > 0" ensures that
-	 * the initial value of most_recent_sample is treated as being
-	 * undefined.)
-	 */
-	if ( ( sample == most_recent_sample ) && ( repetition_count > 0 ) ) {
-
-		/* a) If the new sample = A, then B is incremented by one. */
-		repetition_count++;
-
-		/*    i.  If B >= C, then an error condition is raised
-		 *        due to a failure of the test
-		 */
-		if ( repetition_count >= repetition_count_cutoff() )
-			return -EPIPE_REPETITION_COUNT_TEST;
-
-	} else {
-
-		/* b) Else:
-		 *    i.  A = new sample
-		 */
-		most_recent_sample = sample;
-
-		/*    ii. B = 1 */
-		repetition_count = 1;
-	}
-
-	return 0;
-}
-
-/**
- * Window size for the adaptive proportion test
- *
- * ANS X9.82 Part 2 (October 2011 Draft) Section 8.5.2.1.3.1.1 allows
- * five possible window sizes: 16, 64, 256, 4096 and 65536.
- *
- * We expect to generate relatively few (<256) entropy samples during
- * a typical iPXE run; the use of a large window size would mean that
- * the test would never complete a single cycle.  We use a window size
- * of 64, which is the smallest window size that permits values of
- * H_min down to one bit per sample.
- */
-#define ADAPTIVE_PROPORTION_WINDOW_SIZE 64
-
-/**
- * Combine adaptive proportion test window size and min-entropy
- *
- * @v n			N (window size)
- * @v h			H (min-entropy)
- * @ret n_h		(N,H) combined value
- */
-#define APC_N_H( n, h ) ( ( (n) << 8 ) | (h) )
-
-/**
- * Define a row of the adaptive proportion cutoff table
- *
- * @v h			H (min-entropy)
- * @v c16		Cutoff for N=16
- * @v c64		Cutoff for N=64
- * @v c256		Cutoff for N=256
- * @v c4096		Cutoff for N=4096
- * @v c65536		Cutoff for N=65536
- */
-#define APC_TABLE_ROW( h, c16, c64, c256, c4096, c65536)	   \
-	case APC_N_H ( 16, h ) :	return c16;		   \
-	case APC_N_H ( 64, h ) :	return c64;   		   \
-	case APC_N_H ( 256, h ) :	return c256;		   \
-	case APC_N_H ( 4096, h ) :	return c4096;		   \
-	case APC_N_H ( 65536, h ) :	return c65536;
-
-/** Value used to represent "N/A" in adaptive proportion cutoff table */
-#define APC_NA 0
-
-/**
- * Look up value in adaptive proportion test cutoff table
- *
- * @v n			N (window size)
- * @v h			H (min-entropy)
- * @ret cutoff		Cutoff
- *
- * This is the table of cutoff values defined in ANS X9.82 Part 2
- * (October 2011 Draft) Section 8.5.2.1.3.1.2.
- */
-static inline __attribute__ (( always_inline )) unsigned int
-adaptive_proportion_cutoff_lookup ( unsigned int n, unsigned int h ) {
-	switch ( APC_N_H ( n, h ) ) {
-		APC_TABLE_ROW (  1, APC_NA,     51,    168,   2240,  33537 );
-		APC_TABLE_ROW (  2, APC_NA,     35,    100,   1193,  17053 );
-		APC_TABLE_ROW (  3,     10,     24,     61,    643,   8705 );
-		APC_TABLE_ROW (  4,      8,     16,     38,    354,   4473 );
-		APC_TABLE_ROW (  5,      6,     12,     25,    200,   2321 );
-		APC_TABLE_ROW (  6,      5,      9,     17,    117,   1220 );
-		APC_TABLE_ROW (  7,      4,      7,     15,     71,    653 );
-		APC_TABLE_ROW (  8,      4,      5,      9,     45,    358 );
-		APC_TABLE_ROW (  9,      3,      4,      7,     30,    202 );
-		APC_TABLE_ROW ( 10,      3,      4,      5,     21,    118 );
-		APC_TABLE_ROW ( 11,      2,      3,      4,     15,     71 );
-		APC_TABLE_ROW ( 12,      2,      3,      4,     11,     45 );
-		APC_TABLE_ROW ( 13,      2,      2,      3,      9,     30 );
-		APC_TABLE_ROW ( 14,      2,      2,      3,      7,     21 );
-		APC_TABLE_ROW ( 15,      1,      2,      2,      6,     15 );
-		APC_TABLE_ROW ( 16,      1,      2,      2,      5,     11 );
-		APC_TABLE_ROW ( 17,      1,      1,      2,      4,      9 );
-		APC_TABLE_ROW ( 18,      1,      1,      2,      4,      7 );
-		APC_TABLE_ROW ( 19,      1,      1,      1,      3,      6 );
-		APC_TABLE_ROW ( 20,      1,      1,      1,      3,      5 );
-	default:
-		return APC_NA;
-	}
-}
-
-/**
- * Calculate cutoff value for the adaptive proportion test
- *
- * @ret cutoff		Cutoff value
- *
- * This is the cutoff value for the Adaptive Proportion Test defined
- * in ANS X9.82 Part 2 (October 2011 Draft) Section 8.5.2.1.3.1.2.
- */
-static inline __attribute__ (( always_inline )) unsigned int
-adaptive_proportion_cutoff ( void ) {
-	unsigned int h;
-	unsigned int n;
-	unsigned int cutoff;
-
-	/* Look up cutoff value in cutoff table */
-	n = ADAPTIVE_PROPORTION_WINDOW_SIZE;
-	h = min_entropy_per_sample();
-	cutoff = adaptive_proportion_cutoff_lookup ( n, h );
-
-	/* Fail unless cutoff value is a build-time constant */
-	linker_assert ( __builtin_constant_p ( cutoff ),
-			adaptive_proportion_cutoff_not_constant );
-
-	/* Fail if cutoff value is N/A */
-	linker_assert ( ( cutoff != APC_NA ),
-			adaptive_proportion_cutoff_not_applicable );
-
-	return cutoff;
-}
-
-/**
- * Perform adaptive proportion test
- *
- * @v sample		Noise sample
- * @ret rc		Return status code
- *
- * This is the Adaptive Proportion Test for the Most Common Value
- * defined in ANS X9.82 Part 2 (October 2011 Draft) Section 8.5.2.1.3.
- */
-static int adaptive_proportion_test ( noise_sample_t sample ) {
-	static noise_sample_t current_counted_sample;
-	static unsigned int sample_count = ADAPTIVE_PROPORTION_WINDOW_SIZE;
-	static unsigned int repetition_count;
-
-	/* A = the sample value currently being counted
-	 * B = the number of samples examined in this run of the test so far
-	 * N = the total number of samples that must be observed in
-	 *     one run of the test, also known as the "window size" of
-	 *     the test
-	 * B = the current number of times that S (sic) has been seen
-	 *     in the W (sic) samples examined so far
-	 * C = the cutoff value above which the repetition test should fail
-	 * W = the probability of a false positive: 2^-30
-	 */
-
-	/* 1.  The entropy source draws the current sample from the
-	 *     noise source.
-	 *
-	 * (Nothing to do; we already have the current sample.)
-	 */
-
-	/* 2.  If S = N, then a new run of the test begins: */
-	if ( sample_count == ADAPTIVE_PROPORTION_WINDOW_SIZE ) {
-
-		/* a.  A = the current sample */
-		current_counted_sample = sample;
-
-		/* b.  S = 0 */
-		sample_count = 0;
-
-		/* c. B = 0 */
-		repetition_count = 0;
-
-	} else {
-
-		/* Else: (the test is already running)
-		 * a.  S = S + 1
-		 */
-		sample_count++;
-
-		/* b.  If A = the current sample, then: */
-		if ( sample == current_counted_sample ) {
-
-			/* i.   B = B + 1 */
-			repetition_count++;
-
-			/* ii.  If S (sic) > C then raise an error
-			 *      condition, because the test has
-			 *      detected a failure
-			 */
-			if ( repetition_count > adaptive_proportion_cutoff() )
-				return -EPIPE_ADAPTIVE_PROPORTION_TEST;
-
-		}
-	}
-
-	return 0;
-}
-
-/**
- * Get entropy sample
- *
- * @ret entropy		Entropy sample
- * @ret rc		Return status code
- *
- * This is the GetEntropy function defined in ANS X9.82 Part 2
- * (October 2011 Draft) Section 6.5.1.
- */
-static int get_entropy ( entropy_sample_t *entropy ) {
-	static int rc = 0;
-	noise_sample_t noise;
-
-	/* Any failure is permanent */
-	if ( rc != 0 )
-		return rc;
-
-	/* Get noise sample */
-	if ( ( rc = get_noise ( &noise ) ) != 0 )
-		return rc;
-
-	/* Perform Repetition Count Test and Adaptive Proportion Test
-	 * as mandated by ANS X9.82 Part 2 (October 2011 Draft)
-	 * Section 8.5.2.1.1.
-	 */
-	if ( ( rc = repetition_count_test ( noise ) ) != 0 )
-		return rc;
-	if ( ( rc = adaptive_proportion_test ( noise ) ) != 0 )
-		return rc;
-
-	/* We do not use any optional conditioning component */
-	*entropy = noise;
-
-	return 0;
-}
-
-/**
- * Calculate number of samples required for startup tests
- *
- * @ret num_samples	Number of samples required
- *
- * ANS X9.82 Part 2 (October 2011 Draft) Section 8.5.2.1.5 requires
- * that at least one full cycle of the continuous tests must be
- * performed at start-up.
- */
-static inline __attribute__ (( always_inline )) unsigned int
-startup_test_count ( void ) {
-	unsigned int num_samples;
-
-	/* At least max(N,C) samples shall be generated by the noise
-	 * source for start-up testing.
-	 */
-	num_samples = repetition_count_cutoff();
-	if ( num_samples < adaptive_proportion_cutoff() )
-		num_samples = adaptive_proportion_cutoff();
-	linker_assert ( __builtin_constant_p ( num_samples ),
-			startup_test_count_not_constant );
-
-	return num_samples;
-}
-
-/**
- * Create next nonce value
- *
- * @ret nonce		Nonce
- *
- * This is the MakeNextNonce function defined in ANS X9.82 Part 4
- * (April 2011 Draft) Section 13.3.4.2.
- */
-static uint32_t make_next_nonce ( void ) {
-	static uint32_t nonce;
-
-	/* The simplest implementation of a nonce uses a large counter */
-	nonce++;
-
-	return nonce;
-}
-
-/**
- * Obtain entropy input temporary buffer
- *
- * @v num_samples	Number of entropy samples
- * @v tmp		Temporary buffer
- * @v tmp_len		Length of temporary buffer
- * @ret rc		Return status code
- *
- * This is (part of) the implementation of the Get_entropy_input
- * function (using an entropy source as the source of entropy input
- * and condensing each entropy source output after each GetEntropy
- * call) as defined in ANS X9.82 Part 4 (April 2011 Draft) Section
- * 13.3.4.2.
- *
- * To minimise code size, the number of samples required is calculated
- * at compilation time.
- */
-int get_entropy_input_tmp ( unsigned int num_samples, uint8_t *tmp,
-			    size_t tmp_len ) {
-	static unsigned int startup_tested = 0;
-	struct {
-		uint32_t nonce;
-		entropy_sample_t sample;
-	} __attribute__ (( packed )) data;;
-	uint8_t df_buf[tmp_len];
-	unsigned int i;
-	int rc;
-
-	/* Enable entropy gathering */
-	if ( ( rc = entropy_enable() ) != 0 )
-		return rc;
-
-	/* Perform mandatory startup tests, if not yet performed */
-	for ( ; startup_tested < startup_test_count() ; startup_tested++ ) {
-		if ( ( rc = get_entropy ( &data.sample ) ) != 0 )
-			goto err_get_entropy;
-	}
-
-	/* 3.  entropy_total = 0
-	 *
-	 * (Nothing to do; the number of entropy samples required has
-	 * already been precalculated.)
-	 */
-
-	/* 4.  tmp = a fixed n-bit value, such as 0^n */
-	memset ( tmp, 0, tmp_len );
-
-	/* 5.  While ( entropy_total < min_entropy ) */
-	while ( num_samples-- ) {
-		/* 5.1.  ( status, entropy_bitstring, assessed_entropy )
-		 *       = GetEntropy()
-		 * 5.2.  If status indicates an error, return ( status, Null )
-		 */
-		if ( ( rc = get_entropy ( &data.sample ) ) != 0 )
-			goto err_get_entropy;
-
-		/* 5.3.  nonce = MakeNextNonce() */
-		data.nonce = make_next_nonce();
-
-		/* 5.4.  tmp = tmp XOR
-		 *             df ( ( nonce || entropy_bitstring ), n )
-		 */
-		hash_df ( &entropy_hash_df_algorithm, &data, sizeof ( data ),
-			  df_buf, sizeof ( df_buf ) );
-		for ( i = 0 ; i < tmp_len ; i++ )
-			tmp[i] ^= df_buf[i];
-
-		/* 5.5.  entropy_total = entropy_total + assessed_entropy
-		 *
-		 * (Nothing to do; the number of entropy samples
-		 * required has already been precalculated.)
-		 */
-	}
-
-	/* Disable entropy gathering */
-	entropy_disable();
-
-	return 0;
-
- err_get_entropy:
-	entropy_disable();
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hash_df.c ipxe-1.0.1~lliurex1505/src/crypto/hash_df.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hash_df.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/hash_df.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,138 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Hash-based derivation function (Hash_df)
- *
- * This algorithm is designed to comply with ANS X9.82 Part 3-2007
- * Section 10.5.2.  This standard is not freely available, but most of
- * the text appears to be shared with NIST SP 800-90, which can be
- * downloaded from
- *
- *     http://csrc.nist.gov/publications/nistpubs/800-90/SP800-90revised_March2007.pdf
- *
- * Where possible, references are given to both documents.  In the
- * case of any disagreement, ANS X9.82 takes priority over NIST SP
- * 800-90.  (In particular, note that some algorithms that are
- * Approved by NIST SP 800-90 are not Approved by ANS X9.82.)
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-#include <byteswap.h>
-#include <ipxe/crypto.h>
-#include <ipxe/hash_df.h>
-
-/**
- * Distribute entropy throughout a buffer
- *
- * @v hash		Underlying hash algorithm
- * @v input		Input data
- * @v input_len		Length of input data, in bytes
- * @v output		Output buffer
- * @v output_len	Length of output buffer, in bytes
- *
- * This is the Hash_df function defined in ANS X9.82 Part 3-2007
- * Section 10.5.2 (NIST SP 800-90 Section 10.4.1).
- *
- * The number of bits requested is implicit in the length of the
- * output buffer.  Requests must be for an integral number of bytes.
- *
- * The output buffer is filled incrementally with each iteration of
- * the central loop, rather than constructing an overall "temp" and
- * then taking the leftmost(no_of_bits_to_return) bits.
- *
- * There is no way for the Hash_df function to fail.  The returned
- * status SUCCESS is implicit.
- */
-void hash_df ( struct digest_algorithm *hash, const void *input,
-	       size_t input_len, void *output, size_t output_len ) {
-	uint8_t context[hash->ctxsize];
-	uint8_t digest[hash->digestsize];
-	size_t frag_len;
-	struct {
-		uint8_t pad[3];
-		uint8_t counter;
-		uint32_t no_of_bits_to_return;
-	} __attribute__ (( packed )) prefix;
-	void *temp;
-	size_t remaining;
-
-	DBGC ( &hash_df, "HASH_DF input:\n" );
-	DBGC_HDA ( &hash_df, 0, input, input_len );
-
-	/* Sanity checks */
-	assert ( input != NULL );
-	assert ( output != NULL );
-
-	/* 1.  temp = the Null string
-	 * 2.  len = ceil ( no_of_bits_to_return / outlen )
-	 *
-	 * (Nothing to do.  We fill the output buffer incrementally,
-	 * rather than constructing the complete "temp" in-memory.
-	 * "len" is implicit in the number of iterations required to
-	 * fill the output buffer, and so is not calculated
-	 * explicitly.)
-	 */
-
-	/* 3.  counter = an 8-bit binary value representing the integer "1" */
-	prefix.counter = 1;
-
-	/* 4.  For i = 1 to len do */
-	for ( temp = output, remaining = output_len ; remaining > 0 ; ) {
-
-		/* Comment: in step 5.1 (sic), no_of_bits_to_return is
-		 * used as a 32-bit string.
-		 *
-		 * 4.1  temp = temp || Hash ( counter || no_of_bits_to_return
-		 *                            || input_string )
-		 */
-		prefix.no_of_bits_to_return = htonl ( output_len * 8 );
-		digest_init ( hash, context );
-		digest_update ( hash, context, &prefix.counter,
-				( sizeof ( prefix ) -
-				  offsetof ( typeof ( prefix ), counter ) ) );
-		digest_update ( hash, context, input, input_len );
-		digest_final ( hash, context, digest );
-
-		/* 4.2  counter = counter + 1 */
-		prefix.counter++;
-
-		/* 5.    requested_bits = Leftmost ( no_of_bits_to_return )
-		 *       of temp
-		 *
-		 * (We fill the output buffer incrementally.)
-		 */
-		frag_len = sizeof ( digest );
-		if ( frag_len > remaining )
-			frag_len = remaining;
-		memcpy ( temp, digest, frag_len );
-		temp += frag_len;
-		remaining -= frag_len;
-	}
-
-	/* 6.  Return SUCCESS and requested_bits */
-	DBGC ( &hash_df, "HASH_DF output:\n" );
-	DBGC_HDA ( &hash_df, 0, output, output_len );
-	return;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hmac.c ipxe-1.0.1~lliurex1505/src/crypto/hmac.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hmac.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/hmac.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hmac_drbg.c ipxe-1.0.1~lliurex1505/src/crypto/hmac_drbg.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/hmac_drbg.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/hmac_drbg.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,359 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * HMAC_DRBG algorithm
- *
- * This algorithm is designed to comply with ANS X9.82 Part 3-2007
- * Section 10.2.2.2.  This standard is not freely available, but most
- * of the text appears to be shared with NIST SP 800-90, which can be
- * downloaded from
- *
- *     http://csrc.nist.gov/publications/nistpubs/800-90/SP800-90revised_March2007.pdf
- *
- * Where possible, references are given to both documents.  In the
- * case of any disagreement, ANS X9.82 takes priority over NIST SP
- * 800-90.  (In particular, note that some algorithms that are
- * Approved by NIST SP 800-90 are not Approved by ANS X9.82.)
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <errno.h>
-#include <assert.h>
-#include <ipxe/crypto.h>
-#include <ipxe/hmac.h>
-#include <ipxe/hmac_drbg.h>
-
-/**
- * Update the HMAC_DRBG key
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state
- * @v data		Provided data
- * @v len		Length of provided data
- * @v single		Single byte used in concatenation
- *
- * This function carries out the operation
- *
- *     K = HMAC ( K, V || single || provided_data )
- *
- * as used by hmac_drbg_update()
- */
-static void hmac_drbg_update_key ( struct digest_algorithm *hash,
-				   struct hmac_drbg_state *state,
-				   const void *data, size_t len,
-				   const uint8_t single ) {
-	uint8_t context[ hash->ctxsize ];
-	size_t out_len = hash->digestsize;
-
-	DBGC ( state, "HMAC_DRBG_%s %p provided data :\n", hash->name, state );
-	DBGC_HDA ( state, 0, data, len );
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-	assert ( ( data != NULL ) || ( len == 0 ) );
-	assert ( ( single == 0x00 ) || ( single == 0x01 ) );
-
-	/* K = HMAC ( K, V || single || provided_data ) */
-	hmac_init ( hash, context, state->key, &out_len );
-	assert ( out_len == hash->digestsize );
-	hmac_update ( hash, context, state->value, out_len );
-	hmac_update ( hash, context, &single, sizeof ( single ) );
-	hmac_update ( hash, context, data, len );
-	hmac_final ( hash, context, state->key, &out_len, state->key );
-	assert ( out_len == hash->digestsize );
-
-	DBGC ( state, "HMAC_DRBG_%s %p K = HMAC ( K, V || %#02x || "
-	       "provided_data ) :\n", hash->name, state, single );
-	DBGC_HDA ( state, 0, state->key, out_len );
-}
-
-/**
- * Update the HMAC_DRBG value
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state
- * @v data		Provided data
- * @v len		Length of provided data
- * @v single		Single byte used in concatenation
- *
- * This function carries out the operation
- *
- *     V = HMAC ( K, V )
- *
- * as used by hmac_drbg_update() and hmac_drbg_generate()
- */
-static void hmac_drbg_update_value ( struct digest_algorithm *hash,
-				     struct hmac_drbg_state *state ) {
-	uint8_t context[ hash->ctxsize ];
-	size_t out_len = hash->digestsize;
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-
-	/* V = HMAC ( K, V ) */
-	hmac_init ( hash, context, state->key, &out_len );
-	assert ( out_len == hash->digestsize );
-	hmac_update ( hash, context, state->value, out_len );
-	hmac_final ( hash, context, state->key, &out_len, state->value );
-	assert ( out_len == hash->digestsize );
-
-	DBGC ( state, "HMAC_DRBG_%s %p V = HMAC ( K, V ) :\n",
-	       hash->name, state );
-	DBGC_HDA ( state, 0, state->value, out_len );
-}
-
-/**
- * Update HMAC_DRBG internal state
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state
- * @v data		Provided data
- * @v len		Length of provided data
- *
- * This is the HMAC_DRBG_Update function defined in ANS X9.82 Part
- * 3-2007 Section 10.2.2.2.2 (NIST SP 800-90 Section 10.1.2.2).
- *
- * The key and value are updated in-place within the HMAC_DRBG
- * internal state.
- */
-static void hmac_drbg_update ( struct digest_algorithm *hash,
-			       struct hmac_drbg_state *state,
-			       const void *data, size_t len ) {
-
-	DBGC ( state, "HMAC_DRBG_%s %p update\n", hash->name, state );
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-	assert ( ( data != NULL ) || ( len == 0 ) );
-
-	/* 1.  K = HMAC ( K, V || 0x00 || provided_data ) */
-	hmac_drbg_update_key ( hash, state, data, len, 0x00 );
-
-	/* 2.  V = HMAC ( K, V ) */
-	hmac_drbg_update_value ( hash, state );
-
-	/* 3.  If ( provided_data = Null ), then return K and V */
-	if ( ! len )
-		return;
-
-	/* 4.  K = HMAC ( K, V || 0x01 || provided_data ) */
-	hmac_drbg_update_key ( hash, state, data, len, 0x01 );
-
-	/* 5.  V = HMAC ( K, V ) */
-	hmac_drbg_update_value ( hash, state );
-
-	/* 6.  Return K and V */
-}
-
-/**
- * Instantiate HMAC_DRBG
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state to be initialised
- * @v entropy		Entropy input
- * @v entropy_len	Length of entropy input
- * @v personal		Personalisation string
- * @v personal_len	Length of personalisation string
- *
- * This is the HMAC_DRBG_Instantiate_algorithm function defined in ANS
- * X9.82 Part 3-2007 Section 10.2.2.2.3 (NIST SP 800-90 Section
- * 10.1.2.3).
- *
- * The nonce must be included within the entropy input (i.e. the
- * entropy input must contain at least 3/2 * security_strength bits of
- * entropy, as per ANS X9.82 Part 3-2007 Section 8.4.2 (NIST SP 800-90
- * Section 8.6.7).
- *
- * The key, value and reseed counter are updated in-place within the
- * HMAC_DRBG internal state.
- */
-void hmac_drbg_instantiate ( struct digest_algorithm *hash,
-			     struct hmac_drbg_state *state,
-			     const void *entropy, size_t entropy_len,
-			     const void *personal, size_t personal_len ){
-	size_t out_len = hash->digestsize;
-
-	DBGC ( state, "HMAC_DRBG_%s %p instantiate\n", hash->name, state );
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-	assert ( entropy != NULL );
-	assert ( ( personal != NULL ) || ( personal_len == 0 ) );
-
-	/* 1.  seed_material = entropy_input || nonce ||
-	 *     personalisation_string
-	 */
-
-	/* 2.  Key = 0x00 00..00 */
-	memset ( state->key, 0x00, out_len );
-
-	/* 3.  V = 0x01 01...01 */
-	memset ( state->value, 0x01, out_len );
-
-	/* 4.  ( Key, V ) = HMAC_DBRG_Update ( seed_material, Key, V )
-	 * 5.  reseed_counter = 1
-	 * 6.  Return V, Key and reseed_counter as the
-	 *     initial_working_state
-	 */
-	hmac_drbg_reseed ( hash, state, entropy, entropy_len,
-			   personal, personal_len );
-}
-
-/**
- * Reseed HMAC_DRBG
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state
- * @v entropy		Entropy input
- * @v entropy_len	Length of entropy input
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- *
- * This is the HMAC_DRBG_Reseed_algorithm function defined in ANS X9.82
- * Part 3-2007 Section 10.2.2.2.4 (NIST SP 800-90 Section 10.1.2.4).
- *
- * The key, value and reseed counter are updated in-place within the
- * HMAC_DRBG internal state.
- */
-void hmac_drbg_reseed ( struct digest_algorithm *hash,
-			struct hmac_drbg_state *state,
-			const void *entropy, size_t entropy_len,
-			const void *additional, size_t additional_len ) {
-	uint8_t seed_material[ entropy_len + additional_len ];
-
-	DBGC ( state, "HMAC_DRBG_%s %p (re)seed\n", hash->name, state );
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-	assert ( entropy != NULL );
-	assert ( ( additional != NULL ) || ( additional_len == 0 ) );
-
-	/* 1.  seed_material = entropy_input || additional_input */
-	memcpy ( seed_material, entropy, entropy_len );
-	memcpy ( ( seed_material + entropy_len ), additional, additional_len );
-	DBGC ( state, "HMAC_DRBG_%s %p seed material :\n", hash->name, state );
-	DBGC_HDA ( state, 0, seed_material, sizeof ( seed_material ) );
-
-	/* 2.  ( Key, V ) = HMAC_DBRG_Update ( seed_material, Key, V ) */
-	hmac_drbg_update ( hash, state, seed_material,
-			   sizeof ( seed_material ) );
-
-	/* 3.  reseed_counter = 1 */
-	state->reseed_counter = 1;
-
-	/* 4.  Return V, Key and reseed_counter as the new_working_state */
-}
-
-/**
- * Generate pseudorandom bits using HMAC_DRBG
- *
- * @v hash		Underlying hash algorithm
- * @v state		HMAC_DRBG internal state
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- * @v data		Output buffer
- * @v len		Length of output buffer
- * @ret rc		Return status code
- *
- * This is the HMAC_DRBG_Generate_algorithm function defined in ANS X9.82
- * Part 3-2007 Section 10.2.2.2.5 (NIST SP 800-90 Section 10.1.2.5).
- *
- * Requests must be for an integral number of bytes.
- *
- * The key, value and reseed counter are updated in-place within the
- * HMAC_DRBG internal state.
- *
- * Note that the only permitted error is "reseed required".
- */
-int hmac_drbg_generate ( struct digest_algorithm *hash,
-			 struct hmac_drbg_state *state,
-			 const void *additional, size_t additional_len,
-			 void *data, size_t len ) {
-	size_t out_len = hash->digestsize;
-	void *orig_data = data;
-	size_t orig_len = len;
-	size_t frag_len;
-
-	DBGC ( state, "HMAC_DRBG_%s %p generate\n", hash->name, state );
-
-	/* Sanity checks */
-	assert ( hash != NULL );
-	assert ( state != NULL );
-	assert ( data != NULL );
-	assert ( ( additional != NULL ) || ( additional_len == 0 ) );
-
-	/* 1.  If reseed_counter > reseed_interval, then return an
-	 *     indication that a reseed is required
-	 */
-	if ( state->reseed_counter > HMAC_DRBG_RESEED_INTERVAL ) {
-		DBGC ( state, "HMAC_DRBG_%s %p reseed interval exceeded\n",
-		       hash->name, state );
-		return -ESTALE;
-	}
-
-	/* 2.  If additional_input != Null, then
-	 *     ( Key, V ) = HMAC_DRBG_Update ( additional_input, Key, V )
-	 */
-	if ( additional_len )
-		hmac_drbg_update ( hash, state, additional, additional_len );
-
-	/* 3.  temp = Null
-	 * 4.  While ( len ( temp ) < requested_number_of_bits ) do:
-	 */
-	while ( len ) {
-
-		/* 4.1  V = HMAC ( Key, V ) */
-		hmac_drbg_update_value ( hash, state );
-
-		/* 4.2.  temp = temp || V
-		 * 5.    returned_bits = Leftmost requested_number_of_bits
-		 *       of temp
-		 */
-		frag_len = len;
-		if ( frag_len > out_len )
-			frag_len = out_len;
-		memcpy ( data, state->value, frag_len );
-		data += frag_len;
-		len -= frag_len;
-	}
-
-	/* 6.  ( Key, V ) = HMAC_DRBG_Update ( additional_input, Key, V ) */
-	hmac_drbg_update ( hash, state, additional, additional_len );
-
-	/* 7.  reseed_counter = reseed_counter + 1 */
-	state->reseed_counter++;
-
-	DBGC ( state, "HMAC_DRBG_%s %p generated :\n", hash->name, state );
-	DBGC_HDA ( state, 0, orig_data, orig_len );
-
-	/* 8.  Return SUCCESS, returned_bits, and the new values of
-	 *     Key, V and reseed_counter as the new_working_state
-	 */
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/md5.c ipxe-1.0.1~lliurex1505/src/crypto/md5.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/md5.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/md5.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,298 +1,234 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
+/* 
+ * Cryptographic API.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
+ * MD5 Message Digest Algorithm (RFC1321).
  *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
+ * Derived from cryptoapi implementation, originally based on the
+ * public domain implementation written by Colin Plumb in 1993.
+ *
+ * Reduced object size by around 50% compared to the original Linux
+ * version for use in Etherboot by Michael Brown.
+ *
+ * Copyright (c) Cryptoapi developers.
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ * Copyright (c) 2006 Michael Brown <mbrown@fensystems.co.uk>
+ * 
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option) 
+ * any later version.
  *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-/** @file
- *
- * MD5 algorithm
- *
- */
-
 #include <stdint.h>
 #include <string.h>
 #include <byteswap.h>
-#include <assert.h>
-#include <ipxe/rotate.h>
 #include <ipxe/crypto.h>
-#include <ipxe/asn1.h>
 #include <ipxe/md5.h>
 
-/** MD5 variables */
-struct md5_variables {
-	/* This layout matches that of struct md5_digest_data,
-	 * allowing for efficient endianness-conversion,
-	 */
-	uint32_t a;
-	uint32_t b;
-	uint32_t c;
-	uint32_t d;
-	uint32_t w[16];
-} __attribute__ (( packed ));
-
-/** MD5 constants */
-static const uint32_t k[64] = {
-	0xd76aa478, 0xe8c7b756, 0x242070db, 0xc1bdceee, 0xf57c0faf, 0x4787c62a,
-	0xa8304613, 0xfd469501, 0x698098d8, 0x8b44f7af, 0xffff5bb1, 0x895cd7be,
-	0x6b901122, 0xfd987193, 0xa679438e, 0x49b40821, 0xf61e2562, 0xc040b340,
-	0x265e5a51, 0xe9b6c7aa, 0xd62f105d, 0x02441453, 0xd8a1e681, 0xe7d3fbc8,
-	0x21e1cde6, 0xc33707d6, 0xf4d50d87, 0x455a14ed, 0xa9e3e905, 0xfcefa3f8,
-	0x676f02d9, 0x8d2a4c8a, 0xfffa3942, 0x8771f681, 0x6d9d6122, 0xfde5380c,
-	0xa4beea44, 0x4bdecfa9, 0xf6bb4b60, 0xbebfbc70, 0x289b7ec6, 0xeaa127fa,
-	0xd4ef3085, 0x04881d05, 0xd9d4d039, 0xe6db99e5, 0x1fa27cf8, 0xc4ac5665,
-	0xf4292244, 0x432aff97, 0xab9423a7, 0xfc93a039, 0x655b59c3, 0x8f0ccc92,
-	0xffeff47d, 0x85845dd1, 0x6fa87e4f, 0xfe2ce6e0, 0xa3014314, 0x4e0811a1,
-	0xf7537e82, 0xbd3af235, 0x2ad7d2bb, 0xeb86d391
-};
-
-/** MD5 shift amounts */
-static const uint8_t r[64] = {
-	7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22, 7, 12, 17, 22,
-	5,  9, 14, 20, 5,  9, 14, 20, 5,  9, 14, 20, 5,  9, 14, 20,
-	4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23, 4, 11, 16, 23,
-	6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21, 6, 10, 15, 21
+struct md5_step {
+	u32 ( * f ) ( u32 b, u32 c, u32 d );
+	u8 coefficient;
+	u8 constant;
 };
 
-/**
- * f(b,c,d) for steps 0 to 15
- *
- * @v v		MD5 variables
- * @ret f	f(b,c,d)
- */
-static uint32_t md5_f_0_15 ( struct md5_variables *v ) {
-	return ( v->d ^ ( v->b & ( v->c ^ v->d ) ) );
+static u32 f1(u32 b, u32 c, u32 d)
+{
+	return ( d ^ ( b & ( c ^ d ) ) );
 }
 
-/**
- * f(b,c,d) for steps 16 to 31
- *
- * @v v		MD5 variables
- * @ret f	f(b,c,d)
- */
-static uint32_t md5_f_16_31 ( struct md5_variables *v ) {
-	return ( v->c ^ ( v->d & ( v->b ^ v->c ) ) );
+static u32 f2(u32 b, u32 c, u32 d)
+{
+	return ( c ^ ( d & ( b ^ c ) ) );
 }
 
-/**
- * f(b,c,d) for steps 32 to 47
- *
- * @v v		MD5 variables
- * @ret f	f(b,c,d)
- */
-static uint32_t md5_f_32_47 ( struct md5_variables *v ) {
-	return ( v->b ^ v->c ^ v->d );
+static u32 f3(u32 b, u32 c, u32 d)
+{
+	return ( b ^ c ^ d );
 }
 
-/**
- * f(b,c,d) for steps 48 to 63
- *
- * @v v		MD5 variables
- * @ret f	f(b,c,d)
- */
-static uint32_t md5_f_48_63 ( struct md5_variables *v ) {
-	return ( v->c ^ ( v->b | (~v->d) ) );
+static u32 f4(u32 b, u32 c, u32 d)
+{
+	return ( c ^ ( b | ~d ) );
 }
 
-/** An MD5 step function */
-struct md5_step {
-	/**
-	 * Calculate f(b,c,d)
-	 *
-	 * @v v		MD5 variables
-	 * @ret f	f(b,c,d)
-	 */
-	uint32_t ( * f ) ( struct md5_variables *v );
-	/** Coefficient of i in g=ni+m */
-	uint8_t coefficient;
-	/** Constant term in g=ni+m */
-	uint8_t constant;
-};
-
-/** MD5 steps */
 static struct md5_step md5_steps[4] = {
-	/** 0 to 15 */
-	{ .f = md5_f_0_15,	.coefficient = 1,	.constant = 0 },
-	/** 16 to 31 */
-	{ .f = md5_f_16_31,	.coefficient = 5,	.constant = 1 },
-	/** 32 to 47 */
-	{ .f = md5_f_32_47,	.coefficient = 3,	.constant = 5 },
-	/** 48 to 63 */
-	{ .f = md5_f_48_63,	.coefficient = 7,	.constant = 0 },
+	{
+		.f = f1,
+		.coefficient = 1,
+		.constant = 0,
+	},
+	{
+		.f = f2,
+		.coefficient = 5,
+		.constant = 1,
+	},
+	{
+		.f = f3,
+		.coefficient = 3,
+		.constant = 5,
+	},
+	{
+		.f = f4,
+		.coefficient = 7,
+		.constant = 0,
+	}
 };
 
-/**
- * Initialise MD5 algorithm
- *
- * @v ctx		MD5 context
- */
-static void md5_init ( void *ctx ) {
-	struct md5_context *context = ctx;
+static const u8 r[64] = {
+	7,12,17,22,7,12,17,22,7,12,17,22,7,12,17,22,
+	5,9,14,20,5,9,14,20,5,9,14,20,5,9,14,20,
+	4,11,16,23,4,11,16,23,4,11,16,23,4,11,16,23,
+	6,10,15,21,6,10,15,21,6,10,15,21,6,10,15,21
+};
+
+static const u32 k[64] = {
+	0xd76aa478UL, 0xe8c7b756UL, 0x242070dbUL, 0xc1bdceeeUL,
+	0xf57c0fafUL, 0x4787c62aUL, 0xa8304613UL, 0xfd469501UL,
+	0x698098d8UL, 0x8b44f7afUL, 0xffff5bb1UL, 0x895cd7beUL,
+	0x6b901122UL, 0xfd987193UL, 0xa679438eUL, 0x49b40821UL,
+	0xf61e2562UL, 0xc040b340UL, 0x265e5a51UL, 0xe9b6c7aaUL,
+	0xd62f105dUL, 0x02441453UL, 0xd8a1e681UL, 0xe7d3fbc8UL,
+	0x21e1cde6UL, 0xc33707d6UL, 0xf4d50d87UL, 0x455a14edUL,
+	0xa9e3e905UL, 0xfcefa3f8UL, 0x676f02d9UL, 0x8d2a4c8aUL,
+	0xfffa3942UL, 0x8771f681UL, 0x6d9d6122UL, 0xfde5380cUL,
+	0xa4beea44UL, 0x4bdecfa9UL, 0xf6bb4b60UL, 0xbebfbc70UL,
+	0x289b7ec6UL, 0xeaa127faUL, 0xd4ef3085UL, 0x04881d05UL,
+	0xd9d4d039UL, 0xe6db99e5UL, 0x1fa27cf8UL, 0xc4ac5665UL,
+	0xf4292244UL, 0x432aff97UL, 0xab9423a7UL, 0xfc93a039UL,
+	0x655b59c3UL, 0x8f0ccc92UL, 0xffeff47dUL, 0x85845dd1UL,
+	0x6fa87e4fUL, 0xfe2ce6e0UL, 0xa3014314UL, 0x4e0811a1UL,
+	0xf7537e82UL, 0xbd3af235UL, 0x2ad7d2bbUL, 0xeb86d391UL,
+};
+
+static void md5_transform(u32 *hash, const u32 *in)
+{
+	u32 a, b, c, d, f, g, temp;
+	int i;
+	struct md5_step *step;
+
+	a = hash[0];
+	b = hash[1];
+	c = hash[2];
+	d = hash[3];
+
+	for ( i = 0 ; i < 64 ; i++ ) {
+		step = &md5_steps[i >> 4];
+		f = step->f ( b, c, d );
+		g = ( ( i * step->coefficient + step->constant ) & 0xf );
+		temp = d;
+		d = c;
+		c = b;
+		a += ( f + k[i] + in[g] );
+		a = ( ( a << r[i] ) | ( a >> ( 32-r[i] ) ) );
+		b += a;
+		a = temp;
+	}
 
-	context->ddd.dd.digest.h[0] = cpu_to_le32 ( 0x67452301 );
-	context->ddd.dd.digest.h[1] = cpu_to_le32 ( 0xefcdab89 );
-	context->ddd.dd.digest.h[2] = cpu_to_le32 ( 0x98badcfe );
-	context->ddd.dd.digest.h[3] = cpu_to_le32 ( 0x10325476 );
-	context->len = 0;
+	hash[0] += a;
+	hash[1] += b;
+	hash[2] += c;
+	hash[3] += d;
 }
 
-/**
- * Calculate MD5 digest of accumulated data
- *
- * @v context		MD5 context
- */
-static void md5_digest ( struct md5_context *context ) {
-        union {
-		union md5_digest_data_dwords ddd;
-		struct md5_variables v;
-	} u;
-	uint32_t *a = &u.v.a;
-	uint32_t *b = &u.v.b;
-	uint32_t *c = &u.v.c;
-	uint32_t *d = &u.v.d;
-	uint32_t *w = u.v.w;
-	uint32_t f;
-	uint32_t g;
-	uint32_t temp;
-	struct md5_step *step;
-	unsigned int i;
+/* XXX: this stuff can be optimized */
+static inline void le32_to_cpu_array(u32 *buf, unsigned int words)
+{
+	while (words--) {
+		le32_to_cpus(buf);
+		buf++;
+	}
+}
 
-	/* Sanity checks */
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-	linker_assert ( &u.ddd.dd.digest.h[0] == a, md5_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[1] == b, md5_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[2] == c, md5_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[3] == d, md5_bad_layout );
-	linker_assert ( &u.ddd.dd.data.dword[0] == w, md5_bad_layout );
-
-	DBGC ( context, "MD5 digesting:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
-	DBGC_HDA ( context, context->len, &context->ddd.dd.data,
-		   sizeof ( context->ddd.dd.data ) );
-
-	/* Convert h[0..3] to host-endian, and initialise a, b, c, d,
-	 * and w[0..15]
-	 */
-	for ( i = 0 ; i < ( sizeof ( u.ddd.dword ) /
-			    sizeof ( u.ddd.dword[0] ) ) ; i++ ) {
-		le32_to_cpus ( &context->ddd.dword[i] );
-		u.ddd.dword[i] = context->ddd.dword[i];
+static inline void cpu_to_le32_array(u32 *buf, unsigned int words)
+{
+	while (words--) {
+		cpu_to_le32s(buf);
+		buf++;
 	}
+}
 
-	/* Main loop */
-	for ( i = 0 ; i < 64 ; i++ ) {
-		step = &md5_steps[ i / 16 ];
-		f = step->f ( &u.v );
-		g = ( ( ( step->coefficient * i ) + step->constant ) % 16 );
-		temp = *d;
-		*d = *c;
-		*c = *b;
-		*b = ( *b + rol32 ( ( *a + f + k[i] + w[g] ), r[i] ) );
-		*a = temp;
-		DBGC2 ( context, "%2d : %08x %08x %08x %08x\n",
-			i, *a, *b, *c, *d );
+static inline void md5_transform_helper(struct md5_ctx *ctx)
+{
+	le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32));
+	md5_transform(ctx->hash, ctx->block);
+}
+
+static void md5_init(void *context)
+{
+	struct md5_ctx *mctx = context;
+
+	mctx->hash[0] = 0x67452301;
+	mctx->hash[1] = 0xefcdab89;
+	mctx->hash[2] = 0x98badcfe;
+	mctx->hash[3] = 0x10325476;
+	mctx->byte_count = 0;
+}
+
+static void md5_update(void *context, const void *data, size_t len)
+{
+	struct md5_ctx *mctx = context;
+	const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
+
+	mctx->byte_count += len;
+
+	if (avail > len) {
+		memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
+		       data, len);
+		return;
 	}
 
-	/* Add chunk to hash and convert back to big-endian */
-	for ( i = 0 ; i < 4 ; i++ ) {
-		context->ddd.dd.digest.h[i] =
-			cpu_to_le32 ( context->ddd.dd.digest.h[i] +
-				      u.ddd.dd.digest.h[i] );
+	memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
+	       data, avail);
+
+	md5_transform_helper(mctx);
+	data += avail;
+	len -= avail;
+
+	while (len >= sizeof(mctx->block)) {
+		memcpy(mctx->block, data, sizeof(mctx->block));
+		md5_transform_helper(mctx);
+		data += sizeof(mctx->block);
+		len -= sizeof(mctx->block);
 	}
 
-	DBGC ( context, "MD5 digested:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
+	memcpy(mctx->block, data, len);
 }
 
-/**
- * Accumulate data with MD5 algorithm
- *
- * @v ctx		MD5 context
- * @v data		Data
- * @v len		Length of data
- */
-static void md5_update ( void *ctx, const void *data, size_t len ) {
-	struct md5_context *context = ctx;
-	const uint8_t *byte = data;
-	size_t offset;
-
-	/* Accumulate data a byte at a time, performing the digest
-	 * whenever we fill the data buffer
-	 */
-	while ( len-- ) {
-		offset = ( context->len % sizeof ( context->ddd.dd.data ) );
-		context->ddd.dd.data.byte[offset] = *(byte++);
-		context->len++;
-		if ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 )
-			md5_digest ( context );
+static void md5_final(void *context, void *out)
+{
+	struct md5_ctx *mctx = context;
+	const unsigned int offset = mctx->byte_count & 0x3f;
+	char *p = (char *)mctx->block + offset;
+	int padding = 56 - (offset + 1);
+
+	*p++ = 0x80;
+	if (padding < 0) {
+		memset(p, 0x00, padding + sizeof (u64));
+		md5_transform_helper(mctx);
+		p = (char *)mctx->block;
+		padding = 56;
 	}
-}
 
-/**
- * Generate MD5 digest
- *
- * @v ctx		MD5 context
- * @v out		Output buffer
- */
-static void md5_final ( void *ctx, void *out ) {
-	struct md5_context *context = ctx;
-	uint64_t len_bits;
-	uint8_t pad;
-
-	/* Record length before pre-processing */
-	len_bits = cpu_to_le64 ( ( ( uint64_t ) context->len ) * 8 );
-
-	/* Pad with a single "1" bit followed by as many "0" bits as required */
-	pad = 0x80;
-	do {
-		md5_update ( ctx, &pad, sizeof ( pad ) );
-		pad = 0x00;
-	} while ( ( context->len % sizeof ( context->ddd.dd.data ) ) !=
-		  offsetof ( typeof ( context->ddd.dd.data ), final.len ) );
-
-	/* Append length (in bits) */
-	md5_update ( ctx, &len_bits, sizeof ( len_bits ) );
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-
-	/* Copy out final digest */
-	memcpy ( out, &context->ddd.dd.digest,
-		 sizeof ( context->ddd.dd.digest ) );
+	memset(p, 0, padding);
+	mctx->block[14] = mctx->byte_count << 3;
+	mctx->block[15] = mctx->byte_count >> 29;
+	le32_to_cpu_array(mctx->block, (sizeof(mctx->block) -
+	                  sizeof(u64)) / sizeof(u32));
+	md5_transform(mctx->hash, mctx->block);
+	cpu_to_le32_array(mctx->hash, sizeof(mctx->hash) / sizeof(u32));
+	memcpy(out, mctx->hash, sizeof(mctx->hash));
+	memset(mctx, 0, sizeof(*mctx));
 }
 
-/** MD5 algorithm */
 struct digest_algorithm md5_algorithm = {
 	.name		= "md5",
-	.ctxsize	= sizeof ( struct md5_context ),
-	.blocksize	= sizeof ( union md5_block ),
-	.digestsize	= sizeof ( struct md5_digest ),
+	.ctxsize	= MD5_CTX_SIZE,
+	.blocksize	= ( MD5_BLOCK_WORDS * 4 ),
+	.digestsize	= MD5_DIGEST_SIZE,
 	.init		= md5_init,
 	.update		= md5_update,
 	.final		= md5_final,
 };
-
-/** "md5" object identifier */
-static uint8_t oid_md5[] = { ASN1_OID_MD5 };
-
-/** "md5" OID-identified algorithm */
-struct asn1_algorithm oid_md5_algorithm __asn1_algorithm = {
-	.name = "md5",
-	.digest = &md5_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_md5 ),
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/null_entropy.c ipxe-1.0.1~lliurex1505/src/crypto/null_entropy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/null_entropy.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/null_entropy.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,36 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Nonexistent entropy source
- *
- *
- * This source provides no entropy and must NOT be used in a
- * security-sensitive environment.
- */
-
-#include <ipxe/entropy.h>
-
-PROVIDE_ENTROPY_INLINE ( null, min_entropy_per_sample );
-PROVIDE_ENTROPY_INLINE ( null, entropy_enable );
-PROVIDE_ENTROPY_INLINE ( null, entropy_disable );
-PROVIDE_ENTROPY_INLINE ( null, get_noise );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/ocsp.c ipxe-1.0.1~lliurex1505/src/crypto/ocsp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/ocsp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/ocsp.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,943 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/asn1.h>
-#include <ipxe/x509.h>
-#include <ipxe/sha1.h>
-#include <ipxe/base64.h>
-#include <ipxe/uri.h>
-#include <ipxe/ocsp.h>
-
-/** @file
- *
- * Online Certificate Status Protocol
- *
- */
-
-/* Disambiguate the various error causes */
-#define EACCES_CERT_STATUS						\
-	__einfo_error ( EINFO_EACCES_CERT_STATUS )
-#define EINFO_EACCES_CERT_STATUS					\
-	__einfo_uniqify ( EINFO_EACCES, 0x01,				\
-			  "Certificate status not good" )
-#define EACCES_CERT_MISMATCH						\
-	__einfo_error ( EINFO_EACCES_CERT_MISMATCH )
-#define EINFO_EACCES_CERT_MISMATCH					\
-	__einfo_uniqify ( EINFO_EACCES, 0x02,				\
-			  "Certificate ID mismatch" )
-#define EACCES_NON_OCSP_SIGNING						\
-	__einfo_error ( EINFO_EACCES_NON_OCSP_SIGNING )
-#define EINFO_EACCES_NON_OCSP_SIGNING					\
-	__einfo_uniqify ( EINFO_EACCES, 0x03,				\
-			  "Not an OCSP signing certificate" )
-#define EACCES_STALE							\
-	__einfo_error ( EINFO_EACCES_STALE )
-#define EINFO_EACCES_STALE						\
-	__einfo_uniqify ( EINFO_EACCES, 0x04,				\
-			  "Stale (or premature) OCSP repsonse" )
-#define EACCES_NO_RESPONDER						\
-	__einfo_error ( EINFO_EACCES_NO_RESPONDER )
-#define EINFO_EACCES_NO_RESPONDER					\
-	__einfo_uniqify ( EINFO_EACCES, 0x05,				\
-			  "Missing OCSP responder certificate" )
-#define ENOTSUP_RESPONSE_TYPE						\
-	__einfo_error ( EINFO_ENOTSUP_RESPONSE_TYPE )
-#define EINFO_ENOTSUP_RESPONSE_TYPE					\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01,				\
-			  "Unsupported OCSP response type" )
-#define ENOTSUP_RESPONDER_ID						\
-	__einfo_error ( EINFO_ENOTSUP_RESPONDER_ID )
-#define EINFO_ENOTSUP_RESPONDER_ID					\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x02,				\
-			  "Unsupported OCSP responder ID" )
-#define EPROTO_MALFORMED_REQUEST					\
-	__einfo_error ( EINFO_EPROTO_MALFORMED_REQUEST )
-#define EINFO_EPROTO_MALFORMED_REQUEST					\
-	__einfo_uniqify ( EINFO_EPROTO, OCSP_STATUS_MALFORMED_REQUEST,	\
-			  "Illegal confirmation request" )
-#define EPROTO_INTERNAL_ERROR						\
-	__einfo_error ( EINFO_EPROTO_INTERNAL_ERROR )
-#define EINFO_EPROTO_INTERNAL_ERROR					\
-	__einfo_uniqify ( EINFO_EPROTO, OCSP_STATUS_INTERNAL_ERROR,	\
-			  "Internal error in issuer" )
-#define EPROTO_TRY_LATER						\
-	__einfo_error ( EINFO_EPROTO_TRY_LATER )
-#define EINFO_EPROTO_TRY_LATER						\
-	__einfo_uniqify ( EINFO_EPROTO, OCSP_STATUS_TRY_LATER,		\
-			  "Try again later" )
-#define EPROTO_SIG_REQUIRED						\
-	__einfo_error ( EINFO_EPROTO_SIG_REQUIRED )
-#define EINFO_EPROTO_SIG_REQUIRED					\
-	__einfo_uniqify ( EINFO_EPROTO, OCSP_STATUS_SIG_REQUIRED,	\
-			  "Must sign the request" )
-#define EPROTO_UNAUTHORIZED						\
-	__einfo_error ( EINFO_EPROTO_UNAUTHORIZED )
-#define EINFO_EPROTO_UNAUTHORIZED					\
-	__einfo_uniqify ( EINFO_EPROTO, OCSP_STATUS_UNAUTHORIZED,	\
-			  "Request unauthorized" )
-#define EPROTO_STATUS( status )						\
-	EUNIQ ( EINFO_EPROTO, (status), EPROTO_MALFORMED_REQUEST,	\
-		EPROTO_INTERNAL_ERROR, EPROTO_TRY_LATER,		\
-		EPROTO_SIG_REQUIRED, EPROTO_UNAUTHORIZED )
-
-/** OCSP digest algorithm */
-#define ocsp_digest_algorithm sha1_algorithm
-
-/** OCSP digest algorithm identifier */
-static const uint8_t ocsp_algorithm_id[] =
-	{ OCSP_ALGORITHM_IDENTIFIER ( ASN1_OID_SHA1 ) };
-
-/** OCSP basic response type */
-static const uint8_t oid_basic_response_type[] = { ASN1_OID_OCSP_BASIC };
-
-/** OCSP basic response type cursor */
-static struct asn1_cursor oid_basic_response_type_cursor =
-	ASN1_OID_CURSOR ( oid_basic_response_type );
-
-/**
- * Free OCSP check
- *
- * @v refcnt		Reference count
- */
-static void ocsp_free ( struct refcnt *refcnt ) {
-	struct ocsp_check *ocsp =
-		container_of ( refcnt, struct ocsp_check, refcnt );
-
-	x509_put ( ocsp->cert );
-	x509_put ( ocsp->issuer );
-	free ( ocsp->uri_string );
-	free ( ocsp->request.builder.data );
-	free ( ocsp->response.data );
-	x509_put ( ocsp->response.signer );
-	free ( ocsp );
-}
-
-/**
- * Build OCSP request
- *
- * @v ocsp		OCSP check
- * @ret rc		Return status code
- */
-static int ocsp_request ( struct ocsp_check *ocsp ) {
-	struct digest_algorithm *digest = &ocsp_digest_algorithm;
-	struct asn1_builder *builder = &ocsp->request.builder;
-	struct asn1_cursor *cert_id = &ocsp->request.cert_id;
-	uint8_t digest_ctx[digest->ctxsize];
-	uint8_t name_digest[digest->digestsize];
-	uint8_t pubkey_digest[digest->digestsize];
-	int rc;
-
-	/* Generate digests */
-	digest_init ( digest, digest_ctx );
-	digest_update ( digest, digest_ctx, ocsp->cert->issuer.raw.data,
-			ocsp->cert->issuer.raw.len );
-	digest_final ( digest, digest_ctx, name_digest );
-	digest_init ( digest, digest_ctx );
-	digest_update ( digest, digest_ctx,
-			ocsp->issuer->subject.public_key.raw_bits.data,
-			ocsp->issuer->subject.public_key.raw_bits.len );
-	digest_final ( digest, digest_ctx, pubkey_digest );
-
-	/* Construct request */
-	if ( ( rc = ( asn1_prepend_raw ( builder, ocsp->cert->serial.raw.data,
-					 ocsp->cert->serial.raw.len ),
-		      asn1_prepend ( builder, ASN1_OCTET_STRING,
-				     pubkey_digest, sizeof ( pubkey_digest ) ),
-		      asn1_prepend ( builder, ASN1_OCTET_STRING,
-				     name_digest, sizeof ( name_digest ) ),
-		      asn1_prepend ( builder, ASN1_SEQUENCE,
-				     ocsp_algorithm_id,
-				     sizeof ( ocsp_algorithm_id ) ),
-		      asn1_wrap ( builder, ASN1_SEQUENCE ),
-		      asn1_wrap ( builder, ASN1_SEQUENCE ),
-		      asn1_wrap ( builder, ASN1_SEQUENCE ),
-		      asn1_wrap ( builder, ASN1_SEQUENCE ),
-		      asn1_wrap ( builder, ASN1_SEQUENCE ) ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not build request: %s\n",
-		       ocsp, ocsp->cert->subject.name, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( ocsp, "OCSP %p \"%s\" request is:\n",
-		ocsp, ocsp->cert->subject.name );
-	DBGC2_HDA ( ocsp, 0, builder->data, builder->len );
-
-	/* Parse certificate ID for comparison with response */
-	cert_id->data = builder->data;
-	cert_id->len = builder->len;
-	if ( ( rc = ( asn1_enter ( cert_id, ASN1_SEQUENCE ),
-		      asn1_enter ( cert_id, ASN1_SEQUENCE ),
-		      asn1_enter ( cert_id, ASN1_SEQUENCE ),
-		      asn1_enter ( cert_id, ASN1_SEQUENCE ) ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not locate certID: %s\n",
-		       ocsp, ocsp->cert->subject.name, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Build OCSP URI string
- *
- * @v ocsp		OCSP check
- * @ret rc		Return status code
- */
-static int ocsp_uri_string ( struct ocsp_check *ocsp ) {
-	char *base_uri_string;
-	char *base64_request;
-	size_t base64_request_len;
-	size_t uri_string_len;
-	size_t prefix_len;
-	int rc;
-
-	/* Sanity check */
-	base_uri_string = ocsp->cert->extensions.auth_info.ocsp.uri;
-	if ( ! base_uri_string ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" has no OCSP URI\n",
-		       ocsp, ocsp->cert->subject.name );
-		rc = -ENOTTY;
-		goto err_no_uri;
-	}
-
-	/* Base64-encode the request */
-	base64_request_len = ( base64_encoded_len ( ocsp->request.builder.len )
-			       + 1 /* NUL */ );
-	base64_request = malloc ( base64_request_len );
-	if ( ! base64_request ) {
-		rc = -ENOMEM;
-		goto err_alloc_base64;
-	}
-	base64_encode ( ocsp->request.builder.data, ocsp->request.builder.len,
-			base64_request );
-
-	/* Allocate URI string */
-	uri_string_len = ( strlen ( base_uri_string ) + 1 /* "/" */ +
-			   uri_encode ( base64_request, NULL, 0, URI_FRAGMENT )
-			   + 1 /* NUL */ );
-	ocsp->uri_string = malloc ( uri_string_len );
-	if ( ! ocsp->uri_string ) {
-		rc = -ENOMEM;
-		goto err_alloc_uri;
-	}
-
-	/* Construct URI string */
-	prefix_len = snprintf ( ocsp->uri_string, uri_string_len,
-				"%s/", base_uri_string );
-	uri_encode ( base64_request, ( ocsp->uri_string + prefix_len ),
-		     ( uri_string_len - prefix_len ), URI_FRAGMENT );
-	DBGC2 ( ocsp, "OCSP %p \"%s\" URI is %s\n",
-		ocsp, ocsp->cert->subject.name, ocsp->uri_string );
-
-	/* Free base64-encoded request */
-	free ( base64_request );
-	base64_request = NULL;
-
-	return 0;
-
- err_alloc_uri:
-	free ( base64_request );
- err_alloc_base64:
- err_no_uri:
-	return rc;
-}
-
-/**
- * Create OCSP check
- *
- * @v cert		Certificate to check
- * @v issuer		Issuing certificate
- * @ret ocsp		OCSP check
- * @ret rc		Return status code
- */
-int ocsp_check ( struct x509_certificate *cert,
-		 struct x509_certificate *issuer,
-		 struct ocsp_check **ocsp ) {
-	int rc;
-
-	/* Sanity checks */
-	assert ( cert != NULL );
-	assert ( issuer != NULL );
-	assert ( issuer->valid );
-
-	/* Allocate and initialise check */
-	*ocsp = zalloc ( sizeof ( **ocsp ) );
-	if ( ! *ocsp ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	ref_init ( &(*ocsp)->refcnt, ocsp_free );
-	(*ocsp)->cert = x509_get ( cert );
-	(*ocsp)->issuer = x509_get ( issuer );
-
-	/* Build request */
-	if ( ( rc = ocsp_request ( *ocsp ) ) != 0 )
-		goto err_request;
-
-	/* Build URI string */
-	if ( ( rc = ocsp_uri_string ( *ocsp ) ) != 0 )
-		goto err_uri_string;
-
-	return 0;
-
- err_uri_string:
- err_request:
-	ocsp_put ( *ocsp );
- err_alloc:
-	*ocsp = NULL;
-	return rc;
-}
-
-/**
- * Parse OCSP response status
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_response_status ( struct ocsp_check *ocsp,
-					const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	uint8_t status;
-	int rc;
-
-	/* Enter responseStatus */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	if ( ( rc = asn1_enter ( &cursor, ASN1_ENUMERATED ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not locate responseStatus: "
-		       "%s\n", ocsp, ocsp->cert->subject.name, strerror ( rc ));
-		return rc;
-	}
-
-	/* Extract response status */
-	if ( cursor.len != sizeof ( status ) ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" invalid status:\n",
-		       ocsp, ocsp->cert->subject.name );
-		DBGC_HDA ( ocsp, 0, cursor.data, cursor.len );
-		return -EINVAL;
-	}
-	memcpy ( &status, cursor.data, sizeof ( status ) );
-
-	/* Check response status */
-	if ( status != OCSP_STATUS_SUCCESSFUL ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" response status %d\n",
-		       ocsp, ocsp->cert->subject.name, status );
-		return EPROTO_STATUS ( status );
-	}
-
-	return 0;
-}
-
-/**
- * Parse OCSP response type
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_response_type ( struct ocsp_check *ocsp,
-				      const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-
-	/* Enter responseType */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_OID );
-
-	/* Check responseType is "basic" */
-	if ( asn1_compare ( &oid_basic_response_type_cursor, &cursor ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" response type not supported:\n",
-		       ocsp, ocsp->cert->subject.name );
-		DBGC_HDA ( ocsp, 0, cursor.data, cursor.len );
-		return -ENOTSUP_RESPONSE_TYPE;
-	}
-
-	return 0;
-}
-
-/**
- * Compare responder's certificate name
- *
- * @v ocsp		OCSP check
- * @v cert		Certificate
- * @ret difference	Difference as returned by memcmp()
- */
-static int ocsp_compare_responder_name ( struct ocsp_check *ocsp,
-					 struct x509_certificate *cert ) {
-	struct ocsp_responder *responder = &ocsp->response.responder;
-
-	/* Compare responder ID with certificate's subject */
-	return asn1_compare ( &responder->id, &cert->subject.raw );
-}
-
-/**
- * Compare responder's certificate public key hash
- *
- * @v ocsp		OCSP check
- * @v cert		Certificate
- * @ret difference	Difference as returned by memcmp()
- */
-static int ocsp_compare_responder_key_hash ( struct ocsp_check *ocsp,
-					     struct x509_certificate *cert ) {
-	struct ocsp_responder *responder = &ocsp->response.responder;
-	uint8_t ctx[SHA1_CTX_SIZE];
-	uint8_t digest[SHA1_DIGEST_SIZE];
-	int difference;
-
-	/* Sanity check */
-	difference = ( sizeof ( digest ) - responder->id.len );
-	if ( difference )
-		return difference;
-
-	/* Generate SHA1 hash of certificate's public key */
-	digest_init ( &sha1_algorithm, ctx );
-	digest_update ( &sha1_algorithm, ctx,
-			cert->subject.public_key.raw_bits.data,
-			cert->subject.public_key.raw_bits.len );
-	digest_final ( &sha1_algorithm, ctx, digest );
-
-	/* Compare responder ID with SHA1 hash of certificate's public key */
-	return memcmp ( digest, responder->id.data, sizeof ( digest ) );
-}
-
-/**
- * Parse OCSP responder ID
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_responder_id ( struct ocsp_check *ocsp,
-				     const struct asn1_cursor *raw ) {
-	struct ocsp_responder *responder = &ocsp->response.responder;
-	struct asn1_cursor *responder_id = &responder->id;
-	unsigned int type;
-
-	/* Enter responder ID */
-	memcpy ( responder_id, raw, sizeof ( *responder_id ) );
-	type = asn1_type ( responder_id );
-	asn1_enter_any ( responder_id );
-
-	/* Identify responder ID type */
-	switch ( type ) {
-	case ASN1_EXPLICIT_TAG ( 1 ) :
-		DBGC2 ( ocsp, "OCSP %p \"%s\" responder identified by name\n",
-			ocsp, ocsp->cert->subject.name );
-		responder->compare = ocsp_compare_responder_name;
-		return 0;
-	case ASN1_EXPLICIT_TAG ( 2 ) :
-		DBGC2 ( ocsp, "OCSP %p \"%s\" responder identified by key "
-			"hash\n", ocsp, ocsp->cert->subject.name );
-		responder->compare = ocsp_compare_responder_key_hash;
-		return 0;
-	default:
-		DBGC ( ocsp, "OCSP %p \"%s\" unsupported responder ID type "
-		       "%d\n", ocsp, ocsp->cert->subject.name, type );
-		return -ENOTSUP_RESPONDER_ID;
-	}
-}
-
-/**
- * Parse OCSP certificate ID
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_cert_id ( struct ocsp_check *ocsp,
-				const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-
-	/* Check certID matches request */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_shrink_any ( &cursor );
-	if ( asn1_compare ( &cursor, &ocsp->request.cert_id ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" certID mismatch:\n",
-		       ocsp, ocsp->cert->subject.name );
-		DBGC_HDA ( ocsp, 0, ocsp->request.cert_id.data,
-			   ocsp->request.cert_id.len );
-		DBGC_HDA ( ocsp, 0, cursor.data, cursor.len );
-		return -EACCES_CERT_MISMATCH;
-	}
-
-	return 0;
-}
-
-/**
- * Parse OCSP responses
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_responses ( struct ocsp_check *ocsp,
-				  const struct asn1_cursor *raw ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter responses */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Enter first singleResponse */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse certID */
-	if ( ( rc = ocsp_parse_cert_id ( ocsp, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Check certStatus */
-	if ( asn1_type ( &cursor ) != ASN1_IMPLICIT_TAG ( 0 ) ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" non-good certStatus:\n",
-		       ocsp, ocsp->cert->subject.name );
-		DBGC_HDA ( ocsp, 0, cursor.data, cursor.len );
-		return -EACCES_CERT_STATUS;
-	}
-	asn1_skip_any ( &cursor );
-
-	/* Parse thisUpdate */
-	if ( ( rc = asn1_generalized_time ( &cursor,
-					    &response->this_update ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not parse thisUpdate: %s\n",
-		       ocsp, ocsp->cert->subject.name, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( ocsp, "OCSP %p \"%s\" this update was at time %lld\n",
-		ocsp, ocsp->cert->subject.name, response->this_update );
-	asn1_skip_any ( &cursor );
-
-	/* Parse nextUpdate, if present */
-	if ( asn1_type ( &cursor ) == ASN1_EXPLICIT_TAG ( 0 ) ) {
-		asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-		if ( ( rc = asn1_generalized_time ( &cursor,
-					     &response->next_update ) ) != 0 ) {
-			DBGC ( ocsp, "OCSP %p \"%s\" could not parse "
-			       "nextUpdate: %s\n", ocsp,
-			       ocsp->cert->subject.name, strerror ( rc ) );
-			return rc;
-		}
-		DBGC2 ( ocsp, "OCSP %p \"%s\" next update is at time %lld\n",
-			ocsp, ocsp->cert->subject.name, response->next_update );
-	} else {
-		/* If no nextUpdate is present, this indicates that
-		 * "newer revocation information is available all the
-		 * time".  Actually, this indicates that there is no
-		 * point to performing the OCSP check, since an
-		 * attacker could replay the response at any future
-		 * time and it would still be valid.
-		 */
-		DBGC ( ocsp, "OCSP %p \"%s\" responder is a moron\n",
-		       ocsp, ocsp->cert->subject.name );
-		response->next_update = time ( NULL );
-	}
-
-	return 0;
-}
-
-/**
- * Parse OCSP response data
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_tbs_response_data ( struct ocsp_check *ocsp,
-					  const struct asn1_cursor *raw ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Record raw tbsResponseData */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_shrink_any ( &cursor );
-	memcpy ( &response->tbs, &cursor, sizeof ( response->tbs ) );
-
-	/* Enter tbsResponseData */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Skip version, if present */
-	asn1_skip_if_exists ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-
-	/* Parse responderID */
-	if ( ( rc = ocsp_parse_responder_id ( ocsp, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Skip producedAt */
-	asn1_skip_any ( &cursor );
-
-	/* Parse responses */
-	if ( ( rc = ocsp_parse_responses ( ocsp, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse OCSP certificates
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_certs ( struct ocsp_check *ocsp,
-			      const struct asn1_cursor *raw ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct asn1_cursor cursor;
-	struct x509_certificate *cert;
-	int rc;
-
-	/* Enter certs */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse certificate, if present.  The data structure permits
-	 * multiple certificates, but the protocol requires that the
-	 * OCSP signing certificate must either be the issuer itself,
-	 * or must be directly issued by the issuer (see RFC2560
-	 * section 4.2.2.2 "Authorized Responders").  We therefore
-	 * need to identify only the single certificate matching the
-	 * Responder ID.
-	 */
-	while ( cursor.len ) {
-
-		/* Parse certificate */
-		if ( ( rc = x509_certificate ( cursor.data, cursor.len,
-					       &cert ) ) != 0 ) {
-			DBGC ( ocsp, "OCSP %p \"%s\" could not parse "
-			       "certificate: %s\n", ocsp,
-			       ocsp->cert->subject.name, strerror ( rc ) );
-			DBGC_HDA ( ocsp, 0, cursor.data, cursor.len );
-			return rc;
-		}
-
-		/* Use if this certificate matches the responder ID */
-		if ( response->responder.compare ( ocsp, cert ) == 0 ) {
-			response->signer = cert;
-			DBGC2 ( ocsp, "OCSP %p \"%s\" response is signed by "
-				"\"%s\"\n", ocsp, ocsp->cert->subject.name,
-				response->signer->subject.name );
-			return 0;
-		}
-
-		/* Otherwise, discard this certificate */
-		x509_put ( cert );
-		asn1_skip_any ( &cursor );
-	}
-
-	DBGC ( ocsp, "OCSP %p \"%s\" missing responder certificate\n",
-	       ocsp, ocsp->cert->subject.name );
-	return -EACCES_NO_RESPONDER;
-}
-
-/**
- * Parse OCSP basic response
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_basic_response ( struct ocsp_check *ocsp,
-				       const struct asn1_cursor *raw ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct asn1_algorithm **algorithm = &response->algorithm;
-	struct asn1_bit_string *signature = &response->signature;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter BasicOCSPResponse */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse tbsResponseData */
-	if ( ( rc = ocsp_parse_tbs_response_data ( ocsp, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse signatureAlgorithm */
-	if ( ( rc = asn1_signature_algorithm ( &cursor, algorithm ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" cannot parse signature "
-		       "algorithm: %s\n",
-		       ocsp, ocsp->cert->subject.name, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( ocsp, "OCSP %p \"%s\" signature algorithm is %s\n",
-		ocsp, ocsp->cert->subject.name, (*algorithm)->name );
-	asn1_skip_any ( &cursor );
-
-	/* Parse signature */
-	if ( ( rc = asn1_integral_bit_string ( &cursor, signature ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" cannot parse signature: %s\n",
-		       ocsp, ocsp->cert->subject.name, strerror ( rc ) );
-		return rc;
-	}
-	asn1_skip_any ( &cursor );
-
-	/* Parse certs, if present */
-	if ( ( asn1_type ( &cursor ) == ASN1_EXPLICIT_TAG ( 0 ) ) &&
-	     ( ( rc = ocsp_parse_certs ( ocsp, &cursor ) ) != 0 ) )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse OCSP response bytes
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_response_bytes ( struct ocsp_check *ocsp,
-				       const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter responseBytes */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse responseType */
-	if ( ( rc = ocsp_parse_response_type ( ocsp, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Enter response */
-	asn1_enter ( &cursor, ASN1_OCTET_STRING );
-
-	/* Parse response */
-	if ( ( rc = ocsp_parse_basic_response ( ocsp, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse OCSP response
- *
- * @v ocsp		OCSP check
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int ocsp_parse_response ( struct ocsp_check *ocsp,
-				 const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter OCSPResponse */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse responseStatus */
-	if ( ( rc = ocsp_parse_response_status ( ocsp, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse responseBytes */
-	if ( ( rc = ocsp_parse_response_bytes ( ocsp, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Receive OCSP response
- *
- * @v ocsp		OCSP check
- * @v data		Response data
- * @v len		Length of response data
- * @ret rc		Return status code
- */
-int ocsp_response ( struct ocsp_check *ocsp, const void *data, size_t len ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Duplicate data */
-	x509_put ( response->signer );
-	response->signer = NULL;
-	free ( response->data );
-	response->data = malloc ( len );
-	if ( ! response->data )
-		return -ENOMEM;
-	memcpy ( response->data, data, len );
-	cursor.data = response->data;
-	cursor.len = len;
-
-	/* Parse response */
-	if ( ( rc = ocsp_parse_response ( ocsp, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * OCSP dummy root certificate store
- *
- * OCSP validation uses no root certificates, since it takes place
- * only when there already exists a validated issuer certificate.
- */
-static struct x509_root ocsp_root = {
-	.digest = &ocsp_digest_algorithm,
-	.count = 0,
-	.fingerprints = NULL,
-};
-
-/**
- * Check OCSP response signature
- *
- * @v ocsp		OCSP check
- * @v signer		Signing certificate
- * @ret rc		Return status code
- */
-static int ocsp_check_signature ( struct ocsp_check *ocsp,
-				  struct x509_certificate *signer ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct digest_algorithm *digest = response->algorithm->digest;
-	struct pubkey_algorithm *pubkey = response->algorithm->pubkey;
-	struct x509_public_key *public_key = &signer->subject.public_key;
-	uint8_t digest_ctx[ digest->ctxsize ];
-	uint8_t digest_out[ digest->digestsize ];
-	uint8_t pubkey_ctx[ pubkey->ctxsize ];
-	int rc;
-
-	/* Generate digest */
-	digest_init ( digest, digest_ctx );
-	digest_update ( digest, digest_ctx, response->tbs.data,
-			response->tbs.len );
-	digest_final ( digest, digest_ctx, digest_out );
-
-	/* Initialise public-key algorithm */
-	if ( ( rc = pubkey_init ( pubkey, pubkey_ctx, public_key->raw.data,
-				  public_key->raw.len ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not initialise public key: "
-		       "%s\n", ocsp, ocsp->cert->subject.name, strerror ( rc ));
-		goto err_init;
-	}
-
-	/* Verify digest */
-	if ( ( rc = pubkey_verify ( pubkey, pubkey_ctx, digest, digest_out,
-				    response->signature.data,
-				    response->signature.len ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" signature verification failed: "
-		       "%s\n", ocsp, ocsp->cert->subject.name, strerror ( rc ));
-		goto err_verify;
-	}
-
-	DBGC2 ( ocsp, "OCSP %p \"%s\" signature is correct\n",
-		ocsp, ocsp->cert->subject.name );
-
- err_verify:
-	pubkey_final ( pubkey, pubkey_ctx );
- err_init:
-	return rc;
-}
-
-/**
- * Validate OCSP response
- *
- * @v ocsp		OCSP check
- * @v time		Time at which to validate response
- * @ret rc		Return status code
- */
-int ocsp_validate ( struct ocsp_check *ocsp, time_t time ) {
-	struct ocsp_response *response = &ocsp->response;
-	struct x509_certificate *signer = response->signer;
-	int rc;
-
-	/* Sanity checks */
-	assert ( response->data != NULL );
-	assert ( signer != NULL );
-
-	/* Validate signer, if applicable.  If the signer is not the
-	 * issuer, then it must be signed directly by the issuer.
-	 */
-	if ( signer != ocsp->issuer ) {
-		/* Forcibly invalidate the signer, since we need to
-		 * ensure that it was signed by our issuer (and not
-		 * some other issuer).  This prevents a sub-CA's OCSP
-		 * certificate from fraudulently signing OCSP
-		 * responses from the parent CA.
-		 */
-		x509_invalidate ( signer );
-		if ( ( rc = x509_validate ( signer, ocsp->issuer, time,
-					    &ocsp_root ) ) != 0 ) {
-			DBGC ( ocsp, "OCSP %p \"%s\" could not validate "
-			       "signer \"%s\": %s\n", ocsp,
-			       ocsp->cert->subject.name, signer->subject.name,
-			       strerror ( rc ) );
-			return rc;
-		}
-
-		/* If signer is not the issuer, then it must have the
-		 * extendedKeyUsage id-kp-OCSPSigning.
-		 */
-		if ( ! ( signer->extensions.ext_usage.bits &
-			 X509_OCSP_SIGNING ) ) {
-			DBGC ( ocsp, "OCSP %p \"%s\" signer \"%s\" is "
-			       "not an OCSP-signing certificate\n", ocsp,
-			       ocsp->cert->subject.name, signer->subject.name );
-			return -EACCES_NON_OCSP_SIGNING;
-		}
-	}
-
-	/* Check OCSP response signature */
-	if ( ( rc = ocsp_check_signature ( ocsp, signer ) ) != 0 )
-		return rc;
-
-	/* Check OCSP response is valid at the specified time
-	 * (allowing for some margin of error).
-	 */
-	if ( response->this_update > ( time + X509_ERROR_MARGIN_TIME ) ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" response is not yet valid (at "
-		       "time %lld)\n", ocsp, ocsp->cert->subject.name, time );
-		return -EACCES_STALE;
-	}
-	if ( response->next_update < ( time - X509_ERROR_MARGIN_TIME ) ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" response is stale (at time "
-		       "%lld)\n", ocsp, ocsp->cert->subject.name, time );
-		return -EACCES_STALE;
-	}
-	DBGC2 ( ocsp, "OCSP %p \"%s\" response is valid (at time %lld)\n",
-		ocsp, ocsp->cert->subject.name, time );
-
-	/* Mark certificate as passing OCSP verification */
-	ocsp->cert->extensions.auth_info.ocsp.good = 1;
-
-	/* Validate certificate against issuer */
-	if ( ( rc = x509_validate ( ocsp->cert, ocsp->issuer, time,
-				    &ocsp_root ) ) != 0 ) {
-		DBGC ( ocsp, "OCSP %p \"%s\" could not validate certificate: "
-		       "%s\n", ocsp, ocsp->cert->subject.name, strerror ( rc ));
-		return rc;
-	}
-	DBGC ( ocsp, "OCSP %p \"%s\" successfully validated using \"%s\"\n",
-	       ocsp, ocsp->cert->subject.name, signer->subject.name );
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/random_nz.c ipxe-1.0.1~lliurex1505/src/crypto/random_nz.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/random_nz.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/random_nz.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,76 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Random non-zero bytes
- *
- * The RSA algorithm requires the generation of random non-zero bytes,
- * i.e. bytes in the range [0x01,0xff].
- *
- * This algorithm is designed to comply with ANS X9.82 Part 1-2006
- * Section 9.2.1.  This standard is not freely available, but most of
- * the text appears to be shared with NIST SP 800-90, which can be
- * downloaded from
- *
- *     http://csrc.nist.gov/publications/nistpubs/800-90/SP800-90revised_March2007.pdf
- *
- * Where possible, references are given to both documents.  In the
- * case of any disagreement, ANS X9.82 takes priority over NIST SP
- * 800-90.  (In particular, note that some algorithms that are
- * Approved by NIST SP 800-90 are not Approved by ANS X9.82.)
- */
-
-#include <stddef.h>
-#include <stdint.h>
-#include <ipxe/rbg.h>
-#include <ipxe/random_nz.h>
-
-/**
- * Get random non-zero bytes
- *
- * @v data		Output buffer
- * @v len		Length of output buffer
- * @ret rc		Return status code
- *
- * This algorithm is designed to be isomorphic to the Simple Discard
- * Method described in ANS X9.82 Part 1-2006 Section 9.2.1 (NIST SP
- * 800-90 Section B.5.1.1).
- */
-int get_random_nz ( void *data, size_t len ) {
-	uint8_t *bytes = data;
-	int rc;
-
-	while ( len ) {
-
-		/* Generate random byte */
-		if ( ( rc = rbg_generate ( NULL, 0, 0, bytes, 1 ) ) != 0 )
-			return rc;
-
-		/* Move to next byte if this byte is acceptable */
-		if ( *bytes != 0 ) {
-			bytes++;
-			len--;
-		}
-	}
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rbg.c ipxe-1.0.1~lliurex1505/src/crypto/rbg.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rbg.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/rbg.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,115 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * RBG mechanism
- *
- * This mechanism is designed to comply with ANS X9.82 Part 4 (April
- * 2011 Draft) Section 10.  This standard is unfortunately not freely
- * available.
- *
- * The chosen RBG design is that of a DRBG with a live entropy source
- * with no conditioning function.  Only a single security strength is
- * supported.  No seedfile is used since there may be no non-volatile
- * storage available.  The system UUID is used as the personalisation
- * string.
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/init.h>
-#include <ipxe/settings.h>
-#include <ipxe/uuid.h>
-#include <ipxe/crypto.h>
-#include <ipxe/drbg.h>
-#include <ipxe/rbg.h>
-
-/** The RBG */
-struct random_bit_generator rbg;
-
-/**
- * Start up RBG
- *
- * @ret rc		Return status code
- *
- * This is the RBG_Startup function defined in ANS X9.82 Part 4 (April
- * 2011 Draft) Section 9.1.2.2.
- */
-static int rbg_startup ( void ) {
-	union uuid uuid;
-	int len;
-	int rc;
-
-	/* Try to obtain system UUID for use as personalisation
-	 * string, in accordance with ANS X9.82 Part 3-2007 Section
-	 * 8.5.2.  If no UUID is available, proceed without a
-	 * personalisation string.
-	 */
-	if ( ( len = fetch_uuid_setting ( NULL, &uuid_setting, &uuid ) ) < 0 ) {
-		rc = len;
-		DBGC ( &rbg, "RBG could not fetch personalisation string: "
-		       "%s\n", strerror ( rc ) );
-		len = 0;
-	}
-
-	/* Instantiate DRBG */
-	if ( ( rc = drbg_instantiate ( &rbg.state, &uuid, len ) ) != 0 ) {
-		DBGC ( &rbg, "RBG could not instantiate DRBG: %s\n",
-		       strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Shut down RBG
- *
- */
-static void rbg_shutdown ( void ) {
-
-	/* Uninstantiate DRBG */
-	drbg_uninstantiate ( &rbg.state );
-}
-
-/** RBG startup function */
-static void rbg_startup_fn ( void ) {
-
-	/* Start up RBG.  There is no way to report an error at this
-	 * stage, but a failed startup will result in an invalid DRBG
-	 * that refuses to generate bits.
-	 */
-	rbg_startup();
-}
-
-/** RBG shutdown function */
-static void rbg_shutdown_fn ( int booting __unused ) {
-
-	/* Shut down RBG */
-	rbg_shutdown();
-}
-
-/** RBG startup table entry */
-struct startup_fn startup_rbg __startup_fn ( STARTUP_NORMAL ) = {
-	.startup = rbg_startup_fn,
-	.shutdown = rbg_shutdown_fn,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rootcert.c ipxe-1.0.1~lliurex1505/src/crypto/rootcert.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rootcert.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/rootcert.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,119 +0,0 @@
-/*
- * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <ipxe/crypto.h>
-#include <ipxe/sha256.h>
-#include <ipxe/x509.h>
-#include <ipxe/settings.h>
-#include <ipxe/dhcp.h>
-#include <ipxe/init.h>
-#include <ipxe/rootcert.h>
-
-/** @file
- *
- * Root certificate store
- *
- */
-
-/** Length of a root certificate fingerprint */
-#define FINGERPRINT_LEN SHA256_DIGEST_SIZE
-
-/* Allow trusted certificates to be overridden if not explicitly specified */
-#ifdef TRUSTED
-#define ALLOW_TRUST_OVERRIDE 0
-#else
-#define ALLOW_TRUST_OVERRIDE 1
-#endif
-
-/* Use iPXE root CA if no trusted certificates are explicitly specified */
-#ifndef TRUSTED
-#define TRUSTED								\
-	/* iPXE root CA */						\
-	0x9f, 0xaf, 0x71, 0x7b, 0x7f, 0x8c, 0xa2, 0xf9, 0x3c, 0x25,	\
-	0x6c, 0x79, 0xf8, 0xac, 0x55, 0x91, 0x89, 0x5d, 0x66, 0xd1,	\
-	0xff, 0x3b, 0xee, 0x63, 0x97, 0xa7, 0x0d, 0x29, 0xc6, 0x5e,	\
-	0xed, 0x1a,
-#endif
-
-/** Root certificate fingerprints */
-static const uint8_t fingerprints[] = { TRUSTED };
-
-/** Root certificate fingerprint setting */
-static struct setting trust_setting __setting ( SETTING_CRYPTO ) = {
-	.name = "trust",
-	.description = "Trusted root certificate fingerprints",
-	.tag = DHCP_EB_TRUST,
-	.type = &setting_type_hex,
-};
-
-/** Root certificates */
-struct x509_root root_certificates = {
-	.digest = &sha256_algorithm,
-	.count = ( sizeof ( fingerprints ) / FINGERPRINT_LEN ),
-	.fingerprints = fingerprints,
-};
-
-/**
- * Initialise root certificate
- *
- * The list of trusted root certificates can be specified at build
- * time using the TRUST= build parameter.  If no certificates are
- * specified, then the default iPXE root CA certificate is trusted.
- *
- * If no certificates were explicitly specified, then we allow the
- * list of trusted root certificate fingerprints to be overridden
- * using the "trust" setting, but only at the point of iPXE
- * initialisation.  This prevents untrusted sources of settings
- * (e.g. DHCP) from subverting the chain of trust, while allowing
- * trustworthy sources (e.g. VMware GuestInfo or non-volatile stored
- * options) to specify the trusted root certificate without requiring
- * a rebuild.
- */
-static void rootcert_init ( void ) {
-	void *external = NULL;
-	int len;
-
-	/* Allow trusted root certificates to be overridden only if
-	 * not explicitly specified at build time.
-	 */
-	if ( ALLOW_TRUST_OVERRIDE ) {
-
-		/* Fetch copy of "trust" setting, if it exists.  This
-		 * memory will never be freed.
-		 */
-		if ( ( len = fetch_setting_copy ( NULL, &trust_setting,
-						  &external ) ) >= 0 ) {
-			root_certificates.fingerprints = external;
-			root_certificates.count = ( len / FINGERPRINT_LEN );
-		}
-	}
-
-	DBGC ( &root_certificates, "ROOTCERT using %d %s certificate(s):\n",
-	       root_certificates.count, ( external ? "external" : "built-in" ));
-	DBGC_HDA ( &root_certificates, 0, root_certificates.fingerprints,
-		   ( root_certificates.count * FINGERPRINT_LEN ) );
-}
-
-/** Root certificate initialiser */
-struct init_fn rootcert_init_fn __init_fn ( INIT_LATE ) = {
-	.initialise = rootcert_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rsa.c ipxe-1.0.1~lliurex1505/src/crypto/rsa.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/rsa.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/rsa.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,642 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdarg.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/asn1.h>
-#include <ipxe/crypto.h>
-#include <ipxe/bigint.h>
-#include <ipxe/random_nz.h>
-#include <ipxe/md5.h>
-#include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/rsa.h>
-
-/** @file
- *
- * RSA public-key cryptography
- *
- * RSA is documented in RFC 3447.
- */
-
-/* Disambiguate the various error causes */
-#define EACCES_VERIFY \
-	__einfo_error ( EINFO_EACCES_VERIFY )
-#define EINFO_EACCES_VERIFY \
-	__einfo_uniqify ( EINFO_EACCES, 0x01, "RSA signature incorrect" )
-
-/** "rsaEncryption" object identifier */
-static uint8_t oid_rsa_encryption[] = { ASN1_OID_RSAENCRYPTION };
-
-/** "md5WithRSAEncryption" object identifier */
-static uint8_t oid_md5_with_rsa_encryption[] =
-	{ ASN1_OID_MD5WITHRSAENCRYPTION };
-
-/** "sha1WithRSAEncryption" object identifier */
-static uint8_t oid_sha1_with_rsa_encryption[] =
-	{ ASN1_OID_SHA1WITHRSAENCRYPTION };
-
-/** "sha256WithRSAEncryption" object identifier */
-static uint8_t oid_sha256_with_rsa_encryption[] =
-	{ ASN1_OID_SHA256WITHRSAENCRYPTION };
-
-/** "rsaEncryption" OID-identified algorithm */
-struct asn1_algorithm rsa_encryption_algorithm __asn1_algorithm = {
-	.name = "rsaEncryption",
-	.pubkey = &rsa_algorithm,
-	.digest = NULL,
-	.oid = ASN1_OID_CURSOR ( oid_rsa_encryption ),
-};
-
-/** "md5WithRSAEncryption" OID-identified algorithm */
-struct asn1_algorithm md5_with_rsa_encryption_algorithm __asn1_algorithm = {
-	.name = "md5WithRSAEncryption",
-	.pubkey = &rsa_algorithm,
-	.digest = &md5_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_md5_with_rsa_encryption ),
-};
-
-/** "sha1WithRSAEncryption" OID-identified algorithm */
-struct asn1_algorithm sha1_with_rsa_encryption_algorithm __asn1_algorithm = {
-	.name = "sha1WithRSAEncryption",
-	.pubkey = &rsa_algorithm,
-	.digest = &sha1_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_sha1_with_rsa_encryption ),
-};
-
-/** "sha256WithRSAEncryption" OID-identified algorithm */
-struct asn1_algorithm sha256_with_rsa_encryption_algorithm __asn1_algorithm = {
-	.name = "sha256WithRSAEncryption",
-	.pubkey = &rsa_algorithm,
-	.digest = &sha256_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_sha256_with_rsa_encryption ),
-};
-
-/** MD5 digestInfo prefix */
-static const uint8_t rsa_md5_prefix_data[] =
-	{ RSA_DIGESTINFO_PREFIX ( MD5_DIGEST_SIZE, ASN1_OID_MD5 ) };
-
-/** SHA-1 digestInfo prefix */
-static const uint8_t rsa_sha1_prefix_data[] =
-	{ RSA_DIGESTINFO_PREFIX ( SHA1_DIGEST_SIZE, ASN1_OID_SHA1 ) };
-
-/** SHA-256 digestInfo prefix */
-static const uint8_t rsa_sha256_prefix_data[] =
-	{ RSA_DIGESTINFO_PREFIX ( SHA256_DIGEST_SIZE, ASN1_OID_SHA256 ) };
-
-/** MD5 digestInfo prefix */
-struct rsa_digestinfo_prefix rsa_md5_prefix __rsa_digestinfo_prefix = {
-	.digest = &md5_algorithm,
-	.data = rsa_md5_prefix_data,
-	.len = sizeof ( rsa_md5_prefix_data ),
-};
-
-/** SHA-1 digestInfo prefix */
-struct rsa_digestinfo_prefix rsa_sha1_prefix __rsa_digestinfo_prefix = {
-	.digest = &sha1_algorithm,
-	.data = rsa_sha1_prefix_data,
-	.len = sizeof ( rsa_sha1_prefix_data ),
-};
-
-/** SHA-256 digestInfo prefix */
-struct rsa_digestinfo_prefix rsa_sha256_prefix __rsa_digestinfo_prefix = {
-	.digest = &sha256_algorithm,
-	.data = rsa_sha256_prefix_data,
-	.len = sizeof ( rsa_sha256_prefix_data ),
-};
-
-/**
- * Identify RSA prefix
- *
- * @v digest		Digest algorithm
- * @ret prefix		RSA prefix, or NULL
- */
-static struct rsa_digestinfo_prefix *
-rsa_find_prefix ( struct digest_algorithm *digest ) {
-	struct rsa_digestinfo_prefix *prefix;
-
-	for_each_table_entry ( prefix, RSA_DIGESTINFO_PREFIXES ) {
-		if ( prefix->digest == digest )
-			return prefix;
-	}
-	return NULL;
-}
-
-/**
- * Free RSA dynamic storage
- *
- * @v context		RSA context
- */
-static void rsa_free ( struct rsa_context *context ) {
-
-	free ( context->dynamic );
-	context->dynamic = NULL;
-}
-
-/**
- * Allocate RSA dynamic storage
- *
- * @v context		RSA context
- * @v modulus_len	Modulus length
- * @v exponent_len	Exponent length
- * @ret rc		Return status code
- */
-static int rsa_alloc ( struct rsa_context *context, size_t modulus_len,
-		       size_t exponent_len ) {
-	unsigned int size = bigint_required_size ( modulus_len );
-	unsigned int exponent_size = bigint_required_size ( exponent_len );
-	bigint_t ( size ) *modulus;
-	bigint_t ( exponent_size ) *exponent;
-	size_t tmp_len = bigint_mod_exp_tmp_len ( modulus, exponent );
-	struct {
-		bigint_t ( size ) modulus;
-		bigint_t ( exponent_size ) exponent;
-		bigint_t ( size ) input;
-		bigint_t ( size ) output;
-		uint8_t tmp[tmp_len];
-	} __attribute__ (( packed )) *dynamic;
-
-	/* Free any existing dynamic storage */
-	rsa_free ( context );
-
-	/* Allocate dynamic storage */
-	dynamic = malloc ( sizeof ( *dynamic ) );
-	if ( ! dynamic )
-		return -ENOMEM;
-
-	/* Assign dynamic storage */
-	context->dynamic = dynamic;
-	context->modulus0 = &dynamic->modulus.element[0];
-	context->size = size;
-	context->max_len = modulus_len;
-	context->exponent0 = &dynamic->exponent.element[0];
-	context->exponent_size = exponent_size;
-	context->input0 = &dynamic->input.element[0];
-	context->output0 = &dynamic->output.element[0];
-	context->tmp = &dynamic->tmp;
-
-	return 0;
-}
-
-/**
- * Parse RSA integer
- *
- * @v context		RSA context
- * @v integer		Integer to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int rsa_parse_integer ( struct rsa_context *context,
-			       struct asn1_cursor *integer,
-			       const struct asn1_cursor *raw ) {
-
-	/* Enter integer */
-	memcpy ( integer, raw, sizeof ( *integer ) );
-	asn1_enter ( integer, ASN1_INTEGER );
-
-	/* Skip initial sign byte if applicable */
-	if ( ( integer->len > 1 ) &&
-	     ( *( ( uint8_t * ) integer->data ) == 0x00 ) ) {
-		integer->data++;
-		integer->len--;
-	}
-
-	/* Fail if cursor or integer are invalid */
-	if ( ! integer->len ) {
-		DBGC ( context, "RSA %p invalid integer:\n", context );
-		DBGC_HDA ( context, 0, raw->data, raw->len );
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-/**
- * Initialise RSA cipher
- *
- * @v ctx		RSA context
- * @v key		Key
- * @v key_len		Length of key
- * @ret rc		Return status code
- */
-static int rsa_init ( void *ctx, const void *key, size_t key_len ) {
-	struct rsa_context *context = ctx;
-	struct asn1_bit_string bits;
-	struct asn1_cursor modulus;
-	struct asn1_cursor exponent;
-	struct asn1_cursor cursor;
-	int is_private;
-	int rc;
-
-	/* Initialise context */
-	memset ( context, 0, sizeof ( *context ) );
-
-	/* Initialise cursor */
-	cursor.data = key;
-	cursor.len = key_len;
-
-	/* Enter subjectPublicKeyInfo/RSAPrivateKey */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Determine key format */
-	if ( asn1_type ( &cursor ) == ASN1_INTEGER ) {
-		/* Private key */
-		is_private = 1;
-
-		/* Skip version */
-		asn1_skip_any ( &cursor );
-
-	} else {
-		/* Public key */
-		is_private = 0;
-
-		/* Skip algorithm */
-		asn1_skip ( &cursor, ASN1_SEQUENCE );
-
-		/* Enter subjectPublicKey */
-		if ( ( rc = asn1_integral_bit_string ( &cursor, &bits ) ) != 0 )
-			goto err_parse;
-		cursor.data = bits.data;
-		cursor.len = bits.len;
-
-		/* Enter RSAPublicKey */
-		asn1_enter ( &cursor, ASN1_SEQUENCE );
-	}
-
-	/* Extract modulus */
-	if ( ( rc = rsa_parse_integer ( context, &modulus, &cursor ) ) != 0 )
-		goto err_parse;
-	asn1_skip_any ( &cursor );
-
-	/* Skip public exponent, if applicable */
-	if ( is_private )
-		asn1_skip ( &cursor, ASN1_INTEGER );
-
-	/* Extract publicExponent/privateExponent */
-	if ( ( rc = rsa_parse_integer ( context, &exponent, &cursor ) ) != 0 )
-		goto err_parse;
-
-	DBGC ( context, "RSA %p modulus:\n", context );
-	DBGC_HDA ( context, 0, modulus.data, modulus.len );
-	DBGC ( context, "RSA %p exponent:\n", context );
-	DBGC_HDA ( context, 0, exponent.data, exponent.len );
-
-	/* Allocate dynamic storage */
-	if ( ( rc = rsa_alloc ( context, modulus.len, exponent.len ) ) != 0 )
-		goto err_alloc;
-
-	/* Construct big integers */
-	bigint_init ( ( ( bigint_t ( context->size ) * ) context->modulus0 ),
-		      modulus.data, modulus.len );
-	bigint_init ( ( ( bigint_t ( context->exponent_size ) * )
-			context->exponent0 ), exponent.data, exponent.len );
-
-	return 0;
-
-	rsa_free ( context );
- err_alloc:
- err_parse:
-	return rc;
-}
-
-/**
- * Calculate RSA maximum output length
- *
- * @v ctx		RSA context
- * @ret max_len		Maximum output length
- */
-static size_t rsa_max_len ( void *ctx ) {
-	struct rsa_context *context = ctx;
-
-	return context->max_len;
-}
-
-/**
- * Perform RSA cipher operation
- *
- * @v context		RSA context
- * @v in		Input buffer
- * @v out		Output buffer
- */
-static void rsa_cipher ( struct rsa_context *context,
-			 const void *in, void *out ) {
-	bigint_t ( context->size ) *input = ( ( void * ) context->input0 );
-	bigint_t ( context->size ) *output = ( ( void * ) context->output0 );
-	bigint_t ( context->size ) *modulus = ( ( void * ) context->modulus0 );
-	bigint_t ( context->exponent_size ) *exponent =
-		( ( void * ) context->exponent0 );
-
-	/* Initialise big integer */
-	bigint_init ( input, in, context->max_len );
-
-	/* Perform modular exponentiation */
-	bigint_mod_exp ( input, modulus, exponent, output, context->tmp );
-
-	/* Copy out result */
-	bigint_done ( output, out, context->max_len );
-}
-
-/**
- * Encrypt using RSA
- *
- * @v ctx		RSA context
- * @v plaintext		Plaintext
- * @v plaintext_len	Length of plaintext
- * @v ciphertext	Ciphertext
- * @ret ciphertext_len	Length of ciphertext, or negative error
- */
-static int rsa_encrypt ( void *ctx, const void *plaintext,
-			 size_t plaintext_len, void *ciphertext ) {
-	struct rsa_context *context = ctx;
-	void *temp;
-	uint8_t *encoded;
-	size_t max_len = ( context->max_len - 11 );
-	size_t random_nz_len = ( max_len - plaintext_len + 8 );
-	int rc;
-
-	/* Sanity check */
-	if ( plaintext_len > max_len ) {
-		DBGC ( context, "RSA %p plaintext too long (%zd bytes, max "
-		       "%zd)\n", context, plaintext_len, max_len );
-		return -ERANGE;
-	}
-	DBGC ( context, "RSA %p encrypting:\n", context );
-	DBGC_HDA ( context, 0, plaintext, plaintext_len );
-
-	/* Construct encoded message (using the big integer output
-	 * buffer as temporary storage)
-	 */
-	temp = context->output0;
-	encoded = temp;
-	encoded[0] = 0x00;
-	encoded[1] = 0x02;
-	if ( ( rc = get_random_nz ( &encoded[2], random_nz_len ) ) != 0 ) {
-		DBGC ( context, "RSA %p could not generate random data: %s\n",
-		       context, strerror ( rc ) );
-		return rc;
-	}
-	encoded[ 2 + random_nz_len ] = 0x00;
-	memcpy ( &encoded[ context->max_len - plaintext_len ],
-		 plaintext, plaintext_len );
-
-	/* Encipher the encoded message */
-	rsa_cipher ( context, encoded, ciphertext );
-	DBGC ( context, "RSA %p encrypted:\n", context );
-	DBGC_HDA ( context, 0, ciphertext, context->max_len );
-
-	return context->max_len;
-}
-
-/**
- * Decrypt using RSA
- *
- * @v ctx		RSA context
- * @v ciphertext	Ciphertext
- * @v ciphertext_len	Ciphertext length
- * @v plaintext		Plaintext
- * @ret plaintext_len	Plaintext length, or negative error
- */
-static int rsa_decrypt ( void *ctx, const void *ciphertext,
-			 size_t ciphertext_len, void *plaintext ) {
-	struct rsa_context *context = ctx;
-	void *temp;
-	uint8_t *encoded;
-	uint8_t *end;
-	uint8_t *zero;
-	uint8_t *start;
-	size_t plaintext_len;
-
-	/* Sanity check */
-	if ( ciphertext_len != context->max_len ) {
-		DBGC ( context, "RSA %p ciphertext incorrect length (%zd "
-		       "bytes, should be %zd)\n",
-		       context, ciphertext_len, context->max_len );
-		return -ERANGE;
-	}
-	DBGC ( context, "RSA %p decrypting:\n", context );
-	DBGC_HDA ( context, 0, ciphertext, ciphertext_len );
-
-	/* Decipher the message (using the big integer input buffer as
-	 * temporary storage)
-	 */
-	temp = context->input0;
-	encoded = temp;
-	rsa_cipher ( context, ciphertext, encoded );
-
-	/* Parse the message */
-	end = ( encoded + context->max_len );
-	if ( ( encoded[0] != 0x00 ) || ( encoded[1] != 0x02 ) )
-		goto invalid;
-	zero = memchr ( &encoded[2], 0, ( end - &encoded[2] ) );
-	if ( ! zero )
-		goto invalid;
-	start = ( zero + 1 );
-	plaintext_len = ( end - start );
-
-	/* Copy out message */
-	memcpy ( plaintext, start, plaintext_len );
-	DBGC ( context, "RSA %p decrypted:\n", context );
-	DBGC_HDA ( context, 0, plaintext, plaintext_len );
-
-	return plaintext_len;
-
- invalid:
-	DBGC ( context, "RSA %p invalid decrypted message:\n", context );
-	DBGC_HDA ( context, 0, encoded, context->max_len );
-	return -EINVAL;
-}
-
-/**
- * Encode RSA digest
- *
- * @v context		RSA context
- * @v digest		Digest algorithm
- * @v value		Digest value
- * @v encoded		Encoded digest
- * @ret rc		Return status code
- */
-static int rsa_encode_digest ( struct rsa_context *context,
-			       struct digest_algorithm *digest,
-			       const void *value, void *encoded ) {
-	struct rsa_digestinfo_prefix *prefix;
-	size_t digest_len = digest->digestsize;
-	uint8_t *temp = encoded;
-	size_t digestinfo_len;
-	size_t max_len;
-	size_t pad_len;
-
-	/* Identify prefix */
-	prefix = rsa_find_prefix ( digest );
-	if ( ! prefix ) {
-		DBGC ( context, "RSA %p has no prefix for %s\n",
-		       context, digest->name );
-		return -ENOTSUP;
-	}
-	digestinfo_len = ( prefix->len + digest_len );
-
-	/* Sanity check */
-	max_len = ( context->max_len - 11 );
-	if ( digestinfo_len > max_len ) {
-		DBGC ( context, "RSA %p %s digestInfo too long (%zd bytes, max"
-		       "%zd)\n",
-		       context, digest->name, digestinfo_len, max_len );
-		return -ERANGE;
-	}
-	DBGC ( context, "RSA %p encoding %s digest:\n",
-	       context, digest->name );
-	DBGC_HDA ( context, 0, value, digest_len );
-
-	/* Construct encoded message */
-	*(temp++) = 0x00;
-	*(temp++) = 0x01;
-	pad_len = ( max_len - digestinfo_len + 8 );
-	memset ( temp, 0xff, pad_len );
-	temp += pad_len;
-	*(temp++) = 0x00;
-	memcpy ( temp, prefix->data, prefix->len );
-	temp += prefix->len;
-	memcpy ( temp, value, digest_len );
-	temp += digest_len;
-	assert ( temp == ( encoded + context->max_len ) );
-	DBGC ( context, "RSA %p encoded %s digest:\n", context, digest->name );
-	DBGC_HDA ( context, 0, encoded, context->max_len );
-
-	return 0;
-}
-
-/**
- * Sign digest value using RSA
- *
- * @v ctx		RSA context
- * @v digest		Digest algorithm
- * @v value		Digest value
- * @v signature		Signature
- * @ret signature_len	Signature length, or negative error
- */
-static int rsa_sign ( void *ctx, struct digest_algorithm *digest,
-		      const void *value, void *signature ) {
-	struct rsa_context *context = ctx;
-	void *temp;
-	int rc;
-
-	DBGC ( context, "RSA %p signing %s digest:\n", context, digest->name );
-	DBGC_HDA ( context, 0, value, digest->digestsize );
-
-	/* Encode digest (using the big integer output buffer as
-	 * temporary storage)
-	 */
-	temp = context->output0;
-	if ( ( rc = rsa_encode_digest ( context, digest, value, temp ) ) != 0 )
-		return rc;
-
-	/* Encipher the encoded digest */
-	rsa_cipher ( context, temp, signature );
-	DBGC ( context, "RSA %p signed %s digest:\n", context, digest->name );
-	DBGC_HDA ( context, 0, signature, context->max_len );
-
-	return context->max_len;
-}
-
-/**
- * Verify signed digest value using RSA
- *
- * @v ctx		RSA context
- * @v digest		Digest algorithm
- * @v value		Digest value
- * @v signature		Signature
- * @v signature_len	Signature length
- * @ret rc		Return status code
- */
-static int rsa_verify ( void *ctx, struct digest_algorithm *digest,
-			const void *value, const void *signature,
-			size_t signature_len ) {
-	struct rsa_context *context = ctx;
-	void *temp;
-	void *expected;
-	void *actual;
-	int rc;
-
-	/* Sanity check */
-	if ( signature_len != context->max_len ) {
-		DBGC ( context, "RSA %p signature incorrect length (%zd "
-		       "bytes, should be %zd)\n",
-		       context, signature_len, context->max_len );
-		return -ERANGE;
-	}
-	DBGC ( context, "RSA %p verifying %s digest:\n",
-	       context, digest->name );
-	DBGC_HDA ( context, 0, value, digest->digestsize );
-	DBGC_HDA ( context, 0, signature, signature_len );
-
-	/* Decipher the signature (using the big integer input buffer
-	 * as temporary storage)
-	 */
-	temp = context->input0;
-	expected = temp;
-	rsa_cipher ( context, signature, expected );
-	DBGC ( context, "RSA %p deciphered signature:\n", context );
-	DBGC_HDA ( context, 0, expected, context->max_len );
-
-	/* Encode digest (using the big integer output buffer as
-	 * temporary storage)
-	 */
-	temp = context->output0;
-	actual = temp;
-	if ( ( rc = rsa_encode_digest ( context, digest, value, actual ) ) !=0 )
-		return rc;
-
-	/* Verify the signature */
-	if ( memcmp ( actual, expected, context->max_len ) != 0 ) {
-		DBGC ( context, "RSA %p signature verification failed\n",
-		       context );
-		return -EACCES_VERIFY;
-	}
-
-	DBGC ( context, "RSA %p signature verified successfully\n", context );
-	return 0;
-}
-
-/**
- * Finalise RSA cipher
- *
- * @v ctx		RSA context
- */
-static void rsa_final ( void *ctx ) {
-	struct rsa_context *context = ctx;
-
-	rsa_free ( context );
-}
-
-/** RSA public-key algorithm */
-struct pubkey_algorithm rsa_algorithm = {
-	.name		= "rsa",
-	.ctxsize	= sizeof ( struct rsa_context ),
-	.init		= rsa_init,
-	.max_len	= rsa_max_len,
-	.encrypt	= rsa_encrypt,
-	.decrypt	= rsa_decrypt,
-	.sign		= rsa_sign,
-	.verify		= rsa_verify,
-	.final		= rsa_final,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha1.c ipxe-1.0.1~lliurex1505/src/crypto/sha1.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha1.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/sha1.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,272 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * SHA-1 algorithm
- *
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <byteswap.h>
-#include <assert.h>
-#include <ipxe/rotate.h>
-#include <ipxe/crypto.h>
-#include <ipxe/asn1.h>
-#include <ipxe/sha1.h>
-
-/** SHA-1 variables */
-struct sha1_variables {
-	/* This layout matches that of struct sha1_digest_data,
-	 * allowing for efficient endianness-conversion,
-	 */
-	uint32_t a;
-	uint32_t b;
-	uint32_t c;
-	uint32_t d;
-	uint32_t e;
-	uint32_t w[80];
-} __attribute__ (( packed ));
-
-/**
- * f(a,b,c,d) for steps 0 to 19
- *
- * @v v		SHA-1 variables
- * @ret f	f(a,b,c,d)
- */
-static uint32_t sha1_f_0_19 ( struct sha1_variables *v ) {
-	return ( ( v->b & v->c ) | ( (~v->b) & v->d ) );
-}
-
-/**
- * f(a,b,c,d) for steps 20 to 39 and 60 to 79
- *
- * @v v		SHA-1 variables
- * @ret f	f(a,b,c,d)
- */
-static uint32_t sha1_f_20_39_60_79 ( struct sha1_variables *v ) {
-	return ( v->b ^ v->c ^ v->d );
-}
-
-/**
- * f(a,b,c,d) for steps 40 to 59
- *
- * @v v		SHA-1 variables
- * @ret f	f(a,b,c,d)
- */
-static uint32_t sha1_f_40_59 ( struct sha1_variables *v ) {
-	return ( ( v->b & v->c ) | ( v->b & v->d ) | ( v->c & v->d ) );
-}
-
-/** An SHA-1 step function */
-struct sha1_step {
-	/**
-	 * Calculate f(a,b,c,d)
-	 *
-	 * @v v		SHA-1 variables
-	 * @ret f	f(a,b,c,d)
-	 */
-	uint32_t ( * f ) ( struct sha1_variables *v );
-	/** Constant k */
-	uint32_t k;
-};
-
-/** SHA-1 steps */
-static struct sha1_step sha1_steps[4] = {
-	/** 0 to 19 */
-	{ .f = sha1_f_0_19,		.k = 0x5a827999 },
-	/** 20 to 39 */
-	{ .f = sha1_f_20_39_60_79,	.k = 0x6ed9eba1 },
-	/** 40 to 59 */
-	{ .f = sha1_f_40_59,		.k = 0x8f1bbcdc },
-	/** 60 to 79 */
-	{ .f = sha1_f_20_39_60_79,	.k = 0xca62c1d6 },
-};
-
-/**
- * Initialise SHA-1 algorithm
- *
- * @v ctx		SHA-1 context
- */
-static void sha1_init ( void *ctx ) {
-	struct sha1_context *context = ctx;
-
-	context->ddd.dd.digest.h[0] = cpu_to_be32 ( 0x67452301 );
-	context->ddd.dd.digest.h[1] = cpu_to_be32 ( 0xefcdab89 );
-	context->ddd.dd.digest.h[2] = cpu_to_be32 ( 0x98badcfe );
-	context->ddd.dd.digest.h[3] = cpu_to_be32 ( 0x10325476 );
-	context->ddd.dd.digest.h[4] = cpu_to_be32 ( 0xc3d2e1f0 );
-	context->len = 0;
-}
-
-/**
- * Calculate SHA-1 digest of accumulated data
- *
- * @v context		SHA-1 context
- */
-static void sha1_digest ( struct sha1_context *context ) {
-        union {
-		union sha1_digest_data_dwords ddd;
-		struct sha1_variables v;
-	} u;
-	uint32_t *a = &u.v.a;
-	uint32_t *b = &u.v.b;
-	uint32_t *c = &u.v.c;
-	uint32_t *d = &u.v.d;
-	uint32_t *e = &u.v.e;
-	uint32_t *w = u.v.w;
-	uint32_t f;
-	uint32_t k;
-	uint32_t temp;
-	struct sha1_step *step;
-	unsigned int i;
-
-	/* Sanity checks */
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-	linker_assert ( &u.ddd.dd.digest.h[0] == a, sha1_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[1] == b, sha1_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[2] == c, sha1_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[3] == d, sha1_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[4] == e, sha1_bad_layout );
-	linker_assert ( &u.ddd.dd.data.dword[0] == w, sha1_bad_layout );
-
-	DBGC ( context, "SHA1 digesting:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
-	DBGC_HDA ( context, context->len, &context->ddd.dd.data,
-		   sizeof ( context->ddd.dd.data ) );
-
-	/* Convert h[0..4] to host-endian, and initialise a, b, c, d,
-	 * e, and w[0..15]
-	 */
-	for ( i = 0 ; i < ( sizeof ( u.ddd.dword ) /
-			    sizeof ( u.ddd.dword[0] ) ) ; i++ ) {
-		be32_to_cpus ( &context->ddd.dword[i] );
-		u.ddd.dword[i] = context->ddd.dword[i];
-	}
-
-	/* Initialise w[16..79] */
-	for ( i = 16 ; i < 80 ; i++ )
-		w[i] = rol32 ( ( w[i-3] ^ w[i-8] ^ w[i-14] ^ w[i-16] ), 1 );
-
-	/* Main loop */
-	for ( i = 0 ; i < 80 ; i++ ) {
-		step = &sha1_steps[ i / 20 ];
-		f = step->f ( &u.v );
-		k = step->k;
-		temp = ( rol32 ( *a, 5 ) + f + *e + k + w[i] );
-		*e = *d;
-		*d = *c;
-		*c = rol32 ( *b, 30 );
-		*b = *a;
-		*a = temp;
-		DBGC2 ( context, "%2d : %08x %08x %08x %08x %08x\n",
-			i, *a, *b, *c, *d, *e );
-	}
-
-	/* Add chunk to hash and convert back to big-endian */
-	for ( i = 0 ; i < 5 ; i++ ) {
-		context->ddd.dd.digest.h[i] =
-			cpu_to_be32 ( context->ddd.dd.digest.h[i] +
-				      u.ddd.dd.digest.h[i] );
-	}
-
-	DBGC ( context, "SHA1 digested:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
-}
-
-/**
- * Accumulate data with SHA-1 algorithm
- *
- * @v ctx		SHA-1 context
- * @v data		Data
- * @v len		Length of data
- */
-static void sha1_update ( void *ctx, const void *data, size_t len ) {
-	struct sha1_context *context = ctx;
-	const uint8_t *byte = data;
-	size_t offset;
-
-	/* Accumulate data a byte at a time, performing the digest
-	 * whenever we fill the data buffer
-	 */
-	while ( len-- ) {
-		offset = ( context->len % sizeof ( context->ddd.dd.data ) );
-		context->ddd.dd.data.byte[offset] = *(byte++);
-		context->len++;
-		if ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 )
-			sha1_digest ( context );
-	}
-}
-
-/**
- * Generate SHA-1 digest
- *
- * @v ctx		SHA-1 context
- * @v out		Output buffer
- */
-static void sha1_final ( void *ctx, void *out ) {
-	struct sha1_context *context = ctx;
-	uint64_t len_bits;
-	uint8_t pad;
-
-	/* Record length before pre-processing */
-	len_bits = cpu_to_be64 ( ( ( uint64_t ) context->len ) * 8 );
-
-	/* Pad with a single "1" bit followed by as many "0" bits as required */
-	pad = 0x80;
-	do {
-		sha1_update ( ctx, &pad, sizeof ( pad ) );
-		pad = 0x00;
-	} while ( ( context->len % sizeof ( context->ddd.dd.data ) ) !=
-		  offsetof ( typeof ( context->ddd.dd.data ), final.len ) );
-
-	/* Append length (in bits) */
-	sha1_update ( ctx, &len_bits, sizeof ( len_bits ) );
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-
-	/* Copy out final digest */
-	memcpy ( out, &context->ddd.dd.digest,
-		 sizeof ( context->ddd.dd.digest ) );
-}
-
-/** SHA-1 algorithm */
-struct digest_algorithm sha1_algorithm = {
-	.name		= "sha1",
-	.ctxsize	= sizeof ( struct sha1_context ),
-	.blocksize	= sizeof ( union sha1_block ),
-	.digestsize	= sizeof ( struct sha1_digest ),
-	.init		= sha1_init,
-	.update		= sha1_update,
-	.final		= sha1_final,
-};
-
-/** "sha1" object identifier */
-static uint8_t oid_sha1[] = { ASN1_OID_SHA1 };
-
-/** "sha1" OID-identified algorithm */
-struct asn1_algorithm oid_sha1_algorithm __asn1_algorithm = {
-	.name = "sha1",
-	.digest = &sha1_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_sha1 ),
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha1extra.c ipxe-1.0.1~lliurex1505/src/crypto/sha1extra.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha1extra.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/sha1extra.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
 #include <ipxe/crypto.h>
 #include <ipxe/sha1.h>
 #include <ipxe/hmac.h>
@@ -48,7 +46,7 @@
 	u8 keym[key_len];	/* modifiable copy of key */
 	u8 in[strlen ( label ) + 1 + data_len + 1]; /* message to HMAC */
 	u8 *in_blknr;		/* pointer to last byte of in, block number */
-	u8 out[SHA1_DIGEST_SIZE]; /* HMAC-SHA1 result */
+	u8 out[SHA1_SIZE];	/* HMAC-SHA1 result */
 	u8 sha1_ctx[SHA1_CTX_SIZE]; /* SHA1 context */
 	const size_t label_len = strlen ( label );
 
@@ -69,14 +67,14 @@
 		hmac_update ( &sha1_algorithm, sha1_ctx, in, sizeof ( in ) );
 		hmac_final ( &sha1_algorithm, sha1_ctx, keym, &key_len, out );
 
-		if ( prf_len <= sizeof ( out ) ) {
+		if ( prf_len <= SHA1_SIZE ) {
 			memcpy ( prf, out, prf_len );
 			break;
 		}
 
-		memcpy ( prf, out, sizeof ( out ) );
-		prf_len -= sizeof ( out );
-		prf += sizeof ( out );
+		memcpy ( prf, out, SHA1_SIZE );
+		prf_len -= SHA1_SIZE;
+		prf += SHA1_SIZE;
 	}
 }
 
@@ -99,31 +97,30 @@
 {
 	u8 pass[pass_len];	/* modifiable passphrase */
 	u8 in[salt_len + 4];	/* input buffer to first round */
-	u8 last[SHA1_DIGEST_SIZE]; /* output of round N, input of N+1 */
+	u8 last[SHA1_SIZE];	/* output of round N, input of N+1 */
 	u8 sha1_ctx[SHA1_CTX_SIZE];
 	u8 *next_in = in;	/* changed to `last' after first round */
 	int next_size = sizeof ( in );
-	int i;
-	unsigned int j;
+	int i, j;
 
 	blocknr = htonl ( blocknr );
 
 	memcpy ( pass, passphrase, pass_len );
 	memcpy ( in, salt, salt_len );
 	memcpy ( in + salt_len, &blocknr, 4 );
-	memset ( block, 0, sizeof ( last ) );
+	memset ( block, 0, SHA1_SIZE );
 
 	for ( i = 0; i < iterations; i++ ) {
 		hmac_init ( &sha1_algorithm, sha1_ctx, pass, &pass_len );
 		hmac_update ( &sha1_algorithm, sha1_ctx, next_in, next_size );
 		hmac_final ( &sha1_algorithm, sha1_ctx, pass, &pass_len, last );
 
-		for ( j = 0; j < sizeof ( last ); j++ ) {
+		for ( j = 0; j < SHA1_SIZE; j++ ) {
 			block[j] ^= last[j];
 		}
 
 		next_in = last;
-		next_size = sizeof ( last );
+		next_size = SHA1_SIZE;
 	}
 }
 
@@ -149,20 +146,20 @@
 		   const void *salt, size_t salt_len,
 		   int iterations, void *key, size_t key_len )
 {
-	u32 blocks = ( key_len + SHA1_DIGEST_SIZE - 1 ) / SHA1_DIGEST_SIZE;
+	u32 blocks = ( key_len + SHA1_SIZE - 1 ) / SHA1_SIZE;
 	u32 blk;
-	u8 buf[SHA1_DIGEST_SIZE];
+	u8 buf[SHA1_SIZE];
 
 	for ( blk = 1; blk <= blocks; blk++ ) {
 		pbkdf2_sha1_f ( passphrase, pass_len, salt, salt_len,
 				iterations, blk, buf );
-		if ( key_len <= sizeof ( buf ) ) {
+		if ( key_len <= SHA1_SIZE ) {
 			memcpy ( key, buf, key_len );
 			break;
 		}
 
-		memcpy ( key, buf, sizeof ( buf ) );
-		key_len -= sizeof ( buf );
-		key += sizeof ( buf );
+		memcpy ( key, buf, SHA1_SIZE );
+		key_len -= SHA1_SIZE;
+		key += SHA1_SIZE;
 	}
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha256.c ipxe-1.0.1~lliurex1505/src/crypto/sha256.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/sha256.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/sha256.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,256 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * SHA-256 algorithm
- *
- */
-
-#include <stdint.h>
-#include <string.h>
-#include <byteswap.h>
-#include <assert.h>
-#include <ipxe/rotate.h>
-#include <ipxe/crypto.h>
-#include <ipxe/asn1.h>
-#include <ipxe/sha256.h>
-
-/** SHA-256 variables */
-struct sha256_variables {
-	/* This layout matches that of struct sha256_digest_data,
-	 * allowing for efficient endianness-conversion,
-	 */
-	uint32_t a;
-	uint32_t b;
-	uint32_t c;
-	uint32_t d;
-	uint32_t e;
-	uint32_t f;
-	uint32_t g;
-	uint32_t h;
-	uint32_t w[64];
-} __attribute__ (( packed ));
-
-/** SHA-256 constants */
-static const uint32_t k[64] = {
-	0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5, 0x3956c25b, 0x59f111f1,
-	0x923f82a4, 0xab1c5ed5, 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
-	0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174, 0xe49b69c1, 0xefbe4786,
-	0x0fc19dc6, 0x240ca1cc, 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
-	0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7, 0xc6e00bf3, 0xd5a79147,
-	0x06ca6351, 0x14292967, 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
-	0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85, 0xa2bfe8a1, 0xa81a664b,
-	0xc24b8b70, 0xc76c51a3, 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
-	0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5, 0x391c0cb3, 0x4ed8aa4a,
-	0x5b9cca4f, 0x682e6ff3, 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
-	0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
-};
-
-/**
- * Initialise SHA-256 algorithm
- *
- * @v ctx		SHA-256 context
- */
-static void sha256_init ( void *ctx ) {
-	struct sha256_context *context = ctx;
-
-	context->ddd.dd.digest.h[0] = cpu_to_be32 ( 0x6a09e667 );
-	context->ddd.dd.digest.h[1] = cpu_to_be32 ( 0xbb67ae85 );
-	context->ddd.dd.digest.h[2] = cpu_to_be32 ( 0x3c6ef372 );
-	context->ddd.dd.digest.h[3] = cpu_to_be32 ( 0xa54ff53a );
-	context->ddd.dd.digest.h[4] = cpu_to_be32 ( 0x510e527f );
-	context->ddd.dd.digest.h[5] = cpu_to_be32 ( 0x9b05688c );
-	context->ddd.dd.digest.h[6] = cpu_to_be32 ( 0x1f83d9ab );
-	context->ddd.dd.digest.h[7] = cpu_to_be32 ( 0x5be0cd19 );
-	context->len = 0;
-}
-
-/**
- * Calculate SHA-256 digest of accumulated data
- *
- * @v context		SHA-256 context
- */
-static void sha256_digest ( struct sha256_context *context ) {
-        union {
-		union sha256_digest_data_dwords ddd;
-		struct sha256_variables v;
-	} u;
-	uint32_t *a = &u.v.a;
-	uint32_t *b = &u.v.b;
-	uint32_t *c = &u.v.c;
-	uint32_t *d = &u.v.d;
-	uint32_t *e = &u.v.e;
-	uint32_t *f = &u.v.f;
-	uint32_t *g = &u.v.g;
-	uint32_t *h = &u.v.h;
-	uint32_t *w = u.v.w;
-	uint32_t s0;
-	uint32_t s1;
-	uint32_t maj;
-	uint32_t t1;
-	uint32_t t2;
-	uint32_t ch;
-	unsigned int i;
-
-	/* Sanity checks */
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-	linker_assert ( &u.ddd.dd.digest.h[0] == a, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[1] == b, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[2] == c, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[3] == d, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[4] == e, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[5] == f, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[6] == g, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.digest.h[7] == h, sha256_bad_layout );
-	linker_assert ( &u.ddd.dd.data.dword[0] == w, sha256_bad_layout );
-
-	DBGC ( context, "SHA256 digesting:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
-	DBGC_HDA ( context, context->len, &context->ddd.dd.data,
-		   sizeof ( context->ddd.dd.data ) );
-
-	/* Convert h[0..7] to host-endian, and initialise a, b, c, d,
-	 * e, f, g, h, and w[0..15]
-	 */
-	for ( i = 0 ; i < ( sizeof ( u.ddd.dword ) /
-			    sizeof ( u.ddd.dword[0] ) ) ; i++ ) {
-		be32_to_cpus ( &context->ddd.dword[i] );
-		u.ddd.dword[i] = context->ddd.dword[i];
-	}
-
-	/* Initialise w[16..63] */
-	for ( i = 16 ; i < 64 ; i++ ) {
-		s0 = ( ror32 ( w[i-15], 7 ) ^ ror32 ( w[i-15], 18 ) ^
-		       ( w[i-15] >> 3 ) );
-		s1 = ( ror32 ( w[i-2], 17 ) ^ ror32 ( w[i-2], 19 ) ^
-		       ( w[i-2] >> 10 ) );
-		w[i] = ( w[i-16] + s0 + w[i-7] + s1 );
-	}
-
-	/* Main loop */
-	for ( i = 0 ; i < 64 ; i++ ) {
-		s0 = ( ror32 ( *a, 2 ) ^ ror32 ( *a, 13 ) ^ ror32 ( *a, 22 ) );
-		maj = ( ( *a & *b ) ^ ( *a & *c ) ^ ( *b & *c ) );
-		t2 = ( s0 + maj );
-		s1 = ( ror32 ( *e, 6 ) ^ ror32 ( *e, 11 ) ^ ror32 ( *e, 25 ) );
-		ch = ( ( *e & *f ) ^ ( (~*e) & *g ) );
-		t1 = ( *h + s1 + ch + k[i] + w[i] );
-		*h = *g;
-		*g = *f;
-		*f = *e;
-		*e = ( *d + t1 );
-		*d = *c;
-		*c = *b;
-		*b = *a;
-		*a = ( t1 + t2 );
-		DBGC2 ( context, "%2d : %08x %08x %08x %08x %08x %08x %08x "
-			"%08x\n", i, *a, *b, *c, *d, *e, *f, *g, *h );
-	}
-
-	/* Add chunk to hash and convert back to big-endian */
-	for ( i = 0 ; i < 8 ; i++ ) {
-		context->ddd.dd.digest.h[i] =
-			cpu_to_be32 ( context->ddd.dd.digest.h[i] +
-				      u.ddd.dd.digest.h[i] );
-	}
-
-	DBGC ( context, "SHA256 digested:\n" );
-	DBGC_HDA ( context, 0, &context->ddd.dd.digest,
-		   sizeof ( context->ddd.dd.digest ) );
-}
-
-/**
- * Accumulate data with SHA-256 algorithm
- *
- * @v ctx		SHA-256 context
- * @v data		Data
- * @v len		Length of data
- */
-static void sha256_update ( void *ctx, const void *data, size_t len ) {
-	struct sha256_context *context = ctx;
-	const uint8_t *byte = data;
-	size_t offset;
-
-	/* Accumulate data a byte at a time, performing the digest
-	 * whenever we fill the data buffer
-	 */
-	while ( len-- ) {
-		offset = ( context->len % sizeof ( context->ddd.dd.data ) );
-		context->ddd.dd.data.byte[offset] = *(byte++);
-		context->len++;
-		if ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 )
-			sha256_digest ( context );
-	}
-}
-
-/**
- * Generate SHA-256 digest
- *
- * @v ctx		SHA-256 context
- * @v out		Output buffer
- */
-static void sha256_final ( void *ctx, void *out ) {
-	struct sha256_context *context = ctx;
-	uint64_t len_bits;
-	uint8_t pad;
-
-	/* Record length before pre-processing */
-	len_bits = cpu_to_be64 ( ( ( uint64_t ) context->len ) * 8 );
-
-	/* Pad with a single "1" bit followed by as many "0" bits as required */
-	pad = 0x80;
-	do {
-		sha256_update ( ctx, &pad, sizeof ( pad ) );
-		pad = 0x00;
-	} while ( ( context->len % sizeof ( context->ddd.dd.data ) ) !=
-		  offsetof ( typeof ( context->ddd.dd.data ), final.len ) );
-
-	/* Append length (in bits) */
-	sha256_update ( ctx, &len_bits, sizeof ( len_bits ) );
-	assert ( ( context->len % sizeof ( context->ddd.dd.data ) ) == 0 );
-
-	/* Copy out final digest */
-	memcpy ( out, &context->ddd.dd.digest,
-		 sizeof ( context->ddd.dd.digest ) );
-}
-
-/** SHA-256 algorithm */
-struct digest_algorithm sha256_algorithm = {
-	.name		= "sha256",
-	.ctxsize	= sizeof ( struct sha256_context ),
-	.blocksize	= sizeof ( union sha256_block ),
-	.digestsize	= sizeof ( struct sha256_digest ),
-	.init		= sha256_init,
-	.update		= sha256_update,
-	.final		= sha256_final,
-};
-
-/** "sha256" object identifier */
-static uint8_t oid_sha256[] = { ASN1_OID_SHA256 };
-
-/** "sha256" OID-identified algorithm */
-struct asn1_algorithm oid_sha256_algorithm __asn1_algorithm = {
-	.name = "sha256",
-	.digest = &sha256_algorithm,
-	.oid = ASN1_OID_CURSOR ( oid_sha256 ),
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/x509.c ipxe-1.0.1~lliurex1505/src/crypto/x509.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/crypto/x509.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/crypto/x509.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -22,1568 +21,163 @@
 #include <stdlib.h>
 #include <string.h>
 #include <errno.h>
-#include <assert.h>
-#include <ipxe/list.h>
-#include <ipxe/malloc.h>
 #include <ipxe/asn1.h>
-#include <ipxe/crypto.h>
-#include <ipxe/md5.h>
-#include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/rsa.h>
-#include <ipxe/rootcert.h>
 #include <ipxe/x509.h>
 
 /** @file
  *
  * X.509 certificates
  *
- * The structure of X.509v3 certificates is documented in RFC 5280
- * section 4.1.
+ * The structure of X.509v3 certificates is concisely documented in
+ * RFC5280 section 4.1.  The structure of RSA public keys is
+ * documented in RFC2313.
  */
 
-/* Disambiguate the various error causes */
-#define ENOTSUP_ALGORITHM \
-	__einfo_error ( EINFO_ENOTSUP_ALGORITHM )
-#define EINFO_ENOTSUP_ALGORITHM \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01, "Unsupported algorithm" )
-#define ENOTSUP_EXTENSION \
-	__einfo_error ( EINFO_ENOTSUP_EXTENSION )
-#define EINFO_ENOTSUP_EXTENSION \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x02, "Unsupported extension" )
-#define EINVAL_ALGORITHM \
-	__einfo_error ( EINFO_EINVAL_ALGORITHM )
-#define EINFO_EINVAL_ALGORITHM \
-	__einfo_uniqify ( EINFO_EINVAL, 0x01, "Invalid algorithm type" )
-#define EINVAL_ALGORITHM_MISMATCH \
-	__einfo_error ( EINFO_EINVAL_ALGORITHM_MISMATCH )
-#define EINFO_EINVAL_ALGORITHM_MISMATCH \
-	__einfo_uniqify ( EINFO_EINVAL, 0x04, "Signature algorithm mismatch" )
-#define EINVAL_PATH_LEN \
-	__einfo_error ( EINFO_EINVAL_PATH_LEN )
-#define EINFO_EINVAL_PATH_LEN \
-	__einfo_uniqify ( EINFO_EINVAL, 0x05, "Invalid pathLenConstraint" )
-#define EINVAL_VERSION \
-	__einfo_error ( EINFO_EINVAL_VERSION )
-#define EINFO_EINVAL_VERSION \
-	__einfo_uniqify ( EINFO_EINVAL, 0x06, "Invalid version" )
-#define EACCES_WRONG_ISSUER \
-	__einfo_error ( EINFO_EACCES_WRONG_ISSUER )
-#define EINFO_EACCES_WRONG_ISSUER \
-	__einfo_uniqify ( EINFO_EACCES, 0x01, "Wrong issuer" )
-#define EACCES_NOT_CA \
-	__einfo_error ( EINFO_EACCES_NOT_CA )
-#define EINFO_EACCES_NOT_CA \
-	__einfo_uniqify ( EINFO_EACCES, 0x02, "Not a CA certificate" )
-#define EACCES_KEY_USAGE \
-	__einfo_error ( EINFO_EACCES_KEY_USAGE )
-#define EINFO_EACCES_KEY_USAGE \
-	__einfo_uniqify ( EINFO_EACCES, 0x03, "Incorrect key usage" )
-#define EACCES_EXPIRED \
-	__einfo_error ( EINFO_EACCES_EXPIRED )
-#define EINFO_EACCES_EXPIRED \
-	__einfo_uniqify ( EINFO_EACCES, 0x04, "Expired (or not yet valid)" )
-#define EACCES_PATH_LEN \
-	__einfo_error ( EINFO_EACCES_PATH_LEN )
-#define EINFO_EACCES_PATH_LEN \
-	__einfo_uniqify ( EINFO_EACCES, 0x05, "Maximum path length exceeded" )
-#define EACCES_UNTRUSTED \
-	__einfo_error ( EINFO_EACCES_UNTRUSTED )
-#define EINFO_EACCES_UNTRUSTED \
-	__einfo_uniqify ( EINFO_EACCES, 0x06, "Untrusted root certificate" )
-#define EACCES_OUT_OF_ORDER \
-	__einfo_error ( EINFO_EACCES_OUT_OF_ORDER )
-#define EINFO_EACCES_OUT_OF_ORDER \
-	__einfo_uniqify ( EINFO_EACCES, 0x07, "Validation out of order" )
-#define EACCES_EMPTY \
-	__einfo_error ( EINFO_EACCES_EMPTY )
-#define EINFO_EACCES_EMPTY \
-	__einfo_uniqify ( EINFO_EACCES, 0x08, "Empty certificate chain" )
-#define EACCES_OCSP_REQUIRED \
-	__einfo_error ( EINFO_EACCES_OCSP_REQUIRED )
-#define EINFO_EACCES_OCSP_REQUIRED \
-	__einfo_uniqify ( EINFO_EACCES, 0x09, "OCSP check required" )
-
-/** Certificate cache */
-static LIST_HEAD ( x509_cache );
-
-/**
- * Free X.509 certificate
- *
- * @v refcnt		Reference count
- */
-static void x509_free ( struct refcnt *refcnt ) {
-	struct x509_certificate *cert =
-		container_of ( refcnt, struct x509_certificate, refcnt );
-
-	DBGC2 ( cert, "X509 %p freed\n", cert );
-	free ( cert->subject.name );
-	free ( cert->extensions.auth_info.ocsp.uri );
-	free ( cert );
-}
-
-/**
- * Discard a cached certificate
- *
- * @ret discarded	Number of cached items discarded
- */
-static unsigned int x509_discard ( void ) {
-	struct x509_certificate *cert;
-
-	/* Discard the least recently used certificate for which the
-	 * only reference is held by the cache itself.
-	 */
-	list_for_each_entry_reverse ( cert, &x509_cache, list ) {
-		if ( cert->refcnt.count == 0 ) {
-			list_del ( &cert->list );
-			x509_put ( cert );
-			return 1;
-		}
-	}
-	return 0;
-}
-
-/** X.509 cache discarder */
-struct cache_discarder x509_discarder __cache_discarder ( CACHE_NORMAL ) = {
-	.discard = x509_discard,
-};
-
-/** "commonName" object identifier */
-static uint8_t oid_common_name[] = { ASN1_OID_COMMON_NAME };
-
-/** "commonName" object identifier cursor */
-static struct asn1_cursor oid_common_name_cursor =
-	ASN1_OID_CURSOR ( oid_common_name );
+/** Object Identifier for "rsaEncryption" (1.2.840.113549.1.1.1) */
+static const uint8_t oid_rsa_encryption[] = { 0x2a, 0x86, 0x48, 0x86, 0xf7,
+					      0x0d, 0x01, 0x01, 0x01 };
 
 /**
- * Parse X.509 certificate version
+ * Identify X.509 certificate public key
  *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
+ * @v certificate	Certificate
+ * @v algorithm		Public key algorithm to fill in
+ * @v pubkey		Public key value to fill in
  * @ret rc		Return status code
  */
-static int x509_parse_version ( struct x509_certificate *cert,
-				const struct asn1_cursor *raw ) {
+static int x509_public_key ( const struct asn1_cursor *certificate,
+			     struct asn1_cursor *algorithm,
+			     struct asn1_cursor *pubkey ) {
 	struct asn1_cursor cursor;
-	int version;
-	int rc;
-
-	/* Enter version */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 0 ) );
-
-	/* Parse integer */
-	if ( ( rc = asn1_integer ( &cursor, &version ) ) != 0 ) {
-		DBGC ( cert, "X509 %p cannot parse version: %s\n",
-		       cert, strerror ( rc ) );
-		DBGC_HDA ( cert, 0, raw->data, raw->len );
-		return rc;
-	}
-
-	/* Sanity check */
-	if ( version < 0 ) {
-		DBGC ( cert, "X509 %p invalid version %d\n", cert, version );
-		DBGC_HDA ( cert, 0, raw->data, raw->len );
-		return -EINVAL_VERSION;
-	}
-
-	/* Record version */
-	cert->version = version;
-	DBGC2 ( cert, "X509 %p is a version %d certificate\n",
-		cert, ( cert->version + 1 ) );
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate serial number
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_serial ( struct x509_certificate *cert,
-			       const struct asn1_cursor *raw ) {
-	struct x509_serial *serial = &cert->serial;
-	int rc;
-
-	/* Record raw serial number */
-	memcpy ( &serial->raw, raw, sizeof ( serial->raw ) );
-	if ( ( rc = asn1_shrink ( &serial->raw, ASN1_INTEGER ) ) != 0 ) {
-		DBGC ( cert, "X509 %p cannot shrink serialNumber: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p issuer is:\n", cert );
-	DBGC2_HDA ( cert, 0, serial->raw.data, serial->raw.len );
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate issuer
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_issuer ( struct x509_certificate *cert,
-			       const struct asn1_cursor *raw ) {
-	struct x509_issuer *issuer = &cert->issuer;
-	int rc;
-
-	/* Record raw issuer */
-	memcpy ( &issuer->raw, raw, sizeof ( issuer->raw ) );
-	if ( ( rc = asn1_shrink ( &issuer->raw, ASN1_SEQUENCE ) ) != 0 ) {
-		DBGC ( cert, "X509 %p cannot shrink issuer: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p issuer is:\n", cert );
-	DBGC2_HDA ( cert, 0, issuer->raw.data, issuer->raw.len );
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate validity
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_validity ( struct x509_certificate *cert,
-				 const struct asn1_cursor *raw ) {
-	struct x509_validity *validity = &cert->validity;
-	struct x509_time *not_before = &validity->not_before;
-	struct x509_time *not_after = &validity->not_after;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter validity */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse notBefore */
-	if ( ( rc = asn1_generalized_time ( &cursor,
-					    &not_before->time ) ) != 0 ) {
-		DBGC ( cert, "X509 %p cannot parse notBefore: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p valid from time %lld\n",
-		cert, not_before->time );
-	asn1_skip_any ( &cursor );
-
-	/* Parse notAfter */
-	if ( ( rc = asn1_generalized_time ( &cursor,
-					    &not_after->time ) ) != 0 ) {
-		DBGC ( cert, "X509 %p cannot parse notAfter: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p valid until time %lld\n",
-		cert, not_after->time );
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate common name
- *
- * @v cert		X.509 certificate
- * @v name		Common name to fill in
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_common_name ( struct x509_certificate *cert, char **name,
-				    const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct asn1_cursor oid_cursor;
-	struct asn1_cursor name_cursor;
-	int rc;
-
-	/* Enter name */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Scan through name list */
-	for ( ; cursor.len ; asn1_skip_any ( &cursor ) ) {
-
-		/* Check for "commonName" OID */
-		memcpy ( &oid_cursor, &cursor, sizeof ( oid_cursor ) );
-		asn1_enter ( &oid_cursor, ASN1_SET );
-		asn1_enter ( &oid_cursor, ASN1_SEQUENCE );
-		memcpy ( &name_cursor, &oid_cursor, sizeof ( name_cursor ) );
-		asn1_enter ( &oid_cursor, ASN1_OID );
-		if ( asn1_compare ( &oid_common_name_cursor, &oid_cursor ) != 0)
-			continue;
-		asn1_skip_any ( &name_cursor );
-		if ( ( rc = asn1_enter_any ( &name_cursor ) ) != 0 ) {
-			DBGC ( cert, "X509 %p cannot locate name:\n", cert );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return rc;
-		}
-
-		/* Allocate and copy name */
-		*name = zalloc ( name_cursor.len + 1 /* NUL */ );
-		if ( ! *name )
-			return -ENOMEM;
-		memcpy ( *name, name_cursor.data, name_cursor.len );
-
-		/* Check that name contains no NULs */
-		if ( strlen ( *name ) != name_cursor.len ) {
-			DBGC ( cert, "X509 %p contains malicious commonName:\n",
-			       cert );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return rc;
-		}
-
-		return 0;
-	}
-
-	/* Certificates may not have a commonName */
-	DBGC2 ( cert, "X509 %p no commonName found:\n", cert );
-	return 0;
-}
-
-/**
- * Parse X.509 certificate subject
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_subject ( struct x509_certificate *cert,
-				const struct asn1_cursor *raw ) {
-	struct x509_subject *subject = &cert->subject;
-	char **name = &subject->name;
-	int rc;
-
-	/* Record raw subject */
-	memcpy ( &subject->raw, raw, sizeof ( subject->raw ) );
-	asn1_shrink_any ( &subject->raw );
-	DBGC2 ( cert, "X509 %p subject is:\n", cert );
-	DBGC2_HDA ( cert, 0, subject->raw.data, subject->raw.len );
-
-	/* Parse common name */
-	if ( ( rc = x509_parse_common_name ( cert, name, raw ) ) != 0 )
-		return rc;
-	DBGC2 ( cert, "X509 %p common name is \"%s\":\n", cert, *name );
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate public key information
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_public_key ( struct x509_certificate *cert,
-				   const struct asn1_cursor *raw ) {
-	struct x509_public_key *public_key = &cert->subject.public_key;
-	struct asn1_algorithm **algorithm = &public_key->algorithm;
-	struct asn1_bit_string *raw_bits = &public_key->raw_bits;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Record raw subjectPublicKeyInfo */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_shrink_any ( &cursor );
-	memcpy ( &public_key->raw, &cursor, sizeof ( public_key->raw ) );
-	DBGC2 ( cert, "X509 %p public key is:\n", cert );
-	DBGC2_HDA ( cert, 0, public_key->raw.data, public_key->raw.len );
-
-	/* Enter subjectPublicKeyInfo */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse algorithm */
-	if ( ( rc = asn1_pubkey_algorithm ( &cursor, algorithm ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse public key algorithm: "
-		       "%s\n", cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p public key algorithm is %s\n",
-		cert, (*algorithm)->name );
-	asn1_skip_any ( &cursor );
-
-	/* Parse bit string */
-	if ( ( rc = asn1_bit_string ( &cursor, raw_bits ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse public key bits: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate basic constraints
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_basic_constraints ( struct x509_certificate *cert,
-					  const struct asn1_cursor *raw ) {
-	struct x509_basic_constraints *basic = &cert->extensions.basic;
-	struct asn1_cursor cursor;
-	int ca = 0;
-	int path_len;
-	int rc;
-
-	/* Enter basicConstraints */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse "cA", if present */
-	if ( asn1_type ( &cursor ) == ASN1_BOOLEAN ) {
-		ca = asn1_boolean ( &cursor );
-		if ( ca < 0 ) {
-			rc = ca;
-			DBGC ( cert, "X509 %p cannot parse cA: %s\n",
-			       cert, strerror ( rc ) );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return rc;
-		}
-		asn1_skip_any ( &cursor );
-	}
-	basic->ca = ca;
-	DBGC2 ( cert, "X509 %p is %sa CA certificate\n",
-		cert, ( basic->ca ? "" : "not " ) );
-
-	/* Ignore everything else unless "cA" is true */
-	if ( ! ca )
-		return 0;
-
-	/* Parse "pathLenConstraint", if present and applicable */
-	basic->path_len = X509_PATH_LEN_UNLIMITED;
-	if ( asn1_type ( &cursor ) == ASN1_INTEGER ) {
-		if ( ( rc = asn1_integer ( &cursor, &path_len ) ) != 0 ) {
-			DBGC ( cert, "X509 %p cannot parse pathLenConstraint: "
-			       "%s\n", cert, strerror ( rc ) );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return rc;
-		}
-		if ( path_len < 0 ) {
-			DBGC ( cert, "X509 %p invalid pathLenConstraint %d\n",
-			       cert, path_len );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return -EINVAL;
-		}
-		basic->path_len = path_len;
-		DBGC2 ( cert, "X509 %p path length constraint is %u\n",
-			cert, basic->path_len );
-	}
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate key usage
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_key_usage ( struct x509_certificate *cert,
-				  const struct asn1_cursor *raw ) {
-	struct x509_key_usage *usage = &cert->extensions.usage;
-	struct asn1_bit_string bit_string;
-	const uint8_t *bytes;
-	size_t len;
-	unsigned int i;
 	int rc;
 
-	/* Mark extension as present */
-	usage->present = 1;
-
-	/* Parse bit string */
-	if ( ( rc = asn1_bit_string ( raw, &bit_string ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse key usage: %s\n",
-		       cert, strerror ( rc ) );
+	/* Locate subjectPublicKeyInfo */
+	memcpy ( &cursor, certificate, sizeof ( cursor ) );
+	rc = ( asn1_enter ( &cursor, ASN1_SEQUENCE ), /* Certificate */
+	       asn1_enter ( &cursor, ASN1_SEQUENCE ), /* tbsCertificate */
+	       asn1_skip_if_exists ( &cursor, ASN1_EXPLICIT_TAG ), /* version */
+	       asn1_skip ( &cursor, ASN1_INTEGER ), /* serialNumber */
+	       asn1_skip ( &cursor, ASN1_SEQUENCE ), /* signature */
+	       asn1_skip ( &cursor, ASN1_SEQUENCE ), /* issuer */
+	       asn1_skip ( &cursor, ASN1_SEQUENCE ), /* validity */
+	       asn1_skip ( &cursor, ASN1_SEQUENCE ), /* name */
+	       asn1_enter ( &cursor, ASN1_SEQUENCE )/* subjectPublicKeyInfo*/);
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate subjectPublicKeyInfo in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
 		return rc;
 	}
 
-	/* Parse key usage bits */
-	bytes = bit_string.data;
-	len = bit_string.len;
-	if ( len > sizeof ( usage->bits ) )
-		len = sizeof ( usage->bits );
-	for ( i = 0 ; i < len ; i++ ) {
-		usage->bits |= ( *(bytes++) << ( 8 * i ) );
-	}
-	DBGC2 ( cert, "X509 %p key usage is %08x\n", cert, usage->bits );
-
-	return 0;
-}
-
-/** "id-kp-codeSigning" object identifier */
-static uint8_t oid_code_signing[] = { ASN1_OID_CODESIGNING };
-
-/** "id-kp-OCSPSigning" object identifier */
-static uint8_t oid_ocsp_signing[] = { ASN1_OID_OCSPSIGNING };
-
-/** Supported key purposes */
-static struct x509_key_purpose x509_key_purposes[] = {
-	{
-		.name = "codeSigning",
-		.bits = X509_CODE_SIGNING,
-		.oid = ASN1_OID_CURSOR ( oid_code_signing ),
-	},
-	{
-		.name = "ocspSigning",
-		.bits = X509_OCSP_SIGNING,
-		.oid = ASN1_OID_CURSOR ( oid_ocsp_signing ),
-	},
-};
-
-/**
- * Parse X.509 certificate key purpose identifier
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_key_purpose ( struct x509_certificate *cert,
-				    const struct asn1_cursor *raw ) {
-	struct x509_extended_key_usage *ext_usage = &cert->extensions.ext_usage;
-	struct x509_key_purpose *purpose;
-	struct asn1_cursor cursor;
-	unsigned int i;
-	int rc;
-
-	/* Enter keyPurposeId */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	if ( ( rc = asn1_enter ( &cursor, ASN1_OID ) ) != 0 ) {
-		DBGC ( cert, "X509 %p invalid keyPurposeId:\n", cert );
-		DBGC_HDA ( cert, 0, raw->data, raw->len );
+	/* Locate algorithm */
+	memcpy ( algorithm, &cursor, sizeof ( *algorithm ) );
+	rc = ( asn1_enter ( algorithm, ASN1_SEQUENCE ) /* algorithm */ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate algorithm in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
 		return rc;
 	}
 
-	/* Identify key purpose */
-	for ( i = 0 ; i < ( sizeof ( x509_key_purposes ) /
-			    sizeof ( x509_key_purposes[0] ) ) ; i++ ) {
-		purpose = &x509_key_purposes[i];
-		if ( asn1_compare ( &cursor, &purpose->oid ) == 0 ) {
-			DBGC2 ( cert, "X509 %p has key purpose %s\n",
-				cert, purpose->name );
-			ext_usage->bits |= purpose->bits;
-			return 0;
-		}
-	}
-
-	/* Ignore unrecognised key purposes */
-	return 0;
-}
-
-/**
- * Parse X.509 certificate extended key usage
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_extended_key_usage ( struct x509_certificate *cert,
-					   const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter extKeyUsage */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse each extended key usage in turn */
-	while ( cursor.len ) {
-		if ( ( rc = x509_parse_key_purpose ( cert, &cursor ) ) != 0 )
-			return rc;
-		asn1_skip_any ( &cursor );
-	}
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate OCSP access method
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_ocsp ( struct x509_certificate *cert,
-			     const struct asn1_cursor *raw ) {
-	struct x509_ocsp_responder *ocsp = &cert->extensions.auth_info.ocsp;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter accessLocation */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	if ( ( rc = asn1_enter ( &cursor, ASN1_IMPLICIT_TAG ( 6 ) ) ) != 0 ) {
-		DBGC ( cert, "X509 %p OCSP does not contain "
-		       "uniformResourceIdentifier:\n", cert );
-		DBGC_HDA ( cert, 0, raw->data, raw->len );
+	/* Locate subjectPublicKey */
+	memcpy ( pubkey, &cursor, sizeof ( *pubkey ) );
+	rc = ( asn1_skip ( pubkey, ASN1_SEQUENCE ), /* algorithm */
+	       asn1_enter ( pubkey, ASN1_BIT_STRING ) /* subjectPublicKey*/ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate subjectPublicKey in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
 		return rc;
 	}
 
-	/* Record URI */
-	ocsp->uri = zalloc ( cursor.len + 1 /* NUL */ );
-	if ( ! ocsp->uri )
-		return -ENOMEM;
-	memcpy ( ocsp->uri, cursor.data, cursor.len );
-	DBGC2 ( cert, "X509 %p OCSP URI is %s:\n", cert, ocsp->uri );
-
 	return 0;
 }
 
-/** "id-ad-ocsp" object identifier */
-static uint8_t oid_ad_ocsp[] = { ASN1_OID_OCSP };
-
-/** Supported access methods */
-static struct x509_access_method x509_access_methods[] = {
-	{
-		.name = "OCSP",
-		.oid = ASN1_OID_CURSOR ( oid_ad_ocsp ),
-		.parse = x509_parse_ocsp,
-	},
-};
-
 /**
- * Identify X.509 access method by OID
+ * Identify X.509 certificate RSA modulus and public exponent
  *
- * @v oid		OID
- * @ret method		Access method, or NULL
- */
-static struct x509_access_method *
-x509_find_access_method ( const struct asn1_cursor *oid ) {
-	struct x509_access_method *method;
-	unsigned int i;
-
-	for ( i = 0 ; i < ( sizeof ( x509_access_methods ) /
-			    sizeof ( x509_access_methods[0] ) ) ; i++ ) {
-		method = &x509_access_methods[i];
-		if ( asn1_compare ( &method->oid, oid ) == 0 )
-			return method;
-	}
-
-	return NULL;
-}
-
-/**
- * Parse X.509 certificate access description
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
+ * @v certificate	Certificate
+ * @v rsa		RSA public key to fill in
  * @ret rc		Return status code
- */
-static int x509_parse_access_description ( struct x509_certificate *cert,
-					   const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct asn1_cursor subcursor;
-	struct x509_access_method *method;
-	int rc;
-
-	/* Enter keyPurposeId */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Try to identify access method */
-	memcpy ( &subcursor, &cursor, sizeof ( subcursor ) );
-	asn1_enter ( &subcursor, ASN1_OID );
-	method = x509_find_access_method ( &subcursor );
-	asn1_skip_any ( &cursor );
-	DBGC2 ( cert, "X509 %p found access method %s\n",
-		cert, ( method ? method->name : "<unknown>" ) );
-
-	/* Parse access location, if applicable */
-	if ( method && ( ( rc = method->parse ( cert, &cursor ) ) != 0 ) )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate authority information access
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_authority_info_access ( struct x509_certificate *cert,
-					      const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter authorityInfoAccess */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse each access description in turn */
-	while ( cursor.len ) {
-		if ( ( rc = x509_parse_access_description ( cert,
-							    &cursor ) ) != 0 )
-			return rc;
-		asn1_skip_any ( &cursor );
-	}
-
-	return 0;
-}
-
-/** "id-ce-basicConstraints" object identifier */
-static uint8_t oid_ce_basic_constraints[] =
-	{ ASN1_OID_BASICCONSTRAINTS };
-
-/** "id-ce-keyUsage" object identifier */
-static uint8_t oid_ce_key_usage[] =
-	{ ASN1_OID_KEYUSAGE };
-
-/** "id-ce-extKeyUsage" object identifier */
-static uint8_t oid_ce_ext_key_usage[] =
-	{ ASN1_OID_EXTKEYUSAGE };
-
-/** "id-pe-authorityInfoAccess" object identifier */
-static uint8_t oid_pe_authority_info_access[] =
-	{ ASN1_OID_AUTHORITYINFOACCESS };
-
-/** Supported certificate extensions */
-static struct x509_extension x509_extensions[] = {
-	{
-		.name = "basicConstraints",
-		.oid = ASN1_OID_CURSOR ( oid_ce_basic_constraints ),
-		.parse = x509_parse_basic_constraints,
-	},
-	{
-		.name = "keyUsage",
-		.oid = ASN1_OID_CURSOR ( oid_ce_key_usage ),
-		.parse = x509_parse_key_usage,
-	},
-	{
-		.name = "extKeyUsage",
-		.oid = ASN1_OID_CURSOR ( oid_ce_ext_key_usage ),
-		.parse = x509_parse_extended_key_usage,
-	},
-	{
-		.name = "authorityInfoAccess",
-		.oid = ASN1_OID_CURSOR ( oid_pe_authority_info_access ),
-		.parse = x509_parse_authority_info_access,
-	},
-};
-
-/**
- * Identify X.509 extension by OID
- *
- * @v oid		OID
- * @ret extension	Extension, or NULL
- */
-static struct x509_extension *
-x509_find_extension ( const struct asn1_cursor *oid ) {
-	struct x509_extension *extension;
-	unsigned int i;
-
-	for ( i = 0 ; i < ( sizeof ( x509_extensions ) /
-			    sizeof ( x509_extensions[0] ) ) ; i++ ) {
-		extension = &x509_extensions[i];
-		if ( asn1_compare ( &extension->oid, oid ) == 0 )
-			return extension;
-	}
-
-	return NULL;
-}
-
-/**
- * Parse X.509 certificate extension
  *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
+ * The caller is responsible for eventually calling
+ * x509_free_rsa_public_key() to free the storage allocated to hold
+ * the RSA modulus and exponent.
  */
-static int x509_parse_extension ( struct x509_certificate *cert,
-				  const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	struct asn1_cursor subcursor;
-	struct x509_extension *extension;
-	int is_critical = 0;
+int x509_rsa_public_key ( const struct asn1_cursor *certificate,
+			  struct x509_rsa_public_key *rsa_pubkey ) {
+	struct asn1_cursor algorithm;
+	struct asn1_cursor pubkey;
+	struct asn1_cursor modulus;
+	struct asn1_cursor exponent;
 	int rc;
 
-	/* Enter extension */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Try to identify extension */
-	memcpy ( &subcursor, &cursor, sizeof ( subcursor ) );
-	asn1_enter ( &subcursor, ASN1_OID );
-	extension = x509_find_extension ( &subcursor );
-	asn1_skip_any ( &cursor );
-	DBGC2 ( cert, "X509 %p found extension %s\n",
-		cert, ( extension ? extension->name : "<unknown>" ) );
-
-	/* Identify criticality */
-	if ( asn1_type ( &cursor ) == ASN1_BOOLEAN ) {
-		is_critical = asn1_boolean ( &cursor );
-		if ( is_critical < 0 ) {
-			rc = is_critical;
-			DBGC ( cert, "X509 %p cannot parse extension "
-			       "criticality: %s\n", cert, strerror ( rc ) );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return rc;
-		}
-		asn1_skip_any ( &cursor );
-	}
-
-	/* Handle unknown extensions */
-	if ( ! extension ) {
-		if ( is_critical ) {
-			/* Fail if we cannot handle a critical extension */
-			DBGC ( cert, "X509 %p cannot handle critical "
-			       "extension:\n", cert );
-			DBGC_HDA ( cert, 0, raw->data, raw->len );
-			return -ENOTSUP_EXTENSION;
-		} else {
-			/* Ignore unknown non-critical extensions */
-			return 0;
-		}
-	};
-
-	/* Extract extnValue */
-	if ( ( rc = asn1_enter ( &cursor, ASN1_OCTET_STRING ) ) != 0 ) {
-		DBGC ( cert, "X509 %p extension missing extnValue:\n", cert );
-		DBGC_HDA ( cert, 0, raw->data, raw->len );
-		return rc;
-	}
-
-	/* Parse extension */
-	if ( ( rc = extension->parse ( cert, &cursor ) ) != 0 )
+	/* First, extract the public key algorithm and key data */
+	if ( ( rc = x509_public_key ( certificate, &algorithm,
+				      &pubkey ) ) != 0 )
 		return rc;
 
-	return 0;
-}
-
-/**
- * Parse X.509 certificate extensions, if present
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_extensions ( struct x509_certificate *cert,
-				   const struct asn1_cursor *raw ) {
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Enter extensions, if present */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_enter ( &cursor, ASN1_EXPLICIT_TAG ( 3 ) );
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse each extension in turn */
-	while ( cursor.len ) {
-		if ( ( rc = x509_parse_extension ( cert, &cursor ) ) != 0 )
-			return rc;
-		asn1_skip_any ( &cursor );
-	}
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate tbsCertificate
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse_tbscertificate ( struct x509_certificate *cert,
-				       const struct asn1_cursor *raw ) {
-	struct asn1_algorithm **algorithm = &cert->signature_algorithm;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Record raw tbsCertificate */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	asn1_shrink_any ( &cursor );
-	memcpy ( &cert->tbs, &cursor, sizeof ( cert->tbs ) );
-
-	/* Enter tbsCertificate */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse version, if present */
-	if ( asn1_type ( &cursor ) == ASN1_EXPLICIT_TAG ( 0 ) ) {
-		if ( ( rc = x509_parse_version ( cert, &cursor ) ) != 0 )
-			return rc;
-		asn1_skip_any ( &cursor );
-	}
-
-	/* Parse serialNumber */
-	if ( ( rc = x509_parse_serial ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse signature */
-	if ( ( rc = asn1_signature_algorithm ( &cursor, algorithm ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse signature algorithm: "
-		       "%s\n", cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p tbsCertificate signature algorithm is %s\n",
-		cert, (*algorithm)->name );
-	asn1_skip_any ( &cursor );
-
-	/* Parse issuer */
-	if ( ( rc = x509_parse_issuer ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse validity */
-	if ( ( rc = x509_parse_validity ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse subject */
-	if ( ( rc = x509_parse_subject ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse subjectPublicKeyInfo */
-	if ( ( rc = x509_parse_public_key ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse extensions, if present */
-	if ( ( rc = x509_parse_extensions ( cert, &cursor ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Parse X.509 certificate from ASN.1 data
- *
- * @v cert		X.509 certificate
- * @v raw		ASN.1 cursor
- * @ret rc		Return status code
- */
-static int x509_parse ( struct x509_certificate *cert,
-			const struct asn1_cursor *raw ) {
-	struct x509_signature *signature = &cert->signature;
-	struct asn1_algorithm **signature_algorithm = &signature->algorithm;
-	struct asn1_bit_string *signature_value = &signature->value;
-	struct asn1_cursor cursor;
-	int rc;
-
-	/* Record raw certificate */
-	memcpy ( &cursor, raw, sizeof ( cursor ) );
-	memcpy ( &cert->raw, &cursor, sizeof ( cert->raw ) );
-
-	/* Enter certificate */
-	asn1_enter ( &cursor, ASN1_SEQUENCE );
-
-	/* Parse tbsCertificate */
-	if ( ( rc = x509_parse_tbscertificate ( cert, &cursor ) ) != 0 )
-		return rc;
-	asn1_skip_any ( &cursor );
-
-	/* Parse signatureAlgorithm */
-	if ( ( rc = asn1_signature_algorithm ( &cursor,
-					       signature_algorithm ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse signature algorithm: "
-		       "%s\n", cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p signatureAlgorithm is %s\n",
-		cert, (*signature_algorithm)->name );
-	asn1_skip_any ( &cursor );
-
-	/* Parse signatureValue */
-	if ( ( rc = asn1_integral_bit_string ( &cursor,
-					       signature_value ) ) != 0 ) {
-		DBGC ( cert, "X509 %p could not parse signature value: %s\n",
-		       cert, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( cert, "X509 %p signatureValue is:\n", cert );
-	DBGC2_HDA ( cert, 0, signature_value->data, signature_value->len );
-
-	/* Check that algorithm in tbsCertificate matches algorithm in
-	 * signature
-	 */
-	if ( signature->algorithm != (*signature_algorithm) ) {
-		DBGC ( cert, "X509 %p signature algorithm %s does not match "
-		       "signatureAlgorithm %s\n",
-		       cert, signature->algorithm->name,
-		       (*signature_algorithm)->name );
-		return -EINVAL_ALGORITHM_MISMATCH;
-	}
-
-	return 0;
-}
-
-/**
- * Create X.509 certificate
- *
- * @v data		Raw certificate data
- * @v len		Length of raw data
- * @ret cert		X.509 certificate
- * @ret rc		Return status code
- *
- * On success, the caller holds a reference to the X.509 certificate,
- * and is responsible for ultimately calling x509_put().
- */
-int x509_certificate ( const void *data, size_t len,
-		       struct x509_certificate **cert ) {
-	struct asn1_cursor cursor;
-	void *raw;
-	int rc;
-
-	/* Initialise cursor */
-	cursor.data = data;
-	cursor.len = len;
-	asn1_shrink_any ( &cursor );
-
-	/* Search for certificate within cache */
-	list_for_each_entry ( (*cert), &x509_cache, list ) {
-		if ( asn1_compare ( &cursor, &(*cert)->raw ) == 0 ) {
-
-			DBGC2 ( *cert, "X509 %p \"%s\" cache hit\n",
-				*cert, (*cert)->subject.name );
-
-			/* Mark as most recently used */
-			list_del ( &(*cert)->list );
-			list_add ( &(*cert)->list, &x509_cache );
-
-			/* Add caller's reference */
-			x509_get ( *cert );
-
-			return 0;
-		}
-	}
-
-	/* Allocate and initialise certificate */
-	*cert = zalloc ( sizeof ( **cert ) + cursor.len );
-	if ( ! *cert )
-		return -ENOMEM;
-	ref_init ( &(*cert)->refcnt, x509_free );
-	INIT_LIST_HEAD ( &(*cert)->list );
-	raw = ( *cert + 1 );
-
-	/* Copy raw data */
-	memcpy ( raw, cursor.data, cursor.len );
-	cursor.data = raw;
-
-	/* Parse certificate */
-	if ( ( rc = x509_parse ( *cert, &cursor ) ) != 0 ) {
-		x509_put ( *cert );
-		*cert = NULL;
-		return rc;
-	}
-
-	/* Add certificate to cache */
-	x509_get ( *cert );
-	list_add ( &(*cert)->list, &x509_cache );
-
-	return 0;
-}
-
-/**
- * Check X.509 certificate signature
- *
- * @v cert		X.509 certificate
- * @v public_key	X.509 public key
- * @ret rc		Return status code
- */
-static int x509_check_signature ( struct x509_certificate *cert,
-				  struct x509_public_key *public_key ) {
-	struct x509_signature *signature = &cert->signature;
-	struct asn1_algorithm *algorithm = signature->algorithm;
-	struct digest_algorithm *digest = algorithm->digest;
-	struct pubkey_algorithm *pubkey = algorithm->pubkey;
-	uint8_t digest_ctx[ digest->ctxsize ];
-	uint8_t digest_out[ digest->digestsize ];
-	uint8_t pubkey_ctx[ pubkey->ctxsize ];
-	int rc;
-
-	/* Sanity check */
-	assert ( cert->signature_algorithm == cert->signature.algorithm );
-
-	/* Calculate certificate digest */
-	digest_init ( digest, digest_ctx );
-	digest_update ( digest, digest_ctx, cert->tbs.data, cert->tbs.len );
-	digest_final ( digest, digest_ctx, digest_out );
-	DBGC2 ( cert, "X509 %p \"%s\" digest:\n", cert, cert->subject.name );
-	DBGC2_HDA ( cert, 0, digest_out, sizeof ( digest_out ) );
-
-	/* Check that signature public key algorithm matches signer */
-	if ( public_key->algorithm->pubkey != pubkey ) {
-		DBGC ( cert, "X509 %p \"%s\" signature algorithm %s does not "
-		       "match signer's algorithm %s\n",
-		       cert, cert->subject.name, algorithm->name,
-		       public_key->algorithm->name );
-		rc = -EINVAL_ALGORITHM_MISMATCH;
-		goto err_mismatch;
-	}
-
-	/* Verify signature using signer's public key */
-	if ( ( rc = pubkey_init ( pubkey, pubkey_ctx, public_key->raw.data,
-				  public_key->raw.len ) ) != 0 ) {
-		DBGC ( cert, "X509 %p \"%s\" cannot initialise public key: "
-		       "%s\n", cert, cert->subject.name, strerror ( rc ) );
-		goto err_pubkey_init;
-	}
-	if ( ( rc = pubkey_verify ( pubkey, pubkey_ctx, digest, digest_out,
-				    signature->value.data,
-				    signature->value.len ) ) != 0 ) {
-		DBGC ( cert, "X509 %p \"%s\" signature verification failed: "
-		       "%s\n", cert, cert->subject.name, strerror ( rc ) );
-		goto err_pubkey_verify;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_pubkey_verify:
-	pubkey_final ( pubkey, pubkey_ctx );
- err_pubkey_init:
- err_mismatch:
+	/* Check that algorithm is RSA */
+	rc = ( asn1_enter ( &algorithm, ASN1_OID ) /* algorithm */ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate algorithm:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
 	return rc;
-}
-
-/**
- * Check X.509 certificate against issuer certificate
- *
- * @v cert		X.509 certificate
- * @v issuer		X.509 issuer certificate
- * @ret rc		Return status code
- */
-int x509_check_issuer ( struct x509_certificate *cert,
-			struct x509_certificate *issuer ) {
-	struct x509_public_key *public_key = &issuer->subject.public_key;
-	int rc;
-
-	/* Check issuer.  In theory, this should be a full X.500 DN
-	 * comparison, which would require support for a plethora of
-	 * abominations such as TeletexString (which allows the
-	 * character set to be changed mid-string using escape codes).
-	 * In practice, we assume that anyone who deliberately changes
-	 * the encoding of the issuer DN is probably a masochist who
-	 * will rather enjoy the process of figuring out exactly why
-	 * their certificate doesn't work.
-	 *
-	 * See http://www.cs.auckland.ac.nz/~pgut001/pubs/x509guide.txt
-	 * for some enjoyable ranting on this subject.
-	 */
-	if ( asn1_compare ( &cert->issuer.raw, &issuer->subject.raw ) != 0 ) {
-		DBGC ( cert, "X509 %p \"%s\" issuer does not match X509 %p "
-		       "\"%s\" subject\n", cert, cert->subject.name,
-		       issuer, issuer->subject.name );
-		DBGC_HDA ( cert, 0, cert->issuer.raw.data,
-			   cert->issuer.raw.len );
-		DBGC_HDA ( issuer, 0, issuer->subject.raw.data,
-			   issuer->subject.raw.len );
-		return -EACCES_WRONG_ISSUER;
 	}
-
-	/* Check that issuer is allowed to sign certificates */
-	if ( ! issuer->extensions.basic.ca ) {
-		DBGC ( issuer, "X509 %p \"%s\" cannot sign X509 %p \"%s\": "
-		       "not a CA certificate\n", issuer, issuer->subject.name,
-		       cert, cert->subject.name );
-		return -EACCES_NOT_CA;
-	}
-	if ( issuer->extensions.usage.present &&
-	     ( ! ( issuer->extensions.usage.bits & X509_KEY_CERT_SIGN ) ) ) {
-		DBGC ( issuer, "X509 %p \"%s\" cannot sign X509 %p \"%s\": "
-		       "no keyCertSign usage\n", issuer, issuer->subject.name,
-		       cert, cert->subject.name );
-		return -EACCES_KEY_USAGE;
+	if ( ( algorithm.len != sizeof ( oid_rsa_encryption ) ) ||
+	     ( memcmp ( algorithm.data, &oid_rsa_encryption,
+			sizeof ( oid_rsa_encryption ) ) != 0 ) ) {
+		DBG ( "algorithm is not rsaEncryption in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
+		return -ENOTSUP;
 	}
 
-	/* Check signature */
-	if ( ( rc = x509_check_signature ( cert, public_key ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Calculate X.509 certificate fingerprint
- *
- * @v cert		X.509 certificate
- * @v digest		Digest algorithm
- * @v fingerprint	Fingerprint buffer
- */
-void x509_fingerprint ( struct x509_certificate *cert,
-			struct digest_algorithm *digest,
-			void *fingerprint ) {
-	uint8_t ctx[ digest->ctxsize ];
-
-	/* Calculate fingerprint */
-	digest_init ( digest, ctx );
-	digest_update ( digest, ctx, cert->raw.data, cert->raw.len );
-	digest_final ( digest, ctx, fingerprint );
-}
-
-/**
- * Check X.509 root certificate
- *
- * @v cert		X.509 certificate
- * @v root		X.509 root certificate store
- * @ret rc		Return status code
- */
-int x509_check_root ( struct x509_certificate *cert, struct x509_root *root ) {
-	struct digest_algorithm *digest = root->digest;
-	uint8_t fingerprint[ digest->digestsize ];
-	const uint8_t *root_fingerprint = root->fingerprints;
-	unsigned int i;
-
-	/* Calculate certificate fingerprint */
-	x509_fingerprint ( cert, digest, fingerprint );
-
-	/* Check fingerprint against all root certificates */
-	for ( i = 0 ; i < root->count ; i++ ) {
-		if ( memcmp ( fingerprint, root_fingerprint,
-			      sizeof ( fingerprint ) ) == 0 ) {
-			DBGC ( cert, "X509 %p \"%s\" is a root certificate\n",
-			       cert, cert->subject.name );
-			return 0;
-		}
-		root_fingerprint += sizeof ( fingerprint );
-	}
-
-	DBGC2 ( cert, "X509 %p \"%s\" is not a root certificate\n",
-		cert, cert->subject.name );
-	return -ENOENT;
-}
-
-/**
- * Check X.509 certificate validity period
- *
- * @v cert		X.509 certificate
- * @v time		Time at which to check certificate
- * @ret rc		Return status code
- */
-int x509_check_time ( struct x509_certificate *cert, time_t time ) {
-	struct x509_validity *validity = &cert->validity;
-
-	/* Check validity period */
-	if ( validity->not_before.time > ( time + X509_ERROR_MARGIN_TIME ) ) {
-		DBGC ( cert, "X509 %p \"%s\" is not yet valid (at time %lld)\n",
-		       cert, cert->subject.name, time );
-		return -EACCES_EXPIRED;
-	}
-	if ( validity->not_after.time < ( time - X509_ERROR_MARGIN_TIME ) ) {
-		DBGC ( cert, "X509 %p \"%s\" has expired (at time %lld)\n",
-		       cert, cert->subject.name, time );
-		return -EACCES_EXPIRED;
-	}
-
-	DBGC2 ( cert, "X509 %p \"%s\" is valid (at time %lld)\n",
-		cert, cert->subject.name, time );
-	return 0;
-}
-
-/**
- * Validate X.509 certificate
- *
- * @v cert		X.509 certificate
- * @v issuer		Issuing X.509 certificate (or NULL)
- * @v time		Time at which to validate certificate
- * @v root		Root certificate store, or NULL to use default
- * @ret rc		Return status code
- *
- * The issuing certificate must have already been validated.
- *
- * Validation results are cached: if a certificate has already been
- * successfully validated then @c issuer, @c time, and @c root will be
- * ignored.
- */
-int x509_validate ( struct x509_certificate *cert,
-		    struct x509_certificate *issuer,
-		    time_t time, struct x509_root *root ) {
-	unsigned int max_path_remaining;
-	int rc;
-
-	/* Use default root certificate store if none specified */
-	if ( ! root )
-		root = &root_certificates;
-
-	/* Return success if certificate has already been validated */
-	if ( cert->valid )
-		return 0;
-
-	/* Fail if certificate is invalid at specified time */
-	if ( ( rc = x509_check_time ( cert, time ) ) != 0 )
-		return rc;
-
-	/* Succeed if certificate is a trusted root certificate */
-	if ( x509_check_root ( cert, root ) == 0 ) {
-		cert->valid = 1;
-		cert->path_remaining = ( cert->extensions.basic.path_len + 1 );
-		return 0;
-	}
-
-	/* Fail unless we have an issuer */
-	if ( ! issuer ) {
-		DBGC2 ( cert, "X509 %p \"%s\" has no issuer\n",
-			cert, cert->subject.name );
-		return -EACCES_UNTRUSTED;
-	}
-
-	/* Fail unless issuer has already been validated */
-	if ( ! issuer->valid ) {
-		DBGC ( cert, "X509 %p \"%s\" issuer %p \"%s\" has not yet "
-		       "been validated\n", cert, cert->subject.name,
-		       issuer, issuer->subject.name );
-		return -EACCES_OUT_OF_ORDER;
-	}
-
-	/* Fail if issuing certificate cannot validate this certificate */
-	if ( ( rc = x509_check_issuer ( cert, issuer ) ) != 0 )
-		return rc;
-
-	/* Fail if path length constraint is violated */
-	if ( issuer->path_remaining == 0 ) {
-		DBGC ( cert, "X509 %p \"%s\" issuer %p \"%s\" path length "
-		       "exceeded\n", cert, cert->subject.name,
-		       issuer, issuer->subject.name );
-		return -EACCES_PATH_LEN;
-	}
-
-	/* Fail if OCSP is required */
-	if ( cert->extensions.auth_info.ocsp.uri &&
-	     ( ! cert->extensions.auth_info.ocsp.good ) ) {
-		DBGC ( cert, "X509 %p \"%s\" requires an OCSP check\n",
-		       cert, cert->subject.name );
-		return -EACCES_OCSP_REQUIRED;
-	}
-
-	/* Calculate effective path length */
-	cert->path_remaining = ( issuer->path_remaining - 1 );
-	max_path_remaining = ( cert->extensions.basic.path_len + 1 );
-	if ( cert->path_remaining > max_path_remaining )
-		cert->path_remaining = max_path_remaining;
-
-	/* Mark certificate as valid */
-	cert->valid = 1;
-
-	DBGC ( cert, "X509 %p \"%s\" successfully validated using issuer %p "
-	       "\"%s\"\n", cert, cert->subject.name,
-	       issuer, issuer->subject.name );
-	return 0;
-}
-
-/**
- * Free X.509 certificate chain
- *
- * @v refcnt		Reference count
- */
-static void x509_free_chain ( struct refcnt *refcnt ) {
-	struct x509_chain *chain =
-		container_of ( refcnt, struct x509_chain, refcnt );
-	struct x509_link *link;
-	struct x509_link *tmp;
-
-	DBGC2 ( chain, "X509 chain %p freed\n", chain );
-
-	/* Free each link in the chain */
-	list_for_each_entry_safe ( link, tmp, &chain->links, list ) {
-		x509_put ( link->cert );
-		list_del ( &link->list );
-		free ( link );
-	}
-
-	/* Free chain */
-	free ( chain );
-}
-
-/**
- * Allocate X.509 certificate chain
- *
- * @ret chain		X.509 certificate chain, or NULL
- */
-struct x509_chain * x509_alloc_chain ( void ) {
-	struct x509_chain *chain;
-
-	/* Allocate chain */
-	chain = zalloc ( sizeof ( *chain ) );
-	if ( ! chain )
-		return NULL;
-
-	/* Initialise chain */
-	ref_init ( &chain->refcnt, x509_free_chain );
-	INIT_LIST_HEAD ( &chain->links );
-
-	DBGC2 ( chain, "X509 chain %p allocated\n", chain );
-	return chain;
-}
-
-/**
- * Append X.509 certificate to X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @v cert		X.509 certificate
- * @ret rc		Return status code
- */
-int x509_append ( struct x509_chain *chain, struct x509_certificate *cert ) {
-	struct x509_link *link;
-
-	/* Allocate link */
-	link = zalloc ( sizeof ( *link ) );
-	if ( ! link )
+	/* Check that public key is a byte string, i.e. that the
+	 * "unused bits" byte contains zero.
+	 */
+	if ( ( pubkey.len < 1 ) ||
+	     ( ( *( uint8_t * ) pubkey.data ) != 0 ) ) {
+		DBG ( "subjectPublicKey is not a byte string in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
+		return -ENOTSUP;
+	}
+	pubkey.data++;
+	pubkey.len--;
+
+	/* Pick out the modulus and exponent */
+	rc = ( asn1_enter ( &pubkey, ASN1_SEQUENCE ) /* RSAPublicKey */ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate RSAPublicKey in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
+		return -ENOTSUP;
+	}
+	memcpy ( &modulus, &pubkey, sizeof ( modulus ) );
+	rc = ( asn1_enter ( &modulus, ASN1_INTEGER ) /* modulus */ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate modulus in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
+		return -ENOTSUP;
+	}
+	memcpy ( &exponent, &pubkey, sizeof ( exponent ) );
+	rc = ( asn1_skip ( &exponent, ASN1_INTEGER ), /* modulus */
+	       asn1_enter ( &exponent, ASN1_INTEGER ) /* publicExponent */ );
+	if ( rc != 0 ) {
+		DBG ( "Cannot locate publicExponent in:\n" );
+		DBG_HDA ( 0, certificate->data, certificate->len );
+		return -ENOTSUP;
+	}
+
+	/* Allocate space and copy out modulus and exponent */
+	rsa_pubkey->modulus = malloc ( modulus.len + exponent.len );
+	if ( ! rsa_pubkey->modulus )
 		return -ENOMEM;
-
-	/* Add link to chain */
-	link->cert = x509_get ( cert );
-	list_add_tail ( &link->list, &chain->links );
-	DBGC ( chain, "X509 chain %p added X509 %p \"%s\"\n",
-	       chain, cert, cert->subject.name );
-
-	return 0;
-}
-
-/**
- * Append X.509 certificate to X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @v data		Raw certificate data
- * @v len		Length of raw data
- * @ret rc		Return status code
- */
-int x509_append_raw ( struct x509_chain *chain, const void *data,
-		      size_t len ) {
-	struct x509_certificate *cert;
-	int rc;
-
-	/* Parse certificate */
-	if ( ( rc = x509_certificate ( data, len, &cert ) ) != 0 )
-		goto err_parse;
-
-	/* Append certificate to chain */
-	if ( ( rc = x509_append ( chain, cert ) ) != 0 )
-		goto err_append;
-
-	/* Drop reference to certificate */
-	x509_put ( cert );
-
-	return 0;
-
- err_append:
-	x509_put ( cert );
- err_parse:
-	return rc;
-}
-
-/**
- * Identify X.509 certificate by subject
- *
- * @v certs		X.509 certificate list
- * @v subject		Subject
- * @ret cert		X.509 certificate, or NULL if not found
- */
-static struct x509_certificate *
-x509_find_subject ( struct x509_chain *certs,
-		    const struct asn1_cursor *subject ) {
-	struct x509_link *link;
-	struct x509_certificate *cert;
-
-	/* Scan through certificate list */
-	list_for_each_entry ( link, &certs->links, list ) {
-
-		/* Check subject */
-		cert = link->cert;
-		if ( asn1_compare ( subject, &cert->subject.raw ) == 0 )
-			return cert;
-	}
-
-	return NULL;
-}
-
-/**
- * Append X.509 certificates to X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @v certs		X.509 certificate list
- * @ret rc		Return status code
- *
- * Certificates will be automatically appended to the chain based upon
- * the subject and issuer names.
- */
-int x509_auto_append ( struct x509_chain *chain, struct x509_chain *certs ) {
-	struct x509_certificate *cert;
-	struct x509_certificate *previous;
-	int rc;
-
-	/* Get current certificate */
-	cert = x509_last ( chain );
-	if ( ! cert ) {
-		DBGC ( chain, "X509 chain %p has no certificates\n", chain );
-		return -EINVAL;
-	}
-
-	/* Append certificates, in order */
-	while ( 1 ) {
-
-		/* Find issuing certificate */
-		previous = cert;
-		cert = x509_find_subject ( certs, &cert->issuer.raw );
-		if ( ! cert )
-			break;
-		if ( cert == previous )
-			break;
-
-		/* Append certificate to chain */
-		if ( ( rc = x509_append ( chain, cert ) ) != 0 )
-			return rc;
-	}
+	rsa_pubkey->exponent = ( rsa_pubkey->modulus + modulus.len );
+	memcpy ( rsa_pubkey->modulus, modulus.data, modulus.len );
+	rsa_pubkey->modulus_len = modulus.len;
+	memcpy ( rsa_pubkey->exponent, exponent.data, exponent.len );
+	rsa_pubkey->exponent_len = exponent.len;
+
+	DBG2 ( "RSA modulus:\n" );
+	DBG2_HDA ( 0, rsa_pubkey->modulus, rsa_pubkey->modulus_len );
+	DBG2 ( "RSA exponent:\n" );
+	DBG2_HDA ( 0, rsa_pubkey->exponent, rsa_pubkey->exponent_len );
 
 	return 0;
 }
-
-/**
- * Validate X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @v time		Time at which to validate certificates
- * @v root		Root certificate store, or NULL to use default
- * @ret rc		Return status code
- */
-int x509_validate_chain ( struct x509_chain *chain, time_t time,
-			  struct x509_root *root ) {
-	struct x509_certificate *issuer = NULL;
-	struct x509_link *link;
-	int rc;
-
-	/* Error to be used if chain contains no certifictes */
-	rc = -EACCES_EMPTY;
-
-	/* Find first certificate that can be validated as a
-	 * standalone (i.e.  is already valid, or can be validated as
-	 * a trusted root certificate).
-	 */
-	list_for_each_entry ( link, &chain->links, list ) {
-
-		/* Try validating this certificate as a standalone */
-		if ( ( rc = x509_validate ( link->cert, NULL, time,
-					    root ) ) != 0 )
-			continue;
-
-		/* Work back up to start of chain, performing pairwise
-		 * validation.
-		 */
-		issuer = link->cert;
-		list_for_each_entry_continue_reverse ( link, &chain->links,
-						       list ) {
-
-			/* Validate this certificate against its issuer */
-			if ( ( rc = x509_validate ( link->cert, issuer, time,
-						    root ) ) != 0 )
-				return rc;
-			issuer = link->cert;
-		}
-
-		return 0;
-	}
-
-	DBGC ( chain, "X509 chain %p found no valid certificates: %s\n",
-	       chain, strerror ( rc ) );
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/bitbash.c ipxe-1.0.1~lliurex1505/src/drivers/bitbash/bitbash.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/bitbash.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bitbash/bitbash.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/i2c_bit.c ipxe-1.0.1~lliurex1505/src/drivers/bitbash/i2c_bit.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/i2c_bit.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bitbash/i2c_bit.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -239,7 +238,6 @@
 	 * pull SDA low while SCL is high (which creates a start
 	 * condition).
 	 */
-	open_bit ( basher );
 	setscl ( basher, 0 );
 	setsda ( basher, 1 );
 	for ( i = 0 ; i < I2C_RESET_MAX_CYCLES ; i++ ) {
@@ -252,7 +250,6 @@
 			i2c_stop ( basher );
 			DBGC ( basher, "I2CBIT %p reset after %d attempts\n",
 			       basher, ( i + 1 ) );
-			close_bit ( basher );
 			return 0;
 		}
 		setscl ( basher, 0 );
@@ -260,7 +257,6 @@
 
 	DBGC ( basher, "I2CBIT %p could not reset after %d attempts\n",
 	       basher, i );
-	close_bit ( basher );
 	return -ETIMEDOUT;
 }
 
@@ -288,8 +284,6 @@
 	DBGC ( basher, "I2CBIT %p reading from device %x: ",
 	       basher, i2cdev->dev_addr );
 
-	open_bit ( basher );
-
 	for ( ; ; data++, offset++ ) {
 
 		/* Select device for writing */
@@ -317,7 +311,6 @@
 	
 	DBGC ( basher, "%s\n", ( rc ? "failed" : "" ) );
 	i2c_stop ( basher );
-	close_bit ( basher );
 	return rc;
 }
 
@@ -345,8 +338,6 @@
 	DBGC ( basher, "I2CBIT %p writing to device %x: ",
 	       basher, i2cdev->dev_addr );
 
-	open_bit ( basher );
-
 	for ( ; ; data++, offset++ ) {
 
 		/* Select device for writing */
@@ -367,10 +358,9 @@
 		if ( ( rc = i2c_send_byte ( basher, *data ) ) != 0 )
 			break;
 	}
-
+	
 	DBGC ( basher, "%s\n", ( rc ? "failed" : "" ) );
 	i2c_stop ( basher );
-	close_bit ( basher );
 	return rc;
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/spi_bit.c ipxe-1.0.1~lliurex1505/src/drivers/bitbash/spi_bit.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bitbash/spi_bit.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bitbash/spi_bit.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -163,9 +162,6 @@
 	uint32_t tmp_address;
 	uint32_t tmp_address_detect;
 
-	/* Open bit-bashing interface */
-	open_bit ( &spibit->basher );
-
 	/* Deassert chip select to reset specified slave */
 	spi_bit_set_slave_select ( spibit, device->slave, DESELECT_SLAVE );
 
@@ -217,9 +213,6 @@
 	/* Deassert chip select on specified slave */
 	spi_bit_set_slave_select ( spibit, device->slave, DESELECT_SLAVE );
 
-	/* Close bit-bashing interface */
-	close_bit ( &spibit->basher );
-
 	return 0;
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/ata.c ipxe-1.0.1~lliurex1505/src/drivers/block/ata.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/ata.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/block/ata.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/ibft.c ipxe-1.0.1~lliurex1505/src/drivers/block/ibft.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/ibft.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/block/ibft.c	2012-01-06 23:49:04.000000000 +0000
@@ -37,7 +37,6 @@
 #include <ipxe/in.h>
 #include <ipxe/netdevice.h>
 #include <ipxe/ethernet.h>
-#include <ipxe/vlan.h>
 #include <ipxe/dhcp.h>
 #include <ipxe/iscsi.h>
 #include <ipxe/ibft.h>
@@ -265,8 +264,6 @@
 	DBG ( "iBFT NIC subnet = /%d\n", nic->subnet_mask_prefix );
 
 	/* Extract values from net-device configuration */
-	nic->vlan = cpu_to_le16 ( vlan_tag ( netdev ) );
-	DBG ( "iBFT NIC VLAN = %02x\n", le16_to_cpu ( nic->vlan ) );
 	if ( ( rc = ll_protocol->eth_addr ( netdev->ll_addr,
 					    nic->mac_address ) ) != 0 ) {
 		DBG ( "Could not determine iBFT MAC: %s\n", strerror ( rc ) );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/scsi.c ipxe-1.0.1~lliurex1505/src/drivers/block/scsi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/scsi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/block/scsi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -89,7 +88,7 @@
 #define EINFO_EIO_COMPLETED \
 	__einfo_uniqify ( EINFO_EIO, 0x0f, "Completed" )
 #define EIO_SENSE( key )						\
-	EUNIQ ( EINFO_EIO, (key), EIO_NO_SENSE, EIO_RECOVERED_ERROR,	\
+	EUNIQ ( EIO, (key), EIO_NO_SENSE, EIO_RECOVERED_ERROR,		\
 		EIO_NOT_READY, EIO_MEDIUM_ERROR, EIO_HARDWARE_ERROR,	\
 		EIO_ILLEGAL_REQUEST, EIO_UNIT_ATTENTION,		\
 		EIO_DATA_PROTECT, EIO_BLANK_CHECK, EIO_VENDOR_SPECIFIC,	\
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/srp.c ipxe-1.0.1~lliurex1505/src/drivers/block/srp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/block/srp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/block/srp.c	2012-01-06 23:49:04.000000000 +0000
@@ -93,7 +93,7 @@
 	SRP_LOGIN_REJ_REASON_NO_MORE_CHANNELS,				      \
 	"RDMA channel limit reached for this initiator" )
 #define EPERM_LOGIN_REJ( reason_nibble )				      \
-	EUNIQ ( EINFO_EPERM, (reason_nibble), EPERM_UNKNOWN,		      \
+	EUNIQ ( EPERM, (reason_nibble), EPERM_UNKNOWN,			      \
 		EPERM_INSUFFICIENT_RESOURCES, EPERM_BAD_MAX_I_T_IU_LEN,	      \
 		EPERM_CANNOT_ASSOCIATE, EPERM_UNSUPPORTED_BUFFER_FORMAT,      \
 		EPERM_NO_MULTIPLE_CHANNELS, EPERM_NO_MORE_CHANNELS )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/isa.c ipxe-1.0.1~lliurex1505/src/drivers/bus/isa.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/isa.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/isa.c	2012-01-06 23:49:04.000000000 +0000
@@ -46,9 +46,9 @@
 #endif
 
 #define ISA_IOADDR( driver, ioidx )					  \
-	( ( (ioidx) >= 0 ) ?						  \
-	  (driver)->probe_addrs[(ioidx)] :				  \
-	  *( isa_extra_probe_addrs + (ioidx) + ISA_EXTRA_PROBE_ADDR_COUNT ) )
+	( ( (ioidx) < 0 ) ?						  \
+	  isa_extra_probe_addrs[ (ioidx) + ISA_EXTRA_PROBE_ADDR_COUNT ] : \
+	  (driver)->probe_addrs[(ioidx)] )
 
 static void isabus_remove ( struct root_device *rootdev );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/isapnp.c ipxe-1.0.1~lliurex1505/src/drivers/bus/isapnp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/isapnp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/isapnp.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code:
 *	Copyright (C) 2001  P.J.H.Fox (fox@roestock.demon.co.uk)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pcibackup.c ipxe-1.0.1~lliurex1505/src/drivers/bus/pcibackup.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pcibackup.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/pcibackup.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pci.c ipxe-1.0.1~lliurex1505/src/drivers/bus/pci.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pci.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/pci.c	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -171,20 +170,8 @@
  * @ret rc		Return status code
  */
 int pci_read_config ( struct pci_device *pci ) {
-	uint16_t busdevfn;
-	uint8_t hdrtype;
 	uint32_t tmp;
 
-	/* Ignore all but the first function on non-multifunction devices */
-	if ( PCI_FUNC ( pci->busdevfn ) != 0 ) {
-		busdevfn = pci->busdevfn;
-		pci->busdevfn = PCI_FIRST_FUNC ( pci->busdevfn );
-		pci_read_config_byte ( pci, PCI_HEADER_TYPE, &hdrtype );
-		pci->busdevfn = busdevfn;
-		if ( ! ( hdrtype & 0x80 ) )
-			return -ENODEV;
-	}
-
 	/* Check for physical device presence */
 	pci_read_config_dword ( pci, PCI_VENDOR_ID, &tmp );
 	if ( ( tmp == 0xffffffff ) || ( tmp == 0 ) )
@@ -216,32 +203,6 @@
 }
 
 /**
- * Find next device on PCI bus
- *
- * @v pci		PCI device to fill in
- * @v busdevfn		Starting bus:dev.fn address
- * @ret busdevfn	Bus:dev.fn address of next PCI device, or negative error
- */
-int pci_find_next ( struct pci_device *pci, unsigned int busdevfn ) {
-	static unsigned int end;
-	int rc;
-
-	/* Determine number of PCI buses */
-	if ( ! end )
-		end = PCI_BUSDEVFN ( pci_num_bus(), 0, 0 );
-
-	/* Find next PCI device, if any */
-	for ( ; busdevfn < end ; busdevfn++ ) {
-		memset ( pci, 0, sizeof ( *pci ) );
-		pci_init ( pci, busdevfn );
-		if ( ( rc = pci_read_config ( pci ) ) == 0 )
-			return busdevfn;
-	}
-
-	return -ENODEV;
-}
-
-/**
  * Find driver for PCI device
  *
  * @v pci		PCI device
@@ -314,10 +275,14 @@
  */
 static int pcibus_probe ( struct root_device *rootdev ) {
 	struct pci_device *pci = NULL;
-	int busdevfn = 0;
+	unsigned int num_bus;
+	unsigned int busdevfn;
+	uint8_t hdrtype = 0;
 	int rc;
 
-	for ( busdevfn = 0 ; 1 ; busdevfn++ ) {
+	num_bus = pci_num_bus();
+	for ( busdevfn = 0 ; busdevfn < PCI_BUSDEVFN ( num_bus, 0, 0 ) ;
+	      busdevfn++ ) {
 
 		/* Allocate struct pci_device */
 		if ( ! pci )
@@ -326,11 +291,22 @@
 			rc = -ENOMEM;
 			goto err;
 		}
+		memset ( pci, 0, sizeof ( *pci ) );
+		pci_init ( pci, busdevfn );
+			
+		/* Skip all but the first function on
+		 * non-multifunction cards
+		 */
+		if ( PCI_FUNC ( busdevfn ) == 0 ) {
+			pci_read_config_byte ( pci, PCI_HEADER_TYPE,
+					       &hdrtype );
+		} else if ( ! ( hdrtype & 0x80 ) ) {
+			continue;
+		}
 
-		/* Find next PCI device, if any */
-		busdevfn = pci_find_next ( pci, busdevfn );
-		if ( busdevfn < 0 )
-			break;
+		/* Read device configuration */
+		if ( ( rc = pci_read_config ( pci ) ) != 0 )
+			continue;
 
 		/* Look for a driver */
 		if ( ( rc = pci_find_driver ( pci ) ) != 0 ) {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pci_settings.c ipxe-1.0.1~lliurex1505/src/drivers/bus/pci_settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pci_settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/pci_settings.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,124 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <errno.h>
-#include <ipxe/pci.h>
-#include <ipxe/settings.h>
-#include <ipxe/init.h>
-
-/** @file
- *
- * PCI device settings
- *
- */
-
-/** PCI device settings scope */
-static struct settings_scope pci_settings_scope;
-
-/**
- * Check applicability of PCI device setting
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @ret applies		Setting applies within this settings block
- */
-static int pci_settings_applies ( struct settings *settings __unused,
-				  struct setting *setting ) {
-
-	return ( setting->scope == &pci_settings_scope );
-}
-
-/**
- * Fetch value of PCI device setting
- *
- * @v settings		Settings block
- * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int pci_settings_fetch ( struct settings *settings __unused,
-				struct setting *setting,
-				void *data, size_t len ) {
-	struct pci_device pci;
-	unsigned int tag_busdevfn;
-	unsigned int tag_offset;
-	unsigned int tag_len;
-	unsigned int i;
-
-	/* Extract busdevfn, offset, and length from tag */
-	tag_busdevfn = ( ( setting->tag >> 16 ) & 0xffff );
-	tag_offset = ( ( setting->tag >> 8 ) & 0xff );
-	tag_len = ( ( setting->tag >> 0 ) & 0xff );
-
-	/* Locate PCI device */
-	memset ( &pci, 0, sizeof ( pci ) );
-	pci_init ( &pci, tag_busdevfn );
-	DBG ( PCI_FMT " reading %#02x+%#x\n", PCI_ARGS ( &pci ),
-	      tag_offset, tag_len );
-
-	/* Read data one byte at a time, in reverse order (since PCI
-	 * is little-endian and iPXE settings are essentially
-	 * big-endian).
-	 */
-	tag_offset += tag_len;
-	for ( i = 0 ; ( ( i < tag_len ) && ( i < len ) ); i++ ) {
-		pci_read_config_byte ( &pci, --tag_offset, data++ );
-	}
-
-	/* Set type to ":hexraw" if not already specified */
-	if ( ! setting->type )
-		setting->type = &setting_type_hexraw;
-
-	return tag_len;
-}
-
-/** PCI device settings operations */
-static struct settings_operations pci_settings_operations = {
-	.applies = pci_settings_applies,
-	.fetch = pci_settings_fetch,
-};
-
-/** PCI device settings */
-static struct settings pci_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( pci_settings.siblings ),
-	.children = LIST_HEAD_INIT ( pci_settings.children ),
-	.op = &pci_settings_operations,
-	.default_scope = &pci_settings_scope,
-};
-
-/** Initialise PCI device settings */
-static void pci_settings_init ( void ) {
-	int rc;
-
-	if ( ( rc = register_settings ( &pci_settings, NULL, "pci" ) ) != 0 ) {
-		DBG ( "PCI could not register settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** PCI device settings initialiser */
-struct init_fn pci_settings_init_fn __init_fn ( INIT_NORMAL ) = {
-	.initialise = pci_settings_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pcivpd.c ipxe-1.0.1~lliurex1505/src/drivers/bus/pcivpd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/bus/pcivpd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/bus/pcivpd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/arbel.c ipxe-1.0.1~lliurex1505/src/drivers/infiniband/arbel.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/arbel.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/arbel.c	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -1250,14 +1249,14 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret nds		Work queue entry size
  */
 static size_t arbel_fill_ud_send_wqe ( struct ib_device *ibdev,
 				       struct ib_queue_pair *qp __unused,
-				       struct ib_address_vector *dest,
+				       struct ib_address_vector *av,
 				       struct io_buffer *iobuf,
 				       union arbel_send_wqe *wqe ) {
 	struct arbel *arbel = ib_get_drvdata ( ibdev );
@@ -1269,16 +1268,16 @@
 		     ud_address_vector.pd, ARBEL_GLOBAL_PD,
 		     ud_address_vector.port_number, ibdev->port );
 	MLX_FILL_2 ( &wqe->ud.ud, 1,
-		     ud_address_vector.rlid, dest->lid,
-		     ud_address_vector.g, dest->gid_present );
+		     ud_address_vector.rlid, av->lid,
+		     ud_address_vector.g, av->gid_present );
 	MLX_FILL_2 ( &wqe->ud.ud, 2,
-		     ud_address_vector.max_stat_rate, arbel_rate ( dest ),
+		     ud_address_vector.max_stat_rate, arbel_rate ( av ),
 		     ud_address_vector.msg, 3 );
-	MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, dest->sl );
-	gid = ( dest->gid_present ? &dest->gid : &arbel_no_gid );
+	MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
+	gid = ( av->gid_present ? &av->gid : &arbel_no_gid );
 	memcpy ( &wqe->ud.ud.u.dwords[4], gid, sizeof ( *gid ) );
-	MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, dest->qpn );
-	MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, dest->qkey );
+	MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
+	MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
 	MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
 	MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, arbel->lkey );
 	MLX_FILL_H ( &wqe->ud.data[0], 2,
@@ -1294,14 +1293,15 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
+ * @v next		Previous work queue entry's "next" field
  * @ret nds		Work queue entry size
  */
 static size_t arbel_fill_mlx_send_wqe ( struct ib_device *ibdev,
 					struct ib_queue_pair *qp,
-					struct ib_address_vector *dest,
+					struct ib_address_vector *av,
 					struct io_buffer *iobuf,
 					union arbel_send_wqe *wqe ) {
 	struct arbel *arbel = ib_get_drvdata ( ibdev );
@@ -1311,16 +1311,16 @@
 	iob_populate ( &headers, &wqe->mlx.headers, 0,
 		       sizeof ( wqe->mlx.headers ) );
 	iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
-	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
+	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
 
 	/* Construct this work queue entry */
 	MLX_FILL_5 ( &wqe->mlx.ctrl, 0,
 		     c, 1 /* generate completion */,
 		     icrc, 0 /* generate ICRC */,
-		     max_statrate, arbel_rate ( dest ),
+		     max_statrate, arbel_rate ( av ),
 		     slr, 0,
 		     v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
-	MLX_FILL_1 ( &wqe->mlx.ctrl, 1, rlid, dest->lid );
+	MLX_FILL_1 ( &wqe->mlx.ctrl, 1, rlid, av->lid );
 	MLX_FILL_1 ( &wqe->mlx.data[0], 0,
 		     byte_count, iob_len ( &headers ) );
 	MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, arbel->lkey );
@@ -1344,14 +1344,15 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
+ * @v next		Previous work queue entry's "next" field
  * @ret nds		Work queue entry size
  */
 static size_t arbel_fill_rc_send_wqe ( struct ib_device *ibdev,
 				       struct ib_queue_pair *qp __unused,
-				       struct ib_address_vector *dest __unused,
+				       struct ib_address_vector *av __unused,
 				       struct io_buffer *iobuf,
 				       union arbel_send_wqe *wqe ) {
 	struct arbel *arbel = ib_get_drvdata ( ibdev );
@@ -1372,7 +1373,7 @@
 static size_t
 ( * arbel_fill_send_wqe[] ) ( struct ib_device *ibdev,
 			      struct ib_queue_pair *qp,
-			      struct ib_address_vector *dest,
+			      struct ib_address_vector *av,
 			      struct io_buffer *iobuf,
 			      union arbel_send_wqe *wqe ) = {
 	[IB_QPT_SMI] = arbel_fill_mlx_send_wqe,
@@ -1386,13 +1387,13 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @ret rc		Return status code
  */
 static int arbel_post_send ( struct ib_device *ibdev,
 			     struct ib_queue_pair *qp,
-			     struct ib_address_vector *dest,
+			     struct ib_address_vector *av,
 			     struct io_buffer *iobuf ) {
 	struct arbel *arbel = ib_get_drvdata ( ibdev );
 	struct arbel_queue_pair *arbel_qp = ib_qp_get_drvdata ( qp );
@@ -1422,7 +1423,7 @@
 	assert ( qp->type < ( sizeof ( arbel_fill_send_wqe ) /
 			      sizeof ( arbel_fill_send_wqe[0] ) ) );
 	assert ( arbel_fill_send_wqe[qp->type] != NULL );
-	nds = arbel_fill_send_wqe[qp->type] ( ibdev, qp, dest, iobuf, wqe );
+	nds = arbel_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
 	DBGCP ( arbel, "Arbel %p QPN %#lx posting send WQE %#lx:\n",
 		arbel, qp->qpn, ( wq->next_idx & wqe_idx_mask ) );
 	DBGCP_HDA ( arbel, virt_to_phys ( wqe ), wqe, sizeof ( *wqe ) );
@@ -1525,10 +1526,9 @@
 	struct arbel_recv_work_queue *arbel_recv_wq;
 	struct arbelprm_recv_wqe *recv_wqe;
 	struct io_buffer *iobuf;
-	struct ib_address_vector recv_dest;
-	struct ib_address_vector recv_source;
+	struct ib_address_vector recv_av;
 	struct ib_global_route_header *grh;
-	struct ib_address_vector *source;
+	struct ib_address_vector *av;
 	unsigned int opcode;
 	unsigned long qpn;
 	int is_send;
@@ -1609,8 +1609,6 @@
 			     l_key, ARBEL_INVALID_LKEY );
 		assert ( len <= iob_tailroom ( iobuf ) );
 		iob_put ( iobuf, len );
-		memset ( &recv_dest, 0, sizeof ( recv_dest ) );
-		recv_dest.qpn = qpn;
 		switch ( qp->type ) {
 		case IB_QPT_SMI:
 		case IB_QPT_GSI:
@@ -1619,27 +1617,23 @@
 			grh = iobuf->data;
 			iob_pull ( iobuf, sizeof ( *grh ) );
 			/* Construct address vector */
-			source = &recv_source;
-			memset ( source, 0, sizeof ( *source ) );
-			source->qpn = MLX_GET ( &cqe->normal, rqpn );
-			source->lid = MLX_GET ( &cqe->normal, rlid );
-			source->sl = MLX_GET ( &cqe->normal, sl );
-			recv_dest.gid_present = source->gid_present =
-				MLX_GET ( &cqe->normal, g );
-			memcpy ( &recv_dest.gid, &grh->dgid,
-				 sizeof ( recv_dest.gid ) );
-			memcpy ( &source->gid, &grh->sgid,
-				 sizeof ( source->gid ) );
+			av = &recv_av;
+			memset ( av, 0, sizeof ( *av ) );
+			av->qpn = MLX_GET ( &cqe->normal, rqpn );
+			av->lid = MLX_GET ( &cqe->normal, rlid );
+			av->sl = MLX_GET ( &cqe->normal, sl );
+			av->gid_present = MLX_GET ( &cqe->normal, g );
+			memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
 			break;
 		case IB_QPT_RC:
-			source = &qp->av;
+			av = &qp->av;
 			break;
 		default:
 			assert ( 0 );
 			return -EINVAL;
 		}
 		/* Hand off to completion handler */
-		ib_complete_recv ( ibdev, qp, &recv_dest, source, iobuf, rc );
+		ib_complete_recv ( ibdev, qp, av, iobuf, rc );
 	}
 
 	return rc;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/hermon.c ipxe-1.0.1~lliurex1505/src/drivers/infiniband/hermon.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/hermon.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/hermon.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -42,8 +41,6 @@
 #include <ipxe/fcoe.h>
 #include <ipxe/vlan.h>
 #include <ipxe/bofm.h>
-#include <ipxe/nvsvpd.h>
-#include <ipxe/nvo.h>
 #include "hermon.h"
 
 /**
@@ -1366,7 +1363,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret opcode		Control opcode
@@ -1374,7 +1371,7 @@
 static __attribute__ (( unused )) unsigned int
 hermon_fill_nop_send_wqe ( struct ib_device *ibdev __unused,
 			   struct ib_queue_pair *qp __unused,
-			   struct ib_address_vector *dest __unused,
+			   struct ib_address_vector *av __unused,
 			   struct io_buffer *iobuf __unused,
 			   union hermon_send_wqe *wqe ) {
 
@@ -1388,7 +1385,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret opcode		Control opcode
@@ -1396,7 +1393,7 @@
 static unsigned int
 hermon_fill_ud_send_wqe ( struct ib_device *ibdev,
 			  struct ib_queue_pair *qp __unused,
-			  struct ib_address_vector *dest,
+			  struct ib_address_vector *av,
 			  struct io_buffer *iobuf,
 			  union hermon_send_wqe *wqe ) {
 	struct hermon *hermon = ib_get_drvdata ( ibdev );
@@ -1408,14 +1405,14 @@
 		     ud_address_vector.pd, HERMON_GLOBAL_PD,
 		     ud_address_vector.port_number, ibdev->port );
 	MLX_FILL_2 ( &wqe->ud.ud, 1,
-		     ud_address_vector.rlid, dest->lid,
-		     ud_address_vector.g, dest->gid_present );
+		     ud_address_vector.rlid, av->lid,
+		     ud_address_vector.g, av->gid_present );
 	MLX_FILL_1 ( &wqe->ud.ud, 2,
-		     ud_address_vector.max_stat_rate, hermon_rate ( dest ) );
-	MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, dest->sl );
-	memcpy ( &wqe->ud.ud.u.dwords[4], &dest->gid, sizeof ( dest->gid ) );
-	MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, dest->qpn );
-	MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, dest->qkey );
+		     ud_address_vector.max_stat_rate, hermon_rate ( av ) );
+	MLX_FILL_1 ( &wqe->ud.ud, 3, ud_address_vector.sl, av->sl );
+	memcpy ( &wqe->ud.ud.u.dwords[4], &av->gid, sizeof ( av->gid ) );
+	MLX_FILL_1 ( &wqe->ud.ud, 8, destination_qp, av->qpn );
+	MLX_FILL_1 ( &wqe->ud.ud, 9, q_key, av->qkey );
 	MLX_FILL_1 ( &wqe->ud.data[0], 0, byte_count, iob_len ( iobuf ) );
 	MLX_FILL_1 ( &wqe->ud.data[0], 1, l_key, hermon->lkey );
 	MLX_FILL_H ( &wqe->ud.data[0], 2,
@@ -1430,7 +1427,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret opcode		Control opcode
@@ -1438,7 +1435,7 @@
 static unsigned int
 hermon_fill_mlx_send_wqe ( struct ib_device *ibdev,
 			   struct ib_queue_pair *qp,
-			   struct ib_address_vector *dest,
+			   struct ib_address_vector *av,
 			   struct io_buffer *iobuf,
 			   union hermon_send_wqe *wqe ) {
 	struct hermon *hermon = ib_get_drvdata ( ibdev );
@@ -1448,7 +1445,7 @@
 	iob_populate ( &headers, &wqe->mlx.headers, 0,
 		       sizeof ( wqe->mlx.headers ) );
 	iob_reserve ( &headers, sizeof ( wqe->mlx.headers ) );
-	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
+	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
 
 	/* Fill work queue entry */
 	MLX_FILL_1 ( &wqe->mlx.ctrl, 1, ds,
@@ -1456,10 +1453,10 @@
 	MLX_FILL_5 ( &wqe->mlx.ctrl, 2,
 		     c, 0x03 /* generate completion */,
 		     icrc, 0 /* generate ICRC */,
-		     max_statrate, hermon_rate ( dest ),
+		     max_statrate, hermon_rate ( av ),
 		     slr, 0,
 		     v15, ( ( qp->ext_qpn == IB_QPN_SMI ) ? 1 : 0 ) );
-	MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, dest->lid );
+	MLX_FILL_1 ( &wqe->mlx.ctrl, 3, rlid, av->lid );
 	MLX_FILL_1 ( &wqe->mlx.data[0], 0,
 		     byte_count, iob_len ( &headers ) );
 	MLX_FILL_1 ( &wqe->mlx.data[0], 1, l_key, hermon->lkey );
@@ -1482,7 +1479,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret opcode		Control opcode
@@ -1490,7 +1487,7 @@
 static unsigned int
 hermon_fill_rc_send_wqe ( struct ib_device *ibdev,
 			  struct ib_queue_pair *qp __unused,
-			  struct ib_address_vector *dest __unused,
+			  struct ib_address_vector *av __unused,
 			  struct io_buffer *iobuf,
 			  union hermon_send_wqe *wqe ) {
 	struct hermon *hermon = ib_get_drvdata ( ibdev );
@@ -1512,7 +1509,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v wqe		Send work queue entry
  * @ret opcode		Control opcode
@@ -1520,7 +1517,7 @@
 static unsigned int
 hermon_fill_eth_send_wqe ( struct ib_device *ibdev,
 			   struct ib_queue_pair *qp __unused,
-			   struct ib_address_vector *dest __unused,
+			   struct ib_address_vector *av __unused,
 			   struct io_buffer *iobuf,
 			   union hermon_send_wqe *wqe ) {
 	struct hermon *hermon = ib_get_drvdata ( ibdev );
@@ -1545,7 +1542,7 @@
 static unsigned int
 ( * hermon_fill_send_wqe[] ) ( struct ib_device *ibdev,
 			       struct ib_queue_pair *qp,
-			       struct ib_address_vector *dest,
+			       struct ib_address_vector *av,
 			       struct io_buffer *iobuf,
 			       union hermon_send_wqe *wqe ) = {
 	[IB_QPT_SMI] = hermon_fill_mlx_send_wqe,
@@ -1560,13 +1557,13 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @ret rc		Return status code
  */
 static int hermon_post_send ( struct ib_device *ibdev,
 			      struct ib_queue_pair *qp,
-			      struct ib_address_vector *dest,
+			      struct ib_address_vector *av,
 			      struct io_buffer *iobuf ) {
 	struct hermon *hermon = ib_get_drvdata ( ibdev );
 	struct hermon_queue_pair *hermon_qp = ib_qp_get_drvdata ( qp );
@@ -1597,7 +1594,7 @@
 	assert ( qp->type < ( sizeof ( hermon_fill_send_wqe ) /
 			      sizeof ( hermon_fill_send_wqe[0] ) ) );
 	assert ( hermon_fill_send_wqe[qp->type] != NULL );
-	opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, dest, iobuf, wqe );
+	opcode = hermon_fill_send_wqe[qp->type] ( ibdev, qp, av, iobuf, wqe );
 	barrier();
 	MLX_FILL_2 ( &wqe->ctrl, 0,
 		     opcode, opcode,
@@ -1679,10 +1676,9 @@
 	struct ib_work_queue *wq;
 	struct ib_queue_pair *qp;
 	struct io_buffer *iobuf;
-	struct ib_address_vector recv_dest;
-	struct ib_address_vector recv_source;
+	struct ib_address_vector recv_av;
 	struct ib_global_route_header *grh;
-	struct ib_address_vector *source;
+	struct ib_address_vector *av;
 	unsigned int opcode;
 	unsigned long qpn;
 	int is_send;
@@ -1740,9 +1736,7 @@
 		len = MLX_GET ( &cqe->normal, byte_cnt );
 		assert ( len <= iob_tailroom ( iobuf ) );
 		iob_put ( iobuf, len );
-		memset ( &recv_dest, 0, sizeof ( recv_dest ) );
-		recv_dest.qpn = qpn;
-		memset ( &recv_source, 0, sizeof ( recv_source ) );
+		memset ( &recv_av, 0, sizeof ( recv_av ) );
 		switch ( qp->type ) {
 		case IB_QPT_SMI:
 		case IB_QPT_GSI:
@@ -1751,32 +1745,28 @@
 			grh = iobuf->data;
 			iob_pull ( iobuf, sizeof ( *grh ) );
 			/* Construct address vector */
-			source = &recv_source;
-			source->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
-			source->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
-			source->sl = MLX_GET ( &cqe->normal, sl );
-			recv_dest.gid_present = source->gid_present =
-				MLX_GET ( &cqe->normal, g );
-			memcpy ( &recv_dest.gid, &grh->dgid,
-				 sizeof ( recv_dest.gid ) );
-			memcpy ( &source->gid, &grh->sgid,
-				 sizeof ( source->gid ) );
+			av = &recv_av;
+			av->qpn = MLX_GET ( &cqe->normal, srq_rqpn );
+			av->lid = MLX_GET ( &cqe->normal, slid_smac47_32 );
+			av->sl = MLX_GET ( &cqe->normal, sl );
+			av->gid_present = MLX_GET ( &cqe->normal, g );
+			memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
 			break;
 		case IB_QPT_RC:
-			source = &qp->av;
+			av = &qp->av;
 			break;
 		case IB_QPT_ETH:
 			/* Construct address vector */
-			source = &recv_source;
-			source->vlan_present = MLX_GET ( &cqe->normal, vlan );
-			source->vlan = MLX_GET ( &cqe->normal, vid );
+			av = &recv_av;
+			av->vlan_present = MLX_GET ( &cqe->normal, vlan );
+			av->vlan = MLX_GET ( &cqe->normal, vid );
 			break;
 		default:
 			assert ( 0 );
 			return -EINVAL;
 		}
 		/* Hand off to completion handler */
-		ib_complete_recv ( ibdev, qp, &recv_dest, source, iobuf, rc );
+		ib_complete_recv ( ibdev, qp, av, iobuf, rc );
 	}
 
 	return rc;
@@ -3137,11 +3127,6 @@
 	return 0;
 }
 
-/** Hermon Ethernet queue pair operations */
-static struct ib_queue_pair_operations hermon_eth_qp_op = {
-	.alloc_iob = alloc_iob,
-};
-
 /**
  * Handle Hermon Ethernet device send completion
  *
@@ -3163,22 +3148,20 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector, or NULL
- * @v source		Source address vector, or NULL
+ * @v av		Address vector, or NULL
  * @v iobuf		I/O buffer
  * @v rc		Completion status code
  */
 static void hermon_eth_complete_recv ( struct ib_device *ibdev __unused,
 				       struct ib_queue_pair *qp,
-				       struct ib_address_vector *dest __unused,
-				       struct ib_address_vector *source,
+				       struct ib_address_vector *av,
 				       struct io_buffer *iobuf, int rc ) {
 	struct net_device *netdev = ib_qp_get_ownerdata ( qp );
 	struct net_device *vlan;
 
 	/* Find VLAN device, if applicable */
-	if ( source->vlan_present ) {
-		if ( ( vlan = vlan_find ( netdev, source->vlan ) ) != NULL ) {
+	if ( av->vlan_present ) {
+		if ( ( vlan = vlan_find ( netdev, av->vlan ) ) != NULL ) {
 			netdev = vlan;
 		} else if ( rc == 0 ) {
 			rc = -ENODEV;
@@ -3241,8 +3224,7 @@
 	/* Allocate queue pair */
 	port->eth_qp = ib_create_qp ( ibdev, IB_QPT_ETH,
 				      HERMON_ETH_NUM_SEND_WQES, port->eth_cq,
-				      HERMON_ETH_NUM_RECV_WQES, port->eth_cq,
-				      &hermon_eth_qp_op );
+				      HERMON_ETH_NUM_RECV_WQES, port->eth_cq );
 	if ( ! port->eth_qp ) {
 		DBGC ( hermon, "Hermon %p port %d could not create queue "
 		       "pair\n", hermon, ibdev->port );
@@ -3385,7 +3367,7 @@
 					    &query_port ) ) != 0 ) {
 		DBGC ( hermon, "Hermon %p port %d could not query port: %s\n",
 		       hermon, ibdev->port, strerror ( rc ) );
-		goto err_query_port;
+		return rc;
 	}
 	mac.dwords[0] = htonl ( MLX_GET ( &query_port, mac_47_32 ) );
 	mac.dwords[1] = htonl ( MLX_GET ( &query_port, mac_31_0 ) );
@@ -3396,26 +3378,10 @@
 	if ( ( rc = register_netdev ( netdev ) ) != 0 ) {
 		DBGC ( hermon, "Hermon %p port %d could not register network "
 		       "device: %s\n", hermon, ibdev->port, strerror ( rc ) );
-		goto err_register_netdev;
-	}
-
-	/* Register non-volatile options */
-	if ( ( rc = register_nvo ( &port->nvo,
-				   netdev_settings ( netdev ) ) ) != 0 ) {
-		DBGC ( hermon, "Hermon %p port %d could not register non-"
-		       "volatile options: %s\n",
-		       hermon, ibdev->port, strerror ( rc ) );
-		goto err_register_nvo;
+		return rc;
 	}
 
 	return 0;
-
-	unregister_nvo ( &port->nvo );
- err_register_nvo:
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_query_port:
-	return rc;
 }
 
 /**
@@ -3447,7 +3413,6 @@
 				       struct hermon_port *port ) {
 	struct net_device *netdev = port->netdev;
 
-	unregister_nvo ( &port->nvo );
 	unregister_netdev ( netdev );
 }
 
@@ -3841,15 +3806,6 @@
 			goto err_set_port_type;
 	}
 
-	/* Initialise non-volatile storage */
-	nvs_vpd_init ( &hermon->nvsvpd, pci );
-	for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
-		port = &hermon->port[i];
-		nvs_vpd_nvo_init ( &hermon->nvsvpd,
-				   HERMON_VPD_FIELD ( port->ibdev->port ),
-				   &port->nvo, NULL );
-	}
-
 	/* Register devices */
 	for ( i = 0 ; i < hermon->cap.num_ports ; i++ ) {
 		port = &hermon->port[i];
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/hermon.h ipxe-1.0.1~lliurex1505/src/drivers/infiniband/hermon.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/hermon.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/hermon.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,6 @@
 #include <ipxe/uaccess.h>
 #include <ipxe/ib_packet.h>
 #include <ipxe/bofm.h>
-#include <ipxe/nvsvpd.h>
-#include <ipxe/nvo.h>
 #include "mlx_bitops.h"
 #include "MT25408_PRM.h"
 
@@ -137,9 +135,6 @@
 #define HERMON_MOD_STAT_CFG_SET		0x01
 #define HERMON_MOD_STAT_CFG_QUERY	0x03
 
-#define HERMON_VPD_FIELD( port ) \
-	PCI_VPD_FIELD ( PCI_VPD_TAG_RW, 'V', ( '5' + (port) - 1 ) )
-
 /*
  * Datatypes that seem to be missing from the autogenerated documentation
  *
@@ -830,8 +825,6 @@
 	struct ib_queue_pair *eth_qp;
 	/** Port type */
 	struct hermon_port_type *type;
-	/** Non-volatile option storage */
-	struct nvo_block nvo;
 };
 
 /** A Hermon device */
@@ -898,9 +891,6 @@
 	/** QPN base */
 	unsigned long qpn_base;
 
-	/** Non-volatile storage in PCI VPD */
-	struct nvs_vpd_device nvsvpd;
-
 	/** Ports */
 	struct hermon_port port[HERMON_MAX_PORTS];
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda.c ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2430 @@
+/*
+ * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <errno.h>
+#include <unistd.h>
+#include <assert.h>
+#include <ipxe/io.h>
+#include <ipxe/pci.h>
+#include <ipxe/infiniband.h>
+#include <ipxe/i2c.h>
+#include <ipxe/bitbash.h>
+#include <ipxe/malloc.h>
+#include <ipxe/iobuf.h>
+#include "linda.h"
+
+/**
+ * @file
+ *
+ * QLogic Linda Infiniband HCA
+ *
+ */
+
+/** A Linda send work queue */
+struct linda_send_work_queue {
+	/** Send buffer usage */
+	uint8_t *send_buf;
+	/** Producer index */
+	unsigned int prod;
+	/** Consumer index */
+	unsigned int cons;
+};
+
+/** A Linda receive work queue */
+struct linda_recv_work_queue {
+	/** Receive header ring */
+	void *header;
+	/** Receive header producer offset (written by hardware) */
+	struct QIB_7220_scalar header_prod;
+	/** Receive header consumer offset */
+	unsigned int header_cons;
+	/** Offset within register space of the eager array */
+	unsigned long eager_array;
+	/** Number of entries in eager array */
+	unsigned int eager_entries;
+	/** Eager array producer index */
+	unsigned int eager_prod;
+	/** Eager array consumer index */
+	unsigned int eager_cons;
+};
+
+/** A Linda HCA */
+struct linda {
+	/** Registers */
+	void *regs;
+
+	/** In-use contexts */
+	uint8_t used_ctx[LINDA_NUM_CONTEXTS];
+	/** Send work queues */
+	struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
+	/** Receive work queues */
+	struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
+
+	/** Offset within register space of the first send buffer */
+	unsigned long send_buffer_base;
+	/** Send buffer availability (reported by hardware) */
+	struct QIB_7220_SendBufAvail *sendbufavail;
+	/** Send buffer availability (maintained by software) */
+	uint8_t send_buf[LINDA_MAX_SEND_BUFS];
+	/** Send buffer availability producer counter */
+	unsigned int send_buf_prod;
+	/** Send buffer availability consumer counter */
+	unsigned int send_buf_cons;
+	/** Number of reserved send buffers (across all QPs) */
+	unsigned int reserved_send_bufs;
+
+	/** I2C bit-bashing interface */
+	struct i2c_bit_basher i2c;
+	/** I2C serial EEPROM */
+	struct i2c_device eeprom;
+};
+
+/***************************************************************************
+ *
+ * Linda register access
+ *
+ ***************************************************************************
+ *
+ * This card requires atomic 64-bit accesses.  Strange things happen
+ * if you try to use 32-bit accesses; sometimes they work, sometimes
+ * they don't, sometimes you get random data.
+ *
+ * These accessors use the "movq" MMX instruction, and so won't work
+ * on really old Pentiums (which won't have PCIe anyway, so this is
+ * something of a moot point).
+ */
+
+/**
+ * Read Linda qword register
+ *
+ * @v linda		Linda device
+ * @v dwords		Register buffer to read into
+ * @v offset		Register offset
+ */
+static void linda_readq ( struct linda *linda, uint32_t *dwords,
+			  unsigned long offset ) {
+	void *addr = ( linda->regs + offset );
+
+	__asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
+			       "movq %%mm0, (%0)\n\t"
+			       : : "r" ( dwords ), "r" ( addr ) : "memory" );
+
+	DBGIO ( "[%08lx] => %08x%08x\n",
+		virt_to_phys ( addr ), dwords[1], dwords[0] );
+}
+#define linda_readq( _linda, _ptr, _offset ) \
+	linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
+#define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
+	linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
+#define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
+	linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
+
+/**
+ * Write Linda qword register
+ *
+ * @v linda		Linda device
+ * @v dwords		Register buffer to write
+ * @v offset		Register offset
+ */
+static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
+			   unsigned long offset ) {
+	void *addr = ( linda->regs + offset );
+
+	DBGIO ( "[%08lx] <= %08x%08x\n",
+		virt_to_phys ( addr ), dwords[1], dwords[0] );
+
+	__asm__ __volatile__ ( "movq (%0), %%mm0\n\t"
+			       "movq %%mm0, (%1)\n\t"
+			       : : "r" ( dwords ), "r" ( addr ) : "memory" );
+}
+#define linda_writeq( _linda, _ptr, _offset ) \
+	linda_writeq ( (_linda), (_ptr)->u.dwords, (_offset) )
+#define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
+	linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
+#define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
+	linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
+
+/**
+ * Write Linda dword register
+ *
+ * @v linda		Linda device
+ * @v dword		Value to write
+ * @v offset		Register offset
+ */
+static void linda_writel ( struct linda *linda, uint32_t dword,
+			   unsigned long offset ) {
+	writel ( dword, ( linda->regs + offset ) );
+}
+
+/***************************************************************************
+ *
+ * Link state management
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Textual representation of link state
+ *
+ * @v link_state	Link state
+ * @ret link_text	Link state text
+ */
+static const char * linda_link_state_text ( unsigned int link_state ) {
+	switch ( link_state ) {
+	case LINDA_LINK_STATE_DOWN:	return "DOWN";
+	case LINDA_LINK_STATE_INIT:	return "INIT";
+	case LINDA_LINK_STATE_ARM:	return "ARM";
+	case LINDA_LINK_STATE_ACTIVE:	return "ACTIVE";
+	case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
+	default:			return "UNKNOWN";
+	}
+}
+
+/**
+ * Handle link state change
+ *
+ * @v linda		Linda device
+ */
+static void linda_link_state_changed ( struct ib_device *ibdev ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct QIB_7220_IBCStatus ibcstatus;
+	struct QIB_7220_EXTCtrl extctrl;
+	unsigned int link_state;
+	unsigned int link_width;
+	unsigned int link_speed;
+
+	/* Read link state */
+	linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
+	link_state = BIT_GET ( &ibcstatus, LinkState );
+	link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
+	link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
+	DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
+	       linda_link_state_text ( link_state ),
+	       ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
+
+	/* Set LEDs according to link state */
+	linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
+	BIT_SET ( &extctrl, LEDPriPortGreenOn,
+		  ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
+	BIT_SET ( &extctrl, LEDPriPortYellowOn,
+		  ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
+	linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
+
+	/* Notify Infiniband core of link state change */
+	ibdev->port_state = ( link_state + 1 );
+	ibdev->link_width_active =
+		( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
+	ibdev->link_speed_active =
+		( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
+	ib_link_state_changed ( ibdev );
+}
+
+/**
+ * Wait for link state change to take effect
+ *
+ * @v linda		Linda device
+ * @v new_link_state	Expected link state
+ * @ret rc		Return status code
+ */
+static int linda_link_state_check ( struct linda *linda,
+				    unsigned int new_link_state ) {
+	struct QIB_7220_IBCStatus ibcstatus;
+	unsigned int link_state;
+	unsigned int i;
+
+	for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
+		linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
+		link_state = BIT_GET ( &ibcstatus, LinkState );
+		if ( link_state == new_link_state )
+			return 0;
+		udelay ( 1 );
+	}
+
+	DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
+	       linda, linda_link_state_text ( link_state ) );
+	return -ETIMEDOUT;
+}
+
+/**
+ * Set port information
+ *
+ * @v ibdev		Infiniband device
+ * @v mad		Set port information MAD
+ */
+static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
+	struct QIB_7220_IBCCtrl ibcctrl;
+	unsigned int port_state;
+	unsigned int link_state;
+
+	/* Set new link state */
+	port_state = ( port_info->link_speed_supported__port_state & 0xf );
+	if ( port_state ) {
+		link_state = ( port_state - 1 );
+		DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
+		       linda_link_state_text ( link_state ), link_state );
+		linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
+		BIT_SET ( &ibcctrl, LinkCmd, link_state );
+		linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
+
+		/* Wait for link state change to take effect.  Ignore
+		 * errors; the current link state will be returned via
+		 * the GetResponse MAD.
+		 */
+		linda_link_state_check ( linda, link_state );
+	}
+
+	/* Detect and report link state change */
+	linda_link_state_changed ( ibdev );
+
+	return 0;
+}
+
+/**
+ * Set partition key table
+ *
+ * @v ibdev		Infiniband device
+ * @v mad		Set partition key table MAD
+ */
+static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
+				  union ib_mad *mad __unused ) {
+	/* Nothing to do */
+	return 0;
+}
+
+/***************************************************************************
+ *
+ * Context allocation
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Map context number to QPN
+ *
+ * @v ctx		Context index
+ * @ret qpn		Queue pair number
+ */
+static int linda_ctx_to_qpn ( unsigned int ctx ) {
+	/* This mapping is fixed by hardware */
+	return ( ctx * 2 );
+}
+
+/**
+ * Map QPN to context number
+ *
+ * @v qpn		Queue pair number
+ * @ret ctx		Context index
+ */
+static int linda_qpn_to_ctx ( unsigned int qpn ) {
+	/* This mapping is fixed by hardware */
+	return ( qpn / 2 );
+}
+
+/**
+ * Allocate a context
+ *
+ * @v linda		Linda device
+ * @ret ctx		Context index, or negative error
+ */
+static int linda_alloc_ctx ( struct linda *linda ) {
+	unsigned int ctx;
+
+	for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
+
+		if ( ! linda->used_ctx[ctx] ) {
+			linda->used_ctx[ctx ] = 1;
+			DBGC2 ( linda, "Linda %p CTX %d allocated\n",
+				linda, ctx );
+			return ctx;
+		}
+	}
+
+	DBGC ( linda, "Linda %p out of available contexts\n", linda );
+	return -ENOENT;
+}
+
+/**
+ * Free a context
+ *
+ * @v linda		Linda device
+ * @v ctx		Context index
+ */
+static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
+
+	linda->used_ctx[ctx] = 0;
+	DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
+}
+
+/***************************************************************************
+ *
+ * Send datapath
+ *
+ ***************************************************************************
+ */
+
+/** Send buffer toggle bit
+ *
+ * We encode send buffers as 7 bits of send buffer index plus a single
+ * bit which should match the "check" bit in the SendBufAvail array.
+ */
+#define LINDA_SEND_BUF_TOGGLE 0x80
+
+/**
+ * Allocate a send buffer
+ *
+ * @v linda		Linda device
+ * @ret send_buf	Send buffer
+ *
+ * You must guarantee that a send buffer is available.  This is done
+ * by refusing to allocate more TX WQEs in total than the number of
+ * available send buffers.
+ */
+static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
+	unsigned int send_buf;
+
+	send_buf = linda->send_buf[linda->send_buf_cons];
+	send_buf ^= LINDA_SEND_BUF_TOGGLE;
+	linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
+				 LINDA_MAX_SEND_BUFS );
+	return send_buf;
+}
+
+/**
+ * Free a send buffer
+ *
+ * @v linda		Linda device
+ * @v send_buf		Send buffer
+ */
+static void linda_free_send_buf ( struct linda *linda,
+				  unsigned int send_buf ) {
+	linda->send_buf[linda->send_buf_prod] = send_buf;
+	linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
+				 LINDA_MAX_SEND_BUFS );
+}
+
+/**
+ * Check to see if send buffer is in use
+ *
+ * @v linda		Linda device
+ * @v send_buf		Send buffer
+ * @ret in_use		Send buffer is in use
+ */
+static int linda_send_buf_in_use ( struct linda *linda,
+				   unsigned int send_buf ) {
+	unsigned int send_idx;
+	unsigned int send_check;
+	unsigned int inusecheck;
+	unsigned int inuse;
+	unsigned int check;
+
+	send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
+	send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
+	inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
+	inuse = ( !! ( inusecheck & 0x02 ) );
+	check = ( !! ( inusecheck & 0x01 ) );
+	return ( inuse || ( check != send_check ) );
+}
+
+/**
+ * Calculate starting offset for send buffer
+ *
+ * @v linda		Linda device
+ * @v send_buf		Send buffer
+ * @ret offset		Starting offset
+ */
+static unsigned long linda_send_buffer_offset ( struct linda *linda,
+						unsigned int send_buf ) {
+	return ( linda->send_buffer_base +
+		 ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
+		   LINDA_SEND_BUF_SIZE ) );
+}
+
+/**
+ * Create send work queue
+ *
+ * @v linda		Linda device
+ * @v qp		Queue pair
+ */
+static int linda_create_send_wq ( struct linda *linda,
+				  struct ib_queue_pair *qp ) {
+	struct ib_work_queue *wq = &qp->send;
+	struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	int rc;
+
+	/* Reserve send buffers */
+	if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
+	     LINDA_MAX_SEND_BUFS ) {
+		DBGC ( linda, "Linda %p out of send buffers (have %d, used "
+		       "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
+		       linda->reserved_send_bufs, qp->send.num_wqes );
+		rc = -ENOBUFS;
+		goto err_reserve_bufs;
+	}
+	linda->reserved_send_bufs += qp->send.num_wqes;
+
+	/* Reset work queue */
+	linda_wq->prod = 0;
+	linda_wq->cons = 0;
+
+	/* Allocate space for send buffer uasge list */
+	linda_wq->send_buf = zalloc ( qp->send.num_wqes *
+				      sizeof ( linda_wq->send_buf[0] ) );
+	if ( ! linda_wq->send_buf ) {
+		rc = -ENOBUFS;
+		goto err_alloc_send_buf;
+	}
+
+	return 0;
+
+	free ( linda_wq->send_buf );
+ err_alloc_send_buf:
+	linda->reserved_send_bufs -= qp->send.num_wqes;
+ err_reserve_bufs:
+	return rc;
+}
+
+/**
+ * Destroy send work queue
+ *
+ * @v linda		Linda device
+ * @v qp		Queue pair
+ */
+static void linda_destroy_send_wq ( struct linda *linda,
+				    struct ib_queue_pair *qp ) {
+	struct ib_work_queue *wq = &qp->send;
+	struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+
+	free ( linda_wq->send_buf );
+	linda->reserved_send_bufs -= qp->send.num_wqes;
+}
+
+/**
+ * Initialise send datapath
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_init_send ( struct linda *linda ) {
+	struct QIB_7220_SendBufBase sendbufbase;
+	struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
+	struct QIB_7220_SendCtrl sendctrl;
+	unsigned int i;
+	int rc;
+
+	/* Retrieve SendBufBase */
+	linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
+	linda->send_buffer_base = BIT_GET ( &sendbufbase,
+					    BaseAddr_SmallPIO );
+	DBGC ( linda, "Linda %p send buffers at %lx\n",
+	       linda, linda->send_buffer_base );
+
+	/* Initialise the send_buf[] array */
+	for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
+		linda->send_buf[i] = i;
+
+	/* Allocate space for the SendBufAvail array */
+	linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
+					   LINDA_SENDBUFAVAIL_ALIGN );
+	if ( ! linda->sendbufavail ) {
+		rc = -ENOMEM;
+		goto err_alloc_sendbufavail;
+	}
+	memset ( linda->sendbufavail, 0, sizeof ( linda->sendbufavail ) );
+
+	/* Program SendBufAvailAddr into the hardware */
+	memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
+	BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
+		     ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
+	linda_writeq ( linda, &sendbufavailaddr,
+		       QIB_7220_SendBufAvailAddr_offset );
+
+	/* Enable sending and DMA of SendBufAvail */
+	memset ( &sendctrl, 0, sizeof ( sendctrl ) );
+	BIT_FILL_2 ( &sendctrl,
+		     SendBufAvailUpd, 1,
+		     SPioEnable, 1 );
+	linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
+
+	return 0;
+
+	free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
+ err_alloc_sendbufavail:
+	return rc;
+}
+
+/**
+ * Shut down send datapath
+ *
+ * @v linda		Linda device
+ */
+static void linda_fini_send ( struct linda *linda ) {
+	struct QIB_7220_SendCtrl sendctrl;
+
+	/* Disable sending and DMA of SendBufAvail */
+	memset ( &sendctrl, 0, sizeof ( sendctrl ) );
+	linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
+	mb();
+
+	/* Ensure hardware has seen this disable */
+	linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
+
+	free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
+}
+
+/***************************************************************************
+ *
+ * Receive datapath
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Create receive work queue
+ *
+ * @v linda		Linda device
+ * @v qp		Queue pair
+ * @ret rc		Return status code
+ */
+static int linda_create_recv_wq ( struct linda *linda,
+				  struct ib_queue_pair *qp ) {
+	struct ib_work_queue *wq = &qp->recv;
+	struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
+	struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
+	struct QIB_7220_RcvHdrHead0 rcvhdrhead;
+	struct QIB_7220_scalar rcvegrindexhead;
+	struct QIB_7220_RcvCtrl rcvctrl;
+	unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
+	int rc;
+
+	/* Reset context information */
+	memset ( &linda_wq->header_prod, 0,
+		 sizeof ( linda_wq->header_prod ) );
+	linda_wq->header_cons = 0;
+	linda_wq->eager_prod = 0;
+	linda_wq->eager_cons = 0;
+
+	/* Allocate receive header buffer */
+	linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
+					LINDA_RECV_HEADERS_ALIGN );
+	if ( ! linda_wq->header ) {
+		rc = -ENOMEM;
+		goto err_alloc_header;
+	}
+
+	/* Enable context in hardware */
+	memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
+	BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
+		     ( virt_to_bus ( linda_wq->header ) >> 2 ) );
+	linda_writeq_array8b ( linda, &rcvhdraddr,
+			       QIB_7220_RcvHdrAddr0_offset, ctx );
+	memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
+	BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
+		     ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
+	linda_writeq_array8b ( linda, &rcvhdrtailaddr,
+			       QIB_7220_RcvHdrTailAddr0_offset, ctx );
+	memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
+	BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
+	linda_writeq_array64k ( linda, &rcvhdrhead,
+				QIB_7220_RcvHdrHead0_offset, ctx );
+	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
+	BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
+	linda_writeq_array64k ( linda, &rcvegrindexhead,
+				QIB_7220_RcvEgrIndexHead0_offset, ctx );
+	linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+	BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
+	BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
+	linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+
+	DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
+	       linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
+	       ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
+	       virt_to_bus ( &linda_wq->header_prod ) );
+	return 0;
+
+	free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
+ err_alloc_header:
+	return rc;
+}
+
+/**
+ * Destroy receive work queue
+ *
+ * @v linda		Linda device
+ * @v qp		Queue pair
+ */
+static void linda_destroy_recv_wq ( struct linda *linda,
+				    struct ib_queue_pair *qp ) {
+	struct ib_work_queue *wq = &qp->recv;
+	struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_RcvCtrl rcvctrl;
+	unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
+
+	/* Disable context in hardware */
+	linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+	BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
+	BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
+	linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+
+	/* Make sure the hardware has seen that the context is disabled */
+	linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+	mb();
+
+	/* Free headers ring */
+	free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
+
+	/* Free context */
+	linda_free_ctx ( linda, ctx );
+}
+
+/**
+ * Initialise receive datapath
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_init_recv ( struct linda *linda ) {
+	struct QIB_7220_RcvCtrl rcvctrl;
+	struct QIB_7220_scalar rcvegrbase;
+	struct QIB_7220_scalar rcvhdrentsize;
+	struct QIB_7220_scalar rcvhdrcnt;
+	struct QIB_7220_RcvBTHQP rcvbthqp;
+	unsigned int portcfg;
+	unsigned long egrbase;
+	unsigned int eager_array_size_0;
+	unsigned int eager_array_size_other;
+	unsigned int ctx;
+
+	/* Select configuration based on number of contexts */
+	switch ( LINDA_NUM_CONTEXTS ) {
+	case 5:
+		portcfg = LINDA_PORTCFG_5CTX;
+		eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
+		eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
+		break;
+	case 9:
+		portcfg = LINDA_PORTCFG_9CTX;
+		eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
+		eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
+		break;
+	case 17:
+		portcfg = LINDA_PORTCFG_17CTX;
+		eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
+		eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
+		break;
+	default:
+		linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
+		return -EINVAL;
+	}
+
+	/* Configure number of contexts */
+	memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
+	BIT_FILL_3 ( &rcvctrl,
+		     TailUpd, 1,
+		     PortCfg, portcfg,
+		     RcvQPMapEnable, 1 );
+	linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
+
+	/* Configure receive header buffer sizes */
+	memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
+	BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
+	linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
+	memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
+	BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
+	linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
+
+	/* Calculate eager array start addresses for each context */
+	linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
+	egrbase = BIT_GET ( &rcvegrbase, Value );
+	linda->recv_wq[0].eager_array = egrbase;
+	linda->recv_wq[0].eager_entries = eager_array_size_0;
+	egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
+	for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
+		linda->recv_wq[ctx].eager_array = egrbase;
+		linda->recv_wq[ctx].eager_entries = eager_array_size_other;
+		egrbase += ( eager_array_size_other *
+			     sizeof ( struct QIB_7220_RcvEgr ) );
+	}
+	for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
+		DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
+		       "entries)\n", linda, ctx,
+		       linda->recv_wq[ctx].eager_array,
+		       linda->recv_wq[ctx].eager_entries );
+	}
+
+	/* Set the BTH QP for Infinipath packets to an unused value */
+	memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
+	BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
+	linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
+
+	return 0;
+}
+
+/**
+ * Shut down receive datapath
+ *
+ * @v linda		Linda device
+ */
+static void linda_fini_recv ( struct linda *linda __unused ) {
+	/* Nothing to do; all contexts were already disabled when the
+	 * queue pairs were destroyed
+	 */
+}
+
+/***************************************************************************
+ *
+ * Completion queue operations
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Create completion queue
+ *
+ * @v ibdev		Infiniband device
+ * @v cq		Completion queue
+ * @ret rc		Return status code
+ */
+static int linda_create_cq ( struct ib_device *ibdev,
+			     struct ib_completion_queue *cq ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	static int cqn;
+
+	/* The hardware has no concept of completion queues.  We
+	 * simply use the association between CQs and WQs (already
+	 * handled by the IB core) to decide which WQs to poll.
+	 *
+	 * We do set a CQN, just to avoid confusing debug messages
+	 * from the IB core.
+	 */
+	cq->cqn = ++cqn;
+	DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
+
+	return 0;
+}
+
+/**
+ * Destroy completion queue
+ *
+ * @v ibdev		Infiniband device
+ * @v cq		Completion queue
+ */
+static void linda_destroy_cq ( struct ib_device *ibdev,
+			       struct ib_completion_queue *cq ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	/* Nothing to do */
+	DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
+}
+
+/***************************************************************************
+ *
+ * Queue pair operations
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Create queue pair
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @ret rc		Return status code
+ */
+static int linda_create_qp ( struct ib_device *ibdev,
+			     struct ib_queue_pair *qp ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	int ctx;
+	int rc;
+
+	/* Locate an available context */
+	ctx = linda_alloc_ctx ( linda );
+	if ( ctx < 0 ) {
+		rc = ctx;
+		goto err_alloc_ctx;
+	}
+
+	/* Set queue pair number based on context index */
+	qp->qpn = linda_ctx_to_qpn ( ctx );
+
+	/* Set work-queue private data pointers */
+	ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
+	ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
+
+	/* Create receive work queue */
+	if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
+		goto err_create_recv_wq;
+
+	/* Create send work queue */
+	if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
+		goto err_create_send_wq;
+
+	return 0;
+
+	linda_destroy_send_wq ( linda, qp );
+ err_create_send_wq:
+	linda_destroy_recv_wq ( linda, qp );
+ err_create_recv_wq:
+	linda_free_ctx ( linda, ctx );
+ err_alloc_ctx:
+	return rc;
+}
+
+/**
+ * Modify queue pair
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @ret rc		Return status code
+ */
+static int linda_modify_qp ( struct ib_device *ibdev,
+			     struct ib_queue_pair *qp ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	/* Nothing to do; the hardware doesn't have a notion of queue
+	 * keys
+	 */
+	DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
+	return 0;
+}
+
+/**
+ * Destroy queue pair
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ */
+static void linda_destroy_qp ( struct ib_device *ibdev,
+			       struct ib_queue_pair *qp ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	linda_destroy_send_wq ( linda, qp );
+	linda_destroy_recv_wq ( linda, qp );
+}
+
+/***************************************************************************
+ *
+ * Work request operations
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Post send work queue entry
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v av		Address vector
+ * @v iobuf		I/O buffer
+ * @ret rc		Return status code
+ */
+static int linda_post_send ( struct ib_device *ibdev,
+			     struct ib_queue_pair *qp,
+			     struct ib_address_vector *av,
+			     struct io_buffer *iobuf ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->send;
+	struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_SendPbc sendpbc;
+	uint8_t header_buf[IB_MAX_HEADER_SIZE];
+	struct io_buffer headers;
+	unsigned int send_buf;
+	unsigned long start_offset;
+	unsigned long offset;
+	size_t len;
+	ssize_t frag_len;
+	uint32_t *data;
+
+	/* Allocate send buffer and calculate offset */
+	send_buf = linda_alloc_send_buf ( linda );
+	start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
+
+	/* Store I/O buffer and send buffer index */
+	assert ( wq->iobufs[linda_wq->prod] == NULL );
+	wq->iobufs[linda_wq->prod] = iobuf;
+	linda_wq->send_buf[linda_wq->prod] = send_buf;
+
+	/* Construct headers */
+	iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
+	iob_reserve ( &headers, sizeof ( header_buf ) );
+	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
+
+	/* Calculate packet length */
+	len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
+		  iob_len ( iobuf ) + 3 ) & ~3 );
+
+	/* Construct send per-buffer control word */
+	memset ( &sendpbc, 0, sizeof ( sendpbc ) );
+	BIT_FILL_2 ( &sendpbc,
+		     LengthP1_toibc, ( ( len >> 2 ) - 1 ),
+		     VL15, 1 );
+
+	/* Write SendPbc */
+	DBG_DISABLE ( DBGLVL_IO );
+	linda_writeq ( linda, &sendpbc, offset );
+	offset += sizeof ( sendpbc );
+
+	/* Write headers */
+	for ( data = headers.data, frag_len = iob_len ( &headers ) ;
+	      frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
+		linda_writel ( linda, *data, offset );
+	}
+
+	/* Write data */
+	for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
+	      frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
+		linda_writel ( linda, *data, offset );
+	}
+	DBG_ENABLE ( DBGLVL_IO );
+
+	assert ( ( start_offset + len ) == offset );
+	DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
+		linda, qp->qpn, send_buf, linda_wq->prod,
+		start_offset, offset );
+
+	/* Increment producer counter */
+	linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
+
+	return 0;
+}
+
+/**
+ * Complete send work queue entry
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v wqe_idx		Work queue entry index
+ */
+static void linda_complete_send ( struct ib_device *ibdev,
+				  struct ib_queue_pair *qp,
+				  unsigned int wqe_idx ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->send;
+	struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct io_buffer *iobuf;
+	unsigned int send_buf;
+
+	/* Parse completion */
+	send_buf = linda_wq->send_buf[wqe_idx];
+	DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
+		linda, qp->qpn, send_buf, wqe_idx );
+
+	/* Complete work queue entry */
+	iobuf = wq->iobufs[wqe_idx];
+	assert ( iobuf != NULL );
+	ib_complete_send ( ibdev, qp, iobuf, 0 );
+	wq->iobufs[wqe_idx] = NULL;
+
+	/* Free send buffer */
+	linda_free_send_buf ( linda, send_buf );
+}
+
+/**
+ * Poll send work queue
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ */
+static void linda_poll_send_wq ( struct ib_device *ibdev,
+				 struct ib_queue_pair *qp ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->send;
+	struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	unsigned int send_buf;
+
+	/* Look for completions */
+	while ( wq->fill ) {
+
+		/* Check to see if send buffer has completed */
+		send_buf = linda_wq->send_buf[linda_wq->cons];
+		if ( linda_send_buf_in_use ( linda, send_buf ) )
+			break;
+
+		/* Complete this buffer */
+		linda_complete_send ( ibdev, qp, linda_wq->cons );
+
+		/* Increment consumer counter */
+		linda_wq->cons = ( ( linda_wq->cons + 1 ) &
+				   ( wq->num_wqes - 1 ) );
+	}
+}
+
+/**
+ * Post receive work queue entry
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v iobuf		I/O buffer
+ * @ret rc		Return status code
+ */
+static int linda_post_recv ( struct ib_device *ibdev,
+			     struct ib_queue_pair *qp,
+			     struct io_buffer *iobuf ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->recv;
+	struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_RcvEgr rcvegr;
+	struct QIB_7220_scalar rcvegrindexhead;
+	unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
+	physaddr_t addr;
+	size_t len;
+	unsigned int wqe_idx;
+	unsigned int bufsize;
+
+	/* Sanity checks */
+	addr = virt_to_bus ( iobuf->data );
+	len = iob_tailroom ( iobuf );
+	if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
+		DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
+		       "(%08lx)\n", linda, qp->qpn, addr );
+		return -EINVAL;
+	}
+	if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
+		DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
+		       linda, qp->qpn, len );
+		return -EINVAL;
+	}
+
+	/* Calculate eager producer index and WQE index */
+	wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
+	assert ( wq->iobufs[wqe_idx] == NULL );
+
+	/* Store I/O buffer */
+	wq->iobufs[wqe_idx] = iobuf;
+
+	/* Calculate buffer size */
+	switch ( LINDA_RECV_PAYLOAD_SIZE ) {
+	case 2048:  bufsize = LINDA_EAGER_BUFFER_2K;  break;
+	case 4096:  bufsize = LINDA_EAGER_BUFFER_4K;  break;
+	case 8192:  bufsize = LINDA_EAGER_BUFFER_8K;  break;
+	case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
+	case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
+	case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
+	default:    linker_assert ( 0, invalid_rx_payload_size );
+		    bufsize = LINDA_EAGER_BUFFER_NONE;
+	}
+
+	/* Post eager buffer */
+	memset ( &rcvegr, 0, sizeof ( rcvegr ) );
+	BIT_FILL_2 ( &rcvegr,
+		     Addr, ( addr >> 11 ),
+		     BufSize, bufsize );
+	linda_writeq_array8b ( linda, &rcvegr,
+			       linda_wq->eager_array, linda_wq->eager_prod );
+	DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
+		linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
+		addr, ( addr + len ) );
+
+	/* Increment producer index */
+	linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
+				 ( linda_wq->eager_entries - 1 ) );
+
+	/* Update head index */
+	memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
+	BIT_FILL_1 ( &rcvegrindexhead,
+		     Value, ( ( linda_wq->eager_prod + 1 ) &
+			      ( linda_wq->eager_entries - 1 ) ) );
+	linda_writeq_array64k ( linda, &rcvegrindexhead,
+				QIB_7220_RcvEgrIndexHead0_offset, ctx );
+
+	return 0;
+}
+
+/**
+ * Complete receive work queue entry
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v header_offs	Header offset
+ */
+static void linda_complete_recv ( struct ib_device *ibdev,
+				  struct ib_queue_pair *qp,
+				  unsigned int header_offs ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->recv;
+	struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_RcvHdrFlags *rcvhdrflags;
+	struct QIB_7220_RcvEgr rcvegr;
+	struct io_buffer headers;
+	struct io_buffer *iobuf;
+	struct ib_queue_pair *intended_qp;
+	struct ib_address_vector av;
+	unsigned int rcvtype;
+	unsigned int pktlen;
+	unsigned int egrindex;
+	unsigned int useegrbfr;
+	unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
+	unsigned int lenerr, parityerr, vcrcerr, icrcerr;
+	unsigned int err;
+	unsigned int hdrqoffset;
+	unsigned int header_len;
+	unsigned int padded_payload_len;
+	unsigned int wqe_idx;
+	size_t payload_len;
+	int qp0;
+	int rc;
+
+	/* RcvHdrFlags are at the end of the header entry */
+	rcvhdrflags = ( linda_wq->header + header_offs +
+			LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
+	rcvtype = BIT_GET ( rcvhdrflags, RcvType );
+	pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
+	egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
+	useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
+	hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
+	iberr = BIT_GET ( rcvhdrflags, IBErr );
+	mkerr = BIT_GET ( rcvhdrflags, MKErr );
+	tiderr = BIT_GET ( rcvhdrflags, TIDErr );
+	khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
+	mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
+	lenerr = BIT_GET ( rcvhdrflags, LenErr );
+	parityerr = BIT_GET ( rcvhdrflags, ParityErr );
+	vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
+	icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
+	header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
+		       sizeof ( *rcvhdrflags ) );
+	padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
+	err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
+		lenerr | parityerr | vcrcerr | icrcerr );
+	/* IB header is placed immediately before RcvHdrFlags */
+	iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
+		       header_len, header_len );
+
+	/* Dump diagnostic information */
+	if ( err || ( ! useegrbfr ) ) {
+		DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
+		       "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
+		       qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
+		       ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
+		       pktlen, header_len, padded_payload_len,
+		       ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
+		       ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
+		       ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
+		       ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
+		       ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
+		       ( err ? "]" : "" ) );
+	} else {
+		DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
+			"len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
+			( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
+			pktlen, header_len, padded_payload_len );
+	}
+	DBGCP_HDA ( linda, hdrqoffset, headers.data,
+		    ( header_len + sizeof ( *rcvhdrflags ) ) );
+
+	/* Parse header to generate address vector */
+	qp0 = ( qp->qpn == 0 );
+	intended_qp = NULL;
+	if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
+			      &payload_len, &av ) ) != 0 ) {
+		DBGC ( linda, "Linda %p could not parse headers: %s\n",
+		       linda, strerror ( rc ) );
+		err = 1;
+	}
+	if ( ! intended_qp )
+		intended_qp = qp;
+
+	/* Complete this buffer and any skipped buffers.  Note that
+	 * when the hardware runs out of buffers, it will repeatedly
+	 * report the same buffer (the tail) as a TID error, and that
+	 * it also has a habit of sometimes skipping over several
+	 * buffers at once.
+	 */
+	while ( 1 ) {
+
+		/* If we have caught up to the producer counter, stop.
+		 * This will happen when the hardware first runs out
+		 * of buffers and starts reporting TID errors against
+		 * the eager buffer it wants to use next.
+		 */
+		if ( linda_wq->eager_cons == linda_wq->eager_prod )
+			break;
+
+		/* If we have caught up to where we should be after
+		 * completing this egrindex, stop.  We phrase the test
+		 * this way to avoid completing the entire ring when
+		 * we receive the same egrindex twice in a row.
+		 */
+		if ( ( linda_wq->eager_cons ==
+		       ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
+			break;
+
+		/* Identify work queue entry and corresponding I/O
+		 * buffer.
+		 */
+		wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
+		iobuf = wq->iobufs[wqe_idx];
+		assert ( iobuf != NULL );
+		wq->iobufs[wqe_idx] = NULL;
+
+		/* Complete the eager buffer */
+		if ( linda_wq->eager_cons == egrindex ) {
+			/* Completing the eager buffer described in
+			 * this header entry.
+			 */
+			iob_put ( iobuf, payload_len );
+			rc = ( err ? -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
+			/* Redirect to target QP if necessary */
+			if ( qp != intended_qp ) {
+				DBGC ( linda, "Linda %p redirecting QPN %ld "
+				       "=> %ld\n",
+				       linda, qp->qpn, intended_qp->qpn );
+				/* Compensate for incorrect fill levels */
+				qp->recv.fill--;
+				intended_qp->recv.fill++;
+			}
+			ib_complete_recv ( ibdev, intended_qp, &av, iobuf, rc);
+		} else {
+			/* Completing on a skipped-over eager buffer */
+			ib_complete_recv ( ibdev, qp, &av, iobuf, -ECANCELED );
+		}
+
+		/* Clear eager buffer */
+		memset ( &rcvegr, 0, sizeof ( rcvegr ) );
+		linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
+				       linda_wq->eager_cons );
+
+		/* Increment consumer index */
+		linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
+					 ( linda_wq->eager_entries - 1 ) );
+	}
+}
+
+/**
+ * Poll receive work queue
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ */
+static void linda_poll_recv_wq ( struct ib_device *ibdev,
+				 struct ib_queue_pair *qp ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct ib_work_queue *wq = &qp->recv;
+	struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
+	struct QIB_7220_RcvHdrHead0 rcvhdrhead;
+	unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
+	unsigned int header_prod;
+
+	/* Check for received packets */
+	header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
+	if ( header_prod == linda_wq->header_cons )
+		return;
+
+	/* Process all received packets */
+	while ( linda_wq->header_cons != header_prod ) {
+
+		/* Complete the receive */
+		linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
+
+		/* Increment the consumer offset */
+		linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
+		linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
+	}
+
+	/* Update consumer offset */
+	memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
+	BIT_FILL_2 ( &rcvhdrhead,
+		     RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
+		     counter, 1 );
+	linda_writeq_array64k ( linda, &rcvhdrhead,
+				QIB_7220_RcvHdrHead0_offset, ctx );
+}
+
+/**
+ * Poll completion queue
+ *
+ * @v ibdev		Infiniband device
+ * @v cq		Completion queue
+ */
+static void linda_poll_cq ( struct ib_device *ibdev,
+			    struct ib_completion_queue *cq ) {
+	struct ib_work_queue *wq;
+
+	/* Poll associated send and receive queues */
+	list_for_each_entry ( wq, &cq->work_queues, list ) {
+		if ( wq->is_send ) {
+			linda_poll_send_wq ( ibdev, wq->qp );
+		} else {
+			linda_poll_recv_wq ( ibdev, wq->qp );
+		}
+	}
+}
+
+/***************************************************************************
+ *
+ * Event queues
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Poll event queue
+ *
+ * @v ibdev		Infiniband device
+ */
+static void linda_poll_eq ( struct ib_device *ibdev ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct QIB_7220_ErrStatus errstatus;
+	struct QIB_7220_ErrClear errclear;
+
+	/* Check for link status changes */
+	DBG_DISABLE ( DBGLVL_IO );
+	linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
+	DBG_ENABLE ( DBGLVL_IO );
+	if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
+		linda_link_state_changed ( ibdev );
+		memset ( &errclear, 0, sizeof ( errclear ) );
+		BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
+		linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
+	}
+}
+
+/***************************************************************************
+ *
+ * Infiniband link-layer operations
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Initialise Infiniband link
+ *
+ * @v ibdev		Infiniband device
+ * @ret rc		Return status code
+ */
+static int linda_open ( struct ib_device *ibdev ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct QIB_7220_Control control;
+
+	/* Disable link */
+	linda_readq ( linda, &control, QIB_7220_Control_offset );
+	BIT_SET ( &control, LinkEn, 1 );
+	linda_writeq ( linda, &control, QIB_7220_Control_offset );
+	return 0;
+}
+
+/**
+ * Close Infiniband link
+ *
+ * @v ibdev		Infiniband device
+ */
+static void linda_close ( struct ib_device *ibdev ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+	struct QIB_7220_Control control;
+
+	/* Disable link */
+	linda_readq ( linda, &control, QIB_7220_Control_offset );
+	BIT_SET ( &control, LinkEn, 0 );
+	linda_writeq ( linda, &control, QIB_7220_Control_offset );
+}
+
+/***************************************************************************
+ *
+ * Multicast group operations
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Attach to multicast group
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v gid		Multicast GID
+ * @ret rc		Return status code
+ */
+static int linda_mcast_attach ( struct ib_device *ibdev,
+				struct ib_queue_pair *qp,
+				union ib_gid *gid ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	( void ) linda;
+	( void ) qp;
+	( void ) gid;
+	return 0;
+}
+
+/**
+ * Detach from multicast group
+ *
+ * @v ibdev		Infiniband device
+ * @v qp		Queue pair
+ * @v gid		Multicast GID
+ */
+static void linda_mcast_detach ( struct ib_device *ibdev,
+				 struct ib_queue_pair *qp,
+				 union ib_gid *gid ) {
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	( void ) linda;
+	( void ) qp;
+	( void ) gid;
+}
+
+/** Linda Infiniband operations */
+static struct ib_device_operations linda_ib_operations = {
+	.create_cq	= linda_create_cq,
+	.destroy_cq	= linda_destroy_cq,
+	.create_qp	= linda_create_qp,
+	.modify_qp	= linda_modify_qp,
+	.destroy_qp	= linda_destroy_qp,
+	.post_send	= linda_post_send,
+	.post_recv	= linda_post_recv,
+	.poll_cq	= linda_poll_cq,
+	.poll_eq	= linda_poll_eq,
+	.open		= linda_open,
+	.close		= linda_close,
+	.mcast_attach	= linda_mcast_attach,
+	.mcast_detach	= linda_mcast_detach,
+	.set_port_info	= linda_set_port_info,
+	.set_pkey_table	= linda_set_pkey_table,
+};
+
+/***************************************************************************
+ *
+ * I2C bus operations
+ *
+ ***************************************************************************
+ */
+
+/** Linda I2C bit to GPIO mappings */
+static unsigned int linda_i2c_bits[] = {
+	[I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
+	[I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
+};
+
+/**
+ * Read Linda I2C line status
+ *
+ * @v basher		Bit-bashing interface
+ * @v bit_id		Bit number
+ * @ret zero		Input is a logic 0
+ * @ret non-zero	Input is a logic 1
+ */
+static int linda_i2c_read_bit ( struct bit_basher *basher,
+				unsigned int bit_id ) {
+	struct linda *linda =
+		container_of ( basher, struct linda, i2c.basher );
+	struct QIB_7220_EXTStatus extstatus;
+	unsigned int status;
+
+	DBG_DISABLE ( DBGLVL_IO );
+
+	linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
+	status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
+
+	DBG_ENABLE ( DBGLVL_IO );
+
+	return status;
+}
+
+/**
+ * Write Linda I2C line status
+ *
+ * @v basher		Bit-bashing interface
+ * @v bit_id		Bit number
+ * @v data		Value to write
+ */
+static void linda_i2c_write_bit ( struct bit_basher *basher,
+				  unsigned int bit_id, unsigned long data ) {
+	struct linda *linda =
+		container_of ( basher, struct linda, i2c.basher );
+	struct QIB_7220_EXTCtrl extctrl;
+	struct QIB_7220_GPIO gpioout;
+	unsigned int bit = linda_i2c_bits[bit_id];
+	unsigned int outputs = 0;
+	unsigned int output_enables = 0;
+
+	DBG_DISABLE ( DBGLVL_IO );
+
+	/* Read current GPIO mask and outputs */
+	linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
+	linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
+
+	/* Update outputs and output enables.  I2C lines are tied
+	 * high, so we always set the output to 0 and use the output
+	 * enable to control the line.
+	 */
+	output_enables = BIT_GET ( &extctrl, GPIOOe );
+	output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
+	outputs = BIT_GET ( &gpioout, GPIO );
+	outputs = ( outputs & ~bit );
+	BIT_SET ( &extctrl, GPIOOe, output_enables );
+	BIT_SET ( &gpioout, GPIO, outputs );
+
+	/* Write the output enable first; that way we avoid logic
+	 * hazards.
+	 */
+	linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
+	linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
+	mb();
+
+	DBG_ENABLE ( DBGLVL_IO );
+}
+
+/** Linda I2C bit-bashing interface operations */
+static struct bit_basher_operations linda_i2c_basher_ops = {
+	.read	= linda_i2c_read_bit,
+	.write	= linda_i2c_write_bit,
+};
+
+/**
+ * Initialise Linda I2C subsystem
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_init_i2c ( struct linda *linda ) {
+	static int try_eeprom_address[] = { 0x51, 0x50 };
+	unsigned int i;
+	int rc;
+
+	/* Initialise bus */
+	if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
+					  &linda_i2c_basher_ops ) ) != 0 ) {
+		DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
+		       linda, strerror ( rc ) );
+		return rc;
+	}
+
+	/* Probe for devices */
+	for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
+			    sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
+		init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
+		if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
+						 &linda->eeprom ) ) == 0 ) {
+			DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
+				linda, try_eeprom_address[i] );
+			return 0;
+		}
+	}
+
+	DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
+	return -ENODEV;
+}
+
+/**
+ * Read EEPROM parameters
+ *
+ * @v linda		Linda device
+ * @v guid		GUID to fill in
+ * @ret rc		Return status code
+ */
+static int linda_read_eeprom ( struct linda *linda, union ib_guid *guid ) {
+	struct i2c_interface *i2c = &linda->i2c.i2c;
+	int rc;
+
+	/* Read GUID */
+	if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
+				guid->bytes, sizeof ( *guid ) ) ) != 0 ) {
+		DBGC ( linda, "Linda %p could not read GUID: %s\n",
+		       linda, strerror ( rc ) );
+		return rc;
+	}
+	DBGC2 ( linda, "Linda %p has GUID " IB_GUID_FMT "\n",
+		linda, IB_GUID_ARGS ( guid ) );
+
+	/* Read serial number (debug only) */
+	if ( DBG_LOG ) {
+		uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
+
+		serial[ sizeof ( serial ) - 1 ] = '\0';
+		if ( ( rc = i2c->read ( i2c, &linda->eeprom,
+					LINDA_EEPROM_SERIAL_OFFSET, serial,
+					( sizeof ( serial ) - 1 ) ) ) != 0 ) {
+			DBGC ( linda, "Linda %p could not read serial: %s\n",
+			       linda, strerror ( rc ) );
+			return rc;
+		}
+		DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
+			linda, serial );
+	}
+
+	return 0;
+}
+
+/***************************************************************************
+ *
+ * External parallel bus access
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Request ownership of the IB external parallel bus
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_ib_epb_request ( struct linda *linda ) {
+	struct QIB_7220_ibsd_epb_access_ctrl access;
+	unsigned int i;
+
+	/* Request ownership */
+	memset ( &access, 0, sizeof ( access ) );
+	BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
+	linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
+
+	/* Wait for ownership to be granted */
+	for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
+		linda_readq ( linda, &access,
+			      QIB_7220_ibsd_epb_access_ctrl_offset );
+		if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
+			return 0;
+		udelay ( 1 );
+	}
+
+	DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
+	       linda );
+	return -ETIMEDOUT;
+}
+
+/**
+ * Wait for IB external parallel bus transaction to complete
+ *
+ * @v linda		Linda device
+ * @v xact		Buffer to hold transaction result
+ * @ret rc		Return status code
+ */
+static int linda_ib_epb_wait ( struct linda *linda,
+			    struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
+	unsigned int i;
+
+	/* Discard first read to allow for signals crossing clock domains */
+	linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
+
+	for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
+		linda_readq ( linda, xact,
+			      QIB_7220_ibsd_epb_transaction_reg_offset );
+		if ( BIT_GET ( xact, ib_epb_rdy ) ) {
+			if ( BIT_GET ( xact, ib_epb_req_error ) ) {
+				DBGC ( linda, "Linda %p EPB transaction "
+				       "failed\n", linda );
+				return -EIO;
+			} else {
+				return 0;
+			}
+		}
+		udelay ( 1 );
+	}
+
+	DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
+	       linda );
+	return -ETIMEDOUT;
+}
+
+/**
+ * Release ownership of the IB external parallel bus
+ *
+ * @v linda		Linda device
+ */
+static void linda_ib_epb_release ( struct linda *linda ) {
+	struct QIB_7220_ibsd_epb_access_ctrl access;
+
+	memset ( &access, 0, sizeof ( access ) );
+	BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
+	linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
+}
+
+/**
+ * Read data via IB external parallel bus
+ *
+ * @v linda		Linda device
+ * @v location		EPB location
+ * @ret data		Data read, or negative error
+ *
+ * You must have already acquired ownership of the IB external
+ * parallel bus.
+ */
+static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
+	struct QIB_7220_ibsd_epb_transaction_reg xact;
+	unsigned int data;
+	int rc;
+
+	/* Ensure no transaction is currently in progress */
+	if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
+		return rc;
+
+	/* Process data */
+	memset ( &xact, 0, sizeof ( xact ) );
+	BIT_FILL_3 ( &xact,
+		     ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
+		     ib_epb_read_write, LINDA_EPB_READ,
+		     ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
+	linda_writeq ( linda, &xact,
+		       QIB_7220_ibsd_epb_transaction_reg_offset );
+
+	/* Wait for transaction to complete */
+	if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
+		return rc;
+
+	data = BIT_GET ( &xact, ib_epb_data );
+	return data;
+}
+
+/**
+ * Write data via IB external parallel bus
+ *
+ * @v linda		Linda device
+ * @v location		EPB location
+ * @v data		Data to write
+ * @ret rc		Return status code
+ *
+ * You must have already acquired ownership of the IB external
+ * parallel bus.
+ */
+static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
+				unsigned int data ) {
+	struct QIB_7220_ibsd_epb_transaction_reg xact;
+	int rc;
+
+	/* Ensure no transaction is currently in progress */
+	if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
+		return rc;
+
+	/* Process data */
+	memset ( &xact, 0, sizeof ( xact ) );
+	BIT_FILL_4 ( &xact,
+		     ib_epb_data, data,
+		     ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
+		     ib_epb_read_write, LINDA_EPB_WRITE,
+		     ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
+	linda_writeq ( linda, &xact,
+		       QIB_7220_ibsd_epb_transaction_reg_offset );
+
+	/* Wait for transaction to complete */
+	if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
+		return rc;
+
+	return 0;
+}
+
+/**
+ * Read/modify/write EPB register
+ *
+ * @v linda		Linda device
+ * @v cs		Chip select
+ * @v channel		Channel
+ * @v element		Element
+ * @v reg		Register
+ * @v value		Value to set
+ * @v mask		Mask to apply to old value
+ * @ret rc		Return status code
+ */
+static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
+				  unsigned int channel, unsigned int element,
+				  unsigned int reg, unsigned int value,
+				  unsigned int mask ) {
+	unsigned int location;
+	int old_value;
+	int rc;
+
+	DBG_DISABLE ( DBGLVL_IO );
+
+	/* Sanity check */
+	assert ( ( value & mask ) == value );
+
+	/* Acquire bus ownership */
+	if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
+		goto out;
+
+	/* Read existing value, if necessary */
+	location = LINDA_EPB_LOC ( cs, channel, element, reg );
+	if ( (~mask) & 0xff ) {
+		old_value = linda_ib_epb_read ( linda, location );
+		if ( old_value < 0 ) {
+			rc = old_value;
+			goto out_release;
+		}
+	} else {
+		old_value = 0;
+	}
+
+	/* Update value */
+	value = ( ( old_value & ~mask ) | value );
+	DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
+		linda, cs, channel, element, reg, old_value, value );
+	if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
+		goto out_release;
+
+ out_release:
+	/* Release bus */
+	linda_ib_epb_release ( linda );
+ out:
+	DBG_ENABLE ( DBGLVL_IO );
+	return rc;
+}
+
+/**
+ * Transfer data to/from microcontroller RAM
+ *
+ * @v linda		Linda device
+ * @v address		Starting address
+ * @v write		Data to write, or NULL
+ * @v read		Data to read, or NULL
+ * @v len		Length of data
+ * @ret rc		Return status code
+ */
+static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
+				   const void *write, void *read,
+				   size_t len ) {
+	unsigned int control;
+	unsigned int address_hi;
+	unsigned int address_lo;
+	int data;
+	int rc;
+
+	DBG_DISABLE ( DBGLVL_IO );
+
+	assert ( ! ( write && read ) );
+	assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
+	assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
+
+	/* Acquire bus ownership */
+	if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
+		goto out;
+
+	/* Process data */
+	while ( len ) {
+
+		/* Reset the address for each new chunk */
+		if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
+
+			/* Write the control register */
+			control = ( read ? LINDA_EPB_UC_CTL_READ :
+				    LINDA_EPB_UC_CTL_WRITE );
+			if ( ( rc = linda_ib_epb_write ( linda,
+							 LINDA_EPB_UC_CTL,
+							 control ) ) != 0 )
+				break;
+
+			/* Write the address registers */
+			address_hi = ( address >> 8 );
+			if ( ( rc = linda_ib_epb_write ( linda,
+							 LINDA_EPB_UC_ADDR_HI,
+							 address_hi ) ) != 0 )
+				break;
+			address_lo = ( address & 0xff );
+			if ( ( rc = linda_ib_epb_write ( linda,
+							 LINDA_EPB_UC_ADDR_LO,
+							 address_lo ) ) != 0 )
+				break;
+		}
+
+		/* Read or write the data */
+		if ( read ) {
+			data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
+			if ( data < 0 ) {
+				rc = data;
+				break;
+			}
+			*( ( uint8_t * ) read++ ) = data;
+		} else {
+			data = *( ( uint8_t * ) write++ );
+			if ( ( rc = linda_ib_epb_write ( linda,
+							 LINDA_EPB_UC_DATA,
+							 data ) ) != 0 )
+				break;
+		}
+		address++;
+		len--;
+
+		/* Reset the control byte after each chunk */
+		if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
+			if ( ( rc = linda_ib_epb_write ( linda,
+							 LINDA_EPB_UC_CTL,
+							 0 ) ) != 0 )
+				break;
+		}
+	}
+
+	/* Release bus */
+	linda_ib_epb_release ( linda );
+
+ out:
+	DBG_ENABLE ( DBGLVL_IO );
+	return rc;
+}
+
+/***************************************************************************
+ *
+ * Infiniband SerDes initialisation
+ *
+ ***************************************************************************
+ */
+
+/** A Linda SerDes parameter */
+struct linda_serdes_param {
+	/** EPB address as constructed by LINDA_EPB_ADDRESS() */
+	uint16_t address;
+	/** Value to set */
+	uint8_t value;
+	/** Mask to apply to old value */
+	uint8_t mask;
+} __packed;
+
+/** Magic "all channels" channel number */
+#define LINDA_EPB_ALL_CHANNELS 31
+
+/** End of SerDes parameter list marker */
+#define LINDA_SERDES_PARAM_END { 0, 0, 0 }
+
+/**
+ * Program IB SerDes register(s)
+ *
+ * @v linda		Linda device
+ * @v param		SerDes parameter
+ * @ret rc		Return status code
+ */
+static int linda_set_serdes_param ( struct linda *linda,
+				    struct linda_serdes_param *param ) {
+	unsigned int channel;
+	unsigned int channel_start;
+	unsigned int channel_end;
+	unsigned int element;
+	unsigned int reg;
+	int rc;
+
+	/* Break down the EPB address and determine channels */
+	channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
+	element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
+	reg = LINDA_EPB_ADDRESS_REG ( param->address );
+	if ( channel == LINDA_EPB_ALL_CHANNELS ) {
+		channel_start = 0;
+		channel_end = 3;
+	} else {
+		channel_start = channel_end = channel;
+	}
+
+	/* Modify register for each specified channel */
+	for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
+		if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
+						   channel, element, reg,
+						   param->value,
+						   param->mask ) ) != 0 )
+			return rc;
+	}
+
+	return 0;
+}
+
+/**
+ * Program IB SerDes registers
+ *
+ * @v linda		Linda device
+ * @v param		SerDes parameters
+ * @v count		Number of parameters
+ * @ret rc		Return status code
+ */
+static int linda_set_serdes_params ( struct linda *linda,
+				     struct linda_serdes_param *params ) {
+	int rc;
+
+	for ( ; params->mask != 0 ; params++ ){
+		if ( ( rc = linda_set_serdes_param ( linda,
+							 params ) ) != 0 )
+			return rc;
+	}
+
+	return 0;
+}
+
+#define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d,			\
+		       amp_s, main_s, ipst_s, ipre_s )			\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ),	\
+	  ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff },			\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ),	\
+	  ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff },			\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ),	\
+	  ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff },		\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ),	\
+	  ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff },		\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ),	\
+	  ( ( ( ipst_d & 0xf ) << 1 ) |					\
+	    ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff },			\
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ),	\
+	  ( ( ( ipst_s & 0xf ) << 1 ) |					\
+	    ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
+
+/**
+ * Linda SerDes default parameters
+ *
+ * These magic start-of-day values are taken from the Linux driver.
+ */
+static struct linda_serdes_param linda_serdes_defaults1[] = {
+	/* RXHSCTRL0 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
+	/* VCDL_DAC2 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
+	/* VCDL_CTRL2 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
+	/* START_EQ1 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
+	/* START_EQ2 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
+	/* BACTRL */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
+	/* LDOUTCTRL1 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
+	/* RXHSSTATUS */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
+	/* End of this block */
+	LINDA_SERDES_PARAM_END
+};
+static struct linda_serdes_param linda_serdes_defaults2[] = {
+	/* LDOUTCTRL1 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
+	/* DDS values */
+	LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
+	/* Set Rcv Eq. to Preset node */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
+	/* DFELTHFDR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
+	/* DFELTHHDR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
+	/* TLTHFDR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
+	/* TLTHHDR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
+	/* ZFR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
+	/* ZCNT) */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
+	/* GFR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
+	/* GHR */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
+	/* VCDL_CTRL0 toggle */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
+	/* CMUCTRL5 */
+	{ LINDA_EPB_ADDRESS (			   7, 0, 0x15 ), 0x80, 0xff },
+	/* End of this block */
+	LINDA_SERDES_PARAM_END
+};
+static struct linda_serdes_param linda_serdes_defaults3[] = {
+	/* START_EQ1 */
+	{ LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
+	/* End of this block */
+	LINDA_SERDES_PARAM_END
+};
+
+/**
+ * Program the microcontroller RAM
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_program_uc_ram ( struct linda *linda ) {
+	int rc;
+
+	if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
+					    sizeof ( linda_ib_fw ) ) ) != 0 ){
+		DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
+		       linda, strerror ( rc ) );
+		return rc;
+	}
+
+	return 0;
+}
+
+/**
+ * Verify the microcontroller RAM
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_verify_uc_ram ( struct linda *linda ) {
+	uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
+	unsigned int offset;
+	int rc;
+
+	for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
+	      offset += sizeof ( verify ) ) {
+		if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
+						    NULL, verify,
+						    sizeof (verify) )) != 0 ){
+			DBGC ( linda, "Linda %p could not read back IB "
+			       "firmware: %s\n", linda, strerror ( rc ) );
+			return rc;
+		}
+		if ( memcmp ( ( linda_ib_fw + offset ), verify,
+			      sizeof ( verify ) ) != 0 ) {
+			DBGC ( linda, "Linda %p firmware verification failed "
+			       "at offset %#x\n", linda, offset );
+			DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
+				   sizeof ( verify ) );
+			DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
+			return -EIO;
+		}
+	}
+
+	DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
+	return 0;
+}
+
+/**
+ * Use the microcontroller to trim the IB link
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_trim_ib ( struct linda *linda ) {
+	struct QIB_7220_IBSerDesCtrl ctrl;
+	struct QIB_7220_IntStatus intstatus;
+	unsigned int i;
+	int rc;
+
+	/* Bring the microcontroller out of reset */
+	linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
+	BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
+	linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
+
+	/* Wait for the "trim done" signal */
+	for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
+		linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
+		if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
+			rc = 0;
+			goto out_reset;
+		}
+		mdelay ( 1 );
+	}
+
+	DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
+	rc = -ETIMEDOUT;
+ out_reset:
+	/* Put the microcontroller back into reset */
+	BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
+	linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
+
+	return rc;
+}
+
+/**
+ * Initialise the IB SerDes
+ *
+ * @v linda		Linda device
+ * @ret rc		Return status code
+ */
+static int linda_init_ib_serdes ( struct linda *linda ) {
+	struct QIB_7220_Control control;
+	struct QIB_7220_IBCCtrl ibcctrl;
+	struct QIB_7220_IBCDDRCtrl ibcddrctrl;
+	struct QIB_7220_XGXSCfg xgxscfg;
+	int rc;
+
+	/* Disable link */
+	linda_readq ( linda, &control, QIB_7220_Control_offset );
+	BIT_SET ( &control, LinkEn, 0 );
+	linda_writeq ( linda, &control, QIB_7220_Control_offset );
+
+	/* Configure sensible defaults for IBC */
+	memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
+	BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
+		     FlowCtrlPeriod, 0x03,
+		     FlowCtrlWaterMark, 0x05,
+		     MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
+				    LINDA_RECV_PAYLOAD_SIZE +
+				    4 /* ICRC */ ) >> 2 ),
+		     PhyerrThreshold, 0xf,
+		     OverrunThreshold, 0xf,
+		     CreditScale, 0x4 );
+	linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
+
+	/* Force SDR only to avoid needing all the DDR tuning,
+	 * Mellanox compatibility hacks etc.  SDR is plenty for
+	 * boot-time operation.
+	 */
+	linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
+	BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
+	BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
+	BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
+	BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
+	BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
+	BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
+	linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
+
+	/* Set default SerDes parameters */
+	if ( ( rc = linda_set_serdes_params ( linda,
+					      linda_serdes_defaults1 ) ) != 0 )
+		return rc;
+	udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
+	if ( ( rc = linda_set_serdes_params ( linda,
+					      linda_serdes_defaults2 ) ) != 0 )
+		return rc;
+
+	/* Program the microcontroller RAM */
+	if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
+		return rc;
+
+	/* Verify the microcontroller RAM contents */
+	if ( DBGLVL_LOG ) {
+		if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
+			return rc;
+	}
+
+	/* More SerDes tuning */
+	if ( ( rc = linda_set_serdes_params ( linda,
+					      linda_serdes_defaults3 ) ) != 0 )
+		return rc;
+
+	/* Use the microcontroller to trim the IB link */
+	if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
+		return rc;
+
+	/* Bring XGXS out of reset */
+	linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
+	BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
+	BIT_SET ( &xgxscfg, xcv_reset, 0 );
+	linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
+
+	return rc;
+}
+
+/***************************************************************************
+ *
+ * PCI layer interface
+ *
+ ***************************************************************************
+ */
+
+/**
+ * Probe PCI device
+ *
+ * @v pci		PCI device
+ * @v id		PCI ID
+ * @ret rc		Return status code
+ */
+static int linda_probe ( struct pci_device *pci ) {
+	struct ib_device *ibdev;
+	struct linda *linda;
+	struct QIB_7220_Revision revision;
+	int rc;
+
+	/* Allocate Infiniband device */
+	ibdev = alloc_ibdev ( sizeof ( *linda ) );
+	if ( ! ibdev ) {
+		rc = -ENOMEM;
+		goto err_alloc_ibdev;
+	}
+	pci_set_drvdata ( pci, ibdev );
+	linda = ib_get_drvdata ( ibdev );
+	ibdev->op = &linda_ib_operations;
+	ibdev->dev = &pci->dev;
+	ibdev->port = 1;
+
+	/* Fix up PCI device */
+	adjust_pci_device ( pci );
+
+	/* Get PCI BARs */
+	linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
+	DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
+
+	/* Print some general data */
+	linda_readq ( linda, &revision, QIB_7220_Revision_offset );
+	DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
+		BIT_GET ( &revision, BoardID ),
+		BIT_GET ( &revision, R_SW ),
+		BIT_GET ( &revision, R_Arch ),
+		BIT_GET ( &revision, R_ChipRevMajor ),
+		BIT_GET ( &revision, R_ChipRevMinor ) );
+
+	/* Record link capabilities.  Note that we force SDR only to
+	 * avoid having to carry extra code for DDR tuning etc.
+	 */
+	ibdev->link_width_enabled = ibdev->link_width_supported =
+		( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
+	ibdev->link_speed_enabled = ibdev->link_speed_supported =
+		IB_LINK_SPEED_SDR;
+
+	/* Initialise I2C subsystem */
+	if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
+		goto err_init_i2c;
+
+	/* Read EEPROM parameters */
+	if ( ( rc = linda_read_eeprom ( linda, &ibdev->node_guid ) ) != 0 )
+		goto err_read_eeprom;
+	memcpy ( &ibdev->gid.s.guid, &ibdev->node_guid,
+		 sizeof ( ibdev->gid.s.guid ) );
+
+	/* Initialise send datapath */
+	if ( ( rc = linda_init_send ( linda ) ) != 0 )
+		goto err_init_send;
+
+	/* Initialise receive datapath */
+	if ( ( rc = linda_init_recv ( linda ) ) != 0 )
+		goto err_init_recv;
+
+	/* Initialise the IB SerDes */
+	if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
+		goto err_init_ib_serdes;
+
+	/* Register Infiniband device */
+	if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
+		DBGC ( linda, "Linda %p could not register IB "
+		       "device: %s\n", linda, strerror ( rc ) );
+		goto err_register_ibdev;
+	}
+
+	return 0;
+
+	unregister_ibdev ( ibdev );
+ err_register_ibdev:
+	linda_fini_recv ( linda );
+ err_init_recv:
+	linda_fini_send ( linda );
+ err_init_send:
+ err_init_ib_serdes:
+ err_read_eeprom:
+ err_init_i2c:
+	ibdev_put ( ibdev );
+ err_alloc_ibdev:
+	return rc;
+}
+
+/**
+ * Remove PCI device
+ *
+ * @v pci		PCI device
+ */
+static void linda_remove ( struct pci_device *pci ) {
+	struct ib_device *ibdev = pci_get_drvdata ( pci );
+	struct linda *linda = ib_get_drvdata ( ibdev );
+
+	unregister_ibdev ( ibdev );
+	linda_fini_recv ( linda );
+	linda_fini_send ( linda );
+	ibdev_put ( ibdev );
+}
+
+static struct pci_device_id linda_nics[] = {
+	PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
+};
+
+struct pci_driver linda_driver __pci_driver = {
+	.ids = linda_nics,
+	.id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
+	.probe = linda_probe,
+	.remove = linda_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda_fw.c ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda_fw.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda_fw.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda_fw.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1069 @@
+/*
+ * Copyright (c) 2007, 2008 QLogic Corporation. All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/*
+ * This file contains the memory image from the vendor, to be copied into
+ * the IB SERDES of the IBA7220 during initialization.
+ * The file also includes the two functions which use this image.
+ */
+
+#include <stdint.h>
+#include "linda.h"
+
+uint8_t linda_ib_fw[8192] = {
+/*0000*/0x02, 0x0A, 0x29, 0x02, 0x0A, 0x87, 0xE5, 0xE6,
+	0x30, 0xE6, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
+/*0010*/0x00, 0xE5, 0xE2, 0x30, 0xE4, 0x04, 0x7E, 0x01,
+	0x80, 0x02, 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x08,
+/*0020*/0x53, 0xF9, 0xF7, 0xE4, 0xF5, 0xFE, 0x80, 0x08,
+	0x7F, 0x0A, 0x12, 0x17, 0x31, 0x12, 0x0E, 0xA2,
+/*0030*/0x75, 0xFC, 0x08, 0xE4, 0xF5, 0xFD, 0xE5, 0xE7,
+	0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0x22, 0x00,
+/*0040*/0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x75,
+	0x51, 0x01, 0xE4, 0xF5, 0x52, 0xF5, 0x53, 0xF5,
+/*0050*/0x52, 0xF5, 0x7E, 0x7F, 0x04, 0x02, 0x04, 0x38,
+	0xC2, 0x36, 0x05, 0x52, 0xE5, 0x52, 0xD3, 0x94,
+/*0060*/0x0C, 0x40, 0x05, 0x75, 0x52, 0x01, 0xD2, 0x36,
+	0x90, 0x07, 0x0C, 0x74, 0x07, 0xF0, 0xA3, 0x74,
+/*0070*/0xFF, 0xF0, 0xE4, 0xF5, 0x0C, 0xA3, 0xF0, 0x90,
+	0x07, 0x14, 0xF0, 0xA3, 0xF0, 0x75, 0x0B, 0x20,
+/*0080*/0xF5, 0x09, 0xE4, 0xF5, 0x08, 0xE5, 0x08, 0xD3,
+	0x94, 0x30, 0x40, 0x03, 0x02, 0x04, 0x04, 0x12,
+/*0090*/0x00, 0x06, 0x15, 0x0B, 0xE5, 0x08, 0x70, 0x04,
+	0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x09,
+/*00A0*/0x70, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00,
+	0xEE, 0x5F, 0x60, 0x05, 0x12, 0x18, 0x71, 0xD2,
+/*00B0*/0x35, 0x53, 0xE1, 0xF7, 0xE5, 0x08, 0x45, 0x09,
+	0xFF, 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24,
+/*00C0*/0x83, 0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83,
+	0xEF, 0xF0, 0x85, 0xE2, 0x20, 0xE5, 0x52, 0xD3,
+/*00D0*/0x94, 0x01, 0x40, 0x0D, 0x12, 0x19, 0xF3, 0xE0,
+	0x54, 0xA0, 0x64, 0x40, 0x70, 0x03, 0x02, 0x03,
+/*00E0*/0xFB, 0x53, 0xF9, 0xF8, 0x90, 0x94, 0x70, 0xE4,
+	0xF0, 0xE0, 0xF5, 0x10, 0xAF, 0x09, 0x12, 0x1E,
+/*00F0*/0xB3, 0xAF, 0x08, 0xEF, 0x44, 0x08, 0xF5, 0x82,
+	0x75, 0x83, 0x80, 0xE0, 0xF5, 0x29, 0xEF, 0x44,
+/*0100*/0x07, 0x12, 0x1A, 0x3C, 0xF5, 0x22, 0x54, 0x40,
+	0xD3, 0x94, 0x00, 0x40, 0x1E, 0xE5, 0x29, 0x54,
+/*0110*/0xF0, 0x70, 0x21, 0x12, 0x19, 0xF3, 0xE0, 0x44,
+	0x80, 0xF0, 0xE5, 0x22, 0x54, 0x30, 0x65, 0x08,
+/*0120*/0x70, 0x09, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xBF,
+	0xF0, 0x80, 0x09, 0x12, 0x19, 0xF3, 0x74, 0x40,
+/*0130*/0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12, 0x75,
+	0x83, 0xAE, 0x74, 0xFF, 0xF0, 0xAF, 0x08, 0x7E,
+/*0140*/0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0xE0, 0xFD,
+	0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x81,
+/*0150*/0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xED,
+	0xF0, 0x90, 0x07, 0x0E, 0xE0, 0x04, 0xF0, 0xEF,
+/*0160*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0x98, 0xE0,
+	0xF5, 0x28, 0x12, 0x1A, 0x23, 0x40, 0x0C, 0x12,
+/*0170*/0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12, 0x1A, 0x32,
+	0x02, 0x03, 0xF6, 0xAF, 0x08, 0x7E, 0x00, 0x74,
+/*0180*/0x80, 0xCD, 0xEF, 0xCD, 0x8D, 0x82, 0xF5, 0x83,
+	0xE0, 0x30, 0xE0, 0x0A, 0x12, 0x19, 0xF3, 0xE0,
+/*0190*/0x44, 0x20, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x19,
+	0xF3, 0xE0, 0x54, 0xDF, 0xF0, 0xEE, 0x44, 0xAE,
+/*01A0*/0x12, 0x1A, 0x43, 0x30, 0xE4, 0x03, 0x02, 0x03,
+	0xFB, 0x74, 0x9E, 0x12, 0x1A, 0x05, 0x20, 0xE0,
+/*01B0*/0x03, 0x02, 0x03, 0xFB, 0x8F, 0x82, 0x8E, 0x83,
+	0xE0, 0x20, 0xE0, 0x03, 0x02, 0x03, 0xFB, 0x12,
+/*01C0*/0x19, 0xF3, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0xE3,
+	0x20, 0xE7, 0x08, 0xE5, 0x08, 0x12, 0x1A, 0x3A,
+/*01D0*/0x44, 0x04, 0xF0, 0xAF, 0x08, 0x7E, 0x00, 0xEF,
+	0x12, 0x1A, 0x3A, 0x20, 0xE2, 0x34, 0x12, 0x19,
+/*01E0*/0xF3, 0xE0, 0x44, 0x08, 0xF0, 0xE5, 0xE4, 0x30,
+	0xE6, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
+/*01F0*/0xE5, 0x7E, 0xC3, 0x94, 0x04, 0x50, 0x04, 0x7C,
+	0x01, 0x80, 0x02, 0x7C, 0x00, 0xEC, 0x4D, 0x60,
+/*0200*/0x05, 0xC2, 0x35, 0x02, 0x03, 0xFB, 0xEE, 0x44,
+	0xD2, 0x12, 0x1A, 0x43, 0x44, 0x40, 0xF0, 0x02,
+/*0210*/0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xF7,
+	0xF0, 0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0,
+/*0220*/0x54, 0xBF, 0xF0, 0x90, 0x07, 0x14, 0xE0, 0x04,
+	0xF0, 0xE5, 0x7E, 0x70, 0x03, 0x75, 0x7E, 0x01,
+/*0230*/0xAF, 0x08, 0x7E, 0x00, 0x12, 0x1A, 0x23, 0x40,
+	0x12, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12,
+/*0240*/0x19, 0xF2, 0xE0, 0x54, 0x02, 0x12, 0x1A, 0x32,
+	0x02, 0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x44,
+/*0250*/0x02, 0x12, 0x19, 0xF2, 0xE0, 0x54, 0xFE, 0xF0,
+	0xC2, 0x35, 0xEE, 0x44, 0x8A, 0x8F, 0x82, 0xF5,
+/*0260*/0x83, 0xE0, 0xF5, 0x17, 0x54, 0x8F, 0x44, 0x40,
+	0xF0, 0x74, 0x90, 0xFC, 0xE5, 0x08, 0x44, 0x07,
+/*0270*/0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0x54, 0x3F,
+	0x90, 0x07, 0x02, 0xF0, 0xE0, 0x54, 0xC0, 0x8D,
+/*0280*/0x82, 0x8C, 0x83, 0xF0, 0x74, 0x92, 0x12, 0x1A,
+	0x05, 0x90, 0x07, 0x03, 0x12, 0x1A, 0x19, 0x74,
+/*0290*/0x82, 0x12, 0x1A, 0x05, 0x90, 0x07, 0x04, 0x12,
+	0x1A, 0x19, 0x74, 0xB4, 0x12, 0x1A, 0x05, 0x90,
+/*02A0*/0x07, 0x05, 0x12, 0x1A, 0x19, 0x74, 0x94, 0xFE,
+	0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A, 0xF5,
+/*02B0*/0x10, 0x30, 0xE0, 0x04, 0xD2, 0x37, 0x80, 0x02,
+	0xC2, 0x37, 0xE5, 0x10, 0x54, 0x7F, 0x8F, 0x82,
+/*02C0*/0x8E, 0x83, 0xF0, 0x30, 0x44, 0x30, 0x12, 0x1A,
+	0x03, 0x54, 0x80, 0xD3, 0x94, 0x00, 0x40, 0x04,
+/*02D0*/0xD2, 0x39, 0x80, 0x02, 0xC2, 0x39, 0x8F, 0x82,
+	0x8E, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0x1A,
+/*02E0*/0x03, 0x54, 0x40, 0xD3, 0x94, 0x00, 0x40, 0x04,
+	0xD2, 0x3A, 0x80, 0x02, 0xC2, 0x3A, 0x8F, 0x82,
+/*02F0*/0x8E, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x74, 0x92,
+	0xFE, 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A,
+/*0300*/0x30, 0xE7, 0x04, 0xD2, 0x38, 0x80, 0x02, 0xC2,
+	0x38, 0x8F, 0x82, 0x8E, 0x83, 0xE0, 0x54, 0x7F,
+/*0310*/0xF0, 0x12, 0x1E, 0x46, 0xE4, 0xF5, 0x0A, 0x20,
+	0x03, 0x02, 0x80, 0x03, 0x30, 0x43, 0x03, 0x12,
+/*0320*/0x19, 0x95, 0x20, 0x02, 0x02, 0x80, 0x03, 0x30,
+	0x42, 0x03, 0x12, 0x0C, 0x8F, 0x30, 0x30, 0x06,
+/*0330*/0x12, 0x19, 0x95, 0x12, 0x0C, 0x8F, 0x12, 0x0D,
+	0x47, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xFB, 0xF0,
+/*0340*/0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, 0x46, 0x43,
+	0xE1, 0x08, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x04,
+/*0350*/0xF0, 0xE5, 0xE4, 0x20, 0xE7, 0x2A, 0x12, 0x1A,
+	0x12, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
+/*0360*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
+	0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
+/*0370*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
+	0x5E, 0x60, 0x05, 0x12, 0x1D, 0xD7, 0x80, 0x17,
+/*0380*/0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x44,
+	0x08, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12,
+/*0390*/0x75, 0x83, 0xD2, 0xE0, 0x54, 0xF7, 0xF0, 0x12,
+	0x1E, 0x46, 0x7F, 0x08, 0x12, 0x17, 0x31, 0x74,
+/*03A0*/0x8E, 0xFE, 0x12, 0x1A, 0x12, 0x8E, 0x83, 0xE0,
+	0xF5, 0x10, 0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44,
+/*03B0*/0x01, 0xFF, 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07,
+	0xF5, 0x82, 0xEF, 0xF0, 0xE5, 0x10, 0x54, 0xFE,
+/*03C0*/0xFF, 0xED, 0x44, 0x07, 0xF5, 0x82, 0xEF, 0x12,
+	0x1A, 0x11, 0x75, 0x83, 0x86, 0xE0, 0x44, 0x10,
+/*03D0*/0x12, 0x1A, 0x11, 0xE0, 0x44, 0x10, 0xF0, 0x12,
+	0x19, 0xF3, 0xE0, 0x54, 0xFD, 0x44, 0x01, 0xFF,
+/*03E0*/0x12, 0x19, 0xF3, 0xEF, 0x12, 0x1A, 0x32, 0x30,
+	0x32, 0x0C, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
+/*03F0*/0x75, 0x83, 0x82, 0x74, 0x05, 0xF0, 0xAF, 0x0B,
+	0x12, 0x18, 0xD7, 0x74, 0x10, 0x25, 0x08, 0xF5,
+/*0400*/0x08, 0x02, 0x00, 0x85, 0x05, 0x09, 0xE5, 0x09,
+	0xD3, 0x94, 0x07, 0x50, 0x03, 0x02, 0x00, 0x82,
+/*0410*/0xE5, 0x7E, 0xD3, 0x94, 0x00, 0x40, 0x04, 0x7F,
+	0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x7E, 0xC3,
+/*0420*/0x94, 0xFA, 0x50, 0x04, 0x7E, 0x01, 0x80, 0x02,
+	0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x02, 0x05, 0x7E,
+/*0430*/0x30, 0x35, 0x0B, 0x43, 0xE1, 0x01, 0x7F, 0x09,
+	0x12, 0x17, 0x31, 0x02, 0x00, 0x58, 0x53, 0xE1,
+/*0440*/0xFE, 0x02, 0x00, 0x58, 0x8E, 0x6A, 0x8F, 0x6B,
+	0x8C, 0x6C, 0x8D, 0x6D, 0x75, 0x6E, 0x01, 0x75,
+/*0450*/0x6F, 0x01, 0x75, 0x70, 0x01, 0xE4, 0xF5, 0x73,
+	0xF5, 0x74, 0xF5, 0x75, 0x90, 0x07, 0x2F, 0xF0,
+/*0460*/0xF5, 0x3C, 0xF5, 0x3E, 0xF5, 0x46, 0xF5, 0x47,
+	0xF5, 0x3D, 0xF5, 0x3F, 0xF5, 0x6F, 0xE5, 0x6F,
+/*0470*/0x70, 0x0F, 0xE5, 0x6B, 0x45, 0x6A, 0x12, 0x07,
+	0x2A, 0x75, 0x83, 0x80, 0x74, 0x3A, 0xF0, 0x80,
+/*0480*/0x09, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74,
+	0x1A, 0xF0, 0xE4, 0xF5, 0x6E, 0xC3, 0x74, 0x3F,
+/*0490*/0x95, 0x6E, 0xFF, 0x12, 0x08, 0x65, 0x75, 0x83,
+	0x82, 0xEF, 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x08,
+/*04A0*/0xC6, 0xE5, 0x33, 0xF0, 0x12, 0x08, 0xFA, 0x12,
+	0x08, 0xB1, 0x40, 0xE1, 0xE5, 0x6F, 0x70, 0x0B,
+/*04B0*/0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74, 0x36,
+	0xF0, 0x80, 0x09, 0x12, 0x07, 0x2A, 0x75, 0x83,
+/*04C0*/0x80, 0x74, 0x16, 0xF0, 0x75, 0x6E, 0x01, 0x12,
+	0x07, 0x2A, 0x75, 0x83, 0xB4, 0xE5, 0x6E, 0xF0,
+/*04D0*/0x12, 0x1A, 0x4D, 0x74, 0x3F, 0x25, 0x6E, 0xF5,
+	0x82, 0xE4, 0x34, 0x00, 0xF5, 0x83, 0xE5, 0x33,
+/*04E0*/0xF0, 0x74, 0xBF, 0x25, 0x6E, 0xF5, 0x82, 0xE4,
+	0x34, 0x00, 0x12, 0x08, 0xB1, 0x40, 0xD8, 0xE4,
+/*04F0*/0xF5, 0x70, 0xF5, 0x46, 0xF5, 0x47, 0xF5, 0x6E,
+	0x12, 0x08, 0xFA, 0xF5, 0x83, 0xE0, 0xFE, 0x12,
+/*0500*/0x08, 0xC6, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF,
+	0xEC, 0x3E, 0xFE, 0xAD, 0x3B, 0xD3, 0xEF, 0x9D,
+/*0510*/0xEE, 0x9C, 0x50, 0x04, 0x7B, 0x01, 0x80, 0x02,
+	0x7B, 0x00, 0xE5, 0x70, 0x70, 0x04, 0x7A, 0x01,
+/*0520*/0x80, 0x02, 0x7A, 0x00, 0xEB, 0x5A, 0x60, 0x06,
+	0x85, 0x6E, 0x46, 0x75, 0x70, 0x01, 0xD3, 0xEF,
+/*0530*/0x9D, 0xEE, 0x9C, 0x50, 0x04, 0x7F, 0x01, 0x80,
+	0x02, 0x7F, 0x00, 0xE5, 0x70, 0xB4, 0x01, 0x04,
+/*0540*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, 0x5E,
+	0x60, 0x03, 0x85, 0x6E, 0x47, 0x05, 0x6E, 0xE5,
+/*0550*/0x6E, 0x64, 0x7F, 0x70, 0xA3, 0xE5, 0x46, 0x60,
+	0x05, 0xE5, 0x47, 0xB4, 0x7E, 0x03, 0x85, 0x46,
+/*0560*/0x47, 0xE5, 0x6F, 0x70, 0x08, 0x85, 0x46, 0x76,
+	0x85, 0x47, 0x77, 0x80, 0x0E, 0xC3, 0x74, 0x7F,
+/*0570*/0x95, 0x46, 0xF5, 0x78, 0xC3, 0x74, 0x7F, 0x95,
+	0x47, 0xF5, 0x79, 0xE5, 0x6F, 0x70, 0x37, 0xE5,
+/*0580*/0x46, 0x65, 0x47, 0x70, 0x0C, 0x75, 0x73, 0x01,
+	0x75, 0x74, 0x01, 0xF5, 0x3C, 0xF5, 0x3D, 0x80,
+/*0590*/0x35, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5, 0x47, 0x95,
+	0x46, 0xF5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
+/*05A0*/0x46, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
+	0xE4, 0xF5, 0x3D, 0x80, 0x40, 0xC3, 0x74, 0x3F,
+/*05B0*/0x95, 0x72, 0xF5, 0x3D, 0x80, 0x37, 0xE5, 0x46,
+	0x65, 0x47, 0x70, 0x0F, 0x75, 0x73, 0x01, 0x75,
+/*05C0*/0x75, 0x01, 0xF5, 0x3E, 0xF5, 0x3F, 0x75, 0x4E,
+	0x01, 0x80, 0x22, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5,
+/*05D0*/0x47, 0x95, 0x46, 0xF5, 0x3E, 0xC3, 0x13, 0xF5,
+	0x71, 0x25, 0x46, 0xF5, 0x72, 0xD3, 0x94, 0x3F,
+/*05E0*/0x50, 0x05, 0xE4, 0xF5, 0x3F, 0x80, 0x06, 0xE5,
+	0x72, 0x24, 0xC1, 0xF5, 0x3F, 0x05, 0x6F, 0xE5,
+/*05F0*/0x6F, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, 0x04,
+	0x6E, 0xE5, 0x6D, 0x45, 0x6C, 0x70, 0x02, 0x80,
+/*0600*/0x04, 0xE5, 0x74, 0x45, 0x75, 0x90, 0x07, 0x2F,
+	0xF0, 0x7F, 0x01, 0xE5, 0x3E, 0x60, 0x04, 0xE5,
+/*0610*/0x3C, 0x70, 0x14, 0xE4, 0xF5, 0x3C, 0xF5, 0x3D,
+	0xF5, 0x3E, 0xF5, 0x3F, 0x12, 0x08, 0xD2, 0x70,
+/*0620*/0x04, 0xF0, 0x02, 0x06, 0xA4, 0x80, 0x7A, 0xE5,
+	0x3C, 0xC3, 0x95, 0x3E, 0x40, 0x07, 0xE5, 0x3C,
+/*0630*/0x95, 0x3E, 0xFF, 0x80, 0x06, 0xC3, 0xE5, 0x3E,
+	0x95, 0x3C, 0xFF, 0xE5, 0x76, 0xD3, 0x95, 0x79,
+/*0640*/0x40, 0x05, 0x85, 0x76, 0x7A, 0x80, 0x03, 0x85,
+	0x79, 0x7A, 0xE5, 0x77, 0xC3, 0x95, 0x78, 0x50,
+/*0650*/0x05, 0x85, 0x77, 0x7B, 0x80, 0x03, 0x85, 0x78,
+	0x7B, 0xE5, 0x7B, 0xD3, 0x95, 0x7A, 0x40, 0x30,
+/*0660*/0xE5, 0x7B, 0x95, 0x7A, 0xF5, 0x3C, 0xF5, 0x3E,
+	0xC3, 0xE5, 0x7B, 0x95, 0x7A, 0x90, 0x07, 0x19,
+/*0670*/0xF0, 0xE5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
+	0x7A, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
+/*0680*/0xE4, 0xF5, 0x3D, 0x80, 0x1F, 0xC3, 0x74, 0x3F,
+	0x95, 0x72, 0xF5, 0x3D, 0xF5, 0x3F, 0x80, 0x14,
+/*0690*/0xE4, 0xF5, 0x3C, 0xF5, 0x3E, 0x90, 0x07, 0x19,
+	0xF0, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
+/*06A0*/0x03, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x65, 0x75,
+	0x83, 0xD0, 0xE0, 0x54, 0x0F, 0xFE, 0xAD, 0x3C,
+/*06B0*/0x70, 0x02, 0x7E, 0x07, 0xBE, 0x0F, 0x02, 0x7E,
+	0x80, 0xEE, 0xFB, 0xEF, 0xD3, 0x9B, 0x74, 0x80,
+/*06C0*/0xF8, 0x98, 0x40, 0x1F, 0xE4, 0xF5, 0x3C, 0xF5,
+	0x3E, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
+/*06D0*/0x12, 0x74, 0x01, 0xF0, 0xE5, 0x08, 0xFB, 0xEB,
+	0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xD2, 0xE0,
+/*06E0*/0x44, 0x10, 0xF0, 0xE5, 0x08, 0xFB, 0xEB, 0x44,
+	0x09, 0xF5, 0x82, 0x75, 0x83, 0x9E, 0xED, 0xF0,
+/*06F0*/0xEB, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xCA,
+	0xED, 0xF0, 0x12, 0x08, 0x65, 0x75, 0x83, 0xCC,
+/*0700*/0xEF, 0xF0, 0x22, 0xE5, 0x08, 0x44, 0x07, 0xF5,
+	0x82, 0x75, 0x83, 0xBC, 0xE0, 0x54, 0xF0, 0xF0,
+/*0710*/0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83,
+	0xBE, 0xE0, 0x54, 0xF0, 0xF0, 0xE5, 0x08, 0x44,
+/*0720*/0x07, 0xF5, 0x82, 0x75, 0x83, 0xC0, 0xE0, 0x54,
+	0xF0, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
+/*0730*/0x22, 0xF0, 0x90, 0x07, 0x28, 0xE0, 0xFE, 0xA3,
+	0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0x85, 0x42,
+/*0740*/0x42, 0x85, 0x41, 0x41, 0x85, 0x40, 0x40, 0x74,
+	0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E, 0xF5,
+/*0750*/0x83, 0xE5, 0x42, 0xF0, 0x74, 0xE0, 0x2F, 0xF5,
+	0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xE5,
+/*0760*/0x42, 0x29, 0xFD, 0xE4, 0x33, 0xFC, 0xE5, 0x3C,
+	0xC3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80,
+/*0770*/0x98, 0x22, 0xF5, 0x83, 0xE0, 0x90, 0x07, 0x22,
+	0x54, 0x1F, 0xFD, 0xE0, 0xFA, 0xA3, 0xE0, 0xF5,
+/*0780*/0x82, 0x8A, 0x83, 0xED, 0xF0, 0x22, 0x90, 0x07,
+	0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C,
+/*0790*/0x83, 0x22, 0x90, 0x07, 0x24, 0xFF, 0xED, 0x44,
+	0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x85,
+/*07A0*/0x38, 0x38, 0x85, 0x39, 0x39, 0x85, 0x3A, 0x3A,
+	0x74, 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E,
+/*07B0*/0xF5, 0x83, 0x22, 0x90, 0x07, 0x26, 0xFF, 0xED,
+	0x44, 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
+/*07C0*/0xF0, 0x74, 0xA0, 0x2F, 0xF5, 0x82, 0x74, 0x02,
+	0x3E, 0xF5, 0x83, 0x22, 0x74, 0xC0, 0x25, 0x11,
+/*07D0*/0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0x22,
+	0x74, 0x00, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
+/*07E0*/0x02, 0xF5, 0x83, 0x22, 0x74, 0x60, 0x25, 0x11,
+	0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
+/*07F0*/0x74, 0x80, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
+	0x03, 0xF5, 0x83, 0x22, 0x74, 0xE0, 0x25, 0x11,
+/*0800*/0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
+	0x74, 0x40, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
+/*0810*/0x06, 0xF5, 0x83, 0x22, 0x74, 0x80, 0x2F, 0xF5,
+	0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xAF,
+/*0820*/0x08, 0x7E, 0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82,
+	0x22, 0xF5, 0x83, 0xE5, 0x82, 0x44, 0x07, 0xF5,
+/*0830*/0x82, 0xE5, 0x40, 0xF0, 0x22, 0x74, 0x40, 0x25,
+	0x11, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
+/*0840*/0x22, 0x74, 0xC0, 0x25, 0x11, 0xF5, 0x82, 0xE4,
+	0x34, 0x03, 0xF5, 0x83, 0x22, 0x74, 0x00, 0x25,
+/*0850*/0x11, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83,
+	0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
+/*0860*/0x34, 0x06, 0xF5, 0x83, 0x22, 0xE5, 0x08, 0xFD,
+	0xED, 0x44, 0x07, 0xF5, 0x82, 0x22, 0xE5, 0x41,
+/*0870*/0xF0, 0xE5, 0x65, 0x64, 0x01, 0x45, 0x64, 0x22,
+	0x7E, 0x00, 0xFB, 0x7A, 0x00, 0xFD, 0x7C, 0x00,
+/*0880*/0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
+	0x34, 0x02, 0x22, 0x74, 0xA0, 0x25, 0x11, 0xF5,
+/*0890*/0x82, 0xE4, 0x34, 0x03, 0x22, 0x85, 0x3E, 0x42,
+	0x85, 0x3F, 0x41, 0x8F, 0x40, 0x22, 0x85, 0x3C,
+/*08A0*/0x42, 0x85, 0x3D, 0x41, 0x8F, 0x40, 0x22, 0x75,
+	0x45, 0x3F, 0x90, 0x07, 0x20, 0xE4, 0xF0, 0xA3,
+/*08B0*/0x22, 0xF5, 0x83, 0xE5, 0x32, 0xF0, 0x05, 0x6E,
+	0xE5, 0x6E, 0xC3, 0x94, 0x40, 0x22, 0xF0, 0xE5,
+/*08C0*/0x08, 0x44, 0x06, 0xF5, 0x82, 0x22, 0x74, 0x00,
+	0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x00, 0xF5,
+/*08D0*/0x83, 0x22, 0xE5, 0x6D, 0x45, 0x6C, 0x90, 0x07,
+	0x2F, 0x22, 0xE4, 0xF9, 0xE5, 0x3C, 0xD3, 0x95,
+/*08E0*/0x3E, 0x22, 0x74, 0x80, 0x2E, 0xF5, 0x82, 0xE4,
+	0x34, 0x02, 0xF5, 0x83, 0xE0, 0x22, 0x74, 0xA0,
+/*08F0*/0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
+	0xE0, 0x22, 0x74, 0x80, 0x25, 0x6E, 0xF5, 0x82,
+/*0900*/0xE4, 0x34, 0x00, 0x22, 0x25, 0x42, 0xFD, 0xE4,
+	0x33, 0xFC, 0x22, 0x85, 0x42, 0x42, 0x85, 0x41,
+/*0910*/0x41, 0x85, 0x40, 0x40, 0x22, 0xED, 0x4C, 0x60,
+	0x03, 0x02, 0x09, 0xE5, 0xEF, 0x4E, 0x70, 0x37,
+/*0920*/0x90, 0x07, 0x26, 0x12, 0x07, 0x89, 0xE0, 0xFD,
+	0x12, 0x07, 0xCC, 0xED, 0xF0, 0x90, 0x07, 0x28,
+/*0930*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xD8,
+	0xED, 0xF0, 0x12, 0x07, 0x86, 0xE0, 0x54, 0x1F,
+/*0940*/0xFD, 0x12, 0x08, 0x81, 0xF5, 0x83, 0xED, 0xF0,
+	0x90, 0x07, 0x24, 0x12, 0x07, 0x89, 0xE0, 0x54,
+/*0950*/0x1F, 0xFD, 0x12, 0x08, 0x35, 0xED, 0xF0, 0xEF,
+	0x64, 0x04, 0x4E, 0x70, 0x37, 0x90, 0x07, 0x26,
+/*0960*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xE4,
+	0xED, 0xF0, 0x90, 0x07, 0x28, 0x12, 0x07, 0x89,
+/*0970*/0xE0, 0xFD, 0x12, 0x07, 0xF0, 0xED, 0xF0, 0x12,
+	0x07, 0x86, 0xE0, 0x54, 0x1F, 0xFD, 0x12, 0x08,
+/*0980*/0x8B, 0xF5, 0x83, 0xED, 0xF0, 0x90, 0x07, 0x24,
+	0x12, 0x07, 0x89, 0xE0, 0x54, 0x1F, 0xFD, 0x12,
+/*0990*/0x08, 0x41, 0xED, 0xF0, 0xEF, 0x64, 0x01, 0x4E,
+	0x70, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
+/*09A0*/0xEF, 0x64, 0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01,
+	0x80, 0x02, 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x78,
+/*09B0*/0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE0, 0xFF,
+	0x12, 0x07, 0xFC, 0xEF, 0x12, 0x07, 0x31, 0xE0,
+/*09C0*/0xFF, 0x12, 0x08, 0x08, 0xEF, 0xF0, 0x90, 0x07,
+	0x22, 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF,
+/*09D0*/0x12, 0x08, 0x4D, 0xEF, 0xF0, 0x90, 0x07, 0x24,
+	0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
+/*09E0*/0x08, 0x59, 0xEF, 0xF0, 0x22, 0x12, 0x07, 0xCC,
+	0xE4, 0xF0, 0x12, 0x07, 0xD8, 0xE4, 0xF0, 0x12,
+/*09F0*/0x08, 0x81, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08,
+	0x35, 0x74, 0x14, 0xF0, 0x12, 0x07, 0xE4, 0xE4,
+/*0A00*/0xF0, 0x12, 0x07, 0xF0, 0xE4, 0xF0, 0x12, 0x08,
+	0x8B, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08, 0x41,
+/*0A10*/0x74, 0x14, 0xF0, 0x12, 0x07, 0xFC, 0xE4, 0xF0,
+	0x12, 0x08, 0x08, 0xE4, 0xF0, 0x12, 0x08, 0x4D,
+/*0A20*/0xE4, 0xF0, 0x12, 0x08, 0x59, 0x74, 0x14, 0xF0,
+	0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFC, 0x10, 0xE4,
+/*0A30*/0xF5, 0xFD, 0x75, 0xFE, 0x30, 0xF5, 0xFF, 0xE5,
+	0xE7, 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0xE5,
+/*0A40*/0xE6, 0x20, 0xE7, 0x0B, 0x78, 0xFF, 0xE4, 0xF6,
+	0xD8, 0xFD, 0x53, 0xE6, 0xFE, 0x80, 0x09, 0x78,
+/*0A50*/0x08, 0xE4, 0xF6, 0xD8, 0xFD, 0x53, 0xE6, 0xFE,
+	0x75, 0x81, 0x80, 0xE4, 0xF5, 0xA8, 0xD2, 0xA8,
+/*0A60*/0xC2, 0xA9, 0xD2, 0xAF, 0xE5, 0xE2, 0x20, 0xE5,
+	0x05, 0x20, 0xE6, 0x02, 0x80, 0x03, 0x43, 0xE1,
+/*0A70*/0x02, 0xE5, 0xE2, 0x20, 0xE0, 0x0E, 0x90, 0x00,
+	0x00, 0x7F, 0x00, 0x7E, 0x08, 0xE4, 0xF0, 0xA3,
+/*0A80*/0xDF, 0xFC, 0xDE, 0xFA, 0x02, 0x0A, 0xDB, 0x43,
+	0xFA, 0x01, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83,
+/*0A90*/0xC0, 0x82, 0xC0, 0xD0, 0x12, 0x1C, 0xE7, 0xD0,
+	0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0,
+/*0AA0*/0xE0, 0x53, 0xFA, 0xFE, 0x32, 0x02, 0x1B, 0x55,
+	0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xF6,
+/*0AB0*/0x08, 0xDF, 0xF9, 0x80, 0x29, 0xE4, 0x93, 0xA3,
+	0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33,
+/*0AC0*/0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40,
+	0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF,
+/*0AD0*/0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10,
+	0x20, 0x40, 0x80, 0x90, 0x00, 0x3F, 0xE4, 0x7E,
+/*0AE0*/0x01, 0x93, 0x60, 0xC1, 0xA3, 0xFF, 0x54, 0x3F,
+	0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93,
+/*0AF0*/0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25,
+	0xE0, 0x60, 0xAD, 0x40, 0xB8, 0x80, 0xFE, 0x8C,
+/*0B00*/0x64, 0x8D, 0x65, 0x8A, 0x66, 0x8B, 0x67, 0xE4,
+	0xF5, 0x69, 0xEF, 0x4E, 0x70, 0x03, 0x02, 0x1D,
+/*0B10*/0x55, 0xE4, 0xF5, 0x68, 0xE5, 0x67, 0x45, 0x66,
+	0x70, 0x32, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90,
+/*0B20*/0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE4,
+	0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4, 0x12,
+/*0B30*/0x08, 0x70, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
+	0x83, 0x92, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83,
+/*0B40*/0xC6, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8,
+	0xE4, 0xF0, 0x80, 0x11, 0x90, 0x07, 0x26, 0x12,
+/*0B50*/0x07, 0x35, 0xE4, 0x12, 0x08, 0x70, 0x70, 0x05,
+	0x12, 0x07, 0x32, 0xE4, 0xF0, 0x12, 0x1D, 0x55,
+/*0B60*/0x12, 0x1E, 0xBF, 0xE5, 0x67, 0x45, 0x66, 0x70,
+	0x33, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90, 0xE5,
+/*0B70*/0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
+	0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x12,
+/*0B80*/0x08, 0x6E, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
+	0x83, 0x92, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
+/*0B90*/0x83, 0xC6, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
+	0x83, 0xC8, 0x80, 0x0E, 0x90, 0x07, 0x26, 0x12,
+/*0BA0*/0x07, 0x35, 0x12, 0x08, 0x6E, 0x70, 0x06, 0x12,
+	0x07, 0x32, 0xE5, 0x40, 0xF0, 0xAF, 0x69, 0x7E,
+/*0BB0*/0x00, 0xAD, 0x67, 0xAC, 0x66, 0x12, 0x04, 0x44,
+	0x12, 0x07, 0x2A, 0x75, 0x83, 0xCA, 0xE0, 0xD3,
+/*0BC0*/0x94, 0x00, 0x50, 0x0C, 0x05, 0x68, 0xE5, 0x68,
+	0xC3, 0x94, 0x05, 0x50, 0x03, 0x02, 0x0B, 0x14,
+/*0BD0*/0x22, 0x8C, 0x60, 0x8D, 0x61, 0x12, 0x08, 0xDA,
+	0x74, 0x20, 0x40, 0x0D, 0x2F, 0xF5, 0x82, 0x74,
+/*0BE0*/0x03, 0x3E, 0xF5, 0x83, 0xE5, 0x3E, 0xF0, 0x80,
+	0x0B, 0x2F, 0xF5, 0x82, 0x74, 0x03, 0x3E, 0xF5,
+/*0BF0*/0x83, 0xE5, 0x3C, 0xF0, 0xE5, 0x3C, 0xD3, 0x95,
+	0x3E, 0x40, 0x3C, 0xE5, 0x61, 0x45, 0x60, 0x70,
+/*0C00*/0x10, 0xE9, 0x12, 0x09, 0x04, 0xE5, 0x3E, 0x12,
+	0x07, 0x68, 0x40, 0x3B, 0x12, 0x08, 0x95, 0x80,
+/*0C10*/0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40, 0x1D,
+	0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05, 0x85,
+/*0C20*/0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F,
+	0x3A, 0x12, 0x08, 0x14, 0xE5, 0x3E, 0x12, 0x07,
+/*0C30*/0xC0, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x43, 0xE5,
+	0x61, 0x45, 0x60, 0x70, 0x19, 0x12, 0x07, 0x5F,
+/*0C40*/0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x27, 0x12,
+	0x09, 0x0B, 0x12, 0x08, 0x14, 0xE5, 0x42, 0x12,
+/*0C50*/0x07, 0xC0, 0xE5, 0x41, 0xF0, 0x22, 0xE5, 0x3C,
+	0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C, 0x38,
+/*0C60*/0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39, 0x80,
+	0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x08,
+/*0C70*/0x14, 0xE5, 0x3C, 0x12, 0x07, 0xC0, 0xE5, 0x3D,
+	0xF0, 0x22, 0x85, 0x38, 0x38, 0x85, 0x39, 0x39,
+/*0C80*/0x85, 0x3A, 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x38,
+	0x12, 0x07, 0xC0, 0xE5, 0x39, 0xF0, 0x22, 0x7F,
+/*0C90*/0x06, 0x12, 0x17, 0x31, 0x12, 0x1D, 0x23, 0x12,
+	0x0E, 0x04, 0x12, 0x0E, 0x33, 0xE0, 0x44, 0x0A,
+/*0CA0*/0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E, 0x04, 0x12,
+	0x0E, 0x0B, 0xEF, 0xF0, 0xE5, 0x28, 0x30, 0xE5,
+/*0CB0*/0x03, 0xD3, 0x80, 0x01, 0xC3, 0x40, 0x05, 0x75,
+	0x14, 0x20, 0x80, 0x03, 0x75, 0x14, 0x08, 0x12,
+/*0CC0*/0x0E, 0x04, 0x75, 0x83, 0x8A, 0xE5, 0x14, 0xF0,
+	0xB4, 0xFF, 0x05, 0x75, 0x12, 0x80, 0x80, 0x06,
+/*0CD0*/0xE5, 0x14, 0xC3, 0x13, 0xF5, 0x12, 0xE4, 0xF5,
+	0x16, 0xF5, 0x7F, 0x12, 0x19, 0x36, 0x12, 0x13,
+/*0CE0*/0xA3, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x50, 0x09,
+	0x05, 0x16, 0xE5, 0x16, 0xC3, 0x94, 0x14, 0x40,
+/*0CF0*/0xEA, 0xE5, 0xE4, 0x20, 0xE7, 0x28, 0x12, 0x0E,
+	0x04, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
+/*0D00*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
+	0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
+/*0D10*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
+	0x5E, 0x60, 0x03, 0x12, 0x1D, 0xD7, 0xE5, 0x7F,
+/*0D20*/0xC3, 0x94, 0x11, 0x40, 0x14, 0x12, 0x0E, 0x04,
+	0x75, 0x83, 0xD2, 0xE0, 0x44, 0x80, 0xF0, 0xE5,
+/*0D30*/0xE4, 0x20, 0xE7, 0x0F, 0x12, 0x1D, 0xD7, 0x80,
+	0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0xD2, 0xE0,
+/*0D40*/0x54, 0x7F, 0xF0, 0x12, 0x1D, 0x23, 0x22, 0x74,
+	0x8A, 0x85, 0x08, 0x82, 0xF5, 0x83, 0xE5, 0x17,
+/*0D50*/0xF0, 0x12, 0x0E, 0x3A, 0xE4, 0xF0, 0x90, 0x07,
+	0x02, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x90,
+/*0D60*/0xEF, 0xF0, 0x74, 0x92, 0xFE, 0xE5, 0x08, 0x44,
+	0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x54,
+/*0D70*/0xC0, 0xFD, 0x90, 0x07, 0x03, 0xE0, 0x54, 0x3F,
+	0x4D, 0x8F, 0x82, 0x8E, 0x83, 0xF0, 0x90, 0x07,
+/*0D80*/0x04, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x82,
+	0xEF, 0xF0, 0x90, 0x07, 0x05, 0xE0, 0xFF, 0xED,
+/*0D90*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xB4, 0xEF,
+	0x12, 0x0E, 0x03, 0x75, 0x83, 0x80, 0xE0, 0x54,
+/*0DA0*/0xBF, 0xF0, 0x30, 0x37, 0x0A, 0x12, 0x0E, 0x91,
+	0x75, 0x83, 0x94, 0xE0, 0x44, 0x80, 0xF0, 0x30,
+/*0DB0*/0x38, 0x0A, 0x12, 0x0E, 0x91, 0x75, 0x83, 0x92,
+	0xE0, 0x44, 0x80, 0xF0, 0xE5, 0x28, 0x30, 0xE4,
+/*0DC0*/0x1A, 0x20, 0x39, 0x0A, 0x12, 0x0E, 0x04, 0x75,
+	0x83, 0x88, 0xE0, 0x54, 0x7F, 0xF0, 0x20, 0x3A,
+/*0DD0*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x88, 0xE0,
+	0x54, 0xBF, 0xF0, 0x74, 0x8C, 0xFE, 0x12, 0x0E,
+/*0DE0*/0x04, 0x8E, 0x83, 0xE0, 0x54, 0x0F, 0x12, 0x0E,
+	0x03, 0x75, 0x83, 0x86, 0xE0, 0x54, 0xBF, 0xF0,
+/*0DF0*/0xE5, 0x08, 0x44, 0x06, 0x12, 0x0D, 0xFD, 0x75,
+	0x83, 0x8A, 0xE4, 0xF0, 0x22, 0xF5, 0x82, 0x75,
+/*0E00*/0x83, 0x82, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07,
+	0xF5, 0x82, 0x22, 0x8E, 0x83, 0xE0, 0xF5, 0x10,
+/*0E10*/0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44, 0x01, 0xFF,
+	0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07, 0xF5, 0x82,
+/*0E20*/0x22, 0xE5, 0x15, 0xC4, 0x54, 0x07, 0xFF, 0xE5,
+	0x08, 0xFD, 0xED, 0x44, 0x08, 0xF5, 0x82, 0x75,
+/*0E30*/0x83, 0x82, 0x22, 0x75, 0x83, 0x80, 0xE0, 0x44,
+	0x40, 0xF0, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
+/*0E40*/0x75, 0x83, 0x8A, 0x22, 0xE5, 0x16, 0x25, 0xE0,
+	0x25, 0xE0, 0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34,
+/*0E50*/0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0D, 0x22,
+	0x43, 0xE1, 0x10, 0x43, 0xE1, 0x80, 0x53, 0xE1,
+/*0E60*/0xFD, 0x85, 0xE1, 0x10, 0x22, 0xE5, 0x16, 0x25,
+	0xE0, 0x25, 0xE0, 0x24, 0xB2, 0xF5, 0x82, 0xE4,
+/*0E70*/0x34, 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0x85,
+	0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15, 0xF0,
+/*0E80*/0x22, 0xE5, 0xE2, 0x54, 0x20, 0xD3, 0x94, 0x00,
+	0x22, 0xE5, 0xE2, 0x54, 0x40, 0xD3, 0x94, 0x00,
+/*0E90*/0x22, 0xE5, 0x08, 0x44, 0x06, 0xF5, 0x82, 0x22,
+	0xFD, 0xE5, 0x08, 0xFB, 0xEB, 0x44, 0x07, 0xF5,
+/*0EA0*/0x82, 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFE, 0x30,
+	0x22, 0xEF, 0x4E, 0x70, 0x26, 0x12, 0x07, 0xCC,
+/*0EB0*/0xE0, 0xFD, 0x90, 0x07, 0x26, 0x12, 0x07, 0x7B,
+	0x12, 0x07, 0xD8, 0xE0, 0xFD, 0x90, 0x07, 0x28,
+/*0EC0*/0x12, 0x07, 0x7B, 0x12, 0x08, 0x81, 0x12, 0x07,
+	0x72, 0x12, 0x08, 0x35, 0xE0, 0x90, 0x07, 0x24,
+/*0ED0*/0x12, 0x07, 0x78, 0xEF, 0x64, 0x04, 0x4E, 0x70,
+	0x29, 0x12, 0x07, 0xE4, 0xE0, 0xFD, 0x90, 0x07,
+/*0EE0*/0x26, 0x12, 0x07, 0x7B, 0x12, 0x07, 0xF0, 0xE0,
+	0xFD, 0x90, 0x07, 0x28, 0x12, 0x07, 0x7B, 0x12,
+/*0EF0*/0x08, 0x8B, 0x12, 0x07, 0x72, 0x12, 0x08, 0x41,
+	0xE0, 0x54, 0x1F, 0xFD, 0x90, 0x07, 0x24, 0x12,
+/*0F00*/0x07, 0x7B, 0xEF, 0x64, 0x01, 0x4E, 0x70, 0x04,
+	0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0xEF, 0x64,
+/*0F10*/0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02,
+	0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x35, 0x12, 0x07,
+/*0F20*/0xFC, 0xE0, 0xFF, 0x90, 0x07, 0x26, 0x12, 0x07,
+	0x89, 0xEF, 0xF0, 0x12, 0x08, 0x08, 0xE0, 0xFF,
+/*0F30*/0x90, 0x07, 0x28, 0x12, 0x07, 0x89, 0xEF, 0xF0,
+	0x12, 0x08, 0x4D, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
+/*0F40*/0x07, 0x86, 0xEF, 0xF0, 0x12, 0x08, 0x59, 0xE0,
+	0x54, 0x1F, 0xFF, 0x90, 0x07, 0x24, 0x12, 0x07,
+/*0F50*/0x89, 0xEF, 0xF0, 0x22, 0xE4, 0xF5, 0x53, 0x12,
+	0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
+/*0F60*/0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40, 0x04, 0x7E,
+	0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x70,
+/*0F70*/0x03, 0x02, 0x0F, 0xF6, 0x85, 0xE1, 0x10, 0x43,
+	0xE1, 0x02, 0x53, 0xE1, 0x0F, 0x85, 0xE1, 0x10,
+/*0F80*/0xE4, 0xF5, 0x51, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
+	0x52, 0x12, 0x0E, 0x89, 0x40, 0x1D, 0xAD, 0x52,
+/*0F90*/0xAF, 0x51, 0x12, 0x11, 0x18, 0xEF, 0x60, 0x08,
+	0x85, 0xE1, 0x10, 0x43, 0xE1, 0x40, 0x80, 0x0B,
+/*0FA0*/0x53, 0xE1, 0xBF, 0x12, 0x0E, 0x58, 0x12, 0x00,
+	0x06, 0x80, 0xFB, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
+/*0FB0*/0x51, 0xE5, 0xE4, 0x54, 0x3F, 0xF5, 0x52, 0x12,
+	0x0E, 0x81, 0x40, 0x1D, 0xAD, 0x52, 0xAF, 0x51,
+/*0FC0*/0x12, 0x11, 0x18, 0xEF, 0x60, 0x08, 0x85, 0xE1,
+	0x10, 0x43, 0xE1, 0x20, 0x80, 0x0B, 0x53, 0xE1,
+/*0FD0*/0xDF, 0x12, 0x0E, 0x58, 0x12, 0x00, 0x06, 0x80,
+	0xFB, 0x12, 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01,
+/*0FE0*/0x80, 0x02, 0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40,
+	0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
+/*0FF0*/0x4F, 0x60, 0x03, 0x12, 0x0E, 0x5B, 0x22, 0x12,
+	0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x22,
+/*1000*/0x02, 0x11, 0x00, 0x02, 0x10, 0x40, 0x02, 0x10,
+	0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1010*/0x01, 0x20, 0x01, 0x20, 0xE4, 0xF5, 0x57, 0x12,
+	0x16, 0xBD, 0x12, 0x16, 0x44, 0xE4, 0x12, 0x10,
+/*1020*/0x56, 0x12, 0x14, 0xB7, 0x90, 0x07, 0x26, 0x12,
+	0x07, 0x35, 0xE4, 0x12, 0x07, 0x31, 0xE4, 0xF0,
+/*1030*/0x12, 0x10, 0x56, 0x12, 0x14, 0xB7, 0x90, 0x07,
+	0x26, 0x12, 0x07, 0x35, 0xE5, 0x41, 0x12, 0x07,
+/*1040*/0x31, 0xE5, 0x40, 0xF0, 0xAF, 0x57, 0x7E, 0x00,
+	0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
+/*1050*/0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xFF, 0x90,
+	0x07, 0x20, 0xA3, 0xE0, 0xFD, 0xE4, 0xF5, 0x56,
+/*1060*/0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x12,
+	0x11, 0x51, 0x7F, 0x0F, 0x7D, 0x18, 0xE4, 0xF5,
+/*1070*/0x56, 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA,
+	0x12, 0x15, 0x41, 0xAF, 0x56, 0x7E, 0x00, 0x12,
+/*1080*/0x1A, 0xFF, 0xE4, 0xFF, 0xF5, 0x56, 0x7D, 0x1F,
+	0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x22,
+/*1090*/0x22, 0xE4, 0xF5, 0x55, 0xE5, 0x08, 0xFD, 0x74,
+	0xA0, 0xF5, 0x56, 0xED, 0x44, 0x07, 0xF5, 0x57,
+/*10A0*/0xE5, 0x28, 0x30, 0xE5, 0x03, 0xD3, 0x80, 0x01,
+	0xC3, 0x40, 0x05, 0x7F, 0x28, 0xEF, 0x80, 0x04,
+/*10B0*/0x7F, 0x14, 0xEF, 0xC3, 0x13, 0xF5, 0x54, 0xE4,
+	0xF9, 0x12, 0x0E, 0x18, 0x75, 0x83, 0x8E, 0xE0,
+/*10C0*/0xF5, 0x10, 0xCE, 0xEF, 0xCE, 0xEE, 0xD3, 0x94,
+	0x00, 0x40, 0x26, 0xE5, 0x10, 0x54, 0xFE, 0x12,
+/*10D0*/0x0E, 0x98, 0x75, 0x83, 0x8E, 0xED, 0xF0, 0xE5,
+	0x10, 0x44, 0x01, 0xFD, 0xEB, 0x44, 0x07, 0xF5,
+/*10E0*/0x82, 0xED, 0xF0, 0x85, 0x57, 0x82, 0x85, 0x56,
+	0x83, 0xE0, 0x30, 0xE3, 0x01, 0x09, 0x1E, 0x80,
+/*10F0*/0xD4, 0xC2, 0x34, 0xE9, 0xC3, 0x95, 0x54, 0x40,
+	0x02, 0xD2, 0x34, 0x22, 0x02, 0x00, 0x06, 0x22,
+/*1100*/0x30, 0x30, 0x11, 0x90, 0x10, 0x00, 0xE4, 0x93,
+	0xF5, 0x10, 0x90, 0x10, 0x10, 0xE4, 0x93, 0xF5,
+/*1110*/0x10, 0x12, 0x10, 0x90, 0x12, 0x11, 0x50, 0x22,
+	0xE4, 0xFC, 0xC3, 0xED, 0x9F, 0xFA, 0xEF, 0xF5,
+/*1120*/0x83, 0x75, 0x82, 0x00, 0x79, 0xFF, 0xE4, 0x93,
+	0xCC, 0x6C, 0xCC, 0xA3, 0xD9, 0xF8, 0xDA, 0xF6,
+/*1130*/0xE5, 0xE2, 0x30, 0xE4, 0x02, 0x8C, 0xE5, 0xED,
+	0x24, 0xFF, 0xFF, 0xEF, 0x75, 0x82, 0xFF, 0xF5,
+/*1140*/0x83, 0xE4, 0x93, 0x6C, 0x70, 0x03, 0x7F, 0x01,
+	0x22, 0x7F, 0x00, 0x22, 0x22, 0x11, 0x00, 0x00,
+/*1150*/0x22, 0x8E, 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D,
+	0x5B, 0x8A, 0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01,
+/*1160*/0xE4, 0xF5, 0x5F, 0xF5, 0x60, 0xF5, 0x62, 0x12,
+	0x07, 0x2A, 0x75, 0x83, 0xD0, 0xE0, 0xFF, 0xC4,
+/*1170*/0x54, 0x0F, 0xF5, 0x61, 0x12, 0x1E, 0xA5, 0x85,
+	0x59, 0x5E, 0xD3, 0xE5, 0x5E, 0x95, 0x5B, 0xE5,
+/*1180*/0x5A, 0x12, 0x07, 0x6B, 0x50, 0x4B, 0x12, 0x07,
+	0x03, 0x75, 0x83, 0xBC, 0xE0, 0x45, 0x5E, 0x12,
+/*1190*/0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x45, 0x5E,
+	0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0, 0x45,
+/*11A0*/0x5E, 0xF0, 0xAF, 0x5F, 0xE5, 0x60, 0x12, 0x08,
+	0x78, 0x12, 0x0A, 0xFF, 0xAF, 0x62, 0x7E, 0x00,
+/*11B0*/0xAD, 0x5D, 0xAC, 0x5C, 0x12, 0x04, 0x44, 0xE5,
+	0x61, 0xAF, 0x5E, 0x7E, 0x00, 0xB4, 0x03, 0x05,
+/*11C0*/0x12, 0x1E, 0x21, 0x80, 0x07, 0xAD, 0x5D, 0xAC,
+	0x5C, 0x12, 0x13, 0x17, 0x05, 0x5E, 0x02, 0x11,
+/*11D0*/0x7A, 0x12, 0x07, 0x03, 0x75, 0x83, 0xBC, 0xE0,
+	0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBE,
+/*11E0*/0xE0, 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83,
+	0xC0, 0xE0, 0x45, 0x40, 0xF0, 0x22, 0x8E, 0x58,
+/*11F0*/0x8F, 0x59, 0x75, 0x5A, 0x01, 0x79, 0x01, 0x75,
+	0x5B, 0x01, 0xE4, 0xFB, 0x12, 0x07, 0x2A, 0x75,
+/*1200*/0x83, 0xAE, 0xE0, 0x54, 0x1A, 0xFF, 0x12, 0x08,
+	0x65, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFE, 0xEF,
+/*1210*/0x70, 0x0C, 0xEE, 0x65, 0x35, 0x70, 0x07, 0x90,
+	0x07, 0x2F, 0xE0, 0xB4, 0x01, 0x0D, 0xAF, 0x35,
+/*1220*/0x7E, 0x00, 0x12, 0x0E, 0xA9, 0xCF, 0xEB, 0xCF,
+	0x02, 0x1E, 0x60, 0xE5, 0x59, 0x64, 0x02, 0x45,
+/*1230*/0x58, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
+	0x00, 0xE5, 0x59, 0x45, 0x58, 0x70, 0x04, 0x7E,
+/*1240*/0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60,
+	0x23, 0x85, 0x41, 0x49, 0x85, 0x40, 0x4B, 0xE5,
+/*1250*/0x59, 0x45, 0x58, 0x70, 0x2C, 0xAF, 0x5A, 0xFE,
+	0xCD, 0xE9, 0xCD, 0xFC, 0xAB, 0x59, 0xAA, 0x58,
+/*1260*/0x12, 0x0A, 0xFF, 0xAF, 0x5B, 0x7E, 0x00, 0x12,
+	0x1E, 0x60, 0x80, 0x15, 0xAF, 0x5B, 0x7E, 0x00,
+/*1270*/0x12, 0x1E, 0x60, 0x90, 0x07, 0x26, 0x12, 0x07,
+	0x35, 0xE5, 0x49, 0x12, 0x07, 0x31, 0xE5, 0x4B,
+/*1280*/0xF0, 0xE4, 0xFD, 0xAF, 0x35, 0xFE, 0xFC, 0x12,
+	0x09, 0x15, 0x22, 0x8C, 0x64, 0x8D, 0x65, 0x12,
+/*1290*/0x08, 0xDA, 0x40, 0x3C, 0xE5, 0x65, 0x45, 0x64,
+	0x70, 0x10, 0x12, 0x09, 0x04, 0xC3, 0xE5, 0x3E,
+/*12A0*/0x12, 0x07, 0x69, 0x40, 0x3B, 0x12, 0x08, 0x95,
+	0x80, 0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40,
+/*12B0*/0x1D, 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05,
+	0x85, 0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39,
+/*12C0*/0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3E, 0x12,
+	0x07, 0x53, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x3B,
+/*12D0*/0xE5, 0x65, 0x45, 0x64, 0x70, 0x11, 0x12, 0x07,
+	0x5F, 0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x1F,
+/*12E0*/0x12, 0x07, 0x3E, 0xE5, 0x41, 0xF0, 0x22, 0xE5,
+	0x3C, 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C,
+/*12F0*/0x38, 0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39,
+	0x80, 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12,
+/*1300*/0x07, 0xA8, 0xE5, 0x3C, 0x12, 0x07, 0x53, 0xE5,
+	0x3D, 0xF0, 0x22, 0x12, 0x07, 0x9F, 0xE5, 0x38,
+/*1310*/0x12, 0x07, 0x53, 0xE5, 0x39, 0xF0, 0x22, 0x8C,
+	0x63, 0x8D, 0x64, 0x12, 0x08, 0xDA, 0x40, 0x3C,
+/*1320*/0xE5, 0x64, 0x45, 0x63, 0x70, 0x10, 0x12, 0x09,
+	0x04, 0xC3, 0xE5, 0x3E, 0x12, 0x07, 0x69, 0x40,
+/*1330*/0x3B, 0x12, 0x08, 0x95, 0x80, 0x18, 0xE5, 0x3E,
+	0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3E, 0x38,
+/*1340*/0xE5, 0x3E, 0x60, 0x05, 0x85, 0x3F, 0x39, 0x80,
+	0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x07,
+/*1350*/0xA8, 0xE5, 0x3E, 0x12, 0x07, 0x53, 0xE5, 0x3F,
+	0xF0, 0x22, 0x80, 0x3B, 0xE5, 0x64, 0x45, 0x63,
+/*1360*/0x70, 0x11, 0x12, 0x07, 0x5F, 0x40, 0x05, 0x12,
+	0x08, 0x9E, 0x80, 0x1F, 0x12, 0x07, 0x3E, 0xE5,
+/*1370*/0x41, 0xF0, 0x22, 0xE5, 0x3C, 0xC3, 0x95, 0x38,
+	0x40, 0x1D, 0x85, 0x3C, 0x38, 0xE5, 0x3C, 0x60,
+/*1380*/0x05, 0x85, 0x3D, 0x39, 0x80, 0x03, 0x85, 0x39,
+	0x39, 0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3C,
+/*1390*/0x12, 0x07, 0x53, 0xE5, 0x3D, 0xF0, 0x22, 0x12,
+	0x07, 0x9F, 0xE5, 0x38, 0x12, 0x07, 0x53, 0xE5,
+/*13A0*/0x39, 0xF0, 0x22, 0xE5, 0x0D, 0xFE, 0xE5, 0x08,
+	0x8E, 0x54, 0x44, 0x05, 0xF5, 0x55, 0x75, 0x15,
+/*13B0*/0x0F, 0xF5, 0x82, 0x12, 0x0E, 0x7A, 0x12, 0x17,
+	0xA3, 0x20, 0x31, 0x05, 0x75, 0x15, 0x03, 0x80,
+/*13C0*/0x03, 0x75, 0x15, 0x0B, 0xE5, 0x0A, 0xC3, 0x94,
+	0x01, 0x50, 0x38, 0x12, 0x14, 0x20, 0x20, 0x31,
+/*13D0*/0x06, 0x05, 0x15, 0x05, 0x15, 0x80, 0x04, 0x15,
+	0x15, 0x15, 0x15, 0xE5, 0x0A, 0xC3, 0x94, 0x01,
+/*13E0*/0x50, 0x21, 0x12, 0x14, 0x20, 0x20, 0x31, 0x04,
+	0x05, 0x15, 0x80, 0x02, 0x15, 0x15, 0xE5, 0x0A,
+/*13F0*/0xC3, 0x94, 0x01, 0x50, 0x0E, 0x12, 0x0E, 0x77,
+	0x12, 0x17, 0xA3, 0x20, 0x31, 0x05, 0x05, 0x15,
+/*1400*/0x12, 0x0E, 0x77, 0xE5, 0x15, 0xB4, 0x08, 0x04,
+	0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x15,
+/*1410*/0xB4, 0x07, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E,
+	0x00, 0xEE, 0x4F, 0x60, 0x02, 0x05, 0x7F, 0x22,
+/*1420*/0x85, 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15,
+	0xF0, 0x12, 0x17, 0xA3, 0x22, 0x12, 0x07, 0x2A,
+/*1430*/0x75, 0x83, 0xAE, 0x74, 0xFF, 0x12, 0x07, 0x29,
+	0xE0, 0x54, 0x1A, 0xF5, 0x34, 0xE0, 0xC4, 0x13,
+/*1440*/0x54, 0x07, 0xF5, 0x35, 0x24, 0xFE, 0x60, 0x24,
+	0x24, 0xFE, 0x60, 0x3C, 0x24, 0x04, 0x70, 0x63,
+/*1450*/0x75, 0x31, 0x2D, 0xE5, 0x08, 0xFD, 0x74, 0xB6,
+	0x12, 0x07, 0x92, 0x74, 0xBC, 0x90, 0x07, 0x22,
+/*1460*/0x12, 0x07, 0x95, 0x74, 0x90, 0x12, 0x07, 0xB3,
+	0x74, 0x92, 0x80, 0x3C, 0x75, 0x31, 0x3A, 0xE5,
+/*1470*/0x08, 0xFD, 0x74, 0xBA, 0x12, 0x07, 0x92, 0x74,
+	0xC0, 0x90, 0x07, 0x22, 0x12, 0x07, 0xB6, 0x74,
+/*1480*/0xC4, 0x12, 0x07, 0xB3, 0x74, 0xC8, 0x80, 0x20,
+	0x75, 0x31, 0x35, 0xE5, 0x08, 0xFD, 0x74, 0xB8,
+/*1490*/0x12, 0x07, 0x92, 0x74, 0xBE, 0xFF, 0xED, 0x44,
+	0x07, 0x90, 0x07, 0x22, 0xCF, 0xF0, 0xA3, 0xEF,
+/*14A0*/0xF0, 0x74, 0xC2, 0x12, 0x07, 0xB3, 0x74, 0xC6,
+	0xFF, 0xED, 0x44, 0x07, 0xA3, 0xCF, 0xF0, 0xA3,
+/*14B0*/0xEF, 0xF0, 0x22, 0x75, 0x34, 0x01, 0x22, 0x8E,
+	0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D, 0x5B, 0x8A,
+/*14C0*/0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01, 0xE4, 0xF5,
+	0x5F, 0x12, 0x1E, 0xA5, 0x85, 0x59, 0x5E, 0xD3,
+/*14D0*/0xE5, 0x5E, 0x95, 0x5B, 0xE5, 0x5A, 0x12, 0x07,
+	0x6B, 0x50, 0x57, 0xE5, 0x5D, 0x45, 0x5C, 0x70,
+/*14E0*/0x30, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x92, 0xE5,
+	0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE5,
+/*14F0*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8, 0xE5,
+	0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0x90, 0xE5,
+/*1500*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
+	0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x80,
+/*1510*/0x03, 0x12, 0x07, 0x32, 0xE5, 0x5E, 0xF0, 0xAF,
+	0x5F, 0x7E, 0x00, 0xAD, 0x5D, 0xAC, 0x5C, 0x12,
+/*1520*/0x04, 0x44, 0xAF, 0x5E, 0x7E, 0x00, 0xAD, 0x5D,
+	0xAC, 0x5C, 0x12, 0x0B, 0xD1, 0x05, 0x5E, 0x02,
+/*1530*/0x14, 0xCF, 0xAB, 0x5D, 0xAA, 0x5C, 0xAD, 0x5B,
+	0xAC, 0x5A, 0xAF, 0x59, 0xAE, 0x58, 0x02, 0x1B,
+/*1540*/0xFB, 0x8C, 0x5C, 0x8D, 0x5D, 0x8A, 0x5E, 0x8B,
+	0x5F, 0x75, 0x60, 0x01, 0xE4, 0xF5, 0x61, 0xF5,
+/*1550*/0x62, 0xF5, 0x63, 0x12, 0x1E, 0xA5, 0x8F, 0x60,
+	0xD3, 0xE5, 0x60, 0x95, 0x5D, 0xE5, 0x5C, 0x12,
+/*1560*/0x07, 0x6B, 0x50, 0x61, 0xE5, 0x5F, 0x45, 0x5E,
+	0x70, 0x27, 0x12, 0x07, 0x2A, 0x75, 0x83, 0xB6,
+/*1570*/0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xB8,
+	0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBA,
+/*1580*/0xE5, 0x60, 0xF0, 0xAF, 0x61, 0x7E, 0x00, 0xE5,
+	0x62, 0x12, 0x08, 0x7A, 0x12, 0x0A, 0xFF, 0x80,
+/*1590*/0x19, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE5,
+	0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0x8E, 0xE4,
+/*15A0*/0x12, 0x07, 0x29, 0x74, 0x01, 0x12, 0x07, 0x29,
+	0xE4, 0xF0, 0xAF, 0x63, 0x7E, 0x00, 0xAD, 0x5F,
+/*15B0*/0xAC, 0x5E, 0x12, 0x04, 0x44, 0xAF, 0x60, 0x7E,
+	0x00, 0xAD, 0x5F, 0xAC, 0x5E, 0x12, 0x12, 0x8B,
+/*15C0*/0x05, 0x60, 0x02, 0x15, 0x58, 0x22, 0x90, 0x11,
+	0x4D, 0xE4, 0x93, 0x90, 0x07, 0x2E, 0xF0, 0x12,
+/*15D0*/0x08, 0x1F, 0x75, 0x83, 0xAE, 0xE0, 0x54, 0x1A,
+	0xF5, 0x34, 0x70, 0x67, 0xEF, 0x44, 0x07, 0xF5,
+/*15E0*/0x82, 0x75, 0x83, 0xCE, 0xE0, 0xFF, 0x13, 0x13,
+	0x13, 0x54, 0x07, 0xF5, 0x36, 0x54, 0x0F, 0xD3,
+/*15F0*/0x94, 0x00, 0x40, 0x06, 0x12, 0x14, 0x2D, 0x12,
+	0x1B, 0xA9, 0xE5, 0x36, 0x54, 0x0F, 0x24, 0xFE,
+/*1600*/0x60, 0x0C, 0x14, 0x60, 0x0C, 0x14, 0x60, 0x19,
+	0x24, 0x03, 0x70, 0x37, 0x80, 0x10, 0x02, 0x1E,
+/*1610*/0x91, 0x12, 0x1E, 0x91, 0x12, 0x07, 0x2A, 0x75,
+	0x83, 0xCE, 0xE0, 0x54, 0xEF, 0xF0, 0x02, 0x1D,
+/*1620*/0xAE, 0x12, 0x10, 0x14, 0xE4, 0xF5, 0x55, 0x12,
+	0x1D, 0x85, 0x05, 0x55, 0xE5, 0x55, 0xC3, 0x94,
+/*1630*/0x05, 0x40, 0xF4, 0x12, 0x07, 0x2A, 0x75, 0x83,
+	0xCE, 0xE0, 0x54, 0xC7, 0x12, 0x07, 0x29, 0xE0,
+/*1640*/0x44, 0x08, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
+	0x59, 0xAF, 0x08, 0xEF, 0x44, 0x07, 0xF5, 0x82,
+/*1650*/0x75, 0x83, 0xD0, 0xE0, 0xFD, 0xC4, 0x54, 0x0F,
+	0xF5, 0x5A, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0x75,
+/*1660*/0x83, 0x80, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x21,
+	0x75, 0x83, 0x82, 0xE5, 0x45, 0xF0, 0xEF, 0x44,
+/*1670*/0x07, 0xF5, 0x82, 0x75, 0x83, 0x8A, 0x74, 0xFF,
+	0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x07, 0x2A, 0x75,
+/*1680*/0x83, 0xBC, 0xE0, 0x54, 0xEF, 0x12, 0x07, 0x29,
+	0x75, 0x83, 0xBE, 0xE0, 0x54, 0xEF, 0x12, 0x07,
+/*1690*/0x29, 0x75, 0x83, 0xC0, 0xE0, 0x54, 0xEF, 0x12,
+	0x07, 0x29, 0x75, 0x83, 0xBC, 0xE0, 0x44, 0x10,
+/*16A0*/0x12, 0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x44,
+	0x10, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0,
+/*16B0*/0x44, 0x10, 0xF0, 0xAF, 0x58, 0xE5, 0x59, 0x12,
+	0x08, 0x78, 0x02, 0x0A, 0xFF, 0xE4, 0xF5, 0x58,
+/*16C0*/0x7D, 0x01, 0xF5, 0x59, 0xAF, 0x35, 0xFE, 0xFC,
+	0x12, 0x09, 0x15, 0x12, 0x07, 0x2A, 0x75, 0x83,
+/*16D0*/0xB6, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+	0xB8, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+/*16E0*/0xBA, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+	0xBC, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+/*16F0*/0xBE, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+	0xC0, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
+/*1700*/0x90, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2,
+	0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4,
+/*1710*/0x12, 0x07, 0x29, 0x75, 0x83, 0x92, 0xE4, 0x12,
+	0x07, 0x29, 0x75, 0x83, 0xC6, 0xE4, 0x12, 0x07,
+/*1720*/0x29, 0x75, 0x83, 0xC8, 0xE4, 0xF0, 0xAF, 0x58,
+	0xFE, 0xE5, 0x59, 0x12, 0x08, 0x7A, 0x02, 0x0A,
+/*1730*/0xFF, 0xE5, 0xE2, 0x30, 0xE4, 0x6C, 0xE5, 0xE7,
+	0x54, 0xC0, 0x64, 0x40, 0x70, 0x64, 0xE5, 0x09,
+/*1740*/0xC4, 0x54, 0x30, 0xFE, 0xE5, 0x08, 0x25, 0xE0,
+	0x25, 0xE0, 0x54, 0xC0, 0x4E, 0xFE, 0xEF, 0x54,
+/*1750*/0x3F, 0x4E, 0xFD, 0xE5, 0x2B, 0xAE, 0x2A, 0x78,
+	0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
+/*1760*/0xF5, 0x82, 0x8E, 0x83, 0xED, 0xF0, 0xE5, 0x2B,
+	0xAE, 0x2A, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33,
+/*1770*/0xCE, 0xD8, 0xF9, 0xFF, 0xF5, 0x82, 0x8E, 0x83,
+	0xA3, 0xE5, 0xFE, 0xF0, 0x8F, 0x82, 0x8E, 0x83,
+/*1780*/0xA3, 0xA3, 0xE5, 0xFD, 0xF0, 0x8F, 0x82, 0x8E,
+	0x83, 0xA3, 0xA3, 0xA3, 0xE5, 0xFC, 0xF0, 0xC3,
+/*1790*/0xE5, 0x2B, 0x94, 0xFA, 0xE5, 0x2A, 0x94, 0x00,
+	0x50, 0x08, 0x05, 0x2B, 0xE5, 0x2B, 0x70, 0x02,
+/*17A0*/0x05, 0x2A, 0x22, 0xE4, 0xFF, 0xE4, 0xF5, 0x58,
+	0xF5, 0x56, 0xF5, 0x57, 0x74, 0x82, 0xFC, 0x12,
+/*17B0*/0x0E, 0x04, 0x8C, 0x83, 0xE0, 0xF5, 0x10, 0x54,
+	0x7F, 0xF0, 0xE5, 0x10, 0x44, 0x80, 0x12, 0x0E,
+/*17C0*/0x98, 0xED, 0xF0, 0x7E, 0x0A, 0x12, 0x0E, 0x04,
+	0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0, 0x26, 0xDE,
+/*17D0*/0xF4, 0x05, 0x57, 0xE5, 0x57, 0x70, 0x02, 0x05,
+	0x56, 0xE5, 0x14, 0x24, 0x01, 0xFD, 0xE4, 0x33,
+/*17E0*/0xFC, 0xD3, 0xE5, 0x57, 0x9D, 0xE5, 0x56, 0x9C,
+	0x40, 0xD9, 0xE5, 0x0A, 0x94, 0x20, 0x50, 0x02,
+/*17F0*/0x05, 0x0A, 0x43, 0xE1, 0x08, 0xC2, 0x31, 0x12,
+	0x0E, 0x04, 0x75, 0x83, 0xA6, 0xE0, 0x55, 0x12,
+/*1800*/0x65, 0x12, 0x70, 0x03, 0xD2, 0x31, 0x22, 0xC2,
+	0x31, 0x22, 0x90, 0x07, 0x26, 0xE0, 0xFA, 0xA3,
+/*1810*/0xE0, 0xF5, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0x41,
+	0xE5, 0x39, 0xC3, 0x95, 0x41, 0x40, 0x26, 0xE5,
+/*1820*/0x39, 0x95, 0x41, 0xC3, 0x9F, 0xEE, 0x12, 0x07,
+	0x6B, 0x40, 0x04, 0x7C, 0x01, 0x80, 0x02, 0x7C,
+/*1830*/0x00, 0xE5, 0x41, 0x64, 0x3F, 0x60, 0x04, 0x7B,
+	0x01, 0x80, 0x02, 0x7B, 0x00, 0xEC, 0x5B, 0x60,
+/*1840*/0x29, 0x05, 0x41, 0x80, 0x28, 0xC3, 0xE5, 0x41,
+	0x95, 0x39, 0xC3, 0x9F, 0xEE, 0x12, 0x07, 0x6B,
+/*1850*/0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
+	0xE5, 0x41, 0x60, 0x04, 0x7E, 0x01, 0x80, 0x02,
+/*1860*/0x7E, 0x00, 0xEF, 0x5E, 0x60, 0x04, 0x15, 0x41,
+	0x80, 0x03, 0x85, 0x39, 0x41, 0x85, 0x3A, 0x40,
+/*1870*/0x22, 0xE5, 0xE2, 0x30, 0xE4, 0x60, 0xE5, 0xE1,
+	0x30, 0xE2, 0x5B, 0xE5, 0x09, 0x70, 0x04, 0x7F,
+/*1880*/0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x08, 0x70,
+	0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
+/*1890*/0x5F, 0x60, 0x43, 0x53, 0xF9, 0xF8, 0xE5, 0xE2,
+	0x30, 0xE4, 0x3B, 0xE5, 0xE1, 0x30, 0xE2, 0x2E,
+/*18A0*/0x43, 0xFA, 0x02, 0x53, 0xFA, 0xFB, 0xE4, 0xF5,
+	0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0xE5,
+/*18B0*/0xE1, 0x30, 0xE2, 0xE7, 0x90, 0x94, 0x70, 0xE0,
+	0x65, 0x10, 0x60, 0x03, 0x43, 0xFA, 0x04, 0x05,
+/*18C0*/0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0x70,
+	0xE6, 0x12, 0x00, 0x06, 0x80, 0xE1, 0x53, 0xFA,
+/*18D0*/0xFD, 0x53, 0xFA, 0xFB, 0x80, 0xC0, 0x22, 0x8F,
+	0x54, 0x12, 0x00, 0x06, 0xE5, 0xE1, 0x30, 0xE0,
+/*18E0*/0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5,
+	0x7E, 0xD3, 0x94, 0x05, 0x40, 0x04, 0x7E, 0x01,
+/*18F0*/0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60, 0x3D,
+	0x85, 0x54, 0x11, 0xE5, 0xE2, 0x20, 0xE1, 0x32,
+/*1900*/0x74, 0xCE, 0x12, 0x1A, 0x05, 0x30, 0xE7, 0x04,
+	0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0x8F, 0x82,
+/*1910*/0x8E, 0x83, 0xE0, 0x30, 0xE6, 0x04, 0x7F, 0x01,
+	0x80, 0x02, 0x7F, 0x00, 0xEF, 0x5D, 0x70, 0x15,
+/*1920*/0x12, 0x15, 0xC6, 0x74, 0xCE, 0x12, 0x1A, 0x05,
+	0x30, 0xE6, 0x07, 0xE0, 0x44, 0x80, 0xF0, 0x43,
+/*1930*/0xF9, 0x80, 0x12, 0x18, 0x71, 0x22, 0x12, 0x0E,
+	0x44, 0xE5, 0x16, 0x25, 0xE0, 0x25, 0xE0, 0x24,
+/*1940*/0xB0, 0xF5, 0x82, 0xE4, 0x34, 0x1A, 0xF5, 0x83,
+	0xE4, 0x93, 0xF5, 0x0F, 0xE5, 0x16, 0x25, 0xE0,
+/*1950*/0x25, 0xE0, 0x24, 0xB1, 0xF5, 0x82, 0xE4, 0x34,
+	0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0E, 0x12,
+/*1960*/0x0E, 0x65, 0xF5, 0x10, 0xE5, 0x0F, 0x54, 0xF0,
+	0x12, 0x0E, 0x17, 0x75, 0x83, 0x8C, 0xEF, 0xF0,
+/*1970*/0xE5, 0x0F, 0x30, 0xE0, 0x0C, 0x12, 0x0E, 0x04,
+	0x75, 0x83, 0x86, 0xE0, 0x44, 0x40, 0xF0, 0x80,
+/*1980*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x86, 0xE0,
+	0x54, 0xBF, 0xF0, 0x12, 0x0E, 0x91, 0x75, 0x83,
+/*1990*/0x82, 0xE5, 0x0E, 0xF0, 0x22, 0x7F, 0x05, 0x12,
+	0x17, 0x31, 0x12, 0x0E, 0x04, 0x12, 0x0E, 0x33,
+/*19A0*/0x74, 0x02, 0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E,
+	0x04, 0x12, 0x0E, 0x0B, 0xEF, 0xF0, 0x75, 0x15,
+/*19B0*/0x70, 0x12, 0x0F, 0xF7, 0x20, 0x34, 0x05, 0x75,
+	0x15, 0x10, 0x80, 0x03, 0x75, 0x15, 0x50, 0x12,
+/*19C0*/0x0F, 0xF7, 0x20, 0x34, 0x04, 0x74, 0x10, 0x80,
+	0x02, 0x74, 0xF0, 0x25, 0x15, 0xF5, 0x15, 0x12,
+/*19D0*/0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x20,
+	0x34, 0x17, 0xE5, 0x15, 0x64, 0x30, 0x60, 0x0C,
+/*19E0*/0x74, 0x10, 0x25, 0x15, 0xF5, 0x15, 0xB4, 0x80,
+	0x03, 0xE4, 0xF5, 0x15, 0x12, 0x0E, 0x21, 0xEF,
+/*19F0*/0xF0, 0x22, 0xF0, 0xE5, 0x0B, 0x25, 0xE0, 0x25,
+	0xE0, 0x24, 0x82, 0xF5, 0x82, 0xE4, 0x34, 0x07,
+/*1A00*/0xF5, 0x83, 0x22, 0x74, 0x88, 0xFE, 0xE5, 0x08,
+	0x44, 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0,
+/*1A10*/0x22, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
+	0x22, 0xF0, 0xE0, 0x54, 0xC0, 0x8F, 0x82, 0x8E,
+/*1A20*/0x83, 0xF0, 0x22, 0xEF, 0x44, 0x07, 0xF5, 0x82,
+	0x75, 0x83, 0x86, 0xE0, 0x54, 0x10, 0xD3, 0x94,
+/*1A30*/0x00, 0x22, 0xF0, 0x90, 0x07, 0x15, 0xE0, 0x04,
+	0xF0, 0x22, 0x44, 0x06, 0xF5, 0x82, 0x75, 0x83,
+/*1A40*/0x9E, 0xE0, 0x22, 0xFE, 0xEF, 0x44, 0x07, 0xF5,
+	0x82, 0x8E, 0x83, 0xE0, 0x22, 0xE4, 0x90, 0x07,
+/*1A50*/0x2A, 0xF0, 0xA3, 0xF0, 0x12, 0x07, 0x2A, 0x75,
+	0x83, 0x82, 0xE0, 0x54, 0x7F, 0x12, 0x07, 0x29,
+/*1A60*/0xE0, 0x44, 0x80, 0xF0, 0x12, 0x10, 0xFC, 0x12,
+	0x08, 0x1F, 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0,
+/*1A70*/0x1A, 0x90, 0x07, 0x2B, 0xE0, 0x04, 0xF0, 0x70,
+	0x06, 0x90, 0x07, 0x2A, 0xE0, 0x04, 0xF0, 0x90,
+/*1A80*/0x07, 0x2A, 0xE0, 0xB4, 0x10, 0xE1, 0xA3, 0xE0,
+	0xB4, 0x00, 0xDC, 0xEE, 0x44, 0xA6, 0xFC, 0xEF,
+/*1A90*/0x44, 0x07, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0xF5,
+	0x32, 0xEE, 0x44, 0xA8, 0xFE, 0xEF, 0x44, 0x07,
+/*1AA0*/0xF5, 0x82, 0x8E, 0x83, 0xE0, 0xF5, 0x33, 0x22,
+	0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x90,
+/*1AB0*/0x00, 0x20, 0x0F, 0x92, 0x00, 0x21, 0x0F, 0x94,
+	0x00, 0x22, 0x0F, 0x96, 0x00, 0x23, 0x0F, 0x98,
+/*1AC0*/0x00, 0x24, 0x0F, 0x9A, 0x00, 0x25, 0x0F, 0x9C,
+	0x00, 0x26, 0x0F, 0x9E, 0x00, 0x27, 0x0F, 0xA0,
+/*1AD0*/0x01, 0x20, 0x01, 0xA2, 0x01, 0x21, 0x01, 0xA4,
+	0x01, 0x22, 0x01, 0xA6, 0x01, 0x23, 0x01, 0xA8,
+/*1AE0*/0x01, 0x24, 0x01, 0xAA, 0x01, 0x25, 0x01, 0xAC,
+	0x01, 0x26, 0x01, 0xAE, 0x01, 0x27, 0x01, 0xB0,
+/*1AF0*/0x01, 0x28, 0x01, 0xB4, 0x00, 0x28, 0x0F, 0xB6,
+	0x40, 0x28, 0x0F, 0xB8, 0x61, 0x28, 0x01, 0xCB,
+/*1B00*/0xEF, 0xCB, 0xCA, 0xEE, 0xCA, 0x7F, 0x01, 0xE4,
+	0xFD, 0xEB, 0x4A, 0x70, 0x24, 0xE5, 0x08, 0xF5,
+/*1B10*/0x82, 0x74, 0xB6, 0x12, 0x08, 0x29, 0xE5, 0x08,
+	0xF5, 0x82, 0x74, 0xB8, 0x12, 0x08, 0x29, 0xE5,
+/*1B20*/0x08, 0xF5, 0x82, 0x74, 0xBA, 0x12, 0x08, 0x29,
+	0x7E, 0x00, 0x7C, 0x00, 0x12, 0x0A, 0xFF, 0x80,
+/*1B30*/0x12, 0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE5,
+	0x41, 0xF0, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35,
+/*1B40*/0xE5, 0x40, 0xF0, 0x12, 0x07, 0x2A, 0x75, 0x83,
+	0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74, 0x01, 0x12,
+/*1B50*/0x07, 0x29, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x26,
+	0xF5, 0x27, 0x53, 0xE1, 0xFE, 0xF5, 0x2A, 0x75,
+/*1B60*/0x2B, 0x01, 0xF5, 0x08, 0x7F, 0x01, 0x12, 0x17,
+	0x31, 0x30, 0x30, 0x1C, 0x90, 0x1A, 0xA9, 0xE4,
+/*1B70*/0x93, 0xF5, 0x10, 0x90, 0x1F, 0xF9, 0xE4, 0x93,
+	0xF5, 0x10, 0x90, 0x00, 0x41, 0xE4, 0x93, 0xF5,
+/*1B80*/0x10, 0x90, 0x1E, 0xCA, 0xE4, 0x93, 0xF5, 0x10,
+	0x7F, 0x02, 0x12, 0x17, 0x31, 0x12, 0x0F, 0x54,
+/*1B90*/0x7F, 0x03, 0x12, 0x17, 0x31, 0x12, 0x00, 0x06,
+	0xE5, 0xE2, 0x30, 0xE7, 0x09, 0x12, 0x10, 0x00,
+/*1BA0*/0x30, 0x30, 0x03, 0x12, 0x11, 0x00, 0x02, 0x00,
+	0x47, 0x12, 0x08, 0x1F, 0x75, 0x83, 0xD0, 0xE0,
+/*1BB0*/0xC4, 0x54, 0x0F, 0xFD, 0x75, 0x43, 0x01, 0x75,
+	0x44, 0xFF, 0x12, 0x08, 0xAA, 0x74, 0x04, 0xF0,
+/*1BC0*/0x75, 0x3B, 0x01, 0xED, 0x14, 0x60, 0x0C, 0x14,
+	0x60, 0x0B, 0x14, 0x60, 0x0F, 0x24, 0x03, 0x70,
+/*1BD0*/0x0B, 0x80, 0x09, 0x80, 0x00, 0x12, 0x08, 0xA7,
+	0x04, 0xF0, 0x80, 0x06, 0x12, 0x08, 0xA7, 0x74,
+/*1BE0*/0x04, 0xF0, 0xEE, 0x44, 0x82, 0xFE, 0xEF, 0x44,
+	0x07, 0xF5, 0x82, 0x8E, 0x83, 0xE5, 0x45, 0x12,
+/*1BF0*/0x08, 0xBE, 0x75, 0x83, 0x82, 0xE5, 0x31, 0xF0,
+	0x02, 0x11, 0x4C, 0x8E, 0x60, 0x8F, 0x61, 0x12,
+/*1C00*/0x1E, 0xA5, 0xE4, 0xFF, 0xCE, 0xED, 0xCE, 0xEE,
+	0xD3, 0x95, 0x61, 0xE5, 0x60, 0x12, 0x07, 0x6B,
+/*1C10*/0x40, 0x39, 0x74, 0x20, 0x2E, 0xF5, 0x82, 0xE4,
+	0x34, 0x03, 0xF5, 0x83, 0xE0, 0x70, 0x03, 0xFF,
+/*1C20*/0x80, 0x26, 0x12, 0x08, 0xE2, 0xFD, 0xC3, 0x9F,
+	0x40, 0x1E, 0xCF, 0xED, 0xCF, 0xEB, 0x4A, 0x70,
+/*1C30*/0x0B, 0x8D, 0x42, 0x12, 0x08, 0xEE, 0xF5, 0x41,
+	0x8E, 0x40, 0x80, 0x0C, 0x12, 0x08, 0xE2, 0xF5,
+/*1C40*/0x38, 0x12, 0x08, 0xEE, 0xF5, 0x39, 0x8E, 0x3A,
+	0x1E, 0x80, 0xBC, 0x22, 0x75, 0x58, 0x01, 0xE5,
+/*1C50*/0x35, 0x70, 0x0C, 0x12, 0x07, 0xCC, 0xE0, 0xF5,
+	0x4A, 0x12, 0x07, 0xD8, 0xE0, 0xF5, 0x4C, 0xE5,
+/*1C60*/0x35, 0xB4, 0x04, 0x0C, 0x12, 0x07, 0xE4, 0xE0,
+	0xF5, 0x4A, 0x12, 0x07, 0xF0, 0xE0, 0xF5, 0x4C,
+/*1C70*/0xE5, 0x35, 0xB4, 0x01, 0x04, 0x7F, 0x01, 0x80,
+	0x02, 0x7F, 0x00, 0xE5, 0x35, 0xB4, 0x02, 0x04,
+/*1C80*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F,
+	0x60, 0x0C, 0x12, 0x07, 0xFC, 0xE0, 0xF5, 0x4A,
+/*1C90*/0x12, 0x08, 0x08, 0xE0, 0xF5, 0x4C, 0x85, 0x41,
+	0x49, 0x85, 0x40, 0x4B, 0x22, 0x75, 0x5B, 0x01,
+/*1CA0*/0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE0, 0x54,
+	0x1F, 0xFF, 0xD3, 0x94, 0x02, 0x50, 0x04, 0x8F,
+/*1CB0*/0x58, 0x80, 0x05, 0xEF, 0x24, 0xFE, 0xF5, 0x58,
+	0xEF, 0xC3, 0x94, 0x18, 0x40, 0x05, 0x75, 0x59,
+/*1CC0*/0x18, 0x80, 0x04, 0xEF, 0x04, 0xF5, 0x59, 0x85,
+	0x43, 0x5A, 0xAF, 0x58, 0x7E, 0x00, 0xAD, 0x59,
+/*1CD0*/0x7C, 0x00, 0xAB, 0x5B, 0x7A, 0x00, 0x12, 0x15,
+	0x41, 0xAF, 0x5A, 0x7E, 0x00, 0x12, 0x18, 0x0A,
+/*1CE0*/0xAF, 0x5B, 0x7E, 0x00, 0x02, 0x1A, 0xFF, 0xE5,
+	0xE2, 0x30, 0xE7, 0x0E, 0x12, 0x10, 0x03, 0xC2,
+/*1CF0*/0x30, 0x30, 0x30, 0x03, 0x12, 0x10, 0xFF, 0x20,
+	0x33, 0x28, 0xE5, 0xE7, 0x30, 0xE7, 0x05, 0x12,
+/*1D00*/0x0E, 0xA2, 0x80, 0x0D, 0xE5, 0xFE, 0xC3, 0x94,
+	0x20, 0x50, 0x06, 0x12, 0x0E, 0xA2, 0x43, 0xF9,
+/*1D10*/0x08, 0xE5, 0xF2, 0x30, 0xE7, 0x03, 0x53, 0xF9,
+	0x7F, 0xE5, 0xF1, 0x54, 0x70, 0xD3, 0x94, 0x00,
+/*1D20*/0x50, 0xD8, 0x22, 0x12, 0x0E, 0x04, 0x75, 0x83,
+	0x80, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0x12,
+/*1D30*/0x0D, 0xFD, 0x75, 0x83, 0x84, 0x12, 0x0E, 0x02,
+	0x75, 0x83, 0x86, 0x12, 0x0E, 0x02, 0x75, 0x83,
+/*1D40*/0x8C, 0xE0, 0x54, 0xF3, 0x12, 0x0E, 0x03, 0x75,
+	0x83, 0x8E, 0x12, 0x0E, 0x02, 0x75, 0x83, 0x94,
+/*1D50*/0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0x07, 0x2A,
+	0x75, 0x83, 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74,
+/*1D60*/0x01, 0x12, 0x07, 0x29, 0xE4, 0x12, 0x08, 0xBE,
+	0x75, 0x83, 0x8C, 0xE0, 0x44, 0x20, 0x12, 0x08,
+/*1D70*/0xBE, 0xE0, 0x54, 0xDF, 0xF0, 0x74, 0x84, 0x85,
+	0x08, 0x82, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0xF0,
+/*1D80*/0xE0, 0x44, 0x80, 0xF0, 0x22, 0x75, 0x56, 0x01,
+	0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE, 0xFC,
+/*1D90*/0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12, 0x1E,
+	0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E, 0x00,
+/*1DA0*/0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
+	0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0x75, 0x56,
+/*1DB0*/0x01, 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE,
+	0xFC, 0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12,
+/*1DC0*/0x1E, 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E,
+	0x00, 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44,
+/*1DD0*/0xAF, 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xE4,
+	0xF5, 0x16, 0x12, 0x0E, 0x44, 0xFE, 0xE5, 0x08,
+/*1DE0*/0x44, 0x05, 0xFF, 0x12, 0x0E, 0x65, 0x8F, 0x82,
+	0x8E, 0x83, 0xF0, 0x05, 0x16, 0xE5, 0x16, 0xC3,
+/*1DF0*/0x94, 0x14, 0x40, 0xE6, 0xE5, 0x08, 0x12, 0x0E,
+	0x2B, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
+/*1E00*/0x59, 0xF5, 0x5A, 0xFF, 0xFE, 0xAD, 0x58, 0xFC,
+	0x12, 0x09, 0x15, 0x7F, 0x04, 0x7E, 0x00, 0xAD,
+/*1E10*/0x58, 0x7C, 0x00, 0x12, 0x09, 0x15, 0x7F, 0x02,
+	0x7E, 0x00, 0xAD, 0x58, 0x7C, 0x00, 0x02, 0x09,
+/*1E20*/0x15, 0xE5, 0x3C, 0x25, 0x3E, 0xFC, 0xE5, 0x42,
+	0x24, 0x00, 0xFB, 0xE4, 0x33, 0xFA, 0xEC, 0xC3,
+/*1E30*/0x9B, 0xEA, 0x12, 0x07, 0x6B, 0x40, 0x0B, 0x8C,
+	0x42, 0xE5, 0x3D, 0x25, 0x3F, 0xF5, 0x41, 0x8F,
+/*1E40*/0x40, 0x22, 0x12, 0x09, 0x0B, 0x22, 0x74, 0x84,
+	0xF5, 0x18, 0x85, 0x08, 0x19, 0x85, 0x19, 0x82,
+/*1E50*/0x85, 0x18, 0x83, 0xE0, 0x54, 0x7F, 0xF0, 0xE0,
+	0x44, 0x80, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22,
+/*1E60*/0xEF, 0x4E, 0x70, 0x0B, 0x12, 0x07, 0x2A, 0x75,
+	0x83, 0xD2, 0xE0, 0x54, 0xDF, 0xF0, 0x22, 0x12,
+/*1E70*/0x07, 0x2A, 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x20,
+	0xF0, 0x22, 0x75, 0x58, 0x01, 0x90, 0x07, 0x26,
+/*1E80*/0x12, 0x07, 0x35, 0xE0, 0x54, 0x3F, 0xF5, 0x41,
+	0x12, 0x07, 0x32, 0xE0, 0x54, 0x3F, 0xF5, 0x40,
+/*1E90*/0x22, 0x75, 0x56, 0x02, 0xE4, 0xF5, 0x57, 0x12,
+	0x1D, 0xFC, 0xAF, 0x57, 0x7E, 0x00, 0xAD, 0x56,
+/*1EA0*/0x7C, 0x00, 0x02, 0x04, 0x44, 0xE4, 0xF5, 0x42,
+	0xF5, 0x41, 0xF5, 0x40, 0xF5, 0x38, 0xF5, 0x39,
+/*1EB0*/0xF5, 0x3A, 0x22, 0xEF, 0x54, 0x07, 0xFF, 0xE5,
+	0xF9, 0x54, 0xF8, 0x4F, 0xF5, 0xF9, 0x22, 0x7F,
+/*1EC0*/0x01, 0xE4, 0xFE, 0x0F, 0x0E, 0xBE, 0xFF, 0xFB,
+	0x22, 0x01, 0x20, 0x00, 0x01, 0x04, 0x20, 0x00,
+/*1ED0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1EE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1EF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F00*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F10*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F20*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F30*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F40*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F50*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F60*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F70*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F80*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1F90*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FA0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FB0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FC0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FD0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*1FF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x81
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda.h ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/linda.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/linda.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,276 @@
+#ifndef _LINDA_H
+#define _LINDA_H
+
+/*
+ * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/**
+ * @file
+ *
+ * QLogic Linda Infiniband HCA
+ *
+ */
+
+#define BITOPS_LITTLE_ENDIAN
+#include <ipxe/bitops.h>
+#include "qib_7220_regs.h"
+
+struct ib_device;
+
+/** A Linda GPIO register */
+struct QIB_7220_GPIO_pb {
+	pseudo_bit_t GPIO[16];
+	pseudo_bit_t Reserved[48];
+};
+struct QIB_7220_GPIO {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_GPIO_pb );
+};
+
+/** A Linda general scalar register */
+struct QIB_7220_scalar_pb {
+	pseudo_bit_t Value[64];
+};
+struct QIB_7220_scalar {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_scalar_pb );
+};
+
+/** Linda send per-buffer control word */
+struct QIB_7220_SendPbc_pb {
+	pseudo_bit_t LengthP1_toibc[11];
+	pseudo_bit_t Reserved1[4];
+	pseudo_bit_t LengthP1_trigger[11];
+	pseudo_bit_t Reserved2[3];
+	pseudo_bit_t TestEbp[1];
+	pseudo_bit_t Test[1];
+	pseudo_bit_t Intr[1];
+	pseudo_bit_t Reserved3[31];
+	pseudo_bit_t VL15[1];
+};
+struct QIB_7220_SendPbc {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_SendPbc_pb );
+};
+
+/** Linda send buffer availability */
+struct QIB_7220_SendBufAvail_pb {
+	pseudo_bit_t InUseCheck[144][2];
+	pseudo_bit_t Reserved[32];
+};
+struct QIB_7220_SendBufAvail {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_SendBufAvail_pb );
+};
+
+/** DMA alignment for send buffer availability */
+#define LINDA_SENDBUFAVAIL_ALIGN 64
+
+/** A Linda eager receive descriptor */
+struct QIB_7220_RcvEgr_pb {
+	pseudo_bit_t Addr[37];
+	pseudo_bit_t BufSize[3];
+	pseudo_bit_t Reserved[24];
+};
+struct QIB_7220_RcvEgr {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvEgr_pb );
+};
+
+/** Linda receive header flags */
+struct QIB_7220_RcvHdrFlags_pb {
+	pseudo_bit_t PktLen[11];
+	pseudo_bit_t RcvType[3];
+	pseudo_bit_t SoftB[1];
+	pseudo_bit_t SoftA[1];
+	pseudo_bit_t EgrIndex[12];
+	pseudo_bit_t Reserved1[3];
+	pseudo_bit_t UseEgrBfr[1];
+	pseudo_bit_t RcvSeq[4];
+	pseudo_bit_t HdrqOffset[11];
+	pseudo_bit_t Reserved2[8];
+	pseudo_bit_t IBErr[1];
+	pseudo_bit_t MKErr[1];
+	pseudo_bit_t TIDErr[1];
+	pseudo_bit_t KHdrErr[1];
+	pseudo_bit_t MTUErr[1];
+	pseudo_bit_t LenErr[1];
+	pseudo_bit_t ParityErr[1];
+	pseudo_bit_t VCRCErr[1];
+	pseudo_bit_t ICRCErr[1];
+};
+struct QIB_7220_RcvHdrFlags {
+	PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvHdrFlags_pb );
+};
+
+/** Linda memory BAR size */
+#define LINDA_BAR0_SIZE 0x400000
+
+/** Linda I2C SCL line GPIO number */
+#define LINDA_GPIO_SCL 0
+
+/** Linda I2C SDA line GPIO number */
+#define LINDA_GPIO_SDA 1
+
+/** GUID offset within EEPROM */
+#define LINDA_EEPROM_GUID_OFFSET 3
+
+/** GUID size within EEPROM */
+#define LINDA_EEPROM_GUID_SIZE 8
+
+/** Board serial number offset within EEPROM */
+#define LINDA_EEPROM_SERIAL_OFFSET 12
+
+/** Board serial number size within EEPROM */
+#define LINDA_EEPROM_SERIAL_SIZE 12
+
+/** Maximum number of send buffers used
+ *
+ * This is a policy decision.  Must be less than or equal to the total
+ * number of send buffers supported by the hardware (128).
+ */
+#define LINDA_MAX_SEND_BUFS 32
+
+/** Linda send buffer size */
+#define LINDA_SEND_BUF_SIZE 4096
+
+/** Number of contexts (including kernel context)
+ *
+ * This is a policy decision.  Must be 5, 9 or 17.
+ */
+#define LINDA_NUM_CONTEXTS 5
+
+/** PortCfg values for different numbers of contexts */
+enum linda_portcfg {
+	LINDA_PORTCFG_5CTX = 0,
+	LINDA_PORTCFG_9CTX = 1,
+	LINDA_PORTCFG_17CTX = 2,
+};
+
+/** PortCfg values for different numbers of contexts */
+#define LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048
+#define LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER 4096
+#define LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048
+#define LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER 2048
+#define LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048
+#define LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER 1024
+
+/** Eager buffer required alignment */
+#define LINDA_EAGER_BUFFER_ALIGN 2048
+
+/** Eager buffer size encodings */
+enum linda_eager_buffer_size {
+	LINDA_EAGER_BUFFER_NONE = 0,
+	LINDA_EAGER_BUFFER_2K = 1,
+	LINDA_EAGER_BUFFER_4K = 2,
+	LINDA_EAGER_BUFFER_8K = 3,
+	LINDA_EAGER_BUFFER_16K = 4,
+	LINDA_EAGER_BUFFER_32K = 5,
+	LINDA_EAGER_BUFFER_64K = 6,
+};
+
+/** Number of RX headers per context
+ *
+ * This is a policy decision.
+ */
+#define LINDA_RECV_HEADER_COUNT 8
+
+/** Maximum size of each RX header
+ *
+ * This is a policy decision.  Must be divisible by 4.
+ */
+#define LINDA_RECV_HEADER_SIZE 96
+
+/** Total size of an RX header ring */
+#define LINDA_RECV_HEADERS_SIZE \
+	( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )
+
+/** RX header alignment */
+#define LINDA_RECV_HEADERS_ALIGN 64
+
+/** RX payload size
+ *
+ * This is a policy decision.  Must be a valid eager buffer size.
+ */
+#define LINDA_RECV_PAYLOAD_SIZE 2048
+
+/** QPN used for Infinipath Packets
+ *
+ * This is a policy decision.  Must have bit 0 clear.  Must not be a
+ * QPN that we will use.
+ */
+#define LINDA_QP_IDETH 0xdead0
+
+/** Maximum time for wait for external parallel bus request, in us */
+#define LINDA_EPB_REQUEST_MAX_WAIT_US 500
+
+/** Maximum time for wait for external parallel bus transaction, in us */
+#define LINDA_EPB_XACT_MAX_WAIT_US 500
+
+/** Linda external parallel bus chip selects */
+#define LINDA_EPB_CS_SERDES 1
+#define LINDA_EPB_CS_UC 2
+
+/** Linda external parallel bus read/write operations */
+#define LINDA_EPB_WRITE 0
+#define LINDA_EPB_READ 1
+
+/** Linda external parallel bus register addresses */
+#define LINDA_EPB_ADDRESS( _channel, _element, _reg ) \
+	( (_element) | ( (_channel) << 4 ) | ( (_reg) << 9 ) )
+#define LINDA_EPB_ADDRESS_CHANNEL( _address )	( ( (_address) >> 4 ) & 0x1f )
+#define LINDA_EPB_ADDRESS_ELEMENT( _address )	( ( (_address) >> 0 ) & 0x0f )
+#define LINDA_EPB_ADDRESS_REG( _address )	( ( (_address) >> 9 ) & 0x3f )
+
+/** Linda external parallel bus locations
+ *
+ * The location is used by the driver to encode both the chip select
+ * and the EPB address.
+ */
+#define LINDA_EPB_LOC( _cs, _channel, _element, _reg) \
+	( ( (_cs) << 16 ) | LINDA_EPB_ADDRESS ( _channel, _element, _reg ) )
+#define LINDA_EPB_LOC_ADDRESS( _loc )	( (_loc) & 0xffff )
+#define LINDA_EPB_LOC_CS( _loc )	( (_loc) >> 16 )
+
+/** Linda external parallel bus microcontroller register addresses */
+#define LINDA_EPB_UC_CHANNEL 6
+#define LINDA_EPB_UC_LOC( _reg ) \
+	LINDA_EPB_LOC ( LINDA_EPB_CS_UC, LINDA_EPB_UC_CHANNEL, 0, (_reg) )
+#define LINDA_EPB_UC_CTL	LINDA_EPB_UC_LOC ( 0 )
+#define LINDA_EPB_UC_CTL_WRITE	1
+#define LINDA_EPB_UC_CTL_READ	2
+#define LINDA_EPB_UC_ADDR_LO	LINDA_EPB_UC_LOC ( 2 )
+#define LINDA_EPB_UC_ADDR_HI	LINDA_EPB_UC_LOC ( 3 )
+#define LINDA_EPB_UC_DATA	LINDA_EPB_UC_LOC ( 4 )
+#define LINDA_EPB_UC_CHUNK_SIZE	64
+
+extern uint8_t linda_ib_fw[8192];
+
+/** Maximum time to wait for "trim done" signal, in ms */
+#define LINDA_TRIM_DONE_MAX_WAIT_MS 1000
+
+/** Linda link states */
+enum linda_link_state {
+	LINDA_LINK_STATE_DOWN = 0,
+	LINDA_LINK_STATE_INIT = 1,
+	LINDA_LINK_STATE_ARM = 2,
+	LINDA_LINK_STATE_ACTIVE = 3,
+	LINDA_LINK_STATE_ACT_DEFER = 4,
+};
+
+/** Maximum time to wait for link state changes, in us */
+#define LINDA_LINK_STATE_MAX_WAIT_US 20
+
+#endif /* _LINDA_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/mlx_bitops.h ipxe-1.0.1~lliurex1505/src/drivers/infiniband/mlx_bitops.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/mlx_bitops.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/mlx_bitops.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib7322.c ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib7322.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib7322.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib7322.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -1173,13 +1172,13 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @ret rc		Return status code
  */
 static int qib7322_post_send ( struct ib_device *ibdev,
 			       struct ib_queue_pair *qp,
-			       struct ib_address_vector *dest,
+			       struct ib_address_vector *av,
 			       struct io_buffer *iobuf ) {
 	struct qib7322 *qib7322 = ib_get_drvdata ( ibdev );
 	struct ib_work_queue *wq = &qp->send;
@@ -1211,7 +1210,7 @@
 	/* Construct headers */
 	iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
 	iob_reserve ( &headers, sizeof ( header_buf ) );
-	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), dest );
+	ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
 
 	/* Calculate packet length */
 	len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
@@ -1413,8 +1412,7 @@
 	struct io_buffer headers;
 	struct io_buffer *iobuf;
 	struct ib_queue_pair *intended_qp;
-	struct ib_address_vector dest;
-	struct ib_address_vector source;
+	struct ib_address_vector av;
 	unsigned int rcvtype;
 	unsigned int pktlen;
 	unsigned int egrindex;
@@ -1475,7 +1473,7 @@
 	qp0 = ( qp->qpn == 0 );
 	intended_qp = NULL;
 	if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
-			      &payload_len, &dest, &source ) ) != 0 ) {
+			      &payload_len, &av ) ) != 0 ) {
 		DBGC ( qib7322, "QIB7322 %p could not parse headers: %s\n",
 		       qib7322, strerror ( rc ) );
 		err = 1;
@@ -1532,12 +1530,10 @@
 				qp->recv.fill--;
 				intended_qp->recv.fill++;
 			}
-			ib_complete_recv ( ibdev, intended_qp, &dest, &source,
-					   iobuf, rc);
+			ib_complete_recv ( ibdev, intended_qp, &av, iobuf, rc);
 		} else {
 			/* Completing on a skipped-over eager buffer */
-			ib_complete_recv ( ibdev, qp, &dest, &source, iobuf,
-					   -ECANCELED );
+			ib_complete_recv ( ibdev, qp, &av, iobuf, -ECANCELED );
 		}
 
 		/* Clear eager buffer */
@@ -2066,9 +2062,6 @@
 	struct QIB_7322_ahb_transaction_reg xact;
 	int rc;
 
-	/* Avoid returning uninitialised data on error */
-	*data = 0;
-
 	/* Initiate transaction */
 	memset ( &xact, 0, sizeof ( xact ) );
 	BIT_FILL_2 ( &xact,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib7322.h ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib7322.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib7322.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib7322.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib_genbits.pl ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib_genbits.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/infiniband/qib_genbits.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/infiniband/qib_genbits.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 use strict;
 use warnings;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/linux/tap.c ipxe-1.0.1~lliurex1505/src/drivers/linux/tap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/linux/tap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/linux/tap.c	2012-01-06 23:49:04.000000000 +0000
@@ -200,6 +200,11 @@
 	netdev->dev = &device->dev;
 	memset(nic, 0, sizeof(*nic));
 
+	if ((rc = register_netdev(netdev)) != 0)
+		goto err_register;
+
+	netdev_link_up(netdev);
+
 	/* Look for the mandatory if setting */
 	if_setting = linux_find_setting("if", &request->settings);
 
@@ -211,20 +216,11 @@
 	}
 
 	nic->interface = if_setting->value;
-	snprintf ( device->dev.name, sizeof ( device->dev.name ), "%s",
-		   nic->interface );
-	device->dev.desc.bus_type = BUS_TYPE_TAP;
 	if_setting->applied = 1;
 
 	/* Apply rest of the settings */
 	linux_apply_settings(&request->settings, &netdev->settings.settings);
 
-	/* Register network device */
-	if ((rc = register_netdev(netdev)) != 0)
-		goto err_register;
-
-	netdev_link_up(netdev);
-
 	return 0;
 
 err_settings:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c509-eisa.c ipxe-1.0.1~lliurex1505/src/drivers/net/3c509-eisa.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c509-eisa.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c509-eisa.c	2012-01-06 23:49:04.000000000 +0000
@@ -6,6 +6,7 @@
 
 #include <ipxe/eisa.h>
 #include <ipxe/isa.h>
+#include <ipxe/console.h>
 #include "3c509.h"
 
 /*
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c509.h ipxe-1.0.1~lliurex1505/src/drivers/net/3c509.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c509.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c509.h	2012-01-06 23:49:04.000000000 +0000
@@ -77,7 +77,7 @@
 /**************************************************************************
  *
  * These define the EEPROM data structure.  They are used in the probe
- * function to verify the existence of the adapter after having sent
+ * function to verify the existance of the adapter after having sent
  * the ID_Sequence.
  *
  * There are others but only the ones we use are defined here.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c515.c ipxe-1.0.1~lliurex1505/src/drivers/net/3c515.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c515.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c515.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 * Portions of this code:
 * Copyright (C) 1997-2002 Donald Becker  3c515.c: A 3Com ISA EtherLink XL "Corkscrew" ethernet driver for linux.
@@ -389,7 +388,7 @@
 		outb(PKT_BUF_SZ >> 8, nic->ioaddr + TxFreeThreshold);	/* Room for a packet. */
 		/* Clear the Tx ring. */
 		for (i = 0; i < TX_RING_SIZE; i++)
-			vp->tx_skbuff[i] = NULL;
+			vp->tx_skbuff[i] = 0;
 		outl(0, nic->ioaddr + DownListPtr);
 	}
 	/* Set receiver mode: presumably accept b-case and phys addr only. */
@@ -656,7 +655,7 @@
 corkscrew_found_device(int ioaddr, int irq,
 		       int product_index, int options, struct nic *nic)
 {
-	/* Direct copy from Becker 3c515.c with unnecessary parts removed */
+	/* Direct copy from Becker 3c515.c with unecessary parts removed */
 	vp->product_name = "3c515";
 	vp->options = options;
 	if (options >= 0) {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c595.c ipxe-1.0.1~lliurex1505/src/drivers/net/3c595.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c595.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c595.c	2012-01-06 23:49:04.000000000 +0000
@@ -127,7 +127,7 @@
 		S_TX_COMPLETE | S_TX_AVAIL, BASE + VX_COMMAND);
 
 /*
- * Attempt to get rid of any stray interrupts that occurred during
+ * Attempt to get rid of any stray interrupts that occured during
  * configuration.  On the i386 this isn't possible because one may
  * already be queued.  However, a single stray interrupt is
  * unimportant.
@@ -399,7 +399,7 @@
 
     i = vx_connector;       /* default in EEPROM */
     reason = "default";
-    warning = NULL;
+    warning = 0;
 
     if ((vx_connectors & conn_tab[vx_connector].bit) == 0) {
         warning = "strange connector type in EEPROM.";
@@ -407,7 +407,7 @@
         i = CONNECTOR_UTP;
     }
 
-        if (warning) {
+        if (warning != 0) {
             printf("warning: %s\n", warning);
         }
         printf("selected %s. (%s)\n", conn_tab[i].name, reason);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c90x.c ipxe-1.0.1~lliurex1505/src/drivers/net/3c90x.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c90x.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c90x.c	2012-01-06 23:49:04.000000000 +0000
@@ -346,12 +346,11 @@
 	tx_cur_desc->DnNextPtr = 0;
 
 	/* FrameStartHeader differs in 90x and >= 90xB
-	 * It contains the packet length in 90x and a round up boundary and
-	 * packet ID for 90xB and 90xC. Disable packet length round-up on the
-	 * later revisions.
+	 * It contains length in 90x and a round up boundary and packet ID for
+	 * 90xB and 90xC. We can leave this to 0 for 90xB and 90xC.
 	 */
 	tx_cur_desc->FrameStartHeader =
-	    fshTxIndicate | (inf_3c90x->isBrev ? fshRndupDefeat : len);
+	    fshTxIndicate | (inf_3c90x->isBrev ? 0x00 : len);
 
 	tx_cur_desc->DataAddr = virt_to_bus(iob->data);
 	tx_cur_desc->DataLength = len | downLastFrag;
@@ -814,18 +813,10 @@
 		goto error;
 	}
 
-	a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl, upStall);
-
 	/* send rx_ring address to NIC */
 	outl(virt_to_bus(inf_3c90x->rx_ring),
 	     inf_3c90x->IOAddr + regUpListPtr_l);
 
-	a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdStallCtl, upUnStall);
-
-	/* set maximum allowed receive packet length */
-	a3c90x_internal_SetWindow(inf_3c90x, winTxRxOptions3);
-	outl(RX_BUF_SIZE, inf_3c90x->IOAddr + regMaxPktSize_3_w);
-
 	/* enable packet transmission and reception */
 	a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdTxEnable, 0);
 	a3c90x_internal_IssueCommand(inf_3c90x->IOAddr, cmdRxEnable, 0);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c90x.h ipxe-1.0.1~lliurex1505/src/drivers/net/3c90x.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/3c90x.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/3c90x.h	2012-01-06 23:49:04.000000000 +0000
@@ -202,7 +202,6 @@
 enum FrameStartHeader {
 	fshTxIndicate = 0x8000,
 	fshDnComplete = 0x10000,
-	fshRndupDefeat = 0x10000000,
 };
 
 enum UpDownDesc {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/amd8111e.c ipxe-1.0.1~lliurex1505/src/drivers/net/amd8111e.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/amd8111e.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/amd8111e.c	2012-01-06 23:49:04.000000000 +0000
@@ -24,8 +24,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 
  * USA
  */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/amd8111e.h ipxe-1.0.1~lliurex1505/src/drivers/net/amd8111e.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/amd8111e.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/amd8111e.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 
  * USA
 
 Module Name:
@@ -574,7 +573,7 @@
 #define CSTATE  1 
 #define SSTATE  2 
 
-/* amd8111e descriptor flag definitions */
+/* amd8111e decriptor flag definitions */
 typedef enum {
 
 	OWN_BIT		=	(1 << 15),
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ani.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ani.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ani.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ani.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef ANI_H
 #define ANI_H
 
-FILE_LICENCE ( BSD2 );
-
 #define HAL_PROCESS_ANI           0x00000001
 
 #define DO_ANI(ah) (((ah)->proc_phyerr & HAL_PROCESS_ANI) && ah->curchan)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar5008_initvals.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar5008_initvals.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar5008_initvals.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar5008_initvals.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 static const u32 ar5416Modes[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9001_initvals.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9001_initvals.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9001_initvals.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9001_initvals.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 static const u32 ar5416Modes_9100[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9002_initvals.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9002_initvals.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9002_initvals.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9002_initvals.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 static const u32 ar9280Modes_9280_2[][6] = {
 	{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
 	{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9002_phy.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9002_phy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9002_phy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9002_phy.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,6 @@
 #ifndef AR9002_PHY_H
 #define AR9002_PHY_H
 
-FILE_LICENCE ( BSD2 );
-
 #define AR_PHY_TEST             0x9800
 #define PHY_AGC_CLR             0x10000000
 #define RFSILENT_BB             0x00002000
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9003_eeprom.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9003_eeprom.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ar9003_eeprom.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ar9003_eeprom.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef AR9003_EEPROM_H
 #define AR9003_EEPROM_H
 
-FILE_LICENCE ( BSD2 );
-
 #define AR9300_EEP_VER               0xD000
 #define AR9300_EEP_VER_MINOR_MASK    0xFFF
 #define AR9300_EEP_MINOR_VER_1       0x1
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_ar9002_hw.c ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_ar9002_hw.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_ar9002_hw.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_ar9002_hw.c	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 #include "hw.h"
 #include "ar5008_initvals.h"
 #include "ar9001_initvals.h"
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef ATH9K_H
 #define ATH9K_H
 
-FILE_LICENCE ( BSD2 );
-
 #include "common.h"
 
 /*
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_init.c ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_init.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_init.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_init.c	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 #include <ipxe/malloc.h>
 #include <ipxe/pci_io.h>
 #include <ipxe/pci.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_mac.c ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_mac.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/ath9k_mac.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/ath9k_mac.c	2012-01-06 23:49:04.000000000 +0000
@@ -638,7 +638,7 @@
 		REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));
 }
 
-void ath9k_hw_set_interrupts(struct ath_hw *ah, unsigned int ints)
+void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
 {
 	enum ath9k_int omask = ah->imask;
 	u32 mask, mask2;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/calib.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/calib.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/calib.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/calib.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef CALIB_H
 #define CALIB_H
 
-FILE_LICENCE ( BSD2 );
-
 #include "hw.h"
 
 #define AR_PHY_CCA_FILTERWINDOW_LENGTH_INIT     3
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/common.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/common.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/common.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/common.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 
-FILE_LICENCE ( BSD2 );
-
 #include "../ath.h"
 
 #include "hw.h"
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/eeprom.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/eeprom.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/eeprom.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/eeprom.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef EEPROM_H
 #define EEPROM_H
 
-FILE_LICENCE ( BSD2 );
-
 #define AR_EEPROM_MODAL_SPURS   5
 
 #include "../ath.h"
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/hw.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/hw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/hw.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/hw.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef HW_H
 #define HW_H
 
-FILE_LICENCE ( BSD2 );
-
 #include <errno.h>
 
 #include "mac.h"
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/hw-ops.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/hw-ops.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/hw-ops.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/hw-ops.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
 #ifndef ATH9K_HW_OPS_H
 #define ATH9K_HW_OPS_H
 
-FILE_LICENCE ( BSD2 );
-
 #include "hw.h"
 
 /* Hardware core and driver accessible callbacks */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/mac.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/mac.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/mac.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/mac.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef MAC_H
 #define MAC_H
 
-FILE_LICENCE ( BSD2 );
-
 #include <unistd.h>
 
 #define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_20_OR_LATER(ah) ?		\
@@ -670,6 +668,7 @@
 
 struct ath_hw;
 struct ath9k_channel;
+enum ath9k_int;
 
 u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
 void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
@@ -700,7 +699,7 @@
 
 /* Interrupt Handling */
 int ath9k_hw_intrpend(struct ath_hw *ah);
-void ath9k_hw_set_interrupts(struct ath_hw *ah, unsigned int ints);
+void ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints);
 void ath9k_hw_enable_interrupts(struct ath_hw *ah);
 void ath9k_hw_disable_interrupts(struct ath_hw *ah);
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/phy.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/phy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/phy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/phy.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
 #ifndef PHY_H
 #define PHY_H
 
-FILE_LICENCE ( BSD2 );
-
 #define CHANSEL_DIV		15
 #define CHANSEL_2G(_freq)	(((_freq) * 0x10000) / CHANSEL_DIV)
 #define CHANSEL_5G(_freq)	(((_freq) * 0x8000) / CHANSEL_DIV)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/reg.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/reg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath9k/reg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath9k/reg.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,6 @@
 #ifndef REG_H
 #define REG_H
 
-FILE_LICENCE ( BSD2 );
-
 #include "../reg.h"
 
 #define AR_CR                0x0008
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/ath.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/ath.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef ATH_H
 #define ATH_H
 
-FILE_LICENCE ( BSD2 );
-
 #include <unistd.h>
 #include <ipxe/net80211.h>
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/regd.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/regd.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/regd.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/regd.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef REGD_H
 #define REGD_H
 
-FILE_LICENCE ( BSD2 );
-
 #include "ath.h"
 
 enum ctl_group {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/reg.h ipxe-1.0.1~lliurex1505/src/drivers/net/ath/reg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ath/reg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ath/reg.h	2012-01-06 23:49:04.000000000 +0000
@@ -20,8 +20,6 @@
 #ifndef ATH_REGISTERS_H
 #define ATH_REGISTERS_H
 
-FILE_LICENCE ( BSD2 );
-
 #define AR_MIBC			0x0040
 #define AR_MIBC_COW		0x00000001
 #define AR_MIBC_FMC		0x00000002
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/atl1e.c ipxe-1.0.1~lliurex1505/src/drivers/net/atl1e.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/atl1e.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/atl1e.c	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,8 @@
  * more details.
  *
  * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 51
- * Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/atl1e.h ipxe-1.0.1~lliurex1505/src/drivers/net/atl1e.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/atl1e.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/atl1e.h	2012-01-06 23:49:04.000000000 +0000
@@ -18,8 +18,8 @@
  * more details.
  *
  * You should have received a copy of the GNU General Public License along with
- * this program; if not, write to the Free Software Foundation, Inc., 51
- * Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/b44.c ipxe-1.0.1~lliurex1505/src/drivers/net/b44.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/b44.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/b44.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * This driver is a port of the b44 linux driver version 1.01
  *
@@ -79,21 +78,24 @@
 
 
 /**
- * Check if card can access address
- *
- * @v address		Virtual address
- * @v address_ok	Card can access address
+ * Return non-zero if the installed RAM is within
+ * the limit given and zero if it is outside.
+ * Hopefully will be removed soon.
  */
-static inline __attribute__ (( always_inline )) int
-b44_address_ok ( void *address ) {
+int phys_ram_within_limit(u64 limit)
+{
+	struct memory_map memmap;
+	struct memory_region *highest = NULL;
+	get_memmap(&memmap);
 
-	/* Card can address anything with a 30-bit address */
-	if ( ( virt_to_bus ( address ) & ~B44_30BIT_DMA_MASK ) == 0 )
-		return 1;
+	if (memmap.count == 0)
+		return 0;
+	highest = &memmap.regions[memmap.count - 1];
 
-	return 0;
+	return (highest->end < limit);
 }
 
+
 /**
  * Ring cells waiting to be processed are between 'tx_cur' and 'pending'
  * indexes in the ring.
@@ -402,7 +404,6 @@
  */
 static void b44_rx_refill(struct b44_private *bp, u32 pending)
 {
-	struct io_buffer *iobuf;
 	u32 i;
 
 	// skip pending
@@ -410,17 +411,11 @@
 		if (bp->rx_iobuf[i] != NULL)
 			continue;
 
-		iobuf = alloc_iob(RX_PKT_BUF_SZ);
-		if (!iobuf) {
+		bp->rx_iobuf[i] = alloc_iob(RX_PKT_BUF_SZ);
+		if (!bp->rx_iobuf[i]) {
 			DBG("Refill rx ring failed!!\n");
 			break;
 		}
-		if (!b44_address_ok(iobuf->data)) {
-			DBG("Refill rx ring bad address!!\n");
-			free_iob(iobuf);
-			break;
-		}
-		bp->rx_iobuf[i] = iobuf;
 
 		b44_populate_rx_descriptor(bp, i);
 	}
@@ -449,10 +444,6 @@
 	bp->rx = malloc_dma(B44_RX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
 	if (!bp->rx)
 		return -ENOMEM;
-	if (!b44_address_ok(bp->rx)) {
-		free_dma(bp->rx, B44_RX_RING_LEN_BYTES);
-		return -ENOTSUP;
-	}
 
 	memset(bp->rx_iobuf, 0, sizeof(bp->rx_iobuf));
 
@@ -481,10 +472,6 @@
 	bp->tx = malloc_dma(B44_TX_RING_LEN_BYTES, B44_DMA_ALIGNMENT);
 	if (!bp->tx)
 		return -ENOMEM;
-	if (!b44_address_ok(bp->tx)) {
-		free_dma(bp->tx, B44_TX_RING_LEN_BYTES);
-		return -ENOTSUP;
-	}
 
 	memset(bp->tx, 0, B44_TX_RING_LEN_BYTES);
 	memset(bp->tx_iobuf, 0, sizeof(bp->tx_iobuf));
@@ -657,6 +644,17 @@
 	struct b44_private *bp;
 	int rc;
 
+	/*
+	 * Bail out if more than 1GB of physical RAM is installed.
+	 * This limitation will be removed later when dma mapping
+	 * is merged into mainline.
+	 */
+	if (!phys_ram_within_limit(B44_30BIT_DMA_MASK)) {
+		DBG("Sorry, this version of the driver does not\n"
+		    "support systems with more than 1GB of RAM.\n");
+		return -ENOMEM;
+	}
+
 	/* Set up netdev */
 	netdev = alloc_etherdev(sizeof(*bp));
 	if (!netdev)
@@ -795,10 +793,6 @@
 		return -ENOBUFS;
 	}
 
-	/* Check for addressability */
-	if (!b44_address_ok(iobuf->data))
-		return -ENOTSUP;
-
 	/* Will call netdev_tx_complete() on the iobuf later */
 	bp->tx_iobuf[cur] = iobuf;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/b44.h ipxe-1.0.1~lliurex1505/src/drivers/net/b44.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/b44.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/b44.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * This driver is a port of the b44 linux driver version 1.01
  *
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2.c ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2697 @@
+/* bnx2.c: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005, 2006 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation.
+ *
+ * Written by: Michael Chan  (mchan@broadcom.com)
+ *
+ * Etherboot port by Ryan Jackson (rjackson@lnxi.com), based on driver
+ * version 1.4.40 from linux 2.6.17
+ */
+
+FILE_LICENCE ( GPL_ANY );
+
+#include "etherboot.h"
+#include "nic.h"
+#include <errno.h>
+#include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
+#include "string.h"
+#include <mii.h>
+#include "bnx2.h"
+#include "bnx2_fw.h"
+
+#if 0
+/* Dummy defines for error handling */
+#define EBUSY  1
+#define ENODEV 2
+#define EINVAL 3
+#define ENOMEM 4
+#define EIO    5
+#endif
+
+/* The bnx2 seems to be picky about the alignment of the receive buffers
+ * and possibly the status block.
+ */
+static struct bss {
+	struct tx_bd tx_desc_ring[TX_DESC_CNT];
+	struct rx_bd rx_desc_ring[RX_DESC_CNT];
+	unsigned char rx_buf[RX_BUF_CNT][RX_BUF_SIZE];
+	struct status_block status_blk;
+	struct statistics_block stats_blk;
+} bnx2_bss;
+
+static struct bnx2 bnx2;
+
+static struct flash_spec flash_table[] =
+{
+	/* Slow EEPROM */
+	{0x00000000, 0x40830380, 0x009f0081, 0xa184a053, 0xaf000400,
+	 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+	 "EEPROM - slow"},
+	/* Expansion entry 0001 */
+	{0x08000002, 0x4b808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 0001"},
+	/* Saifun SA25F010 (non-buffered flash) */
+	/* strap, cfg1, & write1 need updates */
+	{0x04000001, 0x47808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*2,
+	 "Non-buffered flash (128kB)"},
+	/* Saifun SA25F020 (non-buffered flash) */
+	/* strap, cfg1, & write1 need updates */
+	{0x0c000003, 0x4f808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE*4,
+	 "Non-buffered flash (256kB)"},
+	/* Expansion entry 0100 */
+	{0x11000000, 0x53808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 0100"},
+	/* Entry 0101: ST M45PE10 (non-buffered flash, TetonII B0) */
+	{0x19000002, 0x5b808201, 0x000500db, 0x03840253, 0xaf020406,        
+	 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*2,
+	 "Entry 0101: ST M45PE10 (128kB non-bufferred)"},
+	/* Entry 0110: ST M45PE20 (non-buffered flash)*/
+	{0x15000001, 0x57808201, 0x000500db, 0x03840253, 0xaf020406,
+	 0, ST_MICRO_FLASH_PAGE_BITS, ST_MICRO_FLASH_PAGE_SIZE,
+	 ST_MICRO_FLASH_BYTE_ADDR_MASK, ST_MICRO_FLASH_BASE_TOTAL_SIZE*4,
+	 "Entry 0110: ST M45PE20 (256kB non-bufferred)"},
+	/* Saifun SA25F005 (non-buffered flash) */
+	/* strap, cfg1, & write1 need updates */
+	{0x1d000003, 0x5f808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, SAIFUN_FLASH_BASE_TOTAL_SIZE,
+	 "Non-buffered flash (64kB)"},
+	/* Fast EEPROM */
+	{0x22000000, 0x62808380, 0x009f0081, 0xa184a053, 0xaf000400,
+	 1, SEEPROM_PAGE_BITS, SEEPROM_PAGE_SIZE,
+	 SEEPROM_BYTE_ADDR_MASK, SEEPROM_TOTAL_SIZE,
+	 "EEPROM - fast"},
+	/* Expansion entry 1001 */
+	{0x2a000002, 0x6b808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 1001"},
+	/* Expansion entry 1010 */
+	{0x26000001, 0x67808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 1010"},
+	/* ATMEL AT45DB011B (buffered flash) */
+	{0x2e000003, 0x6e808273, 0x00570081, 0x68848353, 0xaf000400,
+	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE,
+	 "Buffered flash (128kB)"},
+	/* Expansion entry 1100 */
+	{0x33000000, 0x73808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 1100"},
+	/* Expansion entry 1101 */
+	{0x3b000002, 0x7b808201, 0x00050081, 0x03840253, 0xaf020406,
+	 0, SAIFUN_FLASH_PAGE_BITS, SAIFUN_FLASH_PAGE_SIZE,
+	 SAIFUN_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 1101"},
+	/* Ateml Expansion entry 1110 */
+	{0x37000001, 0x76808273, 0x00570081, 0x68848353, 0xaf000400,
+	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLASH_BYTE_ADDR_MASK, 0,
+	 "Entry 1110 (Atmel)"},
+	/* ATMEL AT45DB021B (buffered flash) */
+	{0x3f000003, 0x7e808273, 0x00570081, 0x68848353, 0xaf000400,
+	 1, BUFFERED_FLASH_PAGE_BITS, BUFFERED_FLASH_PAGE_SIZE,
+	 BUFFERED_FLASH_BYTE_ADDR_MASK, BUFFERED_FLASH_TOTAL_SIZE*2,
+	 "Buffered flash (256kB)"},
+};
+
+static u32
+bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset)
+{
+	REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
+	return (REG_RD(bp, BNX2_PCICFG_REG_WINDOW));
+}
+
+static void
+bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val)
+{
+	REG_WR(bp, BNX2_PCICFG_REG_WINDOW_ADDRESS, offset);
+	REG_WR(bp, BNX2_PCICFG_REG_WINDOW, val);
+}
+
+static void
+bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val)
+{
+	offset += cid_addr;
+	REG_WR(bp, BNX2_CTX_DATA_ADR, offset);
+	REG_WR(bp, BNX2_CTX_DATA, val);
+}
+
+static int
+bnx2_read_phy(struct bnx2 *bp, u32 reg, u32 *val)
+{
+	u32 val1;
+	int i, ret;
+
+	if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+		val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+		REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+		REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+		udelay(40);
+	}
+
+	val1 = (bp->phy_addr << 21) | (reg << 16) |
+		BNX2_EMAC_MDIO_COMM_COMMAND_READ | BNX2_EMAC_MDIO_COMM_DISEXT |
+		BNX2_EMAC_MDIO_COMM_START_BUSY;
+	REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
+
+	for (i = 0; i < 50; i++) {
+		udelay(10);
+
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+		if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
+			udelay(5);
+
+			val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+			val1 &= BNX2_EMAC_MDIO_COMM_DATA;
+
+			break;
+		}
+	}
+
+	if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY) {
+		*val = 0x0;
+		ret = -EBUSY;
+	}
+	else {
+		*val = val1;
+		ret = 0;
+	}
+
+	if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+		val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+		REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+		REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+		udelay(40);
+	}
+
+	return ret;
+}
+
+static int
+bnx2_write_phy(struct bnx2 *bp, u32 reg, u32 val)
+{
+	u32 val1;
+	int i, ret;
+
+	if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+		val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+		REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+		REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+		udelay(40);
+	}
+
+	val1 = (bp->phy_addr << 21) | (reg << 16) | val |
+		BNX2_EMAC_MDIO_COMM_COMMAND_WRITE |
+		BNX2_EMAC_MDIO_COMM_START_BUSY | BNX2_EMAC_MDIO_COMM_DISEXT;
+	REG_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
+    
+	for (i = 0; i < 50; i++) {
+		udelay(10);
+
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_COMM);
+		if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
+			udelay(5);
+			break;
+		}
+	}
+
+	if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)
+        	ret = -EBUSY;
+	else
+		ret = 0;
+
+	if (bp->phy_flags & PHY_INT_MODE_AUTO_POLLING_FLAG) {
+		val1 = REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+		val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
+
+		REG_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
+		REG_RD(bp, BNX2_EMAC_MDIO_MODE);
+
+		udelay(40);
+	}
+
+	return ret;
+}
+
+static void
+bnx2_disable_int(struct bnx2 *bp)
+{
+	REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+	       BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+	REG_RD(bp, BNX2_PCICFG_INT_ACK_CMD);
+
+}
+
+static int
+bnx2_alloc_mem(struct bnx2 *bp)
+{
+	bp->tx_desc_ring = bnx2_bss.tx_desc_ring;
+	bp->tx_desc_mapping = virt_to_bus(bp->tx_desc_ring);
+
+	bp->rx_desc_ring = bnx2_bss.rx_desc_ring;
+	memset(bp->rx_desc_ring, 0, sizeof(struct rx_bd) * RX_DESC_CNT);
+	bp->rx_desc_mapping = virt_to_bus(bp->rx_desc_ring);
+
+	memset(&bnx2_bss.status_blk, 0, sizeof(struct status_block));
+	bp->status_blk = &bnx2_bss.status_blk;
+	bp->status_blk_mapping = virt_to_bus(&bnx2_bss.status_blk);
+
+	bp->stats_blk = &bnx2_bss.stats_blk;
+	memset(&bnx2_bss.stats_blk, 0, sizeof(struct statistics_block));
+	bp->stats_blk_mapping = virt_to_bus(&bnx2_bss.stats_blk);
+
+	return 0;
+}
+
+static void
+bnx2_report_fw_link(struct bnx2 *bp)
+{
+	u32 fw_link_status = 0;
+
+	if (bp->link_up) {
+		u32 bmsr;
+
+		switch (bp->line_speed) {
+		case SPEED_10:
+			if (bp->duplex == DUPLEX_HALF)
+				fw_link_status = BNX2_LINK_STATUS_10HALF;
+			else
+				fw_link_status = BNX2_LINK_STATUS_10FULL;
+			break;
+		case SPEED_100:
+			if (bp->duplex == DUPLEX_HALF)
+				fw_link_status = BNX2_LINK_STATUS_100HALF;
+			else
+				fw_link_status = BNX2_LINK_STATUS_100FULL;
+			break;
+		case SPEED_1000:
+			if (bp->duplex == DUPLEX_HALF)
+				fw_link_status = BNX2_LINK_STATUS_1000HALF;
+			else
+				fw_link_status = BNX2_LINK_STATUS_1000FULL;
+			break;
+		case SPEED_2500:
+			if (bp->duplex == DUPLEX_HALF)
+				fw_link_status = BNX2_LINK_STATUS_2500HALF;
+			else
+				fw_link_status = BNX2_LINK_STATUS_2500FULL;
+			break;
+		}
+
+		fw_link_status |= BNX2_LINK_STATUS_LINK_UP;
+
+		if (bp->autoneg) {
+			fw_link_status |= BNX2_LINK_STATUS_AN_ENABLED;
+
+			bnx2_read_phy(bp, MII_BMSR, &bmsr);
+			bnx2_read_phy(bp, MII_BMSR, &bmsr);
+
+			if (!(bmsr & BMSR_ANEGCOMPLETE) ||
+			    bp->phy_flags & PHY_PARALLEL_DETECT_FLAG)
+				fw_link_status |= BNX2_LINK_STATUS_PARALLEL_DET;
+			else
+				fw_link_status |= BNX2_LINK_STATUS_AN_COMPLETE;
+		}
+	}
+	else
+		fw_link_status = BNX2_LINK_STATUS_LINK_DOWN;
+
+	REG_WR_IND(bp, bp->shmem_base + BNX2_LINK_STATUS, fw_link_status);
+}
+
+static void
+bnx2_report_link(struct bnx2 *bp)
+{
+	if (bp->link_up) {
+		printf("NIC Link is Up, ");
+
+		printf("%d Mbps ", bp->line_speed);
+
+		if (bp->duplex == DUPLEX_FULL)
+			printf("full duplex");
+		else
+			printf("half duplex");
+
+		if (bp->flow_ctrl) {
+			if (bp->flow_ctrl & FLOW_CTRL_RX) {
+				printf(", receive ");
+				if (bp->flow_ctrl & FLOW_CTRL_TX)
+					printf("& transmit ");
+			}
+			else {
+				printf(", transmit ");
+			}
+			printf("flow control ON");
+		}
+		printf("\n");
+	}
+	else {
+		printf("NIC Link is Down\n");
+	}
+
+	bnx2_report_fw_link(bp);
+}
+
+static void
+bnx2_resolve_flow_ctrl(struct bnx2 *bp)
+{
+	u32 local_adv, remote_adv;
+
+	bp->flow_ctrl = 0;
+	if ((bp->autoneg & (AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) != 
+		(AUTONEG_SPEED | AUTONEG_FLOW_CTRL)) {
+
+		if (bp->duplex == DUPLEX_FULL) {
+			bp->flow_ctrl = bp->req_flow_ctrl;
+		}
+		return;
+	}
+
+	if (bp->duplex != DUPLEX_FULL) {
+		return;
+	}
+
+	if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+	    (CHIP_NUM(bp) == CHIP_NUM_5708)) {
+		u32 val;
+
+		bnx2_read_phy(bp, BCM5708S_1000X_STAT1, &val);
+		if (val & BCM5708S_1000X_STAT1_TX_PAUSE)
+			bp->flow_ctrl |= FLOW_CTRL_TX;
+		if (val & BCM5708S_1000X_STAT1_RX_PAUSE)
+			bp->flow_ctrl |= FLOW_CTRL_RX;
+		return;
+	}
+
+	bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+	bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+	if (bp->phy_flags & PHY_SERDES_FLAG) {
+		u32 new_local_adv = 0;
+		u32 new_remote_adv = 0;
+
+		if (local_adv & ADVERTISE_1000XPAUSE)
+			new_local_adv |= ADVERTISE_PAUSE_CAP;
+		if (local_adv & ADVERTISE_1000XPSE_ASYM)
+			new_local_adv |= ADVERTISE_PAUSE_ASYM;
+		if (remote_adv & ADVERTISE_1000XPAUSE)
+			new_remote_adv |= ADVERTISE_PAUSE_CAP;
+		if (remote_adv & ADVERTISE_1000XPSE_ASYM)
+			new_remote_adv |= ADVERTISE_PAUSE_ASYM;
+
+		local_adv = new_local_adv;
+		remote_adv = new_remote_adv;
+	}
+
+	/* See Table 28B-3 of 802.3ab-1999 spec. */
+	if (local_adv & ADVERTISE_PAUSE_CAP) {
+		if(local_adv & ADVERTISE_PAUSE_ASYM) {
+	                if (remote_adv & ADVERTISE_PAUSE_CAP) {
+				bp->flow_ctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
+			}
+			else if (remote_adv & ADVERTISE_PAUSE_ASYM) {
+				bp->flow_ctrl = FLOW_CTRL_RX;
+			}
+		}
+		else {
+			if (remote_adv & ADVERTISE_PAUSE_CAP) {
+				bp->flow_ctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
+			}
+		}
+	}
+	else if (local_adv & ADVERTISE_PAUSE_ASYM) {
+		if ((remote_adv & ADVERTISE_PAUSE_CAP) &&
+			(remote_adv & ADVERTISE_PAUSE_ASYM)) {
+
+			bp->flow_ctrl = FLOW_CTRL_TX;
+		}
+	}
+}
+
+static int
+bnx2_5708s_linkup(struct bnx2 *bp)
+{
+	u32 val;
+
+	bp->link_up = 1;
+	bnx2_read_phy(bp, BCM5708S_1000X_STAT1, &val);
+	switch (val & BCM5708S_1000X_STAT1_SPEED_MASK) {
+		case BCM5708S_1000X_STAT1_SPEED_10:
+			bp->line_speed = SPEED_10;
+			break;
+		case BCM5708S_1000X_STAT1_SPEED_100:
+			bp->line_speed = SPEED_100;
+			break;
+		case BCM5708S_1000X_STAT1_SPEED_1G:
+			bp->line_speed = SPEED_1000;
+			break;
+		case BCM5708S_1000X_STAT1_SPEED_2G5:
+			bp->line_speed = SPEED_2500;
+			break;
+	}
+	if (val & BCM5708S_1000X_STAT1_FD)
+		bp->duplex = DUPLEX_FULL;
+	else
+		bp->duplex = DUPLEX_HALF;
+
+	return 0;
+}
+
+static int
+bnx2_5706s_linkup(struct bnx2 *bp)
+{
+	u32 bmcr, local_adv, remote_adv, common;
+
+	bp->link_up = 1;
+	bp->line_speed = SPEED_1000;
+
+	bnx2_read_phy(bp, MII_BMCR, &bmcr);
+	if (bmcr & BMCR_FULLDPLX) {
+		bp->duplex = DUPLEX_FULL;
+	}
+	else {
+		bp->duplex = DUPLEX_HALF;
+	}
+
+	if (!(bmcr & BMCR_ANENABLE)) {
+		return 0;
+	}
+
+	bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+	bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+	common = local_adv & remote_adv;
+	if (common & (ADVERTISE_1000XHALF | ADVERTISE_1000XFULL)) {
+
+		if (common & ADVERTISE_1000XFULL) {
+			bp->duplex = DUPLEX_FULL;
+		}
+		else {
+			bp->duplex = DUPLEX_HALF;
+		}
+	}
+
+	return 0;
+}
+
+static int
+bnx2_copper_linkup(struct bnx2 *bp)
+{
+	u32 bmcr;
+
+	bnx2_read_phy(bp, MII_BMCR, &bmcr);
+	if (bmcr & BMCR_ANENABLE) {
+		u32 local_adv, remote_adv, common;
+
+		bnx2_read_phy(bp, MII_CTRL1000, &local_adv);
+		bnx2_read_phy(bp, MII_STAT1000, &remote_adv);
+
+		common = local_adv & (remote_adv >> 2);
+		if (common & ADVERTISE_1000FULL) {
+			bp->line_speed = SPEED_1000;
+			bp->duplex = DUPLEX_FULL;
+		}
+		else if (common & ADVERTISE_1000HALF) {
+			bp->line_speed = SPEED_1000;
+			bp->duplex = DUPLEX_HALF;
+		}
+		else {
+			bnx2_read_phy(bp, MII_ADVERTISE, &local_adv);
+			bnx2_read_phy(bp, MII_LPA, &remote_adv);
+
+			common = local_adv & remote_adv;
+			if (common & ADVERTISE_100FULL) {
+				bp->line_speed = SPEED_100;
+				bp->duplex = DUPLEX_FULL;
+			}
+			else if (common & ADVERTISE_100HALF) {
+				bp->line_speed = SPEED_100;
+				bp->duplex = DUPLEX_HALF;
+			}
+			else if (common & ADVERTISE_10FULL) {
+				bp->line_speed = SPEED_10;
+				bp->duplex = DUPLEX_FULL;
+			}
+			else if (common & ADVERTISE_10HALF) {
+				bp->line_speed = SPEED_10;
+				bp->duplex = DUPLEX_HALF;
+			}
+			else {
+				bp->line_speed = 0;
+				bp->link_up = 0;
+			}
+		}
+	}
+	else {
+		if (bmcr & BMCR_SPEED100) {
+			bp->line_speed = SPEED_100;
+		}
+		else {
+			bp->line_speed = SPEED_10;
+		}
+		if (bmcr & BMCR_FULLDPLX) {
+			bp->duplex = DUPLEX_FULL;
+		}
+		else {
+			bp->duplex = DUPLEX_HALF;
+		}
+	}
+
+	return 0;
+}
+
+static int
+bnx2_set_mac_link(struct bnx2 *bp)
+{
+	u32 val;
+
+	REG_WR(bp, BNX2_EMAC_TX_LENGTHS, 0x2620);
+	if (bp->link_up && (bp->line_speed == SPEED_1000) &&
+		(bp->duplex == DUPLEX_HALF)) {
+		REG_WR(bp, BNX2_EMAC_TX_LENGTHS, 0x26ff);
+	}
+
+	/* Configure the EMAC mode register. */
+	val = REG_RD(bp, BNX2_EMAC_MODE);
+
+	val &= ~(BNX2_EMAC_MODE_PORT | BNX2_EMAC_MODE_HALF_DUPLEX |
+		BNX2_EMAC_MODE_MAC_LOOP | BNX2_EMAC_MODE_FORCE_LINK |
+		BNX2_EMAC_MODE_25G);
+
+	if (bp->link_up) {
+		switch (bp->line_speed) {
+			case SPEED_10:
+				if (CHIP_NUM(bp) == CHIP_NUM_5708) {
+					val |= BNX2_EMAC_MODE_PORT_MII_10;
+					break;
+				}
+				/* fall through */
+			case SPEED_100:
+				val |= BNX2_EMAC_MODE_PORT_MII;
+				break;
+			case SPEED_2500:
+				val |= BNX2_EMAC_MODE_25G;
+				/* fall through */
+			case SPEED_1000:
+				val |= BNX2_EMAC_MODE_PORT_GMII;
+				break;
+		}
+	}
+	else {
+		val |= BNX2_EMAC_MODE_PORT_GMII;
+	}
+
+	/* Set the MAC to operate in the appropriate duplex mode. */
+	if (bp->duplex == DUPLEX_HALF)
+		val |= BNX2_EMAC_MODE_HALF_DUPLEX;
+	REG_WR(bp, BNX2_EMAC_MODE, val);
+
+	/* Enable/disable rx PAUSE. */
+	bp->rx_mode &= ~BNX2_EMAC_RX_MODE_FLOW_EN;
+
+	if (bp->flow_ctrl & FLOW_CTRL_RX)
+		bp->rx_mode |= BNX2_EMAC_RX_MODE_FLOW_EN;
+	REG_WR(bp, BNX2_EMAC_RX_MODE, bp->rx_mode);
+
+	/* Enable/disable tx PAUSE. */
+	val = REG_RD(bp, BNX2_EMAC_TX_MODE);
+	val &= ~BNX2_EMAC_TX_MODE_FLOW_EN;
+
+	if (bp->flow_ctrl & FLOW_CTRL_TX)
+		val |= BNX2_EMAC_TX_MODE_FLOW_EN;
+	REG_WR(bp, BNX2_EMAC_TX_MODE, val);
+
+	/* Acknowledge the interrupt. */
+	REG_WR(bp, BNX2_EMAC_STATUS, BNX2_EMAC_STATUS_LINK_CHANGE);
+
+	return 0;
+}
+
+static int
+bnx2_set_link(struct bnx2 *bp)
+{
+	u32 bmsr;
+	u8 link_up;
+
+	if (bp->loopback == MAC_LOOPBACK) {
+		bp->link_up = 1;
+		return 0;
+	}
+
+	link_up = bp->link_up;
+
+	bnx2_read_phy(bp, MII_BMSR, &bmsr);
+	bnx2_read_phy(bp, MII_BMSR, &bmsr);
+
+	if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+	    (CHIP_NUM(bp) == CHIP_NUM_5706)) {
+		u32 val;
+
+		val = REG_RD(bp, BNX2_EMAC_STATUS);
+		if (val & BNX2_EMAC_STATUS_LINK)
+			bmsr |= BMSR_LSTATUS;
+		else
+			bmsr &= ~BMSR_LSTATUS;
+	}
+
+	if (bmsr & BMSR_LSTATUS) {
+		bp->link_up = 1;
+
+		if (bp->phy_flags & PHY_SERDES_FLAG) {
+			if (CHIP_NUM(bp) == CHIP_NUM_5706)
+				bnx2_5706s_linkup(bp);
+			else if (CHIP_NUM(bp) == CHIP_NUM_5708)
+				bnx2_5708s_linkup(bp);
+		}
+		else {
+			bnx2_copper_linkup(bp);
+		}
+		bnx2_resolve_flow_ctrl(bp);
+	}
+	else {
+		if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+			(bp->autoneg & AUTONEG_SPEED)) {
+
+			u32 bmcr;
+
+			bnx2_read_phy(bp, MII_BMCR, &bmcr);
+			if (!(bmcr & BMCR_ANENABLE)) {
+				bnx2_write_phy(bp, MII_BMCR, bmcr |
+					BMCR_ANENABLE);
+			}
+		}
+		bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
+		bp->link_up = 0;
+	}
+
+	if (bp->link_up != link_up) {
+		bnx2_report_link(bp);
+	}
+
+	bnx2_set_mac_link(bp);
+
+	return 0;
+}
+
+static int
+bnx2_reset_phy(struct bnx2 *bp)
+{
+	int i;
+	u32 reg;
+
+        bnx2_write_phy(bp, MII_BMCR, BMCR_RESET);
+
+#define PHY_RESET_MAX_WAIT 100
+	for (i = 0; i < PHY_RESET_MAX_WAIT; i++) {
+		udelay(10);
+
+		bnx2_read_phy(bp, MII_BMCR, &reg);
+		if (!(reg & BMCR_RESET)) {
+			udelay(20);
+			break;
+		}
+	}
+	if (i == PHY_RESET_MAX_WAIT) {
+		return -EBUSY;
+	}
+	return 0;
+}
+
+static u32
+bnx2_phy_get_pause_adv(struct bnx2 *bp)
+{
+	u32 adv = 0;
+
+	if ((bp->req_flow_ctrl & (FLOW_CTRL_RX | FLOW_CTRL_TX)) ==
+		(FLOW_CTRL_RX | FLOW_CTRL_TX)) {
+
+		if (bp->phy_flags & PHY_SERDES_FLAG) {
+			adv = ADVERTISE_1000XPAUSE;
+		}
+		else {
+			adv = ADVERTISE_PAUSE_CAP;
+		}
+	}
+	else if (bp->req_flow_ctrl & FLOW_CTRL_TX) {
+		if (bp->phy_flags & PHY_SERDES_FLAG) {
+			adv = ADVERTISE_1000XPSE_ASYM;
+		}
+		else {
+			adv = ADVERTISE_PAUSE_ASYM;
+		}
+	}
+	else if (bp->req_flow_ctrl & FLOW_CTRL_RX) {
+		if (bp->phy_flags & PHY_SERDES_FLAG) {
+			adv = ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM;
+		}
+		else {
+			adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
+		}
+	}
+	return adv;
+}
+
+static int
+bnx2_setup_serdes_phy(struct bnx2 *bp)
+{
+	u32 adv, bmcr, up1;
+	u32 new_adv = 0;
+
+	if (!(bp->autoneg & AUTONEG_SPEED)) {
+		u32 new_bmcr;
+		int force_link_down = 0;
+
+		if (CHIP_NUM(bp) == CHIP_NUM_5708) {
+			bnx2_read_phy(bp, BCM5708S_UP1, &up1);
+			if (up1 & BCM5708S_UP1_2G5) {
+				up1 &= ~BCM5708S_UP1_2G5;
+				bnx2_write_phy(bp, BCM5708S_UP1, up1);
+				force_link_down = 1;
+			}
+		}
+
+		bnx2_read_phy(bp, MII_ADVERTISE, &adv);
+		adv &= ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF);
+
+		bnx2_read_phy(bp, MII_BMCR, &bmcr);
+		new_bmcr = bmcr & ~BMCR_ANENABLE;
+		new_bmcr |= BMCR_SPEED1000;
+		if (bp->req_duplex == DUPLEX_FULL) {
+			adv |= ADVERTISE_1000XFULL;
+			new_bmcr |= BMCR_FULLDPLX;
+		}
+		else {
+			adv |= ADVERTISE_1000XHALF;
+			new_bmcr &= ~BMCR_FULLDPLX;
+		}
+		if ((new_bmcr != bmcr) || (force_link_down)) {
+			/* Force a link down visible on the other side */
+			if (bp->link_up) {
+				bnx2_write_phy(bp, MII_ADVERTISE, adv &
+					       ~(ADVERTISE_1000XFULL |
+						 ADVERTISE_1000XHALF));
+				bnx2_write_phy(bp, MII_BMCR, bmcr |
+					BMCR_ANRESTART | BMCR_ANENABLE);
+
+				bp->link_up = 0;
+				bnx2_write_phy(bp, MII_BMCR, new_bmcr);
+			}
+			bnx2_write_phy(bp, MII_ADVERTISE, adv);
+			bnx2_write_phy(bp, MII_BMCR, new_bmcr);
+		}
+		return 0;
+	}
+
+	if (bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) {
+		bnx2_read_phy(bp, BCM5708S_UP1, &up1);
+		up1 |= BCM5708S_UP1_2G5;
+		bnx2_write_phy(bp, BCM5708S_UP1, up1);
+	}
+
+	if (bp->advertising & ADVERTISED_1000baseT_Full)
+		new_adv |= ADVERTISE_1000XFULL;
+
+	new_adv |= bnx2_phy_get_pause_adv(bp);
+
+	bnx2_read_phy(bp, MII_ADVERTISE, &adv);
+	bnx2_read_phy(bp, MII_BMCR, &bmcr);
+
+	bp->serdes_an_pending = 0;
+	if ((adv != new_adv) || ((bmcr & BMCR_ANENABLE) == 0)) {
+		/* Force a link down visible on the other side */
+		if (bp->link_up) {
+			int i;
+
+			bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
+			for (i = 0; i < 110; i++) {
+				udelay(100);
+			}
+		}
+
+		bnx2_write_phy(bp, MII_ADVERTISE, new_adv);
+		bnx2_write_phy(bp, MII_BMCR, bmcr | BMCR_ANRESTART |
+			BMCR_ANENABLE);
+#if 0
+		if (CHIP_NUM(bp) == CHIP_NUM_5706) {
+			/* Speed up link-up time when the link partner
+			 * does not autonegotiate which is very common
+			 * in blade servers. Some blade servers use
+			 * IPMI for kerboard input and it's important
+			 * to minimize link disruptions. Autoneg. involves
+			 * exchanging base pages plus 3 next pages and
+			 * normally completes in about 120 msec.
+			 */
+			bp->current_interval = SERDES_AN_TIMEOUT;
+			bp->serdes_an_pending = 1;
+			mod_timer(&bp->timer, jiffies + bp->current_interval);
+		}
+#endif
+	}
+
+	return 0;
+}
+
+#define ETHTOOL_ALL_FIBRE_SPEED						\
+	(ADVERTISED_1000baseT_Full)
+
+#define ETHTOOL_ALL_COPPER_SPEED					\
+	(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |		\
+	ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |		\
+	ADVERTISED_1000baseT_Full)
+
+#define PHY_ALL_10_100_SPEED (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+	ADVERTISE_100HALF | ADVERTISE_100FULL | ADVERTISE_CSMA)
+	
+#define PHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL)
+
+static int
+bnx2_setup_copper_phy(struct bnx2 *bp)
+{
+	u32 bmcr;
+	u32 new_bmcr;
+
+	bnx2_read_phy(bp, MII_BMCR, &bmcr);
+
+	if (bp->autoneg & AUTONEG_SPEED) {
+		u32 adv_reg, adv1000_reg;
+		u32 new_adv_reg = 0;
+		u32 new_adv1000_reg = 0;
+
+		bnx2_read_phy(bp, MII_ADVERTISE, &adv_reg);
+		adv_reg &= (PHY_ALL_10_100_SPEED | ADVERTISE_PAUSE_CAP |
+			ADVERTISE_PAUSE_ASYM);
+
+		bnx2_read_phy(bp, MII_CTRL1000, &adv1000_reg);
+		adv1000_reg &= PHY_ALL_1000_SPEED;
+
+		if (bp->advertising & ADVERTISED_10baseT_Half)
+			new_adv_reg |= ADVERTISE_10HALF;
+		if (bp->advertising & ADVERTISED_10baseT_Full)
+			new_adv_reg |= ADVERTISE_10FULL;
+		if (bp->advertising & ADVERTISED_100baseT_Half)
+			new_adv_reg |= ADVERTISE_100HALF;
+		if (bp->advertising & ADVERTISED_100baseT_Full)
+			new_adv_reg |= ADVERTISE_100FULL;
+		if (bp->advertising & ADVERTISED_1000baseT_Full)
+			new_adv1000_reg |= ADVERTISE_1000FULL;
+		
+		new_adv_reg |= ADVERTISE_CSMA;
+
+		new_adv_reg |= bnx2_phy_get_pause_adv(bp);
+
+		if ((adv1000_reg != new_adv1000_reg) ||
+			(adv_reg != new_adv_reg) ||
+			((bmcr & BMCR_ANENABLE) == 0)) {
+
+			bnx2_write_phy(bp, MII_ADVERTISE, new_adv_reg);
+			bnx2_write_phy(bp, MII_CTRL1000, new_adv1000_reg);
+			bnx2_write_phy(bp, MII_BMCR, BMCR_ANRESTART |
+				BMCR_ANENABLE);
+		}
+		else if (bp->link_up) {
+			/* Flow ctrl may have changed from auto to forced */
+			/* or vice-versa. */
+
+			bnx2_resolve_flow_ctrl(bp);
+			bnx2_set_mac_link(bp);
+		}
+		return 0;
+	}
+
+	new_bmcr = 0;
+	if (bp->req_line_speed == SPEED_100) {
+		new_bmcr |= BMCR_SPEED100;
+	}
+	if (bp->req_duplex == DUPLEX_FULL) {
+		new_bmcr |= BMCR_FULLDPLX;
+	}
+	if (new_bmcr != bmcr) {
+		u32 bmsr;
+		int i = 0;
+
+		bnx2_read_phy(bp, MII_BMSR, &bmsr);
+		bnx2_read_phy(bp, MII_BMSR, &bmsr);
+		
+		if (bmsr & BMSR_LSTATUS) {
+			/* Force link down */
+			bnx2_write_phy(bp, MII_BMCR, BMCR_LOOPBACK);
+			do {
+				udelay(100);
+				bnx2_read_phy(bp, MII_BMSR, &bmsr);
+				bnx2_read_phy(bp, MII_BMSR, &bmsr);
+				i++;
+			} while ((bmsr & BMSR_LSTATUS) && (i < 620));
+		}
+
+		bnx2_write_phy(bp, MII_BMCR, new_bmcr);
+
+		/* Normally, the new speed is setup after the link has
+		 * gone down and up again. In some cases, link will not go
+		 * down so we need to set up the new speed here.
+		 */
+		if (bmsr & BMSR_LSTATUS) {
+			bp->line_speed = bp->req_line_speed;
+			bp->duplex = bp->req_duplex;
+			bnx2_resolve_flow_ctrl(bp);
+			bnx2_set_mac_link(bp);
+		}
+	}
+	return 0;
+}
+
+static int
+bnx2_setup_phy(struct bnx2 *bp)
+{
+	if (bp->loopback == MAC_LOOPBACK)
+		return 0;
+
+	if (bp->phy_flags & PHY_SERDES_FLAG) {
+		return (bnx2_setup_serdes_phy(bp));
+	}
+	else {
+		return (bnx2_setup_copper_phy(bp));
+	}
+}
+
+static int
+bnx2_init_5708s_phy(struct bnx2 *bp)
+{
+	u32 val;
+
+	bnx2_write_phy(bp, BCM5708S_BLK_ADDR, BCM5708S_BLK_ADDR_DIG3);
+	bnx2_write_phy(bp, BCM5708S_DIG_3_0, BCM5708S_DIG_3_0_USE_IEEE);
+	bnx2_write_phy(bp, BCM5708S_BLK_ADDR, BCM5708S_BLK_ADDR_DIG);
+
+	bnx2_read_phy(bp, BCM5708S_1000X_CTL1, &val);
+	val |= BCM5708S_1000X_CTL1_FIBER_MODE | BCM5708S_1000X_CTL1_AUTODET_EN;
+	bnx2_write_phy(bp, BCM5708S_1000X_CTL1, val);
+
+	bnx2_read_phy(bp, BCM5708S_1000X_CTL2, &val);
+	val |= BCM5708S_1000X_CTL2_PLLEL_DET_EN;
+	bnx2_write_phy(bp, BCM5708S_1000X_CTL2, val);
+
+	if (bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) {
+		bnx2_read_phy(bp, BCM5708S_UP1, &val);
+		val |= BCM5708S_UP1_2G5;
+		bnx2_write_phy(bp, BCM5708S_UP1, val);
+	}
+
+	if ((CHIP_ID(bp) == CHIP_ID_5708_A0) ||
+	    (CHIP_ID(bp) == CHIP_ID_5708_B0) ||
+	    (CHIP_ID(bp) == CHIP_ID_5708_B1)) {
+		/* increase tx signal amplitude */
+		bnx2_write_phy(bp, BCM5708S_BLK_ADDR,
+			       BCM5708S_BLK_ADDR_TX_MISC);
+		bnx2_read_phy(bp, BCM5708S_TX_ACTL1, &val);
+		val &= ~BCM5708S_TX_ACTL1_DRIVER_VCM;
+		bnx2_write_phy(bp, BCM5708S_TX_ACTL1, val);
+		bnx2_write_phy(bp, BCM5708S_BLK_ADDR, BCM5708S_BLK_ADDR_DIG);
+	}
+
+	val = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_CONFIG) &
+	      BNX2_PORT_HW_CFG_CFG_TXCTL3_MASK;
+
+	if (val) {
+		u32 is_backplane;
+
+		is_backplane = REG_RD_IND(bp, bp->shmem_base +
+					  BNX2_SHARED_HW_CFG_CONFIG);
+		if (is_backplane & BNX2_SHARED_HW_CFG_PHY_BACKPLANE) {
+			bnx2_write_phy(bp, BCM5708S_BLK_ADDR,
+				       BCM5708S_BLK_ADDR_TX_MISC);
+			bnx2_write_phy(bp, BCM5708S_TX_ACTL3, val);
+			bnx2_write_phy(bp, BCM5708S_BLK_ADDR,
+				       BCM5708S_BLK_ADDR_DIG);
+		}
+	}
+	return 0;
+}
+
+static int
+bnx2_init_5706s_phy(struct bnx2 *bp)
+{
+	u32 val;
+
+	bp->phy_flags &= ~PHY_PARALLEL_DETECT_FLAG;
+
+	if (CHIP_NUM(bp) == CHIP_NUM_5706) {
+        	REG_WR(bp, BNX2_MISC_UNUSED0, 0x300);
+	}
+
+
+	bnx2_write_phy(bp, 0x18, 0x7);
+	bnx2_read_phy(bp, 0x18, &val);
+	bnx2_write_phy(bp, 0x18, val & ~0x4007);
+
+	bnx2_write_phy(bp, 0x1c, 0x6c00);
+	bnx2_read_phy(bp, 0x1c, &val);
+	bnx2_write_phy(bp, 0x1c, (val & 0x3fd) | 0xec00);
+
+	return 0;
+}
+
+static int
+bnx2_init_copper_phy(struct bnx2 *bp)
+{
+	u32 val;
+
+	bp->phy_flags |= PHY_CRC_FIX_FLAG;
+
+	if (bp->phy_flags & PHY_CRC_FIX_FLAG) {
+		bnx2_write_phy(bp, 0x18, 0x0c00);
+		bnx2_write_phy(bp, 0x17, 0x000a);
+		bnx2_write_phy(bp, 0x15, 0x310b);
+		bnx2_write_phy(bp, 0x17, 0x201f);
+		bnx2_write_phy(bp, 0x15, 0x9506);
+		bnx2_write_phy(bp, 0x17, 0x401f);
+		bnx2_write_phy(bp, 0x15, 0x14e2);
+		bnx2_write_phy(bp, 0x18, 0x0400);
+	}
+
+	bnx2_write_phy(bp, 0x18, 0x7);
+	bnx2_read_phy(bp, 0x18, &val);
+	bnx2_write_phy(bp, 0x18, val & ~0x4007);
+
+	bnx2_read_phy(bp, 0x10, &val);
+	bnx2_write_phy(bp, 0x10, val & ~0x1);
+
+	/* ethernet@wirespeed */
+	bnx2_write_phy(bp, 0x18, 0x7007);
+	bnx2_read_phy(bp, 0x18, &val);
+	bnx2_write_phy(bp, 0x18, val | (1 << 15) | (1 << 4));
+	return 0;
+}
+
+static int
+bnx2_init_phy(struct bnx2 *bp)
+{
+	u32 val;
+	int rc = 0;
+
+	bp->phy_flags &= ~PHY_INT_MODE_MASK_FLAG;
+	bp->phy_flags |= PHY_INT_MODE_LINK_READY_FLAG;
+
+        REG_WR(bp, BNX2_EMAC_ATTENTION_ENA, BNX2_EMAC_ATTENTION_ENA_LINK);
+
+	bnx2_reset_phy(bp);
+
+	bnx2_read_phy(bp, MII_PHYSID1, &val);
+	bp->phy_id = val << 16;
+	bnx2_read_phy(bp, MII_PHYSID2, &val);
+	bp->phy_id |= val & 0xffff;
+
+	if (bp->phy_flags & PHY_SERDES_FLAG) {
+		if (CHIP_NUM(bp) == CHIP_NUM_5706)
+			rc = bnx2_init_5706s_phy(bp);
+		else if (CHIP_NUM(bp) == CHIP_NUM_5708)
+			rc = bnx2_init_5708s_phy(bp);
+	}
+	else {
+		rc = bnx2_init_copper_phy(bp);
+	}
+
+	bnx2_setup_phy(bp);
+
+	return rc;
+}
+
+static int
+bnx2_fw_sync(struct bnx2 *bp, u32 msg_data, int silent)
+{
+	int i;
+	u32 val;
+
+	bp->fw_wr_seq++;
+	msg_data |= bp->fw_wr_seq;
+
+	REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_MB, msg_data);
+
+	/* wait for an acknowledgement. */
+	for (i = 0; i < (FW_ACK_TIME_OUT_MS / 50); i++) {
+		mdelay(50);
+
+		val = REG_RD_IND(bp, bp->shmem_base + BNX2_FW_MB);
+
+		if ((val & BNX2_FW_MSG_ACK) == (msg_data & BNX2_DRV_MSG_SEQ))
+			break;
+	}
+	if ((msg_data & BNX2_DRV_MSG_DATA) == BNX2_DRV_MSG_DATA_WAIT0)
+		return 0;
+
+	/* If we timed out, inform the firmware that this is the case. */
+	if ((val & BNX2_FW_MSG_ACK) != (msg_data & BNX2_DRV_MSG_SEQ)) {
+		if (!silent)
+		  printf("fw sync timeout, reset code = %x\n", (unsigned int) msg_data);
+
+		msg_data &= ~BNX2_DRV_MSG_CODE;
+		msg_data |= BNX2_DRV_MSG_CODE_FW_TIMEOUT;
+
+		REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_MB, msg_data);
+
+		return -EBUSY;
+	}
+
+	if ((val & BNX2_FW_MSG_STATUS_MASK) != BNX2_FW_MSG_STATUS_OK)
+		return -EIO;
+
+	return 0;
+}
+
+static void
+bnx2_init_context(struct bnx2 *bp)
+{
+	u32 vcid;
+
+	vcid = 96;
+	while (vcid) {
+		u32 vcid_addr, pcid_addr, offset;
+
+		vcid--;
+
+		if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+			u32 new_vcid;
+
+			vcid_addr = GET_PCID_ADDR(vcid);
+			if (vcid & 0x8) {
+				new_vcid = 0x60 + (vcid & 0xf0) + (vcid & 0x7);
+			}
+			else {
+				new_vcid = vcid;
+			}
+			pcid_addr = GET_PCID_ADDR(new_vcid);
+		}
+		else {
+	    		vcid_addr = GET_CID_ADDR(vcid);
+			pcid_addr = vcid_addr;
+		}
+
+		REG_WR(bp, BNX2_CTX_VIRT_ADDR, 0x00);
+		REG_WR(bp, BNX2_CTX_PAGE_TBL, pcid_addr);
+
+		/* Zero out the context. */
+		for (offset = 0; offset < PHY_CTX_SIZE; offset += 4) {
+			CTX_WR(bp, 0x00, offset, 0);
+		}
+
+		REG_WR(bp, BNX2_CTX_VIRT_ADDR, vcid_addr);
+		REG_WR(bp, BNX2_CTX_PAGE_TBL, pcid_addr);
+	}
+}
+
+static int
+bnx2_alloc_bad_rbuf(struct bnx2 *bp)
+{
+	u16 good_mbuf[512];
+	u32 good_mbuf_cnt;
+	u32 val;
+
+	REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
+		BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE);
+
+	good_mbuf_cnt = 0;
+
+	/* Allocate a bunch of mbufs and save the good ones in an array. */
+	val = REG_RD_IND(bp, BNX2_RBUF_STATUS1);
+	while (val & BNX2_RBUF_STATUS1_FREE_COUNT) {
+		REG_WR_IND(bp, BNX2_RBUF_COMMAND, BNX2_RBUF_COMMAND_ALLOC_REQ);
+
+		val = REG_RD_IND(bp, BNX2_RBUF_FW_BUF_ALLOC);
+
+		val &= BNX2_RBUF_FW_BUF_ALLOC_VALUE;
+
+		/* The addresses with Bit 9 set are bad memory blocks. */
+		if (!(val & (1 << 9))) {
+			good_mbuf[good_mbuf_cnt] = (u16) val;
+			good_mbuf_cnt++;
+		}
+
+		val = REG_RD_IND(bp, BNX2_RBUF_STATUS1);
+	}
+
+	/* Free the good ones back to the mbuf pool thus discarding
+	 * all the bad ones. */
+	while (good_mbuf_cnt) {
+		good_mbuf_cnt--;
+
+		val = good_mbuf[good_mbuf_cnt];
+		val = (val << 9) | val | 1;
+
+		REG_WR_IND(bp, BNX2_RBUF_FW_BUF_FREE, val);
+	}
+	return 0;
+}
+
+static void
+bnx2_set_mac_addr(struct bnx2 *bp) 
+{
+	u32 val;
+	u8 *mac_addr = bp->nic->node_addr;
+
+	val = (mac_addr[0] << 8) | mac_addr[1];
+
+	REG_WR(bp, BNX2_EMAC_MAC_MATCH0, val);
+
+	val = (mac_addr[2] << 24) | (mac_addr[3] << 16) | 
+		(mac_addr[4] << 8) | mac_addr[5];
+
+	REG_WR(bp, BNX2_EMAC_MAC_MATCH1, val);
+}
+
+static void
+bnx2_set_rx_mode(struct nic *nic __unused)
+{
+	struct bnx2 *bp = &bnx2;
+	u32 rx_mode, sort_mode;
+	int i;
+
+	rx_mode = bp->rx_mode & ~(BNX2_EMAC_RX_MODE_PROMISCUOUS |
+				  BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG);
+	sort_mode = 1 | BNX2_RPM_SORT_USER0_BC_EN;
+
+	if (!(bp->flags & ASF_ENABLE_FLAG)) {
+		rx_mode |= BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG;
+	}
+
+	/* Accept all multicasts */
+	for (i = 0; i < NUM_MC_HASH_REGISTERS; i++) {
+		REG_WR(bp, BNX2_EMAC_MULTICAST_HASH0 + (i * 4),
+		       0xffffffff);
+       	}
+	sort_mode |= BNX2_RPM_SORT_USER0_MC_EN;
+
+	if (rx_mode != bp->rx_mode) {
+		bp->rx_mode = rx_mode;
+		REG_WR(bp, BNX2_EMAC_RX_MODE, rx_mode);
+	}
+
+	REG_WR(bp, BNX2_RPM_SORT_USER0, 0x0);
+	REG_WR(bp, BNX2_RPM_SORT_USER0, sort_mode);
+	REG_WR(bp, BNX2_RPM_SORT_USER0, sort_mode | BNX2_RPM_SORT_USER0_ENA);
+}
+
+static void
+load_rv2p_fw(struct bnx2 *bp, u32 *rv2p_code, u32 rv2p_code_len, u32 rv2p_proc)
+{
+	unsigned int i;
+	u32 val;
+
+
+	for (i = 0; i < rv2p_code_len; i += 8) {
+		REG_WR(bp, BNX2_RV2P_INSTR_HIGH, *rv2p_code);
+		rv2p_code++;
+		REG_WR(bp, BNX2_RV2P_INSTR_LOW, *rv2p_code);
+		rv2p_code++;
+
+		if (rv2p_proc == RV2P_PROC1) {
+			val = (i / 8) | BNX2_RV2P_PROC1_ADDR_CMD_RDWR;
+			REG_WR(bp, BNX2_RV2P_PROC1_ADDR_CMD, val);
+		}
+		else {
+			val = (i / 8) | BNX2_RV2P_PROC2_ADDR_CMD_RDWR;
+			REG_WR(bp, BNX2_RV2P_PROC2_ADDR_CMD, val);
+		}
+	}
+
+	/* Reset the processor, un-stall is done later. */
+	if (rv2p_proc == RV2P_PROC1) {
+		REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC1_RESET);
+	}
+	else {
+		REG_WR(bp, BNX2_RV2P_COMMAND, BNX2_RV2P_COMMAND_PROC2_RESET);
+	}
+}
+
+static void
+load_cpu_fw(struct bnx2 *bp, struct cpu_reg *cpu_reg, struct fw_info *fw)
+{
+	u32 offset;
+	u32 val;
+
+	/* Halt the CPU. */
+	val = REG_RD_IND(bp, cpu_reg->mode);
+	val |= cpu_reg->mode_value_halt;
+	REG_WR_IND(bp, cpu_reg->mode, val);
+	REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
+
+	/* Load the Text area. */
+	offset = cpu_reg->spad_base + (fw->text_addr - cpu_reg->mips_view_base);
+	if (fw->text) {
+		unsigned int j;
+
+		for (j = 0; j < (fw->text_len / 4); j++, offset += 4) {
+			REG_WR_IND(bp, offset, fw->text[j]);
+	        }
+	}
+
+	/* Load the Data area. */
+	offset = cpu_reg->spad_base + (fw->data_addr - cpu_reg->mips_view_base);
+	if (fw->data) {
+		unsigned int j;
+
+		for (j = 0; j < (fw->data_len / 4); j++, offset += 4) {
+			REG_WR_IND(bp, offset, fw->data[j]);
+		}
+	}
+
+	/* Load the SBSS area. */
+	offset = cpu_reg->spad_base + (fw->sbss_addr - cpu_reg->mips_view_base);
+	if (fw->sbss) {
+		unsigned int j;
+
+		for (j = 0; j < (fw->sbss_len / 4); j++, offset += 4) {
+			REG_WR_IND(bp, offset, fw->sbss[j]);
+		}
+	}
+
+	/* Load the BSS area. */
+	offset = cpu_reg->spad_base + (fw->bss_addr - cpu_reg->mips_view_base);
+	if (fw->bss) {
+		unsigned int j;
+
+		for (j = 0; j < (fw->bss_len/4); j++, offset += 4) {
+			REG_WR_IND(bp, offset, fw->bss[j]);
+		}
+	}
+
+	/* Load the Read-Only area. */
+	offset = cpu_reg->spad_base +
+		(fw->rodata_addr - cpu_reg->mips_view_base);
+	if (fw->rodata) {
+		unsigned int j;
+
+		for (j = 0; j < (fw->rodata_len / 4); j++, offset += 4) {
+			REG_WR_IND(bp, offset, fw->rodata[j]);
+		}
+	}
+
+	/* Clear the pre-fetch instruction. */
+	REG_WR_IND(bp, cpu_reg->inst, 0);
+	REG_WR_IND(bp, cpu_reg->pc, fw->start_addr);
+
+	/* Start the CPU. */
+	val = REG_RD_IND(bp, cpu_reg->mode);
+	val &= ~cpu_reg->mode_value_halt;
+	REG_WR_IND(bp, cpu_reg->state, cpu_reg->state_value_clear);
+	REG_WR_IND(bp, cpu_reg->mode, val);
+}
+
+static void
+bnx2_init_cpus(struct bnx2 *bp)
+{
+	struct cpu_reg cpu_reg;
+	struct fw_info fw;
+
+	/* Unfortunately, it looks like we need to load the firmware
+	 * before the card will work properly.  That means this driver
+	 * will be huge by Etherboot standards (approx. 50K compressed).
+	 */
+
+	/* Initialize the RV2P processor. */
+	load_rv2p_fw(bp, bnx2_rv2p_proc1, sizeof(bnx2_rv2p_proc1), RV2P_PROC1);
+	load_rv2p_fw(bp, bnx2_rv2p_proc2, sizeof(bnx2_rv2p_proc2), RV2P_PROC2);
+
+	/* Initialize the RX Processor. */
+	cpu_reg.mode = BNX2_RXP_CPU_MODE;
+	cpu_reg.mode_value_halt = BNX2_RXP_CPU_MODE_SOFT_HALT;
+	cpu_reg.mode_value_sstep = BNX2_RXP_CPU_MODE_STEP_ENA;
+	cpu_reg.state = BNX2_RXP_CPU_STATE;
+	cpu_reg.state_value_clear = 0xffffff;
+	cpu_reg.gpr0 = BNX2_RXP_CPU_REG_FILE;
+	cpu_reg.evmask = BNX2_RXP_CPU_EVENT_MASK;
+	cpu_reg.pc = BNX2_RXP_CPU_PROGRAM_COUNTER;
+	cpu_reg.inst = BNX2_RXP_CPU_INSTRUCTION;
+	cpu_reg.bp = BNX2_RXP_CPU_HW_BREAKPOINT;
+	cpu_reg.spad_base = BNX2_RXP_SCRATCH;
+	cpu_reg.mips_view_base = 0x8000000;
+
+	fw.ver_major = bnx2_RXP_b06FwReleaseMajor;
+	fw.ver_minor = bnx2_RXP_b06FwReleaseMinor;
+	fw.ver_fix = bnx2_RXP_b06FwReleaseFix;
+	fw.start_addr = bnx2_RXP_b06FwStartAddr;
+
+	fw.text_addr = bnx2_RXP_b06FwTextAddr;
+	fw.text_len = bnx2_RXP_b06FwTextLen;
+	fw.text_index = 0;
+	fw.text = bnx2_RXP_b06FwText;
+
+	fw.data_addr = bnx2_RXP_b06FwDataAddr;
+	fw.data_len = bnx2_RXP_b06FwDataLen;
+	fw.data_index = 0;
+	fw.data = bnx2_RXP_b06FwData;
+
+	fw.sbss_addr = bnx2_RXP_b06FwSbssAddr;
+	fw.sbss_len = bnx2_RXP_b06FwSbssLen;
+	fw.sbss_index = 0;
+	fw.sbss = bnx2_RXP_b06FwSbss;
+
+	fw.bss_addr = bnx2_RXP_b06FwBssAddr;
+	fw.bss_len = bnx2_RXP_b06FwBssLen;
+	fw.bss_index = 0;
+	fw.bss = bnx2_RXP_b06FwBss;
+
+	fw.rodata_addr = bnx2_RXP_b06FwRodataAddr;
+	fw.rodata_len = bnx2_RXP_b06FwRodataLen;
+	fw.rodata_index = 0;
+	fw.rodata = bnx2_RXP_b06FwRodata;
+
+	load_cpu_fw(bp, &cpu_reg, &fw);
+
+	/* Initialize the TX Processor. */
+	cpu_reg.mode = BNX2_TXP_CPU_MODE;
+	cpu_reg.mode_value_halt = BNX2_TXP_CPU_MODE_SOFT_HALT;
+	cpu_reg.mode_value_sstep = BNX2_TXP_CPU_MODE_STEP_ENA;
+	cpu_reg.state = BNX2_TXP_CPU_STATE;
+	cpu_reg.state_value_clear = 0xffffff;
+	cpu_reg.gpr0 = BNX2_TXP_CPU_REG_FILE;
+	cpu_reg.evmask = BNX2_TXP_CPU_EVENT_MASK;
+	cpu_reg.pc = BNX2_TXP_CPU_PROGRAM_COUNTER;
+	cpu_reg.inst = BNX2_TXP_CPU_INSTRUCTION;
+	cpu_reg.bp = BNX2_TXP_CPU_HW_BREAKPOINT;
+	cpu_reg.spad_base = BNX2_TXP_SCRATCH;
+	cpu_reg.mips_view_base = 0x8000000;
+    
+	fw.ver_major = bnx2_TXP_b06FwReleaseMajor;
+	fw.ver_minor = bnx2_TXP_b06FwReleaseMinor;
+	fw.ver_fix = bnx2_TXP_b06FwReleaseFix;
+	fw.start_addr = bnx2_TXP_b06FwStartAddr;
+
+	fw.text_addr = bnx2_TXP_b06FwTextAddr;
+	fw.text_len = bnx2_TXP_b06FwTextLen;
+	fw.text_index = 0;
+	fw.text = bnx2_TXP_b06FwText;
+
+	fw.data_addr = bnx2_TXP_b06FwDataAddr;
+	fw.data_len = bnx2_TXP_b06FwDataLen;
+	fw.data_index = 0;
+	fw.data = bnx2_TXP_b06FwData;
+
+	fw.sbss_addr = bnx2_TXP_b06FwSbssAddr;
+	fw.sbss_len = bnx2_TXP_b06FwSbssLen;
+	fw.sbss_index = 0;
+	fw.sbss = bnx2_TXP_b06FwSbss;
+
+	fw.bss_addr = bnx2_TXP_b06FwBssAddr;
+	fw.bss_len = bnx2_TXP_b06FwBssLen;
+	fw.bss_index = 0;
+	fw.bss = bnx2_TXP_b06FwBss;
+
+	fw.rodata_addr = bnx2_TXP_b06FwRodataAddr;
+	fw.rodata_len = bnx2_TXP_b06FwRodataLen;
+	fw.rodata_index = 0;
+	fw.rodata = bnx2_TXP_b06FwRodata;
+
+	load_cpu_fw(bp, &cpu_reg, &fw);
+
+	/* Initialize the TX Patch-up Processor. */
+	cpu_reg.mode = BNX2_TPAT_CPU_MODE;
+	cpu_reg.mode_value_halt = BNX2_TPAT_CPU_MODE_SOFT_HALT;
+	cpu_reg.mode_value_sstep = BNX2_TPAT_CPU_MODE_STEP_ENA;
+	cpu_reg.state = BNX2_TPAT_CPU_STATE;
+	cpu_reg.state_value_clear = 0xffffff;
+	cpu_reg.gpr0 = BNX2_TPAT_CPU_REG_FILE;
+	cpu_reg.evmask = BNX2_TPAT_CPU_EVENT_MASK;
+	cpu_reg.pc = BNX2_TPAT_CPU_PROGRAM_COUNTER;
+	cpu_reg.inst = BNX2_TPAT_CPU_INSTRUCTION;
+	cpu_reg.bp = BNX2_TPAT_CPU_HW_BREAKPOINT;
+	cpu_reg.spad_base = BNX2_TPAT_SCRATCH;
+	cpu_reg.mips_view_base = 0x8000000;
+    
+	fw.ver_major = bnx2_TPAT_b06FwReleaseMajor;
+	fw.ver_minor = bnx2_TPAT_b06FwReleaseMinor;
+	fw.ver_fix = bnx2_TPAT_b06FwReleaseFix;
+	fw.start_addr = bnx2_TPAT_b06FwStartAddr;
+
+	fw.text_addr = bnx2_TPAT_b06FwTextAddr;
+	fw.text_len = bnx2_TPAT_b06FwTextLen;
+	fw.text_index = 0;
+	fw.text = bnx2_TPAT_b06FwText;
+
+	fw.data_addr = bnx2_TPAT_b06FwDataAddr;
+	fw.data_len = bnx2_TPAT_b06FwDataLen;
+	fw.data_index = 0;
+	fw.data = bnx2_TPAT_b06FwData;
+
+	fw.sbss_addr = bnx2_TPAT_b06FwSbssAddr;
+	fw.sbss_len = bnx2_TPAT_b06FwSbssLen;
+	fw.sbss_index = 0;
+	fw.sbss = bnx2_TPAT_b06FwSbss;
+
+	fw.bss_addr = bnx2_TPAT_b06FwBssAddr;
+	fw.bss_len = bnx2_TPAT_b06FwBssLen;
+	fw.bss_index = 0;
+	fw.bss = bnx2_TPAT_b06FwBss;
+
+	fw.rodata_addr = bnx2_TPAT_b06FwRodataAddr;
+	fw.rodata_len = bnx2_TPAT_b06FwRodataLen;
+	fw.rodata_index = 0;
+	fw.rodata = bnx2_TPAT_b06FwRodata;
+
+	load_cpu_fw(bp, &cpu_reg, &fw);
+
+	/* Initialize the Completion Processor. */
+	cpu_reg.mode = BNX2_COM_CPU_MODE;
+	cpu_reg.mode_value_halt = BNX2_COM_CPU_MODE_SOFT_HALT;
+	cpu_reg.mode_value_sstep = BNX2_COM_CPU_MODE_STEP_ENA;
+	cpu_reg.state = BNX2_COM_CPU_STATE;
+	cpu_reg.state_value_clear = 0xffffff;
+	cpu_reg.gpr0 = BNX2_COM_CPU_REG_FILE;
+	cpu_reg.evmask = BNX2_COM_CPU_EVENT_MASK;
+	cpu_reg.pc = BNX2_COM_CPU_PROGRAM_COUNTER;
+	cpu_reg.inst = BNX2_COM_CPU_INSTRUCTION;
+	cpu_reg.bp = BNX2_COM_CPU_HW_BREAKPOINT;
+	cpu_reg.spad_base = BNX2_COM_SCRATCH;
+	cpu_reg.mips_view_base = 0x8000000;
+    
+	fw.ver_major = bnx2_COM_b06FwReleaseMajor;
+	fw.ver_minor = bnx2_COM_b06FwReleaseMinor;
+	fw.ver_fix = bnx2_COM_b06FwReleaseFix;
+	fw.start_addr = bnx2_COM_b06FwStartAddr;
+
+	fw.text_addr = bnx2_COM_b06FwTextAddr;
+	fw.text_len = bnx2_COM_b06FwTextLen;
+	fw.text_index = 0;
+	fw.text = bnx2_COM_b06FwText;
+
+	fw.data_addr = bnx2_COM_b06FwDataAddr;
+	fw.data_len = bnx2_COM_b06FwDataLen;
+	fw.data_index = 0;
+	fw.data = bnx2_COM_b06FwData;
+
+	fw.sbss_addr = bnx2_COM_b06FwSbssAddr;
+	fw.sbss_len = bnx2_COM_b06FwSbssLen;
+	fw.sbss_index = 0;
+	fw.sbss = bnx2_COM_b06FwSbss;
+
+	fw.bss_addr = bnx2_COM_b06FwBssAddr;
+	fw.bss_len = bnx2_COM_b06FwBssLen;
+	fw.bss_index = 0;
+	fw.bss = bnx2_COM_b06FwBss;
+
+	fw.rodata_addr = bnx2_COM_b06FwRodataAddr;
+	fw.rodata_len = bnx2_COM_b06FwRodataLen;
+	fw.rodata_index = 0;
+	fw.rodata = bnx2_COM_b06FwRodata;
+
+	load_cpu_fw(bp, &cpu_reg, &fw);
+
+}
+
+static int
+bnx2_set_power_state_0(struct bnx2 *bp)
+{
+	u16 pmcsr;
+	u32 val;
+
+	pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
+
+	pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
+		(pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
+		PCI_PM_CTRL_PME_STATUS);
+
+	if (pmcsr & PCI_PM_CTRL_STATE_MASK)
+		/* delay required during transition out of D3hot */
+		mdelay(20);
+
+	val = REG_RD(bp, BNX2_EMAC_MODE);
+	val |= BNX2_EMAC_MODE_MPKT_RCVD | BNX2_EMAC_MODE_ACPI_RCVD;
+	val &= ~BNX2_EMAC_MODE_MPKT;
+	REG_WR(bp, BNX2_EMAC_MODE, val);
+
+	val = REG_RD(bp, BNX2_RPM_CONFIG);
+	val &= ~BNX2_RPM_CONFIG_ACPI_ENA;
+	REG_WR(bp, BNX2_RPM_CONFIG, val);
+		
+	return 0;
+}
+
+static void
+bnx2_enable_nvram_access(struct bnx2 *bp)
+{
+	u32 val;
+
+	val = REG_RD(bp, BNX2_NVM_ACCESS_ENABLE);
+	/* Enable both bits, even on read. */
+	REG_WR(bp, BNX2_NVM_ACCESS_ENABLE, 
+	       val | BNX2_NVM_ACCESS_ENABLE_EN | BNX2_NVM_ACCESS_ENABLE_WR_EN);
+}
+
+static void
+bnx2_disable_nvram_access(struct bnx2 *bp)
+{
+	u32 val;
+
+	val = REG_RD(bp, BNX2_NVM_ACCESS_ENABLE);
+	/* Disable both bits, even after read. */
+	REG_WR(bp, BNX2_NVM_ACCESS_ENABLE, 
+		val & ~(BNX2_NVM_ACCESS_ENABLE_EN |
+			BNX2_NVM_ACCESS_ENABLE_WR_EN));
+}
+
+static int
+bnx2_init_nvram(struct bnx2 *bp)
+{
+	u32 val;
+	int j, entry_count, rc;
+	struct flash_spec *flash;
+
+	/* Determine the selected interface. */
+	val = REG_RD(bp, BNX2_NVM_CFG1);
+
+	entry_count = sizeof(flash_table) / sizeof(struct flash_spec);
+
+	rc = 0;
+	if (val & 0x40000000) {
+		/* Flash interface has been reconfigured */
+		for (j = 0, flash = &flash_table[0]; j < entry_count;
+		     j++, flash++) {
+			if ((val & FLASH_BACKUP_STRAP_MASK) ==
+			    (flash->config1 & FLASH_BACKUP_STRAP_MASK)) {
+				bp->flash_info = flash;
+				break;
+			}
+		}
+	}
+	else {
+		u32 mask;
+		/* Not yet been reconfigured */
+
+		if (val & (1 << 23))
+			mask = FLASH_BACKUP_STRAP_MASK;
+		else
+			mask = FLASH_STRAP_MASK;
+
+		for (j = 0, flash = &flash_table[0]; j < entry_count;
+			j++, flash++) {
+
+			if ((val & mask) == (flash->strapping & mask)) {
+				bp->flash_info = flash;
+
+				/* Enable access to flash interface */
+				bnx2_enable_nvram_access(bp);
+
+				/* Reconfigure the flash interface */
+				REG_WR(bp, BNX2_NVM_CFG1, flash->config1);
+				REG_WR(bp, BNX2_NVM_CFG2, flash->config2);
+				REG_WR(bp, BNX2_NVM_CFG3, flash->config3);
+				REG_WR(bp, BNX2_NVM_WRITE1, flash->write1);
+
+				/* Disable access to flash interface */
+				bnx2_disable_nvram_access(bp);
+
+				break;
+			}
+		}
+	} /* if (val & 0x40000000) */
+
+	if (j == entry_count) {
+		bp->flash_info = NULL;
+		printf("Unknown flash/EEPROM type.\n");
+		return -ENODEV;
+	}
+
+	val = REG_RD_IND(bp, bp->shmem_base + BNX2_SHARED_HW_CFG_CONFIG2);
+	val &= BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK;
+	if (val) {
+		bp->flash_size = val;
+	}
+	else {
+		bp->flash_size = bp->flash_info->total_size;
+	}
+
+	return rc;
+}
+
+static int
+bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
+{
+	u32 val;
+	int i, rc = 0;
+
+	/* Wait for the current PCI transaction to complete before
+	 * issuing a reset. */
+	REG_WR(bp, BNX2_MISC_ENABLE_CLR_BITS,
+	       BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE |
+	       BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE |
+	       BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE |
+	       BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE);
+	val = REG_RD(bp, BNX2_MISC_ENABLE_CLR_BITS);
+	udelay(5);
+
+
+	/* Wait for the firmware to tell us it is ok to issue a reset. */
+	bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT0 | reset_code, 1);
+
+	/* Deposit a driver reset signature so the firmware knows that
+	 * this is a soft reset. */
+	REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_RESET_SIGNATURE,
+		   BNX2_DRV_RESET_SIGNATURE_MAGIC);
+
+	/* Do a dummy read to force the chip to complete all current transaction
+	 * before we issue a reset. */
+	val = REG_RD(bp, BNX2_MISC_ID);
+
+	val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+	      BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+	      BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
+
+	/* Chip reset. */
+	REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
+
+	if ((CHIP_ID(bp) == CHIP_ID_5706_A0) ||
+	    (CHIP_ID(bp) == CHIP_ID_5706_A1))
+		mdelay(15);
+
+	/* Reset takes approximate 30 usec */
+	for (i = 0; i < 10; i++) {
+		val = REG_RD(bp, BNX2_PCICFG_MISC_CONFIG);
+		if ((val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+			    BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) == 0) {
+			break;
+		}
+		udelay(10);
+	}
+
+	if (val & (BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
+		   BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY)) {
+		printf("Chip reset did not complete\n");
+		return -EBUSY;
+	}
+
+	/* Make sure byte swapping is properly configured. */
+	val = REG_RD(bp, BNX2_PCI_SWAP_DIAG0);
+	if (val != 0x01020304) {
+		printf("Chip not in correct endian mode\n");
+		return -ENODEV;
+	}
+
+	/* Wait for the firmware to finish its initialization. */
+	rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT1 | reset_code, 0);
+	if (rc) {
+		return rc;
+	}
+
+	if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+		/* Adjust the voltage regular to two steps lower.  The default
+		 * of this register is 0x0000000e. */
+		REG_WR(bp, BNX2_MISC_VREG_CONTROL, 0x000000fa);
+
+		/* Remove bad rbuf memory from the free pool. */
+		rc = bnx2_alloc_bad_rbuf(bp);
+	}
+
+	return rc;
+}
+
+static void
+bnx2_disable(struct nic *nic __unused)
+{
+	struct bnx2* bp = &bnx2;
+
+	if (bp->regview) {
+		bnx2_reset_chip(bp, BNX2_DRV_MSG_CODE_UNLOAD);
+		iounmap(bp->regview);
+	}
+}
+
+static int
+bnx2_init_chip(struct bnx2 *bp)
+{
+	u32 val;
+	int rc;
+
+	/* Make sure the interrupt is not active. */
+	REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD, BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
+
+	val = BNX2_DMA_CONFIG_DATA_BYTE_SWAP |
+	      BNX2_DMA_CONFIG_DATA_WORD_SWAP |
+#if __BYTE_ORDER ==  __BIG_ENDIAN
+	      BNX2_DMA_CONFIG_CNTL_BYTE_SWAP | 
+#endif
+	      BNX2_DMA_CONFIG_CNTL_WORD_SWAP | 
+	      DMA_READ_CHANS << 12 |
+	      DMA_WRITE_CHANS << 16;
+
+	val |= (0x2 << 20) | (1 << 11);
+
+	if ((bp->flags & PCIX_FLAG) && (bp->bus_speed_mhz == 133))
+		val |= (1 << 23);
+
+	if ((CHIP_NUM(bp) == CHIP_NUM_5706) &&
+	    (CHIP_ID(bp) != CHIP_ID_5706_A0) && !(bp->flags & PCIX_FLAG))
+		val |= BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA;
+
+	REG_WR(bp, BNX2_DMA_CONFIG, val);
+
+	if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+		val = REG_RD(bp, BNX2_TDMA_CONFIG);
+		val |= BNX2_TDMA_CONFIG_ONE_DMA;
+		REG_WR(bp, BNX2_TDMA_CONFIG, val);
+	}
+
+	if (bp->flags & PCIX_FLAG) {
+		u16 val16;
+
+		pci_read_config_word(bp->pdev, bp->pcix_cap + PCI_X_CMD,
+				     &val16);
+		pci_write_config_word(bp->pdev, bp->pcix_cap + PCI_X_CMD,
+				      val16 & ~PCI_X_CMD_ERO);
+	}
+
+	REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS,
+	       BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE |
+	       BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE |
+	       BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE);
+
+	/* Initialize context mapping and zero out the quick contexts.  The
+	 * context block must have already been enabled. */
+	bnx2_init_context(bp);
+
+	bnx2_init_nvram(bp);
+	bnx2_init_cpus(bp);
+
+	bnx2_set_mac_addr(bp);
+
+	val = REG_RD(bp, BNX2_MQ_CONFIG);
+	val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
+	val |= BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;
+	REG_WR(bp, BNX2_MQ_CONFIG, val);
+
+	val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE);
+	REG_WR(bp, BNX2_MQ_KNL_BYP_WIND_START, val);
+	REG_WR(bp, BNX2_MQ_KNL_WIND_END, val);
+
+	val = (BCM_PAGE_BITS - 8) << 24;
+	REG_WR(bp, BNX2_RV2P_CONFIG, val);
+
+	/* Configure page size. */
+	val = REG_RD(bp, BNX2_TBDR_CONFIG);
+	val &= ~BNX2_TBDR_CONFIG_PAGE_SIZE;
+	val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;
+	REG_WR(bp, BNX2_TBDR_CONFIG, val);
+
+	val = bp->mac_addr[0] +
+	      (bp->mac_addr[1] << 8) +
+	      (bp->mac_addr[2] << 16) +
+	      bp->mac_addr[3] +
+	      (bp->mac_addr[4] << 8) +
+	      (bp->mac_addr[5] << 16);
+	REG_WR(bp, BNX2_EMAC_BACKOFF_SEED, val);
+
+	/* Program the MTU.  Also include 4 bytes for CRC32. */
+	val = ETH_MAX_MTU + ETH_HLEN + 4;
+	if (val > (MAX_ETHERNET_PACKET_SIZE + 4))
+		val |= BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA;
+	REG_WR(bp, BNX2_EMAC_RX_MTU_SIZE, val);
+
+	bp->last_status_idx = 0;
+	bp->rx_mode = BNX2_EMAC_RX_MODE_SORT_MODE;
+
+	/* Set up how to generate a link change interrupt. */
+	REG_WR(bp, BNX2_EMAC_ATTENTION_ENA, BNX2_EMAC_ATTENTION_ENA_LINK);
+
+	REG_WR(bp, BNX2_HC_STATUS_ADDR_L,
+	       (u64) bp->status_blk_mapping & 0xffffffff);
+	REG_WR(bp, BNX2_HC_STATUS_ADDR_H, (u64) bp->status_blk_mapping >> 32);
+
+	REG_WR(bp, BNX2_HC_STATISTICS_ADDR_L,
+	       (u64) bp->stats_blk_mapping & 0xffffffff);
+	REG_WR(bp, BNX2_HC_STATISTICS_ADDR_H,
+	       (u64) bp->stats_blk_mapping >> 32);
+
+	REG_WR(bp, BNX2_HC_TX_QUICK_CONS_TRIP, 
+	       (bp->tx_quick_cons_trip_int << 16) | bp->tx_quick_cons_trip);
+
+	REG_WR(bp, BNX2_HC_RX_QUICK_CONS_TRIP,
+	       (bp->rx_quick_cons_trip_int << 16) | bp->rx_quick_cons_trip);
+
+	REG_WR(bp, BNX2_HC_COMP_PROD_TRIP,
+	       (bp->comp_prod_trip_int << 16) | bp->comp_prod_trip);
+
+	REG_WR(bp, BNX2_HC_TX_TICKS, (bp->tx_ticks_int << 16) | bp->tx_ticks);
+
+	REG_WR(bp, BNX2_HC_RX_TICKS, (bp->rx_ticks_int << 16) | bp->rx_ticks);
+
+	REG_WR(bp, BNX2_HC_COM_TICKS,
+	       (bp->com_ticks_int << 16) | bp->com_ticks);
+
+	REG_WR(bp, BNX2_HC_CMD_TICKS,
+	       (bp->cmd_ticks_int << 16) | bp->cmd_ticks);
+
+	REG_WR(bp, BNX2_HC_STATS_TICKS, bp->stats_ticks & 0xffff00);
+	REG_WR(bp, BNX2_HC_STAT_COLLECT_TICKS, 0xbb8);  /* 3ms */
+
+	if (CHIP_ID(bp) == CHIP_ID_5706_A1)
+		REG_WR(bp, BNX2_HC_CONFIG, BNX2_HC_CONFIG_COLLECT_STATS);
+	else {
+		REG_WR(bp, BNX2_HC_CONFIG, BNX2_HC_CONFIG_RX_TMR_MODE |
+		       BNX2_HC_CONFIG_TX_TMR_MODE |
+		       BNX2_HC_CONFIG_COLLECT_STATS);
+	}
+
+	/* Clear internal stats counters. */
+	REG_WR(bp, BNX2_HC_COMMAND, BNX2_HC_COMMAND_CLR_STAT_NOW);
+
+	REG_WR(bp, BNX2_HC_ATTN_BITS_ENABLE, STATUS_ATTN_BITS_LINK_STATE);
+
+	if (REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_FEATURE) &
+	    BNX2_PORT_FEATURE_ASF_ENABLED)
+		bp->flags |= ASF_ENABLE_FLAG;
+
+	/* Initialize the receive filter. */
+	bnx2_set_rx_mode(bp->nic);
+
+	rc = bnx2_fw_sync(bp, BNX2_DRV_MSG_DATA_WAIT2 | BNX2_DRV_MSG_CODE_RESET,
+			  0);
+
+	REG_WR(bp, BNX2_MISC_ENABLE_SET_BITS, 0x5ffffff);
+	REG_RD(bp, BNX2_MISC_ENABLE_SET_BITS);
+
+	udelay(20);
+
+	bp->hc_cmd = REG_RD(bp, BNX2_HC_COMMAND);
+
+	return rc;
+}
+
+static void
+bnx2_init_tx_ring(struct bnx2 *bp)
+{
+	struct tx_bd *txbd;
+	u32 val;
+
+	txbd = &bp->tx_desc_ring[MAX_TX_DESC_CNT];
+		
+	/* Etherboot lives below 4GB, so hi is always 0 */
+	txbd->tx_bd_haddr_hi = 0;
+	txbd->tx_bd_haddr_lo = bp->tx_desc_mapping;
+
+	bp->tx_prod = 0;
+	bp->tx_cons = 0;
+	bp->hw_tx_cons = 0;
+	bp->tx_prod_bseq = 0;
+	
+	val = BNX2_L2CTX_TYPE_TYPE_L2;
+	val |= BNX2_L2CTX_TYPE_SIZE_L2;
+	CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TYPE, val);
+
+	val = BNX2_L2CTX_CMD_TYPE_TYPE_L2;
+	val |= 8 << 16;
+	CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_CMD_TYPE, val);
+
+	/* Etherboot lives below 4GB, so hi is always 0 */
+	CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TBDR_BHADDR_HI, 0);
+
+	val = (u64) bp->tx_desc_mapping & 0xffffffff;
+	CTX_WR(bp, GET_CID_ADDR(TX_CID), BNX2_L2CTX_TBDR_BHADDR_LO, val);
+}
+
+static void
+bnx2_init_rx_ring(struct bnx2 *bp)
+{
+	struct rx_bd *rxbd;
+	unsigned int i;
+	u16 prod, ring_prod;
+	u32 val;
+
+	bp->rx_buf_use_size = RX_BUF_USE_SIZE;
+	bp->rx_buf_size = RX_BUF_SIZE;
+
+	ring_prod = prod = bp->rx_prod = 0;
+	bp->rx_cons = 0;
+	bp->hw_rx_cons = 0;
+	bp->rx_prod_bseq = 0;
+
+	memset(bnx2_bss.rx_buf, 0, sizeof(bnx2_bss.rx_buf));
+		
+	rxbd = &bp->rx_desc_ring[0];
+	for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
+		rxbd->rx_bd_len = bp->rx_buf_use_size;
+		rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
+	}
+	rxbd->rx_bd_haddr_hi = 0;
+	rxbd->rx_bd_haddr_lo = (u64) bp->rx_desc_mapping & 0xffffffff;
+
+	val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE;
+	val |= BNX2_L2CTX_CTX_TYPE_SIZE_L2;
+	val |= 0x02 << 8;
+	CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_CTX_TYPE, val);
+
+	/* Etherboot doesn't use memory above 4GB, so this is always 0 */
+	CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_HI, 0);
+
+	val = bp->rx_desc_mapping & 0xffffffff;
+	CTX_WR(bp, GET_CID_ADDR(RX_CID), BNX2_L2CTX_NX_BDHADDR_LO, val);
+
+	for (i = 0; (int) i < bp->rx_ring_size; i++) {
+		rxbd = &bp->rx_desc_ring[RX_RING_IDX(ring_prod)];
+		rxbd->rx_bd_haddr_hi = 0;
+		rxbd->rx_bd_haddr_lo = virt_to_bus(&bnx2_bss.rx_buf[ring_prod][0]);
+		bp->rx_prod_bseq += bp->rx_buf_use_size;
+		prod = NEXT_RX_BD(prod);
+		ring_prod = RX_RING_IDX(prod);
+	}
+	bp->rx_prod = prod;
+
+	REG_WR16(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BDIDX, bp->rx_prod);
+
+	REG_WR(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BSEQ, bp->rx_prod_bseq);
+}
+
+static int
+bnx2_reset_nic(struct bnx2 *bp, u32 reset_code)
+{
+	int rc;
+
+	rc = bnx2_reset_chip(bp, reset_code);
+	if (rc) {
+		return rc;
+	}
+
+	bnx2_init_chip(bp);
+	bnx2_init_tx_ring(bp);
+	bnx2_init_rx_ring(bp);
+	return 0;
+}
+
+static int
+bnx2_init_nic(struct bnx2 *bp)
+{
+	int rc;
+
+	if ((rc = bnx2_reset_nic(bp, BNX2_DRV_MSG_CODE_RESET)) != 0)
+		return rc;
+
+	bnx2_init_phy(bp);
+	bnx2_set_link(bp);
+	return 0;
+}
+
+static int
+bnx2_init_board(struct pci_device *pdev, struct nic *nic)
+{
+	unsigned long bnx2reg_base, bnx2reg_len;
+	struct bnx2 *bp = &bnx2;
+	int rc;
+	u32 reg;
+
+	bp->flags = 0;
+	bp->phy_flags = 0;
+
+	/* enable device (incl. PCI PM wakeup), and bus-mastering */
+	adjust_pci_device(pdev);
+
+	nic->ioaddr = pdev->ioaddr & ~3;
+	nic->irqno = 0;
+
+	rc = 0;
+	bp->pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
+	if (bp->pm_cap == 0) {
+		printf("Cannot find power management capability, aborting.\n");
+		rc = -EIO;
+		goto err_out_disable;
+	}
+
+	bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
+	if (bp->pcix_cap == 0) {
+		printf("Cannot find PCIX capability, aborting.\n");
+		rc = -EIO;
+		goto err_out_disable;
+	}
+
+	bp->pdev = pdev;
+	bp->nic = nic;
+
+	bnx2reg_base = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);
+	bnx2reg_len = MB_GET_CID_ADDR(17);
+
+	bp->regview = ioremap(bnx2reg_base, bnx2reg_len);
+
+	if (!bp->regview) {
+		printf("Cannot map register space, aborting.\n");
+		rc = -EIO;
+		goto err_out_disable;
+	}
+
+	/* Configure byte swap and enable write to the reg_window registers.
+	 * Rely on CPU to do target byte swapping on big endian systems
+	 * The chip's target access swapping will not swap all accesses
+	 */
+	pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG,
+			       BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+			       BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP);
+
+	bnx2_set_power_state_0(bp);
+
+	bp->chip_id = REG_RD(bp, BNX2_MISC_ID);
+
+	/* Get bus information. */
+	reg = REG_RD(bp, BNX2_PCICFG_MISC_STATUS);
+	if (reg & BNX2_PCICFG_MISC_STATUS_PCIX_DET) {
+		u32 clkreg;
+
+		bp->flags |= PCIX_FLAG;
+
+		clkreg = REG_RD(bp, BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS);
+		
+		clkreg &= BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET;
+		switch (clkreg) {
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ:
+			bp->bus_speed_mhz = 133;
+			break;
+
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ:
+			bp->bus_speed_mhz = 100;
+			break;
+
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ:
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ:
+			bp->bus_speed_mhz = 66;
+			break;
+
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ:
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ:
+			bp->bus_speed_mhz = 50;
+			break;
+
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW:
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ:
+		case BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ:
+			bp->bus_speed_mhz = 33;
+			break;
+		}
+	}
+	else {
+		if (reg & BNX2_PCICFG_MISC_STATUS_M66EN)
+			bp->bus_speed_mhz = 66;
+		else
+			bp->bus_speed_mhz = 33;
+	}
+
+	if (reg & BNX2_PCICFG_MISC_STATUS_32BIT_DET)
+		bp->flags |= PCI_32BIT_FLAG;
+
+	/* 5706A0 may falsely detect SERR and PERR. */
+	if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+		reg = REG_RD(bp, PCI_COMMAND);
+		reg &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
+		REG_WR(bp, PCI_COMMAND, reg);
+	}
+	else if ((CHIP_ID(bp) == CHIP_ID_5706_A1) &&
+		!(bp->flags & PCIX_FLAG)) {
+
+		printf("5706 A1 can only be used in a PCIX bus, aborting.\n");
+		goto err_out_disable;
+	}
+
+	bnx2_init_nvram(bp);
+
+	reg = REG_RD_IND(bp, BNX2_SHM_HDR_SIGNATURE);
+
+	if ((reg & BNX2_SHM_HDR_SIGNATURE_SIG_MASK) ==
+	    BNX2_SHM_HDR_SIGNATURE_SIG)
+		bp->shmem_base = REG_RD_IND(bp, BNX2_SHM_HDR_ADDR_0);
+	else
+		bp->shmem_base = HOST_VIEW_SHMEM_BASE;
+
+	/* Get the permanent MAC address.  First we need to make sure the
+	 * firmware is actually running.
+	 */
+	reg = REG_RD_IND(bp, bp->shmem_base + BNX2_DEV_INFO_SIGNATURE);
+
+	if ((reg & BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK) !=
+	    BNX2_DEV_INFO_SIGNATURE_MAGIC) {
+		printf("Firmware not running, aborting.\n");
+		rc = -ENODEV;
+		goto err_out_disable;
+	}
+
+	bp->fw_ver = REG_RD_IND(bp, bp->shmem_base + BNX2_DEV_INFO_BC_REV);
+
+	reg = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_MAC_UPPER);
+	bp->mac_addr[0] = (u8) (reg >> 8);
+	bp->mac_addr[1] = (u8) reg;
+
+	reg = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_MAC_LOWER);
+	bp->mac_addr[2] = (u8) (reg >> 24);
+	bp->mac_addr[3] = (u8) (reg >> 16);
+	bp->mac_addr[4] = (u8) (reg >> 8);
+	bp->mac_addr[5] = (u8) reg;
+
+	bp->tx_ring_size = MAX_TX_DESC_CNT;
+	bp->rx_ring_size = RX_BUF_CNT;
+	bp->rx_max_ring_idx = MAX_RX_DESC_CNT;
+
+	bp->rx_offset = RX_OFFSET;
+
+	bp->tx_quick_cons_trip_int = 20;
+	bp->tx_quick_cons_trip = 20;
+	bp->tx_ticks_int = 80;
+	bp->tx_ticks = 80;
+		
+	bp->rx_quick_cons_trip_int = 6;
+	bp->rx_quick_cons_trip = 6;
+	bp->rx_ticks_int = 18;
+	bp->rx_ticks = 18;
+
+	bp->stats_ticks = 1000000 & 0xffff00;
+
+	bp->phy_addr = 1;
+
+	/* No need for WOL support in Etherboot */
+	bp->flags |= NO_WOL_FLAG;
+
+	/* Disable WOL support if we are running on a SERDES chip. */
+	if (CHIP_BOND_ID(bp) & CHIP_BOND_ID_SERDES_BIT) {
+		bp->phy_flags |= PHY_SERDES_FLAG;
+		if (CHIP_NUM(bp) == CHIP_NUM_5708) {
+			bp->phy_addr = 2;
+			reg = REG_RD_IND(bp, bp->shmem_base +
+					 BNX2_SHARED_HW_CFG_CONFIG);
+			if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
+				bp->phy_flags |= PHY_2_5G_CAPABLE_FLAG;
+		}
+	}
+
+	if (CHIP_ID(bp) == CHIP_ID_5706_A0) {
+		bp->tx_quick_cons_trip_int =
+			bp->tx_quick_cons_trip;
+		bp->tx_ticks_int = bp->tx_ticks;
+		bp->rx_quick_cons_trip_int =
+			bp->rx_quick_cons_trip;
+		bp->rx_ticks_int = bp->rx_ticks;
+		bp->comp_prod_trip_int = bp->comp_prod_trip;
+		bp->com_ticks_int = bp->com_ticks;
+		bp->cmd_ticks_int = bp->cmd_ticks;
+	}
+
+	bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;
+	bp->req_line_speed = 0;
+	if (bp->phy_flags & PHY_SERDES_FLAG) {
+		bp->advertising = ETHTOOL_ALL_FIBRE_SPEED | ADVERTISED_Autoneg;
+
+		reg = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_CONFIG);
+		reg &= BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK;
+		if (reg == BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G) {
+			bp->autoneg = 0;
+			bp->req_line_speed = bp->line_speed = SPEED_1000;
+			bp->req_duplex = DUPLEX_FULL;
+		}
+	}
+	else {
+		bp->advertising = ETHTOOL_ALL_COPPER_SPEED | ADVERTISED_Autoneg;
+	}
+
+	bp->req_flow_ctrl = FLOW_CTRL_RX | FLOW_CTRL_TX;
+
+	/* Disable driver heartbeat checking */
+	REG_WR_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB,
+			BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE);
+	REG_RD_IND(bp, bp->shmem_base + BNX2_DRV_PULSE_MB);
+
+	return 0;
+
+err_out_disable:
+	bnx2_disable(nic);
+
+	return rc;
+}
+
+static void
+bnx2_transmit(struct nic *nic, const char *dst_addr,
+		unsigned int type, unsigned int size, const char *packet)
+{
+	/* Sometimes the nic will be behind by a frame.  Using two transmit
+	 * buffers prevents us from timing out in that case.
+	 */
+	static struct eth_frame {
+		uint8_t  dst_addr[ETH_ALEN];
+		uint8_t  src_addr[ETH_ALEN];
+		uint16_t type;
+		uint8_t  data [ETH_FRAME_LEN - ETH_HLEN];
+	} frame[2];
+	static int frame_idx = 0;
+	
+	/* send the packet to destination */
+	struct tx_bd *txbd;
+	struct bnx2 *bp = &bnx2;
+	u16 prod, ring_prod;
+	u16 hw_cons;
+	int i = 0;
+
+	prod = bp->tx_prod;
+	ring_prod = TX_RING_IDX(prod);
+	hw_cons = bp->status_blk->status_tx_quick_consumer_index0;
+	if ((hw_cons & MAX_TX_DESC_CNT) == MAX_TX_DESC_CNT) {
+		hw_cons++;
+	}
+
+	while((hw_cons != prod) && (hw_cons != (PREV_TX_BD(prod)))) {
+		mdelay(10);	/* give the nic a chance */
+		//poll_interruptions();
+		if (++i > 500) { /* timeout 5s for transmit */
+			printf("transmit timed out\n");
+			bnx2_disable(bp->nic);
+			bnx2_init_board(bp->pdev, bp->nic);
+			return;
+		}
+	}
+	if (i != 0) {
+		printf("#");
+	}
+
+	/* Copy the packet to the our local buffer */
+	memcpy(&frame[frame_idx].dst_addr, dst_addr, ETH_ALEN);
+	memcpy(&frame[frame_idx].src_addr, nic->node_addr, ETH_ALEN);
+	frame[frame_idx].type = htons(type);
+	memset(&frame[frame_idx].data, 0, sizeof(frame[frame_idx].data));
+	memcpy(&frame[frame_idx].data, packet, size);
+
+	/* Setup the ring buffer entry to transmit */
+	txbd = &bp->tx_desc_ring[ring_prod];
+	txbd->tx_bd_haddr_hi = 0; /* Etherboot runs under 4GB */
+	txbd->tx_bd_haddr_lo = virt_to_bus(&frame[frame_idx]);
+	txbd->tx_bd_mss_nbytes = (size + ETH_HLEN);
+	txbd->tx_bd_vlan_tag_flags = TX_BD_FLAGS_START | TX_BD_FLAGS_END;
+
+	/* Advance to the next entry */
+	prod = NEXT_TX_BD(prod);
+	frame_idx ^= 1;
+
+	bp->tx_prod_bseq += (size + ETH_HLEN);
+
+	REG_WR16(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BIDX, prod);
+	REG_WR(bp, MB_TX_CID_ADDR + BNX2_L2CTX_TX_HOST_BSEQ, bp->tx_prod_bseq);
+
+	wmb();
+
+	bp->tx_prod = prod;
+}
+
+static int
+bnx2_poll_link(struct bnx2 *bp)
+{
+	u32 new_link_state, old_link_state, emac_status;
+
+	new_link_state = bp->status_blk->status_attn_bits &
+		STATUS_ATTN_BITS_LINK_STATE;
+
+	old_link_state = bp->status_blk->status_attn_bits_ack &
+		STATUS_ATTN_BITS_LINK_STATE;
+
+	if (!new_link_state && !old_link_state) {
+		/* For some reason the card doesn't always update the link
+		 * status bits properly.  Kick the stupid thing and try again.
+		 */
+		u32 bmsr;
+
+		bnx2_read_phy(bp, MII_BMSR, &bmsr);
+		bnx2_read_phy(bp, MII_BMSR, &bmsr);
+
+		if ((bp->phy_flags & PHY_SERDES_FLAG) &&
+		    (CHIP_NUM(bp) == CHIP_NUM_5706)) {
+			REG_RD(bp, BNX2_EMAC_STATUS);
+		}
+
+		new_link_state = bp->status_blk->status_attn_bits &
+			STATUS_ATTN_BITS_LINK_STATE;
+
+		old_link_state = bp->status_blk->status_attn_bits_ack &
+			STATUS_ATTN_BITS_LINK_STATE;
+
+		/* Okay, for some reason the above doesn't work with some
+		 * switches (like HP ProCurve). If the above doesn't work,
+		 * check the MAC directly to see if we have a link.  Perhaps we
+		 * should always check the MAC instead probing the MII.
+		 */
+		if (!new_link_state && !old_link_state) {
+			emac_status = REG_RD(bp, BNX2_EMAC_STATUS);
+			if (emac_status & BNX2_EMAC_STATUS_LINK_CHANGE) {
+				/* Acknowledge the link change */
+				REG_WR(bp, BNX2_EMAC_STATUS, BNX2_EMAC_STATUS_LINK_CHANGE);
+			} else if (emac_status & BNX2_EMAC_STATUS_LINK) {
+				new_link_state = !old_link_state;
+			}
+		}
+
+	}
+
+	if (new_link_state != old_link_state) {
+		if (new_link_state) {
+			REG_WR(bp, BNX2_PCICFG_STATUS_BIT_SET_CMD,
+				STATUS_ATTN_BITS_LINK_STATE);
+		}
+		else {
+			REG_WR(bp, BNX2_PCICFG_STATUS_BIT_CLEAR_CMD,
+				STATUS_ATTN_BITS_LINK_STATE);
+		}
+
+		bnx2_set_link(bp);
+
+		/* This is needed to take care of transient status
+		 * during link changes.
+		 */
+
+		REG_WR(bp, BNX2_HC_COMMAND,
+		       bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+		REG_RD(bp, BNX2_HC_COMMAND);
+
+	}
+
+	return bp->link_up;
+}
+
+static int
+bnx2_poll(struct nic* nic, int retrieve)
+{
+	struct bnx2 *bp = &bnx2;
+	struct rx_bd *cons_bd, *prod_bd;
+	u16 hw_cons, sw_cons, sw_ring_cons, sw_prod, sw_ring_prod;
+	struct l2_fhdr *rx_hdr;
+	int result = 0;
+	unsigned int len;
+	unsigned char *data;
+	u32 status;
+	
+#if 0
+	if ((bp->status_blk->status_idx == bp->last_status_idx) &&
+	    (REG_RD(bp, BNX2_PCICFG_MISC_STATUS) &
+	     BNX2_PCICFG_MISC_STATUS_INTA_VALUE)) {
+
+		bp->last_status_idx = bp->status_blk->status_idx;
+		REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+	       BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
+	       BNX2_PCICFG_INT_ACK_CMD_MASK_INT |
+	       bp->last_status_idx);
+		return 0;
+	}
+#endif
+
+	if ((bp->status_blk->status_rx_quick_consumer_index0 != bp->rx_cons) && !retrieve)
+		return 1;
+
+	if (bp->status_blk->status_rx_quick_consumer_index0 != bp->rx_cons) {
+
+		hw_cons = bp->hw_rx_cons = bp->status_blk->status_rx_quick_consumer_index0;
+		if ((hw_cons & MAX_RX_DESC_CNT) == MAX_RX_DESC_CNT) {
+			hw_cons++;
+		}
+		sw_cons = bp->rx_cons;
+		sw_prod = bp->rx_prod;
+
+		rmb();
+		if (sw_cons != hw_cons) {
+
+			sw_ring_cons = RX_RING_IDX(sw_cons);
+			sw_ring_prod = RX_RING_IDX(sw_prod);
+
+			data = bus_to_virt(bp->rx_desc_ring[sw_ring_cons].rx_bd_haddr_lo);
+
+			rx_hdr = (struct l2_fhdr *)data;
+			len = rx_hdr->l2_fhdr_pkt_len - 4;
+			if ((len > (ETH_MAX_MTU + ETH_HLEN)) ||
+				((status = rx_hdr->l2_fhdr_status) &
+				(L2_FHDR_ERRORS_BAD_CRC |
+				L2_FHDR_ERRORS_PHY_DECODE |
+				L2_FHDR_ERRORS_ALIGNMENT |
+				L2_FHDR_ERRORS_TOO_SHORT |
+				L2_FHDR_ERRORS_GIANT_FRAME))) {
+				result = 0;
+			}
+			else
+			{
+				nic->packetlen = len;
+				memcpy(nic->packet, data + bp->rx_offset, len);
+				result = 1;
+			}
+
+			/* Reuse the buffer */
+			bp->rx_prod_bseq += bp->rx_buf_use_size;
+			if (sw_cons != sw_prod) {
+				cons_bd = &bp->rx_desc_ring[sw_ring_cons];
+				prod_bd = &bp->rx_desc_ring[sw_ring_prod];
+				prod_bd->rx_bd_haddr_hi = 0; /* Etherboot runs under 4GB */
+				prod_bd->rx_bd_haddr_lo = cons_bd->rx_bd_haddr_lo;
+			}
+
+			sw_cons = NEXT_RX_BD(sw_cons);
+			sw_prod = NEXT_RX_BD(sw_prod);
+
+		}
+
+		bp->rx_cons = sw_cons;
+		bp->rx_prod = sw_prod;
+
+		REG_WR16(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BDIDX, bp->rx_prod);
+
+		REG_WR(bp, MB_RX_CID_ADDR + BNX2_L2CTX_HOST_BSEQ, bp->rx_prod_bseq);
+
+		wmb();
+
+	}
+
+	bnx2_poll_link(bp);
+
+#if 0
+	bp->last_status_idx = bp->status_blk->status_idx;
+	rmb();
+
+	REG_WR(bp, BNX2_PCICFG_INT_ACK_CMD,
+	       BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID |
+	       BNX2_PCICFG_INT_ACK_CMD_MASK_INT |
+	       bp->last_status_idx);
+
+	REG_WR(bp, BNX2_HC_COMMAND, bp->hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
+#endif
+
+	return result;
+}
+
+static void
+bnx2_irq(struct nic *nic __unused, irq_action_t action __unused)
+{
+	switch ( action ) {
+		case DISABLE: break;
+		case ENABLE: break;
+		case FORCE: break;
+	}
+}
+
+static struct nic_operations bnx2_operations = {
+	.connect	= dummy_connect,
+	.poll		= bnx2_poll,
+	.transmit	= bnx2_transmit,
+	.irq		= bnx2_irq,
+};
+
+static int
+bnx2_probe(struct nic *nic, struct pci_device *pdev)
+{
+	struct bnx2 *bp = &bnx2;
+	int i, rc;
+
+	if (pdev == 0)
+		return 0;
+
+	memset(bp, 0, sizeof(*bp));
+
+	rc = bnx2_init_board(pdev, nic);
+	if (rc < 0) {
+		return 0;
+	}
+
+	/*
+	nic->disable = bnx2_disable;
+	nic->transmit = bnx2_transmit;
+	nic->poll = bnx2_poll;
+	nic->irq = bnx2_irq;
+	*/
+	
+	nic->nic_op	= &bnx2_operations;
+
+	memcpy(nic->node_addr, bp->mac_addr, ETH_ALEN);
+	printf("Ethernet addr: %s\n", eth_ntoa( nic->node_addr ) );
+	printf("Broadcom NetXtreme II (%c%d) PCI%s %s %dMHz\n",
+	        (int) ((CHIP_ID(bp) & 0xf000) >> 12) + 'A',
+	        (int) ((CHIP_ID(bp) & 0x0ff0) >> 4),
+		((bp->flags & PCIX_FLAG) ? "-X" : ""),
+		((bp->flags & PCI_32BIT_FLAG) ? "32-bit" : "64-bit"),
+		bp->bus_speed_mhz);
+
+	bnx2_set_power_state_0(bp);
+	bnx2_disable_int(bp);
+
+	bnx2_alloc_mem(bp);
+
+	rc = bnx2_init_nic(bp);
+	if (rc) {
+		return 0;
+	}
+
+	bnx2_poll_link(bp);
+	for(i = 0; !bp->link_up && (i < VALID_LINK_TIMEOUT*100); i++) {
+		mdelay(1);
+		bnx2_poll_link(bp);
+	}
+#if 1
+	if (!bp->link_up){
+		printf("Valid link not established\n");
+		goto err_out_disable;
+	}
+#endif
+	
+	return 1;
+
+err_out_disable:
+	bnx2_disable(nic);
+	return 0;
+}
+
+static struct pci_device_id bnx2_nics[] = {
+	PCI_ROM(0x14e4, 0x164a, "bnx2-5706",        "Broadcom NetXtreme II BCM5706", 0),
+	PCI_ROM(0x14e4, 0x164c, "bnx2-5708",        "Broadcom NetXtreme II BCM5708", 0),
+	PCI_ROM(0x14e4, 0x16aa, "bnx2-5706S",       "Broadcom NetXtreme II BCM5706S", 0),
+	PCI_ROM(0x14e4, 0x16ac, "bnx2-5708S",       "Broadcom NetXtreme II BCM5708S", 0),
+};
+
+PCI_DRIVER ( bnx2_driver, bnx2_nics, PCI_NO_CLASS );
+
+DRIVER ( "BNX2", nic_driver, pci_driver, bnx2_driver, bnx2_probe, bnx2_disable );
+
+/*
+static struct pci_driver bnx2_driver __pci_driver = {
+	.type     = NIC_DRIVER,
+	.name     = "BNX2",              
+	.probe    = bnx2_probe,
+	.ids      = bnx2_nics,                  
+	.id_count = sizeof(bnx2_nics)/sizeof(bnx2_nics[0]), 
+	.class    = 0,    
+};
+*/
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2_fw.h ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2_fw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2_fw.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2_fw.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,3494 @@
+/* bnx2_fw.h: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005, 2006 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, except as noted below.
+ *
+ * This file contains firmware data derived from proprietary unpublished
+ * source code, Copyright (c) 2004, 2005 Broadcom Corporation.
+ *
+ * Permission is hereby granted for the distribution of this firmware data
+ * in hexadecimal or equivalent format, provided this copyright notice is
+ * accompanying it.
+ */
+
+static const int bnx2_COM_b06FwReleaseMajor = 0x1;
+static const int bnx2_COM_b06FwReleaseMinor = 0x0;
+static const int bnx2_COM_b06FwReleaseFix = 0x0;
+static const u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
+static const u32 bnx2_COM_b06FwTextAddr = 0x08000000;
+static const int bnx2_COM_b06FwTextLen = 0x57bc;
+static const u32 bnx2_COM_b06FwDataAddr = 0x08005840;
+static const int bnx2_COM_b06FwDataLen = 0x0;
+static const u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
+static const int bnx2_COM_b06FwRodataLen = 0x58;
+static const u32 bnx2_COM_b06FwBssAddr = 0x08005860;
+static const int bnx2_COM_b06FwBssLen = 0x88;
+static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
+static const int bnx2_COM_b06FwSbssLen = 0x1c;
+static u32 bnx2_COM_b06FwText[(0x57bc/4) + 1] = {
+	0x0a00022d, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x322e352e,
+	0x38000000, 0x02050802, 0x00000000, 0x00000003, 0x00000014, 0x00000032,
+	0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000010, 0x000003e8, 0x0000ea60, 0x00000001, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000002, 0x00000020, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800, 0x24425840,
+	0x3c030800, 0x246358e8, 0xac400000, 0x0043202b, 0x1480fffd, 0x24420004,
+	0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261008b4, 0x3c1c0800,
+	0x279c5840, 0x0e0002f7, 0x00000000, 0x0000000d, 0x27bdffe8, 0x3c1a8000,
+	0x3c020008, 0x0342d825, 0x3c036010, 0xafbf0010, 0x8c655000, 0x3c020800,
+	0x24470f30, 0x3c040800, 0x24865860, 0x2402ff7f, 0x00a22824, 0x34a5380c,
+	0xac655000, 0x00002821, 0x24020037, 0x24030c80, 0xaf420008, 0xaf430024,
+	0xacc70000, 0x24a50001, 0x2ca20016, 0x1440fffc, 0x24c60004, 0x24845860,
+	0x3c020800, 0x24420f3c, 0x3c030800, 0x24630e2c, 0xac820004, 0x3c020800,
+	0x24420a2c, 0x3c050800, 0x24a51268, 0xac82000c, 0x3c020800, 0x244243dc,
+	0xac830008, 0x3c030800, 0x24633698, 0xac820014, 0x3c020800, 0x24423c24,
+	0xac830018, 0xac83001c, 0x3c030800, 0x24630f44, 0xac820024, 0x3c020800,
+	0x244243ac, 0xac83002c, 0x3c030800, 0x246343cc, 0xac820030, 0x3c020800,
+	0x244242f0, 0xac830034, 0x3c030800, 0x24633d78, 0xac82003c, 0x3c020800,
+	0x24420fd4, 0xac850010, 0xac850020, 0xac830040, 0x0e0010b7, 0xac820050,
+	0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafb00010, 0x27500100,
+	0xafbf0018, 0xafb10014, 0x9203000b, 0x24020003, 0x1462005b, 0x96110008,
+	0x32220001, 0x10400009, 0x27430080, 0x8e020000, 0x96040014, 0x000211c2,
+	0x00021040, 0x00621821, 0xa4640000, 0x0a0002d0, 0x3c020800, 0x3c020800,
+	0x8c430020, 0x1060002a, 0x3c030800, 0x0e00148e, 0x00000000, 0x97420108,
+	0x8f850018, 0x9743010c, 0x3042003e, 0x00021400, 0x00621825, 0xaca30000,
+	0x8f840018, 0x8f420100, 0xac820004, 0x97430116, 0x9742010e, 0x8f840018,
+	0x00031c00, 0x00431025, 0xac820008, 0x97430110, 0x97440112, 0x8f850018,
+	0x00031c00, 0x00832025, 0xaca4000c, 0x97420114, 0x8f840018, 0x3042ffff,
+	0xac820010, 0x8f830018, 0xac600014, 0x8f820018, 0x3c030800, 0xac400018,
+	0x946258ce, 0x8f840018, 0x3c032000, 0x00431025, 0xac82001c, 0x0e0014cc,
+	0x24040001, 0x3c030800, 0x8c620040, 0x24420001, 0xac620040, 0x3c020800,
+	0x8c430044, 0x32240004, 0x24630001, 0x10800017, 0xac430044, 0x8f4202b8,
+	0x04430007, 0x8e020020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001,
+	0x0a0002f2, 0xac830060, 0x3c060800, 0x8cc4005c, 0xaf420280, 0x96030016,
+	0x00001021, 0xa7430284, 0x8e050004, 0x24840001, 0x3c031000, 0xaf450288,
+	0xaf4302b8, 0x0a0002f2, 0xacc4005c, 0x32220002, 0x0a0002f2, 0x0002102b,
+	0x3c026000, 0xac400808, 0x0000000d, 0x00001021, 0x8fbf0018, 0x8fb10014,
+	0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffc8, 0xafbf0034, 0xafbe0030,
+	0xafb7002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c, 0xafb20018,
+	0xafb10014, 0x0e000244, 0xafb00010, 0x3c170800, 0x3c160800, 0x24110020,
+	0x24150030, 0x2794000c, 0x27930008, 0x3c124000, 0x3c1e0800, 0x8f820004,
+	0x3c040800, 0x8c830020, 0x10430005, 0x8ee200a4, 0xaf830004, 0x0e001593,
+	0x00000000, 0x8ee200a4, 0x8ec300a0, 0x10430004, 0x26c400a0, 0x94820002,
+	0xa742009e, 0xaee300a4, 0x8f500000, 0x32020007, 0x1040ffee, 0x32020001,
+	0x1040002c, 0x32020002, 0x8f420100, 0xaf420020, 0x8f430104, 0xaf4300a8,
+	0x9342010b, 0x93630000, 0x306300ff, 0x10710005, 0x304400ff, 0x10750006,
+	0x2c820016, 0x0a000333, 0x00000000, 0xaf940000, 0x0a000334, 0x2c820016,
+	0xaf930000, 0x0a000334, 0x00000000, 0xaf800000, 0x14400005, 0x00041880,
+	0x0e0003cc, 0x00000000, 0x0a000340, 0x00000000, 0x3c020800, 0x24425860,
+	0x00621821, 0x8c620000, 0x0040f809, 0x00000000, 0x10400005, 0x3c030800,
+	0x8f420104, 0x3c016020, 0xac220014, 0x3c030800, 0x8c620034, 0xaf520138,
+	0x24420001, 0xac620034, 0x32020002, 0x1040001a, 0x32020004, 0x8f420140,
+	0xaf420020, 0x93630000, 0x306300ff, 0x10710005, 0x00000000, 0x10750006,
+	0x00000000, 0x0a00035d, 0x00000000, 0xaf940000, 0x0a00035e, 0x00000000,
+	0xaf930000, 0x0a00035e, 0x00000000, 0xaf800000, 0x0e000c7b, 0x00000000,
+	0x3c040800, 0x8c820038, 0xaf520178, 0x24420001, 0xac820038, 0x32020004,
+	0x1040ffa4, 0x00000000, 0x8f420180, 0xaf420020, 0x93630000, 0x306300ff,
+	0x10710005, 0x00000000, 0x10750006, 0x00000000, 0x0a000378, 0x00000000,
+	0xaf940000, 0x0a000379, 0x00000000, 0xaf930000, 0x0a000379, 0x00000000,
+	0xaf800000, 0x8f430180, 0x24020f00, 0x14620005, 0x00000000, 0x8f420188,
+	0xa742009c, 0x0a000387, 0x8fc2003c, 0x93620000, 0x14510004, 0x8fc2003c,
+	0x0e000bad, 0x00000000, 0x8fc2003c, 0xaf5201b8, 0x24420001, 0x0a00030b,
+	0xafc2003c, 0x27bdffe8, 0xafbf0010, 0x97420108, 0x24033000, 0x30447000,
+	0x10830016, 0x28823001, 0x10400007, 0x24024000, 0x1080000b, 0x24022000,
+	0x1082000c, 0x00000000, 0x0a0003b3, 0x00000000, 0x10820010, 0x24025000,
+	0x10820012, 0x00000000, 0x0a0003b3, 0x00000000, 0x0000000d, 0x0a0003b5,
+	0x00001021, 0x0e000442, 0x00000000, 0x0a0003b6, 0x8fbf0010, 0x0e00041a,
+	0x00000000, 0x0a0003b5, 0x00001021, 0x0e000669, 0x00000000, 0x0a0003b5,
+	0x00001021, 0x0e001467, 0x00000000, 0x0a0003b5, 0x00001021, 0x0000000d,
+	0x00001021, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x93620000, 0x24030020,
+	0x304400ff, 0x10830005, 0x24020030, 0x10820007, 0x00000000, 0x0a0003c9,
+	0x00000000, 0x2782000c, 0xaf820000, 0x03e00008, 0x00000000, 0x27820008,
+	0xaf820000, 0x03e00008, 0x00000000, 0xaf800000, 0x03e00008, 0x00000000,
+	0x0000000d, 0x03e00008, 0x00001021, 0x03e00008, 0x00001021, 0x27440100,
+	0x94830008, 0x30620004, 0x10400017, 0x30620002, 0x8f4202b8, 0x04430007,
+	0x8c820020, 0x3c040800, 0x8c830060, 0x24020001, 0x24630001, 0x03e00008,
+	0xac830060, 0xaf420280, 0x94830016, 0x3c060800, 0xa7430284, 0x8c850004,
+	0x8cc4005c, 0x00001021, 0x3c031000, 0x24840001, 0xaf450288, 0xaf4302b8,
+	0x03e00008, 0xacc4005c, 0x14400003, 0x3c040800, 0x03e00008, 0x00001021,
+	0x8c830084, 0x24020001, 0x24630001, 0x03e00008, 0xac830084, 0x27450100,
+	0x3c040800, 0x8c820088, 0x94a3000c, 0x24420001, 0x007a1821, 0xac820088,
+	0x8ca40018, 0x90664000, 0xaf440038, 0x8ca2001c, 0x2403fff8, 0x00063600,
+	0x00431024, 0x34420004, 0x3c030005, 0xaf42003c, 0xaf430030, 0x00000000,
+	0x00000000, 0x00000000, 0xaf460404, 0x00000000, 0x00000000, 0x00000000,
+	0x3c020006, 0x34420001, 0xaf420030, 0x00000000, 0x00000000, 0x00000000,
+	0x8f420000, 0x30420010, 0x1040fffd, 0x00001021, 0x03e00008, 0x00000000,
+	0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x1060001e,
+	0xafbf0014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020018, 0xac620000,
+	0x8f840018, 0x9602000c, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018,
+	0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f840018,
+	0x3c026000, 0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce,
+	0x8f850018, 0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c,
+	0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010,
+	0x27500100, 0xafbf0014, 0x92020009, 0x14400003, 0x3c020800, 0x0a00046c,
+	0x24020001, 0x8c430020, 0x1060001f, 0x00001021, 0x0e00148e, 0x00000000,
+	0x8f830018, 0x8e020018, 0xac620000, 0x8f840018, 0x9602000c, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448, 0xac830018,
+	0x96020008, 0x3c030800, 0x946458ce, 0x8f850018, 0x00021400, 0x00441025,
+	0x24040001, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf0014, 0x8fb00010,
+	0x03e00008, 0x27bd0018, 0x3c0b0800, 0x8d6808b0, 0x3c070800, 0x24e700b0,
+	0x00084900, 0x01271821, 0xac640000, 0x93620005, 0x97660008, 0x00e95021,
+	0x93630023, 0x9364003f, 0x25080001, 0x00021600, 0x00063400, 0x00461025,
+	0x00031a00, 0x00431025, 0x00822025, 0xad440004, 0x9362007e, 0x9366007f,
+	0x8f630178, 0x9364007a, 0x00021600, 0x00063400, 0x00461025, 0x00031a00,
+	0x00431025, 0x00822025, 0xad440008, 0x93620080, 0x9363007d, 0x3108007f,
+	0x01403821, 0xad6808b0, 0x00021600, 0x00031c00, 0x00431025, 0x00451025,
+	0x03e00008, 0xace2000c, 0x27bdffb8, 0xafb3002c, 0x00009821, 0xafbe0040,
+	0x0000f021, 0xafb50034, 0x27550100, 0xafbf0044, 0xafb7003c, 0xafb60038,
+	0xafb40030, 0xafb20028, 0xafb10024, 0xafb00020, 0xafa00010, 0xafa00014,
+	0x96a20008, 0x8f540100, 0x8eb10018, 0x30420001, 0x10400037, 0x02a0b821,
+	0x8f630054, 0x2622ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d,
+	0x00000000, 0x2400015c, 0x0a0004e5, 0x00002021, 0x8f62004c, 0x02221023,
+	0x18400028, 0x00002021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c,
+	0x308400ff, 0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c,
+	0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001,
+	0x00021023, 0x30420005, 0x0a0004e5, 0x34440004, 0x27660100, 0x00041080,
+	0x00c21021, 0x8c430000, 0x02231823, 0x04600004, 0x24820001, 0x30440007,
+	0x1485fff9, 0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094,
+	0x24040005, 0x24420001, 0x0a0004e5, 0xac620094, 0x24040004, 0x00809821,
+	0x9362003f, 0x304400ff, 0x38830016, 0x2c630001, 0x38820010, 0x2c420001,
+	0x00621825, 0x1460000c, 0x24020001, 0x38830008, 0x2c630001, 0x38820014,
+	0x2c420001, 0x00621825, 0x14600005, 0x24020001, 0x24020012, 0x14820002,
+	0x00001021, 0x24020001, 0x10400009, 0x00000000, 0x8ea20020, 0x8f630040,
+	0x0040b021, 0x00431023, 0x5c400010, 0x8f760040, 0x0a000511, 0x00000000,
+	0x9343010b, 0x24020004, 0x1462000a, 0x8eb60020, 0x8f630040, 0x3c021000,
+	0x00761823, 0x0043102a, 0x10400004, 0x00000000, 0x0000000d, 0x00000000,
+	0x240002fa, 0x9343010b, 0x24020004, 0x5462000b, 0x96a20008, 0x24020001,
+	0xafa20010, 0x96a20008, 0x24030001, 0xafa30018, 0x8eb2001c, 0x36730002,
+	0x30420020, 0x0a000526, 0xafa20014, 0x36730080, 0x30420002, 0x10400003,
+	0xafa00018, 0x0a000526, 0x8eb2001c, 0x8eb20014, 0x2402fffb, 0x02628024,
+	0x1200002a, 0x3c030800, 0x8c620030, 0x02021024, 0x10400026, 0x3c020800,
+	0x8c430020, 0x10600024, 0x32620004, 0x0e00148e, 0x00000000, 0x8f830018,
+	0x8f420100, 0xac620000, 0x8f840018, 0x02401821, 0x32620002, 0xac900004,
+	0x8f840018, 0x54400001, 0x02c01821, 0xac830008, 0x8f830018, 0x8ee20020,
+	0xac62000c, 0x8f840018, 0x8f620040, 0xac820010, 0x8f830018, 0x8ee20018,
+	0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+	0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc,
+	0xaca3001c, 0x32620004, 0x10400063, 0x00003821, 0x3c029000, 0x34420001,
+	0x3c038000, 0x02821025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000,
+	0x8f65005c, 0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821,
+	0x00a2102b, 0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023,
+	0xaf710064, 0x3c023fff, 0x0a000580, 0x3442ffff, 0x8f62005c, 0x02221023,
+	0x04400011, 0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff,
+	0x3442ffff, 0xaf710064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004,
+	0x02251021, 0x3c053fff, 0x34a5ffff, 0x02251021, 0xaf62005c, 0x24070001,
+	0xaf71004c, 0x8f620054, 0x16220005, 0x00000000, 0x93620023, 0x30420040,
+	0x10400017, 0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001,
+	0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804,
+	0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b,
+	0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021,
+	0xaf62000c, 0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000,
+	0x34420001, 0x02821025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004,
+	0x00000000, 0x0e0013c4, 0x00000000, 0x00403821, 0x54e00001, 0x241e0001,
+	0x8f700040, 0x8f620040, 0x14520003, 0x00521023, 0x0a0005bf, 0x00001021,
+	0x28420001, 0x10400041, 0x8fa20010, 0x0e000fae, 0x02402021, 0xaf720040,
+	0x9362003e, 0x30420001, 0x1440000b, 0x3c029000, 0x93620022, 0x24420001,
+	0xa3620022, 0x93630022, 0x3c020800, 0x8c440098, 0x0064182b, 0x14600027,
+	0x3c020800, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000,
+	0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+	0x34420001, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020,
+	0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050273, 0x0a0005f2,
+	0x24050001, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+	0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x24050001, 0x24020001, 0xa7620012,
+	0xa3600022, 0x0a0005fe, 0x2ca20001, 0x9743007a, 0x9444002a, 0x00002821,
+	0x00641821, 0x3063fffe, 0xa7630012, 0x2ca20001, 0x00021023, 0x03c2f024,
+	0x8fa20010, 0x10400004, 0x8fa30014, 0x0e0013c1, 0x00000000, 0x8fa30014,
+	0x10600003, 0x00000000, 0x0e0010eb, 0x00000000, 0x13c0001f, 0x3c029000,
+	0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074,
+	0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000, 0x02802021,
+	0x0e000470, 0x2405036c, 0x0a00062b, 0x8fa20018, 0x8f4201f8, 0x00431024,
+	0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4, 0xaf4301f8,
+	0x8fa20018, 0x5040002f, 0x96a20008, 0x8f620048, 0x8f630024, 0x00761821,
+	0xaf630048, 0x9764003c, 0x00501023, 0x0044102b, 0x10400025, 0x3c029000,
+	0x34420001, 0x3c040800, 0x8c830080, 0x8f450100, 0x3c068000, 0x24630001,
+	0x00a21025, 0xac830080, 0xaf420020, 0x8f420020, 0x00461024, 0x1440fffd,
+	0x00000000, 0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074,
+	0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021,
+	0x0e000470, 0x2405038a, 0x0a00065b, 0x96a20008, 0x8f4201f8, 0x00431024,
+	0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8,
+	0x96a20008, 0x8fbf0044, 0x8fbe0040, 0x8fb7003c, 0x8fb60038, 0x8fb50034,
+	0x8fb40030, 0x8fb3002c, 0x8fb20028, 0x8fb10024, 0x8fb00020, 0x00021042,
+	0x30420001, 0x03e00008, 0x27bd0048, 0x27bdffe0, 0xafbf0018, 0x97420108,
+	0x24030019, 0x304400ff, 0x10830065, 0x2882001a, 0x1040001a, 0x2882000a,
+	0x1040000f, 0x28820008, 0x10400040, 0x24020001, 0x1082003a, 0x28820002,
+	0x50400005, 0x24020006, 0x10800032, 0x3c026000, 0x0a0006fb, 0x00000000,
+	0x1082003d, 0x00000000, 0x0a0006fb, 0x00000000, 0x2402000b, 0x10820044,
+	0x2882000b, 0x1440004b, 0x2402000e, 0x10820045, 0x00000000, 0x0a0006fb,
+	0x00000000, 0x24020020, 0x10820062, 0x28820021, 0x1040000e, 0x2402001c,
+	0x1082004c, 0x2882001d, 0x10400005, 0x2402001b, 0x10820043, 0x00000000,
+	0x0a0006fb, 0x00000000, 0x2402001f, 0x10820050, 0x00000000, 0x0a0006fb,
+	0x00000000, 0x240200c1, 0x10820042, 0x288200c2, 0x10400005, 0x24020080,
+	0x10820021, 0x00000000, 0x0a0006fb, 0x00000000, 0x240200c2, 0x1082003d,
+	0x240200c9, 0x50820049, 0xafa00010, 0x0a0006fb, 0x00000000, 0x0e001163,
+	0xac400808, 0x0a0006fd, 0x8fbf0018, 0x3c026000, 0x8c444448, 0x3c030800,
+	0xac640064, 0x0e001163, 0x00000000, 0x3c026000, 0x8c444448, 0x3c030800,
+	0x0a0006fc, 0xac640068, 0x8f440100, 0x0e0006ff, 0x00000000, 0x3c026000,
+	0x8c444448, 0x3c030800, 0x0a0006fc, 0xac64006c, 0x0e001191, 0x00000000,
+	0x0a0006fd, 0x8fbf0018, 0x8f440100, 0x0e0011bb, 0x00000000, 0x0a0006fd,
+	0x8fbf0018, 0x0e001202, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0000000d,
+	0x0a0006fd, 0x8fbf0018, 0x0e000826, 0x00000000, 0x0a0006fd, 0x8fbf0018,
+	0x8f440100, 0x0e001264, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00134e,
+	0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e00087c, 0x27440100, 0x0a0006fd,
+	0x8fbf0018, 0x8f640040, 0x0e000fae, 0x00000000, 0x0a0006fd, 0x8fbf0018,
+	0x8f440100, 0x0e001059, 0x00000000, 0x0a0006fd, 0x8fbf0018, 0x0e001417,
+	0x00000000, 0x0a0006fd, 0x8fbf0018, 0xafa00014, 0x8f440100, 0x8f450118,
+	0x8f46011c, 0x0e001439, 0x8f470120, 0x0a0006fd, 0x8fbf0018, 0x0000000d,
+	0x8fbf0018, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x9742010c,
+	0x1440005e, 0x00803821, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020,
+	0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620023,
+	0x30420010, 0x14400026, 0x3c030800, 0x8f630074, 0x3c027fff, 0x3442ffff,
+	0x00621824, 0xaf630074, 0x93620005, 0x34420001, 0xa3620005, 0x8f63004c,
+	0x8f620054, 0x10620021, 0x24040001, 0x9762006a, 0x00022880, 0x50a00001,
+	0x24050001, 0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821,
+	0x00852804, 0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050,
+	0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824,
+	0x00a21021, 0xaf62000c, 0x0a00073d, 0x24040001, 0x8c6200a8, 0x00002021,
+	0x24420001, 0xac6200a8, 0x0000000d, 0x00000000, 0x2400044d, 0x3c028000,
+	0x34420001, 0x00e21025, 0xaf420020, 0x1080001f, 0x3c029000, 0x34420001,
+	0x00e21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+	0x00e31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00e02021, 0x0e000470,
+	0x24050455, 0x0a000761, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+	0x24020002, 0x3c031000, 0xaf4701c0, 0xa34201c4, 0xaf4301f8, 0x0e001163,
+	0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafbf0024,
+	0xafb40020, 0xafb3001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x93630005,
+	0x00809821, 0x24020030, 0x30630030, 0x146200ac, 0x00a0a021, 0x3c020800,
+	0x8c430020, 0x106000a6, 0x00000000, 0x0e00148e, 0x00000000, 0x8f830018,
+	0xac730000, 0x936200c4, 0x30420002, 0x10400004, 0x24020001, 0x8f830018,
+	0x0a000784, 0x00000000, 0x8f830018, 0x24020003, 0xac620004, 0x8f6200dc,
+	0x8f630040, 0x00431023, 0x18400004, 0x00000000, 0x0000000d, 0x00000000,
+	0x24000509, 0x8f840018, 0x8f6200dc, 0xac820008, 0x8f830018, 0xac60000c,
+	0x8f820018, 0xac400010, 0x8f830018, 0x8f62004c, 0x3c100800, 0xac620014,
+	0x8f850018, 0x3c026000, 0x8c434448, 0x261258c0, 0x00002021, 0xaca30018,
+	0x9642000e, 0x8f850018, 0x3c034010, 0x00431025, 0x0e0014cc, 0xaca2001c,
+	0x8f830018, 0xac730000, 0x9362003e, 0x9363003f, 0x8f840018, 0x00021200,
+	0x00621825, 0xac830004, 0x93620081, 0x93630082, 0x8f840018, 0x00021600,
+	0x00031c00, 0x00431025, 0xac820008, 0x8f830018, 0x8f620040, 0xac62000c,
+	0x8f840018, 0x8f620048, 0xac820010, 0x8f71004c, 0x8f820018, 0xac510014,
+	0x8f620050, 0x8f850018, 0x00401821, 0x02221023, 0x5c400001, 0x02201821,
+	0x00002021, 0xaca30018, 0x9642000e, 0x8f850018, 0x3c03c00b, 0x00431025,
+	0x0e0014cc, 0xaca2001c, 0x8f620054, 0x8f840018, 0x00401821, 0x02221023,
+	0x5c400001, 0x02201821, 0xac830000, 0x8f840018, 0x8f630058, 0xac830004,
+	0x93620023, 0x30420010, 0x10400004, 0x00000000, 0x8f830018, 0x0a0007dd,
+	0x8f620148, 0x8f830018, 0x8f62005c, 0xac620008, 0x8f830018, 0x8f620060,
+	0xac62000c, 0x8f840018, 0x8f620064, 0xac820010, 0x97630068, 0x9762006a,
+	0x8f840018, 0x00031c00, 0x00431025, 0xac820014, 0x8f850018, 0x00002021,
+	0x2402ffff, 0x260358c0, 0xaca20018, 0x9462000e, 0x8f850018, 0x3c03c00c,
+	0x00431025, 0x0e0014cc, 0xaca2001c, 0x8f840018, 0x8f630018, 0xac830000,
+	0x936200c4, 0x30420002, 0x10400006, 0x00000000, 0x976200c8, 0x8f830018,
+	0x3042ffff, 0x0a000803, 0xac620004, 0x8f820018, 0xac400004, 0x8f830018,
+	0x8f62006c, 0xac620008, 0x8f840018, 0x8f6200dc, 0xac82000c, 0x8f830018,
+	0xac600010, 0x93620005, 0x8f830018, 0x00021600, 0x00541025, 0xac620014,
+	0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x260258c0, 0xaca30018,
+	0x9443000e, 0x8f850018, 0x3c02400d, 0x00621825, 0x0e0014cc, 0xaca3001c,
+	0x0e00122e, 0x02602021, 0x8fbf0024, 0x8fb40020, 0x8fb3001c, 0x8fb20018,
+	0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb00010,
+	0x27500100, 0xafbf0018, 0xafb10014, 0x9603000c, 0x240200c1, 0x54620024,
+	0x8e040000, 0x3c029000, 0x8f450100, 0x34420001, 0x3c038000, 0x00a21025,
+	0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d,
+	0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x00a31825,
+	0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470, 0x240505b2,
+	0x0a000878, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002,
+	0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x0a000878, 0x8fbf0018,
+	0x8f65004c, 0x24060001, 0x0e0012a3, 0x240705be, 0x3c020800, 0x8c430020,
+	0x9611000c, 0x1060001d, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018,
+	0xac500000, 0x8f840018, 0x00111400, 0xac820004, 0x8f830018, 0xac600008,
+	0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f840018, 0x240205c1,
+	0xac820014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+	0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc,
+	0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+	0x27bdffb0, 0xafb5003c, 0x0000a821, 0xafbe0048, 0x0000f021, 0xafb70044,
+	0x0000b821, 0xafb30034, 0x00009821, 0xafb60040, 0x0080b021, 0xafbf004c,
+	0xafb40038, 0xafb20030, 0xafb1002c, 0xafb00028, 0xafa00010, 0x8f620040,
+	0x8ec30014, 0x96d1000c, 0x00431023, 0x04410025, 0x8ed40000, 0x32220401,
+	0x1040030c, 0x3c029000, 0x34420001, 0x02821025, 0xaf420020, 0x3c038000,
+	0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+	0x34420004, 0xa362007d, 0x8f640074, 0x34630001, 0x02831825, 0xaf430020,
+	0x04810006, 0x3c038000, 0x02802021, 0x0e000470, 0x24050664, 0x0a000ba2,
+	0x8fbf004c, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+	0xaf5401c0, 0xa34201c4, 0xaf4301f8, 0x0a000ba2, 0x8fbf004c, 0x32220010,
+	0x1040006b, 0x00003021, 0x9362003f, 0x92c6000f, 0x304500ff, 0x24c3fff8,
+	0x2c62000f, 0x10400057, 0x3c020800, 0x244257c0, 0x00031880, 0x00621821,
+	0x8c640000, 0x00800008, 0x00000000, 0x38a20012, 0x0a000924, 0x0002a82b,
+	0x2402000e, 0x14a20004, 0x2402000c, 0x24150001, 0x0a000924, 0x24060010,
+	0x10a20049, 0x38a30010, 0x2c630001, 0x38a20016, 0x2c420001, 0x00621825,
+	0x1460004d, 0x0000a821, 0x24020014, 0x10a2004a, 0x00000000, 0x0000000d,
+	0x00000000, 0x2400069c, 0x0a000924, 0x0000a821, 0x24020016, 0x14a20005,
+	0x2402000c, 0x24150001, 0x24060010, 0x0a000924, 0x3231fffd, 0x10a20032,
+	0x38a30010, 0x2c630001, 0x38a2000e, 0x2c420001, 0x00621825, 0x14600036,
+	0x0000a821, 0x24020014, 0x14a20003, 0x24150001, 0x0a000924, 0x24060012,
+	0x0000000d, 0x00000000, 0x240006bc, 0x0a000924, 0x0000a821, 0x2402000e,
+	0x14a20004, 0x24020016, 0x24150001, 0x0a000924, 0x3231fffb, 0x14a20004,
+	0x24020014, 0x24150001, 0x0a000924, 0x3231fffd, 0x54a20013, 0x92c2000e,
+	0x24150001, 0x24060012, 0x0a000924, 0x3231fffd, 0x2402000c, 0x54a2000c,
+	0x92c2000e, 0x92c3000e, 0x2402000a, 0x10620005, 0x24150001, 0x0000000d,
+	0x00000000, 0x240006e8, 0x24150001, 0x0a000924, 0x24060014, 0x92c2000e,
+	0x14a20003, 0x00000000, 0x0a000924, 0x24150001, 0x10a6ffc1, 0x24020012,
+	0x10a20005, 0x0000a821, 0x0000000d, 0x00000000, 0x24000704, 0x0000a821,
+	0x12a00022, 0x32220004, 0x10400002, 0x24020001, 0xafa20010, 0x32230102,
+	0x24020002, 0x1462000f, 0x00000000, 0x92c2000a, 0x30420020, 0x1440000b,
+	0x00000000, 0x8f630048, 0x8f620040, 0x14620004, 0x00000000, 0x8f620048,
+	0x24420001, 0xaf620048, 0x8f620040, 0x24420001, 0xaf620040, 0xa366003f,
+	0x38c30012, 0x2c630001, 0x38c20010, 0x2c420001, 0x00621825, 0x10600005,
+	0x3c030800, 0x8c620074, 0x24420001, 0x0e00140d, 0xac620074, 0x32220040,
+	0x32230020, 0xafa30020, 0x32230080, 0xafa30024, 0x32230001, 0xafa30018,
+	0x32230008, 0xafa3001c, 0x32230100, 0x104000c4, 0xafa30014, 0x8ec60010,
+	0x8f630054, 0x24c2ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d,
+	0x00000000, 0x2400015c, 0x0a000989, 0x00009021, 0x8f62004c, 0x00c21023,
+	0x18400028, 0x00009021, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c,
+	0x308400ff, 0x24420001, 0x30a500ff, 0x00804021, 0x1485000b, 0xac62008c,
+	0x3c040800, 0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001,
+	0x00021023, 0x30420005, 0x0a000989, 0x34520004, 0x27670100, 0x00041080,
+	0x00e21021, 0x8c430000, 0x00c31823, 0x04600004, 0x24820001, 0x30440007,
+	0x1485fff9, 0x00041080, 0x10880007, 0x3c030800, 0xa3640121, 0x8c620094,
+	0x24120005, 0x24420001, 0x0a000989, 0xac620094, 0x24120004, 0x32420001,
+	0x10400021, 0x3c020800, 0x8c430020, 0x8ed00000, 0x1060001c, 0x8ed30010,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001,
+	0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f820018, 0xac530014, 0x8f850018, 0x3c026000, 0x8c434448,
+	0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010,
+	0x00621825, 0x0e0014cc, 0xaca3001c, 0x24130001, 0x32420004, 0x10400068,
+	0x00003821, 0x3c029000, 0x8ec60010, 0x34420001, 0x3c038000, 0x02821025,
+	0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+	0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c, 0x8f63004c,
+	0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b, 0x54400006,
+	0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf660064, 0x3c023fff,
+	0x0a0009da, 0x3442ffff, 0x8f62005c, 0x00c21023, 0x04400011, 0x00000000,
+	0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff, 0xaf660064,
+	0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x00c51021, 0x3c053fff,
+	0x34a5ffff, 0x00c51021, 0xaf62005c, 0x24070001, 0xaf66004c, 0x8fa20010,
+	0x10400003, 0x00000000, 0xaf660050, 0xaf660054, 0x8f620054, 0x14c20005,
+	0x00000000, 0x93620023, 0x30420040, 0x10400017, 0x24020001, 0x9762006a,
+	0x00022880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081, 0x3c020800,
+	0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001, 0x00a03021,
+	0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021, 0x8f420074,
+	0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c, 0x93620082, 0x30420080,
+	0x50400001, 0xa3600081, 0x3c028000, 0x34420001, 0x02821025, 0xaf420020,
+	0x9363007e, 0x9362007a, 0x10620005, 0x00e0b821, 0x0e0013c4, 0x00000000,
+	0x00403821, 0x00e0b821, 0x8fa30020, 0x10600009, 0x8fa20010, 0x8ec20018,
+	0xaf620018, 0x8ec3001c, 0xaf63001c, 0x8ec20020, 0x24170001, 0xaf620058,
+	0x8fa20010, 0x10400057, 0x8fa30024, 0x93620023, 0x30420040, 0x10400053,
+	0x00000000, 0x16600021, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040001e,
+	0x24130001, 0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018,
+	0x24020001, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+	0x8f830018, 0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000,
+	0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+	0x3c024010, 0x00621825, 0xaca3001c, 0x0e0014cc, 0x24130001, 0x8e420020,
+	0x1040001c, 0x8ed00000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000,
+	0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c,
+	0x8f820018, 0xac400010, 0x8f830018, 0x24020798, 0xac620014, 0x8f850018,
+	0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce,
+	0x8f850018, 0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000,
+	0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x24020001, 0xaf62000c, 0x93630023, 0x3c028000, 0x34420001,
+	0x02821025, 0x306300bf, 0xa3630023, 0xaf420020, 0x8fa30024, 0x10600012,
+	0x8fa30018, 0x9362007c, 0x24420001, 0xa362007c, 0x9363007e, 0x9362007a,
+	0x1462000b, 0x8fa30018, 0x9362007c, 0x3c030800, 0x8c640024, 0x0044102b,
+	0x14400005, 0x8fa30018, 0x0e0013c4, 0x00000000, 0x02e2b825, 0x8fa30018,
+	0x3062ffff, 0x10400003, 0x32220200, 0x0a000a94, 0x241e0004, 0x10400003,
+	0x00000000, 0x241e0040, 0x24170001, 0x12a000d0, 0x32220002, 0x104000cf,
+	0x8fa2001c, 0x92c2000a, 0x30420002, 0x5040003b, 0x92c2000a, 0x93620023,
+	0x30420008, 0x54400037, 0x92c2000a, 0x3c020800, 0x8c430020, 0x10600023,
+	0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000,
+	0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040,
+	0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018,
+	0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018,
+	0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+	0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+	0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630008,
+	0xa3630023, 0xaf420020, 0x92c2000a, 0x30420020, 0x1040008e, 0x8fa2001c,
+	0x93620023, 0x30420001, 0x14400035, 0x3c020800, 0x8c430020, 0x10600023,
+	0x3c029000, 0x0e00148e, 0x00000000, 0x8f840018, 0x8ec30000, 0xac830000,
+	0x92c2000a, 0x8f830018, 0x00021600, 0xac620004, 0x8f840018, 0x8f620040,
+	0xac820008, 0x8f850018, 0x8f63004c, 0xaca3000c, 0x9362003f, 0x8f840018,
+	0x304200ff, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f850018,
+	0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+	0x3c02401a, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+	0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x34630001,
+	0xa3630023, 0xaf420020, 0x93620023, 0x30420040, 0x10400052, 0x8fa2001c,
+	0x16600020, 0x3c120800, 0x8e420020, 0x8f70004c, 0x1040003c, 0x3c029000,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x24020001,
+	0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f820018, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448,
+	0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010,
+	0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x3c029000,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac540000, 0x8f840018, 0x3c02008d,
+	0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f840018, 0x240207ee, 0xac820014, 0x8f850018, 0x3c026000,
+	0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+	0x3c024019, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x3c029000, 0x34420001,
+	0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x93630023, 0x3c028000, 0x34420001, 0x02821025, 0x306300bf,
+	0xa3630023, 0xaf420020, 0x8fa2001c, 0x1040000e, 0x8fa20014, 0x92c2000a,
+	0xa3620082, 0x57c00005, 0x37de0008, 0x8fa30014, 0x10600004, 0x00000000,
+	0x37de0008, 0x0a000b75, 0x24170001, 0x0e0012cf, 0x02802021, 0x8fa20014,
+	0x10400003, 0x00000000, 0x37de0010, 0x24170001, 0x12e00020, 0x3c029000,
+	0x34420001, 0x02821025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x03c21025, 0xa362007d,
+	0x8f640074, 0x34630001, 0x02831825, 0xaf430020, 0x04810006, 0x3c038000,
+	0x02802021, 0x0e000470, 0x2405082a, 0x0a000b9b, 0x00000000, 0x8f4201f8,
+	0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5401c0, 0xa34201c4,
+	0xaf4301f8, 0x9363003f, 0x24020012, 0x14620004, 0x8fbf004c, 0x0e00140d,
+	0x00000000, 0x8fbf004c, 0x8fbe0048, 0x8fb70044, 0x8fb60040, 0x8fb5003c,
+	0x8fb40038, 0x8fb30034, 0x8fb20030, 0x8fb1002c, 0x8fb00028, 0x03e00008,
+	0x27bd0050, 0x27bdffe8, 0xafbf0014, 0xafb00010, 0x8f500180, 0x97420184,
+	0x30420200, 0x14400015, 0x00000000, 0x8f430188, 0x3c02ff00, 0x00621824,
+	0x3c020200, 0x10620031, 0x0043102b, 0x14400007, 0x3c020300, 0x1060000b,
+	0x3c020100, 0x1062000d, 0x00000000, 0x0a000c2c, 0x00000000, 0x10620027,
+	0x3c020400, 0x1062003e, 0x02002021, 0x0a000c2c, 0x00000000, 0x0e000c31,
+	0x02002021, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420020, 0x1440005e,
+	0x8fbf0014, 0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000,
+	0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000,
+	0x34630001, 0x02031825, 0x34420020, 0xa3620005, 0xaf430020, 0x93620005,
+	0x30420020, 0x14400003, 0x02002021, 0x0000000d, 0x02002021, 0x0e000766,
+	0x24055854, 0x0a000c2e, 0x8fbf0014, 0x93620005, 0x30420001, 0x1040003f,
+	0x3c029000, 0x34420001, 0x02021025, 0xaf420020, 0x3c038000, 0x8f420020,
+	0x00431024, 0x1440fffd, 0x00000000, 0x93620023, 0x34420004, 0xa3620023,
+	0x93630005, 0x3c048000, 0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020,
+	0x34840001, 0x02042025, 0x0a000c0a, 0xaf440020, 0x00002821, 0x00003021,
+	0x0e000fb1, 0x240708d9, 0x3c020800, 0x8c430020, 0x10600023, 0x8fbf0014,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x93630082, 0x9362003f,
+	0x8f840018, 0x00031a00, 0x00431025, 0xac820004, 0x8f830018, 0xac600008,
+	0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac400014,
+	0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+	0x944358ce, 0x8f850018, 0x3c02400a, 0x00621825, 0x0e0014cc, 0xaca3001c,
+	0x0a000c2e, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010, 0x03e00008,
+	0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x8f420188, 0x00803021, 0x93640000,
+	0x24030020, 0x00021402, 0x10830008, 0x304500ff, 0x3c036018, 0x8c625000,
+	0x34420400, 0xac625000, 0x0000000d, 0x00000000, 0x24000955, 0x9363003f,
+	0x24020012, 0x14620023, 0x3c029000, 0x34420001, 0x3c038000, 0x00c21025,
+	0xaf650178, 0xa365007a, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+	0x00c31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00c02021, 0x0e000470,
+	0x24050963, 0x0a000c79, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd,
+	0x24020002, 0x3c031000, 0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a000c79,
+	0x8fbf0010, 0x9362007e, 0x1445000e, 0x00000000, 0x8f620178, 0x1045000b,
+	0x00000000, 0x8f820000, 0xaf650178, 0x8f660178, 0x8f440180, 0x8f65004c,
+	0x8c430000, 0x0060f809, 0x30c600ff, 0x0a000c79, 0x8fbf0010, 0xaf650178,
+	0x8fbf0010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafbf0010, 0x93630000,
+	0x24020020, 0x10620005, 0x00000000, 0x93630000, 0x24020030, 0x1462004d,
+	0x8fbf0010, 0x93420148, 0x2444ffff, 0x2c830005, 0x10600047, 0x3c020800,
+	0x24425800, 0x00041880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000,
+	0x8f430144, 0x8f62000c, 0x14620006, 0x24020001, 0xaf62000c, 0x0e000d59,
+	0x00000000, 0x0a000cd1, 0x8fbf0010, 0x8f62000c, 0x0a000cca, 0x00000000,
+	0x97630010, 0x8f420144, 0x14430006, 0x24020001, 0xa7620010, 0x0e00137a,
+	0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620010, 0x0a000cca, 0x00000000,
+	0x97630012, 0x8f420144, 0x14430006, 0x24020001, 0xa7620012, 0x0e001395,
+	0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620012, 0x0a000cca, 0x00000000,
+	0x97630014, 0x8f420144, 0x14430006, 0x24020001, 0xa7620014, 0x0e0013bb,
+	0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620014, 0x0a000cca, 0x00000000,
+	0x97630016, 0x8f420144, 0x14430006, 0x24020001, 0xa7620016, 0x0e0013be,
+	0x00000000, 0x0a000cd1, 0x8fbf0010, 0x97620016, 0x14400006, 0x8fbf0010,
+	0x3c030800, 0x8c620070, 0x24420001, 0xac620070, 0x8fbf0010, 0x03e00008,
+	0x27bd0018, 0x27bdffe0, 0x3c029000, 0xafbf001c, 0xafb20018, 0xafb10014,
+	0xafb00010, 0x8f500140, 0x34420001, 0x3c038000, 0x02021025, 0xaf420020,
+	0x8f420020, 0x00431024, 0x1440fffd, 0x24020012, 0x24030080, 0xa362003f,
+	0xa3630082, 0x93620023, 0x30420040, 0x10400007, 0x00008821, 0x93620023,
+	0x24110001, 0x304200bf, 0xa3620023, 0x0a000cf0, 0x3c028000, 0x3c028000,
+	0x34420001, 0x3c039000, 0x34630001, 0x3c048000, 0x02021025, 0x02031825,
+	0xaf420020, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000,
+	0x9362007d, 0x3c038000, 0x34420020, 0xa362007d, 0x8f640074, 0x34630001,
+	0x02031825, 0xaf430020, 0x04810006, 0x3c038000, 0x02002021, 0x0e000470,
+	0x24050a63, 0x0a000d13, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+	0x24020002, 0x3c031000, 0xaf5001c0, 0xa34201c4, 0xaf4301f8, 0x1220003f,
+	0x3c120800, 0x8e420020, 0x8f71004c, 0x1040003c, 0x8fbf001c, 0x0e00148e,
+	0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f820018, 0xac510014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+	0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024010, 0x00621825,
+	0x0e0014cc, 0xaca3001c, 0x8e420020, 0x1040001e, 0x8fbf001c, 0x0e00148e,
+	0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x3c02008d, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f840018, 0x24020a6a, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448,
+	0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c024019,
+	0x00621825, 0x0e0014cc, 0xaca3001c, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+	0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0010, 0x93620081,
+	0x3c030800, 0x8c640048, 0x0044102b, 0x14400005, 0x00000000, 0x0e000cd3,
+	0x00000000, 0x0a000da4, 0x8fbf0010, 0x93620081, 0x24420001, 0x0e0013c4,
+	0xa3620081, 0x9763006a, 0x00032880, 0x14a00002, 0x00403821, 0x24050001,
+	0x97630068, 0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804,
+	0x00c5102b, 0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b,
+	0x54600001, 0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021,
+	0xaf62000c, 0x10e00021, 0x3c029000, 0x8f450140, 0x34420001, 0x3c038000,
+	0x00a21025, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+	0x9362007d, 0x3c038000, 0x34420004, 0xa362007d, 0x8f640074, 0x34630001,
+	0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021, 0x0e000470,
+	0x24050a92, 0x0a000da4, 0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd,
+	0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8, 0x8fbf0010,
+	0x03e00008, 0x27bd0018, 0x27bdffd8, 0xafb3001c, 0x27530100, 0xafbf0024,
+	0xafb40020, 0xafb20018, 0xafb10014, 0xafb00010, 0x96620008, 0x3c140800,
+	0x8f520100, 0x30420001, 0x104000da, 0x00000000, 0x8e700018, 0x8f630054,
+	0x2602ffff, 0x00431023, 0x18400006, 0x00000000, 0x0000000d, 0x00000000,
+	0x2400015c, 0x0a000dea, 0x00008821, 0x8f62004c, 0x02021023, 0x18400028,
+	0x00008821, 0x93650120, 0x93640121, 0x3c030800, 0x8c62008c, 0x308400ff,
+	0x24420001, 0x30a500ff, 0x00803821, 0x1485000b, 0xac62008c, 0x3c040800,
+	0x8c830090, 0x24630001, 0xac830090, 0x93620122, 0x30420001, 0x00021023,
+	0x30420005, 0x0a000dea, 0x34510004, 0x27660100, 0x00041080, 0x00c21021,
+	0x8c430000, 0x02031823, 0x04600004, 0x24820001, 0x30440007, 0x1485fff9,
+	0x00041080, 0x10870007, 0x3c030800, 0xa3640121, 0x8c620094, 0x24110005,
+	0x24420001, 0x0a000dea, 0xac620094, 0x24110004, 0x32220001, 0x1040001e,
+	0x8e820020, 0x1040001d, 0x32220004, 0x0e00148e, 0x00000000, 0x8f820018,
+	0xac520000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018, 0xac600008,
+	0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018, 0xac500014,
+	0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800, 0xaca30018,
+	0x944358ce, 0x8f850018, 0x3c024010, 0x00621825, 0x0e0014cc, 0xaca3001c,
+	0x32220004, 0x10400081, 0x00003821, 0x3c029000, 0x34420001, 0x3c038000,
+	0x02421025, 0xa360007c, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x93620023, 0x30420080, 0x10400011, 0x00000000, 0x8f65005c,
+	0x8f63004c, 0x9764003c, 0x8f620064, 0x00a32823, 0x00852821, 0x00a2102b,
+	0x54400006, 0x3c023fff, 0x93620023, 0x3042007f, 0xa3620023, 0xaf700064,
+	0x3c023fff, 0x0a000e37, 0x3442ffff, 0x8f62005c, 0x02021023, 0x04400011,
+	0x00000000, 0x8f65005c, 0x8f630064, 0x9764003c, 0x3c023fff, 0x3442ffff,
+	0xaf700064, 0x00a32823, 0x00852821, 0x0045102b, 0x10400004, 0x02051021,
+	0x3c053fff, 0x34a5ffff, 0x02051021, 0xaf62005c, 0x24070001, 0xaf70004c,
+	0x8f620054, 0x16020005, 0x00000000, 0x93620023, 0x30420040, 0x10400017,
+	0x24020001, 0x9762006a, 0x00022880, 0x50a00001, 0x24050001, 0x97630068,
+	0x93640081, 0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b,
+	0x54400001, 0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001,
+	0x00c02021, 0x8f420074, 0x2403fffe, 0x00832824, 0x00a21021, 0xaf62000c,
+	0x93620082, 0x30420080, 0x50400001, 0xa3600081, 0x3c028000, 0x34420001,
+	0x02421025, 0xaf420020, 0x9363007e, 0x9362007a, 0x10620004, 0x00000000,
+	0x0e0013c4, 0x00000000, 0x00403821, 0x10e0001f, 0x3c029000, 0x34420001,
+	0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001,
+	0x02431825, 0xaf430020, 0x04810006, 0x3c038000, 0x02402021, 0x0e000470,
+	0x24050b3d, 0x0a000e8d, 0x00000000, 0x8f4201f8, 0x00431024, 0x1440fffd,
+	0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4, 0xaf4301f8, 0x9342010b,
+	0x9343010b, 0x8e820020, 0x27500100, 0x38630006, 0x10400029, 0x2c710001,
+	0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+	0x96020008, 0xac820004, 0x8f830018, 0x8e020014, 0xac620008, 0x8f850018,
+	0x3c026000, 0x8c434448, 0xaca3000c, 0x8f840018, 0x96020012, 0xac820010,
+	0x8f850018, 0x8e030020, 0xaca30014, 0x9602000c, 0x9603000e, 0x8f840018,
+	0x00021400, 0x00431025, 0xac820018, 0x12200005, 0x3c020800, 0x944358ce,
+	0x8f840018, 0x0a000eb8, 0x3c024013, 0x944358ce, 0x8f840018, 0x3c024014,
+	0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8e700014, 0x8f620040,
+	0x14500003, 0x00501023, 0x0a000ec3, 0x00001021, 0x28420001, 0x1040003a,
+	0x00000000, 0x0e000fae, 0x02002021, 0xaf700040, 0x9362003e, 0x30420001,
+	0x1440000b, 0x3c029000, 0x93620022, 0x24420001, 0xa3620022, 0x93630022,
+	0x3c020800, 0x8c440098, 0x0064182b, 0x14600025, 0x3c020800, 0x3c029000,
+	0x34420001, 0x02421025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d,
+	0x8f640074, 0x34630001, 0x02431825, 0xaf430020, 0x04810006, 0x3c038000,
+	0x02402021, 0x0e000470, 0x24050273, 0x0a000ef6, 0x24020001, 0x8f4201f8,
+	0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf5201c0, 0xa34201c4,
+	0xaf4301f8, 0x24020001, 0xa7620012, 0x0a000efe, 0xa3600022, 0x9743007a,
+	0x9444002a, 0x00641821, 0x3063fffe, 0xa7630012, 0x97420108, 0x8fbf0024,
+	0x8fb40020, 0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x00021042,
+	0x30420001, 0x03e00008, 0x27bd0028, 0x27bdffe0, 0xafb20018, 0x3c120800,
+	0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400046, 0xafb10014,
+	0x0e00148e, 0x00000000, 0x8f840018, 0x8e020000, 0xac820000, 0x936300b1,
+	0x936200c5, 0x8f850018, 0x00031e00, 0x00021400, 0x34420100, 0x00621825,
+	0xaca30004, 0x8f840018, 0x8e02001c, 0xac820008, 0x8f830018, 0x8f620048,
+	0xac62000c, 0x8f840018, 0x96020012, 0xac820010, 0x8f830018, 0x8f620040,
+	0x24040001, 0xac620014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800,
+	0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018, 0x3c024016, 0x00621825,
+	0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010, 0x1060001c, 0x8e420020,
+	0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000, 0x8f820018, 0xac500000,
+	0x8f830018, 0xac600004, 0x8f820018, 0xac400008, 0x8f830018, 0xac60000c,
+	0x8f820018, 0xac400010, 0x8f830018, 0xac600014, 0x8f850018, 0x3c036000,
+	0x8c634448, 0x24040001, 0xaca30018, 0x9622000e, 0x8f850018, 0x3c034015,
+	0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021, 0x8fbf001c, 0x8fb20018,
+	0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe0, 0xafb20018,
+	0x3c120800, 0x8e420020, 0xafb00010, 0x27500100, 0xafbf001c, 0x10400041,
+	0xafb10014, 0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000,
+	0x8f840018, 0x24020100, 0xac820004, 0x8f830018, 0x8e02001c, 0xac620008,
+	0x8f840018, 0x8e020018, 0xac82000c, 0x8f830018, 0x96020012, 0xac620010,
+	0x8f840018, 0x96020008, 0xac820014, 0x8f850018, 0x3c026000, 0x8c434448,
+	0x24040001, 0x3c020800, 0x245158c0, 0xaca30018, 0x9623000e, 0x8f850018,
+	0x3c024017, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x96030008, 0x30630010,
+	0x1060001c, 0x8e420020, 0x1040001a, 0x8e100000, 0x0e00148e, 0x00000000,
+	0x8f820018, 0xac500000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008,
+	0x8f830018, 0xac60000c, 0x8f820018, 0xac400010, 0x8f830018, 0xac600014,
+	0x8f850018, 0x3c036000, 0x8c634448, 0x24040001, 0xaca30018, 0x9622000e,
+	0x8f850018, 0x3c034015, 0x00431025, 0x0e0014cc, 0xaca2001c, 0x00001021,
+	0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+	0x27bdfff0, 0x03e00008, 0x27bd0010, 0x27bdffd0, 0xafb10014, 0x00808821,
+	0xafb40020, 0x00c0a021, 0xafbf0028, 0xafb50024, 0xafb3001c, 0xafb20018,
+	0xafb00010, 0x93620023, 0x00e0a821, 0x30420040, 0x1040003e, 0x30b3ffff,
+	0x3c120800, 0x8e420020, 0x1040003a, 0x8f70004c, 0x0e00148e, 0x00000000,
+	0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004, 0x8f830018,
+	0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+	0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448, 0x3c020800,
+	0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010, 0x00621825,
+	0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001b, 0x00000000, 0x0e00148e,
+	0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x3c02008d, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f820018, 0xac550014, 0x8f850018, 0x3c036000, 0x8c634448, 0x24040001,
+	0xaca30018, 0x9602000e, 0x8f850018, 0x3c034019, 0x00431025, 0x0e0014cc,
+	0xaca2001c, 0x93620023, 0x30420020, 0x14400003, 0x3c120800, 0x1280003f,
+	0x3c029000, 0x8e420020, 0x8f70004c, 0x1040003b, 0x3c029000, 0x0e00148e,
+	0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x24020001, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f820018, 0x24040001, 0xac500014, 0x8f850018, 0x3c026000, 0x8c434448,
+	0x3c020800, 0x245058c0, 0xaca30018, 0x9603000e, 0x8f850018, 0x3c024010,
+	0x00621825, 0x0e0014cc, 0xaca3001c, 0x8e430020, 0x1060001c, 0x3c029000,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018, 0x00131400,
+	0xac820004, 0x8f830018, 0xac750008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c036000, 0x8c634448,
+	0x24040001, 0xaca30018, 0x9602000e, 0x8f850018, 0x3c03401b, 0x00431025,
+	0x0e0014cc, 0xaca2001c, 0x3c029000, 0x34420001, 0x02221025, 0xaf420020,
+	0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93630023,
+	0x3c028000, 0x34420001, 0x02221025, 0x8fbf0028, 0x8fb50024, 0x8fb40020,
+	0x8fb3001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x3063009f, 0xa3630023,
+	0xaf420020, 0x03e00008, 0x27bd0030, 0x27bdffe0, 0xafb10014, 0x27510100,
+	0x3c029000, 0x34420001, 0xafb00010, 0x00808021, 0x02021025, 0x3c038000,
+	0xafbf0018, 0xaf420020, 0x8f420020, 0x00431024, 0x1440fffd, 0x00000000,
+	0xa7600008, 0x8f63005c, 0x3c028000, 0x34420001, 0xaf630148, 0x8f640050,
+	0x02021025, 0x3c039000, 0xaf64017c, 0xaf420020, 0x8f450100, 0x34630001,
+	0x3c048000, 0x00a31825, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd,
+	0x00000000, 0x9362007d, 0x3c038000, 0x34420001, 0xa362007d, 0x8f640074,
+	0x34630001, 0x00a31825, 0xaf430020, 0x04810006, 0x3c038000, 0x00a02021,
+	0x0e000470, 0x24050de5, 0x0a001093, 0x3c020800, 0x8f4201f8, 0x00431024,
+	0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0, 0xa34201c4, 0xaf4301f8,
+	0x3c020800, 0x8c430020, 0x1060001e, 0x8fbf0018, 0x0e00148e, 0x00000000,
+	0x8f830018, 0xac700000, 0x9622000c, 0x8f840018, 0x00021400, 0xac820004,
+	0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010,
+	0x8f820018, 0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001,
+	0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401f, 0x00621825,
+	0x0e0014cc, 0xaca3001c, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x03e00008,
+	0x27bd0020, 0x3c020800, 0x24424c3c, 0xaf82000c, 0x03e00008, 0x00000000,
+	0x27bdffe8, 0xafb00010, 0x27500100, 0xafbf0014, 0x8e02001c, 0x14400003,
+	0x3c020800, 0x0000000d, 0x3c020800, 0x8c430020, 0x10600020, 0x00001021,
+	0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+	0x8e02001c, 0xac820004, 0x8f830018, 0xac600008, 0x8f840018, 0x8e020018,
+	0xac82000c, 0x8f850018, 0x96020012, 0xaca20010, 0x8f830018, 0x3c026000,
+	0xac600014, 0x8f840018, 0x8c434448, 0x3c020800, 0xac830018, 0x944358ce,
+	0x8f840018, 0x3c024012, 0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001,
+	0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800,
+	0x97430078, 0x9444002e, 0x00001021, 0x00641821, 0x3063fffe, 0x03e00008,
+	0xa7630010, 0x27bdfff0, 0x00001021, 0x03e00008, 0x27bd0010, 0x8f420100,
+	0x34420001, 0xaf4200a4, 0x03e00008, 0x00001021, 0x27bdffe0, 0xafbf0018,
+	0xafb10014, 0xafb00010, 0x9362007e, 0x30d000ff, 0x16020031, 0x00808821,
+	0x8f620178, 0x1602002e, 0x00000000, 0x9362007f, 0x1602002b, 0x00000000,
+	0x9362007a, 0x16020004, 0x00000000, 0x0000000d, 0x00000000, 0x240009d2,
+	0x0e0013e6, 0x00000000, 0x3c039000, 0x34630001, 0x3c048000, 0x02231825,
+	0xa370007a, 0xaf430020, 0x8f420020, 0x00441024, 0x1440fffd, 0x00000000,
+	0x9362007d, 0x3c038000, 0xa362007d, 0x8f640074, 0x34630001, 0x02231825,
+	0xaf430020, 0x04810006, 0x3c038000, 0x02202021, 0x0e000470, 0x240509dd,
+	0x0a001138, 0x8fbf0018, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002,
+	0x3c031000, 0xaf5101c0, 0xa34201c4, 0xaf4301f8, 0x0a001138, 0x8fbf0018,
+	0x0000000d, 0x00000000, 0x240009e2, 0x8fbf0018, 0x8fb10014, 0x8fb00010,
+	0x03e00008, 0x27bd0020, 0x27bdffe8, 0x30a500ff, 0x3c029000, 0x34420001,
+	0x00803821, 0x00e21025, 0x3c038000, 0xafbf0010, 0xaf420020, 0x8f420020,
+	0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x00a21025,
+	0xa362007d, 0x8f640074, 0x34630001, 0x00e31825, 0xaf430020, 0x04810006,
+	0x3c038000, 0x00e02021, 0x0e000470, 0x00c02821, 0x0a001161, 0x8fbf0010,
+	0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4701c0,
+	0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800,
+	0x8c430020, 0x27bdffe8, 0xafb00010, 0x27500100, 0x10600024, 0xafbf0014,
+	0x0e00148e, 0x00000000, 0x8f830018, 0x8e020000, 0xac620000, 0x8f840018,
+	0x8e020004, 0xac820004, 0x8f830018, 0x8e020018, 0xac620008, 0x8f840018,
+	0x8e03001c, 0xac83000c, 0x9602000c, 0x9203000a, 0x8f840018, 0x00021400,
+	0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+	0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018,
+	0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014,
+	0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8,
+	0xafb00010, 0x27500100, 0x10600020, 0xafbf0014, 0x0e00148e, 0x00000000,
+	0x8f820018, 0xac400000, 0x8f830018, 0xac600004, 0x8f820018, 0xac400008,
+	0x8f830018, 0xac60000c, 0x9602000c, 0x9603000e, 0x8f840018, 0x00021400,
+	0x00431025, 0xac820010, 0x8f830018, 0x3c026000, 0xac600014, 0x8f840018,
+	0x8c434448, 0xac830018, 0x96020008, 0x3c030800, 0x946458ce, 0x8f850018,
+	0x00021400, 0x00441025, 0x24040001, 0x0e0014cc, 0xaca2001c, 0x8fbf0014,
+	0x8fb00010, 0x03e00008, 0x27bd0018, 0x27bdffe8, 0xafb00010, 0x27500100,
+	0xafbf0014, 0x9602000c, 0x10400024, 0x00802821, 0x3c020800, 0x8c430020,
+	0x1060003a, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f840018, 0x8e030000,
+	0xac830000, 0x9602000c, 0x8f840018, 0x00021400, 0xac820004, 0x8f830018,
+	0xac600008, 0x8f820018, 0xac40000c, 0x8f830018, 0xac600010, 0x8f820018,
+	0xac400014, 0x8f850018, 0x3c026000, 0x8c434448, 0x24040001, 0x3c020800,
+	0xaca30018, 0x944358ce, 0x8f850018, 0x3c02400b, 0x00621825, 0x0e0014cc,
+	0xaca3001c, 0x0a0011ff, 0x8fbf0014, 0x93620005, 0x30420010, 0x14400015,
+	0x3c029000, 0x34420001, 0x00a21025, 0xaf420020, 0x3c038000, 0x8f420020,
+	0x00431024, 0x1440fffd, 0x00000000, 0x3c038000, 0x93620005, 0x34630001,
+	0x00a02021, 0x00a31825, 0x24055852, 0x34420010, 0xa3620005, 0x0e000766,
+	0xaf430020, 0x0a0011ff, 0x8fbf0014, 0x0000000d, 0x8fbf0014, 0x8fb00010,
+	0x03e00008, 0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe8, 0xafb00010,
+	0x27500100, 0x10600022, 0xafbf0014, 0x0e00148e, 0x00000000, 0x8f840018,
+	0x8e020004, 0xac820000, 0x9603000c, 0x9762002c, 0x8f840018, 0x00031c00,
+	0x00431025, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+	0x8f830018, 0xac600010, 0x8f820018, 0xac400014, 0x8f850018, 0x3c026000,
+	0x8c434448, 0x24040001, 0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018,
+	0x3c02400e, 0x00621825, 0x0e0014cc, 0xaca3001c, 0x0e00122e, 0x8e040000,
+	0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x3c038000, 0x8f420278,
+	0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf440240, 0xa3420244,
+	0x03e00008, 0xaf430278, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014,
+	0x00808821, 0xafb20018, 0x00c09021, 0xafb00010, 0x30b0ffff, 0x1060001c,
+	0xafbf001c, 0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f840018,
+	0x00101400, 0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c,
+	0x8f830018, 0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000,
+	0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024019,
+	0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018,
+	0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0x27450100,
+	0xafbf0010, 0x94a3000c, 0x240200c1, 0x14620031, 0x00803021, 0x3c029000,
+	0x34420001, 0x00c21025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024,
+	0x1440fffd, 0x3c028000, 0x34420001, 0x3c049000, 0x34840001, 0x3c058000,
+	0x24030012, 0x00c21025, 0x00c42025, 0xa363003f, 0xaf420020, 0xaf440020,
+	0x8f420020, 0x00451024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000,
+	0x34420020, 0xa362007d, 0x8f640074, 0x34630001, 0x00c31825, 0xaf430020,
+	0x04810006, 0x3c038000, 0x00c02021, 0x0e000470, 0x24050906, 0x0a0012a1,
+	0x8fbf0010, 0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000,
+	0xaf4601c0, 0xa34201c4, 0xaf4301f8, 0x0a0012a1, 0x8fbf0010, 0x00c02021,
+	0x94a5000c, 0x24060001, 0x0e000fb1, 0x2407090e, 0x8fbf0010, 0x03e00008,
+	0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb00010, 0x00808021,
+	0xafb20018, 0x00a09021, 0xafb10014, 0x30d100ff, 0x1060001c, 0xafbf001c,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac500000, 0x8f840018, 0x24020001,
+	0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f820018, 0xac520014, 0x8f840018, 0x3c026000, 0x8c434448,
+	0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024010, 0x00621825,
+	0xac83001c, 0x0e0014cc, 0x02202021, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+	0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014, 0xafb00010,
+	0x93620005, 0x30420001, 0x10400036, 0x00808021, 0x3c029000, 0x34420001,
+	0x02021025, 0xaf420020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x93620023, 0x34420004, 0xa3620023, 0x93630005, 0x3c048000,
+	0x3c020800, 0x306300fe, 0xa3630005, 0x8c430020, 0x34840001, 0x02042025,
+	0xaf440020, 0x10600020, 0x8fbf0014, 0x0e00148e, 0x00000000, 0x8f820018,
+	0xac500000, 0x93630082, 0x9362003f, 0x8f840018, 0x00031a00, 0x00431025,
+	0xac820004, 0x8f830018, 0xac600008, 0x8f820018, 0xac40000c, 0x8f830018,
+	0xac600010, 0x8f820018, 0xac400014, 0x8f840018, 0x3c026000, 0x8c434448,
+	0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c02400a, 0x00621825,
+	0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf0014, 0x8fb00010, 0x03e00008,
+	0x27bd0018, 0x3c020800, 0x8c430020, 0x27bdffe0, 0xafb10014, 0x00808821,
+	0xafb20018, 0x00a09021, 0xafb00010, 0x30d000ff, 0x1060002f, 0xafbf001c,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac510000, 0x8f830018, 0xac700004,
+	0x8f820018, 0xac520008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+	0x9763006a, 0x00032880, 0x50a00001, 0x24050001, 0x97630068, 0x93640081,
+	0x3c020800, 0x8c46004c, 0x00652821, 0x00852804, 0x00c5102b, 0x54400001,
+	0x00a03021, 0x3c020800, 0x8c440050, 0x00c4182b, 0x54600001, 0x00c02021,
+	0x8f830018, 0x2402fffe, 0x00822824, 0x3c026000, 0xac650014, 0x8f840018,
+	0x8c434448, 0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c024011,
+	0x00621825, 0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018,
+	0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x27bdffe8, 0xafbf0014,
+	0xafb00010, 0x8f440100, 0x27500100, 0x8f650050, 0x0e0010fc, 0x9206001b,
+	0x3c020800, 0x8c430020, 0x1060001d, 0x8e100018, 0x0e00148e, 0x00000000,
+	0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f840018,
+	0x8f620050, 0xac820008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+	0x8f830018, 0x3c026000, 0xac600014, 0x8f850018, 0x8c434448, 0x24040001,
+	0x3c020800, 0xaca30018, 0x944358ce, 0x8f850018, 0x3c02401c, 0x00621825,
+	0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018,
+	0x8f430238, 0x3c020800, 0x04610013, 0x8c44009c, 0x2406fffe, 0x3c050800,
+	0x3c038000, 0x2484ffff, 0x14800009, 0x00000000, 0x97420078, 0x8ca3007c,
+	0x24420001, 0x00461024, 0x24630001, 0xa7620010, 0x03e00008, 0xaca3007c,
+	0x8f420238, 0x00431024, 0x1440fff3, 0x2484ffff, 0x8f420140, 0x3c031000,
+	0xaf420200, 0x03e00008, 0xaf430238, 0x27bdffe8, 0x3c029000, 0xafbf0010,
+	0x8f450140, 0x34420001, 0x3c038000, 0x00a21025, 0xaf420020, 0x8f420020,
+	0x00431024, 0x1440fffd, 0x00000000, 0x9362007d, 0x3c038000, 0x34420001,
+	0xa362007d, 0x8f640074, 0x34630001, 0x00a31825, 0xaf430020, 0x04810006,
+	0x3c038000, 0x00a02021, 0x0e000470, 0x24050ac7, 0x0a0013b9, 0x8fbf0010,
+	0x8f4201f8, 0x00431024, 0x1440fffd, 0x24020002, 0x3c031000, 0xaf4501c0,
+	0xa34201c4, 0xaf4301f8, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x0000000d,
+	0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x24020001,
+	0x03e00008, 0xa7620010, 0x9362003f, 0x304400ff, 0x3883000e, 0x2c630001,
+	0x38820010, 0x2c420001, 0x00621825, 0x14600003, 0x24020012, 0x14820003,
+	0x00000000, 0x03e00008, 0x00001021, 0x9363007e, 0x9362007a, 0x14620006,
+	0x00000000, 0x9363007e, 0x24020001, 0x24630001, 0x03e00008, 0xa363007e,
+	0x9362007e, 0x8f630178, 0x304200ff, 0x14430006, 0x00000000, 0x9363000b,
+	0x24020001, 0x24630001, 0x03e00008, 0xa363000b, 0x03e00008, 0x00001021,
+	0x9362000b, 0x10400023, 0x00001021, 0xa360000b, 0x9362003f, 0x304400ff,
+	0x3883000e, 0x2c630001, 0x38820010, 0x2c420001, 0x00621825, 0x14600017,
+	0x00001821, 0x24020012, 0x10820014, 0x00000000, 0x9363007e, 0x9362007a,
+	0x14620007, 0x00000000, 0x9362007e, 0x24030001, 0x24420001, 0xa362007e,
+	0x03e00008, 0x00601021, 0x9362007e, 0x8f630178, 0x304200ff, 0x14430005,
+	0x00001821, 0x9362000b, 0x24030001, 0x24420001, 0xa362000b, 0x03e00008,
+	0x00601021, 0x03e00008, 0x00000000, 0x24040001, 0xaf64000c, 0x8f6300dc,
+	0x8f6200cc, 0x50620001, 0xa7640010, 0xa7640012, 0xa7640014, 0x03e00008,
+	0xa7640016, 0x3c020800, 0x8c430020, 0x27bdffe8, 0x1060001b, 0xafbf0010,
+	0x0e00148e, 0x00000000, 0x8f820018, 0xac400000, 0x8f830018, 0xac600004,
+	0x8f820018, 0xac400008, 0x8f830018, 0xac60000c, 0x8f820018, 0xac400010,
+	0x8f830018, 0x3c026000, 0xac600014, 0x8f840018, 0x8c434448, 0x3c020800,
+	0xac830018, 0x944358ce, 0x8f840018, 0x3c024020, 0x00621825, 0xac83001c,
+	0x0e0014cc, 0x24040001, 0x8fbf0010, 0x03e00008, 0x27bd0018, 0x3c020800,
+	0x8c430020, 0x27bdffe0, 0xafb00010, 0x00a08021, 0xafb10014, 0x00c08821,
+	0xafb20018, 0x00e09021, 0x1060001e, 0xafbf001c, 0x0e00148e, 0x00000000,
+	0x8f840018, 0x8f420100, 0xac820000, 0x8f830018, 0xac700004, 0x8f820018,
+	0xac510008, 0x8f830018, 0xac72000c, 0x8f840018, 0x8fa20030, 0xac820010,
+	0x8f830018, 0x8fa20034, 0xac620014, 0x8f840018, 0x3c026000, 0x8c434448,
+	0x3c020800, 0xac830018, 0x944358ce, 0x8f840018, 0x3c0240c9, 0x00621825,
+	0xac83001c, 0x0e0014cc, 0x24040001, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
+	0x8fb00010, 0x03e00008, 0x27bd0020, 0x3c020800, 0x8c430020, 0x27bdffe8,
+	0xafb00010, 0x27500100, 0x1060001d, 0xafbf0014, 0x0e00148e, 0x00000000,
+	0x8f830018, 0x8e020004, 0xac620000, 0x8f840018, 0x8e020018, 0xac820004,
+	0x8f850018, 0x8e020000, 0xaca20008, 0x8f830018, 0xac60000c, 0x8f820018,
+	0xac400010, 0x8f830018, 0xac600014, 0x8f820018, 0xac400018, 0x96030008,
+	0x3c020800, 0x944458ce, 0x8f850018, 0x00031c00, 0x00641825, 0x24040001,
+	0x0e0014cc, 0xaca3001c, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018,
+	0x3c060800, 0x24c558c0, 0x3c02000a, 0x03421821, 0x94640006, 0x94a2000a,
+	0x00441023, 0x00021400, 0x00021c03, 0x04610006, 0xa4a40006, 0x0000000d,
+	0x00000000, 0x2400005a, 0x0a0014a3, 0x24020001, 0x8f820014, 0x0062102b,
+	0x14400002, 0x00001021, 0x24020001, 0x304200ff, 0x1040001c, 0x274a0400,
+	0x3c07000a, 0x3c020800, 0x244558c0, 0x94a9000a, 0x8f880014, 0x03471021,
+	0x94430006, 0x00402021, 0xa4a30006, 0x94820006, 0xa4a20006, 0x01221023,
+	0x00021400, 0x00021403, 0x04410006, 0x0048102b, 0x0000000d, 0x00000000,
+	0x2400005a, 0x0a0014be, 0x24020001, 0x14400002, 0x00001021, 0x24020001,
+	0x304200ff, 0x1440ffec, 0x03471021, 0x24c458c0, 0x8c820010, 0xaf420038,
+	0x8c830014, 0x3c020005, 0xaf43003c, 0xaf420030, 0xaf800010, 0xaf8a0018,
+	0x03e00008, 0x00000000, 0x27bdffe0, 0x8f820010, 0x8f850018, 0x3c070800,
+	0x24e858c0, 0xafbf001c, 0xafb20018, 0xafb10014, 0xafb00010, 0x9503000a,
+	0x8d060014, 0x00009021, 0x309000ff, 0x00e08821, 0x24420001, 0x24a50020,
+	0x24630001, 0xaf820010, 0xaf850018, 0xa503000a, 0x24c30020, 0x3c028000,
+	0x04c10007, 0xad030014, 0x00621024, 0x14400005, 0x262258c0, 0x8d020010,
+	0x24420001, 0xad020010, 0x262258c0, 0x9444000a, 0x94450018, 0x0010102b,
+	0x00a41826, 0x2c630001, 0x00621825, 0x1060001c, 0x3c030006, 0x8f820010,
+	0x24120001, 0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000,
+	0x00000000, 0x27450400, 0x8f420000, 0x30420010, 0x1040fffd, 0x262258c0,
+	0x9444000a, 0x94430018, 0xaf800010, 0xaf850018, 0x14830012, 0x262758c0,
+	0x0e00155a, 0x00000000, 0x1600000e, 0x262758c0, 0x0e00148e, 0x00000000,
+	0x0a001517, 0x262758c0, 0x00041c00, 0x00031c03, 0x00051400, 0x00021403,
+	0x00621823, 0x18600002, 0x3c026000, 0xac400808, 0x262758c0, 0x94e2000e,
+	0x94e3000c, 0x24420001, 0xa4e2000e, 0x3042ffff, 0x50430001, 0xa4e0000e,
+	0x12000005, 0x3c02000a, 0x94e2000a, 0xa74200a2, 0x0a001554, 0x02401021,
+	0x03421821, 0x94640006, 0x94e2000a, 0x00441023, 0x00021400, 0x00021c03,
+	0x04610006, 0xa4e40006, 0x0000000d, 0x00000000, 0x2400005a, 0x0a001536,
+	0x24020001, 0x8f820014, 0x0062102b, 0x14400002, 0x00001021, 0x24020001,
+	0x304200ff, 0x1040001b, 0x3c020800, 0x3c06000a, 0x244558c0, 0x94a8000a,
+	0x8f870014, 0x03461021, 0x94430006, 0x00402021, 0xa4a30006, 0x94820006,
+	0xa4a20006, 0x01021023, 0x00021400, 0x00021403, 0x04410006, 0x0047102b,
+	0x0000000d, 0x00000000, 0x2400005a, 0x0a001550, 0x24020001, 0x14400002,
+	0x00001021, 0x24020001, 0x304200ff, 0x1440ffec, 0x03461021, 0x02401021,
+	0x8fbf001c, 0x8fb20018, 0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020,
+	0x3c020800, 0x244558c0, 0x94a3001a, 0x8ca40024, 0x00403021, 0x000318c0,
+	0x00832021, 0xaf44003c, 0x8ca20020, 0xaf420038, 0x3c020050, 0x34420008,
+	0xaf420030, 0x00000000, 0x00000000, 0x00000000, 0x8f420000, 0x30420020,
+	0x1040fffd, 0x00000000, 0x8f430400, 0x24c658c0, 0xacc30010, 0x8f420404,
+	0x3c030020, 0xacc20014, 0xaf430030, 0x94c40018, 0x94c3001c, 0x94c2001a,
+	0x94c5001e, 0x00832021, 0x24420001, 0xa4c2001a, 0x3042ffff, 0x14450002,
+	0xa4c40018, 0xa4c0001a, 0x03e00008, 0x00000000, 0x8f820010, 0x3c030006,
+	0x00021140, 0x00431025, 0xaf420030, 0x00000000, 0x00000000, 0x00000000,
+	0x27430400, 0x8f420000, 0x30420010, 0x1040fffd, 0x00000000, 0xaf800010,
+	0xaf830018, 0x03e00008, 0x00000000, 0x27bdffe8, 0xafb00010, 0x3c100800,
+	0x261058c0, 0x3c05000a, 0x02002021, 0x03452821, 0xafbf0014, 0x0e0015b0,
+	0x2406000a, 0x96020002, 0x9603001e, 0x3042000f, 0x24420003, 0x00431804,
+	0x24027fff, 0x0043102b, 0xaf830014, 0x10400004, 0x00000000, 0x0000000d,
+	0x00000000, 0x24000043, 0x0e00155a, 0x00000000, 0x8fbf0014, 0x8fb00010,
+	0x03e00008, 0x27bd0018, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff,
+	0x24a50004, 0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000,
+	0x0a0015c1, 0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004,
+	0x00a01021, 0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c036000,
+	0x8c642b7c, 0x3c036010, 0x8c6553fc, 0x00041582, 0x00042302, 0x308403ff,
+	0x00052d82, 0x00441026, 0x0002102b, 0x0005282b, 0x00451025, 0x1440000d,
+	0x3c020050, 0x34420004, 0xaf400038, 0xaf40003c, 0xaf420030, 0x00000000,
+	0x00000000, 0x8f420000, 0x30420020, 0x1040fffd, 0x3c020020, 0xaf420030,
+	0x0000000d, 0x03e00008, 0x00000000, 0x3c020050, 0x34420004, 0xaf440038,
+	0xaf45003c, 0xaf420030, 0x00000000, 0x00000000, 0x8f420000, 0x30420020,
+	0x1040fffd, 0x3c020020, 0xaf420030, 0x03e00008, 0x00000000, 0x00000000};
+
+static u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_COM_b06FwRodata[(0x58/4) + 1] = {
+	0x08002428, 0x0800245c, 0x0800245c, 0x0800245c, 0x0800245c, 0x0800245c,
+	0x08002380, 0x0800245c, 0x080023e4, 0x0800245c, 0x0800231c, 0x0800245c,
+	0x0800245c, 0x0800245c, 0x08002328, 0x00000000, 0x08003240, 0x08003270,
+	0x080032a0, 0x080032d0, 0x08003300, 0x00000000, 0x00000000 };
+static u32 bnx2_COM_b06FwBss[(0x88/4) + 1] = { 0x0 };
+static u32 bnx2_COM_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
+
+static int bnx2_RXP_b06FwReleaseMajor = 0x1;
+static int bnx2_RXP_b06FwReleaseMinor = 0x0;
+static int bnx2_RXP_b06FwReleaseFix = 0x0;
+static u32 bnx2_RXP_b06FwStartAddr = 0x08003184;
+static u32 bnx2_RXP_b06FwTextAddr = 0x08000000;
+static int bnx2_RXP_b06FwTextLen = 0x588c;
+static u32 bnx2_RXP_b06FwDataAddr = 0x080058e0;
+static int bnx2_RXP_b06FwDataLen = 0x0;
+static u32 bnx2_RXP_b06FwRodataAddr = 0x08005890;
+static int bnx2_RXP_b06FwRodataLen = 0x28;
+static u32 bnx2_RXP_b06FwBssAddr = 0x08005900;
+static int bnx2_RXP_b06FwBssLen = 0x13a4;
+static u32 bnx2_RXP_b06FwSbssAddr = 0x080058e0;
+static int bnx2_RXP_b06FwSbssLen = 0x1c;
+static u32 bnx2_RXP_b06FwText[(0x588c/4) + 1] = {
+	0x0a000c61, 0x00000000, 0x00000000, 0x0000000d, 0x72787020, 0x322e362e,
+	0x31000000, 0x02060103, 0x00000000, 0x0000000d, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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+	0xa744018e, 0xa74501a6, 0xaf4801b8, 0x0a000f19, 0x00001021, 0x3c020001,
+	0x00c21024, 0x1040002f, 0x00000000, 0x9742010e, 0x3c038000, 0x3046ffff,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9784000a,
+	0x8f850004, 0x8f870014, 0x24020080, 0x24030002, 0xaf420180, 0x24020003,
+	0xa743018c, 0xa746018e, 0xa7420188, 0x30e28000, 0xa7440190, 0x1040000c,
+	0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000,
+	0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014,
+	0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff,
+	0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19,
+	0x00001021, 0x8f820014, 0x30434000, 0x10600016, 0x00404021, 0x3c020f00,
+	0x00c21024, 0x14400012, 0x00000000, 0x93420116, 0x34424000, 0x03421821,
+	0x94650002, 0x2ca21389, 0x1040000b, 0x3c020800, 0x24425900, 0x00051942,
+	0x00031880, 0x00621821, 0x30a5001f, 0x8c640000, 0x24020001, 0x00a21004,
+	0x00822024, 0x02048025, 0x12000030, 0x3c021000, 0x9742010e, 0x34e80002,
+	0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180,
+	0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000,
+	0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+	0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+	0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+	0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+	0xaf4201b8, 0x0a000f19, 0x00001021, 0x00c21024, 0x104000c0, 0x3c020800,
+	0x8c430030, 0x10600037, 0x31024000, 0x10400035, 0x3c030f00, 0x00c31824,
+	0x3c020100, 0x0043102b, 0x14400031, 0x3c030800, 0x9742010e, 0x34e80002,
+	0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020080,
+	0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000,
+	0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+	0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+	0x00e21024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+	0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+	0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800, 0x8c620024, 0x30420008,
+	0x10400035, 0x34ea0002, 0x3c020f00, 0x00c21024, 0x14400032, 0x8d620034,
+	0x31220200, 0x1040002f, 0x8d620034, 0x9742010e, 0x30e8fffb, 0x3c038000,
+	0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+	0xa342018b, 0x9784000a, 0x8f850004, 0x8f870014, 0x24020180, 0x24030002,
+	0xaf420180, 0xa743018c, 0xa746018e, 0xa7480188, 0x30e28000, 0xa7440190,
+	0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+	0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00e21024,
+	0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+	0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+	0x8d620034, 0x8f860008, 0x10400012, 0x30c20100, 0x10400010, 0x3c020f00,
+	0x00c21024, 0x3c030200, 0x1043000c, 0x3c020800, 0x8c430038, 0x8f840004,
+	0x3c020800, 0x2442003c, 0x2463ffff, 0x00832024, 0x00822021, 0x90830000,
+	0x24630004, 0x0a000de1, 0x000329c0, 0x00000000, 0x00061602, 0x3042000f,
+	0x000229c0, 0x3c04fc00, 0x00441021, 0x3c030300, 0x0062182b, 0x50600001,
+	0x24050800, 0x9742010e, 0x3148ffff, 0x3c038000, 0x24420004, 0x3046ffff,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+	0x8f840004, 0x8f870014, 0x24020002, 0xaf450180, 0xa742018c, 0xa746018e,
+	0xa7480188, 0x30e28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116,
+	0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004,
+	0x3c02ffff, 0x34427fff, 0x00e21024, 0xaf820014, 0x97820016, 0x9743010c,
+	0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+	0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x8f424000,
+	0x30420100, 0x104000d5, 0x3c020800, 0x8c440024, 0x24030001, 0x1483002f,
+	0x00405021, 0x9742010e, 0x34e70002, 0x3c038000, 0x24420004, 0x3045ffff,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+	0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c, 0xa745018e,
+	0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116,
+	0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004,
+	0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016, 0x9743010c,
+	0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6,
+	0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x30820001,
+	0x1040002e, 0x30eb0004, 0x9742010e, 0x30e9fffb, 0x3c038000, 0x24420004,
+	0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b,
+	0x9783000a, 0x8f840004, 0x8f860014, 0x24020002, 0xaf400180, 0xa742018c,
+	0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190, 0x1040000c, 0xaf4401a8,
+	0x93420116, 0x304200fc, 0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff,
+	0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024, 0xaf820014, 0x97820016,
+	0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825,
+	0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8, 0x3127ffff, 0x8d420024,
+	0x30420004, 0x10400030, 0x8d420024, 0x9742010e, 0x30e9fffb, 0x3c038000,
+	0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003,
+	0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020100, 0x24030002,
+	0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000, 0xa7440190,
+	0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+	0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x01021024,
+	0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+	0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+	0x3127ffff, 0x8d420024, 0x30420008, 0x1040002d, 0x00000000, 0x9742010e,
+	0x3c038000, 0x24420004, 0x3046ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x24020003, 0xa342018b, 0x9784000a, 0x8f850004, 0x8f880014, 0x24020180,
+	0x24030002, 0xaf420180, 0xa743018c, 0xa746018e, 0xa7470188, 0x31028000,
+	0xa7440190, 0x1040000c, 0xaf4501a8, 0x93420116, 0x304200fc, 0x005a1021,
+	0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff,
+	0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff,
+	0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000,
+	0xaf4201b8, 0x15600041, 0x00001021, 0x27440180, 0x3c038000, 0x8f4201b8,
+	0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008, 0xa083000b,
+	0xa4800010, 0x3c021000, 0xaf4201b8, 0x0a000f19, 0x00001021, 0x3c030800,
+	0x8c620024, 0x30420001, 0x1040002e, 0x00001021, 0x9742010e, 0x34e70002,
+	0x3c038000, 0x24420004, 0x3045ffff, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x24020003, 0xa342018b, 0x9783000a, 0x8f840004, 0x8f860014, 0x24020002,
+	0xaf400180, 0xa742018c, 0xa745018e, 0xa7470188, 0x30c28000, 0xa7430190,
+	0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc, 0x005a1021, 0x24424004,
+	0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff, 0x34427fff, 0x00c21024,
+	0xaf820014, 0x97820016, 0x9743010c, 0x8f440104, 0x3042bfff, 0x00031c00,
+	0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac, 0x3c021000, 0xaf4201b8,
+	0x00001021, 0x8fbf0014, 0x8fb00010, 0x03e00008, 0x27bd0018, 0x8f4b0070,
+	0x93420112, 0x8f840008, 0x00022882, 0x30820100, 0x14400003, 0x24a30003,
+	0x03e00008, 0x00001021, 0x30824000, 0x10400010, 0x27424000, 0x00031880,
+	0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021,
+	0x8c490000, 0x93430116, 0x27424000, 0x306300fc, 0x00431021, 0x8c4a0000,
+	0x0a000f45, 0x3c030800, 0x30822000, 0x1040ffea, 0x00031880, 0x27424000,
+	0x00431021, 0x8c470000, 0x24a30004, 0x00031880, 0x27424000, 0x00431021,
+	0x8c490000, 0x00005021, 0x3c030800, 0x24680100, 0x00071602, 0x00021080,
+	0x00481021, 0x8c460000, 0x00071b82, 0x306303fc, 0x01031821, 0x8c640400,
+	0x00071182, 0x304203fc, 0x01021021, 0x8c450800, 0x30e300ff, 0x00031880,
+	0x01031821, 0x00091602, 0x00021080, 0x01021021, 0x00c43026, 0x8c640c00,
+	0x8c431000, 0x00c53026, 0x00091382, 0x304203fc, 0x01021021, 0x8c451400,
+	0x312200ff, 0x00021080, 0x01021021, 0x00c43026, 0x00c33026, 0x00091982,
+	0x306303fc, 0x01031821, 0x8c641800, 0x8c431c00, 0x00c53026, 0x00c43026,
+	0x11400015, 0x00c33026, 0x000a1602, 0x00021080, 0x01021021, 0x8c432000,
+	0x000a1382, 0x304203fc, 0x01021021, 0x8c452400, 0x314200ff, 0x00021080,
+	0x01021021, 0x00c33026, 0x000a1982, 0x306303fc, 0x01031821, 0x8c642800,
+	0x8c432c00, 0x00c53026, 0x00c43026, 0x00c33026, 0x8f430070, 0x3c050800,
+	0x8ca43100, 0x2c820020, 0x10400008, 0x006b5823, 0x3c020800, 0x24423104,
+	0x00041880, 0x00621821, 0x24820001, 0xac6b0000, 0xaca23100, 0xaf860004,
+	0x03e00008, 0x24020001, 0x27bdffe8, 0xafbf0010, 0x8f460128, 0x8f840010,
+	0xaf460020, 0x8f450104, 0x8f420100, 0x24030800, 0xaf850008, 0xaf820014,
+	0xaf4301b8, 0x1080000a, 0x3c020800, 0x8c430034, 0x10600007, 0x30a22000,
+	0x10400005, 0x34a30100, 0x8f82000c, 0xaf830008, 0x24420001, 0xaf82000c,
+	0x3c020800, 0x8c4300c0, 0x10600006, 0x3c030800, 0x8c6200c4, 0x24040001,
+	0x24420001, 0x0a000fd5, 0xac6200c4, 0x8f820008, 0x3c030010, 0x00431024,
+	0x14400009, 0x3c02001f, 0x3c030800, 0x8c620020, 0x00002021, 0x24420001,
+	0x0e000c78, 0xac620020, 0x0a000fd5, 0x00402021, 0x3442ff00, 0x14c20009,
+	0x2403bfff, 0x3c030800, 0x8c620020, 0x24040001, 0x24420001, 0x0e000c78,
+	0xac620020, 0x0a000fd5, 0x00402021, 0x8f820014, 0x00431024, 0x14400006,
+	0x00000000, 0xaf400048, 0x0e0011a9, 0xaf400040, 0x0a000fd5, 0x00402021,
+	0x0e001563, 0x00000000, 0x00402021, 0x10800005, 0x3c024000, 0x8f430124,
+	0x3c026020, 0xac430014, 0x3c024000, 0xaf420138, 0x00000000, 0x8fbf0010,
+	0x03e00008, 0x27bd0018, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010,
+	0x8f420140, 0xaf420020, 0x8f430148, 0x3c027000, 0x00621824, 0x3c023000,
+	0x10620021, 0x0043102b, 0x14400006, 0x3c024000, 0x3c022000, 0x10620009,
+	0x3c024000, 0x0a001040, 0x00000000, 0x10620045, 0x3c025000, 0x10620047,
+	0x3c024000, 0x0a001040, 0x00000000, 0x27440180, 0x3c038000, 0x8f4201b8,
+	0x00431024, 0x1440fffd, 0x00000000, 0x8f420148, 0x24030002, 0xa083000b,
+	0x00021402, 0xa4820008, 0x8f430148, 0xa4830010, 0x8f420144, 0x3c031000,
+	0xac820024, 0xaf4301b8, 0x0a001040, 0x3c024000, 0x8f420148, 0x24030002,
+	0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003,
+	0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001027, 0x3c038000,
+	0x12020007, 0x00000000, 0x0a001034, 0x00000000, 0x0e00112c, 0x00000000,
+	0x0a001025, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000,
+	0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008,
+	0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8,
+	0x0a001040, 0x3c024000, 0x0000000d, 0x00000000, 0x240002bf, 0x0a001040,
+	0x3c024000, 0x0e001441, 0x00000000, 0x0a001040, 0x3c024000, 0x0e0015ea,
+	0x00000000, 0x3c024000, 0xaf420178, 0x00000000, 0x8fbf0018, 0x8fb10014,
+	0x8fb00010, 0x03e00008, 0x27bd0020, 0x24020800, 0x03e00008, 0xaf4201b8,
+	0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000,
+	0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000,
+	0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800,
+	0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001,
+	0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000,
+	0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c,
+	0x8e021980, 0x34420200, 0xae021980, 0x8f500000, 0x32020003, 0x1040fffd,
+	0x32020001, 0x10400004, 0x32020002, 0x0e000f92, 0x00000000, 0x32020002,
+	0x1040fff6, 0x00000000, 0x0e000fe0, 0x00000000, 0x0a001071, 0x00000000,
+	0x27bdffe8, 0x3c04600c, 0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000,
+	0x2403ff7f, 0x3c106000, 0x00431024, 0x3442380c, 0x24030003, 0xac825000,
+	0x3c020008, 0xaf430008, 0x8e040808, 0x0342d825, 0x8e020808, 0x3c030800,
+	0xac600020, 0x3084fff0, 0x2c840001, 0x3042fff0, 0x38420010, 0x2c420001,
+	0xaf840010, 0xaf820000, 0x0e00160c, 0x00000000, 0x0e001561, 0x00000000,
+	0x3c020400, 0x3442000c, 0x3c03ffff, 0x34630806, 0xae021948, 0xae03194c,
+	0x8e021980, 0x8fbf0014, 0x34420200, 0xae021980, 0x8fb00010, 0x03e00008,
+	0x27bd0018, 0x00804821, 0x30a5ffff, 0x30c6ffff, 0x30e7ffff, 0x3c038000,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020003, 0xa342018b, 0x9783000a,
+	0x8f840004, 0x8f880014, 0xaf490180, 0xa745018c, 0xa746018e, 0xa7470188,
+	0x31028000, 0xa7430190, 0x1040000c, 0xaf4401a8, 0x93420116, 0x304200fc,
+	0x005a1021, 0x24424004, 0x8c430000, 0x3063ffff, 0x14600004, 0x3c02ffff,
+	0x34427fff, 0x01021024, 0xaf820014, 0x97820016, 0x9743010c, 0x8f440104,
+	0x3042bfff, 0x00031c00, 0x3084ffff, 0x00641825, 0xa74201a6, 0xaf4301ac,
+	0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000, 0x27440180, 0x3c038000,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x24022000, 0x24030002, 0xa4820008,
+	0xa083000b, 0xa4800010, 0x3c021000, 0xaf4201b8, 0x03e00008, 0x00000000,
+	0x27440180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000,
+	0x8f420148, 0x24030002, 0xa083000b, 0x00021402, 0xa4820008, 0x8f430148,
+	0xa4830010, 0x8f420144, 0x3c031000, 0xac820024, 0x03e00008, 0xaf4301b8,
+	0x27bdffe0, 0xafbf0018, 0xafb10014, 0xafb00010, 0x8f420148, 0x24030002,
+	0x3044ffff, 0x00021402, 0x305000ff, 0x1203000c, 0x27510180, 0x2a020003,
+	0x10400005, 0x24020003, 0x0600001d, 0x36053000, 0x0a001117, 0x3c038000,
+	0x12020007, 0x00000000, 0x0a001124, 0x00000000, 0x0e00112c, 0x00000000,
+	0x0a001115, 0x00402021, 0x0e00113e, 0x00000000, 0x00402021, 0x36053000,
+	0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002, 0xa6250008,
+	0xa222000b, 0xa6240010, 0x8f420144, 0x3c031000, 0xae220024, 0xaf4301b8,
+	0x0a001128, 0x8fbf0018, 0x0000000d, 0x00000000, 0x240002bf, 0x8fbf0018,
+	0x8fb10014, 0x8fb00010, 0x03e00008, 0x27bd0020, 0x3084ffff, 0x2c821389,
+	0x1040000d, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880,
+	0x00a32821, 0x3086001f, 0x8ca40000, 0x24030001, 0x00c31804, 0x00832025,
+	0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x3084ffff, 0x2c821389,
+	0x1040000e, 0x00001021, 0x3c030800, 0x24635900, 0x00042942, 0x00052880,
+	0x00a32821, 0x3086001f, 0x24030001, 0x8ca40000, 0x00c31804, 0x00031827,
+	0x00832024, 0x03e00008, 0xaca40000, 0x03e00008, 0x24020091, 0x9482000c,
+	0x24870014, 0x00021302, 0x00021080, 0x00824021, 0x00e8182b, 0x1060004f,
+	0x00000000, 0x90e30000, 0x2c620009, 0x10400047, 0x3c020800, 0x24425890,
+	0x00031880, 0x00621821, 0x8c640000, 0x00800008, 0x00000000, 0x0a0011a4,
+	0x24e70001, 0x90e30001, 0x2402000a, 0x54620024, 0x01003821, 0x01071023,
+	0x2c42000a, 0x54400020, 0x01003821, 0x3c050800, 0x8ca26c98, 0x24e70002,
+	0x34420100, 0xaca26c98, 0x90e30000, 0x90e20001, 0x90e40002, 0x90e60003,
+	0x24e70004, 0x24a56c98, 0x00031e00, 0x00021400, 0x00621825, 0x00042200,
+	0x00641825, 0x00661825, 0xaca30004, 0x90e20000, 0x90e30001, 0x90e40002,
+	0x90e60003, 0x24e70004, 0x00021600, 0x00031c00, 0x00431025, 0x00042200,
+	0x00441025, 0x00461025, 0x0a0011a4, 0xaca20008, 0x90e30001, 0x24020004,
+	0x1062000e, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020003,
+	0x10620008, 0x00601021, 0x0a00119e, 0x01001021, 0x90e30001, 0x24020002,
+	0x14620003, 0x01001021, 0x00601021, 0x00e21021, 0x0a0011a4, 0x00403821,
+	0x90e20001, 0x0a0011a4, 0x00e23821, 0x01003821, 0x00e8102b, 0x5440ffb4,
+	0x90e30000, 0x03e00008, 0x24020001, 0x27bdff90, 0x3c030800, 0xafbf006c,
+	0xafbe0068, 0xafb70064, 0xafb60060, 0xafb5005c, 0xafb40058, 0xafb30054,
+	0xafb20050, 0xafb1004c, 0xafb00048, 0xac606c98, 0x93620023, 0x30420010,
+	0x1440027c, 0x24020001, 0x93420116, 0x93630005, 0x34424000, 0x30630001,
+	0x14600005, 0x0342b021, 0x0e0015e0, 0x00000000, 0x0a001436, 0x8fbf006c,
+	0x93420112, 0x8f430104, 0x3c040020, 0x34424000, 0x00641824, 0x10600012,
+	0x03422821, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x00000000, 0x8f420128, 0xaca20000, 0x8f640040, 0x24030008, 0x240240c1,
+	0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000, 0x0a0011f1, 0xa0a3000a,
+	0x8f420104, 0x3c030040, 0x00431024, 0x1040001d, 0x3c038000, 0x27450180,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000,
+	0x8f640040, 0x24030010, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a3000a,
+	0x24030008, 0xa0a2000b, 0x3c021000, 0xa4a30010, 0xa0a00012, 0xa0a00013,
+	0xaca00014, 0xaca00024, 0xaca00028, 0xaca0002c, 0xaca40018, 0x0e0015e0,
+	0xaf4201b8, 0x0a001436, 0x8fbf006c, 0x8f820000, 0x10400016, 0x00000000,
+	0x8f420104, 0x3c030001, 0x00431024, 0x10400011, 0x00000000, 0x8ca3000c,
+	0x8f620030, 0x1462022d, 0x24020001, 0x8ca30010, 0x8f62002c, 0x14620229,
+	0x24020001, 0x9763003a, 0x96c20000, 0x14430225, 0x24020001, 0x97630038,
+	0x96c20002, 0x14430221, 0x24020001, 0xaf400048, 0xaf400054, 0xaf400040,
+	0x8f740040, 0x8f650048, 0x00b43023, 0x04c10004, 0x00000000, 0x0000000d,
+	0x00000000, 0x240001af, 0x9742011a, 0x3052ffff, 0x12400004, 0x8ed30004,
+	0x02721021, 0x0a001228, 0x2451ffff, 0x02608821, 0x92d7000d, 0xa7a00020,
+	0xa3a0001a, 0xafa00028, 0x9362003f, 0x32e30004, 0x1060003a, 0x305000ff,
+	0x24040012, 0x16040006, 0x24020001, 0x3c040800, 0x8c830028, 0x24630001,
+	0x0a001328, 0xac830028, 0x8f620044, 0x16620010, 0x27a60010, 0x27450180,
+	0x3c038000, 0x2402001a, 0xa7a20020, 0x24020020, 0xafb40028, 0xa3b00022,
+	0xa3a40023, 0xa3a2001a, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000,
+	0x0a00130d, 0x00000000, 0x8f620044, 0x02621023, 0x0440001a, 0x02651023,
+	0x044100d9, 0x24020001, 0x3c020800, 0x8c4300d8, 0x10600004, 0x24020001,
+	0xa7a20020, 0x0a00125e, 0xafb40028, 0x2402001a, 0xa7a20020, 0x24020020,
+	0xafb40028, 0xa3b00022, 0xa3a40023, 0xa3a2001a, 0x27a60010, 0x27450180,
+	0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d,
+	0x00000000, 0x0a001328, 0x24020001, 0x0293f023, 0x1bc00016, 0x025e102a,
+	0x54400007, 0x32f700fe, 0x57d2000f, 0x027e9821, 0x32e20001, 0x5440000c,
+	0x027e9821, 0x32f700fe, 0x0240f021, 0x3c040800, 0x8c8300c8, 0x00009021,
+	0x24020001, 0xa7a20020, 0xafb40028, 0x24630001, 0x0a001282, 0xac8300c8,
+	0x025e1023, 0x0a001282, 0x3052ffff, 0x0000f021, 0x24a2ffff, 0x02221823,
+	0x1860001f, 0x0072102a, 0x54400019, 0x00a08821, 0x97a20020, 0x3c040800,
+	0x8c8300cc, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020, 0x02741026,
+	0x2c420001, 0xac8300cc, 0x2cc30001, 0x00431024, 0x1440000a, 0x02401821,
+	0x27a60010, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd,
+	0x00000000, 0x0a00130d, 0x00000000, 0x00a08821, 0x02431023, 0x3052ffff,
+	0x0a0012ae, 0x32f700f6, 0x02741023, 0x18400008, 0x97a20020, 0x3c040800,
+	0x8c8300d4, 0xafb30028, 0x34420400, 0x24630001, 0xa7a20020, 0xac8300d4,
+	0x32e20002, 0x1040001c, 0x32e20010, 0x8f620044, 0x1662000d, 0x27a60010,
+	0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000,
+	0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001, 0xa7a20020,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x0a00130d, 0x00000000,
+	0x54400003, 0x8ed50008, 0x0a001328, 0x24020001, 0x8f630054, 0x26a2ffff,
+	0x00431023, 0x18400011, 0x27a60010, 0x97a20020, 0x3c040800, 0x8c8300d0,
+	0x27450180, 0x3c078000, 0xafb40028, 0x34420001, 0x24630001, 0xa7a20020,
+	0xac8300d0, 0x8f4201b8, 0x00471024, 0x1440fffd, 0x00000000, 0x0a00130d,
+	0x00000000, 0x32e20020, 0x10400011, 0x00000000, 0x96c20012, 0x0052102b,
+	0x10400008, 0x97a20020, 0x96d20012, 0x12400003, 0x02721021, 0x0a0012f2,
+	0x2451ffff, 0x02608821, 0x97a20020, 0x93a3001a, 0x34420008, 0x34630004,
+	0xa7a20020, 0xa3a3001a, 0x8f420104, 0x3c030080, 0x00431024, 0x10400037,
+	0x3a03000a, 0x0e001151, 0x02c02021, 0x24030002, 0x1443002b, 0x3c030800,
+	0x27a60010, 0x97a20020, 0x27450180, 0x3c038000, 0xafb40028, 0x34420001,
+	0xa7a20020, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128,
+	0xaca20000, 0x8cc30018, 0x240240c1, 0xa4a20008, 0xaca30018, 0x90c4000a,
+	0x24020002, 0xa0a2000b, 0xa0a4000a, 0x94c20010, 0xa4a20010, 0x90c30012,
+	0xa0a30012, 0x90c20013, 0xa0a20013, 0x8cc30014, 0xaca30014, 0x8cc20024,
+	0xaca20024, 0x8cc30028, 0xaca30028, 0x8cc4002c, 0x24020001, 0x3c031000,
+	0xaca4002c, 0xaf4301b8, 0xaf400044, 0xaf400050, 0x0a001436, 0x8fbf006c,
+	0x8c626c98, 0x30420100, 0x10400003, 0x24636c98, 0x8c620004, 0xaf62017c,
+	0x3a03000a, 0x2c630001, 0x3a02000c, 0x2c420001, 0x00621825, 0x14600003,
+	0x2402000e, 0x56020030, 0x00009021, 0x52400008, 0x96c4000e, 0x12400004,
+	0xa7b20040, 0x02721021, 0x0a001343, 0x2451ffff, 0x02608821, 0x96c4000e,
+	0x93630035, 0x8f62004c, 0x00642004, 0x00952021, 0x00821023, 0x18400015,
+	0x00000000, 0x8f620018, 0x02621023, 0x1c400015, 0x97a20020, 0x8f620018,
+	0x1662001c, 0x00000000, 0x8f62001c, 0x02a21023, 0x1c40000e, 0x97a20020,
+	0x8f62001c, 0x16a20015, 0x00000000, 0x8f620058, 0x00821023, 0x18400011,
+	0x97a20020, 0x0a001364, 0xafb10028, 0x8f620058, 0x00821023, 0x0441000b,
+	0x97a20020, 0xafb10028, 0xafb30034, 0xafb50038, 0xafa4003c, 0x34420020,
+	0x0a00136d, 0xa7a20020, 0x02809821, 0x02608821, 0x8f640058, 0x8f62004c,
+	0x02a21023, 0x18400009, 0x00000000, 0x8f620054, 0x02a21023, 0x1c400005,
+	0x97a20020, 0xafb10028, 0xafb50024, 0x0a001385, 0x34420040, 0x9742011a,
+	0x1440000c, 0x24020014, 0x8f620058, 0x14820009, 0x24020014, 0x8f63004c,
+	0x8f620054, 0x10620004, 0x97a20020, 0xafb10028, 0x34420080, 0xa7a20020,
+	0x24020014, 0x1202000a, 0x2a020015, 0x10400005, 0x2402000c, 0x12020006,
+	0x32e20001, 0x0a0013c6, 0x00000000, 0x24020016, 0x16020035, 0x32e20001,
+	0x8f620084, 0x24420001, 0x16a20031, 0x32e20001, 0x24020014, 0x12020021,
+	0x2a020015, 0x10400005, 0x2402000c, 0x12020008, 0x32e20001, 0x0a0013c6,
+	0x00000000, 0x24020016, 0x1202000c, 0x32e20001, 0x0a0013c6, 0x00000000,
+	0x97a30020, 0x2402000e, 0xafb10028, 0xa3b00022, 0xa3a20023, 0xafb50024,
+	0x34630054, 0x0a0013c5, 0xa7a30020, 0x97a20020, 0x93a4001a, 0x24030010,
+	0xafb10028, 0xa3b00022, 0xa3a30023, 0xafb50024, 0x3442005d, 0x34840002,
+	0xa7a20020, 0x0a0013c5, 0xa3a4001a, 0x97a20020, 0x24030012, 0xa3a30023,
+	0x93a3001a, 0xafb10028, 0xa3b00022, 0xafb50024, 0x3042fffe, 0x3442005c,
+	0x34630002, 0xa7a20020, 0xa3a3001a, 0x32e20001, 0x10400030, 0x2402000c,
+	0x12020013, 0x2a02000d, 0x10400005, 0x2402000a, 0x12020008, 0x97a20020,
+	0x0a0013f8, 0x32e20009, 0x2402000e, 0x1202001b, 0x32e20009, 0x0a0013f9,
+	0x0002102b, 0x93a4001a, 0x24030008, 0xafb10028, 0xa3b00022, 0xa3a30023,
+	0x0a0013f4, 0x34420013, 0x97a30020, 0x30620004, 0x14400005, 0x93a2001a,
+	0x3463001b, 0xa7a30020, 0x0a0013e7, 0x24030016, 0x3463001b, 0xa7a30020,
+	0x24030010, 0xafb10028, 0xa3b00022, 0xa3a30023, 0x34420002, 0x0a0013f7,
+	0xa3a2001a, 0x97a20020, 0x93a4001a, 0x24030010, 0xafb10028, 0xa3b00022,
+	0xa3a30023, 0x3442001b, 0x34840002, 0xa7a20020, 0xa3a4001a, 0x32e20009,
+	0x0002102b, 0x00021023, 0x30420007, 0x12400015, 0x34450003, 0x8f820018,
+	0x24030800, 0x27440180, 0x24420001, 0xaf820018, 0x24020004, 0xaf4301b8,
+	0xa4850008, 0xa082000b, 0x93430120, 0x00003021, 0x3c021000, 0xa492000e,
+	0xac950024, 0xac930028, 0x007e1821, 0xa483000c, 0xaf4201b8, 0x0a001413,
+	0x97a20020, 0x24060001, 0x97a20020, 0x10400020, 0x27450180, 0x3c038000,
+	0x8f4201b8, 0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000,
+	0x8fa30028, 0x240240c1, 0xa4a20008, 0xaca30018, 0x93a4001a, 0x24020002,
+	0xa0a2000b, 0xa0a4000a, 0x97a20020, 0xa4a20010, 0x93a30022, 0xa0a30012,
+	0x93a20023, 0xa0a20013, 0x8fa30024, 0xaca30014, 0x8fa20034, 0xaca20024,
+	0x8fa30038, 0xaca30028, 0x8fa2003c, 0x3c031000, 0xaca2002c, 0xaf4301b8,
+	0x00c01021, 0x8fbf006c, 0x8fbe0068, 0x8fb70064, 0x8fb60060, 0x8fb5005c,
+	0x8fb40058, 0x8fb30054, 0x8fb20050, 0x8fb1004c, 0x8fb00048, 0x03e00008,
+	0x27bd0070, 0x8f470140, 0x8f460148, 0x3c028000, 0x00c24024, 0x00062c02,
+	0x30a300ff, 0x24020019, 0x106200e7, 0x27440180, 0x2862001a, 0x1040001f,
+	0x24020008, 0x106200be, 0x28620009, 0x1040000d, 0x24020001, 0x10620046,
+	0x28620002, 0x50400005, 0x24020006, 0x1060002e, 0x00a01821, 0x0a00155e,
+	0x00000000, 0x1062005b, 0x00a01821, 0x0a00155e, 0x00000000, 0x2402000b,
+	0x10620084, 0x2862000c, 0x10400005, 0x24020009, 0x106200bc, 0x00061c02,
+	0x0a00155e, 0x00000000, 0x2402000e, 0x106200b7, 0x00061c02, 0x0a00155e,
+	0x00000000, 0x28620021, 0x10400009, 0x2862001f, 0x104000c1, 0x2402001b,
+	0x106200bf, 0x2402001c, 0x1062009a, 0x00061c02, 0x0a00155e, 0x00000000,
+	0x240200c2, 0x106200ca, 0x286200c3, 0x10400005, 0x24020080, 0x1062005a,
+	0x00a01821, 0x0a00155e, 0x00000000, 0x240200c9, 0x106200cd, 0x30c5ffff,
+	0x0a00155e, 0x00000000, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd,
+	0x24020001, 0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a,
+	0xa083000b, 0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024,
+	0x3c036000, 0xaf4201b8, 0x03e00008, 0xac600808, 0x11000009, 0x00a01821,
+	0x3c020800, 0x24030002, 0xa0436c88, 0x24426c88, 0xac470008, 0x8f430144,
+	0x03e00008, 0xac430004, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd,
+	0x24020002, 0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b,
+	0xa4860010, 0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x3c026000,
+	0xaf4301b8, 0x03e00008, 0xac400808, 0x3c080800, 0x3c058000, 0x8f4201b8,
+	0x00451024, 0x1440fffd, 0x00000000, 0xac870000, 0x91026c88, 0x00002821,
+	0x10400002, 0x25076c88, 0x8ce50008, 0xac850004, 0xa4830008, 0x91036c88,
+	0x24020002, 0xa082000b, 0xa4860010, 0x34630001, 0xa083000a, 0x8f420144,
+	0xac820024, 0x91036c88, 0x10600002, 0x00001021, 0x8ce20004, 0xac820028,
+	0x3c021000, 0xaf4201b8, 0x3c026000, 0xa1006c88, 0x03e00008, 0xac400808,
+	0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002, 0xa082000b,
+	0xa4830008, 0xa4860010, 0x8f420144, 0x3c031000, 0xa4820012, 0x03e00008,
+	0xaf4301b8, 0x30c2ffff, 0x14400028, 0x00061c02, 0x93620005, 0x30420004,
+	0x14400020, 0x3c029000, 0x34420001, 0x00e21025, 0xaf420020, 0x3c038000,
+	0x8f420020, 0x00431024, 0x1440fffd, 0x00000000, 0x93620005, 0x3c038000,
+	0x34630001, 0x00e31825, 0x34420004, 0xa3620005, 0xaf430020, 0x93620005,
+	0x30420004, 0x14400003, 0x3c038000, 0x0000000d, 0x3c038000, 0x8f4201b8,
+	0x00431024, 0x1440fffd, 0x24020005, 0x3c031000, 0xac870000, 0xa082000b,
+	0xaf4301b8, 0x0a00150d, 0x00061c02, 0x0000000d, 0x03e00008, 0x00000000,
+	0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001,
+	0xa4830008, 0x24030002, 0xac870000, 0xac800004, 0xa082000a, 0xa083000b,
+	0xa4860010, 0x8f430144, 0x3c021000, 0xac800028, 0xac830024, 0x03e00008,
+	0xaf4201b8, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002,
+	0xac800000, 0xac870004, 0xa4830008, 0xa082000a, 0xa082000b, 0xa4860010,
+	0xac800024, 0x8f420144, 0x3c031000, 0xac820028, 0x03e00008, 0xaf4301b8,
+	0x00061c02, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020001,
+	0xa4830008, 0x24030002, 0xa082000a, 0x3c021000, 0xac870000, 0xac800004,
+	0xa083000b, 0xa4860010, 0xac800024, 0xac800028, 0x03e00008, 0xaf4201b8,
+	0x00a01821, 0x3c058000, 0x8f4201b8, 0x00451024, 0x1440fffd, 0x24020002,
+	0xac870000, 0xac800004, 0xa4830008, 0xa080000a, 0x0a001518, 0xa082000b,
+	0x8f440144, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002,
+	0x240340c9, 0xaf470180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4401a4,
+	0xaf4501a8, 0xaf4001ac, 0x03e00008, 0xaf4201b8, 0x0000000d, 0x03e00008,
+	0x00000000, 0x03e00008, 0x00000000, 0x8f420100, 0x3042003e, 0x14400011,
+	0x24020001, 0xaf400048, 0x8f420100, 0x304207c0, 0x10400005, 0x00000000,
+	0xaf40004c, 0xaf400050, 0x03e00008, 0x24020001, 0xaf400054, 0xaf400040,
+	0x8f420100, 0x30423800, 0x54400001, 0xaf400044, 0x24020001, 0x03e00008,
+	0x00000000, 0x3c038000, 0x8f4201b8, 0x00431024, 0x1440fffd, 0x24020002,
+	0x240340c9, 0xaf440180, 0xa342018b, 0x3c021000, 0xa7430188, 0xaf4501a4,
+	0xaf4601a8, 0xaf4701ac, 0x03e00008, 0xaf4201b8, 0x3c029000, 0x34420001,
+	0x00822025, 0xaf440020, 0x3c038000, 0x8f420020, 0x00431024, 0x1440fffd,
+	0x00000000, 0x03e00008, 0x00000000, 0x3c028000, 0x34420001, 0x00822025,
+	0x03e00008, 0xaf440020, 0x308600ff, 0x27450180, 0x3c038000, 0x8f4201b8,
+	0x00431024, 0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8f640040,
+	0x24030008, 0x240240c1, 0xa4a20008, 0x24020002, 0xa0a2000b, 0x3c021000,
+	0xa0a6000a, 0xa4a30010, 0xa0a00012, 0xa0a00013, 0xaca00014, 0xaca00024,
+	0xaca00028, 0xaca0002c, 0xaca40018, 0x03e00008, 0xaf4201b8, 0x24020001,
+	0xacc40000, 0x03e00008, 0xa4e50000, 0x24020001, 0xaf400044, 0x03e00008,
+	0xaf400050, 0x00803021, 0x27450180, 0x3c038000, 0x8f4201b8, 0x00431024,
+	0x1440fffd, 0x00000000, 0x8f420128, 0xaca20000, 0x8cc30018, 0x240240c1,
+	0xa4a20008, 0xaca30018, 0x90c4000a, 0x24020002, 0xa0a2000b, 0xa0a4000a,
+	0x94c20010, 0xa4a20010, 0x90c30012, 0xa0a30012, 0x90c20013, 0xa0a20013,
+	0x8cc30014, 0xaca30014, 0x8cc20024, 0xaca20024, 0x8cc30028, 0xaca30028,
+	0x8cc2002c, 0x3c031000, 0xaca2002c, 0x24020001, 0xaf4301b8, 0xaf400044,
+	0x03e00008, 0xaf400050, 0x27bdffe8, 0xafbf0010, 0x0e001047, 0x00000000,
+	0x00002021, 0x0e000c78, 0xaf400180, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+	0x8f460148, 0x27450180, 0x3c038000, 0x00061402, 0x304700ff, 0x8f4201b8,
+	0x00431024, 0x1440fffd, 0x00000000, 0x8f440140, 0x00061202, 0x304200ff,
+	0x00061c02, 0xaca20004, 0x24020002, 0xa4a30008, 0x30c300ff, 0xa0a2000b,
+	0xaca30024, 0x10e0000a, 0xaca40000, 0x28e20004, 0x14400005, 0x24020001,
+	0x24020005, 0x54e20005, 0xa0a0000a, 0x24020001, 0x0a001609, 0xa0a2000a,
+	0xa0a0000a, 0x3c021000, 0x03e00008, 0xaf4201b8, 0x03e00008, 0x00001021,
+	0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000,
+	0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00161f, 0x00a01021,
+	0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa,
+	0x24a5ffff, 0x03e00008, 0x00000000, 0x00000000 }; 
+
+static u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_RXP_b06FwRodata[(0x28/4) + 1] = {
+	0x0800468c, 0x0800458c, 0x08004630, 0x08004648, 0x08004660, 0x08004680,
+	0x0800468c, 0x0800468c, 0x08004594, 0x00000000, 0x00000000 };
+static u32 bnx2_RXP_b06FwBss[(0x13a4/4) + 1] = { 0x0 };
+static u32 bnx2_RXP_b06FwSbss[(0x1c/4) + 1] = { 0x0 };
+
+static u32 bnx2_rv2p_proc1[] = {
+	0x00000008, 0xac000001, 0x0000000c, 0x2f800001, 0x00000010, 0x213f0004,
+	0x00000010, 0x20bf002c, 0x00000010, 0x203f0143, 0x00000018, 0x8000fffd,
+	0x00000010, 0xb1b8b017, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000,
+	0x00000000, 0x2c380000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+	0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x00000008, 0x02000002,
+	0x00000010, 0x91de0000, 0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08,
+	0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000008, 0x2d800150,
+	0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000010, 0x2c620002,
+	0x00000018, 0x80000012, 0x0000000b, 0x2fdf0002, 0x0000000c, 0x1f800002,
+	0x00000000, 0x2c070000, 0x00000018, 0x8000ffe6, 0x00000008, 0x02000002,
+	0x0000000f, 0x42e0001c, 0x00000010, 0x91840a08, 0x00000008, 0x2c8000b0,
+	0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+	0x00000000, 0x00000000, 0x00000010, 0x91de0000, 0x00000018, 0x80000004,
+	0x0000000c, 0x1f800002, 0x00000000, 0x00000000, 0x00000018, 0x8000ffd9,
+	0x0000000c, 0x29800002, 0x0000000c, 0x1f800002, 0x00000000, 0x2adf0000,
+	0x00000008, 0x2a000005, 0x00000018, 0x8000ffd4, 0x00000008, 0x02240030,
+	0x00000018, 0x00040000, 0x00000018, 0x80000015, 0x00000018, 0x80000017,
+	0x00000018, 0x8000001b, 0x00000018, 0x8000004c, 0x00000018, 0x8000008c,
+	0x00000018, 0x8000000f, 0x00000018, 0x8000000e, 0x00000018, 0x8000000d,
+	0x00000018, 0x8000000c, 0x00000018, 0x800000c2, 0x00000018, 0x8000000a,
+	0x00000018, 0x80000009, 0x00000018, 0x80000008, 0x00000018, 0x800000fd,
+	0x00000018, 0x80000006, 0x00000018, 0x80000005, 0x00000018, 0x800000ff,
+	0x00000018, 0x80000104, 0x00000018, 0x80000002, 0x00000018, 0x80000098,
+	0x00000018, 0x80000000, 0x0000000c, 0x1f800001, 0x00000000, 0x00000000,
+	0x00000018, 0x8000ffba, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001,
+	0x0000000c, 0x1f800001, 0x00000008, 0x2a000002, 0x00000018, 0x8000ffb5,
+	0x00000010, 0xb1a0b012, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000,
+	0x00000008, 0x2c800000, 0x00000008, 0x2d000000, 0x00000010, 0x91d40000,
+	0x00000008, 0x2d80011c, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+	0x0000000f, 0x47600008, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000,
+	0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+	0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000018, 0x80000013,
+	0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002, 0x00000008, 0x2c800000,
+	0x00000008, 0x2d000000, 0x00000010, 0x91d40000, 0x00000008, 0x2d80011c,
+	0x0000000f, 0x060e0001, 0x00000010, 0x001f0000, 0x00000000, 0x0f580000,
+	0x00000010, 0x91de0000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+	0x00000000, 0x0b660000, 0x00000000, 0x0d610000, 0x00000000, 0x02620000,
+	0x0000000b, 0x2fdf0002, 0x00000000, 0x309a0000, 0x00000000, 0x31040000,
+	0x00000000, 0x0c961800, 0x00000009, 0x0c99ffff, 0x00000004, 0xcc993400,
+	0x00000010, 0xb1963202, 0x00000008, 0x0f800000, 0x0000000c, 0x29800001,
+	0x00000010, 0x00220002, 0x0000000c, 0x29520001, 0x0000000c, 0x29520000,
+	0x00000008, 0x22000001, 0x0000000c, 0x1f800001, 0x00000000, 0x2adf0000,
+	0x00000008, 0x2a000003, 0x00000018, 0x8000ff83, 0x00000010, 0xb1a0b01d,
+	0x0000000b, 0x2fdf0002, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0,
+	0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150,
+	0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000,
+	0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000000, 0x00000000,
+	0x00000010, 0x91de0000, 0x0000000f, 0x47600008, 0x00000000, 0x060e0000,
+	0x00000010, 0x001f0000, 0x00000000, 0x0f580000, 0x00000010, 0x91de0000,
+	0x00000000, 0x0a640000, 0x00000000, 0x0ae50000, 0x00000000, 0x0b670000,
+	0x00000000, 0x0d620000, 0x00000000, 0x0ce71800, 0x00000009, 0x0c99ffff,
+	0x00000004, 0xcc993400, 0x00000010, 0xb1963220, 0x00000008, 0x0f800000,
+	0x00000018, 0x8000001e, 0x0000000f, 0x47600008, 0x0000000b, 0x2fdf0002,
+	0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008, 0x00000010, 0x91d40000,
+	0x00000008, 0x2d80012c, 0x0000000f, 0x060e0001, 0x00000010, 0x001f0000,
+	0x00000000, 0x0f580000, 0x00000010, 0x91de0000, 0x00000000, 0x0a640000,
+	0x00000000, 0x0ae50000, 0x00000000, 0x0b670000, 0x00000000, 0x0d620000,
+	0x00000000, 0x02630000, 0x0000000f, 0x47620010, 0x00000000, 0x0ce71800,
+	0x0000000b, 0x2fdf0002, 0x00000000, 0x311a0000, 0x00000000, 0x31840000,
+	0x0000000b, 0xc20000ff, 0x00000002, 0x42040000, 0x00000001, 0x31620800,
+	0x0000000f, 0x020e0010, 0x00000002, 0x31620800, 0x00000009, 0x0c99ffff,
+	0x00000004, 0xcc993400, 0x00000010, 0xb1963202, 0x00000008, 0x0f800000,
+	0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x0000000c, 0x61420006,
+	0x00000008, 0x22000008, 0x00000000, 0x2adf0000, 0x00000008, 0x2a000004,
+	0x00000018, 0x8000ff42, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+	0x00000010, 0x91a0b008, 0x00000010, 0x91d40000, 0x0000000c, 0x31620018,
+	0x00000008, 0x2d800001, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+	0x00000008, 0xac000001, 0x00000018, 0x8000000e, 0x00000000, 0x0380b000,
+	0x0000000b, 0x2fdf0002, 0x00000000, 0x2c004000, 0x00000010, 0x91d40000,
+	0x00000008, 0x2d800101, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+	0x0000000c, 0x31620018, 0x00000008, 0x2d800001, 0x00000000, 0x00000000,
+	0x00000010, 0x91de0000, 0x0000000b, 0x2fdf0002, 0x00000000, 0x2c000e00,
+	0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000008, 0x2a000007,
+	0x00000018, 0x8000ff27, 0x00000010, 0xb1a0b016, 0x0000000b, 0x2fdf0002,
+	0x00000000, 0x03d80000, 0x00000000, 0x2c200000, 0x00000008, 0x2c8000b0,
+	0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800150,
+	0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800000,
+	0x00000008, 0x2d000000, 0x00000008, 0x2d800108, 0x00000008, 0x07000001,
+	0x00000010, 0xb5de1c00, 0x00000010, 0x2c620002, 0x00000018, 0x8000000a,
+	0x0000000b, 0x2fdf0002, 0x00000000, 0x2c070000, 0x0000000c, 0x1f800001,
+	0x00000010, 0x91de0000, 0x00000018, 0x8000ff11, 0x00000008, 0x2c8000b0,
+	0x00000008, 0x2d000008, 0x00000010, 0x91d40000, 0x00000008, 0x2d800108,
+	0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000010, 0x91de0000,
+	0x00000000, 0x2adf0000, 0x00000008, 0x2a00000a, 0x00000018, 0x8000ff07,
+	0x00000000, 0x82265600, 0x0000000f, 0x47220008, 0x00000009, 0x070e000f,
+	0x00000008, 0x070e0008, 0x00000008, 0x02800001, 0x00000007, 0x02851c00,
+	0x00000008, 0x82850001, 0x00000000, 0x02840a00, 0x00000007, 0x42851c00,
+	0x00000003, 0xc3aa5200, 0x00000000, 0x03b10e00, 0x00000010, 0x001f0000,
+	0x0000000f, 0x0f280007, 0x00000007, 0x4b071c00, 0x00000000, 0x00000000,
+	0x0000000f, 0x0a960003, 0x00000000, 0x0a955c00, 0x00000000, 0x4a005a00,
+	0x00000000, 0x0c960a00, 0x00000009, 0x0c99ffff, 0x00000008, 0x0d00ffff,
+	0x00000010, 0xb1963202, 0x00000008, 0x0f800005, 0x00000010, 0x00220020,
+	0x00000000, 0x02a70000, 0x00000010, 0xb1850002, 0x00000008, 0x82850200,
+	0x00000000, 0x02000000, 0x00000000, 0x03a60000, 0x00000018, 0x8000004e,
+	0x00000000, 0x072b0000, 0x00000001, 0x878c1c00, 0x00000000, 0x870e1e00,
+	0x00000000, 0x860c1e00, 0x00000000, 0x03061e00, 0x00000010, 0xb18e0003,
+	0x00000018, 0x80000047, 0x00000018, 0x8000fffa, 0x00000010, 0x918c0003,
+	0x00000010, 0xb1870002, 0x00000018, 0x80000043, 0x00000010, 0x91d40000,
+	0x0000000c, 0x29800001, 0x00000000, 0x2a860000, 0x00000000, 0x230c0000,
+	0x00000000, 0x2b070000, 0x00000010, 0xb187000e, 0x00000008, 0x2a000008,
+	0x00000018, 0x8000003b, 0x00000010, 0x91d40000, 0x00000000, 0x28d18c00,
+	0x00000000, 0x2a860000, 0x00000000, 0x230c0000, 0x00000000, 0x2b070000,
+	0x00000018, 0x8000fff8, 0x00000010, 0x91d40000, 0x0000000c, 0x29800001,
+	0x00000000, 0x2aab0000, 0x00000000, 0xa3265600, 0x00000000, 0x2b000000,
+	0x0000000c, 0x1f800001, 0x00000008, 0x2a000008, 0x00000018, 0x8000fec8,
+	0x00000010, 0x91d40000, 0x0000000c, 0x29800001, 0x0000000c, 0x1f800001,
+	0x00000008, 0x2a000009, 0x00000018, 0x8000fec3, 0x00000010, 0x91d40000,
+	0x0000000c, 0x29800001, 0x0000000c, 0x1f800001, 0x00000000, 0x29420000,
+	0x00000008, 0x2a000002, 0x00000018, 0x8000febd, 0x00000018, 0x8000febc,
+	0x00000010, 0xb1bcb016, 0x0000000b, 0x2fdf0002, 0x00000000, 0x03d80000,
+	0x00000000, 0x2c3c0000, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+	0x00000010, 0x91d40000, 0x00000008, 0x2d800150, 0x00000000, 0x00000000,
+	0x00000010, 0x205f0000, 0x00000008, 0x2c800000, 0x00000008, 0x2d000000,
+	0x00000008, 0x2d800108, 0x00000008, 0x07000001, 0x00000010, 0xb5de1c00,
+	0x00000010, 0x2c620002, 0x00000018, 0x8000000a, 0x0000000b, 0x2fdf0002,
+	0x00000000, 0x2c070000, 0x0000000c, 0x1f800000, 0x00000010, 0x91de0000,
+	0x00000018, 0x8000fea6, 0x00000008, 0x2c8000b0, 0x00000008, 0x2d000008,
+	0x00000010, 0x91d40000, 0x00000008, 0x2d800108, 0x0000000c, 0x29800000,
+	0x0000000c, 0x1f800000, 0x00000010, 0x91de0000, 0x00000000, 0x2adf0000,
+	0x00000008, 0x2a000006, 0x00000018, 0x8000fe9c, 0x00000008, 0x03050004,
+	0x00000006, 0x83040c00, 0x00000008, 0x02850200, 0x00000000, 0x86050c00,
+	0x00000001, 0x860c0e00, 0x00000008, 0x02040004, 0x00000000, 0x02041800,
+	0x00000000, 0x83871800, 0x00000018, 0x00020000 };
+
+static u32 bnx2_rv2p_proc2[] = {
+	0x00000000, 0x2a000000, 0x00000010, 0xb1d40000, 0x00000008, 0x02540003,
+	0x00000018, 0x00040000, 0x00000018, 0x8000000a, 0x00000018, 0x8000000a,
+	0x00000018, 0x8000000e, 0x00000018, 0x80000056, 0x00000018, 0x800001b9,
+	0x00000018, 0x800001e1, 0x00000018, 0x8000019b, 0x00000018, 0x800001f9,
+	0x00000018, 0x8000019f, 0x00000018, 0x800001a6, 0x00000018, 0x80000000,
+	0x0000000c, 0x29800001, 0x00000000, 0x2a000000, 0x0000000c, 0x29800000,
+	0x00000010, 0x20530000, 0x00000018, 0x8000ffee, 0x0000000c, 0x29800001,
+	0x00000010, 0x91de0000, 0x00000010, 0x001f0000, 0x00000000, 0x2f80aa00,
+	0x00000000, 0x2a000000, 0x00000000, 0x0d610000, 0x00000000, 0x03620000,
+	0x00000000, 0x2c400000, 0x00000000, 0x02638c00, 0x00000000, 0x26460000,
+	0x00000010, 0x00420002, 0x00000008, 0x02040012, 0x00000010, 0xb9060836,
+	0x00000000, 0x0f580000, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+	0x00000000, 0x0b660000, 0x00000000, 0x0c000000, 0x00000000, 0x0b800000,
+	0x00000010, 0x00420009, 0x00000008, 0x0cc60012, 0x00000008, 0x0f800003,
+	0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000008, 0x27110012,
+	0x00000000, 0x66900000, 0x00000008, 0xa31b0012, 0x00000018, 0x80000008,
+	0x00000000, 0x0cc60000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000,
+	0x00000010, 0x009f0000, 0x00000000, 0x27110000, 0x00000000, 0x66900000,
+	0x00000000, 0x231b0000, 0x00000010, 0xb197320e, 0x00000000, 0x25960000,
+	0x00000000, 0x021b0000, 0x00000010, 0x001f0000, 0x00000008, 0x0f800003,
+	0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000000, 0x22c50800,
+	0x00000010, 0x009f0000, 0x00000000, 0x27002200, 0x00000000, 0x26802000,
+	0x00000000, 0x231b0000, 0x0000000c, 0x69520001, 0x00000018, 0x8000fff3,
+	0x00000010, 0x01130002, 0x00000010, 0xb1980003, 0x00000010, 0x001f0000,
+	0x00000008, 0x0f800004, 0x00000008, 0x22000003, 0x00000008, 0x2c80000c,
+	0x00000008, 0x2d00000c, 0x00000010, 0x009f0000, 0x00000000, 0x25960000,
+	0x0000000c, 0x29800000, 0x00000000, 0x32140000, 0x00000000, 0x32950000,
+	0x00000000, 0x33160000, 0x00000000, 0x31e32e00, 0x00000008, 0x2d800010,
+	0x00000010, 0x20530000, 0x00000018, 0x8000ffac, 0x00000000, 0x23000000,
+	0x00000000, 0x25e60000, 0x00000008, 0x2200000b, 0x0000000c, 0x69520000,
+	0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000018, 0x8000ffa5,
+	0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000,
+	0x00000010, 0x001f0000, 0x00000000, 0x02700000, 0x00000000, 0x0d620000,
+	0x00000000, 0xbb630800, 0x00000000, 0x2a000000, 0x00000009, 0x076000ff,
+	0x0000000f, 0x2c0e0007, 0x00000008, 0x2c800000, 0x00000008, 0x2d000064,
+	0x00000008, 0x2d80011c, 0x00000009, 0x06420002, 0x0000000c, 0x61420001,
+	0x00000000, 0x0f400000, 0x00000000, 0x02d08c00, 0x00000000, 0x23000000,
+	0x00000004, 0x826da000, 0x00000000, 0x8304a000, 0x00000000, 0x22c50c00,
+	0x00000000, 0x03760000, 0x00000004, 0x83860a00, 0x00000000, 0x83870c00,
+	0x00000010, 0x91de0000, 0x00000000, 0x037c0000, 0x00000000, 0x837b0c00,
+	0x00000001, 0x83060e00, 0x00000000, 0x83870c00, 0x00000000, 0x82850e00,
+	0x00000010, 0xb1860016, 0x0000000f, 0x47610018, 0x00000000, 0x068e0000,
+	0x0000000f, 0x47670010, 0x0000000f, 0x47e20010, 0x00000000, 0x870e1e00,
+	0x00000010, 0xb70e1a10, 0x00000010, 0x0ce7000e, 0x00000008, 0x22000009,
+	0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400,
+	0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004,
+	0x00000018, 0x8000023f, 0x00000000, 0x37ed0000, 0x0000000c, 0x73e7001a,
+	0x00000010, 0x20530000, 0x00000008, 0x22000008, 0x0000000c, 0x61420004,
+	0x00000000, 0x02f60000, 0x00000004, 0x82840a00, 0x00000010, 0xb1840a2b,
+	0x00000010, 0x2d67000a, 0x00000010, 0xb96d0804, 0x00000004, 0xb6ed0a00,
+	0x00000000, 0x37ed0000, 0x00000018, 0x80000029, 0x0000000c, 0x61420000,
+	0x00000000, 0x37040000, 0x00000000, 0x37850000, 0x0000000c, 0x33e7001a,
+	0x00000018, 0x80000024, 0x00000010, 0xb96d0809, 0x00000004, 0xb6ed0a00,
+	0x00000000, 0x036d0000, 0x00000004, 0xb76e0c00, 0x00000010, 0x91ee0c1f,
+	0x0000000c, 0x73e7001a, 0x00000004, 0xb6ef0c00, 0x00000000, 0x37ed0000,
+	0x00000018, 0x8000001b, 0x0000000c, 0x61420000, 0x00000010, 0xb7ee0a05,
+	0x00000010, 0xb96f0815, 0x00000003, 0xb76e0800, 0x00000004, 0xb7ef0a00,
+	0x00000018, 0x80000015, 0x00000010, 0x0ce7000c, 0x00000008, 0x22000009,
+	0x00000000, 0x286d0000, 0x0000000f, 0x65680010, 0x00000003, 0xf66c9400,
+	0x00000010, 0xb972a003, 0x0000000c, 0x73e70019, 0x0000000c, 0x21420004,
+	0x00000018, 0x80000215, 0x00000010, 0x20530000, 0x00000008, 0x22000008,
+	0x0000000c, 0x61420004, 0x00000000, 0x37040000, 0x00000000, 0x37850000,
+	0x00000000, 0x036d0000, 0x00000003, 0xb8f10c00, 0x00000018, 0x80000004,
+	0x00000000, 0x02840000, 0x00000002, 0x21421800, 0x0000000c, 0x61420000,
+	0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff,
+	0x00000000, 0x23000000, 0x00000010, 0xb1840a3d, 0x00000010, 0x01420002,
+	0x00000004, 0xb8f10a00, 0x00000003, 0x83760a00, 0x00000010, 0xb8040c39,
+	0x00000010, 0xb7e6080a, 0x00000000, 0x0a640000, 0x00000000, 0x0ae50000,
+	0x00000009, 0x0c68ffff, 0x00000009, 0x0b67ffff, 0x00000000, 0x0be60000,
+	0x00000000, 0x0c840000, 0x00000010, 0xb197320c, 0x00000008, 0x0f800002,
+	0x00000018, 0x8000000a, 0x00000000, 0x0a6a0000, 0x00000000, 0x0aeb0000,
+	0x00000000, 0x0c000000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0be90000,
+	0x00000000, 0x0c840000, 0x00000010, 0xb1973203, 0x00000008, 0x0f800002,
+	0x00000018, 0x80000001, 0x00000010, 0x001f0000, 0x00000000, 0x0c860000,
+	0x00000000, 0x06980000, 0x00000008, 0x0f800003, 0x00000000, 0x00000000,
+	0x00000010, 0x009f0000, 0x00000010, 0xb1973210, 0x00000000, 0x231b0000,
+	0x00000000, 0x02043600, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+	0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000,
+	0x0000000c, 0x29000000, 0x00000018, 0x800001de, 0x00000000, 0x06980000,
+	0x00000010, 0x20530000, 0x00000000, 0x22c58c00, 0x00000010, 0x001f0000,
+	0x00000008, 0x0f800003, 0x00000018, 0x8000fff0, 0x00000000, 0x02043600,
+	0x00000000, 0x231b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+	0x00000009, 0x2607ffff, 0x00000000, 0x27111a00, 0x00000000, 0x66900000,
+	0x0000000c, 0x29000000, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+	0x00000000, 0x32140000, 0x00000000, 0x32950000, 0x00000005, 0x73e72c00,
+	0x00000005, 0x74683000, 0x00000000, 0x33170000, 0x00000018, 0x80000138,
+	0x00000010, 0x91c60004, 0x00000008, 0x07000004, 0x00000010, 0xb1c41c02,
+	0x00000010, 0x91840a04, 0x00000018, 0x800001c3, 0x00000010, 0x20530000,
+	0x00000000, 0x22c58c00, 0x00000010, 0xb1840a8e, 0x0000000c, 0x21420006,
+	0x00000010, 0x0ce7001a, 0x0000000f, 0x43680010, 0x00000000, 0x03f30c00,
+	0x00000010, 0x91870850, 0x0000000f, 0x46ec0010, 0x00000010, 0xb68d0c4e,
+	0x00000000, 0x838d0c00, 0x00000000, 0xa3050800, 0x00000001, 0xa3460e00,
+	0x00000000, 0x02048c00, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+	0x00000010, 0x001f0000, 0x00000008, 0x22000008, 0x00000003, 0x8384a000,
+	0x0000000f, 0x65870010, 0x00000009, 0x2607ffff, 0x00000000, 0x27750c00,
+	0x00000000, 0x66f40000, 0x0000000c, 0x29000000, 0x00000018, 0x800001aa,
+	0x00000000, 0x03068c00, 0x00000003, 0xf4680c00, 0x00000010, 0x20530000,
+	0x00000000, 0x22c58c00, 0x00000018, 0x8000ffe5, 0x00000000, 0x39760000,
+	0x00000000, 0x39840000, 0x0000000c, 0x33e70019, 0x00000010, 0x001f0000,
+	0x00000000, 0x031e0000, 0x00000000, 0x0760fe00, 0x0000000f, 0x0f0e0007,
+	0x00000000, 0x83850800, 0x00000000, 0x0a7d0000, 0x00000000, 0x0afe0000,
+	0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000, 0x00000000, 0x0c000000,
+	0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+	0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+	0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+	0x00000002, 0x33e70e00, 0x00000000, 0x28f30000, 0x00000010, 0x009f0000,
+	0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+	0x00000008, 0x22000006, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000,
+	0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+	0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000,
+	0x0000000c, 0x29000000, 0x00000018, 0x8000017e, 0x00000003, 0xf4683600,
+	0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+	0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004,
+	0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+	0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+	0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+	0x00000000, 0x22c53600, 0x00000018, 0x8000ffac, 0x00000010, 0x001f0000,
+	0x00000000, 0x031e0000, 0x00000000, 0x83850800, 0x00000009, 0x076000ff,
+	0x0000000f, 0x0f0e0007, 0x00000000, 0x0c000000, 0x00000000, 0x0a7d0000,
+	0x00000000, 0x0afe0000, 0x00000000, 0x0b7f0000, 0x00000000, 0x0d7a0000,
+	0x00000000, 0x0bfc0000, 0x00000000, 0x0c970e00, 0x00000008, 0x0f800003,
+	0x0000000f, 0x47670010, 0x00000008, 0x070e0001, 0x0000000b, 0xc38000ff,
+	0x00000002, 0x43870000, 0x00000001, 0x33e70e00, 0x0000000f, 0x038e0010,
+	0x00000002, 0x33e70e00, 0x00000000, 0x39840000, 0x00000003, 0xb9720800,
+	0x00000000, 0x28f30000, 0x0000000f, 0x65680010, 0x00000010, 0x009f0000,
+	0x00000000, 0x02043600, 0x00000010, 0x91840a02, 0x00000002, 0x21421800,
+	0x00000008, 0x22000007, 0x00000000, 0x231b0000, 0x00000000, 0x23ff0000,
+	0x00000000, 0x241b0000, 0x00000003, 0x8384a000, 0x0000000f, 0x65870010,
+	0x00000009, 0x2607ffff, 0x00000000, 0x27110000, 0x00000000, 0x26900000,
+	0x0000000c, 0x29000000, 0x00000018, 0x80000145, 0x00000003, 0xf4683600,
+	0x00000000, 0x3a100000, 0x00000000, 0x3a910000, 0x00000003, 0xf66c2400,
+	0x00000010, 0x001f0000, 0x00000010, 0xb1923604, 0x00000008, 0x0f800004,
+	0x00000000, 0x00000000, 0x00000010, 0x009f0000, 0x00000000, 0x3e170000,
+	0x00000000, 0x3e940000, 0x00000000, 0x3f150000, 0x00000000, 0x3f960000,
+	0x00000010, 0x001f0000, 0x00000000, 0x0f060000, 0x00000010, 0x20530000,
+	0x00000000, 0x22c53600, 0x00000018, 0x8000ff73, 0x00000010, 0x0ce70005,
+	0x00000008, 0x2c80000c, 0x00000008, 0x2d000070, 0x00000008, 0x2d800010,
+	0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000018, 0x8000011d,
+	0x00000000, 0x2c1e0000, 0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010,
+	0x00000008, 0x2d800048, 0x00000000, 0x00000000, 0x00000010, 0x91de0000,
+	0x00000018, 0x8000fe5d, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+	0x00000010, 0x001f0000, 0x00000000, 0x0f008000, 0x00000008, 0x0f800007,
+	0x00000018, 0x80000006, 0x0000000c, 0x29800001, 0x00000000, 0x2a000000,
+	0x00000010, 0x001f0000, 0x0000000f, 0x0f470007, 0x00000008, 0x0f800008,
+	0x00000018, 0x80000119, 0x00000010, 0x20530000, 0x00000018, 0x8000fe4f,
+	0x0000000c, 0x29800001, 0x00000010, 0x91de0000, 0x00000000, 0x2fd50000,
+	0x00000000, 0x2a000000, 0x00000009, 0x0261ffff, 0x0000000d, 0x70e10001,
+	0x00000018, 0x80000101, 0x00000000, 0x2c400000, 0x00000008, 0x2c8000c4,
+	0x00000008, 0x2d00001c, 0x00000008, 0x2d800001, 0x00000005, 0x70e10800,
+	0x00000010, 0x91de0000, 0x00000018, 0x8000fe41, 0x0000000c, 0x29800001,
+	0x00000010, 0x91de0000, 0x00000000, 0x2fd50000, 0x00000010, 0x001f0000,
+	0x00000000, 0x02700000, 0x00000000, 0x0d620000, 0x00000000, 0xbb630800,
+	0x00000000, 0x2a000000, 0x00000000, 0x0f400000, 0x00000000, 0x2c400000,
+	0x0000000c, 0x73e7001b, 0x00000010, 0x0ce7000e, 0x00000000, 0x286d0000,
+	0x0000000f, 0x65ed0010, 0x00000009, 0x266dffff, 0x00000018, 0x80000069,
+	0x00000008, 0x02000004, 0x00000010, 0x91c40803, 0x00000018, 0x800000f6,
+	0x00000010, 0x20530000, 0x00000018, 0x800000e5, 0x00000008, 0x2c8000b8,
+	0x00000008, 0x2d000010, 0x00000008, 0x2d800048, 0x00000018, 0x80000005,
+	0x00000008, 0x2c8000c4, 0x00000008, 0x2d00001c, 0x00000008, 0x2d800001,
+	0x00000000, 0x00000000, 0x00000010, 0x205f0000, 0x00000008, 0x2c800048,
+	0x00000008, 0x2d000068, 0x00000008, 0x2d800104, 0x00000000, 0x00000000,
+	0x00000010, 0x91de0000, 0x00000000, 0x27f60000, 0x00000010, 0xb87a9e04,
+	0x00000008, 0x2200000d, 0x00000018, 0x800000e2, 0x00000010, 0x20530000,
+	0x00000018, 0x8000fe18, 0x0000000c, 0x29800001, 0x00000010, 0x91de0000,
+	0x00000000, 0x2fd50000, 0x00000010, 0x001f0000, 0x00000000, 0x02700000,
+	0x00000000, 0x0d620000, 0x00000000, 0xbb630800, 0x00000000, 0x2a000000,
+	0x00000010, 0x0e670011, 0x00000000, 0x286d0000, 0x0000000f, 0x65ed0010,
+	0x00000009, 0x266dffff, 0x00000004, 0xb8f1a000, 0x00000000, 0x0f400000,
+	0x0000000c, 0x73e7001c, 0x00000018, 0x80000040, 0x00000008, 0x02000004,
+	0x00000010, 0x91c40802, 0x00000018, 0x800000cd, 0x00000000, 0x2c1e0000,
+	0x00000008, 0x2c8000b8, 0x00000008, 0x2d000010, 0x00000008, 0x2d800048,
+	0x00000010, 0x20530000, 0x00000010, 0x91de0000, 0x00000018, 0x8000fdfe,
+	0x0000000c, 0x29800001, 0x00000000, 0x03550000, 0x00000000, 0x06460000,
+	0x00000000, 0x03d60000, 0x00000000, 0x2a000000, 0x0000000f, 0x0f480007,
+	0x00000010, 0xb18c0027, 0x0000000f, 0x47420008, 0x00000009, 0x070e000f,
+	0x00000008, 0x070e0008, 0x00000010, 0x001f0000, 0x00000008, 0x09000001,
+	0x00000007, 0x09121c00, 0x00000003, 0xcbca9200, 0x00000000, 0x0b97a200,
+	0x00000007, 0x4b171c00, 0x0000000f, 0x0a960003, 0x00000000, 0x0a959c00,
+	0x00000000, 0x4a009a00, 0x00000008, 0x82120001, 0x00000001, 0x0c170800,
+	0x00000000, 0x02180000, 0x00000000, 0x0c971800, 0x00000008, 0x0d00ffff,
+	0x00000008, 0x0f800006, 0x0000000c, 0x29000000, 0x00000008, 0x22000001,
+	0x00000000, 0x22c50c00, 0x00000010, 0x009f0000, 0x00000010, 0xb197320b,
+	0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+	0x00000018, 0x800000a4, 0x00000000, 0x02180000, 0x00000010, 0x20530000,
+	0x00000000, 0x22c53600, 0x00000010, 0x001f0000, 0x00000008, 0x0f800006,
+	0x00000018, 0x8000fff5, 0x00000010, 0x91870002, 0x00000008, 0x2200000a,
+	0x00000000, 0x231b0000, 0x00000000, 0x27110800, 0x00000000, 0x66900000,
+	0x00000018, 0x80000098, 0x00000008, 0x0200000a, 0x00000010, 0x91c40804,
+	0x00000010, 0x02c20003, 0x00000010, 0x001f0000, 0x00000008, 0x0f800008,
+	0x00000010, 0x20530000, 0x00000018, 0x8000fdc9, 0x00000000, 0x06820000,
+	0x00000010, 0x001f0000, 0x00000010, 0x0ce70028, 0x00000000, 0x03720000,
+	0x00000000, 0xa8760c00, 0x00000000, 0x0cf60000, 0x00000010, 0xb8723224,
+	0x00000000, 0x03440000, 0x00000008, 0x22000010, 0x00000000, 0x03ca0000,
+	0x0000000f, 0x65680010, 0x00000000, 0x0bcf0000, 0x00000000, 0x27f20000,
+	0x00000010, 0xb7ef3203, 0x0000000c, 0x21420004, 0x0000000c, 0x73e70019,
+	0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x8000007e,
+	0x00000004, 0xb9723200, 0x00000010, 0x20530000, 0x00000000, 0x22060000,
+	0x0000000c, 0x61420004, 0x00000000, 0x25070000, 0x00000000, 0x27970000,
+	0x00000000, 0x290e0000, 0x00000010, 0x0ce70010, 0x00000010, 0xb873320f,
+	0x0000000f, 0x436c0010, 0x00000000, 0x03f30c00, 0x00000000, 0x03f30000,
+	0x00000000, 0x83990e00, 0x00000001, 0x83860e00, 0x00000000, 0x83060e00,
+	0x00000003, 0xf66c0c00, 0x00000000, 0x39f30e00, 0x00000000, 0x3af50e00,
+	0x00000000, 0x7a740000, 0x0000000f, 0x43680010, 0x00000001, 0x83860e00,
+	0x00000000, 0x83060e00, 0x00000003, 0xf4680c00, 0x00000000, 0x286d0000,
+	0x00000000, 0x03690000, 0x00000010, 0xb1f60c54, 0x00000000, 0x0a6a0000,
+	0x00000000, 0x0aeb0000, 0x00000009, 0x0b6cffff, 0x00000000, 0x0c000000,
+	0x00000000, 0x0be90000, 0x00000003, 0x8cf6a000, 0x0000000c, 0x09800002,
+	0x00000010, 0x009f0000, 0x00000010, 0xb8173209, 0x00000000, 0x35140000,
+	0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34970000,
+	0x00000004, 0xb8f12e00, 0x00000010, 0x001f0000, 0x00000008, 0x0f800004,
+	0x00000018, 0x8000fff7, 0x00000000, 0x03e90000, 0x00000010, 0xb8f6a01a,
+	0x00000010, 0x20130019, 0x00000010, 0xb1f10e18, 0x00000000, 0x83973200,
+	0x00000000, 0x38700e00, 0x00000000, 0xbb760e00, 0x00000000, 0x37d00000,
+	0x0000000c, 0x73e7001a, 0x00000003, 0xb8f1a000, 0x00000000, 0x32140000,
+	0x00000000, 0x32950000, 0x00000005, 0x73e72c00, 0x00000000, 0x33190000,
+	0x00000005, 0x74680000, 0x00000010, 0x0ce7000d, 0x00000008, 0x22000009,
+	0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x0000000c, 0x73e70019,
+	0x0000000f, 0x65680010, 0x0000000c, 0x21420004, 0x00000018, 0x8000003c,
+	0x00000010, 0x20530000, 0x0000000c, 0x61420004, 0x00000000, 0x290e0000,
+	0x00000018, 0x80000002, 0x00000010, 0x91973206, 0x00000000, 0x35140000,
+	0x00000000, 0x35950000, 0x00000005, 0x766c2c00, 0x00000000, 0x34990000,
+	0x00000004, 0xb8f13200, 0x00000000, 0x83690c00, 0x00000010, 0xb1860013,
+	0x00000000, 0x28e90000, 0x00000008, 0x22000004, 0x00000000, 0x23ec0000,
+	0x00000000, 0x03690000, 0x00000010, 0xb8660c07, 0x00000009, 0x036cffff,
+	0x00000000, 0x326a0000, 0x00000000, 0x32eb0000, 0x00000005, 0x73e70c00,
+	0x00000000, 0x33690000, 0x00000005, 0x74680000, 0x0000000c, 0x73e7001c,
+	0x00000000, 0x03690000, 0x00000010, 0xb1f60c12, 0x00000010, 0xb1d00c11,
+	0x0000000c, 0x21420005, 0x0000000c, 0x33e7001c, 0x00000018, 0x8000000e,
+	0x00000010, 0x2e67000d, 0x00000000, 0x03690000, 0x00000010, 0xb1f60c0b,
+	0x00000010, 0xb1d00c0a, 0x00000000, 0x03440000, 0x00000008, 0x2200000c,
+	0x00000000, 0x07520000, 0x00000000, 0x29000000, 0x00000018, 0x80000015,
+	0x0000000c, 0x33e7001c, 0x00000010, 0x20530000, 0x00000000, 0x22060000,
+	0x00000000, 0x290e0000, 0x00000018, 0x000d0000, 0x00000000, 0x06820000,
+	0x00000010, 0x2de7000d, 0x00000010, 0x0ce7000c, 0x00000000, 0x27f20000,
+	0x00000010, 0xb96d9e0a, 0x00000000, 0xa86d9e00, 0x00000009, 0x0361ffff,
+	0x00000010, 0xb7500c07, 0x00000008, 0x2200000f, 0x0000000f, 0x65680010,
+	0x00000000, 0x29000000, 0x00000018, 0x80000004, 0x0000000c, 0x33e7001b,
+	0x00000010, 0x20530000, 0x00000018, 0x000d0000, 0x00000000, 0x2b820000,
+	0x00000010, 0x20d2002f, 0x00000010, 0x0052002e, 0x00000009, 0x054e0007,
+	0x00000010, 0xb18a002c, 0x00000000, 0x050a8c00, 0x00000008, 0x850a0008,
+	0x00000010, 0x918a0029, 0x00000003, 0xc5008800, 0x00000008, 0xa3460001,
+	0x00000010, 0xb1c60007, 0x00000008, 0x22000001, 0x0000000c, 0x29800000,
+	0x00000010, 0x20530000, 0x00000000, 0x274e8c00, 0x00000000, 0x66cd0000,
+	0x00000000, 0x22c58c00, 0x00000008, 0x22000014, 0x00000003, 0x22c58e00,
+	0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00,
+	0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000,
+	0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x0000000c, 0x69520000,
+	0x0000000c, 0x29800000, 0x00000010, 0x20530000, 0x00000003, 0x22c58e00,
+	0x00000003, 0x23c58e00, 0x00000003, 0x22c58e00, 0x00000003, 0x26cd9e00,
+	0x00000003, 0x27cd9e00, 0x00000003, 0x26cd9e00, 0x00000003, 0x274ea000,
+	0x00000003, 0x284ea000, 0x00000003, 0x274ea000, 0x00000000, 0xa2c58c00,
+	0x00000000, 0xa74e8c00, 0x00000000, 0xe6cd0000, 0x0000000f, 0x620a0010,
+	0x00000008, 0x23460001, 0x0000000c, 0x29800000, 0x00000010, 0x20530000,
+	0x0000000c, 0x29520000, 0x00000018, 0x80000002, 0x0000000c, 0x29800000,
+	0x00000018, 0x00570000 };
+
+static const int bnx2_TPAT_b06FwReleaseMajor = 0x1;
+static const int bnx2_TPAT_b06FwReleaseMinor = 0x0;
+static const int bnx2_TPAT_b06FwReleaseFix = 0x0;
+static const u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
+static const u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
+static const int bnx2_TPAT_b06FwTextLen = 0x122c;
+static const u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
+static const int bnx2_TPAT_b06FwDataLen = 0x0;
+static const u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
+static const int bnx2_TPAT_b06FwRodataLen = 0x0;
+static const u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
+static const int bnx2_TPAT_b06FwBssLen = 0x250;
+static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
+static const int bnx2_TPAT_b06FwSbssLen = 0x34;
+static u32 bnx2_TPAT_b06FwText[(0x122c/4) + 1] = {
+	0x0a000218, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20322e35,
+	0x2e313100, 0x02050b01, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800,
+	0x24421a60, 0x3c030800, 0x24631cf0, 0xac400000, 0x0043202b, 0x1480fffd,
+	0x24420004, 0x3c1d0800, 0x37bd2ffc, 0x03a0f021, 0x3c100800, 0x26100860,
+	0x3c1c0800, 0x279c1a60, 0x0e000546, 0x00000000, 0x0000000d, 0x8f820010,
+	0x8c450008, 0x24030800, 0xaf430178, 0x97430104, 0x3c020008, 0xaf420140,
+	0x8f820024, 0x30420001, 0x10400007, 0x3069ffff, 0x24020002, 0x2523fffe,
+	0xa7420146, 0xa7430148, 0x0a000242, 0x3c020800, 0xa7400146, 0x3c020800,
+	0x8c43083c, 0x1460000e, 0x24020f00, 0x8f820024, 0x30430020, 0x0003182b,
+	0x00031823, 0x30650009, 0x30420c00, 0x24030400, 0x14430002, 0x34a40001,
+	0x34a40005, 0xa744014a, 0x0a000264, 0x3c020800, 0x8f830014, 0x14620008,
+	0x00000000, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023, 0x3042000d,
+	0x0a000262, 0x34420005, 0x8f820024, 0x30420020, 0x0002102b, 0x00021023,
+	0x30420009, 0x34420001, 0xa742014a, 0x3c020800, 0x8c430820, 0x8f840024,
+	0x3c020048, 0x00621825, 0x30840006, 0x24020002, 0x1082000d, 0x2c820003,
+	0x50400005, 0x24020004, 0x10800012, 0x3c020001, 0x0a000284, 0x00000000,
+	0x10820007, 0x24020006, 0x1482000f, 0x3c020111, 0x0a00027c, 0x00621025,
+	0x0a00027b, 0x3c020101, 0x3c020011, 0x00621025, 0x24030001, 0xaf421000,
+	0xaf830020, 0x0a000284, 0x00000000, 0x00621025, 0xaf421000, 0xaf800020,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f830020, 0x1060003f,
+	0x3c048000, 0x8f421000, 0x00441024, 0x1040fffd, 0x00000000, 0x10600039,
+	0x00000000, 0x8f421000, 0x3c030020, 0x00431024, 0x10400034, 0x00000000,
+	0x97421014, 0x14400031, 0x00000000, 0x97421008, 0x8f840010, 0x24420006,
+	0x00024082, 0x00081880, 0x00643821, 0x8ce50000, 0x30430003, 0x30420001,
+	0x10400004, 0x00000000, 0x0000000d, 0x0a0002c3, 0x00081080, 0x5460000f,
+	0x30a5ffff, 0x3c06ffff, 0x00a62824, 0x0005182b, 0x00a61026, 0x0002102b,
+	0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x240001fb,
+	0x8ce20000, 0x0a0002c2, 0x00462825, 0x0005182b, 0x38a2ffff, 0x0002102b,
+	0x00621824, 0x10600004, 0x00000000, 0x0000000d, 0x00000000, 0x24000205,
+	0x8ce20000, 0x3445ffff, 0x00081080, 0x00441021, 0x3c030800, 0xac450000,
+	0x8c620830, 0x24420001, 0xac620830, 0x8f840018, 0x01202821, 0x24820008,
+	0x30421fff, 0x24434000, 0x0343d821, 0x30a30007, 0xaf84000c, 0xaf820018,
+	0xaf420084, 0x10600002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000,
+	0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023,
+	0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000,
+	0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x8f830024, 0x27bdffe0,
+	0xafbf0018, 0xafb10014, 0x30620200, 0x14400004, 0xafb00010, 0x0000000d,
+	0x00000000, 0x24000242, 0x00031a82, 0x30630003, 0x000310c0, 0x00431021,
+	0x00021080, 0x00431021, 0x00021080, 0x3c030800, 0x24631aa0, 0x00438821,
+	0x8e240000, 0x10800004, 0x00000000, 0x0000000d, 0x00000000, 0x2400024d,
+	0x8f850010, 0x24020001, 0xae220000, 0x8ca70008, 0xa2200007, 0x8f620004,
+	0x26300014, 0x02002021, 0x00021402, 0xa2220004, 0x304600ff, 0x24c60005,
+	0x0e000673, 0x00063082, 0x8f620004, 0xa6220008, 0x8f430108, 0x3c021000,
+	0x00621824, 0x10600008, 0x00000000, 0x97420104, 0x92230007, 0x2442ffec,
+	0x3045ffff, 0x34630002, 0x0a000321, 0xa2230007, 0x97420104, 0x2442fff0,
+	0x3045ffff, 0x8f620004, 0x3042ffff, 0x2c420013, 0x54400005, 0x92230007,
+	0x92220007, 0x34420001, 0xa2220007, 0x92230007, 0x24020001, 0x10620009,
+	0x28620002, 0x14400014, 0x24020002, 0x10620012, 0x24020003, 0x1062000a,
+	0x00000000, 0x0a000342, 0x00000000, 0x8f820010, 0x8c43000c, 0x3c04ffff,
+	0x00641824, 0x00651825, 0x0a000342, 0xac43000c, 0x8f820010, 0x8c430010,
+	0x3c04ffff, 0x00641824, 0x00651825, 0xac430010, 0x8f620004, 0x3042ffff,
+	0x24420002, 0x00021083, 0xa2220005, 0x304500ff, 0x8f820010, 0x3c04ffff,
+	0x00052880, 0x00a22821, 0x8ca70000, 0x96220008, 0x97430104, 0x00e42024,
+	0x24420002, 0x00621823, 0x00833825, 0xaca70000, 0x92240005, 0x00041080,
+	0x02021021, 0x90430000, 0x3c05fff6, 0x34a5ffff, 0x3063000f, 0x00832021,
+	0xa2240006, 0x308200ff, 0x24420003, 0x00021080, 0x02021021, 0x8c460000,
+	0x308300ff, 0x8f820010, 0x3c04ff3f, 0x00031880, 0x00c53824, 0x00621821,
+	0xae26000c, 0xac67000c, 0x8e22000c, 0x92230006, 0x3484ffff, 0x00441024,
+	0x24630003, 0x00031880, 0x02031821, 0x00e42024, 0xae22000c, 0xac640000,
+	0x92220006, 0x24420004, 0x00021080, 0x02021021, 0x94470002, 0xac470000,
+	0x92230006, 0x8f820010, 0x00031880, 0x00621821, 0x24020010, 0xac670010,
+	0x24030002, 0xa7420140, 0xa7400142, 0xa7400144, 0xa7430146, 0x97420104,
+	0x24030001, 0x2442fffe, 0xa7420148, 0xa743014a, 0x8f820024, 0x24030002,
+	0x30440006, 0x1083000d, 0x2c820003, 0x10400005, 0x24020004, 0x10800011,
+	0x3c020009, 0x0a0003a5, 0x00000000, 0x10820007, 0x24020006, 0x1482000d,
+	0x3c020119, 0x0a00039f, 0x24030001, 0x0a00039e, 0x3c020109, 0x3c020019,
+	0x24030001, 0xaf421000, 0xaf830020, 0x0a0003a5, 0x00000000, 0xaf421000,
+	0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x92220004,
+	0x24030008, 0x8f840020, 0x24420002, 0x30420007, 0x00621823, 0x30630007,
+	0x10800006, 0xae230010, 0x3c038000, 0x8f421000, 0x00431024, 0x1040fffd,
+	0x00000000, 0x8f820018, 0xaf82000c, 0x24420010, 0x30421fff, 0xaf820018,
+	0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007,
+	0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821,
+	0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030,
+	0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021,
+	0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008,
+	0x27bd0020, 0x8f830024, 0x27bdffe0, 0xafbf0018, 0xafb10014, 0x30620200,
+	0x14400004, 0xafb00010, 0x0000000d, 0x00000000, 0x240002e4, 0x00031a82,
+	0x30630003, 0x000310c0, 0x00431021, 0x00021080, 0x00431021, 0x00021080,
+	0x3c030800, 0x24631aa0, 0x00438021, 0x8e040000, 0x14800004, 0x00000000,
+	0x0000000d, 0x00000000, 0x240002e9, 0x8f620004, 0x04410008, 0x26050014,
+	0x92020006, 0x8e03000c, 0x24420003, 0x00021080, 0x00a21021, 0xac430000,
+	0xae000000, 0x92020005, 0x24420001, 0x00021080, 0x00a21021, 0x8c430000,
+	0x3c040001, 0x00641821, 0xac430000, 0x92060004, 0x27710008, 0x02202021,
+	0x24c60005, 0x0e000673, 0x00063082, 0x92040006, 0x3c057fff, 0x8f620004,
+	0x00042080, 0x00912021, 0x8c830004, 0x34a5ffff, 0x00451024, 0x00621821,
+	0xac830004, 0x92050005, 0x3c07ffff, 0x92040004, 0x00052880, 0x00b12821,
+	0x8ca30000, 0x97420104, 0x96060008, 0x00671824, 0x00441021, 0x00461023,
+	0x3042ffff, 0x00621825, 0xaca30000, 0x92030007, 0x24020001, 0x1062000a,
+	0x28620002, 0x1440001d, 0x2402000a, 0x24020002, 0x10620019, 0x24020003,
+	0x1062000e, 0x2402000a, 0x0a000447, 0x00000000, 0x92020004, 0x97430104,
+	0x8e24000c, 0x00621821, 0x2463fff2, 0x3063ffff, 0x00872024, 0x00832025,
+	0xae24000c, 0x0a000447, 0x2402000a, 0x92020004, 0x97430104, 0x8e240010,
+	0x00621821, 0x2463ffee, 0x3063ffff, 0x00872024, 0x00832025, 0xae240010,
+	0x2402000a, 0xa7420140, 0x96030012, 0x8f840024, 0xa7430142, 0x92020004,
+	0xa7420144, 0xa7400146, 0x97430104, 0x30840006, 0x24020001, 0xa7430148,
+	0xa742014a, 0x24020002, 0x1082000d, 0x2c820003, 0x10400005, 0x24020004,
+	0x10800011, 0x3c020041, 0x0a00046c, 0x00000000, 0x10820007, 0x24020006,
+	0x1482000d, 0x3c020151, 0x0a000466, 0x24030001, 0x0a000465, 0x3c020141,
+	0x3c020051, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00046c, 0x00000000,
+	0xaf421000, 0xaf800020, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x8f820020, 0x8f840018, 0x10400006, 0x92030004, 0x3c058000, 0x8f421000,
+	0x00451024, 0x1040fffd, 0x00000000, 0x2463000a, 0x30620007, 0x10400002,
+	0x24620007, 0x304303f8, 0x00831021, 0x30421fff, 0xaf84000c, 0xaf820018,
+	0xaf420084, 0x97430104, 0x24424000, 0x0342d821, 0x3063ffff, 0x30620007,
+	0x10400002, 0x24620007, 0x3043fff8, 0x8f820030, 0x8f840000, 0x00431821,
+	0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023, 0xaf820030,
+	0x8f840030, 0x34028000, 0x8fbf0018, 0x8fb10014, 0x8fb00010, 0x00821021,
+	0x03421821, 0x3c021000, 0xaf830010, 0xaf440080, 0xaf420178, 0x03e00008,
+	0x27bd0020, 0x8f620000, 0x97430104, 0x3c048000, 0x3045ffff, 0x3066ffff,
+	0x8f420178, 0x00441024, 0x1440fffd, 0x2402000a, 0x30a30007, 0xa7420140,
+	0x24020008, 0x00431023, 0x30420007, 0x24a3fffe, 0xa7420142, 0xa7430144,
+	0xa7400146, 0xa7460148, 0x8f420108, 0x8f830024, 0x30420020, 0x0002102b,
+	0x00021023, 0x30420009, 0x34420001, 0x30630006, 0xa742014a, 0x24020002,
+	0x1062000d, 0x2c620003, 0x10400005, 0x24020004, 0x10600011, 0x3c020041,
+	0x0a0004d6, 0x00000000, 0x10620007, 0x24020006, 0x1462000d, 0x3c020151,
+	0x0a0004d0, 0x24030001, 0x0a0004cf, 0x3c020141, 0x3c020051, 0x24030001,
+	0xaf421000, 0xaf830020, 0x0a0004d6, 0x00000000, 0xaf421000, 0xaf800020,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8f820020, 0x24a30008,
+	0x8f850018, 0x10400006, 0x30c6ffff, 0x3c048000, 0x8f421000, 0x00441024,
+	0x1040fffd, 0x00000000, 0x3063ffff, 0x30620007, 0x10400002, 0x24620007,
+	0x3043fff8, 0x00a31021, 0x30421fff, 0x24434000, 0x0343d821, 0x00c02021,
+	0x30830007, 0xaf85000c, 0xaf820018, 0xaf420084, 0x10600002, 0x24820007,
+	0x3044fff8, 0x8f820030, 0x8f850000, 0x00441821, 0xaf82001c, 0x0065102b,
+	0xaf830030, 0x14400002, 0x00651023, 0xaf820030, 0x8f840030, 0x34028000,
+	0x3c030800, 0x8c650834, 0x00821021, 0x03421821, 0xaf830010, 0xaf440080,
+	0x10a00006, 0x2402000e, 0x9383002f, 0x14620004, 0x3c021000, 0x2402043f,
+	0xa7420148, 0x3c021000, 0x03e00008, 0xaf420178, 0x8f820024, 0x30424000,
+	0x10400005, 0x24020800, 0x0000000d, 0x00000000, 0x2400040e, 0x24020800,
+	0xaf420178, 0x97440104, 0x3c030008, 0xaf430140, 0x8f820024, 0x30420001,
+	0x10400006, 0x3085ffff, 0x24020002, 0x24a3fffe, 0xa7420146, 0x0a000526,
+	0xa7430148, 0xa7400146, 0x8f840018, 0x2402000d, 0xa742014a, 0x24830008,
+	0x30631fff, 0x24624000, 0x0342d821, 0x30a20007, 0xaf84000c, 0xaf830018,
+	0xaf430084, 0x10400002, 0x24a20007, 0x3045fff8, 0x8f820030, 0x8f840000,
+	0x00451821, 0xaf82001c, 0x0064102b, 0xaf830030, 0x14400002, 0x00641023,
+	0xaf820030, 0x8f840030, 0x34028000, 0x00821021, 0x03421821, 0x3c021000,
+	0xaf830010, 0xaf440080, 0x03e00008, 0xaf420178, 0x27bdffe8, 0x3c046008,
+	0xafbf0014, 0xafb00010, 0x8c825000, 0x3c1a8000, 0x2403ff7f, 0x375b4000,
+	0x00431024, 0x3442380c, 0xac825000, 0x8f430008, 0x3c100800, 0x37428000,
+	0x34630001, 0xaf430008, 0xaf820010, 0x3c02601c, 0xaf800018, 0xaf400080,
+	0xaf400084, 0x8c450008, 0x3c036000, 0x8c620808, 0x3c040800, 0x3c030080,
+	0xac830820, 0x3042fff0, 0x38420010, 0x2c420001, 0xaf850000, 0xaf820004,
+	0x0e000658, 0x00000000, 0x8f420000, 0x30420001, 0x1040fffb, 0x00000000,
+	0x8f430108, 0x8f440100, 0x30622000, 0xaf830024, 0xaf840014, 0x10400004,
+	0x8e02082c, 0x24420001, 0x0a0005c6, 0xae02082c, 0x30620200, 0x14400003,
+	0x24020f00, 0x14820027, 0x24020d00, 0x97420104, 0x1040001c, 0x30624000,
+	0x14400005, 0x00000000, 0x0e00022f, 0x00000000, 0x0a0005bb, 0x00000000,
+	0x8f620008, 0x8f630000, 0x24020030, 0x00031e02, 0x306300f0, 0x10620007,
+	0x28620031, 0x1440002f, 0x24020040, 0x10620007, 0x00000000, 0x0a0005bb,
+	0x00000000, 0x0e0002e8, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0003db,
+	0x00000000, 0x0a0005bb, 0x00000000, 0x30620040, 0x1440002b, 0x00000000,
+	0x0000000d, 0x00000000, 0x240004b2, 0x0a0005c6, 0x00000000, 0x1482000f,
+	0x30620006, 0x97420104, 0x10400005, 0x30620040, 0x0e000510, 0x00000000,
+	0x0a0005bb, 0x00000000, 0x1440001b, 0x00000000, 0x0000000d, 0x00000000,
+	0x240004c4, 0x0a0005c6, 0x00000000, 0x1040000e, 0x30621000, 0x10400005,
+	0x00000000, 0x0e000688, 0x00000000, 0x0a0005bb, 0x00000000, 0x0e0004a1,
+	0x00000000, 0x8f82002c, 0x24420001, 0xaf82002c, 0x0a0005c6, 0x00000000,
+	0x30620040, 0x14400004, 0x00000000, 0x0000000d, 0x00000000, 0x240004db,
+	0x8f420138, 0x3c034000, 0x00431025, 0xaf420138, 0x0a000566, 0x00000000,
+	0x3c046008, 0x8c835000, 0x3c1a8000, 0x2402ff7f, 0x375b4000, 0x00621824,
+	0x3463380c, 0xac835000, 0x8f420008, 0x3c056000, 0x3c03601c, 0x34420001,
+	0xaf420008, 0x37428000, 0xaf800018, 0xaf820010, 0xaf400080, 0xaf400084,
+	0x8c660008, 0x8ca20808, 0x3c040800, 0x3c030080, 0xac830820, 0x3042fff0,
+	0x38420010, 0x2c420001, 0xaf860000, 0xaf820004, 0x03e00008, 0x00000000,
+	0x3084ffff, 0x30820007, 0x10400002, 0x24820007, 0x3044fff8, 0x8f820018,
+	0x00441821, 0x30631fff, 0x24644000, 0x0344d821, 0xaf82000c, 0xaf830018,
+	0x03e00008, 0xaf430084, 0x3084ffff, 0x30820007, 0x10400002, 0x24820007,
+	0x3044fff8, 0x8f820030, 0x8f830000, 0x00442021, 0xaf82001c, 0x0083102b,
+	0xaf840030, 0x14400002, 0x00831023, 0xaf820030, 0x8f820030, 0x34038000,
+	0x00431821, 0x03432021, 0xaf840010, 0x03e00008, 0xaf420080, 0x8f830024,
+	0x24020002, 0x30630006, 0x1062000d, 0x2c620003, 0x50400005, 0x24020004,
+	0x10600012, 0x3c020001, 0x0a00062a, 0x00000000, 0x10620007, 0x24020006,
+	0x1462000f, 0x3c020111, 0x0a000622, 0x00821025, 0x0a000621, 0x3c020101,
+	0x3c020011, 0x00821025, 0x24030001, 0xaf421000, 0xaf830020, 0x0a00062a,
+	0x00000000, 0x00821025, 0xaf421000, 0xaf800020, 0x00000000, 0x00000000,
+	0x00000000, 0x03e00008, 0x00000000, 0x8f820020, 0x10400005, 0x3c038000,
+	0x8f421000, 0x00431024, 0x1040fffd, 0x00000000, 0x03e00008, 0x00000000,
+	0x8f820024, 0x27bdffe8, 0x30424000, 0x14400005, 0xafbf0010, 0x0e00022f,
+	0x00000000, 0x0a000656, 0x8fbf0010, 0x8f620008, 0x8f630000, 0x24020030,
+	0x00031e02, 0x306300f0, 0x10620008, 0x28620031, 0x1440000d, 0x8fbf0010,
+	0x24020040, 0x10620007, 0x00000000, 0x0a000656, 0x00000000, 0x0e0002e8,
+	0x00000000, 0x0a000656, 0x8fbf0010, 0x0e0003db, 0x00000000, 0x8fbf0010,
+	0x03e00008, 0x27bd0018, 0x8f840028, 0x1080000f, 0x3c026000, 0x8c430c3c,
+	0x30630fff, 0xaf830008, 0x14600011, 0x3082000f, 0x10400005, 0x308200f0,
+	0x10400003, 0x30820f00, 0x14400006, 0x00000000, 0x0000000d, 0x00000000,
+	0x2400051a, 0x03e00008, 0x00000000, 0x0000000d, 0x00000000, 0x2400051f,
+	0x03e00008, 0x00000000, 0xaf830028, 0x03e00008, 0x00000000, 0x10c00007,
+	0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004, 0xac820000, 0x14c0fffb,
+	0x24840004, 0x03e00008, 0x00000000, 0x0a000684, 0x00a01021, 0xac860000,
+	0x00000000, 0x00000000, 0x24840004, 0x00a01021, 0x1440fffa, 0x24a5ffff,
+	0x03e00008, 0x00000000, 0x0000000d, 0x03e00008, 0x00000000, 0x00000000};
+
+static u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
+static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
+
+static const int bnx2_TXP_b06FwReleaseMajor = 0x1;
+static const int bnx2_TXP_b06FwReleaseMinor = 0x0;
+static const int bnx2_TXP_b06FwReleaseFix = 0x0;
+static const u32 bnx2_TXP_b06FwStartAddr = 0x080034b0;
+static const u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
+static const int bnx2_TXP_b06FwTextLen = 0x5748;
+static const u32 bnx2_TXP_b06FwDataAddr = 0x08005760;
+static const int bnx2_TXP_b06FwDataLen = 0x0;
+static const u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
+static const int bnx2_TXP_b06FwRodataLen = 0x0;
+static const u32 bnx2_TXP_b06FwBssAddr = 0x080057a0;
+static const int bnx2_TXP_b06FwBssLen = 0x1c4;
+static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760;
+static const int bnx2_TXP_b06FwSbssLen = 0x38;
+static u32 bnx2_TXP_b06FwText[(0x5748/4) + 1] = {
+	0x0a000d2c, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x322e352e,
+	0x38000000, 0x02050800, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
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+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x10000003, 0x00000000, 0x0000000d, 0x0000000d, 0x3c020800,
+	0x24425760, 0x3c030800, 0x24635964, 0xac400000, 0x0043202b, 0x1480fffd,
+	0x24420004, 0x3c1d0800, 0x37bd7ffc, 0x03a0f021, 0x3c100800, 0x261034b0,
+	0x3c1c0800, 0x279c5760, 0x0e000f5b, 0x00000000, 0x0000000d, 0x8f840014,
+	0x27bdffe8, 0xafb10014, 0xafb00010, 0x8f460104, 0x8f830008, 0x8c8500ac,
+	0xaf430080, 0x948200a8, 0xa7420e10, 0x948300aa, 0xa7430e12, 0x8c8200ac,
+	0xaf420e18, 0x97430e10, 0xa7430e14, 0x97420e12, 0x00008021, 0xa7420e16,
+	0x8f430e18, 0x00006021, 0x00c53023, 0xaf430e1c, 0x10c001a2, 0x2d820001,
+	0x3c0e1000, 0x2419fff8, 0x24110010, 0x240f0f00, 0x3c188100, 0x93620008,
+	0x10400009, 0x00000000, 0x97620010, 0x00c2102b, 0x14400005, 0x00000000,
+	0x97620010, 0x3042ffff, 0x0a000d6d, 0xaf420e00, 0xaf460e00, 0x8f420000,
+	0x30420008, 0x1040fffd, 0x00000000, 0x97420e08, 0x8f450e04, 0x3044ffff,
+	0x30820001, 0x14400005, 0x00000000, 0x14a00005, 0x3083a040, 0x0a000f34,
+	0x00000000, 0x0000000d, 0x3083a040, 0x24020040, 0x1462004f, 0x3082a000,
+	0x308a0036, 0x8f88000c, 0x30890008, 0x24020800, 0xaf420178, 0x01001821,
+	0x9742008a, 0x00431023, 0x2442ffff, 0x30421fff, 0x2c420008, 0x1440fffa,
+	0x00a06021, 0x8f820018, 0x00cc3023, 0x24070001, 0x8f830008, 0x304b00ff,
+	0x24420001, 0xaf820018, 0x25024000, 0x106f0005, 0x03422021, 0x93820012,
+	0x30420007, 0x00021240, 0x34470001, 0x000b1400, 0x3c030100, 0x00431025,
+	0xac820000, 0x8f830018, 0x00ea3825, 0x1120000f, 0xac830004, 0x97430e0a,
+	0x8f84000c, 0x00ee3825, 0x2402000e, 0x00781825, 0xaf430160, 0x25830006,
+	0x24840008, 0x30841fff, 0xa742015a, 0xa7430158, 0xaf84000c, 0x0a000db7,
+	0x00000000, 0x8f83000c, 0x25820002, 0xa7420158, 0x24630008, 0x30631fff,
+	0xaf83000c, 0x54c0000f, 0x8f420e14, 0x8f820008, 0x504f0002, 0x24100001,
+	0x34e70040, 0x97420e10, 0x97430e12, 0x8f850014, 0x00021400, 0x00621825,
+	0xaca300a8, 0x8f840014, 0x8f420e18, 0xac8200ac, 0x8f420e14, 0x8f430e1c,
+	0xaf420144, 0xaf430148, 0xa34b0152, 0xaf470154, 0x0a000efb, 0xaf4e0178,
+	0x10400165, 0x00000000, 0x93620008, 0x50400008, 0xafa60008, 0x97620010,
+	0x00a2102b, 0x10400003, 0x30820040, 0x1040015c, 0x00000000, 0xafa60008,
+	0xa7840010, 0xaf850004, 0x93620008, 0x1440005f, 0x27ac0008, 0xaf60000c,
+	0x97820010, 0x30424000, 0x10400002, 0x2403000e, 0x24030016, 0xa363000a,
+	0x24034007, 0xaf630014, 0x93820012, 0x8f630014, 0x30420007, 0x00021240,
+	0x00621825, 0xaf630014, 0x97820010, 0x8f630014, 0x30420010, 0x00621825,
+	0xaf630014, 0x97820010, 0x30420008, 0x5040000e, 0x00002821, 0x8f620014,
+	0x004e1025, 0xaf620014, 0x97430e0a, 0x2402000e, 0x00781825, 0xaf630004,
+	0xa3620002, 0x9363000a, 0x3405fffc, 0x24630004, 0x0a000e06, 0xa363000a,
+	0xaf600004, 0xa3600002, 0x97820010, 0x9363000a, 0x30421f00, 0x00021182,
+	0x24420028, 0x00621821, 0xa3630009, 0x97420e0c, 0xa7620010, 0x93630009,
+	0x24020008, 0x24630002, 0x30630007, 0x00431023, 0x30420007, 0xa362000b,
+	0x93640009, 0x97620010, 0x8f890004, 0x97830010, 0x00441021, 0x00a21021,
+	0x30630040, 0x10600007, 0x3045ffff, 0x00a9102b, 0x14400005, 0x0125102b,
+	0x3c068000, 0x0a000e3a, 0x00005821, 0x0125102b, 0x544000c7, 0x00006021,
+	0x97420e14, 0xa7420e10, 0x97430e16, 0xa7430e12, 0x8f420e1c, 0xaf420e18,
+	0xaf450e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000, 0x97420e08,
+	0x00a04821, 0xa7820010, 0x8f430e04, 0x00003021, 0x240b0001, 0xaf830004,
+	0x97620010, 0x0a000e4c, 0x304dffff, 0x8f890004, 0x97820010, 0x30420040,
+	0x10400004, 0x01206821, 0x3c068000, 0x0a000e4c, 0x00005821, 0x97630010,
+	0x8f820004, 0x10430003, 0x00003021, 0x0a000eee, 0x00006021, 0x240b0001,
+	0x8d820000, 0x00491023, 0x1440000d, 0xad820000, 0x8f620014, 0x34420040,
+	0xaf620014, 0x97430e10, 0x97420e12, 0x8f840014, 0x00031c00, 0x00431025,
+	0xac8200a8, 0x8f830014, 0x8f420e18, 0xac6200ac, 0x93620008, 0x1440003e,
+	0x00000000, 0x25260002, 0x8f84000c, 0x9743008a, 0x3063ffff, 0xafa30000,
+	0x8fa20000, 0x00441023, 0x2442ffff, 0x30421fff, 0x2c420010, 0x1440fff7,
+	0x00000000, 0x8f82000c, 0x8f830018, 0x00021082, 0x00021080, 0x24424000,
+	0x03422821, 0x00605021, 0x24630001, 0x314200ff, 0x00021400, 0xaf830018,
+	0x3c033200, 0x00431025, 0xaca20000, 0x93630009, 0x9362000a, 0x00031c00,
+	0x00431025, 0xaca20004, 0x8f830018, 0xaca30008, 0x97820010, 0x30420008,
+	0x10400002, 0x00c04021, 0x25280006, 0x97430e14, 0x93640002, 0x8f450e1c,
+	0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0xa7420146,
+	0xaf450148, 0xa34a0152, 0x8f82000c, 0x308400ff, 0xa744015a, 0xaf460160,
+	0xa7480158, 0xaf470154, 0xaf4e0178, 0x00511021, 0x30421fff, 0xaf82000c,
+	0x0a000ed9, 0x8d820000, 0x93620009, 0x9363000b, 0x8f85000c, 0x2463000a,
+	0x00435021, 0x25440007, 0x00992024, 0x9743008a, 0x3063ffff, 0xafa30000,
+	0x8fa20000, 0x00451023, 0x2442ffff, 0x30421fff, 0x0044102b, 0x1440fff7,
+	0x00000000, 0x8f82000c, 0x8f840018, 0x00021082, 0x00021080, 0x24424000,
+	0x03422821, 0x00804021, 0x24840001, 0xaf840018, 0x93630009, 0x310200ff,
+	0x00022400, 0x3c024100, 0x24630002, 0x00621825, 0x00832025, 0xaca40000,
+	0x8f62000c, 0x00461025, 0xaca20004, 0x97430e14, 0x93640002, 0x8f450e1c,
+	0x8f660004, 0x8f670014, 0x3063ffff, 0xa7430144, 0x97420e16, 0x308400ff,
+	0xa7420146, 0xaf450148, 0xa3480152, 0x8f83000c, 0x25420007, 0x00591024,
+	0xa744015a, 0xaf460160, 0xa7490158, 0xaf470154, 0xaf4e0178, 0x00621821,
+	0x30631fff, 0xaf83000c, 0x8d820000, 0x14400005, 0x00000000, 0x8f620014,
+	0x2403ffbf, 0x00431024, 0xaf620014, 0x8f62000c, 0x004d1021, 0xaf62000c,
+	0x93630008, 0x14600008, 0x00000000, 0x11600006, 0x00000000, 0x8f630014,
+	0x3c02efff, 0x3442fffe, 0x00621824, 0xaf630014, 0xa36b0008, 0x01206021,
+	0x1580000c, 0x8fa60008, 0x97420e14, 0x97430e16, 0x8f850014, 0x00021400,
+	0x00621825, 0xaca300a8, 0x8f840014, 0x8f420e1c, 0xac8200ac, 0x0a000efd,
+	0x2d820001, 0x14c0fe65, 0x2d820001, 0x00501025, 0x10400058, 0x24020f00,
+	0x8f830008, 0x14620023, 0x3c048000, 0x11800009, 0x3c038000, 0x97420e08,
+	0x30420040, 0x14400005, 0x00000000, 0x0000000d, 0x00000000, 0x2400032c,
+	0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x00000000, 0x97420e10,
+	0x3c030500, 0x00431025, 0xaf42014c, 0x97430e14, 0xa7430144, 0x97420e16,
+	0xa7420146, 0x8f430e1c, 0x24022000, 0xaf430148, 0x3c031000, 0xa3400152,
+	0xa740015a, 0xaf400160, 0xa7400158, 0xaf420154, 0xaf430178, 0x8f830008,
+	0x3c048000, 0x8f420178, 0x00441024, 0x1440fffd, 0x24020f00, 0x10620016,
+	0x00000000, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c,
+	0x3c031000, 0xaf420148, 0x0a000f51, 0x24020240, 0x97420e14, 0x97430e16,
+	0x8f840014, 0x00021400, 0x00621825, 0xac8300a8, 0x8f850014, 0x8f420e1c,
+	0x00006021, 0xaca200ac, 0x0a000efd, 0x2d820001, 0xaf40014c, 0x11800007,
+	0x00000000, 0x97420e10, 0xa7420144, 0x97430e12, 0xa7430146, 0x0a000f4e,
+	0x8f420e18, 0x97420e14, 0xa7420144, 0x97430e16, 0xa7430146, 0x8f420e1c,
+	0xaf420148, 0x24020040, 0x3c031000, 0xa3400152, 0xa740015a, 0xaf400160,
+	0xa7400158, 0xaf420154, 0xaf430178, 0x8fb10014, 0x8fb00010, 0x03e00008,
+	0x27bd0018, 0x27bdffd0, 0x3c1a8000, 0x3c0420ff, 0x3484fffd, 0x3c020008,
+	0x03421821, 0xafbf002c, 0xafb60028, 0xafb50024, 0xafb40020, 0xafb3001c,
+	0xafb20018, 0xafb10014, 0xafb00010, 0xaf830014, 0xaf440e00, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd,
+	0x3c046004, 0xaf420e00, 0x8c835000, 0x24160800, 0x24150d00, 0x3c140800,
+	0x24130f00, 0x3c120800, 0x3c114000, 0x2402ff7f, 0x00621824, 0x3463380c,
+	0x24020009, 0xac835000, 0xaf420008, 0xaf800018, 0xaf80000c, 0x0e001559,
+	0x00000000, 0x0e000ff0, 0x00000000, 0x3c020800, 0x245057c0, 0x8f420000,
+	0x30420001, 0x1040fffd, 0x00000000, 0x8f440100, 0xaf840008, 0xaf440020,
+	0xaf560178, 0x93430108, 0xa3830012, 0x93820012, 0x30420001, 0x10400008,
+	0x00000000, 0x93820012, 0x30420006, 0x00021100, 0x0e000d43, 0x0050d821,
+	0x0a000fac, 0x00000000, 0x14950005, 0x00000000, 0x0e000d43, 0x269b5840,
+	0x0a000fac, 0x00000000, 0x14930005, 0x00000000, 0x0e000d43, 0x265b5860,
+	0x0a000fac, 0x00000000, 0x0e0010ea, 0x00000000, 0xaf510138, 0x0a000f89,
+	0x00000000, 0x27bdfff8, 0x3084ffff, 0x24820007, 0x3044fff8, 0x8f85000c,
+	0x9743008a, 0x3063ffff, 0xafa30000, 0x8fa20000, 0x00451023, 0x2442ffff,
+	0x30421fff, 0x0044102b, 0x1440fff7, 0x00000000, 0x8f82000c, 0x00021082,
+	0x00021080, 0x24424000, 0x03421021, 0x03e00008, 0x27bd0008, 0x3084ffff,
+	0x8f82000c, 0x24840007, 0x3084fff8, 0x00441021, 0x30421fff, 0xaf82000c,
+	0x03e00008, 0x00000000, 0x27bdffe8, 0x3c1a8000, 0x3c0420ff, 0x3484fffd,
+	0x3c020008, 0x03421821, 0xafbf0010, 0xaf830014, 0xaf440e00, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3c0200ff, 0x3442fffd,
+	0x3c046004, 0xaf420e00, 0x8c825000, 0x2403ff7f, 0x00431024, 0x3442380c,
+	0x24030009, 0xac825000, 0xaf430008, 0xaf800018, 0xaf80000c, 0x0e001559,
+	0x00000000, 0x0e000ff0, 0x00000000, 0x8fbf0010, 0x03e00008, 0x27bd0018,
+	0x27bdffe8, 0x3c02000a, 0x03421821, 0x3c040800, 0x24845880, 0x24050019,
+	0xafbf0010, 0xaf830024, 0x0e001565, 0x00003021, 0x3c050800, 0x3c020800,
+	0x24425330, 0xaca258e8, 0x24a558e8, 0x3c020800, 0x244254f8, 0x3c030800,
+	0x2463550c, 0x3c040800, 0xaca20004, 0x3c020800, 0x24425338, 0xaca30008,
+	0xac825900, 0x24845900, 0x3c020800, 0x244253c4, 0x3c070800, 0x24e75404,
+	0x3c060800, 0x24c65520, 0x3c050800, 0x24a55438, 0x3c030800, 0xac820004,
+	0x3c020800, 0x24425528, 0xac870008, 0xac86000c, 0xac850010, 0xac625920,
+	0x24635920, 0x8fbf0010, 0x3c020800, 0x24425540, 0xac620004, 0x3c020800,
+	0xac670008, 0xac66000c, 0xac650010, 0xac400048, 0x03e00008, 0x27bd0018,
+	0x974309da, 0x00804021, 0xad030000, 0x8f4209dc, 0xad020004, 0x8f4309e0,
+	0xad030008, 0x934409d9, 0x24020001, 0x30840003, 0x1082001f, 0x30a900ff,
+	0x28820002, 0x10400005, 0x24020002, 0x10800009, 0x3c0a0800, 0x0a001078,
+	0x93420934, 0x1082000b, 0x24020003, 0x10820026, 0x3c0a0800, 0x0a001078,
+	0x93420934, 0x974209e4, 0x00021400, 0x34420800, 0xad02000c, 0x0a001077,
+	0x25080010, 0x974209e4, 0x00021400, 0x34428100, 0xad02000c, 0x974309e8,
+	0x3c0a0800, 0x00031c00, 0x34630800, 0xad030010, 0x0a001077, 0x25080014,
+	0x974409e4, 0x3c050800, 0x24a25880, 0x9443001c, 0x94460014, 0x94470010,
+	0x00a05021, 0x24020800, 0xad000010, 0xad020014, 0x00042400, 0x00661821,
+	0x00671823, 0x2463fff2, 0x00832025, 0xad04000c, 0x0a001077, 0x25080018,
+	0x974209e4, 0x3c050800, 0x00021400, 0x34428100, 0xad02000c, 0x974409e8,
+	0x24a25880, 0x9443001c, 0x94460014, 0x94470010, 0x00a05021, 0x24020800,
+	0xad000014, 0xad020018, 0x00042400, 0x00661821, 0x00671823, 0x2463ffee,
+	0x00832025, 0xad040010, 0x2508001c, 0x93420934, 0x93450921, 0x3c074000,
+	0x25445880, 0x94830018, 0x94860014, 0x00021082, 0x00021600, 0x00052c00,
+	0x00a72825, 0x00451025, 0x00661821, 0x00431025, 0xad020000, 0x9783002c,
+	0x974209ea, 0x00621821, 0x00031c00, 0xad030004, 0x9782002c, 0x24420001,
+	0x30427fff, 0xa782002c, 0x93430920, 0x3c020006, 0x00031e00, 0x00621825,
+	0xad030008, 0x8f42092c, 0xad02000c, 0x8f430930, 0xad030010, 0x8f440938,
+	0x25080014, 0xad040000, 0x8f820020, 0x11200004, 0xad020004, 0x8f420940,
+	0x0a0010a1, 0x2442ffff, 0x8f420940, 0xad020008, 0x8f440948, 0x8f420940,
+	0x93430936, 0x00823023, 0x00663006, 0x3402ffff, 0x0046102b, 0x54400001,
+	0x3406ffff, 0x93420937, 0x25445880, 0x90830024, 0xad000010, 0x00021700,
+	0x34630010, 0x00031c00, 0x00431025, 0x00461025, 0xad02000c, 0x8c830008,
+	0x14600031, 0x25080014, 0x3c020800, 0x8c430048, 0x1060002d, 0x00000000,
+	0x9342010b, 0xad020000, 0x8f830000, 0x8c6200b0, 0xad020004, 0x8f830000,
+	0x8c6200b4, 0xad020008, 0x8f830000, 0x8c6200c0, 0xad02000c, 0x8f830000,
+	0x8c6200c4, 0xad020010, 0x8f830000, 0x8c6200c8, 0xad020014, 0x8f830000,
+	0x8c6200cc, 0xad020018, 0x8f830000, 0x8c6200e0, 0xad02001c, 0x8f830000,
+	0x8c6200e8, 0xad020020, 0x8f830000, 0x8c6200f0, 0x3c04600e, 0xad020024,
+	0x8c8200d0, 0xad020028, 0x8c8300d4, 0xad03002c, 0x8f820028, 0x3c046012,
+	0xad020030, 0x8c8200a8, 0xad020034, 0x8c8300ac, 0x3c026000, 0xad030038,
+	0x8c434448, 0xad03003c, 0x03e00008, 0x01001021, 0x27bdffa8, 0x3c020008,
+	0x03423021, 0xafbf0054, 0xafbe0050, 0xafb7004c, 0xafb60048, 0xafb50044,
+	0xafb40040, 0xafb3003c, 0xafb20038, 0xafb10034, 0xafb00030, 0xaf860000,
+	0x24020040, 0xaf420814, 0xaf400810, 0x8f420944, 0x8f430950, 0x8f440954,
+	0x8f45095c, 0xaf820034, 0xaf830020, 0xaf84001c, 0xaf850030, 0x90c20000,
+	0x24030020, 0x304400ff, 0x10830005, 0x24020030, 0x10820022, 0x3c030800,
+	0x0a001139, 0x8c62002c, 0x24020088, 0xaf420818, 0x3c020800, 0x244258e8,
+	0xafa20020, 0x93430109, 0x3c020800, 0x10600009, 0x24575900, 0x3c026000,
+	0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000,
+	0x24000376, 0x9342010a, 0x30420080, 0x14400021, 0x24020800, 0x3c026000,
+	0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000,
+	0x2400037d, 0x0a001141, 0x24020800, 0x93430109, 0x3063007f, 0x00031140,
+	0x000318c0, 0x00431021, 0x24430088, 0xaf430818, 0x0000000d, 0x3c020800,
+	0x24425940, 0x3c030800, 0x24775950, 0x0a001140, 0xafa20020, 0x24420001,
+	0xac62002c, 0x0000000d, 0x00000000, 0x24000395, 0x0a0014c1, 0x8fbf0054,
+	0x24020800, 0xaf420178, 0x8f450104, 0x8f420988, 0x00a21023, 0x58400005,
+	0x8f4309a0, 0x0000000d, 0x00000000, 0x240003b1, 0x8f4309a0, 0x3c100800,
+	0xae0358b0, 0x8f4209a4, 0x8f830020, 0x260458b0, 0x2491ffd0, 0xae220034,
+	0x00a21023, 0xae230028, 0xac82ffd0, 0x8fa30020, 0x8c620000, 0x0040f809,
+	0x0200b021, 0x00409021, 0x32440010, 0x32420002, 0x10400007, 0xafa40024,
+	0x8e220020, 0x32530040, 0x2403ffbf, 0x00431024, 0x0a001493, 0xae220020,
+	0x32420020, 0x10400002, 0x3c020800, 0x24575920, 0x32420001, 0x14400007,
+	0x00000000, 0x8f820008, 0xaf420080, 0x8ec358b0, 0xaf430e10, 0x8e220034,
+	0xaf420e18, 0x9343010b, 0x93420905, 0x30420008, 0x1040003c, 0x307400ff,
+	0x8f820000, 0x8c430074, 0x0460000a, 0x00000000, 0x3c026000, 0x24030100,
+	0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d, 0x00000000, 0x240003ed,
+	0x8f820000, 0x9044007b, 0x9343010a, 0x14830027, 0x32530040, 0x00003821,
+	0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd,
+	0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100,
+	0xaf420148, 0x24020047, 0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000,
+	0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001, 0xad230030,
+	0x9342010a, 0x3c030047, 0xafa50014, 0x00021600, 0x00431025, 0x00471025,
+	0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b,
+	0x3c070100, 0x3c050800, 0x24a25880, 0x0a001250, 0x8c430020, 0x32820002,
+	0x10400050, 0x00000000, 0x0e0015b9, 0x32530040, 0x3c039000, 0x34630001,
+	0x8f820008, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024,
+	0x1440fffd, 0x00000000, 0x8f830000, 0x90620005, 0x34420008, 0xa0620005,
+	0x8f840000, 0x8c820074, 0x3c038000, 0x00431025, 0xac820074, 0x90830000,
+	0x24020020, 0x10620004, 0x00000000, 0x0000000d, 0x00000000, 0x2400040b,
+	0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x9084007b,
+	0x9342010a, 0x14820028, 0x3c030800, 0x00003821, 0x24052000, 0x3c090800,
+	0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0,
+	0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030100, 0xaf420148, 0x24020046,
+	0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154,
+	0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030046,
+	0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b,
+	0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070100, 0x3c030800,
+	0x24625880, 0x0a001250, 0x8c430020, 0x93420108, 0x30420010, 0x50400056,
+	0x9343093f, 0x8f860000, 0x90c2007f, 0x8cc30178, 0x304800ff, 0x15030004,
+	0x00000000, 0x0000000d, 0x00000000, 0x24000425, 0x90c2007e, 0x90c40080,
+	0x00081c00, 0x00021600, 0x00431025, 0x00042200, 0x90c3007a, 0x90c5000a,
+	0x00441025, 0x11050028, 0x00623825, 0xa0c8000a, 0x00004021, 0x24056000,
+	0x3c090800, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0,
+	0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034, 0xaf420148, 0x24020052,
+	0xaf47014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7480158, 0xaf450154,
+	0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030052,
+	0xafa50014, 0x00021600, 0x00431025, 0x00481025, 0xafa20010, 0x9343010b,
+	0xafa30018, 0x8f440100, 0x0e00159b, 0x8f450104, 0x0a00124a, 0x00000000,
+	0x3c026000, 0x24030100, 0xac43081c, 0x3c030001, 0xac43081c, 0x0000000d,
+	0x00000000, 0x2400043e, 0x16800009, 0x3c050800, 0x3c040800, 0x24825880,
+	0x8c430020, 0x32530040, 0x2404ffbf, 0x00641824, 0x0a001493, 0xac430020,
+	0x8ca25880, 0x10400005, 0x3c030800, 0x8c620034, 0xaca05880, 0x24420001,
+	0xac620034, 0x9343093f, 0x24020012, 0x5462000e, 0x97420908, 0x32820038,
+	0x14400009, 0x3c030800, 0x8f830000, 0x8c62004c, 0xac62005c, 0x3c020800,
+	0x24445880, 0x8c820020, 0x0a001285, 0x32530040, 0xac605880, 0x97420908,
+	0x5440001c, 0x97420908, 0x3c039000, 0x34630001, 0x8f820008, 0x32530040,
+	0x3c048000, 0x00431025, 0xaf420020, 0x8f420020, 0x00441024, 0x1440fffd,
+	0x3c028000, 0x8f840000, 0x8f850008, 0x8c830050, 0x34420001, 0x00a22825,
+	0xaf830020, 0xac830070, 0xac83005c, 0xaf450020, 0x3c050800, 0x24a45880,
+	0x8c820020, 0x2403ffbf, 0x00431024, 0x0a001493, 0xac820020, 0x000211c0,
+	0xaf420024, 0x97420908, 0x3c030080, 0x34630003, 0x000211c0, 0xaf42080c,
+	0xaf43081c, 0x974209ec, 0x8f4309a4, 0xa782002c, 0x3c020800, 0x24445880,
+	0xac83002c, 0x93420937, 0x93430934, 0x00021080, 0x00621821, 0xa4830018,
+	0x934209d8, 0x32850038, 0xafa50028, 0x00621821, 0xa483001a, 0x934209d8,
+	0x93430934, 0x3c1e0800, 0x00809821, 0x00431021, 0x24420010, 0xa4820016,
+	0x24020006, 0xae620020, 0x8fa20028, 0x10400003, 0x0000a821, 0x0a0012f0,
+	0x24120008, 0x8f420958, 0x8f830020, 0x8f840030, 0x00431023, 0x00832023,
+	0x04800003, 0xae620004, 0x04410003, 0x0082102b, 0x0a0012bc, 0xae600004,
+	0x54400001, 0xae640004, 0x8ee20000, 0x0040f809, 0x00000000, 0x00409021,
+	0x32420001, 0x5440001e, 0x8ee20004, 0x8e630008, 0x1060002b, 0x3c02c000,
+	0x00621025, 0xaf420e00, 0x8f420000, 0x30420008, 0x1040fffd, 0x00000000,
+	0x97420e08, 0xa7820010, 0x8f430e04, 0x8e620008, 0xaf830004, 0x8f840004,
+	0x0044102b, 0x1040000b, 0x24150001, 0x24020100, 0x3c016000, 0xac22081c,
+	0x3c020001, 0x3c016000, 0xac22081c, 0x0000000d, 0x00000000, 0x240004cd,
+	0x24150001, 0x8ee20004, 0x0040f809, 0x00000000, 0x02429025, 0x32420002,
+	0x5040001d, 0x8f470940, 0x12a00006, 0x8ec258b0, 0x8f830000, 0xac6200a8,
+	0x8f840000, 0x8e620034, 0xac8200ac, 0x32420004, 0x50400013, 0x8f470940,
+	0x3c020800, 0x3283007d, 0x10600110, 0x24575920, 0x32820001, 0x50400006,
+	0x36520002, 0x8f830034, 0x8f420940, 0x10620109, 0x00000000, 0x36520002,
+	0x24020008, 0xa6600010, 0xa6620012, 0xae600008, 0xa2600024, 0x8f470940,
+	0x3c030800, 0x24685880, 0x8d02002c, 0x8d050008, 0x95040010, 0x9506000a,
+	0x95030026, 0x00451021, 0x00862021, 0x00641821, 0xaf870034, 0xad02002c,
+	0x32820030, 0x10400008, 0xa5030014, 0x91020024, 0x32910040, 0x34420004,
+	0xa1020024, 0xaf400048, 0x0a001345, 0x3c040800, 0x93420923, 0x30420002,
+	0x10400029, 0x32910040, 0x8f830000, 0x8f840020, 0x8c620084, 0x00441023,
+	0x0442000a, 0x3c039000, 0x95020014, 0x8c630084, 0x00821021, 0x00621823,
+	0x1c600004, 0x3c039000, 0x91020024, 0x34420001, 0xa1020024, 0x34630001,
+	0x8f820008, 0x32910040, 0x3c048000, 0x00431025, 0xaf420020, 0x8f420020,
+	0x00441024, 0x1440fffd, 0x00000000, 0x8f840000, 0x9083003f, 0x2402000a,
+	0x10620005, 0x2402000c, 0x9083003f, 0x24020008, 0x14620002, 0x24020014,
+	0xa082003f, 0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020,
+	0x3c040800, 0x24865880, 0x94c20010, 0x94c3001a, 0x8cc40008, 0x00432821,
+	0x14800006, 0xa4c5001c, 0x3c020800, 0x8c430048, 0x10600002, 0x24a20040,
+	0xa4c2001c, 0x27d05880, 0x9604001c, 0x96020012, 0x00822021, 0x24840002,
+	0x0e000faf, 0x3084ffff, 0x8f850018, 0x00a01821, 0xa2030025, 0x8ee60008,
+	0x00402021, 0x24a50001, 0xaf850018, 0x00c0f809, 0x00000000, 0x00402021,
+	0x0e001026, 0x02202821, 0x8ee3000c, 0x0060f809, 0x00402021, 0x9604001c,
+	0x96020012, 0x00822021, 0x24840002, 0x0e000fc5, 0x3084ffff, 0x8fc25880,
+	0x8e030008, 0x00431023, 0x14400012, 0xafc25880, 0x54600006, 0x8e020020,
+	0x3243004a, 0x24020002, 0x14620005, 0x00000000, 0x8e020020, 0x34420040,
+	0x0a001382, 0xae020020, 0x52a00006, 0x36520002, 0x8e020030, 0xaf420e10,
+	0x8e030034, 0xaf430e18, 0x36520002, 0x52a00008, 0x96670014, 0x8f830000,
+	0x8f420e10, 0xac6200a8, 0x8f840000, 0x8f420e18, 0xac8200ac, 0x96670014,
+	0x92680024, 0x24020040, 0xaf420814, 0x8f830020, 0x8f82001c, 0x00671821,
+	0x00621023, 0xaf830020, 0x18400008, 0x00000000, 0x8f820000, 0xaf83001c,
+	0xac430054, 0x54e00005, 0xaf400040, 0x0a0013a0, 0x8f42095c, 0x54e00001,
+	0xaf400044, 0x8f42095c, 0x31030008, 0xaf820030, 0x1060001a, 0x00000000,
+	0x8f840000, 0x90820120, 0x90830121, 0x304600ff, 0x00c31823, 0x30630007,
+	0x24020007, 0x1062000e, 0x00000000, 0x90820122, 0x304200fe, 0xa0820122,
+	0x8f850000, 0x00061880, 0x8f840020, 0x24a20100, 0x00431021, 0x24c30001,
+	0x30630007, 0xac440000, 0x0a0013bd, 0xa0a30120, 0x90820122, 0x34420001,
+	0xa0820122, 0x14e00003, 0x31020001, 0x10400031, 0x32510002, 0x8f820000,
+	0x8c43000c, 0x30630001, 0x1060002c, 0x32510002, 0x3c029000, 0x8f830008,
+	0x34420001, 0x3c048000, 0x00621825, 0xaf430020, 0x8f420020, 0x00441024,
+	0x1440fffd, 0x00000000, 0x8f870000, 0x8ce2000c, 0x30420001, 0x10400018,
+	0x00000000, 0x94e2006a, 0x00022880, 0x50a00001, 0x24050001, 0x94e30068,
+	0x90e40081, 0x3c020800, 0x8c460024, 0x00652821, 0x00852804, 0x00c5102b,
+	0x54400001, 0x00a03021, 0x3c020800, 0x8c440028, 0x00c4182b, 0x54600001,
+	0x00c02021, 0x8f430074, 0x2402fffe, 0x00822824, 0x00a31821, 0xace3000c,
+	0x8f830008, 0x3c028000, 0x34420001, 0x00621825, 0xaf430020, 0x8f820020,
+	0x3c050800, 0x24b05880, 0xae020028, 0x8ee30010, 0x0060f809, 0x00000000,
+	0x8f820028, 0x24420001, 0xaf820028, 0x12a00005, 0xaf40004c, 0x8f420e10,
+	0xae020030, 0x8f430e18, 0xae030034, 0x1220fea7, 0x24020006, 0x8f870024,
+	0x9786002c, 0x8f830000, 0x8f820034, 0x8f840020, 0x8f85001c, 0x32530040,
+	0xa4e6002c, 0xac620044, 0x32420008, 0xac640050, 0xac650054, 0x1040007a,
+	0x32820020, 0x10400027, 0x32910010, 0x00003821, 0x24052000, 0x3c090800,
+	0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd, 0x8ec258b0, 0x26c458b0,
+	0x2484ffd0, 0xaf420144, 0x8c820034, 0x3c030400, 0xaf420148, 0x24020041,
+	0xaf43014c, 0xa3420152, 0x8d230030, 0x3c021000, 0xa7470158, 0xaf450154,
+	0xaf420178, 0x8c860034, 0x24630001, 0xad230030, 0x9342010a, 0x3c030041,
+	0xafa50014, 0x00021600, 0x00431025, 0x00471025, 0xafa20010, 0x9343010b,
+	0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x3c070400, 0x12200028,
+	0x00003821, 0x24052000, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024,
+	0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034,
+	0x3c030300, 0xaf420148, 0x2402004e, 0xaf43014c, 0xa3420152, 0x8d230030,
+	0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001,
+	0xad230030, 0x9342010a, 0x3c03004e, 0xafa50014, 0x00021600, 0x00431025,
+	0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104,
+	0x0e00159b, 0x3c070300, 0x0a00148b, 0x8fa20024, 0x32820008, 0x10400026,
+	0x24052000, 0x00003821, 0x3c090800, 0x3c038000, 0x8f420178, 0x00431024,
+	0x1440fffd, 0x8ec258b0, 0x26c458b0, 0x2484ffd0, 0xaf420144, 0x8c820034,
+	0x3c030200, 0xaf420148, 0x2402004b, 0xaf43014c, 0xa3420152, 0x8d230030,
+	0x3c021000, 0xa7470158, 0xaf450154, 0xaf420178, 0x8c860034, 0x24630001,
+	0xad230030, 0x9342010a, 0x3c03004b, 0xafa50014, 0x00021600, 0x00431025,
+	0x00471025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100, 0x8f450104,
+	0x0e00159b, 0x3c070200, 0x8fa20024, 0x14400004, 0x8fa30020, 0x32420010,
+	0x10400004, 0x00000000, 0x8c620004, 0x0040f809, 0x00000000, 0x12600006,
+	0x8fa40020, 0x8c820008, 0x0040f809, 0x00000000, 0x0a0014c1, 0x8fbf0054,
+	0x3c030800, 0x8c6258a0, 0x30420040, 0x14400023, 0x8fbf0054, 0x00002821,
+	0x24040040, 0x8f870020, 0x3c038000, 0x8f420178, 0x00431024, 0x1440fffd,
+	0x8ec258b0, 0x26c358b0, 0x2463ffd0, 0xaf420144, 0x8c620034, 0xaf420148,
+	0x24020049, 0xaf47014c, 0xa3420152, 0x3c021000, 0xa7450158, 0xaf440154,
+	0xaf420178, 0x8c660034, 0x9342010a, 0x3c030049, 0xafa40014, 0x00021600,
+	0x00431025, 0x00451025, 0xafa20010, 0x9343010b, 0xafa30018, 0x8f440100,
+	0x0e00159b, 0x8f450104, 0x8fbf0054, 0x8fbe0050, 0x8fb7004c, 0x8fb60048,
+	0x8fb50044, 0x8fb40040, 0x8fb3003c, 0x8fb20038, 0x8fb10034, 0x8fb00030,
+	0x03e00008, 0x27bd0058, 0x03e00008, 0x00001021, 0x3c020800, 0x24435880,
+	0x8c650004, 0x8c445880, 0x0085182b, 0x10600002, 0x00403021, 0x00802821,
+	0x9744093c, 0x00a4102b, 0x54400001, 0x00a02021, 0x93420923, 0x0004182b,
+	0x00021042, 0x30420001, 0x00431024, 0x1040000d, 0x24c25880, 0x8f850000,
+	0x8f830020, 0x8ca20084, 0x00431023, 0x04420007, 0x24c25880, 0x8ca20084,
+	0x00641821, 0x00431023, 0x28420001, 0x00822023, 0x24c25880, 0xac440008,
+	0xa4400026, 0x03e00008, 0x00001021, 0x8f850004, 0x97840010, 0x3c030800,
+	0x24635880, 0x24020008, 0xa4620012, 0x8f820004, 0xa4600010, 0x000420c2,
+	0x30840008, 0x2c420001, 0x00021023, 0x30420006, 0xac650008, 0x03e00008,
+	0xa0640024, 0x3c020800, 0x24425880, 0x90450025, 0x9443001c, 0x3c021100,
+	0xac800004, 0x00052c00, 0x24630002, 0x00621825, 0x00a32825, 0x24820008,
+	0x03e00008, 0xac850000, 0x27bdffd8, 0x3c020800, 0x24425880, 0xafbf0020,
+	0x90480025, 0x8c440008, 0x8c460020, 0x8f870020, 0x3c030800, 0x3c058000,
+	0x8f420178, 0x00451024, 0x1440fffd, 0x8c6258b0, 0x246358b0, 0x2469ffd0,
+	0xaf420144, 0x8d220034, 0x30c32000, 0xaf420148, 0x3c021000, 0xaf47014c,
+	0xa3480152, 0xa7440158, 0xaf460154, 0xaf420178, 0x10600004, 0x3c030800,
+	0x8c620030, 0x24420001, 0xac620030, 0x9342010a, 0x00081c00, 0x3084ffff,
+	0xafa60014, 0x00021600, 0x00431025, 0x00441025, 0xafa20010, 0x9343010b,
+	0xafa30018, 0x8f440100, 0x8f450104, 0x0e00159b, 0x8d260034, 0x8fbf0020,
+	0x03e00008, 0x27bd0028, 0x0000000d, 0x00000000, 0x2400019d, 0x03e00008,
+	0x00000000, 0x0000000d, 0x00000000, 0x240001a9, 0x03e00008, 0x00000000,
+	0x03e00008, 0x00000000, 0x3c020800, 0x24425880, 0xac400008, 0xa4400026,
+	0x03e00008, 0x24020001, 0x3c020800, 0x24425880, 0x24030008, 0xac400008,
+	0xa4400010, 0xa4430012, 0xa0400024, 0x03e00008, 0x24020004, 0x03e00008,
+	0x00001021, 0x10c00007, 0x00000000, 0x8ca20000, 0x24c6ffff, 0x24a50004,
+	0xac820000, 0x14c0fffb, 0x24840004, 0x03e00008, 0x00000000, 0x0a00156c,
+	0x00a01021, 0xac860000, 0x00000000, 0x00000000, 0x24840004, 0x00a01021,
+	0x1440fffa, 0x24a5ffff, 0x03e00008, 0x00000000, 0x3c0a0800, 0x8d490068,
+	0x3c050800, 0x24a52098, 0x00093140, 0x00c51021, 0xac440000, 0x8f440e04,
+	0x00a61021, 0xac440004, 0x97430e08, 0x97420e0c, 0x00a62021, 0x00031c00,
+	0x00431025, 0xac820008, 0x8f430e10, 0x00801021, 0xac43000c, 0x8f440e14,
+	0xac440010, 0x8f430e18, 0x3c0800ff, 0xac430014, 0x8f470e1c, 0x3508ffff,
+	0x25290001, 0xac470018, 0x3c070800, 0x8ce3006c, 0x9344010a, 0x3c026000,
+	0x24630001, 0xace3006c, 0x8c434448, 0x3129007f, 0x00a62821, 0xad490068,
+	0x00042600, 0x00681824, 0x00832025, 0x03e00008, 0xaca4001c, 0x8fac0010,
+	0x8fad0014, 0x8fae0018, 0x3c0b0800, 0x8d6a0060, 0x3c080800, 0x25080080,
+	0x000a4940, 0x01281021, 0x01091821, 0xac440000, 0x00601021, 0xac650004,
+	0xac460008, 0xac67000c, 0xac4c0010, 0xac6d0014, 0x3c036000, 0xac4e0018,
+	0x8c654448, 0x3c040800, 0x8c820064, 0x254a0001, 0x314a00ff, 0x01094021,
+	0xad6a0060, 0x24420001, 0xac820064, 0x03e00008, 0xad05001c, 0x3c030800,
+	0x3c090800, 0x8d250070, 0x246330b0, 0x8f460100, 0x00053900, 0x00e31021,
+	0xac460000, 0x8f440104, 0x00671021, 0xac440004, 0x8f460108, 0x8f840014,
+	0x24a50001, 0xac460008, 0x8c880074, 0x3c060800, 0x8cc20074, 0x30a5003f,
+	0x00671821, 0xad250070, 0x24420001, 0xacc20074, 0x03e00008, 0xac68000c,
+	0x00000000 };
+
+static u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
+static u32 bnx2_TXP_b06FwBss[(0x1c4/4) + 1] = { 0x0 };
+static u32 bnx2_TXP_b06FwSbss[(0x38/4) + 1] = { 0x0 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2.h ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/bnx2.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/bnx2.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,4598 @@
+/* bnx2.h: Broadcom NX2 network driver.
+ *
+ * Copyright (c) 2004, 2005, 2006 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation.
+ *
+ * Written by: Michael Chan  (mchan@broadcom.com)
+ */
+
+FILE_LICENCE ( GPL_ANY );
+
+#ifndef BNX2_H
+#define BNX2_H
+
+#define L1_CACHE_BYTES 128 /* Rough approximaition of the cache line size */
+#define L1_CACHE_ALIGN(X) (((X) + L1_CACHE_BYTES-1)&~(L1_CACHE_BYTES -1))
+
+typedef unsigned long dma_addr_t;
+
+/* From pci.h */
+typedef int pci_power_t;
+
+#define PCI_D0          ((pci_power_t) 0)
+#define PCI_D1          ((pci_power_t) 1)
+#define PCI_D2          ((pci_power_t) 2)
+#define PCI_D3hot       ((pci_power_t) 3)
+#define PCI_D3cold      ((pci_power_t) 4)
+#define PCI_UNKNOWN     ((pci_power_t) 5)
+#define PCI_POWER_ERROR ((pci_power_t) -1)
+
+/* From pci_regs.h */
+
+#define  PCI_CAP_ID_PCIX	0x07	/* PCI-X */
+#define  PCI_X_CMD		2	/* Modes & Features */
+#define  PCI_X_CMD_ERO		0x0002	/* Enable Relaxed Ordering */
+
+/* From mii.h */
+
+/* Indicates what features are advertised by the interface. */
+#define ADVERTISED_10baseT_Half		(1 << 0)
+#define ADVERTISED_10baseT_Full		(1 << 1)
+#define ADVERTISED_100baseT_Half	(1 << 2)
+#define ADVERTISED_100baseT_Full	(1 << 3)
+#define ADVERTISED_1000baseT_Half	(1 << 4)
+#define ADVERTISED_1000baseT_Full	(1 << 5)
+#define ADVERTISED_Autoneg		(1 << 6)
+#define ADVERTISED_TP			(1 << 7)
+#define ADVERTISED_AUI			(1 << 8)
+#define ADVERTISED_MII			(1 << 9)
+#define ADVERTISED_FIBRE		(1 << 10)
+#define ADVERTISED_BNC			(1 << 11)
+
+/* The following are all involved in forcing a particular link
+ * mode for the device for setting things.  When getting the
+ * devices settings, these indicate the current mode and whether
+ * it was foced up into this mode or autonegotiated.
+ */
+
+/* Duplex, half or full. */
+#define DUPLEX_HALF		0x00
+#define DUPLEX_FULL		0x01
+#define DUPLEX_INVALID          0x02
+
+/* Which connector port. */
+#define PORT_TP			0x00
+#define PORT_AUI		0x01
+#define PORT_MII		0x02
+#define PORT_FIBRE		0x03
+#define PORT_BNC		0x04
+
+/* Which tranceiver to use. */
+#define XCVR_INTERNAL		0x00
+#define XCVR_EXTERNAL		0x01
+#define XCVR_DUMMY1		0x02
+#define XCVR_DUMMY2		0x03
+#define XCVR_DUMMY3		0x04
+
+/* Enable or disable autonegotiation.  If this is set to enable,
+ * the forced link modes above are completely ignored.
+ */
+#define AUTONEG_DISABLE		0x00
+#define AUTONEG_ENABLE		0x01
+
+/* Wake-On-Lan options. */
+#define WAKE_PHY		(1 << 0)
+#define WAKE_UCAST		(1 << 1)
+#define WAKE_MCAST		(1 << 2)
+#define WAKE_BCAST		(1 << 3)
+#define WAKE_ARP		(1 << 4)
+#define WAKE_MAGIC		(1 << 5)
+#define WAKE_MAGICSECURE	(1 << 6) /* only meaningful if WAKE_MAGIC */
+
+/* The following are all involved in forcing a particular link
+ *  * mode for the device for setting things.  When getting the
+ *   * devices settings, these indicate the current mode and whether
+ *    * it was foced up into this mode or autonegotiated.
+ *     */
+
+/* The forced speed, 10Mb, 100Mb, gigabit. */
+#define SPEED_10                10
+#define SPEED_100               100
+#define SPEED_1000              1000
+#define SPEED_2500		2500
+#define SPEED_INVALID           0 /* XXX was 3 */
+
+
+/* Duplex, half or full. */
+#define DUPLEX_HALF             0x00
+#define DUPLEX_FULL             0x01
+#define DUPLEX_INVALID          0x02
+
+/* Which connector port. */
+#define PORT_TP                 0x00
+#define PORT_AUI                0x01
+#define PORT_MII                0x02
+#define PORT_FIBRE              0x03
+#define PORT_BNC                0x04
+
+/* Which tranceiver to use. */
+#define XCVR_INTERNAL           0x00
+#define XCVR_EXTERNAL           0x01
+#define XCVR_DUMMY1             0x02
+#define XCVR_DUMMY2             0x03
+#define XCVR_DUMMY3             0x04
+
+/* Enable or disable autonegotiation.  If this is set to enable,
+ *  * the forced link modes above are completely ignored.
+ *   */
+#define AUTONEG_DISABLE         0x00
+#define AUTONEG_ENABLE          0x01
+
+/* Wake-On-Lan options. */
+#define WAKE_PHY                (1 << 0)
+#define WAKE_UCAST              (1 << 1)
+#define WAKE_MCAST              (1 << 2)
+#define WAKE_BCAST              (1 << 3)
+#define WAKE_ARP                (1 << 4)
+#define WAKE_MAGIC              (1 << 5)
+#define WAKE_MAGICSECURE        (1 << 6) /* only meaningful if WAKE_MAGIC */
+
+/* Hardware data structures and register definitions automatically
+ * generated from RTL code. Do not modify.
+ */
+
+/*
+ *  tx_bd definition
+ */
+struct tx_bd {
+	u32 tx_bd_haddr_hi;
+	u32 tx_bd_haddr_lo;                                   
+	u32 tx_bd_mss_nbytes;                                     
+	u32 tx_bd_vlan_tag_flags;                                      
+		#define TX_BD_FLAGS_CONN_FAULT		(1<<0)
+		#define TX_BD_FLAGS_TCP_UDP_CKSUM	(1<<1)
+		#define TX_BD_FLAGS_IP_CKSUM		(1<<2)
+		#define TX_BD_FLAGS_VLAN_TAG		(1<<3)
+		#define TX_BD_FLAGS_COAL_NOW		(1<<4)
+		#define TX_BD_FLAGS_DONT_GEN_CRC	(1<<5)
+		#define TX_BD_FLAGS_END			(1<<6)
+		#define TX_BD_FLAGS_START		(1<<7)
+		#define TX_BD_FLAGS_SW_OPTION_WORD	(0x1f<<8)
+		#define TX_BD_FLAGS_SW_FLAGS		(1<<13)
+		#define TX_BD_FLAGS_SW_SNAP		(1<<14)
+		#define TX_BD_FLAGS_SW_LSO		(1<<15)
+
+};
+
+
+/*
+ *  rx_bd definition
+ */
+struct rx_bd {
+	u32 rx_bd_haddr_hi;
+	u32 rx_bd_haddr_lo;
+	u32 rx_bd_len;
+	u32 rx_bd_flags;
+		#define RX_BD_FLAGS_NOPUSH		(1<<0)
+		#define RX_BD_FLAGS_DUMMY		(1<<1)
+		#define RX_BD_FLAGS_END			(1<<2)
+		#define RX_BD_FLAGS_START		(1<<3)
+
+};
+
+
+/*
+ *  status_block definition
+ */
+struct status_block {
+	u32 status_attn_bits;
+		#define STATUS_ATTN_BITS_LINK_STATE		(1L<<0)
+		#define STATUS_ATTN_BITS_TX_SCHEDULER_ABORT	(1L<<1)
+		#define STATUS_ATTN_BITS_TX_BD_READ_ABORT	(1L<<2)
+		#define STATUS_ATTN_BITS_TX_BD_CACHE_ABORT	(1L<<3)
+		#define STATUS_ATTN_BITS_TX_PROCESSOR_ABORT	(1L<<4)
+		#define STATUS_ATTN_BITS_TX_DMA_ABORT		(1L<<5)
+		#define STATUS_ATTN_BITS_TX_PATCHUP_ABORT	(1L<<6)
+		#define STATUS_ATTN_BITS_TX_ASSEMBLER_ABORT	(1L<<7)
+		#define STATUS_ATTN_BITS_RX_PARSER_MAC_ABORT	(1L<<8)
+		#define STATUS_ATTN_BITS_RX_PARSER_CATCHUP_ABORT	(1L<<9)
+		#define STATUS_ATTN_BITS_RX_MBUF_ABORT		(1L<<10)
+		#define STATUS_ATTN_BITS_RX_LOOKUP_ABORT	(1L<<11)
+		#define STATUS_ATTN_BITS_RX_PROCESSOR_ABORT	(1L<<12)
+		#define STATUS_ATTN_BITS_RX_V2P_ABORT		(1L<<13)
+		#define STATUS_ATTN_BITS_RX_BD_CACHE_ABORT	(1L<<14)
+		#define STATUS_ATTN_BITS_RX_DMA_ABORT		(1L<<15)
+		#define STATUS_ATTN_BITS_COMPLETION_ABORT	(1L<<16)
+		#define STATUS_ATTN_BITS_HOST_COALESCE_ABORT	(1L<<17)
+		#define STATUS_ATTN_BITS_MAILBOX_QUEUE_ABORT	(1L<<18)
+		#define STATUS_ATTN_BITS_CONTEXT_ABORT		(1L<<19)
+		#define STATUS_ATTN_BITS_CMD_SCHEDULER_ABORT	(1L<<20)
+		#define STATUS_ATTN_BITS_CMD_PROCESSOR_ABORT	(1L<<21)
+		#define STATUS_ATTN_BITS_MGMT_PROCESSOR_ABORT	(1L<<22)
+		#define STATUS_ATTN_BITS_MAC_ABORT		(1L<<23)
+		#define STATUS_ATTN_BITS_TIMER_ABORT		(1L<<24)
+		#define STATUS_ATTN_BITS_DMAE_ABORT		(1L<<25)
+		#define STATUS_ATTN_BITS_FLSH_ABORT		(1L<<26)
+		#define STATUS_ATTN_BITS_GRC_ABORT		(1L<<27)
+		#define STATUS_ATTN_BITS_PARITY_ERROR		(1L<<31)
+
+	u32 status_attn_bits_ack;
+#if __BYTE_ORDER == __BIG_ENDIAN
+	u16 status_tx_quick_consumer_index0;
+	u16 status_tx_quick_consumer_index1;
+	u16 status_tx_quick_consumer_index2;
+	u16 status_tx_quick_consumer_index3;
+	u16 status_rx_quick_consumer_index0;
+	u16 status_rx_quick_consumer_index1;
+	u16 status_rx_quick_consumer_index2;
+	u16 status_rx_quick_consumer_index3;
+	u16 status_rx_quick_consumer_index4;
+	u16 status_rx_quick_consumer_index5;
+	u16 status_rx_quick_consumer_index6;
+	u16 status_rx_quick_consumer_index7;
+	u16 status_rx_quick_consumer_index8;
+	u16 status_rx_quick_consumer_index9;
+	u16 status_rx_quick_consumer_index10;
+	u16 status_rx_quick_consumer_index11;
+	u16 status_rx_quick_consumer_index12;
+	u16 status_rx_quick_consumer_index13;
+	u16 status_rx_quick_consumer_index14;
+	u16 status_rx_quick_consumer_index15;
+	u16 status_completion_producer_index;
+	u16 status_cmd_consumer_index;
+	u16 status_idx;
+	u16 status_unused;
+#elif __BYTE_ORDER == __LITTLE_ENDIAN
+	u16 status_tx_quick_consumer_index1;
+	u16 status_tx_quick_consumer_index0;
+	u16 status_tx_quick_consumer_index3;
+	u16 status_tx_quick_consumer_index2;
+	u16 status_rx_quick_consumer_index1;
+	u16 status_rx_quick_consumer_index0;
+	u16 status_rx_quick_consumer_index3;
+	u16 status_rx_quick_consumer_index2;
+	u16 status_rx_quick_consumer_index5;
+	u16 status_rx_quick_consumer_index4;
+	u16 status_rx_quick_consumer_index7;
+	u16 status_rx_quick_consumer_index6;
+	u16 status_rx_quick_consumer_index9;
+	u16 status_rx_quick_consumer_index8;
+	u16 status_rx_quick_consumer_index11;
+	u16 status_rx_quick_consumer_index10;
+	u16 status_rx_quick_consumer_index13;
+	u16 status_rx_quick_consumer_index12;
+	u16 status_rx_quick_consumer_index15;
+	u16 status_rx_quick_consumer_index14;
+	u16 status_cmd_consumer_index;
+	u16 status_completion_producer_index;
+	u16 status_unused;
+	u16 status_idx;
+#endif
+};
+
+
+/*
+ *  statistics_block definition
+ */
+struct statistics_block {
+	u32 stat_IfHCInOctets_hi;
+	u32 stat_IfHCInOctets_lo;
+	u32 stat_IfHCInBadOctets_hi;
+	u32 stat_IfHCInBadOctets_lo;
+	u32 stat_IfHCOutOctets_hi;
+	u32 stat_IfHCOutOctets_lo;
+	u32 stat_IfHCOutBadOctets_hi;
+	u32 stat_IfHCOutBadOctets_lo;
+	u32 stat_IfHCInUcastPkts_hi;
+	u32 stat_IfHCInUcastPkts_lo;
+	u32 stat_IfHCInMulticastPkts_hi;
+	u32 stat_IfHCInMulticastPkts_lo;
+	u32 stat_IfHCInBroadcastPkts_hi;
+	u32 stat_IfHCInBroadcastPkts_lo;
+	u32 stat_IfHCOutUcastPkts_hi;
+	u32 stat_IfHCOutUcastPkts_lo;
+	u32 stat_IfHCOutMulticastPkts_hi;
+	u32 stat_IfHCOutMulticastPkts_lo;
+	u32 stat_IfHCOutBroadcastPkts_hi;
+	u32 stat_IfHCOutBroadcastPkts_lo;
+	u32 stat_emac_tx_stat_dot3statsinternalmactransmiterrors;
+	u32 stat_Dot3StatsCarrierSenseErrors;
+	u32 stat_Dot3StatsFCSErrors;
+	u32 stat_Dot3StatsAlignmentErrors;
+	u32 stat_Dot3StatsSingleCollisionFrames;
+	u32 stat_Dot3StatsMultipleCollisionFrames;
+	u32 stat_Dot3StatsDeferredTransmissions;
+	u32 stat_Dot3StatsExcessiveCollisions;
+	u32 stat_Dot3StatsLateCollisions;
+	u32 stat_EtherStatsCollisions;
+	u32 stat_EtherStatsFragments;
+	u32 stat_EtherStatsJabbers;
+	u32 stat_EtherStatsUndersizePkts;
+	u32 stat_EtherStatsOverrsizePkts;
+	u32 stat_EtherStatsPktsRx64Octets;
+	u32 stat_EtherStatsPktsRx65Octetsto127Octets;
+	u32 stat_EtherStatsPktsRx128Octetsto255Octets;
+	u32 stat_EtherStatsPktsRx256Octetsto511Octets;
+	u32 stat_EtherStatsPktsRx512Octetsto1023Octets;
+	u32 stat_EtherStatsPktsRx1024Octetsto1522Octets;
+	u32 stat_EtherStatsPktsRx1523Octetsto9022Octets;
+	u32 stat_EtherStatsPktsTx64Octets;
+	u32 stat_EtherStatsPktsTx65Octetsto127Octets;
+	u32 stat_EtherStatsPktsTx128Octetsto255Octets;
+	u32 stat_EtherStatsPktsTx256Octetsto511Octets;
+	u32 stat_EtherStatsPktsTx512Octetsto1023Octets;
+	u32 stat_EtherStatsPktsTx1024Octetsto1522Octets;
+	u32 stat_EtherStatsPktsTx1523Octetsto9022Octets;
+	u32 stat_XonPauseFramesReceived;
+	u32 stat_XoffPauseFramesReceived;
+	u32 stat_OutXonSent;
+	u32 stat_OutXoffSent;
+	u32 stat_FlowControlDone;
+	u32 stat_MacControlFramesReceived;
+	u32 stat_XoffStateEntered;
+	u32 stat_IfInFramesL2FilterDiscards;
+	u32 stat_IfInRuleCheckerDiscards;
+	u32 stat_IfInFTQDiscards;
+	u32 stat_IfInMBUFDiscards;
+	u32 stat_IfInRuleCheckerP4Hit;
+	u32 stat_CatchupInRuleCheckerDiscards;
+	u32 stat_CatchupInFTQDiscards;
+	u32 stat_CatchupInMBUFDiscards;
+	u32 stat_CatchupInRuleCheckerP4Hit;
+	u32 stat_GenStat00;
+	u32 stat_GenStat01;
+	u32 stat_GenStat02;
+	u32 stat_GenStat03;
+	u32 stat_GenStat04;
+	u32 stat_GenStat05;
+	u32 stat_GenStat06;
+	u32 stat_GenStat07;
+	u32 stat_GenStat08;
+	u32 stat_GenStat09;
+	u32 stat_GenStat10;
+	u32 stat_GenStat11;
+	u32 stat_GenStat12;
+	u32 stat_GenStat13;
+	u32 stat_GenStat14;
+	u32 stat_GenStat15;
+};
+
+
+/*
+ *  l2_fhdr definition
+ */
+struct l2_fhdr {
+	u32 l2_fhdr_status;
+		#define L2_FHDR_STATUS_RULE_CLASS	(0x7<<0)
+		#define L2_FHDR_STATUS_RULE_P2		(1<<3)
+		#define L2_FHDR_STATUS_RULE_P3		(1<<4)
+		#define L2_FHDR_STATUS_RULE_P4		(1<<5)
+		#define L2_FHDR_STATUS_L2_VLAN_TAG	(1<<6)
+		#define L2_FHDR_STATUS_L2_LLC_SNAP	(1<<7)
+		#define L2_FHDR_STATUS_RSS_HASH		(1<<8)
+		#define L2_FHDR_STATUS_IP_DATAGRAM	(1<<13)
+		#define L2_FHDR_STATUS_TCP_SEGMENT	(1<<14)
+		#define L2_FHDR_STATUS_UDP_DATAGRAM	(1<<15)
+
+		#define L2_FHDR_ERRORS_BAD_CRC		(1<<17)
+		#define L2_FHDR_ERRORS_PHY_DECODE	(1<<18)
+		#define L2_FHDR_ERRORS_ALIGNMENT	(1<<19)
+		#define L2_FHDR_ERRORS_TOO_SHORT	(1<<20)
+		#define L2_FHDR_ERRORS_GIANT_FRAME	(1<<21)
+		#define L2_FHDR_ERRORS_TCP_XSUM		(1<<28)
+		#define L2_FHDR_ERRORS_UDP_XSUM		(1<<31)
+
+	u32 l2_fhdr_hash;
+#if __BYTE_ORDER == __BIG_ENDIAN
+	u16 l2_fhdr_pkt_len;
+	u16 l2_fhdr_vlan_tag;
+	u16 l2_fhdr_ip_xsum;
+	u16 l2_fhdr_tcp_udp_xsum;
+#elif __BYTE_ORDER == __LITTLE_ENDIAN
+	u16 l2_fhdr_vlan_tag;
+	u16 l2_fhdr_pkt_len;
+	u16 l2_fhdr_tcp_udp_xsum;
+	u16 l2_fhdr_ip_xsum;
+#endif
+};
+
+
+/*
+ *  l2_context definition
+ */
+#define BNX2_L2CTX_TYPE					0x00000000
+#define BNX2_L2CTX_TYPE_SIZE_L2				 ((0xc0/0x20)<<16)
+#define BNX2_L2CTX_TYPE_TYPE				 (0xf<<28)
+#define BNX2_L2CTX_TYPE_TYPE_EMPTY			 (0<<28)
+#define BNX2_L2CTX_TYPE_TYPE_L2				 (1<<28)
+
+#define BNX2_L2CTX_TX_HOST_BIDX				0x00000088
+#define BNX2_L2CTX_EST_NBD				0x00000088
+#define BNX2_L2CTX_CMD_TYPE				0x00000088
+#define BNX2_L2CTX_CMD_TYPE_TYPE			 (0xf<<24)
+#define BNX2_L2CTX_CMD_TYPE_TYPE_L2			 (0<<24)
+#define BNX2_L2CTX_CMD_TYPE_TYPE_TCP			 (1<<24)
+
+#define BNX2_L2CTX_TX_HOST_BSEQ				0x00000090
+#define BNX2_L2CTX_TSCH_BSEQ				0x00000094
+#define BNX2_L2CTX_TBDR_BSEQ				0x00000098
+#define BNX2_L2CTX_TBDR_BOFF				0x0000009c
+#define BNX2_L2CTX_TBDR_BIDX				0x0000009c
+#define BNX2_L2CTX_TBDR_BHADDR_HI			0x000000a0
+#define BNX2_L2CTX_TBDR_BHADDR_LO			0x000000a4
+#define BNX2_L2CTX_TXP_BOFF				0x000000a8
+#define BNX2_L2CTX_TXP_BIDX				0x000000a8
+#define BNX2_L2CTX_TXP_BSEQ				0x000000ac
+
+
+/*
+ *  l2_bd_chain_context definition
+ */
+#define BNX2_L2CTX_BD_PRE_READ				0x00000000
+#define BNX2_L2CTX_CTX_SIZE				0x00000000
+#define BNX2_L2CTX_CTX_TYPE				0x00000000
+#define BNX2_L2CTX_CTX_TYPE_SIZE_L2			 ((0x20/20)<<16)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE		 (0xf<<28)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_UNDEFINED	 (0<<28)
+#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE	 (1<<28)
+
+#define BNX2_L2CTX_HOST_BDIDX				0x00000004
+#define BNX2_L2CTX_HOST_BSEQ				0x00000008
+#define BNX2_L2CTX_NX_BSEQ				0x0000000c
+#define BNX2_L2CTX_NX_BDHADDR_HI			0x00000010
+#define BNX2_L2CTX_NX_BDHADDR_LO			0x00000014
+#define BNX2_L2CTX_NX_BDIDX				0x00000018
+
+
+/*
+ *  pci_config_l definition
+ *  offset: 0000
+ */
+#define BNX2_PCICFG_MISC_CONFIG				0x00000068
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_BYTE_SWAP	 (1L<<2)
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP	 (1L<<3)
+#define BNX2_PCICFG_MISC_CONFIG_CLOCK_CTL_ENA		 (1L<<5)
+#define BNX2_PCICFG_MISC_CONFIG_TARGET_GRC_WORD_SWAP	 (1L<<6)
+#define BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA		 (1L<<7)
+#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ		 (1L<<8)
+#define BNX2_PCICFG_MISC_CONFIG_CORE_RST_BSY		 (1L<<9)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_METAL_REV		 (0xffL<<16)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_BASE_REV		 (0xfL<<24)
+#define BNX2_PCICFG_MISC_CONFIG_ASIC_ID			 (0xfL<<28)
+
+#define BNX2_PCICFG_MISC_STATUS				0x0000006c
+#define BNX2_PCICFG_MISC_STATUS_INTA_VALUE		 (1L<<0)
+#define BNX2_PCICFG_MISC_STATUS_32BIT_DET		 (1L<<1)
+#define BNX2_PCICFG_MISC_STATUS_M66EN			 (1L<<2)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_DET		 (1L<<3)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED		 (0x3L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_66		 (0L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_100		 (1L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_133		 (2L<<4)
+#define BNX2_PCICFG_MISC_STATUS_PCIX_SPEED_PCI_MODE	 (3L<<4)
+
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS		0x00000070
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET	 (0xfL<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ	 (0L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ	 (1L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ	 (2L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ	 (3L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ	 (4L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ	 (5L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ	 (6L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ	 (7L<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW	 (0xfL<<0)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE	 (1L<<6)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT	 (1L<<7)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC	 (0x7L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF	 (0L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12	 (1L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6	 (2L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62	 (4L<<8)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PLAY_DEAD	 (1L<<11)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED	 (0xfL<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100	 (0L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80	 (1L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50	 (2L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40	 (4L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25	 (8L<<12)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP	 (1L<<16)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_PCI_PLL_STOP	 (1L<<17)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED_18	 (1L<<18)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_USE_SPD_DET	 (1L<<19)
+#define BNX2_PCICFG_PCI_CLOCK_CONTROL_BITS_RESERVED	 (0xfffL<<20)
+
+#define BNX2_PCICFG_REG_WINDOW_ADDRESS			0x00000078
+#define BNX2_PCICFG_REG_WINDOW				0x00000080
+#define BNX2_PCICFG_INT_ACK_CMD				0x00000084
+#define BNX2_PCICFG_INT_ACK_CMD_INDEX			 (0xffffL<<0)
+#define BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID		 (1L<<16)
+#define BNX2_PCICFG_INT_ACK_CMD_USE_INT_HC_PARAM	 (1L<<17)
+#define BNX2_PCICFG_INT_ACK_CMD_MASK_INT		 (1L<<18)
+
+#define BNX2_PCICFG_STATUS_BIT_SET_CMD			0x00000088
+#define BNX2_PCICFG_STATUS_BIT_CLEAR_CMD		0x0000008c
+#define BNX2_PCICFG_MAILBOX_QUEUE_ADDR			0x00000090
+#define BNX2_PCICFG_MAILBOX_QUEUE_DATA			0x00000094
+
+
+/*
+ *  pci_reg definition
+ *  offset: 0x400
+ */
+#define BNX2_PCI_GRC_WINDOW_ADDR			0x00000400
+#define BNX2_PCI_GRC_WINDOW_ADDR_PCI_GRC_WINDOW_ADDR_VALUE	 (0x3ffffL<<8)
+
+#define BNX2_PCI_CONFIG_1				0x00000404
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY			 (0x7L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_OFF		 (0L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_16		 (1L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_32		 (2L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_64		 (3L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_128		 (4L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_256		 (5L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_512		 (6L<<8)
+#define BNX2_PCI_CONFIG_1_READ_BOUNDARY_1024		 (7L<<8)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY		 (0x7L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_OFF		 (0L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_16		 (1L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_32		 (2L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_64		 (3L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_128		 (4L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_256		 (5L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_512		 (6L<<11)
+#define BNX2_PCI_CONFIG_1_WRITE_BOUNDARY_1024		 (7L<<11)
+
+#define BNX2_PCI_CONFIG_2				0x00000408
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE			 (0xfL<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_DISABLED		 (0L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64K			 (1L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128K		 (2L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256K		 (3L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512K		 (4L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1M			 (5L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_2M			 (6L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_4M			 (7L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_8M			 (8L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_16M			 (9L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_32M			 (10L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_64M			 (11L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_128M		 (12L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_256M		 (13L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_512M		 (14L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_SIZE_1G			 (15L<<0)
+#define BNX2_PCI_CONFIG_2_BAR1_64ENA			 (1L<<4)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_RETRY			 (1L<<5)
+#define BNX2_PCI_CONFIG_2_CFG_CYCLE_RETRY		 (1L<<6)
+#define BNX2_PCI_CONFIG_2_FIRST_CFG_DONE		 (1L<<7)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE			 (0xffL<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_DISABLED		 (0L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1K		 (1L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2K		 (2L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4K		 (3L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8K		 (4L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16K		 (5L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_32K		 (6L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_64K		 (7L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_128K		 (8L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_256K		 (9L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_512K		 (10L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_1M		 (11L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_2M		 (12L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_4M		 (13L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_8M		 (14L<<8)
+#define BNX2_PCI_CONFIG_2_EXP_ROM_SIZE_16M		 (15L<<8)
+#define BNX2_PCI_CONFIG_2_MAX_SPLIT_LIMIT		 (0x1fL<<16)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT		 (0x3L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_512		 (0L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_1K		 (1L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_2K		 (2L<<21)
+#define BNX2_PCI_CONFIG_2_MAX_READ_LIMIT_4K		 (3L<<21)
+#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_MSTR		 (1L<<23)
+#define BNX2_PCI_CONFIG_2_FORCE_32_BIT_TGT		 (1L<<24)
+#define BNX2_PCI_CONFIG_2_KEEP_REQ_ASSERT		 (1L<<25)
+
+#define BNX2_PCI_CONFIG_3				0x0000040c
+#define BNX2_PCI_CONFIG_3_STICKY_BYTE			 (0xffL<<0)
+#define BNX2_PCI_CONFIG_3_FORCE_PME			 (1L<<24)
+#define BNX2_PCI_CONFIG_3_PME_STATUS			 (1L<<25)
+#define BNX2_PCI_CONFIG_3_PME_ENABLE			 (1L<<26)
+#define BNX2_PCI_CONFIG_3_PM_STATE			 (0x3L<<27)
+#define BNX2_PCI_CONFIG_3_VAUX_PRESET			 (1L<<30)
+#define BNX2_PCI_CONFIG_3_PCI_POWER			 (1L<<31)
+
+#define BNX2_PCI_PM_DATA_A				0x00000410
+#define BNX2_PCI_PM_DATA_A_PM_DATA_0_PRG		 (0xffL<<0)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_1_PRG		 (0xffL<<8)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_2_PRG		 (0xffL<<16)
+#define BNX2_PCI_PM_DATA_A_PM_DATA_3_PRG		 (0xffL<<24)
+
+#define BNX2_PCI_PM_DATA_B				0x00000414
+#define BNX2_PCI_PM_DATA_B_PM_DATA_4_PRG		 (0xffL<<0)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_5_PRG		 (0xffL<<8)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_6_PRG		 (0xffL<<16)
+#define BNX2_PCI_PM_DATA_B_PM_DATA_7_PRG		 (0xffL<<24)
+
+#define BNX2_PCI_SWAP_DIAG0				0x00000418
+#define BNX2_PCI_SWAP_DIAG1				0x0000041c
+#define BNX2_PCI_EXP_ROM_ADDR				0x00000420
+#define BNX2_PCI_EXP_ROM_ADDR_ADDRESS			 (0x3fffffL<<2)
+#define BNX2_PCI_EXP_ROM_ADDR_REQ			 (1L<<31)
+
+#define BNX2_PCI_EXP_ROM_DATA				0x00000424
+#define BNX2_PCI_VPD_INTF				0x00000428
+#define BNX2_PCI_VPD_INTF_INTF_REQ			 (1L<<0)
+
+#define BNX2_PCI_VPD_ADDR_FLAG				0x0000042c
+#define BNX2_PCI_VPD_ADDR_FLAG_ADDRESS			 (0x1fff<<2)
+#define BNX2_PCI_VPD_ADDR_FLAG_WR			 (1<<15)
+
+#define BNX2_PCI_VPD_DATA				0x00000430
+#define BNX2_PCI_ID_VAL1				0x00000434
+#define BNX2_PCI_ID_VAL1_DEVICE_ID			 (0xffffL<<0)
+#define BNX2_PCI_ID_VAL1_VENDOR_ID			 (0xffffL<<16)
+
+#define BNX2_PCI_ID_VAL2				0x00000438
+#define BNX2_PCI_ID_VAL2_SUBSYSTEM_VENDOR_ID		 (0xffffL<<0)
+#define BNX2_PCI_ID_VAL2_SUBSYSTEM_ID			 (0xffffL<<16)
+
+#define BNX2_PCI_ID_VAL3				0x0000043c
+#define BNX2_PCI_ID_VAL3_CLASS_CODE			 (0xffffffL<<0)
+#define BNX2_PCI_ID_VAL3_REVISION_ID			 (0xffL<<24)
+
+#define BNX2_PCI_ID_VAL4				0x00000440
+#define BNX2_PCI_ID_VAL4_CAP_ENA			 (0xfL<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_0			 (0L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_1			 (1L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_2			 (2L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_3			 (3L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_4			 (4L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_5			 (5L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_6			 (6L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_7			 (7L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_8			 (8L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_9			 (9L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_10			 (10L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_11			 (11L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_12			 (12L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_13			 (13L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_14			 (14L<<0)
+#define BNX2_PCI_ID_VAL4_CAP_ENA_15			 (15L<<0)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG			 (0x3L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_0			 (0L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_1			 (1L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_2			 (2L<<6)
+#define BNX2_PCI_ID_VAL4_PM_SCALE_PRG_3			 (3L<<6)
+#define BNX2_PCI_ID_VAL4_MSI_LIMIT			 (0x7L<<9)
+#define BNX2_PCI_ID_VAL4_MSI_ADVERTIZE			 (0x7L<<12)
+#define BNX2_PCI_ID_VAL4_MSI_ENABLE			 (1L<<15)
+#define BNX2_PCI_ID_VAL4_MAX_64_ADVERTIZE		 (1L<<16)
+#define BNX2_PCI_ID_VAL4_MAX_133_ADVERTIZE		 (1L<<17)
+#define BNX2_PCI_ID_VAL4_MAX_MEM_READ_SIZE		 (0x3L<<21)
+#define BNX2_PCI_ID_VAL4_MAX_SPLIT_SIZE			 (0x7L<<23)
+#define BNX2_PCI_ID_VAL4_MAX_CUMULATIVE_SIZE		 (0x7L<<26)
+
+#define BNX2_PCI_ID_VAL5				0x00000444
+#define BNX2_PCI_ID_VAL5_D1_SUPPORT			 (1L<<0)
+#define BNX2_PCI_ID_VAL5_D2_SUPPORT			 (1L<<1)
+#define BNX2_PCI_ID_VAL5_PME_IN_D0			 (1L<<2)
+#define BNX2_PCI_ID_VAL5_PME_IN_D1			 (1L<<3)
+#define BNX2_PCI_ID_VAL5_PME_IN_D2			 (1L<<4)
+#define BNX2_PCI_ID_VAL5_PME_IN_D3_HOT			 (1L<<5)
+
+#define BNX2_PCI_PCIX_EXTENDED_STATUS			0x00000448
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_NO_SNOOP		 (1L<<8)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_LONG_BURST	 (1L<<9)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_CLASS	 (0xfL<<16)
+#define BNX2_PCI_PCIX_EXTENDED_STATUS_SPLIT_COMP_MSG_IDX	 (0xffL<<24)
+
+#define BNX2_PCI_ID_VAL6				0x0000044c
+#define BNX2_PCI_ID_VAL6_MAX_LAT			 (0xffL<<0)
+#define BNX2_PCI_ID_VAL6_MIN_GNT			 (0xffL<<8)
+#define BNX2_PCI_ID_VAL6_BIST				 (0xffL<<16)
+
+#define BNX2_PCI_MSI_DATA				0x00000450
+#define BNX2_PCI_MSI_DATA_PCI_MSI_DATA			 (0xffffL<<0)
+
+#define BNX2_PCI_MSI_ADDR_H				0x00000454
+#define BNX2_PCI_MSI_ADDR_L				0x00000458
+
+
+/*
+ *  misc_reg definition
+ *  offset: 0x800
+ */
+#define BNX2_MISC_COMMAND				0x00000800
+#define BNX2_MISC_COMMAND_ENABLE_ALL			 (1L<<0)
+#define BNX2_MISC_COMMAND_DISABLE_ALL			 (1L<<1)
+#define BNX2_MISC_COMMAND_CORE_RESET			 (1L<<4)
+#define BNX2_MISC_COMMAND_HARD_RESET			 (1L<<5)
+#define BNX2_MISC_COMMAND_PAR_ERROR			 (1L<<8)
+#define BNX2_MISC_COMMAND_PAR_ERR_RAM			 (0x7fL<<16)
+
+#define BNX2_MISC_CFG					0x00000804
+#define BNX2_MISC_CFG_PCI_GRC_TMOUT			 (1L<<0)
+#define BNX2_MISC_CFG_NVM_WR_EN				 (0x3L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_PROTECT			 (0L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_PCI			 (1L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW			 (2L<<1)
+#define BNX2_MISC_CFG_NVM_WR_EN_ALLOW2			 (3L<<1)
+#define BNX2_MISC_CFG_BIST_EN				 (1L<<3)
+#define BNX2_MISC_CFG_CK25_OUT_ALT_SRC			 (1L<<4)
+#define BNX2_MISC_CFG_BYPASS_BSCAN			 (1L<<5)
+#define BNX2_MISC_CFG_BYPASS_EJTAG			 (1L<<6)
+#define BNX2_MISC_CFG_CLK_CTL_OVERRIDE			 (1L<<7)
+#define BNX2_MISC_CFG_LEDMODE				 (0x3L<<8)
+#define BNX2_MISC_CFG_LEDMODE_MAC			 (0L<<8)
+#define BNX2_MISC_CFG_LEDMODE_GPHY1			 (1L<<8)
+#define BNX2_MISC_CFG_LEDMODE_GPHY2			 (2L<<8)
+
+#define BNX2_MISC_ID					0x00000808
+#define BNX2_MISC_ID_BOND_ID				 (0xfL<<0)
+#define BNX2_MISC_ID_CHIP_METAL				 (0xffL<<4)
+#define BNX2_MISC_ID_CHIP_REV				 (0xfL<<12)
+#define BNX2_MISC_ID_CHIP_NUM				 (0xffffL<<16)
+
+#define BNX2_MISC_ENABLE_STATUS_BITS			0x0000080c
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_SCHEDULER_ENABLE	 (1L<<0)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_READ_ENABLE	 (1L<<1)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_BD_CACHE_ENABLE	 (1L<<2)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PROCESSOR_ENABLE	 (1L<<3)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_DMA_ENABLE	 (1L<<4)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PATCHUP_ENABLE	 (1L<<5)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_PAYLOAD_Q_ENABLE	 (1L<<6)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_HEADER_Q_ENABLE	 (1L<<7)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TX_ASSEMBLER_ENABLE	 (1L<<8)
+#define BNX2_MISC_ENABLE_STATUS_BITS_EMAC_ENABLE	 (1L<<9)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_MAC_ENABLE	 (1L<<10)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PARSER_CATCHUP_ENABLE	 (1L<<11)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_MBUF_ENABLE	 (1L<<12)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_LOOKUP_ENABLE	 (1L<<13)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_PROCESSOR_ENABLE	 (1L<<14)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_V2P_ENABLE	 (1L<<15)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_BD_CACHE_ENABLE	 (1L<<16)
+#define BNX2_MISC_ENABLE_STATUS_BITS_RX_DMA_ENABLE	 (1L<<17)
+#define BNX2_MISC_ENABLE_STATUS_BITS_COMPLETION_ENABLE	 (1L<<18)
+#define BNX2_MISC_ENABLE_STATUS_BITS_HOST_COALESCE_ENABLE	 (1L<<19)
+#define BNX2_MISC_ENABLE_STATUS_BITS_MAILBOX_QUEUE_ENABLE	 (1L<<20)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CONTEXT_ENABLE	 (1L<<21)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_SCHEDULER_ENABLE	 (1L<<22)
+#define BNX2_MISC_ENABLE_STATUS_BITS_CMD_PROCESSOR_ENABLE	 (1L<<23)
+#define BNX2_MISC_ENABLE_STATUS_BITS_MGMT_PROCESSOR_ENABLE	 (1L<<24)
+#define BNX2_MISC_ENABLE_STATUS_BITS_TIMER_ENABLE	 (1L<<25)
+#define BNX2_MISC_ENABLE_STATUS_BITS_DMA_ENGINE_ENABLE	 (1L<<26)
+#define BNX2_MISC_ENABLE_STATUS_BITS_UMP_ENABLE		 (1L<<27)
+
+#define BNX2_MISC_ENABLE_SET_BITS			0x00000810
+#define BNX2_MISC_ENABLE_SET_BITS_TX_SCHEDULER_ENABLE	 (1L<<0)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_READ_ENABLE	 (1L<<1)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_BD_CACHE_ENABLE	 (1L<<2)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PROCESSOR_ENABLE	 (1L<<3)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_DMA_ENABLE		 (1L<<4)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PATCHUP_ENABLE	 (1L<<5)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_PAYLOAD_Q_ENABLE	 (1L<<6)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_HEADER_Q_ENABLE	 (1L<<7)
+#define BNX2_MISC_ENABLE_SET_BITS_TX_ASSEMBLER_ENABLE	 (1L<<8)
+#define BNX2_MISC_ENABLE_SET_BITS_EMAC_ENABLE		 (1L<<9)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_MAC_ENABLE	 (1L<<10)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PARSER_CATCHUP_ENABLE	 (1L<<11)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_MBUF_ENABLE	 (1L<<12)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_LOOKUP_ENABLE	 (1L<<13)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_PROCESSOR_ENABLE	 (1L<<14)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_V2P_ENABLE		 (1L<<15)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_BD_CACHE_ENABLE	 (1L<<16)
+#define BNX2_MISC_ENABLE_SET_BITS_RX_DMA_ENABLE		 (1L<<17)
+#define BNX2_MISC_ENABLE_SET_BITS_COMPLETION_ENABLE	 (1L<<18)
+#define BNX2_MISC_ENABLE_SET_BITS_HOST_COALESCE_ENABLE	 (1L<<19)
+#define BNX2_MISC_ENABLE_SET_BITS_MAILBOX_QUEUE_ENABLE	 (1L<<20)
+#define BNX2_MISC_ENABLE_SET_BITS_CONTEXT_ENABLE	 (1L<<21)
+#define BNX2_MISC_ENABLE_SET_BITS_CMD_SCHEDULER_ENABLE	 (1L<<22)
+#define BNX2_MISC_ENABLE_SET_BITS_CMD_PROCESSOR_ENABLE	 (1L<<23)
+#define BNX2_MISC_ENABLE_SET_BITS_MGMT_PROCESSOR_ENABLE	 (1L<<24)
+#define BNX2_MISC_ENABLE_SET_BITS_TIMER_ENABLE		 (1L<<25)
+#define BNX2_MISC_ENABLE_SET_BITS_DMA_ENGINE_ENABLE	 (1L<<26)
+#define BNX2_MISC_ENABLE_SET_BITS_UMP_ENABLE		 (1L<<27)
+
+#define BNX2_MISC_ENABLE_CLR_BITS			0x00000814
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_SCHEDULER_ENABLE	 (1L<<0)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_READ_ENABLE	 (1L<<1)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_BD_CACHE_ENABLE	 (1L<<2)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PROCESSOR_ENABLE	 (1L<<3)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_DMA_ENABLE		 (1L<<4)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PATCHUP_ENABLE	 (1L<<5)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_PAYLOAD_Q_ENABLE	 (1L<<6)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_HEADER_Q_ENABLE	 (1L<<7)
+#define BNX2_MISC_ENABLE_CLR_BITS_TX_ASSEMBLER_ENABLE	 (1L<<8)
+#define BNX2_MISC_ENABLE_CLR_BITS_EMAC_ENABLE		 (1L<<9)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_MAC_ENABLE	 (1L<<10)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PARSER_CATCHUP_ENABLE	 (1L<<11)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_MBUF_ENABLE	 (1L<<12)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_LOOKUP_ENABLE	 (1L<<13)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_PROCESSOR_ENABLE	 (1L<<14)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_V2P_ENABLE		 (1L<<15)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_BD_CACHE_ENABLE	 (1L<<16)
+#define BNX2_MISC_ENABLE_CLR_BITS_RX_DMA_ENABLE		 (1L<<17)
+#define BNX2_MISC_ENABLE_CLR_BITS_COMPLETION_ENABLE	 (1L<<18)
+#define BNX2_MISC_ENABLE_CLR_BITS_HOST_COALESCE_ENABLE	 (1L<<19)
+#define BNX2_MISC_ENABLE_CLR_BITS_MAILBOX_QUEUE_ENABLE	 (1L<<20)
+#define BNX2_MISC_ENABLE_CLR_BITS_CONTEXT_ENABLE	 (1L<<21)
+#define BNX2_MISC_ENABLE_CLR_BITS_CMD_SCHEDULER_ENABLE	 (1L<<22)
+#define BNX2_MISC_ENABLE_CLR_BITS_CMD_PROCESSOR_ENABLE	 (1L<<23)
+#define BNX2_MISC_ENABLE_CLR_BITS_MGMT_PROCESSOR_ENABLE	 (1L<<24)
+#define BNX2_MISC_ENABLE_CLR_BITS_TIMER_ENABLE		 (1L<<25)
+#define BNX2_MISC_ENABLE_CLR_BITS_DMA_ENGINE_ENABLE	 (1L<<26)
+#define BNX2_MISC_ENABLE_CLR_BITS_UMP_ENABLE		 (1L<<27)
+
+#define BNX2_MISC_CLOCK_CONTROL_BITS			0x00000818
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET	 (0xfL<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_32MHZ	 (0L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_38MHZ	 (1L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_48MHZ	 (2L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_55MHZ	 (3L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_66MHZ	 (4L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_80MHZ	 (5L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_95MHZ	 (6L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_133MHZ	 (7L<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_CLK_SPD_DET_LOW	 (0xfL<<0)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_DISABLE	 (1L<<6)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT	 (1L<<7)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC	 (0x7L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_UNDEF	 (0L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_12	 (1L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_6	 (2L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_ALT_SRC_62	 (4L<<8)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PLAY_DEAD		 (1L<<11)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED	 (0xfL<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_100	 (0L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_80	 (1L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_50	 (2L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_40	 (4L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_SPEED_25	 (8L<<12)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_CORE_CLK_PLL_STOP	 (1L<<16)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_PCI_PLL_STOP	 (1L<<17)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED_18	 (1L<<18)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_USE_SPD_DET	 (1L<<19)
+#define BNX2_MISC_CLOCK_CONTROL_BITS_RESERVED		 (0xfffL<<20)
+
+#define BNX2_MISC_GPIO					0x0000081c
+#define BNX2_MISC_GPIO_VALUE				 (0xffL<<0)
+#define BNX2_MISC_GPIO_SET				 (0xffL<<8)
+#define BNX2_MISC_GPIO_CLR				 (0xffL<<16)
+#define BNX2_MISC_GPIO_FLOAT				 (0xffL<<24)
+
+#define BNX2_MISC_GPIO_INT				0x00000820
+#define BNX2_MISC_GPIO_INT_INT_STATE			 (0xfL<<0)
+#define BNX2_MISC_GPIO_INT_OLD_VALUE			 (0xfL<<8)
+#define BNX2_MISC_GPIO_INT_OLD_SET			 (0xfL<<16)
+#define BNX2_MISC_GPIO_INT_OLD_CLR			 (0xfL<<24)
+
+#define BNX2_MISC_CONFIG_LFSR				0x00000824
+#define BNX2_MISC_CONFIG_LFSR_DIV			 (0xffffL<<0)
+
+#define BNX2_MISC_LFSR_MASK_BITS			0x00000828
+#define BNX2_MISC_LFSR_MASK_BITS_TX_SCHEDULER_ENABLE	 (1L<<0)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_READ_ENABLE	 (1L<<1)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_BD_CACHE_ENABLE	 (1L<<2)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PROCESSOR_ENABLE	 (1L<<3)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_DMA_ENABLE		 (1L<<4)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PATCHUP_ENABLE	 (1L<<5)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_PAYLOAD_Q_ENABLE	 (1L<<6)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_HEADER_Q_ENABLE	 (1L<<7)
+#define BNX2_MISC_LFSR_MASK_BITS_TX_ASSEMBLER_ENABLE	 (1L<<8)
+#define BNX2_MISC_LFSR_MASK_BITS_EMAC_ENABLE		 (1L<<9)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_MAC_ENABLE	 (1L<<10)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PARSER_CATCHUP_ENABLE	 (1L<<11)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_MBUF_ENABLE		 (1L<<12)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_LOOKUP_ENABLE	 (1L<<13)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_PROCESSOR_ENABLE	 (1L<<14)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_V2P_ENABLE		 (1L<<15)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_BD_CACHE_ENABLE	 (1L<<16)
+#define BNX2_MISC_LFSR_MASK_BITS_RX_DMA_ENABLE		 (1L<<17)
+#define BNX2_MISC_LFSR_MASK_BITS_COMPLETION_ENABLE	 (1L<<18)
+#define BNX2_MISC_LFSR_MASK_BITS_HOST_COALESCE_ENABLE	 (1L<<19)
+#define BNX2_MISC_LFSR_MASK_BITS_MAILBOX_QUEUE_ENABLE	 (1L<<20)
+#define BNX2_MISC_LFSR_MASK_BITS_CONTEXT_ENABLE		 (1L<<21)
+#define BNX2_MISC_LFSR_MASK_BITS_CMD_SCHEDULER_ENABLE	 (1L<<22)
+#define BNX2_MISC_LFSR_MASK_BITS_CMD_PROCESSOR_ENABLE	 (1L<<23)
+#define BNX2_MISC_LFSR_MASK_BITS_MGMT_PROCESSOR_ENABLE	 (1L<<24)
+#define BNX2_MISC_LFSR_MASK_BITS_TIMER_ENABLE		 (1L<<25)
+#define BNX2_MISC_LFSR_MASK_BITS_DMA_ENGINE_ENABLE	 (1L<<26)
+#define BNX2_MISC_LFSR_MASK_BITS_UMP_ENABLE		 (1L<<27)
+
+#define BNX2_MISC_ARB_REQ0				0x0000082c
+#define BNX2_MISC_ARB_REQ1				0x00000830
+#define BNX2_MISC_ARB_REQ2				0x00000834
+#define BNX2_MISC_ARB_REQ3				0x00000838
+#define BNX2_MISC_ARB_REQ4				0x0000083c
+#define BNX2_MISC_ARB_FREE0				0x00000840
+#define BNX2_MISC_ARB_FREE1				0x00000844
+#define BNX2_MISC_ARB_FREE2				0x00000848
+#define BNX2_MISC_ARB_FREE3				0x0000084c
+#define BNX2_MISC_ARB_FREE4				0x00000850
+#define BNX2_MISC_ARB_REQ_STATUS0			0x00000854
+#define BNX2_MISC_ARB_REQ_STATUS1			0x00000858
+#define BNX2_MISC_ARB_REQ_STATUS2			0x0000085c
+#define BNX2_MISC_ARB_REQ_STATUS3			0x00000860
+#define BNX2_MISC_ARB_REQ_STATUS4			0x00000864
+#define BNX2_MISC_ARB_GNT0				0x00000868
+#define BNX2_MISC_ARB_GNT0_0				 (0x7L<<0)
+#define BNX2_MISC_ARB_GNT0_1				 (0x7L<<4)
+#define BNX2_MISC_ARB_GNT0_2				 (0x7L<<8)
+#define BNX2_MISC_ARB_GNT0_3				 (0x7L<<12)
+#define BNX2_MISC_ARB_GNT0_4				 (0x7L<<16)
+#define BNX2_MISC_ARB_GNT0_5				 (0x7L<<20)
+#define BNX2_MISC_ARB_GNT0_6				 (0x7L<<24)
+#define BNX2_MISC_ARB_GNT0_7				 (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT1				0x0000086c
+#define BNX2_MISC_ARB_GNT1_8				 (0x7L<<0)
+#define BNX2_MISC_ARB_GNT1_9				 (0x7L<<4)
+#define BNX2_MISC_ARB_GNT1_10				 (0x7L<<8)
+#define BNX2_MISC_ARB_GNT1_11				 (0x7L<<12)
+#define BNX2_MISC_ARB_GNT1_12				 (0x7L<<16)
+#define BNX2_MISC_ARB_GNT1_13				 (0x7L<<20)
+#define BNX2_MISC_ARB_GNT1_14				 (0x7L<<24)
+#define BNX2_MISC_ARB_GNT1_15				 (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT2				0x00000870
+#define BNX2_MISC_ARB_GNT2_16				 (0x7L<<0)
+#define BNX2_MISC_ARB_GNT2_17				 (0x7L<<4)
+#define BNX2_MISC_ARB_GNT2_18				 (0x7L<<8)
+#define BNX2_MISC_ARB_GNT2_19				 (0x7L<<12)
+#define BNX2_MISC_ARB_GNT2_20				 (0x7L<<16)
+#define BNX2_MISC_ARB_GNT2_21				 (0x7L<<20)
+#define BNX2_MISC_ARB_GNT2_22				 (0x7L<<24)
+#define BNX2_MISC_ARB_GNT2_23				 (0x7L<<28)
+
+#define BNX2_MISC_ARB_GNT3				0x00000874
+#define BNX2_MISC_ARB_GNT3_24				 (0x7L<<0)
+#define BNX2_MISC_ARB_GNT3_25				 (0x7L<<4)
+#define BNX2_MISC_ARB_GNT3_26				 (0x7L<<8)
+#define BNX2_MISC_ARB_GNT3_27				 (0x7L<<12)
+#define BNX2_MISC_ARB_GNT3_28				 (0x7L<<16)
+#define BNX2_MISC_ARB_GNT3_29				 (0x7L<<20)
+#define BNX2_MISC_ARB_GNT3_30				 (0x7L<<24)
+#define BNX2_MISC_ARB_GNT3_31				 (0x7L<<28)
+
+#define BNX2_MISC_PRBS_CONTROL				0x00000878
+#define BNX2_MISC_PRBS_CONTROL_EN			 (1L<<0)
+#define BNX2_MISC_PRBS_CONTROL_RSTB			 (1L<<1)
+#define BNX2_MISC_PRBS_CONTROL_INV			 (1L<<2)
+#define BNX2_MISC_PRBS_CONTROL_ERR_CLR			 (1L<<3)
+#define BNX2_MISC_PRBS_CONTROL_ORDER			 (0x3L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_7TH		 (0L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_15TH		 (1L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_23RD		 (2L<<4)
+#define BNX2_MISC_PRBS_CONTROL_ORDER_31ST		 (3L<<4)
+
+#define BNX2_MISC_PRBS_STATUS				0x0000087c
+#define BNX2_MISC_PRBS_STATUS_LOCK			 (1L<<0)
+#define BNX2_MISC_PRBS_STATUS_STKY			 (1L<<1)
+#define BNX2_MISC_PRBS_STATUS_ERRORS			 (0x3fffL<<2)
+#define BNX2_MISC_PRBS_STATUS_STATE			 (0xfL<<16)
+
+#define BNX2_MISC_SM_ASF_CONTROL			0x00000880
+#define BNX2_MISC_SM_ASF_CONTROL_ASF_RST		 (1L<<0)
+#define BNX2_MISC_SM_ASF_CONTROL_TSC_EN			 (1L<<1)
+#define BNX2_MISC_SM_ASF_CONTROL_WG_TO			 (1L<<2)
+#define BNX2_MISC_SM_ASF_CONTROL_HB_TO			 (1L<<3)
+#define BNX2_MISC_SM_ASF_CONTROL_PA_TO			 (1L<<4)
+#define BNX2_MISC_SM_ASF_CONTROL_PL_TO			 (1L<<5)
+#define BNX2_MISC_SM_ASF_CONTROL_RT_TO			 (1L<<6)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EVENT		 (1L<<7)
+#define BNX2_MISC_SM_ASF_CONTROL_RES			 (0xfL<<8)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EN			 (1L<<12)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_BB_EN		 (1L<<13)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_NO_ADDR_FILT	 (1L<<14)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_AUTOREAD		 (1L<<15)
+#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR1		 (0x3fL<<16)
+#define BNX2_MISC_SM_ASF_CONTROL_NIC_SMB_ADDR2		 (0x3fL<<24)
+#define BNX2_MISC_SM_ASF_CONTROL_EN_NIC_SMB_ADDR_0	 (1L<<30)
+#define BNX2_MISC_SM_ASF_CONTROL_SMB_EARLY_ATTN		 (1L<<31)
+
+#define BNX2_MISC_SMB_IN				0x00000884
+#define BNX2_MISC_SMB_IN_DAT_IN				 (0xffL<<0)
+#define BNX2_MISC_SMB_IN_RDY				 (1L<<8)
+#define BNX2_MISC_SMB_IN_DONE				 (1L<<9)
+#define BNX2_MISC_SMB_IN_FIRSTBYTE			 (1L<<10)
+#define BNX2_MISC_SMB_IN_STATUS				 (0x7L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_OK			 (0x0L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_PEC			 (0x1L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_OFLOW			 (0x2L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_STOP			 (0x3L<<11)
+#define BNX2_MISC_SMB_IN_STATUS_TIMEOUT			 (0x4L<<11)
+
+#define BNX2_MISC_SMB_OUT				0x00000888
+#define BNX2_MISC_SMB_OUT_DAT_OUT			 (0xffL<<0)
+#define BNX2_MISC_SMB_OUT_RDY				 (1L<<8)
+#define BNX2_MISC_SMB_OUT_START				 (1L<<9)
+#define BNX2_MISC_SMB_OUT_LAST				 (1L<<10)
+#define BNX2_MISC_SMB_OUT_ACC_TYPE			 (1L<<11)
+#define BNX2_MISC_SMB_OUT_ENB_PEC			 (1L<<12)
+#define BNX2_MISC_SMB_OUT_GET_RX_LEN			 (1L<<13)
+#define BNX2_MISC_SMB_OUT_SMB_READ_LEN			 (0x3fL<<14)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS		 (0xfL<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_OK		 (0L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_NACK	 (1L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_NACK	 (9L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_UFLOW		 (2L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_STOP		 (3L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_TIMEOUT	 (4L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_FIRST_LOST	 (5L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_SUB_LOST	 (0xdL<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_STATUS_BADACK		 (0x6L<<20)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_SLAVEMODE		 (1L<<24)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_EN		 (1L<<25)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_DAT_IN		 (1L<<26)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_EN		 (1L<<27)
+#define BNX2_MISC_SMB_OUT_SMB_OUT_CLK_IN		 (1L<<28)
+
+#define BNX2_MISC_SMB_WATCHDOG				0x0000088c
+#define BNX2_MISC_SMB_WATCHDOG_WATCHDOG			 (0xffffL<<0)
+
+#define BNX2_MISC_SMB_HEARTBEAT				0x00000890
+#define BNX2_MISC_SMB_HEARTBEAT_HEARTBEAT		 (0xffffL<<0)
+
+#define BNX2_MISC_SMB_POLL_ASF				0x00000894
+#define BNX2_MISC_SMB_POLL_ASF_POLL_ASF			 (0xffffL<<0)
+
+#define BNX2_MISC_SMB_POLL_LEGACY			0x00000898
+#define BNX2_MISC_SMB_POLL_LEGACY_POLL_LEGACY		 (0xffffL<<0)
+
+#define BNX2_MISC_SMB_RETRAN				0x0000089c
+#define BNX2_MISC_SMB_RETRAN_RETRAN			 (0xffL<<0)
+
+#define BNX2_MISC_SMB_TIMESTAMP				0x000008a0
+#define BNX2_MISC_SMB_TIMESTAMP_TIMESTAMP		 (0xffffffffL<<0)
+
+#define BNX2_MISC_PERR_ENA0				0x000008a4
+#define BNX2_MISC_PERR_ENA0_COM_MISC_CTXC		 (1L<<0)
+#define BNX2_MISC_PERR_ENA0_COM_MISC_REGF		 (1L<<1)
+#define BNX2_MISC_PERR_ENA0_COM_MISC_SCPAD		 (1L<<2)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_CTXC		 (1L<<3)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_REGF		 (1L<<4)
+#define BNX2_MISC_PERR_ENA0_CP_MISC_SCPAD		 (1L<<5)
+#define BNX2_MISC_PERR_ENA0_CS_MISC_TMEM		 (1L<<6)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM0		 (1L<<7)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM1		 (1L<<8)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM2		 (1L<<9)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM3		 (1L<<10)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM4		 (1L<<11)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_ACCM5		 (1L<<12)
+#define BNX2_MISC_PERR_ENA0_CTX_MISC_PGTBL		 (1L<<13)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR0		 (1L<<14)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR1		 (1L<<15)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR2		 (1L<<16)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR3		 (1L<<17)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DR4		 (1L<<18)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW0		 (1L<<19)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW1		 (1L<<20)
+#define BNX2_MISC_PERR_ENA0_DMAE_MISC_DW2		 (1L<<21)
+#define BNX2_MISC_PERR_ENA0_HC_MISC_DMA			 (1L<<22)
+#define BNX2_MISC_PERR_ENA0_MCP_MISC_REGF		 (1L<<23)
+#define BNX2_MISC_PERR_ENA0_MCP_MISC_SCPAD		 (1L<<24)
+#define BNX2_MISC_PERR_ENA0_MQ_MISC_CTX			 (1L<<25)
+#define BNX2_MISC_PERR_ENA0_RBDC_MISC			 (1L<<26)
+#define BNX2_MISC_PERR_ENA0_RBUF_MISC_MB		 (1L<<27)
+#define BNX2_MISC_PERR_ENA0_RBUF_MISC_PTR		 (1L<<28)
+#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPC		 (1L<<29)
+#define BNX2_MISC_PERR_ENA0_RDE_MISC_RPM		 (1L<<30)
+#define BNX2_MISC_PERR_ENA0_RV2P_MISC_CB0REGS		 (1L<<31)
+
+#define BNX2_MISC_PERR_ENA1				0x000008a8
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_CB1REGS		 (1L<<0)
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P1IRAM		 (1L<<1)
+#define BNX2_MISC_PERR_ENA1_RV2P_MISC_P2IRAM		 (1L<<2)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_CTXC		 (1L<<3)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_REGF		 (1L<<4)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_SCPAD		 (1L<<5)
+#define BNX2_MISC_PERR_ENA1_RXP_MISC_RBUFC		 (1L<<6)
+#define BNX2_MISC_PERR_ENA1_TBDC_MISC			 (1L<<7)
+#define BNX2_MISC_PERR_ENA1_TDMA_MISC			 (1L<<8)
+#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB0		 (1L<<9)
+#define BNX2_MISC_PERR_ENA1_THBUF_MISC_MB1		 (1L<<10)
+#define BNX2_MISC_PERR_ENA1_TPAT_MISC_REGF		 (1L<<11)
+#define BNX2_MISC_PERR_ENA1_TPAT_MISC_SCPAD		 (1L<<12)
+#define BNX2_MISC_PERR_ENA1_TPBUF_MISC_MB		 (1L<<13)
+#define BNX2_MISC_PERR_ENA1_TSCH_MISC_LR		 (1L<<14)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_CTXC		 (1L<<15)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_REGF		 (1L<<16)
+#define BNX2_MISC_PERR_ENA1_TXP_MISC_SCPAD		 (1L<<17)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIORX		 (1L<<18)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_FIOTX		 (1L<<19)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_RX			 (1L<<20)
+#define BNX2_MISC_PERR_ENA1_UMP_MISC_TX			 (1L<<21)
+#define BNX2_MISC_PERR_ENA1_RDMAQ_MISC			 (1L<<22)
+#define BNX2_MISC_PERR_ENA1_CSQ_MISC			 (1L<<23)
+#define BNX2_MISC_PERR_ENA1_CPQ_MISC			 (1L<<24)
+#define BNX2_MISC_PERR_ENA1_MCPQ_MISC			 (1L<<25)
+#define BNX2_MISC_PERR_ENA1_RV2PMQ_MISC			 (1L<<26)
+#define BNX2_MISC_PERR_ENA1_RV2PPQ_MISC			 (1L<<27)
+#define BNX2_MISC_PERR_ENA1_RV2PTQ_MISC			 (1L<<28)
+#define BNX2_MISC_PERR_ENA1_RXPQ_MISC			 (1L<<29)
+#define BNX2_MISC_PERR_ENA1_RXPCQ_MISC			 (1L<<30)
+#define BNX2_MISC_PERR_ENA1_RLUPQ_MISC			 (1L<<31)
+
+#define BNX2_MISC_PERR_ENA2				0x000008ac
+#define BNX2_MISC_PERR_ENA2_COMQ_MISC			 (1L<<0)
+#define BNX2_MISC_PERR_ENA2_COMXQ_MISC			 (1L<<1)
+#define BNX2_MISC_PERR_ENA2_COMTQ_MISC			 (1L<<2)
+#define BNX2_MISC_PERR_ENA2_TSCHQ_MISC			 (1L<<3)
+#define BNX2_MISC_PERR_ENA2_TBDRQ_MISC			 (1L<<4)
+#define BNX2_MISC_PERR_ENA2_TXPQ_MISC			 (1L<<5)
+#define BNX2_MISC_PERR_ENA2_TDMAQ_MISC			 (1L<<6)
+#define BNX2_MISC_PERR_ENA2_TPATQ_MISC			 (1L<<7)
+#define BNX2_MISC_PERR_ENA2_TASQ_MISC			 (1L<<8)
+
+#define BNX2_MISC_DEBUG_VECTOR_SEL			0x000008b0
+#define BNX2_MISC_DEBUG_VECTOR_SEL_0			 (0xfffL<<0)
+#define BNX2_MISC_DEBUG_VECTOR_SEL_1			 (0xfffL<<12)
+
+#define BNX2_MISC_VREG_CONTROL				0x000008b4
+#define BNX2_MISC_VREG_CONTROL_1_2			 (0xfL<<0)
+#define BNX2_MISC_VREG_CONTROL_2_5			 (0xfL<<4)
+
+#define BNX2_MISC_FINAL_CLK_CTL_VAL			0x000008b8
+#define BNX2_MISC_FINAL_CLK_CTL_VAL_MISC_FINAL_CLK_CTL_VAL	 (0x3ffffffL<<6)
+
+#define BNX2_MISC_UNUSED0				0x000008bc
+
+
+/*
+ *  nvm_reg definition
+ *  offset: 0x6400
+ */
+#define BNX2_NVM_COMMAND				0x00006400
+#define BNX2_NVM_COMMAND_RST				 (1L<<0)
+#define BNX2_NVM_COMMAND_DONE				 (1L<<3)
+#define BNX2_NVM_COMMAND_DOIT				 (1L<<4)
+#define BNX2_NVM_COMMAND_WR				 (1L<<5)
+#define BNX2_NVM_COMMAND_ERASE				 (1L<<6)
+#define BNX2_NVM_COMMAND_FIRST				 (1L<<7)
+#define BNX2_NVM_COMMAND_LAST				 (1L<<8)
+#define BNX2_NVM_COMMAND_WREN				 (1L<<16)
+#define BNX2_NVM_COMMAND_WRDI				 (1L<<17)
+#define BNX2_NVM_COMMAND_EWSR				 (1L<<18)
+#define BNX2_NVM_COMMAND_WRSR				 (1L<<19)
+
+#define BNX2_NVM_STATUS					0x00006404
+#define BNX2_NVM_STATUS_PI_FSM_STATE			 (0xfL<<0)
+#define BNX2_NVM_STATUS_EE_FSM_STATE			 (0xfL<<4)
+#define BNX2_NVM_STATUS_EQ_FSM_STATE			 (0xfL<<8)
+
+#define BNX2_NVM_WRITE					0x00006408
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE			 (0xffffffffL<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_BIT_BANG		 (0L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EECLK		 (1L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_EEDATA		 (2L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SCLK		 (4L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_CS_B		 (8L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SO		 (16L<<0)
+#define BNX2_NVM_WRITE_NVM_WRITE_VALUE_SI		 (32L<<0)
+
+#define BNX2_NVM_ADDR					0x0000640c
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE			 (0xffffffL<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_BIT_BANG		 (0L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EECLK		 (1L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_EEDATA		 (2L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SCLK		 (4L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_CS_B		 (8L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SO			 (16L<<0)
+#define BNX2_NVM_ADDR_NVM_ADDR_VALUE_SI			 (32L<<0)
+
+#define BNX2_NVM_READ					0x00006410
+#define BNX2_NVM_READ_NVM_READ_VALUE			 (0xffffffffL<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_BIT_BANG		 (0L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_EECLK		 (1L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_EEDATA		 (2L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SCLK		 (4L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_CS_B		 (8L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SO			 (16L<<0)
+#define BNX2_NVM_READ_NVM_READ_VALUE_SI			 (32L<<0)
+
+#define BNX2_NVM_CFG1					0x00006414
+#define BNX2_NVM_CFG1_FLASH_MODE			 (1L<<0)
+#define BNX2_NVM_CFG1_BUFFER_MODE			 (1L<<1)
+#define BNX2_NVM_CFG1_PASS_MODE				 (1L<<2)
+#define BNX2_NVM_CFG1_BITBANG_MODE			 (1L<<3)
+#define BNX2_NVM_CFG1_STATUS_BIT			 (0x7L<<4)
+#define BNX2_NVM_CFG1_STATUS_BIT_FLASH_RDY		 (0L<<4)
+#define BNX2_NVM_CFG1_STATUS_BIT_BUFFER_RDY		 (7L<<4)
+#define BNX2_NVM_CFG1_SPI_CLK_DIV			 (0xfL<<7)
+#define BNX2_NVM_CFG1_SEE_CLK_DIV			 (0x7ffL<<11)
+#define BNX2_NVM_CFG1_PROTECT_MODE			 (1L<<24)
+#define BNX2_NVM_CFG1_FLASH_SIZE			 (1L<<25)
+#define BNX2_NVM_CFG1_COMPAT_BYPASSS			 (1L<<31)
+
+#define BNX2_NVM_CFG2					0x00006418
+#define BNX2_NVM_CFG2_ERASE_CMD				 (0xffL<<0)
+#define BNX2_NVM_CFG2_DUMMY				 (0xffL<<8)
+#define BNX2_NVM_CFG2_STATUS_CMD			 (0xffL<<16)
+
+#define BNX2_NVM_CFG3					0x0000641c
+#define BNX2_NVM_CFG3_BUFFER_RD_CMD			 (0xffL<<0)
+#define BNX2_NVM_CFG3_WRITE_CMD				 (0xffL<<8)
+#define BNX2_NVM_CFG3_BUFFER_WRITE_CMD			 (0xffL<<16)
+#define BNX2_NVM_CFG3_READ_CMD				 (0xffL<<24)
+
+#define BNX2_NVM_SW_ARB					0x00006420
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET0			 (1L<<0)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET1			 (1L<<1)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET2			 (1L<<2)
+#define BNX2_NVM_SW_ARB_ARB_REQ_SET3			 (1L<<3)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR0			 (1L<<4)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR1			 (1L<<5)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR2			 (1L<<6)
+#define BNX2_NVM_SW_ARB_ARB_REQ_CLR3			 (1L<<7)
+#define BNX2_NVM_SW_ARB_ARB_ARB0			 (1L<<8)
+#define BNX2_NVM_SW_ARB_ARB_ARB1			 (1L<<9)
+#define BNX2_NVM_SW_ARB_ARB_ARB2			 (1L<<10)
+#define BNX2_NVM_SW_ARB_ARB_ARB3			 (1L<<11)
+#define BNX2_NVM_SW_ARB_REQ0				 (1L<<12)
+#define BNX2_NVM_SW_ARB_REQ1				 (1L<<13)
+#define BNX2_NVM_SW_ARB_REQ2				 (1L<<14)
+#define BNX2_NVM_SW_ARB_REQ3				 (1L<<15)
+
+#define BNX2_NVM_ACCESS_ENABLE				0x00006424
+#define BNX2_NVM_ACCESS_ENABLE_EN			 (1L<<0)
+#define BNX2_NVM_ACCESS_ENABLE_WR_EN			 (1L<<1)
+
+#define BNX2_NVM_WRITE1					0x00006428
+#define BNX2_NVM_WRITE1_WREN_CMD			 (0xffL<<0)
+#define BNX2_NVM_WRITE1_WRDI_CMD			 (0xffL<<8)
+#define BNX2_NVM_WRITE1_SR_DATA				 (0xffL<<16)
+
+
+
+/*
+ *  dma_reg definition
+ *  offset: 0xc00
+ */
+#define BNX2_DMA_COMMAND				0x00000c00
+#define BNX2_DMA_COMMAND_ENABLE				 (1L<<0)
+
+#define BNX2_DMA_STATUS					0x00000c04
+#define BNX2_DMA_STATUS_PAR_ERROR_STATE			 (1L<<0)
+#define BNX2_DMA_STATUS_READ_TRANSFERS_STAT		 (1L<<16)
+#define BNX2_DMA_STATUS_READ_DELAY_PCI_CLKS_STAT	 (1L<<17)
+#define BNX2_DMA_STATUS_BIG_READ_TRANSFERS_STAT		 (1L<<18)
+#define BNX2_DMA_STATUS_BIG_READ_DELAY_PCI_CLKS_STAT	 (1L<<19)
+#define BNX2_DMA_STATUS_BIG_READ_RETRY_AFTER_DATA_STAT	 (1L<<20)
+#define BNX2_DMA_STATUS_WRITE_TRANSFERS_STAT		 (1L<<21)
+#define BNX2_DMA_STATUS_WRITE_DELAY_PCI_CLKS_STAT	 (1L<<22)
+#define BNX2_DMA_STATUS_BIG_WRITE_TRANSFERS_STAT	 (1L<<23)
+#define BNX2_DMA_STATUS_BIG_WRITE_DELAY_PCI_CLKS_STAT	 (1L<<24)
+#define BNX2_DMA_STATUS_BIG_WRITE_RETRY_AFTER_DATA_STAT	 (1L<<25)
+
+#define BNX2_DMA_CONFIG					0x00000c08
+#define BNX2_DMA_CONFIG_DATA_BYTE_SWAP			 (1L<<0)
+#define BNX2_DMA_CONFIG_DATA_WORD_SWAP			 (1L<<1)
+#define BNX2_DMA_CONFIG_CNTL_BYTE_SWAP			 (1L<<4)
+#define BNX2_DMA_CONFIG_CNTL_WORD_SWAP			 (1L<<5)
+#define BNX2_DMA_CONFIG_ONE_DMA				 (1L<<6)
+#define BNX2_DMA_CONFIG_CNTL_TWO_DMA			 (1L<<7)
+#define BNX2_DMA_CONFIG_CNTL_FPGA_MODE			 (1L<<8)
+#define BNX2_DMA_CONFIG_CNTL_PING_PONG_DMA		 (1L<<10)
+#define BNX2_DMA_CONFIG_CNTL_PCI_COMP_DLY		 (1L<<11)
+#define BNX2_DMA_CONFIG_NO_RCHANS_IN_USE		 (0xfL<<12)
+#define BNX2_DMA_CONFIG_NO_WCHANS_IN_USE		 (0xfL<<16)
+#define BNX2_DMA_CONFIG_PCI_CLK_CMP_BITS		 (0x7L<<20)
+#define BNX2_DMA_CONFIG_PCI_FAST_CLK_CMP		 (1L<<23)
+#define BNX2_DMA_CONFIG_BIG_SIZE			 (0xfL<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_NONE			 (0x0L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_64			 (0x1L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_128			 (0x2L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_256			 (0x4L<<24)
+#define BNX2_DMA_CONFIG_BIG_SIZE_512			 (0x8L<<24)
+
+#define BNX2_DMA_BLACKOUT				0x00000c0c
+#define BNX2_DMA_BLACKOUT_RD_RETRY_BLACKOUT		 (0xffL<<0)
+#define BNX2_DMA_BLACKOUT_2ND_RD_RETRY_BLACKOUT		 (0xffL<<8)
+#define BNX2_DMA_BLACKOUT_WR_RETRY_BLACKOUT		 (0xffL<<16)
+
+#define BNX2_DMA_RCHAN_STAT				0x00000c30
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_0			 (0x7L<<0)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_0			 (1L<<3)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_1			 (0x7L<<4)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_1			 (1L<<7)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_2			 (0x7L<<8)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_2			 (1L<<11)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_3			 (0x7L<<12)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_3			 (1L<<15)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_4			 (0x7L<<16)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_4			 (1L<<19)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_5			 (0x7L<<20)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_5			 (1L<<23)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_6			 (0x7L<<24)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_6			 (1L<<27)
+#define BNX2_DMA_RCHAN_STAT_COMP_CODE_7			 (0x7L<<28)
+#define BNX2_DMA_RCHAN_STAT_PAR_ERR_7			 (1L<<31)
+
+#define BNX2_DMA_WCHAN_STAT				0x00000c34
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_0			 (0x7L<<0)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_0			 (1L<<3)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_1			 (0x7L<<4)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_1			 (1L<<7)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_2			 (0x7L<<8)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_2			 (1L<<11)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_3			 (0x7L<<12)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_3			 (1L<<15)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_4			 (0x7L<<16)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_4			 (1L<<19)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_5			 (0x7L<<20)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_5			 (1L<<23)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_6			 (0x7L<<24)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_6			 (1L<<27)
+#define BNX2_DMA_WCHAN_STAT_COMP_CODE_7			 (0x7L<<28)
+#define BNX2_DMA_WCHAN_STAT_PAR_ERR_7			 (1L<<31)
+
+#define BNX2_DMA_RCHAN_ASSIGNMENT			0x00000c38
+#define BNX2_DMA_RCHAN_ASSIGNMENT_0			 (0xfL<<0)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_1			 (0xfL<<4)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_2			 (0xfL<<8)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_3			 (0xfL<<12)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_4			 (0xfL<<16)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_5			 (0xfL<<20)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_6			 (0xfL<<24)
+#define BNX2_DMA_RCHAN_ASSIGNMENT_7			 (0xfL<<28)
+
+#define BNX2_DMA_WCHAN_ASSIGNMENT			0x00000c3c
+#define BNX2_DMA_WCHAN_ASSIGNMENT_0			 (0xfL<<0)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_1			 (0xfL<<4)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_2			 (0xfL<<8)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_3			 (0xfL<<12)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_4			 (0xfL<<16)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_5			 (0xfL<<20)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_6			 (0xfL<<24)
+#define BNX2_DMA_WCHAN_ASSIGNMENT_7			 (0xfL<<28)
+
+#define BNX2_DMA_RCHAN_STAT_00				0x00000c40
+#define BNX2_DMA_RCHAN_STAT_00_RCHAN_STA_HOST_ADDR_LOW	 (0xffffffffL<<0)
+
+#define BNX2_DMA_RCHAN_STAT_01				0x00000c44
+#define BNX2_DMA_RCHAN_STAT_01_RCHAN_STA_HOST_ADDR_HIGH	 (0xffffffffL<<0)
+
+#define BNX2_DMA_RCHAN_STAT_02				0x00000c48
+#define BNX2_DMA_RCHAN_STAT_02_LENGTH			 (0xffffL<<0)
+#define BNX2_DMA_RCHAN_STAT_02_WORD_SWAP		 (1L<<16)
+#define BNX2_DMA_RCHAN_STAT_02_BYTE_SWAP		 (1L<<17)
+#define BNX2_DMA_RCHAN_STAT_02_PRIORITY_LVL		 (1L<<18)
+
+#define BNX2_DMA_RCHAN_STAT_10				0x00000c4c
+#define BNX2_DMA_RCHAN_STAT_11				0x00000c50
+#define BNX2_DMA_RCHAN_STAT_12				0x00000c54
+#define BNX2_DMA_RCHAN_STAT_20				0x00000c58
+#define BNX2_DMA_RCHAN_STAT_21				0x00000c5c
+#define BNX2_DMA_RCHAN_STAT_22				0x00000c60
+#define BNX2_DMA_RCHAN_STAT_30				0x00000c64
+#define BNX2_DMA_RCHAN_STAT_31				0x00000c68
+#define BNX2_DMA_RCHAN_STAT_32				0x00000c6c
+#define BNX2_DMA_RCHAN_STAT_40				0x00000c70
+#define BNX2_DMA_RCHAN_STAT_41				0x00000c74
+#define BNX2_DMA_RCHAN_STAT_42				0x00000c78
+#define BNX2_DMA_RCHAN_STAT_50				0x00000c7c
+#define BNX2_DMA_RCHAN_STAT_51				0x00000c80
+#define BNX2_DMA_RCHAN_STAT_52				0x00000c84
+#define BNX2_DMA_RCHAN_STAT_60				0x00000c88
+#define BNX2_DMA_RCHAN_STAT_61				0x00000c8c
+#define BNX2_DMA_RCHAN_STAT_62				0x00000c90
+#define BNX2_DMA_RCHAN_STAT_70				0x00000c94
+#define BNX2_DMA_RCHAN_STAT_71				0x00000c98
+#define BNX2_DMA_RCHAN_STAT_72				0x00000c9c
+#define BNX2_DMA_WCHAN_STAT_00				0x00000ca0
+#define BNX2_DMA_WCHAN_STAT_00_WCHAN_STA_HOST_ADDR_LOW	 (0xffffffffL<<0)
+
+#define BNX2_DMA_WCHAN_STAT_01				0x00000ca4
+#define BNX2_DMA_WCHAN_STAT_01_WCHAN_STA_HOST_ADDR_HIGH	 (0xffffffffL<<0)
+
+#define BNX2_DMA_WCHAN_STAT_02				0x00000ca8
+#define BNX2_DMA_WCHAN_STAT_02_LENGTH			 (0xffffL<<0)
+#define BNX2_DMA_WCHAN_STAT_02_WORD_SWAP		 (1L<<16)
+#define BNX2_DMA_WCHAN_STAT_02_BYTE_SWAP		 (1L<<17)
+#define BNX2_DMA_WCHAN_STAT_02_PRIORITY_LVL		 (1L<<18)
+
+#define BNX2_DMA_WCHAN_STAT_10				0x00000cac
+#define BNX2_DMA_WCHAN_STAT_11				0x00000cb0
+#define BNX2_DMA_WCHAN_STAT_12				0x00000cb4
+#define BNX2_DMA_WCHAN_STAT_20				0x00000cb8
+#define BNX2_DMA_WCHAN_STAT_21				0x00000cbc
+#define BNX2_DMA_WCHAN_STAT_22				0x00000cc0
+#define BNX2_DMA_WCHAN_STAT_30				0x00000cc4
+#define BNX2_DMA_WCHAN_STAT_31				0x00000cc8
+#define BNX2_DMA_WCHAN_STAT_32				0x00000ccc
+#define BNX2_DMA_WCHAN_STAT_40				0x00000cd0
+#define BNX2_DMA_WCHAN_STAT_41				0x00000cd4
+#define BNX2_DMA_WCHAN_STAT_42				0x00000cd8
+#define BNX2_DMA_WCHAN_STAT_50				0x00000cdc
+#define BNX2_DMA_WCHAN_STAT_51				0x00000ce0
+#define BNX2_DMA_WCHAN_STAT_52				0x00000ce4
+#define BNX2_DMA_WCHAN_STAT_60				0x00000ce8
+#define BNX2_DMA_WCHAN_STAT_61				0x00000cec
+#define BNX2_DMA_WCHAN_STAT_62				0x00000cf0
+#define BNX2_DMA_WCHAN_STAT_70				0x00000cf4
+#define BNX2_DMA_WCHAN_STAT_71				0x00000cf8
+#define BNX2_DMA_WCHAN_STAT_72				0x00000cfc
+#define BNX2_DMA_ARB_STAT_00				0x00000d00
+#define BNX2_DMA_ARB_STAT_00_MASTER			 (0xffffL<<0)
+#define BNX2_DMA_ARB_STAT_00_MASTER_ENC			 (0xffL<<16)
+#define BNX2_DMA_ARB_STAT_00_CUR_BINMSTR		 (0xffL<<24)
+
+#define BNX2_DMA_ARB_STAT_01				0x00000d04
+#define BNX2_DMA_ARB_STAT_01_LPR_RPTR			 (0xfL<<0)
+#define BNX2_DMA_ARB_STAT_01_LPR_WPTR			 (0xfL<<4)
+#define BNX2_DMA_ARB_STAT_01_LPB_RPTR			 (0xfL<<8)
+#define BNX2_DMA_ARB_STAT_01_LPB_WPTR			 (0xfL<<12)
+#define BNX2_DMA_ARB_STAT_01_HPR_RPTR			 (0xfL<<16)
+#define BNX2_DMA_ARB_STAT_01_HPR_WPTR			 (0xfL<<20)
+#define BNX2_DMA_ARB_STAT_01_HPB_RPTR			 (0xfL<<24)
+#define BNX2_DMA_ARB_STAT_01_HPB_WPTR			 (0xfL<<28)
+
+#define BNX2_DMA_FUSE_CTRL0_CMD				0x00000f00
+#define BNX2_DMA_FUSE_CTRL0_CMD_PWRUP_DONE		 (1L<<0)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT_DONE		 (1L<<1)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SHIFT			 (1L<<2)
+#define BNX2_DMA_FUSE_CTRL0_CMD_LOAD			 (1L<<3)
+#define BNX2_DMA_FUSE_CTRL0_CMD_SEL			 (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL0_DATA			0x00000f04
+#define BNX2_DMA_FUSE_CTRL1_CMD				0x00000f08
+#define BNX2_DMA_FUSE_CTRL1_CMD_PWRUP_DONE		 (1L<<0)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT_DONE		 (1L<<1)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SHIFT			 (1L<<2)
+#define BNX2_DMA_FUSE_CTRL1_CMD_LOAD			 (1L<<3)
+#define BNX2_DMA_FUSE_CTRL1_CMD_SEL			 (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL1_DATA			0x00000f0c
+#define BNX2_DMA_FUSE_CTRL2_CMD				0x00000f10
+#define BNX2_DMA_FUSE_CTRL2_CMD_PWRUP_DONE		 (1L<<0)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT_DONE		 (1L<<1)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SHIFT			 (1L<<2)
+#define BNX2_DMA_FUSE_CTRL2_CMD_LOAD			 (1L<<3)
+#define BNX2_DMA_FUSE_CTRL2_CMD_SEL			 (0xfL<<8)
+
+#define BNX2_DMA_FUSE_CTRL2_DATA			0x00000f14
+
+
+/*
+ *  context_reg definition
+ *  offset: 0x1000
+ */
+#define BNX2_CTX_COMMAND				0x00001000
+#define BNX2_CTX_COMMAND_ENABLED			 (1L<<0)
+
+#define BNX2_CTX_STATUS					0x00001004
+#define BNX2_CTX_STATUS_LOCK_WAIT			 (1L<<0)
+#define BNX2_CTX_STATUS_READ_STAT			 (1L<<16)
+#define BNX2_CTX_STATUS_WRITE_STAT			 (1L<<17)
+#define BNX2_CTX_STATUS_ACC_STALL_STAT			 (1L<<18)
+#define BNX2_CTX_STATUS_LOCK_STALL_STAT			 (1L<<19)
+
+#define BNX2_CTX_VIRT_ADDR				0x00001008
+#define BNX2_CTX_VIRT_ADDR_VIRT_ADDR			 (0x7fffL<<6)
+
+#define BNX2_CTX_PAGE_TBL				0x0000100c
+#define BNX2_CTX_PAGE_TBL_PAGE_TBL			 (0x3fffL<<6)
+
+#define BNX2_CTX_DATA_ADR				0x00001010
+#define BNX2_CTX_DATA_ADR_DATA_ADR			 (0x7ffffL<<2)
+
+#define BNX2_CTX_DATA					0x00001014
+#define BNX2_CTX_LOCK					0x00001018
+#define BNX2_CTX_LOCK_TYPE				 (0x7L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_VOID		 (0x0L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_COMPLETE		 (0x7L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_PROTOCOL		 (0x1L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX			 (0x2L<<0)
+#define BNX2_CTX_LOCK_TYPE_LOCK_TYPE_TIMER		 (0x4L<<0)
+#define BNX2_CTX_LOCK_CID_VALUE				 (0x3fffL<<7)
+#define BNX2_CTX_LOCK_GRANTED				 (1L<<26)
+#define BNX2_CTX_LOCK_MODE				 (0x7L<<27)
+#define BNX2_CTX_LOCK_MODE_UNLOCK			 (0x0L<<27)
+#define BNX2_CTX_LOCK_MODE_IMMEDIATE			 (0x1L<<27)
+#define BNX2_CTX_LOCK_MODE_SURE				 (0x2L<<27)
+#define BNX2_CTX_LOCK_STATUS				 (1L<<30)
+#define BNX2_CTX_LOCK_REQ				 (1L<<31)
+
+#define BNX2_CTX_ACCESS_STATUS				0x00001040
+#define BNX2_CTX_ACCESS_STATUS_MASTERENCODED		 (0xfL<<0)
+#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYSM		 (0x3L<<10)
+#define BNX2_CTX_ACCESS_STATUS_PAGETABLEINITSM		 (0x3L<<12)
+#define BNX2_CTX_ACCESS_STATUS_ACCESSMEMORYINITSM	 (0x3L<<14)
+#define BNX2_CTX_ACCESS_STATUS_QUALIFIED_REQUEST	 (0x7ffL<<17)
+
+#define BNX2_CTX_DBG_LOCK_STATUS			0x00001044
+#define BNX2_CTX_DBG_LOCK_STATUS_SM			 (0x3ffL<<0)
+#define BNX2_CTX_DBG_LOCK_STATUS_MATCH			 (0x3ffL<<22)
+
+#define BNX2_CTX_CHNL_LOCK_STATUS_0			0x00001080
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_CID			 (0x3fffL<<0)
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_TYPE		 (0x3L<<14)
+#define BNX2_CTX_CHNL_LOCK_STATUS_0_MODE		 (1L<<16)
+
+#define BNX2_CTX_CHNL_LOCK_STATUS_1			0x00001084
+#define BNX2_CTX_CHNL_LOCK_STATUS_2			0x00001088
+#define BNX2_CTX_CHNL_LOCK_STATUS_3			0x0000108c
+#define BNX2_CTX_CHNL_LOCK_STATUS_4			0x00001090
+#define BNX2_CTX_CHNL_LOCK_STATUS_5			0x00001094
+#define BNX2_CTX_CHNL_LOCK_STATUS_6			0x00001098
+#define BNX2_CTX_CHNL_LOCK_STATUS_7			0x0000109c
+#define BNX2_CTX_CHNL_LOCK_STATUS_8			0x000010a0
+
+
+/*
+ *  emac_reg definition
+ *  offset: 0x1400
+ */
+#define BNX2_EMAC_MODE					0x00001400
+#define BNX2_EMAC_MODE_RESET				 (1L<<0)
+#define BNX2_EMAC_MODE_HALF_DUPLEX			 (1L<<1)
+#define BNX2_EMAC_MODE_PORT				 (0x3L<<2)
+#define BNX2_EMAC_MODE_PORT_NONE			 (0L<<2)
+#define BNX2_EMAC_MODE_PORT_MII				 (1L<<2)
+#define BNX2_EMAC_MODE_PORT_GMII			 (2L<<2)
+#define BNX2_EMAC_MODE_PORT_MII_10			 (3L<<2)
+#define BNX2_EMAC_MODE_MAC_LOOP				 (1L<<4)
+#define BNX2_EMAC_MODE_25G				 (1L<<5)
+#define BNX2_EMAC_MODE_TAGGED_MAC_CTL			 (1L<<7)
+#define BNX2_EMAC_MODE_TX_BURST				 (1L<<8)
+#define BNX2_EMAC_MODE_MAX_DEFER_DROP_ENA		 (1L<<9)
+#define BNX2_EMAC_MODE_EXT_LINK_POL			 (1L<<10)
+#define BNX2_EMAC_MODE_FORCE_LINK			 (1L<<11)
+#define BNX2_EMAC_MODE_MPKT				 (1L<<18)
+#define BNX2_EMAC_MODE_MPKT_RCVD			 (1L<<19)
+#define BNX2_EMAC_MODE_ACPI_RCVD			 (1L<<20)
+
+#define BNX2_EMAC_STATUS				0x00001404
+#define BNX2_EMAC_STATUS_LINK				 (1L<<11)
+#define BNX2_EMAC_STATUS_LINK_CHANGE			 (1L<<12)
+#define BNX2_EMAC_STATUS_MI_COMPLETE			 (1L<<22)
+#define BNX2_EMAC_STATUS_MI_INT				 (1L<<23)
+#define BNX2_EMAC_STATUS_AP_ERROR			 (1L<<24)
+#define BNX2_EMAC_STATUS_PARITY_ERROR_STATE		 (1L<<31)
+
+#define BNX2_EMAC_ATTENTION_ENA				0x00001408
+#define BNX2_EMAC_ATTENTION_ENA_LINK			 (1L<<11)
+#define BNX2_EMAC_ATTENTION_ENA_MI_COMPLETE		 (1L<<22)
+#define BNX2_EMAC_ATTENTION_ENA_MI_INT			 (1L<<23)
+#define BNX2_EMAC_ATTENTION_ENA_AP_ERROR		 (1L<<24)
+
+#define BNX2_EMAC_LED					0x0000140c
+#define BNX2_EMAC_LED_OVERRIDE				 (1L<<0)
+#define BNX2_EMAC_LED_1000MB_OVERRIDE			 (1L<<1)
+#define BNX2_EMAC_LED_100MB_OVERRIDE			 (1L<<2)
+#define BNX2_EMAC_LED_10MB_OVERRIDE			 (1L<<3)
+#define BNX2_EMAC_LED_TRAFFIC_OVERRIDE			 (1L<<4)
+#define BNX2_EMAC_LED_BLNK_TRAFFIC			 (1L<<5)
+#define BNX2_EMAC_LED_TRAFFIC				 (1L<<6)
+#define BNX2_EMAC_LED_1000MB				 (1L<<7)
+#define BNX2_EMAC_LED_100MB				 (1L<<8)
+#define BNX2_EMAC_LED_10MB				 (1L<<9)
+#define BNX2_EMAC_LED_TRAFFIC_STAT			 (1L<<10)
+#define BNX2_EMAC_LED_BLNK_RATE				 (0xfffL<<19)
+#define BNX2_EMAC_LED_BLNK_RATE_ENA			 (1L<<31)
+
+#define BNX2_EMAC_MAC_MATCH0				0x00001410
+#define BNX2_EMAC_MAC_MATCH1				0x00001414
+#define BNX2_EMAC_MAC_MATCH2				0x00001418
+#define BNX2_EMAC_MAC_MATCH3				0x0000141c
+#define BNX2_EMAC_MAC_MATCH4				0x00001420
+#define BNX2_EMAC_MAC_MATCH5				0x00001424
+#define BNX2_EMAC_MAC_MATCH6				0x00001428
+#define BNX2_EMAC_MAC_MATCH7				0x0000142c
+#define BNX2_EMAC_MAC_MATCH8				0x00001430
+#define BNX2_EMAC_MAC_MATCH9				0x00001434
+#define BNX2_EMAC_MAC_MATCH10				0x00001438
+#define BNX2_EMAC_MAC_MATCH11				0x0000143c
+#define BNX2_EMAC_MAC_MATCH12				0x00001440
+#define BNX2_EMAC_MAC_MATCH13				0x00001444
+#define BNX2_EMAC_MAC_MATCH14				0x00001448
+#define BNX2_EMAC_MAC_MATCH15				0x0000144c
+#define BNX2_EMAC_MAC_MATCH16				0x00001450
+#define BNX2_EMAC_MAC_MATCH17				0x00001454
+#define BNX2_EMAC_MAC_MATCH18				0x00001458
+#define BNX2_EMAC_MAC_MATCH19				0x0000145c
+#define BNX2_EMAC_MAC_MATCH20				0x00001460
+#define BNX2_EMAC_MAC_MATCH21				0x00001464
+#define BNX2_EMAC_MAC_MATCH22				0x00001468
+#define BNX2_EMAC_MAC_MATCH23				0x0000146c
+#define BNX2_EMAC_MAC_MATCH24				0x00001470
+#define BNX2_EMAC_MAC_MATCH25				0x00001474
+#define BNX2_EMAC_MAC_MATCH26				0x00001478
+#define BNX2_EMAC_MAC_MATCH27				0x0000147c
+#define BNX2_EMAC_MAC_MATCH28				0x00001480
+#define BNX2_EMAC_MAC_MATCH29				0x00001484
+#define BNX2_EMAC_MAC_MATCH30				0x00001488
+#define BNX2_EMAC_MAC_MATCH31				0x0000148c
+#define BNX2_EMAC_BACKOFF_SEED				0x00001498
+#define BNX2_EMAC_BACKOFF_SEED_EMAC_BACKOFF_SEED	 (0x3ffL<<0)
+
+#define BNX2_EMAC_RX_MTU_SIZE				0x0000149c
+#define BNX2_EMAC_RX_MTU_SIZE_MTU_SIZE			 (0xffffL<<0)
+#define BNX2_EMAC_RX_MTU_SIZE_JUMBO_ENA			 (1L<<31)
+
+#define BNX2_EMAC_SERDES_CNTL				0x000014a4
+#define BNX2_EMAC_SERDES_CNTL_RXR			 (0x7L<<0)
+#define BNX2_EMAC_SERDES_CNTL_RXG			 (0x3L<<3)
+#define BNX2_EMAC_SERDES_CNTL_RXCKSEL			 (1L<<6)
+#define BNX2_EMAC_SERDES_CNTL_TXBIAS			 (0x7L<<7)
+#define BNX2_EMAC_SERDES_CNTL_BGMAX			 (1L<<10)
+#define BNX2_EMAC_SERDES_CNTL_BGMIN			 (1L<<11)
+#define BNX2_EMAC_SERDES_CNTL_TXMODE			 (1L<<12)
+#define BNX2_EMAC_SERDES_CNTL_TXEDGE			 (1L<<13)
+#define BNX2_EMAC_SERDES_CNTL_SERDES_MODE		 (1L<<14)
+#define BNX2_EMAC_SERDES_CNTL_PLLTEST			 (1L<<15)
+#define BNX2_EMAC_SERDES_CNTL_CDET_EN			 (1L<<16)
+#define BNX2_EMAC_SERDES_CNTL_TBI_LBK			 (1L<<17)
+#define BNX2_EMAC_SERDES_CNTL_REMOTE_LBK		 (1L<<18)
+#define BNX2_EMAC_SERDES_CNTL_REV_PHASE			 (1L<<19)
+#define BNX2_EMAC_SERDES_CNTL_REGCTL12			 (0x3L<<20)
+#define BNX2_EMAC_SERDES_CNTL_REGCTL25			 (0x3L<<22)
+
+#define BNX2_EMAC_SERDES_STATUS				0x000014a8
+#define BNX2_EMAC_SERDES_STATUS_RX_STAT			 (0xffL<<0)
+#define BNX2_EMAC_SERDES_STATUS_COMMA_DET		 (1L<<8)
+
+#define BNX2_EMAC_MDIO_COMM				0x000014ac
+#define BNX2_EMAC_MDIO_COMM_DATA			 (0xffffL<<0)
+#define BNX2_EMAC_MDIO_COMM_REG_ADDR			 (0x1fL<<16)
+#define BNX2_EMAC_MDIO_COMM_PHY_ADDR			 (0x1fL<<21)
+#define BNX2_EMAC_MDIO_COMM_COMMAND			 (0x3L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_0		 (0L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_WRITE		 (1L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_READ		 (2L<<26)
+#define BNX2_EMAC_MDIO_COMM_COMMAND_UNDEFINED_3		 (3L<<26)
+#define BNX2_EMAC_MDIO_COMM_FAIL			 (1L<<28)
+#define BNX2_EMAC_MDIO_COMM_START_BUSY			 (1L<<29)
+#define BNX2_EMAC_MDIO_COMM_DISEXT			 (1L<<30)
+
+#define BNX2_EMAC_MDIO_STATUS				0x000014b0
+#define BNX2_EMAC_MDIO_STATUS_LINK			 (1L<<0)
+#define BNX2_EMAC_MDIO_STATUS_10MB			 (1L<<1)
+
+#define BNX2_EMAC_MDIO_MODE				0x000014b4
+#define BNX2_EMAC_MDIO_MODE_SHORT_PREAMBLE		 (1L<<1)
+#define BNX2_EMAC_MDIO_MODE_AUTO_POLL			 (1L<<4)
+#define BNX2_EMAC_MDIO_MODE_BIT_BANG			 (1L<<8)
+#define BNX2_EMAC_MDIO_MODE_MDIO			 (1L<<9)
+#define BNX2_EMAC_MDIO_MODE_MDIO_OE			 (1L<<10)
+#define BNX2_EMAC_MDIO_MODE_MDC				 (1L<<11)
+#define BNX2_EMAC_MDIO_MODE_MDINT			 (1L<<12)
+#define BNX2_EMAC_MDIO_MODE_CLOCK_CNT			 (0x1fL<<16)
+
+#define BNX2_EMAC_MDIO_AUTO_STATUS			0x000014b8
+#define BNX2_EMAC_MDIO_AUTO_STATUS_AUTO_ERR		 (1L<<0)
+
+#define BNX2_EMAC_TX_MODE				0x000014bc
+#define BNX2_EMAC_TX_MODE_RESET				 (1L<<0)
+#define BNX2_EMAC_TX_MODE_EXT_PAUSE_EN			 (1L<<3)
+#define BNX2_EMAC_TX_MODE_FLOW_EN			 (1L<<4)
+#define BNX2_EMAC_TX_MODE_BIG_BACKOFF			 (1L<<5)
+#define BNX2_EMAC_TX_MODE_LONG_PAUSE			 (1L<<6)
+#define BNX2_EMAC_TX_MODE_LINK_AWARE			 (1L<<7)
+
+#define BNX2_EMAC_TX_STATUS				0x000014c0
+#define BNX2_EMAC_TX_STATUS_XOFFED			 (1L<<0)
+#define BNX2_EMAC_TX_STATUS_XOFF_SENT			 (1L<<1)
+#define BNX2_EMAC_TX_STATUS_XON_SENT			 (1L<<2)
+#define BNX2_EMAC_TX_STATUS_LINK_UP			 (1L<<3)
+#define BNX2_EMAC_TX_STATUS_UNDERRUN			 (1L<<4)
+
+#define BNX2_EMAC_TX_LENGTHS				0x000014c4
+#define BNX2_EMAC_TX_LENGTHS_SLOT			 (0xffL<<0)
+#define BNX2_EMAC_TX_LENGTHS_IPG			 (0xfL<<8)
+#define BNX2_EMAC_TX_LENGTHS_IPG_CRS			 (0x3L<<12)
+
+#define BNX2_EMAC_RX_MODE				0x000014c8
+#define BNX2_EMAC_RX_MODE_RESET				 (1L<<0)
+#define BNX2_EMAC_RX_MODE_FLOW_EN			 (1L<<2)
+#define BNX2_EMAC_RX_MODE_KEEP_MAC_CONTROL		 (1L<<3)
+#define BNX2_EMAC_RX_MODE_KEEP_PAUSE			 (1L<<4)
+#define BNX2_EMAC_RX_MODE_ACCEPT_OVERSIZE		 (1L<<5)
+#define BNX2_EMAC_RX_MODE_ACCEPT_RUNTS			 (1L<<6)
+#define BNX2_EMAC_RX_MODE_LLC_CHK			 (1L<<7)
+#define BNX2_EMAC_RX_MODE_PROMISCUOUS			 (1L<<8)
+#define BNX2_EMAC_RX_MODE_NO_CRC_CHK			 (1L<<9)
+#define BNX2_EMAC_RX_MODE_KEEP_VLAN_TAG			 (1L<<10)
+#define BNX2_EMAC_RX_MODE_FILT_BROADCAST		 (1L<<11)
+#define BNX2_EMAC_RX_MODE_SORT_MODE			 (1L<<12)
+
+#define BNX2_EMAC_RX_STATUS				0x000014cc
+#define BNX2_EMAC_RX_STATUS_FFED			 (1L<<0)
+#define BNX2_EMAC_RX_STATUS_FF_RECEIVED			 (1L<<1)
+#define BNX2_EMAC_RX_STATUS_N_RECEIVED			 (1L<<2)
+
+#define BNX2_EMAC_MULTICAST_HASH0			0x000014d0
+#define BNX2_EMAC_MULTICAST_HASH1			0x000014d4
+#define BNX2_EMAC_MULTICAST_HASH2			0x000014d8
+#define BNX2_EMAC_MULTICAST_HASH3			0x000014dc
+#define BNX2_EMAC_MULTICAST_HASH4			0x000014e0
+#define BNX2_EMAC_MULTICAST_HASH5			0x000014e4
+#define BNX2_EMAC_MULTICAST_HASH6			0x000014e8
+#define BNX2_EMAC_MULTICAST_HASH7			0x000014ec
+#define BNX2_EMAC_RX_STAT_IFHCINOCTETS			0x00001500
+#define BNX2_EMAC_RX_STAT_IFHCINBADOCTETS		0x00001504
+#define BNX2_EMAC_RX_STAT_ETHERSTATSFRAGMENTS		0x00001508
+#define BNX2_EMAC_RX_STAT_IFHCINUCASTPKTS		0x0000150c
+#define BNX2_EMAC_RX_STAT_IFHCINMULTICASTPKTS		0x00001510
+#define BNX2_EMAC_RX_STAT_IFHCINBROADCASTPKTS		0x00001514
+#define BNX2_EMAC_RX_STAT_DOT3STATSFCSERRORS		0x00001518
+#define BNX2_EMAC_RX_STAT_DOT3STATSALIGNMENTERRORS	0x0000151c
+#define BNX2_EMAC_RX_STAT_DOT3STATSCARRIERSENSEERRORS	0x00001520
+#define BNX2_EMAC_RX_STAT_XONPAUSEFRAMESRECEIVED	0x00001524
+#define BNX2_EMAC_RX_STAT_XOFFPAUSEFRAMESRECEIVED	0x00001528
+#define BNX2_EMAC_RX_STAT_MACCONTROLFRAMESRECEIVED	0x0000152c
+#define BNX2_EMAC_RX_STAT_XOFFSTATEENTERED		0x00001530
+#define BNX2_EMAC_RX_STAT_DOT3STATSFRAMESTOOLONG	0x00001534
+#define BNX2_EMAC_RX_STAT_ETHERSTATSJABBERS		0x00001538
+#define BNX2_EMAC_RX_STAT_ETHERSTATSUNDERSIZEPKTS	0x0000153c
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS64OCTETS	0x00001540
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS	0x00001544
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS	0x00001548
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS	0x0000154c
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS	0x00001550
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS	0x00001554
+#define BNX2_EMAC_RX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS	0x00001558
+#define BNX2_EMAC_RXMAC_DEBUG0				0x0000155c
+#define BNX2_EMAC_RXMAC_DEBUG1				0x00001560
+#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_NE_BYTE_COUNT	 (1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG1_LENGTH_OUT_RANGE		 (1L<<1)
+#define BNX2_EMAC_RXMAC_DEBUG1_BAD_CRC			 (1L<<2)
+#define BNX2_EMAC_RXMAC_DEBUG1_RX_ERROR			 (1L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG1_ALIGN_ERROR		 (1L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG1_LAST_DATA		 (1L<<5)
+#define BNX2_EMAC_RXMAC_DEBUG1_ODD_BYTE_START		 (1L<<6)
+#define BNX2_EMAC_RXMAC_DEBUG1_BYTE_COUNT		 (0xffffL<<7)
+#define BNX2_EMAC_RXMAC_DEBUG1_SLOT_TIME		 (0xffL<<23)
+
+#define BNX2_EMAC_RXMAC_DEBUG2				0x00001564
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE			 (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_IDLE		 (0x0L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SFD		 (0x1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DATA		 (0x2L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SKEEP		 (0x3L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_EXT		 (0x4L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_DROP		 (0x5L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_SDROP		 (0x6L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_SM_STATE_FC		 (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE		 (0xfL<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_IDLE		 (0x0L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA0		 (0x1L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA1		 (0x2L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA2		 (0x3L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_DATA3		 (0x4L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_ABORT		 (0x5L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_WAIT		 (0x6L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_STATUS		 (0x7L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_IDI_STATE_LAST		 (0x8L<<3)
+#define BNX2_EMAC_RXMAC_DEBUG2_BYTE_IN			 (0xffL<<7)
+#define BNX2_EMAC_RXMAC_DEBUG2_FALSEC			 (1L<<15)
+#define BNX2_EMAC_RXMAC_DEBUG2_TAGGED			 (1L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE		 (1L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_IDLE		 (0L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_PAUSE_STATE_PAUSED	 (1L<<18)
+#define BNX2_EMAC_RXMAC_DEBUG2_SE_COUNTER		 (0xfL<<19)
+#define BNX2_EMAC_RXMAC_DEBUG2_QUANTA			 (0x1fL<<23)
+
+#define BNX2_EMAC_RXMAC_DEBUG3				0x00001568
+#define BNX2_EMAC_RXMAC_DEBUG3_PAUSE_CTR		 (0xffffL<<0)
+#define BNX2_EMAC_RXMAC_DEBUG3_TMP_PAUSE_CTR		 (0xffffL<<16)
+
+#define BNX2_EMAC_RXMAC_DEBUG4				0x0000156c
+#define BNX2_EMAC_RXMAC_DEBUG4_TYPE_FIELD		 (0xffffL<<0)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE		 (0x3fL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_IDLE		 (0x0L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC2		 (0x1L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UMAC3		 (0x2L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UNI		 (0x3L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC2		 (0x7L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MMAC3		 (0x5L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA1		 (0x6L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA2		 (0x7L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PSA3		 (0x8L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC2		 (0x9L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC3		 (0xaL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT1	 (0xeL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MWAIT2	 (0xfL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MCHECK	 (0x10L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MC		 (0x11L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC2		 (0x12L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC3		 (0x13L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA1		 (0x14L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA2		 (0x15L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BSA3		 (0x16L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BTYPE		 (0x17L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_BC		 (0x18L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PTYPE		 (0x19L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_CMD		 (0x1aL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MAC		 (0x1bL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_LATCH		 (0x1cL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XOFF		 (0x1dL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_XON		 (0x1eL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_PAUSED	 (0x1fL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_NPAUSED	 (0x20L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TTYPE		 (0x21L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_TVAL		 (0x22L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA1		 (0x23L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA2		 (0x24L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_USA3		 (0x25L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTYPE		 (0x26L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTTYPE	 (0x27L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_UTVAL		 (0x28L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_MTYPE		 (0x29L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_FILT_STATE_DROP		 (0x2aL<<16)
+#define BNX2_EMAC_RXMAC_DEBUG4_DROP_PKT			 (1L<<22)
+#define BNX2_EMAC_RXMAC_DEBUG4_SLOT_FILLED		 (1L<<23)
+#define BNX2_EMAC_RXMAC_DEBUG4_FALSE_CARRIER		 (1L<<24)
+#define BNX2_EMAC_RXMAC_DEBUG4_LAST_DATA		 (1L<<25)
+#define BNX2_EMAC_RXMAC_DEBUG4_sfd_FOUND		 (1L<<26)
+#define BNX2_EMAC_RXMAC_DEBUG4_ADVANCE			 (1L<<27)
+#define BNX2_EMAC_RXMAC_DEBUG4_START			 (1L<<28)
+
+#define BNX2_EMAC_RXMAC_DEBUG5				0x00001570
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM			 (0x7L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_IDLE		 (0L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_EOF	 (1L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_WAIT_STAT	 (2L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4FCRC	 (3L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4RDE	 (4L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_SET_EOF4ALL	 (5L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_PS_IDISM_1WD_WAIT_STAT	 (6L<<0)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1		 (0x7L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_VDW		 (0x0L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_STAT		 (0x1L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_AEOF		 (0x2L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_NEOF		 (0x3L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SOF		 (0x4L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SAEOF		 (0x6L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF1_SNEOF		 (0x7L<<4)
+#define BNX2_EMAC_RXMAC_DEBUG5_EOF_DETECTED		 (1L<<7)
+#define BNX2_EMAC_RXMAC_DEBUG5_CCODE_BUF0		 (0x7L<<8)
+#define BNX2_EMAC_RXMAC_DEBUG5_RPM_IDI_FIFO_FULL	 (1L<<11)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_CCODE		 (1L<<12)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_DATA		 (1L<<13)
+#define BNX2_EMAC_RXMAC_DEBUG5_LOAD_STAT		 (1L<<14)
+#define BNX2_EMAC_RXMAC_DEBUG5_CLR_STAT			 (1L<<15)
+#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_CCODE		 (0x3L<<16)
+#define BNX2_EMAC_RXMAC_DEBUG5_IDI_RPM_ACCEPT		 (1L<<19)
+#define BNX2_EMAC_RXMAC_DEBUG5_FMLEN			 (0xfffL<<20)
+
+#define BNX2_EMAC_RX_STAT_AC0				0x00001580
+#define BNX2_EMAC_RX_STAT_AC1				0x00001584
+#define BNX2_EMAC_RX_STAT_AC2				0x00001588
+#define BNX2_EMAC_RX_STAT_AC3				0x0000158c
+#define BNX2_EMAC_RX_STAT_AC4				0x00001590
+#define BNX2_EMAC_RX_STAT_AC5				0x00001594
+#define BNX2_EMAC_RX_STAT_AC6				0x00001598
+#define BNX2_EMAC_RX_STAT_AC7				0x0000159c
+#define BNX2_EMAC_RX_STAT_AC8				0x000015a0
+#define BNX2_EMAC_RX_STAT_AC9				0x000015a4
+#define BNX2_EMAC_RX_STAT_AC10				0x000015a8
+#define BNX2_EMAC_RX_STAT_AC11				0x000015ac
+#define BNX2_EMAC_RX_STAT_AC12				0x000015b0
+#define BNX2_EMAC_RX_STAT_AC13				0x000015b4
+#define BNX2_EMAC_RX_STAT_AC14				0x000015b8
+#define BNX2_EMAC_RX_STAT_AC15				0x000015bc
+#define BNX2_EMAC_RX_STAT_AC16				0x000015c0
+#define BNX2_EMAC_RX_STAT_AC17				0x000015c4
+#define BNX2_EMAC_RX_STAT_AC18				0x000015c8
+#define BNX2_EMAC_RX_STAT_AC19				0x000015cc
+#define BNX2_EMAC_RX_STAT_AC20				0x000015d0
+#define BNX2_EMAC_RX_STAT_AC21				0x000015d4
+#define BNX2_EMAC_RX_STAT_AC22				0x000015d8
+#define BNX2_EMAC_RXMAC_SUC_DBG_OVERRUNVEC		0x000015dc
+#define BNX2_EMAC_TX_STAT_IFHCOUTOCTETS			0x00001600
+#define BNX2_EMAC_TX_STAT_IFHCOUTBADOCTETS		0x00001604
+#define BNX2_EMAC_TX_STAT_ETHERSTATSCOLLISIONS		0x00001608
+#define BNX2_EMAC_TX_STAT_OUTXONSENT			0x0000160c
+#define BNX2_EMAC_TX_STAT_OUTXOFFSENT			0x00001610
+#define BNX2_EMAC_TX_STAT_FLOWCONTROLDONE		0x00001614
+#define BNX2_EMAC_TX_STAT_DOT3STATSSINGLECOLLISIONFRAMES	0x00001618
+#define BNX2_EMAC_TX_STAT_DOT3STATSMULTIPLECOLLISIONFRAMES	0x0000161c
+#define BNX2_EMAC_TX_STAT_DOT3STATSDEFERREDTRANSMISSIONS	0x00001620
+#define BNX2_EMAC_TX_STAT_DOT3STATSEXCESSIVECOLLISIONS	0x00001624
+#define BNX2_EMAC_TX_STAT_DOT3STATSLATECOLLISIONS	0x00001628
+#define BNX2_EMAC_TX_STAT_IFHCOUTUCASTPKTS		0x0000162c
+#define BNX2_EMAC_TX_STAT_IFHCOUTMULTICASTPKTS		0x00001630
+#define BNX2_EMAC_TX_STAT_IFHCOUTBROADCASTPKTS		0x00001634
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS64OCTETS	0x00001638
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS65OCTETSTO127OCTETS	0x0000163c
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS128OCTETSTO255OCTETS	0x00001640
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS256OCTETSTO511OCTETS	0x00001644
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS512OCTETSTO1023OCTETS	0x00001648
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1024OCTETSTO1522OCTETS	0x0000164c
+#define BNX2_EMAC_TX_STAT_ETHERSTATSPKTS1523OCTETSTO9022OCTETS	0x00001650
+#define BNX2_EMAC_TX_STAT_DOT3STATSINTERNALMACTRANSMITERRORS	0x00001654
+#define BNX2_EMAC_TXMAC_DEBUG0				0x00001658
+#define BNX2_EMAC_TXMAC_DEBUG1				0x0000165c
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE		 (0xfL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_IDLE		 (0x0L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_START0		 (0x1L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA0		 (0x4L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA1		 (0x5L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA2		 (0x6L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_DATA3		 (0x7L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT0		 (0x8L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_ODI_STATE_WAIT1		 (0x9L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG1_CRS_ENABLE		 (1L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG1_BAD_CRC			 (1L<<5)
+#define BNX2_EMAC_TXMAC_DEBUG1_SE_COUNTER		 (0xfL<<6)
+#define BNX2_EMAC_TXMAC_DEBUG1_SEND_PAUSE		 (1L<<10)
+#define BNX2_EMAC_TXMAC_DEBUG1_LATE_COLLISION		 (1L<<11)
+#define BNX2_EMAC_TXMAC_DEBUG1_MAX_DEFER		 (1L<<12)
+#define BNX2_EMAC_TXMAC_DEBUG1_DEFERRED			 (1L<<13)
+#define BNX2_EMAC_TXMAC_DEBUG1_ONE_BYTE			 (1L<<14)
+#define BNX2_EMAC_TXMAC_DEBUG1_IPG_TIME			 (0xfL<<15)
+#define BNX2_EMAC_TXMAC_DEBUG1_SLOT_TIME		 (0xffL<<19)
+
+#define BNX2_EMAC_TXMAC_DEBUG2				0x00001660
+#define BNX2_EMAC_TXMAC_DEBUG2_BACK_OFF			 (0x3ffL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG2_BYTE_COUNT		 (0xffffL<<10)
+#define BNX2_EMAC_TXMAC_DEBUG2_COL_COUNT		 (0x1fL<<26)
+#define BNX2_EMAC_TXMAC_DEBUG2_COL_BIT			 (1L<<31)
+
+#define BNX2_EMAC_TXMAC_DEBUG3				0x00001664
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE			 (0xfL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_IDLE		 (0x0L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE1		 (0x1L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_PRE2		 (0x2L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SFD		 (0x3L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_DATA		 (0x4L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC1		 (0x5L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_CRC2		 (0x6L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EXT		 (0x7L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATB		 (0x8L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_STATG		 (0x9L<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_JAM		 (0xaL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_EJAM		 (0xbL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BJAM		 (0xcL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_SWAIT		 (0xdL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_SM_STATE_BACKOFF		 (0xeL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE		 (0x7L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_IDLE		 (0x0L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_WAIT		 (0x1L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_UNI		 (0x2L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_MC		 (0x3L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC2		 (0x4L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC3		 (0x5L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_FILT_STATE_BC		 (0x6L<<4)
+#define BNX2_EMAC_TXMAC_DEBUG3_CRS_DONE			 (1L<<7)
+#define BNX2_EMAC_TXMAC_DEBUG3_XOFF			 (1L<<8)
+#define BNX2_EMAC_TXMAC_DEBUG3_SE_COUNTER		 (0xfL<<9)
+#define BNX2_EMAC_TXMAC_DEBUG3_QUANTA_COUNTER		 (0x1fL<<13)
+
+#define BNX2_EMAC_TXMAC_DEBUG4				0x00001668
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_COUNTER		 (0xffffL<<0)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE		 (0xfL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_IDLE		 (0x0L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA1		 (0x2L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA2		 (0x3L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_MCA3		 (0x6L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC1		 (0x7L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC2		 (0x5L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_SRC3		 (0x4L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TYPE		 (0xcL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CMD		 (0xeL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_TIME		 (0xaL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC1		 (0x8L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_CRC2		 (0x9L<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_PAUSE_STATE_WAIT		 (0xdL<<16)
+#define BNX2_EMAC_TXMAC_DEBUG4_STATS0_VALID		 (1L<<20)
+#define BNX2_EMAC_TXMAC_DEBUG4_APPEND_CRC		 (1L<<21)
+#define BNX2_EMAC_TXMAC_DEBUG4_SLOT_FILLED		 (1L<<22)
+#define BNX2_EMAC_TXMAC_DEBUG4_MAX_DEFER		 (1L<<23)
+#define BNX2_EMAC_TXMAC_DEBUG4_SEND_EXTEND		 (1L<<24)
+#define BNX2_EMAC_TXMAC_DEBUG4_SEND_PADDING		 (1L<<25)
+#define BNX2_EMAC_TXMAC_DEBUG4_EOF_LOC			 (1L<<26)
+#define BNX2_EMAC_TXMAC_DEBUG4_COLLIDING		 (1L<<27)
+#define BNX2_EMAC_TXMAC_DEBUG4_COL_IN			 (1L<<28)
+#define BNX2_EMAC_TXMAC_DEBUG4_BURSTING			 (1L<<29)
+#define BNX2_EMAC_TXMAC_DEBUG4_ADVANCE			 (1L<<30)
+#define BNX2_EMAC_TXMAC_DEBUG4_GO			 (1L<<31)
+
+#define BNX2_EMAC_TX_STAT_AC0				0x00001680
+#define BNX2_EMAC_TX_STAT_AC1				0x00001684
+#define BNX2_EMAC_TX_STAT_AC2				0x00001688
+#define BNX2_EMAC_TX_STAT_AC3				0x0000168c
+#define BNX2_EMAC_TX_STAT_AC4				0x00001690
+#define BNX2_EMAC_TX_STAT_AC5				0x00001694
+#define BNX2_EMAC_TX_STAT_AC6				0x00001698
+#define BNX2_EMAC_TX_STAT_AC7				0x0000169c
+#define BNX2_EMAC_TX_STAT_AC8				0x000016a0
+#define BNX2_EMAC_TX_STAT_AC9				0x000016a4
+#define BNX2_EMAC_TX_STAT_AC10				0x000016a8
+#define BNX2_EMAC_TX_STAT_AC11				0x000016ac
+#define BNX2_EMAC_TX_STAT_AC12				0x000016b0
+#define BNX2_EMAC_TX_STAT_AC13				0x000016b4
+#define BNX2_EMAC_TX_STAT_AC14				0x000016b8
+#define BNX2_EMAC_TX_STAT_AC15				0x000016bc
+#define BNX2_EMAC_TX_STAT_AC16				0x000016c0
+#define BNX2_EMAC_TX_STAT_AC17				0x000016c4
+#define BNX2_EMAC_TX_STAT_AC18				0x000016c8
+#define BNX2_EMAC_TX_STAT_AC19				0x000016cc
+#define BNX2_EMAC_TX_STAT_AC20				0x000016d0
+#define BNX2_EMAC_TX_STAT_AC21				0x000016d4
+#define BNX2_EMAC_TXMAC_SUC_DBG_OVERRUNVEC		0x000016d8
+
+
+/*
+ *  rpm_reg definition
+ *  offset: 0x1800
+ */
+#define BNX2_RPM_COMMAND				0x00001800
+#define BNX2_RPM_COMMAND_ENABLED			 (1L<<0)
+#define BNX2_RPM_COMMAND_OVERRUN_ABORT			 (1L<<4)
+
+#define BNX2_RPM_STATUS					0x00001804
+#define BNX2_RPM_STATUS_MBUF_WAIT			 (1L<<0)
+#define BNX2_RPM_STATUS_FREE_WAIT			 (1L<<1)
+
+#define BNX2_RPM_CONFIG					0x00001808
+#define BNX2_RPM_CONFIG_NO_PSD_HDR_CKSUM		 (1L<<0)
+#define BNX2_RPM_CONFIG_ACPI_ENA			 (1L<<1)
+#define BNX2_RPM_CONFIG_ACPI_KEEP			 (1L<<2)
+#define BNX2_RPM_CONFIG_MP_KEEP				 (1L<<3)
+#define BNX2_RPM_CONFIG_SORT_VECT_VAL			 (0xfL<<4)
+#define BNX2_RPM_CONFIG_IGNORE_VLAN			 (1L<<31)
+
+#define BNX2_RPM_VLAN_MATCH0				0x00001810
+#define BNX2_RPM_VLAN_MATCH0_RPM_VLAN_MTCH0_VALUE	 (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH1				0x00001814
+#define BNX2_RPM_VLAN_MATCH1_RPM_VLAN_MTCH1_VALUE	 (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH2				0x00001818
+#define BNX2_RPM_VLAN_MATCH2_RPM_VLAN_MTCH2_VALUE	 (0xfffL<<0)
+
+#define BNX2_RPM_VLAN_MATCH3				0x0000181c
+#define BNX2_RPM_VLAN_MATCH3_RPM_VLAN_MTCH3_VALUE	 (0xfffL<<0)
+
+#define BNX2_RPM_SORT_USER0				0x00001820
+#define BNX2_RPM_SORT_USER0_PM_EN			 (0xffffL<<0)
+#define BNX2_RPM_SORT_USER0_BC_EN			 (1L<<16)
+#define BNX2_RPM_SORT_USER0_MC_EN			 (1L<<17)
+#define BNX2_RPM_SORT_USER0_MC_HSH_EN			 (1L<<18)
+#define BNX2_RPM_SORT_USER0_PROM_EN			 (1L<<19)
+#define BNX2_RPM_SORT_USER0_VLAN_EN			 (0xfL<<20)
+#define BNX2_RPM_SORT_USER0_PROM_VLAN			 (1L<<24)
+#define BNX2_RPM_SORT_USER0_ENA				 (1L<<31)
+
+#define BNX2_RPM_SORT_USER1				0x00001824
+#define BNX2_RPM_SORT_USER1_PM_EN			 (0xffffL<<0)
+#define BNX2_RPM_SORT_USER1_BC_EN			 (1L<<16)
+#define BNX2_RPM_SORT_USER1_MC_EN			 (1L<<17)
+#define BNX2_RPM_SORT_USER1_MC_HSH_EN			 (1L<<18)
+#define BNX2_RPM_SORT_USER1_PROM_EN			 (1L<<19)
+#define BNX2_RPM_SORT_USER1_VLAN_EN			 (0xfL<<20)
+#define BNX2_RPM_SORT_USER1_PROM_VLAN			 (1L<<24)
+#define BNX2_RPM_SORT_USER1_ENA				 (1L<<31)
+
+#define BNX2_RPM_SORT_USER2				0x00001828
+#define BNX2_RPM_SORT_USER2_PM_EN			 (0xffffL<<0)
+#define BNX2_RPM_SORT_USER2_BC_EN			 (1L<<16)
+#define BNX2_RPM_SORT_USER2_MC_EN			 (1L<<17)
+#define BNX2_RPM_SORT_USER2_MC_HSH_EN			 (1L<<18)
+#define BNX2_RPM_SORT_USER2_PROM_EN			 (1L<<19)
+#define BNX2_RPM_SORT_USER2_VLAN_EN			 (0xfL<<20)
+#define BNX2_RPM_SORT_USER2_PROM_VLAN			 (1L<<24)
+#define BNX2_RPM_SORT_USER2_ENA				 (1L<<31)
+
+#define BNX2_RPM_SORT_USER3				0x0000182c
+#define BNX2_RPM_SORT_USER3_PM_EN			 (0xffffL<<0)
+#define BNX2_RPM_SORT_USER3_BC_EN			 (1L<<16)
+#define BNX2_RPM_SORT_USER3_MC_EN			 (1L<<17)
+#define BNX2_RPM_SORT_USER3_MC_HSH_EN			 (1L<<18)
+#define BNX2_RPM_SORT_USER3_PROM_EN			 (1L<<19)
+#define BNX2_RPM_SORT_USER3_VLAN_EN			 (0xfL<<20)
+#define BNX2_RPM_SORT_USER3_PROM_VLAN			 (1L<<24)
+#define BNX2_RPM_SORT_USER3_ENA				 (1L<<31)
+
+#define BNX2_RPM_STAT_L2_FILTER_DISCARDS		0x00001840
+#define BNX2_RPM_STAT_RULE_CHECKER_DISCARDS		0x00001844
+#define BNX2_RPM_STAT_IFINFTQDISCARDS			0x00001848
+#define BNX2_RPM_STAT_IFINMBUFDISCARD			0x0000184c
+#define BNX2_RPM_STAT_RULE_CHECKER_P4_HIT		0x00001850
+#define BNX2_RPM_STAT_AC0				0x00001880
+#define BNX2_RPM_STAT_AC1				0x00001884
+#define BNX2_RPM_STAT_AC2				0x00001888
+#define BNX2_RPM_STAT_AC3				0x0000188c
+#define BNX2_RPM_STAT_AC4				0x00001890
+#define BNX2_RPM_RC_CNTL_0				0x00001900
+#define BNX2_RPM_RC_CNTL_0_OFFSET			 (0xffL<<0)
+#define BNX2_RPM_RC_CNTL_0_CLASS			 (0x7L<<8)
+#define BNX2_RPM_RC_CNTL_0_PRIORITY			 (1L<<11)
+#define BNX2_RPM_RC_CNTL_0_P4				 (1L<<12)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE			 (0x7L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_START		 (0L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_IP			 (1L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_TCP			 (2L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_UDP			 (3L<<13)
+#define BNX2_RPM_RC_CNTL_0_HDR_TYPE_DATA		 (4L<<13)
+#define BNX2_RPM_RC_CNTL_0_COMP				 (0x3L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_EQUAL			 (0L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_NEQUAL			 (1L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_GREATER			 (2L<<16)
+#define BNX2_RPM_RC_CNTL_0_COMP_LESS			 (3L<<16)
+#define BNX2_RPM_RC_CNTL_0_SBIT				 (1L<<19)
+#define BNX2_RPM_RC_CNTL_0_CMDSEL			 (0xfL<<20)
+#define BNX2_RPM_RC_CNTL_0_MAP				 (1L<<24)
+#define BNX2_RPM_RC_CNTL_0_DISCARD			 (1L<<25)
+#define BNX2_RPM_RC_CNTL_0_MASK				 (1L<<26)
+#define BNX2_RPM_RC_CNTL_0_P1				 (1L<<27)
+#define BNX2_RPM_RC_CNTL_0_P2				 (1L<<28)
+#define BNX2_RPM_RC_CNTL_0_P3				 (1L<<29)
+#define BNX2_RPM_RC_CNTL_0_NBIT				 (1L<<30)
+
+#define BNX2_RPM_RC_VALUE_MASK_0			0x00001904
+#define BNX2_RPM_RC_VALUE_MASK_0_VALUE			 (0xffffL<<0)
+#define BNX2_RPM_RC_VALUE_MASK_0_MASK			 (0xffffL<<16)
+
+#define BNX2_RPM_RC_CNTL_1				0x00001908
+#define BNX2_RPM_RC_CNTL_1_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_1_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_1			0x0000190c
+#define BNX2_RPM_RC_CNTL_2				0x00001910
+#define BNX2_RPM_RC_CNTL_2_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_2_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_2			0x00001914
+#define BNX2_RPM_RC_CNTL_3				0x00001918
+#define BNX2_RPM_RC_CNTL_3_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_3_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_3			0x0000191c
+#define BNX2_RPM_RC_CNTL_4				0x00001920
+#define BNX2_RPM_RC_CNTL_4_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_4_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_4			0x00001924
+#define BNX2_RPM_RC_CNTL_5				0x00001928
+#define BNX2_RPM_RC_CNTL_5_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_5_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_5			0x0000192c
+#define BNX2_RPM_RC_CNTL_6				0x00001930
+#define BNX2_RPM_RC_CNTL_6_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_6_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_6			0x00001934
+#define BNX2_RPM_RC_CNTL_7				0x00001938
+#define BNX2_RPM_RC_CNTL_7_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_7_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_7			0x0000193c
+#define BNX2_RPM_RC_CNTL_8				0x00001940
+#define BNX2_RPM_RC_CNTL_8_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_8_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_8			0x00001944
+#define BNX2_RPM_RC_CNTL_9				0x00001948
+#define BNX2_RPM_RC_CNTL_9_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_9_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_9			0x0000194c
+#define BNX2_RPM_RC_CNTL_10				0x00001950
+#define BNX2_RPM_RC_CNTL_10_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_10_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_10			0x00001954
+#define BNX2_RPM_RC_CNTL_11				0x00001958
+#define BNX2_RPM_RC_CNTL_11_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_11_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_11			0x0000195c
+#define BNX2_RPM_RC_CNTL_12				0x00001960
+#define BNX2_RPM_RC_CNTL_12_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_12_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_12			0x00001964
+#define BNX2_RPM_RC_CNTL_13				0x00001968
+#define BNX2_RPM_RC_CNTL_13_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_13_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_13			0x0000196c
+#define BNX2_RPM_RC_CNTL_14				0x00001970
+#define BNX2_RPM_RC_CNTL_14_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_14_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_14			0x00001974
+#define BNX2_RPM_RC_CNTL_15				0x00001978
+#define BNX2_RPM_RC_CNTL_15_A				 (0x3ffffL<<0)
+#define BNX2_RPM_RC_CNTL_15_B				 (0xfffL<<19)
+
+#define BNX2_RPM_RC_VALUE_MASK_15			0x0000197c
+#define BNX2_RPM_RC_CONFIG				0x00001980
+#define BNX2_RPM_RC_CONFIG_RULE_ENABLE			 (0xffffL<<0)
+#define BNX2_RPM_RC_CONFIG_DEF_CLASS			 (0x7L<<24)
+
+#define BNX2_RPM_DEBUG0					0x00001984
+#define BNX2_RPM_DEBUG0_FM_BCNT				 (0xffffL<<0)
+#define BNX2_RPM_DEBUG0_T_DATA_OFST_VLD			 (1L<<16)
+#define BNX2_RPM_DEBUG0_T_UDP_OFST_VLD			 (1L<<17)
+#define BNX2_RPM_DEBUG0_T_TCP_OFST_VLD			 (1L<<18)
+#define BNX2_RPM_DEBUG0_T_IP_OFST_VLD			 (1L<<19)
+#define BNX2_RPM_DEBUG0_IP_MORE_FRGMT			 (1L<<20)
+#define BNX2_RPM_DEBUG0_T_IP_NO_TCP_UDP_HDR		 (1L<<21)
+#define BNX2_RPM_DEBUG0_LLC_SNAP			 (1L<<22)
+#define BNX2_RPM_DEBUG0_FM_STARTED			 (1L<<23)
+#define BNX2_RPM_DEBUG0_DONE				 (1L<<24)
+#define BNX2_RPM_DEBUG0_WAIT_4_DONE			 (1L<<25)
+#define BNX2_RPM_DEBUG0_USE_TPBUF_CKSUM			 (1L<<26)
+#define BNX2_RPM_DEBUG0_RX_NO_PSD_HDR_CKSUM		 (1L<<27)
+#define BNX2_RPM_DEBUG0_IGNORE_VLAN			 (1L<<28)
+#define BNX2_RPM_DEBUG0_RP_ENA_ACTIVE			 (1L<<31)
+
+#define BNX2_RPM_DEBUG1					0x00001988
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST			 (0xffffL<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IDLE			 (0L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_ALL		 (1L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IPLLC	 (2L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B6_IP		 (4L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ETYPE_B2_IP		 (8L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP_START		 (16L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_IP			 (32L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_TCP			 (64L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_UDP			 (128L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_AH			 (256L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP			 (512L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ESP_PAYLOAD		 (1024L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_DATA			 (2048L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRY		 (0x2000L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_ADD_CARRYOUT		 (0x4000L<<0)
+#define BNX2_RPM_DEBUG1_FSM_CUR_ST_LATCH_RESULT		 (0x8000L<<0)
+#define BNX2_RPM_DEBUG1_HDR_BCNT			 (0x7ffL<<16)
+#define BNX2_RPM_DEBUG1_UNKNOWN_ETYPE_D			 (1L<<28)
+#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D2			 (1L<<29)
+#define BNX2_RPM_DEBUG1_VLAN_REMOVED_D1			 (1L<<30)
+#define BNX2_RPM_DEBUG1_EOF_0XTRA_WD			 (1L<<31)
+
+#define BNX2_RPM_DEBUG2					0x0000198c
+#define BNX2_RPM_DEBUG2_CMD_HIT_VEC			 (0xffffL<<0)
+#define BNX2_RPM_DEBUG2_IP_BCNT				 (0xffL<<16)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M4			 (1L<<24)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M3			 (1L<<25)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M2			 (1L<<26)
+#define BNX2_RPM_DEBUG2_THIS_CMD_M1			 (1L<<27)
+#define BNX2_RPM_DEBUG2_IPIPE_EMPTY			 (1L<<28)
+#define BNX2_RPM_DEBUG2_FM_DISCARD			 (1L<<29)
+#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D2		 (1L<<30)
+#define BNX2_RPM_DEBUG2_LAST_RULE_IN_FM_D1		 (1L<<31)
+
+#define BNX2_RPM_DEBUG3					0x00001990
+#define BNX2_RPM_DEBUG3_AVAIL_MBUF_PTR			 (0x1ffL<<0)
+#define BNX2_RPM_DEBUG3_RDE_RLUPQ_WR_REQ_INT		 (1L<<9)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_LAST_INT		 (1L<<10)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_WR_REQ_INT		 (1L<<11)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_FREE_REQ		 (1L<<12)
+#define BNX2_RPM_DEBUG3_RDE_RBUF_ALLOC_REQ		 (1L<<13)
+#define BNX2_RPM_DEBUG3_DFSM_MBUF_NOTAVAIL		 (1L<<14)
+#define BNX2_RPM_DEBUG3_RBUF_RDE_SOF_DROP		 (1L<<15)
+#define BNX2_RPM_DEBUG3_DFIFO_VLD_ENTRY_CT		 (0xfL<<16)
+#define BNX2_RPM_DEBUG3_RDE_SRC_FIFO_ALMFULL		 (1L<<21)
+#define BNX2_RPM_DEBUG3_DROP_NXT_VLD			 (1L<<22)
+#define BNX2_RPM_DEBUG3_DROP_NXT			 (1L<<23)
+#define BNX2_RPM_DEBUG3_FTQ_FSM				 (0x3L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_IDLE			 (0x0L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_ACK		 (0x1L<<24)
+#define BNX2_RPM_DEBUG3_FTQ_FSM_WAIT_FREE		 (0x2L<<24)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM			 (0x3L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_SOF		 (0x0L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_GET_MBUF		 (0x1L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DMA_DATA		 (0x2L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DATA		 (0x3L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_EOF		 (0x4L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_MF_ACK		 (0x5L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_WAIT_DROP_NXT_VLD	 (0x6L<<26)
+#define BNX2_RPM_DEBUG3_MBWRITE_FSM_DONE		 (0x7L<<26)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM			 (1L<<29)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM_IDLE			 (0L<<29)
+#define BNX2_RPM_DEBUG3_MBFREE_FSM_WAIT_ACK		 (1L<<29)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM			 (1L<<30)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM_ET_MBUF		 (0x0L<<30)
+#define BNX2_RPM_DEBUG3_MBALLOC_FSM_IVE_MBUF		 (0x1L<<30)
+#define BNX2_RPM_DEBUG3_CCODE_EOF_ERROR			 (1L<<31)
+
+#define BNX2_RPM_DEBUG4					0x00001994
+#define BNX2_RPM_DEBUG4_DFSM_MBUF_CLUSTER		 (0x1ffffffL<<0)
+#define BNX2_RPM_DEBUG4_DFIFO_CUR_CCODE			 (0x7L<<25)
+#define BNX2_RPM_DEBUG4_MBWRITE_FSM			 (0x7L<<28)
+#define BNX2_RPM_DEBUG4_DFIFO_EMPTY			 (1L<<31)
+
+#define BNX2_RPM_DEBUG5					0x00001998
+#define BNX2_RPM_DEBUG5_RDROP_WPTR			 (0x1fL<<0)
+#define BNX2_RPM_DEBUG5_RDROP_ACPI_RPTR			 (0x1fL<<5)
+#define BNX2_RPM_DEBUG5_RDROP_MC_RPTR			 (0x1fL<<10)
+#define BNX2_RPM_DEBUG5_RDROP_RC_RPTR			 (0x1fL<<15)
+#define BNX2_RPM_DEBUG5_RDROP_ACPI_EMPTY		 (1L<<20)
+#define BNX2_RPM_DEBUG5_RDROP_MC_EMPTY			 (1L<<21)
+#define BNX2_RPM_DEBUG5_RDROP_AEOF_VEC_AT_RDROP_MC_RPTR	 (1L<<22)
+#define BNX2_RPM_DEBUG5_HOLDREG_WOL_DROP_INT		 (1L<<23)
+#define BNX2_RPM_DEBUG5_HOLDREG_DISCARD			 (1L<<24)
+#define BNX2_RPM_DEBUG5_HOLDREG_MBUF_NOTAVAIL		 (1L<<25)
+#define BNX2_RPM_DEBUG5_HOLDREG_MC_EMPTY		 (1L<<26)
+#define BNX2_RPM_DEBUG5_HOLDREG_RC_EMPTY		 (1L<<27)
+#define BNX2_RPM_DEBUG5_HOLDREG_FC_EMPTY		 (1L<<28)
+#define BNX2_RPM_DEBUG5_HOLDREG_ACPI_EMPTY		 (1L<<29)
+#define BNX2_RPM_DEBUG5_HOLDREG_FULL_T			 (1L<<30)
+#define BNX2_RPM_DEBUG5_HOLDREG_RD			 (1L<<31)
+
+#define BNX2_RPM_DEBUG6					0x0000199c
+#define BNX2_RPM_DEBUG6_ACPI_VEC			 (0xffffL<<0)
+#define BNX2_RPM_DEBUG6_VEC				 (0xffffL<<16)
+
+#define BNX2_RPM_DEBUG7					0x000019a0
+#define BNX2_RPM_DEBUG7_RPM_DBG7_LAST_CRC		 (0xffffffffL<<0)
+
+#define BNX2_RPM_DEBUG8					0x000019a4
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM			 (0xfL<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_IDLE		 (0L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W1_ADDR		 (1L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W2_ADDR		 (2L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_W3_ADDR		 (3L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_SOF_WAIT_THBUF	 (4L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_DATA		 (5L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W0_ADDR		 (6L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W1_ADDR		 (7L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W2_ADDR		 (8L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_W3_ADDR		 (9L<<0)
+#define BNX2_RPM_DEBUG8_PS_ACPI_FSM_WAIT_THBUF		 (10L<<0)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_W0			 (1L<<4)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_W3_DATA		 (1L<<5)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_WAIT		 (1L<<6)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W3		 (1L<<7)
+#define BNX2_RPM_DEBUG8_COMPARE_AT_SOF_W2		 (1L<<8)
+#define BNX2_RPM_DEBUG8_EOF_W_LTEQ6_VLDBYTES		 (1L<<9)
+#define BNX2_RPM_DEBUG8_EOF_W_LTEQ4_VLDBYTES		 (1L<<10)
+#define BNX2_RPM_DEBUG8_NXT_EOF_W_12_VLDBYTES		 (1L<<11)
+#define BNX2_RPM_DEBUG8_EOF_DET				 (1L<<12)
+#define BNX2_RPM_DEBUG8_SOF_DET				 (1L<<13)
+#define BNX2_RPM_DEBUG8_WAIT_4_SOF			 (1L<<14)
+#define BNX2_RPM_DEBUG8_ALL_DONE			 (1L<<15)
+#define BNX2_RPM_DEBUG8_THBUF_ADDR			 (0x7fL<<16)
+#define BNX2_RPM_DEBUG8_BYTE_CTR			 (0xffL<<24)
+
+#define BNX2_RPM_DEBUG9					0x000019a8
+#define BNX2_RPM_DEBUG9_OUTFIFO_COUNT			 (0x7L<<0)
+#define BNX2_RPM_DEBUG9_RDE_ACPI_RDY			 (1L<<3)
+#define BNX2_RPM_DEBUG9_VLD_RD_ENTRY_CT			 (0x7L<<4)
+#define BNX2_RPM_DEBUG9_OUTFIFO_OVERRUN_OCCURRED	 (1L<<28)
+#define BNX2_RPM_DEBUG9_INFIFO_OVERRUN_OCCURRED		 (1L<<29)
+#define BNX2_RPM_DEBUG9_ACPI_MATCH_INT			 (1L<<30)
+#define BNX2_RPM_DEBUG9_ACPI_ENABLE_SYN			 (1L<<31)
+
+#define BNX2_RPM_ACPI_DBG_BUF_W00			0x000019c0
+#define BNX2_RPM_ACPI_DBG_BUF_W01			0x000019c4
+#define BNX2_RPM_ACPI_DBG_BUF_W02			0x000019c8
+#define BNX2_RPM_ACPI_DBG_BUF_W03			0x000019cc
+#define BNX2_RPM_ACPI_DBG_BUF_W10			0x000019d0
+#define BNX2_RPM_ACPI_DBG_BUF_W11			0x000019d4
+#define BNX2_RPM_ACPI_DBG_BUF_W12			0x000019d8
+#define BNX2_RPM_ACPI_DBG_BUF_W13			0x000019dc
+#define BNX2_RPM_ACPI_DBG_BUF_W20			0x000019e0
+#define BNX2_RPM_ACPI_DBG_BUF_W21			0x000019e4
+#define BNX2_RPM_ACPI_DBG_BUF_W22			0x000019e8
+#define BNX2_RPM_ACPI_DBG_BUF_W23			0x000019ec
+#define BNX2_RPM_ACPI_DBG_BUF_W30			0x000019f0
+#define BNX2_RPM_ACPI_DBG_BUF_W31			0x000019f4
+#define BNX2_RPM_ACPI_DBG_BUF_W32			0x000019f8
+#define BNX2_RPM_ACPI_DBG_BUF_W33			0x000019fc
+
+
+/*
+ *  rbuf_reg definition
+ *  offset: 0x200000
+ */
+#define BNX2_RBUF_COMMAND				0x00200000
+#define BNX2_RBUF_COMMAND_ENABLED			 (1L<<0)
+#define BNX2_RBUF_COMMAND_FREE_INIT			 (1L<<1)
+#define BNX2_RBUF_COMMAND_RAM_INIT			 (1L<<2)
+#define BNX2_RBUF_COMMAND_OVER_FREE			 (1L<<4)
+#define BNX2_RBUF_COMMAND_ALLOC_REQ			 (1L<<5)
+
+#define BNX2_RBUF_STATUS1				0x00200004
+#define BNX2_RBUF_STATUS1_FREE_COUNT			 (0x3ffL<<0)
+
+#define BNX2_RBUF_STATUS2				0x00200008
+#define BNX2_RBUF_STATUS2_FREE_TAIL			 (0x3ffL<<0)
+#define BNX2_RBUF_STATUS2_FREE_HEAD			 (0x3ffL<<16)
+
+#define BNX2_RBUF_CONFIG				0x0020000c
+#define BNX2_RBUF_CONFIG_XOFF_TRIP			 (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG_XON_TRIP			 (0x3ffL<<16)
+
+#define BNX2_RBUF_FW_BUF_ALLOC				0x00200010
+#define BNX2_RBUF_FW_BUF_ALLOC_VALUE			 (0x1ffL<<7)
+
+#define BNX2_RBUF_FW_BUF_FREE				0x00200014
+#define BNX2_RBUF_FW_BUF_FREE_COUNT			 (0x7fL<<0)
+#define BNX2_RBUF_FW_BUF_FREE_TAIL			 (0x1ffL<<7)
+#define BNX2_RBUF_FW_BUF_FREE_HEAD			 (0x1ffL<<16)
+
+#define BNX2_RBUF_FW_BUF_SEL				0x00200018
+#define BNX2_RBUF_FW_BUF_SEL_COUNT			 (0x7fL<<0)
+#define BNX2_RBUF_FW_BUF_SEL_TAIL			 (0x1ffL<<7)
+#define BNX2_RBUF_FW_BUF_SEL_HEAD			 (0x1ffL<<16)
+
+#define BNX2_RBUF_CONFIG2				0x0020001c
+#define BNX2_RBUF_CONFIG2_MAC_DROP_TRIP			 (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG2_MAC_KEEP_TRIP			 (0x3ffL<<16)
+
+#define BNX2_RBUF_CONFIG3				0x00200020
+#define BNX2_RBUF_CONFIG3_CU_DROP_TRIP			 (0x3ffL<<0)
+#define BNX2_RBUF_CONFIG3_CU_KEEP_TRIP			 (0x3ffL<<16)
+
+#define BNX2_RBUF_PKT_DATA				0x00208000
+#define BNX2_RBUF_CLIST_DATA				0x00210000
+#define BNX2_RBUF_BUF_DATA				0x00220000
+
+
+/*
+ *  rv2p_reg definition
+ *  offset: 0x2800
+ */
+#define BNX2_RV2P_COMMAND				0x00002800
+#define BNX2_RV2P_COMMAND_ENABLED			 (1L<<0)
+#define BNX2_RV2P_COMMAND_PROC1_INTRPT			 (1L<<1)
+#define BNX2_RV2P_COMMAND_PROC2_INTRPT			 (1L<<2)
+#define BNX2_RV2P_COMMAND_ABORT0			 (1L<<4)
+#define BNX2_RV2P_COMMAND_ABORT1			 (1L<<5)
+#define BNX2_RV2P_COMMAND_ABORT2			 (1L<<6)
+#define BNX2_RV2P_COMMAND_ABORT3			 (1L<<7)
+#define BNX2_RV2P_COMMAND_ABORT4			 (1L<<8)
+#define BNX2_RV2P_COMMAND_ABORT5			 (1L<<9)
+#define BNX2_RV2P_COMMAND_PROC1_RESET			 (1L<<16)
+#define BNX2_RV2P_COMMAND_PROC2_RESET			 (1L<<17)
+#define BNX2_RV2P_COMMAND_CTXIF_RESET			 (1L<<18)
+
+#define BNX2_RV2P_STATUS				0x00002804
+#define BNX2_RV2P_STATUS_ALWAYS_0			 (1L<<0)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT0_CNT		 (1L<<8)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT1_CNT		 (1L<<9)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT2_CNT		 (1L<<10)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT3_CNT		 (1L<<11)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT4_CNT		 (1L<<12)
+#define BNX2_RV2P_STATUS_RV2P_GEN_STAT5_CNT		 (1L<<13)
+
+#define BNX2_RV2P_CONFIG				0x00002808
+#define BNX2_RV2P_CONFIG_STALL_PROC1			 (1L<<0)
+#define BNX2_RV2P_CONFIG_STALL_PROC2			 (1L<<1)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT0		 (1L<<8)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT1		 (1L<<9)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT2		 (1L<<10)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT3		 (1L<<11)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT4		 (1L<<12)
+#define BNX2_RV2P_CONFIG_PROC1_STALL_ON_ABORT5		 (1L<<13)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT0		 (1L<<16)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT1		 (1L<<17)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT2		 (1L<<18)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT3		 (1L<<19)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT4		 (1L<<20)
+#define BNX2_RV2P_CONFIG_PROC2_STALL_ON_ABORT5		 (1L<<21)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE			 (0xfL<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_256			 (0L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_512			 (1L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_1K			 (2L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_2K			 (3L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_4K			 (4L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_8K			 (5L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_16K			 (6L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_32K			 (7L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_64K			 (8L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_128K			 (9L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_256K			 (10L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_512K			 (11L<<24)
+#define BNX2_RV2P_CONFIG_PAGE_SIZE_1M			 (12L<<24)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_0			0x00002810
+#define BNX2_RV2P_GEN_BFR_ADDR_0_VALUE			 (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_1			0x00002814
+#define BNX2_RV2P_GEN_BFR_ADDR_1_VALUE			 (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_2			0x00002818
+#define BNX2_RV2P_GEN_BFR_ADDR_2_VALUE			 (0xffffL<<16)
+
+#define BNX2_RV2P_GEN_BFR_ADDR_3			0x0000281c
+#define BNX2_RV2P_GEN_BFR_ADDR_3_VALUE			 (0xffffL<<16)
+
+#define BNX2_RV2P_INSTR_HIGH				0x00002830
+#define BNX2_RV2P_INSTR_HIGH_HIGH			 (0x1fL<<0)
+
+#define BNX2_RV2P_INSTR_LOW				0x00002834
+#define BNX2_RV2P_PROC1_ADDR_CMD			0x00002838
+#define BNX2_RV2P_PROC1_ADDR_CMD_ADD			 (0x3ffL<<0)
+#define BNX2_RV2P_PROC1_ADDR_CMD_RDWR			 (1L<<31)
+
+#define BNX2_RV2P_PROC2_ADDR_CMD			0x0000283c
+#define BNX2_RV2P_PROC2_ADDR_CMD_ADD			 (0x3ffL<<0)
+#define BNX2_RV2P_PROC2_ADDR_CMD_RDWR			 (1L<<31)
+
+#define BNX2_RV2P_PROC1_GRC_DEBUG			0x00002840
+#define BNX2_RV2P_PROC2_GRC_DEBUG			0x00002844
+#define BNX2_RV2P_GRC_PROC_DEBUG			0x00002848
+#define BNX2_RV2P_DEBUG_VECT_PEEK			0x0000284c
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_1_SEL			 (0xfL<<12)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_RV2P_DEBUG_VECT_PEEK_2_SEL			 (0xfL<<28)
+
+#define BNX2_RV2P_PFTQ_DATA				0x00002b40
+#define BNX2_RV2P_PFTQ_CMD				0x00002b78
+#define BNX2_RV2P_PFTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_RV2P_PFTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_RV2P_PFTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_RV2P_PFTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_RV2P_PFTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_RV2P_PFTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_RV2P_PFTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_RV2P_PFTQ_CMD_POP				 (1L<<30)
+#define BNX2_RV2P_PFTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_RV2P_PFTQ_CTL				0x00002b7c
+#define BNX2_RV2P_PFTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_RV2P_PFTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_RV2P_PFTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_RV2P_PFTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_RV2P_PFTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_RV2P_TFTQ_DATA				0x00002b80
+#define BNX2_RV2P_TFTQ_CMD				0x00002bb8
+#define BNX2_RV2P_TFTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_RV2P_TFTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_RV2P_TFTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_RV2P_TFTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_RV2P_TFTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_RV2P_TFTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_RV2P_TFTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_RV2P_TFTQ_CMD_POP				 (1L<<30)
+#define BNX2_RV2P_TFTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_RV2P_TFTQ_CTL				0x00002bbc
+#define BNX2_RV2P_TFTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_RV2P_TFTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_RV2P_TFTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_RV2P_TFTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_RV2P_TFTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_RV2P_MFTQ_DATA				0x00002bc0
+#define BNX2_RV2P_MFTQ_CMD				0x00002bf8
+#define BNX2_RV2P_MFTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_RV2P_MFTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_RV2P_MFTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_RV2P_MFTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_RV2P_MFTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_RV2P_MFTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_RV2P_MFTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_RV2P_MFTQ_CMD_POP				 (1L<<30)
+#define BNX2_RV2P_MFTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_RV2P_MFTQ_CTL				0x00002bfc
+#define BNX2_RV2P_MFTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_RV2P_MFTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_RV2P_MFTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_RV2P_MFTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_RV2P_MFTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+
+
+/*
+ *  mq_reg definition
+ *  offset: 0x3c00
+ */
+#define BNX2_MQ_COMMAND					0x00003c00
+#define BNX2_MQ_COMMAND_ENABLED				 (1L<<0)
+#define BNX2_MQ_COMMAND_OVERFLOW			 (1L<<4)
+#define BNX2_MQ_COMMAND_WR_ERROR			 (1L<<5)
+#define BNX2_MQ_COMMAND_RD_ERROR			 (1L<<6)
+
+#define BNX2_MQ_STATUS					0x00003c04
+#define BNX2_MQ_STATUS_CTX_ACCESS_STAT			 (1L<<16)
+#define BNX2_MQ_STATUS_CTX_ACCESS64_STAT		 (1L<<17)
+#define BNX2_MQ_STATUS_PCI_STALL_STAT			 (1L<<18)
+
+#define BNX2_MQ_CONFIG					0x00003c08
+#define BNX2_MQ_CONFIG_TX_HIGH_PRI			 (1L<<0)
+#define BNX2_MQ_CONFIG_HALT_DIS				 (1L<<1)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE			 (0x7L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256		 (0L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_512		 (1L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_1K		 (2L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_2K		 (3L<<4)
+#define BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_4K		 (4L<<4)
+#define BNX2_MQ_CONFIG_MAX_DEPTH			 (0x7fL<<8)
+#define BNX2_MQ_CONFIG_CUR_DEPTH			 (0x7fL<<20)
+
+#define BNX2_MQ_ENQUEUE1				0x00003c0c
+#define BNX2_MQ_ENQUEUE1_OFFSET				 (0x3fL<<2)
+#define BNX2_MQ_ENQUEUE1_CID				 (0x3fffL<<8)
+#define BNX2_MQ_ENQUEUE1_BYTE_MASK			 (0xfL<<24)
+#define BNX2_MQ_ENQUEUE1_KNL_MODE			 (1L<<28)
+
+#define BNX2_MQ_ENQUEUE2				0x00003c10
+#define BNX2_MQ_BAD_WR_ADDR				0x00003c14
+#define BNX2_MQ_BAD_RD_ADDR				0x00003c18
+#define BNX2_MQ_KNL_BYP_WIND_START			0x00003c1c
+#define BNX2_MQ_KNL_BYP_WIND_START_VALUE		 (0xfffffL<<12)
+
+#define BNX2_MQ_KNL_WIND_END				0x00003c20
+#define BNX2_MQ_KNL_WIND_END_VALUE			 (0xffffffL<<8)
+
+#define BNX2_MQ_KNL_WRITE_MASK1				0x00003c24
+#define BNX2_MQ_KNL_TX_MASK1				0x00003c28
+#define BNX2_MQ_KNL_CMD_MASK1				0x00003c2c
+#define BNX2_MQ_KNL_COND_ENQUEUE_MASK1			0x00003c30
+#define BNX2_MQ_KNL_RX_V2P_MASK1			0x00003c34
+#define BNX2_MQ_KNL_WRITE_MASK2				0x00003c38
+#define BNX2_MQ_KNL_TX_MASK2				0x00003c3c
+#define BNX2_MQ_KNL_CMD_MASK2				0x00003c40
+#define BNX2_MQ_KNL_COND_ENQUEUE_MASK2			0x00003c44
+#define BNX2_MQ_KNL_RX_V2P_MASK2			0x00003c48
+#define BNX2_MQ_KNL_BYP_WRITE_MASK1			0x00003c4c
+#define BNX2_MQ_KNL_BYP_TX_MASK1			0x00003c50
+#define BNX2_MQ_KNL_BYP_CMD_MASK1			0x00003c54
+#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK1		0x00003c58
+#define BNX2_MQ_KNL_BYP_RX_V2P_MASK1			0x00003c5c
+#define BNX2_MQ_KNL_BYP_WRITE_MASK2			0x00003c60
+#define BNX2_MQ_KNL_BYP_TX_MASK2			0x00003c64
+#define BNX2_MQ_KNL_BYP_CMD_MASK2			0x00003c68
+#define BNX2_MQ_KNL_BYP_COND_ENQUEUE_MASK2		0x00003c6c
+#define BNX2_MQ_KNL_BYP_RX_V2P_MASK2			0x00003c70
+#define BNX2_MQ_MEM_WR_ADDR				0x00003c74
+#define BNX2_MQ_MEM_WR_ADDR_VALUE			 (0x3fL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA0				0x00003c78
+#define BNX2_MQ_MEM_WR_DATA0_VALUE			 (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA1				0x00003c7c
+#define BNX2_MQ_MEM_WR_DATA1_VALUE			 (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_WR_DATA2				0x00003c80
+#define BNX2_MQ_MEM_WR_DATA2_VALUE			 (0x3fffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_ADDR				0x00003c84
+#define BNX2_MQ_MEM_RD_ADDR_VALUE			 (0x3fL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA0				0x00003c88
+#define BNX2_MQ_MEM_RD_DATA0_VALUE			 (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA1				0x00003c8c
+#define BNX2_MQ_MEM_RD_DATA1_VALUE			 (0xffffffffL<<0)
+
+#define BNX2_MQ_MEM_RD_DATA2				0x00003c90
+#define BNX2_MQ_MEM_RD_DATA2_VALUE			 (0x3fffffffL<<0)
+
+
+
+/*
+ *  tbdr_reg definition
+ *  offset: 0x5000
+ */
+#define BNX2_TBDR_COMMAND				0x00005000
+#define BNX2_TBDR_COMMAND_ENABLE			 (1L<<0)
+#define BNX2_TBDR_COMMAND_SOFT_RST			 (1L<<1)
+#define BNX2_TBDR_COMMAND_MSTR_ABORT			 (1L<<4)
+
+#define BNX2_TBDR_STATUS				0x00005004
+#define BNX2_TBDR_STATUS_DMA_WAIT			 (1L<<0)
+#define BNX2_TBDR_STATUS_FTQ_WAIT			 (1L<<1)
+#define BNX2_TBDR_STATUS_FIFO_OVERFLOW			 (1L<<2)
+#define BNX2_TBDR_STATUS_FIFO_UNDERFLOW			 (1L<<3)
+#define BNX2_TBDR_STATUS_SEARCHMISS_ERROR		 (1L<<4)
+#define BNX2_TBDR_STATUS_FTQ_ENTRY_CNT			 (1L<<5)
+#define BNX2_TBDR_STATUS_BURST_CNT			 (1L<<6)
+
+#define BNX2_TBDR_CONFIG				0x00005008
+#define BNX2_TBDR_CONFIG_MAX_BDS			 (0xffL<<0)
+#define BNX2_TBDR_CONFIG_SWAP_MODE			 (1L<<8)
+#define BNX2_TBDR_CONFIG_PRIORITY			 (1L<<9)
+#define BNX2_TBDR_CONFIG_CACHE_NEXT_PAGE_PTRS		 (1L<<10)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE			 (0xfL<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_256			 (0L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_512			 (1L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_1K			 (2L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_2K			 (3L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_4K			 (4L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_8K			 (5L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_16K			 (6L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_32K			 (7L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_64K			 (8L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_128K			 (9L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_256K			 (10L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_512K			 (11L<<24)
+#define BNX2_TBDR_CONFIG_PAGE_SIZE_1M			 (12L<<24)
+
+#define BNX2_TBDR_DEBUG_VECT_PEEK			0x0000500c
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_1_SEL			 (0xfL<<12)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_TBDR_DEBUG_VECT_PEEK_2_SEL			 (0xfL<<28)
+
+#define BNX2_TBDR_FTQ_DATA				0x000053c0
+#define BNX2_TBDR_FTQ_CMD				0x000053f8
+#define BNX2_TBDR_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_TBDR_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_TBDR_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_TBDR_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_TBDR_FTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_TBDR_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_TBDR_FTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_TBDR_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_TBDR_FTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_TBDR_FTQ_CTL				0x000053fc
+#define BNX2_TBDR_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_TBDR_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_TBDR_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_TBDR_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_TBDR_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+
+
+/*
+ *  tdma_reg definition
+ *  offset: 0x5c00
+ */
+#define BNX2_TDMA_COMMAND				0x00005c00
+#define BNX2_TDMA_COMMAND_ENABLED			 (1L<<0)
+#define BNX2_TDMA_COMMAND_MASTER_ABORT			 (1L<<4)
+#define BNX2_TDMA_COMMAND_BAD_L2_LENGTH_ABORT		 (1L<<7)
+
+#define BNX2_TDMA_STATUS				0x00005c04
+#define BNX2_TDMA_STATUS_DMA_WAIT			 (1L<<0)
+#define BNX2_TDMA_STATUS_PAYLOAD_WAIT			 (1L<<1)
+#define BNX2_TDMA_STATUS_PATCH_FTQ_WAIT			 (1L<<2)
+#define BNX2_TDMA_STATUS_LOCK_WAIT			 (1L<<3)
+#define BNX2_TDMA_STATUS_FTQ_ENTRY_CNT			 (1L<<16)
+#define BNX2_TDMA_STATUS_BURST_CNT			 (1L<<17)
+
+#define BNX2_TDMA_CONFIG				0x00005c08
+#define BNX2_TDMA_CONFIG_ONE_DMA			 (1L<<0)
+#define BNX2_TDMA_CONFIG_ONE_RECORD			 (1L<<1)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ			 (0xfL<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_64			 (0L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_128			 (0x4L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_256			 (0x6L<<4)
+#define BNX2_TDMA_CONFIG_LIMIT_SZ_512			 (0x8L<<4)
+#define BNX2_TDMA_CONFIG_LINE_SZ			 (0xfL<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_64			 (0L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_128			 (4L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_256			 (6L<<8)
+#define BNX2_TDMA_CONFIG_LINE_SZ_512			 (8L<<8)
+#define BNX2_TDMA_CONFIG_ALIGN_ENA			 (1L<<15)
+#define BNX2_TDMA_CONFIG_CHK_L2_BD			 (1L<<16)
+#define BNX2_TDMA_CONFIG_FIFO_CMP			 (0xfL<<20)
+
+#define BNX2_TDMA_PAYLOAD_PROD				0x00005c0c
+#define BNX2_TDMA_PAYLOAD_PROD_VALUE			 (0x1fffL<<3)
+
+#define BNX2_TDMA_DBG_WATCHDOG				0x00005c10
+#define BNX2_TDMA_DBG_TRIGGER				0x00005c14
+#define BNX2_TDMA_DMAD_FSM				0x00005c80
+#define BNX2_TDMA_DMAD_FSM_BD_INVLD			 (1L<<0)
+#define BNX2_TDMA_DMAD_FSM_PUSH				 (0xfL<<4)
+#define BNX2_TDMA_DMAD_FSM_ARB_TBDC			 (0x3L<<8)
+#define BNX2_TDMA_DMAD_FSM_ARB_CTX			 (1L<<12)
+#define BNX2_TDMA_DMAD_FSM_DR_INTF			 (1L<<16)
+#define BNX2_TDMA_DMAD_FSM_DMAD				 (0x7L<<20)
+#define BNX2_TDMA_DMAD_FSM_BD				 (0xfL<<24)
+
+#define BNX2_TDMA_DMAD_STATUS				0x00005c84
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_PUSH_ENTRY		 (0x3L<<0)
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_DMAD_ENTRY		 (0x3L<<4)
+#define BNX2_TDMA_DMAD_STATUS_RHOLD_BD_ENTRY		 (0x3L<<8)
+#define BNX2_TDMA_DMAD_STATUS_IFTQ_ENUM			 (0xfL<<12)
+
+#define BNX2_TDMA_DR_INTF_FSM				0x00005c88
+#define BNX2_TDMA_DR_INTF_FSM_L2_COMP			 (0x3L<<0)
+#define BNX2_TDMA_DR_INTF_FSM_TPATQ			 (0x7L<<4)
+#define BNX2_TDMA_DR_INTF_FSM_TPBUF			 (0x3L<<8)
+#define BNX2_TDMA_DR_INTF_FSM_DR_BUF			 (0x7L<<12)
+#define BNX2_TDMA_DR_INTF_FSM_DMAD			 (0x7L<<16)
+
+#define BNX2_TDMA_DR_INTF_STATUS			0x00005c8c
+#define BNX2_TDMA_DR_INTF_STATUS_HOLE_PHASE		 (0x7L<<0)
+#define BNX2_TDMA_DR_INTF_STATUS_DATA_AVAIL		 (0x3L<<4)
+#define BNX2_TDMA_DR_INTF_STATUS_SHIFT_ADDR		 (0x7L<<8)
+#define BNX2_TDMA_DR_INTF_STATUS_NXT_PNTR		 (0xfL<<12)
+#define BNX2_TDMA_DR_INTF_STATUS_BYTE_COUNT		 (0x7L<<16)
+
+#define BNX2_TDMA_FTQ_DATA				0x00005fc0
+#define BNX2_TDMA_FTQ_CMD				0x00005ff8
+#define BNX2_TDMA_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_TDMA_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_TDMA_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_TDMA_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_TDMA_FTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_TDMA_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_TDMA_FTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_TDMA_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_TDMA_FTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_TDMA_FTQ_CTL				0x00005ffc
+#define BNX2_TDMA_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_TDMA_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_TDMA_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_TDMA_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_TDMA_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+
+
+/*
+ *  hc_reg definition
+ *  offset: 0x6800
+ */
+#define BNX2_HC_COMMAND					0x00006800
+#define BNX2_HC_COMMAND_ENABLE				 (1L<<0)
+#define BNX2_HC_COMMAND_SKIP_ABORT			 (1L<<4)
+#define BNX2_HC_COMMAND_COAL_NOW			 (1L<<16)
+#define BNX2_HC_COMMAND_COAL_NOW_WO_INT			 (1L<<17)
+#define BNX2_HC_COMMAND_STATS_NOW			 (1L<<18)
+#define BNX2_HC_COMMAND_FORCE_INT			 (0x3L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_NULL			 (0L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_HIGH			 (1L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_LOW			 (2L<<19)
+#define BNX2_HC_COMMAND_FORCE_INT_FREE			 (3L<<19)
+#define BNX2_HC_COMMAND_CLR_STAT_NOW			 (1L<<21)
+
+#define BNX2_HC_STATUS					0x00006804
+#define BNX2_HC_STATUS_MASTER_ABORT			 (1L<<0)
+#define BNX2_HC_STATUS_PARITY_ERROR_STATE		 (1L<<1)
+#define BNX2_HC_STATUS_PCI_CLK_CNT_STAT			 (1L<<16)
+#define BNX2_HC_STATUS_CORE_CLK_CNT_STAT		 (1L<<17)
+#define BNX2_HC_STATUS_NUM_STATUS_BLOCKS_STAT		 (1L<<18)
+#define BNX2_HC_STATUS_NUM_INT_GEN_STAT			 (1L<<19)
+#define BNX2_HC_STATUS_NUM_INT_MBOX_WR_STAT		 (1L<<20)
+#define BNX2_HC_STATUS_CORE_CLKS_TO_HW_INTACK_STAT	 (1L<<23)
+#define BNX2_HC_STATUS_CORE_CLKS_TO_SW_INTACK_STAT	 (1L<<24)
+#define BNX2_HC_STATUS_CORE_CLKS_DURING_SW_INTACK_STAT	 (1L<<25)
+
+#define BNX2_HC_CONFIG					0x00006808
+#define BNX2_HC_CONFIG_COLLECT_STATS			 (1L<<0)
+#define BNX2_HC_CONFIG_RX_TMR_MODE			 (1L<<1)
+#define BNX2_HC_CONFIG_TX_TMR_MODE			 (1L<<2)
+#define BNX2_HC_CONFIG_COM_TMR_MODE			 (1L<<3)
+#define BNX2_HC_CONFIG_CMD_TMR_MODE			 (1L<<4)
+#define BNX2_HC_CONFIG_STATISTIC_PRIORITY		 (1L<<5)
+#define BNX2_HC_CONFIG_STATUS_PRIORITY			 (1L<<6)
+#define BNX2_HC_CONFIG_STAT_MEM_ADDR			 (0xffL<<8)
+
+#define BNX2_HC_ATTN_BITS_ENABLE			0x0000680c
+#define BNX2_HC_STATUS_ADDR_L				0x00006810
+#define BNX2_HC_STATUS_ADDR_H				0x00006814
+#define BNX2_HC_STATISTICS_ADDR_L			0x00006818
+#define BNX2_HC_STATISTICS_ADDR_H			0x0000681c
+#define BNX2_HC_TX_QUICK_CONS_TRIP			0x00006820
+#define BNX2_HC_TX_QUICK_CONS_TRIP_VALUE		 (0xffL<<0)
+#define BNX2_HC_TX_QUICK_CONS_TRIP_INT			 (0xffL<<16)
+
+#define BNX2_HC_COMP_PROD_TRIP				0x00006824
+#define BNX2_HC_COMP_PROD_TRIP_VALUE			 (0xffL<<0)
+#define BNX2_HC_COMP_PROD_TRIP_INT			 (0xffL<<16)
+
+#define BNX2_HC_RX_QUICK_CONS_TRIP			0x00006828
+#define BNX2_HC_RX_QUICK_CONS_TRIP_VALUE		 (0xffL<<0)
+#define BNX2_HC_RX_QUICK_CONS_TRIP_INT			 (0xffL<<16)
+
+#define BNX2_HC_RX_TICKS				0x0000682c
+#define BNX2_HC_RX_TICKS_VALUE				 (0x3ffL<<0)
+#define BNX2_HC_RX_TICKS_INT				 (0x3ffL<<16)
+
+#define BNX2_HC_TX_TICKS				0x00006830
+#define BNX2_HC_TX_TICKS_VALUE				 (0x3ffL<<0)
+#define BNX2_HC_TX_TICKS_INT				 (0x3ffL<<16)
+
+#define BNX2_HC_COM_TICKS				0x00006834
+#define BNX2_HC_COM_TICKS_VALUE				 (0x3ffL<<0)
+#define BNX2_HC_COM_TICKS_INT				 (0x3ffL<<16)
+
+#define BNX2_HC_CMD_TICKS				0x00006838
+#define BNX2_HC_CMD_TICKS_VALUE				 (0x3ffL<<0)
+#define BNX2_HC_CMD_TICKS_INT				 (0x3ffL<<16)
+
+#define BNX2_HC_PERIODIC_TICKS				0x0000683c
+#define BNX2_HC_PERIODIC_TICKS_HC_PERIODIC_TICKS	 (0xffffL<<0)
+
+#define BNX2_HC_STAT_COLLECT_TICKS			0x00006840
+#define BNX2_HC_STAT_COLLECT_TICKS_HC_STAT_COLL_TICKS	 (0xffL<<4)
+
+#define BNX2_HC_STATS_TICKS				0x00006844
+#define BNX2_HC_STATS_TICKS_HC_STAT_TICKS		 (0xffffL<<8)
+
+#define BNX2_HC_STAT_MEM_DATA				0x0000684c
+#define BNX2_HC_STAT_GEN_SEL_0				0x00006850
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0		 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT0	 (0L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT1	 (1L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT2	 (2L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT3	 (3L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT4	 (4L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT5	 (5L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT6	 (6L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT7	 (7L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT8	 (8L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT9	 (9L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT10	 (10L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXP_STAT11	 (11L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT0	 (12L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT1	 (13L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT2	 (14L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT3	 (15L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT4	 (16L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT5	 (17L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT6	 (18L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXP_STAT7	 (19L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT0	 (20L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT1	 (21L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT2	 (22L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT3	 (23L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT4	 (24L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT5	 (25L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT6	 (26L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT7	 (27L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT8	 (28L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT9	 (29L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT10	 (30L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COM_STAT11	 (31L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT0	 (32L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT1	 (33L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT2	 (34L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPAT_STAT3	 (35L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT0	 (36L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT1	 (37L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT2	 (38L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT3	 (39L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT4	 (40L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT5	 (41L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT6	 (42L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CP_STAT7	 (43L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT0	 (44L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT1	 (45L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT2	 (46L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT3	 (47L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT4	 (48L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT5	 (49L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT6	 (50L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MCP_STAT7	 (51L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_PCI_CLK_CNT	 (52L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CORE_CLK_CNT	 (53L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_STATUS_BLOCKS	 (54L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_GEN	 (55L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_NUM_INT_MBOX_WR	 (56L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_HW_INTACK	 (59L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_TO_SW_INTACK	 (60L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_HC_CORE_CLKS_DURING_SW_INTACK	 (61L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_CMD_CNT	 (62L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCH_SLOT_CNT	 (63L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_CMD_CNT	 (64L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSCH_SLOT_CNT	 (65L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUPQ_VALID_CNT	 (66L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPQ_VALID_CNT	 (67L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RXPCQ_VALID_CNT	 (68L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PPQ_VALID_CNT	 (69L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PMQ_VALID_CNT	 (70L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2PTQ_VALID_CNT	 (71L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMAQ_VALID_CNT	 (72L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TSCHQ_VALID_CNT	 (73L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDRQ_VALID_CNT	 (74L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TXPQ_VALID_CNT	 (75L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMAQ_VALID_CNT	 (76L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TPATQ_VALID_CNT	 (77L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TASQ_VALID_CNT	 (78L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CSQ_VALID_CNT	 (79L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CPQ_VALID_CNT	 (80L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMXQ_VALID_CNT	 (81L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMTQ_VALID_CNT	 (82L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_COMQ_VALID_CNT	 (83L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MGMQ_VALID_CNT	 (84L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_TRANSFERS_CNT	 (85L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_READ_DELAY_PCI_CLKS_CNT	 (86L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_TRANSFERS_CNT	 (87L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_DELAY_PCI_CLKS_CNT	 (88L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_READ_RETRY_AFTER_DATA_CNT	 (89L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_TRANSFERS_CNT	 (90L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_WRITE_DELAY_PCI_CLKS_CNT	 (91L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_TRANSFERS_CNT	 (92L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_DELAY_PCI_CLKS_CNT	 (93L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_DMAE_BIG_WRITE_RETRY_AFTER_DATA_CNT	 (94L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_WR_CNT64	 (95L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_RD_CNT64	 (96L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_ACC_STALL_CLKS	 (97L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_CTX_LOCK_STALL_CLKS	 (98L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS_STAT	 (99L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_CTX_ACCESS64_STAT	 (100L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_MBQ_PCI_STALL_STAT	 (101L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_FTQ_ENTRY_CNT	 (102L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TBDR_BURST_CNT	 (103L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_FTQ_ENTRY_CNT	 (104L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TDMA_BURST_CNT	 (105L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_FTQ_ENTRY_CNT	 (106L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RDMA_BURST_CNT	 (107L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RLUP_MATCH_CNT	 (108L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_POLL_PASS_CNT	 (109L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR1_CNT	 (110L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR2_CNT	 (111L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR3_CNT	 (112L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR4_CNT	 (113L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_TMR_TMR5_CNT	 (114L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT0	 (115L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT1	 (116L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT2	 (117L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT3	 (118L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT4	 (119L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RV2P_STAT5	 (120L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC1_MISS	 (121L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_PROC2_MISS	 (122L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_0_RBDC_BURST_CNT	 (127L<<0)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_1		 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_2		 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_0_GEN_SEL_3		 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_1				0x00006854
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_4		 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_5		 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_6		 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_1_GEN_SEL_7		 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_2				0x00006858
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_8		 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_9		 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_10		 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_2_GEN_SEL_11		 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_SEL_3				0x0000685c
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_12		 (0x7fL<<0)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_13		 (0x7fL<<8)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_14		 (0x7fL<<16)
+#define BNX2_HC_STAT_GEN_SEL_3_GEN_SEL_15		 (0x7fL<<24)
+
+#define BNX2_HC_STAT_GEN_STAT0				0x00006888
+#define BNX2_HC_STAT_GEN_STAT1				0x0000688c
+#define BNX2_HC_STAT_GEN_STAT2				0x00006890
+#define BNX2_HC_STAT_GEN_STAT3				0x00006894
+#define BNX2_HC_STAT_GEN_STAT4				0x00006898
+#define BNX2_HC_STAT_GEN_STAT5				0x0000689c
+#define BNX2_HC_STAT_GEN_STAT6				0x000068a0
+#define BNX2_HC_STAT_GEN_STAT7				0x000068a4
+#define BNX2_HC_STAT_GEN_STAT8				0x000068a8
+#define BNX2_HC_STAT_GEN_STAT9				0x000068ac
+#define BNX2_HC_STAT_GEN_STAT10				0x000068b0
+#define BNX2_HC_STAT_GEN_STAT11				0x000068b4
+#define BNX2_HC_STAT_GEN_STAT12				0x000068b8
+#define BNX2_HC_STAT_GEN_STAT13				0x000068bc
+#define BNX2_HC_STAT_GEN_STAT14				0x000068c0
+#define BNX2_HC_STAT_GEN_STAT15				0x000068c4
+#define BNX2_HC_STAT_GEN_STAT_AC0			0x000068c8
+#define BNX2_HC_STAT_GEN_STAT_AC1			0x000068cc
+#define BNX2_HC_STAT_GEN_STAT_AC2			0x000068d0
+#define BNX2_HC_STAT_GEN_STAT_AC3			0x000068d4
+#define BNX2_HC_STAT_GEN_STAT_AC4			0x000068d8
+#define BNX2_HC_STAT_GEN_STAT_AC5			0x000068dc
+#define BNX2_HC_STAT_GEN_STAT_AC6			0x000068e0
+#define BNX2_HC_STAT_GEN_STAT_AC7			0x000068e4
+#define BNX2_HC_STAT_GEN_STAT_AC8			0x000068e8
+#define BNX2_HC_STAT_GEN_STAT_AC9			0x000068ec
+#define BNX2_HC_STAT_GEN_STAT_AC10			0x000068f0
+#define BNX2_HC_STAT_GEN_STAT_AC11			0x000068f4
+#define BNX2_HC_STAT_GEN_STAT_AC12			0x000068f8
+#define BNX2_HC_STAT_GEN_STAT_AC13			0x000068fc
+#define BNX2_HC_STAT_GEN_STAT_AC14			0x00006900
+#define BNX2_HC_STAT_GEN_STAT_AC15			0x00006904
+#define BNX2_HC_VIS					0x00006908
+#define BNX2_HC_VIS_STAT_BUILD_STATE			 (0xfL<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_IDLE		 (0L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_START		 (1L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_REQUEST		 (2L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE64		 (3L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE32		 (4L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_UPDATE_DONE	 (5L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_DMA		 (6L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_CONTROL	 (7L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_LOW		 (8L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_HIGH		 (9L<<0)
+#define BNX2_HC_VIS_STAT_BUILD_STATE_MSI_DATA		 (10L<<0)
+#define BNX2_HC_VIS_DMA_STAT_STATE			 (0xfL<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_IDLE			 (0L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_PARAM		 (1L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATUS_DMA		 (2L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP		 (3L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_COMP			 (4L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_PARAM	 (5L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_STATISTIC_DMA	 (6L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_1		 (7L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WRITE_COMP_2		 (8L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_WAIT			 (9L<<8)
+#define BNX2_HC_VIS_DMA_STAT_STATE_ABORT		 (15L<<8)
+#define BNX2_HC_VIS_DMA_MSI_STATE			 (0x7L<<12)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE		 (0x3L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_IDLE		 (0L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_COUNT	 (1L<<15)
+#define BNX2_HC_VIS_STATISTIC_DMA_EN_STATE_START	 (2L<<15)
+
+#define BNX2_HC_VIS_1					0x0000690c
+#define BNX2_HC_VIS_1_HW_INTACK_STATE			 (1L<<4)
+#define BNX2_HC_VIS_1_HW_INTACK_STATE_IDLE		 (0L<<4)
+#define BNX2_HC_VIS_1_HW_INTACK_STATE_COUNT		 (1L<<4)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE			 (1L<<5)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE_IDLE		 (0L<<5)
+#define BNX2_HC_VIS_1_SW_INTACK_STATE_COUNT		 (1L<<5)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE		 (1L<<6)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_IDLE	 (0L<<6)
+#define BNX2_HC_VIS_1_DURING_SW_INTACK_STATE_COUNT	 (1L<<6)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE		 (1L<<7)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_IDLE		 (0L<<7)
+#define BNX2_HC_VIS_1_MAILBOX_COUNT_STATE_COUNT		 (1L<<7)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE			 (0xfL<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_IDLE		 (0L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_DMA		 (1L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_UPDATE		 (2L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_ASSIGN		 (3L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_WAIT		 (4L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_UPDATE	 (5L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_ASSIGN	 (6L<<17)
+#define BNX2_HC_VIS_1_RAM_RD_ARB_STATE_REG_WAIT		 (7L<<17)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE			 (0x3L<<21)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_NORMAL		 (0L<<21)
+#define BNX2_HC_VIS_1_RAM_WR_ARB_STATE_CLEAR		 (1L<<21)
+#define BNX2_HC_VIS_1_INT_GEN_STATE			 (1L<<23)
+#define BNX2_HC_VIS_1_INT_GEN_STATE_DLE			 (0L<<23)
+#define BNX2_HC_VIS_1_INT_GEN_STATE_NTERRUPT		 (1L<<23)
+#define BNX2_HC_VIS_1_STAT_CHAN_ID			 (0x7L<<24)
+#define BNX2_HC_VIS_1_INT_B				 (1L<<27)
+
+#define BNX2_HC_DEBUG_VECT_PEEK				0x00006910
+#define BNX2_HC_DEBUG_VECT_PEEK_1_VALUE			 (0x7ffL<<0)
+#define BNX2_HC_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_HC_DEBUG_VECT_PEEK_1_SEL			 (0xfL<<12)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_VALUE			 (0x7ffL<<16)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_HC_DEBUG_VECT_PEEK_2_SEL			 (0xfL<<28)
+
+
+
+/*
+ *  txp_reg definition
+ *  offset: 0x40000
+ */
+#define BNX2_TXP_CPU_MODE				0x00045000
+#define BNX2_TXP_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_TXP_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_TXP_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_TXP_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_TXP_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_TXP_CPU_MODE_INTERRUPT_ENA			 (1L<<7)
+#define BNX2_TXP_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_TXP_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_TXP_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_TXP_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_TXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_TXP_CPU_STATE				0x00045004
+#define BNX2_TXP_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_TXP_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_TXP_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_TXP_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_TXP_CPU_STATE_BAD_DATA_ADDR_HALTED		 (1L<<5)
+#define BNX2_TXP_CPU_STATE_BAD_pc_HALTED		 (1L<<6)
+#define BNX2_TXP_CPU_STATE_ALIGN_HALTED			 (1L<<7)
+#define BNX2_TXP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_TXP_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_TXP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_TXP_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_TXP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_TXP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_TXP_CPU_STATE_BLOCKED_READ			 (1L<<31)
+
+#define BNX2_TXP_CPU_EVENT_MASK				0x00045008
+#define BNX2_TXP_CPU_EVENT_MASK_BREAKPOINT_MASK		 (1L<<0)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_TXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_TXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_TXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_TXP_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_TXP_CPU_EVENT_MASK_SOFT_HALTED_MASK	 (1L<<10)
+#define BNX2_TXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_TXP_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_TXP_CPU_PROGRAM_COUNTER			0x0004501c
+#define BNX2_TXP_CPU_INSTRUCTION			0x00045020
+#define BNX2_TXP_CPU_DATA_ACCESS			0x00045024
+#define BNX2_TXP_CPU_INTERRUPT_ENABLE			0x00045028
+#define BNX2_TXP_CPU_INTERRUPT_VECTOR			0x0004502c
+#define BNX2_TXP_CPU_INTERRUPT_SAVED_PC			0x00045030
+#define BNX2_TXP_CPU_HW_BREAKPOINT			0x00045034
+#define BNX2_TXP_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_TXP_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK			0x00045038
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_TXP_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR			0x00045048
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP		 (0L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_TXP_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_TXP_CPU_REG_FILE				0x00045200
+#define BNX2_TXP_FTQ_DATA				0x000453c0
+#define BNX2_TXP_FTQ_CMD				0x000453f8
+#define BNX2_TXP_FTQ_CMD_OFFSET				 (0x3ffL<<0)
+#define BNX2_TXP_FTQ_CMD_WR_TOP				 (1L<<10)
+#define BNX2_TXP_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_TXP_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_TXP_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_TXP_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_TXP_FTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_TXP_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_TXP_FTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_TXP_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_TXP_FTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_TXP_FTQ_CTL				0x000453fc
+#define BNX2_TXP_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_TXP_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_TXP_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_TXP_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_TXP_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_TXP_SCRATCH				0x00060000
+
+
+/*
+ *  tpat_reg definition
+ *  offset: 0x80000
+ */
+#define BNX2_TPAT_CPU_MODE				0x00085000
+#define BNX2_TPAT_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_TPAT_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_TPAT_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_TPAT_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_TPAT_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_TPAT_CPU_MODE_INTERRUPT_ENA		 (1L<<7)
+#define BNX2_TPAT_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_TPAT_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_TPAT_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_TPAT_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_TPAT_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_TPAT_CPU_STATE				0x00085004
+#define BNX2_TPAT_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_TPAT_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_TPAT_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_TPAT_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_TPAT_CPU_STATE_BAD_DATA_ADDR_HALTED	 (1L<<5)
+#define BNX2_TPAT_CPU_STATE_BAD_pc_HALTED		 (1L<<6)
+#define BNX2_TPAT_CPU_STATE_ALIGN_HALTED		 (1L<<7)
+#define BNX2_TPAT_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_TPAT_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_TPAT_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_TPAT_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_TPAT_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_TPAT_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_TPAT_CPU_STATE_BLOCKED_READ		 (1L<<31)
+
+#define BNX2_TPAT_CPU_EVENT_MASK			0x00085008
+#define BNX2_TPAT_CPU_EVENT_MASK_BREAKPOINT_MASK	 (1L<<0)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_TPAT_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_TPAT_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_TPAT_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_TPAT_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_TPAT_CPU_EVENT_MASK_SOFT_HALTED_MASK	 (1L<<10)
+#define BNX2_TPAT_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_TPAT_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_TPAT_CPU_PROGRAM_COUNTER			0x0008501c
+#define BNX2_TPAT_CPU_INSTRUCTION			0x00085020
+#define BNX2_TPAT_CPU_DATA_ACCESS			0x00085024
+#define BNX2_TPAT_CPU_INTERRUPT_ENABLE			0x00085028
+#define BNX2_TPAT_CPU_INTERRUPT_VECTOR			0x0008502c
+#define BNX2_TPAT_CPU_INTERRUPT_SAVED_PC		0x00085030
+#define BNX2_TPAT_CPU_HW_BREAKPOINT			0x00085034
+#define BNX2_TPAT_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_TPAT_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK			0x00085038
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_TPAT_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR			0x00085048
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_JUMP	 (0L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_TPAT_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_TPAT_CPU_REG_FILE				0x00085200
+#define BNX2_TPAT_FTQ_DATA				0x000853c0
+#define BNX2_TPAT_FTQ_CMD				0x000853f8
+#define BNX2_TPAT_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_TPAT_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_TPAT_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_TPAT_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_TPAT_FTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_TPAT_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_TPAT_FTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_TPAT_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_TPAT_FTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_TPAT_FTQ_CTL				0x000853fc
+#define BNX2_TPAT_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_TPAT_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_TPAT_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_TPAT_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_TPAT_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_TPAT_SCRATCH				0x000a0000
+
+
+/*
+ *  rxp_reg definition
+ *  offset: 0xc0000
+ */
+#define BNX2_RXP_CPU_MODE				0x000c5000
+#define BNX2_RXP_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_RXP_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_RXP_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_RXP_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_RXP_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_RXP_CPU_MODE_INTERRUPT_ENA			 (1L<<7)
+#define BNX2_RXP_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_RXP_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_RXP_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_RXP_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_RXP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_RXP_CPU_STATE				0x000c5004
+#define BNX2_RXP_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_RXP_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_RXP_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_RXP_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_RXP_CPU_STATE_BAD_DATA_ADDR_HALTED		 (1L<<5)
+#define BNX2_RXP_CPU_STATE_BAD_pc_HALTED		 (1L<<6)
+#define BNX2_RXP_CPU_STATE_ALIGN_HALTED			 (1L<<7)
+#define BNX2_RXP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_RXP_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_RXP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_RXP_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_RXP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_RXP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_RXP_CPU_STATE_BLOCKED_READ			 (1L<<31)
+
+#define BNX2_RXP_CPU_EVENT_MASK				0x000c5008
+#define BNX2_RXP_CPU_EVENT_MASK_BREAKPOINT_MASK		 (1L<<0)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_RXP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_RXP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_RXP_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_RXP_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_RXP_CPU_EVENT_MASK_SOFT_HALTED_MASK	 (1L<<10)
+#define BNX2_RXP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_RXP_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_RXP_CPU_PROGRAM_COUNTER			0x000c501c
+#define BNX2_RXP_CPU_INSTRUCTION			0x000c5020
+#define BNX2_RXP_CPU_DATA_ACCESS			0x000c5024
+#define BNX2_RXP_CPU_INTERRUPT_ENABLE			0x000c5028
+#define BNX2_RXP_CPU_INTERRUPT_VECTOR			0x000c502c
+#define BNX2_RXP_CPU_INTERRUPT_SAVED_PC			0x000c5030
+#define BNX2_RXP_CPU_HW_BREAKPOINT			0x000c5034
+#define BNX2_RXP_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_RXP_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK			0x000c5038
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_RXP_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR			0x000c5048
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP		 (0L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_RXP_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_RXP_CPU_REG_FILE				0x000c5200
+#define BNX2_RXP_CFTQ_DATA				0x000c5380
+#define BNX2_RXP_CFTQ_CMD				0x000c53b8
+#define BNX2_RXP_CFTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_RXP_CFTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_RXP_CFTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_RXP_CFTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_RXP_CFTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_RXP_CFTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_RXP_CFTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_RXP_CFTQ_CMD_POP				 (1L<<30)
+#define BNX2_RXP_CFTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_RXP_CFTQ_CTL				0x000c53bc
+#define BNX2_RXP_CFTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_RXP_CFTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_RXP_CFTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_RXP_CFTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_RXP_CFTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_RXP_FTQ_DATA				0x000c53c0
+#define BNX2_RXP_FTQ_CMD				0x000c53f8
+#define BNX2_RXP_FTQ_CMD_OFFSET				 (0x3ffL<<0)
+#define BNX2_RXP_FTQ_CMD_WR_TOP				 (1L<<10)
+#define BNX2_RXP_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_RXP_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_RXP_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_RXP_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_RXP_FTQ_CMD_ADD_INTERVEN			 (1L<<27)
+#define BNX2_RXP_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_RXP_FTQ_CMD_INTERVENE_CLR			 (1L<<29)
+#define BNX2_RXP_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_RXP_FTQ_CMD_BUSY				 (1L<<31)
+
+#define BNX2_RXP_FTQ_CTL				0x000c53fc
+#define BNX2_RXP_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_RXP_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_RXP_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_RXP_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_RXP_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_RXP_SCRATCH				0x000e0000
+
+
+/*
+ *  com_reg definition
+ *  offset: 0x100000
+ */
+#define BNX2_COM_CPU_MODE				0x00105000
+#define BNX2_COM_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_COM_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_COM_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_COM_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_COM_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_COM_CPU_MODE_INTERRUPT_ENA			 (1L<<7)
+#define BNX2_COM_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_COM_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_COM_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_COM_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_COM_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_COM_CPU_STATE				0x00105004
+#define BNX2_COM_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_COM_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_COM_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_COM_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_COM_CPU_STATE_BAD_DATA_ADDR_HALTED		 (1L<<5)
+#define BNX2_COM_CPU_STATE_BAD_pc_HALTED		 (1L<<6)
+#define BNX2_COM_CPU_STATE_ALIGN_HALTED			 (1L<<7)
+#define BNX2_COM_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_COM_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_COM_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_COM_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_COM_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_COM_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_COM_CPU_STATE_BLOCKED_READ			 (1L<<31)
+
+#define BNX2_COM_CPU_EVENT_MASK				0x00105008
+#define BNX2_COM_CPU_EVENT_MASK_BREAKPOINT_MASK		 (1L<<0)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_COM_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_COM_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_COM_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_COM_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_COM_CPU_EVENT_MASK_SOFT_HALTED_MASK	 (1L<<10)
+#define BNX2_COM_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_COM_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_COM_CPU_PROGRAM_COUNTER			0x0010501c
+#define BNX2_COM_CPU_INSTRUCTION			0x00105020
+#define BNX2_COM_CPU_DATA_ACCESS			0x00105024
+#define BNX2_COM_CPU_INTERRUPT_ENABLE			0x00105028
+#define BNX2_COM_CPU_INTERRUPT_VECTOR			0x0010502c
+#define BNX2_COM_CPU_INTERRUPT_SAVED_PC			0x00105030
+#define BNX2_COM_CPU_HW_BREAKPOINT			0x00105034
+#define BNX2_COM_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_COM_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK			0x00105038
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_COM_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR			0x00105048
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_JUMP		 (0L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_COM_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_COM_CPU_REG_FILE				0x00105200
+#define BNX2_COM_COMXQ_FTQ_DATA				0x00105340
+#define BNX2_COM_COMXQ_FTQ_CMD				0x00105378
+#define BNX2_COM_COMXQ_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_COM_COMXQ_FTQ_CMD_SFT_RESET		 (1L<<25)
+#define BNX2_COM_COMXQ_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_COM_COMXQ_FTQ_CMD_ADD_INTERVEN		 (1L<<27)
+#define BNX2_COM_COMXQ_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_COM_COMXQ_FTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_COM_COMXQ_FTQ_CMD_POP			 (1L<<30)
+#define BNX2_COM_COMXQ_FTQ_CMD_BUSY			 (1L<<31)
+
+#define BNX2_COM_COMXQ_FTQ_CTL				0x0010537c
+#define BNX2_COM_COMXQ_FTQ_CTL_INTERVENE		 (1L<<0)
+#define BNX2_COM_COMXQ_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_COM_COMXQ_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_COM_COMXQ_FTQ_CTL_MAX_DEPTH		 (0x3ffL<<12)
+#define BNX2_COM_COMXQ_FTQ_CTL_CUR_DEPTH		 (0x3ffL<<22)
+
+#define BNX2_COM_COMTQ_FTQ_DATA				0x00105380
+#define BNX2_COM_COMTQ_FTQ_CMD				0x001053b8
+#define BNX2_COM_COMTQ_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_COM_COMTQ_FTQ_CMD_SFT_RESET		 (1L<<25)
+#define BNX2_COM_COMTQ_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_COM_COMTQ_FTQ_CMD_ADD_INTERVEN		 (1L<<27)
+#define BNX2_COM_COMTQ_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_COM_COMTQ_FTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_COM_COMTQ_FTQ_CMD_POP			 (1L<<30)
+#define BNX2_COM_COMTQ_FTQ_CMD_BUSY			 (1L<<31)
+
+#define BNX2_COM_COMTQ_FTQ_CTL				0x001053bc
+#define BNX2_COM_COMTQ_FTQ_CTL_INTERVENE		 (1L<<0)
+#define BNX2_COM_COMTQ_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_COM_COMTQ_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_COM_COMTQ_FTQ_CTL_MAX_DEPTH		 (0x3ffL<<12)
+#define BNX2_COM_COMTQ_FTQ_CTL_CUR_DEPTH		 (0x3ffL<<22)
+
+#define BNX2_COM_COMQ_FTQ_DATA				0x001053c0
+#define BNX2_COM_COMQ_FTQ_CMD				0x001053f8
+#define BNX2_COM_COMQ_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_COM_COMQ_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_COM_COMQ_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_COM_COMQ_FTQ_CMD_ADD_INTERVEN		 (1L<<27)
+#define BNX2_COM_COMQ_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_COM_COMQ_FTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_COM_COMQ_FTQ_CMD_POP			 (1L<<30)
+#define BNX2_COM_COMQ_FTQ_CMD_BUSY			 (1L<<31)
+
+#define BNX2_COM_COMQ_FTQ_CTL				0x001053fc
+#define BNX2_COM_COMQ_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_COM_COMQ_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_COM_COMQ_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_COM_SCRATCH				0x00120000
+
+
+/*
+ *  cp_reg definition
+ *  offset: 0x180000
+ */
+#define BNX2_CP_CPU_MODE				0x00185000
+#define BNX2_CP_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_CP_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_CP_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_CP_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_CP_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_CP_CPU_MODE_INTERRUPT_ENA			 (1L<<7)
+#define BNX2_CP_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_CP_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_CP_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_CP_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_CP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_CP_CPU_STATE				0x00185004
+#define BNX2_CP_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_CP_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_CP_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_CP_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_CP_CPU_STATE_BAD_DATA_ADDR_HALTED		 (1L<<5)
+#define BNX2_CP_CPU_STATE_BAD_pc_HALTED			 (1L<<6)
+#define BNX2_CP_CPU_STATE_ALIGN_HALTED			 (1L<<7)
+#define BNX2_CP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_CP_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_CP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_CP_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_CP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_CP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_CP_CPU_STATE_BLOCKED_READ			 (1L<<31)
+
+#define BNX2_CP_CPU_EVENT_MASK				0x00185008
+#define BNX2_CP_CPU_EVENT_MASK_BREAKPOINT_MASK		 (1L<<0)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_CP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_CP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_CP_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_CP_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_CP_CPU_EVENT_MASK_SOFT_HALTED_MASK		 (1L<<10)
+#define BNX2_CP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_CP_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_CP_CPU_PROGRAM_COUNTER			0x0018501c
+#define BNX2_CP_CPU_INSTRUCTION				0x00185020
+#define BNX2_CP_CPU_DATA_ACCESS				0x00185024
+#define BNX2_CP_CPU_INTERRUPT_ENABLE			0x00185028
+#define BNX2_CP_CPU_INTERRUPT_VECTOR			0x0018502c
+#define BNX2_CP_CPU_INTERRUPT_SAVED_PC			0x00185030
+#define BNX2_CP_CPU_HW_BREAKPOINT			0x00185034
+#define BNX2_CP_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_CP_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK			0x00185038
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_CP_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR			0x00185048
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP		 (0L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_CP_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_CP_CPU_REG_FILE				0x00185200
+#define BNX2_CP_CPQ_FTQ_DATA				0x001853c0
+#define BNX2_CP_CPQ_FTQ_CMD				0x001853f8
+#define BNX2_CP_CPQ_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_CP_CPQ_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_CP_CPQ_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_CP_CPQ_FTQ_CMD_ADD_INTERVEN		 (1L<<27)
+#define BNX2_CP_CPQ_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_CP_CPQ_FTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_CP_CPQ_FTQ_CMD_POP				 (1L<<30)
+#define BNX2_CP_CPQ_FTQ_CMD_BUSY			 (1L<<31)
+
+#define BNX2_CP_CPQ_FTQ_CTL				0x001853fc
+#define BNX2_CP_CPQ_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_CP_CPQ_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_CP_CPQ_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_CP_SCRATCH					0x001a0000
+
+
+/*
+ *  mcp_reg definition
+ *  offset: 0x140000
+ */
+#define BNX2_MCP_CPU_MODE				0x00145000
+#define BNX2_MCP_CPU_MODE_LOCAL_RST			 (1L<<0)
+#define BNX2_MCP_CPU_MODE_STEP_ENA			 (1L<<1)
+#define BNX2_MCP_CPU_MODE_PAGE_0_DATA_ENA		 (1L<<2)
+#define BNX2_MCP_CPU_MODE_PAGE_0_INST_ENA		 (1L<<3)
+#define BNX2_MCP_CPU_MODE_MSG_BIT1			 (1L<<6)
+#define BNX2_MCP_CPU_MODE_INTERRUPT_ENA			 (1L<<7)
+#define BNX2_MCP_CPU_MODE_SOFT_HALT			 (1L<<10)
+#define BNX2_MCP_CPU_MODE_BAD_DATA_HALT_ENA		 (1L<<11)
+#define BNX2_MCP_CPU_MODE_BAD_INST_HALT_ENA		 (1L<<12)
+#define BNX2_MCP_CPU_MODE_FIO_ABORT_HALT_ENA		 (1L<<13)
+#define BNX2_MCP_CPU_MODE_SPAD_UNDERFLOW_HALT_ENA	 (1L<<15)
+
+#define BNX2_MCP_CPU_STATE				0x00145004
+#define BNX2_MCP_CPU_STATE_BREAKPOINT			 (1L<<0)
+#define BNX2_MCP_CPU_STATE_BAD_INST_HALTED		 (1L<<2)
+#define BNX2_MCP_CPU_STATE_PAGE_0_DATA_HALTED		 (1L<<3)
+#define BNX2_MCP_CPU_STATE_PAGE_0_INST_HALTED		 (1L<<4)
+#define BNX2_MCP_CPU_STATE_BAD_DATA_ADDR_HALTED		 (1L<<5)
+#define BNX2_MCP_CPU_STATE_BAD_pc_HALTED		 (1L<<6)
+#define BNX2_MCP_CPU_STATE_ALIGN_HALTED			 (1L<<7)
+#define BNX2_MCP_CPU_STATE_FIO_ABORT_HALTED		 (1L<<8)
+#define BNX2_MCP_CPU_STATE_SOFT_HALTED			 (1L<<10)
+#define BNX2_MCP_CPU_STATE_SPAD_UNDERFLOW		 (1L<<11)
+#define BNX2_MCP_CPU_STATE_INTERRRUPT			 (1L<<12)
+#define BNX2_MCP_CPU_STATE_DATA_ACCESS_STALL		 (1L<<14)
+#define BNX2_MCP_CPU_STATE_INST_FETCH_STALL		 (1L<<15)
+#define BNX2_MCP_CPU_STATE_BLOCKED_READ			 (1L<<31)
+
+#define BNX2_MCP_CPU_EVENT_MASK				0x00145008
+#define BNX2_MCP_CPU_EVENT_MASK_BREAKPOINT_MASK		 (1L<<0)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_INST_HALTED_MASK	 (1L<<2)
+#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_DATA_HALTED_MASK	 (1L<<3)
+#define BNX2_MCP_CPU_EVENT_MASK_PAGE_0_INST_HALTED_MASK	 (1L<<4)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_DATA_ADDR_HALTED_MASK	 (1L<<5)
+#define BNX2_MCP_CPU_EVENT_MASK_BAD_PC_HALTED_MASK	 (1L<<6)
+#define BNX2_MCP_CPU_EVENT_MASK_ALIGN_HALTED_MASK	 (1L<<7)
+#define BNX2_MCP_CPU_EVENT_MASK_FIO_ABORT_MASK		 (1L<<8)
+#define BNX2_MCP_CPU_EVENT_MASK_SOFT_HALTED_MASK	 (1L<<10)
+#define BNX2_MCP_CPU_EVENT_MASK_SPAD_UNDERFLOW_MASK	 (1L<<11)
+#define BNX2_MCP_CPU_EVENT_MASK_INTERRUPT_MASK		 (1L<<12)
+
+#define BNX2_MCP_CPU_PROGRAM_COUNTER			0x0014501c
+#define BNX2_MCP_CPU_INSTRUCTION			0x00145020
+#define BNX2_MCP_CPU_DATA_ACCESS			0x00145024
+#define BNX2_MCP_CPU_INTERRUPT_ENABLE			0x00145028
+#define BNX2_MCP_CPU_INTERRUPT_VECTOR			0x0014502c
+#define BNX2_MCP_CPU_INTERRUPT_SAVED_PC			0x00145030
+#define BNX2_MCP_CPU_HW_BREAKPOINT			0x00145034
+#define BNX2_MCP_CPU_HW_BREAKPOINT_DISABLE		 (1L<<0)
+#define BNX2_MCP_CPU_HW_BREAKPOINT_ADDRESS		 (0x3fffffffL<<2)
+
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK			0x00145038
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_VALUE		 (0x7ffL<<0)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_PEEK_EN		 (1L<<11)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_1_SEL		 (0xfL<<12)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_VALUE		 (0x7ffL<<16)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_PEEK_EN		 (1L<<27)
+#define BNX2_MCP_CPU_DEBUG_VECT_PEEK_2_SEL		 (0xfL<<28)
+
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR			0x00145048
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE		 (1L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_JUMP		 (0L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_TYPE_BRANCH	 (1L<<1)
+#define BNX2_MCP_CPU_LAST_BRANCH_ADDR_LBA		 (0x3fffffffL<<2)
+
+#define BNX2_MCP_CPU_REG_FILE				0x00145200
+#define BNX2_MCP_MCPQ_FTQ_DATA				0x001453c0
+#define BNX2_MCP_MCPQ_FTQ_CMD				0x001453f8
+#define BNX2_MCP_MCPQ_FTQ_CMD_OFFSET			 (0x3ffL<<0)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP			 (1L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_0			 (0L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_WR_TOP_1			 (1L<<10)
+#define BNX2_MCP_MCPQ_FTQ_CMD_SFT_RESET			 (1L<<25)
+#define BNX2_MCP_MCPQ_FTQ_CMD_RD_DATA			 (1L<<26)
+#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_INTERVEN		 (1L<<27)
+#define BNX2_MCP_MCPQ_FTQ_CMD_ADD_DATA			 (1L<<28)
+#define BNX2_MCP_MCPQ_FTQ_CMD_INTERVENE_CLR		 (1L<<29)
+#define BNX2_MCP_MCPQ_FTQ_CMD_POP			 (1L<<30)
+#define BNX2_MCP_MCPQ_FTQ_CMD_BUSY			 (1L<<31)
+
+#define BNX2_MCP_MCPQ_FTQ_CTL				0x001453fc
+#define BNX2_MCP_MCPQ_FTQ_CTL_INTERVENE			 (1L<<0)
+#define BNX2_MCP_MCPQ_FTQ_CTL_OVERFLOW			 (1L<<1)
+#define BNX2_MCP_MCPQ_FTQ_CTL_FORCE_INTERVENE		 (1L<<2)
+#define BNX2_MCP_MCPQ_FTQ_CTL_MAX_DEPTH			 (0x3ffL<<12)
+#define BNX2_MCP_MCPQ_FTQ_CTL_CUR_DEPTH			 (0x3ffL<<22)
+
+#define BNX2_MCP_ROM					0x00150000
+#define BNX2_MCP_SCRATCH				0x00160000
+
+#define BNX2_SHM_HDR_SIGNATURE				BNX2_MCP_SCRATCH
+#define BNX2_SHM_HDR_SIGNATURE_SIG_MASK			 0xffff0000
+#define BNX2_SHM_HDR_SIGNATURE_SIG			 0x53530000
+#define BNX2_SHM_HDR_SIGNATURE_VER_MASK			 0x000000ff
+#define BNX2_SHM_HDR_SIGNATURE_VER_ONE			 0x00000001
+
+#define BNX2_SHM_HDR_ADDR_0				BNX2_MCP_SCRATCH + 4
+#define BNX2_SHM_HDR_ADDR_1				BNX2_MCP_SCRATCH + 8
+
+
+#define NUM_MC_HASH_REGISTERS   8
+
+
+/* PHY_ID1: bits 31-16; PHY_ID2: bits 15-0.  */
+#define PHY_BCM5706_PHY_ID                          0x00206160
+
+#define PHY_ID(id)                                  ((id) & 0xfffffff0)
+#define PHY_REV_ID(id)                              ((id) & 0xf)
+
+/* 5708 Serdes PHY registers */
+
+#define BCM5708S_UP1				0xb
+
+#define BCM5708S_UP1_2G5			0x1
+
+#define BCM5708S_BLK_ADDR			0x1f
+
+#define BCM5708S_BLK_ADDR_DIG			0x0000
+#define BCM5708S_BLK_ADDR_DIG3			0x0002
+#define BCM5708S_BLK_ADDR_TX_MISC		0x0005
+
+/* Digital Block */
+#define BCM5708S_1000X_CTL1			0x10
+
+#define BCM5708S_1000X_CTL1_FIBER_MODE		0x0001
+#define BCM5708S_1000X_CTL1_AUTODET_EN		0x0010
+
+#define BCM5708S_1000X_CTL2			0x11
+
+#define BCM5708S_1000X_CTL2_PLLEL_DET_EN	0x0001
+
+#define BCM5708S_1000X_STAT1			0x14
+
+#define BCM5708S_1000X_STAT1_SGMII		0x0001
+#define BCM5708S_1000X_STAT1_LINK		0x0002
+#define BCM5708S_1000X_STAT1_FD			0x0004
+#define BCM5708S_1000X_STAT1_SPEED_MASK		0x0018
+#define BCM5708S_1000X_STAT1_SPEED_10		0x0000
+#define BCM5708S_1000X_STAT1_SPEED_100		0x0008
+#define BCM5708S_1000X_STAT1_SPEED_1G		0x0010
+#define BCM5708S_1000X_STAT1_SPEED_2G5		0x0018
+#define BCM5708S_1000X_STAT1_TX_PAUSE		0x0020
+#define BCM5708S_1000X_STAT1_RX_PAUSE		0x0040
+
+/* Digital3 Block */
+#define BCM5708S_DIG_3_0			0x10
+
+#define BCM5708S_DIG_3_0_USE_IEEE		0x0001
+
+/* Tx/Misc Block */
+#define BCM5708S_TX_ACTL1			0x15
+
+#define BCM5708S_TX_ACTL1_DRIVER_VCM		0x30
+
+#define BCM5708S_TX_ACTL3			0x17
+
+#define MIN_ETHERNET_PACKET_SIZE	60
+#define MAX_ETHERNET_PACKET_SIZE	1514
+#define MAX_ETHERNET_JUMBO_PACKET_SIZE	9014
+
+#define RX_COPY_THRESH			92
+
+#define DMA_READ_CHANS	5
+#define DMA_WRITE_CHANS	3
+
+#define BCM_PAGE_BITS	12
+#define BCM_PAGE_SIZE	(1 << BCM_PAGE_BITS)
+
+#define TX_DESC_CNT  (BCM_PAGE_SIZE / sizeof(struct tx_bd))
+#define MAX_TX_DESC_CNT (TX_DESC_CNT - 1)
+
+#define MAX_RX_RINGS	4
+#define RX_DESC_CNT  (BCM_PAGE_SIZE / sizeof(struct rx_bd))
+#define MAX_RX_DESC_CNT (RX_DESC_CNT - 1)
+#define MAX_TOTAL_RX_DESC_CNT (MAX_RX_DESC_CNT * MAX_RX_RINGS)
+
+#define NEXT_TX_BD(x) (((x) & (MAX_TX_DESC_CNT - 1)) ==			\
+		(MAX_TX_DESC_CNT - 1)) ?				\
+	(x) + 2 : (x) + 1
+
+#define PREV_TX_BD(x) ((((x)-1) & (MAX_TX_DESC_CNT)) ==			\
+		(MAX_TX_DESC_CNT)) ?				\
+	(x) - 2 : (x) - 1
+
+#define TX_RING_IDX(x) ((x) & MAX_TX_DESC_CNT)
+
+#define NEXT_RX_BD(x) (((x) & (MAX_RX_DESC_CNT - 1)) ==			\
+		(MAX_RX_DESC_CNT - 1)) ?				\
+	(x) + 2 : (x) + 1
+
+#define RX_RING_IDX(x) ((x) & bp->rx_max_ring_idx)
+
+//#define RX_RING(x) (((x) & ~MAX_RX_DESC_CNT) >> 8)
+#define RX_IDX(x) ((x) & MAX_RX_DESC_CNT)
+
+/* Context size. */
+#define CTX_SHIFT                   7
+#define CTX_SIZE                    (1 << CTX_SHIFT)
+#define CTX_MASK                    (CTX_SIZE - 1)
+#define GET_CID_ADDR(_cid)          ((_cid) << CTX_SHIFT)
+#define GET_CID(_cid_addr)          ((_cid_addr) >> CTX_SHIFT)
+
+#define PHY_CTX_SHIFT               6
+#define PHY_CTX_SIZE                (1 << PHY_CTX_SHIFT)
+#define PHY_CTX_MASK                (PHY_CTX_SIZE - 1)
+#define GET_PCID_ADDR(_pcid)        ((_pcid) << PHY_CTX_SHIFT)
+#define GET_PCID(_pcid_addr)        ((_pcid_addr) >> PHY_CTX_SHIFT)
+
+#define MB_KERNEL_CTX_SHIFT         8
+#define MB_KERNEL_CTX_SIZE          (1 << MB_KERNEL_CTX_SHIFT)
+#define MB_KERNEL_CTX_MASK          (MB_KERNEL_CTX_SIZE - 1)
+#define MB_GET_CID_ADDR(_cid)       (0x10000 + ((_cid) << MB_KERNEL_CTX_SHIFT))
+
+#define MAX_CID_CNT                 0x4000
+#define MAX_CID_ADDR                (GET_CID_ADDR(MAX_CID_CNT))
+#define INVALID_CID_ADDR            0xffffffff
+
+#define TX_CID		16
+#define RX_CID		0
+
+#define MB_TX_CID_ADDR	MB_GET_CID_ADDR(TX_CID)
+#define MB_RX_CID_ADDR	MB_GET_CID_ADDR(RX_CID)
+
+#if 0
+struct sw_bd {
+	struct sk_buff		*skb;
+	DECLARE_PCI_UNMAP_ADDR(mapping)
+};
+#endif
+
+/* Buffered flash (Atmel: AT45DB011B) specific information */
+#define SEEPROM_PAGE_BITS			2
+#define SEEPROM_PHY_PAGE_SIZE			(1 << SEEPROM_PAGE_BITS)
+#define SEEPROM_BYTE_ADDR_MASK			(SEEPROM_PHY_PAGE_SIZE-1)
+#define SEEPROM_PAGE_SIZE			4
+#define SEEPROM_TOTAL_SIZE			65536
+
+#define BUFFERED_FLASH_PAGE_BITS		9
+#define BUFFERED_FLASH_PHY_PAGE_SIZE		(1 << BUFFERED_FLASH_PAGE_BITS)
+#define BUFFERED_FLASH_BYTE_ADDR_MASK		(BUFFERED_FLASH_PHY_PAGE_SIZE-1)
+#define BUFFERED_FLASH_PAGE_SIZE		264
+#define BUFFERED_FLASH_TOTAL_SIZE		0x21000
+
+#define SAIFUN_FLASH_PAGE_BITS			8
+#define SAIFUN_FLASH_PHY_PAGE_SIZE		(1 << SAIFUN_FLASH_PAGE_BITS)
+#define SAIFUN_FLASH_BYTE_ADDR_MASK		(SAIFUN_FLASH_PHY_PAGE_SIZE-1)
+#define SAIFUN_FLASH_PAGE_SIZE			256
+#define SAIFUN_FLASH_BASE_TOTAL_SIZE		65536
+
+#define ST_MICRO_FLASH_PAGE_BITS		8
+#define ST_MICRO_FLASH_PHY_PAGE_SIZE		(1 << ST_MICRO_FLASH_PAGE_BITS)
+#define ST_MICRO_FLASH_BYTE_ADDR_MASK		(ST_MICRO_FLASH_PHY_PAGE_SIZE-1)
+#define ST_MICRO_FLASH_PAGE_SIZE		256
+#define ST_MICRO_FLASH_BASE_TOTAL_SIZE		65536
+
+#define NVRAM_TIMEOUT_COUNT			30000
+
+
+#define FLASH_STRAP_MASK			(BNX2_NVM_CFG1_FLASH_MODE   | \
+						 BNX2_NVM_CFG1_BUFFER_MODE  | \
+						 BNX2_NVM_CFG1_PROTECT_MODE | \
+						 BNX2_NVM_CFG1_FLASH_SIZE)
+
+#define FLASH_BACKUP_STRAP_MASK			(0xf << 26)
+
+struct flash_spec {
+	u32 strapping;
+	u32 config1;
+	u32 config2;
+	u32 config3;
+	u32 write1;
+	u32 buffered;
+	u32 page_bits;
+	u32 page_size;
+	u32 addr_mask;
+	u32 total_size;
+	char  *name;
+};
+
+struct bnx2 {
+	/* Fields used in the tx and intr/napi performance paths are grouped */
+	/* together in the beginning of the structure. */
+	void /*__iomem*/		*regview;
+
+	struct nic		*nic;
+	struct pci_device	*pdev;
+
+	/* atomic_t		intr_sem; */
+
+	struct status_block	*status_blk;
+	u32 			last_status_idx;
+
+	u32			flags;
+#define PCIX_FLAG			1
+#define PCI_32BIT_FLAG			2
+#define ONE_TDMA_FLAG			4	/* no longer used */
+#define NO_WOL_FLAG			8
+#define USING_DAC_FLAG			0x10
+#define USING_MSI_FLAG			0x20
+#define ASF_ENABLE_FLAG			0x40
+
+	/* Put tx producer and consumer fields in separate cache lines. */
+	u32		tx_prod_bseq __attribute__((aligned(L1_CACHE_BYTES)));
+	u16		tx_prod;
+
+	struct tx_bd	*tx_desc_ring;
+	struct sw_bd	*tx_buf_ring;
+	int		tx_ring_size;
+
+	u16		tx_cons __attribute__((aligned(L1_CACHE_BYTES))); 
+	u16		hw_tx_cons;
+
+#ifdef BCM_VLAN 
+	struct			vlan_group *vlgrp;
+#endif
+
+	u32			rx_offset;
+	u32			rx_buf_use_size;	/* useable size */
+	u32			rx_buf_size;		/* with alignment */
+	u32			rx_max_ring_idx;
+
+	u32			rx_prod_bseq;
+	u16			rx_prod;
+	u16			rx_cons;
+	u16			hw_rx_cons;
+
+	u32			rx_csum;
+
+#if 0
+	struct rx_bd		*rx_desc_ring[MAX_RX_RINGS];
+#endif
+	struct rx_bd		*rx_desc_ring;
+
+	/* End of fields used in the performance code paths. */
+
+	char			*name;
+
+#if 0
+	int			timer_interval;
+	int			current_interval;
+	struct			timer_list timer;
+	struct work_struct	reset_task;
+	int			in_reset_task;
+
+	/* Used to synchronize phy accesses. */
+	spinlock_t		phy_lock;
+#endif
+
+	u32			phy_flags;
+#define PHY_SERDES_FLAG			1
+#define PHY_CRC_FIX_FLAG		2
+#define PHY_PARALLEL_DETECT_FLAG	4
+#define PHY_2_5G_CAPABLE_FLAG		8
+#define PHY_INT_MODE_MASK_FLAG		0x300
+#define PHY_INT_MODE_AUTO_POLLING_FLAG	0x100
+#define PHY_INT_MODE_LINK_READY_FLAG	0x200
+
+	u32			chip_id;
+	/* chip num:16-31, rev:12-15, metal:4-11, bond_id:0-3 */
+#define CHIP_NUM(bp)			(((bp)->chip_id) & 0xffff0000)
+#define CHIP_NUM_5706			0x57060000
+#define CHIP_NUM_5708			0x57080000
+
+#define CHIP_REV(bp)			(((bp)->chip_id) & 0x0000f000)
+#define CHIP_REV_Ax			0x00000000
+#define CHIP_REV_Bx			0x00001000
+#define CHIP_REV_Cx			0x00002000
+    
+#define CHIP_METAL(bp)			(((bp)->chip_id) & 0x00000ff0)
+#define CHIP_BONDING(bp)		(((bp)->chip_id) & 0x0000000f)
+
+#define CHIP_ID(bp)			(((bp)->chip_id) & 0xfffffff0)
+#define CHIP_ID_5706_A0			0x57060000
+#define CHIP_ID_5706_A1			0x57060010
+#define CHIP_ID_5706_A2			0x57060020
+#define CHIP_ID_5708_A0			0x57080000
+#define CHIP_ID_5708_B0			0x57081000
+#define CHIP_ID_5708_B1			0x57081010
+
+#define CHIP_BOND_ID(bp)		(((bp)->chip_id) & 0xf)
+
+/* A serdes chip will have the first bit of the bond id set. */
+#define CHIP_BOND_ID_SERDES_BIT		0x01
+
+	u32			phy_addr;
+	u32			phy_id;
+	
+	u16			bus_speed_mhz;
+	u8			wol;
+
+	u8			pad;
+
+	u16			fw_wr_seq;
+	u16			fw_drv_pulse_wr_seq;
+
+	dma_addr_t		tx_desc_mapping;
+
+
+	int			rx_max_ring;
+	int			rx_ring_size;
+#if 0
+	dma_addr_t		rx_desc_mapping[MAX_RX_RINGS];
+#endif
+	dma_addr_t		rx_desc_mapping;
+
+	u16			tx_quick_cons_trip;
+	u16			tx_quick_cons_trip_int;
+	u16			rx_quick_cons_trip;
+	u16			rx_quick_cons_trip_int;
+	u16			comp_prod_trip;
+	u16			comp_prod_trip_int;
+	u16			tx_ticks;
+	u16			tx_ticks_int;
+	u16			com_ticks;
+	u16			com_ticks_int;
+	u16			cmd_ticks;
+	u16			cmd_ticks_int;
+	u16			rx_ticks;
+	u16			rx_ticks_int;
+
+	u32			stats_ticks;
+
+	dma_addr_t		status_blk_mapping;
+
+	struct statistics_block	*stats_blk;
+	dma_addr_t		stats_blk_mapping;
+
+	u32			hc_cmd;
+	u32			rx_mode;
+
+	u16			req_line_speed;
+	u8			req_duplex;
+
+	u8			link_up;
+
+	u16			line_speed;
+	u8			duplex;
+	u8			flow_ctrl;	/* actual flow ctrl settings */
+						/* may be different from     */
+						/* req_flow_ctrl if autoneg  */
+#define FLOW_CTRL_TX		1
+#define FLOW_CTRL_RX		2
+
+	u32			advertising;
+
+	u8			req_flow_ctrl;	/* flow ctrl advertisement */ 
+						/* settings or forced      */
+						/* settings                */
+	u8			autoneg;
+#define AUTONEG_SPEED		1
+#define AUTONEG_FLOW_CTRL	2
+
+	u8			loopback;
+#define MAC_LOOPBACK		1
+#define PHY_LOOPBACK		2
+
+	u8			serdes_an_pending;
+#define SERDES_AN_TIMEOUT	(HZ / 3)
+
+	u8			mac_addr[8];
+
+	u32			shmem_base;
+
+	u32			fw_ver;
+
+	int			pm_cap;
+	int			pcix_cap;
+
+	/* struct net_device_stats net_stats; */
+
+	struct flash_spec	*flash_info;
+	u32			flash_size;
+
+	int			status_stats_size;
+};
+
+static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset);
+static void bnx2_reg_wr_ind(struct bnx2 *bp, u32 offset, u32 val);
+
+#define REG_RD(bp, offset)					\
+	readl(bp->regview + offset)
+
+#define REG_WR(bp, offset, val)					\
+	writel(val, bp->regview + offset)
+
+#define REG_WR16(bp, offset, val)				\
+	writew(val, bp->regview + offset)
+
+#define REG_RD_IND(bp, offset)					\
+	bnx2_reg_rd_ind(bp, offset)
+
+#define REG_WR_IND(bp, offset, val)				\
+	bnx2_reg_wr_ind(bp, offset, val)
+
+/* Indirect context access.  Unlike the MBQ_WR, these macros will not
+ * trigger a chip event. */
+static void bnx2_ctx_wr(struct bnx2 *bp, u32 cid_addr, u32 offset, u32 val);
+
+#define CTX_WR(bp, cid_addr, offset, val)			\
+	bnx2_ctx_wr(bp, cid_addr, offset, val)
+
+struct cpu_reg {
+	u32 mode;
+	u32 mode_value_halt;
+	u32 mode_value_sstep;
+
+	u32 state;
+	u32 state_value_clear;
+
+	u32 gpr0;
+	u32 evmask;
+	u32 pc;
+	u32 inst;
+	u32 bp;
+
+	u32 spad_base;
+
+	u32 mips_view_base;
+};
+
+struct fw_info {
+	u32 ver_major;
+	u32 ver_minor;
+	u32 ver_fix;
+
+	u32 start_addr;
+
+	/* Text section. */
+	u32 text_addr;
+	u32 text_len;
+	u32 text_index;
+	u32 *text;
+
+	/* Data section. */
+	u32 data_addr;
+	u32 data_len;
+	u32 data_index;
+	u32 *data;
+
+	/* SBSS section. */
+	u32 sbss_addr;
+	u32 sbss_len;
+	u32 sbss_index;
+	u32 *sbss;
+
+	/* BSS section. */
+	u32 bss_addr;
+	u32 bss_len;
+	u32 bss_index;
+	u32 *bss;
+
+	/* Read-only section. */
+	u32 rodata_addr;
+	u32 rodata_len;
+	u32 rodata_index;
+	u32 *rodata;
+};
+
+#define RV2P_PROC1                              0
+#define RV2P_PROC2                              1
+
+
+/* This value (in milliseconds) determines the frequency of the driver
+ * issuing the PULSE message code.  The firmware monitors this periodic
+ * pulse to determine when to switch to an OS-absent mode. */
+#define DRV_PULSE_PERIOD_MS                 250
+
+/* This value (in milliseconds) determines how long the driver should
+ * wait for an acknowledgement from the firmware before timing out.  Once
+ * the firmware has timed out, the driver will assume there is no firmware
+ * running and there won't be any firmware-driver synchronization during a
+ * driver reset. */
+#define FW_ACK_TIME_OUT_MS                  100
+
+
+#define BNX2_DRV_RESET_SIGNATURE		0x00000000
+#define BNX2_DRV_RESET_SIGNATURE_MAGIC		 0x4841564b /* HAVK */
+//#define DRV_RESET_SIGNATURE_MAGIC		 0x47495352 /* RSIG */
+
+#define BNX2_DRV_MB				0x00000004
+#define BNX2_DRV_MSG_CODE			 0xff000000
+#define BNX2_DRV_MSG_CODE_RESET			 0x01000000
+#define BNX2_DRV_MSG_CODE_UNLOAD		 0x02000000
+#define BNX2_DRV_MSG_CODE_SHUTDOWN		 0x03000000
+#define BNX2_DRV_MSG_CODE_SUSPEND_WOL		 0x04000000
+#define BNX2_DRV_MSG_CODE_FW_TIMEOUT		 0x05000000
+#define BNX2_DRV_MSG_CODE_PULSE			 0x06000000
+#define BNX2_DRV_MSG_CODE_DIAG			 0x07000000
+#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL	 0x09000000
+
+#define BNX2_DRV_MSG_DATA			 0x00ff0000
+#define BNX2_DRV_MSG_DATA_WAIT0			 0x00010000
+#define BNX2_DRV_MSG_DATA_WAIT1			 0x00020000
+#define BNX2_DRV_MSG_DATA_WAIT2			 0x00030000
+#define BNX2_DRV_MSG_DATA_WAIT3			 0x00040000
+        
+#define BNX2_DRV_MSG_SEQ			 0x0000ffff
+
+#define BNX2_FW_MB				0x00000008
+#define BNX2_FW_MSG_ACK				 0x0000ffff
+#define BNX2_FW_MSG_STATUS_MASK			 0x00ff0000
+#define BNX2_FW_MSG_STATUS_OK			 0x00000000
+#define BNX2_FW_MSG_STATUS_FAILURE		 0x00ff0000
+
+#define BNX2_LINK_STATUS			0x0000000c
+#define BNX2_LINK_STATUS_INIT_VALUE		 0xffffffff 
+#define BNX2_LINK_STATUS_LINK_UP		 0x1 
+#define BNX2_LINK_STATUS_LINK_DOWN		 0x0 
+#define BNX2_LINK_STATUS_SPEED_MASK		 0x1e
+#define BNX2_LINK_STATUS_AN_INCOMPLETE		 (0<<1) 
+#define BNX2_LINK_STATUS_10HALF			 (1<<1) 
+#define BNX2_LINK_STATUS_10FULL			 (2<<1) 
+#define BNX2_LINK_STATUS_100HALF		 (3<<1) 
+#define BNX2_LINK_STATUS_100BASE_T4		 (4<<1) 
+#define BNX2_LINK_STATUS_100FULL		 (5<<1) 
+#define BNX2_LINK_STATUS_1000HALF		 (6<<1) 
+#define BNX2_LINK_STATUS_1000FULL		 (7<<1) 
+#define BNX2_LINK_STATUS_2500HALF		 (8<<1) 
+#define BNX2_LINK_STATUS_2500FULL		 (9<<1) 
+#define BNX2_LINK_STATUS_AN_ENABLED		 (1<<5) 
+#define BNX2_LINK_STATUS_AN_COMPLETE		 (1<<6) 
+#define BNX2_LINK_STATUS_PARALLEL_DET		 (1<<7) 
+#define BNX2_LINK_STATUS_RESERVED		 (1<<8) 
+#define BNX2_LINK_STATUS_PARTNER_AD_1000FULL	 (1<<9) 
+#define BNX2_LINK_STATUS_PARTNER_AD_1000HALF	 (1<<10) 
+#define BNX2_LINK_STATUS_PARTNER_AD_100BT4	 (1<<11) 
+#define BNX2_LINK_STATUS_PARTNER_AD_100FULL	 (1<<12) 
+#define BNX2_LINK_STATUS_PARTNER_AD_100HALF	 (1<<13) 
+#define BNX2_LINK_STATUS_PARTNER_AD_10FULL	 (1<<14) 
+#define BNX2_LINK_STATUS_PARTNER_AD_10HALF	 (1<<15) 
+#define BNX2_LINK_STATUS_TX_FC_ENABLED		 (1<<16) 
+#define BNX2_LINK_STATUS_RX_FC_ENABLED		 (1<<17) 
+#define BNX2_LINK_STATUS_PARTNER_SYM_PAUSE_CAP	 (1<<18) 
+#define BNX2_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP	 (1<<19) 
+#define BNX2_LINK_STATUS_SERDES_LINK		 (1<<20) 
+#define BNX2_LINK_STATUS_PARTNER_AD_2500FULL	 (1<<21) 
+#define BNX2_LINK_STATUS_PARTNER_AD_2500HALF	 (1<<22) 
+
+#define BNX2_DRV_PULSE_MB			0x00000010
+#define BNX2_DRV_PULSE_SEQ_MASK			 0x00007fff
+
+/* Indicate to the firmware not to go into the
+ * OS absent when it is not getting driver pulse.
+ * This is used for debugging. */
+#define BNX2_DRV_MSG_DATA_PULSE_CODE_ALWAYS_ALIVE	 0x00080000
+
+#define BNX2_DEV_INFO_SIGNATURE			0x00000020
+#define BNX2_DEV_INFO_SIGNATURE_MAGIC		 0x44564900
+#define BNX2_DEV_INFO_SIGNATURE_MAGIC_MASK	 0xffffff00
+#define BNX2_DEV_INFO_FEATURE_CFG_VALID		 0x01
+#define BNX2_DEV_INFO_SECONDARY_PORT		 0x80
+#define BNX2_DEV_INFO_DRV_ALWAYS_ALIVE		 0x40
+
+#define BNX2_SHARED_HW_CFG_PART_NUM		0x00000024
+
+#define BNX2_SHARED_HW_CFG_POWER_DISSIPATED	0x00000034
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D3_MASK	 0xff000000
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D2_MASK	 0xff0000
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D1_MASK	 0xff00
+#define BNX2_SHARED_HW_CFG_POWER_STATE_D0_MASK	 0xff
+
+#define BNX2_SHARED_HW_CFG POWER_CONSUMED	0x00000038
+#define BNX2_SHARED_HW_CFG_CONFIG		0x0000003c
+#define BNX2_SHARED_HW_CFG_DESIGN_NIC		 0
+#define BNX2_SHARED_HW_CFG_DESIGN_LOM		 0x1
+#define BNX2_SHARED_HW_CFG_PHY_COPPER		 0
+#define BNX2_SHARED_HW_CFG_PHY_FIBER		 0x2
+#define BNX2_SHARED_HW_CFG_PHY_2_5G		 0x20
+#define BNX2_SHARED_HW_CFG_PHY_BACKPLANE	 0x40
+#define BNX2_SHARED_HW_CFG_LED_MODE_SHIFT_BITS	 8
+#define BNX2_SHARED_HW_CFG_LED_MODE_MASK	 0x300
+#define BNX2_SHARED_HW_CFG_LED_MODE_MAC		 0
+#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1	 0x100
+#define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2	 0x200
+
+#define BNX2_SHARED_HW_CFG_CONFIG2		0x00000040
+#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK	 0x00fff000
+
+#define BNX2_DEV_INFO_BC_REV			0x0000004c
+
+#define BNX2_PORT_HW_CFG_MAC_UPPER		0x00000050
+#define BNX2_PORT_HW_CFG_UPPERMAC_MASK		 0xffff
+
+#define BNX2_PORT_HW_CFG_MAC_LOWER		0x00000054
+#define BNX2_PORT_HW_CFG_CONFIG			0x00000058
+#define BNX2_PORT_HW_CFG_CFG_TXCTL3_MASK	 0x0000ffff
+#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK	 0x001f0000
+#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_AN	 0x00000000
+#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G	 0x00030000
+#define BNX2_PORT_HW_CFG_CFG_DFLT_LINK_2_5G	 0x00040000
+
+#define BNX2_PORT_HW_CFG_IMD_MAC_A_UPPER	0x00000068
+#define BNX2_PORT_HW_CFG_IMD_MAC_A_LOWER	0x0000006c
+#define BNX2_PORT_HW_CFG_IMD_MAC_B_UPPER	0x00000070
+#define BNX2_PORT_HW_CFG_IMD_MAC_B_LOWER	0x00000074
+#define BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER	0x00000078
+#define BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER	0x0000007c
+
+#define BNX2_DEV_INFO_PER_PORT_HW_CONFIG2	0x000000b4
+
+#define BNX2_DEV_INFO_FORMAT_REV		0x000000c4
+#define BNX2_DEV_INFO_FORMAT_REV_MASK		 0xff000000
+#define BNX2_DEV_INFO_FORMAT_REV_ID		 ('A' << 24)
+
+#define BNX2_SHARED_FEATURE			0x000000c8
+#define BNX2_SHARED_FEATURE_MASK		 0xffffffff
+
+#define BNX2_PORT_FEATURE			0x000000d8
+#define BNX2_PORT2_FEATURE			0x00000014c
+#define BNX2_PORT_FEATURE_WOL_ENABLED		 0x01000000
+#define BNX2_PORT_FEATURE_MBA_ENABLED		 0x02000000
+#define BNX2_PORT_FEATURE_ASF_ENABLED		 0x04000000
+#define BNX2_PORT_FEATURE_IMD_ENABLED		 0x08000000
+#define BNX2_PORT_FEATURE_BAR1_SIZE_MASK	 0xf
+#define BNX2_PORT_FEATURE_BAR1_SIZE_DISABLED	 0x0
+#define BNX2_PORT_FEATURE_BAR1_SIZE_64K		 0x1
+#define BNX2_PORT_FEATURE_BAR1_SIZE_128K	 0x2
+#define BNX2_PORT_FEATURE_BAR1_SIZE_256K	 0x3
+#define BNX2_PORT_FEATURE_BAR1_SIZE_512K	 0x4
+#define BNX2_PORT_FEATURE_BAR1_SIZE_1M		 0x5
+#define BNX2_PORT_FEATURE_BAR1_SIZE_2M		 0x6
+#define BNX2_PORT_FEATURE_BAR1_SIZE_4M		 0x7
+#define BNX2_PORT_FEATURE_BAR1_SIZE_8M		 0x8
+#define BNX2_PORT_FEATURE_BAR1_SIZE_16M		 0x9
+#define BNX2_PORT_FEATURE_BAR1_SIZE_32M		 0xa
+#define BNX2_PORT_FEATURE_BAR1_SIZE_64M		 0xb
+#define BNX2_PORT_FEATURE_BAR1_SIZE_128M	 0xc
+#define BNX2_PORT_FEATURE_BAR1_SIZE_256M	 0xd
+#define BNX2_PORT_FEATURE_BAR1_SIZE_512M	 0xe
+#define BNX2_PORT_FEATURE_BAR1_SIZE_1G		 0xf
+
+#define BNX2_PORT_FEATURE_WOL			0xdc
+#define BNX2_PORT2_FEATURE_WOL			0x150
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_SHIFT_BITS	 4
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MASK	 0x30
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_DISABLE	 0
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC	 0x10
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_ACPI	 0x20
+#define BNX2_PORT_FEATURE_WOL_DEFAULT_MAGIC_AND_ACPI	 0x30
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_MASK	 0xf
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_AUTONEG	 0
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10HALF	 1
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_10FULL	 2
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100HALF 3
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_100FULL 4
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000HALF	 5
+#define BNX2_PORT_FEATURE_WOL_LINK_SPEED_1000FULL	 6
+#define BNX2_PORT_FEATURE_WOL_AUTONEG_ADVERTISE_1000	 0x40
+#define BNX2_PORT_FEATURE_WOL_RESERVED_PAUSE_CAP 0x400
+#define BNX2_PORT_FEATURE_WOL_RESERVED_ASYM_PAUSE_CAP	 0x800
+
+#define BNX2_PORT_FEATURE_MBA			0xe0
+#define BNX2_PORT2_FEATURE_MBA			0x154
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_SHIFT_BITS	 0
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_MASK	 0x3
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_PXE	 0
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_RPL	 1
+#define BNX2_PORT_FEATURE_MBA_BOOT_AGENT_TYPE_BOOTP	 2
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_SHIFT_BITS	 2
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_MASK	 0x3c
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_AUTONEG	 0
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10HALF	 0x4
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_10FULL	 0x8
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100HALF	 0xc
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_100FULL	 0x10
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000HALF	 0x14
+#define BNX2_PORT_FEATURE_MBA_LINK_SPEED_1000FULL	 0x18
+#define BNX2_PORT_FEATURE_MBA_SETUP_PROMPT_ENABLE	 0x40
+#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_S	 0
+#define BNX2_PORT_FEATURE_MBA_HOTKEY_CTRL_B	 0x80
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_SHIFT_BITS	 8
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_MASK	 0xff00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_DISABLED	 0
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1K	 0x100
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2K	 0x200
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4K	 0x300
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8K	 0x400
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16K	 0x500
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_32K	 0x600
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_64K	 0x700
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_128K	 0x800
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_256K	 0x900
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_512K	 0xa00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_1M	 0xb00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_2M	 0xc00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_4M	 0xd00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_8M	 0xe00
+#define BNX2_PORT_FEATURE_MBA_EXP_ROM_SIZE_16M	 0xf00
+#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_SHIFT_BITS	 16
+#define BNX2_PORT_FEATURE_MBA_MSG_TIMEOUT_MASK	 0xf0000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_SHIFT_BITS	 20
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_MASK	 0x300000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_AUTO	 0
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_BBS	 0x100000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT18H	 0x200000
+#define BNX2_PORT_FEATURE_MBA_BIOS_BOOTSTRAP_INT19H	 0x300000
+
+#define BNX2_PORT_FEATURE_IMD			0xe4
+#define BNX2_PORT2_FEATURE_IMD			0x158
+#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_DEFAULT	 0
+#define BNX2_PORT_FEATURE_IMD_LINK_OVERRIDE_ENABLE	 1
+
+#define BNX2_PORT_FEATURE_VLAN			0xe8
+#define BNX2_PORT2_FEATURE_VLAN			0x15c
+#define BNX2_PORT_FEATURE_MBA_VLAN_TAG_MASK	 0xffff
+#define BNX2_PORT_FEATURE_MBA_VLAN_ENABLE	 0x10000
+
+#define BNX2_BC_STATE_RESET_TYPE		0x000001c0
+#define BNX2_BC_STATE_RESET_TYPE_SIG		 0x00005254
+#define BNX2_BC_STATE_RESET_TYPE_SIG_MASK	 0x0000ffff
+#define BNX2_BC_STATE_RESET_TYPE_NONE	 (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					  0x00010000)
+#define BNX2_BC_STATE_RESET_TYPE_PCI	 (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					  0x00020000)
+#define BNX2_BC_STATE_RESET_TYPE_VAUX	 (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					  0x00030000)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_MASK	 DRV_MSG_CODE         
+#define BNX2_BC_STATE_RESET_TYPE_DRV_RESET (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					    DRV_MSG_CODE_RESET)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_UNLOAD (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					     DRV_MSG_CODE_UNLOAD)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_SHUTDOWN (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					       DRV_MSG_CODE_SHUTDOWN)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_WOL (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					  DRV_MSG_CODE_WOL)
+#define BNX2_BC_STATE_RESET_TYPE_DRV_DIAG (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					   DRV_MSG_CODE_DIAG)
+#define BNX2_BC_STATE_RESET_TYPE_VALUE(msg) (BNX2_BC_STATE_RESET_TYPE_SIG | \
+					     (msg))
+
+#define BNX2_BC_STATE				0x000001c4
+#define BNX2_BC_STATE_ERR_MASK			 0x0000ff00
+#define BNX2_BC_STATE_SIGN			 0x42530000
+#define BNX2_BC_STATE_SIGN_MASK			 0xffff0000
+#define BNX2_BC_STATE_BC1_START			 (BNX2_BC_STATE_SIGN | 0x1)
+#define BNX2_BC_STATE_GET_NVM_CFG1		 (BNX2_BC_STATE_SIGN | 0x2)
+#define BNX2_BC_STATE_PROG_BAR			 (BNX2_BC_STATE_SIGN | 0x3)
+#define BNX2_BC_STATE_INIT_VID			 (BNX2_BC_STATE_SIGN | 0x4)
+#define BNX2_BC_STATE_GET_NVM_CFG2		 (BNX2_BC_STATE_SIGN | 0x5)
+#define BNX2_BC_STATE_APPLY_WKARND		 (BNX2_BC_STATE_SIGN | 0x6)
+#define BNX2_BC_STATE_LOAD_BC2			 (BNX2_BC_STATE_SIGN | 0x7)
+#define BNX2_BC_STATE_GOING_BC2			 (BNX2_BC_STATE_SIGN | 0x8)
+#define BNX2_BC_STATE_GOING_DIAG		 (BNX2_BC_STATE_SIGN | 0x9)
+#define BNX2_BC_STATE_RT_FINAL_INIT		 (BNX2_BC_STATE_SIGN | 0x81)
+#define BNX2_BC_STATE_RT_WKARND			 (BNX2_BC_STATE_SIGN | 0x82)
+#define BNX2_BC_STATE_RT_DRV_PULSE		 (BNX2_BC_STATE_SIGN | 0x83)
+#define BNX2_BC_STATE_RT_FIOEVTS		 (BNX2_BC_STATE_SIGN | 0x84)
+#define BNX2_BC_STATE_RT_DRV_CMD		 (BNX2_BC_STATE_SIGN | 0x85)
+#define BNX2_BC_STATE_RT_LOW_POWER		 (BNX2_BC_STATE_SIGN | 0x86)
+#define BNX2_BC_STATE_RT_SET_WOL		 (BNX2_BC_STATE_SIGN | 0x87)
+#define BNX2_BC_STATE_RT_OTHER_FW		 (BNX2_BC_STATE_SIGN | 0x88)
+#define BNX2_BC_STATE_RT_GOING_D3		 (BNX2_BC_STATE_SIGN | 0x89)
+#define BNX2_BC_STATE_ERR_BAD_VERSION		 (BNX2_BC_STATE_SIGN | 0x0100)
+#define BNX2_BC_STATE_ERR_BAD_BC2_CRC		 (BNX2_BC_STATE_SIGN | 0x0200)
+#define BNX2_BC_STATE_ERR_BC1_LOOP		 (BNX2_BC_STATE_SIGN | 0x0300)
+#define BNX2_BC_STATE_ERR_UNKNOWN_CMD		 (BNX2_BC_STATE_SIGN | 0x0400)
+#define BNX2_BC_STATE_ERR_DRV_DEAD		 (BNX2_BC_STATE_SIGN | 0x0500)
+#define BNX2_BC_STATE_ERR_NO_RXP		 (BNX2_BC_STATE_SIGN | 0x0600)
+#define BNX2_BC_STATE_ERR_TOO_MANY_RBUF		 (BNX2_BC_STATE_SIGN | 0x0700)
+	
+#define BNX2_BC_STATE_DEBUG_CMD			0x1dc
+#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE	 0x42440000
+#define BNX2_BC_STATE_BC_DBG_CMD_SIGNATURE_MASK	 0xffff0000
+#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_CNT_MASK	 0xffff
+#define BNX2_BC_STATE_BC_DBG_CMD_LOOP_INFINITE	 0xffff
+
+#define HOST_VIEW_SHMEM_BASE			0x167c00
+
+/* Enable or disable autonegotiation.  If this is set to enable,
+ * the forced link modes above are completely ignored.
+ */
+#define AUTONEG_DISABLE		0x00
+#define AUTONEG_ENABLE		0x01
+
+#define RX_OFFSET		(sizeof(struct l2_fhdr) + 2)
+
+#define RX_BUF_CNT		20
+
+/* 8 for CRC and VLAN */
+#define RX_BUF_USE_SIZE		(ETH_MAX_MTU + ETH_HLEN + RX_OFFSET + 8)
+
+/* 8 for alignment */
+//#define RX_BUF_SIZE		(RX_BUF_USE_SIZE + 8)
+#define RX_BUF_SIZE		(L1_CACHE_ALIGN(RX_BUF_USE_SIZE + 8))
+
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/cs89x0.c ipxe-1.0.1~lliurex1505/src/drivers/net/cs89x0.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/cs89x0.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/cs89x0.c	2012-01-06 23:49:04.000000000 +0000
@@ -58,7 +58,7 @@
   Fri Nov 22 23:00:00 1996  Markus Gutschke  <gutschk@math.uni-muenster.de>
 
   * read the manuals for the CS89x0 chipsets and took note of all the
-    changes that will be necessary in order to adapt Russel Nelson's code
+    changes that will be neccessary in order to adapt Russel Nelson's code
     to the requirements of a BOOT-Prom
 
   * 6
@@ -92,6 +92,7 @@
 #include "etherboot.h"
 #include "nic.h"
 #include <ipxe/isa.h>
+#include <ipxe/console.h>
 #include "cs89x0.h"
 
 static unsigned short	eth_nic_base;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/cs89x0.h ipxe-1.0.1~lliurex1505/src/drivers/net/cs89x0.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/cs89x0.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/cs89x0.h	2012-01-06 23:49:04.000000000 +0000
@@ -31,8 +31,7 @@
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-   02110-1301, USA. */
+   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
 
 #define PP_ChipID 0x0000	/* offset   0h -> Corp -ID              */
 				/* offset   2h -> Model/Product Number  */
@@ -471,6 +470,9 @@
 #define PNP_CNF_DMA 0x74
 #define PNP_CNF_MEM 0x48
 
+#define BIT0 1
+#define BIT15 0x8000
+
 /*
  * Local variables:
  *  c-basic-offset: 8
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/davicom.c ipxe-1.0.1~lliurex1505/src/drivers/net/davicom.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/davicom.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/davicom.c	2012-01-06 23:49:04.000000000 +0000
@@ -213,11 +213,11 @@
  phy_write_1bit(io_dcr9, PHY_DATA_1);
  phy_write_1bit(io_dcr9, PHY_DATA_0);
 
- /* Send Phy address */
+ /* Send Phy addres */
  for (i=0x10; i>0; i=i>>1)
      phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
    
- /* Send register address */
+ /* Send register addres */
  for (i=0x10; i>0; i=i>>1)
      phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);
 
@@ -257,11 +257,11 @@
  phy_write_1bit(io_dcr9, PHY_DATA_0);
  phy_write_1bit(io_dcr9, PHY_DATA_1);
 
- /* Send Phy address */
+ /* Send Phy addres */
  for (i=0x10; i>0; i=i>>1)
    phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
 
- /* Send register address */
+ /* Send register addres */
  for (i=0x10; i>0; i=i>>1)
    phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/depca.c ipxe-1.0.1~lliurex1505/src/drivers/net/depca.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/depca.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/depca.c	2012-01-06 23:49:04.000000000 +0000
@@ -240,6 +240,7 @@
 #include "etherboot.h"
 #include "nic.h"
 #include <ipxe/isa.h>
+#include <ipxe/console.h>
 #include <ipxe/ethernet.h>
 
 /*
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/dmfe.c ipxe-1.0.1~lliurex1505/src/drivers/net/dmfe.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/dmfe.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/dmfe.c	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code based on:
 *
@@ -261,15 +260,15 @@
 		db->cr0_data = 0;
 		db->dm910x_chk_mode = 1;	/* Enter the check mode */
 	}
-	/* Initialize DM910X board */
+	/* Initilize DM910X board */
 	dmfe_init_dm910x(nic);
 
 	return;
 }
 
-/*	Initialize DM910X board
+/*	Initilize DM910X board
  *	Reset DM910X board
- *	Initialize TX/Rx descriptor chain structure
+ *	Initilize TX/Rx descriptor chain structure
  *	Send the set-up frame
  *	Enable Tx/Rx machine
  */
@@ -307,7 +306,7 @@
 	if (!(db->media_mode & DMFE_AUTO))
 		db->op_mode = db->media_mode;	/* Force Mode */
 
-	/* Initiliaze Transmit/Receive descriptor and CR3/4 */
+	/* Initiliaze Transmit/Receive decriptor and CR3/4 */
 	dmfe_descriptor_init(nic, ioaddr);
 
 	/* tx descriptor start pointer */
@@ -572,7 +571,7 @@
 
 /*
  *	Send a setup frame for DM9132
- *	This setup frame initialize DM910X address filter mode
+ *	This setup frame initilize DM910X addres filter mode
 */
 
 static void dm9132_id_table(struct nic *nic __unused)
@@ -623,7 +622,7 @@
 
 /*
  *	Send a setup frame for DM9102/DM9102A
- *	This setup frame initialize DM910X address filter mode
+ *	This setup frame initilize DM910X addres filter mode
  */
 
 static void send_filter_frame(struct nic *nic)
@@ -903,13 +902,13 @@
 		phy_write_1bit(ioaddr, PHY_DATA_0);
 		phy_write_1bit(ioaddr, PHY_DATA_1);
 
-		/* Send Phy address */
+		/* Send Phy addres */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr,
 				       phy_addr & i ? PHY_DATA_1 :
 				       PHY_DATA_0);
 
-		/* Send register address */
+		/* Send register addres */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr,
 				       offset & i ? PHY_DATA_1 :
@@ -959,13 +958,13 @@
 		phy_write_1bit(ioaddr, PHY_DATA_1);
 		phy_write_1bit(ioaddr, PHY_DATA_0);
 
-		/* Send Phy address */
+		/* Send Phy addres */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr,
 				       phy_addr & i ? PHY_DATA_1 :
 				       PHY_DATA_0);
 
-		/* Send register address */
+		/* Send register addres */
 		for (i = 0x10; i > 0; i = i >> 1)
 			phy_write_1bit(ioaddr,
 				       offset & i ? PHY_DATA_1 :
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82540.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82540.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82540.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82540.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,754 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82540EM Gigabit Ethernet Controller
+ * 82540EP Gigabit Ethernet Controller
+ * 82545EM Gigabit Ethernet Controller (Copper)
+ * 82545EM Gigabit Ethernet Controller (Fiber)
+ * 82545GM Gigabit Ethernet Controller
+ * 82546EB Gigabit Ethernet Controller (Copper)
+ * 82546EB Gigabit Ethernet Controller (Fiber)
+ * 82546GB Gigabit Ethernet Controller
+ */
+
+#include "e1000_api.h"
+
+static s32  e1000_init_phy_params_82540(struct e1000_hw *hw);
+static s32  e1000_init_nvm_params_82540(struct e1000_hw *hw);
+static s32  e1000_init_mac_params_82540(struct e1000_hw *hw);
+static s32  e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw);
+static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw);
+static s32  e1000_init_hw_82540(struct e1000_hw *hw);
+static s32  e1000_reset_hw_82540(struct e1000_hw *hw);
+static s32  e1000_set_phy_mode_82540(struct e1000_hw *hw);
+static s32  e1000_set_vco_speed_82540(struct e1000_hw *hw);
+static s32  e1000_setup_copper_link_82540(struct e1000_hw *hw);
+static s32  e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw);
+static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw);
+static s32  e1000_read_mac_addr_82540(struct e1000_hw *hw);
+
+/**
+ * e1000_init_phy_params_82540 - Init PHY func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_phy_params_82540(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	phy->addr                      = 1;
+	phy->autoneg_mask              = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us            = 10000;
+	phy->type                      = e1000_phy_m88;
+
+	/* Function Pointers */
+	phy->ops.check_polarity        = e1000_check_polarity_m88;
+	phy->ops.commit                = e1000_phy_sw_reset_generic;
+#if 0
+	phy->ops.force_speed_duplex    = e1000_phy_force_speed_duplex_m88;
+#endif
+#if 0
+	phy->ops.get_cable_length      = e1000_get_cable_length_m88;
+#endif
+	phy->ops.get_cfg_done          = e1000_get_cfg_done_generic;
+	phy->ops.read_reg              = e1000_read_phy_reg_m88;
+	phy->ops.reset                 = e1000_phy_hw_reset_generic;
+	phy->ops.write_reg             = e1000_write_phy_reg_m88;
+	phy->ops.get_info              = e1000_get_phy_info_m88;
+	phy->ops.power_up              = e1000_power_up_phy_copper;
+	phy->ops.power_down            = e1000_power_down_phy_copper_82540;
+
+	ret_val = e1000_get_phy_id(hw);
+	if (ret_val)
+		goto out;
+
+	/* Verify phy id */
+	switch (hw->mac.type) {
+	case e1000_82540:
+	case e1000_82545:
+	case e1000_82545_rev_3:
+	case e1000_82546:
+	case e1000_82546_rev_3:
+		if (phy->id == M88E1011_I_PHY_ID)
+			break;
+		/* Fall Through */
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+		break;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_init_nvm_params_82540 - Init NVM func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_nvm_params_82540(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	DEBUGFUNC("e1000_init_nvm_params_82540");
+
+	nvm->type               = e1000_nvm_eeprom_microwire;
+	nvm->delay_usec         = 50;
+	nvm->opcode_bits        = 3;
+	switch (nvm->override) {
+	case e1000_nvm_override_microwire_large:
+		nvm->address_bits       = 8;
+		nvm->word_size          = 256;
+		break;
+	case e1000_nvm_override_microwire_small:
+		nvm->address_bits       = 6;
+		nvm->word_size          = 64;
+		break;
+	default:
+		nvm->address_bits       = eecd & E1000_EECD_SIZE ? 8 : 6;
+		nvm->word_size          = eecd & E1000_EECD_SIZE ? 256 : 64;
+		break;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire            = e1000_acquire_nvm_generic;
+	nvm->ops.read               = e1000_read_nvm_microwire;
+	nvm->ops.release            = e1000_release_nvm_generic;
+	nvm->ops.update             = e1000_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default  = e1000_valid_led_default_generic;
+	nvm->ops.validate           = e1000_validate_nvm_checksum_generic;
+	nvm->ops.write              = e1000_write_nvm_microwire;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ * e1000_init_mac_params_82540 - Init MAC func ptrs.
+ * @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_mac_params_82540(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_init_mac_params_82540");
+
+	/* Set media type */
+	switch (hw->device_id) {
+	case E1000_DEV_ID_82545EM_FIBER:
+	case E1000_DEV_ID_82545GM_FIBER:
+	case E1000_DEV_ID_82546EB_FIBER:
+	case E1000_DEV_ID_82546GB_FIBER:
+		hw->phy.media_type = e1000_media_type_fiber;
+		break;
+	case E1000_DEV_ID_82545GM_SERDES:
+	case E1000_DEV_ID_82546GB_SERDES:
+		hw->phy.media_type = e1000_media_type_internal_serdes;
+		break;
+	default:
+		hw->phy.media_type = e1000_media_type_copper;
+		break;
+	}
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000_get_bus_info_pci_generic;
+	/* function id */
+	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci;
+	/* reset */
+	mac->ops.reset_hw = e1000_reset_hw_82540;
+	/* hw initialization */
+	mac->ops.init_hw = e1000_init_hw_82540;
+	/* link setup */
+	mac->ops.setup_link = e1000_setup_link_generic;
+	/* physical interface setup */
+	mac->ops.setup_physical_interface =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000_setup_copper_link_82540
+	                : e1000_setup_fiber_serdes_link_82540;
+	/* check for link */
+	switch (hw->phy.media_type) {
+	case e1000_media_type_copper:
+		mac->ops.check_for_link = e1000_check_for_copper_link_generic;
+		break;
+	case e1000_media_type_fiber:
+		mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
+		break;
+	case e1000_media_type_internal_serdes:
+		mac->ops.check_for_link = e1000_check_for_serdes_link_generic;
+		break;
+	default:
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+	/* link info */
+	mac->ops.get_link_up_info =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000_get_speed_and_duplex_copper_generic
+	                : e1000_get_speed_and_duplex_fiber_serdes_generic;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000_clear_vfta_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000_mta_set_generic;
+	/* read mac address */
+	mac->ops.read_mac_addr = e1000_read_mac_addr_82540;
+	/* ID LED init */
+	mac->ops.id_led_init = e1000_id_led_init_generic;
+	/* setup LED */
+	mac->ops.setup_led = e1000_setup_led_generic;
+	/* cleanup LED */
+	mac->ops.cleanup_led = e1000_cleanup_led_generic;
+	/* turn on/off LED */
+	mac->ops.led_on = e1000_led_on_generic;
+	mac->ops.led_off = e1000_led_off_generic;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82540;
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_init_function_pointers_82540 - Init func ptrs.
+ * @hw: pointer to the HW structure
+ *
+ * Called to initialize all function pointers and parameters.
+ **/
+void e1000_init_function_pointers_82540(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_init_function_pointers_82540");
+
+	hw->mac.ops.init_params = e1000_init_mac_params_82540;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82540;
+	hw->phy.ops.init_params = e1000_init_phy_params_82540;
+}
+
+/**
+ *  e1000_reset_hw_82540 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 e1000_reset_hw_82540(struct e1000_hw *hw)
+{
+	u32 ctrl, manc;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_reset_hw_82540");
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	/*
+	 * Delay to allow any outstanding PCI transactions to complete
+	 * before resetting the device.
+	 */
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGOUT("Issuing a global reset to 82540/82545/82546 MAC\n");
+	switch (hw->mac.type) {
+	case e1000_82545_rev_3:
+	case e1000_82546_rev_3:
+		E1000_WRITE_REG(hw, E1000_CTRL_DUP, ctrl | E1000_CTRL_RST);
+		break;
+	default:
+		/*
+		 * These controllers can't ack the 64-bit write when
+		 * issuing the reset, so we use IO-mapping as a
+		 * workaround to issue the reset.
+		 */
+		E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+		break;
+	}
+
+	/* Wait for EEPROM reload */
+	msec_delay(5);
+
+	/* Disable HW ARPs on ASF enabled adapters */
+	manc = E1000_READ_REG(hw, E1000_MANC);
+	manc &= ~E1000_MANC_ARP_EN;
+	E1000_WRITE_REG(hw, E1000_MANC, manc);
+
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+	E1000_READ_REG(hw, E1000_ICR);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_init_hw_82540 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 e1000_init_hw_82540(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 txdctl, ctrl_ext;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i;
+
+	DEBUGFUNC("e1000_init_hw_82540");
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val) {
+		DEBUGOUT("Error initializing identification LED\n");
+		/* This is not fatal and we should not stop init due to this */
+	}
+
+	/* Disabling VLAN filtering */
+	DEBUGOUT("Initializing the IEEE VLAN\n");
+	if (mac->type < e1000_82545_rev_3)
+		E1000_WRITE_REG(hw, E1000_VET, 0);
+
+	mac->ops.clear_vfta(hw);
+
+	/* Setup the receive address. */
+	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++) {
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+		/*
+		 * Avoid back to back register writes by adding the register
+		 * read (flush).  This is to protect against some strange
+		 * bridge configurations that may issue Memory Write Block
+		 * (MWB) to our register space.  The *_rev_3 hardware at
+		 * least doesn't respond correctly to every other dword in an
+		 * MWB to our register space.
+		 */
+		E1000_WRITE_FLUSH(hw);
+	}
+
+	if (mac->type < e1000_82545_rev_3)
+		e1000_pcix_mmrbc_workaround_generic(hw);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
+	txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
+	         E1000_TXDCTL_FULL_TX_DESC_WB;
+	E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_82540(hw);
+
+	if ((hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER) ||
+	    (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3)) {
+		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+		/*
+		 * Relaxed ordering must be disabled to avoid a parity
+		 * error crash in a PCI slot.
+		 */
+		ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
+		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_copper_link_82540 - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+static s32 e1000_setup_copper_link_82540(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	DEBUGFUNC("e1000_setup_copper_link_82540");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	ret_val = e1000_set_phy_mode_82540(hw);
+	if (ret_val)
+		goto out;
+
+	if (hw->mac.type == e1000_82545_rev_3 ||
+	    hw->mac.type == e1000_82546_rev_3) {
+		ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &data);
+		if (ret_val)
+			goto out;
+		data |= 0x00000008;
+		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, data);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000_copper_link_setup_m88(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_setup_copper_link_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_fiber_serdes_link_82540 - Setup link for fiber/serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Set the output amplitude to the value in the EEPROM and adjust the VCO
+ *  speed to improve Bit Error Rate (BER) performance.  Configures collision
+ *  distance and flow control for fiber and serdes links.  Upon successful
+ *  setup, poll for link.
+ **/
+static s32 e1000_setup_fiber_serdes_link_82540(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_setup_fiber_serdes_link_82540");
+
+	switch (mac->type) {
+	case e1000_82545_rev_3:
+	case e1000_82546_rev_3:
+		if (hw->phy.media_type == e1000_media_type_internal_serdes) {
+			/*
+			 * If we're on serdes media, adjust the output
+			 * amplitude to value set in the EEPROM.
+			 */
+			ret_val = e1000_adjust_serdes_amplitude_82540(hw);
+			if (ret_val)
+				goto out;
+		}
+		/* Adjust VCO speed to improve BER performance */
+		ret_val = e1000_set_vco_speed_82540(hw);
+		if (ret_val)
+			goto out;
+	default:
+		break;
+	}
+
+	ret_val = e1000_setup_fiber_serdes_link_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_adjust_serdes_amplitude_82540 - Adjust amplitude based on EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Adjust the SERDES output amplitude based on the EEPROM settings.
+ **/
+static s32 e1000_adjust_serdes_amplitude_82540(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 nvm_data;
+
+	DEBUGFUNC("e1000_adjust_serdes_amplitude_82540");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_SERDES_AMPLITUDE, 1, &nvm_data);
+	if (ret_val)
+		goto out;
+
+	if (nvm_data != NVM_RESERVED_WORD) {
+		/* Adjust serdes output amplitude only. */
+		nvm_data &= NVM_SERDES_AMPLITUDE_MASK;
+		ret_val = hw->phy.ops.write_reg(hw,
+		                             M88E1000_PHY_EXT_CTRL,
+		                             nvm_data);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_set_vco_speed_82540 - Set VCO speed for better performance
+ *  @hw: pointer to the HW structure
+ *
+ *  Set the VCO speed to improve Bit Error Rate (BER) performance.
+ **/
+static s32 e1000_set_vco_speed_82540(struct e1000_hw *hw)
+{
+	s32  ret_val = E1000_SUCCESS;
+	u16 default_page = 0;
+	u16 phy_data;
+
+	DEBUGFUNC("e1000_set_vco_speed_82540");
+
+	/* Set PHY register 30, page 5, bit 8 to 0 */
+
+	ret_val = hw->phy.ops.read_reg(hw,
+	                            M88E1000_PHY_PAGE_SELECT,
+	                            &default_page);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~M88E1000_PHY_VCO_REG_BIT8;
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/* Set PHY register 30, page 4, bit 11 to 1 */
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_GEN_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PHY_VCO_REG_BIT11;
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
+	                              default_page);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_set_phy_mode_82540 - Set PHY to class A mode
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the PHY to class A mode and assumes the following operations will
+ *  follow to enable the new class mode:
+ *    1.  Do a PHY soft reset.
+ *    2.  Restart auto-negotiation or force link.
+ **/
+static s32 e1000_set_phy_mode_82540(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 nvm_data;
+
+	DEBUGFUNC("e1000_set_phy_mode_82540");
+
+	if (hw->mac.type != e1000_82545_rev_3)
+		goto out;
+
+	ret_val = hw->nvm.ops.read(hw, NVM_PHY_CLASS_WORD, 1, &nvm_data);
+	if (ret_val) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+	if ((nvm_data != NVM_RESERVED_WORD) && (nvm_data & NVM_PHY_CLASS_A)) {
+		ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT,
+		                              0x000B);
+		if (ret_val) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+		ret_val = hw->phy.ops.write_reg(hw,
+		                              M88E1000_PHY_GEN_CONTROL,
+		                              0x8104);
+		if (ret_val) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+
+		phy->reset_disable = false;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_power_down_phy_copper_82540 - Remove link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void e1000_power_down_phy_copper_82540(struct e1000_hw *hw)
+{
+	/* If the management interface is not enabled, then power down */
+	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))
+		e1000_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000_clear_hw_cntrs_82540 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000_clear_hw_cntrs_82540(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_clear_hw_cntrs_82540");
+
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+#if 0
+	E1000_READ_REG(hw, E1000_PRC64);
+	E1000_READ_REG(hw, E1000_PRC127);
+	E1000_READ_REG(hw, E1000_PRC255);
+	E1000_READ_REG(hw, E1000_PRC511);
+	E1000_READ_REG(hw, E1000_PRC1023);
+	E1000_READ_REG(hw, E1000_PRC1522);
+	E1000_READ_REG(hw, E1000_PTC64);
+	E1000_READ_REG(hw, E1000_PTC127);
+	E1000_READ_REG(hw, E1000_PTC255);
+	E1000_READ_REG(hw, E1000_PTC511);
+	E1000_READ_REG(hw, E1000_PTC1023);
+	E1000_READ_REG(hw, E1000_PTC1522);
+
+	E1000_READ_REG(hw, E1000_ALGNERRC);
+	E1000_READ_REG(hw, E1000_RXERRC);
+	E1000_READ_REG(hw, E1000_TNCRS);
+	E1000_READ_REG(hw, E1000_CEXTERR);
+	E1000_READ_REG(hw, E1000_TSCTC);
+	E1000_READ_REG(hw, E1000_TSCTFC);
+
+	E1000_READ_REG(hw, E1000_MGTPRC);
+	E1000_READ_REG(hw, E1000_MGTPDC);
+	E1000_READ_REG(hw, E1000_MGTPTC);
+#endif
+}
+
+/**
+ *  e1000_read_mac_addr_82540 - Read device MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the device MAC address from the EEPROM and stores the value.
+ *  Since devices with two ports use the same EEPROM, we increment the
+ *  last bit in the MAC address for the second port.
+ *
+ *  This version is being used over generic because of customer issues
+ *  with VmWare and Virtual Box when using generic. It seems in
+ *  the emulated 82545, RAR[0] does NOT have a valid address after a
+ *  reset, this older method works and using this breaks nothing for
+ *  these legacy adapters.
+ **/
+s32 e1000_read_mac_addr_82540(struct e1000_hw *hw)
+{
+	s32  ret_val = E1000_SUCCESS;
+	u16 offset, nvm_data, i;
+
+	DEBUGFUNC("e1000_read_mac_addr");
+
+	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+		offset = i >> 1;
+		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			goto out;
+		}
+		hw->mac.perm_addr[i] = (u8)(nvm_data & 0xFF);
+		hw->mac.perm_addr[i+1] = (u8)(nvm_data >> 8);
+	}
+
+	/* Flip last bit of mac address if we're on second port */
+	if (hw->bus.func == E1000_FUNC_1)
+		hw->mac.perm_addr[5] ^= 1;
+
+	for (i = 0; i < ETH_ADDR_LEN; i++)
+		hw->mac.addr[i] = hw->mac.perm_addr[i];
+
+out:
+	return ret_val;
+}
+
+static struct pci_device_id e1000_82540_nics[] = {
+     PCI_ROM(0x8086, 0x100E, "E1000_DEV_ID_82540EM", "E1000_DEV_ID_82540EM", e1000_82540),
+     PCI_ROM(0x8086, 0x1015, "E1000_DEV_ID_82540EM_LOM", "E1000_DEV_ID_82540EM_LOM", e1000_82540),
+     PCI_ROM(0x8086, 0x1016, "E1000_DEV_ID_82540EP_LOM", "E1000_DEV_ID_82540EP_LOM", e1000_82540),
+     PCI_ROM(0x8086, 0x1017, "E1000_DEV_ID_82540EP", "E1000_DEV_ID_82540EP", e1000_82540),
+     PCI_ROM(0x8086, 0x101E, "E1000_DEV_ID_82540EP_LP", "E1000_DEV_ID_82540EP_LP", e1000_82540),
+     PCI_ROM(0x8086, 0x100F, "E1000_DEV_ID_82545EM_COPPER", "E1000_DEV_ID_82545EM_COPPER", e1000_82545),
+     PCI_ROM(0x8086, 0x1011, "E1000_DEV_ID_82545EM_FIBER", "E1000_DEV_ID_82545EM_FIBER", e1000_82545),
+     PCI_ROM(0x8086, 0x1026, "E1000_DEV_ID_82545GM_COPPER", "E1000_DEV_ID_82545GM_COPPER", e1000_82545_rev_3),
+     PCI_ROM(0x8086, 0x1027, "E1000_DEV_ID_82545GM_FIBER", "E1000_DEV_ID_82545GM_FIBER", e1000_82545_rev_3),
+     PCI_ROM(0x8086, 0x1028, "E1000_DEV_ID_82545GM_SERDES", "E1000_DEV_ID_82545GM_SERDES", e1000_82545_rev_3),
+     PCI_ROM(0x8086, 0x1010, "E1000_DEV_ID_82546EB_COPPER", "E1000_DEV_ID_82546EB_COPPER", e1000_82546),
+     PCI_ROM(0x8086, 0x1012, "E1000_DEV_ID_82546EB_FIBER", "E1000_DEV_ID_82546EB_FIBER", e1000_82546),
+     PCI_ROM(0x8086, 0x101D, "E1000_DEV_ID_82546EB_QUAD_COPPER", "E1000_DEV_ID_82546EB_QUAD_COPPER", e1000_82546),
+     PCI_ROM(0x8086, 0x1079, "E1000_DEV_ID_82546GB_COPPER", "E1000_DEV_ID_82546GB_COPPER", e1000_82546_rev_3),
+     PCI_ROM(0x8086, 0x107A, "E1000_DEV_ID_82546GB_FIBER", "E1000_DEV_ID_82546GB_FIBER", e1000_82546_rev_3),
+     PCI_ROM(0x8086, 0x107B, "E1000_DEV_ID_82546GB_SERDES", "E1000_DEV_ID_82546GB_SERDES", e1000_82546_rev_3),
+     PCI_ROM(0x8086, 0x108A, "E1000_DEV_ID_82546GB_PCIE", "E1000_DEV_ID_82546GB_PCIE", e1000_82546_rev_3),
+     PCI_ROM(0x8086, 0x1099, "E1000_DEV_ID_82546GB_QUAD_COPPER", "E1000_DEV_ID_82546GB_QUAD_COPPER", e1000_82546_rev_3),
+     PCI_ROM(0x8086, 0x10B5, "E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3", "E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3", e1000_82546_rev_3),
+};
+
+struct pci_driver e1000_82540_driver __pci_driver = {
+	.ids = e1000_82540_nics,
+	.id_count = (sizeof (e1000_82540_nics) / sizeof (e1000_82540_nics[0])),
+	.probe = e1000_probe,
+	.remove = e1000_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82541.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82541.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82541.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82541.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1314 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82541EI Gigabit Ethernet Controller
+ * 82541ER Gigabit Ethernet Controller
+ * 82541GI Gigabit Ethernet Controller
+ * 82541PI Gigabit Ethernet Controller
+ * 82547EI Gigabit Ethernet Controller
+ * 82547GI Gigabit Ethernet Controller
+ */
+
+#include "e1000_api.h"
+
+static s32  e1000_init_phy_params_82541(struct e1000_hw *hw);
+static s32  e1000_init_nvm_params_82541(struct e1000_hw *hw);
+static s32  e1000_init_mac_params_82541(struct e1000_hw *hw);
+static s32  e1000_reset_hw_82541(struct e1000_hw *hw);
+static s32  e1000_init_hw_82541(struct e1000_hw *hw);
+static s32  e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
+                                         u16 *duplex);
+static s32  e1000_phy_hw_reset_82541(struct e1000_hw *hw);
+static s32  e1000_setup_copper_link_82541(struct e1000_hw *hw);
+static s32  e1000_check_for_link_82541(struct e1000_hw *hw);
+#if 0
+static s32  e1000_get_cable_length_igp_82541(struct e1000_hw *hw);
+#endif
+static s32  e1000_set_d3_lplu_state_82541(struct e1000_hw *hw,
+                                          bool active);
+static s32  e1000_setup_led_82541(struct e1000_hw *hw);
+static s32  e1000_cleanup_led_82541(struct e1000_hw *hw);
+static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw);
+#if 0
+static s32  e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
+                                                     bool link_up);
+#endif
+static s32  e1000_phy_init_script_82541(struct e1000_hw *hw);
+static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw);
+
+#if 0
+static const u16 e1000_igp_cable_length_table[] =
+    { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+      5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25,
+      25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40,
+      40, 50, 50, 50, 50, 50, 50, 50, 60, 60, 60, 60, 60, 60, 60, 60,
+      60, 70, 70, 70, 70, 70, 70, 80, 80, 80, 80, 80, 80, 90, 90, 90,
+      90, 90, 90, 90, 90, 90, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100,
+      100, 100, 100, 100, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110,
+      110, 110, 110, 110, 110, 110, 120, 120, 120, 120, 120, 120, 120, 120, 120, 120};
+#define IGP01E1000_AGC_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_igp_cable_length_table) / \
+                 sizeof(e1000_igp_cable_length_table[0]))
+#endif
+/**
+ *  e1000_init_phy_params_82541 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_phy_params_82541(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_init_phy_params_82541");
+
+	phy->addr                      = 1;
+	phy->autoneg_mask              = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us            = 10000;
+	phy->type                      = e1000_phy_igp;
+
+	/* Function Pointers */
+	phy->ops.check_polarity        = e1000_check_polarity_igp;
+#if 0
+	phy->ops.force_speed_duplex    = e1000_phy_force_speed_duplex_igp;
+#endif
+#if 0
+	phy->ops.get_cable_length      = e1000_get_cable_length_igp_82541;
+#endif
+	phy->ops.get_cfg_done          = e1000_get_cfg_done_generic;
+	phy->ops.get_info              = e1000_get_phy_info_igp;
+	phy->ops.read_reg              = e1000_read_phy_reg_igp;
+	phy->ops.reset                 = e1000_phy_hw_reset_82541;
+	phy->ops.set_d3_lplu_state     = e1000_set_d3_lplu_state_82541;
+	phy->ops.write_reg             = e1000_write_phy_reg_igp;
+	phy->ops.power_up              = e1000_power_up_phy_copper;
+	phy->ops.power_down            = e1000_power_down_phy_copper_82541;
+
+	ret_val = e1000_get_phy_id(hw);
+	if (ret_val)
+		goto out;
+
+	/* Verify phy id */
+	if (phy->id != IGP01E1000_I_PHY_ID) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_init_nvm_params_82541 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_nvm_params_82541(struct e1000_hw *hw)
+{
+	struct   e1000_nvm_info *nvm = &hw->nvm;
+	s32  ret_val = E1000_SUCCESS;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
+
+	DEBUGFUNC("e1000_init_nvm_params_82541");
+
+	switch (nvm->override) {
+	case e1000_nvm_override_spi_large:
+		nvm->type = e1000_nvm_eeprom_spi;
+		eecd |= E1000_EECD_ADDR_BITS;
+		break;
+	case e1000_nvm_override_spi_small:
+		nvm->type = e1000_nvm_eeprom_spi;
+		eecd &= ~E1000_EECD_ADDR_BITS;
+		break;
+	case e1000_nvm_override_microwire_large:
+		nvm->type = e1000_nvm_eeprom_microwire;
+		eecd |= E1000_EECD_SIZE;
+		break;
+	case e1000_nvm_override_microwire_small:
+		nvm->type = e1000_nvm_eeprom_microwire;
+		eecd &= ~E1000_EECD_SIZE;
+		break;
+	default:
+		nvm->type = eecd & E1000_EECD_TYPE
+		            ? e1000_nvm_eeprom_spi
+		            : e1000_nvm_eeprom_microwire;
+		break;
+	}
+
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		nvm->address_bits       = (eecd & E1000_EECD_ADDR_BITS)
+		                          ? 16 : 8;
+		nvm->delay_usec         = 1;
+		nvm->opcode_bits        = 8;
+		nvm->page_size          = (eecd & E1000_EECD_ADDR_BITS)
+		                          ? 32 : 8;
+
+		/* Function Pointers */
+		nvm->ops.acquire        = e1000_acquire_nvm_generic;
+		nvm->ops.read           = e1000_read_nvm_spi;
+		nvm->ops.release        = e1000_release_nvm_generic;
+		nvm->ops.update         = e1000_update_nvm_checksum_generic;
+		nvm->ops.valid_led_default = e1000_valid_led_default_generic;
+		nvm->ops.validate       = e1000_validate_nvm_checksum_generic;
+		nvm->ops.write          = e1000_write_nvm_spi;
+
+		/*
+		 * nvm->word_size must be discovered after the pointers
+		 * are set so we can verify the size from the nvm image
+		 * itself.  Temporarily set it to a dummy value so the
+		 * read will work.
+		 */
+		nvm->word_size = 64;
+		ret_val = nvm->ops.read(hw, NVM_CFG, 1, &size);
+		if (ret_val)
+			goto out;
+		size = (size & NVM_SIZE_MASK) >> NVM_SIZE_SHIFT;
+		/*
+		 * if size != 0, it can be added to a constant and become
+		 * the left-shift value to set the word_size.  Otherwise,
+		 * word_size stays at 64.
+		 */
+		if (size) {
+			size += NVM_WORD_SIZE_BASE_SHIFT_82541;
+			nvm->word_size = 1 << size;
+		}
+	} else {
+		nvm->address_bits       = (eecd & E1000_EECD_ADDR_BITS)
+		                          ? 8 : 6;
+		nvm->delay_usec         = 50;
+		nvm->opcode_bits        = 3;
+		nvm->word_size          = (eecd & E1000_EECD_ADDR_BITS)
+		                          ? 256 : 64;
+
+		/* Function Pointers */
+		nvm->ops.acquire        = e1000_acquire_nvm_generic;
+		nvm->ops.read           = e1000_read_nvm_microwire;
+		nvm->ops.release        = e1000_release_nvm_generic;
+		nvm->ops.update         = e1000_update_nvm_checksum_generic;
+		nvm->ops.valid_led_default = e1000_valid_led_default_generic;
+		nvm->ops.validate       = e1000_validate_nvm_checksum_generic;
+		nvm->ops.write          = e1000_write_nvm_microwire;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_init_mac_params_82541 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_mac_params_82541(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("e1000_init_mac_params_82541");
+
+	/* Set media type */
+	hw->phy.media_type = e1000_media_type_copper;
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+
+	/* Function Pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000_get_bus_info_pci_generic;
+	/* function id */
+	mac->ops.set_lan_id = e1000_set_lan_id_single_port;
+	/* reset */
+	mac->ops.reset_hw = e1000_reset_hw_82541;
+	/* hw initialization */
+	mac->ops.init_hw = e1000_init_hw_82541;
+	/* link setup */
+	mac->ops.setup_link = e1000_setup_link_generic;
+	/* physical interface link setup */
+	mac->ops.setup_physical_interface = e1000_setup_copper_link_82541;
+	/* check for link */
+	mac->ops.check_for_link = e1000_check_for_link_82541;
+	/* link info */
+	mac->ops.get_link_up_info = e1000_get_link_up_info_82541;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000_clear_vfta_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000_mta_set_generic;
+	/* ID LED init */
+	mac->ops.id_led_init = e1000_id_led_init_generic;
+	/* setup LED */
+	mac->ops.setup_led = e1000_setup_led_82541;
+	/* cleanup LED */
+	mac->ops.cleanup_led = e1000_cleanup_led_82541;
+	/* turn on/off LED */
+	mac->ops.led_on = e1000_led_on_generic;
+	mac->ops.led_off = e1000_led_off_generic;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82541;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_function_pointers_82541 - Init func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void e1000_init_function_pointers_82541(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_init_function_pointers_82541");
+
+	hw->mac.ops.init_params = e1000_init_mac_params_82541;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82541;
+	hw->phy.ops.init_params = e1000_init_phy_params_82541;
+}
+
+/**
+ *  e1000_reset_hw_82541 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 e1000_reset_hw_82541(struct e1000_hw *hw)
+{
+	u32 ledctl, ctrl, manc;
+
+	DEBUGFUNC("e1000_reset_hw_82541");
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	/*
+	 * Delay to allow any outstanding PCI transactions to complete
+	 * before resetting the device.
+	 */
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/* Must reset the Phy before resetting the MAC */
+	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_PHY_RST));
+		msec_delay(5);
+	}
+
+	DEBUGOUT("Issuing a global reset to 82541/82547 MAC\n");
+	switch (hw->mac.type) {
+	case e1000_82541:
+	case e1000_82541_rev_2:
+		/*
+		 * These controllers can't ack the 64-bit write when
+		 * issuing the reset, so we use IO-mapping as a
+		 * workaround to issue the reset.
+		 */
+		E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+		break;
+	default:
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+		break;
+	}
+
+	/* Wait for NVM reload */
+	msec_delay(20);
+
+	/* Disable HW ARPs on ASF enabled adapters */
+	manc = E1000_READ_REG(hw, E1000_MANC);
+	manc &= ~E1000_MANC_ARP_EN;
+	E1000_WRITE_REG(hw, E1000_MANC, manc);
+
+	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
+		e1000_phy_init_script_82541(hw);
+
+		/* Configure activity LED after Phy reset */
+		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
+		ledctl &= IGP_ACTIVITY_LED_MASK;
+		ledctl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
+		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
+	}
+
+	/* Once again, mask the interrupts */
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
+
+	/* Clear any pending interrupt events. */
+	E1000_READ_REG(hw, E1000_ICR);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_hw_82541 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 e1000_init_hw_82541(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	u32 i, txdctl;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_init_hw_82541");
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val) {
+		DEBUGOUT("Error initializing identification LED\n");
+		/* This is not fatal and we should not stop init due to this */
+	}
+
+	/* Storing the Speed Power Down  value for later use */
+	ret_val = hw->phy.ops.read_reg(hw,
+	                               IGP01E1000_GMII_FIFO,
+	                               &dev_spec->spd_default);
+	if (ret_val)
+		goto out;
+
+	/* Disabling VLAN filtering */
+	DEBUGOUT("Initializing the IEEE VLAN\n");
+	mac->ops.clear_vfta(hw);
+
+	/* Setup the receive address. */
+	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++) {
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+		/*
+		 * Avoid back to back register writes by adding the register
+		 * read (flush).  This is to protect against some strange
+		 * bridge configurations that may issue Memory Write Block
+		 * (MWB) to our register space.
+		 */
+		E1000_WRITE_FLUSH(hw);
+	}
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	txdctl = E1000_READ_REG(hw, E1000_TXDCTL(0));
+	txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
+	         E1000_TXDCTL_FULL_TX_DESC_WB;
+	E1000_WRITE_REG(hw, E1000_TXDCTL(0), txdctl);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_82541(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_get_link_up_info_82541 - Report speed and duplex
+ * @hw: pointer to the HW structure
+ * @speed: pointer to speed buffer
+ * @duplex: pointer to duplex buffer
+ *
+ * Retrieve the current speed and duplex configuration.
+ **/
+static s32 e1000_get_link_up_info_82541(struct e1000_hw *hw, u16 *speed,
+                                        u16 *duplex)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("e1000_get_link_up_info_82541");
+
+	ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, duplex);
+	if (ret_val)
+		goto out;
+
+	if (!phy->speed_downgraded)
+		goto out;
+
+	/*
+	 * IGP01 PHY may advertise full duplex operation after speed
+	 * downgrade even if it is operating at half duplex.
+	 * Here we set the duplex settings to match the duplex in the
+	 * link partner's capabilities.
+	 */
+	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_EXP, &data);
+	if (ret_val)
+		goto out;
+
+	if (!(data & NWAY_ER_LP_NWAY_CAPS)) {
+		*duplex = HALF_DUPLEX;
+	} else {
+		ret_val = phy->ops.read_reg(hw, PHY_LP_ABILITY, &data);
+		if (ret_val)
+			goto out;
+
+		if (*speed == SPEED_100) {
+			if (!(data & NWAY_LPAR_100TX_FD_CAPS))
+				*duplex = HALF_DUPLEX;
+		} else if (*speed == SPEED_10) {
+			if (!(data & NWAY_LPAR_10T_FD_CAPS))
+				*duplex = HALF_DUPLEX;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_hw_reset_82541 - PHY hardware reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify the reset block is not blocking us from resetting.  Acquire
+ *  semaphore (if necessary) and read/set/write the device control reset
+ *  bit in the PHY.  Wait the appropriate delay time for the device to
+ *  reset and release the semaphore (if necessary).
+ **/
+static s32 e1000_phy_hw_reset_82541(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	u32 ledctl;
+
+	DEBUGFUNC("e1000_phy_hw_reset_82541");
+
+	ret_val = e1000_phy_hw_reset_generic(hw);
+	if (ret_val)
+		goto out;
+
+	e1000_phy_init_script_82541(hw);
+
+	if ((hw->mac.type == e1000_82541) || (hw->mac.type == e1000_82547)) {
+		/* Configure activity LED after PHY reset */
+		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
+		ledctl &= IGP_ACTIVITY_LED_MASK;
+		ledctl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
+		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_copper_link_82541 - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+static s32 e1000_setup_copper_link_82541(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	s32  ret_val;
+	u32 ctrl, ledctl;
+
+	DEBUGFUNC("e1000_setup_copper_link_82541");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	hw->phy.reset_disable = false;
+
+	/* Earlier revs of the IGP phy require us to force MDI. */
+	if (hw->mac.type == e1000_82541 || hw->mac.type == e1000_82547) {
+		dev_spec->dsp_config = e1000_dsp_config_disabled;
+		phy->mdix = 1;
+	} else {
+		dev_spec->dsp_config = e1000_dsp_config_enabled;
+	}
+
+	ret_val = e1000_copper_link_setup_igp(hw);
+	if (ret_val)
+		goto out;
+
+	if (hw->mac.autoneg) {
+		if (dev_spec->ffe_config == e1000_ffe_config_active)
+			dev_spec->ffe_config = e1000_ffe_config_enabled;
+	}
+
+	/* Configure activity LED after Phy reset */
+	ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
+	ledctl &= IGP_ACTIVITY_LED_MASK;
+	ledctl |= (IGP_ACTIVITY_LED_ENABLE | IGP_LED3_MODE);
+	E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
+
+	ret_val = e1000_setup_copper_link_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_for_link_82541 - Check/Store link connection
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks the link condition of the adapter and stores the
+ *  results in the hw->mac structure.
+ **/
+static s32 e1000_check_for_link_82541(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("e1000_check_for_link_82541");
+
+	/*
+	 * We only want to go out to the PHY registers to see if Auto-Neg
+	 * has completed and/or if our link status has changed.  The
+	 * get_link_status flag is set upon receiving a Link Status
+	 * Change or Rx Sequence Error interrupt.
+	 */
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/*
+	 * First we want to see if the MII Status Register reports
+	 * link.  If so, then we want to get the current speed/duplex
+	 * of the PHY.
+	 */
+	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		ret_val = -E1000_ERR_CONFIG;
+#if 0
+		ret_val = e1000_config_dsp_after_link_change_82541(hw, false);
+#endif
+		goto out; /* No link detected */
+	}
+
+	mac->get_link_status = false;
+
+	/*
+	 * Check if there was DownShift, must be checked
+	 * immediately after link-up
+	 */
+	e1000_check_downshift_generic(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we simply return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+#if 0
+	ret_val = e1000_config_dsp_after_link_change_82541(hw, true);
+#endif
+
+	/*
+	 * Auto-Neg is enabled.  Auto Speed Detection takes care
+	 * of MAC speed/duplex configuration.  So we only need to
+	 * configure Collision Distance in the MAC.
+	 */
+	e1000_config_collision_dist_generic(hw);
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = e1000_config_fc_after_link_up_generic(hw);
+	if (ret_val) {
+		DEBUGOUT("Error configuring flow control\n");
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000_config_dsp_after_link_change_82541 - Config DSP after link
+ *  @hw: pointer to the HW structure
+ *  @link_up: boolean flag for link up status
+ *
+ *  Return E1000_ERR_PHY when failing to read/write the PHY, else E1000_SUCCESS
+ *  at any other case.
+ *
+ *  82541_rev_2 & 82547_rev_2 have the capability to configure the DSP when a
+ *  gigabit link is achieved to improve link quality.
+ **/
+static s32 e1000_config_dsp_after_link_change_82541(struct e1000_hw *hw,
+                                                    bool link_up)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	s32 ret_val;
+	u32 idle_errs = 0;
+	u16 phy_data, phy_saved_data, speed, duplex, i;
+	u16 ffe_idle_err_timeout = FFE_IDLE_ERR_COUNT_TIMEOUT_20;
+	u16 dsp_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
+	                                           {IGP01E1000_PHY_AGC_PARAM_A,
+	                                            IGP01E1000_PHY_AGC_PARAM_B,
+	                                            IGP01E1000_PHY_AGC_PARAM_C,
+	                                            IGP01E1000_PHY_AGC_PARAM_D};
+
+	DEBUGFUNC("e1000_config_dsp_after_link_change_82541");
+
+	if (link_up) {
+		ret_val = hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
+		if (ret_val) {
+			DEBUGOUT("Error getting link speed and duplex\n");
+			goto out;
+		}
+
+		if (speed != SPEED_1000) {
+			ret_val = E1000_SUCCESS;
+			goto out;
+		}
+
+#if 0
+		ret_val = phy->ops.get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+
+		if ((dev_spec->dsp_config == e1000_dsp_config_enabled) &&
+		    phy->min_cable_length >= 50) {
+
+			for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
+				ret_val = phy->ops.read_reg(hw,
+				                            dsp_reg_array[i],
+				                            &phy_data);
+				if (ret_val)
+					goto out;
+
+				phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX;
+
+				ret_val = phy->ops.write_reg(hw,
+				                             dsp_reg_array[i],
+				                             phy_data);
+				if (ret_val)
+					goto out;
+			}
+			dev_spec->dsp_config = e1000_dsp_config_activated;
+		}
+
+		if ((dev_spec->ffe_config != e1000_ffe_config_enabled) ||
+		    (phy->min_cable_length >= 50)) {
+			ret_val = E1000_SUCCESS;
+			goto out;
+		}
+
+		/* clear previous idle error counts */
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
+		if (ret_val)
+			goto out;
+
+		for (i = 0; i < ffe_idle_err_timeout; i++) {
+			usec_delay(1000);
+			ret_val = phy->ops.read_reg(hw,
+			                            PHY_1000T_STATUS,
+			                            &phy_data);
+			if (ret_val)
+				goto out;
+
+			idle_errs += (phy_data & SR_1000T_IDLE_ERROR_CNT);
+			if (idle_errs > SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT) {
+				dev_spec->ffe_config = e1000_ffe_config_active;
+
+				ret_val = phy->ops.write_reg(hw,
+				                  IGP01E1000_PHY_DSP_FFE,
+				                  IGP01E1000_PHY_DSP_FFE_CM_CP);
+				if (ret_val)
+					goto out;
+				break;
+			}
+
+			if (idle_errs)
+				ffe_idle_err_timeout =
+				                 FFE_IDLE_ERR_COUNT_TIMEOUT_100;
+		}
+	} else {
+		if (dev_spec->dsp_config == e1000_dsp_config_activated) {
+			/*
+			 * Save off the current value of register 0x2F5B
+			 * to be restored at the end of the routines.
+			 */
+			ret_val = phy->ops.read_reg(hw,
+			                            0x2F5B,
+			                            &phy_saved_data);
+			if (ret_val)
+				goto out;
+
+			/* Disable the PHY transmitter */
+			ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
+			if (ret_val)
+				goto out;
+
+			msec_delay_irq(20);
+
+			ret_val = phy->ops.write_reg(hw,
+			                             0x0000,
+			                             IGP01E1000_IEEE_FORCE_GIG);
+			if (ret_val)
+				goto out;
+			for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
+				ret_val = phy->ops.read_reg(hw,
+				                            dsp_reg_array[i],
+				                            &phy_data);
+				if (ret_val)
+					goto out;
+
+				phy_data &= ~IGP01E1000_PHY_EDAC_MU_INDEX;
+				phy_data |= IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS;
+
+				ret_val = phy->ops.write_reg(hw,
+				                             dsp_reg_array[i],
+				                             phy_data);
+				if (ret_val)
+					goto out;
+			}
+
+			ret_val = phy->ops.write_reg(hw,
+			                       0x0000,
+			                       IGP01E1000_IEEE_RESTART_AUTONEG);
+			if (ret_val)
+				goto out;
+
+			msec_delay_irq(20);
+
+			/* Now enable the transmitter */
+			ret_val = phy->ops.write_reg(hw,
+			                             0x2F5B,
+			                             phy_saved_data);
+			if (ret_val)
+				goto out;
+
+			dev_spec->dsp_config = e1000_dsp_config_enabled;
+		}
+
+		if (dev_spec->ffe_config != e1000_ffe_config_active) {
+			ret_val = E1000_SUCCESS;
+			goto out;
+		}
+
+		/*
+		 * Save off the current value of register 0x2F5B
+		 * to be restored at the end of the routines.
+		 */
+		ret_val = phy->ops.read_reg(hw, 0x2F5B, &phy_saved_data);
+		if (ret_val)
+			goto out;
+
+		/* Disable the PHY transmitter */
+		ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003);
+		if (ret_val)
+			goto out;
+
+		msec_delay_irq(20);
+
+		ret_val = phy->ops.write_reg(hw,
+		                             0x0000,
+		                             IGP01E1000_IEEE_FORCE_GIG);
+		if (ret_val)
+			goto out;
+
+		ret_val = phy->ops.write_reg(hw,
+		                             IGP01E1000_PHY_DSP_FFE,
+		                             IGP01E1000_PHY_DSP_FFE_DEFAULT);
+		if (ret_val)
+			goto out;
+
+		ret_val = phy->ops.write_reg(hw,
+		                             0x0000,
+		                             IGP01E1000_IEEE_RESTART_AUTONEG);
+		if (ret_val)
+			goto out;
+
+		msec_delay_irq(20);
+
+		/* Now enable the transmitter */
+		ret_val = phy->ops.write_reg(hw, 0x2F5B, phy_saved_data);
+
+		if (ret_val)
+			goto out;
+
+		dev_spec->ffe_config = e1000_ffe_config_enabled;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  e1000_get_cable_length_igp_82541 - Determine cable length for igp PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  The automatic gain control (agc) normalizes the amplitude of the
+ *  received signal, adjusting for the attenuation produced by the
+ *  cable.  By reading the AGC registers, which represent the
+ *  combination of coarse and fine gain value, the value can be put
+ *  into a lookup table to obtain the approximate cable length
+ *  for each channel.
+ **/
+static s32 e1000_get_cable_length_igp_82541(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, data;
+	u16 cur_agc_value, agc_value = 0;
+	u16 min_agc_value = IGP01E1000_AGC_LENGTH_TABLE_SIZE;
+	u16 agc_reg_array[IGP01E1000_PHY_CHANNEL_NUM] =
+	                                                 {IGP01E1000_PHY_AGC_A,
+	                                                  IGP01E1000_PHY_AGC_B,
+	                                                  IGP01E1000_PHY_AGC_C,
+	                                                  IGP01E1000_PHY_AGC_D};
+
+	DEBUGFUNC("e1000_get_cable_length_igp_82541");
+
+	/* Read the AGC registers for all channels */
+	for (i = 0; i < IGP01E1000_PHY_CHANNEL_NUM; i++) {
+		ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &data);
+		if (ret_val)
+			goto out;
+
+		cur_agc_value = data >> IGP01E1000_AGC_LENGTH_SHIFT;
+
+		/* Bounds checking */
+		if ((cur_agc_value >= IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) ||
+		    (cur_agc_value == 0)) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+
+		agc_value += cur_agc_value;
+
+		if (min_agc_value > cur_agc_value)
+			min_agc_value = cur_agc_value;
+	}
+
+	/* Remove the minimal AGC result for length < 50m */
+	if (agc_value < IGP01E1000_PHY_CHANNEL_NUM * 50) {
+		agc_value -= min_agc_value;
+		/* Average the three remaining channels for the length. */
+		agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1);
+	} else {
+		/* Average the channels for the length. */
+		agc_value /= IGP01E1000_PHY_CHANNEL_NUM;
+	}
+
+	phy->min_cable_length = (e1000_igp_cable_length_table[agc_value] >
+	                         IGP01E1000_AGC_RANGE)
+	                        ? (e1000_igp_cable_length_table[agc_value] -
+	                           IGP01E1000_AGC_RANGE)
+	                        : 0;
+	phy->max_cable_length = e1000_igp_cable_length_table[agc_value] +
+	                        IGP01E1000_AGC_RANGE;
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000_set_d3_lplu_state_82541 - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.
+ **/
+static s32 e1000_set_d3_lplu_state_82541(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("e1000_set_d3_lplu_state_82541");
+
+	switch (hw->mac.type) {
+	case e1000_82541_rev_2:
+	case e1000_82547_rev_2:
+		break;
+	default:
+		ret_val = e1000_set_d3_lplu_state_generic(hw, active);
+		goto out;
+		break;
+	}
+
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_GMII_FIFO, &data);
+	if (ret_val)
+		goto out;
+
+	if (!active) {
+		data &= ~IGP01E1000_GMII_FLEX_SPD;
+		ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	} else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
+	           (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
+	           (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
+		data |= IGP01E1000_GMII_FLEX_SPD;
+		ret_val = phy->ops.write_reg(hw, IGP01E1000_GMII_FIFO, data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = phy->ops.read_reg(hw,
+		                            IGP01E1000_PHY_PORT_CONFIG,
+		                            &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = phy->ops.write_reg(hw,
+		                             IGP01E1000_PHY_PORT_CONFIG,
+		                             data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_led_82541 - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored.
+ **/
+static s32 e1000_setup_led_82541(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_setup_led_82541");
+
+	ret_val = hw->phy.ops.read_reg(hw,
+	                               IGP01E1000_GMII_FIFO,
+	                               &dev_spec->spd_default);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw,
+	                                IGP01E1000_GMII_FIFO,
+	                                (u16)(dev_spec->spd_default &
+	                                        ~IGP01E1000_GMII_SPD));
+	if (ret_val)
+		goto out;
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
+
+out:
+	return ret_val;
+#endif
+        return 0;
+}
+
+/**
+ *  e1000_cleanup_led_82541 - Set LED config to default operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Remove the current LED configuration and set the LED configuration
+ *  to the default value, saved from the EEPROM.
+ **/
+static s32 e1000_cleanup_led_82541(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_cleanup_led_82541");
+
+	ret_val = hw->phy.ops.write_reg(hw,
+	                                IGP01E1000_GMII_FIFO,
+	                                dev_spec->spd_default);
+	if (ret_val)
+		goto out;
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
+
+out:
+	return ret_val;
+#endif
+        return 0;
+}
+
+/**
+ *  e1000_phy_init_script_82541 - Initialize GbE PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes the IGP PHY.
+ **/
+static s32 e1000_phy_init_script_82541(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_82541 *dev_spec = &hw->dev_spec._82541;
+	u32 ret_val;
+	u16 phy_saved_data;
+
+	DEBUGFUNC("e1000_phy_init_script_82541");
+
+	if (!dev_spec->phy_init_script) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/* Delay after phy reset to enable NVM configuration to load */
+	msec_delay(20);
+
+	/*
+	 * Save off the current value of register 0x2F5B to be restored at
+	 * the end of this routine.
+	 */
+	ret_val = hw->phy.ops.read_reg(hw, 0x2F5B, &phy_saved_data);
+
+	/* Disabled the PHY transmitter */
+	hw->phy.ops.write_reg(hw, 0x2F5B, 0x0003);
+
+	msec_delay(20);
+
+	hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
+
+	msec_delay(5);
+
+	switch (hw->mac.type) {
+	case e1000_82541:
+	case e1000_82547:
+		hw->phy.ops.write_reg(hw, 0x1F95, 0x0001);
+
+		hw->phy.ops.write_reg(hw, 0x1F71, 0xBD21);
+
+		hw->phy.ops.write_reg(hw, 0x1F79, 0x0018);
+
+		hw->phy.ops.write_reg(hw, 0x1F30, 0x1600);
+
+		hw->phy.ops.write_reg(hw, 0x1F31, 0x0014);
+
+		hw->phy.ops.write_reg(hw, 0x1F32, 0x161C);
+
+		hw->phy.ops.write_reg(hw, 0x1F94, 0x0003);
+
+		hw->phy.ops.write_reg(hw, 0x1F96, 0x003F);
+
+		hw->phy.ops.write_reg(hw, 0x2010, 0x0008);
+		break;
+	case e1000_82541_rev_2:
+	case e1000_82547_rev_2:
+		hw->phy.ops.write_reg(hw, 0x1F73, 0x0099);
+		break;
+	default:
+		break;
+	}
+
+	hw->phy.ops.write_reg(hw, 0x0000, 0x3300);
+
+	msec_delay(20);
+
+	/* Now enable the transmitter */
+	hw->phy.ops.write_reg(hw, 0x2F5B, phy_saved_data);
+
+	if (hw->mac.type == e1000_82547) {
+		u16 fused, fine, coarse;
+
+		/* Move to analog registers page */
+		hw->phy.ops.read_reg(hw,
+		                  IGP01E1000_ANALOG_SPARE_FUSE_STATUS,
+		                  &fused);
+
+		if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) {
+			hw->phy.ops.read_reg(hw,
+			                  IGP01E1000_ANALOG_FUSE_STATUS,
+			                  &fused);
+
+			fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK;
+			coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK;
+
+			if (coarse > IGP01E1000_ANALOG_FUSE_COARSE_THRESH) {
+				coarse -= IGP01E1000_ANALOG_FUSE_COARSE_10;
+				fine -= IGP01E1000_ANALOG_FUSE_FINE_1;
+			} else if (coarse ==
+			           IGP01E1000_ANALOG_FUSE_COARSE_THRESH)
+				fine -= IGP01E1000_ANALOG_FUSE_FINE_10;
+
+			fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) |
+			        (fine & IGP01E1000_ANALOG_FUSE_FINE_MASK) |
+			        (coarse & IGP01E1000_ANALOG_FUSE_COARSE_MASK);
+
+			hw->phy.ops.write_reg(hw,
+			                   IGP01E1000_ANALOG_FUSE_CONTROL,
+			                   fused);
+			hw->phy.ops.write_reg(hw,
+			              IGP01E1000_ANALOG_FUSE_BYPASS,
+			              IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_power_down_phy_copper_82541 - Remove link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void e1000_power_down_phy_copper_82541(struct e1000_hw *hw)
+{
+	/* If the management interface is not enabled, then power down */
+	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_SMBUS_EN))
+		e1000_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000_clear_hw_cntrs_82541 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000_clear_hw_cntrs_82541(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_clear_hw_cntrs_82541");
+
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+#if 0
+	E1000_READ_REG(hw, E1000_PRC64);
+	E1000_READ_REG(hw, E1000_PRC127);
+	E1000_READ_REG(hw, E1000_PRC255);
+	E1000_READ_REG(hw, E1000_PRC511);
+	E1000_READ_REG(hw, E1000_PRC1023);
+	E1000_READ_REG(hw, E1000_PRC1522);
+	E1000_READ_REG(hw, E1000_PTC64);
+	E1000_READ_REG(hw, E1000_PTC127);
+	E1000_READ_REG(hw, E1000_PTC255);
+	E1000_READ_REG(hw, E1000_PTC511);
+	E1000_READ_REG(hw, E1000_PTC1023);
+	E1000_READ_REG(hw, E1000_PTC1522);
+
+	E1000_READ_REG(hw, E1000_ALGNERRC);
+	E1000_READ_REG(hw, E1000_RXERRC);
+	E1000_READ_REG(hw, E1000_TNCRS);
+	E1000_READ_REG(hw, E1000_CEXTERR);
+	E1000_READ_REG(hw, E1000_TSCTC);
+	E1000_READ_REG(hw, E1000_TSCTFC);
+
+	E1000_READ_REG(hw, E1000_MGTPRC);
+	E1000_READ_REG(hw, E1000_MGTPDC);
+	E1000_READ_REG(hw, E1000_MGTPTC);
+#endif
+}
+
+static struct pci_device_id e1000_82541_nics[] = {
+     PCI_ROM(0x8086, 0x1013, "E1000_DEV_ID_82541EI", "E1000_DEV_ID_82541EI", e1000_82541),
+     PCI_ROM(0x8086, 0x1014, "E1000_DEV_ID_82541ER_LOM", "E1000_DEV_ID_82541ER_LOM", e1000_82541),
+     PCI_ROM(0x8086, 0x1018, "E1000_DEV_ID_82541EI_MOBILE", "E1000_DEV_ID_82541EI_MOBILE", e1000_82541),
+     PCI_ROM(0x8086, 0x1019, "E1000_DEV_ID_82547EI", "E1000_DEV_ID_82547EI", e1000_82547),
+     PCI_ROM(0x8086, 0x101A, "E1000_DEV_ID_82547EI_MOBILE", "E1000_DEV_ID_82547EI_MOBILE", e1000_82547),
+     PCI_ROM(0x8086, 0x1075, "E1000_DEV_ID_82547GI", "E1000_DEV_ID_82547GI", e1000_82547_rev_2),
+     PCI_ROM(0x8086, 0x1076, "E1000_DEV_ID_82541GI", "E1000_DEV_ID_82541GI", e1000_82541_rev_2),
+     PCI_ROM(0x8086, 0x1077, "E1000_DEV_ID_82541GI_MOBILE", "E1000_DEV_ID_82541GI_MOBILE", e1000_82541_rev_2),
+     PCI_ROM(0x8086, 0x1078, "E1000_DEV_ID_82541ER", "E1000_DEV_ID_82541ER", e1000_82541_rev_2),
+     PCI_ROM(0x8086, 0x107C, "E1000_DEV_ID_82541GI_LF", "E1000_DEV_ID_82541GI_LF", e1000_82541_rev_2),
+};
+
+struct pci_driver e1000_82541_driver __pci_driver = {
+	.ids = e1000_82541_nics,
+	.id_count = (sizeof (e1000_82541_nics) / sizeof (e1000_82541_nics[0])),
+	.probe = e1000_probe,
+	.remove = e1000_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82541.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82541.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82541.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82541.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,86 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_82541_H_
+#define _E1000_82541_H_
+
+#define NVM_WORD_SIZE_BASE_SHIFT_82541 (NVM_WORD_SIZE_BASE_SHIFT + 1)
+
+#define IGP01E1000_PHY_CHANNEL_NUM                    4
+
+#define IGP01E1000_PHY_AGC_A                     0x1172
+#define IGP01E1000_PHY_AGC_B                     0x1272
+#define IGP01E1000_PHY_AGC_C                     0x1472
+#define IGP01E1000_PHY_AGC_D                     0x1872
+
+#define IGP01E1000_PHY_AGC_PARAM_A               0x1171
+#define IGP01E1000_PHY_AGC_PARAM_B               0x1271
+#define IGP01E1000_PHY_AGC_PARAM_C               0x1471
+#define IGP01E1000_PHY_AGC_PARAM_D               0x1871
+
+#define IGP01E1000_PHY_EDAC_MU_INDEX             0xC000
+#define IGP01E1000_PHY_EDAC_SIGN_EXT_9_BITS      0x8000
+
+#define IGP01E1000_PHY_DSP_RESET                 0x1F33
+
+#define IGP01E1000_PHY_DSP_FFE                   0x1F35
+#define IGP01E1000_PHY_DSP_FFE_CM_CP             0x0069
+#define IGP01E1000_PHY_DSP_FFE_DEFAULT           0x002A
+
+#define IGP01E1000_IEEE_FORCE_GIG                0x0140
+#define IGP01E1000_IEEE_RESTART_AUTONEG          0x3300
+
+#define IGP01E1000_AGC_LENGTH_SHIFT                   7
+#define IGP01E1000_AGC_RANGE                         10
+
+#define FFE_IDLE_ERR_COUNT_TIMEOUT_20                20
+#define FFE_IDLE_ERR_COUNT_TIMEOUT_100              100
+
+#define IGP01E1000_ANALOG_FUSE_STATUS            0x20D0
+#define IGP01E1000_ANALOG_SPARE_FUSE_STATUS      0x20D1
+#define IGP01E1000_ANALOG_FUSE_CONTROL           0x20DC
+#define IGP01E1000_ANALOG_FUSE_BYPASS            0x20DE
+
+#define IGP01E1000_ANALOG_SPARE_FUSE_ENABLED     0x0100
+#define IGP01E1000_ANALOG_FUSE_FINE_MASK         0x0F80
+#define IGP01E1000_ANALOG_FUSE_COARSE_MASK       0x0070
+#define IGP01E1000_ANALOG_FUSE_COARSE_THRESH     0x0040
+#define IGP01E1000_ANALOG_FUSE_COARSE_10         0x0010
+#define IGP01E1000_ANALOG_FUSE_FINE_1            0x0080
+#define IGP01E1000_ANALOG_FUSE_FINE_10           0x0500
+#define IGP01E1000_ANALOG_FUSE_POLY_MASK         0xF000
+#define IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL 0x0002
+
+#define IGP01E1000_MSE_CHANNEL_D                 0x000F
+#define IGP01E1000_MSE_CHANNEL_C                 0x00F0
+#define IGP01E1000_MSE_CHANNEL_B                 0x0F00
+#define IGP01E1000_MSE_CHANNEL_A                 0xF000
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82542.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82542.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82542.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82542.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,571 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82542 Gigabit Ethernet Controller
+ */
+
+#include "e1000_api.h"
+
+static s32  e1000_init_phy_params_82542(struct e1000_hw *hw);
+static s32  e1000_init_nvm_params_82542(struct e1000_hw *hw);
+static s32  e1000_init_mac_params_82542(struct e1000_hw *hw);
+static s32  e1000_get_bus_info_82542(struct e1000_hw *hw);
+static s32  e1000_reset_hw_82542(struct e1000_hw *hw);
+static s32  e1000_init_hw_82542(struct e1000_hw *hw);
+static s32  e1000_setup_link_82542(struct e1000_hw *hw);
+static s32  e1000_led_on_82542(struct e1000_hw *hw);
+static s32  e1000_led_off_82542(struct e1000_hw *hw);
+static void e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index);
+static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw);
+
+/**
+ *  e1000_init_phy_params_82542 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_phy_params_82542(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_init_phy_params_82542");
+
+	phy->type               = e1000_phy_none;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_init_nvm_params_82542 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_nvm_params_82542(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+
+	DEBUGFUNC("e1000_init_nvm_params_82542");
+
+	nvm->address_bits       =  6;
+	nvm->delay_usec         = 50;
+	nvm->opcode_bits        =  3;
+	nvm->type               = e1000_nvm_eeprom_microwire;
+	nvm->word_size          = 64;
+
+	/* Function Pointers */
+	nvm->ops.read           = e1000_read_nvm_microwire;
+	nvm->ops.release        = e1000_stop_nvm;
+	nvm->ops.write          = e1000_write_nvm_microwire;
+	nvm->ops.update         = e1000_update_nvm_checksum_generic;
+	nvm->ops.validate       = e1000_validate_nvm_checksum_generic;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_mac_params_82542 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_mac_params_82542(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("e1000_init_mac_params_82542");
+
+	/* Set media type */
+	hw->phy.media_type = e1000_media_type_fiber;
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000_get_bus_info_82542;
+	/* function id */
+	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci;
+	/* reset */
+	mac->ops.reset_hw = e1000_reset_hw_82542;
+	/* hw initialization */
+	mac->ops.init_hw = e1000_init_hw_82542;
+	/* link setup */
+	mac->ops.setup_link = e1000_setup_link_82542;
+	/* phy/fiber/serdes setup */
+	mac->ops.setup_physical_interface = e1000_setup_fiber_serdes_link_generic;
+	/* check for link */
+	mac->ops.check_for_link = e1000_check_for_fiber_link_generic;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000_clear_vfta_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000_mta_set_generic;
+	/* set RAR */
+	mac->ops.rar_set = e1000_rar_set_82542;
+	/* turn on/off LED */
+	mac->ops.led_on = e1000_led_on_82542;
+	mac->ops.led_off = e1000_led_off_82542;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82542;
+	/* link info */
+	mac->ops.get_link_up_info = e1000_get_speed_and_duplex_fiber_serdes_generic;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_function_pointers_82542 - Init func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void e1000_init_function_pointers_82542(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_init_function_pointers_82542");
+
+	hw->mac.ops.init_params = e1000_init_mac_params_82542;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82542;
+	hw->phy.ops.init_params = e1000_init_phy_params_82542;
+}
+
+/**
+ *  e1000_get_bus_info_82542 - Obtain bus information for adapter
+ *  @hw: pointer to the HW structure
+ *
+ *  This will obtain information about the HW bus for which the
+ *  adapter is attached and stores it in the hw structure.
+ **/
+static s32 e1000_get_bus_info_82542(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_get_bus_info_82542");
+
+	hw->bus.type = e1000_bus_type_pci;
+	hw->bus.speed = e1000_bus_speed_unknown;
+	hw->bus.width = e1000_bus_width_unknown;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_reset_hw_82542 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 e1000_reset_hw_82542(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_reset_hw_82542");
+
+	if (hw->revision_id == E1000_REVISION_2) {
+		DEBUGOUT("Disabling MWI on 82542 rev 2\n");
+		e1000_pci_clear_mwi(hw);
+	}
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	/*
+	 * Delay to allow any outstanding PCI transactions to complete before
+	 * resetting the device
+	 */
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGOUT("Issuing a global reset to 82542/82543 MAC\n");
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+
+	hw->nvm.ops.reload(hw);
+	msec_delay(2);
+
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+	E1000_READ_REG(hw, E1000_ICR);
+
+	if (hw->revision_id == E1000_REVISION_2) {
+		if (bus->pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
+			e1000_pci_set_mwi(hw);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000_init_hw_82542 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 e1000_init_hw_82542(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_dev_spec_82542 *dev_spec = &hw->dev_spec._82542;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl;
+	u16 i;
+
+	DEBUGFUNC("e1000_init_hw_82542");
+
+	/* Disabling VLAN filtering */
+	E1000_WRITE_REG(hw, E1000_VET, 0);
+	mac->ops.clear_vfta(hw);
+
+	/* For 82542 (rev 2.0), disable MWI and put the receiver into reset */
+	if (hw->revision_id == E1000_REVISION_2) {
+		DEBUGOUT("Disabling MWI on 82542 rev 2.0\n");
+		e1000_pci_clear_mwi(hw);
+		E1000_WRITE_REG(hw, E1000_RCTL, E1000_RCTL_RST);
+		E1000_WRITE_FLUSH(hw);
+		msec_delay(5);
+	}
+
+	/* Setup the receive address. */
+	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
+
+	/* For 82542 (rev 2.0), take the receiver out of reset and enable MWI */
+	if (hw->revision_id == E1000_REVISION_2) {
+		E1000_WRITE_REG(hw, E1000_RCTL, 0);
+		E1000_WRITE_FLUSH(hw);
+		msec_delay(1);
+		if (hw->bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
+			e1000_pci_set_mwi(hw);
+	}
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/*
+	 * Set the PCI priority bit correctly in the CTRL register.  This
+	 * determines if the adapter gives priority to receives, or if it
+	 * gives equal priority to transmits and receives.
+	 */
+	if (dev_spec->dma_fairness) {
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);
+	}
+
+	/* Setup link and flow control */
+	ret_val = e1000_setup_link_82542(hw);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_82542(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_link_82542 - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+static s32 e1000_setup_link_82542(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_setup_link_82542");
+
+	ret_val = e1000_set_default_fc_generic(hw);
+	if (ret_val)
+		goto out;
+
+	hw->fc.requested_mode &= ~e1000_fc_tx_pause;
+
+	if (mac->report_tx_early == 1)
+		hw->fc.requested_mode &= ~e1000_fc_rx_pause;
+
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
+
+	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+	                                             hw->fc.current_mode);
+
+	/* Call the necessary subroutine to configure the link. */
+	ret_val = mac->ops.setup_physical_interface(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Initialize the flow control address, type, and PAUSE timer
+	 * registers to their default values.  This is done even if flow
+	 * control is disabled, because it does not hurt anything to
+	 * initialize these registers.
+	 */
+	DEBUGOUT("Initializing Flow Control address, type and timer regs\n");
+
+	E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
+	E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+	E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);
+
+	E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
+
+	ret_val = e1000_set_fc_watermarks_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_led_on_82542 - Turn on SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED on.
+ **/
+static s32 e1000_led_on_82542(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGFUNC("e1000_led_on_82542");
+
+	ctrl |= E1000_CTRL_SWDPIN0;
+	ctrl |= E1000_CTRL_SWDPIO0;
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_led_off_82542 - Turn off SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED off.
+ **/
+static s32 e1000_led_off_82542(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGFUNC("e1000_led_off_82542");
+
+	ctrl &= ~E1000_CTRL_SWDPIN0;
+	ctrl |= E1000_CTRL_SWDPIO0;
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_rar_set_82542 - Set receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: pointer to the receive address
+ *  @index: receive address array register
+ *
+ *  Sets the receive address array register at index to the address passed
+ *  in by addr.
+ **/
+static void e1000_rar_set_82542(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	u32 rar_low, rar_high;
+
+	DEBUGFUNC("e1000_rar_set_82542");
+
+	/*
+	 * HW expects these in little endian so we reverse the byte order
+	 * from network order (big endian) to little endian
+	 */
+	rar_low = ((u32) addr[0] |
+	           ((u32) addr[1] << 8) |
+	           ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+
+	rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
+
+	/* If MAC address zero, no need to set the AV bit */
+	if (rar_low || rar_high)
+		rar_high |= E1000_RAH_AV;
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low);
+	E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);
+}
+
+/**
+ *  e1000_translate_register_82542 - Translate the proper register offset
+ *  @reg: e1000 register to be read
+ *
+ *  Registers in 82542 are located in different offsets than other adapters
+ *  even though they function in the same manner.  This function takes in
+ *  the name of the register to read and returns the correct offset for
+ *  82542 silicon.
+ **/
+u32 e1000_translate_register_82542(u32 reg)
+{
+	/*
+	 * Some of the 82542 registers are located at different
+	 * offsets than they are in newer adapters.
+	 * Despite the difference in location, the registers
+	 * function in the same manner.
+	 */
+	switch (reg) {
+	case E1000_RA:
+		reg = 0x00040;
+		break;
+	case E1000_RDTR:
+		reg = 0x00108;
+		break;
+	case E1000_RDBAL(0):
+		reg = 0x00110;
+		break;
+	case E1000_RDBAH(0):
+		reg = 0x00114;
+		break;
+	case E1000_RDLEN(0):
+		reg = 0x00118;
+		break;
+	case E1000_RDH(0):
+		reg = 0x00120;
+		break;
+	case E1000_RDT(0):
+		reg = 0x00128;
+		break;
+	case E1000_RDBAL(1):
+		reg = 0x00138;
+		break;
+	case E1000_RDBAH(1):
+		reg = 0x0013C;
+		break;
+	case E1000_RDLEN(1):
+		reg = 0x00140;
+		break;
+	case E1000_RDH(1):
+		reg = 0x00148;
+		break;
+	case E1000_RDT(1):
+		reg = 0x00150;
+		break;
+	case E1000_FCRTH:
+		reg = 0x00160;
+		break;
+	case E1000_FCRTL:
+		reg = 0x00168;
+		break;
+	case E1000_MTA:
+		reg = 0x00200;
+		break;
+	case E1000_TDBAL(0):
+		reg = 0x00420;
+		break;
+	case E1000_TDBAH(0):
+		reg = 0x00424;
+		break;
+	case E1000_TDLEN(0):
+		reg = 0x00428;
+		break;
+	case E1000_TDH(0):
+		reg = 0x00430;
+		break;
+	case E1000_TDT(0):
+		reg = 0x00438;
+		break;
+	case E1000_TIDV:
+		reg = 0x00440;
+		break;
+	case E1000_VFTA:
+		reg = 0x00600;
+		break;
+	case E1000_TDFH:
+		reg = 0x08010;
+		break;
+	case E1000_TDFT:
+		reg = 0x08018;
+		break;
+	default:
+		break;
+	}
+
+	return reg;
+}
+
+/**
+ *  e1000_clear_hw_cntrs_82542 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000_clear_hw_cntrs_82542(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_clear_hw_cntrs_82542");
+
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+#if 0
+	E1000_READ_REG(hw, E1000_PRC64);
+	E1000_READ_REG(hw, E1000_PRC127);
+	E1000_READ_REG(hw, E1000_PRC255);
+	E1000_READ_REG(hw, E1000_PRC511);
+	E1000_READ_REG(hw, E1000_PRC1023);
+	E1000_READ_REG(hw, E1000_PRC1522);
+	E1000_READ_REG(hw, E1000_PTC64);
+	E1000_READ_REG(hw, E1000_PTC127);
+	E1000_READ_REG(hw, E1000_PTC255);
+	E1000_READ_REG(hw, E1000_PTC511);
+	E1000_READ_REG(hw, E1000_PTC1023);
+	E1000_READ_REG(hw, E1000_PTC1522);
+#endif
+}
+
+static struct pci_device_id e1000_82542_nics[] = {
+     PCI_ROM(0x8086, 0x1000, "E1000_DEV_ID_82542", "E1000_DEV_ID_82542", e1000_82542),
+};
+
+struct pci_driver e1000_82542_driver __pci_driver = {
+	.ids = e1000_82542_nics,
+	.id_count = (sizeof (e1000_82542_nics) / sizeof (e1000_82542_nics[0])),
+	.probe = e1000_probe,
+	.remove = e1000_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82543.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82543.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82543.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82543.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1635 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82543GC Gigabit Ethernet Controller (Fiber)
+ * 82543GC Gigabit Ethernet Controller (Copper)
+ * 82544EI Gigabit Ethernet Controller (Copper)
+ * 82544EI Gigabit Ethernet Controller (Fiber)
+ * 82544GC Gigabit Ethernet Controller (Copper)
+ * 82544GC Gigabit Ethernet Controller (LOM)
+ */
+
+#include "e1000_api.h"
+
+static s32  e1000_init_phy_params_82543(struct e1000_hw *hw);
+static s32  e1000_init_nvm_params_82543(struct e1000_hw *hw);
+static s32  e1000_init_mac_params_82543(struct e1000_hw *hw);
+static s32  e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset,
+                                     u16 *data);
+static s32  e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset,
+                                      u16 data);
+#if 0
+static s32  e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw);
+#endif
+static s32  e1000_phy_hw_reset_82543(struct e1000_hw *hw);
+static s32  e1000_reset_hw_82543(struct e1000_hw *hw);
+static s32  e1000_init_hw_82543(struct e1000_hw *hw);
+static s32  e1000_setup_link_82543(struct e1000_hw *hw);
+static s32  e1000_setup_copper_link_82543(struct e1000_hw *hw);
+static s32  e1000_setup_fiber_link_82543(struct e1000_hw *hw);
+static s32  e1000_check_for_copper_link_82543(struct e1000_hw *hw);
+static s32  e1000_check_for_fiber_link_82543(struct e1000_hw *hw);
+static s32  e1000_led_on_82543(struct e1000_hw *hw);
+static s32  e1000_led_off_82543(struct e1000_hw *hw);
+static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset,
+                                   u32 value);
+static void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value);
+static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw);
+static s32  e1000_config_mac_to_phy_82543(struct e1000_hw *hw);
+static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw);
+static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
+static s32  e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw);
+static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl);
+static u16  e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw);
+static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
+                                           u16 count);
+static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw);
+static void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw, bool state);
+static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state);
+
+/**
+ *  e1000_init_phy_params_82543 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_phy_params_82543(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_init_phy_params_82543");
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		phy->type               = e1000_phy_none;
+		goto out;
+	} else {
+		phy->ops.power_up       = e1000_power_up_phy_copper;
+		phy->ops.power_down     = e1000_power_down_phy_copper;
+	}
+
+	phy->addr                       = 1;
+	phy->autoneg_mask               = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us             = 10000;
+	phy->type                       = e1000_phy_m88;
+
+	/* Function Pointers */
+	phy->ops.check_polarity         = e1000_check_polarity_m88;
+	phy->ops.commit                 = e1000_phy_sw_reset_generic;
+#if 0
+	phy->ops.force_speed_duplex     = e1000_phy_force_speed_duplex_82543;
+#endif
+#if 0
+	phy->ops.get_cable_length       = e1000_get_cable_length_m88;
+#endif
+	phy->ops.get_cfg_done           = e1000_get_cfg_done_generic;
+	phy->ops.read_reg               = (hw->mac.type == e1000_82543)
+	                                  ? e1000_read_phy_reg_82543
+	                                  : e1000_read_phy_reg_m88;
+	phy->ops.reset                  = (hw->mac.type == e1000_82543)
+	                                  ? e1000_phy_hw_reset_82543
+	                                  : e1000_phy_hw_reset_generic;
+	phy->ops.write_reg              = (hw->mac.type == e1000_82543)
+	                                  ? e1000_write_phy_reg_82543
+	                                  : e1000_write_phy_reg_m88;
+	phy->ops.get_info               = e1000_get_phy_info_m88;
+
+	/*
+	 * The external PHY of the 82543 can be in a funky state.
+	 * Resetting helps us read the PHY registers for acquiring
+	 * the PHY ID.
+	 */
+	if (!e1000_init_phy_disabled_82543(hw)) {
+		ret_val = phy->ops.reset(hw);
+		if (ret_val) {
+			DEBUGOUT("Resetting PHY during init failed.\n");
+			goto out;
+		}
+		msec_delay(20);
+	}
+
+	ret_val = e1000_get_phy_id(hw);
+	if (ret_val)
+		goto out;
+
+	/* Verify phy id */
+	switch (hw->mac.type) {
+	case e1000_82543:
+		if (phy->id != M88E1000_E_PHY_ID) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+		break;
+	case e1000_82544:
+		if (phy->id != M88E1000_I_PHY_ID) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+		break;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_init_nvm_params_82543 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_nvm_params_82543(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+
+	DEBUGFUNC("e1000_init_nvm_params_82543");
+
+	nvm->type               = e1000_nvm_eeprom_microwire;
+	nvm->word_size          = 64;
+	nvm->delay_usec         = 50;
+	nvm->address_bits       =  6;
+	nvm->opcode_bits        =  3;
+
+	/* Function Pointers */
+	nvm->ops.read           = e1000_read_nvm_microwire;
+	nvm->ops.update         = e1000_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = e1000_valid_led_default_generic;
+	nvm->ops.validate       = e1000_validate_nvm_checksum_generic;
+	nvm->ops.write          = e1000_write_nvm_microwire;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_mac_params_82543 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000_init_mac_params_82543(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("e1000_init_mac_params_82543");
+
+	/* Set media type */
+	switch (hw->device_id) {
+	case E1000_DEV_ID_82543GC_FIBER:
+	case E1000_DEV_ID_82544EI_FIBER:
+		hw->phy.media_type = e1000_media_type_fiber;
+		break;
+	default:
+		hw->phy.media_type = e1000_media_type_copper;
+		break;
+	}
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000_get_bus_info_pci_generic;
+	/* function id */
+	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pci;
+	/* reset */
+	mac->ops.reset_hw = e1000_reset_hw_82543;
+	/* hw initialization */
+	mac->ops.init_hw = e1000_init_hw_82543;
+	/* link setup */
+	mac->ops.setup_link = e1000_setup_link_82543;
+	/* physical interface setup */
+	mac->ops.setup_physical_interface =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000_setup_copper_link_82543
+	                : e1000_setup_fiber_link_82543;
+	/* check for link */
+	mac->ops.check_for_link =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000_check_for_copper_link_82543
+	                : e1000_check_for_fiber_link_82543;
+	/* link info */
+	mac->ops.get_link_up_info =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000_get_speed_and_duplex_copper_generic
+	                : e1000_get_speed_and_duplex_fiber_serdes_generic;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000_write_vfta_82543;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000_clear_vfta_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000_mta_set_82543;
+	/* turn on/off LED */
+	mac->ops.led_on = e1000_led_on_82543;
+	mac->ops.led_off = e1000_led_off_82543;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_82543;
+
+	/* Set tbi compatibility */
+	if ((hw->mac.type != e1000_82543) ||
+	    (hw->phy.media_type == e1000_media_type_fiber))
+		e1000_set_tbi_compatibility_82543(hw, false);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_function_pointers_82543 - Init func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void e1000_init_function_pointers_82543(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_init_function_pointers_82543");
+
+	hw->mac.ops.init_params = e1000_init_mac_params_82543;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82543;
+	hw->phy.ops.init_params = e1000_init_phy_params_82543;
+}
+
+/**
+ *  e1000_tbi_compatibility_enabled_82543 - Returns TBI compat status
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns the current status of 10-bit Interface (TBI) compatibility
+ *  (enabled/disabled).
+ **/
+static bool e1000_tbi_compatibility_enabled_82543(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+	bool state = false;
+
+	DEBUGFUNC("e1000_tbi_compatibility_enabled_82543");
+
+	if (hw->mac.type != e1000_82543) {
+		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		goto out;
+	}
+
+	state = (dev_spec->tbi_compatibility & TBI_COMPAT_ENABLED)
+	        ? true : false;
+
+out:
+	return state;
+}
+
+/**
+ *  e1000_set_tbi_compatibility_82543 - Set TBI compatibility
+ *  @hw: pointer to the HW structure
+ *  @state: enable/disable TBI compatibility
+ *
+ *  Enables or disabled 10-bit Interface (TBI) compatibility.
+ **/
+static void e1000_set_tbi_compatibility_82543(struct e1000_hw *hw, bool state)
+{
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+
+	DEBUGFUNC("e1000_set_tbi_compatibility_82543");
+
+	if (hw->mac.type != e1000_82543) {
+		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		goto out;
+	}
+
+	if (state)
+		dev_spec->tbi_compatibility |= TBI_COMPAT_ENABLED;
+	else
+		dev_spec->tbi_compatibility &= ~TBI_COMPAT_ENABLED;
+
+out:
+	return;
+}
+
+/**
+ *  e1000_tbi_sbp_enabled_82543 - Returns TBI SBP status
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns the current status of 10-bit Interface (TBI) store bad packet (SBP)
+ *  (enabled/disabled).
+ **/
+bool e1000_tbi_sbp_enabled_82543(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+	bool state = false;
+
+	DEBUGFUNC("e1000_tbi_sbp_enabled_82543");
+
+	if (hw->mac.type != e1000_82543) {
+		DEBUGOUT("TBI compatibility workaround for 82543 only.\n");
+		goto out;
+	}
+
+	state = (dev_spec->tbi_compatibility & TBI_SBP_ENABLED)
+	        ? true : false;
+
+out:
+	return state;
+}
+
+/**
+ *  e1000_set_tbi_sbp_82543 - Set TBI SBP
+ *  @hw: pointer to the HW structure
+ *  @state: enable/disable TBI store bad packet
+ *
+ *  Enables or disabled 10-bit Interface (TBI) store bad packet (SBP).
+ **/
+static void e1000_set_tbi_sbp_82543(struct e1000_hw *hw, bool state)
+{
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+
+	DEBUGFUNC("e1000_set_tbi_sbp_82543");
+
+	if (state && e1000_tbi_compatibility_enabled_82543(hw))
+		dev_spec->tbi_compatibility |= TBI_SBP_ENABLED;
+	else
+		dev_spec->tbi_compatibility &= ~TBI_SBP_ENABLED;
+
+	return;
+}
+
+/**
+ *  e1000_init_phy_disabled_82543 - Returns init PHY status
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns the current status of whether PHY initialization is disabled.
+ *  True if PHY initialization is disabled else false.
+ **/
+static bool e1000_init_phy_disabled_82543(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+	bool ret_val;
+
+	DEBUGFUNC("e1000_init_phy_disabled_82543");
+
+	if (hw->mac.type != e1000_82543) {
+		ret_val = false;
+		goto out;
+	}
+
+	ret_val = dev_spec->init_phy_disabled;
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000_tbi_adjust_stats_82543 - Adjust stats when TBI enabled
+ *  @hw: pointer to the HW structure
+ *  @stats: Struct containing statistic register values
+ *  @frame_len: The length of the frame in question
+ *  @mac_addr: The Ethernet destination address of the frame in question
+ *  @max_frame_size: The maximum frame size
+ *
+ *  Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
+ **/
+void e1000_tbi_adjust_stats_82543(struct e1000_hw *hw,
+                                  struct e1000_hw_stats *stats, u32 frame_len,
+                                  u8 *mac_addr, u32 max_frame_size)
+{
+	if (!(e1000_tbi_sbp_enabled_82543(hw)))
+		goto out;
+
+	/* First adjust the frame length. */
+	frame_len--;
+	/*
+	 * We need to adjust the statistics counters, since the hardware
+	 * counters overcount this packet as a CRC error and undercount
+	 * the packet as a good packet
+	 */
+	/* This packet should not be counted as a CRC error.    */
+	stats->crcerrs--;
+	/* This packet does count as a Good Packet Received.    */
+	stats->gprc++;
+
+	/* Adjust the Good Octets received counters             */
+	stats->gorc += frame_len;
+
+	/*
+	 * Is this a broadcast or multicast?  Check broadcast first,
+	 * since the test for a multicast frame will test positive on
+	 * a broadcast frame.
+	 */
+	if ((mac_addr[0] == 0xff) && (mac_addr[1] == 0xff))
+		/* Broadcast packet */
+		stats->bprc++;
+	else if (*mac_addr & 0x01)
+		/* Multicast packet */
+		stats->mprc++;
+
+	/*
+	 * In this case, the hardware has overcounted the number of
+	 * oversize frames.
+	 */
+	if ((frame_len == max_frame_size) && (stats->roc > 0))
+		stats->roc--;
+
+	/*
+	 * Adjust the bin counters when the extra byte put the frame in the
+	 * wrong bin. Remember that the frame_len was adjusted above.
+	 */
+	if (frame_len == 64) {
+		stats->prc64++;
+		stats->prc127--;
+	} else if (frame_len == 127) {
+		stats->prc127++;
+		stats->prc255--;
+	} else if (frame_len == 255) {
+		stats->prc255++;
+		stats->prc511--;
+	} else if (frame_len == 511) {
+		stats->prc511++;
+		stats->prc1023--;
+	} else if (frame_len == 1023) {
+		stats->prc1023++;
+		stats->prc1522--;
+	} else if (frame_len == 1522) {
+		stats->prc1522++;
+	}
+
+out:
+	return;
+}
+#endif
+
+/**
+ *  e1000_read_phy_reg_82543 - Read PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY at offset and stores the information read to data.
+ **/
+static s32 e1000_read_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	u32 mdic;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_phy_reg_82543");
+
+	if (offset > MAX_PHY_REG_ADDRESS) {
+		DEBUGOUT1("PHY Address %d is out of range\n", offset);
+		ret_val = -E1000_ERR_PARAM;
+		goto out;
+	}
+
+	/*
+	 * We must first send a preamble through the MDIO pin to signal the
+	 * beginning of an MII instruction.  This is done by sending 32
+	 * consecutive "1" bits.
+	 */
+	e1000_shift_out_mdi_bits_82543(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
+
+	/*
+	 * Now combine the next few fields that are required for a read
+	 * operation.  We use this method instead of calling the
+	 * e1000_shift_out_mdi_bits routine five different times.  The format
+	 * of an MII read instruction consists of a shift out of 14 bits and
+	 * is defined as follows:
+	 * 	<Preamble><SOF><Op Code><Phy Addr><Offset>
+	 * followed by a shift in of 18 bits.  This first two bits shifted in
+	 * are TurnAround bits used to avoid contention on the MDIO pin when a
+	 * READ operation is performed.  These two bits are thrown away
+	 * followed by a shift in of 16 bits which contains the desired data.
+	 */
+	mdic = (offset | (hw->phy.addr << 5) |
+		(PHY_OP_READ << 10) | (PHY_SOF << 12));
+
+	e1000_shift_out_mdi_bits_82543(hw, mdic, 14);
+
+	/*
+	 * Now that we've shifted out the read command to the MII, we need to
+	 * "shift in" the 16-bit value (18 total bits) of the requested PHY
+	 * register address.
+	 */
+	*data = e1000_shift_in_mdi_bits_82543(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_phy_reg_82543 - Write PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be written
+ *  @data: pointer to the data to be written at offset
+ *
+ *  Writes data to the PHY at offset.
+ **/
+static s32 e1000_write_phy_reg_82543(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	u32 mdic;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_phy_reg_82543");
+
+	if (offset > MAX_PHY_REG_ADDRESS) {
+		DEBUGOUT1("PHY Address %d is out of range\n", offset);
+		ret_val = -E1000_ERR_PARAM;
+		goto out;
+	}
+
+	/*
+	 * We'll need to use the SW defined pins to shift the write command
+	 * out to the PHY. We first send a preamble to the PHY to signal the
+	 * beginning of the MII instruction.  This is done by sending 32
+	 * consecutive "1" bits.
+	 */
+	e1000_shift_out_mdi_bits_82543(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE);
+
+	/*
+	 * Now combine the remaining required fields that will indicate a
+	 * write operation. We use this method instead of calling the
+	 * e1000_shift_out_mdi_bits routine for each field in the command. The
+	 * format of a MII write instruction is as follows:
+	 * <Preamble><SOF><Op Code><Phy Addr><Reg Addr><Turnaround><Data>.
+	 */
+	mdic = ((PHY_TURNAROUND) | (offset << 2) | (hw->phy.addr << 7) |
+	        (PHY_OP_WRITE << 12) | (PHY_SOF << 14));
+	mdic <<= 16;
+	mdic |= (u32) data;
+
+	e1000_shift_out_mdi_bits_82543(hw, mdic, 32);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_raise_mdi_clk_82543 - Raise Management Data Input clock
+ *  @hw: pointer to the HW structure
+ *  @ctrl: pointer to the control register
+ *
+ *  Raise the management data input clock by setting the MDC bit in the control
+ *  register.
+ **/
+static void e1000_raise_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
+{
+	/*
+	 * Raise the clock input to the Management Data Clock (by setting the
+	 * MDC bit), and then delay a sufficient amount of time.
+	 */
+	E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl | E1000_CTRL_MDC));
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(10);
+}
+
+/**
+ *  e1000_lower_mdi_clk_82543 - Lower Management Data Input clock
+ *  @hw: pointer to the HW structure
+ *  @ctrl: pointer to the control register
+ *
+ *  Lower the management data input clock by clearing the MDC bit in the
+ *  control register.
+ **/
+static void e1000_lower_mdi_clk_82543(struct e1000_hw *hw, u32 *ctrl)
+{
+	/*
+	 * Lower the clock input to the Management Data Clock (by clearing the
+	 * MDC bit), and then delay a sufficient amount of time.
+	 */
+	E1000_WRITE_REG(hw, E1000_CTRL, (*ctrl & ~E1000_CTRL_MDC));
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(10);
+}
+
+/**
+ *  e1000_shift_out_mdi_bits_82543 - Shift data bits our to the PHY
+ *  @hw: pointer to the HW structure
+ *  @data: data to send to the PHY
+ *  @count: number of bits to shift out
+ *
+ *  We need to shift 'count' bits out to the PHY.  So, the value in the
+ *  "data" parameter will be shifted out to the PHY one bit at a time.
+ *  In order to do this, "data" must be broken down into bits.
+ **/
+static void e1000_shift_out_mdi_bits_82543(struct e1000_hw *hw, u32 data,
+                                           u16 count)
+{
+	u32 ctrl, mask;
+
+	/*
+	 * We need to shift "count" number of bits out to the PHY.  So, the
+	 * value in the "data" parameter will be shifted out to the PHY one
+	 * bit at a time.  In order to do this, "data" must be broken down
+	 * into bits.
+	 */
+	mask = 0x01;
+	mask <<= (count -1);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/* Set MDIO_DIR and MDC_DIR direction bits to be used as output pins. */
+	ctrl |= (E1000_CTRL_MDIO_DIR | E1000_CTRL_MDC_DIR);
+
+	while (mask) {
+		/*
+		 * A "1" is shifted out to the PHY by setting the MDIO bit to
+		 * "1" and then raising and lowering the Management Data Clock.
+		 * A "0" is shifted out to the PHY by setting the MDIO bit to
+		 * "0" and then raising and lowering the clock.
+		 */
+		if (data & mask) ctrl |= E1000_CTRL_MDIO;
+		else ctrl &= ~E1000_CTRL_MDIO;
+
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		E1000_WRITE_FLUSH(hw);
+
+		usec_delay(10);
+
+		e1000_raise_mdi_clk_82543(hw, &ctrl);
+		e1000_lower_mdi_clk_82543(hw, &ctrl);
+
+		mask >>= 1;
+	}
+}
+
+/**
+ *  e1000_shift_in_mdi_bits_82543 - Shift data bits in from the PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  In order to read a register from the PHY, we need to shift 18 bits
+ *  in from the PHY.  Bits are "shifted in" by raising the clock input to
+ *  the PHY (setting the MDC bit), and then reading the value of the data out
+ *  MDIO bit.
+ **/
+static u16 e1000_shift_in_mdi_bits_82543(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	u16 data = 0;
+	u8 i;
+
+	/*
+	 * In order to read a register from the PHY, we need to shift in a
+	 * total of 18 bits from the PHY.  The first two bit (turnaround)
+	 * times are used to avoid contention on the MDIO pin when a read
+	 * operation is performed.  These two bits are ignored by us and
+	 * thrown away.  Bits are "shifted in" by raising the input to the
+	 * Management Data Clock (setting the MDC bit) and then reading the
+	 * value of the MDIO bit.
+	 */
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/*
+	 * Clear MDIO_DIR (SWDPIO1) to indicate this bit is to be used as
+	 * input.
+	 */
+	ctrl &= ~E1000_CTRL_MDIO_DIR;
+	ctrl &= ~E1000_CTRL_MDIO;
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+
+	/*
+	 * Raise and lower the clock before reading in the data.  This accounts
+	 * for the turnaround bits.  The first clock occurred when we clocked
+	 * out the last bit of the Register Address.
+	 */
+	e1000_raise_mdi_clk_82543(hw, &ctrl);
+	e1000_lower_mdi_clk_82543(hw, &ctrl);
+
+	for (data = 0, i = 0; i < 16; i++) {
+		data <<= 1;
+		e1000_raise_mdi_clk_82543(hw, &ctrl);
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		/* Check to see if we shifted in a "1". */
+		if (ctrl & E1000_CTRL_MDIO)
+			data |= 1;
+		e1000_lower_mdi_clk_82543(hw, &ctrl);
+	}
+
+	e1000_raise_mdi_clk_82543(hw, &ctrl);
+	e1000_lower_mdi_clk_82543(hw, &ctrl);
+
+	return data;
+}
+
+#if 0
+/**
+ *  e1000_phy_force_speed_duplex_82543 - Force speed/duplex for PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the function to force speed and duplex for the m88 PHY, and
+ *  if the PHY is not auto-negotiating and the speed is forced to 10Mbit,
+ *  then call the function for polarity reversal workaround.
+ **/
+static s32 e1000_phy_force_speed_duplex_82543(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_phy_force_speed_duplex_82543");
+
+	ret_val = e1000_phy_force_speed_duplex_m88(hw);
+	if (ret_val)
+		goto out;
+
+	if (!hw->mac.autoneg &&
+	    (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED))
+		ret_val = e1000_polarity_reversal_workaround_82543(hw);
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000_polarity_reversal_workaround_82543 - Workaround polarity reversal
+ *  @hw: pointer to the HW structure
+ *
+ *  When forcing link to 10 Full or 10 Half, the PHY can reverse the polarity
+ *  inadvertently.  To workaround the issue, we disable the transmitter on
+ *  the PHY until we have established the link partner's link parameters.
+ **/
+static s32 e1000_polarity_reversal_workaround_82543(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 mii_status_reg;
+	u16 i;
+	bool link;
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
+
+	/* Polarity reversal workaround for forced 10F/10H links. */
+
+	/* Disable the transmitter on the PHY */
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
+	if (ret_val)
+		goto out;
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * This loop will early-out if the NO link condition has been met.
+	 * In other words, DO NOT use e1000_phy_has_link_generic() here.
+	 */
+	for (i = PHY_FORCE_TIME; i > 0; i--) {
+		/*
+		 * Read the MII Status Register and wait for Link Status bit
+		 * to be clear.
+		 */
+
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+
+		if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0)
+			break;
+		msec_delay_irq(100);
+	}
+
+	/* Recommended delay time after link has been lost */
+	msec_delay_irq(1000);
+
+	/* Now we will re-enable the transmitter on the PHY */
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
+	if (ret_val)
+		goto out;
+	msec_delay_irq(50);
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
+	if (ret_val)
+		goto out;
+	msec_delay_irq(50);
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
+	if (ret_val)
+		goto out;
+	msec_delay_irq(50);
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Read the MII Status Register and wait for Link Status bit
+	 * to be set.
+	 */
+	ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_TIME, 100000, &link);
+	if (ret_val)
+		goto out;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_hw_reset_82543 - PHY hardware reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the PHY_RESET_DIR bit in the extended device control register
+ *  to put the PHY into a reset and waits for completion.  Once the reset
+ *  has been accomplished, clear the PHY_RESET_DIR bit to take the PHY out
+ *  of reset.
+ **/
+static s32 e1000_phy_hw_reset_82543(struct e1000_hw *hw)
+{
+	u32 ctrl_ext;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_phy_hw_reset_82543");
+
+	/*
+	 * Read the Extended Device Control Register, assert the PHY_RESET_DIR
+	 * bit to put the PHY into reset...
+	 */
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	ctrl_ext |= E1000_CTRL_EXT_SDP4_DIR;
+	ctrl_ext &= ~E1000_CTRL_EXT_SDP4_DATA;
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	E1000_WRITE_FLUSH(hw);
+
+	msec_delay(10);
+
+	/* ...then take it out of reset. */
+	ctrl_ext |= E1000_CTRL_EXT_SDP4_DATA;
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	E1000_WRITE_FLUSH(hw);
+
+	usec_delay(150);
+
+	if (!(hw->phy.ops.get_cfg_done))
+		return E1000_SUCCESS;
+
+	ret_val = hw->phy.ops.get_cfg_done(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_reset_hw_82543 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 e1000_reset_hw_82543(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_reset_hw_82543");
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	e1000_set_tbi_sbp_82543(hw, false);
+
+	/*
+	 * Delay to allow any outstanding PCI transactions to complete before
+	 * resetting the device
+	 */
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGOUT("Issuing a global reset to 82543/82544 MAC\n");
+	if (hw->mac.type == e1000_82543) {
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+	} else {
+		/*
+		 * The 82544 can't ACK the 64-bit write when issuing the
+		 * reset, so use IO-mapping as a workaround.
+		 */
+		E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+	}
+
+	/*
+	 * After MAC reset, force reload of NVM to restore power-on
+	 * settings to device.
+	 */
+	hw->nvm.ops.reload(hw);
+	msec_delay(2);
+
+	/* Masking off and clearing any pending interrupts */
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+	E1000_READ_REG(hw, E1000_ICR);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_init_hw_82543 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 e1000_init_hw_82543(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_dev_spec_82543 *dev_spec = &hw->dev_spec._82543;
+	u32 ctrl;
+	s32 ret_val;
+	u16 i;
+
+	DEBUGFUNC("e1000_init_hw_82543");
+
+	/* Disabling VLAN filtering */
+	E1000_WRITE_REG(hw, E1000_VET, 0);
+	mac->ops.clear_vfta(hw);
+
+	/* Setup the receive address. */
+	e1000_init_rx_addrs_generic(hw, mac->rar_entry_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++) {
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+		E1000_WRITE_FLUSH(hw);
+	}
+
+	/*
+	 * Set the PCI priority bit correctly in the CTRL register.  This
+	 * determines if the adapter gives priority to receives, or if it
+	 * gives equal priority to transmits and receives.
+	 */
+	if (hw->mac.type == e1000_82543 && dev_spec->dma_fairness) {
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PRIOR);
+	}
+
+	e1000_pcix_mmrbc_workaround_generic(hw);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_82543(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_link_82543 - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the EEPROM to determine the initial polarity value and write the
+ *  extended device control register with the information before calling
+ *  the generic setup link function, which does the following:
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+static s32 e1000_setup_link_82543(struct e1000_hw *hw)
+{
+	u32 ctrl_ext;
+	s32  ret_val;
+	u16 data;
+
+	DEBUGFUNC("e1000_setup_link_82543");
+
+	/*
+	 * Take the 4 bits from NVM word 0xF that determine the initial
+	 * polarity value for the SW controlled pins, and setup the
+	 * Extended Device Control reg with that info.
+	 * This is needed because one of the SW controlled pins is used for
+	 * signal detection.  So this should be done before phy setup.
+	 */
+	if (hw->mac.type == e1000_82543) {
+		ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			ret_val = -E1000_ERR_NVM;
+			goto out;
+		}
+		ctrl_ext = ((data & NVM_WORD0F_SWPDIO_EXT_MASK) <<
+		            NVM_SWDPIO_EXT_SHIFT);
+		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	}
+
+	ret_val = e1000_setup_link_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_copper_link_82543 - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the link for auto-neg or forced speed and duplex.  Then we check
+ *  for link, once link is established calls to configure collision distance
+ *  and flow control are called.
+ **/
+static s32 e1000_setup_copper_link_82543(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("e1000_setup_copper_link_82543");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL) | E1000_CTRL_SLU;
+	/*
+	 * With 82543, we need to force speed and duplex on the MAC
+	 * equal to what the PHY speed and duplex configuration is.
+	 * In addition, we need to perform a hardware reset on the
+	 * PHY to take it out of reset.
+	 */
+	if (hw->mac.type == e1000_82543) {
+		ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		ret_val = hw->phy.ops.reset(hw);
+		if (ret_val)
+			goto out;
+		hw->phy.reset_disable = false;
+	} else {
+		ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	}
+
+	/* Set MDI/MDI-X, Polarity Reversal, and downshift settings */
+	ret_val = e1000_copper_link_setup_m88(hw);
+	if (ret_val)
+		goto out;
+
+	if (hw->mac.autoneg) {
+		/*
+		 * Setup autoneg and flow control advertisement and perform
+		 * autonegotiation.
+		 */
+		ret_val = e1000_copper_link_autoneg(hw);
+		if (ret_val)
+			goto out;
+	} else {
+		/*
+		 * PHY will be set to 10H, 10F, 100H or 100F
+		 * depending on user settings.
+		 */
+#if 0
+		DEBUGOUT("Forcing Speed and Duplex\n");
+		ret_val = e1000_phy_force_speed_duplex_82543(hw);
+		if (ret_val) {
+			DEBUGOUT("Error Forcing Speed and Duplex\n");
+			goto out;
+		}
+#endif
+	}
+
+	/*
+	 * Check link status. Wait up to 100 microseconds for link to become
+	 * valid.
+	 */
+	ret_val = e1000_phy_has_link_generic(hw,
+	                                     COPPER_LINK_UP_LIMIT,
+	                                     10,
+	                                     &link);
+	if (ret_val)
+		goto out;
+
+
+	if (link) {
+		DEBUGOUT("Valid link established!!!\n");
+		/* Config the MAC and PHY after link is up */
+		if (hw->mac.type == e1000_82544) {
+			e1000_config_collision_dist_generic(hw);
+		} else {
+			ret_val = e1000_config_mac_to_phy_82543(hw);
+			if (ret_val)
+				goto out;
+		}
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+	} else {
+		DEBUGOUT("Unable to establish link!!!\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_fiber_link_82543 - Setup link for fiber
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures collision distance and flow control for fiber links.  Upon
+ *  successful setup, poll for link.
+ **/
+static s32 e1000_setup_fiber_link_82543(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_setup_fiber_link_82543");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/* Take the link out of reset */
+	ctrl &= ~E1000_CTRL_LRST;
+
+	e1000_config_collision_dist_generic(hw);
+
+	ret_val = e1000_commit_fc_settings_generic(hw);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT("Auto-negotiation enabled\n");
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(1);
+
+	/*
+	 * For these adapters, the SW definable pin 1 is cleared when the
+	 * optics detect a signal.  If we have a signal, then poll for a
+	 * "Link-Up" indication.
+	 */
+	if (!(E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {
+		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
+	} else {
+		DEBUGOUT("No signal detected\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_for_copper_link_82543 - Check for link (Copper)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the phy for link, if link exists, do the following:
+ *   - check for downshift
+ *   - do polarity workaround (if necessary)
+ *   - configure collision distance
+ *   - configure flow control after link up
+ *   - configure tbi compatibility
+ **/
+static s32 e1000_check_for_copper_link_82543(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 icr, rctl;
+	s32 ret_val;
+	u16 speed, duplex;
+	bool link;
+
+	DEBUGFUNC("e1000_check_for_copper_link_82543");
+
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link)
+		goto out; /* No link detected */
+
+	mac->get_link_status = false;
+
+	e1000_check_downshift_generic(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we can return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		/*
+		 * If speed and duplex are forced to 10H or 10F, then we will
+		 * implement the polarity reversal workaround.  We disable
+		 * interrupts first, and upon returning, place the devices
+		 * interrupt state to its previous value except for the link
+		 * status change interrupt which will happened due to the
+		 * execution of this workaround.
+		 */
+		if (mac->forced_speed_duplex & E1000_ALL_10_SPEED) {
+			E1000_WRITE_REG(hw, E1000_IMC, 0xFFFFFFFF);
+			ret_val = e1000_polarity_reversal_workaround_82543(hw);
+			icr = E1000_READ_REG(hw, E1000_ICR);
+			E1000_WRITE_REG(hw, E1000_ICS, (icr & ~E1000_ICS_LSC));
+			E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK);
+		}
+
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * We have a M88E1000 PHY and Auto-Neg is enabled.  If we
+	 * have Si on board that is 82544 or newer, Auto
+	 * Speed Detection takes care of MAC speed/duplex
+	 * configuration.  So we only need to configure Collision
+	 * Distance in the MAC.  Otherwise, we need to force
+	 * speed/duplex on the MAC to the current PHY speed/duplex
+	 * settings.
+	 */
+	if (mac->type == e1000_82544)
+		e1000_config_collision_dist_generic(hw);
+	else {
+		ret_val = e1000_config_mac_to_phy_82543(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring MAC to PHY settings\n");
+			goto out;
+		}
+	}
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = e1000_config_fc_after_link_up_generic(hw);
+	if (ret_val) {
+		DEBUGOUT("Error configuring flow control\n");
+	}
+
+	/*
+	 * At this point we know that we are on copper and we have
+	 * auto-negotiated link.  These are conditions for checking the link
+	 * partner capability register.  We use the link speed to determine if
+	 * TBI compatibility needs to be turned on or off.  If the link is not
+	 * at gigabit speed, then TBI compatibility is not needed.  If we are
+	 * at gigabit speed, we turn on TBI compatibility.
+	 */
+	if (e1000_tbi_compatibility_enabled_82543(hw)) {
+		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
+		if (ret_val) {
+			DEBUGOUT("Error getting link speed and duplex\n");
+			return ret_val;
+		}
+		if (speed != SPEED_1000) {
+			/*
+			 * If link speed is not set to gigabit speed,
+			 * we do not need to enable TBI compatibility.
+			 */
+			if (e1000_tbi_sbp_enabled_82543(hw)) {
+				/*
+				 * If we previously were in the mode,
+				 * turn it off.
+				 */
+				e1000_set_tbi_sbp_82543(hw, false);
+				rctl = E1000_READ_REG(hw, E1000_RCTL);
+				rctl &= ~E1000_RCTL_SBP;
+				E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+			}
+		} else {
+			/*
+			 * If TBI compatibility is was previously off,
+			 * turn it on. For compatibility with a TBI link
+			 * partner, we will store bad packets. Some
+			 * frames have an additional byte on the end and
+			 * will look like CRC errors to to the hardware.
+			 */
+			if (!e1000_tbi_sbp_enabled_82543(hw)) {
+				e1000_set_tbi_sbp_82543(hw, true);
+				rctl = E1000_READ_REG(hw, E1000_RCTL);
+				rctl |= E1000_RCTL_SBP;
+				E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+			}
+		}
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_for_fiber_link_82543 - Check for link (Fiber)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+static s32 e1000_check_for_fiber_link_82543(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw, ctrl, status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_check_for_fiber_link_82543");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	rxcw = E1000_READ_REG(hw, E1000_RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), the cable is plugged in (we have signal),
+	 * and our link partner is not trying to auto-negotiate with us (we
+	 * are receiving idles or data), we need to force link up. We also
+	 * need to give auto-negotiation time to complete, in case the cable
+	 * was just plugged in. The autoneg_failed flag does this.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 0 == have signal */
+	if ((!(ctrl & E1000_CTRL_SWDPIN1)) &&
+	    (!(status & E1000_STATUS_LU)) &&
+	    (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			ret_val = 0;
+			goto out;
+		}
+		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_config_mac_to_phy_82543 - Configure MAC to PHY settings
+ *  @hw: pointer to the HW structure
+ *
+ *  For the 82543 silicon, we need to set the MAC to match the settings
+ *  of the PHY, even if the PHY is auto-negotiating.
+ **/
+static s32 e1000_config_mac_to_phy_82543(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data;
+
+	DEBUGFUNC("e1000_config_mac_to_phy_82543");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	/* Set the bits to force speed and duplex */
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ctrl &= ~(E1000_CTRL_SPD_SEL | E1000_CTRL_ILOS);
+
+	/*
+	 * Set up duplex in the Device Control and Transmit Control
+	 * registers depending on negotiated values.
+	 */
+	ret_val = hw->phy.ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	ctrl &= ~E1000_CTRL_FD;
+	if (phy_data & M88E1000_PSSR_DPLX)
+		ctrl |= E1000_CTRL_FD;
+
+	e1000_config_collision_dist_generic(hw);
+
+	/*
+	 * Set up speed in the Device Control register depending on
+	 * negotiated values.
+	 */
+	if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS)
+		ctrl |= E1000_CTRL_SPD_1000;
+	else if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_100MBS)
+		ctrl |= E1000_CTRL_SPD_100;
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_vfta_82543 - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: the 32-bit offset in which to write the value to.
+ *  @value: the 32-bit value to write at location offset.
+ *
+ *  This writes a 32-bit value to a 32-bit offset in the VLAN filter
+ *  table.
+ **/
+static void e1000_write_vfta_82543(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	u32 temp;
+
+	DEBUGFUNC("e1000_write_vfta_82543");
+
+	if ((hw->mac.type == e1000_82544) && (offset & 1)) {
+		temp = E1000_READ_REG_ARRAY(hw, E1000_VFTA, offset - 1);
+		E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
+		E1000_WRITE_FLUSH(hw);
+		E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset - 1, temp);
+		E1000_WRITE_FLUSH(hw);
+	} else {
+		e1000_write_vfta_generic(hw, offset, value);
+	}
+}
+
+/**
+ *  e1000_mta_set_82543 - Set multicast filter table address
+ *  @hw: pointer to the HW structure
+ *  @hash_value: determines the MTA register and bit to set
+ *
+ *  The multicast table address is a register array of 32-bit registers.
+ *  The hash_value is used to determine what register the bit is in, the
+ *  current value is read, the new bit is OR'd in and the new value is
+ *  written back into the register.
+ **/
+static void e1000_mta_set_82543(struct e1000_hw *hw, u32 hash_value)
+{
+	u32 hash_bit, hash_reg, mta, temp;
+
+	DEBUGFUNC("e1000_mta_set_82543");
+
+	hash_reg = (hash_value >> 5);
+
+	/*
+	 * If we are on an 82544 and we are trying to write an odd offset
+	 * in the MTA, save off the previous entry before writing and
+	 * restore the old value after writing.
+	 */
+	if ((hw->mac.type == e1000_82544) && (hash_reg & 1)) {
+		hash_reg &= (hw->mac.mta_reg_count - 1);
+		hash_bit = hash_value & 0x1F;
+		mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
+		mta |= (1 << hash_bit);
+		temp = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg - 1);
+
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
+		E1000_WRITE_FLUSH(hw);
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg - 1, temp);
+		E1000_WRITE_FLUSH(hw);
+	} else {
+		e1000_mta_set_generic(hw, hash_value);
+	}
+}
+
+/**
+ *  e1000_led_on_82543 - Turn on SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED on.
+ **/
+static s32 e1000_led_on_82543(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGFUNC("e1000_led_on_82543");
+
+	if (hw->mac.type == e1000_82544 &&
+	    hw->phy.media_type == e1000_media_type_copper) {
+		/* Clear SW-definable Pin 0 to turn on the LED */
+		ctrl &= ~E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+	} else {
+		/* Fiber 82544 and all 82543 use this method */
+		ctrl |= E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+	}
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	return E1000_SUCCESS;
+#endif
+        return 0;
+}
+
+/**
+ *  e1000_led_off_82543 - Turn off SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED off.
+ **/
+static s32 e1000_led_off_82543(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGFUNC("e1000_led_off_82543");
+
+	if (hw->mac.type == e1000_82544 &&
+	    hw->phy.media_type == e1000_media_type_copper) {
+		/* Set SW-definable Pin 0 to turn off the LED */
+		ctrl |= E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+	} else {
+		ctrl &= ~E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+	}
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	return E1000_SUCCESS;
+#endif
+        return 0;
+}
+
+/**
+ *  e1000_clear_hw_cntrs_82543 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000_clear_hw_cntrs_82543(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_clear_hw_cntrs_82543");
+
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+#if 0
+	E1000_READ_REG(hw, E1000_PRC64);
+	E1000_READ_REG(hw, E1000_PRC127);
+	E1000_READ_REG(hw, E1000_PRC255);
+	E1000_READ_REG(hw, E1000_PRC511);
+	E1000_READ_REG(hw, E1000_PRC1023);
+	E1000_READ_REG(hw, E1000_PRC1522);
+	E1000_READ_REG(hw, E1000_PTC64);
+	E1000_READ_REG(hw, E1000_PTC127);
+	E1000_READ_REG(hw, E1000_PTC255);
+	E1000_READ_REG(hw, E1000_PTC511);
+	E1000_READ_REG(hw, E1000_PTC1023);
+	E1000_READ_REG(hw, E1000_PTC1522);
+
+	E1000_READ_REG(hw, E1000_ALGNERRC);
+	E1000_READ_REG(hw, E1000_RXERRC);
+	E1000_READ_REG(hw, E1000_TNCRS);
+	E1000_READ_REG(hw, E1000_CEXTERR);
+	E1000_READ_REG(hw, E1000_TSCTC);
+	E1000_READ_REG(hw, E1000_TSCTFC);
+#endif
+}
+
+static struct pci_device_id e1000_82543_nics[] = {
+     PCI_ROM(0x8086, 0x1001, "E1000_DEV_ID_82543GC_FIBER", "E1000_DEV_ID_82543GC_FIBER", e1000_82543),
+     PCI_ROM(0x8086, 0x1004, "E1000_DEV_ID_82543GC_COPPER", "E1000_DEV_ID_82543GC_COPPER", e1000_82543),
+     PCI_ROM(0x8086, 0x1008, "E1000_DEV_ID_82544EI_COPPER", "E1000_DEV_ID_82544EI_COPPER", e1000_82544),
+     PCI_ROM(0x8086, 0x1009, "E1000_DEV_ID_82544EI_FIBER", "E1000_DEV_ID_82544EI_FIBER", e1000_82544),
+     PCI_ROM(0x8086, 0x100C, "E1000_DEV_ID_82544GC_COPPER", "E1000_DEV_ID_82544GC_COPPER", e1000_82544),
+     PCI_ROM(0x8086, 0x100D, "E1000_DEV_ID_82544GC_LOM", "E1000_DEV_ID_82544GC_LOM", e1000_82544),
+};
+
+struct pci_driver e1000_82543_driver __pci_driver = {
+	.ids = e1000_82543_nics,
+	.id_count = (sizeof (e1000_82543_nics) / sizeof (e1000_82543_nics[0])),
+	.probe = e1000_probe,
+	.remove = e1000_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82543.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82543.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_82543.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_82543.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,45 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_82543_H_
+#define _E1000_82543_H_
+
+#define PHY_PREAMBLE      0xFFFFFFFF
+#define PHY_PREAMBLE_SIZE 32
+#define PHY_SOF           0x1
+#define PHY_OP_READ       0x2
+#define PHY_OP_WRITE      0x1
+#define PHY_TURNAROUND    0x2
+
+#define TBI_COMPAT_ENABLED 0x1 /* Global "knob" for the workaround */
+/* If TBI_COMPAT_ENABLED, then this is the current state (on/off) */
+#define TBI_SBP_ENABLED    0x2
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_api.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_api.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_api.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_api.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1108 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000_api.h"
+
+/**
+ *  e1000_init_mac_params - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the MAC
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 e1000_init_mac_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mac.ops.init_params) {
+		ret_val = hw->mac.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("MAC Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("mac.init_mac_params was NULL\n");
+		ret_val = -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_init_nvm_params - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the NVM
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 e1000_init_nvm_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->nvm.ops.init_params) {
+		ret_val = hw->nvm.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("NVM Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("nvm.init_nvm_params was NULL\n");
+		ret_val = -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_init_phy_params - Initialize PHY function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the PHY
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 e1000_init_phy_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.ops.init_params) {
+		ret_val = hw->phy.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("PHY Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("phy.init_phy_params was NULL\n");
+		ret_val =  -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_set_mac_type - Sets MAC type
+ *  @hw: pointer to the HW structure
+ *
+ *  This function sets the mac type of the adapter based on the
+ *  device ID stored in the hw structure.
+ *  MUST BE FIRST FUNCTION CALLED (explicitly or through
+ *  e1000_setup_init_funcs()).
+ **/
+s32 e1000_set_mac_type(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_set_mac_type");
+
+	switch (hw->device_id) {
+	case E1000_DEV_ID_82542:
+		mac->type = e1000_82542;
+		break;
+	case E1000_DEV_ID_82543GC_FIBER:
+	case E1000_DEV_ID_82543GC_COPPER:
+		mac->type = e1000_82543;
+		break;
+	case E1000_DEV_ID_82544EI_COPPER:
+	case E1000_DEV_ID_82544EI_FIBER:
+	case E1000_DEV_ID_82544GC_COPPER:
+	case E1000_DEV_ID_82544GC_LOM:
+		mac->type = e1000_82544;
+		break;
+	case E1000_DEV_ID_82540EM:
+	case E1000_DEV_ID_82540EM_LOM:
+	case E1000_DEV_ID_82540EP:
+	case E1000_DEV_ID_82540EP_LOM:
+	case E1000_DEV_ID_82540EP_LP:
+		mac->type = e1000_82540;
+		break;
+	case E1000_DEV_ID_82545EM_COPPER:
+	case E1000_DEV_ID_82545EM_FIBER:
+		mac->type = e1000_82545;
+		break;
+	case E1000_DEV_ID_82545GM_COPPER:
+	case E1000_DEV_ID_82545GM_FIBER:
+	case E1000_DEV_ID_82545GM_SERDES:
+		mac->type = e1000_82545_rev_3;
+		break;
+	case E1000_DEV_ID_82546EB_COPPER:
+	case E1000_DEV_ID_82546EB_FIBER:
+	case E1000_DEV_ID_82546EB_QUAD_COPPER:
+		mac->type = e1000_82546;
+		break;
+	case E1000_DEV_ID_82546GB_COPPER:
+	case E1000_DEV_ID_82546GB_FIBER:
+	case E1000_DEV_ID_82546GB_SERDES:
+	case E1000_DEV_ID_82546GB_PCIE:
+	case E1000_DEV_ID_82546GB_QUAD_COPPER:
+	case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
+		mac->type = e1000_82546_rev_3;
+		break;
+	case E1000_DEV_ID_82541EI:
+	case E1000_DEV_ID_82541EI_MOBILE:
+	case E1000_DEV_ID_82541ER_LOM:
+		mac->type = e1000_82541;
+		break;
+	case E1000_DEV_ID_82541ER:
+	case E1000_DEV_ID_82541GI:
+	case E1000_DEV_ID_82541GI_LF:
+	case E1000_DEV_ID_82541GI_MOBILE:
+		mac->type = e1000_82541_rev_2;
+		break;
+	case E1000_DEV_ID_82547EI:
+	case E1000_DEV_ID_82547EI_MOBILE:
+		mac->type = e1000_82547;
+		break;
+	case E1000_DEV_ID_82547GI:
+		mac->type = e1000_82547_rev_2;
+		break;
+	default:
+		/* Should never have loaded on this device */
+		ret_val = -E1000_ERR_MAC_INIT;
+		break;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_init_funcs - Initializes function pointers
+ *  @hw: pointer to the HW structure
+ *  @init_device: true will initialize the rest of the function pointers
+ *                 getting the device ready for use.  false will only set
+ *                 MAC type and the function pointers for the other init
+ *                 functions.  Passing false will not generate any hardware
+ *                 reads or writes.
+ *
+ *  This function must be called by a driver in order to use the rest
+ *  of the 'shared' code files. Called by drivers only.
+ **/
+s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
+{
+	s32 ret_val;
+
+	/* Can't do much good without knowing the MAC type. */
+	ret_val = e1000_set_mac_type(hw);
+	if (ret_val) {
+		DEBUGOUT("ERROR: MAC type could not be set properly.\n");
+		goto out;
+	}
+
+	if (!hw->hw_addr) {
+		DEBUGOUT("ERROR: Registers not mapped\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Init function pointers to generic implementations. We do this first
+	 * allowing a driver module to override it afterward.
+	 */
+	e1000_init_mac_ops_generic(hw);
+	e1000_init_phy_ops_generic(hw);
+	e1000_init_nvm_ops_generic(hw);
+
+	/*
+	 * Set up the init function pointers. These are functions within the
+	 * adapter family file that sets up function pointers for the rest of
+	 * the functions in that family.
+	 */
+	switch (hw->mac.type) {
+	case e1000_82542:
+		e1000_init_function_pointers_82542(hw);
+		break;
+	case e1000_82543:
+	case e1000_82544:
+		e1000_init_function_pointers_82543(hw);
+		break;
+	case e1000_82540:
+	case e1000_82545:
+	case e1000_82545_rev_3:
+	case e1000_82546:
+	case e1000_82546_rev_3:
+		e1000_init_function_pointers_82540(hw);
+		break;
+	case e1000_82541:
+	case e1000_82541_rev_2:
+	case e1000_82547:
+	case e1000_82547_rev_2:
+		e1000_init_function_pointers_82541(hw);
+		break;
+	default:
+		DEBUGOUT("Hardware not supported\n");
+		ret_val = -E1000_ERR_CONFIG;
+		break;
+	}
+
+	/*
+	 * Initialize the rest of the function pointers. These require some
+	 * register reads/writes in some cases.
+	 */
+	if (!(ret_val) && init_device) {
+		ret_val = e1000_init_mac_params(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = e1000_init_nvm_params(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = e1000_init_phy_params(hw);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_get_bus_info - Obtain bus information for adapter
+ *  @hw: pointer to the HW structure
+ *
+ *  This will obtain information about the HW bus for which the
+ *  adapter is attached and stores it in the hw structure. This is a
+ *  function pointer entry point called by drivers.
+ **/
+s32 e1000_get_bus_info(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.get_bus_info)
+		return hw->mac.ops.get_bus_info(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_clear_vfta - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  This clears the VLAN filter table on the adapter. This is a function
+ *  pointer entry point called by drivers.
+ **/
+void e1000_clear_vfta(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.clear_vfta)
+		hw->mac.ops.clear_vfta(hw);
+}
+
+/**
+ *  e1000_write_vfta - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: the 32-bit offset in which to write the value to.
+ *  @value: the 32-bit value to write at location offset.
+ *
+ *  This writes a 32-bit value to a 32-bit offset in the VLAN filter
+ *  table. This is a function pointer entry point called by drivers.
+ **/
+void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	if (hw->mac.ops.write_vfta)
+		hw->mac.ops.write_vfta(hw, offset, value);
+}
+
+/**
+ *  e1000_update_mc_addr_list - Update Multicast addresses
+ *  @hw: pointer to the HW structure
+ *  @mc_addr_list: array of multicast addresses to program
+ *  @mc_addr_count: number of multicast addresses to program
+ *
+ *  Updates the Multicast Table Array.
+ *  The caller must have a packed mc_addr_list of multicast addresses.
+ **/
+void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
+                               u32 mc_addr_count)
+{
+	if (hw->mac.ops.update_mc_addr_list)
+		hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,
+		                                mc_addr_count);
+}
+
+/**
+ *  e1000_force_mac_fc - Force MAC flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the MAC's flow control settings. Currently no func pointer exists
+ *  and all implementations are handled in the generic version of this
+ *  function.
+ **/
+s32 e1000_force_mac_fc(struct e1000_hw *hw)
+{
+	return e1000_force_mac_fc_generic(hw);
+}
+
+/**
+ *  e1000_check_for_link - Check/Store link connection
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks the link condition of the adapter and stores the
+ *  results in the hw->mac structure. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 e1000_check_for_link(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.check_for_link)
+		return hw->mac.ops.check_for_link(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+#if 0
+/**
+ *  e1000_check_mng_mode - Check management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks if the adapter has manageability enabled.
+ *  This is a function pointer entry point called by drivers.
+ **/
+bool e1000_check_mng_mode(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.check_mng_mode)
+		return hw->mac.ops.check_mng_mode(hw);
+
+	return false;
+}
+
+/**
+ *  e1000_mng_write_dhcp_info - Writes DHCP info to host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface
+ *  @length: size of the buffer
+ *
+ *  Writes the DHCP information to the host interface.
+ **/
+s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)
+{
+	return e1000_mng_write_dhcp_info_generic(hw, buffer, length);
+}
+#endif
+
+/**
+ *  e1000_reset_hw - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 e1000_reset_hw(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.reset_hw)
+		return hw->mac.ops.reset_hw(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_init_hw - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation. This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 e1000_init_hw(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.init_hw)
+		return hw->mac.ops.init_hw(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_setup_link - Configures link and flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  This configures link and flow control settings for the adapter. This
+ *  is a function pointer entry point called by drivers. While modules can
+ *  also call this, they probably call their own version of this function.
+ **/
+s32 e1000_setup_link(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.setup_link)
+		return hw->mac.ops.setup_link(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_get_speed_and_duplex - Returns current speed and duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: pointer to a 16-bit value to store the speed
+ *  @duplex: pointer to a 16-bit value to store the duplex.
+ *
+ *  This returns the speed and duplex of the adapter in the two 'out'
+ *  variables passed in. This is a function pointer entry point called
+ *  by drivers.
+ **/
+s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)
+{
+	if (hw->mac.ops.get_link_up_info)
+		return hw->mac.ops.get_link_up_info(hw, speed, duplex);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_setup_led - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 e1000_setup_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.setup_led)
+		return hw->mac.ops.setup_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_cleanup_led - Restores SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This restores the SW controllable LED to the value saved off by
+ *  e1000_setup_led. This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_cleanup_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.cleanup_led)
+		return hw->mac.ops.cleanup_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_blink_led - Blink SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This starts the adapter LED blinking. Request the LED to be setup first
+ *  and cleaned up after. This is a function pointer entry point called by
+ *  drivers.
+ **/
+s32 e1000_blink_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.blink_led)
+		return hw->mac.ops.blink_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_id_led_init - store LED configurations in SW
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes the LED config in SW. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 e1000_id_led_init(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.id_led_init)
+		return hw->mac.ops.id_led_init(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_led_on - Turn on SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED on. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 e1000_led_on(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.led_on)
+		return hw->mac.ops.led_on(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_led_off - Turn off SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED off. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 e1000_led_off(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.led_off)
+		return hw->mac.ops.led_off(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_reset_adaptive - Reset adaptive IFS
+ *  @hw: pointer to the HW structure
+ *
+ *  Resets the adaptive IFS. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void e1000_reset_adaptive(struct e1000_hw *hw)
+{
+	e1000_reset_adaptive_generic(hw);
+}
+
+/**
+ *  e1000_update_adaptive - Update adaptive IFS
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates adapter IFS. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void e1000_update_adaptive(struct e1000_hw *hw)
+{
+	e1000_update_adaptive_generic(hw);
+}
+
+/**
+ *  e1000_disable_pcie_master - Disable PCI-Express master access
+ *  @hw: pointer to the HW structure
+ *
+ *  Disables PCI-Express master access and verifies there are no pending
+ *  requests. Currently no func pointer exists and all implementations are
+ *  handled in the generic version of this function.
+ **/
+s32 e1000_disable_pcie_master(struct e1000_hw *hw)
+{
+	return e1000_disable_pcie_master_generic(hw);
+}
+
+/**
+ *  e1000_config_collision_dist - Configure collision distance
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the collision distance to the default value and is used
+ *  during link setup.
+ **/
+void e1000_config_collision_dist(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.config_collision_dist)
+		hw->mac.ops.config_collision_dist(hw);
+}
+
+/**
+ *  e1000_rar_set - Sets a receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: address to set the RAR to
+ *  @index: the RAR to set
+ *
+ *  Sets a Receive Address Register (RAR) to the specified address.
+ **/
+void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	if (hw->mac.ops.rar_set)
+		hw->mac.ops.rar_set(hw, addr, index);
+}
+
+/**
+ *  e1000_validate_mdi_setting - Ensures valid MDI/MDIX SW state
+ *  @hw: pointer to the HW structure
+ *
+ *  Ensures that the MDI/MDIX SW state is valid.
+ **/
+s32 e1000_validate_mdi_setting(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.validate_mdi_setting)
+		return hw->mac.ops.validate_mdi_setting(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_mta_set - Sets multicast table bit
+ *  @hw: pointer to the HW structure
+ *  @hash_value: Multicast hash value.
+ *
+ *  This sets the bit in the multicast table corresponding to the
+ *  hash value.  This is a function pointer entry point called by drivers.
+ **/
+void e1000_mta_set(struct e1000_hw *hw, u32 hash_value)
+{
+	if (hw->mac.ops.mta_set)
+		hw->mac.ops.mta_set(hw, hash_value);
+}
+
+/**
+ *  e1000_hash_mc_addr - Determines address location in multicast table
+ *  @hw: pointer to the HW structure
+ *  @mc_addr: Multicast address to hash.
+ *
+ *  This hashes an address to determine its location in the multicast
+ *  table. Currently no func pointer exists and all implementations
+ *  are handled in the generic version of this function.
+ **/
+u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
+{
+	return e1000_hash_mc_addr_generic(hw, mc_addr);
+}
+
+#if 0
+/**
+ *  e1000_enable_tx_pkt_filtering - Enable packet filtering on TX
+ *  @hw: pointer to the HW structure
+ *
+ *  Enables packet filtering on transmit packets if manageability is enabled
+ *  and host interface is enabled.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw)
+{
+	return e1000_enable_tx_pkt_filtering_generic(hw);
+}
+
+/**
+ *  e1000_mng_host_if_write - Writes to the manageability host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface buffer
+ *  @length: size of the buffer
+ *  @offset: location in the buffer to write to
+ *  @sum: sum of the data (not checksum)
+ *
+ *  This function writes the buffer content at the offset given on the host if.
+ *  It also does alignment considerations to do the writes in most efficient
+ *  way.  Also fills up the sum of the buffer in *buffer parameter.
+ **/
+s32 e1000_mng_host_if_write(struct e1000_hw * hw, u8 *buffer, u16 length,
+                            u16 offset, u8 *sum)
+{
+	if (hw->mac.ops.mng_host_if_write)
+		return hw->mac.ops.mng_host_if_write(hw, buffer, length,
+		                                     offset, sum);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+
+/**
+ *  e1000_mng_write_cmd_header - Writes manageability command header
+ *  @hw: pointer to the HW structure
+ *  @hdr: pointer to the host interface command header
+ *
+ *  Writes the command header after does the checksum calculation.
+ **/
+s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
+                               struct e1000_host_mng_command_header *hdr)
+{
+	if (hw->mac.ops.mng_write_cmd_header)
+		return hw->mac.ops.mng_write_cmd_header(hw, hdr);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+
+/**
+ *  e1000_mng_enable_host_if - Checks host interface is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
+ *
+ *  This function checks whether the HOST IF is enabled for command operation
+ *  and also checks whether the previous command is completed.  It busy waits
+ *  in case of previous command is not completed.
+ **/
+s32 e1000_mng_enable_host_if(struct e1000_hw * hw)
+{
+	if (hw->mac.ops.mng_enable_host_if)
+		return hw->mac.ops.mng_enable_host_if(hw);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+#endif
+
+/**
+ *  e1000_wait_autoneg - Waits for autonegotiation completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Waits for autoneg to complete. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+s32 e1000_wait_autoneg(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.wait_autoneg)
+		return hw->mac.ops.wait_autoneg(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_check_reset_block - Verifies PHY can be reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks if the PHY is in a state that can be reset or if manageability
+ *  has it tied up. This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_check_reset_block(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.check_reset_block)
+		return hw->phy.ops.check_reset_block(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_read_phy_reg - Reads PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to read
+ *  @data: the buffer to store the 16-bit read.
+ *
+ *  Reads the PHY register and returns the value in data.
+ *  This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	if (hw->phy.ops.read_reg)
+		return hw->phy.ops.read_reg(hw, offset, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_write_phy_reg - Writes PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to write
+ *  @data: the value to write.
+ *
+ *  Writes the PHY register at offset with the value in data.
+ *  This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	if (hw->phy.ops.write_reg)
+		return hw->phy.ops.write_reg(hw, offset, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_release_phy - Generic release PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Return if silicon family does not require a semaphore when accessing the
+ *  PHY.
+ **/
+void e1000_release_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.release)
+		hw->phy.ops.release(hw);
+}
+
+/**
+ *  e1000_acquire_phy - Generic acquire PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Return success if silicon family does not require a semaphore when
+ *  accessing the PHY.
+ **/
+s32 e1000_acquire_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.acquire)
+		return hw->phy.ops.acquire(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_read_kmrn_reg - Reads register using Kumeran interface
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to read
+ *  @data: the location to store the 16-bit value read.
+ *
+ *  Reads a register out of the Kumeran interface. Currently no func pointer
+ *  exists and all implementations are handled in the generic version of
+ *  this function.
+ **/
+s32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return e1000_read_kmrn_reg_generic(hw, offset, data);
+}
+
+/**
+ *  e1000_write_kmrn_reg - Writes register using Kumeran interface
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to write
+ *  @data: the value to write.
+ *
+ *  Writes a register to the Kumeran interface. Currently no func pointer
+ *  exists and all implementations are handled in the generic version of
+ *  this function.
+ **/
+s32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return e1000_write_kmrn_reg_generic(hw, offset, data);
+}
+
+#if 0
+/**
+ *  e1000_get_cable_length - Retrieves cable length estimation
+ *  @hw: pointer to the HW structure
+ *
+ *  This function estimates the cable length and stores them in
+ *  hw->phy.min_length and hw->phy.max_length. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 e1000_get_cable_length(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_cable_length)
+		return hw->phy.ops.get_cable_length(hw);
+
+	return E1000_SUCCESS;
+}
+#endif
+
+/**
+ *  e1000_get_phy_info - Retrieves PHY information from registers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function gets some information from various PHY registers and
+ *  populates hw->phy values with it. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 e1000_get_phy_info(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_info)
+		return hw->phy.ops.get_info(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_phy_hw_reset - Hard PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs a hard PHY reset. This is a function pointer entry point called
+ *  by drivers.
+ **/
+s32 e1000_phy_hw_reset(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.reset)
+		return hw->phy.ops.reset(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_phy_commit - Soft PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs a soft PHY reset on those that apply. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 e1000_phy_commit(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.commit)
+		return hw->phy.ops.commit(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_set_d0_lplu_state - Sets low power link up state for D0
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D0
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D0
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.  This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
+{
+	if (hw->phy.ops.set_d0_lplu_state)
+		return hw->phy.ops.set_d0_lplu_state(hw, active);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_set_d3_lplu_state - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.  This is a function pointer entry point called by drivers.
+ **/
+s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active)
+{
+	if (hw->phy.ops.set_d3_lplu_state)
+		return hw->phy.ops.set_d3_lplu_state(hw, active);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_read_mac_addr - Reads MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the MAC address out of the adapter and stores it in the HW structure.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+s32 e1000_read_mac_addr(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.read_mac_addr)
+		return hw->mac.ops.read_mac_addr(hw);
+
+	return e1000_read_mac_addr_generic(hw);
+}
+
+/**
+ *  e1000_read_pba_num - Read device part number
+ *  @hw: pointer to the HW structure
+ *  @pba_num: pointer to device part number
+ *
+ *  Reads the product board assembly (PBA) number from the EEPROM and stores
+ *  the value in pba_num.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+s32 e1000_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
+{
+	return e1000_read_pba_num_generic(hw, pba_num);
+}
+
+/**
+ *  e1000_validate_nvm_checksum - Verifies NVM (EEPROM) checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Validates the NVM checksum is correct. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.validate)
+		return hw->nvm.ops.validate(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_update_nvm_checksum - Updates NVM (EEPROM) checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the NVM checksum. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+s32 e1000_update_nvm_checksum(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.update)
+		return hw->nvm.ops.update(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_reload_nvm - Reloads EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
+ *  extended control register.
+ **/
+void e1000_reload_nvm(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.reload)
+		hw->nvm.ops.reload(hw);
+}
+
+/**
+ *  e1000_read_nvm - Reads NVM (EEPROM)
+ *  @hw: pointer to the HW structure
+ *  @offset: the word offset to read
+ *  @words: number of 16-bit words to read
+ *  @data: pointer to the properly sized buffer for the data.
+ *
+ *  Reads 16-bit chunks of data from the NVM (EEPROM). This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	if (hw->nvm.ops.read)
+		return hw->nvm.ops.read(hw, offset, words, data);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  e1000_write_nvm - Writes to NVM (EEPROM)
+ *  @hw: pointer to the HW structure
+ *  @offset: the word offset to read
+ *  @words: number of 16-bit words to write
+ *  @data: pointer to the properly sized buffer for the data.
+ *
+ *  Writes 16-bit chunks of data to the NVM (EEPROM). This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	if (hw->nvm.ops.write)
+		return hw->nvm.ops.write(hw, offset, words, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ * e1000_power_up_phy - Restores link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * The phy may be powered down to save power, to turn off link when the
+ * driver is unloaded, or wake on lan is not enabled (among others).
+ **/
+void e1000_power_up_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.power_up)
+		hw->phy.ops.power_up(hw);
+
+	e1000_setup_link(hw);
+}
+
+/**
+ * e1000_power_down_phy - Power down PHY
+ * @hw: pointer to the HW structure
+ *
+ * The phy may be powered down to save power, to turn off link when the
+ * driver is unloaded, or wake on lan is not enabled (among others).
+ **/
+void e1000_power_down_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.power_down)
+		hw->phy.ops.power_down(hw);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_api.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_api.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_api.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_api.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,127 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_API_H_
+#define _E1000_API_H_
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <ipxe/io.h>
+#include <errno.h>
+#include <byteswap.h>
+#include <ipxe/pci.h>
+#include <ipxe/malloc.h>
+#include <ipxe/if_ether.h>
+#include <ipxe/ethernet.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/netdevice.h>
+
+#include "e1000_hw.h"
+
+extern void    e1000_init_function_pointers_82542(struct e1000_hw *hw) __attribute__((weak));
+extern void    e1000_init_function_pointers_82543(struct e1000_hw *hw) __attribute__((weak));
+extern void    e1000_init_function_pointers_82540(struct e1000_hw *hw) __attribute__((weak));
+extern void    e1000_init_function_pointers_82541(struct e1000_hw *hw) __attribute__((weak));
+
+s32  e1000_set_mac_type(struct e1000_hw *hw);
+s32  e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device);
+s32  e1000_init_mac_params(struct e1000_hw *hw);
+s32  e1000_init_nvm_params(struct e1000_hw *hw);
+s32  e1000_init_phy_params(struct e1000_hw *hw);
+s32  e1000_get_bus_info(struct e1000_hw *hw);
+void e1000_clear_vfta(struct e1000_hw *hw);
+void e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
+s32  e1000_force_mac_fc(struct e1000_hw *hw);
+s32  e1000_check_for_link(struct e1000_hw *hw);
+s32  e1000_reset_hw(struct e1000_hw *hw);
+s32  e1000_init_hw(struct e1000_hw *hw);
+s32  e1000_setup_link(struct e1000_hw *hw);
+s32  e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed,
+                                u16 *duplex);
+s32  e1000_disable_pcie_master(struct e1000_hw *hw);
+void e1000_config_collision_dist(struct e1000_hw *hw);
+void e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
+void e1000_mta_set(struct e1000_hw *hw, u32 hash_value);
+u32  e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
+void e1000_update_mc_addr_list(struct e1000_hw *hw,
+                               u8 *mc_addr_list, u32 mc_addr_count);
+s32  e1000_setup_led(struct e1000_hw *hw);
+s32  e1000_cleanup_led(struct e1000_hw *hw);
+s32  e1000_check_reset_block(struct e1000_hw *hw);
+s32  e1000_blink_led(struct e1000_hw *hw);
+s32  e1000_led_on(struct e1000_hw *hw);
+s32  e1000_led_off(struct e1000_hw *hw);
+s32 e1000_id_led_init(struct e1000_hw *hw);
+void e1000_reset_adaptive(struct e1000_hw *hw);
+void e1000_update_adaptive(struct e1000_hw *hw);
+#if 0
+s32  e1000_get_cable_length(struct e1000_hw *hw);
+#endif
+s32  e1000_validate_mdi_setting(struct e1000_hw *hw);
+s32  e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_get_phy_info(struct e1000_hw *hw);
+void e1000_release_phy(struct e1000_hw *hw);
+s32  e1000_acquire_phy(struct e1000_hw *hw);
+s32  e1000_phy_hw_reset(struct e1000_hw *hw);
+s32  e1000_phy_commit(struct e1000_hw *hw);
+void e1000_power_up_phy(struct e1000_hw *hw);
+void e1000_power_down_phy(struct e1000_hw *hw);
+s32  e1000_read_mac_addr(struct e1000_hw *hw);
+s32  e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num);
+void e1000_reload_nvm(struct e1000_hw *hw);
+s32  e1000_update_nvm_checksum(struct e1000_hw *hw);
+s32  e1000_validate_nvm_checksum(struct e1000_hw *hw);
+s32  e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+s32  e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words,
+                     u16 *data);
+s32  e1000_wait_autoneg(struct e1000_hw *hw);
+s32  e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+s32  e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
+bool e1000_check_mng_mode(struct e1000_hw *hw);
+bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
+s32  e1000_mng_enable_host_if(struct e1000_hw *hw);
+s32  e1000_mng_host_if_write(struct e1000_hw *hw,
+                             u8 *buffer, u16 length, u16 offset, u8 *sum);
+s32  e1000_mng_write_cmd_header(struct e1000_hw *hw,
+                                struct e1000_host_mng_command_header *hdr);
+s32  e1000_mng_write_dhcp_info(struct e1000_hw * hw,
+                                    u8 *buffer, u16 length);
+u32  e1000_translate_register_82542(u32 reg) __attribute__((weak));
+
+extern int e1000_probe(struct pci_device *pdev);
+extern void e1000_remove(struct pci_device *pdev);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,35 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+REQUIRE_OBJECT(e1000_main);
+REQUIRE_OBJECT(e1000_82540);
+REQUIRE_OBJECT(e1000_82541);
+REQUIRE_OBJECT(e1000_82542);
+REQUIRE_OBJECT(e1000_82543);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_defines.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_defines.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_defines.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_defines.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1416 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_DEFINES_H_
+#define _E1000_DEFINES_H_
+
+/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
+#define REQ_TX_DESCRIPTOR_MULTIPLE  8
+#define REQ_RX_DESCRIPTOR_MULTIPLE  8
+
+/* Definitions for power management and wakeup registers */
+/* Wake Up Control */
+#define E1000_WUC_APME       0x00000001 /* APM Enable */
+#define E1000_WUC_PME_EN     0x00000002 /* PME Enable */
+#define E1000_WUC_PME_STATUS 0x00000004 /* PME Status */
+#define E1000_WUC_APMPME     0x00000008 /* Assert PME on APM Wakeup */
+#define E1000_WUC_LSCWE      0x00000010 /* Link Status wake up enable */
+#define E1000_WUC_LSCWO      0x00000020 /* Link Status wake up override */
+#define E1000_WUC_SPM        0x80000000 /* Enable SPM */
+#define E1000_WUC_PHY_WAKE   0x00000100 /* if PHY supports wakeup */
+
+/* Wake Up Filter Control */
+#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
+#define E1000_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
+#define E1000_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
+#define E1000_WUFC_MC   0x00000008 /* Directed Multicast Wakeup Enable */
+#define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */
+#define E1000_WUFC_ARP  0x00000020 /* ARP Request Packet Wakeup Enable */
+#define E1000_WUFC_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Enable */
+#define E1000_WUFC_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Enable */
+#define E1000_WUFC_IGNORE_TCO   0x00008000 /* Ignore WakeOn TCO packets */
+#define E1000_WUFC_FLX0 0x00010000 /* Flexible Filter 0 Enable */
+#define E1000_WUFC_FLX1 0x00020000 /* Flexible Filter 1 Enable */
+#define E1000_WUFC_FLX2 0x00040000 /* Flexible Filter 2 Enable */
+#define E1000_WUFC_FLX3 0x00080000 /* Flexible Filter 3 Enable */
+#define E1000_WUFC_ALL_FILTERS  0x000F00FF /* Mask for all wakeup filters */
+#define E1000_WUFC_FLX_OFFSET   16 /* Offset to the Flexible Filters bits */
+#define E1000_WUFC_FLX_FILTERS  0x000F0000 /*Mask for the 4 flexible filters */
+
+/* Wake Up Status */
+#define E1000_WUS_LNKC         E1000_WUFC_LNKC
+#define E1000_WUS_MAG          E1000_WUFC_MAG
+#define E1000_WUS_EX           E1000_WUFC_EX
+#define E1000_WUS_MC           E1000_WUFC_MC
+#define E1000_WUS_BC           E1000_WUFC_BC
+#define E1000_WUS_ARP          E1000_WUFC_ARP
+#define E1000_WUS_IPV4         E1000_WUFC_IPV4
+#define E1000_WUS_IPV6         E1000_WUFC_IPV6
+#define E1000_WUS_FLX0         E1000_WUFC_FLX0
+#define E1000_WUS_FLX1         E1000_WUFC_FLX1
+#define E1000_WUS_FLX2         E1000_WUFC_FLX2
+#define E1000_WUS_FLX3         E1000_WUFC_FLX3
+#define E1000_WUS_FLX_FILTERS  E1000_WUFC_FLX_FILTERS
+
+/* Wake Up Packet Length */
+#define E1000_WUPL_LENGTH_MASK 0x0FFF   /* Only the lower 12 bits are valid */
+
+/* Four Flexible Filters are supported */
+#define E1000_FLEXIBLE_FILTER_COUNT_MAX 4
+
+/* Each Flexible Filter is at most 128 (0x80) bytes in length */
+#define E1000_FLEXIBLE_FILTER_SIZE_MAX  128
+
+#define E1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX
+#define E1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+#define E1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+
+/* Extended Device Control */
+#define E1000_CTRL_EXT_GPI0_EN   0x00000001 /* Maps SDP4 to GPI0 */
+#define E1000_CTRL_EXT_GPI1_EN   0x00000002 /* Maps SDP5 to GPI1 */
+#define E1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN
+#define E1000_CTRL_EXT_GPI2_EN   0x00000004 /* Maps SDP6 to GPI2 */
+#define E1000_CTRL_EXT_GPI3_EN   0x00000008 /* Maps SDP7 to GPI3 */
+/* Reserved (bits 4,5) in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* Value of SW Definable Pin 4 */
+#define E1000_CTRL_EXT_SDP5_DATA 0x00000020 /* Value of SW Definable Pin 5 */
+#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
+#define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Definable Pin 6 */
+#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */
+/* SDP 4/5 (bits 8,9) are reserved in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DIR  0x00000100 /* Direction of SDP4 0=in 1=out */
+#define E1000_CTRL_EXT_SDP5_DIR  0x00000200 /* Direction of SDP5 0=in 1=out */
+#define E1000_CTRL_EXT_SDP6_DIR  0x00000400 /* Direction of SDP6 0=in 1=out */
+#define E1000_CTRL_EXT_SDP7_DIR  0x00000800 /* Direction of SDP7 0=in 1=out */
+#define E1000_CTRL_EXT_ASDCHK    0x00001000 /* Initiate an ASD sequence */
+#define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from EEPROM */
+#define E1000_CTRL_EXT_IPS       0x00004000 /* Invert Power State */
+#define E1000_CTRL_EXT_SPD_BYPS  0x00008000 /* Speed Select Bypass */
+#define E1000_CTRL_EXT_RO_DIS    0x00020000 /* Relaxed Ordering disable */
+#define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */
+#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_TBI  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_KMRN    0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_PCIX_SERDES  0x00800000
+#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
+#define E1000_CTRL_EXT_EIAME          0x01000000
+#define E1000_CTRL_EXT_IRCA           0x00000001
+#define E1000_CTRL_EXT_WR_WMARK_MASK  0x03000000
+#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000
+#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
+#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
+#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
+#define E1000_CTRL_EXT_CANC           0x04000000 /* Int delay cancellation */
+#define E1000_CTRL_EXT_DRV_LOAD       0x10000000 /* Driver loaded bit for FW */
+/* IAME enable bit (27) was removed in >= 82575 */
+#define E1000_CTRL_EXT_IAME          0x08000000 /* Int acknowledge Auto-mask */
+#define E1000_CRTL_EXT_PB_PAREN       0x01000000 /* packet buffer parity error
+                                                  * detection enabled */
+#define E1000_CTRL_EXT_DF_PAREN       0x02000000 /* descriptor FIFO parity
+                                                  * error detection enable */
+#define E1000_CTRL_EXT_GHOST_PAREN    0x40000000
+#define E1000_CTRL_EXT_PBA_CLR        0x80000000 /* PBA Clear */
+#define E1000_I2CCMD_REG_ADDR_SHIFT   16
+#define E1000_I2CCMD_REG_ADDR         0x00FF0000
+#define E1000_I2CCMD_PHY_ADDR_SHIFT   24
+#define E1000_I2CCMD_PHY_ADDR         0x07000000
+#define E1000_I2CCMD_OPCODE_READ      0x08000000
+#define E1000_I2CCMD_OPCODE_WRITE     0x00000000
+#define E1000_I2CCMD_RESET            0x10000000
+#define E1000_I2CCMD_READY            0x20000000
+#define E1000_I2CCMD_INTERRUPT_ENA    0x40000000
+#define E1000_I2CCMD_ERROR            0x80000000
+#define E1000_MAX_SGMII_PHY_REG_ADDR  255
+#define E1000_I2CCMD_PHY_TIMEOUT      200
+
+/* Receive Descriptor bit definitions */
+#define E1000_RXD_STAT_DD       0x01    /* Descriptor Done */
+#define E1000_RXD_STAT_EOP      0x02    /* End of Packet */
+#define E1000_RXD_STAT_IXSM     0x04    /* Ignore checksum */
+#define E1000_RXD_STAT_VP       0x08    /* IEEE VLAN Packet */
+#define E1000_RXD_STAT_UDPCS    0x10    /* UDP xsum calculated */
+#define E1000_RXD_STAT_TCPCS    0x20    /* TCP xsum calculated */
+#define E1000_RXD_STAT_IPCS     0x40    /* IP xsum calculated */
+#define E1000_RXD_STAT_PIF      0x80    /* passed in-exact filter */
+#define E1000_RXD_STAT_CRCV     0x100   /* Speculative CRC Valid */
+#define E1000_RXD_STAT_IPIDV    0x200   /* IP identification valid */
+#define E1000_RXD_STAT_UDPV     0x400   /* Valid UDP checksum */
+#define E1000_RXD_STAT_DYNINT   0x800   /* Pkt caused INT via DYNINT */
+#define E1000_RXD_STAT_ACK      0x8000  /* ACK Packet indication */
+#define E1000_RXD_ERR_CE        0x01    /* CRC Error */
+#define E1000_RXD_ERR_SE        0x02    /* Symbol Error */
+#define E1000_RXD_ERR_SEQ       0x04    /* Sequence Error */
+#define E1000_RXD_ERR_CXE       0x10    /* Carrier Extension Error */
+#define E1000_RXD_ERR_TCPE      0x20    /* TCP/UDP Checksum Error */
+#define E1000_RXD_ERR_IPE       0x40    /* IP Checksum Error */
+#define E1000_RXD_ERR_RXE       0x80    /* Rx Data Error */
+#define E1000_RXD_SPC_VLAN_MASK 0x0FFF  /* VLAN ID is in lower 12 bits */
+#define E1000_RXD_SPC_PRI_MASK  0xE000  /* Priority is in upper 3 bits */
+#define E1000_RXD_SPC_PRI_SHIFT 13
+#define E1000_RXD_SPC_CFI_MASK  0x1000  /* CFI is bit 12 */
+#define E1000_RXD_SPC_CFI_SHIFT 12
+
+#define E1000_RXDEXT_STATERR_CE    0x01000000
+#define E1000_RXDEXT_STATERR_SE    0x02000000
+#define E1000_RXDEXT_STATERR_SEQ   0x04000000
+#define E1000_RXDEXT_STATERR_CXE   0x10000000
+#define E1000_RXDEXT_STATERR_TCPE  0x20000000
+#define E1000_RXDEXT_STATERR_IPE   0x40000000
+#define E1000_RXDEXT_STATERR_RXE   0x80000000
+
+/* mask to determine if packets should be dropped due to frame errors */
+#define E1000_RXD_ERR_FRAME_ERR_MASK ( \
+    E1000_RXD_ERR_CE  |                \
+    E1000_RXD_ERR_SE  |                \
+    E1000_RXD_ERR_SEQ |                \
+    E1000_RXD_ERR_CXE |                \
+    E1000_RXD_ERR_RXE)
+
+/* Same mask, but for extended and packet split descriptors */
+#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
+    E1000_RXDEXT_STATERR_CE  |            \
+    E1000_RXDEXT_STATERR_SE  |            \
+    E1000_RXDEXT_STATERR_SEQ |            \
+    E1000_RXDEXT_STATERR_CXE |            \
+    E1000_RXDEXT_STATERR_RXE)
+
+#define E1000_MRQC_ENABLE_MASK                 0x00000007
+#define E1000_MRQC_ENABLE_RSS_2Q               0x00000001
+#define E1000_MRQC_ENABLE_RSS_INT              0x00000004
+#define E1000_MRQC_RSS_FIELD_MASK              0xFFFF0000
+#define E1000_MRQC_RSS_FIELD_IPV4_TCP          0x00010000
+#define E1000_MRQC_RSS_FIELD_IPV4              0x00020000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX       0x00040000
+#define E1000_MRQC_RSS_FIELD_IPV6_EX           0x00080000
+#define E1000_MRQC_RSS_FIELD_IPV6              0x00100000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP          0x00200000
+
+#define E1000_RXDPS_HDRSTAT_HDRSP              0x00008000
+#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK        0x000003FF
+
+/* Management Control */
+#define E1000_MANC_SMBUS_EN      0x00000001 /* SMBus Enabled - RO */
+#define E1000_MANC_ASF_EN        0x00000002 /* ASF Enabled - RO */
+#define E1000_MANC_R_ON_FORCE    0x00000004 /* Reset on Force TCO - RO */
+#define E1000_MANC_RMCP_EN       0x00000100 /* Enable RCMP 026Fh Filtering */
+#define E1000_MANC_0298_EN       0x00000200 /* Enable RCMP 0298h Filtering */
+#define E1000_MANC_IPV4_EN       0x00000400 /* Enable IPv4 */
+#define E1000_MANC_IPV6_EN       0x00000800 /* Enable IPv6 */
+#define E1000_MANC_SNAP_EN       0x00001000 /* Accept LLC/SNAP */
+#define E1000_MANC_ARP_EN        0x00002000 /* Enable ARP Request Filtering */
+/* Enable Neighbor Discovery Filtering */
+#define E1000_MANC_NEIGHBOR_EN   0x00004000
+#define E1000_MANC_ARP_RES_EN    0x00008000 /* Enable ARP response Filtering */
+#define E1000_MANC_TCO_RESET     0x00010000 /* TCO Reset Occurred */
+#define E1000_MANC_RCV_TCO_EN    0x00020000 /* Receive TCO Packets Enabled */
+#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */
+#define E1000_MANC_RCV_ALL       0x00080000 /* Receive All Enabled */
+#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000 /* Block phy resets */
+/* Enable MAC address filtering */
+#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000
+/* Enable MNG packets to host memory */
+#define E1000_MANC_EN_MNG2HOST   0x00200000
+/* Enable IP address filtering */
+#define E1000_MANC_EN_IP_ADDR_FILTER    0x00400000
+#define E1000_MANC_EN_XSUM_FILTER   0x00800000 /* Enable checksum filtering */
+#define E1000_MANC_BR_EN            0x01000000 /* Enable broadcast filtering */
+#define E1000_MANC_SMB_REQ       0x01000000 /* SMBus Request */
+#define E1000_MANC_SMB_GNT       0x02000000 /* SMBus Grant */
+#define E1000_MANC_SMB_CLK_IN    0x04000000 /* SMBus Clock In */
+#define E1000_MANC_SMB_DATA_IN   0x08000000 /* SMBus Data In */
+#define E1000_MANC_SMB_DATA_OUT  0x10000000 /* SMBus Data Out */
+#define E1000_MANC_SMB_CLK_OUT   0x20000000 /* SMBus Clock Out */
+
+#define E1000_MANC_SMB_DATA_OUT_SHIFT  28 /* SMBus Data Out Shift */
+#define E1000_MANC_SMB_CLK_OUT_SHIFT   29 /* SMBus Clock Out Shift */
+
+/* Receive Control */
+#define E1000_RCTL_RST            0x00000001    /* Software reset */
+#define E1000_RCTL_EN             0x00000002    /* enable */
+#define E1000_RCTL_SBP            0x00000004    /* store bad packet */
+#define E1000_RCTL_UPE            0x00000008    /* unicast promisc enable */
+#define E1000_RCTL_MPE            0x00000010    /* multicast promisc enable */
+#define E1000_RCTL_LPE            0x00000020    /* long packet enable */
+#define E1000_RCTL_LBM_NO         0x00000000    /* no loopback mode */
+#define E1000_RCTL_LBM_MAC        0x00000040    /* MAC loopback mode */
+#define E1000_RCTL_LBM_SLP        0x00000080    /* serial link loopback mode */
+#define E1000_RCTL_LBM_TCVR       0x000000C0    /* tcvr loopback mode */
+#define E1000_RCTL_DTYP_MASK      0x00000C00    /* Descriptor type mask */
+#define E1000_RCTL_DTYP_PS        0x00000400    /* Packet Split descriptor */
+#define E1000_RCTL_RDMTS_HALF     0x00000000    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_QUAT     0x00000100    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_EIGTH    0x00000200    /* rx desc min thresh size */
+#define E1000_RCTL_MO_SHIFT       12            /* multicast offset shift */
+#define E1000_RCTL_MO_0           0x00000000    /* multicast offset 11:0 */
+#define E1000_RCTL_MO_1           0x00001000    /* multicast offset 12:1 */
+#define E1000_RCTL_MO_2           0x00002000    /* multicast offset 13:2 */
+#define E1000_RCTL_MO_3           0x00003000    /* multicast offset 15:4 */
+#define E1000_RCTL_MDR            0x00004000    /* multicast desc ring 0 */
+#define E1000_RCTL_BAM            0x00008000    /* broadcast enable */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
+#define E1000_RCTL_SZ_2048        0x00000000    /* rx buffer size 2048 */
+#define E1000_RCTL_SZ_1024        0x00010000    /* rx buffer size 1024 */
+#define E1000_RCTL_SZ_512         0x00020000    /* rx buffer size 512 */
+#define E1000_RCTL_SZ_256         0x00030000    /* rx buffer size 256 */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 1 */
+#define E1000_RCTL_SZ_16384       0x00010000    /* rx buffer size 16384 */
+#define E1000_RCTL_SZ_8192        0x00020000    /* rx buffer size 8192 */
+#define E1000_RCTL_SZ_4096        0x00030000    /* rx buffer size 4096 */
+#define E1000_RCTL_VFE            0x00040000    /* vlan filter enable */
+#define E1000_RCTL_CFIEN          0x00080000    /* canonical form enable */
+#define E1000_RCTL_CFI            0x00100000    /* canonical form indicator */
+#define E1000_RCTL_DPF            0x00400000    /* discard pause frames */
+#define E1000_RCTL_PMCF           0x00800000    /* pass MAC control frames */
+#define E1000_RCTL_BSEX           0x02000000    /* Buffer size extension */
+#define E1000_RCTL_SECRC          0x04000000    /* Strip Ethernet CRC */
+#define E1000_RCTL_FLXBUF_MASK    0x78000000    /* Flexible buffer size */
+#define E1000_RCTL_FLXBUF_SHIFT   27            /* Flexible buffer shift */
+
+/*
+ * Use byte values for the following shift parameters
+ * Usage:
+ *     psrctl |= (((ROUNDUP(value0, 128) >> E1000_PSRCTL_BSIZE0_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE0_MASK) |
+ *                ((ROUNDUP(value1, 1024) >> E1000_PSRCTL_BSIZE1_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE1_MASK) |
+ *                ((ROUNDUP(value2, 1024) << E1000_PSRCTL_BSIZE2_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE2_MASK) |
+ *                ((ROUNDUP(value3, 1024) << E1000_PSRCTL_BSIZE3_SHIFT) |;
+ *                  E1000_PSRCTL_BSIZE3_MASK))
+ * where value0 = [128..16256],  default=256
+ *       value1 = [1024..64512], default=4096
+ *       value2 = [0..64512],    default=4096
+ *       value3 = [0..64512],    default=0
+ */
+
+#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F
+#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00
+#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000
+#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000
+
+#define E1000_PSRCTL_BSIZE0_SHIFT  7            /* Shift _right_ 7 */
+#define E1000_PSRCTL_BSIZE1_SHIFT  2            /* Shift _right_ 2 */
+#define E1000_PSRCTL_BSIZE2_SHIFT  6            /* Shift _left_ 6 */
+#define E1000_PSRCTL_BSIZE3_SHIFT 14            /* Shift _left_ 14 */
+
+/* SWFW_SYNC Definitions */
+#define E1000_SWFW_EEP_SM   0x01
+#define E1000_SWFW_PHY0_SM  0x02
+#define E1000_SWFW_PHY1_SM  0x04
+#define E1000_SWFW_CSR_SM   0x08
+
+/* FACTPS Definitions */
+#define E1000_FACTPS_LFS    0x40000000  /* LAN Function Select */
+/* Device Control */
+#define E1000_CTRL_FD       0x00000001  /* Full duplex.0=half; 1=full */
+#define E1000_CTRL_BEM      0x00000002  /* Endian Mode.0=little,1=big */
+#define E1000_CTRL_PRIOR    0x00000004  /* Priority on PCI. 0=rx,1=fair */
+#define E1000_CTRL_GIO_MASTER_DISABLE 0x00000004 /*Blocks new Master reqs */
+#define E1000_CTRL_LRST     0x00000008  /* Link reset. 0=normal,1=reset */
+#define E1000_CTRL_TME      0x00000010  /* Test mode. 0=normal,1=test */
+#define E1000_CTRL_SLE      0x00000020  /* Serial Link on 0=dis,1=en */
+#define E1000_CTRL_ASDE     0x00000020  /* Auto-speed detect enable */
+#define E1000_CTRL_SLU      0x00000040  /* Set link up (Force Link) */
+#define E1000_CTRL_ILOS     0x00000080  /* Invert Loss-Of Signal */
+#define E1000_CTRL_SPD_SEL  0x00000300  /* Speed Select Mask */
+#define E1000_CTRL_SPD_10   0x00000000  /* Force 10Mb */
+#define E1000_CTRL_SPD_100  0x00000100  /* Force 100Mb */
+#define E1000_CTRL_SPD_1000 0x00000200  /* Force 1Gb */
+#define E1000_CTRL_BEM32    0x00000400  /* Big Endian 32 mode */
+#define E1000_CTRL_FRCSPD   0x00000800  /* Force Speed */
+#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */
+#define E1000_CTRL_D_UD_EN  0x00002000  /* Dock/Undock enable */
+#define E1000_CTRL_D_UD_POLARITY 0x00004000 /* Defined polarity of Dock/Undock
+                                             * indication in SDP[0] */
+#define E1000_CTRL_FORCE_PHY_RESET 0x00008000 /* Reset both PHY ports, through
+                                               * PHYRST_N pin */
+#define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external
+                                           * LINK_0 and LINK_1 pins */
+#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */
+#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */
+#define E1000_CTRL_SWDPIN2  0x00100000  /* SWDPIN 2 value */
+#define E1000_CTRL_SWDPIN3  0x00200000  /* SWDPIN 3 value */
+#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */
+#define E1000_CTRL_SWDPIO1  0x00800000  /* SWDPIN 1 input or output */
+#define E1000_CTRL_SWDPIO2  0x01000000  /* SWDPIN 2 input or output */
+#define E1000_CTRL_SWDPIO3  0x02000000  /* SWDPIN 3 input or output */
+#define E1000_CTRL_RST      0x04000000  /* Global reset */
+#define E1000_CTRL_RFCE     0x08000000  /* Receive Flow Control enable */
+#define E1000_CTRL_TFCE     0x10000000  /* Transmit flow control enable */
+#define E1000_CTRL_RTE      0x20000000  /* Routing tag enable */
+#define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
+#define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
+#define E1000_CTRL_SW2FW_INT 0x02000000 /* Initiate an interrupt to ME */
+#define E1000_CTRL_I2C_ENA  0x02000000  /* I2C enable */
+
+/*
+ * Bit definitions for the Management Data IO (MDIO) and Management Data
+ * Clock (MDC) pins in the Device Control Register.
+ */
+#define E1000_CTRL_PHY_RESET_DIR  E1000_CTRL_SWDPIO0
+#define E1000_CTRL_PHY_RESET      E1000_CTRL_SWDPIN0
+#define E1000_CTRL_MDIO_DIR       E1000_CTRL_SWDPIO2
+#define E1000_CTRL_MDIO           E1000_CTRL_SWDPIN2
+#define E1000_CTRL_MDC_DIR        E1000_CTRL_SWDPIO3
+#define E1000_CTRL_MDC            E1000_CTRL_SWDPIN3
+#define E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR
+#define E1000_CTRL_PHY_RESET4     E1000_CTRL_EXT_SDP4_DATA
+
+#define E1000_CONNSW_ENRGSRC             0x4
+#define E1000_PCS_CFG_PCS_EN             8
+#define E1000_PCS_LCTL_FLV_LINK_UP       1
+#define E1000_PCS_LCTL_FSV_10            0
+#define E1000_PCS_LCTL_FSV_100           2
+#define E1000_PCS_LCTL_FSV_1000          4
+#define E1000_PCS_LCTL_FDV_FULL          8
+#define E1000_PCS_LCTL_FSD               0x10
+#define E1000_PCS_LCTL_FORCE_LINK        0x20
+#define E1000_PCS_LCTL_LOW_LINK_LATCH    0x40
+#define E1000_PCS_LCTL_FORCE_FCTRL       0x80
+#define E1000_PCS_LCTL_AN_ENABLE         0x10000
+#define E1000_PCS_LCTL_AN_RESTART        0x20000
+#define E1000_PCS_LCTL_AN_TIMEOUT        0x40000
+#define E1000_PCS_LCTL_AN_SGMII_BYPASS   0x80000
+#define E1000_PCS_LCTL_AN_SGMII_TRIGGER  0x100000
+#define E1000_PCS_LCTL_FAST_LINK_TIMER   0x1000000
+#define E1000_PCS_LCTL_LINK_OK_FIX       0x2000000
+#define E1000_PCS_LCTL_CRS_ON_NI         0x4000000
+#define E1000_ENABLE_SERDES_LOOPBACK     0x0410
+
+#define E1000_PCS_LSTS_LINK_OK           1
+#define E1000_PCS_LSTS_SPEED_10          0
+#define E1000_PCS_LSTS_SPEED_100         2
+#define E1000_PCS_LSTS_SPEED_1000        4
+#define E1000_PCS_LSTS_DUPLEX_FULL       8
+#define E1000_PCS_LSTS_SYNK_OK           0x10
+#define E1000_PCS_LSTS_AN_COMPLETE       0x10000
+#define E1000_PCS_LSTS_AN_PAGE_RX        0x20000
+#define E1000_PCS_LSTS_AN_TIMED_OUT      0x40000
+#define E1000_PCS_LSTS_AN_REMOTE_FAULT   0x80000
+#define E1000_PCS_LSTS_AN_ERROR_RWS      0x100000
+
+/* Device Status */
+#define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
+#define E1000_STATUS_LU         0x00000002      /* Link up.0=no,1=link */
+#define E1000_STATUS_FUNC_MASK  0x0000000C      /* PCI Function Mask */
+#define E1000_STATUS_FUNC_SHIFT 2
+#define E1000_STATUS_FUNC_0     0x00000000      /* Function 0 */
+#define E1000_STATUS_FUNC_1     0x00000004      /* Function 1 */
+#define E1000_STATUS_TXOFF      0x00000010      /* transmission paused */
+#define E1000_STATUS_TBIMODE    0x00000020      /* TBI mode */
+#define E1000_STATUS_SPEED_MASK 0x000000C0
+#define E1000_STATUS_SPEED_10   0x00000000      /* Speed 10Mb/s */
+#define E1000_STATUS_SPEED_100  0x00000040      /* Speed 100Mb/s */
+#define E1000_STATUS_SPEED_1000 0x00000080      /* Speed 1000Mb/s */
+#define E1000_STATUS_LAN_INIT_DONE 0x00000200  /* Lan Init Completion by NVM */
+#define E1000_STATUS_ASDV       0x00000300      /* Auto speed detect value */
+#define E1000_STATUS_PHYRA      0x00000400      /* PHY Reset Asserted */
+#define E1000_STATUS_DOCK_CI    0x00000800      /* Change in Dock/Undock state.
+                                                 * Clear on write '0'. */
+#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Master request status */
+#define E1000_STATUS_MTXCKOK    0x00000400      /* MTX clock running OK */
+#define E1000_STATUS_PCI66      0x00000800      /* In 66Mhz slot */
+#define E1000_STATUS_BUS64      0x00001000      /* In 64 bit slot */
+#define E1000_STATUS_PCIX_MODE  0x00002000      /* PCI-X mode */
+#define E1000_STATUS_PCIX_SPEED 0x0000C000      /* PCI-X bus speed */
+#define E1000_STATUS_BMC_SKU_0  0x00100000 /* BMC USB redirect disabled */
+#define E1000_STATUS_BMC_SKU_1  0x00200000 /* BMC SRAM disabled */
+#define E1000_STATUS_BMC_SKU_2  0x00400000 /* BMC SDRAM disabled */
+#define E1000_STATUS_BMC_CRYPTO 0x00800000 /* BMC crypto disabled */
+#define E1000_STATUS_BMC_LITE   0x01000000 /* BMC external code execution
+                                            * disabled */
+#define E1000_STATUS_RGMII_ENABLE 0x02000000 /* RGMII disabled */
+#define E1000_STATUS_FUSE_8       0x04000000
+#define E1000_STATUS_FUSE_9       0x08000000
+#define E1000_STATUS_SERDES0_DIS  0x10000000 /* SERDES disabled on port 0 */
+#define E1000_STATUS_SERDES1_DIS  0x20000000 /* SERDES disabled on port 1 */
+
+/* Constants used to interpret the masked PCI-X bus speed. */
+#define E1000_STATUS_PCIX_SPEED_66  0x00000000 /* PCI-X bus speed 50-66 MHz */
+#define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus speed 66-100 MHz */
+#define E1000_STATUS_PCIX_SPEED_133 0x00008000 /*PCI-X bus speed 100-133 MHz*/
+
+#define SPEED_10    10
+#define SPEED_100   100
+#define SPEED_1000  1000
+#define HALF_DUPLEX 1
+#define FULL_DUPLEX 2
+
+#define PHY_FORCE_TIME   20
+
+#define ADVERTISE_10_HALF                 0x0001
+#define ADVERTISE_10_FULL                 0x0002
+#define ADVERTISE_100_HALF                0x0004
+#define ADVERTISE_100_FULL                0x0008
+#define ADVERTISE_1000_HALF               0x0010 /* Not used, just FYI */
+#define ADVERTISE_1000_FULL               0x0020
+
+/* 1000/H is not supported, nor spec-compliant. */
+#define E1000_ALL_SPEED_DUPLEX  (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_NOT_GIG       (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_100_SPEED    (ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_10_SPEED      (ADVERTISE_10_HALF |   ADVERTISE_10_FULL)
+#define E1000_ALL_FULL_DUPLEX   (ADVERTISE_10_FULL |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_HALF_DUPLEX   (ADVERTISE_10_HALF |  ADVERTISE_100_HALF)
+
+#define AUTONEG_ADVERTISE_SPEED_DEFAULT   E1000_ALL_SPEED_DUPLEX
+
+/* LED Control */
+#define E1000_LEDCTL_LED0_MODE_MASK       0x0000000F
+#define E1000_LEDCTL_LED0_MODE_SHIFT      0
+#define E1000_LEDCTL_LED0_BLINK_RATE      0x00000020
+#define E1000_LEDCTL_LED0_IVRT            0x00000040
+#define E1000_LEDCTL_LED0_BLINK           0x00000080
+#define E1000_LEDCTL_LED1_MODE_MASK       0x00000F00
+#define E1000_LEDCTL_LED1_MODE_SHIFT      8
+#define E1000_LEDCTL_LED1_BLINK_RATE      0x00002000
+#define E1000_LEDCTL_LED1_IVRT            0x00004000
+#define E1000_LEDCTL_LED1_BLINK           0x00008000
+#define E1000_LEDCTL_LED2_MODE_MASK       0x000F0000
+#define E1000_LEDCTL_LED2_MODE_SHIFT      16
+#define E1000_LEDCTL_LED2_BLINK_RATE      0x00200000
+#define E1000_LEDCTL_LED2_IVRT            0x00400000
+#define E1000_LEDCTL_LED2_BLINK           0x00800000
+#define E1000_LEDCTL_LED3_MODE_MASK       0x0F000000
+#define E1000_LEDCTL_LED3_MODE_SHIFT      24
+#define E1000_LEDCTL_LED3_BLINK_RATE      0x20000000
+#define E1000_LEDCTL_LED3_IVRT            0x40000000
+#define E1000_LEDCTL_LED3_BLINK           0x80000000
+
+#define E1000_LEDCTL_MODE_LINK_10_1000  0x0
+#define E1000_LEDCTL_MODE_LINK_100_1000 0x1
+#define E1000_LEDCTL_MODE_LINK_UP       0x2
+#define E1000_LEDCTL_MODE_ACTIVITY      0x3
+#define E1000_LEDCTL_MODE_LINK_ACTIVITY 0x4
+#define E1000_LEDCTL_MODE_LINK_10       0x5
+#define E1000_LEDCTL_MODE_LINK_100      0x6
+#define E1000_LEDCTL_MODE_LINK_1000     0x7
+#define E1000_LEDCTL_MODE_PCIX_MODE     0x8
+#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9
+#define E1000_LEDCTL_MODE_COLLISION     0xA
+#define E1000_LEDCTL_MODE_BUS_SPEED     0xB
+#define E1000_LEDCTL_MODE_BUS_SIZE      0xC
+#define E1000_LEDCTL_MODE_PAUSED        0xD
+#define E1000_LEDCTL_MODE_LED_ON        0xE
+#define E1000_LEDCTL_MODE_LED_OFF       0xF
+
+/* Transmit Descriptor bit definitions */
+#define E1000_TXD_DTYP_D     0x00100000 /* Data Descriptor */
+#define E1000_TXD_DTYP_C     0x00000000 /* Context Descriptor */
+#define E1000_TXD_POPTS_SHIFT 8         /* POPTS shift */
+#define E1000_TXD_POPTS_IXSM 0x01       /* Insert IP checksum */
+#define E1000_TXD_POPTS_TXSM 0x02       /* Insert TCP/UDP checksum */
+#define E1000_TXD_CMD_EOP    0x01000000 /* End of Packet */
+#define E1000_TXD_CMD_IFCS   0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_TXD_CMD_IC     0x04000000 /* Insert Checksum */
+#define E1000_TXD_CMD_RS     0x08000000 /* Report Status */
+#define E1000_TXD_CMD_RPS    0x10000000 /* Report Packet Sent */
+#define E1000_TXD_CMD_DEXT   0x20000000 /* Descriptor extension (0 = legacy) */
+#define E1000_TXD_CMD_VLE    0x40000000 /* Add VLAN tag */
+#define E1000_TXD_CMD_IDE    0x80000000 /* Enable Tidv register */
+#define E1000_TXD_STAT_DD    0x00000001 /* Descriptor Done */
+#define E1000_TXD_STAT_EC    0x00000002 /* Excess Collisions */
+#define E1000_TXD_STAT_LC    0x00000004 /* Late Collisions */
+#define E1000_TXD_STAT_TU    0x00000008 /* Transmit underrun */
+#define E1000_TXD_CMD_TCP    0x01000000 /* TCP packet */
+#define E1000_TXD_CMD_IP     0x02000000 /* IP packet */
+#define E1000_TXD_CMD_TSE    0x04000000 /* TCP Seg enable */
+#define E1000_TXD_STAT_TC    0x00000004 /* Tx Underrun */
+/* Extended desc bits for Linksec and timesync */
+
+/* Transmit Control */
+#define E1000_TCTL_RST    0x00000001    /* software reset */
+#define E1000_TCTL_EN     0x00000002    /* enable tx */
+#define E1000_TCTL_BCE    0x00000004    /* busy check enable */
+#define E1000_TCTL_PSP    0x00000008    /* pad short packets */
+#define E1000_TCTL_CT     0x00000ff0    /* collision threshold */
+#define E1000_TCTL_COLD   0x003ff000    /* collision distance */
+#define E1000_TCTL_SWXOFF 0x00400000    /* SW Xoff transmission */
+#define E1000_TCTL_PBE    0x00800000    /* Packet Burst Enable */
+#define E1000_TCTL_RTLC   0x01000000    /* Re-transmit on late collision */
+#define E1000_TCTL_NRTU   0x02000000    /* No Re-transmit on underrun */
+#define E1000_TCTL_MULR   0x10000000    /* Multiple request support */
+
+/* Transmit Arbitration Count */
+#define E1000_TARC0_ENABLE     0x00000400   /* Enable Tx Queue 0 */
+
+/* SerDes Control */
+#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
+
+/* Receive Checksum Control */
+#define E1000_RXCSUM_PCSS_MASK 0x000000FF   /* Packet Checksum Start */
+#define E1000_RXCSUM_IPOFL     0x00000100   /* IPv4 checksum offload */
+#define E1000_RXCSUM_TUOFL     0x00000200   /* TCP / UDP checksum offload */
+#define E1000_RXCSUM_IPV6OFL   0x00000400   /* IPv6 checksum offload */
+#define E1000_RXCSUM_CRCOFL    0x00000800   /* CRC32 offload enable */
+#define E1000_RXCSUM_IPPCSE    0x00001000   /* IP payload checksum enable */
+#define E1000_RXCSUM_PCSD      0x00002000   /* packet checksum disabled */
+
+/* Header split receive */
+#define E1000_RFCTL_ISCSI_DIS           0x00000001
+#define E1000_RFCTL_ISCSI_DWC_MASK      0x0000003E
+#define E1000_RFCTL_ISCSI_DWC_SHIFT     1
+#define E1000_RFCTL_NFSW_DIS            0x00000040
+#define E1000_RFCTL_NFSR_DIS            0x00000080
+#define E1000_RFCTL_NFS_VER_MASK        0x00000300
+#define E1000_RFCTL_NFS_VER_SHIFT       8
+#define E1000_RFCTL_IPV6_DIS            0x00000400
+#define E1000_RFCTL_IPV6_XSUM_DIS       0x00000800
+#define E1000_RFCTL_ACK_DIS             0x00001000
+#define E1000_RFCTL_ACKD_DIS            0x00002000
+#define E1000_RFCTL_IPFRSP_DIS          0x00004000
+#define E1000_RFCTL_EXTEN               0x00008000
+#define E1000_RFCTL_IPV6_EX_DIS         0x00010000
+#define E1000_RFCTL_NEW_IPV6_EXT_DIS    0x00020000
+#define E1000_RFCTL_LEF                 0x00040000
+
+/* Collision related configuration parameters */
+#define E1000_COLLISION_THRESHOLD       15
+#define E1000_CT_SHIFT                  4
+#define E1000_COLLISION_DISTANCE        63
+#define E1000_COLD_SHIFT                12
+
+/* Default values for the transmit IPG register */
+#define DEFAULT_82542_TIPG_IPGT        10
+#define DEFAULT_82543_TIPG_IPGT_FIBER  9
+#define DEFAULT_82543_TIPG_IPGT_COPPER 8
+
+#define E1000_TIPG_IPGT_MASK  0x000003FF
+#define E1000_TIPG_IPGR1_MASK 0x000FFC00
+#define E1000_TIPG_IPGR2_MASK 0x3FF00000
+
+#define DEFAULT_82542_TIPG_IPGR1 2
+#define DEFAULT_82543_TIPG_IPGR1 8
+#define E1000_TIPG_IPGR1_SHIFT  10
+
+#define DEFAULT_82542_TIPG_IPGR2 10
+#define DEFAULT_82543_TIPG_IPGR2 6
+#define DEFAULT_80003ES2LAN_TIPG_IPGR2 7
+#define E1000_TIPG_IPGR2_SHIFT  20
+
+/* Ethertype field values */
+#define ETHERNET_IEEE_VLAN_TYPE 0x8100  /* 802.3ac packet */
+
+#define ETHERNET_FCS_SIZE       4
+#define MAX_JUMBO_FRAME_SIZE    0x3F00
+
+/* Extended Configuration Control and Size */
+#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP      0x00000020
+#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE       0x00000001
+#define E1000_EXTCNF_CTRL_SWFLAG                 0x00000020
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK   0x00FF0000
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT          16
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK   0x0FFF0000
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT          16
+
+#define E1000_PHY_CTRL_SPD_EN             0x00000001
+#define E1000_PHY_CTRL_D0A_LPLU           0x00000002
+#define E1000_PHY_CTRL_NOND0A_LPLU        0x00000004
+#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE 0x00000008
+#define E1000_PHY_CTRL_GBE_DISABLE        0x00000040
+
+#define E1000_KABGTXD_BGSQLBIAS           0x00050000
+
+/* PBA constants */
+#define E1000_PBA_6K  0x0006    /* 6KB */
+#define E1000_PBA_8K  0x0008    /* 8KB */
+#define E1000_PBA_10K 0x000A    /* 10KB */
+#define E1000_PBA_12K 0x000C    /* 12KB */
+#define E1000_PBA_14K 0x000E    /* 14KB */
+#define E1000_PBA_16K 0x0010    /* 16KB */
+#define E1000_PBA_18K 0x0012
+#define E1000_PBA_20K 0x0014
+#define E1000_PBA_22K 0x0016
+#define E1000_PBA_24K 0x0018
+#define E1000_PBA_26K 0x001A
+#define E1000_PBA_30K 0x001E
+#define E1000_PBA_32K 0x0020
+#define E1000_PBA_34K 0x0022
+#define E1000_PBA_35K 0x0023
+#define E1000_PBA_38K 0x0026
+#define E1000_PBA_40K 0x0028
+#define E1000_PBA_48K 0x0030    /* 48KB */
+#define E1000_PBA_64K 0x0040    /* 64KB */
+
+#define E1000_PBS_16K E1000_PBA_16K
+#define E1000_PBS_24K E1000_PBA_24K
+
+#define IFS_MAX       80
+#define IFS_MIN       40
+#define IFS_RATIO     4
+#define IFS_STEP      10
+#define MIN_NUM_XMITS 1000
+
+/* SW Semaphore Register */
+#define E1000_SWSM_SMBI         0x00000001 /* Driver Semaphore bit */
+#define E1000_SWSM_SWESMBI      0x00000002 /* FW Semaphore bit */
+#define E1000_SWSM_WMNG         0x00000004 /* Wake MNG Clock */
+#define E1000_SWSM_DRV_LOAD     0x00000008 /* Driver Loaded Bit */
+
+#define E1000_SWSM2_LOCK        0x00000002 /* Secondary driver semaphore bit */
+
+/* Interrupt Cause Read */
+#define E1000_ICR_TXDW          0x00000001 /* Transmit desc written back */
+#define E1000_ICR_TXQE          0x00000002 /* Transmit Queue empty */
+#define E1000_ICR_LSC           0x00000004 /* Link Status Change */
+#define E1000_ICR_RXSEQ         0x00000008 /* rx sequence error */
+#define E1000_ICR_RXDMT0        0x00000010 /* rx desc min. threshold (0) */
+#define E1000_ICR_RXO           0x00000040 /* rx overrun */
+#define E1000_ICR_RXT0          0x00000080 /* rx timer intr (ring 0) */
+#define E1000_ICR_VMMB          0x00000100 /* VM MB event */
+#define E1000_ICR_MDAC          0x00000200 /* MDIO access complete */
+#define E1000_ICR_RXCFG         0x00000400 /* Rx /c/ ordered set */
+#define E1000_ICR_GPI_EN0       0x00000800 /* GP Int 0 */
+#define E1000_ICR_GPI_EN1       0x00001000 /* GP Int 1 */
+#define E1000_ICR_GPI_EN2       0x00002000 /* GP Int 2 */
+#define E1000_ICR_GPI_EN3       0x00004000 /* GP Int 3 */
+#define E1000_ICR_TXD_LOW       0x00008000
+#define E1000_ICR_SRPD          0x00010000
+#define E1000_ICR_ACK           0x00020000 /* Receive Ack frame */
+#define E1000_ICR_MNG           0x00040000 /* Manageability event */
+#define E1000_ICR_DOCK          0x00080000 /* Dock/Undock */
+#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver
+                                            * should claim the interrupt */
+#define E1000_ICR_RXD_FIFO_PAR0 0x00100000 /* Q0 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR0 0x00200000 /* Q0 Tx desc FIFO parity error */
+#define E1000_ICR_HOST_ARB_PAR 0x00400000 /* host arb read buffer parity err */
+#define E1000_ICR_PB_PAR        0x00800000 /* packet buffer parity error */
+#define E1000_ICR_RXD_FIFO_PAR1 0x01000000 /* Q1 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR1 0x02000000 /* Q1 Tx desc FIFO parity error */
+#define E1000_ICR_ALL_PARITY    0x03F00000 /* all parity error bits */
+#define E1000_ICR_DSW           0x00000020 /* FW changed the status of DISSW
+                                            * bit in the FWSM */
+#define E1000_ICR_PHYINT        0x00001000 /* LAN connected device generates
+                                            * an interrupt */
+#define E1000_ICR_DOUTSYNC      0x10000000 /* NIC DMA out of sync */
+#define E1000_ICR_EPRST         0x00100000 /* ME hardware reset occurs */
+
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ */
+#define POLL_IMS_ENABLE_MASK ( \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ)
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXT0   = Receiver Timer Interrupt (ring 0)
+ *   o TXDW   = Transmit Descriptor Written Back
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ *   o LSC    = Link Status Change
+ */
+#define IMS_ENABLE_MASK ( \
+    E1000_IMS_RXT0   |    \
+    E1000_IMS_TXDW   |    \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ  |    \
+    E1000_IMS_LSC)
+
+/* Interrupt Mask Set */
+#define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_IMS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_IMS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_IMS_VMMB      E1000_ICR_VMMB      /* Mail box activity */
+#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_IMS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_IMS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_IMS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_IMS_SRPD      E1000_ICR_SRPD
+#define E1000_IMS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_IMS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_IMS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_IMS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_DSW       E1000_ICR_DSW
+#define E1000_IMS_PHYINT    E1000_ICR_PHYINT
+#define E1000_IMS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_IMS_EPRST     E1000_ICR_EPRST
+
+/* Interrupt Cause Set */
+#define E1000_ICS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_ICS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_ICS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_ICS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_ICS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_ICS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_ICS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_ICS_SRPD      E1000_ICR_SRPD
+#define E1000_ICS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_ICS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_ICS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_ICS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_DSW       E1000_ICR_DSW
+#define E1000_ICS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_ICS_PHYINT    E1000_ICR_PHYINT
+#define E1000_ICS_EPRST     E1000_ICR_EPRST
+
+/* Transmit Descriptor Control */
+#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */
+#define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */
+#define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */
+#define E1000_TXDCTL_GRAN    0x01000000 /* TXDCTL Granularity */
+#define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */
+#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
+#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */
+/* Enable the counting of descriptors still to be processed. */
+#define E1000_TXDCTL_COUNT_DESC 0x00400000
+
+/* Flow Control Constants */
+#define FLOW_CONTROL_ADDRESS_LOW  0x00C28001
+#define FLOW_CONTROL_ADDRESS_HIGH 0x00000100
+#define FLOW_CONTROL_TYPE         0x8808
+
+/* 802.1q VLAN Packet Size */
+#define VLAN_TAG_SIZE              4    /* 802.3ac tag (not DMA'd) */
+#define E1000_VLAN_FILTER_TBL_SIZE 128  /* VLAN Filter Table (4096 bits) */
+
+/* Receive Address */
+/*
+ * Number of high/low register pairs in the RAR. The RAR (Receive Address
+ * Registers) holds the directed and multicast addresses that we monitor.
+ * Technically, we have 16 spots.  However, we reserve one of these spots
+ * (RAR[15]) for our directed address used by controllers with
+ * manageability enabled, allowing us room for 15 multicast addresses.
+ */
+#define E1000_RAR_ENTRIES     15
+#define E1000_RAH_AV  0x80000000        /* Receive descriptor valid */
+#define E1000_RAL_MAC_ADDR_LEN 4
+#define E1000_RAH_MAC_ADDR_LEN 2
+#define E1000_RAH_POOL_MASK 0x03FC0000
+#define E1000_RAH_POOL_1 0x00040000
+
+/* Error Codes */
+#define E1000_SUCCESS      0
+#define E1000_ERR_NVM      1
+#define E1000_ERR_PHY      2
+#define E1000_ERR_CONFIG   3
+#define E1000_ERR_PARAM    4
+#define E1000_ERR_MAC_INIT 5
+#define E1000_ERR_PHY_TYPE 6
+#define E1000_ERR_RESET   9
+#define E1000_ERR_MASTER_REQUESTS_PENDING 10
+#define E1000_ERR_HOST_INTERFACE_COMMAND 11
+#define E1000_BLK_PHY_RESET   12
+#define E1000_ERR_SWFW_SYNC 13
+#define E1000_NOT_IMPLEMENTED 14
+#define E1000_ERR_MBX      15
+
+/* Loop limit on how long we wait for auto-negotiation to complete */
+#define FIBER_LINK_UP_LIMIT               50
+#define COPPER_LINK_UP_LIMIT              10
+#define PHY_AUTO_NEG_LIMIT                45
+#define PHY_FORCE_LIMIT                   20
+/* Number of 100 microseconds we wait for PCI Express master disable */
+#define MASTER_DISABLE_TIMEOUT      800
+/* Number of milliseconds we wait for PHY configuration done after MAC reset */
+#define PHY_CFG_TIMEOUT             100
+/* Number of 2 milliseconds we wait for acquiring MDIO ownership. */
+#define MDIO_OWNERSHIP_TIMEOUT      10
+/* Number of milliseconds for NVM auto read done after MAC reset. */
+#define AUTO_READ_DONE_TIMEOUT      10
+
+/* Flow Control */
+#define E1000_FCRTH_RTH  0x0000FFF8     /* Mask Bits[15:3] for RTH */
+#define E1000_FCRTH_XFCE 0x80000000     /* External Flow Control Enable */
+#define E1000_FCRTL_RTL  0x0000FFF8     /* Mask Bits[15:3] for RTL */
+#define E1000_FCRTL_XONE 0x80000000     /* Enable XON frame transmission */
+
+/* Transmit Configuration Word */
+#define E1000_TXCW_FD         0x00000020        /* TXCW full duplex */
+#define E1000_TXCW_HD         0x00000040        /* TXCW half duplex */
+#define E1000_TXCW_PAUSE      0x00000080        /* TXCW sym pause request */
+#define E1000_TXCW_ASM_DIR    0x00000100        /* TXCW astm pause direction */
+#define E1000_TXCW_PAUSE_MASK 0x00000180        /* TXCW pause request mask */
+#define E1000_TXCW_RF         0x00003000        /* TXCW remote fault */
+#define E1000_TXCW_NP         0x00008000        /* TXCW next page */
+#define E1000_TXCW_CW         0x0000ffff        /* TxConfigWord mask */
+#define E1000_TXCW_TXC        0x40000000        /* Transmit Config control */
+#define E1000_TXCW_ANE        0x80000000        /* Auto-neg enable */
+
+/* Receive Configuration Word */
+#define E1000_RXCW_CW         0x0000ffff        /* RxConfigWord mask */
+#define E1000_RXCW_NC         0x04000000        /* Receive config no carrier */
+#define E1000_RXCW_IV         0x08000000        /* Receive config invalid */
+#define E1000_RXCW_CC         0x10000000        /* Receive config change */
+#define E1000_RXCW_C          0x20000000        /* Receive config */
+#define E1000_RXCW_SYNCH      0x40000000        /* Receive config synch */
+#define E1000_RXCW_ANC        0x80000000        /* Auto-neg complete */
+
+
+/* PCI Express Control */
+#define E1000_GCR_RXD_NO_SNOOP          0x00000001
+#define E1000_GCR_RXDSCW_NO_SNOOP       0x00000002
+#define E1000_GCR_RXDSCR_NO_SNOOP       0x00000004
+#define E1000_GCR_TXD_NO_SNOOP          0x00000008
+#define E1000_GCR_TXDSCW_NO_SNOOP       0x00000010
+#define E1000_GCR_TXDSCR_NO_SNOOP       0x00000020
+#define E1000_GCR_CMPL_TMOUT_MASK       0x0000F000
+#define E1000_GCR_CMPL_TMOUT_10ms       0x00001000
+#define E1000_GCR_CMPL_TMOUT_RESEND     0x00010000
+#define E1000_GCR_CAP_VER2              0x00040000
+
+#define PCIE_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP         | \
+                           E1000_GCR_RXDSCW_NO_SNOOP      | \
+                           E1000_GCR_RXDSCR_NO_SNOOP      | \
+                           E1000_GCR_TXD_NO_SNOOP         | \
+                           E1000_GCR_TXDSCW_NO_SNOOP      | \
+                           E1000_GCR_TXDSCR_NO_SNOOP)
+
+/* PHY Control Register */
+#define MII_CR_SPEED_SELECT_MSB 0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_COLL_TEST_ENABLE 0x0080  /* Collision test enable */
+#define MII_CR_FULL_DUPLEX      0x0100  /* FDX =1, half duplex =0 */
+#define MII_CR_RESTART_AUTO_NEG 0x0200  /* Restart auto negotiation */
+#define MII_CR_ISOLATE          0x0400  /* Isolate PHY from MII */
+#define MII_CR_POWER_DOWN       0x0800  /* Power down */
+#define MII_CR_AUTO_NEG_EN      0x1000  /* Auto Neg Enable */
+#define MII_CR_SPEED_SELECT_LSB 0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_LOOPBACK         0x4000  /* 0 = normal, 1 = loopback */
+#define MII_CR_RESET            0x8000  /* 0 = normal, 1 = PHY reset */
+#define MII_CR_SPEED_1000       0x0040
+#define MII_CR_SPEED_100        0x2000
+#define MII_CR_SPEED_10         0x0000
+
+/* PHY Status Register */
+#define MII_SR_EXTENDED_CAPS     0x0001 /* Extended register capabilities */
+#define MII_SR_JABBER_DETECT     0x0002 /* Jabber Detected */
+#define MII_SR_LINK_STATUS       0x0004 /* Link Status 1 = link */
+#define MII_SR_AUTONEG_CAPS      0x0008 /* Auto Neg Capable */
+#define MII_SR_REMOTE_FAULT      0x0010 /* Remote Fault Detect */
+#define MII_SR_AUTONEG_COMPLETE  0x0020 /* Auto Neg Complete */
+#define MII_SR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
+#define MII_SR_EXTENDED_STATUS   0x0100 /* Ext. status info in Reg 0x0F */
+#define MII_SR_100T2_HD_CAPS     0x0200 /* 100T2 Half Duplex Capable */
+#define MII_SR_100T2_FD_CAPS     0x0400 /* 100T2 Full Duplex Capable */
+#define MII_SR_10T_HD_CAPS       0x0800 /* 10T   Half Duplex Capable */
+#define MII_SR_10T_FD_CAPS       0x1000 /* 10T   Full Duplex Capable */
+#define MII_SR_100X_HD_CAPS      0x2000 /* 100X  Half Duplex Capable */
+#define MII_SR_100X_FD_CAPS      0x4000 /* 100X  Full Duplex Capable */
+#define MII_SR_100T4_CAPS        0x8000 /* 100T4 Capable */
+
+/* Autoneg Advertisement Register */
+#define NWAY_AR_SELECTOR_FIELD   0x0001   /* indicates IEEE 802.3 CSMA/CD */
+#define NWAY_AR_10T_HD_CAPS      0x0020   /* 10T   Half Duplex Capable */
+#define NWAY_AR_10T_FD_CAPS      0x0040   /* 10T   Full Duplex Capable */
+#define NWAY_AR_100TX_HD_CAPS    0x0080   /* 100TX Half Duplex Capable */
+#define NWAY_AR_100TX_FD_CAPS    0x0100   /* 100TX Full Duplex Capable */
+#define NWAY_AR_100T4_CAPS       0x0200   /* 100T4 Capable */
+#define NWAY_AR_PAUSE            0x0400   /* Pause operation desired */
+#define NWAY_AR_ASM_DIR          0x0800   /* Asymmetric Pause Direction bit */
+#define NWAY_AR_REMOTE_FAULT     0x2000   /* Remote Fault detected */
+#define NWAY_AR_NEXT_PAGE        0x8000   /* Next Page ability supported */
+
+/* Link Partner Ability Register (Base Page) */
+#define NWAY_LPAR_SELECTOR_FIELD 0x0000 /* LP protocol selector field */
+#define NWAY_LPAR_10T_HD_CAPS    0x0020 /* LP is 10T   Half Duplex Capable */
+#define NWAY_LPAR_10T_FD_CAPS    0x0040 /* LP is 10T   Full Duplex Capable */
+#define NWAY_LPAR_100TX_HD_CAPS  0x0080 /* LP is 100TX Half Duplex Capable */
+#define NWAY_LPAR_100TX_FD_CAPS  0x0100 /* LP is 100TX Full Duplex Capable */
+#define NWAY_LPAR_100T4_CAPS     0x0200 /* LP is 100T4 Capable */
+#define NWAY_LPAR_PAUSE          0x0400 /* LP Pause operation desired */
+#define NWAY_LPAR_ASM_DIR        0x0800 /* LP Asymmetric Pause Direction bit */
+#define NWAY_LPAR_REMOTE_FAULT   0x2000 /* LP has detected Remote Fault */
+#define NWAY_LPAR_ACKNOWLEDGE    0x4000 /* LP has rx'd link code word */
+#define NWAY_LPAR_NEXT_PAGE      0x8000 /* Next Page ability supported */
+
+/* Autoneg Expansion Register */
+#define NWAY_ER_LP_NWAY_CAPS      0x0001 /* LP has Auto Neg Capability */
+#define NWAY_ER_PAGE_RXD          0x0002 /* LP is 10T   Half Duplex Capable */
+#define NWAY_ER_NEXT_PAGE_CAPS    0x0004 /* LP is 10T   Full Duplex Capable */
+#define NWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 /* LP is 100TX Half Duplex Capable */
+#define NWAY_ER_PAR_DETECT_FAULT  0x0010 /* LP is 100TX Full Duplex Capable */
+
+/* 1000BASE-T Control Register */
+#define CR_1000T_ASYM_PAUSE      0x0080 /* Advertise asymmetric pause bit */
+#define CR_1000T_HD_CAPS         0x0100 /* Advertise 1000T HD capability */
+#define CR_1000T_FD_CAPS         0x0200 /* Advertise 1000T FD capability  */
+#define CR_1000T_REPEATER_DTE    0x0400 /* 1=Repeater/switch device port */
+                                        /* 0=DTE device */
+#define CR_1000T_MS_VALUE        0x0800 /* 1=Configure PHY as Master */
+                                        /* 0=Configure PHY as Slave */
+#define CR_1000T_MS_ENABLE      0x1000 /* 1=Master/Slave manual config value */
+                                        /* 0=Automatic Master/Slave config */
+#define CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
+#define CR_1000T_TEST_MODE_1     0x2000 /* Transmit Waveform test */
+#define CR_1000T_TEST_MODE_2     0x4000 /* Master Transmit Jitter test */
+#define CR_1000T_TEST_MODE_3     0x6000 /* Slave Transmit Jitter test */
+#define CR_1000T_TEST_MODE_4     0x8000 /* Transmitter Distortion test */
+
+/* 1000BASE-T Status Register */
+#define SR_1000T_IDLE_ERROR_CNT   0x00FF /* Num idle errors since last read */
+#define SR_1000T_ASYM_PAUSE_DIR  0x0100 /* LP asymmetric pause direction bit */
+#define SR_1000T_LP_HD_CAPS       0x0400 /* LP is 1000T HD capable */
+#define SR_1000T_LP_FD_CAPS       0x0800 /* LP is 1000T FD capable */
+#define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
+#define SR_1000T_LOCAL_RX_STATUS  0x2000 /* Local receiver OK */
+#define SR_1000T_MS_CONFIG_RES    0x4000 /* 1=Local Tx is Master, 0=Slave */
+#define SR_1000T_MS_CONFIG_FAULT  0x8000 /* Master/Slave config fault */
+
+#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT 5
+
+/* PHY 1000 MII Register/Bit Definitions */
+/* PHY Registers defined by IEEE */
+#define PHY_CONTROL      0x00 /* Control Register */
+#define PHY_STATUS       0x01 /* Status Register */
+#define PHY_ID1          0x02 /* Phy Id Reg (word 1) */
+#define PHY_ID2          0x03 /* Phy Id Reg (word 2) */
+#define PHY_AUTONEG_ADV  0x04 /* Autoneg Advertisement */
+#define PHY_LP_ABILITY   0x05 /* Link Partner Ability (Base Page) */
+#define PHY_AUTONEG_EXP  0x06 /* Autoneg Expansion Reg */
+#define PHY_NEXT_PAGE_TX 0x07 /* Next Page Tx */
+#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */
+#define PHY_1000T_CTRL   0x09 /* 1000Base-T Control Reg */
+#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
+#define PHY_EXT_STATUS   0x0F /* Extended Status Reg */
+
+#define PHY_CONTROL_LB   0x4000 /* PHY Loopback bit */
+
+/* NVM Control */
+#define E1000_EECD_SK        0x00000001 /* NVM Clock */
+#define E1000_EECD_CS        0x00000002 /* NVM Chip Select */
+#define E1000_EECD_DI        0x00000004 /* NVM Data In */
+#define E1000_EECD_DO        0x00000008 /* NVM Data Out */
+#define E1000_EECD_FWE_MASK  0x00000030
+#define E1000_EECD_FWE_DIS   0x00000010 /* Disable FLASH writes */
+#define E1000_EECD_FWE_EN    0x00000020 /* Enable FLASH writes */
+#define E1000_EECD_FWE_SHIFT 4
+#define E1000_EECD_REQ       0x00000040 /* NVM Access Request */
+#define E1000_EECD_GNT       0x00000080 /* NVM Access Grant */
+#define E1000_EECD_PRES      0x00000100 /* NVM Present */
+#define E1000_EECD_SIZE      0x00000200 /* NVM Size (0=64 word 1=256 word) */
+/* NVM Addressing bits based on type 0=small, 1=large */
+#define E1000_EECD_ADDR_BITS 0x00000400
+#define E1000_EECD_TYPE      0x00002000 /* NVM Type (1-SPI, 0-Microwire) */
+#define E1000_NVM_GRANT_ATTEMPTS   1000 /* NVM # attempts to gain grant */
+#define E1000_EECD_AUTO_RD          0x00000200  /* NVM Auto Read done */
+#define E1000_EECD_SIZE_EX_MASK     0x00007800  /* NVM Size */
+#define E1000_EECD_SIZE_EX_SHIFT     11
+#define E1000_EECD_NVADDS    0x00018000 /* NVM Address Size */
+#define E1000_EECD_SELSHAD   0x00020000 /* Select Shadow RAM */
+#define E1000_EECD_INITSRAM  0x00040000 /* Initialize Shadow RAM */
+#define E1000_EECD_FLUPD     0x00080000 /* Update FLASH */
+#define E1000_EECD_AUPDEN    0x00100000 /* Enable Autonomous FLASH update */
+#define E1000_EECD_SHADV     0x00200000 /* Shadow RAM Data Valid */
+#define E1000_EECD_SEC1VAL   0x00400000 /* Sector One Valid */
+#define E1000_EECD_SECVAL_SHIFT      22
+#define E1000_EECD_SEC1VAL_VALID_MASK (E1000_EECD_AUTO_RD | E1000_EECD_PRES)
+
+#define E1000_NVM_SWDPIN0   0x0001   /* SWDPIN 0 NVM Value */
+#define E1000_NVM_LED_LOGIC 0x0020   /* Led Logic Word */
+#define E1000_NVM_RW_REG_DATA   16  /* Offset to data in NVM read/write regs */
+#define E1000_NVM_RW_REG_DONE   2    /* Offset to READ/WRITE done bit */
+#define E1000_NVM_RW_REG_START  1    /* Start operation */
+#define E1000_NVM_RW_ADDR_SHIFT 2    /* Shift to the address bits */
+#define E1000_NVM_POLL_WRITE    1    /* Flag for polling for write complete */
+#define E1000_NVM_POLL_READ     0    /* Flag for polling for read complete */
+#define E1000_FLASH_UPDATES  2000
+
+/* NVM Word Offsets */
+#define NVM_COMPAT                 0x0003
+#define NVM_ID_LED_SETTINGS        0x0004
+#define NVM_VERSION                0x0005
+#define NVM_SERDES_AMPLITUDE       0x0006 /* SERDES output amplitude */
+#define NVM_PHY_CLASS_WORD         0x0007
+#define NVM_INIT_CONTROL1_REG      0x000A
+#define NVM_INIT_CONTROL2_REG      0x000F
+#define NVM_SWDEF_PINS_CTRL_PORT_1 0x0010
+#define NVM_INIT_CONTROL3_PORT_B   0x0014
+#define NVM_INIT_3GIO_3            0x001A
+#define NVM_SWDEF_PINS_CTRL_PORT_0 0x0020
+#define NVM_INIT_CONTROL3_PORT_A   0x0024
+#define NVM_CFG                    0x0012
+#define NVM_FLASH_VERSION          0x0032
+#define NVM_ALT_MAC_ADDR_PTR       0x0037
+#define NVM_CHECKSUM_REG           0x003F
+
+#define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */
+#define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */
+
+/* Mask bits for fields in Word 0x0f of the NVM */
+#define NVM_WORD0F_PAUSE_MASK       0x3000
+#define NVM_WORD0F_PAUSE            0x1000
+#define NVM_WORD0F_ASM_DIR          0x2000
+#define NVM_WORD0F_ANE              0x0800
+#define NVM_WORD0F_SWPDIO_EXT_MASK  0x00F0
+#define NVM_WORD0F_LPLU             0x0001
+
+/* Mask bits for fields in Word 0x1a of the NVM */
+#define NVM_WORD1A_ASPM_MASK  0x000C
+
+/* For checksumming, the sum of all words in the NVM should equal 0xBABA. */
+#define NVM_SUM                    0xBABA
+
+#define NVM_MAC_ADDR_OFFSET        0
+#define NVM_PBA_OFFSET_0           8
+#define NVM_PBA_OFFSET_1           9
+#define NVM_RESERVED_WORD          0xFFFF
+#define NVM_PHY_CLASS_A            0x8000
+#define NVM_SERDES_AMPLITUDE_MASK  0x000F
+#define NVM_SIZE_MASK              0x1C00
+#define NVM_SIZE_SHIFT             10
+#define NVM_WORD_SIZE_BASE_SHIFT   6
+#define NVM_SWDPIO_EXT_SHIFT       4
+
+/* NVM Commands - Microwire */
+#define NVM_READ_OPCODE_MICROWIRE  0x6  /* NVM read opcode */
+#define NVM_WRITE_OPCODE_MICROWIRE 0x5  /* NVM write opcode */
+#define NVM_ERASE_OPCODE_MICROWIRE 0x7  /* NVM erase opcode */
+#define NVM_EWEN_OPCODE_MICROWIRE  0x13 /* NVM erase/write enable */
+#define NVM_EWDS_OPCODE_MICROWIRE  0x10 /* NVM erase/write disable */
+
+/* NVM Commands - SPI */
+#define NVM_MAX_RETRY_SPI          5000 /* Max wait of 5ms, for RDY signal */
+#define NVM_READ_OPCODE_SPI        0x03 /* NVM read opcode */
+#define NVM_WRITE_OPCODE_SPI       0x02 /* NVM write opcode */
+#define NVM_A8_OPCODE_SPI          0x08 /* opcode bit-3 = address bit-8 */
+#define NVM_WREN_OPCODE_SPI        0x06 /* NVM set Write Enable latch */
+#define NVM_WRDI_OPCODE_SPI        0x04 /* NVM reset Write Enable latch */
+#define NVM_RDSR_OPCODE_SPI        0x05 /* NVM read Status register */
+#define NVM_WRSR_OPCODE_SPI        0x01 /* NVM write Status register */
+
+/* SPI NVM Status Register */
+#define NVM_STATUS_RDY_SPI         0x01
+#define NVM_STATUS_WEN_SPI         0x02
+#define NVM_STATUS_BP0_SPI         0x04
+#define NVM_STATUS_BP1_SPI         0x08
+#define NVM_STATUS_WPEN_SPI        0x80
+
+/* Word definitions for ID LED Settings */
+#define ID_LED_RESERVED_0000 0x0000
+#define ID_LED_RESERVED_FFFF 0xFFFF
+#define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2  << 12) | \
+                              (ID_LED_OFF1_OFF2 <<  8) | \
+                              (ID_LED_DEF1_DEF2 <<  4) | \
+                              (ID_LED_DEF1_DEF2))
+#define ID_LED_DEF1_DEF2     0x1
+#define ID_LED_DEF1_ON2      0x2
+#define ID_LED_DEF1_OFF2     0x3
+#define ID_LED_ON1_DEF2      0x4
+#define ID_LED_ON1_ON2       0x5
+#define ID_LED_ON1_OFF2      0x6
+#define ID_LED_OFF1_DEF2     0x7
+#define ID_LED_OFF1_ON2      0x8
+#define ID_LED_OFF1_OFF2     0x9
+
+#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF
+#define IGP_ACTIVITY_LED_ENABLE 0x0300
+#define IGP_LED3_MODE           0x07000000
+
+/* PCI/PCI-X/PCI-EX Config space */
+#define PCIX_COMMAND_REGISTER        0xE6
+#define PCIX_STATUS_REGISTER_LO      0xE8
+#define PCIX_STATUS_REGISTER_HI      0xEA
+#define PCI_HEADER_TYPE_REGISTER     0x0E
+#define PCIE_LINK_STATUS             0x12
+#define PCIE_DEVICE_CONTROL2         0x28
+
+#define PCIX_COMMAND_MMRBC_MASK      0x000C
+#define PCIX_COMMAND_MMRBC_SHIFT     0x2
+#define PCIX_STATUS_HI_MMRBC_MASK    0x0060
+#define PCIX_STATUS_HI_MMRBC_SHIFT   0x5
+#define PCIX_STATUS_HI_MMRBC_4K      0x3
+#define PCIX_STATUS_HI_MMRBC_2K      0x2
+#define PCIX_STATUS_LO_FUNC_MASK     0x7
+#define PCI_HEADER_TYPE_MULTIFUNC    0x80
+#define PCIE_LINK_WIDTH_MASK         0x3F0
+#define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_DEVICE_CONTROL2_16ms    0x0005
+
+#ifndef ETH_ADDR_LEN
+#define ETH_ADDR_LEN                 6
+#endif
+
+#define PHY_REVISION_MASK      0xFFFFFFF0
+#define MAX_PHY_REG_ADDRESS    0x1F  /* 5 bit address bus (0-0x1F) */
+#define MAX_PHY_MULTI_PAGE_REG 0xF
+
+/* Bit definitions for valid PHY IDs. */
+/*
+ * I = Integrated
+ * E = External
+ */
+#define M88E1000_E_PHY_ID    0x01410C50
+#define M88E1000_I_PHY_ID    0x01410C30
+#define M88E1011_I_PHY_ID    0x01410C20
+#define IGP01E1000_I_PHY_ID  0x02A80380
+#define M88E1011_I_REV_4     0x04
+#define M88E1111_I_PHY_ID    0x01410CC0
+#define GG82563_E_PHY_ID     0x01410CA0
+#define IGP03E1000_E_PHY_ID  0x02A80390
+#define IFE_E_PHY_ID         0x02A80330
+#define IFE_PLUS_E_PHY_ID    0x02A80320
+#define IFE_C_E_PHY_ID       0x02A80310
+#define M88_VENDOR           0x0141
+
+/* M88E1000 Specific Registers */
+#define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */
+#define M88E1000_PHY_SPEC_STATUS   0x11  /* PHY Specific Status Register */
+#define M88E1000_INT_ENABLE        0x12  /* Interrupt Enable Register */
+#define M88E1000_INT_STATUS        0x13  /* Interrupt Status Register */
+#define M88E1000_EXT_PHY_SPEC_CTRL 0x14  /* Extended PHY Specific Control */
+#define M88E1000_RX_ERR_CNTR       0x15  /* Receive Error Counter */
+
+#define M88E1000_PHY_EXT_CTRL      0x1A  /* PHY extend control register */
+#define M88E1000_PHY_PAGE_SELECT   0x1D  /* Reg 29 for page number setting */
+#define M88E1000_PHY_GEN_CONTROL   0x1E  /* Its meaning depends on reg 29 */
+#define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
+#define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
+
+/* M88E1000 PHY Specific Control Register */
+#define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
+#define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reverse enabled */
+#define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */
+/* 1=CLK125 low, 0=CLK125 toggling */
+#define M88E1000_PSCR_CLK125_DISABLE    0x0010
+#define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000 /* MDI Crossover Mode bits 6:5 */
+                                               /* Manual MDI configuration */
+#define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
+/* 1000BASE-T: Auto crossover, 100BASE-TX/10BASE-T: MDI Mode */
+#define M88E1000_PSCR_AUTO_X_1000T     0x0040
+/* Auto crossover enabled all speeds */
+#define M88E1000_PSCR_AUTO_X_MODE      0x0060
+/*
+ * 1=Enable Extended 10BASE-T distance (Lower 10BASE-T Rx Threshold
+ * 0=Normal 10BASE-T Rx Threshold
+ */
+#define M88E1000_PSCR_EN_10BT_EXT_DIST 0x0080
+/* 1=5-bit interface in 100BASE-TX, 0=MII interface in 100BASE-TX */
+#define M88E1000_PSCR_MII_5BIT_ENABLE      0x0100
+#define M88E1000_PSCR_SCRAMBLER_DISABLE    0x0200 /* 1=Scrambler disable */
+#define M88E1000_PSCR_FORCE_LINK_GOOD      0x0400 /* 1=Force link good */
+#define M88E1000_PSCR_ASSERT_CRS_ON_TX     0x0800 /* 1=Assert CRS on Tx */
+
+/* M88E1000 PHY Specific Status Register */
+#define M88E1000_PSSR_JABBER             0x0001 /* 1=Jabber */
+#define M88E1000_PSSR_REV_POLARITY       0x0002 /* 1=Polarity reversed */
+#define M88E1000_PSSR_DOWNSHIFT          0x0020 /* 1=Downshifted */
+#define M88E1000_PSSR_MDIX               0x0040 /* 1=MDIX; 0=MDI */
+/*
+ * 0 = <50M
+ * 1 = 50-80M
+ * 2 = 80-110M
+ * 3 = 110-140M
+ * 4 = >140M
+ */
+#define M88E1000_PSSR_CABLE_LENGTH       0x0380
+#define M88E1000_PSSR_LINK               0x0400 /* 1=Link up, 0=Link down */
+#define M88E1000_PSSR_SPD_DPLX_RESOLVED  0x0800 /* 1=Speed & Duplex resolved */
+#define M88E1000_PSSR_PAGE_RCVD          0x1000 /* 1=Page received */
+#define M88E1000_PSSR_DPLX               0x2000 /* 1=Duplex 0=Half Duplex */
+#define M88E1000_PSSR_SPEED              0xC000 /* Speed, bits 14:15 */
+#define M88E1000_PSSR_10MBS              0x0000 /* 00=10Mbs */
+#define M88E1000_PSSR_100MBS             0x4000 /* 01=100Mbs */
+#define M88E1000_PSSR_1000MBS            0x8000 /* 10=1000Mbs */
+
+#define M88E1000_PSSR_CABLE_LENGTH_SHIFT 7
+
+/* M88E1000 Extended PHY Specific Control Register */
+#define M88E1000_EPSCR_FIBER_LOOPBACK 0x4000 /* 1=Fiber loopback */
+/*
+ * 1 = Lost lock detect enabled.
+ * Will assert lost lock and bring
+ * link down if idle not seen
+ * within 1ms in 1000BASE-T
+ */
+#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the master
+ */
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK 0x0C00
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the slave
+ */
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK  0x0300
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X    0x0100
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X    0x0200
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X    0x0300
+#define M88E1000_EPSCR_TX_CLK_2_5     0x0060 /* 2.5 MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
+
+/* M88EC018 Rev 2 specific DownShift settings */
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
+
+/*
+ * Bits...
+ * 15-5: page
+ * 4-0: register offset
+ */
+#define GG82563_PAGE_SHIFT        5
+#define GG82563_REG(page, reg)    \
+        (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
+#define GG82563_MIN_ALT_REG       30
+
+/* GG82563 Specific Registers */
+#define GG82563_PHY_SPEC_CTRL           \
+        GG82563_REG(0, 16) /* PHY Specific Control */
+#define GG82563_PHY_SPEC_STATUS         \
+        GG82563_REG(0, 17) /* PHY Specific Status */
+#define GG82563_PHY_INT_ENABLE          \
+        GG82563_REG(0, 18) /* Interrupt Enable */
+#define GG82563_PHY_SPEC_STATUS_2       \
+        GG82563_REG(0, 19) /* PHY Specific Status 2 */
+#define GG82563_PHY_RX_ERR_CNTR         \
+        GG82563_REG(0, 21) /* Receive Error Counter */
+#define GG82563_PHY_PAGE_SELECT         \
+        GG82563_REG(0, 22) /* Page Select */
+#define GG82563_PHY_SPEC_CTRL_2         \
+        GG82563_REG(0, 26) /* PHY Specific Control 2 */
+#define GG82563_PHY_PAGE_SELECT_ALT     \
+        GG82563_REG(0, 29) /* Alternate Page Select */
+#define GG82563_PHY_TEST_CLK_CTRL       \
+        GG82563_REG(0, 30) /* Test Clock Control (use reg. 29 to select) */
+
+#define GG82563_PHY_MAC_SPEC_CTRL       \
+        GG82563_REG(2, 21) /* MAC Specific Control Register */
+#define GG82563_PHY_MAC_SPEC_CTRL_2     \
+        GG82563_REG(2, 26) /* MAC Specific Control 2 */
+
+#define GG82563_PHY_DSP_DISTANCE    \
+        GG82563_REG(5, 26) /* DSP Distance */
+
+/* Page 193 - Port Control Registers */
+#define GG82563_PHY_KMRN_MODE_CTRL   \
+        GG82563_REG(193, 16) /* Kumeran Mode Control */
+#define GG82563_PHY_PORT_RESET          \
+        GG82563_REG(193, 17) /* Port Reset */
+#define GG82563_PHY_REVISION_ID         \
+        GG82563_REG(193, 18) /* Revision ID */
+#define GG82563_PHY_DEVICE_ID           \
+        GG82563_REG(193, 19) /* Device ID */
+#define GG82563_PHY_PWR_MGMT_CTRL       \
+        GG82563_REG(193, 20) /* Power Management Control */
+#define GG82563_PHY_RATE_ADAPT_CTRL     \
+        GG82563_REG(193, 25) /* Rate Adaptation Control */
+
+/* Page 194 - KMRN Registers */
+#define GG82563_PHY_KMRN_FIFO_CTRL_STAT \
+        GG82563_REG(194, 16) /* FIFO's Control/Status */
+#define GG82563_PHY_KMRN_CTRL           \
+        GG82563_REG(194, 17) /* Control */
+#define GG82563_PHY_INBAND_CTRL         \
+        GG82563_REG(194, 18) /* Inband Control */
+#define GG82563_PHY_KMRN_DIAGNOSTIC     \
+        GG82563_REG(194, 19) /* Diagnostic */
+#define GG82563_PHY_ACK_TIMEOUTS        \
+        GG82563_REG(194, 20) /* Acknowledge Timeouts */
+#define GG82563_PHY_ADV_ABILITY         \
+        GG82563_REG(194, 21) /* Advertised Ability */
+#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY \
+        GG82563_REG(194, 23) /* Link Partner Advertised Ability */
+#define GG82563_PHY_ADV_NEXT_PAGE       \
+        GG82563_REG(194, 24) /* Advertised Next Page */
+#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE \
+        GG82563_REG(194, 25) /* Link Partner Advertised Next page */
+#define GG82563_PHY_KMRN_MISC           \
+        GG82563_REG(194, 26) /* Misc. */
+
+/* MDI Control */
+#define E1000_MDIC_DATA_MASK 0x0000FFFF
+#define E1000_MDIC_REG_MASK  0x001F0000
+#define E1000_MDIC_REG_SHIFT 16
+#define E1000_MDIC_PHY_MASK  0x03E00000
+#define E1000_MDIC_PHY_SHIFT 21
+#define E1000_MDIC_OP_WRITE  0x04000000
+#define E1000_MDIC_OP_READ   0x08000000
+#define E1000_MDIC_READY     0x10000000
+#define E1000_MDIC_INT_EN    0x20000000
+#define E1000_MDIC_ERROR     0x40000000
+
+/* SerDes Control */
+#define E1000_GEN_CTL_READY             0x80000000
+#define E1000_GEN_CTL_ADDRESS_SHIFT     8
+#define E1000_GEN_POLL_TIMEOUT          640
+
+
+
+#endif /* _E1000_DEFINES_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,326 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/* Linux PRO/1000 Ethernet Driver main header file */
+
+#ifndef _E1000_H_
+#define _E1000_H_
+
+#include "e1000_api.h"
+
+#define BAR_0		0
+#define BAR_1		1
+#define BAR_5		5
+
+struct e1000_adapter;
+
+/* TX/RX descriptor defines */
+#define E1000_DEFAULT_TXD                  256
+#define E1000_MAX_TXD                      256
+#define E1000_MIN_TXD                       80
+#define E1000_MAX_82544_TXD               4096
+
+#define E1000_DEFAULT_TXD_PWR               12
+#define E1000_MAX_TXD_PWR                   12
+#define E1000_MIN_TXD_PWR                    7
+
+#define E1000_DEFAULT_RXD                  256
+#define E1000_MAX_RXD                      256
+
+#define E1000_MIN_RXD                       80
+#define E1000_MAX_82544_RXD               4096
+
+#define E1000_MIN_ITR_USECS                 10 /* 100000 irq/sec */
+#define E1000_MAX_ITR_USECS              10000 /* 100    irq/sec */
+
+
+/* this is the size past which hardware will drop packets when setting LPE=0 */
+#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
+
+/* Supported Rx Buffer Sizes */
+#define E1000_RXBUFFER_128   128
+#define E1000_RXBUFFER_256   256
+#define E1000_RXBUFFER_512   512
+#define E1000_RXBUFFER_1024  1024
+#define E1000_RXBUFFER_2048  2048
+#define E1000_RXBUFFER_4096  4096
+#define E1000_RXBUFFER_8192  8192
+#define E1000_RXBUFFER_16384 16384
+
+/* SmartSpeed delimiters */
+#define E1000_SMARTSPEED_DOWNSHIFT 3
+#define E1000_SMARTSPEED_MAX       15
+
+/* Packet Buffer allocations */
+#define E1000_PBA_BYTES_SHIFT 0xA
+#define E1000_TX_HEAD_ADDR_SHIFT 7
+#define E1000_PBA_TX_MASK 0xFFFF0000
+
+/* Early Receive defines */
+#define E1000_ERT_2048 0x100
+
+#define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
+
+/* How many Tx Descriptors do we need to call netif_wake_queue ? */
+#define E1000_TX_QUEUE_WAKE	16
+/* How many Rx Buffers do we bundle into one write to the hardware ? */
+#define E1000_RX_BUFFER_WRITE	16	/* Must be power of 2 */
+
+#define AUTO_ALL_MODES            0
+#define E1000_EEPROM_82544_APM    0x0004
+#define E1000_EEPROM_APME         0x0400
+
+/* wrapper around a pointer to a socket buffer,
+ * so a DMA handle can be stored along with the buffer */
+struct e1000_buffer {
+	struct sk_buff *skb;
+	dma_addr_t dma;
+	unsigned long time_stamp;
+	u16 length;
+	u16 next_to_watch;
+};
+
+struct e1000_rx_buffer {
+	struct sk_buff *skb;
+	dma_addr_t dma;
+	struct page *page;
+};
+
+
+
+struct e1000_tx_ring {
+	/* pointer to the descriptor ring memory */
+	void *desc;
+	/* physical address of the descriptor ring */
+	dma_addr_t dma;
+	/* length of descriptor ring in bytes */
+	unsigned int size;
+	/* number of descriptors in the ring */
+	unsigned int count;
+	/* next descriptor to associate a buffer with */
+	unsigned int next_to_use;
+	/* next descriptor to check for DD status bit */
+	unsigned int next_to_clean;
+	/* array of buffer information structs */
+	struct e1000_buffer *buffer_info;
+
+	spinlock_t tx_lock;
+	u16 tdh;
+	u16 tdt;
+
+	/* TXDdescriptor index increment to be used when advancing
+	* to the next descriptor. This is normally one, but on some
+	* architectures, but on some architectures there are cache
+	* coherency issues that require only the first descriptor in
+	* cache line can be used.
+	*/
+	unsigned int step;
+
+	bool last_tx_tso;
+};
+
+struct e1000_rx_ring {
+	struct e1000_adapter *adapter; /* back link */
+	/* pointer to the descriptor ring memory */
+	void *desc;
+	/* physical address of the descriptor ring */
+	dma_addr_t dma;
+	/* length of descriptor ring in bytes */
+	unsigned int size;
+	/* number of descriptors in the ring */
+	unsigned int count;
+	/* next descriptor to associate a buffer with */
+	unsigned int next_to_use;
+	/* next descriptor to check for DD status bit */
+	unsigned int next_to_clean;
+	/* array of buffer information structs */
+	struct e1000_rx_buffer *buffer_info;
+	struct sk_buff *rx_skb_top;
+
+	/* cpu for rx queue */
+	int cpu;
+
+	u16 rdh;
+	u16 rdt;
+};
+
+
+#define E1000_TX_DESC_INC(R,index) \
+	{index += (R)->step; if (index == (R)->count) index = 0; }
+
+#define E1000_TX_DESC_DEC(R,index) \
+	{ if (index == 0) index = (R)->count - (R)->step; \
+	else index -= (R)->step; }
+
+#define E1000_DESC_UNUSED(R) \
+	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
+	(R)->next_to_clean - (R)->next_to_use - 1)
+
+#define E1000_RX_DESC_EXT(R, i)	    \
+	(&(((union e1000_rx_desc_extended *)((R).desc))[i]))
+#define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
+#define E1000_RX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_rx_desc)
+#define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
+#define E1000_CONTEXT_DESC(R, i)	E1000_GET_DESC(R, i, e1000_context_desc)
+
+/* board specific private data structure */
+
+struct e1000_adapter {
+	u32 bd_number;
+	u32 rx_buffer_len;
+	u32 wol;
+	u32 smartspeed;
+	u32 en_mng_pt;
+	u16 link_speed;
+	u16 link_duplex;
+	spinlock_t stats_lock;
+	unsigned int total_tx_bytes;
+	unsigned int total_tx_packets;
+	unsigned int total_rx_bytes;
+	unsigned int total_rx_packets;
+	/* Interrupt Throttle Rate */
+	u32 itr;
+	u32 itr_setting;
+	u16 tx_itr;
+	u16 rx_itr;
+
+	bool fc_autoneg;
+
+	/* TX */
+	struct e1000_tx_ring *tx_ring;
+	unsigned int restart_queue;
+	unsigned long tx_queue_len;
+	u32 txd_cmd;
+	u32 tx_int_delay;
+	u32 tx_abs_int_delay;
+	u32 gotc;
+	u64 gotc_old;
+	u64 tpt_old;
+	u64 colc_old;
+	u32 tx_timeout_count;
+	u32 tx_fifo_head;
+	u32 tx_head_addr;
+	u32 tx_fifo_size;
+	u8 tx_timeout_factor;
+	bool pcix_82544;
+	bool detect_tx_hung;
+
+	/* RX */
+	bool (*clean_rx) (struct e1000_adapter *adapter,
+			       struct e1000_rx_ring *rx_ring);
+	void (*alloc_rx_buf) (struct e1000_adapter *adapter,
+			      struct e1000_rx_ring *rx_ring,
+				int cleaned_count);
+	struct e1000_rx_ring *rx_ring;
+
+	u64 hw_csum_err;
+	u64 hw_csum_good;
+	u32 alloc_rx_buff_failed;
+	u32 rx_int_delay;
+	u32 rx_abs_int_delay;
+	bool rx_csum;
+	u32 gorc;
+	u64 gorc_old;
+	u32 max_frame_size;
+	u32 min_frame_size;
+
+
+	/* OS defined structs */
+	struct net_device *netdev;
+	struct pci_device *pdev;
+	struct net_device_stats net_stats;
+
+	/* structs defined in e1000_hw.h */
+	struct e1000_hw hw;
+	struct e1000_hw_stats stats;
+	struct e1000_phy_info phy_info;
+	struct e1000_phy_stats phy_stats;
+
+	int msg_enable;
+	/* to not mess up cache alignment, always add to the bottom */
+	unsigned long state;
+	u32 eeprom_wol;
+
+	u32 *config_space;
+
+	/* hardware capability, feature, and workaround flags */
+	unsigned int flags;
+
+	/* upper limit parameter for tx desc size */
+	u32 tx_desc_pwr;
+
+#define NUM_TX_DESC	8
+#define NUM_RX_DESC	8
+
+	struct io_buffer *tx_iobuf[NUM_TX_DESC];
+	struct io_buffer *rx_iobuf[NUM_RX_DESC];
+
+	struct e1000_tx_desc *tx_base;
+	struct e1000_rx_desc *rx_base;
+
+	uint32_t tx_ring_size;
+	uint32_t rx_ring_size;
+
+	uint32_t tx_head;
+	uint32_t tx_tail;
+	uint32_t tx_fill_ctr;
+
+	uint32_t rx_curr;
+
+	uint32_t ioaddr;
+	uint32_t irqno;
+};
+
+#define E1000_FLAG_HAS_SMBUS                (1 << 0)
+#define E1000_FLAG_HAS_INTR_MODERATION      (1 << 4)
+#define E1000_FLAG_BAD_TX_CARRIER_STATS_FD  (1 << 6)
+#define E1000_FLAG_QUAD_PORT_A              (1 << 8)
+#define E1000_FLAG_SMART_POWER_DOWN         (1 << 9)
+
+extern char e1000_driver_name[];
+extern const char e1000_driver_version[];
+
+extern void e1000_power_up_phy(struct e1000_hw *hw);
+
+extern void e1000_set_ethtool_ops(struct net_device *netdev);
+extern void e1000_check_options(struct e1000_adapter *adapter);
+
+extern int e1000_up(struct e1000_adapter *adapter);
+extern void e1000_down(struct e1000_adapter *adapter);
+extern void e1000_reinit_locked(struct e1000_adapter *adapter);
+extern void e1000_reset(struct e1000_adapter *adapter);
+extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
+extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
+extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
+extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
+extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
+extern void e1000_update_stats(struct e1000_adapter *adapter);
+
+#endif /* _E1000_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_hw.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_hw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_hw.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_hw.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,728 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_HW_H_
+#define _E1000_HW_H_
+
+#include "e1000_osdep.h"
+#include "e1000_regs.h"
+#include "e1000_defines.h"
+
+struct e1000_hw;
+
+#define E1000_DEV_ID_82542                    0x1000
+#define E1000_DEV_ID_82543GC_FIBER            0x1001
+#define E1000_DEV_ID_82543GC_COPPER           0x1004
+#define E1000_DEV_ID_82544EI_COPPER           0x1008
+#define E1000_DEV_ID_82544EI_FIBER            0x1009
+#define E1000_DEV_ID_82544GC_COPPER           0x100C
+#define E1000_DEV_ID_82544GC_LOM              0x100D
+#define E1000_DEV_ID_82540EM                  0x100E
+#define E1000_DEV_ID_82540EM_LOM              0x1015
+#define E1000_DEV_ID_82540EP_LOM              0x1016
+#define E1000_DEV_ID_82540EP                  0x1017
+#define E1000_DEV_ID_82540EP_LP               0x101E
+#define E1000_DEV_ID_82545EM_COPPER           0x100F
+#define E1000_DEV_ID_82545EM_FIBER            0x1011
+#define E1000_DEV_ID_82545GM_COPPER           0x1026
+#define E1000_DEV_ID_82545GM_FIBER            0x1027
+#define E1000_DEV_ID_82545GM_SERDES           0x1028
+#define E1000_DEV_ID_82546EB_COPPER           0x1010
+#define E1000_DEV_ID_82546EB_FIBER            0x1012
+#define E1000_DEV_ID_82546EB_QUAD_COPPER      0x101D
+#define E1000_DEV_ID_82546GB_COPPER           0x1079
+#define E1000_DEV_ID_82546GB_FIBER            0x107A
+#define E1000_DEV_ID_82546GB_SERDES           0x107B
+#define E1000_DEV_ID_82546GB_PCIE             0x108A
+#define E1000_DEV_ID_82546GB_QUAD_COPPER      0x1099
+#define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
+#define E1000_DEV_ID_82541EI                  0x1013
+#define E1000_DEV_ID_82541EI_MOBILE           0x1018
+#define E1000_DEV_ID_82541ER_LOM              0x1014
+#define E1000_DEV_ID_82541ER                  0x1078
+#define E1000_DEV_ID_82541GI                  0x1076
+#define E1000_DEV_ID_82541GI_LF               0x107C
+#define E1000_DEV_ID_82541GI_MOBILE           0x1077
+#define E1000_DEV_ID_82547EI                  0x1019
+#define E1000_DEV_ID_82547EI_MOBILE           0x101A
+#define E1000_DEV_ID_82547GI                  0x1075
+#define E1000_REVISION_0 0
+#define E1000_REVISION_1 1
+#define E1000_REVISION_2 2
+#define E1000_REVISION_3 3
+#define E1000_REVISION_4 4
+
+#define E1000_FUNC_0     0
+#define E1000_FUNC_1     1
+
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0   0
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1   3
+
+enum e1000_mac_type {
+	e1000_undefined = 0,
+	e1000_82542,
+	e1000_82543,
+	e1000_82544,
+	e1000_82540,
+	e1000_82545,
+	e1000_82545_rev_3,
+	e1000_82546,
+	e1000_82546_rev_3,
+	e1000_82541,
+	e1000_82541_rev_2,
+	e1000_82547,
+	e1000_82547_rev_2,
+	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
+};
+
+enum e1000_media_type {
+	e1000_media_type_unknown = 0,
+	e1000_media_type_copper = 1,
+	e1000_media_type_fiber = 2,
+	e1000_media_type_internal_serdes = 3,
+	e1000_num_media_types
+};
+
+enum e1000_nvm_type {
+	e1000_nvm_unknown = 0,
+	e1000_nvm_none,
+	e1000_nvm_eeprom_spi,
+	e1000_nvm_eeprom_microwire,
+	e1000_nvm_flash_hw,
+	e1000_nvm_flash_sw
+};
+
+enum e1000_nvm_override {
+	e1000_nvm_override_none = 0,
+	e1000_nvm_override_spi_small,
+	e1000_nvm_override_spi_large,
+	e1000_nvm_override_microwire_small,
+	e1000_nvm_override_microwire_large
+};
+
+enum e1000_phy_type {
+	e1000_phy_unknown = 0,
+	e1000_phy_none,
+	e1000_phy_m88,
+	e1000_phy_igp,
+	e1000_phy_igp_2,
+	e1000_phy_gg82563,
+	e1000_phy_igp_3,
+	e1000_phy_ife,
+};
+
+enum e1000_bus_type {
+	e1000_bus_type_unknown = 0,
+	e1000_bus_type_pci,
+	e1000_bus_type_pcix,
+	e1000_bus_type_pci_express,
+	e1000_bus_type_reserved
+};
+
+enum e1000_bus_speed {
+	e1000_bus_speed_unknown = 0,
+	e1000_bus_speed_33,
+	e1000_bus_speed_66,
+	e1000_bus_speed_100,
+	e1000_bus_speed_120,
+	e1000_bus_speed_133,
+	e1000_bus_speed_2500,
+	e1000_bus_speed_5000,
+	e1000_bus_speed_reserved
+};
+
+enum e1000_bus_width {
+	e1000_bus_width_unknown = 0,
+	e1000_bus_width_pcie_x1,
+	e1000_bus_width_pcie_x2,
+	e1000_bus_width_pcie_x4 = 4,
+	e1000_bus_width_pcie_x8 = 8,
+	e1000_bus_width_32,
+	e1000_bus_width_64,
+	e1000_bus_width_reserved
+};
+
+enum e1000_1000t_rx_status {
+	e1000_1000t_rx_status_not_ok = 0,
+	e1000_1000t_rx_status_ok,
+	e1000_1000t_rx_status_undefined = 0xFF
+};
+
+enum e1000_rev_polarity {
+	e1000_rev_polarity_normal = 0,
+	e1000_rev_polarity_reversed,
+	e1000_rev_polarity_undefined = 0xFF
+};
+
+enum e1000_fc_mode {
+	e1000_fc_none = 0,
+	e1000_fc_rx_pause,
+	e1000_fc_tx_pause,
+	e1000_fc_full,
+	e1000_fc_default = 0xFF
+};
+
+enum e1000_ffe_config {
+	e1000_ffe_config_enabled = 0,
+	e1000_ffe_config_active,
+	e1000_ffe_config_blocked
+};
+
+enum e1000_dsp_config {
+	e1000_dsp_config_disabled = 0,
+	e1000_dsp_config_enabled,
+	e1000_dsp_config_activated,
+	e1000_dsp_config_undefined = 0xFF
+};
+
+enum e1000_ms_type {
+	e1000_ms_hw_default = 0,
+	e1000_ms_force_master,
+	e1000_ms_force_slave,
+	e1000_ms_auto
+};
+
+enum e1000_smart_speed {
+	e1000_smart_speed_default = 0,
+	e1000_smart_speed_on,
+	e1000_smart_speed_off
+};
+
+enum e1000_serdes_link_state {
+	e1000_serdes_link_down = 0,
+	e1000_serdes_link_autoneg_progress,
+	e1000_serdes_link_autoneg_complete,
+	e1000_serdes_link_forced_up
+};
+
+/* Receive Descriptor */
+struct e1000_rx_desc {
+	__le64 buffer_addr; /* Address of the descriptor's data buffer */
+	__le16 length;      /* Length of data DMAed into data buffer */
+	__le16 csum;        /* Packet checksum */
+	u8  status;         /* Descriptor status */
+	u8  errors;         /* Descriptor Errors */
+	__le16 special;
+};
+
+/* Receive Descriptor - Extended */
+union e1000_rx_desc_extended {
+	struct {
+		__le64 buffer_addr;
+		__le64 reserved;
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;         /* RSS Hash */
+				struct {
+					__le16 ip_id;  /* IP id */
+					__le16 csum;   /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length;
+			__le16 vlan;          /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+#define MAX_PS_BUFFERS 4
+/* Receive Descriptor - Packet Split */
+union e1000_rx_desc_packet_split {
+	struct {
+		/* one buffer for protocol header(s), three data buffers */
+		__le64 buffer_addr[MAX_PS_BUFFERS];
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;           /* RSS Hash */
+				struct {
+					__le16 ip_id;    /* IP id */
+					__le16 csum;     /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length0;       /* length of buffer 0 */
+			__le16 vlan;          /* VLAN tag */
+		} middle;
+		struct {
+			__le16 header_status;
+			__le16 length[3];     /* length of buffers 1-3 */
+		} upper;
+		__le64 reserved;
+	} wb; /* writeback */
+};
+
+/* Transmit Descriptor */
+struct e1000_tx_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's data buffer */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 cso;           /* Checksum offset */
+			u8 cmd;           /* Descriptor control */
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 css;           /* Checksum start */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Offload Context Descriptor */
+struct e1000_context_desc {
+	union {
+		__le32 ip_config;
+		struct {
+			u8 ipcss;         /* IP checksum start */
+			u8 ipcso;         /* IP checksum offset */
+			__le16 ipcse;     /* IP checksum end */
+		} ip_fields;
+	} lower_setup;
+	union {
+		__le32 tcp_config;
+		struct {
+			u8 tucss;         /* TCP checksum start */
+			u8 tucso;         /* TCP checksum offset */
+			__le16 tucse;     /* TCP checksum end */
+		} tcp_fields;
+	} upper_setup;
+	__le32 cmd_and_length;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 hdr_len;       /* Header length */
+			__le16 mss;       /* Maximum segment size */
+		} fields;
+	} tcp_seg_setup;
+};
+
+/* Offload data descriptor */
+struct e1000_data_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's buffer address */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 typ_len_ext;
+			u8 cmd;
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 popts;         /* Packet Options */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Statistics counters collected by the MAC */
+struct e1000_hw_stats {
+	u64 crcerrs;
+	u64 algnerrc;
+	u64 symerrs;
+	u64 rxerrc;
+	u64 mpc;
+	u64 scc;
+	u64 ecol;
+	u64 mcc;
+	u64 latecol;
+	u64 colc;
+	u64 dc;
+	u64 tncrs;
+	u64 sec;
+	u64 cexterr;
+	u64 rlec;
+	u64 xonrxc;
+	u64 xontxc;
+	u64 xoffrxc;
+	u64 xofftxc;
+	u64 fcruc;
+	u64 prc64;
+	u64 prc127;
+	u64 prc255;
+	u64 prc511;
+	u64 prc1023;
+	u64 prc1522;
+	u64 gprc;
+	u64 bprc;
+	u64 mprc;
+	u64 gptc;
+	u64 gorc;
+	u64 gotc;
+	u64 rnbc;
+	u64 ruc;
+	u64 rfc;
+	u64 roc;
+	u64 rjc;
+	u64 mgprc;
+	u64 mgpdc;
+	u64 mgptc;
+	u64 tor;
+	u64 tot;
+	u64 tpr;
+	u64 tpt;
+	u64 ptc64;
+	u64 ptc127;
+	u64 ptc255;
+	u64 ptc511;
+	u64 ptc1023;
+	u64 ptc1522;
+	u64 mptc;
+	u64 bptc;
+	u64 tsctc;
+	u64 tsctfc;
+	u64 iac;
+	u64 icrxptc;
+	u64 icrxatc;
+	u64 ictxptc;
+	u64 ictxatc;
+	u64 ictxqec;
+	u64 ictxqmtc;
+	u64 icrxdmtc;
+	u64 icrxoc;
+	u64 cbtmpc;
+	u64 htdpmc;
+	u64 cbrdpc;
+	u64 cbrmpc;
+	u64 rpthc;
+	u64 hgptc;
+	u64 htcbdpc;
+	u64 hgorc;
+	u64 hgotc;
+	u64 lenerrs;
+	u64 scvpc;
+	u64 hrmpc;
+	u64 doosync;
+};
+
+
+struct e1000_phy_stats {
+	u32 idle_errors;
+	u32 receive_errors;
+};
+
+struct e1000_host_mng_dhcp_cookie {
+	u32 signature;
+	u8  status;
+	u8  reserved0;
+	u16 vlan_id;
+	u32 reserved1;
+	u16 reserved2;
+	u8  reserved3;
+	u8  checksum;
+};
+
+/* Host Interface "Rev 1" */
+struct e1000_host_command_header {
+	u8 command_id;
+	u8 command_length;
+	u8 command_options;
+	u8 checksum;
+};
+
+#define E1000_HI_MAX_DATA_LENGTH     252
+struct e1000_host_command_info {
+	struct e1000_host_command_header command_header;
+	u8 command_data[E1000_HI_MAX_DATA_LENGTH];
+};
+
+/* Host Interface "Rev 2" */
+struct e1000_host_mng_command_header {
+	u8  command_id;
+	u8  checksum;
+	u16 reserved1;
+	u16 reserved2;
+	u16 command_length;
+};
+
+#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
+struct e1000_host_mng_command_info {
+	struct e1000_host_mng_command_header command_header;
+	u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
+};
+
+#include "e1000_mac.h"
+#include "e1000_phy.h"
+#include "e1000_nvm.h"
+#include "e1000_manage.h"
+
+struct e1000_mac_operations {
+	/* Function pointers for the MAC. */
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*id_led_init)(struct e1000_hw *);
+	s32  (*blink_led)(struct e1000_hw *);
+	s32  (*check_for_link)(struct e1000_hw *);
+	bool (*check_mng_mode)(struct e1000_hw *hw);
+	s32  (*cleanup_led)(struct e1000_hw *);
+	void (*clear_hw_cntrs)(struct e1000_hw *);
+	void (*clear_vfta)(struct e1000_hw *);
+	s32  (*get_bus_info)(struct e1000_hw *);
+	void (*set_lan_id)(struct e1000_hw *);
+	s32  (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
+	s32  (*led_on)(struct e1000_hw *);
+	s32  (*led_off)(struct e1000_hw *);
+	void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
+	s32  (*reset_hw)(struct e1000_hw *);
+	s32  (*init_hw)(struct e1000_hw *);
+	s32  (*setup_link)(struct e1000_hw *);
+	s32  (*setup_physical_interface)(struct e1000_hw *);
+	s32  (*setup_led)(struct e1000_hw *);
+	void (*write_vfta)(struct e1000_hw *, u32, u32);
+	void (*mta_set)(struct e1000_hw *, u32);
+	void (*config_collision_dist)(struct e1000_hw *);
+	void (*rar_set)(struct e1000_hw *, u8*, u32);
+	s32  (*read_mac_addr)(struct e1000_hw *);
+	s32  (*validate_mdi_setting)(struct e1000_hw *);
+	s32  (*mng_host_if_write)(struct e1000_hw *, u8*, u16, u16, u8*);
+	s32  (*mng_write_cmd_header)(struct e1000_hw *hw,
+                      struct e1000_host_mng_command_header*);
+	s32  (*mng_enable_host_if)(struct e1000_hw *);
+	s32  (*wait_autoneg)(struct e1000_hw *);
+};
+
+struct e1000_phy_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*check_polarity)(struct e1000_hw *);
+	s32  (*check_reset_block)(struct e1000_hw *);
+	s32  (*commit)(struct e1000_hw *);
+#if 0
+	s32  (*force_speed_duplex)(struct e1000_hw *);
+#endif
+	s32  (*get_cfg_done)(struct e1000_hw *hw);
+#if 0
+	s32  (*get_cable_length)(struct e1000_hw *);
+#endif
+	s32  (*get_info)(struct e1000_hw *);
+	s32  (*read_reg)(struct e1000_hw *, u32, u16 *);
+	void (*release)(struct e1000_hw *);
+	s32  (*reset)(struct e1000_hw *);
+	s32  (*set_d0_lplu_state)(struct e1000_hw *, bool);
+	s32  (*set_d3_lplu_state)(struct e1000_hw *, bool);
+	s32  (*write_reg)(struct e1000_hw *, u32, u16);
+	void (*power_up)(struct e1000_hw *);
+	void (*power_down)(struct e1000_hw *);
+};
+
+struct e1000_nvm_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*read)(struct e1000_hw *, u16, u16, u16 *);
+	void (*release)(struct e1000_hw *);
+	void (*reload)(struct e1000_hw *);
+	s32  (*update)(struct e1000_hw *);
+	s32  (*valid_led_default)(struct e1000_hw *, u16 *);
+	s32  (*validate)(struct e1000_hw *);
+	s32  (*write)(struct e1000_hw *, u16, u16, u16 *);
+};
+
+struct e1000_mac_info {
+	struct e1000_mac_operations ops;
+	u8 addr[6];
+	u8 perm_addr[6];
+
+	enum e1000_mac_type type;
+
+	u32 collision_delta;
+	u32 ledctl_default;
+	u32 ledctl_mode1;
+	u32 ledctl_mode2;
+	u32 mc_filter_type;
+	u32 tx_packet_delta;
+	u32 txcw;
+
+	u16 current_ifs_val;
+	u16 ifs_max_val;
+	u16 ifs_min_val;
+	u16 ifs_ratio;
+	u16 ifs_step_size;
+	u16 mta_reg_count;
+
+	/* Maximum size of the MTA register table in all supported adapters */
+	#define MAX_MTA_REG 128
+	u32 mta_shadow[MAX_MTA_REG];
+	u16 rar_entry_count;
+
+	u8  forced_speed_duplex;
+
+	bool adaptive_ifs;
+	bool arc_subsystem_valid;
+	bool asf_firmware_present;
+	bool autoneg;
+	bool autoneg_failed;
+	bool get_link_status;
+	bool in_ifs_mode;
+	bool report_tx_early;
+	enum e1000_serdes_link_state serdes_link_state;
+	bool serdes_has_link;
+	bool tx_pkt_filtering;
+};
+
+struct e1000_phy_info {
+	struct e1000_phy_operations ops;
+	enum e1000_phy_type type;
+
+	enum e1000_1000t_rx_status local_rx;
+	enum e1000_1000t_rx_status remote_rx;
+	enum e1000_ms_type ms_type;
+	enum e1000_ms_type original_ms_type;
+	enum e1000_rev_polarity cable_polarity;
+	enum e1000_smart_speed smart_speed;
+
+	u32 addr;
+	u32 id;
+	u32 reset_delay_us; /* in usec */
+	u32 revision;
+
+	enum e1000_media_type media_type;
+
+	u16 autoneg_advertised;
+	u16 autoneg_mask;
+	u16 cable_length;
+	u16 max_cable_length;
+	u16 min_cable_length;
+
+	u8 mdix;
+
+	bool disable_polarity_correction;
+	bool is_mdix;
+	bool polarity_correction;
+	bool reset_disable;
+	bool speed_downgraded;
+	bool autoneg_wait_to_complete;
+};
+
+struct e1000_nvm_info {
+	struct e1000_nvm_operations ops;
+	enum e1000_nvm_type type;
+	enum e1000_nvm_override override;
+
+	u32 flash_bank_size;
+	u32 flash_base_addr;
+
+	u16 word_size;
+	u16 delay_usec;
+	u16 address_bits;
+	u16 opcode_bits;
+	u16 page_size;
+};
+
+struct e1000_bus_info {
+	enum e1000_bus_type type;
+	enum e1000_bus_speed speed;
+	enum e1000_bus_width width;
+
+	u16 func;
+	u16 pci_cmd_word;
+};
+
+struct e1000_fc_info {
+	u32 high_water;          /* Flow control high-water mark */
+	u32 low_water;           /* Flow control low-water mark */
+	u16 pause_time;          /* Flow control pause timer */
+	bool send_xon;           /* Flow control send XON */
+	bool strict_ieee;        /* Strict IEEE mode */
+	enum e1000_fc_mode current_mode; /* FC mode in effect */
+	enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
+};
+
+struct e1000_dev_spec_82541 {
+	enum e1000_dsp_config dsp_config;
+	enum e1000_ffe_config ffe_config;
+	u16 spd_default;
+	bool phy_init_script;
+};
+
+struct e1000_dev_spec_82542 {
+	bool dma_fairness;
+};
+
+struct e1000_dev_spec_82543 {
+	u32  tbi_compatibility;
+	bool dma_fairness;
+	bool init_phy_disabled;
+};
+
+struct e1000_hw {
+	void *back;
+
+	u8 __iomem *hw_addr;
+	u8 __iomem *flash_address;
+	unsigned long io_base;
+
+	struct e1000_mac_info  mac;
+	struct e1000_fc_info   fc;
+	struct e1000_phy_info  phy;
+	struct e1000_nvm_info  nvm;
+	struct e1000_bus_info  bus;
+	struct e1000_host_mng_dhcp_cookie mng_cookie;
+
+	union {
+		struct e1000_dev_spec_82541	_82541;
+		struct e1000_dev_spec_82542	_82542;
+		struct e1000_dev_spec_82543	_82543;
+	} dev_spec;
+
+	u16 device_id;
+	u16 subsystem_vendor_id;
+	u16 subsystem_device_id;
+	u16 vendor_id;
+
+	u8  revision_id;
+};
+
+#include "e1000_82541.h"
+#include "e1000_82543.h"
+
+/* These functions must be implemented by drivers */
+void e1000_pci_clear_mwi(struct e1000_hw *hw);
+void e1000_pci_set_mwi(struct e1000_hw *hw);
+s32  e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
+void e1000_read_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
+void e1000_write_pci_cfg(struct e1000_hw *hw, u32 reg, u16 *value);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_mac.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_mac.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_mac.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_mac.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2196 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000_api.h"
+
+static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
+static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
+
+/**
+ *  e1000_init_mac_ops_generic - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void e1000_init_mac_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	DEBUGFUNC("e1000_init_mac_ops_generic");
+
+	/* General Setup */
+	mac->ops.init_params = e1000_null_ops_generic;
+	mac->ops.init_hw = e1000_null_ops_generic;
+	mac->ops.reset_hw = e1000_null_ops_generic;
+	mac->ops.setup_physical_interface = e1000_null_ops_generic;
+	mac->ops.get_bus_info = e1000_null_ops_generic;
+	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pcie;
+	mac->ops.read_mac_addr = e1000_read_mac_addr_generic;
+	mac->ops.config_collision_dist = e1000_config_collision_dist_generic;
+	mac->ops.clear_hw_cntrs = e1000_null_mac_generic;
+	/* LED */
+	mac->ops.cleanup_led = e1000_null_ops_generic;
+	mac->ops.setup_led = e1000_null_ops_generic;
+	mac->ops.blink_led = e1000_null_ops_generic;
+	mac->ops.led_on = e1000_null_ops_generic;
+	mac->ops.led_off = e1000_null_ops_generic;
+	/* LINK */
+	mac->ops.setup_link = e1000_null_ops_generic;
+	mac->ops.get_link_up_info = e1000_null_link_info;
+	mac->ops.check_for_link = e1000_null_ops_generic;
+	mac->ops.wait_autoneg = e1000_wait_autoneg_generic;
+#if 0
+	/* Management */
+	mac->ops.check_mng_mode = e1000_null_mng_mode;
+	mac->ops.mng_host_if_write = e1000_mng_host_if_write_generic;
+	mac->ops.mng_write_cmd_header = e1000_mng_write_cmd_header_generic;
+	mac->ops.mng_enable_host_if = e1000_mng_enable_host_if_generic;
+#endif
+	/* VLAN, MC, etc. */
+	mac->ops.update_mc_addr_list = e1000_null_update_mc;
+	mac->ops.clear_vfta = e1000_null_mac_generic;
+	mac->ops.write_vfta = e1000_null_write_vfta;
+	mac->ops.mta_set = e1000_null_mta_set;
+	mac->ops.rar_set = e1000_rar_set_generic;
+	mac->ops.validate_mdi_setting = e1000_validate_mdi_setting_generic;
+}
+
+/**
+ *  e1000_null_ops_generic - No-op function, returns 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_ops_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_null_ops_generic");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_mac_generic - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_mac_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_null_mac_generic");
+	return;
+}
+
+/**
+ *  e1000_null_link_info - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_link_info(struct e1000_hw *hw __unused,
+                         u16 *s __unused, u16 *d __unused)
+{
+	DEBUGFUNC("e1000_null_link_info");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_mng_mode - No-op function, return false
+ *  @hw: pointer to the HW structure
+ **/
+bool e1000_null_mng_mode(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_null_mng_mode");
+	return false;
+}
+
+/**
+ *  e1000_null_update_mc - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_update_mc(struct e1000_hw *hw __unused,
+                          u8 *h __unused, u32 a __unused)
+{
+	DEBUGFUNC("e1000_null_update_mc");
+	return;
+}
+
+/**
+ *  e1000_null_write_vfta - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_write_vfta(struct e1000_hw *hw __unused,
+                           u32 a __unused, u32 b __unused)
+{
+	DEBUGFUNC("e1000_null_write_vfta");
+	return;
+}
+
+/**
+ *  e1000_null_set_mta - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_mta_set(struct e1000_hw *hw __unused, u32 a __unused)
+{
+	DEBUGFUNC("e1000_null_mta_set");
+	return;
+}
+
+/**
+ *  e1000_null_rar_set - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_rar_set(struct e1000_hw *hw __unused, u8 *h __unused,
+                        u32 a __unused)
+{
+	DEBUGFUNC("e1000_null_rar_set");
+	return;
+}
+
+/**
+ *  e1000_get_bus_info_pci_generic - Get PCI(x) bus information
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines and stores the system bus information for a particular
+ *  network interface.  The following bus information is determined and stored:
+ *  bus speed, bus width, type (PCI/PCIx), and PCI(-x) function.
+ **/
+s32 e1000_get_bus_info_pci_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_bus_info *bus = &hw->bus;
+	u32 status = E1000_READ_REG(hw, E1000_STATUS);
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_get_bus_info_pci_generic");
+
+	/* PCI or PCI-X? */
+	bus->type = (status & E1000_STATUS_PCIX_MODE)
+			? e1000_bus_type_pcix
+			: e1000_bus_type_pci;
+
+	/* Bus speed */
+	if (bus->type == e1000_bus_type_pci) {
+		bus->speed = (status & E1000_STATUS_PCI66)
+		             ? e1000_bus_speed_66
+		             : e1000_bus_speed_33;
+	} else {
+		switch (status & E1000_STATUS_PCIX_SPEED) {
+		case E1000_STATUS_PCIX_SPEED_66:
+			bus->speed = e1000_bus_speed_66;
+			break;
+		case E1000_STATUS_PCIX_SPEED_100:
+			bus->speed = e1000_bus_speed_100;
+			break;
+		case E1000_STATUS_PCIX_SPEED_133:
+			bus->speed = e1000_bus_speed_133;
+			break;
+		default:
+			bus->speed = e1000_bus_speed_reserved;
+			break;
+		}
+	}
+
+	/* Bus width */
+	bus->width = (status & E1000_STATUS_BUS64)
+	             ? e1000_bus_width_64
+	             : e1000_bus_width_32;
+
+	/* Which PCI(-X) function? */
+	mac->ops.set_lan_id(hw);
+
+	return ret_val;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_get_bus_info_pcie_generic - Get PCIe bus information
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines and stores the system bus information for a particular
+ *  network interface.  The following bus information is determined and stored:
+ *  bus speed, bus width, type (PCIe), and PCIe function.
+ **/
+s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_bus_info *bus = &hw->bus;
+
+	s32 ret_val;
+	u16 pcie_link_status;
+
+	DEBUGFUNC("e1000_get_bus_info_pcie_generic");
+
+	bus->type = e1000_bus_type_pci_express;
+	bus->speed = e1000_bus_speed_2500;
+
+	ret_val = e1000_read_pcie_cap_reg(hw,
+	                                  PCIE_LINK_STATUS,
+	                                  &pcie_link_status);
+	if (ret_val)
+		bus->width = e1000_bus_width_unknown;
+	else
+		bus->width = (enum e1000_bus_width)((pcie_link_status &
+		                                PCIE_LINK_WIDTH_MASK) >>
+		                               PCIE_LINK_WIDTH_SHIFT);
+
+	mac->ops.set_lan_id(hw);
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
+ *
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers
+ *  and swaps the port value if requested.
+ **/
+static void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	u32 reg;
+
+	/*
+	 * The status register reports the correct function number
+	 * for the device regardless of function swap state.
+	 */
+	reg = E1000_READ_REG(hw, E1000_STATUS);
+	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
+}
+
+/**
+ *  e1000_set_lan_id_multi_port_pci - Set LAN id for PCI multiple port devices
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading PCI config space.
+ **/
+void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	u16 pci_header_type;
+	u32 status;
+
+	e1000_read_pci_cfg(hw, PCI_HEADER_TYPE_REGISTER, &pci_header_type);
+	if (pci_header_type & PCI_HEADER_TYPE_MULTIFUNC) {
+		status = E1000_READ_REG(hw, E1000_STATUS);
+		bus->func = (status & E1000_STATUS_FUNC_MASK)
+		            >> E1000_STATUS_FUNC_SHIFT;
+	} else {
+		bus->func = 0;
+	}
+}
+
+/**
+ *  e1000_set_lan_id_single_port - Set LAN id for a single port device
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the LAN function id to zero for a single port device.
+ **/
+void e1000_set_lan_id_single_port(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+
+	bus->func = 0;
+}
+
+/**
+ *  e1000_clear_vfta_generic - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the register array which contains the VLAN filter table by
+ *  setting all the values to 0.
+ **/
+void e1000_clear_vfta_generic(struct e1000_hw *hw)
+{
+	u32 offset;
+
+	DEBUGFUNC("e1000_clear_vfta_generic");
+
+	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
+		E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
+		E1000_WRITE_FLUSH(hw);
+	}
+}
+
+/**
+ *  e1000_write_vfta_generic - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset in VLAN filter table
+ *  @value: register value written to VLAN filter table
+ *
+ *  Writes value at the given offset in the register array which stores
+ *  the VLAN filter table.
+ **/
+void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	DEBUGFUNC("e1000_write_vfta_generic");
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  e1000_init_rx_addrs_generic - Initialize receive address's
+ *  @hw: pointer to the HW structure
+ *  @rar_count: receive address registers
+ *
+ *  Setups the receive address registers by setting the base receive address
+ *  register to the devices MAC address and clearing all the other receive
+ *  address registers to 0.
+ **/
+void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)
+{
+	u32 i;
+	u8 mac_addr[ETH_ADDR_LEN] = {0};
+
+	DEBUGFUNC("e1000_init_rx_addrs_generic");
+
+	/* Setup the receive address */
+	DEBUGOUT("Programming MAC Address into RAR[0]\n");
+
+	hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
+
+	/* Zero out the other (rar_entry_count - 1) receive addresses */
+	DEBUGOUT1("Clearing RAR[1-%u]\n", rar_count-1);
+	for (i = 1; i < rar_count; i++)
+		hw->mac.ops.rar_set(hw, mac_addr, i);
+}
+
+/**
+ *  e1000_check_alt_mac_addr_generic - Check for alternate MAC addr
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the nvm for an alternate MAC address.  An alternate MAC address
+ *  can be setup by pre-boot software and must be treated like a permanent
+ *  address and must override the actual permanent MAC address. If an
+ *  alternate MAC address is found it is programmed into RAR0, replacing
+ *  the permanent address that was installed into RAR0 by the Si on reset.
+ *  This function will return SUCCESS unless it encounters an error while
+ *  reading the EEPROM.
+ **/
+s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 i;
+	s32 ret_val = E1000_SUCCESS;
+	u16 offset, nvm_alt_mac_addr_offset, nvm_data;
+	u8 alt_mac_addr[ETH_ADDR_LEN];
+
+	DEBUGFUNC("e1000_check_alt_mac_addr_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
+	                         &nvm_alt_mac_addr_offset);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (nvm_alt_mac_addr_offset == 0xFFFF) {
+		/* There is no Alternate MAC Address */
+		goto out;
+	}
+
+	if (hw->bus.func == E1000_FUNC_1)
+		nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1;
+	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+		offset = nvm_alt_mac_addr_offset + (i >> 1);
+		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			goto out;
+		}
+
+		alt_mac_addr[i] = (u8)(nvm_data & 0xFF);
+		alt_mac_addr[i + 1] = (u8)(nvm_data >> 8);
+	}
+
+	/* if multicast bit is set, the alternate address will not be used */
+	if (alt_mac_addr[0] & 0x01) {
+		DEBUGOUT("Ignoring Alternate Mac Address with MC bit set\n");
+		goto out;
+	}
+
+	/*
+	 * We have a valid alternate MAC address, and we want to treat it the
+	 * same as the normal permanent MAC address stored by the HW into the
+	 * RAR. Do this by mapping this address into RAR0.
+	 */
+	hw->mac.ops.rar_set(hw, alt_mac_addr, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_rar_set_generic - Set receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: pointer to the receive address
+ *  @index: receive address array register
+ *
+ *  Sets the receive address array register at index to the address passed
+ *  in by addr.
+ **/
+void e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	u32 rar_low, rar_high;
+
+	DEBUGFUNC("e1000_rar_set_generic");
+
+	/*
+	 * HW expects these in little endian so we reverse the byte order
+	 * from network order (big endian) to little endian
+	 */
+	rar_low = ((u32) addr[0] |
+	           ((u32) addr[1] << 8) |
+	           ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+
+	rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
+
+	/* If MAC address zero, no need to set the AV bit */
+	if (rar_low || rar_high)
+		rar_high |= E1000_RAH_AV;
+
+	/*
+	 * Some bridges will combine consecutive 32-bit writes into
+	 * a single burst write, which will malfunction on some parts.
+	 * The flushes avoid this.
+	 */
+	E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
+	E1000_WRITE_FLUSH(hw);
+	E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  e1000_mta_set_generic - Set multicast filter table address
+ *  @hw: pointer to the HW structure
+ *  @hash_value: determines the MTA register and bit to set
+ *
+ *  The multicast table address is a register array of 32-bit registers.
+ *  The hash_value is used to determine what register the bit is in, the
+ *  current value is read, the new bit is OR'd in and the new value is
+ *  written back into the register.
+ **/
+void e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value)
+{
+	u32 hash_bit, hash_reg, mta;
+
+	DEBUGFUNC("e1000_mta_set_generic");
+	/*
+	 * The MTA is a register array of 32-bit registers. It is
+	 * treated like an array of (32*mta_reg_count) bits.  We want to
+	 * set bit BitArray[hash_value]. So we figure out what register
+	 * the bit is in, read it, OR in the new bit, then write
+	 * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
+	 * mask to bits 31:5 of the hash value which gives us the
+	 * register we're modifying.  The hash bit within that register
+	 * is determined by the lower 5 bits of the hash value.
+	 */
+	hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+	hash_bit = hash_value & 0x1F;
+
+	mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
+
+	mta |= (1 << hash_bit);
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  e1000_update_mc_addr_list_generic - Update Multicast addresses
+ *  @hw: pointer to the HW structure
+ *  @mc_addr_list: array of multicast addresses to program
+ *  @mc_addr_count: number of multicast addresses to program
+ *
+ *  Updates entire Multicast Table Array.
+ *  The caller must have a packed mc_addr_list of multicast addresses.
+ **/
+void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
+                                       u8 *mc_addr_list, u32 mc_addr_count)
+{
+	u32 hash_value, hash_bit, hash_reg;
+	int i;
+
+	DEBUGFUNC("e1000_update_mc_addr_list_generic");
+
+	/* clear mta_shadow */
+	memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
+
+	/* update mta_shadow from mc_addr_list */
+	for (i = 0; (u32) i < mc_addr_count; i++) {
+		hash_value = e1000_hash_mc_addr_generic(hw, mc_addr_list);
+
+		hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+		hash_bit = hash_value & 0x1F;
+
+		hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);
+		mc_addr_list += (ETH_ADDR_LEN);
+	}
+
+	/* replace the entire MTA table */
+	for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  e1000_hash_mc_addr_generic - Generate a multicast hash value
+ *  @hw: pointer to the HW structure
+ *  @mc_addr: pointer to a multicast address
+ *
+ *  Generates a multicast address hash value which is used to determine
+ *  the multicast filter table array address and new table value.  See
+ *  e1000_mta_set_generic()
+ **/
+u32 e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
+{
+	u32 hash_value, hash_mask;
+	u8 bit_shift = 0;
+
+	DEBUGFUNC("e1000_hash_mc_addr_generic");
+
+	/* Register count multiplied by bits per register */
+	hash_mask = (hw->mac.mta_reg_count * 32) - 1;
+
+	/*
+	 * For a mc_filter_type of 0, bit_shift is the number of left-shifts
+	 * where 0xFF would still fall within the hash mask.
+	 */
+	while (hash_mask >> bit_shift != 0xFF)
+		bit_shift++;
+
+	/*
+	 * The portion of the address that is used for the hash table
+	 * is determined by the mc_filter_type setting.
+	 * The algorithm is such that there is a total of 8 bits of shifting.
+	 * The bit_shift for a mc_filter_type of 0 represents the number of
+	 * left-shifts where the MSB of mc_addr[5] would still fall within
+	 * the hash_mask.  Case 0 does this exactly.  Since there are a total
+	 * of 8 bits of shifting, then mc_addr[4] will shift right the
+	 * remaining number of bits. Thus 8 - bit_shift.  The rest of the
+	 * cases are a variation of this algorithm...essentially raising the
+	 * number of bits to shift mc_addr[5] left, while still keeping the
+	 * 8-bit shifting total.
+	 *
+	 * For example, given the following Destination MAC Address and an
+	 * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),
+	 * we can see that the bit_shift for case 0 is 4.  These are the hash
+	 * values resulting from each mc_filter_type...
+	 * [0] [1] [2] [3] [4] [5]
+	 * 01  AA  00  12  34  56
+	 * LSB                 MSB
+	 *
+	 * case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563
+	 * case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6
+	 * case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163
+	 * case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634
+	 */
+	switch (hw->mac.mc_filter_type) {
+	default:
+	case 0:
+		break;
+	case 1:
+		bit_shift += 1;
+		break;
+	case 2:
+		bit_shift += 2;
+		break;
+	case 3:
+		bit_shift += 4;
+		break;
+	}
+
+	hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
+	                          (((u16) mc_addr[5]) << bit_shift)));
+
+	return hash_value;
+}
+
+/**
+ *  e1000_pcix_mmrbc_workaround_generic - Fix incorrect MMRBC value
+ *  @hw: pointer to the HW structure
+ *
+ *  In certain situations, a system BIOS may report that the PCIx maximum
+ *  memory read byte count (MMRBC) value is higher than than the actual
+ *  value. We check the PCIx command register with the current PCIx status
+ *  register.
+ **/
+void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw)
+{
+	u16 cmd_mmrbc;
+	u16 pcix_cmd;
+	u16 pcix_stat_hi_word;
+	u16 stat_mmrbc;
+
+	DEBUGFUNC("e1000_pcix_mmrbc_workaround_generic");
+
+	/* Workaround for PCI-X issue when BIOS sets MMRBC incorrectly */
+	if (hw->bus.type != e1000_bus_type_pcix)
+		return;
+
+	e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
+	e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, &pcix_stat_hi_word);
+	cmd_mmrbc = (pcix_cmd & PCIX_COMMAND_MMRBC_MASK) >>
+	             PCIX_COMMAND_MMRBC_SHIFT;
+	stat_mmrbc = (pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK) >>
+	              PCIX_STATUS_HI_MMRBC_SHIFT;
+	if (stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K)
+		stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K;
+	if (cmd_mmrbc > stat_mmrbc) {
+		pcix_cmd &= ~PCIX_COMMAND_MMRBC_MASK;
+		pcix_cmd |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT;
+		e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd);
+	}
+}
+
+/**
+ *  e1000_clear_hw_cntrs_base_generic - Clear base hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the base hardware counters by reading the counter registers.
+ **/
+void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_clear_hw_cntrs_base_generic");
+
+#if 0
+	E1000_READ_REG(hw, E1000_CRCERRS);
+	E1000_READ_REG(hw, E1000_SYMERRS);
+	E1000_READ_REG(hw, E1000_MPC);
+	E1000_READ_REG(hw, E1000_SCC);
+	E1000_READ_REG(hw, E1000_ECOL);
+	E1000_READ_REG(hw, E1000_MCC);
+	E1000_READ_REG(hw, E1000_LATECOL);
+	E1000_READ_REG(hw, E1000_COLC);
+	E1000_READ_REG(hw, E1000_DC);
+	E1000_READ_REG(hw, E1000_SEC);
+	E1000_READ_REG(hw, E1000_RLEC);
+	E1000_READ_REG(hw, E1000_XONRXC);
+	E1000_READ_REG(hw, E1000_XONTXC);
+	E1000_READ_REG(hw, E1000_XOFFRXC);
+	E1000_READ_REG(hw, E1000_XOFFTXC);
+	E1000_READ_REG(hw, E1000_FCRUC);
+	E1000_READ_REG(hw, E1000_GPRC);
+	E1000_READ_REG(hw, E1000_BPRC);
+	E1000_READ_REG(hw, E1000_MPRC);
+	E1000_READ_REG(hw, E1000_GPTC);
+	E1000_READ_REG(hw, E1000_GORCL);
+	E1000_READ_REG(hw, E1000_GORCH);
+	E1000_READ_REG(hw, E1000_GOTCL);
+	E1000_READ_REG(hw, E1000_GOTCH);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_RUC);
+	E1000_READ_REG(hw, E1000_RFC);
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RJC);
+	E1000_READ_REG(hw, E1000_TORL);
+	E1000_READ_REG(hw, E1000_TORH);
+	E1000_READ_REG(hw, E1000_TOTL);
+	E1000_READ_REG(hw, E1000_TOTH);
+	E1000_READ_REG(hw, E1000_TPR);
+	E1000_READ_REG(hw, E1000_TPT);
+	E1000_READ_REG(hw, E1000_MPTC);
+	E1000_READ_REG(hw, E1000_BPTC);
+#endif
+}
+
+/**
+ *  e1000_check_for_copper_link_generic - Check for link (Copper)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks to see of the link status of the hardware has changed.  If a
+ *  change in link status has been detected, then we read the PHY registers
+ *  to get the current speed/duplex if link exists.
+ **/
+s32 e1000_check_for_copper_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("e1000_check_for_copper_link");
+
+	/*
+	 * We only want to go out to the PHY registers to see if Auto-Neg
+	 * has completed and/or if our link status has changed.  The
+	 * get_link_status flag is set upon receiving a Link Status
+	 * Change or Rx Sequence Error interrupt.
+	 */
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/*
+	 * First we want to see if the MII Status Register reports
+	 * link.  If so, then we want to get the current speed/duplex
+	 * of the PHY.
+	 */
+	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link)
+		goto out; /* No link detected */
+
+	mac->get_link_status = false;
+
+	/*
+	 * Check if there was DownShift, must be checked
+	 * immediately after link-up
+	 */
+	e1000_check_downshift_generic(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we simply return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Auto-Neg is enabled.  Auto Speed Detection takes care
+	 * of MAC speed/duplex configuration.  So we only need to
+	 * configure Collision Distance in the MAC.
+	 */
+	e1000_config_collision_dist_generic(hw);
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = e1000_config_fc_after_link_up_generic(hw);
+	if (ret_val)
+		DEBUGOUT("Error configuring flow control\n");
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_for_fiber_link_generic - Check for link (Fiber)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 e1000_check_for_fiber_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_check_for_fiber_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	rxcw = E1000_READ_REG(hw, E1000_RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), the cable is plugged in (we have signal),
+	 * and our link partner is not trying to auto-negotiate with us (we
+	 * are receiving idles or data), we need to force link up. We also
+	 * need to give auto-negotiation time to complete, in case the cable
+	 * was just plugged in. The autoneg_failed flag does this.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((ctrl & E1000_CTRL_SWDPIN1) && (!(status & E1000_STATUS_LU)) &&
+	    (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_for_serdes_link_generic - Check for link (Serdes)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 e1000_check_for_serdes_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_check_for_serdes_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	rxcw = E1000_READ_REG(hw, E1000_RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), and our link partner is not trying to
+	 * auto-negotiate with us (we are receiving idles or data),
+	 * we need to force link up. We also need to give auto-negotiation
+	 * time to complete.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((!(status & E1000_STATUS_LU)) && (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	} else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) {
+		/*
+		 * If we force link for non-auto-negotiation switch, check
+		 * link status based on MAC synchronization for internal
+		 * serdes media type.
+		 */
+		/* SYNCH bit and IV bit are sticky. */
+		usec_delay(10);
+		rxcw = E1000_READ_REG(hw, E1000_RXCW);
+		if (rxcw & E1000_RXCW_SYNCH) {
+			if (!(rxcw & E1000_RXCW_IV)) {
+				mac->serdes_has_link = true;
+				DEBUGOUT("SERDES: Link up - forced.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			DEBUGOUT("SERDES: Link down - force failed.\n");
+		}
+	}
+
+	if (E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW)) {
+		status = E1000_READ_REG(hw, E1000_STATUS);
+		if (status & E1000_STATUS_LU) {
+			/* SYNCH bit and IV bit are sticky, so reread rxcw. */
+			usec_delay(10);
+			rxcw = E1000_READ_REG(hw, E1000_RXCW);
+			if (rxcw & E1000_RXCW_SYNCH) {
+				if (!(rxcw & E1000_RXCW_IV)) {
+					mac->serdes_has_link = true;
+					DEBUGOUT("SERDES: Link up - autoneg "
+					   "completed sucessfully.\n");
+				} else {
+					mac->serdes_has_link = false;
+					DEBUGOUT("SERDES: Link down - invalid"
+					   "codewords detected in autoneg.\n");
+				}
+			} else {
+				mac->serdes_has_link = false;
+				DEBUGOUT("SERDES: Link down - no sync.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			DEBUGOUT("SERDES: Link down - autoneg failed\n");
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_link_generic - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+s32 e1000_setup_link_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_setup_link_generic");
+
+	/*
+	 * In the case of the phy reset being blocked, we already have a link.
+	 * We do not need to set it up again.
+	 */
+	if (hw->phy.ops.check_reset_block)
+		if (hw->phy.ops.check_reset_block(hw))
+			goto out;
+
+	/*
+	 * If requested flow control is set to default, set flow control
+	 * based on the EEPROM flow control settings.
+	 */
+	if (hw->fc.requested_mode == e1000_fc_default) {
+		ret_val = e1000_set_default_fc_generic(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
+
+	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+		hw->fc.current_mode);
+
+	/* Call the necessary media_type subroutine to configure the link. */
+	ret_val = hw->mac.ops.setup_physical_interface(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Initialize the flow control address, type, and PAUSE timer
+	 * registers to their default values.  This is done even if flow
+	 * control is disabled, because it does not hurt anything to
+	 * initialize these registers.
+	 */
+	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
+	E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);
+	E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+	E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
+
+	E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
+
+	ret_val = e1000_set_fc_watermarks_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_fiber_serdes_link_generic - Setup link for fiber/serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures collision distance and flow control for fiber and serdes
+ *  links.  Upon successful setup, poll for link.
+ **/
+s32 e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_setup_fiber_serdes_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/* Take the link out of reset */
+	ctrl &= ~E1000_CTRL_LRST;
+
+	e1000_config_collision_dist_generic(hw);
+
+	ret_val = e1000_commit_fc_settings_generic(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Since auto-negotiation is enabled, take the link out of reset (the
+	 * link will be in reset, because we previously reset the chip). This
+	 * will restart auto-negotiation.  If auto-negotiation is successful
+	 * then the link-up status bit will be set and the flow control enable
+	 * bits (RFCE and TFCE) will be set according to their negotiated value.
+	 */
+	DEBUGOUT("Auto-negotiation enabled\n");
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(1);
+
+	/*
+	 * For these adapters, the SW definable pin 1 is set when the optics
+	 * detect a signal.  If we have a signal, then poll for a "Link-Up"
+	 * indication.
+	 */
+	if (hw->phy.media_type == e1000_media_type_internal_serdes ||
+	    (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {
+		ret_val = e1000_poll_fiber_serdes_link_generic(hw);
+	} else {
+		DEBUGOUT("No signal detected\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_config_collision_dist_generic - Configure collision distance
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the collision distance to the default value and is used
+ *  during link setup. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void e1000_config_collision_dist_generic(struct e1000_hw *hw)
+{
+	u32 tctl;
+
+	DEBUGFUNC("e1000_config_collision_dist_generic");
+
+	tctl = E1000_READ_REG(hw, E1000_TCTL);
+
+	tctl &= ~E1000_TCTL_COLD;
+	tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
+
+	E1000_WRITE_REG(hw, E1000_TCTL, tctl);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  e1000_poll_fiber_serdes_link_generic - Poll for link up
+ *  @hw: pointer to the HW structure
+ *
+ *  Polls for link up by reading the status register, if link fails to come
+ *  up with auto-negotiation, then the link is forced if a signal is detected.
+ **/
+s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 i, status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_poll_fiber_serdes_link_generic");
+
+	/*
+	 * If we have a signal (the cable is plugged in, or assumed true for
+	 * serdes media) then poll for a "Link-Up" indication in the Device
+	 * Status Register.  Time-out if a link isn't seen in 500 milliseconds
+	 * seconds (Auto-negotiation should complete in less than 500
+	 * milliseconds even if the other end is doing it in SW).
+	 */
+	for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) {
+		msec_delay(10);
+		status = E1000_READ_REG(hw, E1000_STATUS);
+		if (status & E1000_STATUS_LU)
+			break;
+	}
+	if (i == FIBER_LINK_UP_LIMIT) {
+		DEBUGOUT("Never got a valid link from auto-neg!!!\n");
+		mac->autoneg_failed = 1;
+		/*
+		 * AutoNeg failed to achieve a link, so we'll call
+		 * mac->check_for_link. This routine will force the
+		 * link up if we detect a signal. This will allow us to
+		 * communicate with non-autonegotiating link partners.
+		 */
+		ret_val = hw->mac.ops.check_for_link(hw);
+		if (ret_val) {
+			DEBUGOUT("Error while checking for link\n");
+			goto out;
+		}
+		mac->autoneg_failed = 0;
+	} else {
+		mac->autoneg_failed = 0;
+		DEBUGOUT("Valid Link Found\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_commit_fc_settings_generic - Configure flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  Write the flow control settings to the Transmit Config Word Register (TXCW)
+ *  base on the flow control settings in e1000_mac_info.
+ **/
+s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 txcw;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_commit_fc_settings_generic");
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the device accordingly.  If auto-negotiation is enabled, then
+	 * software will have to set the "PAUSE" bits to the correct value in
+	 * the Transmit Config Word Register (TXCW) and re-start auto-
+	 * negotiation.  However, if auto-negotiation is disabled, then
+	 * software will have to manually configure the two flow control enable
+	 * bits in the CTRL register.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames,
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames but we
+	 *          do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/* Flow control completely disabled by a software over-ride. */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled and Tx Flow control is disabled
+		 * by a software over-ride. Since there really isn't a way to
+		 * advertise that we are capable of Rx Pause ONLY, we will
+		 * advertise that we support both symmetric and asymmetric RX
+		 * PAUSE.  Later, we will disable the adapter's ability to send
+		 * PAUSE frames.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is disabled,
+		 * by a software over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR);
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+
+	E1000_WRITE_REG(hw, E1000_TXCW, txcw);
+	mac->txcw = txcw;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_set_fc_watermarks_generic - Set flow control high/low watermarks
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the flow control high/low threshold (watermark) registers.  If
+ *  flow control XON frame transmission is enabled, then set XON frame
+ *  transmission as well.
+ **/
+s32 e1000_set_fc_watermarks_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 fcrtl = 0, fcrth = 0;
+
+	DEBUGFUNC("e1000_set_fc_watermarks_generic");
+
+	/*
+	 * Set the flow control receive threshold registers.  Normally,
+	 * these registers will be set to a default threshold that may be
+	 * adjusted later by the driver's runtime code.  However, if the
+	 * ability to transmit pause frames is not enabled, then these
+	 * registers will be set to 0.
+	 */
+	if (hw->fc.current_mode & e1000_fc_tx_pause) {
+		/*
+		 * We need to set up the Receive Threshold high and low water
+		 * marks as well as (optionally) enabling the transmission of
+		 * XON frames.
+		 */
+		fcrtl = hw->fc.low_water;
+		if (hw->fc.send_xon)
+			fcrtl |= E1000_FCRTL_XONE;
+
+		fcrth = hw->fc.high_water;
+	}
+	E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl);
+	E1000_WRITE_REG(hw, E1000_FCRTH, fcrth);
+
+	return ret_val;
+}
+
+/**
+ *  e1000_set_default_fc_generic - Set flow control default values
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the EEPROM for the default values for flow control and store the
+ *  values.
+ **/
+s32 e1000_set_default_fc_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 nvm_data;
+
+	DEBUGFUNC("e1000_set_default_fc_generic");
+
+	/*
+	 * Read and store word 0x0F of the EEPROM. This word contains bits
+	 * that determine the hardware's default PAUSE (flow control) mode,
+	 * a bit that determines whether the HW defaults to enabling or
+	 * disabling auto-negotiation, and the direction of the
+	 * SW defined pins. If there is no SW over-ride of the flow
+	 * control setting, then the variable hw->fc will
+	 * be initialized based on a value in the EEPROM.
+	 */
+	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
+
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
+		hw->fc.requested_mode = e1000_fc_none;
+	else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
+		 NVM_WORD0F_ASM_DIR)
+		hw->fc.requested_mode = e1000_fc_tx_pause;
+	else
+		hw->fc.requested_mode = e1000_fc_full;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_force_mac_fc_generic - Force the MAC's flow control settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
+ *  device control register to reflect the adapter settings.  TFCE and RFCE
+ *  need to be explicitly set by software when a copper PHY is used because
+ *  autonegotiation is managed by the PHY rather than the MAC.  Software must
+ *  also configure these bits when link is forced on a fiber connection.
+ **/
+s32 e1000_force_mac_fc_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_force_mac_fc_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/*
+	 * Because we didn't get link via the internal auto-negotiation
+	 * mechanism (we either forced link or we got link via PHY
+	 * auto-neg), we have to manually enable/disable transmit an
+	 * receive flow control.
+	 *
+	 * The "Case" statement below enables/disable flow control
+	 * according to the "hw->fc.current_mode" parameter.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause
+	 *          frames but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          frames but we do not receive pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
+	 *  other:  No other values should be possible at this point.
+	 */
+	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);
+
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE));
+		break;
+	case e1000_fc_rx_pause:
+		ctrl &= (~E1000_CTRL_TFCE);
+		ctrl |= E1000_CTRL_RFCE;
+		break;
+	case e1000_fc_tx_pause:
+		ctrl &= (~E1000_CTRL_RFCE);
+		ctrl |= E1000_CTRL_TFCE;
+		break;
+	case e1000_fc_full:
+		ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_config_fc_after_link_up_generic - Configures flow control after link
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the status of auto-negotiation after link up to ensure that the
+ *  speed and duplex were not forced.  If the link needed to be forced, then
+ *  flow control needs to be forced also.  If auto-negotiation is enabled
+ *  and did not fail, then we configure flow control based on our link
+ *  partner.
+ **/
+s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+	u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;
+	u16 speed, duplex;
+
+	DEBUGFUNC("e1000_config_fc_after_link_up_generic");
+
+	/*
+	 * Check for the case where we have fiber media and auto-neg failed
+	 * so we had to force link.  In this case, we need to force the
+	 * configuration of the MAC to match the "fc" parameter.
+	 */
+	if (mac->autoneg_failed) {
+		if (hw->phy.media_type == e1000_media_type_fiber ||
+		    hw->phy.media_type == e1000_media_type_internal_serdes)
+			ret_val = e1000_force_mac_fc_generic(hw);
+	} else {
+		if (hw->phy.media_type == e1000_media_type_copper)
+			ret_val = e1000_force_mac_fc_generic(hw);
+	}
+
+	if (ret_val) {
+		DEBUGOUT("Error forcing flow control settings\n");
+		goto out;
+	}
+
+	/*
+	 * Check for the case where we have copper media and auto-neg is
+	 * enabled.  In this case, we need to check and see if Auto-Neg
+	 * has completed, and if so, how the PHY and link partner has
+	 * flow control configured.
+	 */
+	if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
+		/*
+		 * Read the MII Status Register and check to see if AutoNeg
+		 * has completed.  We read this twice because this reg has
+		 * some "sticky" (latched) bits.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+
+		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
+			DEBUGOUT("Copper PHY and Auto Neg "
+			         "has not completed.\n");
+			goto out;
+		}
+
+		/*
+		 * The AutoNeg process has completed, so we now need to
+		 * read both the Auto Negotiation Advertisement
+		 * Register (Address 4) and the Auto_Negotiation Base
+		 * Page Ability Register (Address 5) to determine how
+		 * flow control was negotiated.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
+		                             &mii_nway_adv_reg);
+		if (ret_val)
+			goto out;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
+		                             &mii_nway_lp_ability_reg);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Two bits in the Auto Negotiation Advertisement Register
+		 * (Address 4) and two bits in the Auto Negotiation Base
+		 * Page Ability Register (Address 5) determine flow control
+		 * for both the PHY and the link partner.  The following
+		 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,
+		 * 1999, describes these PAUSE resolution bits and how flow
+		 * control is determined based upon these settings.
+		 * NOTE:  DC = Don't Care
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    0    |  DC   |   DC    | e1000_fc_none
+		 *   0   |    1    |   0   |   DC    | e1000_fc_none
+		 *   0   |    1    |   1   |    0    | e1000_fc_none
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 *   1   |    0    |   0   |   DC    | e1000_fc_none
+		 *   1   |   DC    |   1   |   DC    | e1000_fc_full
+		 *   1   |    1    |   0   |    0    | e1000_fc_none
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 *
+		 * Are both PAUSE bits set to 1?  If so, this implies
+		 * Symmetric Flow Control is enabled at both ends.  The
+		 * ASM_DIR bits are irrelevant per the spec.
+		 *
+		 * For Symmetric Flow Control:
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |   DC    |   1   |   DC    | E1000_fc_full
+		 *
+		 */
+		if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		    (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
+			/*
+			 * Now we need to check if the user selected Rx ONLY
+			 * of pause frames.  In this case, we had to advertise
+			 * FULL flow control because we could not advertise RX
+			 * ONLY. Hence, we must now check to see if we need to
+			 * turn OFF  the TRANSMISSION of PAUSE frames.
+			 */
+			if (hw->fc.requested_mode == e1000_fc_full) {
+				hw->fc.current_mode = e1000_fc_full;
+				DEBUGOUT("Flow Control = FULL.\r\n");
+			} else {
+				hw->fc.current_mode = e1000_fc_rx_pause;
+				DEBUGOUT("Flow Control = "
+				         "RX PAUSE frames only.\r\n");
+			}
+		}
+		/*
+		 * For receiving PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 */
+		else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		          (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_tx_pause;
+			DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
+		}
+		/*
+		 * For transmitting PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 */
+		else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		         (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		         !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_rx_pause;
+			DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
+		} else {
+			/*
+			 * Per the IEEE spec, at this point flow control
+			 * should be disabled.
+			 */
+			hw->fc.current_mode = e1000_fc_none;
+			DEBUGOUT("Flow Control = NONE.\r\n");
+		}
+
+		/*
+		 * Now we need to do one last check...  If we auto-
+		 * negotiated to HALF DUPLEX, flow control should not be
+		 * enabled per IEEE 802.3 spec.
+		 */
+		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
+		if (ret_val) {
+			DEBUGOUT("Error getting link speed and duplex\n");
+			goto out;
+		}
+
+		if (duplex == HALF_DUPLEX)
+			hw->fc.current_mode = e1000_fc_none;
+
+		/*
+		 * Now we call a subroutine to actually force the MAC
+		 * controller to use the correct flow control settings.
+		 */
+		ret_val = e1000_force_mac_fc_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error forcing flow control settings\n");
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_get_speed_and_duplex_copper_generic - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Read the status register for the current speed/duplex and store the current
+ *  speed and duplex for copper connections.
+ **/
+s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
+                                              u16 *duplex)
+{
+	u32 status;
+
+	DEBUGFUNC("e1000_get_speed_and_duplex_copper_generic");
+
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	if (status & E1000_STATUS_SPEED_1000) {
+		*speed = SPEED_1000;
+		DEBUGOUT("1000 Mbs, ");
+	} else if (status & E1000_STATUS_SPEED_100) {
+		*speed = SPEED_100;
+		DEBUGOUT("100 Mbs, ");
+	} else {
+		*speed = SPEED_10;
+		DEBUGOUT("10 Mbs, ");
+	}
+
+	if (status & E1000_STATUS_FD) {
+		*duplex = FULL_DUPLEX;
+		DEBUGOUT("Full Duplex\n");
+	} else {
+		*duplex = HALF_DUPLEX;
+		DEBUGOUT("Half Duplex\n");
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_get_speed_and_duplex_fiber_generic - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Sets the speed and duplex to gigabit full duplex (the only possible option)
+ *  for fiber/serdes links.
+ **/
+s32 e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw __unused,
+                                                    u16 *speed, u16 *duplex)
+{
+	DEBUGFUNC("e1000_get_speed_and_duplex_fiber_serdes_generic");
+
+	*speed = SPEED_1000;
+	*duplex = FULL_DUPLEX;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_get_hw_semaphore_generic - Acquire hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the HW semaphore to access the PHY or NVM
+ **/
+s32 e1000_get_hw_semaphore_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 swsm;
+	s32 ret_val = E1000_SUCCESS;
+	s32 timeout = hw->nvm.word_size + 1;
+	s32 i = 0;
+
+	DEBUGFUNC("e1000_get_hw_semaphore_generic");
+
+	/* Get the SW semaphore */
+	while (i < timeout) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		if (!(swsm & E1000_SWSM_SMBI))
+			break;
+
+		usec_delay(50);
+		i++;
+	}
+
+	if (i == timeout) {
+		DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Get the FW semaphore. */
+	for (i = 0; i < timeout; i++) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
+
+		/* Semaphore acquired if bit latched */
+		if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
+			break;
+
+		usec_delay(50);
+	}
+
+	if (i == timeout) {
+		/* Release semaphores */
+		e1000_put_hw_semaphore_generic(hw);
+		DEBUGOUT("Driver can't access the NVM\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_put_hw_semaphore_generic - Release hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Release hardware semaphore used to access the PHY or NVM
+ **/
+void e1000_put_hw_semaphore_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 swsm;
+
+	DEBUGFUNC("e1000_put_hw_semaphore_generic");
+
+	swsm = E1000_READ_REG(hw, E1000_SWSM);
+
+	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
+
+	E1000_WRITE_REG(hw, E1000_SWSM, swsm);
+#endif
+}
+
+/**
+ *  e1000_get_auto_rd_done_generic - Check for auto read completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Check EEPROM for Auto Read done bit.
+ **/
+s32 e1000_get_auto_rd_done_generic(struct e1000_hw *hw)
+{
+	s32 i = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_get_auto_rd_done_generic");
+
+	while (i < AUTO_READ_DONE_TIMEOUT) {
+		if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD)
+			break;
+		msec_delay(1);
+		i++;
+	}
+
+	if (i == AUTO_READ_DONE_TIMEOUT) {
+		DEBUGOUT("Auto read by HW from NVM has not completed.\n");
+		ret_val = -E1000_ERR_RESET;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_valid_led_default_generic - Verify a valid default LED config
+ *  @hw: pointer to the HW structure
+ *  @data: pointer to the NVM (EEPROM)
+ *
+ *  Read the EEPROM for the current default LED configuration.  If the
+ *  LED configuration is not valid, set to a valid LED configuration.
+ **/
+s32 e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_valid_led_default_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF)
+		*data = ID_LED_DEFAULT;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_id_led_init_generic -
+ *  @hw: pointer to the HW structure
+ *
+ **/
+s32 e1000_id_led_init_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	const u32 ledctl_mask = 0x000000FF;
+	const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;
+	const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
+	u16 data, i, temp;
+	const u16 led_mask = 0x0F;
+
+	DEBUGFUNC("e1000_id_led_init_generic");
+
+	ret_val = hw->nvm.ops.valid_led_default(hw, &data);
+	if (ret_val)
+		goto out;
+
+	mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL);
+	mac->ledctl_mode1 = mac->ledctl_default;
+	mac->ledctl_mode2 = mac->ledctl_default;
+
+	for (i = 0; i < 4; i++) {
+		temp = (data >> (i << 2)) & led_mask;
+		switch (temp) {
+		case ID_LED_ON1_DEF2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_ON1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_OFF1_DEF2:
+		case ID_LED_OFF1_ON2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+		switch (temp) {
+		case ID_LED_DEF1_ON2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_OFF1_ON2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_DEF1_OFF2:
+		case ID_LED_ON1_OFF2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+	}
+
+out:
+	return ret_val;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_setup_led_generic - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored.
+ **/
+s32 e1000_setup_led_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ledctl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_setup_led_generic");
+
+	if (hw->mac.ops.setup_led != e1000_setup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
+		hw->mac.ledctl_default = ledctl;
+		/* Turn off LED0 */
+		ledctl &= ~(E1000_LEDCTL_LED0_IVRT |
+		            E1000_LEDCTL_LED0_BLINK |
+		            E1000_LEDCTL_LED0_MODE_MASK);
+		ledctl |= (E1000_LEDCTL_MODE_LED_OFF <<
+		           E1000_LEDCTL_LED0_MODE_SHIFT);
+		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
+	} else if (hw->phy.media_type == e1000_media_type_copper) {
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
+	}
+
+out:
+	return ret_val;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_cleanup_led_generic - Set LED config to default operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Remove the current LED configuration and set the LED configuration
+ *  to the default value, saved from the EEPROM.
+ **/
+s32 e1000_cleanup_led_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_cleanup_led_generic");
+
+	if (hw->mac.ops.cleanup_led != e1000_cleanup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
+
+out:
+	return ret_val;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_blink_led_generic - Blink LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Blink the LEDs which are set to be on.
+ **/
+s32 e1000_blink_led_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ledctl_blink = 0;
+	u32 i;
+
+	DEBUGFUNC("e1000_blink_led_generic");
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		/* always blink LED0 for PCI-E fiber */
+		ledctl_blink = E1000_LEDCTL_LED0_BLINK |
+		     (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
+	} else {
+		/*
+		 * set the blink bit for each LED that's "on" (0x0E)
+		 * in ledctl_mode2
+		 */
+		ledctl_blink = hw->mac.ledctl_mode2;
+		for (i = 0; i < 4; i++)
+			if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
+			    E1000_LEDCTL_MODE_LED_ON)
+				ledctl_blink |= (E1000_LEDCTL_LED0_BLINK <<
+				                 (i * 8));
+	}
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink);
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_led_on_generic - Turn LED on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED on.
+ **/
+s32 e1000_led_on_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_led_on_generic");
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl &= ~E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2);
+		break;
+	default:
+		break;
+	}
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_led_off_generic - Turn LED off
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED off.
+ **/
+s32 e1000_led_off_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_led_off_generic");
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
+		break;
+	default:
+		break;
+	}
+
+	return E1000_SUCCESS;
+#endif
+	return 0;
+}
+
+/**
+ *  e1000_set_pcie_no_snoop_generic - Set PCI-express capabilities
+ *  @hw: pointer to the HW structure
+ *  @no_snoop: bitmap of snoop events
+ *
+ *  Set the PCI-express register to snoop for events enabled in 'no_snoop'.
+ **/
+void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)
+{
+	u32 gcr;
+
+	DEBUGFUNC("e1000_set_pcie_no_snoop_generic");
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	if (no_snoop) {
+		gcr = E1000_READ_REG(hw, E1000_GCR);
+		gcr &= ~(PCIE_NO_SNOOP_ALL);
+		gcr |= no_snoop;
+		E1000_WRITE_REG(hw, E1000_GCR, gcr);
+	}
+out:
+	return;
+}
+
+/**
+ *  e1000_disable_pcie_master_generic - Disables PCI-express master access
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns 0 (E1000_SUCCESS) if successful, else returns -10
+ *  (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
+ *  the master requests to be disabled.
+ *
+ *  Disables PCI-Express master access and verifies there are no pending
+ *  requests.
+ **/
+s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 timeout = MASTER_DISABLE_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_disable_pcie_master_generic");
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_GIO_MASTER_DISABLE;
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	while (timeout) {
+		if (!(E1000_READ_REG(hw, E1000_STATUS) &
+		      E1000_STATUS_GIO_MASTER_ENABLE))
+			break;
+		usec_delay(100);
+		timeout--;
+	}
+
+	if (!timeout) {
+		DEBUGOUT("Master requests are pending.\n");
+		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_reset_adaptive_generic - Reset Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the Adaptive Interframe Spacing throttle to default values.
+ **/
+void e1000_reset_adaptive_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("e1000_reset_adaptive_generic");
+
+	if (!mac->adaptive_ifs) {
+		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	mac->current_ifs_val = 0;
+	mac->ifs_min_val = IFS_MIN;
+	mac->ifs_max_val = IFS_MAX;
+	mac->ifs_step_size = IFS_STEP;
+	mac->ifs_ratio = IFS_RATIO;
+
+	mac->in_ifs_mode = false;
+	E1000_WRITE_REG(hw, E1000_AIT, 0);
+out:
+	return;
+}
+
+/**
+ *  e1000_update_adaptive_generic - Update Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Update the Adaptive Interframe Spacing Throttle value based on the
+ *  time between transmitted packets and time between collisions.
+ **/
+void e1000_update_adaptive_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("e1000_update_adaptive_generic");
+
+	if (!mac->adaptive_ifs) {
+		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
+		if (mac->tx_packet_delta > MIN_NUM_XMITS) {
+			mac->in_ifs_mode = true;
+			if (mac->current_ifs_val < mac->ifs_max_val) {
+				if (!mac->current_ifs_val)
+					mac->current_ifs_val = mac->ifs_min_val;
+				else
+					mac->current_ifs_val +=
+						mac->ifs_step_size;
+				E1000_WRITE_REG(hw, E1000_AIT, mac->current_ifs_val);
+			}
+		}
+	} else {
+		if (mac->in_ifs_mode &&
+		    (mac->tx_packet_delta <= MIN_NUM_XMITS)) {
+			mac->current_ifs_val = 0;
+			mac->in_ifs_mode = false;
+			E1000_WRITE_REG(hw, E1000_AIT, 0);
+		}
+	}
+out:
+	return;
+}
+
+/**
+ *  e1000_validate_mdi_setting_generic - Verify MDI/MDIx settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify that when not using auto-negotiation that MDI/MDIx is correctly
+ *  set, which is forced to MDI mode only.
+ **/
+static s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_validate_mdi_setting_generic");
+
+	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
+		DEBUGOUT("Invalid MDI setting detected\n");
+		hw->phy.mdix = 1;
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_mac.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_mac.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_mac.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_mac.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,94 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_MAC_H_
+#define _E1000_MAC_H_
+
+/*
+ * Functions that should not be called directly from drivers but can be used
+ * by other files in this 'shared code'
+ */
+void e1000_init_mac_ops_generic(struct e1000_hw *hw);
+void e1000_null_mac_generic(struct e1000_hw *hw);
+s32  e1000_null_ops_generic(struct e1000_hw *hw);
+s32  e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);
+bool e1000_null_mng_mode(struct e1000_hw *hw);
+void e1000_null_update_mc(struct e1000_hw *hw, u8 *h, u32 a);
+void e1000_null_write_vfta(struct e1000_hw *hw, u32 a, u32 b);
+void e1000_null_mta_set(struct e1000_hw *hw, u32 a);
+void e1000_null_rar_set(struct e1000_hw *hw, u8 *h, u32 a);
+s32  e1000_blink_led_generic(struct e1000_hw *hw);
+s32  e1000_check_for_copper_link_generic(struct e1000_hw *hw);
+s32  e1000_check_for_fiber_link_generic(struct e1000_hw *hw);
+s32  e1000_check_for_serdes_link_generic(struct e1000_hw *hw);
+s32  e1000_cleanup_led_generic(struct e1000_hw *hw);
+s32  e1000_commit_fc_settings_generic(struct e1000_hw *hw);
+s32  e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw);
+s32  e1000_config_fc_after_link_up_generic(struct e1000_hw *hw);
+s32  e1000_disable_pcie_master_generic(struct e1000_hw *hw);
+s32  e1000_force_mac_fc_generic(struct e1000_hw *hw);
+s32  e1000_get_auto_rd_done_generic(struct e1000_hw *hw);
+s32  e1000_get_bus_info_pci_generic(struct e1000_hw *hw);
+s32  e1000_get_bus_info_pcie_generic(struct e1000_hw *hw);
+void e1000_set_lan_id_single_port(struct e1000_hw *hw);
+void e1000_set_lan_id_multi_port_pci(struct e1000_hw *hw);
+s32  e1000_get_hw_semaphore_generic(struct e1000_hw *hw);
+s32  e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
+                                               u16 *duplex);
+s32  e1000_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw,
+                                                     u16 *speed, u16 *duplex);
+s32  e1000_id_led_init_generic(struct e1000_hw *hw);
+s32  e1000_led_on_generic(struct e1000_hw *hw);
+s32  e1000_led_off_generic(struct e1000_hw *hw);
+void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
+	                               u8 *mc_addr_list, u32 mc_addr_count);
+s32  e1000_set_default_fc_generic(struct e1000_hw *hw);
+s32  e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
+s32  e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
+s32  e1000_setup_led_generic(struct e1000_hw *hw);
+s32  e1000_setup_link_generic(struct e1000_hw *hw);
+
+u32  e1000_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
+
+void e1000_clear_hw_cntrs_base_generic(struct e1000_hw *hw);
+void e1000_clear_vfta_generic(struct e1000_hw *hw);
+void e1000_config_collision_dist_generic(struct e1000_hw *hw);
+void e1000_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);
+void e1000_mta_set_generic(struct e1000_hw *hw, u32 hash_value);
+void e1000_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);
+void e1000_put_hw_semaphore_generic(struct e1000_hw *hw);
+void e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
+s32  e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
+void e1000_reset_adaptive_generic(struct e1000_hw *hw);
+void e1000_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
+void e1000_update_adaptive_generic(struct e1000_hw *hw);
+void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_main.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_main.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_main.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,909 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  Portions Copyright(c) 2010 Marty Connor <mdc@etherboot.org>
+  Portions Copyright(c) 2010 Entity Cyber, Inc.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "e1000.h"
+
+/**
+ * e1000_irq_disable - Disable interrupt generation
+ *
+ * @adapter: board private structure
+ **/
+static void e1000_irq_disable ( struct e1000_adapter *adapter )
+{
+	E1000_WRITE_REG ( &adapter->hw, E1000_IMC, ~0 );
+	E1000_WRITE_FLUSH ( &adapter->hw );
+}
+
+/**
+ * e1000_irq_enable - Enable interrupt generation
+ *
+ * @adapter: board private structure
+ **/
+static void e1000_irq_enable ( struct e1000_adapter *adapter )
+{
+	E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
+	E1000_WRITE_FLUSH(&adapter->hw);
+}
+
+/**
+ * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
+ * @adapter: board private structure to initialize
+ *
+ * e1000_sw_init initializes the Adapter private data structure.
+ * Fields are initialized based on PCI device information and
+ * OS network device settings (MTU size).
+ **/
+static int e1000_sw_init(struct e1000_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	struct pci_device  *pdev = adapter->pdev;
+
+	/* PCI config space info */
+
+	hw->vendor_id = pdev->vendor;
+	hw->device_id = pdev->device;
+
+	pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &hw->subsystem_vendor_id);
+	pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &hw->subsystem_device_id);
+
+	pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
+
+	pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
+
+	adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
+	adapter->max_frame_size = MAXIMUM_ETHERNET_VLAN_SIZE +
+                                  ETH_HLEN + ETH_FCS_LEN;
+	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
+
+	hw->fc.requested_mode = e1000_fc_none;
+
+	/* Initialize the hardware-specific values */
+	if (e1000_setup_init_funcs(hw, false)) {
+		DBG ("Hardware Initialization Failure\n");
+		return -EIO;
+	}
+
+	/* Explicitly disable IRQ since the NIC can be in any state. */
+	e1000_irq_disable ( adapter );
+
+	return 0;
+}
+
+int32_t e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
+{
+    struct e1000_adapter *adapter = hw->back;
+    uint16_t cap_offset;
+
+#define  PCI_CAP_ID_EXP        0x10    /* PCI Express */
+    cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
+    if (!cap_offset)
+        return -E1000_ERR_CONFIG;
+
+    pci_read_config_word(adapter->pdev, cap_offset + reg, value);
+
+    return 0;
+}
+
+void e1000_pci_clear_mwi ( struct e1000_hw *hw )
+{
+	struct e1000_adapter *adapter = hw->back;
+
+	pci_write_config_word ( adapter->pdev, PCI_COMMAND,
+			        hw->bus.pci_cmd_word & ~PCI_COMMAND_INVALIDATE );
+}
+
+void e1000_pci_set_mwi ( struct e1000_hw *hw )
+{
+	struct e1000_adapter *adapter = hw->back;
+
+	pci_write_config_word ( adapter->pdev, PCI_COMMAND,
+                                hw->bus.pci_cmd_word );
+}
+
+void e1000_read_pci_cfg ( struct e1000_hw *hw, uint32_t reg, uint16_t *value )
+{
+	struct e1000_adapter *adapter = hw->back;
+
+	pci_read_config_word ( adapter->pdev, reg, value );
+}
+
+void e1000_write_pci_cfg ( struct e1000_hw *hw, uint32_t reg, uint16_t *value )
+{
+	struct e1000_adapter *adapter = hw->back;
+
+	pci_write_config_word ( adapter->pdev, reg, *value );
+}
+
+/**
+ * e1000_init_manageability - disable interception of ARP packets
+ *
+ * @v adapter	e1000 private structure
+ **/
+static void e1000_init_manageability ( struct e1000_adapter *adapter )
+{
+	if (adapter->en_mng_pt) {
+		u32 manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
+
+		/* disable hardware interception of ARP */
+		manc &= ~(E1000_MANC_ARP_EN);
+
+		E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
+	}
+}
+
+/**
+ * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ **/
+static int e1000_setup_tx_resources ( struct e1000_adapter *adapter )
+{
+	DBG ( "e1000_setup_tx_resources\n" );
+
+	/* Allocate transmit descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata #23
+	   so we use malloc_dma() requesting a 128 byte block that is
+	   128 byte aligned. This should guarantee that the memory
+	   allocated will not cross a 64K boundary, because 128 is an
+	   even multiple of 65536 ( 65536 / 128 == 512 ), so all possible
+	   allocations of 128 bytes on a 128 byte boundary will not
+	   cross 64K bytes.
+	 */
+
+        adapter->tx_base =
+		malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
+
+	if ( ! adapter->tx_base ) {
+		return -ENOMEM;
+	}
+
+	memset ( adapter->tx_base, 0, adapter->tx_ring_size );
+
+	DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
+
+	return 0;
+}
+
+/**
+ * e1000_process_tx_packets - process transmitted packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void e1000_process_tx_packets ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t tx_status;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	/* Check status of transmitted packets
+	 */
+	while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
+
+		tx_curr_desc = ( void * )  ( adapter->tx_base ) +
+					   ( i * sizeof ( *adapter->tx_base ) );
+
+		tx_status = tx_curr_desc->upper.data;
+
+		/* if the packet at tx_head is not owned by hardware it is for us */
+		if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
+			break;
+
+		DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
+		      adapter->tx_head, adapter->tx_tail, tx_status );
+
+		if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
+				   E1000_TXD_STAT_TU ) ) {
+			netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
+			DBG ( "Error transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		} else {
+			netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
+			DBG ( "Success transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		}
+
+		/* Decrement count of used descriptors, clear this descriptor
+		 */
+		adapter->tx_fill_ctr--;
+		memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
+
+		adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
+	}
+}
+
+static void e1000_free_tx_resources ( struct e1000_adapter *adapter )
+{
+	DBG ( "e1000_free_tx_resources\n" );
+
+        free_dma ( adapter->tx_base, adapter->tx_ring_size );
+}
+
+/**
+ * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Tx unit of the MAC after a reset.
+ **/
+static void e1000_configure_tx ( struct e1000_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t tctl;
+
+	DBG ( "e1000_configure_tx\n" );
+
+	E1000_WRITE_REG ( hw, E1000_TDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDBAL(0), virt_to_bus ( adapter->tx_base ) );
+	E1000_WRITE_REG ( hw, E1000_TDLEN(0), adapter->tx_ring_size );
+
+        DBG ( "E1000_TDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_TDBAL(0) ) );
+        DBG ( "E1000_TDLEN(0): %d\n",     E1000_READ_REG ( hw, E1000_TDLEN(0) ) );
+
+	/* Setup the HW Tx Head and Tail descriptor pointers */
+	E1000_WRITE_REG ( hw, E1000_TDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDT(0), 0 );
+
+	adapter->tx_head = 0;
+	adapter->tx_tail = 0;
+	adapter->tx_fill_ctr = 0;
+
+	/* Setup Transmit Descriptor Settings for eop descriptor */
+	tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
+		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT) |
+		(E1000_COLLISION_DISTANCE  << E1000_COLD_SHIFT);
+
+	e1000_config_collision_dist ( hw );
+
+	E1000_WRITE_REG ( hw, E1000_TCTL, tctl );
+        E1000_WRITE_FLUSH ( hw );
+}
+
+static void e1000_free_rx_resources ( struct e1000_adapter *adapter )
+{
+	int i;
+
+	DBG ( "e1000_free_rx_resources\n" );
+
+	free_dma ( adapter->rx_base, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		free_iob ( adapter->rx_iobuf[i] );
+	}
+}
+
+/**
+ * e1000_refill_rx_ring - allocate Rx io_buffers
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ **/
+static int e1000_refill_rx_ring ( struct e1000_adapter *adapter )
+{
+	int i, rx_curr;
+	int rc = 0;
+	struct e1000_rx_desc *rx_curr_desc;
+	struct e1000_hw *hw = &adapter->hw;
+	struct io_buffer *iob;
+
+	DBG ("e1000_refill_rx_ring\n");
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
+		rx_curr_desc = adapter->rx_base + rx_curr;
+
+		if ( rx_curr_desc->status & E1000_RXD_STAT_DD )
+			continue;
+
+		if ( adapter->rx_iobuf[rx_curr] != NULL )
+			continue;
+
+		DBG2 ( "Refilling rx desc %d\n", rx_curr );
+
+		iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
+		adapter->rx_iobuf[rx_curr] = iob;
+
+		if ( ! iob ) {
+			DBG ( "alloc_iob failed\n" );
+			rc = -ENOMEM;
+			break;
+		} else {
+			rx_curr_desc->buffer_addr = virt_to_bus ( iob->data );
+
+			E1000_WRITE_REG ( hw, E1000_RDT(0), rx_curr );
+		}
+	}
+	return rc;
+}
+
+/**
+ * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ **/
+static int e1000_setup_rx_resources ( struct e1000_adapter *adapter )
+{
+	int i, rc = 0;
+
+	DBG ( "e1000_setup_rx_resources\n" );
+
+	/* Allocate receive descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata
+	 */
+
+        adapter->rx_base =
+		malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
+
+	if ( ! adapter->rx_base ) {
+		return -ENOMEM;
+	}
+	memset ( adapter->rx_base, 0, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		/* let e1000_refill_rx_ring() io_buffer allocations */
+		adapter->rx_iobuf[i] = NULL;
+	}
+
+	/* allocate io_buffers */
+	rc = e1000_refill_rx_ring ( adapter );
+	if ( rc < 0 )
+		e1000_free_rx_resources ( adapter );
+
+	return rc;
+}
+
+/**
+ * e1000_configure_rx - Configure 8254x Receive Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Rx unit of the MAC after a reset.
+ **/
+static void e1000_configure_rx ( struct e1000_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl;
+
+	DBG ( "e1000_configure_rx\n" );
+
+	/* disable receives while setting up the descriptors */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	E1000_WRITE_FLUSH ( hw );
+	mdelay(10);
+
+	adapter->rx_curr = 0;
+
+	/* Setup the HW Rx Head and Tail Descriptor Pointers and
+	 * the Base and Length of the Rx Descriptor Ring */
+
+	E1000_WRITE_REG ( hw, E1000_RDBAL(0), virt_to_bus ( adapter->rx_base ) );
+	E1000_WRITE_REG ( hw, E1000_RDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDLEN(0), adapter->rx_ring_size );
+
+	E1000_WRITE_REG ( hw, E1000_RDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDT(0), NUM_RX_DESC - 1 );
+
+	/* Enable Receives */
+	rctl |=  E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
+		 E1000_RCTL_MPE | E1000_RCTL_SECRC;
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl );
+	E1000_WRITE_FLUSH ( hw );
+
+        DBG ( "E1000_RDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
+        DBG ( "E1000_RDLEN(0): %d\n",     E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
+        DBG ( "E1000_RCTL:  %#08x\n",  E1000_READ_REG ( hw, E1000_RCTL ) );
+}
+
+/**
+ * e1000_process_rx_packets - process received packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void e1000_process_rx_packets ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t rx_status;
+	uint32_t rx_len;
+	uint32_t rx_err;
+	struct e1000_rx_desc *rx_curr_desc;
+
+	/* Process received packets
+	 */
+	while ( 1 ) {
+
+		i = adapter->rx_curr;
+
+		rx_curr_desc = ( void * )  ( adapter->rx_base ) +
+			          ( i * sizeof ( *adapter->rx_base ) );
+		rx_status = rx_curr_desc->status;
+
+		DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
+
+		if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
+			break;
+
+		if ( adapter->rx_iobuf[i] == NULL )
+			break;
+
+		DBG ( "E1000_RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RCTL ) );
+
+		rx_len = rx_curr_desc->length;
+
+                DBG ( "Received packet, rx_curr: %d  rx_status: %#08x  rx_len: %d\n",
+                      i, rx_status, rx_len );
+
+                rx_err = rx_curr_desc->errors;
+
+		iob_put ( adapter->rx_iobuf[i], rx_len );
+
+		if ( rx_err & E1000_RXD_ERR_FRAME_ERR_MASK ) {
+
+			netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
+			DBG ( "e1000_poll: Corrupted packet received!"
+			      " rx_err: %#08x\n", rx_err );
+		} else {
+			/* Add this packet to the receive queue. */
+			netdev_rx ( netdev, adapter->rx_iobuf[i] );
+		}
+		adapter->rx_iobuf[i] = NULL;
+
+		memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
+
+		adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
+	}
+}
+
+/**
+ * e1000_reset - Put e1000 NIC in known initial state
+ *
+ * @v adapter	e1000 private structure
+ **/
+void e1000_reset ( struct e1000_adapter *adapter )
+{
+	struct e1000_mac_info *mac = &adapter->hw.mac;
+	u32 pba = 0;
+
+	DBG ( "e1000_reset\n" );
+
+	switch (mac->type) {
+	case e1000_82542:
+	case e1000_82543:
+	case e1000_82544:
+	case e1000_82540:
+	case e1000_82541:
+	case e1000_82541_rev_2:
+		pba = E1000_PBA_48K;
+		break;
+	case e1000_82545:
+	case e1000_82545_rev_3:
+	case e1000_82546:
+	case e1000_82546_rev_3:
+		pba = E1000_PBA_48K;
+		break;
+	case e1000_82547:
+	case e1000_82547_rev_2:
+		pba = E1000_PBA_30K;
+		break;
+	case e1000_undefined:
+	case e1000_num_macs:
+		break;
+	}
+
+	E1000_WRITE_REG ( &adapter->hw, E1000_PBA, pba );
+
+	/* Allow time for pending master requests to run */
+	e1000_reset_hw ( &adapter->hw );
+
+	if ( mac->type >= e1000_82544 )
+		E1000_WRITE_REG ( &adapter->hw, E1000_WUC, 0 );
+
+	if ( e1000_init_hw ( &adapter->hw ) )
+		DBG ( "Hardware Error\n" );
+
+	e1000_reset_adaptive ( &adapter->hw );
+	e1000_get_phy_info ( &adapter->hw );
+
+	e1000_init_manageability ( adapter );
+}
+
+/** Functions that implement the iPXE driver API **/
+
+/**
+ * e1000_close - Disables a network interface
+ *
+ * @v netdev	network interface device structure
+ *
+ **/
+static void e1000_close ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl;
+
+	DBG ( "e1000_close\n" );
+
+	/* Disable and acknowledge interrupts */
+	e1000_irq_disable ( adapter );
+	E1000_READ_REG ( hw, E1000_ICR );
+
+	/* disable receives */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	E1000_WRITE_FLUSH ( hw );
+
+	e1000_reset_hw ( hw );
+
+	e1000_free_tx_resources ( adapter );
+	e1000_free_rx_resources ( adapter );
+}
+
+/**
+ * e1000_transmit - Transmit a packet
+ *
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ */
+static int e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
+{
+	struct e1000_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t tx_curr = adapter->tx_tail;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	DBG ("e1000_transmit\n");
+
+	if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
+		DBG ("TX overflow\n");
+		return -ENOBUFS;
+	}
+
+	/* Save pointer to iobuf we have been given to transmit,
+	   netdev_tx_complete() will need it later
+	 */
+	adapter->tx_iobuf[tx_curr] = iobuf;
+
+	tx_curr_desc = ( void * ) ( adapter->tx_base ) +
+		       ( tx_curr * sizeof ( *adapter->tx_base ) );
+
+	DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+	DBG ( "tx_curr_desc + 16 = %#08lx\n", virt_to_bus ( tx_curr_desc ) + 16 );
+	DBG ( "iobuf->data = %#08lx\n", virt_to_bus ( iobuf->data ) );
+
+	/* Add the packet to TX ring
+	 */
+	tx_curr_desc->buffer_addr =
+		virt_to_bus ( iobuf->data );
+	tx_curr_desc->lower.data =
+		E1000_TXD_CMD_RS | E1000_TXD_CMD_EOP |
+		E1000_TXD_CMD_IFCS | iob_len ( iobuf );
+	tx_curr_desc->upper.data = 0;
+
+	DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
+	      tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
+
+	/* Point to next free descriptor */
+	adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
+	adapter->tx_fill_ctr++;
+
+	/* Write new tail to NIC, making packet available for transmit
+	 */
+	wmb();
+	E1000_WRITE_REG ( hw, E1000_TDT(0), adapter->tx_tail );
+
+	return 0;
+}
+
+/**
+ * e1000_poll - Poll for received packets
+ *
+ * @v netdev	Network device
+ */
+static void e1000_poll ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+
+	uint32_t icr;
+
+	DBGP ( "e1000_poll\n" );
+
+	/* Acknowledge interrupts */
+	icr = E1000_READ_REG ( hw, E1000_ICR );
+	if ( ! icr )
+		return;
+
+        DBG ( "e1000_poll: intr_status = %#08x\n", icr );
+
+	e1000_process_tx_packets ( netdev );
+
+	e1000_process_rx_packets ( netdev );
+
+	e1000_refill_rx_ring(adapter);
+}
+
+/**
+ * e1000_irq - enable or Disable interrupts
+ *
+ * @v adapter   e1000 adapter
+ * @v action    requested interrupt action
+ **/
+static void e1000_irq ( struct net_device *netdev, int enable )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+
+	DBG ( "e1000_irq\n" );
+
+	if ( enable ) {
+		e1000_irq_enable ( adapter );
+	} else {
+		e1000_irq_disable ( adapter );
+	}
+}
+
+static struct net_device_operations e1000_operations;
+
+/**
+ * e1000_probe - Initial configuration of e1000 NIC
+ *
+ * @v pci	PCI device
+ * @v id	PCI IDs
+ *
+ * @ret rc	Return status code
+ **/
+int e1000_probe ( struct pci_device *pdev )
+{
+	int i, err;
+	struct net_device *netdev;
+	struct e1000_adapter *adapter;
+	unsigned long mmio_start, mmio_len;
+
+	DBG ( "e1000_probe\n" );
+
+	err = -ENOMEM;
+
+	/* Allocate net device ( also allocates memory for netdev->priv
+	   and makes netdev-priv point to it ) */
+	netdev = alloc_etherdev ( sizeof ( struct e1000_adapter ) );
+	if ( ! netdev )
+		goto err_alloc_etherdev;
+
+	/* Associate e1000-specific network operations operations with
+	 * generic network device layer */
+	netdev_init ( netdev, &e1000_operations );
+
+	/* Associate this network device with given PCI device */
+	pci_set_drvdata ( pdev, netdev );
+	netdev->dev = &pdev->dev;
+
+	/* Initialize driver private storage */
+	adapter = netdev_priv ( netdev );
+        memset ( adapter, 0, ( sizeof ( *adapter ) ) );
+
+	adapter->pdev       = pdev;
+
+	adapter->ioaddr     = pdev->ioaddr;
+        adapter->hw.io_base = pdev->ioaddr;
+
+        adapter->irqno      = pdev->irq;
+	adapter->netdev     = netdev;
+	adapter->hw.back    = adapter;
+
+	adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
+	adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
+
+	mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
+	mmio_len   = pci_bar_size  ( pdev, PCI_BASE_ADDRESS_0 );
+
+	DBG ( "mmio_start: %#08lx\n", mmio_start );
+	DBG ( "mmio_len: %#08lx\n", mmio_len );
+
+	/* Fix up PCI device */
+	adjust_pci_device ( pdev );
+
+	err = -EIO;
+
+	adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
+	DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
+
+	if ( ! adapter->hw.hw_addr )
+		goto err_ioremap;
+
+	/* Hardware features, flags and workarounds */
+	if (adapter->hw.mac.type >= e1000_82540) {
+		adapter->flags |= E1000_FLAG_HAS_SMBUS;
+		adapter->flags |= E1000_FLAG_HAS_INTR_MODERATION;
+	}
+
+	if (adapter->hw.mac.type == e1000_82543)
+		adapter->flags |= E1000_FLAG_BAD_TX_CARRIER_STATS_FD;
+
+	adapter->hw.phy.autoneg_wait_to_complete = true;
+	adapter->hw.mac.adaptive_ifs = true;
+
+	/* setup the private structure */
+	if ( ( err = e1000_sw_init ( adapter ) ) )
+		goto err_sw_init;
+
+	if ((err = e1000_init_mac_params(&adapter->hw)))
+		goto err_hw_init;
+
+	if ((err = e1000_init_nvm_params(&adapter->hw)))
+		goto err_hw_init;
+
+        /* Force auto-negotiated speed and duplex */
+        adapter->hw.mac.autoneg = 1;
+
+	if ((err = e1000_init_phy_params(&adapter->hw)))
+		goto err_hw_init;
+
+	DBG ( "adapter->hw.mac.type: %#08x\n", adapter->hw.mac.type );
+
+	/* before reading the EEPROM, reset the controller to
+	 * put the device in a known good starting state
+	 */
+	err = e1000_reset_hw ( &adapter->hw );
+	if ( err < 0 ) {
+		DBG ( "Hardware Initialization Failed\n" );
+		goto err_reset;
+	}
+	/* make sure the NVM is good */
+
+	if ( e1000_validate_nvm_checksum(&adapter->hw) < 0 ) {
+		DBG ( "The NVM Checksum Is Not Valid\n" );
+		err = -EIO;
+		goto err_eeprom;
+	}
+
+	/* copy the MAC address out of the EEPROM */
+	if ( e1000_read_mac_addr ( &adapter->hw ) )
+		DBG ( "EEPROM Read Error\n" );
+
+        memcpy ( netdev->hw_addr, adapter->hw.mac.perm_addr, ETH_ALEN );
+
+	/* reset the hardware with the new settings */
+	e1000_reset ( adapter );
+
+	if ( ( err = register_netdev ( netdev ) ) != 0)
+		goto err_register;
+
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
+
+	for (i = 0; i < 6; i++)
+		DBG ("%02x%s", netdev->ll_addr[i], i == 5 ? "\n" : ":");
+
+	DBG ( "e1000_probe succeeded!\n" );
+
+	/* No errors, return success */
+	return 0;
+
+/* Error return paths */
+err_reset:
+err_register:
+err_hw_init:
+err_eeprom:
+	if (!e1000_check_reset_block(&adapter->hw))
+		e1000_phy_hw_reset(&adapter->hw);
+	if (adapter->hw.flash_address)
+		iounmap(adapter->hw.flash_address);
+err_sw_init:
+	iounmap ( adapter->hw.hw_addr );
+err_ioremap:
+	netdev_put ( netdev );
+err_alloc_etherdev:
+	return err;
+}
+
+/**
+ * e1000_remove - Device Removal Routine
+ *
+ * @v pdev PCI device information struct
+ *
+ **/
+void e1000_remove ( struct pci_device *pdev )
+{
+	struct net_device *netdev = pci_get_drvdata ( pdev );
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+
+	DBG ( "e1000_remove\n" );
+
+	if ( adapter->hw.flash_address )
+		iounmap ( adapter->hw.flash_address );
+	if  ( adapter->hw.hw_addr )
+		iounmap ( adapter->hw.hw_addr );
+
+	unregister_netdev ( netdev );
+	e1000_reset_hw ( &adapter->hw );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+}
+
+/**
+ * e1000_open - Called when a network interface is made active
+ *
+ * @v netdev	network interface device structure
+ * @ret rc	Return status code, 0 on success, negative value on failure
+ *
+ **/
+static int e1000_open ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv(netdev);
+	int err;
+
+	DBG ( "e1000_open\n" );
+
+	/* allocate transmit descriptors */
+	err = e1000_setup_tx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up TX resources!\n" );
+		goto err_setup_tx;
+	}
+
+	/* allocate receive descriptors */
+	err = e1000_setup_rx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up RX resources!\n" );
+		goto err_setup_rx;
+	}
+
+	e1000_configure_tx ( adapter );
+
+	e1000_configure_rx ( adapter );
+
+        DBG ( "E1000_RXDCTL(0): %#08x\n",  E1000_READ_REG ( &adapter->hw, E1000_RXDCTL(0) ) );
+
+	return 0;
+
+err_setup_rx:
+	e1000_free_tx_resources ( adapter );
+err_setup_tx:
+	e1000_reset ( adapter );
+
+	return err;
+}
+
+/** e1000 net device operations */
+static struct net_device_operations e1000_operations = {
+        .open           = e1000_open,
+        .close          = e1000_close,
+        .transmit       = e1000_transmit,
+        .poll           = e1000_poll,
+        .irq            = e1000_irq,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_manage.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_manage.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_manage.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_manage.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,389 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#if 0
+
+#include "e1000_api.h"
+
+static u8 e1000_calculate_checksum(u8 *buffer, u32 length);
+
+/**
+ *  e1000_calculate_checksum - Calculate checksum for buffer
+ *  @buffer: pointer to EEPROM
+ *  @length: size of EEPROM to calculate a checksum for
+ *
+ *  Calculates the checksum for some buffer on a specified length.  The
+ *  checksum calculated is returned.
+ **/
+static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
+{
+	u32 i;
+	u8  sum = 0;
+
+	DEBUGFUNC("e1000_calculate_checksum");
+
+	if (!buffer)
+		return 0;
+
+	for (i = 0; i < length; i++)
+		sum += buffer[i];
+
+	return (u8) (0 - sum);
+}
+
+/**
+ *  e1000_mng_enable_host_if_generic - Checks host interface is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
+ *
+ *  This function checks whether the HOST IF is enabled for command operation
+ *  and also checks whether the previous command is completed.  It busy waits
+ *  in case of previous command is not completed.
+ **/
+s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
+{
+	u32 hicr;
+	s32 ret_val = E1000_SUCCESS;
+	u8  i;
+
+	DEBUGFUNC("e1000_mng_enable_host_if_generic");
+
+	/* Check that the host interface is enabled. */
+	hicr = E1000_READ_REG(hw, E1000_HICR);
+	if ((hicr & E1000_HICR_EN) == 0) {
+		DEBUGOUT("E1000_HOST_EN bit disabled.\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+	/* check the previous command is completed */
+	for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
+		hicr = E1000_READ_REG(hw, E1000_HICR);
+		if (!(hicr & E1000_HICR_C))
+			break;
+		msec_delay_irq(1);
+	}
+
+	if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
+		DEBUGOUT("Previous command timeout failed .\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_mng_mode_generic - Generic check management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the firmware semaphore register and returns true (>0) if
+ *  manageability is enabled, else false (0).
+ **/
+bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
+{
+	u32 fwsm;
+
+	DEBUGFUNC("e1000_check_mng_mode_generic");
+
+	fwsm = E1000_READ_REG(hw, E1000_FWSM);
+
+	return (fwsm & E1000_FWSM_MODE_MASK) ==
+	        (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
+}
+
+/**
+ *  e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on TX
+ *  @hw: pointer to the HW structure
+ *
+ *  Enables packet filtering on transmit packets if manageability is enabled
+ *  and host interface is enabled.
+ **/
+bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
+{
+	struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
+	u32 *buffer = (u32 *)&hw->mng_cookie;
+	u32 offset;
+	s32 ret_val, hdr_csum, csum;
+	u8 i, len;
+	bool tx_filter = true;
+
+	DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
+
+	/* No manageability, no filtering */
+	if (!hw->mac.ops.check_mng_mode(hw)) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/*
+	 * If we can't read from the host interface for whatever
+	 * reason, disable filtering.
+	 */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val != E1000_SUCCESS) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/* Read in the header.  Length and offset are in dwords. */
+	len    = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
+	offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
+	for (i = 0; i < len; i++) {
+		*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
+		                                           E1000_HOST_IF,
+		                                           offset + i);
+	}
+	hdr_csum = hdr->checksum;
+	hdr->checksum = 0;
+	csum = e1000_calculate_checksum((u8 *)hdr,
+	                                E1000_MNG_DHCP_COOKIE_LENGTH);
+	/*
+	 * If either the checksums or signature don't match, then
+	 * the cookie area isn't considered valid, in which case we
+	 * take the safe route of assuming Tx filtering is enabled.
+	 */
+	if (hdr_csum != csum)
+		goto out;
+	if (hdr->signature != E1000_IAMT_SIGNATURE)
+		goto out;
+
+	/* Cookie area is valid, make the final check for filtering. */
+	if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
+		tx_filter = false;
+
+out:
+	hw->mac.tx_pkt_filtering = tx_filter;
+	return tx_filter;
+}
+
+/**
+ *  e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface
+ *  @length: size of the buffer
+ *
+ *  Writes the DHCP information to the host interface.
+ **/
+s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
+                                      u16 length)
+{
+	struct e1000_host_mng_command_header hdr;
+	s32 ret_val;
+	u32 hicr;
+
+	DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
+
+	hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
+	hdr.command_length = length;
+	hdr.reserved1 = 0;
+	hdr.reserved2 = 0;
+	hdr.checksum = 0;
+
+	/* Enable the host interface */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val)
+		goto out;
+
+	/* Populate the host interface with the contents of "buffer". */
+	ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
+	                                  sizeof(hdr), &(hdr.checksum));
+	if (ret_val)
+		goto out;
+
+	/* Write the manageability command header */
+	ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
+	if (ret_val)
+		goto out;
+
+	/* Tell the ARC a new command is pending. */
+	hicr = E1000_READ_REG(hw, E1000_HICR);
+	E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_mng_write_cmd_header_generic - Writes manageability command header
+ *  @hw: pointer to the HW structure
+ *  @hdr: pointer to the host interface command header
+ *
+ *  Writes the command header after does the checksum calculation.
+ **/
+s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr)
+{
+	u16 i, length = sizeof(struct e1000_host_mng_command_header);
+
+	DEBUGFUNC("e1000_mng_write_cmd_header_generic");
+
+	/* Write the whole command header structure with new checksum. */
+
+	hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
+
+	length >>= 2;
+	/* Write the relevant command block into the ram area. */
+	for (i = 0; i < length; i++) {
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
+		                            *((u32 *) hdr + i));
+		E1000_WRITE_FLUSH(hw);
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_mng_host_if_write_generic - Write to the manageability host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface buffer
+ *  @length: size of the buffer
+ *  @offset: location in the buffer to write to
+ *  @sum: sum of the data (not checksum)
+ *
+ *  This function writes the buffer content at the offset given on the host if.
+ *  It also does alignment considerations to do the writes in most efficient
+ *  way.  Also fills up the sum of the buffer in *buffer parameter.
+ **/
+s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                    u16 length, u16 offset, u8 *sum)
+{
+	u8 *tmp;
+	u8 *bufptr = buffer;
+	u32 data = 0;
+	s32 ret_val = E1000_SUCCESS;
+	u16 remaining, i, j, prev_bytes;
+
+	DEBUGFUNC("e1000_mng_host_if_write_generic");
+
+	/* sum = only sum of the data and it is not checksum */
+
+	if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
+		ret_val = -E1000_ERR_PARAM;
+		goto out;
+	}
+
+	tmp = (u8 *)&data;
+	prev_bytes = offset & 0x3;
+	offset >>= 2;
+
+	if (prev_bytes) {
+		data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
+		for (j = prev_bytes; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
+		length -= j - prev_bytes;
+		offset++;
+	}
+
+	remaining = length & 0x3;
+	length -= remaining;
+
+	/* Calculate length in DWORDs */
+	length >>= 2;
+
+	/*
+	 * The device driver writes the relevant command block into the
+	 * ram area.
+	 */
+	for (i = 0; i < length; i++) {
+		for (j = 0; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
+		                            data);
+	}
+	if (remaining) {
+		for (j = 0; j < sizeof(u32); j++) {
+			if (j < remaining)
+				*(tmp + j) = *bufptr++;
+			else
+				*(tmp + j) = 0;
+
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_enable_mng_pass_thru - Enable processing of ARP's
+ *  @hw: pointer to the HW structure
+ *
+ *  Verifies the hardware needs to allow ARPs to be processed by the host.
+ **/
+bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
+{
+	u32 manc;
+	u32 fwsm, factps;
+	bool ret_val = false;
+
+	DEBUGFUNC("e1000_enable_mng_pass_thru");
+
+	if (!hw->mac.asf_firmware_present)
+		goto out;
+
+	manc = E1000_READ_REG(hw, E1000_MANC);
+
+	if (!(manc & E1000_MANC_RCV_TCO_EN) ||
+	    !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
+		goto out;
+
+	if (hw->mac.arc_subsystem_valid) {
+		fwsm = E1000_READ_REG(hw, E1000_FWSM);
+		factps = E1000_READ_REG(hw, E1000_FACTPS);
+
+		if (!(factps & E1000_FACTPS_MNGCG) &&
+		    ((fwsm & E1000_FWSM_MODE_MASK) ==
+		     (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
+			ret_val = true;
+			goto out;
+		}
+	} else {
+		if ((manc & E1000_MANC_SMBUS_EN) &&
+		    !(manc & E1000_MANC_ASF_EN)) {
+			ret_val = true;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_manage.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_manage.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_manage.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_manage.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,84 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_MANAGE_H_
+#define _E1000_MANAGE_H_
+
+bool e1000_check_mng_mode_generic(struct e1000_hw *hw);
+bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
+s32  e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
+s32  e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                     u16 length, u16 offset, u8 *sum);
+s32  e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr);
+s32  e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
+                                       u8 *buffer, u16 length);
+bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);
+
+enum e1000_mng_mode {
+	e1000_mng_mode_none = 0,
+	e1000_mng_mode_asf,
+	e1000_mng_mode_pt,
+	e1000_mng_mode_ipmi,
+	e1000_mng_mode_host_if_only
+};
+
+#define E1000_FACTPS_MNGCG    0x20000000
+
+#define E1000_FWSM_MODE_MASK  0xE
+#define E1000_FWSM_MODE_SHIFT 1
+
+#define E1000_MNG_IAMT_MODE                  0x3
+#define E1000_MNG_DHCP_COOKIE_LENGTH         0x10
+#define E1000_MNG_DHCP_COOKIE_OFFSET         0x6F0
+#define E1000_MNG_DHCP_COMMAND_TIMEOUT       10
+#define E1000_MNG_DHCP_TX_PAYLOAD_CMD        64
+#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
+#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN    0x2
+
+#define E1000_VFTA_ENTRY_SHIFT               5
+#define E1000_VFTA_ENTRY_MASK                0x7F
+#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
+
+#define E1000_HI_MAX_BLOCK_BYTE_LENGTH       1792 /* Num of bytes in range */
+#define E1000_HI_MAX_BLOCK_DWORD_LENGTH      448 /* Num of dwords in range */
+#define E1000_HI_COMMAND_TIMEOUT             500 /* Process HI command limit */
+
+#define E1000_HICR_EN              0x01  /* Enable bit - RO */
+/* Driver sets this bit when done to put command in RAM */
+#define E1000_HICR_C               0x02
+#define E1000_HICR_SV              0x04  /* Status Validity */
+#define E1000_HICR_FW_RESET_ENABLE 0x40
+#define E1000_HICR_FW_RESET        0x80
+
+/* Intel(R) Active Management Technology signature */
+#define E1000_IAMT_SIGNATURE  0x544D4149
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_nvm.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_nvm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_nvm.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_nvm.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,923 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000_api.h"
+
+static void e1000_reload_nvm_generic(struct e1000_hw *hw);
+
+/**
+ *  e1000_init_nvm_ops_generic - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	DEBUGFUNC("e1000_init_nvm_ops_generic");
+
+	/* Initialize function pointers */
+	nvm->ops.init_params = e1000_null_ops_generic;
+	nvm->ops.acquire = e1000_null_ops_generic;
+	nvm->ops.read = e1000_null_read_nvm;
+	nvm->ops.release = e1000_null_nvm_generic;
+	nvm->ops.reload = e1000_reload_nvm_generic;
+	nvm->ops.update = e1000_null_ops_generic;
+	nvm->ops.valid_led_default = e1000_null_led_default;
+	nvm->ops.validate = e1000_null_ops_generic;
+	nvm->ops.write = e1000_null_write_nvm;
+}
+
+/**
+ *  e1000_null_nvm_read - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_read_nvm(struct e1000_hw *hw __unused, u16 a __unused,
+                        u16 b __unused, u16 *c __unused)
+{
+	DEBUGFUNC("e1000_null_read_nvm");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_nvm_generic - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_nvm_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_null_nvm_generic");
+	return;
+}
+
+/**
+ *  e1000_null_led_default - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_led_default(struct e1000_hw *hw __unused,
+                           u16 *data __unused)
+{
+	DEBUGFUNC("e1000_null_led_default");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_write_nvm - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_write_nvm(struct e1000_hw *hw __unused, u16 a __unused,
+                         u16 b __unused, u16 *c __unused)
+{
+	DEBUGFUNC("e1000_null_write_nvm");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_raise_eec_clk - Raise EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Enable/Raise the EEPROM clock bit.
+ **/
+static void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd | E1000_EECD_SK;
+	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(hw->nvm.delay_usec);
+}
+
+/**
+ *  e1000_lower_eec_clk - Lower EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Clear/Lower the EEPROM clock bit.
+ **/
+static void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd & ~E1000_EECD_SK;
+	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(hw->nvm.delay_usec);
+}
+
+/**
+ *  e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @data: data to send to the EEPROM
+ *  @count: number of bits to shift out
+ *
+ *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
+ *  "data" parameter will be shifted out to the EEPROM one bit at a time.
+ *  In order to do this, "data" must be broken down into bits.
+ **/
+static void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u32 mask;
+
+	DEBUGFUNC("e1000_shift_out_eec_bits");
+
+	mask = 0x01 << (count - 1);
+	if (nvm->type == e1000_nvm_eeprom_microwire)
+		eecd &= ~E1000_EECD_DO;
+	else
+	if (nvm->type == e1000_nvm_eeprom_spi)
+		eecd |= E1000_EECD_DO;
+
+	do {
+		eecd &= ~E1000_EECD_DI;
+
+		if (data & mask)
+			eecd |= E1000_EECD_DI;
+
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+
+		usec_delay(nvm->delay_usec);
+
+		e1000_raise_eec_clk(hw, &eecd);
+		e1000_lower_eec_clk(hw, &eecd);
+
+		mask >>= 1;
+	} while (mask);
+
+	eecd &= ~E1000_EECD_DI;
+	E1000_WRITE_REG(hw, E1000_EECD, eecd);
+}
+
+/**
+ *  e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @count: number of bits to shift in
+ *
+ *  In order to read a register from the EEPROM, we need to shift 'count' bits
+ *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
+ *  the EEPROM (setting the SK bit), and then reading the value of the data out
+ *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
+ *  always be clear.
+ **/
+static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
+{
+	u32 eecd;
+	u32 i;
+	u16 data;
+
+	DEBUGFUNC("e1000_shift_in_eec_bits");
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
+	data = 0;
+
+	for (i = 0; i < count; i++) {
+		data <<= 1;
+		e1000_raise_eec_clk(hw, &eecd);
+
+		eecd = E1000_READ_REG(hw, E1000_EECD);
+
+		eecd &= ~E1000_EECD_DI;
+		if (eecd & E1000_EECD_DO)
+			data |= 1;
+
+		e1000_lower_eec_clk(hw, &eecd);
+	}
+
+	return data;
+}
+
+/**
+ *  e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
+ *  @hw: pointer to the HW structure
+ *  @ee_reg: EEPROM flag for polling
+ *
+ *  Polls the EEPROM status bit for either read or write completion based
+ *  upon the value of 'ee_reg'.
+ **/
+s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
+{
+	u32 attempts = 100000;
+	u32 i, reg = 0;
+	s32 ret_val = -E1000_ERR_NVM;
+
+	DEBUGFUNC("e1000_poll_eerd_eewr_done");
+
+	for (i = 0; i < attempts; i++) {
+		if (ee_reg == E1000_NVM_POLL_READ)
+			reg = E1000_READ_REG(hw, E1000_EERD);
+		else
+			reg = E1000_READ_REG(hw, E1000_EEWR);
+
+		if (reg & E1000_NVM_RW_REG_DONE) {
+			ret_val = E1000_SUCCESS;
+			break;
+		}
+
+		usec_delay(5);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000_acquire_nvm_generic - Generic request for access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
+ *  Return successful if access grant bit set, else clear the request for
+ *  EEPROM access and return -E1000_ERR_NVM (-1).
+ **/
+s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
+{
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_acquire_nvm_generic");
+
+	E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	while (timeout) {
+		if (eecd & E1000_EECD_GNT)
+			break;
+		usec_delay(5);
+		eecd = E1000_READ_REG(hw, E1000_EECD);
+		timeout--;
+	}
+
+	if (!timeout) {
+		eecd &= ~E1000_EECD_REQ;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		DEBUGOUT("Could not acquire NVM grant\n");
+		ret_val = -E1000_ERR_NVM;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000_standby_nvm - Return EEPROM to standby state
+ *  @hw: pointer to the HW structure
+ *
+ *  Return the EEPROM to a standby state.
+ **/
+static void e1000_standby_nvm(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	DEBUGFUNC("e1000_standby_nvm");
+
+	if (nvm->type == e1000_nvm_eeprom_microwire) {
+		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+
+		e1000_raise_eec_clk(hw, &eecd);
+
+		/* Select EEPROM */
+		eecd |= E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+
+		e1000_lower_eec_clk(hw, &eecd);
+	} else
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Toggle CS to flush commands */
+		eecd |= E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+		eecd &= ~E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+	}
+}
+
+/**
+ *  e1000_stop_nvm - Terminate EEPROM command
+ *  @hw: pointer to the HW structure
+ *
+ *  Terminates the current command by inverting the EEPROM's chip select pin.
+ **/
+void e1000_stop_nvm(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	DEBUGFUNC("e1000_stop_nvm");
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+	if (hw->nvm.type == e1000_nvm_eeprom_spi) {
+		/* Pull CS high */
+		eecd |= E1000_EECD_CS;
+		e1000_lower_eec_clk(hw, &eecd);
+	} else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
+		/* CS on Microwire is active-high */
+		eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		e1000_raise_eec_clk(hw, &eecd);
+		e1000_lower_eec_clk(hw, &eecd);
+	}
+}
+
+/**
+ *  e1000_release_nvm_generic - Release exclusive access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
+ **/
+void e1000_release_nvm_generic(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	DEBUGFUNC("e1000_release_nvm_generic");
+
+	e1000_stop_nvm(hw);
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+	eecd &= ~E1000_EECD_REQ;
+	E1000_WRITE_REG(hw, E1000_EECD, eecd);
+}
+
+/**
+ *  e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups the EEPROM for reading and writing.
+ **/
+static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	s32 ret_val = E1000_SUCCESS;
+	u16 timeout = 0;
+	u8 spi_stat_reg;
+
+	DEBUGFUNC("e1000_ready_nvm_eeprom");
+
+	if (nvm->type == e1000_nvm_eeprom_microwire) {
+		/* Clear SK and DI */
+		eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		/* Set CS */
+		eecd |= E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+	} else
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Clear SK and CS */
+		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		usec_delay(1);
+		timeout = NVM_MAX_RETRY_SPI;
+
+		/*
+		 * Read "Status Register" repeatedly until the LSB is cleared.
+		 * The EEPROM will signal that the command has been completed
+		 * by clearing bit 0 of the internal status register.  If it's
+		 * not cleared within 'timeout', then error out.
+		 */
+		while (timeout) {
+			e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
+			                         hw->nvm.opcode_bits);
+			spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
+			if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
+				break;
+
+			usec_delay(5);
+			e1000_standby_nvm(hw);
+			timeout--;
+		}
+
+		if (!timeout) {
+			DEBUGOUT("SPI NVM Status error\n");
+			ret_val = -E1000_ERR_NVM;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_nvm_spi - Read EEPROM's using SPI
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of word in the EEPROM to read
+ *  @words: number of words to read
+ *  @data: word read from the EEPROM
+ *
+ *  Reads a 16 bit word from the EEPROM.
+ **/
+s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i = 0;
+	s32 ret_val;
+	u16 word_in;
+	u8 read_opcode = NVM_READ_OPCODE_SPI;
+
+	DEBUGFUNC("e1000_read_nvm_spi");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_ready_nvm_eeprom(hw);
+	if (ret_val)
+		goto release;
+
+	e1000_standby_nvm(hw);
+
+	if ((nvm->address_bits == 8) && (offset >= 128))
+		read_opcode |= NVM_A8_OPCODE_SPI;
+
+	/* Send the READ command (opcode + addr) */
+	e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
+	e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
+
+	/*
+	 * Read the data.  SPI NVMs increment the address with each byte
+	 * read and will roll over if reading beyond the end.  This allows
+	 * us to read the whole NVM from any offset
+	 */
+	for (i = 0; i < words; i++) {
+		word_in = e1000_shift_in_eec_bits(hw, 16);
+		data[i] = (word_in >> 8) | (word_in << 8);
+	}
+
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_nvm_microwire - Reads EEPROM's using microwire
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of word in the EEPROM to read
+ *  @words: number of words to read
+ *  @data: word read from the EEPROM
+ *
+ *  Reads a 16 bit word from the EEPROM.
+ **/
+s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
+                             u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i = 0;
+	s32 ret_val;
+	u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
+
+	DEBUGFUNC("e1000_read_nvm_microwire");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_ready_nvm_eeprom(hw);
+	if (ret_val)
+		goto release;
+
+	for (i = 0; i < words; i++) {
+		/* Send the READ command (opcode + addr) */
+		e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
+		e1000_shift_out_eec_bits(hw, (u16)(offset + i),
+					nvm->address_bits);
+
+		/*
+		 * Read the data.  For microwire, each word requires the
+		 * overhead of setup and tear-down.
+		 */
+		data[i] = e1000_shift_in_eec_bits(hw, 16);
+		e1000_standby_nvm(hw);
+	}
+
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_nvm_eerd - Reads EEPROM using EERD register
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of word in the EEPROM to read
+ *  @words: number of words to read
+ *  @data: word read from the EEPROM
+ *
+ *  Reads a 16 bit word from the EEPROM using the EERD register.
+ **/
+s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i, eerd = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_nvm_eerd");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * too many words for the offset, and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	for (i = 0; i < words; i++) {
+		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		       E1000_NVM_RW_REG_START;
+
+		E1000_WRITE_REG(hw, E1000_EERD, eerd);
+		ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
+		if (ret_val)
+			break;
+
+		data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
+		           E1000_NVM_RW_REG_DATA);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_nvm_spi - Write to EEPROM using SPI
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  Writes data to EEPROM at offset using SPI interface.
+ *
+ *  If e1000_update_nvm_checksum is not called after this function , the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	s32 ret_val;
+	u16 widx = 0;
+
+	DEBUGFUNC("e1000_write_nvm_spi");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	while (widx < words) {
+		u8 write_opcode = NVM_WRITE_OPCODE_SPI;
+
+		ret_val = e1000_ready_nvm_eeprom(hw);
+		if (ret_val)
+			goto release;
+
+		e1000_standby_nvm(hw);
+
+		/* Send the WRITE ENABLE command (8 bit opcode) */
+		e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
+		                         nvm->opcode_bits);
+
+		e1000_standby_nvm(hw);
+
+		/*
+		 * Some SPI eeproms use the 8th address bit embedded in the
+		 * opcode
+		 */
+		if ((nvm->address_bits == 8) && (offset >= 128))
+			write_opcode |= NVM_A8_OPCODE_SPI;
+
+		/* Send the Write command (8-bit opcode + addr) */
+		e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
+		e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
+		                         nvm->address_bits);
+
+		/* Loop to allow for up to whole page write of eeprom */
+		while (widx < words) {
+			u16 word_out = data[widx];
+			word_out = (word_out >> 8) | (word_out << 8);
+			e1000_shift_out_eec_bits(hw, word_out, 16);
+			widx++;
+
+			if ((((offset + widx) * 2) % nvm->page_size) == 0) {
+				e1000_standby_nvm(hw);
+				break;
+			}
+		}
+	}
+
+	msec_delay(10);
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_nvm_microwire - Writes EEPROM using microwire
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  Writes data to EEPROM at offset using microwire interface.
+ *
+ *  If e1000_update_nvm_checksum is not called after this function , the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
+                              u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	s32  ret_val;
+	u32 eecd;
+	u16 words_written = 0;
+	u16 widx = 0;
+
+	DEBUGFUNC("e1000_write_nvm_microwire");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_ready_nvm_eeprom(hw);
+	if (ret_val)
+		goto release;
+
+	e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
+	                         (u16)(nvm->opcode_bits + 2));
+
+	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
+
+	e1000_standby_nvm(hw);
+
+	while (words_written < words) {
+		e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
+		                         nvm->opcode_bits);
+
+		e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
+		                         nvm->address_bits);
+
+		e1000_shift_out_eec_bits(hw, data[words_written], 16);
+
+		e1000_standby_nvm(hw);
+
+		for (widx = 0; widx < 200; widx++) {
+			eecd = E1000_READ_REG(hw, E1000_EECD);
+			if (eecd & E1000_EECD_DO)
+				break;
+			usec_delay(50);
+		}
+
+		if (widx == 200) {
+			DEBUGOUT("NVM Write did not complete\n");
+			ret_val = -E1000_ERR_NVM;
+			goto release;
+		}
+
+		e1000_standby_nvm(hw);
+
+		words_written++;
+	}
+
+	e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
+	                         (u16)(nvm->opcode_bits + 2));
+
+	e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
+
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_pba_num_generic - Read device part number
+ *  @hw: pointer to the HW structure
+ *  @pba_num: pointer to device part number
+ *
+ *  Reads the product board assembly (PBA) number from the EEPROM and stores
+ *  the value in pba_num.
+ **/
+s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
+{
+	s32  ret_val;
+	u16 nvm_data;
+
+	DEBUGFUNC("e1000_read_pba_num_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num = (u32)(nvm_data << 16);
+
+	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num |= nvm_data;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_mac_addr_generic - Read device MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the device MAC address from the EEPROM and stores the value.
+ *  Since devices with two ports use the same EEPROM, we increment the
+ *  last bit in the MAC address for the second port.
+ **/
+s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 rar_high;
+	u32 rar_low;
+	u16 i;
+
+	rar_high = E1000_READ_REG(hw, E1000_RAH(0));
+	rar_low = E1000_READ_REG(hw, E1000_RAL(0));
+
+	for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
+
+	for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
+
+	for (i = 0; i < ETH_ADDR_LEN; i++)
+		hw->mac.addr[i] = hw->mac.perm_addr[i];
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
+ **/
+s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	DEBUGFUNC("e1000_validate_nvm_checksum_generic");
+
+	for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
+		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+
+	if (checksum != (u16) NVM_SUM) {
+		DEBUGOUT("NVM Checksum Invalid\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_update_nvm_checksum_generic - Update EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  up to the checksum.  Then calculates the EEPROM checksum and writes the
+ *  value to the EEPROM.
+ **/
+s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32  ret_val;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	DEBUGFUNC("e1000_update_nvm_checksum");
+
+	for (i = 0; i < NVM_CHECKSUM_REG; i++) {
+		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error while updating checksum.\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+	checksum = (u16) NVM_SUM - checksum;
+	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
+	if (ret_val)
+		DEBUGOUT("NVM Write Error while updating checksum.\n");
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_reload_nvm_generic - Reloads EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
+ *  extended control register.
+ **/
+static void e1000_reload_nvm_generic(struct e1000_hw *hw)
+{
+	u32 ctrl_ext;
+
+	DEBUGFUNC("e1000_reload_nvm_generic");
+
+	usec_delay(10);
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	ctrl_ext |= E1000_CTRL_EXT_EE_RST;
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	E1000_WRITE_FLUSH(hw);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_nvm.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_nvm.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_nvm.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_nvm.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,63 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_NVM_H_
+#define _E1000_NVM_H_
+
+void e1000_init_nvm_ops_generic(struct e1000_hw *hw);
+s32  e1000_null_read_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
+void e1000_null_nvm_generic(struct e1000_hw *hw);
+s32  e1000_null_led_default(struct e1000_hw *hw, u16 *data);
+s32  e1000_null_write_nvm(struct e1000_hw *hw, u16 a, u16 b, u16 *c);
+s32  e1000_acquire_nvm_generic(struct e1000_hw *hw);
+
+s32  e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
+s32  e1000_read_mac_addr_generic(struct e1000_hw *hw);
+s32  e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num);
+s32  e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+s32  e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset,
+                              u16 words, u16 *data);
+s32  e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  e1000_valid_led_default_generic(struct e1000_hw *hw, u16 *data);
+s32  e1000_validate_nvm_checksum_generic(struct e1000_hw *hw);
+s32  e1000_write_nvm_eewr(struct e1000_hw *hw, u16 offset,
+                          u16 words, u16 *data);
+s32  e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset,
+                               u16 words, u16 *data);
+s32  e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  e1000_update_nvm_checksum_generic(struct e1000_hw *hw);
+void e1000_stop_nvm(struct e1000_hw *hw);
+void e1000_release_nvm_generic(struct e1000_hw *hw);
+
+#define E1000_STM_OPCODE  0xDB00
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_osdep.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_osdep.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_osdep.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_osdep.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,118 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/* glue for the OS-dependent part of e1000
+ * includes register access macros
+ */
+
+#ifndef _E1000_OSDEP_H_
+#define _E1000_OSDEP_H_
+
+#define u8         unsigned char
+#define bool       boolean_t
+#define dma_addr_t unsigned long
+#define __le16     uint16_t
+#define __le32     uint32_t
+#define __le64     uint64_t
+
+#define __iomem
+
+#define ETH_FCS_LEN 4
+
+typedef int spinlock_t;
+typedef enum {
+    false = 0,
+    true = 1
+} boolean_t;
+
+#define usec_delay(x) udelay(x)
+#define msec_delay(x) mdelay(x)
+#define msec_delay_irq(x) mdelay(x)
+
+#define PCI_COMMAND_REGISTER   PCI_COMMAND
+#define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
+#define ETH_ADDR_LEN           ETH_ALEN
+
+#define DEBUGFUNC(F) DBG(F "\n")
+
+#define DEBUGOUT(S)             DBG(S)
+#define DEBUGOUT1(S, A...)      DBG(S, A)
+
+#define DEBUGOUT2 DEBUGOUT1
+#define DEBUGOUT3 DEBUGOUT2
+#define DEBUGOUT7 DEBUGOUT3
+
+#define E1000_REGISTER(a, reg) (((a)->mac.type >= e1000_82543) \
+                               ? reg                           \
+                               : e1000_translate_register_82542(reg))
+
+#define E1000_WRITE_REG(a, reg, value) \
+    writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg)))
+
+#define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
+
+#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \
+    writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
+
+#define E1000_READ_REG_ARRAY(a, reg, offset) ( \
+    readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
+
+#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
+#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
+
+#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
+    writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
+
+#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
+    readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
+
+#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
+    writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
+
+#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
+    readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
+
+#define E1000_WRITE_REG_IO(a, reg, offset) do { \
+    outl(reg, ((a)->io_base));                  \
+    outl(offset, ((a)->io_base + 4));      } while(0)
+
+#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
+
+#define E1000_WRITE_FLASH_REG(a, reg, value) ( \
+    writel((value), ((a)->flash_address + reg)))
+
+#define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
+    writew((value), ((a)->flash_address + reg)))
+
+#define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
+
+#define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
+
+#endif /* _E1000_OSDEP_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_phy.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_phy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_phy.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_phy.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2308 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000_api.h"
+
+#if 0
+/* Cable length tables */
+static const u16 e1000_m88_cable_length_table[] =
+	{ 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
+#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_m88_cable_length_table) / \
+                 sizeof(e1000_m88_cable_length_table[0]))
+
+static const u16 e1000_igp_2_cable_length_table[] =
+    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,
+      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,
+      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,
+      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,
+      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,
+      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,
+      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,
+      104, 109, 114, 118, 121, 124};
+#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_igp_2_cable_length_table) / \
+                 sizeof(e1000_igp_2_cable_length_table[0]))
+#endif
+
+/**
+ *  e1000_init_phy_ops_generic - Initialize PHY function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void e1000_init_phy_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	DEBUGFUNC("e1000_init_phy_ops_generic");
+
+	/* Initialize function pointers */
+	phy->ops.init_params = e1000_null_ops_generic;
+	phy->ops.acquire = e1000_null_ops_generic;
+	phy->ops.check_polarity = e1000_null_ops_generic;
+	phy->ops.check_reset_block = e1000_null_ops_generic;
+	phy->ops.commit = e1000_null_ops_generic;
+#if 0
+	phy->ops.force_speed_duplex = e1000_null_ops_generic;
+#endif
+	phy->ops.get_cfg_done = e1000_null_ops_generic;
+#if 0
+	phy->ops.get_cable_length = e1000_null_ops_generic;
+#endif
+	phy->ops.get_info = e1000_null_ops_generic;
+	phy->ops.read_reg = e1000_null_read_reg;
+	phy->ops.release = e1000_null_phy_generic;
+	phy->ops.reset = e1000_null_ops_generic;
+	phy->ops.set_d0_lplu_state = e1000_null_lplu_state;
+	phy->ops.set_d3_lplu_state = e1000_null_lplu_state;
+	phy->ops.write_reg = e1000_null_write_reg;
+	phy->ops.power_up = e1000_null_phy_generic;
+	phy->ops.power_down = e1000_null_phy_generic;
+}
+
+/**
+ *  e1000_null_read_reg - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_read_reg(struct e1000_hw *hw __unused, u32 offset __unused,
+                        u16 *data __unused)
+{
+	DEBUGFUNC("e1000_null_read_reg");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_phy_generic - No-op function, return void
+ *  @hw: pointer to the HW structure
+ **/
+void e1000_null_phy_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_null_phy_generic");
+	return;
+}
+
+/**
+ *  e1000_null_lplu_state - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_lplu_state(struct e1000_hw *hw __unused, bool active __unused)
+{
+	DEBUGFUNC("e1000_null_lplu_state");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_null_write_reg - No-op function, return 0
+ *  @hw: pointer to the HW structure
+ **/
+s32 e1000_null_write_reg(struct e1000_hw *hw __unused, u32 offset __unused,
+                         u16 data __unused)
+{
+	DEBUGFUNC("e1000_null_write_reg");
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_check_reset_block_generic - Check if PHY reset is blocked
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the PHY management control register and check whether a PHY reset
+ *  is blocked.  If a reset is not blocked return E1000_SUCCESS, otherwise
+ *  return E1000_BLK_PHY_RESET (12).
+ **/
+s32 e1000_check_reset_block_generic(struct e1000_hw *hw)
+{
+	u32 manc;
+
+	DEBUGFUNC("e1000_check_reset_block");
+
+	manc = E1000_READ_REG(hw, E1000_MANC);
+
+	return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ?
+	       E1000_BLK_PHY_RESET : E1000_SUCCESS;
+}
+
+/**
+ *  e1000_get_phy_id - Retrieve the PHY ID and revision
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY registers and stores the PHY ID and possibly the PHY
+ *  revision in the hardware structure.
+ **/
+s32 e1000_get_phy_id(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_id;
+
+	DEBUGFUNC("e1000_get_phy_id");
+
+	if (!(phy->ops.read_reg))
+		goto out;
+
+		ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id = (u32)(phy_id << 16);
+		usec_delay(20);
+		ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id |= (u32)(phy_id & PHY_REVISION_MASK);
+		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_reset_dsp_generic - Reset PHY DSP
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the digital signal processor.
+ **/
+s32 e1000_phy_reset_dsp_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_phy_reset_dsp_generic");
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_phy_reg_mdic - Read MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the MDI control register in the PHY at offset and stores the
+ *  information read to data.
+ **/
+s32 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_phy_reg_mdic");
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = ((offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_READ));
+
+	E1000_WRITE_REG(hw, E1000_MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		usec_delay(50);
+		mdic = E1000_READ_REG(hw, E1000_MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		DEBUGOUT("MDI Read did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		DEBUGOUT("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	*data = (u16) mdic;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_phy_reg_mdic - Write MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write to register at offset
+ *
+ *  Writes data to MDI control register in the PHY at offset.
+ **/
+s32 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_phy_reg_mdic");
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = (((u32)data) |
+	        (offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_WRITE));
+
+	E1000_WRITE_REG(hw, E1000_MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		usec_delay(50);
+		mdic = E1000_READ_REG(hw, E1000_MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		DEBUGOUT("MDI Write did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		DEBUGOUT("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_phy_reg_m88 - Read m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_phy_reg_m88");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_phy_reg_m88 - Write m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_phy_reg_m88");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_phy_reg_igp - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_phy_reg_igp");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = e1000_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val) {
+			hw->phy.ops.release(hw);
+			goto out;
+		}
+	}
+
+	ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_phy_reg_igp - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_phy_reg_igp");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = e1000_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val) {
+			hw->phy.ops.release(hw);
+			goto out;
+		}
+	}
+
+	ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_read_kmrn_reg_generic - Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary.  Then reads the PHY register at offset
+ *  using the kumeran interface.  The information retrieved is stored in data.
+ *  Release any acquired semaphores before exiting.
+ **/
+s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_read_kmrn_reg_generic");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
+
+	usec_delay(2);
+
+	kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
+	*data = (u16)kmrnctrlsta;
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_write_kmrn_reg_generic - Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary.  Then write the data to PHY register
+ *  at the offset using the kumeran interface.  Release any acquired semaphores
+ *  before exiting.
+ **/
+s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_kmrn_reg_generic");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | data;
+	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
+
+	usec_delay(2);
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_copper_link_setup_m88 - Setup m88 PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up MDI/MDI-X and polarity for m88 PHY's.  If necessary, transmit clock
+ *  and downshift values are set also.
+ **/
+s32 e1000_copper_link_setup_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+
+	DEBUGFUNC("e1000_copper_link_setup_m88");
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/* Enable CRS on TX. This must be set for half-duplex operation. */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+
+	/*
+	 * Options:
+	 *   MDI/MDI-X = 0 (default)
+	 *   0 - Auto for all speeds
+	 *   1 - MDI mode
+	 *   2 - MDI-X mode
+	 *   3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
+	 */
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+
+	switch (phy->mdix) {
+	case 1:
+		phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE;
+		break;
+	case 2:
+		phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE;
+		break;
+	case 3:
+		phy_data |= M88E1000_PSCR_AUTO_X_1000T;
+		break;
+	case 0:
+	default:
+		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
+		break;
+	}
+
+	/*
+	 * Options:
+	 *   disable_polarity_correction = 0 (default)
+	 *       Automatic Correction for Reversed Cable Polarity
+	 *   0 - Disabled
+	 *   1 - Enabled
+	 */
+	phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
+	if (phy->disable_polarity_correction == 1)
+		phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
+
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	if (phy->revision < E1000_REVISION_4) {
+		/*
+		 * Force TX_CLK in the Extended PHY Specific Control Register
+		 * to 25MHz clock.
+		 */
+		ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy_data |= M88E1000_EPSCR_TX_CLK_25;
+
+		if ((phy->revision == E1000_REVISION_2) &&
+		    (phy->id == M88E1111_I_PHY_ID)) {
+			/* 82573L PHY - set the downshift counter to 5x. */
+			phy_data &= ~M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK;
+			phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
+		} else {
+			/* Configure Master and Slave downshift values */
+			phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
+			phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
+		}
+		ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             phy_data);
+		if (ret_val)
+			goto out;
+	}
+
+	/* Commit the changes. */
+	ret_val = phy->ops.commit(hw);
+	if (ret_val) {
+		DEBUGOUT("Error committing the PHY changes\n");
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_copper_link_setup_igp - Setup igp PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for
+ *  igp PHY's.
+ **/
+s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("e1000_copper_link_setup_igp");
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = hw->phy.ops.reset(hw);
+	if (ret_val) {
+		DEBUGOUT("Error resetting the PHY.\n");
+		goto out;
+	}
+
+	/*
+	 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
+	 * timeout issues when LFS is enabled.
+	 */
+	msec_delay(100);
+
+	/*
+	 * The NVM settings will configure LPLU in D3 for
+	 * non-IGP1 PHYs.
+	 */
+	if (phy->type == e1000_phy_igp) {
+		/* disable lplu d3 during driver init */
+		ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
+		if (ret_val) {
+			DEBUGOUT("Error Disabling LPLU D3\n");
+			goto out;
+		}
+	}
+
+	/* disable lplu d0 during driver init */
+	if (hw->phy.ops.set_d0_lplu_state) {
+		ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
+		if (ret_val) {
+			DEBUGOUT("Error Disabling LPLU D0\n");
+			goto out;
+		}
+	}
+	/* Configure mdi-mdix settings */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+
+	switch (phy->mdix) {
+	case 1:
+		data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 2:
+		data |= IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 0:
+	default:
+		data |= IGP01E1000_PSCR_AUTO_MDIX;
+		break;
+	}
+	ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data);
+	if (ret_val)
+		goto out;
+
+	/* set auto-master slave resolution settings */
+	if (hw->mac.autoneg) {
+		/*
+		 * when autonegotiation advertisement is only 1000Mbps then we
+		 * should disable SmartSpeed and enable Auto MasterSlave
+		 * resolution as hardware default.
+		 */
+		if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {
+			/* Disable SmartSpeed */
+			ret_val = phy->ops.read_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+
+			/* Set auto Master/Slave resolution process */
+			ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~CR_1000T_MS_ENABLE;
+			ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
+			if (ret_val)
+				goto out;
+		}
+
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
+		if (ret_val)
+			goto out;
+
+		/* load defaults for future use */
+		phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ?
+			((data & CR_1000T_MS_VALUE) ?
+			e1000_ms_force_master :
+			e1000_ms_force_slave) :
+			e1000_ms_auto;
+
+		switch (phy->ms_type) {
+		case e1000_ms_force_master:
+			data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_force_slave:
+			data |= CR_1000T_MS_ENABLE;
+			data &= ~(CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_auto:
+			data &= ~CR_1000T_MS_ENABLE;
+		default:
+			break;
+		}
+		ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_copper_link_autoneg - Setup/Enable autoneg for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs initial bounds checking on autoneg advertisement parameter, then
+ *  configure to advertise the full capability.  Setup the PHY to autoneg
+ *  and restart the negotiation process between the link partner.  If
+ *  autoneg_wait_to_complete, then wait for autoneg to complete before exiting.
+ **/
+s32 e1000_copper_link_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_ctrl;
+
+	DEBUGFUNC("e1000_copper_link_autoneg");
+
+	/*
+	 * Perform some bounds checking on the autoneg advertisement
+	 * parameter.
+	 */
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/*
+	 * If autoneg_advertised is zero, we assume it was not defaulted
+	 * by the calling code so we set to advertise full capability.
+	 */
+	if (phy->autoneg_advertised == 0)
+		phy->autoneg_advertised = phy->autoneg_mask;
+
+	DEBUGOUT("Reconfiguring auto-neg advertisement params\n");
+	ret_val = e1000_phy_setup_autoneg(hw);
+	if (ret_val) {
+		DEBUGOUT("Error Setting up Auto-Negotiation\n");
+		goto out;
+	}
+	DEBUGOUT("Restarting Auto-Neg\n");
+
+	/*
+	 * Restart auto-negotiation by setting the Auto Neg Enable bit and
+	 * the Auto Neg Restart bit in the PHY control register.
+	 */
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Does the user want to wait for Auto-Neg to complete here, or
+	 * check at a later time (for example, callback routine).
+	 */
+	if (phy->autoneg_wait_to_complete) {
+		ret_val = hw->mac.ops.wait_autoneg(hw);
+		if (ret_val) {
+			DEBUGOUT("Error while waiting for "
+			         "autoneg to complete\n");
+			goto out;
+		}
+	}
+
+	hw->mac.get_link_status = true;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_setup_autoneg - Configure PHY for auto-negotiation
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the MII auto-neg advertisement register and/or the 1000T control
+ *  register and if the PHY is already setup for auto-negotiation, then
+ *  return successful.  Otherwise, setup advertisement and flow control to
+ *  the appropriate values for the wanted auto-negotiation.
+ **/
+s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 mii_autoneg_adv_reg;
+	u16 mii_1000t_ctrl_reg = 0;
+
+	DEBUGFUNC("e1000_phy_setup_autoneg");
+
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/* Read the MII Auto-Neg Advertisement Register (Address 4). */
+	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		/* Read the MII 1000Base-T Control Register (Address 9). */
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
+		                            &mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Need to parse both autoneg_advertised and fc and set up
+	 * the appropriate PHY registers.  First we will parse for
+	 * autoneg_advertised software override.  Since we can advertise
+	 * a plethora of combinations, we need to check each bit
+	 * individually.
+	 */
+
+	/*
+	 * First we clear all the 10/100 mb speed bits in the Auto-Neg
+	 * Advertisement Register (Address 4) and the 1000 mb speed bits in
+	 * the  1000Base-T Control Register (Address 9).
+	 */
+	mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |
+	                         NWAY_AR_100TX_HD_CAPS |
+	                         NWAY_AR_10T_FD_CAPS   |
+	                         NWAY_AR_10T_HD_CAPS);
+	mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
+
+	DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised);
+
+	/* Do we want to advertise 10 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
+		DEBUGOUT("Advertise 10mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;
+	}
+
+	/* Do we want to advertise 10 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_FULL) {
+		DEBUGOUT("Advertise 10mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_HALF) {
+		DEBUGOUT("Advertise 100mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_FULL) {
+		DEBUGOUT("Advertise 100mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS;
+	}
+
+	/* We do not allow the Phy to advertise 1000 Mb Half Duplex */
+	if (phy->autoneg_advertised & ADVERTISE_1000_HALF)
+		DEBUGOUT("Advertise 1000mb Half duplex request denied!\n");
+
+	/* Do we want to advertise 1000 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_1000_FULL) {
+		DEBUGOUT("Advertise 1000mb Full duplex\n");
+		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
+	}
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the PHY advertisement registers accordingly.  If
+	 * auto-negotiation is enabled, then software will have to set the
+	 * "PAUSE" bits to the correct value in the Auto-Negotiation
+	 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto-
+	 * negotiation.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          but we do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 *  other:  No software override.  The flow control configuration
+	 *          in the EEPROM is used.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/*
+		 * Flow control (Rx & Tx) is completely disabled by a
+		 * software over-ride.
+		 */
+		mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled, and Tx Flow control is
+		 * disabled, by a software over-ride.
+		 *
+		 * Since there really isn't a way to advertise that we are
+		 * capable of Rx Pause ONLY, we will advertise that we
+		 * support both symmetric and asymmetric Rx PAUSE.  Later
+		 * (in e1000_config_fc_after_link_up) we will disable the
+		 * hw's ability to send PAUSE frames.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is
+		 * disabled, by a software over-ride.
+		 */
+		mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR;
+		mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE;
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		ret_val = phy->ops.write_reg(hw,
+		                              PHY_1000T_CTRL,
+		                              mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_setup_copper_link_generic - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+s32 e1000_setup_copper_link_generic(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("e1000_setup_copper_link_generic");
+
+	if (hw->mac.autoneg) {
+		/*
+		 * Setup autoneg and flow control advertisement and perform
+		 * autonegotiation.
+		 */
+		ret_val = e1000_copper_link_autoneg(hw);
+		if (ret_val)
+			goto out;
+	} else {
+#if 0
+		/*
+		 * PHY will be set to 10H, 10F, 100H or 100F
+		 * depending on user settings.
+		 */
+		DEBUGOUT("Forcing Speed and Duplex\n");
+		ret_val = hw->phy.ops.force_speed_duplex(hw);
+		if (ret_val) {
+			DEBUGOUT("Error Forcing Speed and Duplex\n");
+			goto out;
+		}
+#endif
+	}
+
+	/*
+	 * Check link status. Wait up to 100 microseconds for link to become
+	 * valid.
+	 */
+	ret_val = e1000_phy_has_link_generic(hw,
+	                                     COPPER_LINK_UP_LIMIT,
+	                                     10,
+	                                     &link);
+	if (ret_val)
+		goto out;
+
+	if (link) {
+		DEBUGOUT("Valid link established!!!\n");
+		e1000_config_collision_dist_generic(hw);
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+	} else {
+		DEBUGOUT("Unable to establish link!!!\n");
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Waits for link and returns
+ *  successful if link up is successful, else -E1000_ERR_PHY (-2).
+ **/
+s32 e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("e1000_phy_force_speed_duplex_igp");
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  IGP requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+	phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+
+	ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("IGP PSCR: %X\n", phy_data);
+
+	usec_delay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on IGP phy.\n");
+
+		ret_val = e1000_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			DEBUGOUT("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = e1000_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Resets the PHY to commit the
+ *  changes.  If time expires while waiting for link up, we reset the DSP.
+ *  After reset, TX_CLK and CRS on Tx must be set.  Return successful upon
+ *  successful completion, else return corresponding error code.
+ **/
+s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("e1000_phy_force_speed_duplex_m88");
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data);
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/* Reset the phy to commit changes. */
+	ret_val = hw->phy.ops.commit(hw);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on M88 phy.\n");
+
+		ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			/*
+			 * We didn't get link.
+			 * Reset the DSP and cross our fingers.
+			 */
+			ret_val = phy->ops.write_reg(hw,
+			                              M88E1000_PHY_PAGE_SELECT,
+			                              0x001d);
+			if (ret_val)
+				goto out;
+			ret_val = e1000_phy_reset_dsp_generic(hw);
+			if (ret_val)
+				goto out;
+		}
+
+		/* Try once more */
+		ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Resetting the phy means we need to re-force TX_CLK in the
+	 * Extended PHY Specific Control Register to 25MHz clock from
+	 * the reset value of 2.5MHz.
+	 */
+	phy_data |= M88E1000_EPSCR_TX_CLK_25;
+	ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * In addition, we must re-enable CRS on Tx for both half and full
+	 * duplex.
+	 */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_force_speed_duplex_ife - Force PHY speed & duplex
+ *  @hw: pointer to the HW structure
+ *
+ *  Forces the speed and duplex settings of the PHY.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	DEBUGFUNC("e1000_phy_force_speed_duplex_ife");
+
+	if (phy->type != e1000_phy_ife) {
+		ret_val = e1000_phy_force_speed_duplex_igp(hw);
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	e1000_phy_force_speed_duplex_setup(hw, &data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	/* Disable MDI-X support for 10/100 */
+	ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IFE_PMC_AUTO_MDIX;
+	data &= ~IFE_PMC_FORCE_MDIX;
+
+	ret_val = phy->ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("IFE PMC: %X\n", data);
+
+	usec_delay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on IFE phy.\n");
+
+		ret_val = e1000_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			DEBUGOUT("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = e1000_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @phy_ctrl: pointer to current value of PHY_CONTROL
+ *
+ *  Forces speed and duplex on the PHY by doing the following: disable flow
+ *  control, force speed/duplex on the MAC, disable auto speed detection,
+ *  disable auto-negotiation, configure duplex, configure speed, configure
+ *  the collision distance, write configuration to CTRL register.  The
+ *  caller must write to the PHY_CONTROL register for these settings to
+ *  take affect.
+ **/
+void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_phy_force_speed_duplex_setup");
+
+	/* Turn off flow control when forcing speed/duplex */
+	hw->fc.current_mode = e1000_fc_none;
+
+	/* Force speed/duplex on the mac */
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ctrl &= ~E1000_CTRL_SPD_SEL;
+
+	/* Disable Auto Speed Detection */
+	ctrl &= ~E1000_CTRL_ASDE;
+
+	/* Disable autoneg on the phy */
+	*phy_ctrl &= ~MII_CR_AUTO_NEG_EN;
+
+	/* Forcing Full or Half Duplex? */
+	if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) {
+		ctrl &= ~E1000_CTRL_FD;
+		*phy_ctrl &= ~MII_CR_FULL_DUPLEX;
+		DEBUGOUT("Half Duplex\n");
+	} else {
+		ctrl |= E1000_CTRL_FD;
+		*phy_ctrl |= MII_CR_FULL_DUPLEX;
+		DEBUGOUT("Full Duplex\n");
+	}
+
+	/* Forcing 10mb or 100mb? */
+	if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) {
+		ctrl |= E1000_CTRL_SPD_100;
+		*phy_ctrl |= MII_CR_SPEED_100;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10);
+		DEBUGOUT("Forcing 100mb\n");
+	} else {
+		ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
+		*phy_ctrl |= MII_CR_SPEED_10;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100);
+		DEBUGOUT("Forcing 10mb\n");
+	}
+
+	e1000_config_collision_dist_generic(hw);
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+}
+#endif
+
+/**
+ *  e1000_set_d3_lplu_state_generic - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.
+ **/
+s32 e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	DEBUGFUNC("e1000_set_d3_lplu_state_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
+	if (ret_val)
+		goto out;
+
+	if (!active) {
+		data &= ~IGP02E1000_PM_D3_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		if (ret_val)
+			goto out;
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = phy->ops.read_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	} else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
+	           (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
+	           (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
+		data |= IGP02E1000_PM_D3_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                              data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                             &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                              data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_downshift_generic - Checks whether a downshift in speed occurred
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  A downshift is detected by querying the PHY link health.
+ **/
+s32 e1000_check_downshift_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	DEBUGFUNC("e1000_check_downshift_generic");
+
+	switch (phy->type) {
+	case e1000_phy_m88:
+	case e1000_phy_gg82563:
+		offset	= M88E1000_PHY_SPEC_STATUS;
+		mask	= M88E1000_PSSR_DOWNSHIFT;
+		break;
+	case e1000_phy_igp_2:
+	case e1000_phy_igp:
+	case e1000_phy_igp_3:
+		offset	= IGP01E1000_PHY_LINK_HEALTH;
+		mask	= IGP01E1000_PLHR_SS_DOWNGRADE;
+		break;
+	default:
+		/* speed downshift not supported */
+		phy->speed_downgraded = false;
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->speed_downgraded = (phy_data & mask) ? true : false;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_polarity_m88 - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY specific status register.
+ **/
+s32 e1000_check_polarity_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("e1000_check_polarity_m88");
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_check_polarity_igp - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY port status register, and the
+ *  current speed (since there is no polarity at 100Mbps).
+ **/
+s32 e1000_check_polarity_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data, offset, mask;
+
+	DEBUGFUNC("e1000_check_polarity_igp");
+
+	/*
+	 * Polarity is determined based on the speed of
+	 * our connection.
+	 */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+		offset	= IGP01E1000_PHY_PCS_INIT_REG;
+		mask	= IGP01E1000_PHY_POLARITY_MASK;
+	} else {
+		/*
+		 * This really only applies to 10Mbps since
+		 * there is no polarity for 100Mbps (always 0).
+		 */
+		offset	= IGP01E1000_PHY_PORT_STATUS;
+		mask	= IGP01E1000_PSSR_POLARITY_REVERSED;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & mask)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_polarity_ife - Check cable polarity for IFE PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Polarity is determined on the polarity reversal feature being enabled.
+ **/
+s32 e1000_check_polarity_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	DEBUGFUNC("e1000_check_polarity_ife");
+
+	/*
+	 * Polarity is determined based on the reversal feature being enabled.
+	 */
+	if (phy->polarity_correction) {
+		offset = IFE_PHY_EXTENDED_STATUS_CONTROL;
+		mask = IFE_PESC_POLARITY_REVERSED;
+	} else {
+		offset = IFE_PHY_SPECIAL_CONTROL;
+		mask = IFE_PSC_FORCE_POLARITY;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->cable_polarity = (phy_data & mask)
+		                       ? e1000_rev_polarity_reversed
+		                       : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_wait_autoneg_generic - Wait for auto-neg completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Waits for auto-negotiation to complete or for the auto-negotiation time
+ *  limit to expire, which ever happens first.
+ **/
+s32 e1000_wait_autoneg_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	DEBUGFUNC("e1000_wait_autoneg_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	/* Break after autoneg completes or PHY_AUTO_NEG_LIMIT expires. */
+	for (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) {
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_AUTONEG_COMPLETE)
+			break;
+		msec_delay(100);
+	}
+
+	/*
+	 * PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation
+	 * has completed.
+	 */
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_has_link_generic - Polls PHY for link
+ *  @hw: pointer to the HW structure
+ *  @iterations: number of times to poll for link
+ *  @usec_interval: delay between polling attempts
+ *  @success: pointer to whether polling was successful or not
+ *
+ *  Polls the PHY status register for link, 'iterations' number of times.
+ **/
+s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                               u32 usec_interval, bool *success)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	DEBUGFUNC("e1000_phy_has_link_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	for (i = 0; i < iterations; i++) {
+		/*
+		 * Some PHYs require the PHY_STATUS register to be read
+		 * twice due to the link bit being sticky.  No harm doing
+		 * it across the board.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val) {
+			/*
+			 * If the first read fails, another entity may have
+			 * ownership of the resources, wait and try again to
+			 * see if they have relinquished the resources yet.
+			 */
+			usec_delay(usec_interval);
+		}
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_LINK_STATUS)
+			break;
+		if (usec_interval >= 1000)
+			msec_delay_irq(usec_interval/1000);
+		else
+			usec_delay(usec_interval);
+	}
+
+	*success = (i < iterations) ? true : false;
+
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000_get_cable_length_m88 - Determine cable length for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY specific status register to retrieve the cable length
+ *  information.  The cable length is determined by averaging the minimum and
+ *  maximum values to get the "average" cable length.  The m88 PHY has four
+ *  possible cable length values, which are:
+ *	Register Value		Cable Length
+ *	0			< 50 meters
+ *	1			50 - 80 meters
+ *	2			80 - 110 meters
+ *	3			110 - 140 meters
+ *	4			> 140 meters
+ **/
+s32 e1000_get_cable_length_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, index;
+
+	DEBUGFUNC("e1000_get_cable_length_m88");
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+	        M88E1000_PSSR_CABLE_LENGTH_SHIFT;
+	if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE + 1) {
+		ret_val = E1000_ERR_PHY;
+		goto out;
+	}
+
+	phy->min_cable_length = e1000_m88_cable_length_table[index];
+	phy->max_cable_length = e1000_m88_cable_length_table[index+1];
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_get_cable_length_igp_2 - Determine cable length for igp2 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  The automatic gain control (agc) normalizes the amplitude of the
+ *  received signal, adjusting for the attenuation produced by the
+ *  cable.  By reading the AGC registers, which represent the
+ *  combination of coarse and fine gain value, the value can be put
+ *  into a lookup table to obtain the approximate cable length
+ *  for each channel.
+ **/
+s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data, i, agc_value = 0;
+	u16 cur_agc_index, max_agc_index = 0;
+	u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
+	u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
+	                                                 {IGP02E1000_PHY_AGC_A,
+	                                                  IGP02E1000_PHY_AGC_B,
+	                                                  IGP02E1000_PHY_AGC_C,
+	                                                  IGP02E1000_PHY_AGC_D};
+
+	DEBUGFUNC("e1000_get_cable_length_igp_2");
+
+	/* Read the AGC registers for all channels */
+	for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
+		ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Getting bits 15:9, which represent the combination of
+		 * coarse and fine gain values.  The result is a number
+		 * that can be put into the lookup table to obtain the
+		 * approximate cable length.
+		 */
+		cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
+		                IGP02E1000_AGC_LENGTH_MASK;
+
+		/* Array index bound check. */
+		if ((cur_agc_index >= IGP02E1000_CABLE_LENGTH_TABLE_SIZE) ||
+		    (cur_agc_index == 0)) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+
+		/* Remove min & max AGC values from calculation. */
+		if (e1000_igp_2_cable_length_table[min_agc_index] >
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			min_agc_index = cur_agc_index;
+		if (e1000_igp_2_cable_length_table[max_agc_index] <
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			max_agc_index = cur_agc_index;
+
+		agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
+	}
+
+	agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
+	              e1000_igp_2_cable_length_table[max_agc_index]);
+	agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
+
+	/* Calculate cable length with the error range of +/- 10 meters. */
+	phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ?
+	                         (agc_value - IGP02E1000_AGC_RANGE) : 0;
+	phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE;
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000_get_phy_info_m88 - Retrieve PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Valid for only copper links.  Read the PHY status register (sticky read)
+ *  to verify that link is up.  Read the PHY special control register to
+ *  determine the polarity and 10base-T extended distance.  Read the PHY
+ *  special status register to determine MDI/MDIx and current speed.  If
+ *  speed is 1000, then determine cable length, local and remote receiver.
+ **/
+s32 e1000_get_phy_info_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32  ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("e1000_get_phy_info_m88");
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		DEBUGOUT("Phy info is only valid for copper media\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		DEBUGOUT("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL)
+	                           ? true : false;
+
+	ret_val = e1000_check_polarity_m88(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX) ? true : false;
+
+	if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
+#if 0
+		ret_val = hw->phy.ops.get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+	} else {
+		/* Set values to "undefined" */
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_get_phy_info_igp - Retrieve igp PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Read PHY status to determine if link is up.  If link is up, then
+ *  set/determine 10base-T extended distance and polarity correction.  Read
+ *  PHY port status to determine MDI/MDIx and speed.  Based on the speed,
+ *  determine on the cable length, local and remote receiver.
+ **/
+s32 e1000_get_phy_info_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	DEBUGFUNC("e1000_get_phy_info_igp");
+
+	ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		DEBUGOUT("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	phy->polarity_correction = true;
+
+	ret_val = e1000_check_polarity_igp(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & IGP01E1000_PSSR_MDIX) ? true : false;
+
+#if 0
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+		ret_val = hw->phy.ops.get_cable_length(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+	} else {
+#endif
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+#if 0
+	}
+#endif
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_sw_reset_generic - PHY software reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Does a software reset of the PHY by reading the PHY control register and
+ *  setting/write the control register reset bit to the PHY.
+ **/
+s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_ctrl;
+
+	DEBUGFUNC("e1000_phy_sw_reset_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= MII_CR_RESET;
+	ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	usec_delay(1);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_phy_hw_reset_generic - PHY hardware reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify the reset block is not blocking us from resetting.  Acquire
+ *  semaphore (if necessary) and read/set/write the device control reset
+ *  bit in the PHY.  Wait the appropriate delay time for the device to
+ *  reset and release the semaphore (if necessary).
+ **/
+s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_phy_hw_reset_generic");
+
+	ret_val = phy->ops.check_reset_block(hw);
+	if (ret_val) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = phy->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
+	E1000_WRITE_FLUSH(hw);
+
+	usec_delay(phy->reset_delay_us);
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+
+	usec_delay(150);
+
+	phy->ops.release(hw);
+
+	ret_val = phy->ops.get_cfg_done(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_get_cfg_done_generic - Generic configuration done
+ *  @hw: pointer to the HW structure
+ *
+ *  Generic function to wait 10 milli-seconds for configuration to complete
+ *  and return success.
+ **/
+s32 e1000_get_cfg_done_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("e1000_get_cfg_done_generic");
+
+	msec_delay_irq(10);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_phy_init_script_igp3 - Inits the IGP3 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes a Intel Gigabit PHY3 when an EEPROM is not present.
+ **/
+s32 e1000_phy_init_script_igp3(struct e1000_hw *hw)
+{
+	DEBUGOUT("Running IGP 3 PHY init script\n");
+
+	/* PHY init IGP 3 */
+	/* Enable rise/fall, 10-mode work in class-A */
+	hw->phy.ops.write_reg(hw, 0x2F5B, 0x9018);
+	/* Remove all caps from Replica path filter */
+	hw->phy.ops.write_reg(hw, 0x2F52, 0x0000);
+	/* Bias trimming for ADC, AFE and Driver (Default) */
+	hw->phy.ops.write_reg(hw, 0x2FB1, 0x8B24);
+	/* Increase Hybrid poly bias */
+	hw->phy.ops.write_reg(hw, 0x2FB2, 0xF8F0);
+	/* Add 4% to Tx amplitude in Gig mode */
+	hw->phy.ops.write_reg(hw, 0x2010, 0x10B0);
+	/* Disable trimming (TTT) */
+	hw->phy.ops.write_reg(hw, 0x2011, 0x0000);
+	/* Poly DC correction to 94.6% + 2% for all channels */
+	hw->phy.ops.write_reg(hw, 0x20DD, 0x249A);
+	/* ABS DC correction to 95.9% */
+	hw->phy.ops.write_reg(hw, 0x20DE, 0x00D3);
+	/* BG temp curve trim */
+	hw->phy.ops.write_reg(hw, 0x28B4, 0x04CE);
+	/* Increasing ADC OPAMP stage 1 currents to max */
+	hw->phy.ops.write_reg(hw, 0x2F70, 0x29E4);
+	/* Force 1000 ( required for enabling PHY regs configuration) */
+	hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
+	/* Set upd_freq to 6 */
+	hw->phy.ops.write_reg(hw, 0x1F30, 0x1606);
+	/* Disable NPDFE */
+	hw->phy.ops.write_reg(hw, 0x1F31, 0xB814);
+	/* Disable adaptive fixed FFE (Default) */
+	hw->phy.ops.write_reg(hw, 0x1F35, 0x002A);
+	/* Enable FFE hysteresis */
+	hw->phy.ops.write_reg(hw, 0x1F3E, 0x0067);
+	/* Fixed FFE for short cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F54, 0x0065);
+	/* Fixed FFE for medium cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F55, 0x002A);
+	/* Fixed FFE for long cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F56, 0x002A);
+	/* Enable Adaptive Clip Threshold */
+	hw->phy.ops.write_reg(hw, 0x1F72, 0x3FB0);
+	/* AHT reset limit to 1 */
+	hw->phy.ops.write_reg(hw, 0x1F76, 0xC0FF);
+	/* Set AHT master delay to 127 msec */
+	hw->phy.ops.write_reg(hw, 0x1F77, 0x1DEC);
+	/* Set scan bits for AHT */
+	hw->phy.ops.write_reg(hw, 0x1F78, 0xF9EF);
+	/* Set AHT Preset bits */
+	hw->phy.ops.write_reg(hw, 0x1F79, 0x0210);
+	/* Change integ_factor of channel A to 3 */
+	hw->phy.ops.write_reg(hw, 0x1895, 0x0003);
+	/* Change prop_factor of channels BCD to 8 */
+	hw->phy.ops.write_reg(hw, 0x1796, 0x0008);
+	/* Change cg_icount + enable integbp for channels BCD */
+	hw->phy.ops.write_reg(hw, 0x1798, 0xD008);
+	/*
+	 * Change cg_icount + enable integbp + change prop_factor_master
+	 * to 8 for channel A
+	 */
+	hw->phy.ops.write_reg(hw, 0x1898, 0xD918);
+	/* Disable AHT in Slave mode on channel A */
+	hw->phy.ops.write_reg(hw, 0x187A, 0x0800);
+	/*
+	 * Enable LPLU and disable AN to 1000 in non-D0a states,
+	 * Enable SPD+B2B
+	 */
+	hw->phy.ops.write_reg(hw, 0x0019, 0x008D);
+	/* Enable restart AN on an1000_dis change */
+	hw->phy.ops.write_reg(hw, 0x001B, 0x2080);
+	/* Enable wh_fifo read clock in 10/100 modes */
+	hw->phy.ops.write_reg(hw, 0x0014, 0x0045);
+	/* Restart AN, Speed selection is 1000 */
+	hw->phy.ops.write_reg(hw, 0x0000, 0x1340);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_get_phy_type_from_id - Get PHY type from id
+ *  @phy_id: phy_id read from the phy
+ *
+ *  Returns the phy type from the id.
+ **/
+enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id)
+{
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	switch (phy_id)	{
+	case M88E1000_I_PHY_ID:
+	case M88E1000_E_PHY_ID:
+	case M88E1111_I_PHY_ID:
+	case M88E1011_I_PHY_ID:
+		phy_type = e1000_phy_m88;
+		break;
+	case IGP01E1000_I_PHY_ID: /* IGP 1 & 2 share this */
+		phy_type = e1000_phy_igp_2;
+		break;
+	case GG82563_E_PHY_ID:
+		phy_type = e1000_phy_gg82563;
+		break;
+	case IGP03E1000_E_PHY_ID:
+		phy_type = e1000_phy_igp_3;
+		break;
+	case IFE_E_PHY_ID:
+	case IFE_PLUS_E_PHY_ID:
+	case IFE_C_E_PHY_ID:
+		phy_type = e1000_phy_ife;
+		break;
+	default:
+		phy_type = e1000_phy_unknown;
+		break;
+	}
+	return phy_type;
+}
+
+/**
+ *  e1000_determine_phy_address - Determines PHY address.
+ *  @hw: pointer to the HW structure
+ *
+ *  This uses a trial and error method to loop through possible PHY
+ *  addresses. It tests each by reading the PHY ID registers and
+ *  checking for a match.
+ **/
+s32 e1000_determine_phy_address(struct e1000_hw *hw)
+{
+	s32 ret_val = -E1000_ERR_PHY_TYPE;
+	u32 phy_addr = 0;
+	u32 i;
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	hw->phy.id = phy_type;
+
+	for (phy_addr = 0; phy_addr < E1000_MAX_PHY_ADDR; phy_addr++) {
+		hw->phy.addr = phy_addr;
+		i = 0;
+
+		do {
+			e1000_get_phy_id(hw);
+			phy_type = e1000_get_phy_type_from_id(hw->phy.id);
+
+			/*
+			 * If phy_type is valid, break - we found our
+			 * PHY address
+			 */
+			if (phy_type  != e1000_phy_unknown) {
+				ret_val = E1000_SUCCESS;
+				goto out;
+			}
+			msec_delay(1);
+			i++;
+		} while (i < 10);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000_power_up_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void e1000_power_up_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+	mii_reg &= ~MII_CR_POWER_DOWN;
+	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
+}
+
+/**
+ * e1000_power_down_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void e1000_power_down_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+	mii_reg |= MII_CR_POWER_DOWN;
+	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
+	msec_delay(1);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_phy.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_phy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_phy.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_phy.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,171 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_PHY_H_
+#define _E1000_PHY_H_
+
+void e1000_init_phy_ops_generic(struct e1000_hw *hw);
+s32  e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+void e1000_null_phy_generic(struct e1000_hw *hw);
+s32  e1000_null_lplu_state(struct e1000_hw *hw, bool active);
+s32  e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_check_downshift_generic(struct e1000_hw *hw);
+s32  e1000_check_polarity_m88(struct e1000_hw *hw);
+s32  e1000_check_polarity_igp(struct e1000_hw *hw);
+s32  e1000_check_polarity_ife(struct e1000_hw *hw);
+s32  e1000_check_reset_block_generic(struct e1000_hw *hw);
+s32  e1000_copper_link_autoneg(struct e1000_hw *hw);
+s32  e1000_copper_link_setup_igp(struct e1000_hw *hw);
+s32  e1000_copper_link_setup_m88(struct e1000_hw *hw);
+#if 0
+s32  e1000_phy_force_speed_duplex_igp(struct e1000_hw *hw);
+s32  e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw);
+s32  e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
+#endif
+#if 0
+s32  e1000_get_cable_length_m88(struct e1000_hw *hw);
+s32  e1000_get_cable_length_igp_2(struct e1000_hw *hw);
+#endif
+s32  e1000_get_cfg_done_generic(struct e1000_hw *hw);
+s32  e1000_get_phy_id(struct e1000_hw *hw);
+s32  e1000_get_phy_info_igp(struct e1000_hw *hw);
+s32  e1000_get_phy_info_m88(struct e1000_hw *hw);
+s32  e1000_phy_sw_reset_generic(struct e1000_hw *hw);
+#if 0
+void e1000_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
+#endif
+s32  e1000_phy_hw_reset_generic(struct e1000_hw *hw);
+s32  e1000_phy_reset_dsp_generic(struct e1000_hw *hw);
+s32  e1000_phy_setup_autoneg(struct e1000_hw *hw);
+s32  e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active);
+s32  e1000_setup_copper_link_generic(struct e1000_hw *hw);
+s32  e1000_wait_autoneg_generic(struct e1000_hw *hw);
+s32  e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_phy_reset_dsp(struct e1000_hw *hw);
+s32  e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                                u32 usec_interval, bool *success);
+s32  e1000_phy_init_script_igp3(struct e1000_hw *hw);
+enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id);
+s32  e1000_determine_phy_address(struct e1000_hw *hw);
+void e1000_power_up_phy_copper(struct e1000_hw *hw);
+void e1000_power_down_phy_copper(struct e1000_hw *hw);
+s32  e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+
+#define E1000_MAX_PHY_ADDR                4
+
+/* IGP01E1000 Specific Registers */
+#define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */
+#define IGP01E1000_PHY_PORT_STATUS        0x11 /* Status */
+#define IGP01E1000_PHY_PORT_CTRL          0x12 /* Control */
+#define IGP01E1000_PHY_LINK_HEALTH        0x13 /* PHY Link Health */
+#define IGP01E1000_GMII_FIFO              0x14 /* GMII FIFO */
+#define IGP01E1000_PHY_CHANNEL_QUALITY    0x15 /* PHY Channel Quality */
+#define IGP02E1000_PHY_POWER_MGMT         0x19 /* Power Management */
+#define IGP01E1000_PHY_PAGE_SELECT        0x1F /* Page Select */
+#define BM_PHY_PAGE_SELECT                22   /* Page Select for BM */
+#define IGP_PAGE_SHIFT                    5
+#define PHY_REG_MASK                      0x1F
+
+#define IGP01E1000_PHY_PCS_INIT_REG       0x00B4
+#define IGP01E1000_PHY_POLARITY_MASK      0x0078
+
+#define IGP01E1000_PSCR_AUTO_MDIX         0x1000
+#define IGP01E1000_PSCR_FORCE_MDI_MDIX    0x2000 /* 0=MDI, 1=MDIX */
+
+#define IGP01E1000_PSCFR_SMART_SPEED      0x0080
+
+/* Enable flexible speed on link-up */
+#define IGP01E1000_GMII_FLEX_SPD          0x0010
+#define IGP01E1000_GMII_SPD               0x0020 /* Enable SPD */
+
+#define IGP02E1000_PM_SPD                 0x0001 /* Smart Power Down */
+#define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */
+#define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */
+
+#define IGP01E1000_PLHR_SS_DOWNGRADE      0x8000
+
+#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
+#define IGP01E1000_PSSR_MDIX              0x0800
+#define IGP01E1000_PSSR_SPEED_MASK        0xC000
+#define IGP01E1000_PSSR_SPEED_1000MBPS    0xC000
+
+#define IGP02E1000_PHY_CHANNEL_NUM        4
+#define IGP02E1000_PHY_AGC_A              0x11B1
+#define IGP02E1000_PHY_AGC_B              0x12B1
+#define IGP02E1000_PHY_AGC_C              0x14B1
+#define IGP02E1000_PHY_AGC_D              0x18B1
+
+#define IGP02E1000_AGC_LENGTH_SHIFT       9   /* Course - 15:13, Fine - 12:9 */
+#define IGP02E1000_AGC_LENGTH_MASK        0x7F
+#define IGP02E1000_AGC_RANGE              15
+
+#define IGP03E1000_PHY_MISC_CTRL          0x1B
+#define IGP03E1000_PHY_MISC_DUPLEX_MANUAL_SET  0x1000 /* Manually Set Duplex */
+
+#define E1000_CABLE_LENGTH_UNDEFINED      0xFF
+
+#define E1000_KMRNCTRLSTA_OFFSET          0x001F0000
+#define E1000_KMRNCTRLSTA_OFFSET_SHIFT    16
+#define E1000_KMRNCTRLSTA_REN             0x00200000
+#define E1000_KMRNCTRLSTA_DIAG_OFFSET     0x3    /* Kumeran Diagnostic */
+#define E1000_KMRNCTRLSTA_TIMEOUTS        0x4    /* Kumeran Timeouts */
+#define E1000_KMRNCTRLSTA_INBAND_PARAM    0x9    /* Kumeran InBand Parameters */
+#define E1000_KMRNCTRLSTA_DIAG_NELPBK     0x1000 /* Nearend Loopback mode */
+
+#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10
+#define IFE_PHY_SPECIAL_CONTROL     0x11 /* 100BaseTx PHY Special Control */
+#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */
+#define IFE_PHY_MDIX_CONTROL        0x1C /* MDI/MDI-X Control */
+
+/* IFE PHY Extended Status Control */
+#define IFE_PESC_POLARITY_REVERSED    0x0100
+
+/* IFE PHY Special Control */
+#define IFE_PSC_AUTO_POLARITY_DISABLE      0x0010
+#define IFE_PSC_FORCE_POLARITY             0x0020
+#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100
+
+/* IFE PHY Special Control and LED Control */
+#define IFE_PSCL_PROBE_MODE            0x0020
+#define IFE_PSCL_PROBE_LEDS_OFF        0x0006 /* Force LEDs 0 and 2 off */
+#define IFE_PSCL_PROBE_LEDS_ON         0x0007 /* Force LEDs 0 and 2 on */
+
+/* IFE PHY MDIX Control */
+#define IFE_PMC_MDIX_STATUS      0x0020 /* 1=MDI-X, 0=MDI */
+#define IFE_PMC_FORCE_MDIX       0x0040 /* 1=force MDI-X, 0=force MDI */
+#define IFE_PMC_AUTO_MDIX        0x0080 /* 1=enable auto MDI/MDI-X, 0=disable */
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_regs.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_regs.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000/e1000_regs.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000/e1000_regs.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,329 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000_REGS_H_
+#define _E1000_REGS_H_
+
+#define E1000_CTRL     0x00000  /* Device Control - RW */
+#define E1000_CTRL_DUP 0x00004  /* Device Control Duplicate (Shadow) - RW */
+#define E1000_STATUS   0x00008  /* Device Status - RO */
+#define E1000_EECD     0x00010  /* EEPROM/Flash Control - RW */
+#define E1000_EERD     0x00014  /* EEPROM Read - RW */
+#define E1000_CTRL_EXT 0x00018  /* Extended Device Control - RW */
+#define E1000_FLA      0x0001C  /* Flash Access - RW */
+#define E1000_MDIC     0x00020  /* MDI Control - RW */
+#define E1000_SCTL     0x00024  /* SerDes Control - RW */
+#define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
+#define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
+#define E1000_FEXT     0x0002C  /* Future Extended - RW */
+#define E1000_FEXTNVM  0x00028  /* Future Extended NVM - RW */
+#define E1000_FCT      0x00030  /* Flow Control Type - RW */
+#define E1000_CONNSW   0x00034  /* Copper/Fiber switch control - RW */
+#define E1000_VET      0x00038  /* VLAN Ether Type - RW */
+#define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */
+#define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */
+#define E1000_ICS      0x000C8  /* Interrupt Cause Set - WO */
+#define E1000_IMS      0x000D0  /* Interrupt Mask Set - RW */
+#define E1000_IMC      0x000D8  /* Interrupt Mask Clear - WO */
+#define E1000_IAM      0x000E0  /* Interrupt Acknowledge Auto Mask */
+#define E1000_RCTL     0x00100  /* Rx Control - RW */
+#define E1000_FCTTV    0x00170  /* Flow Control Transmit Timer Value - RW */
+#define E1000_TXCW     0x00178  /* Tx Configuration Word - RW */
+#define E1000_RXCW     0x00180  /* Rx Configuration Word - RO */
+#define E1000_TCTL     0x00400  /* Tx Control - RW */
+#define E1000_TCTL_EXT 0x00404  /* Extended Tx Control - RW */
+#define E1000_TIPG     0x00410  /* Tx Inter-packet gap -RW */
+#define E1000_TBT      0x00448  /* Tx Burst Timer - RW */
+#define E1000_AIT      0x00458  /* Adaptive Interframe Spacing Throttle - RW */
+#define E1000_LEDCTL   0x00E00  /* LED Control - RW */
+#define E1000_EXTCNF_CTRL  0x00F00  /* Extended Configuration Control */
+#define E1000_EXTCNF_SIZE  0x00F08  /* Extended Configuration Size */
+#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */
+#define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */
+#define E1000_PBS      0x01008  /* Packet Buffer Size */
+#define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
+#define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */
+#define E1000_FLASHT   0x01028  /* FLASH Timer Register */
+#define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
+#define E1000_FLSWCTL  0x01030  /* FLASH control register */
+#define E1000_FLSWDATA 0x01034  /* FLASH data register */
+#define E1000_FLSWCNT  0x01038  /* FLASH Access Counter */
+#define E1000_FLOP     0x0103C  /* FLASH Opcode Register */
+#define E1000_I2CCMD   0x01028  /* SFPI2C Command Register - RW */
+#define E1000_I2CPARAMS 0x0102C /* SFPI2C Parameters Register - RW */
+#define E1000_WDSTP    0x01040  /* Watchdog Setup - RW */
+#define E1000_SWDSTS   0x01044  /* SW Device Status - RW */
+#define E1000_FRTIMER  0x01048  /* Free Running Timer - RW */
+#define E1000_ERT      0x02008  /* Early Rx Threshold - RW */
+#define E1000_FCRTL    0x02160  /* Flow Control Receive Threshold Low - RW */
+#define E1000_FCRTH    0x02168  /* Flow Control Receive Threshold High - RW */
+#define E1000_PSRCTL   0x02170  /* Packet Split Receive Control - RW */
+#define E1000_RDFPCQ(_n)  (0x02430 + (0x4 * (_n)))
+#define E1000_PBRTH    0x02458  /* PB Rx Arbitration Threshold - RW */
+#define E1000_FCRTV    0x02460  /* Flow Control Refresh Timer Value - RW */
+/* Split and Replication Rx Control - RW */
+#define E1000_RDPUMB   0x025CC  /* DMA Rx Descriptor uC Mailbox - RW */
+#define E1000_RDPUAD   0x025D0  /* DMA Rx Descriptor uC Addr Command - RW */
+#define E1000_RDPUWD   0x025D4  /* DMA Rx Descriptor uC Data Write - RW */
+#define E1000_RDPURD   0x025D8  /* DMA Rx Descriptor uC Data Read - RW */
+#define E1000_RDPUCTL  0x025DC  /* DMA Rx Descriptor uC Control - RW */
+#define E1000_RXCTL(_n)   (0x0C014 + (0x40 * (_n)))
+#define E1000_RQDPC(_n)   (0x0C030 + (0x40 * (_n)))
+#define E1000_RDTR     0x02820  /* Rx Delay Timer - RW */
+#define E1000_RADV     0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
+/*
+ * Convenience macros
+ *
+ * Note: "_n" is the queue number of the register to be written to.
+ *
+ * Example usage:
+ * E1000_RDBAL_REG(current_rx_queue)
+ */
+#define E1000_RDBAL(_n)      ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \
+                                         (0x0C000 + ((_n) * 0x40)))
+#define E1000_RDBAH(_n)      ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \
+                                         (0x0C004 + ((_n) * 0x40)))
+#define E1000_RDLEN(_n)      ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \
+                                         (0x0C008 + ((_n) * 0x40)))
+#define E1000_SRRCTL(_n)     ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
+                                         (0x0C00C + ((_n) * 0x40)))
+#define E1000_RDH(_n)        ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \
+                                         (0x0C010 + ((_n) * 0x40)))
+#define E1000_RDT(_n)        ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \
+                                         (0x0C018 + ((_n) * 0x40)))
+#define E1000_RXDCTL(_n)     ((_n) < 4 ? (0x02828 + ((_n) * 0x100)) : \
+                                         (0x0C028 + ((_n) * 0x40)))
+#define E1000_TDBAL(_n)      ((_n) < 4 ? (0x03800 + ((_n) * 0x100)) : \
+                                         (0x0E000 + ((_n) * 0x40)))
+#define E1000_TDBAH(_n)      ((_n) < 4 ? (0x03804 + ((_n) * 0x100)) : \
+                                         (0x0E004 + ((_n) * 0x40)))
+#define E1000_TDLEN(_n)      ((_n) < 4 ? (0x03808 + ((_n) * 0x100)) : \
+                                         (0x0E008 + ((_n) * 0x40)))
+#define E1000_TDH(_n)        ((_n) < 4 ? (0x03810 + ((_n) * 0x100)) : \
+                                         (0x0E010 + ((_n) * 0x40)))
+#define E1000_TDT(_n)        ((_n) < 4 ? (0x03818 + ((_n) * 0x100)) : \
+                                         (0x0E018 + ((_n) * 0x40)))
+#define E1000_TXDCTL(_n)     ((_n) < 4 ? (0x03828 + ((_n) * 0x100)) : \
+                                         (0x0E028 + ((_n) * 0x40)))
+#define E1000_TARC(_n)       (0x03840 + (_n << 8))
+#define E1000_DCA_TXCTRL(_n) (0x03814 + (_n << 8))
+#define E1000_DCA_RXCTRL(_n) (0x02814 + (_n << 8))
+#define E1000_TDWBAL(_n)     ((_n) < 4 ? (0x03838 + ((_n) * 0x100)) : \
+                                         (0x0E038 + ((_n) * 0x40)))
+#define E1000_TDWBAH(_n)     ((_n) < 4 ? (0x0383C + ((_n) * 0x100)) : \
+                                         (0x0E03C + ((_n) * 0x40)))
+#define E1000_RSRPD    0x02C00  /* Rx Small Packet Detect - RW */
+#define E1000_RAID     0x02C08  /* Receive Ack Interrupt Delay - RW */
+#define E1000_TXDMAC   0x03000  /* Tx DMA Control - RW */
+#define E1000_KABGTXD  0x03004  /* AFE Band Gap Transmit Ref Data */
+#define E1000_PSRTYPE(_i)       (0x05480 + ((_i) * 4))
+#define E1000_RAL(_i)  (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
+                                       (0x054E0 + ((_i - 16) * 8)))
+#define E1000_RAH(_i)  (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
+                                       (0x054E4 + ((_i - 16) * 8)))
+#define E1000_IP4AT_REG(_i)     (0x05840 + ((_i) * 8))
+#define E1000_IP6AT_REG(_i)     (0x05880 + ((_i) * 4))
+#define E1000_WUPM_REG(_i)      (0x05A00 + ((_i) * 4))
+#define E1000_FFMT_REG(_i)      (0x09000 + ((_i) * 8))
+#define E1000_FFVT_REG(_i)      (0x09800 + ((_i) * 8))
+#define E1000_FFLT_REG(_i)      (0x05F00 + ((_i) * 8))
+#define E1000_TDFH     0x03410  /* Tx Data FIFO Head - RW */
+#define E1000_TDFT     0x03418  /* Tx Data FIFO Tail - RW */
+#define E1000_TDFHS    0x03420  /* Tx Data FIFO Head Saved - RW */
+#define E1000_TDFTS    0x03428  /* Tx Data FIFO Tail Saved - RW */
+#define E1000_TDFPC    0x03430  /* Tx Data FIFO Packet Count - RW */
+#define E1000_TDPUMB   0x0357C  /* DMA Tx Descriptor uC Mail Box - RW */
+#define E1000_TDPUAD   0x03580  /* DMA Tx Descriptor uC Addr Command - RW */
+#define E1000_TDPUWD   0x03584  /* DMA Tx Descriptor uC Data Write - RW */
+#define E1000_TDPURD   0x03588  /* DMA Tx Descriptor uC Data  Read  - RW */
+#define E1000_TDPUCTL  0x0358C  /* DMA Tx Descriptor uC Control - RW */
+#define E1000_DTXCTL   0x03590  /* DMA Tx Control - RW */
+#define E1000_TIDV     0x03820  /* Tx Interrupt Delay Value - RW */
+#define E1000_TADV     0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
+#define E1000_TSPMT    0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+#define E1000_CRCERRS  0x04000  /* CRC Error Count - R/clr */
+#define E1000_ALGNERRC 0x04004  /* Alignment Error Count - R/clr */
+#define E1000_SYMERRS  0x04008  /* Symbol Error Count - R/clr */
+#define E1000_RXERRC   0x0400C  /* Receive Error Count - R/clr */
+#define E1000_MPC      0x04010  /* Missed Packet Count - R/clr */
+#define E1000_SCC      0x04014  /* Single Collision Count - R/clr */
+#define E1000_ECOL     0x04018  /* Excessive Collision Count - R/clr */
+#define E1000_MCC      0x0401C  /* Multiple Collision Count - R/clr */
+#define E1000_LATECOL  0x04020  /* Late Collision Count - R/clr */
+#define E1000_COLC     0x04028  /* Collision Count - R/clr */
+#define E1000_DC       0x04030  /* Defer Count - R/clr */
+#define E1000_TNCRS    0x04034  /* Tx-No CRS - R/clr */
+#define E1000_SEC      0x04038  /* Sequence Error Count - R/clr */
+#define E1000_CEXTERR  0x0403C  /* Carrier Extension Error Count - R/clr */
+#define E1000_RLEC     0x04040  /* Receive Length Error Count - R/clr */
+#define E1000_XONRXC   0x04048  /* XON Rx Count - R/clr */
+#define E1000_XONTXC   0x0404C  /* XON Tx Count - R/clr */
+#define E1000_XOFFRXC  0x04050  /* XOFF Rx Count - R/clr */
+#define E1000_XOFFTXC  0x04054  /* XOFF Tx Count - R/clr */
+#define E1000_FCRUC    0x04058  /* Flow Control Rx Unsupported Count- R/clr */
+#define E1000_PRC64    0x0405C  /* Packets Rx (64 bytes) - R/clr */
+#define E1000_PRC127   0x04060  /* Packets Rx (65-127 bytes) - R/clr */
+#define E1000_PRC255   0x04064  /* Packets Rx (128-255 bytes) - R/clr */
+#define E1000_PRC511   0x04068  /* Packets Rx (255-511 bytes) - R/clr */
+#define E1000_PRC1023  0x0406C  /* Packets Rx (512-1023 bytes) - R/clr */
+#define E1000_PRC1522  0x04070  /* Packets Rx (1024-1522 bytes) - R/clr */
+#define E1000_GPRC     0x04074  /* Good Packets Rx Count - R/clr */
+#define E1000_BPRC     0x04078  /* Broadcast Packets Rx Count - R/clr */
+#define E1000_MPRC     0x0407C  /* Multicast Packets Rx Count - R/clr */
+#define E1000_GPTC     0x04080  /* Good Packets Tx Count - R/clr */
+#define E1000_GORCL    0x04088  /* Good Octets Rx Count Low - R/clr */
+#define E1000_GORCH    0x0408C  /* Good Octets Rx Count High - R/clr */
+#define E1000_GOTCL    0x04090  /* Good Octets Tx Count Low - R/clr */
+#define E1000_GOTCH    0x04094  /* Good Octets Tx Count High - R/clr */
+#define E1000_RNBC     0x040A0  /* Rx No Buffers Count - R/clr */
+#define E1000_RUC      0x040A4  /* Rx Undersize Count - R/clr */
+#define E1000_RFC      0x040A8  /* Rx Fragment Count - R/clr */
+#define E1000_ROC      0x040AC  /* Rx Oversize Count - R/clr */
+#define E1000_RJC      0x040B0  /* Rx Jabber Count - R/clr */
+#define E1000_MGTPRC   0x040B4  /* Management Packets Rx Count - R/clr */
+#define E1000_MGTPDC   0x040B8  /* Management Packets Dropped Count - R/clr */
+#define E1000_MGTPTC   0x040BC  /* Management Packets Tx Count - R/clr */
+#define E1000_TORL     0x040C0  /* Total Octets Rx Low - R/clr */
+#define E1000_TORH     0x040C4  /* Total Octets Rx High - R/clr */
+#define E1000_TOTL     0x040C8  /* Total Octets Tx Low - R/clr */
+#define E1000_TOTH     0x040CC  /* Total Octets Tx High - R/clr */
+#define E1000_TPR      0x040D0  /* Total Packets Rx - R/clr */
+#define E1000_TPT      0x040D4  /* Total Packets Tx - R/clr */
+#define E1000_PTC64    0x040D8  /* Packets Tx (64 bytes) - R/clr */
+#define E1000_PTC127   0x040DC  /* Packets Tx (65-127 bytes) - R/clr */
+#define E1000_PTC255   0x040E0  /* Packets Tx (128-255 bytes) - R/clr */
+#define E1000_PTC511   0x040E4  /* Packets Tx (256-511 bytes) - R/clr */
+#define E1000_PTC1023  0x040E8  /* Packets Tx (512-1023 bytes) - R/clr */
+#define E1000_PTC1522  0x040EC  /* Packets Tx (1024-1522 Bytes) - R/clr */
+#define E1000_MPTC     0x040F0  /* Multicast Packets Tx Count - R/clr */
+#define E1000_BPTC     0x040F4  /* Broadcast Packets Tx Count - R/clr */
+#define E1000_TSCTC    0x040F8  /* TCP Segmentation Context Tx - R/clr */
+#define E1000_TSCTFC   0x040FC  /* TCP Segmentation Context Tx Fail - R/clr */
+#define E1000_IAC      0x04100  /* Interrupt Assertion Count */
+#define E1000_ICRXPTC  0x04104  /* Interrupt Cause Rx Pkt Timer Expire Count */
+#define E1000_ICRXATC  0x04108  /* Interrupt Cause Rx Abs Timer Expire Count */
+#define E1000_ICTXPTC  0x0410C  /* Interrupt Cause Tx Pkt Timer Expire Count */
+#define E1000_ICTXATC  0x04110  /* Interrupt Cause Tx Abs Timer Expire Count */
+#define E1000_ICTXQEC  0x04118  /* Interrupt Cause Tx Queue Empty Count */
+#define E1000_ICTXQMTC 0x0411C  /* Interrupt Cause Tx Queue Min Thresh Count */
+#define E1000_ICRXDMTC 0x04120  /* Interrupt Cause Rx Desc Min Thresh Count */
+#define E1000_ICRXOC   0x04124  /* Interrupt Cause Receiver Overrun Count */
+
+#define E1000_PCS_CFG0    0x04200  /* PCS Configuration 0 - RW */
+#define E1000_PCS_LCTL    0x04208  /* PCS Link Control - RW */
+#define E1000_PCS_LSTAT   0x0420C  /* PCS Link Status - RO */
+#define E1000_CBTMPC      0x0402C  /* Circuit Breaker Tx Packet Count */
+#define E1000_HTDPMC      0x0403C  /* Host Transmit Discarded Packets */
+#define E1000_CBRDPC      0x04044  /* Circuit Breaker Rx Dropped Count */
+#define E1000_CBRMPC      0x040FC  /* Circuit Breaker Rx Packet Count */
+#define E1000_RPTHC       0x04104  /* Rx Packets To Host */
+#define E1000_HGPTC       0x04118  /* Host Good Packets Tx Count */
+#define E1000_HTCBDPC     0x04124  /* Host Tx Circuit Breaker Dropped Count */
+#define E1000_HGORCL      0x04128  /* Host Good Octets Received Count Low */
+#define E1000_HGORCH      0x0412C  /* Host Good Octets Received Count High */
+#define E1000_HGOTCL      0x04130  /* Host Good Octets Transmit Count Low */
+#define E1000_HGOTCH      0x04134  /* Host Good Octets Transmit Count High */
+#define E1000_LENERRS     0x04138  /* Length Errors Count */
+#define E1000_SCVPC       0x04228  /* SerDes/SGMII Code Violation Pkt Count */
+#define E1000_HRMPC       0x0A018  /* Header Redirection Missed Packet Count */
+#define E1000_PCS_ANADV   0x04218  /* AN advertisement - RW */
+#define E1000_PCS_LPAB    0x0421C  /* Link Partner Ability - RW */
+#define E1000_PCS_NPTX    0x04220  /* AN Next Page Transmit - RW */
+#define E1000_PCS_LPABNP  0x04224  /* Link Partner Ability Next Page - RW */
+#define E1000_1GSTAT_RCV  0x04228  /* 1GSTAT Code Violation Packet Count - RW */
+#define E1000_RXCSUM   0x05000  /* Rx Checksum Control - RW */
+#define E1000_RLPML    0x05004  /* Rx Long Packet Max Length */
+#define E1000_RFCTL    0x05008  /* Receive Filter Control*/
+#define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
+#define E1000_RA       0x05400  /* Receive Address - RW Array */
+#define E1000_VFTA     0x05600  /* VLAN Filter Table Array - RW Array */
+#define E1000_VT_CTL   0x0581C  /* VMDq Control - RW */
+#define E1000_VFQA0    0x0B000  /* VLAN Filter Queue Array 0 - RW Array */
+#define E1000_VFQA1    0x0B200  /* VLAN Filter Queue Array 1 - RW Array */
+#define E1000_WUC      0x05800  /* Wakeup Control - RW */
+#define E1000_WUFC     0x05808  /* Wakeup Filter Control - RW */
+#define E1000_WUS      0x05810  /* Wakeup Status - RO */
+#define E1000_MANC     0x05820  /* Management Control - RW */
+#define E1000_IPAV     0x05838  /* IP Address Valid - RW */
+#define E1000_IP4AT    0x05840  /* IPv4 Address Table - RW Array */
+#define E1000_IP6AT    0x05880  /* IPv6 Address Table - RW Array */
+#define E1000_WUPL     0x05900  /* Wakeup Packet Length - RW */
+#define E1000_WUPM     0x05A00  /* Wakeup Packet Memory - RO A */
+#define E1000_PBACL    0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
+#define E1000_FFLT     0x05F00  /* Flexible Filter Length Table - RW Array */
+#define E1000_HOST_IF  0x08800  /* Host Interface */
+#define E1000_FFMT     0x09000  /* Flexible Filter Mask Table - RW Array */
+#define E1000_FFVT     0x09800  /* Flexible Filter Value Table - RW Array */
+
+#define E1000_KMRNCTRLSTA 0x00034 /* MAC-PHY interface - RW */
+#define E1000_MDPHYA      0x0003C /* PHY address - RW */
+#define E1000_MANC2H      0x05860 /* Management Control To Host - RW */
+#define E1000_SW_FW_SYNC  0x05B5C /* Software-Firmware Synchronization - RW */
+#define E1000_CCMCTL      0x05B48 /* CCM Control Register */
+#define E1000_GIOCTL      0x05B44 /* GIO Analog Control Register */
+#define E1000_SCCTL       0x05B4C /* PCIc PLL Configuration Register */
+#define E1000_GCR         0x05B00 /* PCI-Ex Control */
+#define E1000_GCR2        0x05B64 /* PCI-Ex Control #2 */
+#define E1000_GSCL_1    0x05B10 /* PCI-Ex Statistic Control #1 */
+#define E1000_GSCL_2    0x05B14 /* PCI-Ex Statistic Control #2 */
+#define E1000_GSCL_3    0x05B18 /* PCI-Ex Statistic Control #3 */
+#define E1000_GSCL_4    0x05B1C /* PCI-Ex Statistic Control #4 */
+#define E1000_FACTPS    0x05B30 /* Function Active and Power State to MNG */
+#define E1000_SWSM      0x05B50 /* SW Semaphore */
+#define E1000_FWSM      0x05B54 /* FW Semaphore */
+#define E1000_SWSM2     0x05B58 /* Driver-only SW semaphore (not used by BOOT agents) */
+#define E1000_DCA_ID    0x05B70 /* DCA Requester ID Information - RO */
+#define E1000_DCA_CTRL  0x05B74 /* DCA Control - RW */
+#define E1000_FFLT_DBG  0x05F04 /* Debug Register */
+#define E1000_HICR      0x08F00 /* Host Interface Control */
+
+/* RSS registers */
+#define E1000_CPUVEC    0x02C10 /* CPU Vector Register - RW */
+#define E1000_MRQC      0x05818 /* Multiple Receive Control - RW */
+#define E1000_IMIR(_i)      (0x05A80 + ((_i) * 4))  /* Immediate Interrupt */
+#define E1000_IMIREXT(_i)   (0x05AA0 + ((_i) * 4))  /* Immediate Interrupt Ext*/
+#define E1000_IMIRVP    0x05AC0 /* Immediate Interrupt Rx VLAN Priority - RW */
+#define E1000_MSIXBM(_i)    (0x01600 + ((_i) * 4)) /* MSI-X Allocation Register
+                                                    * (_i) - RW */
+#define E1000_MSIXTADD(_i)  (0x0C000 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * low reg - RW */
+#define E1000_MSIXTUADD(_i) (0x0C004 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * upper reg - RW */
+#define E1000_MSIXTMSG(_i)  (0x0C008 + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * message reg - RW */
+#define E1000_MSIXVCTRL(_i) (0x0C00C + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * vector ctrl reg - RW */
+#define E1000_MSIXPBA    0x0E000 /* MSI-X Pending bit array */
+#define E1000_RETA(_i)  (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
+#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+#define E1000_RSSIM     0x05864 /* RSS Interrupt Mask */
+#define E1000_RSSIR     0x05868 /* RSS Interrupt Request */
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_80003es2lan.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_80003es2lan.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_80003es2lan.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_80003es2lan.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1533 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 80003ES2LAN Gigabit Ethernet Controller (Copper)
+ * 80003ES2LAN Gigabit Ethernet Controller (Serdes)
+ */
+
+#include "e1000e.h"
+
+static s32  e1000e_init_phy_params_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_init_nvm_params_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_init_mac_params_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_acquire_phy_80003es2lan(struct e1000_hw *hw);
+static void e1000e_release_phy_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_acquire_nvm_80003es2lan(struct e1000_hw *hw);
+static void e1000e_release_nvm_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+                                                   u32 offset,
+                                                   u16 *data);
+static s32  e1000e_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+                                                    u32 offset,
+                                                    u16 data);
+static s32  e1000e_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
+                                        u16 words, u16 *data);
+static s32  e1000e_get_cfg_done_80003es2lan(struct e1000_hw *hw);
+#if 0
+static s32  e1000e_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw);
+#endif
+#if 0
+static s32  e1000e_get_cable_length_80003es2lan(struct e1000_hw *hw);
+#endif
+static s32  e1000e_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
+                                               u16 *duplex);
+static s32  e1000e_reset_hw_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_init_hw_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_setup_copper_link_80003es2lan(struct e1000_hw *hw);
+static void e1000e_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
+static s32  e1000e_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex);
+static s32  e1000e_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_cfg_on_link_up_80003es2lan(struct e1000_hw *hw);
+static s32  e1000e_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+                                            u16 *data);
+static s32  e1000e_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+                                             u16 data);
+static s32  e1000e_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw);
+static void e1000e_initialize_hw_bits_80003es2lan(struct e1000_hw *hw);
+static void e1000e_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask);
+static s32  e1000e_read_mac_addr_80003es2lan(struct e1000_hw *hw);
+static void e1000e_power_down_phy_copper_80003es2lan(struct e1000_hw *hw);
+
+#if 0
+/*
+ * A table for the GG82563 cable length where the range is defined
+ * with a lower bound at "index" and the upper bound at
+ * "index + 5".
+ */
+static const u16 e1000_gg82563_cable_length_table[] =
+         { 0, 60, 115, 150, 150, 60, 115, 150, 180, 180, 0xFF };
+#define GG82563_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_gg82563_cable_length_table) / \
+                 sizeof(e1000_gg82563_cable_length_table[0]))
+#endif
+
+/**
+ *  e1000e_init_phy_params_80003es2lan - Init ESB2 PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_phy_params_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		phy->type        = e1000_phy_none;
+		goto out;
+	} else {
+		phy->ops.power_up = e1000e_power_up_phy_copper;
+		phy->ops.power_down = e1000e_power_down_phy_copper_80003es2lan;
+	}
+
+	phy->addr                = 1;
+	phy->autoneg_mask        = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us      = 100;
+	phy->type                = e1000_phy_gg82563;
+
+	phy->ops.acquire            = e1000e_acquire_phy_80003es2lan;
+	phy->ops.check_polarity     = e1000e_check_polarity_m88;
+	phy->ops.check_reset_block  = e1000e_check_reset_block_generic;
+	phy->ops.commit             = e1000e_phy_sw_reset;
+	phy->ops.get_cfg_done       = e1000e_get_cfg_done_80003es2lan;
+	phy->ops.get_info           = e1000e_get_phy_info_m88;
+	phy->ops.release            = e1000e_release_phy_80003es2lan;
+	phy->ops.reset              = e1000e_phy_hw_reset_generic;
+	phy->ops.set_d3_lplu_state  = e1000e_set_d3_lplu_state;
+#if 0
+	phy->ops.force_speed_duplex = e1000e_phy_force_speed_duplex_80003es2lan;
+#endif
+#if 0
+	phy->ops.get_cable_length   = e1000e_get_cable_length_80003es2lan;
+#endif
+	phy->ops.read_reg           = e1000e_read_phy_reg_gg82563_80003es2lan;
+	phy->ops.write_reg          = e1000e_write_phy_reg_gg82563_80003es2lan;
+
+	phy->ops.cfg_on_link_up    = e1000e_cfg_on_link_up_80003es2lan;
+
+	/* This can only be done after all function pointers are setup. */
+	ret_val = e1000e_get_phy_id(hw);
+
+	/* Verify phy id */
+	if (phy->id != GG82563_E_PHY_ID) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_nvm_params_80003es2lan - Init ESB2 NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_nvm_params_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = er32(EECD);
+	u16 size;
+
+	nvm->opcode_bits        = 8;
+	nvm->delay_usec         = 1;
+	switch (nvm->override) {
+	case e1000_nvm_override_spi_large:
+		nvm->page_size    = 32;
+		nvm->address_bits = 16;
+		break;
+	case e1000_nvm_override_spi_small:
+		nvm->page_size    = 8;
+		nvm->address_bits = 8;
+		break;
+	default:
+		nvm->page_size    = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
+		break;
+	}
+
+	nvm->type               = e1000_nvm_eeprom_spi;
+
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+	                  E1000_EECD_SIZE_EX_SHIFT);
+
+	/*
+	 * Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
+
+	/* EEPROM access above 16k is unsupported */
+	if (size > 14)
+		size = 14;
+	nvm->word_size	= 1 << size;
+
+	/* Function Pointers */
+	nvm->ops.acquire           = e1000e_acquire_nvm_80003es2lan;
+	nvm->ops.read              = e1000e_read_nvm_eerd;
+	nvm->ops.release           = e1000e_release_nvm_80003es2lan;
+	nvm->ops.update            = e1000e_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = e1000e_valid_led_default;
+	nvm->ops.validate          = e1000e_validate_nvm_checksum_generic;
+	nvm->ops.write             = e1000e_write_nvm_80003es2lan;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_init_mac_params_80003es2lan - Init ESB2 MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_mac_params_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	/* Set media type */
+	switch (hw->device_id) {
+	case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:
+		hw->phy.media_type = e1000_media_type_internal_serdes;
+		break;
+	default:
+		hw->phy.media_type = e1000_media_type_copper;
+		break;
+	}
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+	/* Set if manageability features are enabled. */
+	mac->arc_subsystem_valid =
+	        (er32(FWSM) & E1000_FWSM_MODE_MASK)
+	                ? true : false;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000e_get_bus_info_pcie;
+	/* reset */
+	mac->ops.reset_hw = e1000e_reset_hw_80003es2lan;
+	/* hw initialization */
+	mac->ops.init_hw = e1000e_init_hw_80003es2lan;
+	/* link setup */
+	mac->ops.setup_link = e1000e_setup_link;
+	/* physical interface link setup */
+	mac->ops.setup_physical_interface =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000e_setup_copper_link_80003es2lan
+	                : e1000e_setup_fiber_serdes_link;
+	/* check for link */
+	switch (hw->phy.media_type) {
+	case e1000_media_type_copper:
+		mac->ops.check_for_link = e1000e_check_for_copper_link;
+		break;
+	case e1000_media_type_fiber:
+		mac->ops.check_for_link = e1000e_check_for_fiber_link;
+		break;
+	case e1000_media_type_internal_serdes:
+		mac->ops.check_for_link = e1000e_check_for_serdes_link;
+		break;
+	default:
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+	/* check management mode */
+#if 0
+	mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;
+#endif
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000e_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000e_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000e_clear_vfta_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000e_mta_set_generic;
+	/* read mac address */
+	mac->ops.read_mac_addr = e1000e_read_mac_addr_80003es2lan;
+	/* ID LED init */
+	mac->ops.id_led_init = e1000e_id_led_init;
+	/* blink LED */
+	mac->ops.blink_led = e1000e_blink_led;
+	/* setup LED */
+	mac->ops.setup_led = e1000e_setup_led_generic;
+	/* cleanup LED */
+	mac->ops.cleanup_led = e1000e_cleanup_led_generic;
+	/* turn on/off LED */
+	mac->ops.led_on = e1000e_led_on_generic;
+	mac->ops.led_off = e1000e_led_off_generic;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000e_clear_hw_cntrs_80003es2lan;
+	/* link info */
+	mac->ops.get_link_up_info = e1000e_get_link_up_info_80003es2lan;
+
+	/* set lan id for port to determine which phy lock to use */
+	hw->mac.ops.set_lan_id(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_function_pointers_80003es2lan - Init ESB2 func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void e1000e_init_function_pointers_80003es2lan(struct e1000_hw *hw)
+{
+	e1000e_init_mac_ops_generic(hw);
+	e1000e_init_nvm_ops_generic(hw);
+	hw->mac.ops.init_params = e1000e_init_mac_params_80003es2lan;
+	hw->nvm.ops.init_params = e1000e_init_nvm_params_80003es2lan;
+	hw->phy.ops.init_params = e1000e_init_phy_params_80003es2lan;
+}
+
+/**
+ *  e1000e_acquire_phy_80003es2lan - Acquire rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to acquire access rights to the correct PHY.
+ **/
+static s32 e1000e_acquire_phy_80003es2lan(struct e1000_hw *hw)
+{
+	u16 mask;
+
+	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
+	return e1000e_acquire_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ *  e1000e_release_phy_80003es2lan - Release rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to release access rights to the correct PHY.
+ **/
+static void e1000e_release_phy_80003es2lan(struct e1000_hw *hw)
+{
+	u16 mask;
+
+	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
+	e1000e_release_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ *  e1000e_acquire_mac_csr_80003es2lan - Acquire rights to access Kumeran register
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the semaphore to access the Kumeran interface.
+ *
+ **/
+static s32 e1000e_acquire_mac_csr_80003es2lan(struct e1000_hw *hw)
+{
+	u16 mask;
+
+	mask = E1000_SWFW_CSR_SM;
+
+	return e1000e_acquire_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ *  e1000e_release_mac_csr_80003es2lan - Release rights to access Kumeran Register
+ *  @hw: pointer to the HW structure
+ *
+ *  Release the semaphore used to access the Kumeran interface
+ **/
+static void e1000e_release_mac_csr_80003es2lan(struct e1000_hw *hw)
+{
+	u16 mask;
+
+	mask = E1000_SWFW_CSR_SM;
+
+	e1000e_release_swfw_sync_80003es2lan(hw, mask);
+}
+
+/**
+ *  e1000e_acquire_nvm_80003es2lan - Acquire rights to access NVM
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the semaphore to access the EEPROM.
+ **/
+static s32 e1000e_acquire_nvm_80003es2lan(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_acquire_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_acquire_nvm(hw);
+
+	if (ret_val)
+		e1000e_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_release_nvm_80003es2lan - Relinquish rights to access NVM
+ *  @hw: pointer to the HW structure
+ *
+ *  Release the semaphore used to access the EEPROM.
+ **/
+static void e1000e_release_nvm_80003es2lan(struct e1000_hw *hw)
+{
+	e1000e_release_nvm(hw);
+	e1000e_release_swfw_sync_80003es2lan(hw, E1000_SWFW_EEP_SM);
+}
+
+/**
+ *  e1000e_acquire_swfw_sync_80003es2lan - Acquire SW/FW semaphore
+ *  @hw: pointer to the HW structure
+ *  @mask: specifies which semaphore to acquire
+ *
+ *  Acquire the SW/FW semaphore to access the PHY or NVM.  The mask
+ *  will also specify which port we're acquiring the lock for.
+ **/
+static s32 e1000e_acquire_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+	u32 swmask = mask;
+	u32 fwmask = mask << 16;
+	s32 ret_val = E1000_SUCCESS;
+	s32 i = 0, timeout = 50;
+
+	while (i < timeout) {
+		if (e1000e_get_hw_semaphore(hw)) {
+			ret_val = -E1000_ERR_SWFW_SYNC;
+			goto out;
+		}
+
+		swfw_sync = er32(SW_FW_SYNC);
+		if (!(swfw_sync & (fwmask | swmask)))
+			break;
+
+		/*
+		 * Firmware currently using resource (fwmask)
+		 * or other software thread using resource (swmask)
+		 */
+		e1000e_put_hw_semaphore(hw);
+		mdelay(5);
+		i++;
+	}
+
+	if (i == timeout) {
+		e_dbg("Driver can't access resource, SW_FW_SYNC timeout.\n");
+		ret_val = -E1000_ERR_SWFW_SYNC;
+		goto out;
+	}
+
+	swfw_sync |= swmask;
+	ew32(SW_FW_SYNC, swfw_sync);
+
+	e1000e_put_hw_semaphore(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_release_swfw_sync_80003es2lan - Release SW/FW semaphore
+ *  @hw: pointer to the HW structure
+ *  @mask: specifies which semaphore to acquire
+ *
+ *  Release the SW/FW semaphore used to access the PHY or NVM.  The mask
+ *  will also specify which port we're releasing the lock for.
+ **/
+static void e1000e_release_swfw_sync_80003es2lan(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+
+	while (e1000e_get_hw_semaphore(hw) != E1000_SUCCESS)
+		; /* Empty */
+
+	swfw_sync = er32(SW_FW_SYNC);
+	swfw_sync &= ~mask;
+	ew32(SW_FW_SYNC, swfw_sync);
+
+	e1000e_put_hw_semaphore(hw);
+}
+
+/**
+ *  e1000e_read_phy_reg_gg82563_80003es2lan - Read GG82563 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of the register to read
+ *  @data: pointer to the data returned from the operation
+ *
+ *  Read the GG82563 PHY register.
+ **/
+static s32 e1000e_read_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+                                                  u32 offset, u16 *data)
+{
+	s32 ret_val;
+	u32 page_select;
+	u16 temp;
+
+	ret_val = e1000e_acquire_phy_80003es2lan(hw);
+	if (ret_val)
+		goto out;
+
+	/* Select Configuration Page */
+	if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
+		page_select = GG82563_PHY_PAGE_SELECT;
+	} else {
+		/*
+		 * Use Alternative Page Select register to access
+		 * registers 30 and 31
+		 */
+		page_select = GG82563_PHY_PAGE_SELECT_ALT;
+	}
+
+	temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
+	ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
+	if (ret_val) {
+		e1000e_release_phy_80003es2lan(hw);
+		goto out;
+	}
+
+	if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
+		/*
+		 * The "ready" bit in the MDIC register may be incorrectly set
+		 * before the device has completed the "Page Select" MDI
+		 * transaction.  So we wait 200us after each MDI command...
+		 */
+		udelay(200);
+
+		/* ...and verify the command was successful. */
+		ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
+
+		if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
+			ret_val = -E1000_ERR_PHY;
+			e1000e_release_phy_80003es2lan(hw);
+			goto out;
+		}
+
+		udelay(200);
+
+		ret_val = e1000e_read_phy_reg_mdic(hw,
+		                                  MAX_PHY_REG_ADDRESS & offset,
+		                                  data);
+
+		udelay(200);
+	} else
+		ret_val = e1000e_read_phy_reg_mdic(hw,
+		                                  MAX_PHY_REG_ADDRESS & offset,
+		                                  data);
+
+	e1000e_release_phy_80003es2lan(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_gg82563_80003es2lan - Write GG82563 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of the register to read
+ *  @data: value to write to the register
+ *
+ *  Write to the GG82563 PHY register.
+ **/
+static s32 e1000e_write_phy_reg_gg82563_80003es2lan(struct e1000_hw *hw,
+                                                   u32 offset, u16 data)
+{
+	s32 ret_val;
+	u32 page_select;
+	u16 temp;
+
+	ret_val = e1000e_acquire_phy_80003es2lan(hw);
+	if (ret_val)
+		goto out;
+
+	/* Select Configuration Page */
+	if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
+		page_select = GG82563_PHY_PAGE_SELECT;
+	} else {
+		/*
+		 * Use Alternative Page Select register to access
+		 * registers 30 and 31
+		 */
+		page_select = GG82563_PHY_PAGE_SELECT_ALT;
+	}
+
+	temp = (u16)((u16)offset >> GG82563_PAGE_SHIFT);
+	ret_val = e1000e_write_phy_reg_mdic(hw, page_select, temp);
+	if (ret_val) {
+		e1000e_release_phy_80003es2lan(hw);
+		goto out;
+	}
+
+	if (hw->dev_spec._80003es2lan.mdic_wa_enable == true) {
+		/*
+		 * The "ready" bit in the MDIC register may be incorrectly set
+		 * before the device has completed the "Page Select" MDI
+		 * transaction.  So we wait 200us after each MDI command...
+		 */
+		udelay(200);
+
+		/* ...and verify the command was successful. */
+		ret_val = e1000e_read_phy_reg_mdic(hw, page_select, &temp);
+
+		if (((u16)offset >> GG82563_PAGE_SHIFT) != temp) {
+			ret_val = -E1000_ERR_PHY;
+			e1000e_release_phy_80003es2lan(hw);
+			goto out;
+		}
+
+		udelay(200);
+
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+		                                  MAX_PHY_REG_ADDRESS & offset,
+		                                  data);
+
+		udelay(200);
+	} else
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+		                                  MAX_PHY_REG_ADDRESS & offset,
+		data);
+
+	e1000e_release_phy_80003es2lan(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_nvm_80003es2lan - Write to ESB2 NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of the register to read
+ *  @words: number of words to write
+ *  @data: buffer of data to write to the NVM
+ *
+ *  Write "words" of data to the ESB2 NVM.
+ **/
+static s32 e1000e_write_nvm_80003es2lan(struct e1000_hw *hw, u16 offset,
+                            u16 words, u16 *data)
+{
+	return e1000e_write_nvm_spi(hw, offset, words, data);
+}
+
+/**
+ *  e1000e_get_cfg_done_80003es2lan - Wait for configuration to complete
+ *  @hw: pointer to the HW structure
+ *
+ *  Wait a specific amount of time for manageability processes to complete.
+ *  This is a function pointer entry point called by the phy module.
+ **/
+static s32 e1000e_get_cfg_done_80003es2lan(struct e1000_hw *hw)
+{
+	s32 timeout = PHY_CFG_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+	u32 mask = E1000_NVM_CFG_DONE_PORT_0;
+
+	if (hw->bus.func == 1)
+		mask = E1000_NVM_CFG_DONE_PORT_1;
+
+	while (timeout) {
+		if (er32(EEMNGCTL) & mask)
+			break;
+		msleep(1);
+		timeout--;
+	}
+	if (!timeout) {
+		e_dbg("MNG configuration cycle has not completed.\n");
+		ret_val = -E1000_ERR_RESET;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_80003es2lan - Force PHY speed and duplex
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the speed and duplex settings onto the PHY.  This is a
+ *  function pointer entry point called by the phy module.
+ **/
+static s32 e1000e_phy_force_speed_duplex_80003es2lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data;
+	bool link;
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~GG82563_PSCR_CROSSOVER_MODE_AUTO;
+	ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	e_dbg("GG82563 PSCR: %X\n", phy_data);
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	/* Reset the phy to commit changes. */
+	phy_data |= MII_CR_RESET;
+
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	udelay(1);
+
+	if (hw->phy.autoneg_wait_to_complete) {
+		e_dbg("Waiting for forced speed/duplex link "
+		         "on GG82563 phy.\n");
+
+		ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			/*
+			 * We didn't get link.
+			 * Reset the DSP and cross our fingers.
+			 */
+			ret_val = e1000e_phy_reset_dsp(hw);
+			if (ret_val)
+				goto out;
+		}
+
+		/* Try once more */
+		ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Resetting the phy means we need to verify the TX_CLK corresponds
+	 * to the link speed.  10Mbps -> 2.5MHz, else 25MHz.
+	 */
+	phy_data &= ~GG82563_MSCR_TX_CLK_MASK;
+	if (hw->mac.forced_speed_duplex & E1000_ALL_10_SPEED)
+		phy_data |= GG82563_MSCR_TX_CLK_10MBPS_2_5;
+	else
+		phy_data |= GG82563_MSCR_TX_CLK_100MBPS_25;
+
+	/*
+	 * In addition, we must re-enable CRS on Tx for both half and full
+	 * duplex.
+	 */
+	phy_data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
+	ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL, phy_data);
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  e1000e_get_cable_length_80003es2lan - Set approximate cable length
+ *  @hw: pointer to the HW structure
+ *
+ *  Find the approximate cable length as measured by the GG82563 PHY.
+ *  This is a function pointer entry point called by the phy module.
+ **/
+static s32 e1000e_get_cable_length_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data, index;
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = e1e_rphy(hw, GG82563_PHY_DSP_DISTANCE, &phy_data);
+	if (ret_val)
+		goto out;
+
+	index = phy_data & GG82563_DSPD_CABLE_LENGTH;
+
+	if (index >= GG82563_CABLE_LENGTH_TABLE_SIZE - 5) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+	phy->min_cable_length = e1000_gg82563_cable_length_table[index];
+	phy->max_cable_length = e1000_gg82563_cable_length_table[index + 5];
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000e_get_link_up_info_80003es2lan - Report speed and duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: pointer to speed buffer
+ *  @duplex: pointer to duplex buffer
+ *
+ *  Retrieve the current speed and duplex configuration.
+ **/
+static s32 e1000e_get_link_up_info_80003es2lan(struct e1000_hw *hw, u16 *speed,
+                                              u16 *duplex)
+{
+	s32 ret_val;
+
+	if (hw->phy.media_type == e1000_media_type_copper) {
+		ret_val = e1000e_get_speed_and_duplex_copper(hw,
+		                                                    speed,
+		                                                    duplex);
+		hw->phy.ops.cfg_on_link_up(hw);
+	} else {
+		ret_val = e1000e_get_speed_and_duplex_fiber_serdes(hw,
+		                                                  speed,
+		                                                  duplex);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_reset_hw_80003es2lan - Reset the ESB2 controller
+ *  @hw: pointer to the HW structure
+ *
+ *  Perform a global reset to the ESB2 controller.
+ **/
+static s32 e1000e_reset_hw_80003es2lan(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = e1000e_disable_pcie_master(hw);
+	if (ret_val)
+		e_dbg("PCI-E Master disable polling has failed.\n");
+
+	e_dbg("Masking off all interrupts\n");
+	ew32(IMC, 0xffffffff);
+
+	ew32(RCTL, 0);
+	ew32(TCTL, E1000_TCTL_PSP);
+	e1e_flush();
+
+	msleep(10);
+
+	ctrl = er32(CTRL);
+
+	ret_val = e1000e_acquire_phy_80003es2lan(hw);
+	e_dbg("Issuing a global reset to MAC\n");
+	ew32(CTRL, ctrl | E1000_CTRL_RST);
+	e1000e_release_phy_80003es2lan(hw);
+
+	ret_val = e1000e_get_auto_rd_done(hw);
+	if (ret_val)
+		/* We don't want to continue accessing MAC registers. */
+		goto out;
+
+	/* Clear any pending interrupt events. */
+	ew32(IMC, 0xffffffff);
+	er32(ICR);
+
+	ret_val = e1000e_check_alt_mac_addr_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_hw_80003es2lan - Initialize the ESB2 controller
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize the hw bits, LED, VFTA, MTA, link and hw counters.
+ **/
+static s32 e1000e_init_hw_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 reg_data;
+	s32 ret_val;
+	u16 i;
+
+	e1000e_initialize_hw_bits_80003es2lan(hw);
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val) {
+		e_dbg("Error initializing identification LED\n");
+		/* This is not fatal and we should not stop init due to this */
+	}
+
+	/* Disabling VLAN filtering */
+	e_dbg("Initializing the IEEE VLAN\n");
+	e1000e_clear_vfta(hw);
+
+	/* Setup the receive address. */
+	e1000e_init_rx_addrs(hw, mac->rar_entry_count);
+
+	/* Zero out the Multicast HASH table */
+	e_dbg("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/* Set the transmit descriptor write-back policy */
+	reg_data = er32(TXDCTL(0));
+	reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
+	           E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
+	ew32(TXDCTL(0), reg_data);
+
+	/* ...for both queues. */
+	reg_data = er32(TXDCTL(1));
+	reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
+	           E1000_TXDCTL_FULL_TX_DESC_WB | E1000_TXDCTL_COUNT_DESC;
+	ew32(TXDCTL(1), reg_data);
+
+	/* Enable retransmit on late collisions */
+	reg_data = er32(TCTL);
+	reg_data |= E1000_TCTL_RTLC;
+	ew32(TCTL, reg_data);
+
+	/* Configure Gigabit Carry Extend Padding */
+	reg_data = er32(TCTL_EXT);
+	reg_data &= ~E1000_TCTL_EXT_GCEX_MASK;
+	reg_data |= DEFAULT_TCTL_EXT_GCEX_80003ES2LAN;
+	ew32(TCTL_EXT, reg_data);
+
+	/* Configure Transmit Inter-Packet Gap */
+	reg_data = er32(TIPG);
+	reg_data &= ~E1000_TIPG_IPGT_MASK;
+	reg_data |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
+	ew32(TIPG, reg_data);
+
+	reg_data = E1000_READ_REG_ARRAY(hw, E1000_FFLT, 0x0001);
+	reg_data &= ~0x00100000;
+	E1000_WRITE_REG_ARRAY(hw, E1000_FFLT, 0x0001, reg_data);
+
+	/* default to true to enable the MDIC W/A */
+	hw->dev_spec._80003es2lan.mdic_wa_enable = true;
+
+	ret_val = e1000e_read_kmrn_reg_80003es2lan(hw,
+	                              E1000_KMRNCTRLSTA_OFFSET >>
+	                              E1000_KMRNCTRLSTA_OFFSET_SHIFT,
+	                              &i);
+	if (!ret_val) {
+		if ((i & E1000_KMRNCTRLSTA_OPMODE_MASK) ==
+		     E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO)
+			hw->dev_spec._80003es2lan.mdic_wa_enable = false;
+	}
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000e_clear_hw_cntrs_80003es2lan(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_initialize_hw_bits_80003es2lan - Init hw bits of ESB2
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes required hardware-dependent bits needed for normal operation.
+ **/
+static void e1000e_initialize_hw_bits_80003es2lan(struct e1000_hw *hw)
+{
+	u32 reg;
+
+	/* Transmit Descriptor Control 0 */
+	reg = er32(TXDCTL(0));
+	reg |= (1 << 22);
+	ew32(TXDCTL(0), reg);
+
+	/* Transmit Descriptor Control 1 */
+	reg = er32(TXDCTL(1));
+	reg |= (1 << 22);
+	ew32(TXDCTL(1), reg);
+
+	/* Transmit Arbitration Control 0 */
+	reg = er32(TARC(0));
+	reg &= ~(0xF << 27); /* 30:27 */
+	if (hw->phy.media_type != e1000_media_type_copper)
+		reg &= ~(1 << 20);
+	ew32(TARC(0), reg);
+
+	/* Transmit Arbitration Control 1 */
+	reg = er32(TARC(1));
+	if (er32(TCTL) & E1000_TCTL_MULR)
+		reg &= ~(1 << 28);
+	else
+		reg |= (1 << 28);
+	ew32(TARC(1), reg);
+
+	return;
+}
+
+/**
+ *  e1000e_copper_link_setup_gg82563_80003es2lan - Configure GG82563 Link
+ *  @hw: pointer to the HW structure
+ *
+ *  Setup some GG82563 PHY registers for obtaining link
+ **/
+static s32 e1000e_copper_link_setup_gg82563_80003es2lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u32 ctrl_ext;
+	u16 data;
+
+	if (!phy->reset_disable) {
+		ret_val = e1e_rphy(hw, GG82563_PHY_MAC_SPEC_CTRL,
+		                             &data);
+		if (ret_val)
+			goto out;
+
+		data |= GG82563_MSCR_ASSERT_CRS_ON_TX;
+		/* Use 25MHz for both link down and 1000Base-T for Tx clock. */
+		data |= GG82563_MSCR_TX_CLK_1000MBPS_25;
+
+		ret_val = e1e_wphy(hw, GG82563_PHY_MAC_SPEC_CTRL,
+		                              data);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Options:
+		 *   MDI/MDI-X = 0 (default)
+		 *   0 - Auto for all speeds
+		 *   1 - MDI mode
+		 *   2 - MDI-X mode
+		 *   3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
+		 */
+		ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL, &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~GG82563_PSCR_CROSSOVER_MODE_MASK;
+
+		switch (phy->mdix) {
+		case 1:
+			data |= GG82563_PSCR_CROSSOVER_MODE_MDI;
+			break;
+		case 2:
+			data |= GG82563_PSCR_CROSSOVER_MODE_MDIX;
+			break;
+		case 0:
+		default:
+			data |= GG82563_PSCR_CROSSOVER_MODE_AUTO;
+			break;
+		}
+
+		/*
+		 * Options:
+		 *   disable_polarity_correction = 0 (default)
+		 *       Automatic Correction for Reversed Cable Polarity
+		 *   0 - Disabled
+		 *   1 - Enabled
+		 */
+		data &= ~GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
+		if (phy->disable_polarity_correction)
+			data |= GG82563_PSCR_POLARITY_REVERSAL_DISABLE;
+
+		ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL, data);
+		if (ret_val)
+			goto out;
+
+		/* SW Reset the PHY so all changes take effect */
+		ret_val = e1000e_commit_phy(hw);
+		if (ret_val) {
+			e_dbg("Error Resetting the PHY\n");
+			goto out;
+		}
+
+	}
+
+	/* Bypass Rx and Tx FIFO's */
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw,
+					E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL,
+					E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS |
+					E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_read_kmrn_reg_80003es2lan(hw,
+	                              E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
+	                              &data);
+	if (ret_val)
+		goto out;
+	data |= E1000_KMRNCTRLSTA_OPMODE_E_IDLE;
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw,
+	                               E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE,
+	                               data);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_rphy(hw, GG82563_PHY_SPEC_CTRL_2, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~GG82563_PSCR2_REVERSE_AUTO_NEG;
+	ret_val = e1e_wphy(hw, GG82563_PHY_SPEC_CTRL_2, data);
+	if (ret_val)
+		goto out;
+
+	ctrl_ext = er32(CTRL_EXT);
+	ctrl_ext &= ~(E1000_CTRL_EXT_LINK_MODE_MASK);
+	ew32(CTRL_EXT, ctrl_ext);
+
+	ret_val = e1e_rphy(hw, GG82563_PHY_PWR_MGMT_CTRL, &data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Do not init these registers when the HW is in IAMT mode, since the
+	 * firmware will have already initialized them.  We only initialize
+	 * them if the HW is not in IAMT mode.
+	 */
+	if (!(hw->mac.ops.check_mng_mode(hw))) {
+		/* Enable Electrical Idle on the PHY */
+		data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE;
+		ret_val = e1e_wphy(hw, GG82563_PHY_PWR_MGMT_CTRL,
+		                                data);
+		if (ret_val)
+			goto out;
+
+		ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                               &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
+		ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                                data);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Workaround: Disable padding in Kumeran interface in the MAC
+	 * and in the PHY to avoid CRC errors.
+	 */
+	ret_val = e1e_rphy(hw, GG82563_PHY_INBAND_CTRL, &data);
+	if (ret_val)
+		goto out;
+
+	data |= GG82563_ICR_DIS_PADDING;
+	ret_val = e1e_wphy(hw, GG82563_PHY_INBAND_CTRL, data);
+	if (ret_val)
+		goto out;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_copper_link_80003es2lan - Setup Copper Link for ESB2
+ *  @hw: pointer to the HW structure
+ *
+ *  Essentially a wrapper for setting up all things "copper" related.
+ *  This is a function pointer entry point called by the mac module.
+ **/
+static s32 e1000e_setup_copper_link_80003es2lan(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+	u16 reg_data;
+
+	ctrl = er32(CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ew32(CTRL, ctrl);
+
+	/*
+	 * Set the mac to wait the maximum time between each
+	 * iteration and increase the max iterations when
+	 * polling the phy; this fixes erroneous timeouts at 10Mbps.
+	 */
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 4),
+	                                           0xFFFF);
+	if (ret_val)
+		goto out;
+	ret_val = e1000e_read_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
+	                                          &reg_data);
+	if (ret_val)
+		goto out;
+	reg_data |= 0x3F;
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw, GG82563_REG(0x34, 9),
+	                                           reg_data);
+	if (ret_val)
+		goto out;
+	ret_val = e1000e_read_kmrn_reg_80003es2lan(hw,
+	                              E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
+	                              &reg_data);
+	if (ret_val)
+		goto out;
+	reg_data |= E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING;
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw,
+	                               E1000_KMRNCTRLSTA_OFFSET_INB_CTRL,
+	                               reg_data);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_copper_link_setup_gg82563_80003es2lan(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_setup_copper_link(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
+ *  @hw: pointer to the HW structure
+ *  @duplex: current duplex setting
+ *
+ *  Configure the KMRN interface by applying last minute quirks for
+ *  10/100 operation.
+ **/
+static s32 e1000e_cfg_on_link_up_80003es2lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 speed;
+	u16 duplex;
+
+	if (hw->phy.media_type == e1000_media_type_copper) {
+		ret_val = e1000e_get_speed_and_duplex_copper(hw,
+		                                                    &speed,
+		                                                    &duplex);
+		if (ret_val)
+			goto out;
+
+		if (speed == SPEED_1000)
+			ret_val = e1000e_cfg_kmrn_1000_80003es2lan(hw);
+		else
+			ret_val = e1000e_cfg_kmrn_10_100_80003es2lan(hw, duplex);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_cfg_kmrn_10_100_80003es2lan - Apply "quirks" for 10/100 operation
+ *  @hw: pointer to the HW structure
+ *  @duplex: current duplex setting
+ *
+ *  Configure the KMRN interface by applying last minute quirks for
+ *  10/100 operation.
+ **/
+static s32 e1000e_cfg_kmrn_10_100_80003es2lan(struct e1000_hw *hw, u16 duplex)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 tipg;
+	u32 i = 0;
+	u16 reg_data, reg_data2;
+
+	reg_data = E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT;
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw,
+	                               E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
+	                               reg_data);
+	if (ret_val)
+		goto out;
+
+	/* Configure Transmit Inter-Packet Gap */
+	tipg = er32(TIPG);
+	tipg &= ~E1000_TIPG_IPGT_MASK;
+	tipg |= DEFAULT_TIPG_IPGT_10_100_80003ES2LAN;
+	ew32(TIPG, tipg);
+
+
+	do {
+		ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                               &reg_data);
+		if (ret_val)
+			goto out;
+
+		ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                               &reg_data2);
+		if (ret_val)
+			goto out;
+		i++;
+	} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
+
+	if (duplex == HALF_DUPLEX)
+		reg_data |= GG82563_KMCR_PASS_FALSE_CARRIER;
+	else
+		reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
+
+	ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_cfg_kmrn_1000_80003es2lan - Apply "quirks" for gigabit operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Configure the KMRN interface by applying last minute quirks for
+ *  gigabit operation.
+ **/
+static s32 e1000e_cfg_kmrn_1000_80003es2lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 reg_data, reg_data2;
+	u32 tipg;
+	u32 i = 0;
+
+	reg_data = E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT;
+	ret_val = e1000e_write_kmrn_reg_80003es2lan(hw,
+	                               E1000_KMRNCTRLSTA_OFFSET_HD_CTRL,
+	                               reg_data);
+	if (ret_val)
+		goto out;
+
+	/* Configure Transmit Inter-Packet Gap */
+	tipg = er32(TIPG);
+	tipg &= ~E1000_TIPG_IPGT_MASK;
+	tipg |= DEFAULT_TIPG_IPGT_1000_80003ES2LAN;
+	ew32(TIPG, tipg);
+
+
+	do {
+		ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                               &reg_data);
+		if (ret_val)
+			goto out;
+
+		ret_val = e1e_rphy(hw, GG82563_PHY_KMRN_MODE_CTRL,
+		                               &reg_data2);
+		if (ret_val)
+			goto out;
+		i++;
+	} while ((reg_data != reg_data2) && (i < GG82563_MAX_KMRN_RETRY));
+
+	reg_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER;
+	ret_val = e1e_wphy(hw, GG82563_PHY_KMRN_MODE_CTRL, reg_data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_kmrn_reg_80003es2lan - Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquire semaphore, then read the PHY register at offset
+ *  using the kumeran interface.  The information retrieved is stored in data.
+ *  Release the semaphore before exiting.
+ **/
+static s32 e1000e_read_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+                                           u16 *data)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	ret_val = e1000e_acquire_mac_csr_80003es2lan(hw);
+	if (ret_val)
+		goto out;
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+	ew32(KMRNCTRLSTA, kmrnctrlsta);
+
+	udelay(2);
+
+	kmrnctrlsta = er32(KMRNCTRLSTA);
+	*data = (u16)kmrnctrlsta;
+
+	e1000e_release_mac_csr_80003es2lan(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_kmrn_reg_80003es2lan - Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquire semaphore, then write the data to PHY register
+ *  at the offset using the kumeran interface.  Release semaphore
+ *  before exiting.
+ **/
+static s32 e1000e_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
+                                            u16 data)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	ret_val = e1000e_acquire_mac_csr_80003es2lan(hw);
+	if (ret_val)
+		goto out;
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | data;
+	ew32(KMRNCTRLSTA, kmrnctrlsta);
+
+	udelay(2);
+
+	e1000e_release_mac_csr_80003es2lan(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_mac_addr_80003es2lan - Read device MAC address
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_read_mac_addr_80003es2lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * If there's an alternate MAC address place it in RAR0
+	 * so that it will override the Si installed default perm
+	 * address.
+	 */
+	ret_val = e1000e_check_alt_mac_addr_generic(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_read_mac_addr_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000e_power_down_phy_copper_80003es2lan - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void e1000e_power_down_phy_copper_80003es2lan(struct e1000_hw *hw)
+{
+	/* If the management interface is not enabled, then power down */
+	if (!(hw->mac.ops.check_mng_mode(hw) ||
+	      e1000e_check_reset_block(hw)))
+             e1000e_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000e_clear_hw_cntrs_80003es2lan - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000e_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw __unused)
+{
+#if 0
+	e1000e_clear_hw_cntrs_base(hw);
+
+	er32(PRC64);
+	er32(PRC127);
+	er32(PRC255);
+	er32(PRC511);
+	er32(PRC1023);
+	er32(PRC1522);
+	er32(PTC64);
+	er32(PTC127);
+	er32(PTC255);
+	er32(PTC511);
+	er32(PTC1023);
+	er32(PTC1522);
+
+	er32(ALGNERRC);
+	er32(RXERRC);
+	er32(TNCRS);
+	er32(CEXTERR);
+	er32(TSCTC);
+	er32(TSCTFC);
+
+	er32(MGTPRC);
+	er32(MGTPDC);
+	er32(MGTPTC);
+
+	er32(IAC);
+	er32(ICRXOC);
+
+	er32(ICRXPTC);
+	er32(ICRXATC);
+	er32(ICTXPTC);
+	er32(ICTXATC);
+	er32(ICTXQEC);
+	er32(ICTXQMTC);
+	er32(ICRXDMTC);
+#endif
+}
+
+static struct pci_device_id e1000e_80003es2lan_nics[] = {
+     PCI_ROM(0x8086, 0x1096, "E1000_DEV_ID_80003ES2LAN_COPPER_DPT", "E1000_DEV_ID_80003ES2LAN_COPPER_DPT", board_80003es2lan),
+     PCI_ROM(0x8086, 0x10BA, "E1000_DEV_ID_80003ES2LAN_COPPER_SPT", "E1000_DEV_ID_80003ES2LAN_COPPER_SPT", board_80003es2lan),
+     PCI_ROM(0x8086, 0x1098, "E1000_DEV_ID_80003ES2LAN_SERDES_DPT", "E1000_DEV_ID_80003ES2LAN_SERDES_DPT", board_80003es2lan),
+     PCI_ROM(0x8086, 0x10BB, "E1000_DEV_ID_80003ES2LAN_SERDES_SPT", "E1000_DEV_ID_80003ES2LAN_SERDES_SPT", board_80003es2lan),
+};
+
+struct pci_driver e1000e_80003es2lan_driver __pci_driver = {
+	.ids = e1000e_80003es2lan_nics,
+	.id_count = (sizeof (e1000e_80003es2lan_nics) / sizeof (e1000e_80003es2lan_nics[0])),
+	.probe = e1000e_probe,
+	.remove = e1000e_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_80003es2lan.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_80003es2lan.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_80003es2lan.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_80003es2lan.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,100 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_80003ES2LAN_H_
+#define _E1000E_80003ES2LAN_H_
+
+#define E1000_KMRNCTRLSTA_OFFSET_FIFO_CTRL       0x00
+#define E1000_KMRNCTRLSTA_OFFSET_INB_CTRL        0x02
+#define E1000_KMRNCTRLSTA_OFFSET_HD_CTRL         0x10
+#define E1000_KMRNCTRLSTA_OFFSET_MAC2PHY_OPMODE  0x1F
+
+#define E1000_KMRNCTRLSTA_FIFO_CTRL_RX_BYPASS    0x0008
+#define E1000_KMRNCTRLSTA_FIFO_CTRL_TX_BYPASS    0x0800
+#define E1000_KMRNCTRLSTA_INB_CTRL_DIS_PADDING   0x0010
+
+#define E1000_KMRNCTRLSTA_HD_CTRL_10_100_DEFAULT 0x0004
+#define E1000_KMRNCTRLSTA_HD_CTRL_1000_DEFAULT   0x0000
+#define E1000_KMRNCTRLSTA_OPMODE_E_IDLE          0x2000
+
+#define E1000_KMRNCTRLSTA_OPMODE_MASK            0x000C
+#define E1000_KMRNCTRLSTA_OPMODE_INBAND_MDIO     0x0004
+
+#define E1000_TCTL_EXT_GCEX_MASK 0x000FFC00 /* Gigabit Carry Extend Padding */
+#define DEFAULT_TCTL_EXT_GCEX_80003ES2LAN        0x00010000
+
+#define DEFAULT_TIPG_IPGT_1000_80003ES2LAN       0x8
+#define DEFAULT_TIPG_IPGT_10_100_80003ES2LAN     0x9
+
+/* GG82563 PHY Specific Status Register (Page 0, Register 16 */
+#define GG82563_PSCR_POLARITY_REVERSAL_DISABLE  0x0002 /* 1=Reversal Disabled */
+#define GG82563_PSCR_CROSSOVER_MODE_MASK        0x0060
+#define GG82563_PSCR_CROSSOVER_MODE_MDI         0x0000 /* 00=Manual MDI */
+#define GG82563_PSCR_CROSSOVER_MODE_MDIX        0x0020 /* 01=Manual MDIX */
+#define GG82563_PSCR_CROSSOVER_MODE_AUTO        0x0060 /* 11=Auto crossover */
+
+/* PHY Specific Control Register 2 (Page 0, Register 26) */
+#define GG82563_PSCR2_REVERSE_AUTO_NEG          0x2000
+                                               /* 1=Reverse Auto-Negotiation */
+
+/* MAC Specific Control Register (Page 2, Register 21) */
+/* Tx clock speed for Link Down and 1000BASE-T for the following speeds */
+#define GG82563_MSCR_TX_CLK_MASK                0x0007
+#define GG82563_MSCR_TX_CLK_10MBPS_2_5          0x0004
+#define GG82563_MSCR_TX_CLK_100MBPS_25          0x0005
+#define GG82563_MSCR_TX_CLK_1000MBPS_2_5        0x0006
+#define GG82563_MSCR_TX_CLK_1000MBPS_25         0x0007
+
+#define GG82563_MSCR_ASSERT_CRS_ON_TX           0x0010 /* 1=Assert */
+
+/* DSP Distance Register (Page 5, Register 26) */
+/*
+ * 0 = <50M
+ * 1 = 50-80M
+ * 2 = 80-100M
+ * 3 = 110-140M
+ * 4 = >140M
+ */
+#define GG82563_DSPD_CABLE_LENGTH               0x0007
+
+/* Kumeran Mode Control Register (Page 193, Register 16) */
+#define GG82563_KMCR_PASS_FALSE_CARRIER         0x0800
+
+/* Max number of times Kumeran read/write should be validated */
+#define GG82563_MAX_KMRN_RETRY                  0x5
+
+/* Power Management Control Register (Page 193, Register 20) */
+#define GG82563_PMCR_ENABLE_ELECTRICAL_IDLE     0x0001
+                                          /* 1=Enable SERDES Electrical Idle */
+
+/* In-Band Control Register (Page 194, Register 18) */
+#define GG82563_ICR_DIS_PADDING                 0x0010 /* Disable Padding */
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_82571.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_82571.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_82571.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_82571.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1818 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82571EB Gigabit Ethernet Controller
+ * 82571EB Gigabit Ethernet Controller (Copper)
+ * 82571EB Gigabit Ethernet Controller (Fiber)
+ * 82571EB Dual Port Gigabit Mezzanine Adapter
+ * 82571EB Quad Port Gigabit Mezzanine Adapter
+ * 82571PT Gigabit PT Quad Port Server ExpressModule
+ * 82572EI Gigabit Ethernet Controller (Copper)
+ * 82572EI Gigabit Ethernet Controller (Fiber)
+ * 82572EI Gigabit Ethernet Controller
+ * 82573V Gigabit Ethernet Controller (Copper)
+ * 82573E Gigabit Ethernet Controller (Copper)
+ * 82573L Gigabit Ethernet Controller
+ * 82574L Gigabit Network Connection
+ * 82574L Gigabit Network Connection
+ * 82583V Gigabit Network Connection
+ */
+
+#include "e1000e.h"
+
+static s32  e1000e_init_phy_params_82571(struct e1000_hw *hw);
+static s32  e1000e_init_nvm_params_82571(struct e1000_hw *hw);
+static s32  e1000e_init_mac_params_82571(struct e1000_hw *hw);
+static s32  e1000e_acquire_nvm_82571(struct e1000_hw *hw);
+static void e1000e_release_nvm_82571(struct e1000_hw *hw);
+static s32  e1000e_write_nvm_82571(struct e1000_hw *hw, u16 offset,
+                                  u16 words, u16 *data);
+static s32  e1000e_update_nvm_checksum_82571(struct e1000_hw *hw);
+static s32  e1000e_validate_nvm_checksum_82571(struct e1000_hw *hw);
+static s32  e1000e_get_cfg_done_82571(struct e1000_hw *hw);
+static s32  e1000e_set_d0_lplu_state_82571(struct e1000_hw *hw,
+                                          bool active);
+static s32  e1000e_reset_hw_82571(struct e1000_hw *hw);
+static s32  e1000e_init_hw_82571(struct e1000_hw *hw);
+static void e1000e_clear_vfta_82571(struct e1000_hw *hw);
+#if 0
+static bool e1000e_check_mng_mode_82574(struct e1000_hw *hw);
+#endif
+static s32  e1000e_led_on_82574(struct e1000_hw *hw);
+static s32  e1000e_setup_link_82571(struct e1000_hw *hw);
+static s32  e1000e_setup_copper_link_82571(struct e1000_hw *hw);
+static s32  e1000e_check_for_serdes_link_82571(struct e1000_hw *hw);
+static s32  e1000e_setup_fiber_serdes_link_82571(struct e1000_hw *hw);
+static s32  e1000e_valid_led_default_82571(struct e1000_hw *hw, u16 *data);
+static void e1000e_clear_hw_cntrs_82571(struct e1000_hw *hw);
+static s32  e1000e_get_hw_semaphore_82571(struct e1000_hw *hw);
+static s32  e1000e_fix_nvm_checksum_82571(struct e1000_hw *hw);
+static s32  e1000e_get_phy_id_82571(struct e1000_hw *hw);
+static void e1000e_put_hw_semaphore_82571(struct e1000_hw *hw);
+static void e1000e_initialize_hw_bits_82571(struct e1000_hw *hw);
+static s32  e1000e_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
+                                       u16 words, u16 *data);
+static s32  e1000e_read_mac_addr_82571(struct e1000_hw *hw);
+static void e1000e_power_down_phy_copper_82571(struct e1000_hw *hw);
+
+/**
+ *  e1000e_init_phy_params_82571 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_phy_params_82571(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		phy->type = e1000_phy_none;
+		goto out;
+	}
+
+	phy->addr                        = 1;
+	phy->autoneg_mask                = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us              = 100;
+
+	phy->ops.acquire                 = e1000e_get_hw_semaphore_82571;
+	phy->ops.check_polarity          = e1000e_check_polarity_igp;
+	phy->ops.check_reset_block       = e1000e_check_reset_block_generic;
+	phy->ops.release                 = e1000e_put_hw_semaphore_82571;
+	phy->ops.reset                   = e1000e_phy_hw_reset_generic;
+	phy->ops.set_d0_lplu_state       = e1000e_set_d0_lplu_state_82571;
+	phy->ops.set_d3_lplu_state       = e1000e_set_d3_lplu_state;
+	phy->ops.power_up                = e1000e_power_up_phy_copper;
+	phy->ops.power_down              = e1000e_power_down_phy_copper_82571;
+
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		phy->type                   = e1000_phy_igp_2;
+		phy->ops.get_cfg_done       = e1000e_get_cfg_done_82571;
+		phy->ops.get_info           = e1000e_get_phy_info_igp;
+#if 0
+		phy->ops.force_speed_duplex = e1000e_phy_force_speed_duplex_igp;
+#endif
+#if 0
+		phy->ops.get_cable_length   = e1000e_get_cable_length_igp_2;
+#endif
+		phy->ops.read_reg           = e1000e_read_phy_reg_igp;
+		phy->ops.write_reg          = e1000e_write_phy_reg_igp;
+
+		/* This uses above function pointers */
+		ret_val = e1000e_get_phy_id_82571(hw);
+
+		/* Verify PHY ID */
+		if (phy->id != IGP01E1000_I_PHY_ID) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+		break;
+	case e1000_82573:
+		phy->type                   = e1000_phy_m88;
+		phy->ops.get_cfg_done       = e1000e_get_cfg_done;
+		phy->ops.get_info           = e1000e_get_phy_info_m88;
+		phy->ops.commit             = e1000e_phy_sw_reset;
+#if 0
+		phy->ops.force_speed_duplex = e1000e_phy_force_speed_duplex_m88;
+#endif
+#if 0
+		phy->ops.get_cable_length   = e1000e_get_cable_length_m88;
+#endif
+		phy->ops.read_reg           = e1000e_read_phy_reg_m88;
+		phy->ops.write_reg          = e1000e_write_phy_reg_m88;
+
+		/* This uses above function pointers */
+		ret_val = e1000e_get_phy_id_82571(hw);
+
+		/* Verify PHY ID */
+		if (phy->id != M88E1111_I_PHY_ID) {
+			ret_val = -E1000_ERR_PHY;
+			e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);
+			goto out;
+		}
+		break;
+	case e1000_82583:
+	case e1000_82574:
+		phy->type                   = e1000_phy_bm;
+		phy->ops.get_cfg_done       = e1000e_get_cfg_done;
+		phy->ops.get_info           = e1000e_get_phy_info_m88;
+		phy->ops.commit             = e1000e_phy_sw_reset;
+#if 0
+		phy->ops.force_speed_duplex = e1000e_phy_force_speed_duplex_m88;
+#endif
+#if 0
+		phy->ops.get_cable_length   = e1000e_get_cable_length_m88;
+#endif
+		phy->ops.read_reg           = e1000e_read_phy_reg_bm2;
+		phy->ops.write_reg          = e1000e_write_phy_reg_bm2;
+
+		/* This uses above function pointers */
+		ret_val = e1000e_get_phy_id_82571(hw);
+		/* Verify PHY ID */
+		if (phy->id != BME1000_E_PHY_ID_R2) {
+			ret_val = -E1000_ERR_PHY;
+			e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);
+			goto out;
+		}
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+		break;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_nvm_params_82571 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_nvm_params_82571(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = er32(EECD);
+	u16 size;
+
+	nvm->opcode_bits = 8;
+	nvm->delay_usec = 1;
+	switch (nvm->override) {
+	case e1000_nvm_override_spi_large:
+		nvm->page_size = 32;
+		nvm->address_bits = 16;
+		break;
+	case e1000_nvm_override_spi_small:
+		nvm->page_size = 8;
+		nvm->address_bits = 8;
+		break;
+	default:
+		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
+		break;
+	}
+
+	switch (hw->mac.type) {
+	case e1000_82573:
+	case e1000_82574:
+	case e1000_82583:
+		if (((eecd >> 15) & 0x3) == 0x3) {
+			nvm->type = e1000_nvm_flash_hw;
+			nvm->word_size = 2048;
+			/*
+			 * Autonomous Flash update bit must be cleared due
+			 * to Flash update issue.
+			 */
+			eecd &= ~E1000_EECD_AUPDEN;
+			ew32(EECD, eecd);
+			break;
+		}
+		/* Fall Through */
+	default:
+		nvm->type = e1000_nvm_eeprom_spi;
+		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+		                  E1000_EECD_SIZE_EX_SHIFT);
+		/*
+		 * Added to a constant, "size" becomes the left-shift value
+		 * for setting word_size.
+		 */
+		size += NVM_WORD_SIZE_BASE_SHIFT;
+
+		/* EEPROM access above 16k is unsupported */
+		if (size > 14)
+			size = 14;
+		nvm->word_size	= 1 << size;
+		break;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire       = e1000e_acquire_nvm_82571;
+	nvm->ops.read          = e1000e_read_nvm_eerd;
+	nvm->ops.release       = e1000e_release_nvm_82571;
+	nvm->ops.update        = e1000e_update_nvm_checksum_82571;
+	nvm->ops.validate      = e1000e_validate_nvm_checksum_82571;
+	nvm->ops.valid_led_default = e1000e_valid_led_default_82571;
+	nvm->ops.write         = e1000e_write_nvm_82571;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_init_mac_params_82571 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_init_mac_params_82571(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+	u32 swsm = 0;
+	u32 swsm2 = 0;
+	bool force_clear_smbi = false;
+
+	/* Set media type */
+	switch (hw->device_id) {
+	case E1000_DEV_ID_82571EB_FIBER:
+	case E1000_DEV_ID_82572EI_FIBER:
+	case E1000_DEV_ID_82571EB_QUAD_FIBER:
+		hw->phy.media_type = e1000_media_type_fiber;
+		break;
+	case E1000_DEV_ID_82571EB_SERDES:
+	case E1000_DEV_ID_82571EB_SERDES_DUAL:
+	case E1000_DEV_ID_82571EB_SERDES_QUAD:
+	case E1000_DEV_ID_82572EI_SERDES:
+		hw->phy.media_type = e1000_media_type_internal_serdes;
+		break;
+	default:
+		hw->phy.media_type = e1000_media_type_copper;
+		break;
+	}
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES;
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+	/* Set if manageability features are enabled. */
+	mac->arc_subsystem_valid =
+	        (er32(FWSM) & E1000_FWSM_MODE_MASK)
+	                ? true : false;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000e_get_bus_info_pcie;
+	/* function id */
+	switch (hw->mac.type) {
+	case e1000_82573:
+	case e1000_82574:
+	case e1000_82583:
+		mac->ops.set_lan_id = e1000e_set_lan_id_single_port;
+		break;
+	default:
+		break;
+	}
+	/* reset */
+	mac->ops.reset_hw = e1000e_reset_hw_82571;
+	/* hw initialization */
+	mac->ops.init_hw = e1000e_init_hw_82571;
+	/* link setup */
+	mac->ops.setup_link = e1000e_setup_link_82571;
+	/* physical interface link setup */
+	mac->ops.setup_physical_interface =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000e_setup_copper_link_82571
+	                : e1000e_setup_fiber_serdes_link_82571;
+	/* check for link */
+	switch (hw->phy.media_type) {
+	case e1000_media_type_copper:
+		mac->ops.check_for_link = e1000e_check_for_copper_link;
+		break;
+	case e1000_media_type_fiber:
+		mac->ops.check_for_link = e1000e_check_for_fiber_link;
+		break;
+	case e1000_media_type_internal_serdes:
+		mac->ops.check_for_link = e1000e_check_for_serdes_link_82571;
+		break;
+	default:
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+	/* check management mode */
+#if 0
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+		mac->ops.check_mng_mode = e1000e_check_mng_mode_82574;
+		break;
+	default:
+		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;
+		break;
+	}
+#endif
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000e_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = e1000e_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = e1000e_clear_vfta_82571;
+	/* setting MTA */
+	mac->ops.mta_set = e1000e_mta_set_generic;
+	/* read mac address */
+	mac->ops.read_mac_addr = e1000e_read_mac_addr_82571;
+	/* ID LED init */
+	mac->ops.id_led_init = e1000e_id_led_init;
+	/* blink LED */
+	mac->ops.blink_led = e1000e_blink_led;
+	/* setup LED */
+	mac->ops.setup_led = e1000e_setup_led_generic;
+	/* cleanup LED */
+	mac->ops.cleanup_led = e1000e_cleanup_led_generic;
+	/* turn on/off LED */
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+		mac->ops.led_on = e1000e_led_on_82574;
+		break;
+	default:
+		mac->ops.led_on = e1000e_led_on_generic;
+		break;
+	}
+	mac->ops.led_off = e1000e_led_off_generic;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000e_clear_hw_cntrs_82571;
+	/* link info */
+	mac->ops.get_link_up_info =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? e1000e_get_speed_and_duplex_copper
+	                : e1000e_get_speed_and_duplex_fiber_serdes;
+
+	/*
+	 * Ensure that the inter-port SWSM.SMBI lock bit is clear before
+	 * first NVM or PHY acess. This should be done for single-port
+	 * devices, and for one port only on dual-port devices so that
+	 * for those devices we can still use the SMBI lock to synchronize
+	 * inter-port accesses to the PHY & NVM.
+	 */
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		swsm2 = er32(SWSM2);
+
+		if (!(swsm2 & E1000_SWSM2_LOCK)) {
+			/* Only do this for the first interface on this card */
+			ew32(SWSM2,
+			    swsm2 | E1000_SWSM2_LOCK);
+			force_clear_smbi = true;
+		} else
+			force_clear_smbi = false;
+		break;
+	default:
+		force_clear_smbi = true;
+		break;
+	}
+
+	if (force_clear_smbi) {
+		/* Make sure SWSM.SMBI is clear */
+		swsm = er32(SWSM);
+		if (swsm & E1000_SWSM_SMBI) {
+			/* This bit should not be set on a first interface, and
+			 * indicates that the bootagent or EFI code has
+			 * improperly left this bit enabled
+			 */
+			e_dbg("Please update your 82571 Bootagent\n");
+		}
+		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);
+	}
+
+	/*
+	 * Initialze device specific counter of SMBI acquisition
+	 * timeouts.
+	 */
+	 hw->dev_spec._82571.smb_counter = 0;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_function_pointers_82571 - Init func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void e1000e_init_function_pointers_82571(struct e1000_hw *hw)
+{
+	e1000e_init_mac_ops_generic(hw);
+	e1000e_init_nvm_ops_generic(hw);
+	hw->mac.ops.init_params = e1000e_init_mac_params_82571;
+	hw->nvm.ops.init_params = e1000e_init_nvm_params_82571;
+	hw->phy.ops.init_params = e1000e_init_phy_params_82571;
+}
+
+/**
+ *  e1000e_get_phy_id_82571 - Retrieve the PHY ID and revision
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY registers and stores the PHY ID and possibly the PHY
+ *  revision in the hardware structure.
+ **/
+static s32 e1000e_get_phy_id_82571(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_id = 0;
+
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		/*
+		 * The 82571 firmware may still be configuring the PHY.
+		 * In this case, we cannot access the PHY until the
+		 * configuration is done.  So we explicitly set the
+		 * PHY ID.
+		 */
+		phy->id = IGP01E1000_I_PHY_ID;
+		break;
+	case e1000_82573:
+		ret_val = e1000e_get_phy_id(hw);
+		break;
+	case e1000_82574:
+	case e1000_82583:
+		ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id = (u32)(phy_id << 16);
+		udelay(20);
+		ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id |= (u32)(phy_id);
+		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		break;
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_hw_semaphore_82571 - Acquire hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the HW semaphore to access the PHY or NVM
+ **/
+s32 e1000e_get_hw_semaphore_82571(struct e1000_hw *hw)
+{
+	u32 swsm;
+	s32 ret_val = E1000_SUCCESS;
+	s32 sw_timeout = hw->nvm.word_size + 1;
+	s32 fw_timeout = hw->nvm.word_size + 1;
+	s32 i = 0;
+
+	/*
+	 * If we have timedout 3 times on trying to acquire
+	 * the inter-port SMBI semaphore, there is old code
+	 * operating on the other port, and it is not
+	 * releasing SMBI. Modify the number of times that
+	 * we try for the semaphore to interwork with this
+	 * older code.
+	 */
+	if (hw->dev_spec._82571.smb_counter > 2)
+		sw_timeout = 1;
+
+	/* Get the SW semaphore */
+	while (i < sw_timeout) {
+		swsm = er32(SWSM);
+		if (!(swsm & E1000_SWSM_SMBI))
+			break;
+
+		udelay(50);
+		i++;
+	}
+
+	if (i == sw_timeout) {
+		e_dbg("Driver can't access device - SMBI bit is set.\n");
+		hw->dev_spec._82571.smb_counter++;
+	}
+	/* Get the FW semaphore. */
+	for (i = 0; i < fw_timeout; i++) {
+		swsm = er32(SWSM);
+		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);
+
+		/* Semaphore acquired if bit latched */
+		if (er32(SWSM) & E1000_SWSM_SWESMBI)
+			break;
+
+		udelay(50);
+	}
+
+	if (i == fw_timeout) {
+		/* Release semaphores */
+		e1000e_put_hw_semaphore_82571(hw);
+		e_dbg("Driver can't access the NVM\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_put_hw_semaphore_82571 - Release hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Release hardware semaphore used to access the PHY or NVM
+ **/
+void e1000e_put_hw_semaphore_82571(struct e1000_hw *hw)
+{
+	u32 swsm;
+
+	swsm = er32(SWSM);
+	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
+	ew32(SWSM, swsm);
+}
+
+/**
+ *  e1000e_acquire_nvm_82571 - Request for access to the EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  To gain access to the EEPROM, first we must obtain a hardware semaphore.
+ *  Then for non-82573 hardware, set the EEPROM access request bit and wait
+ *  for EEPROM access grant bit.  If the access grant bit is not set, release
+ *  hardware semaphore.
+ **/
+static s32 e1000e_acquire_nvm_82571(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_get_hw_semaphore_82571(hw);
+	if (ret_val)
+		goto out;
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		break;
+	default:
+		ret_val = e1000e_acquire_nvm(hw);
+		break;
+	}
+
+	if (ret_val)
+		e1000e_put_hw_semaphore_82571(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_release_nvm_82571 - Release exclusive access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
+ **/
+static void e1000e_release_nvm_82571(struct e1000_hw *hw)
+{
+	e1000e_release_nvm(hw);
+	e1000e_put_hw_semaphore_82571(hw);
+}
+
+/**
+ *  e1000e_write_nvm_82571 - Write to EEPROM using appropriate interface
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  For non-82573 silicon, write data to EEPROM at offset using SPI interface.
+ *
+ *  If e1000e_update_nvm_checksum is not called after this function, the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+static s32 e1000e_write_nvm_82571(struct e1000_hw *hw, u16 offset, u16 words,
+                                 u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	switch (hw->mac.type) {
+	case e1000_82573:
+	case e1000_82574:
+	case e1000_82583:
+		ret_val = e1000e_write_nvm_eewr_82571(hw, offset, words, data);
+		break;
+	case e1000_82571:
+	case e1000_82572:
+		ret_val = e1000e_write_nvm_spi(hw, offset, words, data);
+		break;
+	default:
+		ret_val = -E1000_ERR_NVM;
+		break;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_update_nvm_checksum_82571 - Update EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  up to the checksum.  Then calculates the EEPROM checksum and writes the
+ *  value to the EEPROM.
+ **/
+static s32 e1000e_update_nvm_checksum_82571(struct e1000_hw *hw)
+{
+	u32 eecd;
+	s32 ret_val;
+	u16 i;
+
+	ret_val = e1000e_update_nvm_checksum_generic(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * If our nvm is an EEPROM, then we're done
+	 * otherwise, commit the checksum to the flash NVM.
+	 */
+	if (hw->nvm.type != e1000_nvm_flash_hw)
+		goto out;
+
+	/* Check for pending operations. */
+	for (i = 0; i < E1000_FLASH_UPDATES; i++) {
+		msleep(1);
+		if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
+			break;
+	}
+
+	if (i == E1000_FLASH_UPDATES) {
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Reset the firmware if using STM opcode. */
+	if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) {
+		/*
+		 * The enabling of and the actual reset must be done
+		 * in two write cycles.
+		 */
+		ew32(HICR, E1000_HICR_FW_RESET_ENABLE);
+		e1e_flush();
+		ew32(HICR, E1000_HICR_FW_RESET);
+	}
+
+	/* Commit the write to flash */
+	eecd = er32(EECD) | E1000_EECD_FLUPD;
+	ew32(EECD, eecd);
+
+	for (i = 0; i < E1000_FLASH_UPDATES; i++) {
+		msleep(1);
+		if ((er32(EECD) & E1000_EECD_FLUPD) == 0)
+			break;
+	}
+
+	if (i == E1000_FLASH_UPDATES) {
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_validate_nvm_checksum_82571 - Validate EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
+ **/
+static s32 e1000e_validate_nvm_checksum_82571(struct e1000_hw *hw)
+{
+	if (hw->nvm.type == e1000_nvm_flash_hw)
+		e1000e_fix_nvm_checksum_82571(hw);
+
+	return e1000e_validate_nvm_checksum_generic(hw);
+}
+
+/**
+ *  e1000e_write_nvm_eewr_82571 - Write to EEPROM for 82573 silicon
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  After checking for invalid values, poll the EEPROM to ensure the previous
+ *  command has completed before trying to write the next word.  After write
+ *  poll for completion.
+ *
+ *  If e1000e_update_nvm_checksum is not called after this function, the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+static s32 e1000e_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
+                                      u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i, eewr = 0;
+	s32 ret_val = 0;
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		e_dbg("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	for (i = 0; i < words; i++) {
+		eewr = (data[i] << E1000_NVM_RW_REG_DATA) |
+		       ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
+		       E1000_NVM_RW_REG_START;
+
+		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
+		if (ret_val)
+			break;
+
+		ew32(EEWR, eewr);
+
+		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_WRITE);
+		if (ret_val)
+			break;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_cfg_done_82571 - Poll for configuration done
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the management control register for the config done bit to be set.
+ **/
+static s32 e1000e_get_cfg_done_82571(struct e1000_hw *hw)
+{
+	s32 timeout = PHY_CFG_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+
+	while (timeout) {
+		if (er32(EEMNGCTL) & E1000_NVM_CFG_DONE_PORT_0)
+			break;
+		msleep(1);
+		timeout--;
+	}
+	if (!timeout) {
+		e_dbg("MNG configuration cycle has not completed.\n");
+		ret_val = -E1000_ERR_RESET;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_d0_lplu_state_82571 - Set Low Power Linkup D0 state
+ *  @hw: pointer to the HW structure
+ *  @active: true to enable LPLU, false to disable
+ *
+ *  Sets the LPLU D0 state according to the active flag.  When activating LPLU
+ *  this function also disables smart speed and vice versa.  LPLU will not be
+ *  activated unless the device autonegotiation advertisement meets standards
+ *  of either 10 or 10/100 or 10/100/1000 at all duplexes.  This is a function
+ *  pointer entry point only called by PHY setup routines.
+ **/
+static s32 e1000e_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	if (!(phy->ops.read_reg))
+		goto out;
+
+	ret_val = e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &data);
+	if (ret_val)
+		goto out;
+
+	if (active) {
+		data |= IGP02E1000_PM_D0_LPLU;
+		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                            &data);
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                             data);
+		if (ret_val)
+			goto out;
+	} else {
+		data &= ~IGP02E1000_PM_D0_LPLU;
+		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_reset_hw_82571 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 e1000e_reset_hw_82571(struct e1000_hw *hw)
+{
+	u32 ctrl, extcnf_ctrl, ctrl_ext;
+	s32 ret_val;
+	u16 i = 0;
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = e1000e_disable_pcie_master(hw);
+	if (ret_val)
+		e_dbg("PCI-E Master disable polling has failed.\n");
+
+	e_dbg("Masking off all interrupts\n");
+	ew32(IMC, 0xffffffff);
+
+	ew32(RCTL, 0);
+	ew32(TCTL, E1000_TCTL_PSP);
+	e1e_flush();
+
+	msleep(10);
+
+	/*
+	 * Must acquire the MDIO ownership before MAC reset.
+	 * Ownership defaults to firmware after a reset.
+	 */
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		extcnf_ctrl = er32(EXTCNF_CTRL);
+		extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
+
+		do {
+			ew32(EXTCNF_CTRL, extcnf_ctrl);
+			extcnf_ctrl = er32(EXTCNF_CTRL);
+
+			if (extcnf_ctrl & E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP)
+				break;
+
+			extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
+
+			msleep(2);
+			i++;
+		} while (i < MDIO_OWNERSHIP_TIMEOUT);
+		break;
+	default:
+		break;
+	}
+
+	ctrl = er32(CTRL);
+
+	e_dbg("Issuing a global reset to MAC\n");
+	ew32(CTRL, ctrl | E1000_CTRL_RST);
+
+	if (hw->nvm.type == e1000_nvm_flash_hw) {
+		udelay(10);
+		ctrl_ext = er32(CTRL_EXT);
+		ctrl_ext |= E1000_CTRL_EXT_EE_RST;
+		ew32(CTRL_EXT, ctrl_ext);
+		e1e_flush();
+	}
+
+	ret_val = e1000e_get_auto_rd_done(hw);
+	if (ret_val)
+		/* We don't want to continue accessing MAC registers. */
+		goto out;
+
+	/*
+	 * Phy configuration from NVM just starts after EECD_AUTO_RD is set.
+	 * Need to wait for Phy configuration completion before accessing
+	 * NVM and Phy.
+	 */
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		msleep(25);
+		break;
+	default:
+		break;
+	}
+
+	/* Clear any pending interrupt events. */
+	ew32(IMC, 0xffffffff);
+	er32(ICR);
+
+	/* Install any alternate MAC address into RAR0 */
+	ret_val = e1000e_check_alt_mac_addr_generic(hw);
+	if (ret_val)
+		goto out;
+
+	e1000e_set_laa_state_82571(hw, true);
+
+	/* Reinitialize the 82571 serdes link state machine */
+	if (hw->phy.media_type == e1000_media_type_internal_serdes)
+		hw->mac.serdes_link_state = e1000_serdes_link_down;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_hw_82571 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 e1000e_init_hw_82571(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 reg_data;
+	s32 ret_val;
+	u16 i, rar_count = mac->rar_entry_count;
+
+	e1000e_initialize_hw_bits_82571(hw);
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val) {
+		e_dbg("Error initializing identification LED\n");
+		/* This is not fatal and we should not stop init due to this */
+	}
+
+	/* Disabling VLAN filtering */
+	e_dbg("Initializing the IEEE VLAN\n");
+	e1000e_clear_vfta(hw);
+
+	/* Setup the receive address. */
+	/*
+	 * If, however, a locally administered address was assigned to the
+	 * 82571, we must reserve a RAR for it to work around an issue where
+	 * resetting one port will reload the MAC on the other port.
+	 */
+	if (e1000e_get_laa_state_82571(hw))
+		rar_count--;
+	e1000e_init_rx_addrs(hw, rar_count);
+
+	/* Zero out the Multicast HASH table */
+	e_dbg("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/* Set the transmit descriptor write-back policy */
+	reg_data = er32(TXDCTL(0));
+	reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
+	           E1000_TXDCTL_FULL_TX_DESC_WB |
+	           E1000_TXDCTL_COUNT_DESC;
+	ew32(TXDCTL(0), reg_data);
+
+	/* ...for both queues. */
+	switch (mac->type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+#if 0
+		e1000e_enable_tx_pkt_filtering(hw);
+#endif
+		reg_data = er32(GCR);
+		reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
+		ew32(GCR, reg_data);
+		break;
+	default:
+		reg_data = er32(TXDCTL(1));
+		reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) |
+					E1000_TXDCTL_FULL_TX_DESC_WB |
+					E1000_TXDCTL_COUNT_DESC;
+		ew32(TXDCTL(1), reg_data);
+		break;
+	}
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000e_clear_hw_cntrs_82571(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_initialize_hw_bits_82571 - Initialize hardware-dependent bits
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes required hardware-dependent bits needed for normal operation.
+ **/
+static void e1000e_initialize_hw_bits_82571(struct e1000_hw *hw)
+{
+	u32 reg;
+
+	/* Transmit Descriptor Control 0 */
+	reg = er32(TXDCTL(0));
+	reg |= (1 << 22);
+	ew32(TXDCTL(0), reg);
+
+	/* Transmit Descriptor Control 1 */
+	reg = er32(TXDCTL(1));
+	reg |= (1 << 22);
+	ew32(TXDCTL(1), reg);
+
+	/* Transmit Arbitration Control 0 */
+	reg = er32(TARC(0));
+	reg &= ~(0xF << 27); /* 30:27 */
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		reg |= (1 << 23) | (1 << 24) | (1 << 25) | (1 << 26);
+		break;
+	default:
+		break;
+	}
+	ew32(TARC(0), reg);
+
+	/* Transmit Arbitration Control 1 */
+	reg = er32(TARC(1));
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		reg &= ~((1 << 29) | (1 << 30));
+		reg |= (1 << 22) | (1 << 24) | (1 << 25) | (1 << 26);
+		if (er32(TCTL) & E1000_TCTL_MULR)
+			reg &= ~(1 << 28);
+		else
+			reg |= (1 << 28);
+		ew32(TARC(1), reg);
+		break;
+	default:
+		break;
+	}
+
+	/* Device Control */
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		reg = er32(CTRL);
+		reg &= ~(1 << 29);
+		ew32(CTRL, reg);
+		break;
+	default:
+		break;
+	}
+
+	/* Extended Device Control */
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		reg = er32(CTRL_EXT);
+		reg &= ~(1 << 23);
+		reg |= (1 << 22);
+		ew32(CTRL_EXT, reg);
+		break;
+	default:
+		break;
+	}
+
+
+	if (hw->mac.type == e1000_82571) {
+		reg = er32(PBA_ECC);
+		reg |= E1000_PBA_ECC_CORR_EN;
+		ew32(PBA_ECC, reg);
+	}
+
+	/*
+	 * Workaround for hardware errata.
+	 * Ensure that DMA Dynamic Clock gating is disabled on 82571 and 82572
+	 */
+
+	if ((hw->mac.type == e1000_82571) ||
+	   (hw->mac.type == e1000_82572)) {
+		reg = er32(CTRL_EXT);
+		reg &= ~E1000_CTRL_EXT_DMA_DYN_CLK_EN;
+		ew32(CTRL_EXT, reg);
+	}
+
+	/* PCI-Ex Control Registers */
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+		reg = er32(GCR);
+		reg |= (1 << 22);
+		ew32(GCR, reg);
+		/*
+		 * Workaround for hardware errata.
+		 * apply workaround for hardware errata documented in errata
+		 * docs Fixes issue where some error prone or unreliable PCIe
+		 * completions are occurring, particularly with ASPM enabled.
+		 * Without fix, issue can cause tx timeouts.
+		 */
+		reg = er32(GCR2);
+		reg |= 1;
+		ew32(GCR2, reg);
+		break;
+	default:
+		break;
+	}
+	return;
+}
+
+/**
+ *  e1000e_clear_vfta_82571 - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the register array which contains the VLAN filter table by
+ *  setting all the values to 0.
+ **/
+static void e1000e_clear_vfta_82571(struct e1000_hw *hw)
+{
+	u32 offset;
+	u32 vfta_value = 0;
+	u32 vfta_offset = 0;
+	u32 vfta_bit_in_reg = 0;
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		if (hw->mng_cookie.vlan_id != 0) {
+			/*
+			*The VFTA is a 4096b bit-field, each identifying
+			*a single VLAN ID.  The following operations
+			*determine which 32b entry (i.e. offset) into the
+			*array we want to set the VLAN ID (i.e. bit) of
+			*the manageability unit.
+			*/
+			vfta_offset = (hw->mng_cookie.vlan_id >>
+				E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
+			vfta_bit_in_reg = 1 << (hw->mng_cookie.vlan_id &
+				E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
+		}
+
+		for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
+			/*
+			*If the offset we want to clear is the same offset of
+			*the manageability VLAN ID, then clear all bits except
+			*that of the manageability unit
+			*/
+			vfta_value = (offset == vfta_offset) ?
+							vfta_bit_in_reg : 0;
+			E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset,
+				vfta_value);
+			e1e_flush();
+		}
+		break;
+	default:
+		break;
+	}
+}
+
+#if 0
+/**
+ *  e1000e_check_mng_mode_82574 - Check manageability is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the NVM Initialization Control Word 2 and returns true
+ *  (>0) if any manageability is enabled, else false (0).
+ **/
+static bool e1000e_check_mng_mode_82574(struct e1000_hw *hw)
+{
+	u16 data;
+
+	e1000e_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data);
+	return (data & E1000_NVM_INIT_CTRL2_MNGM) != 0;
+}
+#endif
+
+/**
+ *  e1000e_led_on_82574 - Turn LED on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED on.
+ **/
+static s32 e1000e_led_on_82574(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl;
+	u32 i;
+
+	ctrl = hw->mac.ledctl_mode2;
+	if (!(E1000_STATUS_LU & er32(STATUS))) {
+		/*
+		 * If no link, then turn LED on by setting the invert bit
+		 * for each LED that's "on" (0x0E) in ledctl_mode2.
+		 */
+		for (i = 0; i < 4; i++)
+			if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
+			    E1000_LEDCTL_MODE_LED_ON)
+				ctrl |= (E1000_LEDCTL_LED0_IVRT << (i * 8));
+	}
+	ew32(LEDCTL, ctrl);
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_setup_link_82571 - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+static s32 e1000e_setup_link_82571(struct e1000_hw *hw)
+{
+	/*
+	 * 82573 does not have a word in the NVM to determine
+	 * the default flow control setting, so we explicitly
+	 * set it to full.
+	 */
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		if (hw->fc.requested_mode == e1000_fc_default)
+			hw->fc.requested_mode = e1000_fc_full;
+		break;
+	default:
+		break;
+	}
+	return e1000e_setup_link(hw);
+}
+
+/**
+ *  e1000e_setup_copper_link_82571 - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the link for auto-neg or forced speed and duplex.  Then we check
+ *  for link, once link is established calls to configure collision distance
+ *  and flow control are called.
+ **/
+static s32 e1000e_setup_copper_link_82571(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32  ret_val;
+
+	ctrl = er32(CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ew32(CTRL, ctrl);
+
+	switch (hw->phy.type) {
+	case e1000_phy_m88:
+	case e1000_phy_bm:
+		ret_val = e1000e_copper_link_setup_m88(hw);
+		break;
+	case e1000_phy_igp_2:
+		ret_val = e1000e_copper_link_setup_igp(hw);
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		break;
+	}
+
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_setup_copper_link(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_fiber_serdes_link_82571 - Setup link for fiber/serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures collision distance and flow control for fiber and serdes links.
+ *  Upon successful setup, poll for link.
+ **/
+static s32 e1000e_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
+{
+	switch (hw->mac.type) {
+	case e1000_82571:
+	case e1000_82572:
+		/*
+		 * If SerDes loopback mode is entered, there is no form
+		 * of reset to take the adapter out of that mode.  So we
+		 * have to explicitly take the adapter out of loopback
+		 * mode.  This prevents drivers from twiddling their thumbs
+		 * if another tool failed to take it out of loopback mode.
+		 */
+		ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
+		break;
+	default:
+		break;
+	}
+
+	return e1000e_setup_fiber_serdes_link(hw);
+}
+
+/**
+ *  e1000e_check_for_serdes_link_82571 - Check for link (Serdes)
+ *  @hw: pointer to the HW structure
+ *
+ *  Reports the link state as up or down.
+ *
+ *  If autonegotiation is supported by the link partner, the link state is
+ *  determined by the result of autongotiation. This is the most likely case.
+ *  If autonegotiation is not supported by the link partner, and the link
+ *  has a valid signal, force the link up.
+ *
+ *  The link state is represented internally here by 4 states:
+ *
+ *  1) down
+ *  2) autoneg_progress
+ *  3) autoneg_complete (the link sucessfully autonegotiated)
+ *  4) forced_up (the link has been forced up, it did not autonegotiate)
+ *
+ **/
+s32 e1000e_check_for_serdes_link_82571(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	ctrl = er32(CTRL);
+	status = er32(STATUS);
+	rxcw = er32(RXCW);
+
+	if ((rxcw & E1000_RXCW_SYNCH) && !(rxcw & E1000_RXCW_IV)) {
+
+		/* Receiver is synchronized with no invalid bits.  */
+		switch (mac->serdes_link_state) {
+		case e1000_serdes_link_autoneg_complete:
+			if (!(status & E1000_STATUS_LU)) {
+				/*
+				 * We have lost link, retry autoneg before
+				 * reporting link failure
+				 */
+				mac->serdes_link_state =
+				    e1000_serdes_link_autoneg_progress;
+				mac->serdes_has_link = false;
+				e_dbg("AN_UP     -> AN_PROG\n");
+			}
+		break;
+
+		case e1000_serdes_link_forced_up:
+			/*
+			 * If we are receiving /C/ ordered sets, re-enable
+			 * auto-negotiation in the TXCW register and disable
+			 * forced link in the Device Control register in an
+			 * attempt to auto-negotiate with our link partner.
+			 */
+			if (rxcw & E1000_RXCW_C) {
+				/* Enable autoneg, and unforce link up */
+				ew32(TXCW, mac->txcw);
+				ew32(CTRL,
+				    (ctrl & ~E1000_CTRL_SLU));
+				mac->serdes_link_state =
+				    e1000_serdes_link_autoneg_progress;
+				mac->serdes_has_link = false;
+				e_dbg("FORCED_UP -> AN_PROG\n");
+			}
+			break;
+
+		case e1000_serdes_link_autoneg_progress:
+			if (rxcw & E1000_RXCW_C) {
+				/* We received /C/ ordered sets, meaning the
+				 * link partner has autonegotiated, and we can
+				 * trust the Link Up (LU) status bit
+				 */
+				if (status & E1000_STATUS_LU) {
+					mac->serdes_link_state =
+					    e1000_serdes_link_autoneg_complete;
+					e_dbg("AN_PROG   -> AN_UP\n");
+					mac->serdes_has_link = true;
+				} else {
+					/* Autoneg completed, but failed */
+					mac->serdes_link_state =
+					    e1000_serdes_link_down;
+					e_dbg("AN_PROG   -> DOWN\n");
+				}
+			} else {
+				/* The link partner did not autoneg.
+				 * Force link up and full duplex, and change
+				 * state to forced.
+				 */
+				ew32(TXCW,
+				(mac->txcw & ~E1000_TXCW_ANE));
+				ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+				ew32(CTRL, ctrl);
+
+				/* Configure Flow Control after link up. */
+				ret_val =
+				    e1000e_config_fc_after_link_up(hw);
+				if (ret_val) {
+					e_dbg("Error config flow control\n");
+					break;
+				}
+				mac->serdes_link_state =
+				e1000_serdes_link_forced_up;
+				mac->serdes_has_link = true;
+				e_dbg("AN_PROG   -> FORCED_UP\n");
+			}
+			break;
+
+		case e1000_serdes_link_down:
+		default:
+			/* The link was down but the receiver has now gained
+			 * valid sync, so lets see if we can bring the link
+			 * up. */
+			ew32(TXCW, mac->txcw);
+			ew32(CTRL,
+			    (ctrl & ~E1000_CTRL_SLU));
+			mac->serdes_link_state =
+			    e1000_serdes_link_autoneg_progress;
+			e_dbg("DOWN      -> AN_PROG\n");
+			break;
+		}
+	} else {
+		if (!(rxcw & E1000_RXCW_SYNCH)) {
+			mac->serdes_has_link = false;
+			mac->serdes_link_state = e1000_serdes_link_down;
+			e_dbg("ANYSTATE  -> DOWN\n");
+		} else {
+			/*
+			 * We have sync, and can tolerate one
+			 * invalid (IV) codeword before declaring
+			 * link down, so reread to look again
+			 */
+			udelay(10);
+			rxcw = er32(RXCW);
+			if (rxcw & E1000_RXCW_IV) {
+				mac->serdes_link_state = e1000_serdes_link_down;
+				mac->serdes_has_link = false;
+				e_dbg("ANYSTATE  -> DOWN\n");
+			}
+		}
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_valid_led_default_82571 - Verify a valid default LED config
+ *  @hw: pointer to the HW structure
+ *  @data: pointer to the NVM (EEPROM)
+ *
+ *  Read the EEPROM for the current default LED configuration.  If the
+ *  LED configuration is not valid, set to a valid LED configuration.
+ **/
+static s32 e1000e_valid_led_default_82571(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+
+	switch (hw->mac.type) {
+	case e1000_82574:
+	case e1000_82583:
+	case e1000_82573:
+		if(*data == ID_LED_RESERVED_F746)
+			*data = ID_LED_DEFAULT_82573;
+		break;
+	default:
+		if (*data == ID_LED_RESERVED_0000 ||
+			*data == ID_LED_RESERVED_FFFF)
+			*data = ID_LED_DEFAULT;
+		break;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_laa_state_82571 - Get locally administered address state
+ *  @hw: pointer to the HW structure
+ *
+ *  Retrieve and return the current locally administered address state.
+ **/
+bool e1000e_get_laa_state_82571(struct e1000_hw *hw)
+{
+	if (hw->mac.type != e1000_82571)
+		return false;
+
+	return hw->dev_spec._82571.laa_is_present;
+}
+
+/**
+ *  e1000e_set_laa_state_82571 - Set locally administered address state
+ *  @hw: pointer to the HW structure
+ *  @state: enable/disable locally administered address
+ *
+ *  Enable/Disable the current locally administered address state.
+ **/
+void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
+{
+	if (hw->mac.type != e1000_82571)
+		return;
+
+	hw->dev_spec._82571.laa_is_present = state;
+
+	/* If workaround is activated... */
+	if (state)
+		/*
+		 * Hold a copy of the LAA in RAR[14] This is done so that
+		 * between the time RAR[0] gets clobbered and the time it
+		 * gets fixed, the actual LAA is in one of the RARs and no
+		 * incoming packets directed to this port are dropped.
+		 * Eventually the LAA will be in RAR[0] and RAR[14].
+		 */
+		e1000e_rar_set(hw, hw->mac.addr,
+		                      hw->mac.rar_entry_count - 1);
+	return;
+}
+
+/**
+ *  e1000e_fix_nvm_checksum_82571 - Fix EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Verifies that the EEPROM has completed the update.  After updating the
+ *  EEPROM, we need to check bit 15 in work 0x23 for the checksum fix.  If
+ *  the checksum fix is not implemented, we need to set the bit and update
+ *  the checksum.  Otherwise, if bit 15 is set and the checksum is incorrect,
+ *  we need to return bad checksum.
+ **/
+static s32 e1000e_fix_nvm_checksum_82571(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	if (nvm->type != e1000_nvm_flash_hw)
+		goto out;
+
+	/*
+	 * Check bit 4 of word 10h.  If it is 0, firmware is done updating
+	 * 10h-12h.  Checksum may need to be fixed.
+	 */
+	ret_val = e1000e_read_nvm(hw, 0x10, 1, &data);
+	if (ret_val)
+		goto out;
+
+	if (!(data & 0x10)) {
+		/*
+		 * Read 0x23 and check bit 15.  This bit is a 1
+		 * when the checksum has already been fixed.  If
+		 * the checksum is still wrong and this bit is a
+		 * 1, we need to return bad checksum.  Otherwise,
+		 * we need to set this bit to a 1 and update the
+		 * checksum.
+		 */
+		ret_val = e1000e_read_nvm(hw, 0x23, 1, &data);
+		if (ret_val)
+			goto out;
+
+		if (!(data & 0x8000)) {
+			data |= 0x8000;
+			ret_val = e1000e_write_nvm(hw, 0x23, 1, &data);
+			if (ret_val)
+				goto out;
+			ret_val = e1000e_update_nvm_checksum(hw);
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_mac_addr_82571 - Read device MAC address
+ *  @hw: pointer to the HW structure
+ **/
+static s32 e1000e_read_mac_addr_82571(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * If there's an alternate MAC address place it in RAR0
+	 * so that it will override the Si installed default perm
+	 * address.
+	 */
+	ret_val = e1000e_check_alt_mac_addr_generic(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_read_mac_addr_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000e_power_down_phy_copper_82571 - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void e1000e_power_down_phy_copper_82571(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	struct e1000_mac_info *mac = &hw->mac;
+
+	if (!(phy->ops.check_reset_block))
+		return;
+
+	/* If the management interface is not enabled, then power down */
+	if (!(mac->ops.check_mng_mode(hw) || e1000e_check_reset_block(hw)))
+		e1000e_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000e_clear_hw_cntrs_82571 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void e1000e_clear_hw_cntrs_82571(struct e1000_hw *hw __unused)
+{
+#if 0
+	e1000e_clear_hw_cntrs_base(hw);
+
+	er32(PRC64);
+	er32(PRC127);
+	er32(PRC255);
+	er32(PRC511);
+	er32(PRC1023);
+	er32(PRC1522);
+	er32(PTC64);
+	er32(PTC127);
+	er32(PTC255);
+	er32(PTC511);
+	er32(PTC1023);
+	er32(PTC1522);
+
+	er32(ALGNERRC);
+	er32(RXERRC);
+	er32(TNCRS);
+	er32(CEXTERR);
+	er32(TSCTC);
+	er32(TSCTFC);
+
+	er32(MGTPRC);
+	er32(MGTPDC);
+	er32(MGTPTC);
+
+	er32(IAC);
+	er32(ICRXOC);
+
+	er32(ICRXPTC);
+	er32(ICRXATC);
+	er32(ICTXPTC);
+	er32(ICTXATC);
+	er32(ICTXQEC);
+	er32(ICTXQMTC);
+	er32(ICRXDMTC);
+#endif
+}
+
+static struct pci_device_id e1000e_82571_nics[] = {
+     PCI_ROM(0x8086, 0x105E, "E1000_DEV_ID_82571EB_COPPER", "E1000_DEV_ID_82571EB_COPPER", board_82571),
+     PCI_ROM(0x8086, 0x105F, "E1000_DEV_ID_82571EB_FIBER", "E1000_DEV_ID_82571EB_FIBER", board_82571),
+     PCI_ROM(0x8086, 0x10A4, "E1000_DEV_ID_82571EB_QUAD_COPPER", "E1000_DEV_ID_82571EB_QUAD_COPPER", board_82571),
+     PCI_ROM(0x8086, 0x10BC, "E1000_DEV_ID_82571EB_QUAD_COPPER_LP", "E1000_DEV_ID_82571EB_QUAD_COPPER_LP", board_82571),
+     PCI_ROM(0x8086, 0x10A5, "E1000_DEV_ID_82571EB_QUAD_FIBER", "E1000_DEV_ID_82571EB_QUAD_FIBER", board_82571),
+     PCI_ROM(0x8086, 0x1060, "E1000_DEV_ID_82571EB_SERDES", "E1000_DEV_ID_82571EB_SERDES", board_82571),
+     PCI_ROM(0x8086, 0x10D9, "E1000_DEV_ID_82571EB_SERDES_DUAL", "E1000_DEV_ID_82571EB_SERDES_DUAL", board_82571),
+     PCI_ROM(0x8086, 0x10DA, "E1000_DEV_ID_82571EB_SERDES_QUAD", "E1000_DEV_ID_82571EB_SERDES_QUAD", board_82571),
+     PCI_ROM(0x8086, 0x10D5, "E1000_DEV_ID_82571PT_QUAD_COPPER", "E1000_DEV_ID_82571PT_QUAD_COPPER", board_82571),
+     PCI_ROM(0x8086, 0x10B9, "E1000_DEV_ID_82572EI", "E1000_DEV_ID_82572EI", board_82572),
+     PCI_ROM(0x8086, 0x107D, "E1000_DEV_ID_82572EI_COPPER", "E1000_DEV_ID_82572EI_COPPER", board_82572),
+     PCI_ROM(0x8086, 0x107E, "E1000_DEV_ID_82572EI_FIBER", "E1000_DEV_ID_82572EI_FIBER", board_82572),
+     PCI_ROM(0x8086, 0x107F, "E1000_DEV_ID_82572EI_SERDES", "E1000_DEV_ID_82572EI_SERDES", board_82572),
+     PCI_ROM(0x8086, 0x108B, "E1000_DEV_ID_82573E", "E1000_DEV_ID_82573E", board_82573),
+     PCI_ROM(0x8086, 0x108C, "E1000_DEV_ID_82573E_IAMT", "E1000_DEV_ID_82573E_IAMT", board_82573),
+     PCI_ROM(0x8086, 0x109A, "E1000_DEV_ID_82573L", "E1000_DEV_ID_82573L", board_82573),
+     PCI_ROM(0x8086, 0x10D3, "E1000_DEV_ID_82574L", "E1000_DEV_ID_82574L", board_82574),
+     PCI_ROM(0x8086, 0x10F6, "E1000_DEV_ID_82574LA", "E1000_DEV_ID_82574LA", board_82574),
+     PCI_ROM(0x8086, 0x150C, "E1000_DEV_ID_82583V", "E1000_DEV_ID_82583V", board_82583),
+};
+
+struct pci_driver e1000e_82571_driver __pci_driver = {
+	.ids = e1000e_82571_nics,
+	.id_count = (sizeof (e1000e_82571_nics) / sizeof (e1000e_82571_nics[0])),
+	.probe = e1000e_probe,
+	.remove = e1000e_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_82571.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_82571.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_82571.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_82571.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,55 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_82571_H_
+#define _E1000E_82571_H_
+
+#define ID_LED_RESERVED_F746 0xF746
+#define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \
+                              (ID_LED_OFF1_ON2  <<  8) | \
+                              (ID_LED_DEF1_DEF2 <<  4) | \
+                              (ID_LED_DEF1_DEF2))
+
+#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
+
+/* Intr Throttling - RW */
+#define E1000_EITR_82574(_n)    (0x000E8 + (0x4 * (_n)))
+
+#define E1000_EIAC_82574        0x000DC /* Ext. Interrupt Auto Clear - RW */
+#define E1000_EIAC_MASK_82574   0x01F00000
+
+#define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */
+
+#define E1000_RXCFGL    0x0B634 /* TimeSync Rx EtherType & Msg Type Reg - RW */
+
+bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
+void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,34 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+REQUIRE_OBJECT(e1000e_main);
+REQUIRE_OBJECT(e1000e_80003es2lan);
+REQUIRE_OBJECT(e1000e_82571);
+REQUIRE_OBJECT(e1000e_ich8lan);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_defines.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_defines.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_defines.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_defines.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1469 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_DEFINES_H_
+#define _E1000E_DEFINES_H_
+
+/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
+#define REQ_TX_DESCRIPTOR_MULTIPLE  8
+#define REQ_RX_DESCRIPTOR_MULTIPLE  8
+
+/* Definitions for power management and wakeup registers */
+/* Wake Up Control */
+#define E1000_WUC_APME       0x00000001 /* APM Enable */
+#define E1000_WUC_PME_EN     0x00000002 /* PME Enable */
+#define E1000_WUC_PME_STATUS 0x00000004 /* PME Status */
+#define E1000_WUC_APMPME     0x00000008 /* Assert PME on APM Wakeup */
+#define E1000_WUC_LSCWE      0x00000010 /* Link Status wake up enable */
+#define E1000_WUC_LSCWO      0x00000020 /* Link Status wake up override */
+#define E1000_WUC_SPM        0x80000000 /* Enable SPM */
+#define E1000_WUC_PHY_WAKE   0x00000100 /* if PHY supports wakeup */
+
+/* Wake Up Filter Control */
+#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
+#define E1000_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
+#define E1000_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
+#define E1000_WUFC_MC   0x00000008 /* Directed Multicast Wakeup Enable */
+#define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */
+#define E1000_WUFC_ARP  0x00000020 /* ARP Request Packet Wakeup Enable */
+#define E1000_WUFC_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Enable */
+#define E1000_WUFC_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Enable */
+#define E1000_WUFC_IGNORE_TCO_PHY 0x00000800 /* Ignore WakeOn TCO packets */
+#define E1000_WUFC_FLX0_PHY      0x00001000 /* Flexible Filter 0 Enable */
+#define E1000_WUFC_FLX1_PHY      0x00002000 /* Flexible Filter 1 Enable */
+#define E1000_WUFC_FLX2_PHY      0x00004000 /* Flexible Filter 2 Enable */
+#define E1000_WUFC_FLX3_PHY      0x00008000 /* Flexible Filter 3 Enable */
+#define E1000_WUFC_FLX4_PHY      0x00000200 /* Flexible Filter 4 Enable */
+#define E1000_WUFC_FLX5_PHY      0x00000400 /* Flexible Filter 5 Enable */
+#define E1000_WUFC_IGNORE_TCO   0x00008000 /* Ignore WakeOn TCO packets */
+#define E1000_WUFC_FLX0 0x00010000 /* Flexible Filter 0 Enable */
+#define E1000_WUFC_FLX1 0x00020000 /* Flexible Filter 1 Enable */
+#define E1000_WUFC_FLX2 0x00040000 /* Flexible Filter 2 Enable */
+#define E1000_WUFC_FLX3 0x00080000 /* Flexible Filter 3 Enable */
+#define E1000_WUFC_FLX4 0x00100000 /* Flexible Filter 4 Enable */
+#define E1000_WUFC_FLX5 0x00200000 /* Flexible Filter 5 Enable */
+#define E1000_WUFC_ALL_FILTERS_PHY_4 0x0000F0FF /*Mask for all wakeup filters*/
+#define E1000_WUFC_FLX_OFFSET_PHY 12 /* Offset to the Flexible Filters bits */
+#define E1000_WUFC_FLX_FILTERS_PHY_4 0x0000F000 /*Mask for 4 flexible filters*/
+#define E1000_WUFC_ALL_FILTERS_PHY_6 0x0000F6FF /*Mask for 6 wakeup filters */
+#define E1000_WUFC_FLX_FILTERS_PHY_6 0x0000F600 /*Mask for 6 flexible filters*/
+#define E1000_WUFC_ALL_FILTERS  0x000F00FF /* Mask for all wakeup filters */
+#define E1000_WUFC_ALL_FILTERS_6  0x003F00FF /* Mask for all 6 wakeup filters*/
+#define E1000_WUFC_FLX_OFFSET   16 /* Offset to the Flexible Filters bits */
+#define E1000_WUFC_FLX_FILTERS  0x000F0000 /*Mask for the 4 flexible filters */
+#define E1000_WUFC_FLX_FILTERS_6  0x003F0000 /* Mask for 6 flexible filters */
+
+/* Wake Up Status */
+#define E1000_WUS_LNKC         E1000_WUFC_LNKC
+#define E1000_WUS_MAG          E1000_WUFC_MAG
+#define E1000_WUS_EX           E1000_WUFC_EX
+#define E1000_WUS_MC           E1000_WUFC_MC
+#define E1000_WUS_BC           E1000_WUFC_BC
+#define E1000_WUS_ARP          E1000_WUFC_ARP
+#define E1000_WUS_IPV4         E1000_WUFC_IPV4
+#define E1000_WUS_IPV6         E1000_WUFC_IPV6
+#define E1000_WUS_FLX0_PHY      E1000_WUFC_FLX0_PHY
+#define E1000_WUS_FLX1_PHY      E1000_WUFC_FLX1_PHY
+#define E1000_WUS_FLX2_PHY      E1000_WUFC_FLX2_PHY
+#define E1000_WUS_FLX3_PHY      E1000_WUFC_FLX3_PHY
+#define E1000_WUS_FLX_FILTERS_PHY_4        E1000_WUFC_FLX_FILTERS_PHY_4
+#define E1000_WUS_FLX0         E1000_WUFC_FLX0
+#define E1000_WUS_FLX1         E1000_WUFC_FLX1
+#define E1000_WUS_FLX2         E1000_WUFC_FLX2
+#define E1000_WUS_FLX3         E1000_WUFC_FLX3
+#define E1000_WUS_FLX4         E1000_WUFC_FLX4
+#define E1000_WUS_FLX5         E1000_WUFC_FLX5
+#define E1000_WUS_FLX4_PHY         E1000_WUFC_FLX4_PHY
+#define E1000_WUS_FLX5_PHY         E1000_WUFC_FLX5_PHY
+#define E1000_WUS_FLX_FILTERS  E1000_WUFC_FLX_FILTERS
+#define E1000_WUS_FLX_FILTERS_6  E1000_WUFC_FLX_FILTERS_6
+#define E1000_WUS_FLX_FILTERS_PHY_6  E1000_WUFC_FLX_FILTERS_PHY_6
+
+/* Wake Up Packet Length */
+#define E1000_WUPL_LENGTH_MASK 0x0FFF   /* Only the lower 12 bits are valid */
+
+/* Four Flexible Filters are supported */
+#define E1000_FLEXIBLE_FILTER_COUNT_MAX 4
+/* Six Flexible Filters are supported */
+#define E1000_FLEXIBLE_FILTER_COUNT_MAX_6   6
+
+/* Each Flexible Filter is at most 128 (0x80) bytes in length */
+#define E1000_FLEXIBLE_FILTER_SIZE_MAX  128
+
+#define E1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX
+#define E1000_FFLT_SIZE_6 E1000_FLEXIBLE_FILTER_COUNT_MAX_6
+#define E1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+#define E1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+
+/* Extended Device Control */
+#define E1000_CTRL_EXT_GPI0_EN   0x00000001 /* Maps SDP4 to GPI0 */
+#define E1000_CTRL_EXT_GPI1_EN   0x00000002 /* Maps SDP5 to GPI1 */
+#define E1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN
+#define E1000_CTRL_EXT_GPI2_EN   0x00000004 /* Maps SDP6 to GPI2 */
+#define E1000_CTRL_EXT_GPI3_EN   0x00000008 /* Maps SDP7 to GPI3 */
+/* Reserved (bits 4,5) in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* Value of SW Definable Pin 4 */
+#define E1000_CTRL_EXT_SDP5_DATA 0x00000020 /* Value of SW Definable Pin 5 */
+#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
+#define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Definable Pin 6 */
+#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */
+/* SDP 4/5 (bits 8,9) are reserved in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DIR  0x00000100 /* Direction of SDP4 0=in 1=out */
+#define E1000_CTRL_EXT_SDP5_DIR  0x00000200 /* Direction of SDP5 0=in 1=out */
+#define E1000_CTRL_EXT_SDP6_DIR  0x00000400 /* Direction of SDP6 0=in 1=out */
+#define E1000_CTRL_EXT_SDP3_DIR  0x00000800 /* Direction of SDP3 0=in 1=out */
+#define E1000_CTRL_EXT_ASDCHK    0x00001000 /* Initiate an ASD sequence */
+#define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from EEPROM */
+#define E1000_CTRL_EXT_IPS       0x00004000 /* Invert Power State */
+#define E1000_CTRL_EXT_SPD_BYPS  0x00008000 /* Speed Select Bypass */
+#define E1000_CTRL_EXT_RO_DIS    0x00020000 /* Relaxed Ordering disable */
+#define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */
+#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_TBI  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_KMRN    0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_PCIX_SERDES  0x00800000
+#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
+#define E1000_CTRL_EXT_EIAME          0x01000000
+#define E1000_CTRL_EXT_IRCA           0x00000001
+#define E1000_CTRL_EXT_WR_WMARK_MASK  0x03000000
+#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000
+#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
+#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
+#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
+#define E1000_CTRL_EXT_CANC           0x04000000 /* Int delay cancellation */
+#define E1000_CTRL_EXT_DRV_LOAD       0x10000000 /* Driver loaded bit for FW */
+/* IAME enable bit (27) was removed in >= 82575 */
+#define E1000_CTRL_EXT_IAME          0x08000000 /* Int acknowledge Auto-mask */
+#define E1000_CRTL_EXT_PB_PAREN       0x01000000 /* packet buffer parity error
+                                                  * detection enabled */
+#define E1000_CTRL_EXT_DF_PAREN       0x02000000 /* descriptor FIFO parity
+                                                  * error detection enable */
+#define E1000_CTRL_EXT_GHOST_PAREN    0x40000000
+#define E1000_CTRL_EXT_PBA_CLR        0x80000000 /* PBA Clear */
+#define E1000_CTRL_EXT_LSECCK         0x00001000
+#define E1000_CTRL_EXT_PHYPDEN        0x00100000
+#define E1000_I2CCMD_REG_ADDR_SHIFT   16
+#define E1000_I2CCMD_REG_ADDR         0x00FF0000
+#define E1000_I2CCMD_PHY_ADDR_SHIFT   24
+#define E1000_I2CCMD_PHY_ADDR         0x07000000
+#define E1000_I2CCMD_OPCODE_READ      0x08000000
+#define E1000_I2CCMD_OPCODE_WRITE     0x00000000
+#define E1000_I2CCMD_RESET            0x10000000
+#define E1000_I2CCMD_READY            0x20000000
+#define E1000_I2CCMD_INTERRUPT_ENA    0x40000000
+#define E1000_I2CCMD_ERROR            0x80000000
+#define E1000_MAX_SGMII_PHY_REG_ADDR  255
+#define E1000_I2CCMD_PHY_TIMEOUT      200
+
+/* Receive Descriptor bit definitions */
+#define E1000_RXD_STAT_DD       0x01    /* Descriptor Done */
+#define E1000_RXD_STAT_EOP      0x02    /* End of Packet */
+#define E1000_RXD_STAT_IXSM     0x04    /* Ignore checksum */
+#define E1000_RXD_STAT_VP       0x08    /* IEEE VLAN Packet */
+#define E1000_RXD_STAT_UDPCS    0x10    /* UDP xsum calculated */
+#define E1000_RXD_STAT_TCPCS    0x20    /* TCP xsum calculated */
+#define E1000_RXD_STAT_IPCS     0x40    /* IP xsum calculated */
+#define E1000_RXD_STAT_PIF      0x80    /* passed in-exact filter */
+#define E1000_RXD_STAT_CRCV     0x100   /* Speculative CRC Valid */
+#define E1000_RXD_STAT_IPIDV    0x200   /* IP identification valid */
+#define E1000_RXD_STAT_UDPV     0x400   /* Valid UDP checksum */
+#define E1000_RXD_STAT_DYNINT   0x800   /* Pkt caused INT via DYNINT */
+#define E1000_RXD_STAT_ACK      0x8000  /* ACK Packet indication */
+#define E1000_RXD_ERR_CE        0x01    /* CRC Error */
+#define E1000_RXD_ERR_SE        0x02    /* Symbol Error */
+#define E1000_RXD_ERR_SEQ       0x04    /* Sequence Error */
+#define E1000_RXD_ERR_CXE       0x10    /* Carrier Extension Error */
+#define E1000_RXD_ERR_TCPE      0x20    /* TCP/UDP Checksum Error */
+#define E1000_RXD_ERR_IPE       0x40    /* IP Checksum Error */
+#define E1000_RXD_ERR_RXE       0x80    /* Rx Data Error */
+#define E1000_RXD_SPC_VLAN_MASK 0x0FFF  /* VLAN ID is in lower 12 bits */
+#define E1000_RXD_SPC_PRI_MASK  0xE000  /* Priority is in upper 3 bits */
+#define E1000_RXD_SPC_PRI_SHIFT 13
+#define E1000_RXD_SPC_CFI_MASK  0x1000  /* CFI is bit 12 */
+#define E1000_RXD_SPC_CFI_SHIFT 12
+
+#define E1000_RXDEXT_STATERR_CE    0x01000000
+#define E1000_RXDEXT_STATERR_SE    0x02000000
+#define E1000_RXDEXT_STATERR_SEQ   0x04000000
+#define E1000_RXDEXT_STATERR_CXE   0x10000000
+#define E1000_RXDEXT_STATERR_TCPE  0x20000000
+#define E1000_RXDEXT_STATERR_IPE   0x40000000
+#define E1000_RXDEXT_STATERR_RXE   0x80000000
+
+#define E1000_RXDEXT_LSECH                0x01000000
+#define E1000_RXDEXT_LSECE_MASK           0x60000000
+#define E1000_RXDEXT_LSECE_NO_ERROR       0x00000000
+#define E1000_RXDEXT_LSECE_NO_SA_MATCH    0x20000000
+#define E1000_RXDEXT_LSECE_REPLAY_DETECT  0x40000000
+#define E1000_RXDEXT_LSECE_BAD_SIG        0x60000000
+
+/* mask to determine if packets should be dropped due to frame errors */
+#define E1000_RXD_ERR_FRAME_ERR_MASK ( \
+    E1000_RXD_ERR_CE  |                \
+    E1000_RXD_ERR_SE  |                \
+    E1000_RXD_ERR_SEQ |                \
+    E1000_RXD_ERR_CXE |                \
+    E1000_RXD_ERR_RXE)
+
+/* Same mask, but for extended and packet split descriptors */
+#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
+    E1000_RXDEXT_STATERR_CE  |            \
+    E1000_RXDEXT_STATERR_SE  |            \
+    E1000_RXDEXT_STATERR_SEQ |            \
+    E1000_RXDEXT_STATERR_CXE |            \
+    E1000_RXDEXT_STATERR_RXE)
+
+#define E1000_MRQC_ENABLE_MASK                 0x00000007
+#define E1000_MRQC_ENABLE_RSS_2Q               0x00000001
+#define E1000_MRQC_ENABLE_RSS_INT              0x00000004
+#define E1000_MRQC_RSS_FIELD_MASK              0xFFFF0000
+#define E1000_MRQC_RSS_FIELD_IPV4_TCP          0x00010000
+#define E1000_MRQC_RSS_FIELD_IPV4              0x00020000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX       0x00040000
+#define E1000_MRQC_RSS_FIELD_IPV6_EX           0x00080000
+#define E1000_MRQC_RSS_FIELD_IPV6              0x00100000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP          0x00200000
+
+#define E1000_RXDPS_HDRSTAT_HDRSP              0x00008000
+#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK        0x000003FF
+
+/* Management Control */
+#define E1000_MANC_SMBUS_EN      0x00000001 /* SMBus Enabled - RO */
+#define E1000_MANC_ASF_EN        0x00000002 /* ASF Enabled - RO */
+#define E1000_MANC_R_ON_FORCE    0x00000004 /* Reset on Force TCO - RO */
+#define E1000_MANC_RMCP_EN       0x00000100 /* Enable RCMP 026Fh Filtering */
+#define E1000_MANC_0298_EN       0x00000200 /* Enable RCMP 0298h Filtering */
+#define E1000_MANC_IPV4_EN       0x00000400 /* Enable IPv4 */
+#define E1000_MANC_IPV6_EN       0x00000800 /* Enable IPv6 */
+#define E1000_MANC_SNAP_EN       0x00001000 /* Accept LLC/SNAP */
+#define E1000_MANC_ARP_EN        0x00002000 /* Enable ARP Request Filtering */
+/* Enable Neighbor Discovery Filtering */
+#define E1000_MANC_NEIGHBOR_EN   0x00004000
+#define E1000_MANC_ARP_RES_EN    0x00008000 /* Enable ARP response Filtering */
+#define E1000_MANC_TCO_RESET     0x00010000 /* TCO Reset Occurred */
+#define E1000_MANC_RCV_TCO_EN    0x00020000 /* Receive TCO Packets Enabled */
+#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */
+#define E1000_MANC_RCV_ALL       0x00080000 /* Receive All Enabled */
+#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000 /* Block phy resets */
+/* Enable MAC address filtering */
+#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000
+/* Enable MNG packets to host memory */
+#define E1000_MANC_EN_MNG2HOST   0x00200000
+/* Enable IP address filtering */
+#define E1000_MANC_EN_IP_ADDR_FILTER    0x00400000
+#define E1000_MANC_EN_XSUM_FILTER   0x00800000 /* Enable checksum filtering */
+#define E1000_MANC_BR_EN            0x01000000 /* Enable broadcast filtering */
+#define E1000_MANC_SMB_REQ       0x01000000 /* SMBus Request */
+#define E1000_MANC_SMB_GNT       0x02000000 /* SMBus Grant */
+#define E1000_MANC_SMB_CLK_IN    0x04000000 /* SMBus Clock In */
+#define E1000_MANC_SMB_DATA_IN   0x08000000 /* SMBus Data In */
+#define E1000_MANC_SMB_DATA_OUT  0x10000000 /* SMBus Data Out */
+#define E1000_MANC_SMB_CLK_OUT   0x20000000 /* SMBus Clock Out */
+
+#define E1000_MANC_SMB_DATA_OUT_SHIFT  28 /* SMBus Data Out Shift */
+#define E1000_MANC_SMB_CLK_OUT_SHIFT   29 /* SMBus Clock Out Shift */
+
+/* Receive Control */
+#define E1000_RCTL_RST            0x00000001    /* Software reset */
+#define E1000_RCTL_EN             0x00000002    /* enable */
+#define E1000_RCTL_SBP            0x00000004    /* store bad packet */
+#define E1000_RCTL_UPE            0x00000008    /* unicast promisc enable */
+#define E1000_RCTL_MPE            0x00000010    /* multicast promisc enable */
+#define E1000_RCTL_LPE            0x00000020    /* long packet enable */
+#define E1000_RCTL_LBM_NO         0x00000000    /* no loopback mode */
+#define E1000_RCTL_LBM_MAC        0x00000040    /* MAC loopback mode */
+#define E1000_RCTL_LBM_SLP        0x00000080    /* serial link loopback mode */
+#define E1000_RCTL_LBM_TCVR       0x000000C0    /* tcvr loopback mode */
+#define E1000_RCTL_DTYP_MASK      0x00000C00    /* Descriptor type mask */
+#define E1000_RCTL_DTYP_PS        0x00000400    /* Packet Split descriptor */
+#define E1000_RCTL_RDMTS_HALF     0x00000000    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_QUAT     0x00000100    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_EIGTH    0x00000200    /* rx desc min thresh size */
+#define E1000_RCTL_MO_SHIFT       12            /* multicast offset shift */
+#define E1000_RCTL_MO_0           0x00000000    /* multicast offset 11:0 */
+#define E1000_RCTL_MO_1           0x00001000    /* multicast offset 12:1 */
+#define E1000_RCTL_MO_2           0x00002000    /* multicast offset 13:2 */
+#define E1000_RCTL_MO_3           0x00003000    /* multicast offset 15:4 */
+#define E1000_RCTL_MDR            0x00004000    /* multicast desc ring 0 */
+#define E1000_RCTL_BAM            0x00008000    /* broadcast enable */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
+#define E1000_RCTL_SZ_2048        0x00000000    /* rx buffer size 2048 */
+#define E1000_RCTL_SZ_1024        0x00010000    /* rx buffer size 1024 */
+#define E1000_RCTL_SZ_512         0x00020000    /* rx buffer size 512 */
+#define E1000_RCTL_SZ_256         0x00030000    /* rx buffer size 256 */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 1 */
+#define E1000_RCTL_SZ_16384       0x00010000    /* rx buffer size 16384 */
+#define E1000_RCTL_SZ_8192        0x00020000    /* rx buffer size 8192 */
+#define E1000_RCTL_SZ_4096        0x00030000    /* rx buffer size 4096 */
+#define E1000_RCTL_VFE            0x00040000    /* vlan filter enable */
+#define E1000_RCTL_CFIEN          0x00080000    /* canonical form enable */
+#define E1000_RCTL_CFI            0x00100000    /* canonical form indicator */
+#define E1000_RCTL_DPF            0x00400000    /* discard pause frames */
+#define E1000_RCTL_PMCF           0x00800000    /* pass MAC control frames */
+#define E1000_RCTL_BSEX           0x02000000    /* Buffer size extension */
+#define E1000_RCTL_SECRC          0x04000000    /* Strip Ethernet CRC */
+#define E1000_RCTL_FLXBUF_MASK    0x78000000    /* Flexible buffer size */
+#define E1000_RCTL_FLXBUF_SHIFT   27            /* Flexible buffer shift */
+
+/*
+ * Use byte values for the following shift parameters
+ * Usage:
+ *     psrctl |= (((ROUNDUP(value0, 128) >> E1000_PSRCTL_BSIZE0_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE0_MASK) |
+ *                ((ROUNDUP(value1, 1024) >> E1000_PSRCTL_BSIZE1_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE1_MASK) |
+ *                ((ROUNDUP(value2, 1024) << E1000_PSRCTL_BSIZE2_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE2_MASK) |
+ *                ((ROUNDUP(value3, 1024) << E1000_PSRCTL_BSIZE3_SHIFT) |;
+ *                  E1000_PSRCTL_BSIZE3_MASK))
+ * where value0 = [128..16256],  default=256
+ *       value1 = [1024..64512], default=4096
+ *       value2 = [0..64512],    default=4096
+ *       value3 = [0..64512],    default=0
+ */
+
+#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F
+#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00
+#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000
+#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000
+
+#define E1000_PSRCTL_BSIZE0_SHIFT  7            /* Shift _right_ 7 */
+#define E1000_PSRCTL_BSIZE1_SHIFT  2            /* Shift _right_ 2 */
+#define E1000_PSRCTL_BSIZE2_SHIFT  6            /* Shift _left_ 6 */
+#define E1000_PSRCTL_BSIZE3_SHIFT 14            /* Shift _left_ 14 */
+
+/* SWFW_SYNC Definitions */
+#define E1000_SWFW_EEP_SM   0x01
+#define E1000_SWFW_PHY0_SM  0x02
+#define E1000_SWFW_PHY1_SM  0x04
+#define E1000_SWFW_CSR_SM   0x08
+
+/* FACTPS Definitions */
+#define E1000_FACTPS_LFS    0x40000000  /* LAN Function Select */
+/* Device Control */
+#define E1000_CTRL_FD       0x00000001  /* Full duplex.0=half; 1=full */
+#define E1000_CTRL_BEM      0x00000002  /* Endian Mode.0=little,1=big */
+#define E1000_CTRL_PRIOR    0x00000004  /* Priority on PCI. 0=rx,1=fair */
+#define E1000_CTRL_GIO_MASTER_DISABLE 0x00000004 /*Blocks new Master reqs */
+#define E1000_CTRL_LRST     0x00000008  /* Link reset. 0=normal,1=reset */
+#define E1000_CTRL_TME      0x00000010  /* Test mode. 0=normal,1=test */
+#define E1000_CTRL_SLE      0x00000020  /* Serial Link on 0=dis,1=en */
+#define E1000_CTRL_ASDE     0x00000020  /* Auto-speed detect enable */
+#define E1000_CTRL_SLU      0x00000040  /* Set link up (Force Link) */
+#define E1000_CTRL_ILOS     0x00000080  /* Invert Loss-Of Signal */
+#define E1000_CTRL_SPD_SEL  0x00000300  /* Speed Select Mask */
+#define E1000_CTRL_SPD_10   0x00000000  /* Force 10Mb */
+#define E1000_CTRL_SPD_100  0x00000100  /* Force 100Mb */
+#define E1000_CTRL_SPD_1000 0x00000200  /* Force 1Gb */
+#define E1000_CTRL_BEM32    0x00000400  /* Big Endian 32 mode */
+#define E1000_CTRL_FRCSPD   0x00000800  /* Force Speed */
+#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */
+#define E1000_CTRL_D_UD_EN  0x00002000  /* Dock/Undock enable */
+#define E1000_CTRL_D_UD_POLARITY 0x00004000 /* Defined polarity of Dock/Undock
+                                             * indication in SDP[0] */
+#define E1000_CTRL_FORCE_PHY_RESET 0x00008000 /* Reset both PHY ports, through
+                                               * PHYRST_N pin */
+#define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external
+                                           * LINK_0 and LINK_1 pins */
+#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */
+#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */
+#define E1000_CTRL_SWDPIN2  0x00100000  /* SWDPIN 2 value */
+#define E1000_CTRL_SWDPIN3  0x00200000  /* SWDPIN 3 value */
+#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */
+#define E1000_CTRL_SWDPIO1  0x00800000  /* SWDPIN 1 input or output */
+#define E1000_CTRL_SWDPIO2  0x01000000  /* SWDPIN 2 input or output */
+#define E1000_CTRL_SWDPIO3  0x02000000  /* SWDPIN 3 input or output */
+#define E1000_CTRL_RST      0x04000000  /* Global reset */
+#define E1000_CTRL_RFCE     0x08000000  /* Receive Flow Control enable */
+#define E1000_CTRL_TFCE     0x10000000  /* Transmit flow control enable */
+#define E1000_CTRL_RTE      0x20000000  /* Routing tag enable */
+#define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
+#define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
+#define E1000_CTRL_SW2FW_INT 0x02000000 /* Initiate an interrupt to ME */
+#define E1000_CTRL_I2C_ENA  0x02000000  /* I2C enable */
+
+/*
+ * Bit definitions for the Management Data IO (MDIO) and Management Data
+ * Clock (MDC) pins in the Device Control Register.
+ */
+#define E1000_CTRL_PHY_RESET_DIR  E1000_CTRL_SWDPIO0
+#define E1000_CTRL_PHY_RESET      E1000_CTRL_SWDPIN0
+#define E1000_CTRL_MDIO_DIR       E1000_CTRL_SWDPIO2
+#define E1000_CTRL_MDIO           E1000_CTRL_SWDPIN2
+#define E1000_CTRL_MDC_DIR        E1000_CTRL_SWDPIO3
+#define E1000_CTRL_MDC            E1000_CTRL_SWDPIN3
+#define E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR
+#define E1000_CTRL_PHY_RESET4     E1000_CTRL_EXT_SDP4_DATA
+
+#define E1000_CONNSW_ENRGSRC             0x4
+#define E1000_PCS_CFG_PCS_EN             8
+#define E1000_PCS_LCTL_FLV_LINK_UP       1
+#define E1000_PCS_LCTL_FSV_10            0
+#define E1000_PCS_LCTL_FSV_100           2
+#define E1000_PCS_LCTL_FSV_1000          4
+#define E1000_PCS_LCTL_FDV_FULL          8
+#define E1000_PCS_LCTL_FSD               0x10
+#define E1000_PCS_LCTL_FORCE_LINK        0x20
+#define E1000_PCS_LCTL_LOW_LINK_LATCH    0x40
+#define E1000_PCS_LCTL_FORCE_FCTRL       0x80
+#define E1000_PCS_LCTL_AN_ENABLE         0x10000
+#define E1000_PCS_LCTL_AN_RESTART        0x20000
+#define E1000_PCS_LCTL_AN_TIMEOUT        0x40000
+#define E1000_PCS_LCTL_AN_SGMII_BYPASS   0x80000
+#define E1000_PCS_LCTL_AN_SGMII_TRIGGER  0x100000
+#define E1000_PCS_LCTL_FAST_LINK_TIMER   0x1000000
+#define E1000_PCS_LCTL_LINK_OK_FIX       0x2000000
+#define E1000_PCS_LCTL_CRS_ON_NI         0x4000000
+#define E1000_ENABLE_SERDES_LOOPBACK     0x0410
+
+#define E1000_PCS_LSTS_LINK_OK           1
+#define E1000_PCS_LSTS_SPEED_10          0
+#define E1000_PCS_LSTS_SPEED_100         2
+#define E1000_PCS_LSTS_SPEED_1000        4
+#define E1000_PCS_LSTS_DUPLEX_FULL       8
+#define E1000_PCS_LSTS_SYNK_OK           0x10
+#define E1000_PCS_LSTS_AN_COMPLETE       0x10000
+#define E1000_PCS_LSTS_AN_PAGE_RX        0x20000
+#define E1000_PCS_LSTS_AN_TIMED_OUT      0x40000
+#define E1000_PCS_LSTS_AN_REMOTE_FAULT   0x80000
+#define E1000_PCS_LSTS_AN_ERROR_RWS      0x100000
+
+/* Device Status */
+#define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
+#define E1000_STATUS_LU         0x00000002      /* Link up.0=no,1=link */
+#define E1000_STATUS_FUNC_MASK  0x0000000C      /* PCI Function Mask */
+#define E1000_STATUS_FUNC_SHIFT 2
+#define E1000_STATUS_FUNC_0     0x00000000      /* Function 0 */
+#define E1000_STATUS_FUNC_1     0x00000004      /* Function 1 */
+#define E1000_STATUS_TXOFF      0x00000010      /* transmission paused */
+#define E1000_STATUS_TBIMODE    0x00000020      /* TBI mode */
+#define E1000_STATUS_SPEED_MASK 0x000000C0
+#define E1000_STATUS_SPEED_10   0x00000000      /* Speed 10Mb/s */
+#define E1000_STATUS_SPEED_100  0x00000040      /* Speed 100Mb/s */
+#define E1000_STATUS_SPEED_1000 0x00000080      /* Speed 1000Mb/s */
+#define E1000_STATUS_LAN_INIT_DONE 0x00000200  /* Lan Init Completion by NVM */
+#define E1000_STATUS_ASDV       0x00000300      /* Auto speed detect value */
+#define E1000_STATUS_PHYRA      0x00000400      /* PHY Reset Asserted */
+#define E1000_STATUS_DOCK_CI    0x00000800      /* Change in Dock/Undock state.
+                                                 * Clear on write '0'. */
+#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Master request status */
+#define E1000_STATUS_MTXCKOK    0x00000400      /* MTX clock running OK */
+#define E1000_STATUS_PCI66      0x00000800      /* In 66Mhz slot */
+#define E1000_STATUS_BUS64      0x00001000      /* In 64 bit slot */
+#define E1000_STATUS_PCIX_MODE  0x00002000      /* PCI-X mode */
+#define E1000_STATUS_PCIX_SPEED 0x0000C000      /* PCI-X bus speed */
+#define E1000_STATUS_BMC_SKU_0  0x00100000 /* BMC USB redirect disabled */
+#define E1000_STATUS_BMC_SKU_1  0x00200000 /* BMC SRAM disabled */
+#define E1000_STATUS_BMC_SKU_2  0x00400000 /* BMC SDRAM disabled */
+#define E1000_STATUS_BMC_CRYPTO 0x00800000 /* BMC crypto disabled */
+#define E1000_STATUS_BMC_LITE   0x01000000 /* BMC external code execution
+                                            * disabled */
+#define E1000_STATUS_RGMII_ENABLE 0x02000000 /* RGMII disabled */
+#define E1000_STATUS_FUSE_8       0x04000000
+#define E1000_STATUS_FUSE_9       0x08000000
+#define E1000_STATUS_SERDES0_DIS  0x10000000 /* SERDES disabled on port 0 */
+#define E1000_STATUS_SERDES1_DIS  0x20000000 /* SERDES disabled on port 1 */
+
+/* Constants used to interpret the masked PCI-X bus speed. */
+#define E1000_STATUS_PCIX_SPEED_66  0x00000000 /* PCI-X bus speed 50-66 MHz */
+#define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus speed 66-100 MHz */
+#define E1000_STATUS_PCIX_SPEED_133 0x00008000 /*PCI-X bus speed 100-133 MHz*/
+
+#define SPEED_10    10
+#define SPEED_100   100
+#define SPEED_1000  1000
+#define HALF_DUPLEX 1
+#define FULL_DUPLEX 2
+
+#define PHY_FORCE_TIME   20
+
+#define ADVERTISE_10_HALF                 0x0001
+#define ADVERTISE_10_FULL                 0x0002
+#define ADVERTISE_100_HALF                0x0004
+#define ADVERTISE_100_FULL                0x0008
+#define ADVERTISE_1000_HALF               0x0010 /* Not used, just FYI */
+#define ADVERTISE_1000_FULL               0x0020
+
+/* 1000/H is not supported, nor spec-compliant. */
+#define E1000_ALL_SPEED_DUPLEX  (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_NOT_GIG       (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_100_SPEED    (ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_10_SPEED      (ADVERTISE_10_HALF |   ADVERTISE_10_FULL)
+#define E1000_ALL_FULL_DUPLEX   (ADVERTISE_10_FULL |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_HALF_DUPLEX   (ADVERTISE_10_HALF |  ADVERTISE_100_HALF)
+
+#define AUTONEG_ADVERTISE_SPEED_DEFAULT   E1000_ALL_SPEED_DUPLEX
+
+/* LED Control */
+#define E1000_PHY_LED0_MODE_MASK          0x00000007
+#define E1000_PHY_LED0_IVRT               0x00000008
+#define E1000_PHY_LED0_BLINK              0x00000010
+#define E1000_PHY_LED0_MASK               0x0000001F
+
+#define E1000_LEDCTL_LED0_MODE_MASK       0x0000000F
+#define E1000_LEDCTL_LED0_MODE_SHIFT      0
+#define E1000_LEDCTL_LED0_BLINK_RATE      0x00000020
+#define E1000_LEDCTL_LED0_IVRT            0x00000040
+#define E1000_LEDCTL_LED0_BLINK           0x00000080
+#define E1000_LEDCTL_LED1_MODE_MASK       0x00000F00
+#define E1000_LEDCTL_LED1_MODE_SHIFT      8
+#define E1000_LEDCTL_LED1_BLINK_RATE      0x00002000
+#define E1000_LEDCTL_LED1_IVRT            0x00004000
+#define E1000_LEDCTL_LED1_BLINK           0x00008000
+#define E1000_LEDCTL_LED2_MODE_MASK       0x000F0000
+#define E1000_LEDCTL_LED2_MODE_SHIFT      16
+#define E1000_LEDCTL_LED2_BLINK_RATE      0x00200000
+#define E1000_LEDCTL_LED2_IVRT            0x00400000
+#define E1000_LEDCTL_LED2_BLINK           0x00800000
+#define E1000_LEDCTL_LED3_MODE_MASK       0x0F000000
+#define E1000_LEDCTL_LED3_MODE_SHIFT      24
+#define E1000_LEDCTL_LED3_BLINK_RATE      0x20000000
+#define E1000_LEDCTL_LED3_IVRT            0x40000000
+#define E1000_LEDCTL_LED3_BLINK           0x80000000
+
+#define E1000_LEDCTL_MODE_LINK_10_1000  0x0
+#define E1000_LEDCTL_MODE_LINK_100_1000 0x1
+#define E1000_LEDCTL_MODE_LINK_UP       0x2
+#define E1000_LEDCTL_MODE_ACTIVITY      0x3
+#define E1000_LEDCTL_MODE_LINK_ACTIVITY 0x4
+#define E1000_LEDCTL_MODE_LINK_10       0x5
+#define E1000_LEDCTL_MODE_LINK_100      0x6
+#define E1000_LEDCTL_MODE_LINK_1000     0x7
+#define E1000_LEDCTL_MODE_PCIX_MODE     0x8
+#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9
+#define E1000_LEDCTL_MODE_COLLISION     0xA
+#define E1000_LEDCTL_MODE_BUS_SPEED     0xB
+#define E1000_LEDCTL_MODE_BUS_SIZE      0xC
+#define E1000_LEDCTL_MODE_PAUSED        0xD
+#define E1000_LEDCTL_MODE_LED_ON        0xE
+#define E1000_LEDCTL_MODE_LED_OFF       0xF
+
+/* Transmit Descriptor bit definitions */
+#define E1000_TXD_DTYP_D     0x00100000 /* Data Descriptor */
+#define E1000_TXD_DTYP_C     0x00000000 /* Context Descriptor */
+#define E1000_TXD_POPTS_SHIFT 8         /* POPTS shift */
+#define E1000_TXD_POPTS_IXSM 0x01       /* Insert IP checksum */
+#define E1000_TXD_POPTS_TXSM 0x02       /* Insert TCP/UDP checksum */
+#define E1000_TXD_CMD_EOP    0x01000000 /* End of Packet */
+#define E1000_TXD_CMD_IFCS   0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_TXD_CMD_IC     0x04000000 /* Insert Checksum */
+#define E1000_TXD_CMD_RS     0x08000000 /* Report Status */
+#define E1000_TXD_CMD_RPS    0x10000000 /* Report Packet Sent */
+#define E1000_TXD_CMD_DEXT   0x20000000 /* Descriptor extension (0 = legacy) */
+#define E1000_TXD_CMD_VLE    0x40000000 /* Add VLAN tag */
+#define E1000_TXD_CMD_IDE    0x80000000 /* Enable Tidv register */
+#define E1000_TXD_STAT_DD    0x00000001 /* Descriptor Done */
+#define E1000_TXD_STAT_EC    0x00000002 /* Excess Collisions */
+#define E1000_TXD_STAT_LC    0x00000004 /* Late Collisions */
+#define E1000_TXD_STAT_TU    0x00000008 /* Transmit underrun */
+#define E1000_TXD_CMD_TCP    0x01000000 /* TCP packet */
+#define E1000_TXD_CMD_IP     0x02000000 /* IP packet */
+#define E1000_TXD_CMD_TSE    0x04000000 /* TCP Seg enable */
+#define E1000_TXD_STAT_TC    0x00000004 /* Tx Underrun */
+/* Extended desc bits for Linksec and timesync */
+#define E1000_TXD_CMD_LINKSEC     0x10000000 /* Apply LinkSec on packet */
+#define E1000_TXD_EXTCMD_TSTAMP   0x00000010 /* IEEE1588 Timestamp packet */
+
+/* Transmit Control */
+#define E1000_TCTL_RST    0x00000001    /* software reset */
+#define E1000_TCTL_EN     0x00000002    /* enable tx */
+#define E1000_TCTL_BCE    0x00000004    /* busy check enable */
+#define E1000_TCTL_PSP    0x00000008    /* pad short packets */
+#define E1000_TCTL_CT     0x00000ff0    /* collision threshold */
+#define E1000_TCTL_COLD   0x003ff000    /* collision distance */
+#define E1000_TCTL_SWXOFF 0x00400000    /* SW Xoff transmission */
+#define E1000_TCTL_PBE    0x00800000    /* Packet Burst Enable */
+#define E1000_TCTL_RTLC   0x01000000    /* Re-transmit on late collision */
+#define E1000_TCTL_NRTU   0x02000000    /* No Re-transmit on underrun */
+#define E1000_TCTL_MULR   0x10000000    /* Multiple request support */
+
+/* Transmit Arbitration Count */
+#define E1000_TARC0_ENABLE     0x00000400   /* Enable Tx Queue 0 */
+
+/* SerDes Control */
+#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
+
+/* Receive Checksum Control */
+#define E1000_RXCSUM_PCSS_MASK 0x000000FF   /* Packet Checksum Start */
+#define E1000_RXCSUM_IPOFL     0x00000100   /* IPv4 checksum offload */
+#define E1000_RXCSUM_TUOFL     0x00000200   /* TCP / UDP checksum offload */
+#define E1000_RXCSUM_IPV6OFL   0x00000400   /* IPv6 checksum offload */
+#define E1000_RXCSUM_CRCOFL    0x00000800   /* CRC32 offload enable */
+#define E1000_RXCSUM_IPPCSE    0x00001000   /* IP payload checksum enable */
+#define E1000_RXCSUM_PCSD      0x00002000   /* packet checksum disabled */
+
+/* Header split receive */
+#define E1000_RFCTL_ISCSI_DIS           0x00000001
+#define E1000_RFCTL_ISCSI_DWC_MASK      0x0000003E
+#define E1000_RFCTL_ISCSI_DWC_SHIFT     1
+#define E1000_RFCTL_NFSW_DIS            0x00000040
+#define E1000_RFCTL_NFSR_DIS            0x00000080
+#define E1000_RFCTL_NFS_VER_MASK        0x00000300
+#define E1000_RFCTL_NFS_VER_SHIFT       8
+#define E1000_RFCTL_IPV6_DIS            0x00000400
+#define E1000_RFCTL_IPV6_XSUM_DIS       0x00000800
+#define E1000_RFCTL_ACK_DIS             0x00001000
+#define E1000_RFCTL_ACKD_DIS            0x00002000
+#define E1000_RFCTL_IPFRSP_DIS          0x00004000
+#define E1000_RFCTL_EXTEN               0x00008000
+#define E1000_RFCTL_IPV6_EX_DIS         0x00010000
+#define E1000_RFCTL_NEW_IPV6_EXT_DIS    0x00020000
+#define E1000_RFCTL_LEF                 0x00040000
+
+/* Collision related configuration parameters */
+#define E1000_COLLISION_THRESHOLD       15
+#define E1000_CT_SHIFT                  4
+#define E1000_COLLISION_DISTANCE        63
+#define E1000_COLD_SHIFT                12
+
+/* Default values for the transmit IPG register */
+#define DEFAULT_82543_TIPG_IPGT_FIBER  9
+#define DEFAULT_82543_TIPG_IPGT_COPPER 8
+
+#define E1000_TIPG_IPGT_MASK  0x000003FF
+#define E1000_TIPG_IPGR1_MASK 0x000FFC00
+#define E1000_TIPG_IPGR2_MASK 0x3FF00000
+
+#define DEFAULT_82543_TIPG_IPGR1 8
+#define E1000_TIPG_IPGR1_SHIFT  10
+
+#define DEFAULT_82543_TIPG_IPGR2 6
+#define DEFAULT_80003ES2LAN_TIPG_IPGR2 7
+#define E1000_TIPG_IPGR2_SHIFT  20
+
+/* Ethertype field values */
+#define ETHERNET_IEEE_VLAN_TYPE 0x8100  /* 802.3ac packet */
+
+#define ETHERNET_FCS_SIZE       4
+#define MAX_JUMBO_FRAME_SIZE    0x3F00
+
+/* Extended Configuration Control and Size */
+#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP      0x00000020
+#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE       0x00000001
+#define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE       0x00000008
+#define E1000_EXTCNF_CTRL_SWFLAG                 0x00000020
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK   0x00FF0000
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT          16
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK   0x0FFF0000
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT          16
+
+#define E1000_PHY_CTRL_SPD_EN             0x00000001
+#define E1000_PHY_CTRL_D0A_LPLU           0x00000002
+#define E1000_PHY_CTRL_NOND0A_LPLU        0x00000004
+#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE 0x00000008
+#define E1000_PHY_CTRL_GBE_DISABLE        0x00000040
+
+#define E1000_KABGTXD_BGSQLBIAS           0x00050000
+
+/* PBA constants */
+#define E1000_PBA_6K  0x0006    /* 6KB */
+#define E1000_PBA_8K  0x0008    /* 8KB */
+#define E1000_PBA_10K 0x000A    /* 10KB */
+#define E1000_PBA_12K 0x000C    /* 12KB */
+#define E1000_PBA_14K 0x000E    /* 14KB */
+#define E1000_PBA_16K 0x0010    /* 16KB */
+#define E1000_PBA_18K 0x0012
+#define E1000_PBA_20K 0x0014
+#define E1000_PBA_22K 0x0016
+#define E1000_PBA_24K 0x0018
+#define E1000_PBA_26K 0x001A
+#define E1000_PBA_30K 0x001E
+#define E1000_PBA_32K 0x0020
+#define E1000_PBA_34K 0x0022
+#define E1000_PBA_35K 0x0023
+#define E1000_PBA_38K 0x0026
+#define E1000_PBA_40K 0x0028
+#define E1000_PBA_48K 0x0030    /* 48KB */
+#define E1000_PBA_64K 0x0040    /* 64KB */
+
+#define E1000_PBS_16K E1000_PBA_16K
+#define E1000_PBS_24K E1000_PBA_24K
+
+#define IFS_MAX       80
+#define IFS_MIN       40
+#define IFS_RATIO     4
+#define IFS_STEP      10
+#define MIN_NUM_XMITS 1000
+
+/* SW Semaphore Register */
+#define E1000_SWSM_SMBI         0x00000001 /* Driver Semaphore bit */
+#define E1000_SWSM_SWESMBI      0x00000002 /* FW Semaphore bit */
+#define E1000_SWSM_WMNG         0x00000004 /* Wake MNG Clock */
+#define E1000_SWSM_DRV_LOAD     0x00000008 /* Driver Loaded Bit */
+
+#define E1000_SWSM2_LOCK        0x00000002 /* Secondary driver semaphore bit */
+
+/* Interrupt Cause Read */
+#define E1000_ICR_TXDW          0x00000001 /* Transmit desc written back */
+#define E1000_ICR_TXQE          0x00000002 /* Transmit Queue empty */
+#define E1000_ICR_LSC           0x00000004 /* Link Status Change */
+#define E1000_ICR_RXSEQ         0x00000008 /* rx sequence error */
+#define E1000_ICR_RXDMT0        0x00000010 /* rx desc min. threshold (0) */
+#define E1000_ICR_RXO           0x00000040 /* rx overrun */
+#define E1000_ICR_RXT0          0x00000080 /* rx timer intr (ring 0) */
+#define E1000_ICR_VMMB          0x00000100 /* VM MB event */
+#define E1000_ICR_MDAC          0x00000200 /* MDIO access complete */
+#define E1000_ICR_RXCFG         0x00000400 /* Rx /c/ ordered set */
+#define E1000_ICR_GPI_EN0       0x00000800 /* GP Int 0 */
+#define E1000_ICR_GPI_EN1       0x00001000 /* GP Int 1 */
+#define E1000_ICR_GPI_EN2       0x00002000 /* GP Int 2 */
+#define E1000_ICR_GPI_EN3       0x00004000 /* GP Int 3 */
+#define E1000_ICR_TXD_LOW       0x00008000
+#define E1000_ICR_SRPD          0x00010000
+#define E1000_ICR_ACK           0x00020000 /* Receive Ack frame */
+#define E1000_ICR_MNG           0x00040000 /* Manageability event */
+#define E1000_ICR_DOCK          0x00080000 /* Dock/Undock */
+#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver
+                                            * should claim the interrupt */
+#define E1000_ICR_RXD_FIFO_PAR0 0x00100000 /* Q0 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR0 0x00200000 /* Q0 Tx desc FIFO parity error */
+#define E1000_ICR_HOST_ARB_PAR 0x00400000 /* host arb read buffer parity err */
+#define E1000_ICR_PB_PAR        0x00800000 /* packet buffer parity error */
+#define E1000_ICR_RXD_FIFO_PAR1 0x01000000 /* Q1 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR1 0x02000000 /* Q1 Tx desc FIFO parity error */
+#define E1000_ICR_ALL_PARITY    0x03F00000 /* all parity error bits */
+#define E1000_ICR_DSW           0x00000020 /* FW changed the status of DISSW
+                                            * bit in the FWSM */
+#define E1000_ICR_PHYINT        0x00001000 /* LAN connected device generates
+                                            * an interrupt */
+#define E1000_ICR_DOUTSYNC      0x10000000 /* NIC DMA out of sync */
+#define E1000_ICR_EPRST         0x00100000 /* ME hardware reset occurs */
+#define E1000_ICR_RXQ0          0x00100000 /* Rx Queue 0 Interrupt */
+#define E1000_ICR_RXQ1          0x00200000 /* Rx Queue 1 Interrupt */
+#define E1000_ICR_TXQ0          0x00400000 /* Tx Queue 0 Interrupt */
+#define E1000_ICR_TXQ1          0x00800000 /* Tx Queue 1 Interrupt */
+#define E1000_ICR_OTHER         0x01000000 /* Other Interrupts */
+
+/* PBA ECC Register */
+#define E1000_PBA_ECC_COUNTER_MASK  0xFFF00000 /* ECC counter mask */
+#define E1000_PBA_ECC_COUNTER_SHIFT 20         /* ECC counter shift value */
+#define E1000_PBA_ECC_CORR_EN      0x00000001 /* Enable ECC error correction */
+#define E1000_PBA_ECC_STAT_CLR      0x00000002 /* Clear ECC error counter */
+#define E1000_PBA_ECC_INT_EN     0x00000004 /* Enable ICR bit 5 on ECC error */
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ */
+#define POLL_IMS_ENABLE_MASK ( \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ)
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXT0   = Receiver Timer Interrupt (ring 0)
+ *   o TXDW   = Transmit Descriptor Written Back
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ *   o LSC    = Link Status Change
+ */
+#define IMS_ENABLE_MASK ( \
+    E1000_IMS_RXT0   |    \
+    E1000_IMS_TXDW   |    \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ  |    \
+    E1000_IMS_LSC)
+
+/* Interrupt Mask Set */
+#define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_IMS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_IMS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_IMS_VMMB      E1000_ICR_VMMB      /* Mail box activity */
+#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_IMS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_IMS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_IMS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_IMS_SRPD      E1000_ICR_SRPD
+#define E1000_IMS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_IMS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_IMS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_IMS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_DSW       E1000_ICR_DSW
+#define E1000_IMS_PHYINT    E1000_ICR_PHYINT
+#define E1000_IMS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_IMS_EPRST     E1000_ICR_EPRST
+#define E1000_IMS_RXQ0          E1000_ICR_RXQ0 /* Rx Queue 0 Interrupt */
+#define E1000_IMS_RXQ1          E1000_ICR_RXQ1 /* Rx Queue 1 Interrupt */
+#define E1000_IMS_TXQ0          E1000_ICR_TXQ0 /* Tx Queue 0 Interrupt */
+#define E1000_IMS_TXQ1          E1000_ICR_TXQ1 /* Tx Queue 1 Interrupt */
+#define E1000_IMS_OTHER         E1000_ICR_OTHER /* Other Interrupts */
+
+/* Interrupt Cause Set */
+#define E1000_ICS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_ICS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_ICS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_ICS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_ICS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_ICS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_ICS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_ICS_SRPD      E1000_ICR_SRPD
+#define E1000_ICS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_ICS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_ICS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_ICS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_DSW       E1000_ICR_DSW
+#define E1000_ICS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_ICS_PHYINT    E1000_ICR_PHYINT
+#define E1000_ICS_EPRST     E1000_ICR_EPRST
+
+/* Transmit Descriptor Control */
+#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */
+#define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */
+#define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */
+#define E1000_TXDCTL_GRAN    0x01000000 /* TXDCTL Granularity */
+#define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */
+#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
+#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */
+/* Enable the counting of descriptors still to be processed. */
+#define E1000_TXDCTL_COUNT_DESC 0x00400000
+
+/* Flow Control Constants */
+#define FLOW_CONTROL_ADDRESS_LOW  0x00C28001
+#define FLOW_CONTROL_ADDRESS_HIGH 0x00000100
+#define FLOW_CONTROL_TYPE         0x8808
+
+/* 802.1q VLAN Packet Size */
+#define VLAN_TAG_SIZE              4    /* 802.3ac tag (not DMA'd) */
+#define E1000_VLAN_FILTER_TBL_SIZE 128  /* VLAN Filter Table (4096 bits) */
+
+/* Receive Address */
+/*
+ * Number of high/low register pairs in the RAR. The RAR (Receive Address
+ * Registers) holds the directed and multicast addresses that we monitor.
+ * Technically, we have 16 spots.  However, we reserve one of these spots
+ * (RAR[15]) for our directed address used by controllers with
+ * manageability enabled, allowing us room for 15 multicast addresses.
+ */
+#define E1000_RAR_ENTRIES     15
+#define E1000_RAH_AV  0x80000000        /* Receive descriptor valid */
+#define E1000_RAL_MAC_ADDR_LEN 4
+#define E1000_RAH_MAC_ADDR_LEN 2
+#define E1000_RAH_POOL_MASK 0x03FC0000
+#define E1000_RAH_POOL_1 0x00040000
+
+/* Error Codes */
+#define E1000_SUCCESS      0
+#define E1000_ERR_NVM      1
+#define E1000_ERR_PHY      2
+#define E1000_ERR_CONFIG   3
+#define E1000_ERR_PARAM    4
+#define E1000_ERR_MAC_INIT 5
+#define E1000_ERR_PHY_TYPE 6
+#define E1000_ERR_RESET   9
+#define E1000_ERR_MASTER_REQUESTS_PENDING 10
+#define E1000_ERR_HOST_INTERFACE_COMMAND 11
+#define E1000_BLK_PHY_RESET   12
+#define E1000_ERR_SWFW_SYNC 13
+#define E1000_NOT_IMPLEMENTED 14
+#define E1000_ERR_MBX      15
+
+/* Loop limit on how long we wait for auto-negotiation to complete */
+#define FIBER_LINK_UP_LIMIT               50
+#define COPPER_LINK_UP_LIMIT              10
+#define PHY_AUTO_NEG_LIMIT                45
+#define PHY_FORCE_LIMIT                   20
+/* Number of 100 microseconds we wait for PCI Express master disable */
+#define MASTER_DISABLE_TIMEOUT      800
+/* Number of milliseconds we wait for PHY configuration done after MAC reset */
+#define PHY_CFG_TIMEOUT             100
+/* Number of 2 milliseconds we wait for acquiring MDIO ownership. */
+#define MDIO_OWNERSHIP_TIMEOUT      10
+/* Number of milliseconds for NVM auto read done after MAC reset. */
+#define AUTO_READ_DONE_TIMEOUT      10
+
+/* Flow Control */
+#define E1000_FCRTH_RTH  0x0000FFF8     /* Mask Bits[15:3] for RTH */
+#define E1000_FCRTH_XFCE 0x80000000     /* External Flow Control Enable */
+#define E1000_FCRTL_RTL  0x0000FFF8     /* Mask Bits[15:3] for RTL */
+#define E1000_FCRTL_XONE 0x80000000     /* Enable XON frame transmission */
+
+/* Transmit Configuration Word */
+#define E1000_TXCW_FD         0x00000020        /* TXCW full duplex */
+#define E1000_TXCW_HD         0x00000040        /* TXCW half duplex */
+#define E1000_TXCW_PAUSE      0x00000080        /* TXCW sym pause request */
+#define E1000_TXCW_ASM_DIR    0x00000100        /* TXCW astm pause direction */
+#define E1000_TXCW_PAUSE_MASK 0x00000180        /* TXCW pause request mask */
+#define E1000_TXCW_RF         0x00003000        /* TXCW remote fault */
+#define E1000_TXCW_NP         0x00008000        /* TXCW next page */
+#define E1000_TXCW_CW         0x0000ffff        /* TxConfigWord mask */
+#define E1000_TXCW_TXC        0x40000000        /* Transmit Config control */
+#define E1000_TXCW_ANE        0x80000000        /* Auto-neg enable */
+
+/* Receive Configuration Word */
+#define E1000_RXCW_CW         0x0000ffff        /* RxConfigWord mask */
+#define E1000_RXCW_NC         0x04000000        /* Receive config no carrier */
+#define E1000_RXCW_IV         0x08000000        /* Receive config invalid */
+#define E1000_RXCW_CC         0x10000000        /* Receive config change */
+#define E1000_RXCW_C          0x20000000        /* Receive config */
+#define E1000_RXCW_SYNCH      0x40000000        /* Receive config synch */
+#define E1000_RXCW_ANC        0x80000000        /* Auto-neg complete */
+
+
+/* PCI Express Control */
+#define E1000_GCR_RXD_NO_SNOOP          0x00000001
+#define E1000_GCR_RXDSCW_NO_SNOOP       0x00000002
+#define E1000_GCR_RXDSCR_NO_SNOOP       0x00000004
+#define E1000_GCR_TXD_NO_SNOOP          0x00000008
+#define E1000_GCR_TXDSCW_NO_SNOOP       0x00000010
+#define E1000_GCR_TXDSCR_NO_SNOOP       0x00000020
+#define E1000_GCR_CMPL_TMOUT_MASK       0x0000F000
+#define E1000_GCR_CMPL_TMOUT_10ms       0x00001000
+#define E1000_GCR_CMPL_TMOUT_RESEND     0x00010000
+#define E1000_GCR_CAP_VER2              0x00040000
+
+#define PCIE_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP         | \
+                           E1000_GCR_RXDSCW_NO_SNOOP      | \
+                           E1000_GCR_RXDSCR_NO_SNOOP      | \
+                           E1000_GCR_TXD_NO_SNOOP         | \
+                           E1000_GCR_TXDSCW_NO_SNOOP      | \
+                           E1000_GCR_TXDSCR_NO_SNOOP)
+
+/* PHY Control Register */
+#define MII_CR_SPEED_SELECT_MSB 0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_COLL_TEST_ENABLE 0x0080  /* Collision test enable */
+#define MII_CR_FULL_DUPLEX      0x0100  /* FDX =1, half duplex =0 */
+#define MII_CR_RESTART_AUTO_NEG 0x0200  /* Restart auto negotiation */
+#define MII_CR_ISOLATE          0x0400  /* Isolate PHY from MII */
+#define MII_CR_POWER_DOWN       0x0800  /* Power down */
+#define MII_CR_AUTO_NEG_EN      0x1000  /* Auto Neg Enable */
+#define MII_CR_SPEED_SELECT_LSB 0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_LOOPBACK         0x4000  /* 0 = normal, 1 = loopback */
+#define MII_CR_RESET            0x8000  /* 0 = normal, 1 = PHY reset */
+#define MII_CR_SPEED_1000       0x0040
+#define MII_CR_SPEED_100        0x2000
+#define MII_CR_SPEED_10         0x0000
+
+/* PHY Status Register */
+#define MII_SR_EXTENDED_CAPS     0x0001 /* Extended register capabilities */
+#define MII_SR_JABBER_DETECT     0x0002 /* Jabber Detected */
+#define MII_SR_LINK_STATUS       0x0004 /* Link Status 1 = link */
+#define MII_SR_AUTONEG_CAPS      0x0008 /* Auto Neg Capable */
+#define MII_SR_REMOTE_FAULT      0x0010 /* Remote Fault Detect */
+#define MII_SR_AUTONEG_COMPLETE  0x0020 /* Auto Neg Complete */
+#define MII_SR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
+#define MII_SR_EXTENDED_STATUS   0x0100 /* Ext. status info in Reg 0x0F */
+#define MII_SR_100T2_HD_CAPS     0x0200 /* 100T2 Half Duplex Capable */
+#define MII_SR_100T2_FD_CAPS     0x0400 /* 100T2 Full Duplex Capable */
+#define MII_SR_10T_HD_CAPS       0x0800 /* 10T   Half Duplex Capable */
+#define MII_SR_10T_FD_CAPS       0x1000 /* 10T   Full Duplex Capable */
+#define MII_SR_100X_HD_CAPS      0x2000 /* 100X  Half Duplex Capable */
+#define MII_SR_100X_FD_CAPS      0x4000 /* 100X  Full Duplex Capable */
+#define MII_SR_100T4_CAPS        0x8000 /* 100T4 Capable */
+
+/* Autoneg Advertisement Register */
+#define NWAY_AR_SELECTOR_FIELD   0x0001   /* indicates IEEE 802.3 CSMA/CD */
+#define NWAY_AR_10T_HD_CAPS      0x0020   /* 10T   Half Duplex Capable */
+#define NWAY_AR_10T_FD_CAPS      0x0040   /* 10T   Full Duplex Capable */
+#define NWAY_AR_100TX_HD_CAPS    0x0080   /* 100TX Half Duplex Capable */
+#define NWAY_AR_100TX_FD_CAPS    0x0100   /* 100TX Full Duplex Capable */
+#define NWAY_AR_100T4_CAPS       0x0200   /* 100T4 Capable */
+#define NWAY_AR_PAUSE            0x0400   /* Pause operation desired */
+#define NWAY_AR_ASM_DIR          0x0800   /* Asymmetric Pause Direction bit */
+#define NWAY_AR_REMOTE_FAULT     0x2000   /* Remote Fault detected */
+#define NWAY_AR_NEXT_PAGE        0x8000   /* Next Page ability supported */
+
+/* Link Partner Ability Register (Base Page) */
+#define NWAY_LPAR_SELECTOR_FIELD 0x0000 /* LP protocol selector field */
+#define NWAY_LPAR_10T_HD_CAPS    0x0020 /* LP is 10T   Half Duplex Capable */
+#define NWAY_LPAR_10T_FD_CAPS    0x0040 /* LP is 10T   Full Duplex Capable */
+#define NWAY_LPAR_100TX_HD_CAPS  0x0080 /* LP is 100TX Half Duplex Capable */
+#define NWAY_LPAR_100TX_FD_CAPS  0x0100 /* LP is 100TX Full Duplex Capable */
+#define NWAY_LPAR_100T4_CAPS     0x0200 /* LP is 100T4 Capable */
+#define NWAY_LPAR_PAUSE          0x0400 /* LP Pause operation desired */
+#define NWAY_LPAR_ASM_DIR        0x0800 /* LP Asymmetric Pause Direction bit */
+#define NWAY_LPAR_REMOTE_FAULT   0x2000 /* LP has detected Remote Fault */
+#define NWAY_LPAR_ACKNOWLEDGE    0x4000 /* LP has rx'd link code word */
+#define NWAY_LPAR_NEXT_PAGE      0x8000 /* Next Page ability supported */
+
+/* Autoneg Expansion Register */
+#define NWAY_ER_LP_NWAY_CAPS      0x0001 /* LP has Auto Neg Capability */
+#define NWAY_ER_PAGE_RXD          0x0002 /* LP is 10T   Half Duplex Capable */
+#define NWAY_ER_NEXT_PAGE_CAPS    0x0004 /* LP is 10T   Full Duplex Capable */
+#define NWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 /* LP is 100TX Half Duplex Capable */
+#define NWAY_ER_PAR_DETECT_FAULT  0x0010 /* LP is 100TX Full Duplex Capable */
+
+/* 1000BASE-T Control Register */
+#define CR_1000T_ASYM_PAUSE      0x0080 /* Advertise asymmetric pause bit */
+#define CR_1000T_HD_CAPS         0x0100 /* Advertise 1000T HD capability */
+#define CR_1000T_FD_CAPS         0x0200 /* Advertise 1000T FD capability  */
+#define CR_1000T_REPEATER_DTE    0x0400 /* 1=Repeater/switch device port */
+                                        /* 0=DTE device */
+#define CR_1000T_MS_VALUE        0x0800 /* 1=Configure PHY as Master */
+                                        /* 0=Configure PHY as Slave */
+#define CR_1000T_MS_ENABLE      0x1000 /* 1=Master/Slave manual config value */
+                                        /* 0=Automatic Master/Slave config */
+#define CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
+#define CR_1000T_TEST_MODE_1     0x2000 /* Transmit Waveform test */
+#define CR_1000T_TEST_MODE_2     0x4000 /* Master Transmit Jitter test */
+#define CR_1000T_TEST_MODE_3     0x6000 /* Slave Transmit Jitter test */
+#define CR_1000T_TEST_MODE_4     0x8000 /* Transmitter Distortion test */
+
+/* 1000BASE-T Status Register */
+#define SR_1000T_IDLE_ERROR_CNT   0x00FF /* Num idle errors since last read */
+#define SR_1000T_ASYM_PAUSE_DIR  0x0100 /* LP asymmetric pause direction bit */
+#define SR_1000T_LP_HD_CAPS       0x0400 /* LP is 1000T HD capable */
+#define SR_1000T_LP_FD_CAPS       0x0800 /* LP is 1000T FD capable */
+#define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
+#define SR_1000T_LOCAL_RX_STATUS  0x2000 /* Local receiver OK */
+#define SR_1000T_MS_CONFIG_RES    0x4000 /* 1=Local Tx is Master, 0=Slave */
+#define SR_1000T_MS_CONFIG_FAULT  0x8000 /* Master/Slave config fault */
+
+#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT 5
+
+/* PHY 1000 MII Register/Bit Definitions */
+/* PHY Registers defined by IEEE */
+#define PHY_CONTROL      0x00 /* Control Register */
+#define PHY_STATUS       0x01 /* Status Register */
+#define PHY_ID1          0x02 /* Phy Id Reg (word 1) */
+#define PHY_ID2          0x03 /* Phy Id Reg (word 2) */
+#define PHY_AUTONEG_ADV  0x04 /* Autoneg Advertisement */
+#define PHY_LP_ABILITY   0x05 /* Link Partner Ability (Base Page) */
+#define PHY_AUTONEG_EXP  0x06 /* Autoneg Expansion Reg */
+#define PHY_NEXT_PAGE_TX 0x07 /* Next Page Tx */
+#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */
+#define PHY_1000T_CTRL   0x09 /* 1000Base-T Control Reg */
+#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
+#define PHY_EXT_STATUS   0x0F /* Extended Status Reg */
+
+#define PHY_CONTROL_LB   0x4000 /* PHY Loopback bit */
+
+/* NVM Control */
+#define E1000_EECD_SK        0x00000001 /* NVM Clock */
+#define E1000_EECD_CS        0x00000002 /* NVM Chip Select */
+#define E1000_EECD_DI        0x00000004 /* NVM Data In */
+#define E1000_EECD_DO        0x00000008 /* NVM Data Out */
+#define E1000_EECD_FWE_MASK  0x00000030
+#define E1000_EECD_FWE_DIS   0x00000010 /* Disable FLASH writes */
+#define E1000_EECD_FWE_EN    0x00000020 /* Enable FLASH writes */
+#define E1000_EECD_FWE_SHIFT 4
+#define E1000_EECD_REQ       0x00000040 /* NVM Access Request */
+#define E1000_EECD_GNT       0x00000080 /* NVM Access Grant */
+#define E1000_EECD_PRES      0x00000100 /* NVM Present */
+#define E1000_EECD_SIZE      0x00000200 /* NVM Size (0=64 word 1=256 word) */
+/* NVM Addressing bits based on type 0=small, 1=large */
+#define E1000_EECD_ADDR_BITS 0x00000400
+#define E1000_EECD_TYPE      0x00002000 /* NVM Type (1-SPI, 0-Microwire) */
+#define E1000_NVM_GRANT_ATTEMPTS   1000 /* NVM # attempts to gain grant */
+#define E1000_EECD_AUTO_RD          0x00000200  /* NVM Auto Read done */
+#define E1000_EECD_SIZE_EX_MASK     0x00007800  /* NVM Size */
+#define E1000_EECD_SIZE_EX_SHIFT     11
+#define E1000_EECD_NVADDS    0x00018000 /* NVM Address Size */
+#define E1000_EECD_SELSHAD   0x00020000 /* Select Shadow RAM */
+#define E1000_EECD_INITSRAM  0x00040000 /* Initialize Shadow RAM */
+#define E1000_EECD_FLUPD     0x00080000 /* Update FLASH */
+#define E1000_EECD_AUPDEN    0x00100000 /* Enable Autonomous FLASH update */
+#define E1000_EECD_SHADV     0x00200000 /* Shadow RAM Data Valid */
+#define E1000_EECD_SEC1VAL   0x00400000 /* Sector One Valid */
+#define E1000_EECD_SECVAL_SHIFT      22
+#define E1000_EECD_SEC1VAL_VALID_MASK (E1000_EECD_AUTO_RD | E1000_EECD_PRES)
+
+#define E1000_NVM_SWDPIN0   0x0001   /* SWDPIN 0 NVM Value */
+#define E1000_NVM_LED_LOGIC 0x0020   /* Led Logic Word */
+#define E1000_NVM_RW_REG_DATA   16  /* Offset to data in NVM read/write regs */
+#define E1000_NVM_RW_REG_DONE   2    /* Offset to READ/WRITE done bit */
+#define E1000_NVM_RW_REG_START  1    /* Start operation */
+#define E1000_NVM_RW_ADDR_SHIFT 2    /* Shift to the address bits */
+#define E1000_NVM_POLL_WRITE    1    /* Flag for polling for write complete */
+#define E1000_NVM_POLL_READ     0    /* Flag for polling for read complete */
+#define E1000_FLASH_UPDATES  2000
+
+/* NVM Word Offsets */
+#define NVM_COMPAT                 0x0003
+#define NVM_ID_LED_SETTINGS        0x0004
+#define NVM_VERSION                0x0005
+#define NVM_SERDES_AMPLITUDE       0x0006 /* SERDES output amplitude */
+#define NVM_PHY_CLASS_WORD         0x0007
+#define NVM_INIT_CONTROL1_REG      0x000A
+#define NVM_INIT_CONTROL2_REG      0x000F
+#define NVM_SWDEF_PINS_CTRL_PORT_1 0x0010
+#define NVM_INIT_CONTROL3_PORT_B   0x0014
+#define NVM_INIT_3GIO_3            0x001A
+#define NVM_SWDEF_PINS_CTRL_PORT_0 0x0020
+#define NVM_INIT_CONTROL3_PORT_A   0x0024
+#define NVM_CFG                    0x0012
+#define NVM_FLASH_VERSION          0x0032
+#define NVM_ALT_MAC_ADDR_PTR       0x0037
+#define NVM_CHECKSUM_REG           0x003F
+
+#define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */
+#define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */
+
+/* Mask bits for fields in Word 0x0f of the NVM */
+#define NVM_WORD0F_PAUSE_MASK       0x3000
+#define NVM_WORD0F_PAUSE            0x1000
+#define NVM_WORD0F_ASM_DIR          0x2000
+#define NVM_WORD0F_ANE              0x0800
+#define NVM_WORD0F_SWPDIO_EXT_MASK  0x00F0
+#define NVM_WORD0F_LPLU             0x0001
+
+/* Mask bits for fields in Word 0x1a of the NVM */
+#define NVM_WORD1A_ASPM_MASK  0x000C
+
+/* For checksumming, the sum of all words in the NVM should equal 0xBABA. */
+#define NVM_SUM                    0xBABA
+
+#define NVM_MAC_ADDR_OFFSET        0
+#define NVM_PBA_OFFSET_0           8
+#define NVM_PBA_OFFSET_1           9
+#define NVM_RESERVED_WORD          0xFFFF
+#define NVM_PHY_CLASS_A            0x8000
+#define NVM_SERDES_AMPLITUDE_MASK  0x000F
+#define NVM_SIZE_MASK              0x1C00
+#define NVM_SIZE_SHIFT             10
+#define NVM_WORD_SIZE_BASE_SHIFT   6
+#define NVM_SWDPIO_EXT_SHIFT       4
+
+/* NVM Commands - SPI */
+#define NVM_MAX_RETRY_SPI          5000 /* Max wait of 5ms, for RDY signal */
+#define NVM_READ_OPCODE_SPI        0x03 /* NVM read opcode */
+#define NVM_WRITE_OPCODE_SPI       0x02 /* NVM write opcode */
+#define NVM_A8_OPCODE_SPI          0x08 /* opcode bit-3 = address bit-8 */
+#define NVM_WREN_OPCODE_SPI        0x06 /* NVM set Write Enable latch */
+#define NVM_WRDI_OPCODE_SPI        0x04 /* NVM reset Write Enable latch */
+#define NVM_RDSR_OPCODE_SPI        0x05 /* NVM read Status register */
+#define NVM_WRSR_OPCODE_SPI        0x01 /* NVM write Status register */
+
+/* SPI NVM Status Register */
+#define NVM_STATUS_RDY_SPI         0x01
+#define NVM_STATUS_WEN_SPI         0x02
+#define NVM_STATUS_BP0_SPI         0x04
+#define NVM_STATUS_BP1_SPI         0x08
+#define NVM_STATUS_WPEN_SPI        0x80
+
+/* Word definitions for ID LED Settings */
+#define ID_LED_RESERVED_0000 0x0000
+#define ID_LED_RESERVED_FFFF 0xFFFF
+#define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2  << 12) | \
+                              (ID_LED_OFF1_OFF2 <<  8) | \
+                              (ID_LED_DEF1_DEF2 <<  4) | \
+                              (ID_LED_DEF1_DEF2))
+#define ID_LED_DEF1_DEF2     0x1
+#define ID_LED_DEF1_ON2      0x2
+#define ID_LED_DEF1_OFF2     0x3
+#define ID_LED_ON1_DEF2      0x4
+#define ID_LED_ON1_ON2       0x5
+#define ID_LED_ON1_OFF2      0x6
+#define ID_LED_OFF1_DEF2     0x7
+#define ID_LED_OFF1_ON2      0x8
+#define ID_LED_OFF1_OFF2     0x9
+
+#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF
+#define IGP_ACTIVITY_LED_ENABLE 0x0300
+#define IGP_LED3_MODE           0x07000000
+
+/* PCI/PCI-X/PCI-EX Config space */
+#define PCI_HEADER_TYPE_REGISTER     0x0E
+#define PCIE_LINK_STATUS             0x12
+#define PCIE_DEVICE_CONTROL2         0x28
+
+#define PCI_HEADER_TYPE_MULTIFUNC    0x80
+#define PCIE_LINK_WIDTH_MASK         0x3F0
+#define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_DEVICE_CONTROL2_16ms    0x0005
+
+#ifndef ETH_ADDR_LEN
+#define ETH_ADDR_LEN                 6
+#endif
+
+#define PHY_REVISION_MASK      0xFFFFFFF0
+#define MAX_PHY_REG_ADDRESS    0x1F  /* 5 bit address bus (0-0x1F) */
+#define MAX_PHY_MULTI_PAGE_REG 0xF
+
+/* Bit definitions for valid PHY IDs. */
+/*
+ * I = Integrated
+ * E = External
+ */
+#define M88E1000_E_PHY_ID    0x01410C50
+#define M88E1000_I_PHY_ID    0x01410C30
+#define M88E1011_I_PHY_ID    0x01410C20
+#define IGP01E1000_I_PHY_ID  0x02A80380
+#define M88E1011_I_REV_4     0x04
+#define M88E1111_I_PHY_ID    0x01410CC0
+#define GG82563_E_PHY_ID     0x01410CA0
+#define IGP03E1000_E_PHY_ID  0x02A80390
+#define IFE_E_PHY_ID         0x02A80330
+#define IFE_PLUS_E_PHY_ID    0x02A80320
+#define IFE_C_E_PHY_ID       0x02A80310
+#define BME1000_E_PHY_ID     0x01410CB0
+#define BME1000_E_PHY_ID_R2  0x01410CB1
+#define I82577_E_PHY_ID 0x01540050
+#define I82578_E_PHY_ID 0x004DD040
+#define M88_VENDOR           0x0141
+
+/* M88E1000 Specific Registers */
+#define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */
+#define M88E1000_PHY_SPEC_STATUS   0x11  /* PHY Specific Status Register */
+#define M88E1000_INT_ENABLE        0x12  /* Interrupt Enable Register */
+#define M88E1000_INT_STATUS        0x13  /* Interrupt Status Register */
+#define M88E1000_EXT_PHY_SPEC_CTRL 0x14  /* Extended PHY Specific Control */
+#define M88E1000_RX_ERR_CNTR       0x15  /* Receive Error Counter */
+
+#define M88E1000_PHY_EXT_CTRL      0x1A  /* PHY extend control register */
+#define M88E1000_PHY_PAGE_SELECT   0x1D  /* Reg 29 for page number setting */
+#define M88E1000_PHY_GEN_CONTROL   0x1E  /* Its meaning depends on reg 29 */
+#define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
+#define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
+
+/* M88E1000 PHY Specific Control Register */
+#define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
+#define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reverse enabled */
+#define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */
+/* 1=CLK125 low, 0=CLK125 toggling */
+#define M88E1000_PSCR_CLK125_DISABLE    0x0010
+#define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000 /* MDI Crossover Mode bits 6:5 */
+                                               /* Manual MDI configuration */
+#define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
+/* 1000BASE-T: Auto crossover, 100BASE-TX/10BASE-T: MDI Mode */
+#define M88E1000_PSCR_AUTO_X_1000T     0x0040
+/* Auto crossover enabled all speeds */
+#define M88E1000_PSCR_AUTO_X_MODE      0x0060
+/*
+ * 1=Enable Extended 10BASE-T distance (Lower 10BASE-T Rx Threshold
+ * 0=Normal 10BASE-T Rx Threshold
+ */
+#define M88E1000_PSCR_EN_10BT_EXT_DIST 0x0080
+/* 1=5-bit interface in 100BASE-TX, 0=MII interface in 100BASE-TX */
+#define M88E1000_PSCR_MII_5BIT_ENABLE      0x0100
+#define M88E1000_PSCR_SCRAMBLER_DISABLE    0x0200 /* 1=Scrambler disable */
+#define M88E1000_PSCR_FORCE_LINK_GOOD      0x0400 /* 1=Force link good */
+#define M88E1000_PSCR_ASSERT_CRS_ON_TX     0x0800 /* 1=Assert CRS on Tx */
+
+/* M88E1000 PHY Specific Status Register */
+#define M88E1000_PSSR_JABBER             0x0001 /* 1=Jabber */
+#define M88E1000_PSSR_REV_POLARITY       0x0002 /* 1=Polarity reversed */
+#define M88E1000_PSSR_DOWNSHIFT          0x0020 /* 1=Downshifted */
+#define M88E1000_PSSR_MDIX               0x0040 /* 1=MDIX; 0=MDI */
+/*
+ * 0 = <50M
+ * 1 = 50-80M
+ * 2 = 80-110M
+ * 3 = 110-140M
+ * 4 = >140M
+ */
+#define M88E1000_PSSR_CABLE_LENGTH       0x0380
+#define M88E1000_PSSR_LINK               0x0400 /* 1=Link up, 0=Link down */
+#define M88E1000_PSSR_SPD_DPLX_RESOLVED  0x0800 /* 1=Speed & Duplex resolved */
+#define M88E1000_PSSR_PAGE_RCVD          0x1000 /* 1=Page received */
+#define M88E1000_PSSR_DPLX               0x2000 /* 1=Duplex 0=Half Duplex */
+#define M88E1000_PSSR_SPEED              0xC000 /* Speed, bits 14:15 */
+#define M88E1000_PSSR_10MBS              0x0000 /* 00=10Mbs */
+#define M88E1000_PSSR_100MBS             0x4000 /* 01=100Mbs */
+#define M88E1000_PSSR_1000MBS            0x8000 /* 10=1000Mbs */
+
+#define M88E1000_PSSR_CABLE_LENGTH_SHIFT 7
+
+/* M88E1000 Extended PHY Specific Control Register */
+#define M88E1000_EPSCR_FIBER_LOOPBACK 0x4000 /* 1=Fiber loopback */
+/*
+ * 1 = Lost lock detect enabled.
+ * Will assert lost lock and bring
+ * link down if idle not seen
+ * within 1ms in 1000BASE-T
+ */
+#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the master
+ */
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK 0x0C00
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the slave
+ */
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK  0x0300
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X    0x0100
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X    0x0200
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X    0x0300
+#define M88E1000_EPSCR_TX_CLK_2_5     0x0060 /* 2.5 MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
+
+/* M88EC018 Rev 2 specific DownShift settings */
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
+
+#define I82578_EPSCR_DOWNSHIFT_ENABLE          0x0020
+#define I82578_EPSCR_DOWNSHIFT_COUNTER_MASK    0x001C
+
+/* BME1000 PHY Specific Control Register */
+#define BME1000_PSCR_ENABLE_DOWNSHIFT   0x0800 /* 1 = enable downshift */
+
+/*
+ * Bits...
+ * 15-5: page
+ * 4-0: register offset
+ */
+#define GG82563_PAGE_SHIFT        5
+#define GG82563_REG(page, reg)    \
+        (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
+#define GG82563_MIN_ALT_REG       30
+
+/* GG82563 Specific Registers */
+#define GG82563_PHY_SPEC_CTRL           \
+        GG82563_REG(0, 16) /* PHY Specific Control */
+#define GG82563_PHY_SPEC_STATUS         \
+        GG82563_REG(0, 17) /* PHY Specific Status */
+#define GG82563_PHY_INT_ENABLE          \
+        GG82563_REG(0, 18) /* Interrupt Enable */
+#define GG82563_PHY_SPEC_STATUS_2       \
+        GG82563_REG(0, 19) /* PHY Specific Status 2 */
+#define GG82563_PHY_RX_ERR_CNTR         \
+        GG82563_REG(0, 21) /* Receive Error Counter */
+#define GG82563_PHY_PAGE_SELECT         \
+        GG82563_REG(0, 22) /* Page Select */
+#define GG82563_PHY_SPEC_CTRL_2         \
+        GG82563_REG(0, 26) /* PHY Specific Control 2 */
+#define GG82563_PHY_PAGE_SELECT_ALT     \
+        GG82563_REG(0, 29) /* Alternate Page Select */
+#define GG82563_PHY_TEST_CLK_CTRL       \
+        GG82563_REG(0, 30) /* Test Clock Control (use reg. 29 to select) */
+
+#define GG82563_PHY_MAC_SPEC_CTRL       \
+        GG82563_REG(2, 21) /* MAC Specific Control Register */
+#define GG82563_PHY_MAC_SPEC_CTRL_2     \
+        GG82563_REG(2, 26) /* MAC Specific Control 2 */
+
+#define GG82563_PHY_DSP_DISTANCE    \
+        GG82563_REG(5, 26) /* DSP Distance */
+
+/* Page 193 - Port Control Registers */
+#define GG82563_PHY_KMRN_MODE_CTRL   \
+        GG82563_REG(193, 16) /* Kumeran Mode Control */
+#define GG82563_PHY_PORT_RESET          \
+        GG82563_REG(193, 17) /* Port Reset */
+#define GG82563_PHY_REVISION_ID         \
+        GG82563_REG(193, 18) /* Revision ID */
+#define GG82563_PHY_DEVICE_ID           \
+        GG82563_REG(193, 19) /* Device ID */
+#define GG82563_PHY_PWR_MGMT_CTRL       \
+        GG82563_REG(193, 20) /* Power Management Control */
+#define GG82563_PHY_RATE_ADAPT_CTRL     \
+        GG82563_REG(193, 25) /* Rate Adaptation Control */
+
+/* Page 194 - KMRN Registers */
+#define GG82563_PHY_KMRN_FIFO_CTRL_STAT \
+        GG82563_REG(194, 16) /* FIFO's Control/Status */
+#define GG82563_PHY_KMRN_CTRL           \
+        GG82563_REG(194, 17) /* Control */
+#define GG82563_PHY_INBAND_CTRL         \
+        GG82563_REG(194, 18) /* Inband Control */
+#define GG82563_PHY_KMRN_DIAGNOSTIC     \
+        GG82563_REG(194, 19) /* Diagnostic */
+#define GG82563_PHY_ACK_TIMEOUTS        \
+        GG82563_REG(194, 20) /* Acknowledge Timeouts */
+#define GG82563_PHY_ADV_ABILITY         \
+        GG82563_REG(194, 21) /* Advertised Ability */
+#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY \
+        GG82563_REG(194, 23) /* Link Partner Advertised Ability */
+#define GG82563_PHY_ADV_NEXT_PAGE       \
+        GG82563_REG(194, 24) /* Advertised Next Page */
+#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE \
+        GG82563_REG(194, 25) /* Link Partner Advertised Next page */
+#define GG82563_PHY_KMRN_MISC           \
+        GG82563_REG(194, 26) /* Misc. */
+
+/* MDI Control */
+#define E1000_MDIC_DATA_MASK 0x0000FFFF
+#define E1000_MDIC_REG_MASK  0x001F0000
+#define E1000_MDIC_REG_SHIFT 16
+#define E1000_MDIC_PHY_MASK  0x03E00000
+#define E1000_MDIC_PHY_SHIFT 21
+#define E1000_MDIC_OP_WRITE  0x04000000
+#define E1000_MDIC_OP_READ   0x08000000
+#define E1000_MDIC_READY     0x10000000
+#define E1000_MDIC_INT_EN    0x20000000
+#define E1000_MDIC_ERROR     0x40000000
+
+/* SerDes Control */
+#define E1000_GEN_CTL_READY             0x80000000
+#define E1000_GEN_CTL_ADDRESS_SHIFT     8
+#define E1000_GEN_POLL_TIMEOUT          640
+
+
+
+#endif /* _E1000E_DEFINES_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,532 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/* Linux PRO/1000 Ethernet Driver main header file */
+
+#ifndef _E1000E_H_
+#define _E1000E_H_
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <ipxe/io.h>
+#include <errno.h>
+#include <byteswap.h>
+#include <ipxe/pci.h>
+#include <ipxe/malloc.h>
+#include <ipxe/if_ether.h>
+#include <ipxe/ethernet.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/netdevice.h>
+
+/* Begin OS Dependencies */
+
+#define u8         unsigned char
+#define bool       boolean_t
+#define dma_addr_t unsigned long
+#define __le16     uint16_t
+#define __le32     uint32_t
+#define __le64     uint64_t
+
+#define __iomem
+
+#define msleep(x) mdelay(x)
+
+#define ETH_FCS_LEN 4
+
+typedef int spinlock_t;
+typedef enum {
+    false = 0,
+    true = 1
+} boolean_t;
+
+/* End OS Dependencies */
+
+#include "e1000e_hw.h"
+
+#define E1000_TX_FLAGS_CSUM		0x00000001
+#define E1000_TX_FLAGS_VLAN		0x00000002
+#define E1000_TX_FLAGS_TSO		0x00000004
+#define E1000_TX_FLAGS_IPV4		0x00000008
+#define E1000_TX_FLAGS_VLAN_MASK	0xffff0000
+#define E1000_TX_FLAGS_VLAN_SHIFT	16
+
+#define E1000_MAX_PER_TXD	8192
+#define E1000_MAX_TXD_PWR	12
+
+#define MINIMUM_DHCP_PACKET_SIZE 282
+
+struct e1000_info;
+
+#define e_dbg(arg...) if (0) { printf (arg); };
+
+#ifdef CONFIG_E1000E_MSIX
+/* Interrupt modes, as used by the IntMode paramter */
+#define E1000E_INT_MODE_LEGACY		0
+#define E1000E_INT_MODE_MSI		1
+#define E1000E_INT_MODE_MSIX		2
+
+#endif /* CONFIG_E1000E_MSIX */
+#ifndef CONFIG_E1000E_NAPI
+#define E1000_MAX_INTR 10
+
+#endif /* CONFIG_E1000E_NAPI */
+/* Tx/Rx descriptor defines */
+#define E1000_DEFAULT_TXD		256
+#define E1000_MAX_TXD			4096
+#define E1000_MIN_TXD			64
+
+#define E1000_DEFAULT_RXD		256
+#define E1000_MAX_RXD			4096
+#define E1000_MIN_RXD			64
+
+#define E1000_MIN_ITR_USECS		10 /* 100000 irq/sec */
+#define E1000_MAX_ITR_USECS		10000 /* 100    irq/sec */
+
+/* Early Receive defines */
+#define E1000_ERT_2048			0x100
+
+#define E1000_FC_PAUSE_TIME		0x0680 /* 858 usec */
+
+/* How many Tx Descriptors do we need to call netif_wake_queue ? */
+/* How many Rx Buffers do we bundle into one write to the hardware ? */
+#define E1000_RX_BUFFER_WRITE		16 /* Must be power of 2 */
+
+#define AUTO_ALL_MODES			0
+#define E1000_EEPROM_APME		0x0400
+
+#define E1000_MNG_VLAN_NONE		(-1)
+
+/* Number of packet split data buffers (not including the header buffer) */
+#define PS_PAGE_BUFFERS			(MAX_PS_BUFFERS - 1)
+
+#define MAXIMUM_ETHERNET_VLAN_SIZE 	1522
+
+#define DEFAULT_JUMBO			9234
+
+enum e1000_boards {
+	board_82571,
+	board_82572,
+	board_82573,
+	board_82574,
+	board_80003es2lan,
+	board_ich8lan,
+	board_ich9lan,
+	board_ich10lan,
+	board_pchlan,
+	board_82583,
+};
+
+/* board specific private data structure */
+struct e1000_adapter {
+	const struct e1000_info *ei;
+
+	/* OS defined structs */
+	struct net_device *netdev;
+	struct pci_device *pdev;
+	struct net_device_stats net_stats;
+
+	/* structs defined in e1000_hw.h */
+	struct e1000_hw hw;
+
+	struct e1000_phy_info phy_info;
+
+	u32 wol;
+	u32 pba;
+	u32 max_hw_frame_size;
+
+	bool fc_autoneg;
+
+	unsigned int flags;
+	unsigned int flags2;
+
+#define NUM_TX_DESC	8
+#define NUM_RX_DESC	8
+
+	struct io_buffer *tx_iobuf[NUM_TX_DESC];
+	struct io_buffer *rx_iobuf[NUM_RX_DESC];
+
+	struct e1000_tx_desc *tx_base;
+	struct e1000_rx_desc *rx_base;
+
+	uint32_t tx_ring_size;
+	uint32_t rx_ring_size;
+
+	uint32_t tx_head;
+	uint32_t tx_tail;
+	uint32_t tx_fill_ctr;
+
+	uint32_t rx_curr;
+
+	uint32_t ioaddr;
+	uint32_t irqno;
+
+        uint32_t tx_int_delay;
+        uint32_t tx_abs_int_delay;
+        uint32_t txd_cmd;
+};
+
+struct e1000_info {
+	enum e1000_mac_type	mac;
+	unsigned int		flags;
+	unsigned int		flags2;
+	u32			pba;
+	u32			max_hw_frame_size;
+	s32			(*get_variants)(struct e1000_adapter *);
+	void			(*init_ops)(struct e1000_hw *);
+};
+
+/* hardware capability, feature, and workaround flags */
+#define FLAG_HAS_AMT                      (1 << 0)
+#define FLAG_HAS_FLASH                    (1 << 1)
+#define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
+#define FLAG_HAS_WOL                      (1 << 3)
+#define FLAG_HAS_ERT                      (1 << 4)
+#define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
+#define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
+#define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
+#define FLAG_IS_ICH                       (1 << 9)
+#ifdef CONFIG_E1000E_MSIX
+#define FLAG_HAS_MSIX                     (1 << 10)
+#endif
+#define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
+#define FLAG_IS_QUAD_PORT_A               (1 << 12)
+#define FLAG_IS_QUAD_PORT                 (1 << 13)
+#define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
+#define FLAG_APME_IN_WUC                  (1 << 15)
+#define FLAG_APME_IN_CTRL3                (1 << 16)
+#define FLAG_APME_CHECK_PORT_B            (1 << 17)
+#define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
+#define FLAG_NO_WAKE_UCAST                (1 << 19)
+#define FLAG_MNG_PT_ENABLED               (1 << 20)
+#define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
+#define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
+#define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
+#define FLAG_RX_NEEDS_RESTART             (1 << 24)
+#define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
+#define FLAG_SMART_POWER_DOWN             (1 << 26)
+#define FLAG_MSI_ENABLED                  (1 << 27)
+#define FLAG_RX_CSUM_ENABLED              (1 << 28)
+#define FLAG_TSO_FORCE                    (1 << 29)
+#define FLAG_RX_RESTART_NOW               (1 << 30)
+#define FLAG_MSI_TEST_FAILED              (1 << 31)
+
+/* CRC Stripping defines */
+#define FLAG2_CRC_STRIPPING               (1 << 0)
+#define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
+
+#define E1000_RX_DESC_PS(R, i)	    \
+	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
+#define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
+#define E1000_RX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_rx_desc)
+#define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
+#define E1000_CONTEXT_DESC(R, i)	E1000_GET_DESC(R, i, e1000_context_desc)
+
+enum e1000_state_t {
+	__E1000E_TESTING,
+	__E1000E_RESETTING,
+	__E1000E_DOWN
+};
+
+enum latency_range {
+	lowest_latency = 0,
+	low_latency = 1,
+	bulk_latency = 2,
+	latency_invalid = 255
+};
+
+extern void e1000e_check_options(struct e1000_adapter *adapter);
+
+extern void e1000e_reset(struct e1000_adapter *adapter);
+extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
+
+extern void e1000e_init_function_pointers_82571(struct e1000_hw *hw)
+						__attribute__((weak));
+extern void e1000e_init_function_pointers_80003es2lan(struct e1000_hw *hw)
+						__attribute__((weak));
+extern void e1000e_init_function_pointers_ich8lan(struct e1000_hw *hw)
+						__attribute__((weak));
+
+extern int e1000e_probe(struct pci_device *pdev);
+
+extern void e1000e_remove(struct pci_device *pdev);
+
+extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
+
+static inline s32 e1000e_commit_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.commit)
+		return hw->phy.ops.commit(hw);
+
+	return 0;
+}
+
+extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
+
+extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
+extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
+
+extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
+						 bool state);
+extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
+extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
+extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
+
+extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
+extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
+extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
+extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
+extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
+extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
+extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
+extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
+extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
+extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
+extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
+extern s32 e1000e_id_led_init(struct e1000_hw *hw);
+extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
+extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
+extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
+extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
+extern s32 e1000e_setup_link(struct e1000_hw *hw);
+static inline void e1000e_clear_vfta(struct e1000_hw *hw)
+{
+	hw->mac.ops.clear_vfta(hw);
+}
+extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
+extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
+					       u8 *mc_addr_list,
+					       u32 mc_addr_count);
+extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
+extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
+extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
+extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
+extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
+extern void e1000e_config_collision_dist(struct e1000_hw *hw);
+extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
+extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
+extern s32 e1000e_blink_led(struct e1000_hw *hw);
+extern void e1000e_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
+static inline void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	if (hw->mac.ops.write_vfta)
+		hw->mac.ops.write_vfta(hw, offset, value);
+}
+extern void e1000e_reset_adaptive(struct e1000_hw *hw);
+extern void e1000e_update_adaptive(struct e1000_hw *hw);
+
+extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
+extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
+extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
+#if 0
+extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
+#endif
+#if 0
+extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
+#endif
+extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
+extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
+extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
+extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
+extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
+#if 0
+extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
+#endif
+extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
+#if 0
+extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
+#endif
+extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
+extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
+extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
+extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
+extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
+extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
+extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
+#if 0
+extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
+#endif
+extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
+extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+			       u32 usec_interval, bool *success);
+extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
+extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+extern s32 e1000e_check_downshift(struct e1000_hw *hw);
+
+static inline s32 e1000e_phy_hw_reset(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.reset)
+		return hw->phy.ops.reset(hw);
+
+	return 0;
+}
+
+static inline s32 e1000e_check_reset_block(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.check_reset_block)
+		return hw->phy.ops.check_reset_block(hw);
+
+	return 0;
+}
+
+static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	if (hw->phy.ops.read_reg)
+		return hw->phy.ops.read_reg(hw, offset, data);
+
+	return 0;
+}
+
+static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	if (hw->phy.ops.write_reg)
+		return hw->phy.ops.write_reg(hw, offset, data);
+
+	return 0;
+}
+
+#if 0
+static inline s32 e1000e_get_cable_length(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_cable_length)
+		return hw->phy.ops.get_cable_length(hw);
+
+	return 0;
+}
+#endif
+
+extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
+extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
+extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
+extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
+extern void e1000e_release_nvm(struct e1000_hw *hw);
+
+static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
+{
+       if (hw->mac.ops.read_mac_addr)
+               return hw->mac.ops.read_mac_addr(hw);
+
+       return e1000e_read_mac_addr_generic(hw);
+}
+
+static inline s32 e1000e_validate_nvm_checksum(struct e1000_hw *hw)
+{
+	return hw->nvm.ops.validate(hw);
+}
+
+static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
+{
+	return hw->nvm.ops.update(hw);
+}
+
+static inline s32 e1000e_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	return hw->nvm.ops.read(hw, offset, words, data);
+}
+
+static inline s32 e1000e_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	return hw->nvm.ops.write(hw, offset, words, data);
+}
+
+static inline s32 e1000e_get_phy_info(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_info)
+		return hw->phy.ops.get_info(hw);
+
+	return 0;
+}
+
+extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
+#if 0
+extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
+#endif
+
+static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
+{
+	return readl(hw->hw_addr + reg);
+}
+
+static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
+{
+	writel(val, hw->hw_addr + reg);
+}
+
+#define er32(reg)	__er32(hw, E1000_##reg)
+#define ew32(reg, val)	__ew32(hw, E1000_##reg, (val))
+#define e1e_flush()	er32(STATUS)
+
+#define E1000_WRITE_REG(a, reg, value)  \
+    writel((value), ((a)->hw_addr + reg))
+
+#define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
+
+#define E1000_WRITE_REG_ARRAY(a, reg, offset, value)  \
+    writel((value), ((a)->hw_addr + reg + ((offset) << 2)))
+
+#define E1000_READ_REG_ARRAY(a, reg, offset) ( \
+    readl((a)->hw_addr + reg + ((offset) << 2)))
+
+#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
+#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
+
+static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
+{
+	return readw(hw->flash_address + reg);
+}
+
+static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg)
+{
+	return readl(hw->flash_address + reg);
+}
+
+static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val)
+{
+	writew(val, hw->flash_address + reg);
+}
+
+static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)
+{
+	writel(val, hw->flash_address + reg);
+}
+
+#define er16flash(reg)		__er16flash(hw, (reg))
+#define er32flash(reg)		__er32flash(hw, (reg))
+#define ew16flash(reg, val)	__ew16flash(hw, (reg), (val))
+#define ew32flash(reg, val)	__ew32flash(hw, (reg), (val))
+
+#endif /* _E1000E_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_hw.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_hw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_hw.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_hw.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,719 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_HW_H_
+#define _E1000E_HW_H_
+
+#include "e1000e_regs.h"
+#include "e1000e_defines.h"
+
+struct e1000_hw;
+
+#define E1000_DEV_ID_82571EB_COPPER           0x105E
+#define E1000_DEV_ID_82571EB_FIBER            0x105F
+#define E1000_DEV_ID_82571EB_SERDES           0x1060
+#define E1000_DEV_ID_82571EB_SERDES_DUAL      0x10D9
+#define E1000_DEV_ID_82571EB_SERDES_QUAD      0x10DA
+#define E1000_DEV_ID_82571EB_QUAD_COPPER      0x10A4
+#define E1000_DEV_ID_82571PT_QUAD_COPPER      0x10D5
+#define E1000_DEV_ID_82571EB_QUAD_FIBER       0x10A5
+#define E1000_DEV_ID_82571EB_QUAD_COPPER_LP   0x10BC
+#define E1000_DEV_ID_82572EI_COPPER           0x107D
+#define E1000_DEV_ID_82572EI_FIBER            0x107E
+#define E1000_DEV_ID_82572EI_SERDES           0x107F
+#define E1000_DEV_ID_82572EI                  0x10B9
+#define E1000_DEV_ID_82573E                   0x108B
+#define E1000_DEV_ID_82573E_IAMT              0x108C
+#define E1000_DEV_ID_82573L                   0x109A
+#define E1000_DEV_ID_82574L                   0x10D3
+#define E1000_DEV_ID_82574LA                  0x10F6
+#define E1000_DEV_ID_82583V                   0x150C
+#define E1000_DEV_ID_80003ES2LAN_COPPER_DPT   0x1096
+#define E1000_DEV_ID_80003ES2LAN_SERDES_DPT   0x1098
+#define E1000_DEV_ID_80003ES2LAN_COPPER_SPT   0x10BA
+#define E1000_DEV_ID_80003ES2LAN_SERDES_SPT   0x10BB
+#define E1000_DEV_ID_ICH8_82567V_3            0x1501
+#define E1000_DEV_ID_ICH8_IGP_M_AMT           0x1049
+#define E1000_DEV_ID_ICH8_IGP_AMT             0x104A
+#define E1000_DEV_ID_ICH8_IGP_C               0x104B
+#define E1000_DEV_ID_ICH8_IFE                 0x104C
+#define E1000_DEV_ID_ICH8_IFE_GT              0x10C4
+#define E1000_DEV_ID_ICH8_IFE_G               0x10C5
+#define E1000_DEV_ID_ICH8_IGP_M               0x104D
+#define E1000_DEV_ID_ICH9_IGP_M               0x10BF
+#define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
+#define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
+#define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
+#define E1000_DEV_ID_ICH9_BM                  0x10E5
+#define E1000_DEV_ID_ICH9_IGP_C               0x294C
+#define E1000_DEV_ID_ICH9_IFE                 0x10C0
+#define E1000_DEV_ID_ICH9_IFE_GT              0x10C3
+#define E1000_DEV_ID_ICH9_IFE_G               0x10C2
+#define E1000_DEV_ID_ICH10_R_BM_LM            0x10CC
+#define E1000_DEV_ID_ICH10_R_BM_LF            0x10CD
+#define E1000_DEV_ID_ICH10_R_BM_V             0x10CE
+#define E1000_DEV_ID_ICH10_D_BM_LM            0x10DE
+#define E1000_DEV_ID_ICH10_D_BM_LF            0x10DF
+#define E1000_DEV_ID_PCH_M_HV_LM              0x10EA
+#define E1000_DEV_ID_PCH_M_HV_LC              0x10EB
+#define E1000_DEV_ID_PCH_D_HV_DM              0x10EF
+#define E1000_DEV_ID_PCH_D_HV_DC              0x10F0
+#define E1000_REVISION_0 0
+#define E1000_REVISION_1 1
+#define E1000_REVISION_2 2
+#define E1000_REVISION_3 3
+#define E1000_REVISION_4 4
+
+#define E1000_FUNC_0     0
+#define E1000_FUNC_1     1
+
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0   0
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1   3
+
+enum e1000_mac_type {
+	e1000_undefined = 0,
+	e1000_82571,
+	e1000_82572,
+	e1000_82573,
+	e1000_82574,
+	e1000_82583,
+	e1000_80003es2lan,
+	e1000_ich8lan,
+	e1000_ich9lan,
+	e1000_ich10lan,
+	e1000_pchlan,
+	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
+};
+
+enum e1000_media_type {
+	e1000_media_type_unknown = 0,
+	e1000_media_type_copper = 1,
+	e1000_media_type_fiber = 2,
+	e1000_media_type_internal_serdes = 3,
+	e1000_num_media_types
+};
+
+enum e1000_nvm_type {
+	e1000_nvm_unknown = 0,
+	e1000_nvm_none,
+	e1000_nvm_eeprom_spi,
+	e1000_nvm_flash_hw,
+	e1000_nvm_flash_sw
+};
+
+enum e1000_nvm_override {
+	e1000_nvm_override_none = 0,
+	e1000_nvm_override_spi_small,
+	e1000_nvm_override_spi_large,
+};
+
+enum e1000_phy_type {
+	e1000_phy_unknown = 0,
+	e1000_phy_none,
+	e1000_phy_m88,
+	e1000_phy_igp,
+	e1000_phy_igp_2,
+	e1000_phy_gg82563,
+	e1000_phy_igp_3,
+	e1000_phy_ife,
+	e1000_phy_bm,
+	e1000_phy_82578,
+	e1000_phy_82577,
+};
+
+enum e1000_bus_type {
+	e1000_bus_type_unknown = 0,
+	e1000_bus_type_pci,
+	e1000_bus_type_pcix,
+	e1000_bus_type_pci_express,
+	e1000_bus_type_reserved
+};
+
+enum e1000_bus_speed {
+	e1000_bus_speed_unknown = 0,
+	e1000_bus_speed_33,
+	e1000_bus_speed_66,
+	e1000_bus_speed_100,
+	e1000_bus_speed_120,
+	e1000_bus_speed_133,
+	e1000_bus_speed_2500,
+	e1000_bus_speed_5000,
+	e1000_bus_speed_reserved
+};
+
+enum e1000_bus_width {
+	e1000_bus_width_unknown = 0,
+	e1000_bus_width_pcie_x1,
+	e1000_bus_width_pcie_x2,
+	e1000_bus_width_pcie_x4 = 4,
+	e1000_bus_width_pcie_x8 = 8,
+	e1000_bus_width_32,
+	e1000_bus_width_64,
+	e1000_bus_width_reserved
+};
+
+enum e1000_1000t_rx_status {
+	e1000_1000t_rx_status_not_ok = 0,
+	e1000_1000t_rx_status_ok,
+	e1000_1000t_rx_status_undefined = 0xFF
+};
+
+enum e1000_rev_polarity {
+	e1000_rev_polarity_normal = 0,
+	e1000_rev_polarity_reversed,
+	e1000_rev_polarity_undefined = 0xFF
+};
+
+enum e1000_fc_mode {
+	e1000_fc_none = 0,
+	e1000_fc_rx_pause,
+	e1000_fc_tx_pause,
+	e1000_fc_full,
+	e1000_fc_default = 0xFF
+};
+
+enum e1000_ms_type {
+	e1000_ms_hw_default = 0,
+	e1000_ms_force_master,
+	e1000_ms_force_slave,
+	e1000_ms_auto
+};
+
+enum e1000_smart_speed {
+	e1000_smart_speed_default = 0,
+	e1000_smart_speed_on,
+	e1000_smart_speed_off
+};
+
+enum e1000_serdes_link_state {
+	e1000_serdes_link_down = 0,
+	e1000_serdes_link_autoneg_progress,
+	e1000_serdes_link_autoneg_complete,
+	e1000_serdes_link_forced_up
+};
+
+/* Receive Descriptor */
+struct e1000_rx_desc {
+	__le64 buffer_addr; /* Address of the descriptor's data buffer */
+	__le16 length;      /* Length of data DMAed into data buffer */
+	__le16 csum;        /* Packet checksum */
+	u8  status;         /* Descriptor status */
+	u8  errors;         /* Descriptor Errors */
+	__le16 special;
+};
+
+/* Receive Descriptor - Extended */
+union e1000_rx_desc_extended {
+	struct {
+		__le64 buffer_addr;
+		__le64 reserved;
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;         /* RSS Hash */
+				struct {
+					__le16 ip_id;  /* IP id */
+					__le16 csum;   /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length;
+			__le16 vlan;          /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+#define MAX_PS_BUFFERS 4
+/* Receive Descriptor - Packet Split */
+union e1000_rx_desc_packet_split {
+	struct {
+		/* one buffer for protocol header(s), three data buffers */
+		__le64 buffer_addr[MAX_PS_BUFFERS];
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;           /* RSS Hash */
+				struct {
+					__le16 ip_id;    /* IP id */
+					__le16 csum;     /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length0;       /* length of buffer 0 */
+			__le16 vlan;          /* VLAN tag */
+		} middle;
+		struct {
+			__le16 header_status;
+			__le16 length[3];     /* length of buffers 1-3 */
+		} upper;
+		__le64 reserved;
+	} wb; /* writeback */
+};
+
+/* Transmit Descriptor */
+struct e1000_tx_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's data buffer */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 cso;           /* Checksum offset */
+			u8 cmd;           /* Descriptor control */
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 css;           /* Checksum start */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Offload Context Descriptor */
+struct e1000_context_desc {
+	union {
+		__le32 ip_config;
+		struct {
+			u8 ipcss;         /* IP checksum start */
+			u8 ipcso;         /* IP checksum offset */
+			__le16 ipcse;     /* IP checksum end */
+		} ip_fields;
+	} lower_setup;
+	union {
+		__le32 tcp_config;
+		struct {
+			u8 tucss;         /* TCP checksum start */
+			u8 tucso;         /* TCP checksum offset */
+			__le16 tucse;     /* TCP checksum end */
+		} tcp_fields;
+	} upper_setup;
+	__le32 cmd_and_length;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 hdr_len;       /* Header length */
+			__le16 mss;       /* Maximum segment size */
+		} fields;
+	} tcp_seg_setup;
+};
+
+/* Offload data descriptor */
+struct e1000_data_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's buffer address */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 typ_len_ext;
+			u8 cmd;
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 popts;         /* Packet Options */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Statistics counters collected by the MAC */
+struct e1000_hw_stats {
+	u64 crcerrs;
+	u64 algnerrc;
+	u64 symerrs;
+	u64 rxerrc;
+	u64 mpc;
+	u64 scc;
+	u64 ecol;
+	u64 mcc;
+	u64 latecol;
+	u64 colc;
+	u64 dc;
+	u64 tncrs;
+	u64 sec;
+	u64 cexterr;
+	u64 rlec;
+	u64 xonrxc;
+	u64 xontxc;
+	u64 xoffrxc;
+	u64 xofftxc;
+	u64 fcruc;
+	u64 prc64;
+	u64 prc127;
+	u64 prc255;
+	u64 prc511;
+	u64 prc1023;
+	u64 prc1522;
+	u64 gprc;
+	u64 bprc;
+	u64 mprc;
+	u64 gptc;
+	u64 gorc;
+	u64 gotc;
+	u64 rnbc;
+	u64 ruc;
+	u64 rfc;
+	u64 roc;
+	u64 rjc;
+	u64 mgprc;
+	u64 mgpdc;
+	u64 mgptc;
+	u64 tor;
+	u64 tot;
+	u64 tpr;
+	u64 tpt;
+	u64 ptc64;
+	u64 ptc127;
+	u64 ptc255;
+	u64 ptc511;
+	u64 ptc1023;
+	u64 ptc1522;
+	u64 mptc;
+	u64 bptc;
+	u64 tsctc;
+	u64 tsctfc;
+	u64 iac;
+	u64 icrxptc;
+	u64 icrxatc;
+	u64 ictxptc;
+	u64 ictxatc;
+	u64 ictxqec;
+	u64 ictxqmtc;
+	u64 icrxdmtc;
+	u64 icrxoc;
+	u64 doosync;
+};
+
+
+struct e1000_phy_stats {
+	u32 idle_errors;
+	u32 receive_errors;
+};
+
+struct e1000_host_mng_dhcp_cookie {
+	u32 signature;
+	u8  status;
+	u8  reserved0;
+	u16 vlan_id;
+	u32 reserved1;
+	u16 reserved2;
+	u8  reserved3;
+	u8  checksum;
+};
+
+/* Host Interface "Rev 1" */
+struct e1000_host_command_header {
+	u8 command_id;
+	u8 command_length;
+	u8 command_options;
+	u8 checksum;
+};
+
+#define E1000_HI_MAX_DATA_LENGTH     252
+struct e1000_host_command_info {
+	struct e1000_host_command_header command_header;
+	u8 command_data[E1000_HI_MAX_DATA_LENGTH];
+};
+
+/* Host Interface "Rev 2" */
+struct e1000_host_mng_command_header {
+	u8  command_id;
+	u8  checksum;
+	u16 reserved1;
+	u16 reserved2;
+	u16 command_length;
+};
+
+#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
+struct e1000_host_mng_command_info {
+	struct e1000_host_mng_command_header command_header;
+	u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
+};
+
+#include "e1000e_mac.h"
+#include "e1000e_phy.h"
+#include "e1000e_nvm.h"
+#include "e1000e_manage.h"
+
+struct e1000_mac_operations {
+	/* Function pointers for the MAC. */
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*id_led_init)(struct e1000_hw *);
+	s32  (*blink_led)(struct e1000_hw *);
+	s32  (*check_for_link)(struct e1000_hw *);
+	bool (*check_mng_mode)(struct e1000_hw *hw);
+	s32  (*cleanup_led)(struct e1000_hw *);
+	void (*clear_hw_cntrs)(struct e1000_hw *);
+	void (*clear_vfta)(struct e1000_hw *);
+	s32  (*get_bus_info)(struct e1000_hw *);
+	void (*set_lan_id)(struct e1000_hw *);
+	s32  (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
+	s32  (*led_on)(struct e1000_hw *);
+	s32  (*led_off)(struct e1000_hw *);
+	void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
+	s32  (*reset_hw)(struct e1000_hw *);
+	s32  (*init_hw)(struct e1000_hw *);
+	s32  (*setup_link)(struct e1000_hw *);
+	s32  (*setup_physical_interface)(struct e1000_hw *);
+	s32  (*setup_led)(struct e1000_hw *);
+	void (*write_vfta)(struct e1000_hw *, u32, u32);
+	void (*mta_set)(struct e1000_hw *, u32);
+	void (*config_collision_dist)(struct e1000_hw *);
+	void (*rar_set)(struct e1000_hw *, u8*, u32);
+	s32  (*read_mac_addr)(struct e1000_hw *);
+	s32  (*validate_mdi_setting)(struct e1000_hw *);
+	s32  (*mng_host_if_write)(struct e1000_hw *, u8*, u16, u16, u8*);
+	s32  (*mng_write_cmd_header)(struct e1000_hw *hw,
+                      struct e1000_host_mng_command_header*);
+	s32  (*mng_enable_host_if)(struct e1000_hw *);
+	s32  (*wait_autoneg)(struct e1000_hw *);
+};
+
+struct e1000_phy_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*cfg_on_link_up)(struct e1000_hw *);
+	s32  (*check_polarity)(struct e1000_hw *);
+	s32  (*check_reset_block)(struct e1000_hw *);
+	s32  (*commit)(struct e1000_hw *);
+#if 0
+	s32  (*force_speed_duplex)(struct e1000_hw *);
+#endif
+	s32  (*get_cfg_done)(struct e1000_hw *hw);
+#if 0
+	s32  (*get_cable_length)(struct e1000_hw *);
+#endif
+	s32  (*get_info)(struct e1000_hw *);
+	s32  (*read_reg)(struct e1000_hw *, u32, u16 *);
+	s32  (*read_reg_locked)(struct e1000_hw *, u32, u16 *);
+	void (*release)(struct e1000_hw *);
+	s32  (*reset)(struct e1000_hw *);
+	s32  (*set_d0_lplu_state)(struct e1000_hw *, bool);
+	s32  (*set_d3_lplu_state)(struct e1000_hw *, bool);
+	s32  (*write_reg)(struct e1000_hw *, u32, u16);
+	s32  (*write_reg_locked)(struct e1000_hw *, u32, u16);
+	void (*power_up)(struct e1000_hw *);
+	void (*power_down)(struct e1000_hw *);
+};
+
+struct e1000_nvm_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*read)(struct e1000_hw *, u16, u16, u16 *);
+	void (*release)(struct e1000_hw *);
+	void (*reload)(struct e1000_hw *);
+	s32  (*update)(struct e1000_hw *);
+	s32  (*valid_led_default)(struct e1000_hw *, u16 *);
+	s32  (*validate)(struct e1000_hw *);
+	s32  (*write)(struct e1000_hw *, u16, u16, u16 *);
+};
+
+struct e1000_mac_info {
+	struct e1000_mac_operations ops;
+	u8 addr[6];
+	u8 perm_addr[6];
+
+	enum e1000_mac_type type;
+
+	u32 collision_delta;
+	u32 ledctl_default;
+	u32 ledctl_mode1;
+	u32 ledctl_mode2;
+	u32 mc_filter_type;
+	u32 tx_packet_delta;
+	u32 txcw;
+
+	u16 current_ifs_val;
+	u16 ifs_max_val;
+	u16 ifs_min_val;
+	u16 ifs_ratio;
+	u16 ifs_step_size;
+	u16 mta_reg_count;
+
+	/* Maximum size of the MTA register table in all supported adapters */
+	#define MAX_MTA_REG 128
+	u32 mta_shadow[MAX_MTA_REG];
+	u16 rar_entry_count;
+
+	u8  forced_speed_duplex;
+
+	bool adaptive_ifs;
+	bool arc_subsystem_valid;
+	bool asf_firmware_present;
+	bool autoneg;
+	bool autoneg_failed;
+	bool get_link_status;
+	bool in_ifs_mode;
+	enum e1000_serdes_link_state serdes_link_state;
+	bool serdes_has_link;
+	bool tx_pkt_filtering;
+};
+
+struct e1000_phy_info {
+	struct e1000_phy_operations ops;
+	enum e1000_phy_type type;
+
+	enum e1000_1000t_rx_status local_rx;
+	enum e1000_1000t_rx_status remote_rx;
+	enum e1000_ms_type ms_type;
+	enum e1000_ms_type original_ms_type;
+	enum e1000_rev_polarity cable_polarity;
+	enum e1000_smart_speed smart_speed;
+
+	u32 addr;
+	u32 id;
+	u32 reset_delay_us; /* in usec */
+	u32 revision;
+
+	enum e1000_media_type media_type;
+
+	u16 autoneg_advertised;
+	u16 autoneg_mask;
+	u16 cable_length;
+	u16 max_cable_length;
+	u16 min_cable_length;
+
+	u8 mdix;
+
+	bool disable_polarity_correction;
+	bool is_mdix;
+	bool polarity_correction;
+	bool reset_disable;
+	bool speed_downgraded;
+	bool autoneg_wait_to_complete;
+};
+
+struct e1000_nvm_info {
+	struct e1000_nvm_operations ops;
+	enum e1000_nvm_type type;
+	enum e1000_nvm_override override;
+
+	u32 flash_bank_size;
+	u32 flash_base_addr;
+
+	u16 word_size;
+	u16 delay_usec;
+	u16 address_bits;
+	u16 opcode_bits;
+	u16 page_size;
+};
+
+struct e1000_bus_info {
+	enum e1000_bus_type type;
+	enum e1000_bus_speed speed;
+	enum e1000_bus_width width;
+
+	u16 func;
+	u16 pci_cmd_word;
+};
+
+struct e1000_fc_info {
+	u32 high_water;          /* Flow control high-water mark */
+	u32 low_water;           /* Flow control low-water mark */
+	u16 pause_time;          /* Flow control pause timer */
+	bool send_xon;           /* Flow control send XON */
+	bool strict_ieee;        /* Strict IEEE mode */
+	enum e1000_fc_mode current_mode; /* FC mode in effect */
+	enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
+};
+
+struct e1000_dev_spec_82571 {
+	bool laa_is_present;
+	u32 smb_counter;
+};
+
+struct e1000_dev_spec_80003es2lan {
+	bool  mdic_wa_enable;
+};
+
+struct e1000_shadow_ram {
+	u16  value;
+	bool modified;
+};
+
+#define E1000_ICH8_SHADOW_RAM_WORDS		2048
+
+struct e1000_dev_spec_ich8lan {
+	bool kmrn_lock_loss_workaround_enabled;
+	struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS];
+	bool nvm_k1_enabled;
+};
+
+struct e1000_hw {
+	struct e1000_adapter *adapter;
+
+	u8 __iomem *hw_addr;
+	u8 __iomem *flash_address;
+
+	void *back;
+	unsigned long io_base;
+
+	struct e1000_mac_info  mac;
+	struct e1000_fc_info   fc;
+	struct e1000_phy_info  phy;
+	struct e1000_nvm_info  nvm;
+	struct e1000_bus_info  bus;
+	struct e1000_host_mng_dhcp_cookie mng_cookie;
+
+	union {
+		struct e1000_dev_spec_82571	_82571;
+		struct e1000_dev_spec_80003es2lan _80003es2lan;
+		struct e1000_dev_spec_ich8lan	ich8lan;
+	} dev_spec;
+
+	u16 device_id;
+	u16 subsystem_vendor_id;
+	u16 subsystem_device_id;
+	u16 vendor_id;
+
+	u8  revision_id;
+};
+
+#include "e1000e_82571.h"
+#include "e1000e_80003es2lan.h"
+#include "e1000e_ich8lan.h"
+
+/* These functions must be implemented by drivers */
+s32  e1000e_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_ich8lan.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_ich8lan.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_ich8lan.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_ich8lan.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,3444 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/*
+ * 82562G 10/100 Network Connection
+ * 82562G-2 10/100 Network Connection
+ * 82562GT 10/100 Network Connection
+ * 82562GT-2 10/100 Network Connection
+ * 82562V 10/100 Network Connection
+ * 82562V-2 10/100 Network Connection
+ * 82566DC-2 Gigabit Network Connection
+ * 82566DC Gigabit Network Connection
+ * 82566DM-2 Gigabit Network Connection
+ * 82566DM Gigabit Network Connection
+ * 82566MC Gigabit Network Connection
+ * 82566MM Gigabit Network Connection
+ * 82567LM Gigabit Network Connection
+ * 82567LF Gigabit Network Connection
+ * 82567V Gigabit Network Connection
+ * 82567LM-2 Gigabit Network Connection
+ * 82567LF-2 Gigabit Network Connection
+ * 82567V-2 Gigabit Network Connection
+ * 82567LF-3 Gigabit Network Connection
+ * 82567LM-3 Gigabit Network Connection
+ * 82567LM-4 Gigabit Network Connection
+ * 82577LM Gigabit Network Connection
+ * 82577LC Gigabit Network Connection
+ * 82578DM Gigabit Network Connection
+ * 82578DC Gigabit Network Connection
+ */
+
+#include "e1000e.h"
+
+static s32  e1000e_init_phy_params_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_init_phy_params_pchlan(struct e1000_hw *hw);
+static s32  e1000e_init_nvm_params_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_init_mac_params_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_acquire_swflag_ich8lan(struct e1000_hw *hw);
+static void e1000e_release_swflag_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_acquire_nvm_ich8lan(struct e1000_hw *hw);
+static void e1000e_release_nvm_ich8lan(struct e1000_hw *hw);
+static bool e1000e_check_mng_mode_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_check_reset_block_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_phy_hw_reset_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_get_phy_info_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
+static s32  e1000e_set_d0_lplu_state_ich8lan(struct e1000_hw *hw,
+                                            bool active);
+static s32  e1000e_set_d3_lplu_state_ich8lan(struct e1000_hw *hw,
+                                            bool active);
+static s32  e1000e_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset,
+                                   u16 words, u16 *data);
+static s32  e1000e_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset,
+                                    u16 words, u16 *data);
+static s32  e1000e_validate_nvm_checksum_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_update_nvm_checksum_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_valid_led_default_ich8lan(struct e1000_hw *hw,
+                                            u16 *data);
+static s32  e1000e_id_led_init_pchlan(struct e1000_hw *hw);
+static s32  e1000e_get_bus_info_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_reset_hw_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_init_hw_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_setup_link_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_setup_copper_link_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_get_link_up_info_ich8lan(struct e1000_hw *hw,
+                                           u16 *speed, u16 *duplex);
+static s32  e1000e_cleanup_led_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_led_on_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_led_off_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
+static s32  e1000e_setup_led_pchlan(struct e1000_hw *hw);
+static s32  e1000e_cleanup_led_pchlan(struct e1000_hw *hw);
+static s32  e1000e_led_on_pchlan(struct e1000_hw *hw);
+static s32  e1000e_led_off_pchlan(struct e1000_hw *hw);
+static void e1000e_clear_hw_cntrs_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank);
+static s32  e1000e_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout);
+static s32  e1000e_flash_cycle_init_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_get_phy_info_ife_ich8lan(struct e1000_hw *hw);
+static void e1000e_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_read_flash_byte_ich8lan(struct e1000_hw *hw,
+                                          u32 offset, u8 *data);
+static s32  e1000e_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
+                                          u8 size, u16 *data);
+static s32  e1000e_read_flash_word_ich8lan(struct e1000_hw *hw,
+                                          u32 offset, u16 *data);
+static s32  e1000e_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
+                                                 u32 offset, u8 byte);
+static s32  e1000e_write_flash_byte_ich8lan(struct e1000_hw *hw,
+                                           u32 offset, u8 data);
+static s32  e1000e_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
+                                           u8 size, u16 data);
+static s32  e1000e_get_cfg_done_ich8lan(struct e1000_hw *hw);
+static void e1000e_power_down_phy_copper_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_check_for_copper_link_ich8lan(struct e1000_hw *hw);
+static void e1000e_lan_init_done_ich8lan(struct e1000_hw *hw);
+static s32  e1000e_sw_lcd_config_ich8lan(struct e1000_hw *hw);
+
+/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
+/* Offset 04h HSFSTS */
+union ich8_hws_flash_status {
+	struct ich8_hsfsts {
+		u16 flcdone    :1; /* bit 0 Flash Cycle Done */
+		u16 flcerr     :1; /* bit 1 Flash Cycle Error */
+		u16 dael       :1; /* bit 2 Direct Access error Log */
+		u16 berasesz   :2; /* bit 4:3 Sector Erase Size */
+		u16 flcinprog  :1; /* bit 5 flash cycle in Progress */
+		u16 reserved1  :2; /* bit 13:6 Reserved */
+		u16 reserved2  :6; /* bit 13:6 Reserved */
+		u16 fldesvalid :1; /* bit 14 Flash Descriptor Valid */
+		u16 flockdn    :1; /* bit 15 Flash Config Lock-Down */
+	} hsf_status;
+	u16 regval;
+};
+
+/* ICH GbE Flash Hardware Sequencing Flash control Register bit breakdown */
+/* Offset 06h FLCTL */
+union ich8_hws_flash_ctrl {
+	struct ich8_hsflctl {
+		u16 flcgo      :1;   /* 0 Flash Cycle Go */
+		u16 flcycle    :2;   /* 2:1 Flash Cycle */
+		u16 reserved   :5;   /* 7:3 Reserved  */
+		u16 fldbcount  :2;   /* 9:8 Flash Data Byte Count */
+		u16 flockdn    :6;   /* 15:10 Reserved */
+	} hsf_ctrl;
+	u16 regval;
+};
+
+/* ICH Flash Region Access Permissions */
+union ich8_hws_flash_regacc {
+	struct ich8_flracc {
+		u32 grra      :8; /* 0:7 GbE region Read Access */
+		u32 grwa      :8; /* 8:15 GbE region Write Access */
+		u32 gmrag     :8; /* 23:16 GbE Master Read Access Grant */
+		u32 gmwag     :8; /* 31:24 GbE Master Write Access Grant */
+	} hsf_flregacc;
+	u16 regval;
+};
+
+/**
+ *  e1000e_init_phy_params_pchlan - Initialize PHY function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize family-specific PHY parameters and function pointers.
+ **/
+static s32 e1000e_init_phy_params_pchlan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	phy->addr                     = 1;
+	phy->reset_delay_us           = 100;
+
+	phy->ops.acquire              = e1000e_acquire_swflag_ich8lan;
+	phy->ops.check_polarity       = e1000e_check_polarity_ife;
+	phy->ops.check_reset_block    = e1000e_check_reset_block_ich8lan;
+#if 0
+	phy->ops.force_speed_duplex   = e1000e_phy_force_speed_duplex_ife;
+#endif
+#if 0
+	phy->ops.get_cable_length     = e1000e_get_cable_length_igp_2;
+#endif
+	phy->ops.get_cfg_done         = e1000e_get_cfg_done_ich8lan;
+	phy->ops.get_info             = e1000e_get_phy_info_ich8lan;
+	phy->ops.read_reg             = e1000e_read_phy_reg_hv;
+	phy->ops.read_reg_locked      = e1000e_read_phy_reg_hv_locked;
+	phy->ops.release              = e1000e_release_swflag_ich8lan;
+	phy->ops.reset                = e1000e_phy_hw_reset_ich8lan;
+	phy->ops.set_d0_lplu_state    = e1000e_set_lplu_state_pchlan;
+	phy->ops.set_d3_lplu_state    = e1000e_set_lplu_state_pchlan;
+	phy->ops.write_reg            = e1000e_write_phy_reg_hv;
+	phy->ops.write_reg_locked     = e1000e_write_phy_reg_hv_locked;
+	phy->ops.power_up             = e1000e_power_up_phy_copper;
+	phy->ops.power_down           = e1000e_power_down_phy_copper_ich8lan;
+	phy->autoneg_mask             = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+
+	phy->id = e1000_phy_unknown;
+	e1000e_get_phy_id(hw);
+	phy->type = e1000e_get_phy_type_from_id(phy->id);
+
+	if (phy->type == e1000_phy_82577) {
+		phy->ops.check_polarity = e1000e_check_polarity_82577;
+#if 0
+		phy->ops.force_speed_duplex =
+			e1000e_phy_force_speed_duplex_82577;
+#endif
+#if 0
+		phy->ops.get_cable_length   = e1000e_get_cable_length_82577;
+#endif
+		phy->ops.get_info = e1000e_get_phy_info_82577;
+		phy->ops.commit = e1000e_phy_sw_reset;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_phy_params_ich8lan - Initialize PHY function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize family-specific PHY parameters and function pointers.
+ **/
+static s32 e1000e_init_phy_params_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i = 0;
+
+	phy->addr                     = 1;
+	phy->reset_delay_us           = 100;
+
+	phy->ops.acquire              = e1000e_acquire_swflag_ich8lan;
+	phy->ops.check_polarity       = e1000e_check_polarity_ife;
+	phy->ops.check_reset_block    = e1000e_check_reset_block_ich8lan;
+#if 0
+	phy->ops.force_speed_duplex   = e1000e_phy_force_speed_duplex_ife;
+#endif
+#if 0
+	phy->ops.get_cable_length     = e1000e_get_cable_length_igp_2;
+#endif
+	phy->ops.get_cfg_done         = e1000e_get_cfg_done_ich8lan;
+	phy->ops.get_info             = e1000e_get_phy_info_ich8lan;
+	phy->ops.read_reg             = e1000e_read_phy_reg_igp;
+	phy->ops.release              = e1000e_release_swflag_ich8lan;
+	phy->ops.reset                = e1000e_phy_hw_reset_ich8lan;
+	phy->ops.set_d0_lplu_state    = e1000e_set_d0_lplu_state_ich8lan;
+	phy->ops.set_d3_lplu_state    = e1000e_set_d3_lplu_state_ich8lan;
+	phy->ops.write_reg            = e1000e_write_phy_reg_igp;
+	phy->ops.power_up             = e1000e_power_up_phy_copper;
+	phy->ops.power_down           = e1000e_power_down_phy_copper_ich8lan;
+
+	/*
+	 * We may need to do this twice - once for IGP and if that fails,
+	 * we'll set BM func pointers and try again
+	 */
+	ret_val = e1000e_determine_phy_address(hw);
+	if (ret_val) {
+		phy->ops.write_reg = e1000e_write_phy_reg_bm;
+		phy->ops.read_reg  = e1000e_read_phy_reg_bm;
+		ret_val = e1000e_determine_phy_address(hw);
+		if (ret_val) {
+			DBG("Cannot determine PHY addr. Erroring out\n");
+			goto out;
+		}
+	}
+
+	phy->id = 0;
+	while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) &&
+	       (i++ < 100)) {
+		msleep(1);
+		ret_val = e1000e_get_phy_id(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/* Verify phy id */
+	switch (phy->id) {
+	case IGP03E1000_E_PHY_ID:
+		phy->type = e1000_phy_igp_3;
+		phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+		phy->ops.read_reg_locked = e1000e_read_phy_reg_igp_locked;
+		phy->ops.write_reg_locked = e1000e_write_phy_reg_igp_locked;
+		break;
+	case IFE_E_PHY_ID:
+	case IFE_PLUS_E_PHY_ID:
+	case IFE_C_E_PHY_ID:
+		phy->type = e1000_phy_ife;
+		phy->autoneg_mask = E1000_ALL_NOT_GIG;
+		break;
+	case BME1000_E_PHY_ID:
+		phy->type = e1000_phy_bm;
+		phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+		phy->ops.read_reg = e1000e_read_phy_reg_bm;
+		phy->ops.write_reg = e1000e_write_phy_reg_bm;
+		phy->ops.commit = e1000e_phy_sw_reset;
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_nvm_params_ich8lan - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize family-specific NVM parameters and function
+ *  pointers.
+ **/
+static s32 e1000e_init_nvm_params_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	u32 gfpreg, sector_base_addr, sector_end_addr;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i;
+
+	/* Can't read flash registers if the register set isn't mapped. */
+	if (!hw->flash_address) {
+		e_dbg("ERROR: Flash registers not mapped\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	nvm->type = e1000_nvm_flash_sw;
+
+	gfpreg = er32flash(ICH_FLASH_GFPREG);
+
+	/*
+	 * sector_X_addr is a "sector"-aligned address (4096 bytes)
+	 * Add 1 to sector_end_addr since this sector is included in
+	 * the overall size.
+	 */
+	sector_base_addr = gfpreg & FLASH_GFPREG_BASE_MASK;
+	sector_end_addr = ((gfpreg >> 16) & FLASH_GFPREG_BASE_MASK) + 1;
+
+	/* flash_base_addr is byte-aligned */
+	nvm->flash_base_addr = sector_base_addr << FLASH_SECTOR_ADDR_SHIFT;
+
+	/*
+	 * find total size of the NVM, then cut in half since the total
+	 * size represents two separate NVM banks.
+	 */
+	nvm->flash_bank_size = (sector_end_addr - sector_base_addr)
+	                          << FLASH_SECTOR_ADDR_SHIFT;
+	nvm->flash_bank_size /= 2;
+	/* Adjust to word count */
+	nvm->flash_bank_size /= sizeof(u16);
+
+	nvm->word_size = E1000_ICH8_SHADOW_RAM_WORDS;
+
+	/* Clear shadow ram */
+	for (i = 0; i < nvm->word_size; i++) {
+		dev_spec->shadow_ram[i].modified = false;
+		dev_spec->shadow_ram[i].value    = 0xFFFF;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire       = e1000e_acquire_nvm_ich8lan;
+	nvm->ops.release       = e1000e_release_nvm_ich8lan;
+	nvm->ops.read          = e1000e_read_nvm_ich8lan;
+	nvm->ops.update        = e1000e_update_nvm_checksum_ich8lan;
+	nvm->ops.valid_led_default = e1000e_valid_led_default_ich8lan;
+	nvm->ops.validate      = e1000e_validate_nvm_checksum_ich8lan;
+	nvm->ops.write         = e1000e_write_nvm_ich8lan;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_mac_params_ich8lan - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize family-specific MAC parameters and function
+ *  pointers.
+ **/
+static s32 e1000e_init_mac_params_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	/* Set media type function pointer */
+	hw->phy.media_type = e1000_media_type_copper;
+
+	/* Set mta register count */
+	mac->mta_reg_count = 32;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_ICH_RAR_ENTRIES;
+	if (mac->type == e1000_ich8lan)
+		mac->rar_entry_count--;
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+	/* Set if manageability features are enabled. */
+	mac->arc_subsystem_valid = true;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = e1000e_get_bus_info_ich8lan;
+	/* function id */
+	mac->ops.set_lan_id = e1000e_set_lan_id_single_port;
+	/* reset */
+	mac->ops.reset_hw = e1000e_reset_hw_ich8lan;
+	/* hw initialization */
+	mac->ops.init_hw = e1000e_init_hw_ich8lan;
+	/* link setup */
+	mac->ops.setup_link = e1000e_setup_link_ich8lan;
+	/* physical interface setup */
+	mac->ops.setup_physical_interface = e1000e_setup_copper_link_ich8lan;
+	/* check for link */
+	mac->ops.check_for_link = e1000e_check_for_copper_link_ich8lan;
+	/* check management mode */
+	mac->ops.check_mng_mode = e1000e_check_mng_mode_ich8lan;
+	/* link info */
+	mac->ops.get_link_up_info = e1000e_get_link_up_info_ich8lan;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000e_update_mc_addr_list_generic;
+	/* setting MTA */
+	mac->ops.mta_set = e1000e_mta_set_generic;
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = e1000e_clear_hw_cntrs_ich8lan;
+
+	/* LED operations */
+	switch (mac->type) {
+	case e1000_ich8lan:
+	case e1000_ich9lan:
+	case e1000_ich10lan:
+		/* ID LED init */
+		mac->ops.id_led_init = e1000e_id_led_init;
+		/* blink LED */
+		mac->ops.blink_led = e1000e_blink_led;
+		/* setup LED */
+		mac->ops.setup_led = e1000e_setup_led_generic;
+		/* cleanup LED */
+		mac->ops.cleanup_led = e1000e_cleanup_led_ich8lan;
+		/* turn on/off LED */
+		mac->ops.led_on = e1000e_led_on_ich8lan;
+		mac->ops.led_off = e1000e_led_off_ich8lan;
+		break;
+	case e1000_pchlan:
+		/* ID LED init */
+		mac->ops.id_led_init = e1000e_id_led_init_pchlan;
+		/* setup LED */
+		mac->ops.setup_led = e1000e_setup_led_pchlan;
+		/* cleanup LED */
+		mac->ops.cleanup_led = e1000e_cleanup_led_pchlan;
+		/* turn on/off LED */
+		mac->ops.led_on = e1000e_led_on_pchlan;
+		mac->ops.led_off = e1000e_led_off_pchlan;
+		break;
+	default:
+		break;
+	}
+
+	/* Enable PCS Lock-loss workaround for ICH8 */
+	if (mac->type == e1000_ich8lan)
+		e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true);
+
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_check_for_copper_link_ich8lan - Check for link (Copper)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks to see of the link status of the hardware has changed.  If a
+ *  change in link status has been detected, then we read the PHY registers
+ *  to get the current speed/duplex if link exists.
+ **/
+static s32 e1000e_check_for_copper_link_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link;
+
+	/*
+	 * We only want to go out to the PHY registers to see if Auto-Neg
+	 * has completed and/or if our link status has changed.  The
+	 * get_link_status flag is set upon receiving a Link Status
+	 * Change or Rx Sequence Error interrupt.
+	 */
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/*
+	 * First we want to see if the MII Status Register reports
+	 * link.  If so, then we want to get the current speed/duplex
+	 * of the PHY.
+	 */
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (hw->mac.type == e1000_pchlan) {
+		ret_val = e1000e_k1_gig_workaround_hv(hw, link);
+		if (ret_val)
+			goto out;
+	}
+
+	if (!link)
+		goto out; /* No link detected */
+
+	mac->get_link_status = false;
+
+	if (hw->phy.type == e1000_phy_82578) {
+		ret_val = e1000e_link_stall_workaround_hv(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Check if there was DownShift, must be checked
+	 * immediately after link-up
+	 */
+	e1000e_check_downshift(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we simply return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Auto-Neg is enabled.  Auto Speed Detection takes care
+	 * of MAC speed/duplex configuration.  So we only need to
+	 * configure Collision Distance in the MAC.
+	 */
+	e1000e_config_collision_dist(hw);
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = e1000e_config_fc_after_link_up(hw);
+	if (ret_val)
+		e_dbg("Error configuring flow control\n");
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_function_pointers_ich8lan - Initialize ICH8 function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Initialize family-specific function pointers for PHY, MAC, and NVM.
+ **/
+void e1000e_init_function_pointers_ich8lan(struct e1000_hw *hw)
+{
+	e1000e_init_mac_ops_generic(hw);
+	e1000e_init_nvm_ops_generic(hw);
+	hw->mac.ops.init_params = e1000e_init_mac_params_ich8lan;
+	hw->nvm.ops.init_params = e1000e_init_nvm_params_ich8lan;
+	switch (hw->mac.type) {
+	case e1000_ich8lan:
+	case e1000_ich9lan:
+	case e1000_ich10lan:
+		hw->phy.ops.init_params = e1000e_init_phy_params_ich8lan;
+		break;
+	case e1000_pchlan:
+		hw->phy.ops.init_params = e1000e_init_phy_params_pchlan;
+		break;
+	default:
+		break;
+	}
+}
+
+#if 0
+static DEFINE_MUTEX(nvm_mutex);
+#endif
+
+/**
+ *  e1000e_acquire_nvm_ich8lan - Acquire NVM mutex
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquires the mutex for performing NVM operations.
+ **/
+static s32 e1000e_acquire_nvm_ich8lan(struct e1000_hw *hw __unused)
+{
+#if 0
+	mutex_lock(&nvm_mutex);
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_release_nvm_ich8lan - Release NVM mutex
+ *  @hw: pointer to the HW structure
+ *
+ *  Releases the mutex used while performing NVM operations.
+ **/
+static void e1000e_release_nvm_ich8lan(struct e1000_hw *hw __unused)
+{
+#if 0
+	mutex_unlock(&nvm_mutex);
+#endif
+	return;
+}
+
+#if 0
+static DEFINE_MUTEX(swflag_mutex);
+#endif
+
+/**
+ *  e1000e_acquire_swflag_ich8lan - Acquire software control flag
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquires the software control flag for performing PHY and select
+ *  MAC CSR accesses.
+ **/
+static s32 e1000e_acquire_swflag_ich8lan(struct e1000_hw *hw)
+{
+	u32 extcnf_ctrl, timeout = PHY_CFG_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+
+#if 0
+	mutex_lock(&swflag_mutex);
+#endif
+
+	while (timeout) {
+		extcnf_ctrl = er32(EXTCNF_CTRL);
+		if (!(extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG))
+			break;
+
+		mdelay(1);
+		timeout--;
+	}
+
+	if (!timeout) {
+		e_dbg("SW/FW/HW has locked the resource for too long.\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	timeout = SW_FLAG_TIMEOUT;
+
+	extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG;
+	ew32(EXTCNF_CTRL, extcnf_ctrl);
+
+	while (timeout) {
+		extcnf_ctrl = er32(EXTCNF_CTRL);
+		if (extcnf_ctrl & E1000_EXTCNF_CTRL_SWFLAG)
+			break;
+
+		mdelay(1);
+		timeout--;
+	}
+
+	if (!timeout) {
+		e_dbg("Failed to acquire the semaphore.\n");
+		extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
+		ew32(EXTCNF_CTRL, extcnf_ctrl);
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+out:
+#if 0
+	if (ret_val)
+		mutex_unlock(&swflag_mutex);
+#endif
+	return ret_val;
+}
+
+/**
+ *  e1000e_release_swflag_ich8lan - Release software control flag
+ *  @hw: pointer to the HW structure
+ *
+ *  Releases the software control flag for performing PHY and select
+ *  MAC CSR accesses.
+ **/
+static void e1000e_release_swflag_ich8lan(struct e1000_hw *hw)
+{
+	u32 extcnf_ctrl;
+
+	extcnf_ctrl = er32(EXTCNF_CTRL);
+	extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
+	ew32(EXTCNF_CTRL, extcnf_ctrl);
+
+#if 0
+	mutex_unlock(&swflag_mutex);
+#endif
+	return;
+}
+
+/**
+ *  e1000e_check_mng_mode_ich8lan - Checks management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks if the adapter has manageability enabled.
+ *  This is a function pointer entry point only called by read/write
+ *  routines for the PHY and NVM parts.
+ **/
+static bool e1000e_check_mng_mode_ich8lan(struct e1000_hw *hw)
+{
+	u32 fwsm;
+
+	fwsm = er32(FWSM);
+	return (fwsm & E1000_FWSM_MODE_MASK) ==
+	        (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
+}
+/**
+ *  e1000e_check_reset_block_ich8lan - Check if PHY reset is blocked
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks if firmware is blocking the reset of the PHY.
+ *  This is a function pointer entry point only called by
+ *  reset routines.
+ **/
+static s32 e1000e_check_reset_block_ich8lan(struct e1000_hw *hw)
+{
+	u32 fwsm;
+
+	fwsm = er32(FWSM);
+	return (fwsm & E1000_ICH_FWSM_RSPCIPHY) ? E1000_SUCCESS
+	                                        : E1000_BLK_PHY_RESET;
+}
+
+/**
+ *  e1000e_sw_lcd_config_ich8lan - SW-based LCD Configuration
+ *  @hw:   pointer to the HW structure
+ *
+ *  SW should configure the LCD from the NVM extended configuration region
+ *  as a workaround for certain parts.
+ **/
+static s32 e1000e_sw_lcd_config_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;
+	s32 ret_val;
+	u16 word_addr, reg_data, reg_addr, phy_page = 0;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	/*
+	 * Initialize the PHY from the NVM on ICH platforms.  This
+	 * is needed due to an issue where the NVM configuration is
+	 * not properly autoloaded after power transitions.
+	 * Therefore, after each PHY reset, we will load the
+	 * configuration data out of the NVM manually.
+	 */
+	if ((hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) ||
+		(hw->mac.type == e1000_pchlan)) {
+		/* Check if SW needs to configure the PHY */
+		if ((hw->device_id == E1000_DEV_ID_ICH8_IGP_M_AMT) ||
+		    (hw->device_id == E1000_DEV_ID_ICH8_IGP_M) ||
+		    (hw->mac.type == e1000_pchlan))
+			sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
+		else
+			sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG;
+
+		data = er32(FEXTNVM);
+		if (!(data & sw_cfg_mask))
+			goto out;
+
+		/* Wait for basic configuration completes before proceeding */
+		e1000e_lan_init_done_ich8lan(hw);
+
+		/*
+		 * Make sure HW does not configure LCD from PHY
+		 * extended configuration before SW configuration
+		 */
+		data = er32(EXTCNF_CTRL);
+		if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
+			goto out;
+
+		cnf_size = er32(EXTCNF_SIZE);
+		cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;
+		cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT;
+		if (!cnf_size)
+			goto out;
+
+		cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;
+		cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
+
+		if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &&
+		    (hw->mac.type == e1000_pchlan)) {
+			/*
+			 * HW configures the SMBus address and LEDs when the
+			 * OEM and LCD Write Enable bits are set in the NVM.
+			 * When both NVM bits are cleared, SW will configure
+			 * them instead.
+			 */
+			data = er32(STRAP);
+			data &= E1000_STRAP_SMBUS_ADDRESS_MASK;
+			reg_data = data >> E1000_STRAP_SMBUS_ADDRESS_SHIFT;
+			reg_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID;
+			ret_val = e1000e_write_phy_reg_hv_locked(hw, HV_SMB_ADDR,
+			                                        reg_data);
+			if (ret_val)
+				goto out;
+
+			data = er32(LEDCTL);
+			ret_val = e1000e_write_phy_reg_hv_locked(hw,
+			                                        HV_LED_CONFIG,
+			                                        (u16)data);
+			if (ret_val)
+				goto out;
+		}
+
+		/* Configure LCD from extended configuration region. */
+
+		/* cnf_base_addr is in DWORD */
+		word_addr = (u16)(cnf_base_addr << 1);
+
+		for (i = 0; i < cnf_size; i++) {
+			ret_val = e1000e_read_nvm(hw, (word_addr + i * 2), 1,
+			                           &reg_data);
+			if (ret_val)
+				goto out;
+
+			ret_val = e1000e_read_nvm(hw, (word_addr + i * 2 + 1),
+			                           1, &reg_addr);
+			if (ret_val)
+				goto out;
+
+			/* Save off the PHY page for future writes. */
+			if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) {
+				phy_page = reg_data;
+				continue;
+			}
+
+			reg_addr &= PHY_REG_MASK;
+			reg_addr |= phy_page;
+
+			ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
+			                                    reg_data);
+			if (ret_val)
+				goto out;
+		}
+	}
+
+out:
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/**
+ *  e1000e_k1_gig_workaround_hv - K1 Si workaround
+ *  @hw:   pointer to the HW structure
+ *  @link: link up bool flag
+ *
+ *  If K1 is enabled for 1Gbps, the MAC might stall when transitioning
+ *  from a lower speed.  This workaround disables K1 whenever link is at 1Gig
+ *  If link is down, the function will restore the default K1 setting located
+ *  in the NVM.
+ **/
+static s32 e1000e_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 status_reg = 0;
+	bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled;
+
+	if (hw->mac.type != e1000_pchlan)
+		goto out;
+
+	/* Wrap the whole flow with the sw flag */
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	/* Disable K1 when link is 1Gbps, otherwise use the NVM setting */
+	if (link) {
+		if (hw->phy.type == e1000_phy_82578) {
+			ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS,
+			                                      &status_reg);
+			if (ret_val)
+				goto release;
+
+			status_reg &= BM_CS_STATUS_LINK_UP |
+			              BM_CS_STATUS_RESOLVED |
+			              BM_CS_STATUS_SPEED_MASK;
+
+			if (status_reg == (BM_CS_STATUS_LINK_UP |
+			                   BM_CS_STATUS_RESOLVED |
+			                   BM_CS_STATUS_SPEED_1000))
+				k1_enable = false;
+		}
+
+		if (hw->phy.type == e1000_phy_82577) {
+			ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS,
+			                                      &status_reg);
+			if (ret_val)
+				goto release;
+
+			status_reg &= HV_M_STATUS_LINK_UP |
+			              HV_M_STATUS_AUTONEG_COMPLETE |
+			              HV_M_STATUS_SPEED_MASK;
+
+			if (status_reg == (HV_M_STATUS_LINK_UP |
+			                   HV_M_STATUS_AUTONEG_COMPLETE |
+			                   HV_M_STATUS_SPEED_1000))
+				k1_enable = false;
+		}
+
+		/* Link stall fix for link up */
+		ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),
+		                                       0x0100);
+		if (ret_val)
+			goto release;
+
+	} else {
+		/* Link stall fix for link down */
+		ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),
+		                                       0x4100);
+		if (ret_val)
+			goto release;
+	}
+
+	ret_val = e1000e_configure_k1_ich8lan(hw, k1_enable);
+
+release:
+	hw->phy.ops.release(hw);
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_configure_k1_ich8lan - Configure K1 power state
+ *  @hw: pointer to the HW structure
+ *  @enable: K1 state to configure
+ *
+ *  Configure the K1 power state based on the provided parameter.
+ *  Assumes semaphore already acquired.
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ **/
+s32 e1000e_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl_reg = 0;
+	u32 ctrl_ext = 0;
+	u32 reg = 0;
+	u16 kmrn_reg = 0;
+
+	ret_val = e1000e_read_kmrn_reg_locked(hw,
+	                                     E1000_KMRNCTRLSTA_K1_CONFIG,
+	                                     &kmrn_reg);
+	if (ret_val)
+		goto out;
+
+	if (k1_enable)
+		kmrn_reg |= E1000_KMRNCTRLSTA_K1_ENABLE;
+	else
+		kmrn_reg &= ~E1000_KMRNCTRLSTA_K1_ENABLE;
+
+	ret_val = e1000e_write_kmrn_reg_locked(hw,
+	                                      E1000_KMRNCTRLSTA_K1_CONFIG,
+	                                      kmrn_reg);
+	if (ret_val)
+		goto out;
+
+	udelay(20);
+	ctrl_ext = er32(CTRL_EXT);
+	ctrl_reg = er32(CTRL);
+
+	reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
+	reg |= E1000_CTRL_FRCSPD;
+	ew32(CTRL, reg);
+
+	E1000_WRITE_REG(hw,
+	                E1000_CTRL_EXT,
+	                ctrl_ext | E1000_CTRL_EXT_SPD_BYPS);
+	udelay(20);
+	ew32(CTRL, ctrl_reg);
+	ew32(CTRL_EXT, ctrl_ext);
+	udelay(20);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_oem_bits_config_ich8lan - SW-based LCD Configuration
+ *  @hw:       pointer to the HW structure
+ *  @d0_state: boolean if entering d0 or d3 device state
+ *
+ *  SW will configure Gbe Disable and LPLU based on the NVM. The four bits are
+ *  collectively called OEM bits.  The OEM Write Enable bit and SW Config bit
+ *  in NVM determines whether HW should configure LPLU and Gbe Disable.
+ **/
+s32 e1000e_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
+{
+	s32 ret_val = 0;
+	u32 mac_reg;
+	u16 oem_reg;
+
+	if (hw->mac.type != e1000_pchlan)
+		return ret_val;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	mac_reg = er32(EXTCNF_CTRL);
+	if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)
+		goto out;
+
+	mac_reg = er32(FEXTNVM);
+	if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M))
+		goto out;
+
+	mac_reg = er32(PHY_CTRL);
+
+	ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg);
+	if (ret_val)
+		goto out;
+
+	oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU);
+
+	if (d0_state) {
+		if (mac_reg & E1000_PHY_CTRL_GBE_DISABLE)
+			oem_reg |= HV_OEM_BITS_GBE_DIS;
+
+		if (mac_reg & E1000_PHY_CTRL_D0A_LPLU)
+			oem_reg |= HV_OEM_BITS_LPLU;
+	} else {
+		if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE)
+			oem_reg |= HV_OEM_BITS_GBE_DIS;
+
+		if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU)
+			oem_reg |= HV_OEM_BITS_LPLU;
+	}
+	/* Restart auto-neg to activate the bits */
+	if (!e1000e_check_reset_block(hw))
+		oem_reg |= HV_OEM_BITS_RESTART_AN;
+	ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
+
+out:
+	hw->phy.ops.release(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
+ *  done after every PHY reset.
+ **/
+static s32 e1000e_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mac.type != e1000_pchlan)
+		goto out;
+
+	if (((hw->phy.type == e1000_phy_82577) &&
+	     ((hw->phy.revision == 1) || (hw->phy.revision == 2))) ||
+	    ((hw->phy.type == e1000_phy_82578) && (hw->phy.revision == 1))) {
+		/* Disable generation of early preamble */
+		ret_val = e1e_wphy(hw, PHY_REG(769, 25), 0x4431);
+		if (ret_val)
+			goto out;
+
+		/* Preamble tuning for SSC */
+		ret_val = e1e_wphy(hw, PHY_REG(770, 16), 0xA204);
+		if (ret_val)
+			goto out;
+	}
+
+	if (hw->phy.type == e1000_phy_82578) {
+		/*
+		 * Return registers to default by doing a soft reset then
+		 * writing 0x3140 to the control register.
+		 */
+		if (hw->phy.revision < 2) {
+			e1000e_phy_sw_reset(hw);
+			ret_val = e1e_wphy(hw, PHY_CONTROL,
+			                                0x3140);
+		}
+	}
+
+	/* Select page 0 */
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	hw->phy.addr = 1;
+	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);
+	if (ret_val)
+		goto out;
+	hw->phy.ops.release(hw);
+
+	/*
+	 * Configure the K1 Si workaround during phy reset assuming there is
+	 * link so that it disables K1 if link is in 1Gbps.
+	 */
+	ret_val = e1000e_k1_gig_workaround_hv(hw, true);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_lan_init_done_ich8lan - Check for PHY config completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Check the appropriate indication the MAC has finished configuring the
+ *  PHY after a software reset.
+ **/
+static void e1000e_lan_init_done_ich8lan(struct e1000_hw *hw)
+{
+	u32 data, loop = E1000_ICH8_LAN_INIT_TIMEOUT;
+
+	/* Wait for basic configuration completes before proceeding */
+	do {
+		data = er32(STATUS);
+		data &= E1000_STATUS_LAN_INIT_DONE;
+		udelay(100);
+	} while ((!data) && --loop);
+
+	/*
+	 * If basic configuration is incomplete before the above loop
+	 * count reaches 0, loading the configuration from NVM will
+	 * leave the PHY in a bad state possibly resulting in no link.
+	 */
+	if (loop == 0)
+		e_dbg("LAN_INIT_DONE not set, increase timeout\n");
+
+	/* Clear the Init Done bit for the next init event */
+	data = er32(STATUS);
+	data &= ~E1000_STATUS_LAN_INIT_DONE;
+	ew32(STATUS, data);
+}
+
+/**
+ *  e1000e_phy_hw_reset_ich8lan - Performs a PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Resets the PHY
+ *  This is a function pointer entry point called by drivers
+ *  or other shared routines.
+ **/
+static s32 e1000e_phy_hw_reset_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 reg;
+
+	ret_val = e1000e_phy_hw_reset_generic(hw);
+	if (ret_val)
+		goto out;
+
+	/* Allow time for h/w to get to a quiescent state after reset */
+	msleep(10);
+
+	if (hw->mac.type == e1000_pchlan) {
+		ret_val = e1000e_hv_phy_workarounds_ich8lan(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/* Dummy read to clear the phy wakeup bit after lcd reset */
+	if (hw->mac.type == e1000_pchlan)
+		e1e_rphy(hw, BM_WUC, &reg);
+
+	/* Configure the LCD with the extended configuration region in NVM */
+	ret_val = e1000e_sw_lcd_config_ich8lan(hw);
+	if (ret_val)
+		goto out;
+
+	/* Configure the LCD with the OEM bits in NVM */
+	if (hw->mac.type == e1000_pchlan)
+		ret_val = e1000e_oem_bits_config_ich8lan(hw, true);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_phy_info_ich8lan - Calls appropriate PHY type get_phy_info
+ *  @hw: pointer to the HW structure
+ *
+ *  Wrapper for calling the get_phy_info routines for the appropriate phy type.
+ **/
+static s32 e1000e_get_phy_info_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = -E1000_ERR_PHY_TYPE;
+
+	switch (hw->phy.type) {
+	case e1000_phy_ife:
+		ret_val = e1000e_get_phy_info_ife_ich8lan(hw);
+		break;
+	case e1000_phy_igp_3:
+	case e1000_phy_bm:
+	case e1000_phy_82578:
+	case e1000_phy_82577:
+		ret_val = e1000e_get_phy_info_igp(hw);
+		break;
+	default:
+		break;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_phy_info_ife_ich8lan - Retrieves various IFE PHY states
+ *  @hw: pointer to the HW structure
+ *
+ *  Populates "phy" structure with various feature states.
+ *  This function is only called by other family-specific
+ *  routines.
+ **/
+static s32 e1000e_get_phy_info_ife_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		e_dbg("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = e1e_rphy(hw, IFE_PHY_SPECIAL_CONTROL, &data);
+	if (ret_val)
+		goto out;
+	phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE)
+	                           ? false : true;
+
+	if (phy->polarity_correction) {
+		ret_val = e1000e_check_polarity_ife(hw);
+		if (ret_val)
+			goto out;
+	} else {
+		/* Polarity is forced */
+		phy->cable_polarity = (data & IFE_PSC_FORCE_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+	}
+
+	ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? true : false;
+
+	/* The following parameters are undefined for 10/100 operation. */
+	phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+	phy->local_rx = e1000_1000t_rx_status_undefined;
+	phy->remote_rx = e1000_1000t_rx_status_undefined;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_lplu_state_pchlan - Set Low Power Link Up state
+ *  @hw: pointer to the HW structure
+ *  @active: true to enable LPLU, false to disable
+ *
+ *  Sets the LPLU state according to the active flag.  For PCH, if OEM write
+ *  bit are disabled in the NVM, writing the LPLU bits in the MAC will not set
+ *  the phy speed. This function will manually set the LPLU bit and restart
+ *  auto-neg as hw would do. D3 and D0 LPLU will call the same function
+ *  since it configures the same bit.
+ **/
+static s32 e1000e_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 oem_reg;
+
+	ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg);
+	if (ret_val)
+		goto out;
+
+	if (active)
+		oem_reg |= HV_OEM_BITS_LPLU;
+	else
+		oem_reg &= ~HV_OEM_BITS_LPLU;
+
+	oem_reg |= HV_OEM_BITS_RESTART_AN;
+	ret_val = e1e_wphy(hw, HV_OEM_BITS, oem_reg);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state
+ *  @hw: pointer to the HW structure
+ *  @active: true to enable LPLU, false to disable
+ *
+ *  Sets the LPLU D0 state according to the active flag.  When
+ *  activating LPLU this function also disables smart speed
+ *  and vice versa.  LPLU will not be activated unless the
+ *  device autonegotiation advertisement meets standards of
+ *  either 10 or 10/100 or 10/100/1000 at all duplexes.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+static s32 e1000e_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 phy_ctrl;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	if (phy->type == e1000_phy_ife)
+		goto out;
+
+	phy_ctrl = er32(PHY_CTRL);
+
+	if (active) {
+		phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU;
+		ew32(PHY_CTRL, phy_ctrl);
+
+		if (phy->type != e1000_phy_igp_3)
+			goto out;
+
+		/*
+		 * Call gig speed drop workaround on LPLU before accessing
+		 * any PHY registers
+		 */
+		if (hw->mac.type == e1000_ich8lan)
+			e1000e_gig_downshift_workaround_ich8lan(hw);
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = e1e_rphy(hw,
+		                            IGP01E1000_PHY_PORT_CONFIG,
+		                            &data);
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = e1e_wphy(hw,
+		                             IGP01E1000_PHY_PORT_CONFIG,
+		                             data);
+		if (ret_val)
+			goto out;
+	} else {
+		phy_ctrl &= ~E1000_PHY_CTRL_D0A_LPLU;
+		ew32(PHY_CTRL, phy_ctrl);
+
+		if (phy->type != e1000_phy_igp_3)
+			goto out;
+
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_d3_lplu_state_ich8lan - Set Low Power Linkup D3 state
+ *  @hw: pointer to the HW structure
+ *  @active: true to enable LPLU, false to disable
+ *
+ *  Sets the LPLU D3 state according to the active flag.  When
+ *  activating LPLU this function also disables smart speed
+ *  and vice versa.  LPLU will not be activated unless the
+ *  device autonegotiation advertisement meets standards of
+ *  either 10 or 10/100 or 10/100/1000 at all duplexes.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+static s32 e1000e_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 phy_ctrl;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	phy_ctrl = er32(PHY_CTRL);
+
+	if (!active) {
+		phy_ctrl &= ~E1000_PHY_CTRL_NOND0A_LPLU;
+		ew32(PHY_CTRL, phy_ctrl);
+
+		if (phy->type != e1000_phy_igp_3)
+			goto out;
+
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	} else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
+	           (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
+	           (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
+		phy_ctrl |= E1000_PHY_CTRL_NOND0A_LPLU;
+		ew32(PHY_CTRL, phy_ctrl);
+
+		if (phy->type != e1000_phy_igp_3)
+			goto out;
+
+		/*
+		 * Call gig speed drop workaround on LPLU before accessing
+		 * any PHY registers
+		 */
+		if (hw->mac.type == e1000_ich8lan)
+			e1000e_gig_downshift_workaround_ich8lan(hw);
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = e1e_rphy(hw,
+		                            IGP01E1000_PHY_PORT_CONFIG,
+		                            &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = e1e_wphy(hw,
+		                             IGP01E1000_PHY_PORT_CONFIG,
+		                             data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_valid_nvm_bank_detect_ich8lan - finds out the valid bank 0 or 1
+ *  @hw: pointer to the HW structure
+ *  @bank:  pointer to the variable that returns the active bank
+ *
+ *  Reads signature byte from the NVM using the flash access registers.
+ *  Word 0x13 bits 15:14 = 10b indicate a valid signature for that bank.
+ **/
+static s32 e1000e_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
+{
+	u32 eecd;
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 bank1_offset = nvm->flash_bank_size * sizeof(u16);
+	u32 act_offset = E1000_ICH_NVM_SIG_WORD * 2 + 1;
+	u8 sig_byte = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	switch (hw->mac.type) {
+	case e1000_ich8lan:
+	case e1000_ich9lan:
+		eecd = er32(EECD);
+		if ((eecd & E1000_EECD_SEC1VAL_VALID_MASK) ==
+		    E1000_EECD_SEC1VAL_VALID_MASK) {
+			if (eecd & E1000_EECD_SEC1VAL)
+				*bank = 1;
+			else
+				*bank = 0;
+
+			goto out;
+		}
+		e_dbg("Unable to determine valid NVM bank via EEC - "
+		         "reading flash signature\n");
+		/* fall-thru */
+	default:
+		/* set bank to 0 in case flash read fails */
+		*bank = 0;
+
+		/* Check bank 0 */
+		ret_val = e1000e_read_flash_byte_ich8lan(hw, act_offset,
+		                                        &sig_byte);
+		if (ret_val)
+			goto out;
+		if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+		    E1000_ICH_NVM_SIG_VALUE) {
+			*bank = 0;
+			goto out;
+		}
+
+		/* Check bank 1 */
+		ret_val = e1000e_read_flash_byte_ich8lan(hw, act_offset +
+		                                        bank1_offset,
+		                                        &sig_byte);
+		if (ret_val)
+			goto out;
+		if ((sig_byte & E1000_ICH_NVM_VALID_SIG_MASK) ==
+		    E1000_ICH_NVM_SIG_VALUE) {
+			*bank = 1;
+			goto out;
+		}
+
+		e_dbg("ERROR: No valid NVM bank present\n");
+		ret_val = -E1000_ERR_NVM;
+		break;
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_nvm_ich8lan - Read word(s) from the NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset (in bytes) of the word(s) to read.
+ *  @words: Size of data to read in words
+ *  @data: Pointer to the word(s) to read at offset.
+ *
+ *  Reads a word(s) from the NVM using the flash access registers.
+ **/
+static s32 e1000e_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
+                                  u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	u32 act_offset;
+	s32 ret_val = E1000_SUCCESS;
+	u32 bank = 0;
+	u16 i, word;
+
+	if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
+	    (words == 0)) {
+		e_dbg("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	nvm->ops.acquire(hw);
+
+	ret_val = e1000e_valid_nvm_bank_detect_ich8lan(hw, &bank);
+	if (ret_val != E1000_SUCCESS) {
+		e_dbg("Could not detect valid bank, assuming bank 0\n");
+		bank = 0;
+	}
+
+	act_offset = (bank) ? nvm->flash_bank_size : 0;
+	act_offset += offset;
+
+	ret_val = E1000_SUCCESS;
+	for (i = 0; i < words; i++) {
+		if ((dev_spec->shadow_ram) &&
+		    (dev_spec->shadow_ram[offset+i].modified)) {
+			data[i] = dev_spec->shadow_ram[offset+i].value;
+		} else {
+			ret_val = e1000e_read_flash_word_ich8lan(hw,
+			                                        act_offset + i,
+			                                        &word);
+			if (ret_val)
+				break;
+			data[i] = word;
+		}
+	}
+
+	nvm->ops.release(hw);
+
+out:
+	if (ret_val)
+		e_dbg("NVM read error: %d\n", ret_val);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_flash_cycle_init_ich8lan - Initialize flash
+ *  @hw: pointer to the HW structure
+ *
+ *  This function does initial flash setup so that a new read/write/erase cycle
+ *  can be started.
+ **/
+static s32 e1000e_flash_cycle_init_ich8lan(struct e1000_hw *hw)
+{
+	union ich8_hws_flash_status hsfsts;
+	s32 ret_val = -E1000_ERR_NVM;
+	s32 i = 0;
+
+	hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
+
+	/* Check if the flash descriptor is valid */
+	if (hsfsts.hsf_status.fldesvalid == 0) {
+		e_dbg("Flash descriptor invalid.  "
+		         "SW Sequencing must be used.");
+		goto out;
+	}
+
+	/* Clear FCERR and DAEL in hw status by writing 1 */
+	hsfsts.hsf_status.flcerr = 1;
+	hsfsts.hsf_status.dael = 1;
+
+	ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval);
+
+	/*
+	 * Either we should have a hardware SPI cycle in progress
+	 * bit to check against, in order to start a new cycle or
+	 * FDONE bit should be changed in the hardware so that it
+	 * is 1 after hardware reset, which can then be used as an
+	 * indication whether a cycle is in progress or has been
+	 * completed.
+	 */
+
+	if (hsfsts.hsf_status.flcinprog == 0) {
+		/*
+		 * There is no cycle running at present,
+		 * so we can start a cycle.
+		 * Begin by setting Flash Cycle Done.
+		 */
+		hsfsts.hsf_status.flcdone = 1;
+		ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval);
+		ret_val = E1000_SUCCESS;
+	} else {
+		/*
+		 * Otherwise poll for sometime so the current
+		 * cycle has a chance to end before giving up.
+		 */
+		for (i = 0; i < ICH_FLASH_READ_COMMAND_TIMEOUT; i++) {
+			hsfsts.regval = er16flash(
+			                                      ICH_FLASH_HSFSTS);
+			if (hsfsts.hsf_status.flcinprog == 0) {
+				ret_val = E1000_SUCCESS;
+				break;
+			}
+			udelay(1);
+		}
+		if (ret_val == E1000_SUCCESS) {
+			/*
+			 * Successful in waiting for previous cycle to timeout,
+			 * now set the Flash Cycle Done.
+			 */
+			hsfsts.hsf_status.flcdone = 1;
+			ew16flash(ICH_FLASH_HSFSTS,
+			                        hsfsts.regval);
+		} else {
+			e_dbg("Flash controller busy, cannot get access");
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_flash_cycle_ich8lan - Starts flash cycle (read/write/erase)
+ *  @hw: pointer to the HW structure
+ *  @timeout: maximum time to wait for completion
+ *
+ *  This function starts a flash cycle and waits for its completion.
+ **/
+static s32 e1000e_flash_cycle_ich8lan(struct e1000_hw *hw, u32 timeout)
+{
+	union ich8_hws_flash_ctrl hsflctl;
+	union ich8_hws_flash_status hsfsts;
+	s32 ret_val = -E1000_ERR_NVM;
+	u32 i = 0;
+
+	/* Start a cycle by writing 1 in Flash Cycle Go in Hw Flash Control */
+	hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
+	hsflctl.hsf_ctrl.flcgo = 1;
+	ew16flash(ICH_FLASH_HSFCTL, hsflctl.regval);
+
+	/* wait till FDONE bit is set to 1 */
+	do {
+		hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
+		if (hsfsts.hsf_status.flcdone == 1)
+			break;
+		udelay(1);
+	} while (i++ < timeout);
+
+	if (hsfsts.hsf_status.flcdone == 1 && hsfsts.hsf_status.flcerr == 0)
+		ret_val = E1000_SUCCESS;
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_flash_word_ich8lan - Read word from flash
+ *  @hw: pointer to the HW structure
+ *  @offset: offset to data location
+ *  @data: pointer to the location for storing the data
+ *
+ *  Reads the flash word at offset into data.  Offset is converted
+ *  to bytes before read.
+ **/
+static s32 e1000e_read_flash_word_ich8lan(struct e1000_hw *hw, u32 offset,
+                                         u16 *data)
+{
+	s32 ret_val;
+
+	if (!data) {
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Must convert offset into bytes. */
+	offset <<= 1;
+
+	ret_val = e1000e_read_flash_data_ich8lan(hw, offset, 2, data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_flash_byte_ich8lan - Read byte from flash
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset of the byte to read.
+ *  @data: Pointer to a byte to store the value read.
+ *
+ *  Reads a single byte from the NVM using the flash access registers.
+ **/
+static s32 e1000e_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
+                                         u8 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 word = 0;
+
+	ret_val = e1000e_read_flash_data_ich8lan(hw, offset, 1, &word);
+	if (ret_val)
+		goto out;
+
+	*data = (u8)word;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_flash_data_ich8lan - Read byte or word from NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset (in bytes) of the byte or word to read.
+ *  @size: Size of data to read, 1=byte 2=word
+ *  @data: Pointer to the word to store the value read.
+ *
+ *  Reads a byte or word from the NVM using the flash access registers.
+ **/
+static s32 e1000e_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
+                                         u8 size, u16 *data)
+{
+	union ich8_hws_flash_status hsfsts;
+	union ich8_hws_flash_ctrl hsflctl;
+	u32 flash_linear_addr;
+	u32 flash_data = 0;
+	s32 ret_val = -E1000_ERR_NVM;
+	u8 count = 0;
+
+	if (size < 1  || size > 2 || offset > ICH_FLASH_LINEAR_ADDR_MASK)
+		goto out;
+	flash_linear_addr = (ICH_FLASH_LINEAR_ADDR_MASK & offset) +
+	                    hw->nvm.flash_base_addr;
+
+	do {
+		udelay(1);
+		/* Steps */
+		ret_val = e1000e_flash_cycle_init_ich8lan(hw);
+		if (ret_val != E1000_SUCCESS)
+			break;
+
+		hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
+		/* 0b/1b corresponds to 1 or 2 byte size, respectively. */
+		hsflctl.hsf_ctrl.fldbcount = size - 1;
+		hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_READ;
+		ew16flash(ICH_FLASH_HSFCTL, hsflctl.regval);
+
+		ew32flash(ICH_FLASH_FADDR, flash_linear_addr);
+
+		ret_val = e1000e_flash_cycle_ich8lan(hw,
+		                                ICH_FLASH_READ_COMMAND_TIMEOUT);
+
+		/*
+		 * Check if FCERR is set to 1, if set to 1, clear it
+		 * and try the whole sequence a few more times, else
+		 * read in (shift in) the Flash Data0, the order is
+		 * least significant byte first msb to lsb
+		 */
+		if (ret_val == E1000_SUCCESS) {
+			flash_data = er32flash(ICH_FLASH_FDATA0);
+			if (size == 1)
+				*data = (u8)(flash_data & 0x000000FF);
+			else if (size == 2)
+				*data = (u16)(flash_data & 0x0000FFFF);
+			break;
+		} else {
+			/*
+			 * If we've gotten here, then things are probably
+			 * completely hosed, but if the error condition is
+			 * detected, it won't hurt to give it another try...
+			 * ICH_FLASH_CYCLE_REPEAT_COUNT times.
+			 */
+			hsfsts.regval = er16flash(
+			                                      ICH_FLASH_HSFSTS);
+			if (hsfsts.hsf_status.flcerr == 1) {
+				/* Repeat for some time before giving up. */
+				continue;
+			} else if (hsfsts.hsf_status.flcdone == 0) {
+				e_dbg("Timeout error - flash cycle "
+				         "did not complete.");
+				break;
+			}
+		}
+	} while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_nvm_ich8lan - Write word(s) to the NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset (in bytes) of the word(s) to write.
+ *  @words: Size of data to write in words
+ *  @data: Pointer to the word(s) to write at offset.
+ *
+ *  Writes a byte or word to the NVM using the flash access registers.
+ **/
+static s32 e1000e_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
+                                   u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i;
+
+	if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
+	    (words == 0)) {
+		e_dbg("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	nvm->ops.acquire(hw);
+
+	for (i = 0; i < words; i++) {
+		dev_spec->shadow_ram[offset+i].modified = true;
+		dev_spec->shadow_ram[offset+i].value = data[i];
+	}
+
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_update_nvm_checksum_ich8lan - Update the checksum for NVM
+ *  @hw: pointer to the HW structure
+ *
+ *  The NVM checksum is updated by calling the generic update_nvm_checksum,
+ *  which writes the checksum to the shadow ram.  The changes in the shadow
+ *  ram are then committed to the EEPROM by processing each bank at a time
+ *  checking for the modified bit and writing only the pending changes.
+ *  After a successful commit, the shadow ram is cleared and is ready for
+ *  future writes.
+ **/
+static s32 e1000e_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
+	s32 ret_val;
+	u16 data;
+
+	ret_val = e1000e_update_nvm_checksum_generic(hw);
+	if (ret_val)
+		goto out;
+
+	if (nvm->type != e1000_nvm_flash_sw)
+		goto out;
+
+	nvm->ops.acquire(hw);
+
+	/*
+	 * We're writing to the opposite bank so if we're on bank 1,
+	 * write to bank 0 etc.  We also need to erase the segment that
+	 * is going to be written
+	 */
+	ret_val =  e1000e_valid_nvm_bank_detect_ich8lan(hw, &bank);
+	if (ret_val != E1000_SUCCESS) {
+		e_dbg("Could not detect valid bank, assuming bank 0\n");
+		bank = 0;
+	}
+
+	if (bank == 0) {
+		new_bank_offset = nvm->flash_bank_size;
+		old_bank_offset = 0;
+		ret_val = e1000e_erase_flash_bank_ich8lan(hw, 1);
+		if (ret_val) {
+			nvm->ops.release(hw);
+			goto out;
+		}
+	} else {
+		old_bank_offset = nvm->flash_bank_size;
+		new_bank_offset = 0;
+		ret_val = e1000e_erase_flash_bank_ich8lan(hw, 0);
+		if (ret_val) {
+			nvm->ops.release(hw);
+			goto out;
+		}
+	}
+
+	for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) {
+		/*
+		 * Determine whether to write the value stored
+		 * in the other NVM bank or a modified value stored
+		 * in the shadow RAM
+		 */
+		if (dev_spec->shadow_ram[i].modified) {
+			data = dev_spec->shadow_ram[i].value;
+		} else {
+			ret_val = e1000e_read_flash_word_ich8lan(hw, i +
+			                                        old_bank_offset,
+			                                        &data);
+			if (ret_val)
+				break;
+		}
+
+		/*
+		 * If the word is 0x13, then make sure the signature bits
+		 * (15:14) are 11b until the commit has completed.
+		 * This will allow us to write 10b which indicates the
+		 * signature is valid.  We want to do this after the write
+		 * has completed so that we don't mark the segment valid
+		 * while the write is still in progress
+		 */
+		if (i == E1000_ICH_NVM_SIG_WORD)
+			data |= E1000_ICH_NVM_SIG_MASK;
+
+		/* Convert offset to bytes. */
+		act_offset = (i + new_bank_offset) << 1;
+
+		udelay(100);
+		/* Write the bytes to the new bank. */
+		ret_val = e1000e_retry_write_flash_byte_ich8lan(hw,
+		                                               act_offset,
+		                                               (u8)data);
+		if (ret_val)
+			break;
+
+		udelay(100);
+		ret_val = e1000e_retry_write_flash_byte_ich8lan(hw,
+		                                          act_offset + 1,
+		                                          (u8)(data >> 8));
+		if (ret_val)
+			break;
+	}
+
+	/*
+	 * Don't bother writing the segment valid bits if sector
+	 * programming failed.
+	 */
+	if (ret_val) {
+		e_dbg("Flash commit failed.\n");
+		nvm->ops.release(hw);
+		goto out;
+	}
+
+	/*
+	 * Finally validate the new segment by setting bit 15:14
+	 * to 10b in word 0x13 , this can be done without an
+	 * erase as well since these bits are 11 to start with
+	 * and we need to change bit 14 to 0b
+	 */
+	act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD;
+	ret_val = e1000e_read_flash_word_ich8lan(hw, act_offset, &data);
+	if (ret_val) {
+		nvm->ops.release(hw);
+		goto out;
+	}
+
+	data &= 0xBFFF;
+	ret_val = e1000e_retry_write_flash_byte_ich8lan(hw,
+	                                               act_offset * 2 + 1,
+	                                               (u8)(data >> 8));
+	if (ret_val) {
+		nvm->ops.release(hw);
+		goto out;
+	}
+
+	/*
+	 * And invalidate the previously valid segment by setting
+	 * its signature word (0x13) high_byte to 0b. This can be
+	 * done without an erase because flash erase sets all bits
+	 * to 1's. We can write 1's to 0's without an erase
+	 */
+	act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
+	ret_val = e1000e_retry_write_flash_byte_ich8lan(hw, act_offset, 0);
+	if (ret_val) {
+		nvm->ops.release(hw);
+		goto out;
+	}
+
+	/* Great!  Everything worked, we can now clear the cached entries. */
+	for (i = 0; i < E1000_ICH8_SHADOW_RAM_WORDS; i++) {
+		dev_spec->shadow_ram[i].modified = false;
+		dev_spec->shadow_ram[i].value = 0xFFFF;
+	}
+
+	nvm->ops.release(hw);
+
+	/*
+	 * Reload the EEPROM, or else modifications will not appear
+	 * until after the next adapter reset.
+	 */
+	nvm->ops.reload(hw);
+	msleep(10);
+
+out:
+	if (ret_val)
+		e_dbg("NVM update error: %d\n", ret_val);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_validate_nvm_checksum_ich8lan - Validate EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Check to see if checksum needs to be fixed by reading bit 6 in word 0x19.
+ *  If the bit is 0, that the EEPROM had been modified, but the checksum was not
+ *  calculated, in which case we need to calculate the checksum and set bit 6.
+ **/
+static s32 e1000e_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	/*
+	 * Read 0x19 and check bit 6.  If this bit is 0, the checksum
+	 * needs to be fixed.  This bit is an indication that the NVM
+	 * was prepared by OEM software and did not calculate the
+	 * checksum...a likely scenario.
+	 */
+	ret_val = e1000e_read_nvm(hw, 0x19, 1, &data);
+	if (ret_val)
+		goto out;
+
+	if ((data & 0x40) == 0) {
+		data |= 0x40;
+		ret_val = e1000e_write_nvm(hw, 0x19, 1, &data);
+		if (ret_val)
+			goto out;
+		ret_val = e1000e_update_nvm_checksum(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_validate_nvm_checksum_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_flash_data_ich8lan - Writes bytes to the NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset (in bytes) of the byte/word to read.
+ *  @size: Size of data to read, 1=byte 2=word
+ *  @data: The byte(s) to write to the NVM.
+ *
+ *  Writes one/two bytes to the NVM using the flash access registers.
+ **/
+static s32 e1000e_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
+                                          u8 size, u16 data)
+{
+	union ich8_hws_flash_status hsfsts;
+	union ich8_hws_flash_ctrl hsflctl;
+	u32 flash_linear_addr;
+	u32 flash_data = 0;
+	s32 ret_val = -E1000_ERR_NVM;
+	u8 count = 0;
+
+	if (size < 1 || size > 2 || data > size * 0xff ||
+	    offset > ICH_FLASH_LINEAR_ADDR_MASK)
+		goto out;
+
+	flash_linear_addr = (ICH_FLASH_LINEAR_ADDR_MASK & offset) +
+	                    hw->nvm.flash_base_addr;
+
+	do {
+		udelay(1);
+		/* Steps */
+		ret_val = e1000e_flash_cycle_init_ich8lan(hw);
+		if (ret_val != E1000_SUCCESS)
+			break;
+
+		hsflctl.regval = er16flash(ICH_FLASH_HSFCTL);
+		/* 0b/1b corresponds to 1 or 2 byte size, respectively. */
+		hsflctl.hsf_ctrl.fldbcount = size - 1;
+		hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_WRITE;
+		ew16flash(ICH_FLASH_HSFCTL, hsflctl.regval);
+
+		ew32flash(ICH_FLASH_FADDR, flash_linear_addr);
+
+		if (size == 1)
+			flash_data = (u32)data & 0x00FF;
+		else
+			flash_data = (u32)data;
+
+		ew32flash(ICH_FLASH_FDATA0, flash_data);
+
+		/*
+		 * check if FCERR is set to 1 , if set to 1, clear it
+		 * and try the whole sequence a few more times else done
+		 */
+		ret_val = e1000e_flash_cycle_ich8lan(hw,
+		                               ICH_FLASH_WRITE_COMMAND_TIMEOUT);
+		if (ret_val == E1000_SUCCESS)
+			break;
+
+		/*
+		 * If we're here, then things are most likely
+		 * completely hosed, but if the error condition
+		 * is detected, it won't hurt to give it another
+		 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.
+		 */
+		hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
+		if (hsfsts.hsf_status.flcerr == 1) {
+			/* Repeat for some time before giving up. */
+			continue;
+		} else if (hsfsts.hsf_status.flcdone == 0) {
+			e_dbg("Timeout error - flash cycle "
+				 "did not complete.");
+			break;
+		}
+	} while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_flash_byte_ich8lan - Write a single byte to NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The index of the byte to read.
+ *  @data: The byte to write to the NVM.
+ *
+ *  Writes a single byte to the NVM using the flash access registers.
+ **/
+static s32 e1000e_write_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
+                                          u8 data)
+{
+	u16 word = (u16)data;
+
+	return e1000e_write_flash_data_ich8lan(hw, offset, 1, word);
+}
+
+/**
+ *  e1000e_retry_write_flash_byte_ich8lan - Writes a single byte to NVM
+ *  @hw: pointer to the HW structure
+ *  @offset: The offset of the byte to write.
+ *  @byte: The byte to write to the NVM.
+ *
+ *  Writes a single byte to the NVM using the flash access registers.
+ *  Goes through a retry algorithm before giving up.
+ **/
+static s32 e1000e_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
+                                                u32 offset, u8 byte)
+{
+	s32 ret_val;
+	u16 program_retries;
+
+	ret_val = e1000e_write_flash_byte_ich8lan(hw, offset, byte);
+	if (ret_val == E1000_SUCCESS)
+		goto out;
+
+	for (program_retries = 0; program_retries < 100; program_retries++) {
+		e_dbg("Retrying Byte %2.2X at offset %u\n", byte, offset);
+		udelay(100);
+		ret_val = e1000e_write_flash_byte_ich8lan(hw, offset, byte);
+		if (ret_val == E1000_SUCCESS)
+			break;
+	}
+	if (program_retries == 100) {
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_erase_flash_bank_ich8lan - Erase a bank (4k) from NVM
+ *  @hw: pointer to the HW structure
+ *  @bank: 0 for first bank, 1 for second bank, etc.
+ *
+ *  Erases the bank specified. Each bank is a 4k block. Banks are 0 based.
+ *  bank N is 4096 * N + flash_reg_addr.
+ **/
+static s32 e1000e_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	union ich8_hws_flash_status hsfsts;
+	union ich8_hws_flash_ctrl hsflctl;
+	u32 flash_linear_addr;
+	/* bank size is in 16bit words - adjust to bytes */
+	u32 flash_bank_size = nvm->flash_bank_size * 2;
+	s32 ret_val = E1000_SUCCESS;
+	s32 count = 0;
+	s32 j, iteration, sector_size;
+
+	hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
+
+	/*
+	 * Determine HW Sector size: Read BERASE bits of hw flash status
+	 * register
+	 * 00: The Hw sector is 256 bytes, hence we need to erase 16
+	 *     consecutive sectors.  The start index for the nth Hw sector
+	 *     can be calculated as = bank * 4096 + n * 256
+	 * 01: The Hw sector is 4K bytes, hence we need to erase 1 sector.
+	 *     The start index for the nth Hw sector can be calculated
+	 *     as = bank * 4096
+	 * 10: The Hw sector is 8K bytes, nth sector = bank * 8192
+	 *     (ich9 only, otherwise error condition)
+	 * 11: The Hw sector is 64K bytes, nth sector = bank * 65536
+	 */
+	switch (hsfsts.hsf_status.berasesz) {
+	case 0:
+		/* Hw sector size 256 */
+		sector_size = ICH_FLASH_SEG_SIZE_256;
+		iteration = flash_bank_size / ICH_FLASH_SEG_SIZE_256;
+		break;
+	case 1:
+		sector_size = ICH_FLASH_SEG_SIZE_4K;
+		iteration = 1;
+		break;
+	case 2:
+		sector_size = ICH_FLASH_SEG_SIZE_8K;
+		iteration = 1;
+		break;
+	case 3:
+		sector_size = ICH_FLASH_SEG_SIZE_64K;
+		iteration = 1;
+		break;
+	default:
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Start with the base address, then add the sector offset. */
+	flash_linear_addr = hw->nvm.flash_base_addr;
+	flash_linear_addr += (bank) ? flash_bank_size : 0;
+
+	for (j = 0; j < iteration ; j++) {
+		do {
+			/* Steps */
+			ret_val = e1000e_flash_cycle_init_ich8lan(hw);
+			if (ret_val)
+				goto out;
+
+			/*
+			 * Write a value 11 (block Erase) in Flash
+			 * Cycle field in hw flash control
+			 */
+			hsflctl.regval = er16flash(
+			                                      ICH_FLASH_HSFCTL);
+			hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_ERASE;
+			ew16flash(ICH_FLASH_HSFCTL,
+			                        hsflctl.regval);
+
+			/*
+			 * Write the last 24 bits of an index within the
+			 * block into Flash Linear address field in Flash
+			 * Address.
+			 */
+			flash_linear_addr += (j * sector_size);
+			ew32flash(ICH_FLASH_FADDR,
+			                      flash_linear_addr);
+
+			ret_val = e1000e_flash_cycle_ich8lan(hw,
+			                       ICH_FLASH_ERASE_COMMAND_TIMEOUT);
+			if (ret_val == E1000_SUCCESS)
+				break;
+
+			/*
+			 * Check if FCERR is set to 1.  If 1,
+			 * clear it and try the whole sequence
+			 * a few more times else Done
+			 */
+			hsfsts.regval = er16flash(
+						      ICH_FLASH_HSFSTS);
+			if (hsfsts.hsf_status.flcerr == 1)
+				/* repeat for some time before giving up */
+				continue;
+			else if (hsfsts.hsf_status.flcdone == 0)
+				goto out;
+		} while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_valid_led_default_ich8lan - Set the default LED settings
+ *  @hw: pointer to the HW structure
+ *  @data: Pointer to the LED settings
+ *
+ *  Reads the LED default settings from the NVM to data.  If the NVM LED
+ *  settings is all 0's or F's, set the LED default to a valid LED default
+ *  setting.
+ **/
+static s32 e1000e_valid_led_default_ich8lan(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 ||
+	    *data == ID_LED_RESERVED_FFFF)
+		*data = ID_LED_DEFAULT_ICH8LAN;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_id_led_init_pchlan - store LED configurations
+ *  @hw: pointer to the HW structure
+ *
+ *  PCH does not control LEDs via the LEDCTL register, rather it uses
+ *  the PHY LED configuration register.
+ *
+ *  PCH also does not have an "always on" or "always off" mode which
+ *  complicates the ID feature.  Instead of using the "on" mode to indicate
+ *  in ledctl_mode2 the LEDs to use for ID (see e1000e_id_led_init()),
+ *  use "link_up" mode.  The LEDs will still ID on request if there is no
+ *  link based on logic in e1000e_led_[on|off]_pchlan().
+ **/
+static s32 e1000e_id_led_init_pchlan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	const u32 ledctl_on = E1000_LEDCTL_MODE_LINK_UP;
+	const u32 ledctl_off = E1000_LEDCTL_MODE_LINK_UP | E1000_PHY_LED0_IVRT;
+	u16 data, i, temp, shift;
+
+	/* Get default ID LED modes */
+	ret_val = hw->nvm.ops.valid_led_default(hw, &data);
+	if (ret_val)
+		goto out;
+
+	mac->ledctl_default = er32(LEDCTL);
+	mac->ledctl_mode1 = mac->ledctl_default;
+	mac->ledctl_mode2 = mac->ledctl_default;
+
+	for (i = 0; i < 4; i++) {
+		temp = (data >> (i << 2)) & E1000_LEDCTL_LED0_MODE_MASK;
+		shift = (i * 5);
+		switch (temp) {
+		case ID_LED_ON1_DEF2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_ON1_OFF2:
+			mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift);
+			mac->ledctl_mode1 |= (ledctl_on << shift);
+			break;
+		case ID_LED_OFF1_DEF2:
+		case ID_LED_OFF1_ON2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode1 &= ~(E1000_PHY_LED0_MASK << shift);
+			mac->ledctl_mode1 |= (ledctl_off << shift);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+		switch (temp) {
+		case ID_LED_DEF1_ON2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_OFF1_ON2:
+			mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift);
+			mac->ledctl_mode2 |= (ledctl_on << shift);
+			break;
+		case ID_LED_DEF1_OFF2:
+		case ID_LED_ON1_OFF2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode2 &= ~(E1000_PHY_LED0_MASK << shift);
+			mac->ledctl_mode2 |= (ledctl_off << shift);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_bus_info_ich8lan - Get/Set the bus type and width
+ *  @hw: pointer to the HW structure
+ *
+ *  ICH8 use the PCI Express bus, but does not contain a PCI Express Capability
+ *  register, so the the bus width is hard coded.
+ **/
+static s32 e1000e_get_bus_info_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	s32 ret_val;
+
+	ret_val = e1000e_get_bus_info_pcie(hw);
+
+	/*
+	 * ICH devices are "PCI Express"-ish.  They have
+	 * a configuration space, but do not contain
+	 * PCI Express Capability registers, so bus width
+	 * must be hardcoded.
+	 */
+	if (bus->width == e1000_bus_width_unknown)
+		bus->width = e1000_bus_width_pcie_x1;
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_reset_hw_ich8lan - Reset the hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  Does a full reset of the hardware which includes a reset of the PHY and
+ *  MAC.
+ **/
+static s32 e1000e_reset_hw_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	u16 reg;
+	u32 ctrl, kab;
+	s32 ret_val;
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = e1000e_disable_pcie_master(hw);
+	if (ret_val)
+		e_dbg("PCI-E Master disable polling has failed.\n");
+
+	e_dbg("Masking off all interrupts\n");
+	ew32(IMC, 0xffffffff);
+
+	/*
+	 * Disable the Transmit and Receive units.  Then delay to allow
+	 * any pending transactions to complete before we hit the MAC
+	 * with the global reset.
+	 */
+	ew32(RCTL, 0);
+	ew32(TCTL, E1000_TCTL_PSP);
+	e1e_flush();
+
+	msleep(10);
+
+	/* Workaround for ICH8 bit corruption issue in FIFO memory */
+	if (hw->mac.type == e1000_ich8lan) {
+		/* Set Tx and Rx buffer allocation to 8k apiece. */
+		ew32(PBA, E1000_PBA_8K);
+		/* Set Packet Buffer Size to 16k. */
+		ew32(PBS, E1000_PBS_16K);
+	}
+
+	if (hw->mac.type == e1000_pchlan) {
+		/* Save the NVM K1 bit setting*/
+		ret_val = e1000e_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &reg);
+		if (ret_val)
+			return ret_val;
+
+		if (reg & E1000_NVM_K1_ENABLE)
+			dev_spec->nvm_k1_enabled = true;
+		else
+			dev_spec->nvm_k1_enabled = false;
+	}
+
+	ctrl = er32(CTRL);
+
+	if (!e1000e_check_reset_block(hw) && !hw->phy.reset_disable) {
+		/* Clear PHY Reset Asserted bit */
+		if (hw->mac.type >= e1000_pchlan) {
+			u32 status = er32(STATUS);
+			ew32(STATUS, status &
+			                ~E1000_STATUS_PHYRA);
+		}
+
+		/*
+		 * PHY HW reset requires MAC CORE reset at the same
+		 * time to make sure the interface between MAC and the
+		 * external PHY is reset.
+		 */
+		ctrl |= E1000_CTRL_PHY_RST;
+	}
+	ret_val = e1000e_acquire_swflag_ich8lan(hw);
+	e_dbg("Issuing a global reset to ich8lan\n");
+	ew32(CTRL, (ctrl | E1000_CTRL_RST));
+	msleep(20);
+
+	if (!ret_val)
+		e1000e_release_swflag_ich8lan(hw);
+
+	if (ctrl & E1000_CTRL_PHY_RST)
+		ret_val = hw->phy.ops.get_cfg_done(hw);
+
+	if (hw->mac.type >= e1000_ich10lan) {
+		e1000e_lan_init_done_ich8lan(hw);
+	} else {
+		ret_val = e1000e_get_auto_rd_done(hw);
+		if (ret_val) {
+			/*
+			 * When auto config read does not complete, do not
+			 * return with an error. This can happen in situations
+			 * where there is no eeprom and prevents getting link.
+			 */
+			e_dbg("Auto Read Done did not complete\n");
+		}
+	}
+	/* Dummy read to clear the phy wakeup bit after lcd reset */
+	if (hw->mac.type == e1000_pchlan)
+		e1e_rphy(hw, BM_WUC, &reg);
+
+	ret_val = e1000e_sw_lcd_config_ich8lan(hw);
+	if (ret_val)
+		goto out;
+
+	if (hw->mac.type == e1000_pchlan) {
+		ret_val = e1000e_oem_bits_config_ich8lan(hw, true);
+		if (ret_val)
+			goto out;
+	}
+	/*
+	 * For PCH, this write will make sure that any noise
+	 * will be detected as a CRC error and be dropped rather than show up
+	 * as a bad packet to the DMA engine.
+	 */
+	if (hw->mac.type == e1000_pchlan)
+		ew32(CRC_OFFSET, 0x65656565);
+
+	ew32(IMC, 0xffffffff);
+	er32(ICR);
+
+	kab = er32(KABGTXD);
+	kab |= E1000_KABGTXD_BGSQLBIAS;
+	ew32(KABGTXD, kab);
+
+	if (hw->mac.type == e1000_pchlan)
+		ret_val = e1000e_hv_phy_workarounds_ich8lan(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_init_hw_ich8lan - Initialize the hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  Prepares the hardware for transmit and receive by doing the following:
+ *   - initialize hardware bits
+ *   - initialize LED identification
+ *   - setup receive address registers
+ *   - setup flow control
+ *   - setup transmit descriptors
+ *   - clear statistics
+ **/
+static s32 e1000e_init_hw_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 ctrl_ext, txdctl, snoop;
+	s32 ret_val;
+	u16 i;
+
+	e1000e_initialize_hw_bits_ich8lan(hw);
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val)
+		/* This is not fatal and we should not stop init due to this */
+		e_dbg("Error initializing identification LED\n");
+
+	/* Setup the receive address. */
+	e1000e_init_rx_addrs(hw, mac->rar_entry_count);
+
+	/* Zero out the Multicast HASH table */
+	e_dbg("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/*
+	 * The 82578 Rx buffer will stall if wakeup is enabled in host and
+	 * the ME.  Reading the BM_WUC register will clear the host wakeup bit.
+	 * Reset the phy after disabling host wakeup to reset the Rx buffer.
+	 */
+	if (hw->phy.type == e1000_phy_82578) {
+		e1e_rphy(hw, BM_WUC, &i);
+		ret_val = e1000e_phy_hw_reset_ich8lan(hw);
+		if (ret_val)
+			return ret_val;
+	}
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/* Set the transmit descriptor write-back policy for both queues */
+	txdctl = er32(TXDCTL(0));
+	txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
+		 E1000_TXDCTL_FULL_TX_DESC_WB;
+	txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) |
+	         E1000_TXDCTL_MAX_TX_DESC_PREFETCH;
+	ew32(TXDCTL(0), txdctl);
+	txdctl = er32(TXDCTL(1));
+	txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) |
+		 E1000_TXDCTL_FULL_TX_DESC_WB;
+	txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) |
+	         E1000_TXDCTL_MAX_TX_DESC_PREFETCH;
+	ew32(TXDCTL(1), txdctl);
+
+	/*
+	 * ICH8 has opposite polarity of no_snoop bits.
+	 * By default, we should use snoop behavior.
+	 */
+	if (mac->type == e1000_ich8lan)
+		snoop = PCIE_ICH8_SNOOP_ALL;
+	else
+		snoop = (u32)~(PCIE_NO_SNOOP_ALL);
+	e1000e_set_pcie_no_snoop(hw, snoop);
+
+	ctrl_ext = er32(CTRL_EXT);
+	ctrl_ext |= E1000_CTRL_EXT_RO_DIS;
+	ew32(CTRL_EXT, ctrl_ext);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000e_clear_hw_cntrs_ich8lan(hw);
+
+	return ret_val;
+}
+/**
+ *  e1000e_initialize_hw_bits_ich8lan - Initialize required hardware bits
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets/Clears required hardware bits necessary for correctly setting up the
+ *  hardware for transmit and receive.
+ **/
+static void e1000e_initialize_hw_bits_ich8lan(struct e1000_hw *hw)
+{
+	u32 reg;
+
+	/* Extended Device Control */
+	reg = er32(CTRL_EXT);
+	reg |= (1 << 22);
+	/* Enable PHY low-power state when MAC is at D3 w/o WoL */
+	if (hw->mac.type >= e1000_pchlan)
+		reg |= E1000_CTRL_EXT_PHYPDEN;
+	ew32(CTRL_EXT, reg);
+
+	/* Transmit Descriptor Control 0 */
+	reg = er32(TXDCTL(0));
+	reg |= (1 << 22);
+	ew32(TXDCTL(0), reg);
+
+	/* Transmit Descriptor Control 1 */
+	reg = er32(TXDCTL(1));
+	reg |= (1 << 22);
+	ew32(TXDCTL(1), reg);
+
+	/* Transmit Arbitration Control 0 */
+	reg = er32(TARC(0));
+	if (hw->mac.type == e1000_ich8lan)
+		reg |= (1 << 28) | (1 << 29);
+	reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27);
+	ew32(TARC(0), reg);
+
+	/* Transmit Arbitration Control 1 */
+	reg = er32(TARC(1));
+	if (er32(TCTL) & E1000_TCTL_MULR)
+		reg &= ~(1 << 28);
+	else
+		reg |= (1 << 28);
+	reg |= (1 << 24) | (1 << 26) | (1 << 30);
+	ew32(TARC(1), reg);
+
+	/* Device Status */
+	if (hw->mac.type == e1000_ich8lan) {
+		reg = er32(STATUS);
+		reg &= ~(1 << 31);
+		ew32(STATUS, reg);
+	}
+
+	return;
+}
+
+/**
+ *  e1000e_setup_link_ich8lan - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+static s32 e1000e_setup_link_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (e1000e_check_reset_block(hw))
+		goto out;
+
+	/*
+	 * ICH parts do not have a word in the NVM to determine
+	 * the default flow control setting, so we explicitly
+	 * set it to full.
+	 */
+	if (hw->fc.requested_mode == e1000_fc_default)
+		hw->fc.requested_mode = e1000_fc_full;
+
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
+
+	e_dbg("After fix-ups FlowControl is now = %x\n",
+		hw->fc.current_mode);
+
+	/* Continue to configure the copper link. */
+	ret_val = hw->mac.ops.setup_physical_interface(hw);
+	if (ret_val)
+		goto out;
+
+	ew32(FCTTV, hw->fc.pause_time);
+	if ((hw->phy.type == e1000_phy_82578) ||
+	    (hw->phy.type == e1000_phy_82577)) {
+		ret_val = e1e_wphy(hw,
+		                             PHY_REG(BM_PORT_CTRL_PAGE, 27),
+		                             hw->fc.pause_time);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_set_fc_watermarks(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_copper_link_ich8lan - Configure MAC/PHY interface
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the kumeran interface to the PHY to wait the appropriate time
+ *  when polling the PHY, then call the generic setup_copper_link to finish
+ *  configuring the copper link.
+ **/
+static s32 e1000e_setup_copper_link_ich8lan(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+	u16 reg_data;
+
+	ctrl = er32(CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ew32(CTRL, ctrl);
+
+	/*
+	 * Set the mac to wait the maximum time between each iteration
+	 * and increase the max iterations when polling the phy;
+	 * this fixes erroneous timeouts at 10Mbps.
+	 */
+	ret_val = e1000e_write_kmrn_reg(hw,
+	                                       E1000_KMRNCTRLSTA_TIMEOUTS,
+	                                       0xFFFF);
+	if (ret_val)
+		goto out;
+	ret_val = e1000e_read_kmrn_reg(hw,
+	                                      E1000_KMRNCTRLSTA_INBAND_PARAM,
+	                                      &reg_data);
+	if (ret_val)
+		goto out;
+	reg_data |= 0x3F;
+	ret_val = e1000e_write_kmrn_reg(hw,
+	                                       E1000_KMRNCTRLSTA_INBAND_PARAM,
+	                                       reg_data);
+	if (ret_val)
+		goto out;
+
+	switch (hw->phy.type) {
+	case e1000_phy_igp_3:
+		ret_val = e1000e_copper_link_setup_igp(hw);
+		if (ret_val)
+			goto out;
+		break;
+	case e1000_phy_bm:
+	case e1000_phy_82578:
+		ret_val = e1000e_copper_link_setup_m88(hw);
+		if (ret_val)
+			goto out;
+		break;
+	case e1000_phy_82577:
+		ret_val = e1000e_copper_link_setup_82577(hw);
+		if (ret_val)
+			goto out;
+		break;
+	case e1000_phy_ife:
+		ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL,
+		                               &reg_data);
+		if (ret_val)
+			goto out;
+
+		reg_data &= ~IFE_PMC_AUTO_MDIX;
+
+		switch (hw->phy.mdix) {
+		case 1:
+			reg_data &= ~IFE_PMC_FORCE_MDIX;
+			break;
+		case 2:
+			reg_data |= IFE_PMC_FORCE_MDIX;
+			break;
+		case 0:
+		default:
+			reg_data |= IFE_PMC_AUTO_MDIX;
+			break;
+		}
+		ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL,
+		                                reg_data);
+		if (ret_val)
+			goto out;
+		break;
+	default:
+		break;
+	}
+	ret_val = e1000e_setup_copper_link(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_link_up_info_ich8lan - Get current link speed and duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: pointer to store current link speed
+ *  @duplex: pointer to store the current link duplex
+ *
+ *  Calls the generic get_speed_and_duplex to retrieve the current link
+ *  information and then calls the Kumeran lock loss workaround for links at
+ *  gigabit speeds.
+ **/
+static s32 e1000e_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,
+                                          u16 *duplex)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_get_speed_and_duplex_copper(hw, speed, duplex);
+	if (ret_val)
+		goto out;
+
+	if ((hw->mac.type == e1000_ich8lan) &&
+	    (hw->phy.type == e1000_phy_igp_3) &&
+	    (*speed == SPEED_1000)) {
+		ret_val = e1000e_kmrn_lock_loss_workaround_ich8lan(hw);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_kmrn_lock_loss_workaround_ich8lan - Kumeran workaround
+ *  @hw: pointer to the HW structure
+ *
+ *  Work-around for 82566 Kumeran PCS lock loss:
+ *  On link status change (i.e. PCI reset, speed change) and link is up and
+ *  speed is gigabit-
+ *    0) if workaround is optionally disabled do nothing
+ *    1) wait 1ms for Kumeran link to come up
+ *    2) check Kumeran Diagnostic register PCS lock loss bit
+ *    3) if not set the link is locked (all is good), otherwise...
+ *    4) reset the PHY
+ *    5) repeat up to 10 times
+ *  Note: this is only called for IGP3 copper when speed is 1gb.
+ **/
+static s32 e1000e_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+	u32 phy_ctrl;
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, data;
+	bool link;
+
+	if (!(dev_spec->kmrn_lock_loss_workaround_enabled))
+		goto out;
+
+	/*
+	 * Make sure link is up before proceeding.  If not just return.
+	 * Attempting this while link is negotiating fouled up link
+	 * stability
+	 */
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (!link) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	for (i = 0; i < 10; i++) {
+		/* read once to clear */
+		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);
+		if (ret_val)
+			goto out;
+		/* and again to get new status */
+		ret_val = e1e_rphy(hw, IGP3_KMRN_DIAG, &data);
+		if (ret_val)
+			goto out;
+
+		/* check for PCS lock */
+		if (!(data & IGP3_KMRN_DIAG_PCS_LOCK_LOSS)) {
+			ret_val = E1000_SUCCESS;
+			goto out;
+		}
+
+		/* Issue PHY reset */
+		e1000e_phy_hw_reset(hw);
+		mdelay(5);
+	}
+	/* Disable GigE link negotiation */
+	phy_ctrl = er32(PHY_CTRL);
+	phy_ctrl |= (E1000_PHY_CTRL_GBE_DISABLE |
+	             E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
+	ew32(PHY_CTRL, phy_ctrl);
+
+	/*
+	 * Call gig speed drop workaround on Gig disable before accessing
+	 * any PHY registers
+	 */
+	e1000e_gig_downshift_workaround_ich8lan(hw);
+
+	/* unable to acquire PCS lock */
+	ret_val = -E1000_ERR_PHY;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_kmrn_lock_loss_workaround_ich8lan - Set Kumeran workaround state
+ *  @hw: pointer to the HW structure
+ *  @state: boolean value used to set the current Kumeran workaround state
+ *
+ *  If ICH8, set the current Kumeran workaround state (enabled - true
+ *  /disabled - false).
+ **/
+void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
+                                                 bool state)
+{
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
+
+	if (hw->mac.type != e1000_ich8lan) {
+		e_dbg("Workaround applies to ICH8 only.\n");
+		return;
+	}
+
+	dev_spec->kmrn_lock_loss_workaround_enabled = state;
+
+	return;
+}
+
+/**
+ *  e1000e_ipg3_phy_powerdown_workaround_ich8lan - Power down workaround on D3
+ *  @hw: pointer to the HW structure
+ *
+ *  Workaround for 82566 power-down on D3 entry:
+ *    1) disable gigabit link
+ *    2) write VR power-down enable
+ *    3) read it back
+ *  Continue if successful, else issue LCD reset and repeat
+ **/
+void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
+{
+	u32 reg;
+	u16 data;
+	u8  retry = 0;
+
+	if (hw->phy.type != e1000_phy_igp_3)
+		goto out;
+
+	/* Try the workaround twice (if needed) */
+	do {
+		/* Disable link */
+		reg = er32(PHY_CTRL);
+		reg |= (E1000_PHY_CTRL_GBE_DISABLE |
+		        E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
+		ew32(PHY_CTRL, reg);
+
+		/*
+		 * Call gig speed drop workaround on Gig disable before
+		 * accessing any PHY registers
+		 */
+		if (hw->mac.type == e1000_ich8lan)
+			e1000e_gig_downshift_workaround_ich8lan(hw);
+
+		/* Write VR power-down enable */
+		e1e_rphy(hw, IGP3_VR_CTRL, &data);
+		data &= ~IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
+		e1e_wphy(hw, IGP3_VR_CTRL,
+		                   data | IGP3_VR_CTRL_MODE_SHUTDOWN);
+
+		/* Read it back and test */
+		e1e_rphy(hw, IGP3_VR_CTRL, &data);
+		data &= IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
+		if ((data == IGP3_VR_CTRL_MODE_SHUTDOWN) || retry)
+			break;
+
+		/* Issue PHY reset and repeat at most one more time */
+		reg = er32(CTRL);
+		ew32(CTRL, reg | E1000_CTRL_PHY_RST);
+		retry++;
+	} while (retry);
+
+out:
+	return;
+}
+
+/**
+ *  e1000e_gig_downshift_workaround_ich8lan - WoL from S5 stops working
+ *  @hw: pointer to the HW structure
+ *
+ *  Steps to take when dropping from 1Gb/s (eg. link cable removal (LSC),
+ *  LPLU, Gig disable, MDIC PHY reset):
+ *    1) Set Kumeran Near-end loopback
+ *    2) Clear Kumeran Near-end loopback
+ *  Should only be called for ICH8[m] devices with IGP_3 Phy.
+ **/
+void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 reg_data;
+
+	if ((hw->mac.type != e1000_ich8lan) ||
+	    (hw->phy.type != e1000_phy_igp_3))
+		goto out;
+
+	ret_val = e1000e_read_kmrn_reg(hw, E1000_KMRNCTRLSTA_DIAG_OFFSET,
+	                                      &reg_data);
+	if (ret_val)
+		goto out;
+	reg_data |= E1000_KMRNCTRLSTA_DIAG_NELPBK;
+	ret_val = e1000e_write_kmrn_reg(hw,
+	                                       E1000_KMRNCTRLSTA_DIAG_OFFSET,
+	                                       reg_data);
+	if (ret_val)
+		goto out;
+	reg_data &= ~E1000_KMRNCTRLSTA_DIAG_NELPBK;
+	ret_val = e1000e_write_kmrn_reg(hw,
+	                                       E1000_KMRNCTRLSTA_DIAG_OFFSET,
+	                                       reg_data);
+out:
+	return;
+}
+
+/**
+ *  e1000e_disable_gig_wol_ich8lan - disable gig during WoL
+ *  @hw: pointer to the HW structure
+ *
+ *  During S0 to Sx transition, it is possible the link remains at gig
+ *  instead of negotiating to a lower speed.  Before going to Sx, set
+ *  'LPLU Enabled' and 'Gig Disable' to force link speed negotiation
+ *  to a lower speed.
+ *
+ *  Should only be called for applicable parts.
+ **/
+void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
+{
+	u32 phy_ctrl;
+
+	switch (hw->mac.type) {
+	case e1000_ich8lan:
+	case e1000_ich9lan:
+	case e1000_ich10lan:
+	case e1000_pchlan:
+		phy_ctrl = er32(PHY_CTRL);
+		phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
+		            E1000_PHY_CTRL_GBE_DISABLE;
+		ew32(PHY_CTRL, phy_ctrl);
+
+		if (hw->mac.type == e1000_pchlan)
+			e1000e_phy_hw_reset_ich8lan(hw);
+	default:
+		break;
+	}
+
+	return;
+}
+
+/**
+ *  e1000e_cleanup_led_ich8lan - Restore the default LED operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Return the LED back to the default configuration.
+ **/
+static s32 e1000e_cleanup_led_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.type == e1000_phy_ife)
+		ret_val = e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,
+		                              0);
+	else
+		ew32(LEDCTL, hw->mac.ledctl_default);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_led_on_ich8lan - Turn LEDs on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn on the LEDs.
+ **/
+static s32 e1000e_led_on_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.type == e1000_phy_ife)
+		ret_val = e1e_wphy(hw, IFE_PHY_SPECIAL_CONTROL_LED,
+		                (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_ON));
+	else
+		ew32(LEDCTL, hw->mac.ledctl_mode2);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_led_off_ich8lan - Turn LEDs off
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn off the LEDs.
+ **/
+static s32 e1000e_led_off_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.type == e1000_phy_ife)
+		ret_val = e1e_wphy(hw,
+		               IFE_PHY_SPECIAL_CONTROL_LED,
+		               (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_OFF));
+	else
+		ew32(LEDCTL, hw->mac.ledctl_mode1);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_led_pchlan - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use.
+ **/
+static s32 e1000e_setup_led_pchlan(struct e1000_hw *hw)
+{
+	return e1e_wphy(hw, HV_LED_CONFIG,
+					(u16)hw->mac.ledctl_mode1);
+}
+
+/**
+ *  e1000e_cleanup_led_pchlan - Restore the default LED operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Return the LED back to the default configuration.
+ **/
+static s32 e1000e_cleanup_led_pchlan(struct e1000_hw *hw)
+{
+	return e1e_wphy(hw, HV_LED_CONFIG,
+					(u16)hw->mac.ledctl_default);
+}
+
+/**
+ *  e1000e_led_on_pchlan - Turn LEDs on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn on the LEDs.
+ **/
+static s32 e1000e_led_on_pchlan(struct e1000_hw *hw)
+{
+	u16 data = (u16)hw->mac.ledctl_mode2;
+	u32 i, led;
+
+	/*
+	 * If no link, then turn LED on by setting the invert bit
+	 * for each LED that's mode is "link_up" in ledctl_mode2.
+	 */
+	if (!(er32(STATUS) & E1000_STATUS_LU)) {
+		for (i = 0; i < 3; i++) {
+			led = (data >> (i * 5)) & E1000_PHY_LED0_MASK;
+			if ((led & E1000_PHY_LED0_MODE_MASK) !=
+			    E1000_LEDCTL_MODE_LINK_UP)
+				continue;
+			if (led & E1000_PHY_LED0_IVRT)
+				data &= ~(E1000_PHY_LED0_IVRT << (i * 5));
+			else
+				data |= (E1000_PHY_LED0_IVRT << (i * 5));
+		}
+	}
+
+	return e1e_wphy(hw, HV_LED_CONFIG, data);
+}
+
+/**
+ *  e1000e_led_off_pchlan - Turn LEDs off
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn off the LEDs.
+ **/
+static s32 e1000e_led_off_pchlan(struct e1000_hw *hw)
+{
+	u16 data = (u16)hw->mac.ledctl_mode1;
+	u32 i, led;
+
+	/*
+	 * If no link, then turn LED off by clearing the invert bit
+	 * for each LED that's mode is "link_up" in ledctl_mode1.
+	 */
+	if (!(er32(STATUS) & E1000_STATUS_LU)) {
+		for (i = 0; i < 3; i++) {
+			led = (data >> (i * 5)) & E1000_PHY_LED0_MASK;
+			if ((led & E1000_PHY_LED0_MODE_MASK) !=
+			    E1000_LEDCTL_MODE_LINK_UP)
+				continue;
+			if (led & E1000_PHY_LED0_IVRT)
+				data &= ~(E1000_PHY_LED0_IVRT << (i * 5));
+			else
+				data |= (E1000_PHY_LED0_IVRT << (i * 5));
+		}
+	}
+
+	return e1e_wphy(hw, HV_LED_CONFIG, data);
+}
+
+/**
+ *  e1000e_get_cfg_done_ich8lan - Read config done bit
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the management control register for the config done bit for
+ *  completion status.  NOTE: silicon which is EEPROM-less will fail trying
+ *  to read the config done bit, so an error is *ONLY* logged and returns
+ *  E1000_SUCCESS.  If we were to return with error, EEPROM-less silicon
+ *  would not be able to be reset or change link.
+ **/
+static s32 e1000e_get_cfg_done_ich8lan(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 bank = 0;
+
+	if (hw->mac.type >= e1000_pchlan) {
+		u32 status = er32(STATUS);
+
+		if (status & E1000_STATUS_PHYRA) {
+			ew32(STATUS, status &
+			                ~E1000_STATUS_PHYRA);
+		} else
+			e_dbg("PHY Reset Asserted not set - needs delay\n");
+	}
+
+	e1000e_get_cfg_done(hw);
+
+	/* If EEPROM is not marked present, init the IGP 3 PHY manually */
+	if ((hw->mac.type != e1000_ich10lan) &&
+	    (hw->mac.type != e1000_pchlan)) {
+		if (((er32(EECD) & E1000_EECD_PRES) == 0) &&
+		    (hw->phy.type == e1000_phy_igp_3)) {
+			e1000e_phy_init_script_igp3(hw);
+		}
+	} else {
+		if (e1000e_valid_nvm_bank_detect_ich8lan(hw, &bank)) {
+			/* Maybe we should do a basic PHY config */
+			e_dbg("EEPROM not present\n");
+			ret_val = -E1000_ERR_CONFIG;
+		}
+	}
+
+	return ret_val;
+}
+
+/**
+ * e1000e_power_down_phy_copper_ich8lan - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void e1000e_power_down_phy_copper_ich8lan(struct e1000_hw *hw)
+{
+	/* If the management interface is not enabled, then power down */
+	if (!(hw->mac.ops.check_mng_mode(hw) ||
+	      e1000e_check_reset_block(hw)))
+		e1000e_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000e_clear_hw_cntrs_ich8lan - Clear statistical counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears hardware counters specific to the silicon family and calls
+ *  clear_hw_cntrs_generic to clear all general purpose counters.
+ **/
+static void e1000e_clear_hw_cntrs_ich8lan(struct e1000_hw *hw __unused)
+{
+#if 0
+	u16 phy_data;
+
+	e1000e_clear_hw_cntrs_base(hw);
+
+	er32(ALGNERRC);
+	er32(RXERRC);
+	er32(TNCRS);
+	er32(CEXTERR);
+	er32(TSCTC);
+	er32(TSCTFC);
+
+	er32(MGTPRC);
+	er32(MGTPDC);
+	er32(MGTPTC);
+
+	er32(IAC);
+	er32(ICRXOC);
+
+	/* Clear PHY statistics registers */
+	if ((hw->phy.type == e1000_phy_82578) ||
+	    (hw->phy.type == e1000_phy_82577)) {
+		e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
+		e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
+		e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
+		e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
+		e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
+		e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
+		e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
+		e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
+		e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
+		e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
+		e1e_rphy(hw, HV_DC_UPPER, &phy_data);
+		e1e_rphy(hw, HV_DC_LOWER, &phy_data);
+		e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
+		e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
+	}
+#endif
+}
+
+static struct pci_device_id e1000e_ich8lan_nics[] = {
+     PCI_ROM(0x8086, 0x104C, "E1000_DEV_ID_ICH8_IFE", "E1000_DEV_ID_ICH8_IFE", board_ich8lan),
+     PCI_ROM(0x8086, 0x10C5, "E1000_DEV_ID_ICH8_IFE_G", "E1000_DEV_ID_ICH8_IFE_G", board_ich8lan),
+     PCI_ROM(0x8086, 0x10C4, "E1000_DEV_ID_ICH8_IFE_GT", "E1000_DEV_ID_ICH8_IFE_GT", board_ich8lan),
+     PCI_ROM(0x8086, 0x104A, "E1000_DEV_ID_ICH8_IGP_AMT", "E1000_DEV_ID_ICH8_IGP_AMT", board_ich8lan),
+     PCI_ROM(0x8086, 0x104B, "E1000_DEV_ID_ICH8_IGP_C", "E1000_DEV_ID_ICH8_IGP_C", board_ich8lan),
+     PCI_ROM(0x8086, 0x104D, "E1000_DEV_ID_ICH8_IGP_M", "E1000_DEV_ID_ICH8_IGP_M", board_ich8lan),
+     PCI_ROM(0x8086, 0x1049, "E1000_DEV_ID_ICH8_IGP_M_AMT", "E1000_DEV_ID_ICH8_IGP_M_AMT", board_ich8lan),
+     PCI_ROM(0x8086, 0x1501, "E1000_DEV_ID_ICH8_82567V_3", "E1000_DEV_ID_ICH8_82567V_3", board_ich8lan),
+     PCI_ROM(0x8086, 0x10C0, "E1000_DEV_ID_ICH9_IFE", "E1000_DEV_ID_ICH9_IFE", board_ich9lan),
+     PCI_ROM(0x8086, 0x10C2, "E1000_DEV_ID_ICH9_IFE_G", "E1000_DEV_ID_ICH9_IFE_G", board_ich9lan),
+     PCI_ROM(0x8086, 0x10C3, "E1000_DEV_ID_ICH9_IFE_GT", "E1000_DEV_ID_ICH9_IFE_GT", board_ich9lan),
+     PCI_ROM(0x8086, 0x10BD, "E1000_DEV_ID_ICH9_IGP_AMT", "E1000_DEV_ID_ICH9_IGP_AMT", board_ich9lan),
+     PCI_ROM(0x8086, 0x294C, "E1000_DEV_ID_ICH9_IGP_C", "E1000_DEV_ID_ICH9_IGP_C", board_ich9lan),
+     PCI_ROM(0x8086, 0x10E5, "E1000_DEV_ID_ICH9_BM", "E1000_DEV_ID_ICH9_BM", board_ich9lan),
+     PCI_ROM(0x8086, 0x10BF, "E1000_DEV_ID_ICH9_IGP_M", "E1000_DEV_ID_ICH9_IGP_M", board_ich9lan),
+     PCI_ROM(0x8086, 0x10F5, "E1000_DEV_ID_ICH9_IGP_M_AMT", "E1000_DEV_ID_ICH9_IGP_M_AMT", board_ich9lan),
+     PCI_ROM(0x8086, 0x10CB, "E1000_DEV_ID_ICH9_IGP_M_V", "E1000_DEV_ID_ICH9_IGP_M_V", board_ich9lan),
+     PCI_ROM(0x8086, 0x10CC, "E1000_DEV_ID_ICH10_R_BM_LM", "E1000_DEV_ID_ICH10_R_BM_LM", board_ich9lan),
+     PCI_ROM(0x8086, 0x10CD, "E1000_DEV_ID_ICH10_R_BM_LF", "E1000_DEV_ID_ICH10_R_BM_LF", board_ich9lan),
+     PCI_ROM(0x8086, 0x10CE, "E1000_DEV_ID_ICH10_R_BM_V", "E1000_DEV_ID_ICH10_R_BM_V", board_ich9lan),
+     PCI_ROM(0x8086, 0x10DE, "E1000_DEV_ID_ICH10_D_BM_LM", "E1000_DEV_ID_ICH10_D_BM_LM", board_ich10lan),
+     PCI_ROM(0x8086, 0x10DF, "E1000_DEV_ID_ICH10_D_BM_LF", "E1000_DEV_ID_ICH10_D_BM_LF", board_ich10lan),
+     PCI_ROM(0x8086, 0x10EA, "E1000_DEV_ID_PCH_M_HV_LM", "E1000_DEV_ID_PCH_M_HV_LM", board_pchlan),
+     PCI_ROM(0x8086, 0x10EB, "E1000_DEV_ID_PCH_M_HV_LC", "E1000_DEV_ID_PCH_M_HV_LC", board_pchlan),
+     PCI_ROM(0x8086, 0x10EF, "E1000_DEV_ID_PCH_D_HV_DM", "E1000_DEV_ID_PCH_D_HV_DM", board_pchlan),
+     PCI_ROM(0x8086, 0x10F0, "E1000_DEV_ID_PCH_D_HV_DC", "E1000_DEV_ID_PCH_D_HV_DC", board_pchlan),
+};
+
+struct pci_driver e1000e_ich8lan_driver __pci_driver = {
+	.ids = e1000e_ich8lan_nics,
+	.id_count = (sizeof (e1000e_ich8lan_nics) / sizeof (e1000e_ich8lan_nics[0])),
+	.probe = e1000e_probe,
+	.remove = e1000e_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_ich8lan.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_ich8lan.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_ich8lan.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_ich8lan.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,196 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_ICH8LAN_H_
+#define _E1000E_ICH8LAN_H_
+
+#define ICH_FLASH_GFPREG                 0x0000
+#define ICH_FLASH_HSFSTS                 0x0004
+#define ICH_FLASH_HSFCTL                 0x0006
+#define ICH_FLASH_FADDR                  0x0008
+#define ICH_FLASH_FDATA0                 0x0010
+
+/* Requires up to 10 seconds when MNG might be accessing part. */
+#define ICH_FLASH_READ_COMMAND_TIMEOUT   10000000
+#define ICH_FLASH_WRITE_COMMAND_TIMEOUT  10000000
+#define ICH_FLASH_ERASE_COMMAND_TIMEOUT  10000000
+#define ICH_FLASH_LINEAR_ADDR_MASK       0x00FFFFFF
+#define ICH_FLASH_CYCLE_REPEAT_COUNT     10
+
+#define ICH_CYCLE_READ                   0
+#define ICH_CYCLE_WRITE                  2
+#define ICH_CYCLE_ERASE                  3
+
+#define FLASH_GFPREG_BASE_MASK           0x1FFF
+#define FLASH_SECTOR_ADDR_SHIFT          12
+
+#define ICH_FLASH_SEG_SIZE_256           256
+#define ICH_FLASH_SEG_SIZE_4K            4096
+#define ICH_FLASH_SEG_SIZE_8K            8192
+#define ICH_FLASH_SEG_SIZE_64K           65536
+#define ICH_FLASH_SECTOR_SIZE            4096
+
+#define ICH_FLASH_REG_MAPSIZE            0x00A0
+
+#define E1000_ICH_FWSM_RSPCIPHY          0x00000040 /* Reset PHY on PCI Reset */
+#define E1000_ICH_FWSM_DISSW             0x10000000 /* FW Disables SW Writes */
+/* FW established a valid mode */
+#define E1000_ICH_FWSM_FW_VALID          0x00008000
+
+#define E1000_ICH_MNG_IAMT_MODE          0x2
+
+#define ID_LED_DEFAULT_ICH8LAN  ((ID_LED_DEF1_DEF2 << 12) | \
+                                 (ID_LED_OFF1_OFF2 <<  8) | \
+                                 (ID_LED_OFF1_ON2  <<  4) | \
+                                 (ID_LED_DEF1_DEF2))
+
+#define E1000_ICH_NVM_SIG_WORD           0x13
+#define E1000_ICH_NVM_SIG_MASK           0xC000
+#define E1000_ICH_NVM_VALID_SIG_MASK     0xC0
+#define E1000_ICH_NVM_SIG_VALUE          0x80
+
+#define E1000_ICH8_LAN_INIT_TIMEOUT      1500
+
+#define E1000_FEXTNVM_SW_CONFIG        1
+#define E1000_FEXTNVM_SW_CONFIG_ICH8M (1 << 27) /* Bit redefined for ICH8M */
+
+#define PCIE_ICH8_SNOOP_ALL   PCIE_NO_SNOOP_ALL
+
+#define E1000_ICH_RAR_ENTRIES            7
+
+#define PHY_PAGE_SHIFT 5
+#define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \
+                           ((reg) & MAX_PHY_REG_ADDRESS))
+#define IGP3_KMRN_DIAG  PHY_REG(770, 19) /* KMRN Diagnostic */
+#define IGP3_VR_CTRL    PHY_REG(776, 18) /* Voltage Regulator Control */
+#define IGP3_CAPABILITY PHY_REG(776, 19) /* Capability */
+#define IGP3_PM_CTRL    PHY_REG(769, 20) /* Power Management Control */
+
+#define IGP3_KMRN_DIAG_PCS_LOCK_LOSS         0x0002
+#define IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK 0x0300
+#define IGP3_VR_CTRL_MODE_SHUTDOWN           0x0200
+#define IGP3_PM_CTRL_FORCE_PWR_DOWN          0x0020
+
+/* PHY Wakeup Registers and defines */
+#define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
+#define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
+#define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
+#define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
+#define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
+#define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
+#define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
+#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
+#define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
+
+#define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
+#define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
+#define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
+#define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
+#define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
+#define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
+#define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
+
+#define HV_LED_CONFIG		PHY_REG(768, 30) /* LED Configuration */
+#define HV_MUX_DATA_CTRL               PHY_REG(776, 16)
+#define HV_MUX_DATA_CTRL_GEN_TO_MAC    0x0400
+#define HV_MUX_DATA_CTRL_FORCE_SPEED   0x0004
+#define HV_SCC_UPPER		PHY_REG(778, 16) /* Single Collision Count */
+#define HV_SCC_LOWER		PHY_REG(778, 17)
+#define HV_ECOL_UPPER		PHY_REG(778, 18) /* Excessive Collision Count */
+#define HV_ECOL_LOWER		PHY_REG(778, 19)
+#define HV_MCC_UPPER		PHY_REG(778, 20) /* Multiple Collision Count */
+#define HV_MCC_LOWER		PHY_REG(778, 21)
+#define HV_LATECOL_UPPER	PHY_REG(778, 23) /* Late Collision Count */
+#define HV_LATECOL_LOWER	PHY_REG(778, 24)
+#define HV_COLC_UPPER		PHY_REG(778, 25) /* Collision Count */
+#define HV_COLC_LOWER		PHY_REG(778, 26)
+#define HV_DC_UPPER		PHY_REG(778, 27) /* Defer Count */
+#define HV_DC_LOWER		PHY_REG(778, 28)
+#define HV_TNCRS_UPPER		PHY_REG(778, 29) /* Transmit with no CRS */
+#define HV_TNCRS_LOWER		PHY_REG(778, 30)
+
+#define E1000_FCRTV_PCH     0x05F40 /* PCH Flow Control Refresh Timer Value */
+
+#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */
+#define E1000_NVM_K1_ENABLE 0x1  /* NVM Enable K1 bit */
+
+/* SMBus Address Phy Register */
+#define HV_SMB_ADDR            PHY_REG(768, 26)
+#define HV_SMB_ADDR_PEC_EN     0x0200
+#define HV_SMB_ADDR_VALID      0x0080
+
+/* Strapping Option Register - RO */
+#define E1000_STRAP                     0x0000C
+#define E1000_STRAP_SMBUS_ADDRESS_MASK  0x00FE0000
+#define E1000_STRAP_SMBUS_ADDRESS_SHIFT 17
+
+/* OEM Bits Phy Register */
+#define HV_OEM_BITS            PHY_REG(768, 25)
+#define HV_OEM_BITS_LPLU       0x0004 /* Low Power Link Up */
+#define HV_OEM_BITS_GBE_DIS    0x0040 /* Gigabit Disable */
+#define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
+
+#define LCD_CFG_PHY_ADDR_BIT   0x0020 /* Phy address bit from LCD Config word */
+
+#define SW_FLAG_TIMEOUT    1000 /* SW Semaphore flag timeout in milliseconds */
+
+/*
+ * Additional interrupts need to be handled for ICH family:
+ *  DSW = The FW changed the status of the DISSW bit in FWSM
+ *  PHYINT = The LAN connected device generates an interrupt
+ *  EPRST = Manageability reset event
+ */
+#define IMS_ICH_ENABLE_MASK (\
+    E1000_IMS_DSW   | \
+    E1000_IMS_PHYINT | \
+    E1000_IMS_EPRST)
+
+/* Additional interrupt register bit definitions */
+#define E1000_ICR_LSECPNC       0x00004000          /* PN threshold - client */
+#define E1000_IMS_LSECPNC       E1000_ICR_LSECPNC   /* PN threshold - client */
+#define E1000_ICS_LSECPNC       E1000_ICR_LSECPNC   /* PN threshold - client */
+
+/* Security Processing bit Indication */
+#define E1000_RXDEXT_LINKSEC_STATUS_LSECH       0x01000000
+#define E1000_RXDEXT_LINKSEC_ERROR_BIT_MASK     0x60000000
+#define E1000_RXDEXT_LINKSEC_ERROR_NO_SA_MATCH  0x20000000
+#define E1000_RXDEXT_LINKSEC_ERROR_REPLAY_ERROR 0x40000000
+#define E1000_RXDEXT_LINKSEC_ERROR_BAD_SIG      0x60000000
+
+
+void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
+                                                 bool state);
+void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
+void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
+void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
+s32 e1000e_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
+s32 e1000e_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_config);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_mac.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_mac.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_mac.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_mac.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1883 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000e.h"
+
+static u32 e1000e_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
+static s32 e1000e_set_default_fc_generic(struct e1000_hw *hw);
+static s32 e1000e_commit_fc_settings_generic(struct e1000_hw *hw);
+static s32 e1000e_poll_fiber_serdes_link_generic(struct e1000_hw *hw);
+static s32 e1000e_validate_mdi_setting_generic(struct e1000_hw *hw);
+static void e1000e_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
+
+/**
+ *  e1000e_init_mac_ops_generic - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void e1000e_init_mac_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	/* General Setup */
+	mac->ops.set_lan_id = e1000e_set_lan_id_multi_port_pcie;
+	mac->ops.read_mac_addr = e1000e_read_mac_addr_generic;
+	mac->ops.config_collision_dist = e1000e_config_collision_dist;
+	/* LINK */
+	mac->ops.wait_autoneg = e1000e_wait_autoneg;
+	/* Management */
+#if 0
+	mac->ops.mng_host_if_write = e1000e_mng_host_if_write_generic;
+	mac->ops.mng_write_cmd_header = e1000e_mng_write_cmd_header_generic;
+	mac->ops.mng_enable_host_if = e1000e_mng_enable_host_if_generic;
+#endif
+	/* VLAN, MC, etc. */
+	mac->ops.rar_set = e1000e_rar_set;
+	mac->ops.validate_mdi_setting = e1000e_validate_mdi_setting_generic;
+}
+
+/**
+ *  e1000e_get_bus_info_pcie - Get PCIe bus information
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines and stores the system bus information for a particular
+ *  network interface.  The following bus information is determined and stored:
+ *  bus speed, bus width, type (PCIe), and PCIe function.
+ **/
+s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_bus_info *bus = &hw->bus;
+
+	s32 ret_val;
+	u16 pcie_link_status;
+
+	bus->type = e1000_bus_type_pci_express;
+	bus->speed = e1000_bus_speed_2500;
+
+	ret_val = e1000e_read_pcie_cap_reg(hw,
+	                                  PCIE_LINK_STATUS,
+	                                  &pcie_link_status);
+	if (ret_val)
+		bus->width = e1000_bus_width_unknown;
+	else
+		bus->width = (enum e1000_bus_width)((pcie_link_status &
+		                                PCIE_LINK_WIDTH_MASK) >>
+		                               PCIE_LINK_WIDTH_SHIFT);
+
+	mac->ops.set_lan_id(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
+ *
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers
+ *  and swaps the port value if requested.
+ **/
+static void e1000e_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	u32 reg;
+
+	/*
+	 * The status register reports the correct function number
+	 * for the device regardless of function swap state.
+	 */
+	reg = er32(STATUS);
+	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
+}
+
+/**
+ *  e1000e_set_lan_id_single_port - Set LAN id for a single port device
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the LAN function id to zero for a single port device.
+ **/
+void e1000e_set_lan_id_single_port(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+
+	bus->func = 0;
+}
+
+/**
+ *  e1000e_clear_vfta_generic - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the register array which contains the VLAN filter table by
+ *  setting all the values to 0.
+ **/
+void e1000e_clear_vfta_generic(struct e1000_hw *hw)
+{
+	u32 offset;
+
+	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
+		E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
+		e1e_flush();
+	}
+}
+
+/**
+ *  e1000e_write_vfta_generic - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset in VLAN filter table
+ *  @value: register value written to VLAN filter table
+ *
+ *  Writes value at the given offset in the register array which stores
+ *  the VLAN filter table.
+ **/
+void e1000e_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
+	e1e_flush();
+}
+
+/**
+ *  e1000e_init_rx_addrs - Initialize receive address's
+ *  @hw: pointer to the HW structure
+ *  @rar_count: receive address registers
+ *
+ *  Setups the receive address registers by setting the base receive address
+ *  register to the devices MAC address and clearing all the other receive
+ *  address registers to 0.
+ **/
+void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
+{
+	u32 i;
+	u8 mac_addr[ETH_ADDR_LEN] = {0};
+
+	/* Setup the receive address */
+	e_dbg("Programming MAC Address into RAR[0]\n");
+
+	hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
+
+	/* Zero out the other (rar_entry_count - 1) receive addresses */
+	e_dbg("Clearing RAR[1-%u]\n", rar_count-1);
+	for (i = 1; i < rar_count; i++)
+		hw->mac.ops.rar_set(hw, mac_addr, i);
+}
+
+/**
+ *  e1000e_check_alt_mac_addr_generic - Check for alternate MAC addr
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the nvm for an alternate MAC address.  An alternate MAC address
+ *  can be setup by pre-boot software and must be treated like a permanent
+ *  address and must override the actual permanent MAC address. If an
+ *  alternate MAC address is found it is programmed into RAR0, replacing
+ *  the permanent address that was installed into RAR0 by the Si on reset.
+ *  This function will return SUCCESS unless it encounters an error while
+ *  reading the EEPROM.
+ **/
+s32 e1000e_check_alt_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 i;
+	s32 ret_val = E1000_SUCCESS;
+	u16 offset, nvm_alt_mac_addr_offset, nvm_data;
+	u8 alt_mac_addr[ETH_ADDR_LEN];
+
+	ret_val = e1000e_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1,
+	                         &nvm_alt_mac_addr_offset);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+
+	if (nvm_alt_mac_addr_offset == 0xFFFF) {
+		/* There is no Alternate MAC Address */
+		goto out;
+	}
+
+	if (hw->bus.func == E1000_FUNC_1)
+		nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1;
+	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+		offset = nvm_alt_mac_addr_offset + (i >> 1);
+		ret_val = e1000e_read_nvm(hw, offset, 1, &nvm_data);
+		if (ret_val) {
+			e_dbg("NVM Read Error\n");
+			goto out;
+		}
+
+		alt_mac_addr[i] = (u8)(nvm_data & 0xFF);
+		alt_mac_addr[i + 1] = (u8)(nvm_data >> 8);
+	}
+
+	/* if multicast bit is set, the alternate address will not be used */
+	if (alt_mac_addr[0] & 0x01) {
+		e_dbg("Ignoring Alternate Mac Address with MC bit set\n");
+		goto out;
+	}
+
+	/*
+	 * We have a valid alternate MAC address, and we want to treat it the
+	 * same as the normal permanent MAC address stored by the HW into the
+	 * RAR. Do this by mapping this address into RAR0.
+	 */
+	hw->mac.ops.rar_set(hw, alt_mac_addr, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_rar_set - Set receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: pointer to the receive address
+ *  @index: receive address array register
+ *
+ *  Sets the receive address array register at index to the address passed
+ *  in by addr.
+ **/
+void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	u32 rar_low, rar_high;
+
+	/*
+	 * HW expects these in little endian so we reverse the byte order
+	 * from network order (big endian) to little endian
+	 */
+	rar_low = ((u32) addr[0] |
+	           ((u32) addr[1] << 8) |
+	           ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+
+	rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
+
+	/* If MAC address zero, no need to set the AV bit */
+	if (rar_low || rar_high)
+		rar_high |= E1000_RAH_AV;
+
+	/*
+	 * Some bridges will combine consecutive 32-bit writes into
+	 * a single burst write, which will malfunction on some parts.
+	 * The flushes avoid this.
+	 */
+	ew32(RAL(index), rar_low);
+	e1e_flush();
+	ew32(RAH(index), rar_high);
+	e1e_flush();
+}
+
+/**
+ *  e1000e_mta_set_generic - Set multicast filter table address
+ *  @hw: pointer to the HW structure
+ *  @hash_value: determines the MTA register and bit to set
+ *
+ *  The multicast table address is a register array of 32-bit registers.
+ *  The hash_value is used to determine what register the bit is in, the
+ *  current value is read, the new bit is OR'd in and the new value is
+ *  written back into the register.
+ **/
+void e1000e_mta_set_generic(struct e1000_hw *hw, u32 hash_value)
+{
+	u32 hash_bit, hash_reg, mta;
+
+	/*
+	 * The MTA is a register array of 32-bit registers. It is
+	 * treated like an array of (32*mta_reg_count) bits.  We want to
+	 * set bit BitArray[hash_value]. So we figure out what register
+	 * the bit is in, read it, OR in the new bit, then write
+	 * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
+	 * mask to bits 31:5 of the hash value which gives us the
+	 * register we're modifying.  The hash bit within that register
+	 * is determined by the lower 5 bits of the hash value.
+	 */
+	hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+	hash_bit = hash_value & 0x1F;
+
+	mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
+
+	mta |= (1 << hash_bit);
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
+	e1e_flush();
+}
+
+/**
+ *  e1000e_update_mc_addr_list_generic - Update Multicast addresses
+ *  @hw: pointer to the HW structure
+ *  @mc_addr_list: array of multicast addresses to program
+ *  @mc_addr_count: number of multicast addresses to program
+ *
+ *  Updates entire Multicast Table Array.
+ *  The caller must have a packed mc_addr_list of multicast addresses.
+ **/
+void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
+                                       u8 *mc_addr_list, u32 mc_addr_count)
+{
+	u32 hash_value, hash_bit, hash_reg;
+	int i;
+
+	/* clear mta_shadow */
+	memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
+
+	/* update mta_shadow from mc_addr_list */
+	for (i = 0; (u32) i < mc_addr_count; i++) {
+		hash_value = e1000e_hash_mc_addr_generic(hw, mc_addr_list);
+
+		hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+		hash_bit = hash_value & 0x1F;
+
+		hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);
+		mc_addr_list += (ETH_ADDR_LEN);
+	}
+
+	/* replace the entire MTA table */
+	for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);
+	e1e_flush();
+}
+
+/**
+ *  e1000e_hash_mc_addr_generic - Generate a multicast hash value
+ *  @hw: pointer to the HW structure
+ *  @mc_addr: pointer to a multicast address
+ *
+ *  Generates a multicast address hash value which is used to determine
+ *  the multicast filter table array address and new table value.  See
+ *  e1000e_mta_set_generic()
+ **/
+static u32 e1000e_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
+{
+	u32 hash_value, hash_mask;
+	u8 bit_shift = 0;
+
+	/* Register count multiplied by bits per register */
+	hash_mask = (hw->mac.mta_reg_count * 32) - 1;
+
+	/*
+	 * For a mc_filter_type of 0, bit_shift is the number of left-shifts
+	 * where 0xFF would still fall within the hash mask.
+	 */
+	while (hash_mask >> bit_shift != 0xFF)
+		bit_shift++;
+
+	/*
+	 * The portion of the address that is used for the hash table
+	 * is determined by the mc_filter_type setting.
+	 * The algorithm is such that there is a total of 8 bits of shifting.
+	 * The bit_shift for a mc_filter_type of 0 represents the number of
+	 * left-shifts where the MSB of mc_addr[5] would still fall within
+	 * the hash_mask.  Case 0 does this exactly.  Since there are a total
+	 * of 8 bits of shifting, then mc_addr[4] will shift right the
+	 * remaining number of bits. Thus 8 - bit_shift.  The rest of the
+	 * cases are a variation of this algorithm...essentially raising the
+	 * number of bits to shift mc_addr[5] left, while still keeping the
+	 * 8-bit shifting total.
+	 *
+	 * For example, given the following Destination MAC Address and an
+	 * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),
+	 * we can see that the bit_shift for case 0 is 4.  These are the hash
+	 * values resulting from each mc_filter_type...
+	 * [0] [1] [2] [3] [4] [5]
+	 * 01  AA  00  12  34  56
+	 * LSB                 MSB
+	 *
+	 * case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563
+	 * case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6
+	 * case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163
+	 * case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634
+	 */
+	switch (hw->mac.mc_filter_type) {
+	default:
+	case 0:
+		break;
+	case 1:
+		bit_shift += 1;
+		break;
+	case 2:
+		bit_shift += 2;
+		break;
+	case 3:
+		bit_shift += 4;
+		break;
+	}
+
+	hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
+	                          (((u16) mc_addr[5]) << bit_shift)));
+
+	return hash_value;
+}
+
+/**
+ *  e1000e_clear_hw_cntrs_base - Clear base hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the base hardware counters by reading the counter registers.
+ **/
+void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw __unused)
+{
+#if 0
+	er32(CRCERRS);
+	er32(SYMERRS);
+	er32(MPC);
+	er32(SCC);
+	er32(ECOL);
+	er32(MCC);
+	er32(LATECOL);
+	er32(COLC);
+	er32(DC);
+	er32(SEC);
+	er32(RLEC);
+	er32(XONRXC);
+	er32(XONTXC);
+	er32(XOFFRXC);
+	er32(XOFFTXC);
+	er32(FCRUC);
+	er32(GPRC);
+	er32(BPRC);
+	er32(MPRC);
+	er32(GPTC);
+	er32(GORCL);
+	er32(GORCH);
+	er32(GOTCL);
+	er32(GOTCH);
+	er32(RNBC);
+	er32(RUC);
+	er32(RFC);
+	er32(ROC);
+	er32(RJC);
+	er32(TORL);
+	er32(TORH);
+	er32(TOTL);
+	er32(TOTH);
+	er32(TPR);
+	er32(TPT);
+	er32(MPTC);
+	er32(BPTC);
+#endif
+}
+
+/**
+ *  e1000e_check_for_copper_link - Check for link (Copper)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks to see of the link status of the hardware has changed.  If a
+ *  change in link status has been detected, then we read the PHY registers
+ *  to get the current speed/duplex if link exists.
+ **/
+s32 e1000e_check_for_copper_link(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link;
+
+	/*
+	 * We only want to go out to the PHY registers to see if Auto-Neg
+	 * has completed and/or if our link status has changed.  The
+	 * get_link_status flag is set upon receiving a Link Status
+	 * Change or Rx Sequence Error interrupt.
+	 */
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/*
+	 * First we want to see if the MII Status Register reports
+	 * link.  If so, then we want to get the current speed/duplex
+	 * of the PHY.
+	 */
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link)
+		goto out; /* No link detected */
+
+	mac->get_link_status = false;
+
+	/*
+	 * Check if there was DownShift, must be checked
+	 * immediately after link-up
+	 */
+	e1000e_check_downshift(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we simply return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Auto-Neg is enabled.  Auto Speed Detection takes care
+	 * of MAC speed/duplex configuration.  So we only need to
+	 * configure Collision Distance in the MAC.
+	 */
+	e1000e_config_collision_dist(hw);
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = e1000e_config_fc_after_link_up(hw);
+	if (ret_val)
+		e_dbg("Error configuring flow control\n");
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_for_fiber_link - Check for link (Fiber)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 e1000e_check_for_fiber_link(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	ctrl = er32(CTRL);
+	status = er32(STATUS);
+	rxcw = er32(RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), the cable is plugged in (we have signal),
+	 * and our link partner is not trying to auto-negotiate with us (we
+	 * are receiving idles or data), we need to force link up. We also
+	 * need to give auto-negotiation time to complete, in case the cable
+	 * was just plugged in. The autoneg_failed flag does this.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((ctrl & E1000_CTRL_SWDPIN1) && (!(status & E1000_STATUS_LU)) &&
+	    (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		e_dbg("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = er32(CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		ew32(CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = e1000e_config_fc_after_link_up(hw);
+		if (ret_val) {
+			e_dbg("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		e_dbg("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		ew32(TXCW, mac->txcw);
+		ew32(CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_for_serdes_link - Check for link (Serdes)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 e1000e_check_for_serdes_link(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	ctrl = er32(CTRL);
+	status = er32(STATUS);
+	rxcw = er32(RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), and our link partner is not trying to
+	 * auto-negotiate with us (we are receiving idles or data),
+	 * we need to force link up. We also need to give auto-negotiation
+	 * time to complete.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((!(status & E1000_STATUS_LU)) && (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		e_dbg("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		ew32(TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = er32(CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		ew32(CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = e1000e_config_fc_after_link_up(hw);
+		if (ret_val) {
+			e_dbg("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		e_dbg("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		ew32(TXCW, mac->txcw);
+		ew32(CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	} else if (!(E1000_TXCW_ANE & er32(TXCW))) {
+		/*
+		 * If we force link for non-auto-negotiation switch, check
+		 * link status based on MAC synchronization for internal
+		 * serdes media type.
+		 */
+		/* SYNCH bit and IV bit are sticky. */
+		udelay(10);
+		rxcw = er32(RXCW);
+		if (rxcw & E1000_RXCW_SYNCH) {
+			if (!(rxcw & E1000_RXCW_IV)) {
+				mac->serdes_has_link = true;
+				e_dbg("SERDES: Link up - forced.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			e_dbg("SERDES: Link down - force failed.\n");
+		}
+	}
+
+	if (E1000_TXCW_ANE & er32(TXCW)) {
+		status = er32(STATUS);
+		if (status & E1000_STATUS_LU) {
+			/* SYNCH bit and IV bit are sticky, so reread rxcw. */
+			udelay(10);
+			rxcw = er32(RXCW);
+			if (rxcw & E1000_RXCW_SYNCH) {
+				if (!(rxcw & E1000_RXCW_IV)) {
+					mac->serdes_has_link = true;
+					e_dbg("SERDES: Link up - autoneg "
+					   "completed sucessfully.\n");
+				} else {
+					mac->serdes_has_link = false;
+					e_dbg("SERDES: Link down - invalid"
+					   "codewords detected in autoneg.\n");
+				}
+			} else {
+				mac->serdes_has_link = false;
+				e_dbg("SERDES: Link down - no sync.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			e_dbg("SERDES: Link down - autoneg failed\n");
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_link - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+s32 e1000e_setup_link(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * In the case of the phy reset being blocked, we already have a link.
+	 * We do not need to set it up again.
+	 */
+	if (hw->phy.ops.check_reset_block)
+		if (e1000e_check_reset_block(hw))
+			goto out;
+
+	/*
+	 * If requested flow control is set to default, set flow control
+	 * based on the EEPROM flow control settings.
+	 */
+	if (hw->fc.requested_mode == e1000_fc_default) {
+		ret_val = e1000e_set_default_fc_generic(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
+
+	e_dbg("After fix-ups FlowControl is now = %x\n",
+		hw->fc.current_mode);
+
+	/* Call the necessary media_type subroutine to configure the link. */
+	ret_val = hw->mac.ops.setup_physical_interface(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Initialize the flow control address, type, and PAUSE timer
+	 * registers to their default values.  This is done even if flow
+	 * control is disabled, because it does not hurt anything to
+	 * initialize these registers.
+	 */
+	e_dbg("Initializing the Flow Control address, type and timer regs\n");
+	ew32(FCT, FLOW_CONTROL_TYPE);
+	ew32(FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+	ew32(FCAL, FLOW_CONTROL_ADDRESS_LOW);
+
+	ew32(FCTTV, hw->fc.pause_time);
+
+	ret_val = e1000e_set_fc_watermarks(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_fiber_serdes_link - Setup link for fiber/serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures collision distance and flow control for fiber and serdes
+ *  links.  Upon successful setup, poll for link.
+ **/
+s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	ctrl = er32(CTRL);
+
+	/* Take the link out of reset */
+	ctrl &= ~E1000_CTRL_LRST;
+
+	e1000e_config_collision_dist(hw);
+
+	ret_val = e1000e_commit_fc_settings_generic(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Since auto-negotiation is enabled, take the link out of reset (the
+	 * link will be in reset, because we previously reset the chip). This
+	 * will restart auto-negotiation.  If auto-negotiation is successful
+	 * then the link-up status bit will be set and the flow control enable
+	 * bits (RFCE and TFCE) will be set according to their negotiated value.
+	 */
+	e_dbg("Auto-negotiation enabled\n");
+
+	ew32(CTRL, ctrl);
+	e1e_flush();
+	msleep(1);
+
+	/*
+	 * For these adapters, the SW definable pin 1 is set when the optics
+	 * detect a signal.  If we have a signal, then poll for a "Link-Up"
+	 * indication.
+	 */
+	if (hw->phy.media_type == e1000_media_type_internal_serdes ||
+	    (er32(CTRL) & E1000_CTRL_SWDPIN1)) {
+		ret_val = e1000e_poll_fiber_serdes_link_generic(hw);
+	} else {
+		e_dbg("No signal detected\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_config_collision_dist - Configure collision distance
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the collision distance to the default value and is used
+ *  during link setup. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void e1000e_config_collision_dist(struct e1000_hw *hw)
+{
+	u32 tctl;
+
+	tctl = er32(TCTL);
+
+	tctl &= ~E1000_TCTL_COLD;
+	tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
+
+	ew32(TCTL, tctl);
+	e1e_flush();
+}
+
+/**
+ *  e1000e_poll_fiber_serdes_link_generic - Poll for link up
+ *  @hw: pointer to the HW structure
+ *
+ *  Polls for link up by reading the status register, if link fails to come
+ *  up with auto-negotiation, then the link is forced if a signal is detected.
+ **/
+static s32 e1000e_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 i, status;
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * If we have a signal (the cable is plugged in, or assumed true for
+	 * serdes media) then poll for a "Link-Up" indication in the Device
+	 * Status Register.  Time-out if a link isn't seen in 500 milliseconds
+	 * seconds (Auto-negotiation should complete in less than 500
+	 * milliseconds even if the other end is doing it in SW).
+	 */
+	for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) {
+		msleep(10);
+		status = er32(STATUS);
+		if (status & E1000_STATUS_LU)
+			break;
+	}
+	if (i == FIBER_LINK_UP_LIMIT) {
+		e_dbg("Never got a valid link from auto-neg!!!\n");
+		mac->autoneg_failed = 1;
+		/*
+		 * AutoNeg failed to achieve a link, so we'll call
+		 * mac->check_for_link. This routine will force the
+		 * link up if we detect a signal. This will allow us to
+		 * communicate with non-autonegotiating link partners.
+		 */
+		ret_val = hw->mac.ops.check_for_link(hw);
+		if (ret_val) {
+			e_dbg("Error while checking for link\n");
+			goto out;
+		}
+		mac->autoneg_failed = 0;
+	} else {
+		mac->autoneg_failed = 0;
+		e_dbg("Valid Link Found\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_commit_fc_settings_generic - Configure flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  Write the flow control settings to the Transmit Config Word Register (TXCW)
+ *  base on the flow control settings in e1000_mac_info.
+ **/
+static s32 e1000e_commit_fc_settings_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 txcw;
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the device accordingly.  If auto-negotiation is enabled, then
+	 * software will have to set the "PAUSE" bits to the correct value in
+	 * the Transmit Config Word Register (TXCW) and re-start auto-
+	 * negotiation.  However, if auto-negotiation is disabled, then
+	 * software will have to manually configure the two flow control enable
+	 * bits in the CTRL register.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames,
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames but we
+	 *          do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/* Flow control completely disabled by a software over-ride. */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled and Tx Flow control is disabled
+		 * by a software over-ride. Since there really isn't a way to
+		 * advertise that we are capable of Rx Pause ONLY, we will
+		 * advertise that we support both symmetric and asymmetric RX
+		 * PAUSE.  Later, we will disable the adapter's ability to send
+		 * PAUSE frames.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is disabled,
+		 * by a software over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR);
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	default:
+		e_dbg("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+
+	ew32(TXCW, txcw);
+	mac->txcw = txcw;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_fc_watermarks - Set flow control high/low watermarks
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the flow control high/low threshold (watermark) registers.  If
+ *  flow control XON frame transmission is enabled, then set XON frame
+ *  transmission as well.
+ **/
+s32 e1000e_set_fc_watermarks(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 fcrtl = 0, fcrth = 0;
+
+	/*
+	 * Set the flow control receive threshold registers.  Normally,
+	 * these registers will be set to a default threshold that may be
+	 * adjusted later by the driver's runtime code.  However, if the
+	 * ability to transmit pause frames is not enabled, then these
+	 * registers will be set to 0.
+	 */
+	if (hw->fc.current_mode & e1000_fc_tx_pause) {
+		/*
+		 * We need to set up the Receive Threshold high and low water
+		 * marks as well as (optionally) enabling the transmission of
+		 * XON frames.
+		 */
+		fcrtl = hw->fc.low_water;
+		if (hw->fc.send_xon)
+			fcrtl |= E1000_FCRTL_XONE;
+
+		fcrth = hw->fc.high_water;
+	}
+	ew32(FCRTL, fcrtl);
+	ew32(FCRTH, fcrth);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_set_default_fc_generic - Set flow control default values
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the EEPROM for the default values for flow control and store the
+ *  values.
+ **/
+static s32 e1000e_set_default_fc_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 nvm_data;
+
+	/*
+	 * Read and store word 0x0F of the EEPROM. This word contains bits
+	 * that determine the hardware's default PAUSE (flow control) mode,
+	 * a bit that determines whether the HW defaults to enabling or
+	 * disabling auto-negotiation, and the direction of the
+	 * SW defined pins. If there is no SW over-ride of the flow
+	 * control setting, then the variable hw->fc will
+	 * be initialized based on a value in the EEPROM.
+	 */
+	ret_val = e1000e_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
+
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+
+	if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
+		hw->fc.requested_mode = e1000_fc_none;
+	else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
+		 NVM_WORD0F_ASM_DIR)
+		hw->fc.requested_mode = e1000_fc_tx_pause;
+	else
+		hw->fc.requested_mode = e1000_fc_full;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_force_mac_fc - Force the MAC's flow control settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
+ *  device control register to reflect the adapter settings.  TFCE and RFCE
+ *  need to be explicitly set by software when a copper PHY is used because
+ *  autonegotiation is managed by the PHY rather than the MAC.  Software must
+ *  also configure these bits when link is forced on a fiber connection.
+ **/
+s32 e1000e_force_mac_fc(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	ctrl = er32(CTRL);
+
+	/*
+	 * Because we didn't get link via the internal auto-negotiation
+	 * mechanism (we either forced link or we got link via PHY
+	 * auto-neg), we have to manually enable/disable transmit an
+	 * receive flow control.
+	 *
+	 * The "Case" statement below enables/disable flow control
+	 * according to the "hw->fc.current_mode" parameter.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause
+	 *          frames but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          frames but we do not receive pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
+	 *  other:  No other values should be possible at this point.
+	 */
+	e_dbg("hw->fc.current_mode = %u\n", hw->fc.current_mode);
+
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE));
+		break;
+	case e1000_fc_rx_pause:
+		ctrl &= (~E1000_CTRL_TFCE);
+		ctrl |= E1000_CTRL_RFCE;
+		break;
+	case e1000_fc_tx_pause:
+		ctrl &= (~E1000_CTRL_RFCE);
+		ctrl |= E1000_CTRL_TFCE;
+		break;
+	case e1000_fc_full:
+		ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE);
+		break;
+	default:
+		e_dbg("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ew32(CTRL, ctrl);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_config_fc_after_link_up - Configures flow control after link
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the status of auto-negotiation after link up to ensure that the
+ *  speed and duplex were not forced.  If the link needed to be forced, then
+ *  flow control needs to be forced also.  If auto-negotiation is enabled
+ *  and did not fail, then we configure flow control based on our link
+ *  partner.
+ **/
+s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+	u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;
+	u16 speed, duplex;
+
+	/*
+	 * Check for the case where we have fiber media and auto-neg failed
+	 * so we had to force link.  In this case, we need to force the
+	 * configuration of the MAC to match the "fc" parameter.
+	 */
+	if (mac->autoneg_failed) {
+		if (hw->phy.media_type == e1000_media_type_fiber ||
+		    hw->phy.media_type == e1000_media_type_internal_serdes)
+			ret_val = e1000e_force_mac_fc(hw);
+	} else {
+		if (hw->phy.media_type == e1000_media_type_copper)
+			ret_val = e1000e_force_mac_fc(hw);
+	}
+
+	if (ret_val) {
+		e_dbg("Error forcing flow control settings\n");
+		goto out;
+	}
+
+	/*
+	 * Check for the case where we have copper media and auto-neg is
+	 * enabled.  In this case, we need to check and see if Auto-Neg
+	 * has completed, and if so, how the PHY and link partner has
+	 * flow control configured.
+	 */
+	if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
+		/*
+		 * Read the MII Status Register and check to see if AutoNeg
+		 * has completed.  We read this twice because this reg has
+		 * some "sticky" (latched) bits.
+		 */
+		ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+		ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+
+		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
+			e_dbg("Copper PHY and Auto Neg "
+			         "has not completed.\n");
+			goto out;
+		}
+
+		/*
+		 * The AutoNeg process has completed, so we now need to
+		 * read both the Auto Negotiation Advertisement
+		 * Register (Address 4) and the Auto_Negotiation Base
+		 * Page Ability Register (Address 5) to determine how
+		 * flow control was negotiated.
+		 */
+		ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV,
+		                             &mii_nway_adv_reg);
+		if (ret_val)
+			goto out;
+		ret_val = e1e_rphy(hw, PHY_LP_ABILITY,
+		                             &mii_nway_lp_ability_reg);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Two bits in the Auto Negotiation Advertisement Register
+		 * (Address 4) and two bits in the Auto Negotiation Base
+		 * Page Ability Register (Address 5) determine flow control
+		 * for both the PHY and the link partner.  The following
+		 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,
+		 * 1999, describes these PAUSE resolution bits and how flow
+		 * control is determined based upon these settings.
+		 * NOTE:  DC = Don't Care
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    0    |  DC   |   DC    | e1000_fc_none
+		 *   0   |    1    |   0   |   DC    | e1000_fc_none
+		 *   0   |    1    |   1   |    0    | e1000_fc_none
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 *   1   |    0    |   0   |   DC    | e1000_fc_none
+		 *   1   |   DC    |   1   |   DC    | e1000_fc_full
+		 *   1   |    1    |   0   |    0    | e1000_fc_none
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 *
+		 * Are both PAUSE bits set to 1?  If so, this implies
+		 * Symmetric Flow Control is enabled at both ends.  The
+		 * ASM_DIR bits are irrelevant per the spec.
+		 *
+		 * For Symmetric Flow Control:
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |   DC    |   1   |   DC    | E1000_fc_full
+		 *
+		 */
+		if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		    (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
+			/*
+			 * Now we need to check if the user selected Rx ONLY
+			 * of pause frames.  In this case, we had to advertise
+			 * FULL flow control because we could not advertise RX
+			 * ONLY. Hence, we must now check to see if we need to
+			 * turn OFF  the TRANSMISSION of PAUSE frames.
+			 */
+			if (hw->fc.requested_mode == e1000_fc_full) {
+				hw->fc.current_mode = e1000_fc_full;
+				e_dbg("Flow Control = FULL.\r\n");
+			} else {
+				hw->fc.current_mode = e1000_fc_rx_pause;
+				e_dbg("Flow Control = "
+				         "RX PAUSE frames only.\r\n");
+			}
+		}
+		/*
+		 * For receiving PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 */
+		else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		          (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_tx_pause;
+			e_dbg("Flow Control = TX PAUSE frames only.\r\n");
+		}
+		/*
+		 * For transmitting PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 */
+		else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		         (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		         !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_rx_pause;
+			e_dbg("Flow Control = RX PAUSE frames only.\r\n");
+		} else {
+			/*
+			 * Per the IEEE spec, at this point flow control
+			 * should be disabled.
+			 */
+			hw->fc.current_mode = e1000_fc_none;
+			e_dbg("Flow Control = NONE.\r\n");
+		}
+
+		/*
+		 * Now we need to do one last check...  If we auto-
+		 * negotiated to HALF DUPLEX, flow control should not be
+		 * enabled per IEEE 802.3 spec.
+		 */
+		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
+		if (ret_val) {
+			e_dbg("Error getting link speed and duplex\n");
+			goto out;
+		}
+
+		if (duplex == HALF_DUPLEX)
+			hw->fc.current_mode = e1000_fc_none;
+
+		/*
+		 * Now we call a subroutine to actually force the MAC
+		 * controller to use the correct flow control settings.
+		 */
+		ret_val = e1000e_force_mac_fc(hw);
+		if (ret_val) {
+			e_dbg("Error forcing flow control settings\n");
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_speed_and_duplex_copper - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Read the status register for the current speed/duplex and store the current
+ *  speed and duplex for copper connections.
+ **/
+s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed,
+                                              u16 *duplex)
+{
+	u32 status;
+
+	status = er32(STATUS);
+	if (status & E1000_STATUS_SPEED_1000) {
+		*speed = SPEED_1000;
+		e_dbg("1000 Mbs, ");
+	} else if (status & E1000_STATUS_SPEED_100) {
+		*speed = SPEED_100;
+		e_dbg("100 Mbs, ");
+	} else {
+		*speed = SPEED_10;
+		e_dbg("10 Mbs, ");
+	}
+
+	if (status & E1000_STATUS_FD) {
+		*duplex = FULL_DUPLEX;
+		e_dbg("Full Duplex\n");
+	} else {
+		*duplex = HALF_DUPLEX;
+		e_dbg("Half Duplex\n");
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_get_speed_and_duplex_fiber_generic - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Sets the speed and duplex to gigabit full duplex (the only possible option)
+ *  for fiber/serdes links.
+ **/
+s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw __unused,
+                                                    u16 *speed, u16 *duplex)
+{
+	*speed = SPEED_1000;
+	*duplex = FULL_DUPLEX;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_get_hw_semaphore - Acquire hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the HW semaphore to access the PHY or NVM
+ **/
+s32 e1000e_get_hw_semaphore(struct e1000_hw *hw)
+{
+	u32 swsm;
+	s32 ret_val = E1000_SUCCESS;
+	s32 timeout = hw->nvm.word_size + 1;
+	s32 i = 0;
+
+	/* Get the SW semaphore */
+	while (i < timeout) {
+		swsm = er32(SWSM);
+		if (!(swsm & E1000_SWSM_SMBI))
+			break;
+
+		udelay(50);
+		i++;
+	}
+
+	if (i == timeout) {
+		e_dbg("Driver can't access device - SMBI bit is set.\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Get the FW semaphore. */
+	for (i = 0; i < timeout; i++) {
+		swsm = er32(SWSM);
+		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);
+
+		/* Semaphore acquired if bit latched */
+		if (er32(SWSM) & E1000_SWSM_SWESMBI)
+			break;
+
+		udelay(50);
+	}
+
+	if (i == timeout) {
+		/* Release semaphores */
+		e1000e_put_hw_semaphore(hw);
+		e_dbg("Driver can't access the NVM\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_put_hw_semaphore - Release hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Release hardware semaphore used to access the PHY or NVM
+ **/
+void e1000e_put_hw_semaphore(struct e1000_hw *hw)
+{
+	u32 swsm;
+
+	swsm = er32(SWSM);
+	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
+	ew32(SWSM, swsm);
+}
+/**
+ *  e1000e_get_auto_rd_done - Check for auto read completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Check EEPROM for Auto Read done bit.
+ **/
+s32 e1000e_get_auto_rd_done(struct e1000_hw *hw)
+{
+	s32 i = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	while (i < AUTO_READ_DONE_TIMEOUT) {
+		if (er32(EECD) & E1000_EECD_AUTO_RD)
+			break;
+		msleep(1);
+		i++;
+	}
+
+	if (i == AUTO_READ_DONE_TIMEOUT) {
+		e_dbg("Auto read by HW from NVM has not completed.\n");
+		ret_val = -E1000_ERR_RESET;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_valid_led_default - Verify a valid default LED config
+ *  @hw: pointer to the HW structure
+ *  @data: pointer to the NVM (EEPROM)
+ *
+ *  Read the EEPROM for the current default LED configuration.  If the
+ *  LED configuration is not valid, set to a valid LED configuration.
+ **/
+s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	ret_val = e1000e_read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF)
+		*data = ID_LED_DEFAULT;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_id_led_init -
+ *  @hw: pointer to the HW structure
+ *
+ **/
+s32 e1000e_id_led_init(struct e1000_hw *hw __unused)
+{
+#if 0
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	const u32 ledctl_mask = 0x000000FF;
+	const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;
+	const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
+	u16 data, i, temp;
+	const u16 led_mask = 0x0F;
+
+	ret_val = hw->nvm.ops.valid_led_default(hw, &data);
+	if (ret_val)
+		goto out;
+
+	mac->ledctl_default = er32(LEDCTL);
+	mac->ledctl_mode1 = mac->ledctl_default;
+	mac->ledctl_mode2 = mac->ledctl_default;
+
+	for (i = 0; i < 4; i++) {
+		temp = (data >> (i << 2)) & led_mask;
+		switch (temp) {
+		case ID_LED_ON1_DEF2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_ON1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_OFF1_DEF2:
+		case ID_LED_OFF1_ON2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+		switch (temp) {
+		case ID_LED_DEF1_ON2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_OFF1_ON2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_DEF1_OFF2:
+		case ID_LED_ON1_OFF2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+	}
+
+out:
+	return ret_val;
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_setup_led_generic - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored.
+ **/
+s32 e1000e_setup_led_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ledctl;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mac.ops.setup_led != e1000e_setup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		ledctl = er32(LEDCTL);
+		hw->mac.ledctl_default = ledctl;
+		/* Turn off LED0 */
+		ledctl &= ~(E1000_LEDCTL_LED0_IVRT |
+		            E1000_LEDCTL_LED0_BLINK |
+		            E1000_LEDCTL_LED0_MODE_MASK);
+		ledctl |= (E1000_LEDCTL_MODE_LED_OFF <<
+		           E1000_LEDCTL_LED0_MODE_SHIFT);
+		ew32(LEDCTL, ledctl);
+	} else if (hw->phy.media_type == e1000_media_type_copper) {
+		ew32(LEDCTL, hw->mac.ledctl_mode1);
+	}
+
+out:
+	return ret_val;
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_cleanup_led_generic - Set LED config to default operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Remove the current LED configuration and set the LED configuration
+ *  to the default value, saved from the EEPROM.
+ **/
+s32 e1000e_cleanup_led_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mac.ops.cleanup_led != e1000e_cleanup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ew32(LEDCTL, hw->mac.ledctl_default);
+
+out:
+	return ret_val;
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_blink_led - Blink LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Blink the LEDs which are set to be on.
+ **/
+s32 e1000e_blink_led(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ledctl_blink = 0;
+	u32 i;
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		/* always blink LED0 for PCI-E fiber */
+		ledctl_blink = E1000_LEDCTL_LED0_BLINK |
+		     (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
+	} else {
+		/*
+		 * set the blink bit for each LED that's "on" (0x0E)
+		 * in ledctl_mode2
+		 */
+		ledctl_blink = hw->mac.ledctl_mode2;
+		for (i = 0; i < 4; i++)
+			if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
+			    E1000_LEDCTL_MODE_LED_ON)
+				ledctl_blink |= (E1000_LEDCTL_LED0_BLINK <<
+				                 (i * 8));
+	}
+
+	ew32(LEDCTL, ledctl_blink);
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_led_on_generic - Turn LED on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED on.
+ **/
+s32 e1000e_led_on_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl;
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = er32(CTRL);
+		ctrl &= ~E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		ew32(CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		ew32(LEDCTL, hw->mac.ledctl_mode2);
+		break;
+	default:
+		break;
+	}
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_led_off_generic - Turn LED off
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED off.
+ **/
+s32 e1000e_led_off_generic(struct e1000_hw *hw __unused)
+{
+#if 0
+	u32 ctrl;
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = er32(CTRL);
+		ctrl |= E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		ew32(CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		ew32(LEDCTL, hw->mac.ledctl_mode1);
+		break;
+	default:
+		break;
+	}
+#endif
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_set_pcie_no_snoop - Set PCI-express capabilities
+ *  @hw: pointer to the HW structure
+ *  @no_snoop: bitmap of snoop events
+ *
+ *  Set the PCI-express register to snoop for events enabled in 'no_snoop'.
+ **/
+void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop)
+{
+	u32 gcr;
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	if (no_snoop) {
+		gcr = er32(GCR);
+		gcr &= ~(PCIE_NO_SNOOP_ALL);
+		gcr |= no_snoop;
+		ew32(GCR, gcr);
+	}
+out:
+	return;
+}
+
+/**
+ *  e1000e_disable_pcie_master - Disables PCI-express master access
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns 0 (E1000_SUCCESS) if successful, else returns -10
+ *  (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
+ *  the master requests to be disabled.
+ *
+ *  Disables PCI-Express master access and verifies there are no pending
+ *  requests.
+ **/
+s32 e1000e_disable_pcie_master(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 timeout = MASTER_DISABLE_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	ctrl = er32(CTRL);
+	ctrl |= E1000_CTRL_GIO_MASTER_DISABLE;
+	ew32(CTRL, ctrl);
+
+	while (timeout) {
+		if (!(er32(STATUS) &
+		      E1000_STATUS_GIO_MASTER_ENABLE))
+			break;
+		udelay(100);
+		timeout--;
+	}
+
+	if (!timeout) {
+		e_dbg("Master requests are pending.\n");
+		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_reset_adaptive - Reset Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the Adaptive Interframe Spacing throttle to default values.
+ **/
+void e1000e_reset_adaptive(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	if (!mac->adaptive_ifs) {
+		e_dbg("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	mac->current_ifs_val = 0;
+	mac->ifs_min_val = IFS_MIN;
+	mac->ifs_max_val = IFS_MAX;
+	mac->ifs_step_size = IFS_STEP;
+	mac->ifs_ratio = IFS_RATIO;
+
+	mac->in_ifs_mode = false;
+	ew32(AIT, 0);
+out:
+	return;
+}
+
+/**
+ *  e1000e_update_adaptive - Update Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Update the Adaptive Interframe Spacing Throttle value based on the
+ *  time between transmitted packets and time between collisions.
+ **/
+void e1000e_update_adaptive(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	if (!mac->adaptive_ifs) {
+		e_dbg("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
+		if (mac->tx_packet_delta > MIN_NUM_XMITS) {
+			mac->in_ifs_mode = true;
+			if (mac->current_ifs_val < mac->ifs_max_val) {
+				if (!mac->current_ifs_val)
+					mac->current_ifs_val = mac->ifs_min_val;
+				else
+					mac->current_ifs_val +=
+						mac->ifs_step_size;
+				ew32(AIT, mac->current_ifs_val);
+			}
+		}
+	} else {
+		if (mac->in_ifs_mode &&
+		    (mac->tx_packet_delta <= MIN_NUM_XMITS)) {
+			mac->current_ifs_val = 0;
+			mac->in_ifs_mode = false;
+			ew32(AIT, 0);
+		}
+	}
+out:
+	return;
+}
+
+/**
+ *  e1000e_validate_mdi_setting_generic - Verify MDI/MDIx settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify that when not using auto-negotiation that MDI/MDIx is correctly
+ *  set, which is forced to MDI mode only.
+ **/
+static s32 e1000e_validate_mdi_setting_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
+		e_dbg("Invalid MDI setting detected\n");
+		hw->phy.mdix = 1;
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_mac.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_mac.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_mac.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_mac.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,79 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_MAC_H_
+#define _E1000E_MAC_H_
+
+/*
+ * Functions that should not be called directly from drivers but can be used
+ * by other files in this 'shared code'
+ */
+void e1000e_init_mac_ops_generic(struct e1000_hw *hw);
+s32  e1000e_blink_led(struct e1000_hw *hw);
+s32  e1000e_check_for_copper_link(struct e1000_hw *hw);
+s32  e1000e_check_for_fiber_link(struct e1000_hw *hw);
+s32  e1000e_check_for_serdes_link(struct e1000_hw *hw);
+s32  e1000e_cleanup_led_generic(struct e1000_hw *hw);
+s32  e1000e_config_fc_after_link_up(struct e1000_hw *hw);
+s32  e1000e_disable_pcie_master(struct e1000_hw *hw);
+s32  e1000e_force_mac_fc(struct e1000_hw *hw);
+s32  e1000e_get_auto_rd_done(struct e1000_hw *hw);
+s32  e1000e_get_bus_info_pcie(struct e1000_hw *hw);
+void e1000e_set_lan_id_single_port(struct e1000_hw *hw);
+s32  e1000e_get_hw_semaphore(struct e1000_hw *hw);
+s32  e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed,
+                                               u16 *duplex);
+s32  e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw,
+                                                     u16 *speed, u16 *duplex);
+s32  e1000e_id_led_init(struct e1000_hw *hw);
+s32  e1000e_led_on_generic(struct e1000_hw *hw);
+s32  e1000e_led_off_generic(struct e1000_hw *hw);
+void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
+	                               u8 *mc_addr_list, u32 mc_addr_count);
+s32  e1000e_set_fc_watermarks(struct e1000_hw *hw);
+s32  e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
+s32  e1000e_setup_led_generic(struct e1000_hw *hw);
+s32  e1000e_setup_link(struct e1000_hw *hw);
+
+void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
+void e1000e_clear_vfta_generic(struct e1000_hw *hw);
+void e1000e_config_collision_dist(struct e1000_hw *hw);
+void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
+void e1000e_mta_set_generic(struct e1000_hw *hw, u32 hash_value);
+void e1000e_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);
+void e1000e_put_hw_semaphore(struct e1000_hw *hw);
+void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
+s32  e1000e_check_alt_mac_addr_generic(struct e1000_hw *hw);
+void e1000e_reset_adaptive(struct e1000_hw *hw);
+void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
+void e1000e_update_adaptive(struct e1000_hw *hw);
+void e1000e_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_main.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_main.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_main.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1265 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  Portions Copyright(c) 2010 Marty Connor <mdc@etherboot.org>
+  Portions Copyright(c) 2010 Entity Cyber, Inc.
+  Portions Copyright(c) 2010 Northrop Grumman Corporation
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000e.h"
+
+static s32 e1000e_get_variants_82571(struct e1000_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	static int global_quad_port_a; /* global port a indication */
+	struct pci_device *pdev = adapter->pdev;
+	u16 eeprom_data = 0;
+	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;
+
+	/* tag quad port adapters first, it's used below */
+	switch (pdev->device) {
+	case E1000_DEV_ID_82571EB_QUAD_COPPER:
+	case E1000_DEV_ID_82571EB_QUAD_FIBER:
+	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
+	case E1000_DEV_ID_82571PT_QUAD_COPPER:
+		adapter->flags |= FLAG_IS_QUAD_PORT;
+		/* mark the first port */
+		if (global_quad_port_a == 0)
+			adapter->flags |= FLAG_IS_QUAD_PORT_A;
+		/* Reset for multiple quad port adapters */
+		global_quad_port_a++;
+		if (global_quad_port_a == 4)
+			global_quad_port_a = 0;
+		break;
+	default:
+		break;
+	}
+
+	switch (adapter->hw.mac.type) {
+	case e1000_82571:
+		/* these dual ports don't have WoL on port B at all */
+		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||
+		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||
+		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&
+		    (is_port_b))
+			adapter->flags &= ~FLAG_HAS_WOL;
+		/* quad ports only support WoL on port A */
+		if (adapter->flags & FLAG_IS_QUAD_PORT &&
+		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))
+			adapter->flags &= ~FLAG_HAS_WOL;
+		/* Does not support WoL on any port */
+		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)
+			adapter->flags &= ~FLAG_HAS_WOL;
+		break;
+
+	case e1000_82573:
+		if (pdev->device == E1000_DEV_ID_82573L) {
+			if (e1000e_read_nvm(&adapter->hw, NVM_INIT_3GIO_3, 1,
+					   &eeprom_data) < 0)
+				break;
+			if (!(eeprom_data & NVM_WORD1A_ASPM_MASK)) {
+				adapter->flags |= FLAG_HAS_JUMBO_FRAMES;
+				adapter->max_hw_frame_size = DEFAULT_JUMBO;
+			}
+		}
+		break;
+
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static struct e1000_info e1000_82571_info = {
+	.mac			= e1000_82571,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+				  | FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_HAS_SMART_POWER_DOWN
+				  | FLAG_RESET_OVERWRITES_LAA /* errata */
+				  | FLAG_TARC_SPEED_MODE_BIT /* errata */
+				  | FLAG_APME_CHECK_PORT_B,
+	.pba			= 38,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_82571,
+	.get_variants		= e1000e_get_variants_82571,
+};
+
+static struct e1000_info e1000_82572_info = {
+	.mac			= e1000_82572,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+				  | FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_TARC_SPEED_MODE_BIT, /* errata */
+	.pba			= 38,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_82571,
+	.get_variants		= e1000e_get_variants_82571,
+};
+
+static struct e1000_info e1000_82573_info = {
+	.mac			= e1000_82573,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_SMART_POWER_DOWN
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_ERT
+				  | FLAG_HAS_SWSM_ON_LOAD,
+	.pba			= 20,
+	.max_hw_frame_size	= ETH_FRAME_LEN + ETH_FCS_LEN,
+	.init_ops		= e1000e_init_function_pointers_82571,
+	.get_variants		= e1000e_get_variants_82571,
+};
+
+static struct e1000_info e1000_82574_info = {
+	.mac			= e1000_82574,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+#ifdef CONFIG_E1000E_MSIX
+				  | FLAG_HAS_MSIX
+#endif
+				  | FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_SMART_POWER_DOWN
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_CTRLEXT_ON_LOAD,
+	.pba			= 20,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_82571,
+	.get_variants		= e1000e_get_variants_82571,
+};
+
+static struct e1000_info e1000_82583_info = {
+	.mac			= e1000_82583,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_SMART_POWER_DOWN
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_CTRLEXT_ON_LOAD,
+	.pba			= 20,
+	.max_hw_frame_size	= ETH_FRAME_LEN + ETH_FCS_LEN,
+	.init_ops		= e1000e_init_function_pointers_82571,
+	.get_variants		= e1000e_get_variants_82571,
+};
+
+static struct e1000_info e1000_es2_info = {
+	.mac			= e1000_80003es2lan,
+	.flags			= FLAG_HAS_HW_VLAN_FILTER
+				  | FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_HAS_WOL
+				  | FLAG_APME_IN_CTRL3
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_RX_NEEDS_RESTART /* errata */
+				  | FLAG_TARC_SET_BIT_ZERO /* errata */
+				  | FLAG_APME_CHECK_PORT_B
+				  | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
+				  | FLAG_TIPG_MEDIUM_FOR_80003ESLAN,
+	.pba			= 38,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_80003es2lan,
+	.get_variants		= NULL,
+};
+
+static s32 e1000e_get_variants_ich8lan(struct e1000_adapter *adapter)
+{
+	if (adapter->hw.phy.type == e1000_phy_ife) {
+		adapter->flags &= ~FLAG_HAS_JUMBO_FRAMES;
+		adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
+	}
+
+	if ((adapter->hw.mac.type == e1000_ich8lan) &&
+	    (adapter->hw.phy.type == e1000_phy_igp_3))
+		adapter->flags |= FLAG_LSC_GIG_SPEED_DROP;
+
+	return 0;
+}
+
+static struct e1000_info e1000_ich8_info = {
+	.mac			= e1000_ich8lan,
+	.flags			= FLAG_HAS_WOL
+				  | FLAG_IS_ICH
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_FLASH
+				  | FLAG_APME_IN_WUC,
+	.pba			= 8,
+	.max_hw_frame_size	= ETH_FRAME_LEN + ETH_FCS_LEN,
+	.init_ops		= e1000e_init_function_pointers_ich8lan,
+	.get_variants		= e1000e_get_variants_ich8lan,
+};
+
+static struct e1000_info e1000_ich9_info = {
+	.mac			= e1000_ich9lan,
+	.flags			= FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_IS_ICH
+				  | FLAG_HAS_WOL
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_ERT
+				  | FLAG_HAS_FLASH
+				  | FLAG_APME_IN_WUC,
+	.pba			= 10,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_ich8lan,
+	.get_variants		= e1000e_get_variants_ich8lan,
+};
+
+static struct e1000_info e1000_ich10_info = {
+	.mac			= e1000_ich10lan,
+	.flags			= FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_IS_ICH
+				  | FLAG_HAS_WOL
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_ERT
+				  | FLAG_HAS_FLASH
+				  | FLAG_APME_IN_WUC,
+	.pba			= 10,
+	.max_hw_frame_size	= DEFAULT_JUMBO,
+	.init_ops		= e1000e_init_function_pointers_ich8lan,
+	.get_variants		= e1000e_get_variants_ich8lan,
+};
+
+static struct e1000_info e1000_pch_info = {
+	.mac			= e1000_pchlan,
+	.flags			= FLAG_IS_ICH
+				  | FLAG_HAS_WOL
+				  | FLAG_RX_CSUM_ENABLED
+				  | FLAG_HAS_CTRLEXT_ON_LOAD
+				  | FLAG_HAS_AMT
+				  | FLAG_HAS_FLASH
+				  | FLAG_HAS_JUMBO_FRAMES
+				  | FLAG_DISABLE_FC_PAUSE_TIME /* errata */
+				  | FLAG_APME_IN_WUC,
+	.pba			= 26,
+	.max_hw_frame_size	= 4096,
+	.init_ops		= e1000e_init_function_pointers_ich8lan,
+	.get_variants		= e1000e_get_variants_ich8lan,
+};
+
+static const struct e1000_info *e1000_info_tbl[] = {
+	[board_82571]		= &e1000_82571_info,
+	[board_82572]		= &e1000_82572_info,
+	[board_82573]		= &e1000_82573_info,
+	[board_82574]		= &e1000_82574_info,
+	[board_82583]		= &e1000_82583_info,
+	[board_80003es2lan]	= &e1000_es2_info,
+	[board_ich8lan]		= &e1000_ich8_info,
+	[board_ich9lan]		= &e1000_ich9_info,
+	[board_ich10lan]	= &e1000_ich10_info,
+	[board_pchlan]		= &e1000_pch_info,
+};
+
+/* Low-level support routines */
+
+s32 e1000e_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
+{
+	u16 cap_offset;
+
+	cap_offset = pci_find_capability(hw->adapter->pdev, PCI_CAP_ID_EXP);
+	if (!cap_offset)
+		return -E1000_ERR_CONFIG;
+
+	pci_read_config_word(hw->adapter->pdev, cap_offset + reg, value);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ * e1000e_irq_disable - Mask off interrupt generation on the NIC
+ **/
+static void e1000e_irq_disable(struct e1000_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	ew32(IMC, ~0);
+	e1e_flush();
+}
+
+/**
+ * e1000e_irq_enable - Enable default interrupt generation settings
+ **/
+static void e1000e_irq_enable(struct e1000_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	ew32(IMS, IMS_ENABLE_MASK);
+	e1e_flush();
+}
+
+/**
+ * e1000_get_hw_control - get control of the h/w from f/w
+ * @adapter: address of board private structure
+ *
+ * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
+ * For ASF and Pass Through versions of f/w this means that
+ * the driver is loaded. For AMT version (only with 82573)
+ * of the f/w this means that the network i/f is open.
+ **/
+static void e1000e_get_hw_control(struct e1000_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 ctrl_ext;
+	u32 swsm;
+
+	/* Let firmware know the driver has taken over */
+	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
+		swsm = er32(SWSM);
+		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
+	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
+		ctrl_ext = er32(CTRL_EXT);
+		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
+	}
+}
+
+/**
+ * e1000e_power_up_phy - restore link in case the phy was powered down
+ * @adapter: address of board private structure
+ *
+ * The phy may be powered down to save power and turn off link when the
+ * driver is unloaded and wake on lan is not enabled (among others)
+ * *** this routine MUST be followed by a call to e1000e_reset ***
+ **/
+void e1000e_power_up_phy(struct e1000_adapter *adapter)
+{
+	if (adapter->hw.phy.ops.power_up)
+		adapter->hw.phy.ops.power_up(&adapter->hw);
+
+	adapter->hw.mac.ops.setup_link(&adapter->hw);
+}
+
+/**
+ * e1000_power_down_phy - Power down the PHY
+ *
+ * Power down the PHY so no link is implied when interface is down.
+ * The PHY cannot be powered down if management or WoL is active.
+ */
+void e1000e_power_down_phy(struct e1000_adapter *adapter)
+{
+	/* WoL is enabled */
+	if (adapter->wol)
+		return;
+
+	if (adapter->hw.phy.ops.power_down)
+		adapter->hw.phy.ops.power_down(&adapter->hw);
+}
+
+/**
+ * e1000e_reset - bring the hardware into a known good state
+ *
+ * This function boots the hardware and enables some settings that
+ * require a configuration cycle of the hardware - those cannot be
+ * set/changed during runtime. After reset the device needs to be
+ * properly configured for Rx, Tx etc.
+ */
+void e1000e_reset(struct e1000_adapter *adapter)
+{
+	struct e1000_mac_info *mac = &adapter->hw.mac;
+	struct e1000_fc_info *fc = &adapter->hw.fc;
+	u32 pba = adapter->pba;
+	struct e1000_hw *hw = &adapter->hw;
+
+	/* Reset Packet Buffer Allocation to default */
+	ew32(PBA, pba);
+
+	hw->fc.requested_mode = e1000_fc_none;
+	fc->current_mode = fc->requested_mode;
+
+	/* Allow time for pending master requests to run */
+	mac->ops.reset_hw(hw);
+
+	/*
+	 * For parts with AMT enabled, let the firmware know
+	 * that the network interface is in control
+	 */
+	if (adapter->flags & FLAG_HAS_AMT)
+		e1000e_get_hw_control(adapter);
+
+	ew32(WUC, 0);
+	if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
+		e1e_wphy(&adapter->hw, BM_WUC, 0);
+
+	if (mac->ops.init_hw(hw))
+		DBG("Hardware Error\n");
+
+	/* additional part of the flow-control workaround above */
+	if (hw->mac.type == e1000_pchlan)
+		ew32(FCRTV_PCH, 0x1000);
+
+	e1000e_reset_adaptive(hw);
+
+	e1000e_get_phy_info(hw);
+
+	if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
+	    !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
+		u16 phy_data = 0;
+		/*
+		 * speed up time to link by disabling smart power down, ignore
+		 * the return value of this function because there is nothing
+		 * different we would do if it failed
+		 */
+		e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
+		phy_data &= ~IGP02E1000_PM_SPD;
+		e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
+	}
+}
+
+static int e1000e_sw_init(struct e1000_adapter *adapter)
+{
+	s32 rc;
+
+	/* Set various function pointers */
+	adapter->ei->init_ops(&adapter->hw);
+
+	rc = adapter->hw.mac.ops.init_params(&adapter->hw);
+	if (rc)
+		return rc;
+
+	rc = adapter->hw.nvm.ops.init_params(&adapter->hw);
+	if (rc)
+		return rc;
+
+	rc = adapter->hw.phy.ops.init_params(&adapter->hw);
+	if (rc)
+		return rc;
+
+	/* Explicitly disable IRQ since the NIC can be in any state. */
+	e1000e_irq_disable(adapter);
+
+	return E1000_SUCCESS;
+}
+
+/* TX support routines */
+
+/**
+ * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int e1000e_setup_tx_resources ( struct e1000_adapter *adapter )
+{
+	DBGP ( "e1000_setup_tx_resources\n" );
+
+	/* Allocate transmit descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata #23
+	   so we use malloc_dma() requesting a 128 byte block that is
+	   128 byte aligned. This should guarantee that the memory
+	   allocated will not cross a 64K boundary, because 128 is an
+	   even multiple of 65536 ( 65536 / 128 == 512 ), so all possible
+	   allocations of 128 bytes on a 128 byte boundary will not
+	   cross 64K bytes.
+	 */
+
+	adapter->tx_base =
+		malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
+
+	if ( ! adapter->tx_base ) {
+		return -ENOMEM;
+	}
+
+	memset ( adapter->tx_base, 0, adapter->tx_ring_size );
+
+	DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
+
+	return 0;
+}
+
+/**
+ * e1000_process_tx_packets - process transmitted packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void e1000e_process_tx_packets ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t tx_status;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	/* Check status of transmitted packets
+	 */
+	DBG ( "process_tx_packets: tx_head = %d, tx_tail = %d\n", adapter->tx_head,
+	      adapter->tx_tail );
+
+	while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
+
+		tx_curr_desc = ( void * )  ( adapter->tx_base ) +
+					   ( i * sizeof ( *adapter->tx_base ) );
+
+		tx_status = tx_curr_desc->upper.data;
+
+		DBG ( "	 tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+		DBG ( "	 tx_status = %#08x\n", tx_status );
+
+		/* if the packet at tx_head is not owned by hardware it is for us */
+		if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
+			break;
+
+		DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
+		      adapter->tx_head, adapter->tx_tail, tx_status );
+
+		if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
+				   E1000_TXD_STAT_TU ) ) {
+			netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
+			DBG ( "Error transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		} else {
+			netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
+			DBG ( "Success transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		}
+
+		/* Decrement count of used descriptors, clear this descriptor
+		 */
+		adapter->tx_fill_ctr--;
+		memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
+
+		adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
+	}
+}
+
+static void e1000e_free_tx_resources ( struct e1000_adapter *adapter )
+{
+	DBGP ( "e1000_free_tx_resources\n" );
+
+	free_dma ( adapter->tx_base, adapter->tx_ring_size );
+}
+
+/**
+ * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Tx unit of the MAC after a reset.
+ **/
+static void e1000e_configure_tx ( struct e1000_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 tctl, tipg, tarc;
+	u32 ipgr1, ipgr2;
+
+	DBGP ( "e1000_configure_tx\n" );
+
+	/* disable transmits while setting up the descriptors */
+	tctl = E1000_READ_REG ( hw, E1000_TCTL );
+	E1000_WRITE_REG ( hw, E1000_TCTL, tctl & ~E1000_TCTL_EN );
+	e1e_flush();
+	mdelay(10);
+
+	E1000_WRITE_REG ( hw, E1000_TDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDBAL(0), virt_to_bus ( adapter->tx_base ) );
+	E1000_WRITE_REG ( hw, E1000_TDLEN(0), adapter->tx_ring_size );
+
+	DBG ( "E1000_TDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_TDBAL(0) ) );
+	DBG ( "E1000_TDLEN(0): %d\n",	  E1000_READ_REG ( hw, E1000_TDLEN(0) ) );
+
+	/* Setup the HW Tx Head and Tail descriptor pointers */
+	E1000_WRITE_REG ( hw, E1000_TDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDT(0), 0 );
+
+	adapter->tx_head = 0;
+	adapter->tx_tail = 0;
+	adapter->tx_fill_ctr = 0;
+
+	/* Set the default values for the Tx Inter Packet Gap timer */
+	tipg = DEFAULT_82543_TIPG_IPGT_COPPER;		/*  8  */
+	ipgr1 = DEFAULT_82543_TIPG_IPGR1;		/*  8  */
+	ipgr2 = DEFAULT_82543_TIPG_IPGR2;		/*  6  */
+
+	if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
+		ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /*  7  */
+
+	tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
+	tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
+	ew32(TIPG, tipg);
+
+	/* Program the Transmit Control Register */
+	tctl = er32(TCTL);
+	tctl &= ~E1000_TCTL_CT;
+	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
+		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
+
+	if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
+		tarc = er32(TARC(0));
+		/*
+		 * set the speed mode bit, we'll clear it if we're not at
+		 * gigabit link later
+		 */
+#define SPEED_MODE_BIT (1 << 21)
+		tarc |= SPEED_MODE_BIT;
+		ew32(TARC(0), tarc);
+	}
+
+	/* errata: program both queues to unweighted RR */
+	if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
+		tarc = er32(TARC(0));
+		tarc |= 1;
+		ew32(TARC(0), tarc);
+		tarc = er32(TARC(1));
+		tarc |= 1;
+		ew32(TARC(1), tarc);
+	}
+
+	/* Setup Transmit Descriptor Settings for eop descriptor */
+	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
+
+	/* enable Report Status bit */
+	adapter->txd_cmd |= E1000_TXD_CMD_RS;
+
+	/*
+	 * enable transmits in the hardware, need to do this
+	 * after setting TARC(0)
+	 */
+	tctl |= E1000_TCTL_EN;
+	ew32(TCTL, tctl);
+	e1e_flush();
+
+	e1000e_config_collision_dist(hw);
+}
+
+/* RX support routines */
+
+static void e1000e_free_rx_resources ( struct e1000_adapter *adapter )
+{
+	int i;
+
+	DBGP ( "e1000_free_rx_resources\n" );
+
+	free_dma ( adapter->rx_base, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		free_iob ( adapter->rx_iobuf[i] );
+	}
+}
+
+/**
+ * e1000_refill_rx_ring - allocate Rx io_buffers
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int e1000e_refill_rx_ring ( struct e1000_adapter *adapter )
+{
+	int i, rx_curr;
+	int rc = 0;
+	struct e1000_rx_desc *rx_curr_desc;
+	struct e1000_hw *hw = &adapter->hw;
+	struct io_buffer *iob;
+
+	DBGP ("e1000_refill_rx_ring\n");
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
+		rx_curr_desc = adapter->rx_base + rx_curr;
+
+		if ( rx_curr_desc->status & E1000_RXD_STAT_DD )
+			continue;
+
+		if ( adapter->rx_iobuf[rx_curr] != NULL )
+			continue;
+
+		DBG2 ( "Refilling rx desc %d\n", rx_curr );
+
+		iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
+		adapter->rx_iobuf[rx_curr] = iob;
+
+		if ( ! iob ) {
+			DBG ( "alloc_iob failed\n" );
+			rc = -ENOMEM;
+			break;
+		} else {
+			rx_curr_desc->buffer_addr = virt_to_bus ( iob->data );
+
+			E1000_WRITE_REG ( hw, E1000_RDT(0), rx_curr );
+		}
+	}
+	return rc;
+}
+
+/**
+ * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int e1000e_setup_rx_resources ( struct e1000_adapter *adapter )
+{
+	int i, rc = 0;
+
+	DBGP ( "e1000_setup_rx_resources\n" );
+
+	/* Allocate receive descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata
+	 */
+
+	adapter->rx_base =
+		malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
+
+	if ( ! adapter->rx_base ) {
+		return -ENOMEM;
+	}
+	memset ( adapter->rx_base, 0, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		/* let e1000_refill_rx_ring() io_buffer allocations */
+		adapter->rx_iobuf[i] = NULL;
+	}
+
+	/* allocate io_buffers */
+	rc = e1000e_refill_rx_ring ( adapter );
+	if ( rc < 0 )
+		e1000e_free_rx_resources ( adapter );
+
+	return rc;
+}
+
+/**
+ * e1000_configure_rx - Configure 8254x Receive Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Rx unit of the MAC after a reset.
+ **/
+static void e1000e_configure_rx ( struct e1000_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl;
+
+	DBGP ( "e1000_configure_rx\n" );
+
+	/* disable receives while setting up the descriptors */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	e1e_flush();
+	mdelay(10);
+
+	adapter->rx_curr = 0;
+
+	/* Setup the HW Rx Head and Tail Descriptor Pointers and
+	 * the Base and Length of the Rx Descriptor Ring */
+
+	E1000_WRITE_REG ( hw, E1000_RDBAL(0), virt_to_bus ( adapter->rx_base ) );
+	E1000_WRITE_REG ( hw, E1000_RDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDLEN(0), adapter->rx_ring_size );
+
+	E1000_WRITE_REG ( hw, E1000_RDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDT(0), NUM_RX_DESC - 1 );
+
+	/* Enable Receives */
+	rctl |=	 E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
+		 E1000_RCTL_MPE | E1000_RCTL_SECRC;
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl );
+	e1e_flush();
+
+	DBG ( "E1000_RDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
+	DBG ( "E1000_RDLEN(0): %d\n",	  E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
+	DBG ( "E1000_RCTL:  %#08x\n",  E1000_READ_REG ( hw, E1000_RCTL ) );
+}
+
+/**
+ * e1000_process_rx_packets - process received packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void e1000e_process_rx_packets ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t rx_status;
+	uint32_t rx_len;
+	uint32_t rx_err;
+	struct e1000_rx_desc *rx_curr_desc;
+
+	/* Process received packets
+	 */
+	while ( 1 ) {
+
+		i = adapter->rx_curr;
+
+		rx_curr_desc = ( void * )  ( adapter->rx_base ) +
+				  ( i * sizeof ( *adapter->rx_base ) );
+		rx_status = rx_curr_desc->status;
+
+		DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
+
+		if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
+			break;
+
+		if ( adapter->rx_iobuf[i] == NULL )
+			break;
+
+		DBG ( "E1000_RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RCTL ) );
+
+		rx_len = rx_curr_desc->length;
+
+		DBG ( "Received packet, rx_curr: %d  rx_status: %#08x  rx_len: %d\n",
+		      i, rx_status, rx_len );
+
+		rx_err = rx_curr_desc->errors;
+
+		iob_put ( adapter->rx_iobuf[i], rx_len );
+
+		if ( rx_err & E1000_RXD_ERR_FRAME_ERR_MASK ) {
+
+			netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
+			DBG ( "e1000_poll: Corrupted packet received!"
+			      " rx_err: %#08x\n", rx_err );
+		} else	{
+			/* Add this packet to the receive queue. */
+			netdev_rx ( netdev, adapter->rx_iobuf[i] );
+		}
+		adapter->rx_iobuf[i] = NULL;
+
+		memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
+
+		adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
+	}
+}
+
+/** Functions that implement the iPXE driver API **/
+
+/**
+ * e1000_close - Disables a network interface
+ *
+ * @v netdev	network interface device structure
+ *
+ **/
+static void e1000e_close ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl;
+
+	DBGP ( "e1000_close\n" );
+
+	/* Disable and acknowledge interrupts */
+	e1000e_irq_disable ( adapter );
+	E1000_READ_REG ( hw, E1000_ICR );
+
+	/* disable receives */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	e1e_flush();
+
+	e1000e_reset ( adapter );
+
+	e1000e_free_tx_resources ( adapter );
+	e1000e_free_rx_resources ( adapter );
+}
+
+/**
+ * e1000_transmit - Transmit a packet
+ *
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ */
+static int e1000e_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
+{
+	struct e1000_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t tx_curr = adapter->tx_tail;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	DBGP ("e1000_transmit\n");
+
+	if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
+		DBG ("TX overflow\n");
+		return -ENOBUFS;
+	}
+
+	/* Save pointer to iobuf we have been given to transmit,
+	   netdev_tx_complete() will need it later
+	 */
+	adapter->tx_iobuf[tx_curr] = iobuf;
+
+	tx_curr_desc = ( void * ) ( adapter->tx_base ) +
+		       ( tx_curr * sizeof ( *adapter->tx_base ) );
+
+	DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+	DBG ( "tx_curr_desc + 16 = %#08lx\n", virt_to_bus ( tx_curr_desc ) + 16 );
+	DBG ( "iobuf->data = %#08lx\n", virt_to_bus ( iobuf->data ) );
+
+	/* Add the packet to TX ring
+	 */
+	tx_curr_desc->buffer_addr = virt_to_bus ( iobuf->data );
+	tx_curr_desc->upper.data = 0;
+	tx_curr_desc->lower.data = adapter->txd_cmd | iob_len ( iobuf );
+
+	DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
+	      tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
+
+	/* Point to next free descriptor */
+	adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
+	adapter->tx_fill_ctr++;
+
+	/* Write new tail to NIC, making packet available for transmit
+	 */
+	E1000_WRITE_REG ( hw, E1000_TDT(0), adapter->tx_tail );
+	e1e_flush();
+
+	return 0;
+}
+
+/**
+ * e1000_poll - Poll for received packets
+ *
+ * @v netdev	Network device
+ */
+static void e1000e_poll ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+
+	uint32_t icr;
+
+	DBGP ( "e1000_poll\n" );
+
+	/* Acknowledge interrupts */
+	icr = E1000_READ_REG ( hw, E1000_ICR );
+	if ( ! icr )
+		return;
+
+	DBG ( "e1000_poll: intr_status = %#08x\n", icr );
+
+	e1000e_process_tx_packets ( netdev );
+
+	e1000e_process_rx_packets ( netdev );
+
+	e1000e_refill_rx_ring(adapter);
+}
+
+/**
+ * e1000_irq - enable or Disable interrupts
+ *
+ * @v adapter	e1000 adapter
+ * @v action	requested interrupt action
+ **/
+static void e1000e_irq ( struct net_device *netdev, int enable )
+{
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+
+	DBGP ( "e1000_irq\n" );
+
+	if ( enable ) {
+		e1000e_irq_enable ( adapter );
+	} else {
+		e1000e_irq_disable ( adapter );
+	}
+}
+
+static struct net_device_operations e1000e_operations;
+
+/**
+ * e1000_probe - Initial configuration of e1000 NIC
+ *
+ * @v pci	PCI device
+ * @v id	PCI IDs
+ *
+ * @ret rc	Return status code
+ **/
+int e1000e_probe ( struct pci_device *pdev )
+{
+	int i, err;
+	struct net_device *netdev;
+	struct e1000_adapter *adapter;
+	unsigned long mmio_start, mmio_len;
+	unsigned long flash_start, flash_len;
+	struct e1000_hw *hw;
+	const struct e1000_info *ei = e1000_info_tbl[pdev->id->driver_data];
+
+	DBGP ( "e1000_probe\n" );
+
+	err = -ENOMEM;
+
+	/* Allocate net device ( also allocates memory for netdev->priv
+	   and makes netdev-priv point to it ) */
+	netdev = alloc_etherdev ( sizeof ( struct e1000_adapter ) );
+	if ( ! netdev ) {
+                DBG ( "err_alloc_etherdev\n" );
+		goto err_alloc_etherdev;
+        }
+
+	/* Associate e1000-specific network operations operations with
+	 * generic network device layer */
+	netdev_init ( netdev, &e1000e_operations );
+
+	/* Associate this network device with given PCI device */
+	pci_set_drvdata ( pdev, netdev );
+	netdev->dev = &pdev->dev;
+
+	/* Initialize driver private storage */
+	adapter = netdev_priv ( netdev );
+	memset ( adapter, 0, ( sizeof ( *adapter ) ) );
+
+	adapter->pdev	    = pdev;
+
+	adapter->ioaddr	    = pdev->ioaddr;
+	adapter->hw.io_base = pdev->ioaddr;
+
+	hw		    = &adapter->hw;
+	hw->device_id	    = pdev->device;
+
+	adapter->irqno	    = pdev->irq;
+	adapter->netdev	    = netdev;
+	adapter->hw.back    = adapter;
+
+	adapter->ei	    = ei;
+	adapter->pba	    = ei->pba;
+	adapter->flags	    = ei->flags;
+	adapter->flags2	    = ei->flags2;
+
+	adapter->hw.adapter  = adapter;
+	adapter->hw.mac.type = ei->mac;
+	adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
+
+	adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
+	adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
+
+	/* Fix up PCI device */
+	adjust_pci_device ( pdev );
+
+	err = -EIO;
+
+	mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
+	mmio_len   = pci_bar_size  ( pdev, PCI_BASE_ADDRESS_0 );
+
+	DBG ( "mmio_start: %#08lx\n", mmio_start );
+	DBG ( "mmio_len: %#08lx\n", mmio_len );
+
+	adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
+	DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
+
+	if ( ! adapter->hw.hw_addr ) {
+                DBG ( "err_ioremap\n" );
+		goto err_ioremap;
+        }
+
+	/* Flash BAR mapping depends on mac_type */
+	if ( ( adapter->flags & FLAG_HAS_FLASH) && ( pdev->ioaddr ) ) {
+		flash_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_1 );
+		flash_len = pci_bar_size ( pdev, PCI_BASE_ADDRESS_1 );
+		adapter->hw.flash_address = ioremap ( flash_start, flash_len );
+		if ( ! adapter->hw.flash_address ) {
+                        DBG ( "err_flashmap\n" );
+			goto err_flashmap;
+		}
+	}
+
+	/* setup adapter struct */
+	err = e1000e_sw_init ( adapter );
+	if (err) {
+                DBG ( "err_sw_init\n" );
+		goto err_sw_init;
+        }
+
+	if (ei->get_variants) {
+		err = ei->get_variants(adapter);
+		if (err) {
+                        DBG ( "err_hw_initr\n" );
+			goto err_hw_init;
+                }
+	}
+
+	/* Copper options */
+	if (adapter->hw.phy.media_type == e1000_media_type_copper) {
+		adapter->hw.phy.mdix = AUTO_ALL_MODES;
+		adapter->hw.phy.disable_polarity_correction = 0;
+		adapter->hw.phy.ms_type = e1000_ms_hw_default;
+	}
+
+	DBG ( "adapter->hw.mac.type: %#08x\n", adapter->hw.mac.type );
+
+	/* Force auto-negotiation */
+	adapter->hw.mac.autoneg = 1;
+	adapter->fc_autoneg = 1;
+	adapter->hw.phy.autoneg_wait_to_complete = true;
+	adapter->hw.mac.adaptive_ifs = true;
+	adapter->hw.fc.requested_mode = e1000_fc_default;
+	adapter->hw.fc.current_mode = e1000_fc_default;
+
+	/*
+	 * before reading the NVM, reset the controller to
+	 * put the device in a known good starting state
+	 */
+	adapter->hw.mac.ops.reset_hw(&adapter->hw);
+
+	/*
+	 * systems with ASPM and others may see the checksum fail on the first
+	 * attempt. Let's give it a few tries
+	 */
+	for (i = 0;; i++) {
+		if (e1000e_validate_nvm_checksum(&adapter->hw) >= 0)
+			break;
+		if (i == 2) {
+			DBG("The NVM Checksum Is Not Valid\n");
+			err = -EIO;
+			goto err_eeprom;
+		}
+	}
+
+	/* copy the MAC address out of the EEPROM */
+	if ( e1000e_read_mac_addr ( &adapter->hw ) )
+		DBG ( "EEPROM Read Error\n" );
+
+	memcpy ( netdev->hw_addr, adapter->hw.mac.perm_addr, ETH_ALEN );
+
+	/* reset the hardware with the new settings */
+	e1000e_reset ( adapter );
+
+	if ( ( err = register_netdev ( netdev ) ) != 0) {
+                DBG ( "err_register\n" );
+		goto err_register;
+        }
+
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
+
+	for (i = 0; i < 6; i++)
+		DBG ("%02x%s", netdev->ll_addr[i], i == 5 ? "\n" : ":");
+
+	DBG ( "e1000e_probe succeeded!\n" );
+
+	/* No errors, return success */
+	return 0;
+
+/* Error return paths */
+err_register:
+err_hw_init:
+err_eeprom:
+err_flashmap:
+	if (!e1000e_check_reset_block(&adapter->hw))
+		e1000e_phy_hw_reset(&adapter->hw);
+	if (adapter->hw.flash_address)
+		iounmap(adapter->hw.flash_address);
+err_sw_init:
+	iounmap ( adapter->hw.hw_addr );
+err_ioremap:
+	netdev_put ( netdev );
+err_alloc_etherdev:
+	return err;
+}
+
+/**
+ * e1000e_remove - Device Removal Routine
+ *
+ * @v pdev PCI device information struct
+ *
+ **/
+void e1000e_remove ( struct pci_device *pdev )
+{
+	struct net_device *netdev = pci_get_drvdata ( pdev );
+	struct e1000_adapter *adapter = netdev_priv ( netdev );
+
+	DBGP ( "e1000e_remove\n" );
+
+	if ( adapter->hw.flash_address )
+		iounmap ( adapter->hw.flash_address );
+	if  ( adapter->hw.hw_addr )
+		iounmap ( adapter->hw.hw_addr );
+
+	unregister_netdev ( netdev );
+	e1000e_reset  ( adapter );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+}
+
+/**
+ * e1000e_open - Called when a network interface is made active
+ *
+ * @v netdev	network interface device structure
+ * @ret rc	Return status code, 0 on success, negative value on failure
+ *
+ **/
+static int e1000e_open ( struct net_device *netdev )
+{
+	struct e1000_adapter *adapter = netdev_priv(netdev);
+	int err;
+
+	DBGP ( "e1000e_open\n" );
+
+	/* allocate transmit descriptors */
+	err = e1000e_setup_tx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up TX resources!\n" );
+		goto err_setup_tx;
+	}
+
+	/* allocate receive descriptors */
+	err = e1000e_setup_rx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up RX resources!\n" );
+		goto err_setup_rx;
+	}
+
+	e1000e_configure_tx ( adapter );
+
+	e1000e_configure_rx ( adapter );
+
+	DBG ( "E1000_RXDCTL(0): %#08x\n",  E1000_READ_REG ( &adapter->hw, E1000_RXDCTL(0) ) );
+
+	return 0;
+
+err_setup_rx:
+        DBG ( "err_setup_rx\n" );
+	e1000e_free_tx_resources ( adapter );
+err_setup_tx:
+        DBG ( "err_setup_tx\n" );
+	e1000e_reset ( adapter );
+
+	return err;
+}
+
+/** e1000e net device operations */
+static struct net_device_operations e1000e_operations = {
+	.open		= e1000e_open,
+	.close		= e1000e_close,
+	.transmit	= e1000e_transmit,
+	.poll		= e1000e_poll,
+	.irq		= e1000e_irq,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_manage.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_manage.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_manage.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_manage.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,372 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#if 0
+
+#include "e1000e.h"
+
+static u8 e1000e_calculate_checksum(u8 *buffer, u32 length);
+
+/**
+ *  e1000e_calculate_checksum - Calculate checksum for buffer
+ *  @buffer: pointer to EEPROM
+ *  @length: size of EEPROM to calculate a checksum for
+ *
+ *  Calculates the checksum for some buffer on a specified length.  The
+ *  checksum calculated is returned.
+ **/
+static u8 e1000e_calculate_checksum(u8 *buffer, u32 length)
+{
+	u32 i;
+	u8  sum = 0;
+
+	if (!buffer)
+		return 0;
+	for (i = 0; i < length; i++)
+		sum += buffer[i];
+
+	return (u8) (0 - sum);
+}
+
+/**
+ *  e1000e_mng_enable_host_if_generic - Checks host interface is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
+ *
+ *  This function checks whether the HOST IF is enabled for command operation
+ *  and also checks whether the previous command is completed.  It busy waits
+ *  in case of previous command is not completed.
+ **/
+s32 e1000e_mng_enable_host_if_generic(struct e1000_hw *hw)
+{
+	u32 hicr;
+	s32 ret_val = E1000_SUCCESS;
+	u8  i;
+
+	/* Check that the host interface is enabled. */
+	hicr = er32(HICR);
+	if ((hicr & E1000_HICR_EN) == 0) {
+		e_dbg("E1000_HOST_EN bit disabled.\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+	/* check the previous command is completed */
+	for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
+		hicr = er32(HICR);
+		if (!(hicr & E1000_HICR_C))
+			break;
+		mdelay(1);
+	}
+
+	if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
+		e_dbg("Previous command timeout failed .\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_mng_mode_generic - Generic check management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the firmware semaphore register and returns true (>0) if
+ *  manageability is enabled, else false (0).
+ **/
+bool e1000e_check_mng_mode_generic(struct e1000_hw *hw)
+{
+	u32 fwsm;
+
+	fwsm = er32(FWSM);
+	return (fwsm & E1000_FWSM_MODE_MASK) ==
+	        (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
+}
+
+/**
+ *  e1000e_enable_tx_pkt_filtering - Enable packet filtering on TX
+ *  @hw: pointer to the HW structure
+ *
+ *  Enables packet filtering on transmit packets if manageability is enabled
+ *  and host interface is enabled.
+ **/
+bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
+{
+	struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
+	u32 *buffer = (u32 *)&hw->mng_cookie;
+	u32 offset;
+	s32 ret_val, hdr_csum, csum;
+	u8 i, len;
+	bool tx_filter = true;
+
+	/* No manageability, no filtering */
+	if (!hw->mac.ops.check_mng_mode(hw)) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/*
+	 * If we can't read from the host interface for whatever
+	 * reason, disable filtering.
+	 */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val != E1000_SUCCESS) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/* Read in the header.  Length and offset are in dwords. */
+	len    = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
+	offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
+	for (i = 0; i < len; i++) {
+		*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
+		                                           E1000_HOST_IF,
+		                                           offset + i);
+	}
+	hdr_csum = hdr->checksum;
+	hdr->checksum = 0;
+	csum = e1000e_calculate_checksum((u8 *)hdr,
+	                                E1000_MNG_DHCP_COOKIE_LENGTH);
+	/*
+	 * If either the checksums or signature don't match, then
+	 * the cookie area isn't considered valid, in which case we
+	 * take the safe route of assuming Tx filtering is enabled.
+	 */
+	if (hdr_csum != csum)
+		goto out;
+	if (hdr->signature != E1000_IAMT_SIGNATURE)
+		goto out;
+
+	/* Cookie area is valid, make the final check for filtering. */
+	if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
+		tx_filter = false;
+
+out:
+	hw->mac.tx_pkt_filtering = tx_filter;
+	return tx_filter;
+}
+
+/**
+ *  e1000e_mng_write_dhcp_info - Writes DHCP info to host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface
+ *  @length: size of the buffer
+ *
+ *  Writes the DHCP information to the host interface.
+ **/
+s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer,
+                                      u16 length)
+{
+	struct e1000_host_mng_command_header hdr;
+	s32 ret_val;
+	u32 hicr;
+
+	hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
+	hdr.command_length = length;
+	hdr.reserved1 = 0;
+	hdr.reserved2 = 0;
+	hdr.checksum = 0;
+
+	/* Enable the host interface */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val)
+		goto out;
+
+	/* Populate the host interface with the contents of "buffer". */
+	ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
+	                                  sizeof(hdr), &(hdr.checksum));
+	if (ret_val)
+		goto out;
+
+	/* Write the manageability command header */
+	ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
+	if (ret_val)
+		goto out;
+
+	/* Tell the ARC a new command is pending. */
+	hicr = er32(HICR);
+	ew32(HICR, hicr | E1000_HICR_C);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_mng_write_cmd_header_generic - Writes manageability command header
+ *  @hw: pointer to the HW structure
+ *  @hdr: pointer to the host interface command header
+ *
+ *  Writes the command header after does the checksum calculation.
+ **/
+s32 e1000e_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr)
+{
+	u16 i, length = sizeof(struct e1000_host_mng_command_header);
+
+	/* Write the whole command header structure with new checksum. */
+
+	hdr->checksum = e1000e_calculate_checksum((u8 *)hdr, length);
+
+	length >>= 2;
+	/* Write the relevant command block into the ram area. */
+	for (i = 0; i < length; i++) {
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
+		                            *((u32 *) hdr + i));
+		e1e_flush();
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_mng_host_if_write_generic - Write to the manageability host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface buffer
+ *  @length: size of the buffer
+ *  @offset: location in the buffer to write to
+ *  @sum: sum of the data (not checksum)
+ *
+ *  This function writes the buffer content at the offset given on the host if.
+ *  It also does alignment considerations to do the writes in most efficient
+ *  way.  Also fills up the sum of the buffer in *buffer parameter.
+ **/
+s32 e1000e_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                    u16 length, u16 offset, u8 *sum)
+{
+	u8 *tmp;
+	u8 *bufptr = buffer;
+	u32 data = 0;
+	s32 ret_val = E1000_SUCCESS;
+	u16 remaining, i, j, prev_bytes;
+
+	/* sum = only sum of the data and it is not checksum */
+
+	if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
+		ret_val = -E1000_ERR_PARAM;
+		goto out;
+	}
+
+	tmp = (u8 *)&data;
+	prev_bytes = offset & 0x3;
+	offset >>= 2;
+
+	if (prev_bytes) {
+		data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
+		for (j = prev_bytes; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
+		length -= j - prev_bytes;
+		offset++;
+	}
+
+	remaining = length & 0x3;
+	length -= remaining;
+
+	/* Calculate length in DWORDs */
+	length >>= 2;
+
+	/*
+	 * The device driver writes the relevant command block into the
+	 * ram area.
+	 */
+	for (i = 0; i < length; i++) {
+		for (j = 0; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
+		                            data);
+	}
+	if (remaining) {
+		for (j = 0; j < sizeof(u32); j++) {
+			if (j < remaining)
+				*(tmp + j) = *bufptr++;
+			else
+				*(tmp + j) = 0;
+
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_enable_mng_pass_thru - Enable processing of ARP's
+ *  @hw: pointer to the HW structure
+ *
+ *  Verifies the hardware needs to allow ARPs to be processed by the host.
+ **/
+bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw)
+{
+	u32 manc;
+	u32 fwsm, factps;
+	bool ret_val = false;
+
+	if (!hw->mac.asf_firmware_present)
+		goto out;
+
+	manc = er32(MANC);
+
+	if (!(manc & E1000_MANC_RCV_TCO_EN) ||
+	    !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
+		goto out;
+
+	if (hw->mac.arc_subsystem_valid) {
+		fwsm = er32(FWSM);
+		factps = er32(FACTPS);
+
+		if (!(factps & E1000_FACTPS_MNGCG) &&
+		    ((fwsm & E1000_FWSM_MODE_MASK) ==
+		     (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
+			ret_val = true;
+			goto out;
+		}
+	} else {
+		if ((manc & E1000_MANC_SMBUS_EN) &&
+		    !(manc & E1000_MANC_ASF_EN)) {
+			ret_val = true;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+#endif
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_manage.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_manage.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_manage.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_manage.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,86 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_MANAGE_H_
+#define _E1000E_MANAGE_H_
+
+bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
+bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
+s32  e1000e_mng_enable_host_if_generic(struct e1000_hw *hw);
+s32  e1000e_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                     u16 length, u16 offset, u8 *sum);
+s32  e1000e_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr);
+#if 0
+s32  e1000e_mng_write_dhcp_info(struct e1000_hw *hw,
+                                       u8 *buffer, u16 length);
+#endif
+bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
+
+enum e1000_mng_mode {
+	e1000_mng_mode_none = 0,
+	e1000_mng_mode_asf,
+	e1000_mng_mode_pt,
+	e1000_mng_mode_ipmi,
+	e1000_mng_mode_host_if_only
+};
+
+#define E1000_FACTPS_MNGCG    0x20000000
+
+#define E1000_FWSM_MODE_MASK  0xE
+#define E1000_FWSM_MODE_SHIFT 1
+
+#define E1000_MNG_IAMT_MODE                  0x3
+#define E1000_MNG_DHCP_COOKIE_LENGTH         0x10
+#define E1000_MNG_DHCP_COOKIE_OFFSET         0x6F0
+#define E1000_MNG_DHCP_COMMAND_TIMEOUT       10
+#define E1000_MNG_DHCP_TX_PAYLOAD_CMD        64
+#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
+#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN    0x2
+
+#define E1000_VFTA_ENTRY_SHIFT               5
+#define E1000_VFTA_ENTRY_MASK                0x7F
+#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
+
+#define E1000_HI_MAX_BLOCK_BYTE_LENGTH       1792 /* Num of bytes in range */
+#define E1000_HI_MAX_BLOCK_DWORD_LENGTH      448 /* Num of dwords in range */
+#define E1000_HI_COMMAND_TIMEOUT             500 /* Process HI command limit */
+
+#define E1000_HICR_EN              0x01  /* Enable bit - RO */
+/* Driver sets this bit when done to put command in RAM */
+#define E1000_HICR_C               0x02
+#define E1000_HICR_SV              0x04  /* Status Validity */
+#define E1000_HICR_FW_RESET_ENABLE 0x40
+#define E1000_HICR_FW_RESET        0x80
+
+/* Intel(R) Active Management Technology signature */
+#define E1000_IAMT_SIGNATURE  0x544D4149
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_nvm.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_nvm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_nvm.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_nvm.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,596 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000e.h"
+
+static void e1000e_stop_nvm(struct e1000_hw *hw);
+static void e1000e_reload_nvm(struct e1000_hw *hw);
+
+/**
+ *  e1000e_init_nvm_ops_generic - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void e1000e_init_nvm_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	/* Initialize function pointers */
+	nvm->ops.reload = e1000e_reload_nvm;
+}
+
+/**
+ *  e1000e_raise_eec_clk - Raise EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Enable/Raise the EEPROM clock bit.
+ **/
+static void e1000e_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd | E1000_EECD_SK;
+	ew32(EECD, *eecd);
+	e1e_flush();
+	udelay(hw->nvm.delay_usec);
+}
+
+/**
+ *  e1000e_lower_eec_clk - Lower EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Clear/Lower the EEPROM clock bit.
+ **/
+static void e1000e_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd & ~E1000_EECD_SK;
+	ew32(EECD, *eecd);
+	e1e_flush();
+	udelay(hw->nvm.delay_usec);
+}
+
+/**
+ *  e1000e_shift_out_eec_bits - Shift data bits our to the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @data: data to send to the EEPROM
+ *  @count: number of bits to shift out
+ *
+ *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
+ *  "data" parameter will be shifted out to the EEPROM one bit at a time.
+ *  In order to do this, "data" must be broken down into bits.
+ **/
+static void e1000e_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = er32(EECD);
+	u32 mask;
+
+	mask = 0x01 << (count - 1);
+	if (nvm->type == e1000_nvm_eeprom_spi)
+		eecd |= E1000_EECD_DO;
+
+	do {
+		eecd &= ~E1000_EECD_DI;
+
+		if (data & mask)
+			eecd |= E1000_EECD_DI;
+
+		ew32(EECD, eecd);
+		e1e_flush();
+
+		udelay(nvm->delay_usec);
+
+		e1000e_raise_eec_clk(hw, &eecd);
+		e1000e_lower_eec_clk(hw, &eecd);
+
+		mask >>= 1;
+	} while (mask);
+
+	eecd &= ~E1000_EECD_DI;
+	ew32(EECD, eecd);
+}
+
+/**
+ *  e1000e_shift_in_eec_bits - Shift data bits in from the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @count: number of bits to shift in
+ *
+ *  In order to read a register from the EEPROM, we need to shift 'count' bits
+ *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
+ *  the EEPROM (setting the SK bit), and then reading the value of the data out
+ *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
+ *  always be clear.
+ **/
+static u16 e1000e_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
+{
+	u32 eecd;
+	u32 i;
+	u16 data;
+
+	eecd = er32(EECD);
+	eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
+	data = 0;
+
+	for (i = 0; i < count; i++) {
+		data <<= 1;
+		e1000e_raise_eec_clk(hw, &eecd);
+
+		eecd = er32(EECD);
+
+		eecd &= ~E1000_EECD_DI;
+		if (eecd & E1000_EECD_DO)
+			data |= 1;
+
+		e1000e_lower_eec_clk(hw, &eecd);
+	}
+
+	return data;
+}
+
+/**
+ *  e1000e_poll_eerd_eewr_done - Poll for EEPROM read/write completion
+ *  @hw: pointer to the HW structure
+ *  @ee_reg: EEPROM flag for polling
+ *
+ *  Polls the EEPROM status bit for either read or write completion based
+ *  upon the value of 'ee_reg'.
+ **/
+s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
+{
+	u32 attempts = 100000;
+	u32 i, reg = 0;
+	s32 ret_val = -E1000_ERR_NVM;
+
+	for (i = 0; i < attempts; i++) {
+		if (ee_reg == E1000_NVM_POLL_READ)
+			reg = er32(EERD);
+		else
+			reg = er32(EEWR);
+
+		if (reg & E1000_NVM_RW_REG_DONE) {
+			ret_val = E1000_SUCCESS;
+			break;
+		}
+
+		udelay(5);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_acquire_nvm - Generic request for access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
+ *  Return successful if access grant bit set, else clear the request for
+ *  EEPROM access and return -E1000_ERR_NVM (-1).
+ **/
+s32 e1000e_acquire_nvm(struct e1000_hw *hw)
+{
+	u32 eecd = er32(EECD);
+	s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
+	s32 ret_val = E1000_SUCCESS;
+
+	ew32(EECD, eecd | E1000_EECD_REQ);
+	eecd = er32(EECD);
+	while (timeout) {
+		if (eecd & E1000_EECD_GNT)
+			break;
+		udelay(5);
+		eecd = er32(EECD);
+		timeout--;
+	}
+
+	if (!timeout) {
+		eecd &= ~E1000_EECD_REQ;
+		ew32(EECD, eecd);
+		e_dbg("Could not acquire NVM grant\n");
+		ret_val = -E1000_ERR_NVM;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_standby_nvm - Return EEPROM to standby state
+ *  @hw: pointer to the HW structure
+ *
+ *  Return the EEPROM to a standby state.
+ **/
+static void e1000e_standby_nvm(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = er32(EECD);
+
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Toggle CS to flush commands */
+		eecd |= E1000_EECD_CS;
+		ew32(EECD, eecd);
+		e1e_flush();
+		udelay(nvm->delay_usec);
+		eecd &= ~E1000_EECD_CS;
+		ew32(EECD, eecd);
+		e1e_flush();
+		udelay(nvm->delay_usec);
+	}
+}
+
+/**
+ *  e1000e_stop_nvm - Terminate EEPROM command
+ *  @hw: pointer to the HW structure
+ *
+ *  Terminates the current command by inverting the EEPROM's chip select pin.
+ **/
+static void e1000e_stop_nvm(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	eecd = er32(EECD);
+	if (hw->nvm.type == e1000_nvm_eeprom_spi) {
+		/* Pull CS high */
+		eecd |= E1000_EECD_CS;
+		e1000e_lower_eec_clk(hw, &eecd);
+	}
+}
+
+/**
+ *  e1000e_release_nvm - Release exclusive access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
+ **/
+void e1000e_release_nvm(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	e1000e_stop_nvm(hw);
+
+	eecd = er32(EECD);
+	eecd &= ~E1000_EECD_REQ;
+	ew32(EECD, eecd);
+}
+
+/**
+ *  e1000e_ready_nvm_eeprom - Prepares EEPROM for read/write
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups the EEPROM for reading and writing.
+ **/
+static s32 e1000e_ready_nvm_eeprom(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = er32(EECD);
+	s32 ret_val = E1000_SUCCESS;
+	u16 timeout = 0;
+	u8 spi_stat_reg;
+
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Clear SK and CS */
+		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
+		ew32(EECD, eecd);
+		udelay(1);
+		timeout = NVM_MAX_RETRY_SPI;
+
+		/*
+		 * Read "Status Register" repeatedly until the LSB is cleared.
+		 * The EEPROM will signal that the command has been completed
+		 * by clearing bit 0 of the internal status register.  If it's
+		 * not cleared within 'timeout', then error out.
+		 */
+		while (timeout) {
+			e1000e_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
+			                         hw->nvm.opcode_bits);
+			spi_stat_reg = (u8)e1000e_shift_in_eec_bits(hw, 8);
+			if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
+				break;
+
+			udelay(5);
+			e1000e_standby_nvm(hw);
+			timeout--;
+		}
+
+		if (!timeout) {
+			e_dbg("SPI NVM Status error\n");
+			ret_val = -E1000_ERR_NVM;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_nvm_eerd - Reads EEPROM using EERD register
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of word in the EEPROM to read
+ *  @words: number of words to read
+ *  @data: word read from the EEPROM
+ *
+ *  Reads a 16 bit word from the EEPROM using the EERD register.
+ **/
+s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i, eerd = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * too many words for the offset, and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		e_dbg("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	for (i = 0; i < words; i++) {
+		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		       E1000_NVM_RW_REG_START;
+
+		ew32(EERD, eerd);
+		ret_val = e1000e_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
+		if (ret_val)
+			break;
+
+		data[i] = (er32(EERD) >>
+		           E1000_NVM_RW_REG_DATA);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_nvm_spi - Write to EEPROM using SPI
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  Writes data to EEPROM at offset using SPI interface.
+ *
+ *  If e1000e_update_nvm_checksum is not called after this function , the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	s32 ret_val;
+	u16 widx = 0;
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		e_dbg("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	while (widx < words) {
+		u8 write_opcode = NVM_WRITE_OPCODE_SPI;
+
+		ret_val = e1000e_ready_nvm_eeprom(hw);
+		if (ret_val)
+			goto release;
+
+		e1000e_standby_nvm(hw);
+
+		/* Send the WRITE ENABLE command (8 bit opcode) */
+		e1000e_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
+		                         nvm->opcode_bits);
+
+		e1000e_standby_nvm(hw);
+
+		/*
+		 * Some SPI eeproms use the 8th address bit embedded in the
+		 * opcode
+		 */
+		if ((nvm->address_bits == 8) && (offset >= 128))
+			write_opcode |= NVM_A8_OPCODE_SPI;
+
+		/* Send the Write command (8-bit opcode + addr) */
+		e1000e_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
+		e1000e_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
+		                         nvm->address_bits);
+
+		/* Loop to allow for up to whole page write of eeprom */
+		while (widx < words) {
+			u16 word_out = data[widx];
+			word_out = (word_out >> 8) | (word_out << 8);
+			e1000e_shift_out_eec_bits(hw, word_out, 16);
+			widx++;
+
+			if ((((offset + widx) * 2) % nvm->page_size) == 0) {
+				e1000e_standby_nvm(hw);
+				break;
+			}
+		}
+	}
+
+	msleep(10);
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_pba_num - Read device part number
+ *  @hw: pointer to the HW structure
+ *  @pba_num: pointer to device part number
+ *
+ *  Reads the product board assembly (PBA) number from the EEPROM and stores
+ *  the value in pba_num.
+ **/
+s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
+{
+	s32  ret_val;
+	u16 nvm_data;
+
+	ret_val = e1000e_read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num = (u32)(nvm_data << 16);
+
+	ret_val = e1000e_read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
+	if (ret_val) {
+		e_dbg("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num |= nvm_data;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_mac_addr_generic - Read device MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the device MAC address from the EEPROM and stores the value.
+ *  Since devices with two ports use the same EEPROM, we increment the
+ *  last bit in the MAC address for the second port.
+ **/
+s32 e1000e_read_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 rar_high;
+	u32 rar_low;
+	u16 i;
+
+	rar_high = er32(RAH(0));
+	rar_low = er32(RAL(0));
+
+	for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
+
+	for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
+
+	for (i = 0; i < ETH_ADDR_LEN; i++)
+		hw->mac.addr[i] = hw->mac.perm_addr[i];
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_validate_nvm_checksum_generic - Validate EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
+ **/
+s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
+		ret_val = e1000e_read_nvm(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			e_dbg("NVM Read Error\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+
+	if (checksum != (u16) NVM_SUM) {
+		e_dbg("NVM Checksum Invalid\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_update_nvm_checksum_generic - Update EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  up to the checksum.  Then calculates the EEPROM checksum and writes the
+ *  value to the EEPROM.
+ **/
+s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32  ret_val;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	for (i = 0; i < NVM_CHECKSUM_REG; i++) {
+		ret_val = e1000e_read_nvm(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			e_dbg("NVM Read Error while updating checksum.\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+	checksum = (u16) NVM_SUM - checksum;
+	ret_val = e1000e_write_nvm(hw, NVM_CHECKSUM_REG, 1, &checksum);
+	if (ret_val)
+		e_dbg("NVM Write Error while updating checksum.\n");
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_reload_nvm - Reloads EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
+ *  extended control register.
+ **/
+static void e1000e_reload_nvm(struct e1000_hw *hw)
+{
+	u32 ctrl_ext;
+
+	udelay(10);
+	ctrl_ext = er32(CTRL_EXT);
+	ctrl_ext |= E1000_CTRL_EXT_EE_RST;
+	ew32(CTRL_EXT, ctrl_ext);
+	e1e_flush();
+}
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_nvm.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_nvm.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_nvm.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_nvm.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,53 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_NVM_H_
+#define _E1000E_NVM_H_
+
+void e1000e_init_nvm_ops_generic(struct e1000_hw *hw);
+s32  e1000e_acquire_nvm(struct e1000_hw *hw);
+
+s32  e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
+s32  e1000e_read_mac_addr_generic(struct e1000_hw *hw);
+s32  e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
+s32  e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
+s32  e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
+s32  e1000e_write_nvm_eewr(struct e1000_hw *hw, u16 offset,
+                          u16 words, u16 *data);
+s32  e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
+void e1000e_release_nvm(struct e1000_hw *hw);
+
+#define E1000_STM_OPCODE  0xDB00
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_phy.c ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_phy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_phy.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_phy.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,3323 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "e1000e.h"
+
+static s32 e1000e_copper_link_autoneg(struct e1000_hw *hw);
+static s32 e1000e_phy_setup_autoneg(struct e1000_hw *hw);
+static u32 e1000e_get_phy_addr_for_bm_page(u32 page, u32 reg);
+static s32 e1000e_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
+                                          u16 *data, bool read);
+static u32 e1000e_get_phy_addr_for_hv_page(u32 page);
+static s32 e1000e_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
+                                          u16 *data, bool read);
+#if 0
+/* Cable length tables */
+static const u16 e1000_m88_cable_length_table[] =
+	{ 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
+#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_m88_cable_length_table) / \
+                 sizeof(e1000_m88_cable_length_table[0]))
+
+static const u16 e1000_igp_2_cable_length_table[] =
+    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,
+      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,
+      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,
+      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,
+      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,
+      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,
+      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,
+      104, 109, 114, 118, 121, 124};
+#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_igp_2_cable_length_table) / \
+                 sizeof(e1000_igp_2_cable_length_table[0]))
+#endif
+
+/**
+ *  e1000e_check_reset_block_generic - Check if PHY reset is blocked
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the PHY management control register and check whether a PHY reset
+ *  is blocked.  If a reset is not blocked return E1000_SUCCESS, otherwise
+ *  return E1000_BLK_PHY_RESET (12).
+ **/
+s32 e1000e_check_reset_block_generic(struct e1000_hw *hw)
+{
+	u32 manc;
+
+	manc = er32(MANC);
+
+	return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ?
+	       E1000_BLK_PHY_RESET : E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_get_phy_id - Retrieve the PHY ID and revision
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY registers and stores the PHY ID and possibly the PHY
+ *  revision in the hardware structure.
+ **/
+s32 e1000e_get_phy_id(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_id;
+	u16 retry_count = 0;
+
+	if (!(phy->ops.read_reg))
+		goto out;
+
+	while (retry_count < 2) {
+		ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id = (u32)(phy_id << 16);
+		udelay(20);
+		ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id |= (u32)(phy_id & PHY_REVISION_MASK);
+		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
+
+		if (phy->id != 0 && phy->id != PHY_REVISION_MASK)
+			goto out;
+
+		/*
+		 * If the PHY ID is still unknown, we may have an 82577
+		 * without link.  We will try again after setting Slow MDIC
+		 * mode. No harm in trying again in this case since the PHY
+		 * ID is unknown at this point anyway.
+		 */
+		ret_val = phy->ops.acquire(hw);
+		if (ret_val)
+			goto out;
+		ret_val = e1000e_set_mdio_slow_mode_hv(hw, true);
+		if (ret_val)
+			goto out;
+		phy->ops.release(hw);
+
+		retry_count++;
+	}
+out:
+	/* Revert to MDIO fast mode, if applicable */
+	if (retry_count) {
+		ret_val = phy->ops.acquire(hw);
+		if (ret_val)
+			return ret_val;
+		ret_val = e1000e_set_mdio_slow_mode_hv(hw, false);
+		phy->ops.release(hw);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_phy_reset_dsp - Reset PHY DSP
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the digital signal processor.
+ **/
+s32 e1000e_phy_reset_dsp(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
+
+	ret_val = e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_wphy(hw, M88E1000_PHY_GEN_CONTROL, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_mdic - Read MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the MDI control register in the PHY at offset and stores the
+ *  information read to data.
+ **/
+s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = ((offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_READ));
+
+	ew32(MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		udelay(50);
+		mdic = er32(MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		e_dbg("MDI Read did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		e_dbg("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	*data = (u16) mdic;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_mdic - Write MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write to register at offset
+ *
+ *  Writes data to MDI control register in the PHY at offset.
+ **/
+s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = (((u32)data) |
+	        (offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_WRITE));
+
+	ew32(MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		udelay(50);
+		mdic = er32(MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		e_dbg("MDI Write did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		e_dbg("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_m88 - Read m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_m88 - Write m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  __e1000e_read_phy_reg_igp - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and stores the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
+                                    bool locked)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val)
+			goto release;
+	}
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+release:
+	if (!locked)
+		hw->phy.ops.release(hw);
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_igp - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore then reads the PHY register at offset and stores the
+ *  retrieved information in data.
+ *  Release the acquired semaphore before exiting.
+ **/
+s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_phy_reg_igp(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_read_phy_reg_igp_locked - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset and stores the retrieved information
+ *  in data.  Assumes semaphore already acquired.
+ **/
+s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_phy_reg_igp(hw, offset, data, true);
+}
+
+/**
+ *  e1000e_write_phy_reg_igp - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
+                                     bool locked)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val)
+			goto release;
+	}
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+release:
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_igp - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_phy_reg_igp(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_write_phy_reg_igp_locked - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset.
+ *  Assumes semaphore already acquired.
+ **/
+s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_phy_reg_igp(hw, offset, data, true);
+}
+
+/**
+ *  __e1000e_read_kmrn_reg - Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary.  Then reads the PHY register at offset
+ *  using the kumeran interface.  The information retrieved is stored in data.
+ *  Release any acquired semaphores before exiting.
+ **/
+static s32 __e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
+                                 bool locked)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+	ew32(KMRNCTRLSTA, kmrnctrlsta);
+
+	udelay(2);
+
+	kmrnctrlsta = er32(KMRNCTRLSTA);
+	*data = (u16)kmrnctrlsta;
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_kmrn_reg -  Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore then reads the PHY register at offset using the
+ *  kumeran interface.  The information retrieved is stored in data.
+ *  Release the acquired semaphore before exiting.
+ **/
+s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_kmrn_reg(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_read_kmrn_reg_locked -  Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset using the kumeran interface.  The
+ *  information retrieved is stored in data.
+ *  Assumes semaphore already acquired.
+ **/
+s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_kmrn_reg(hw, offset, data, true);
+}
+
+/**
+ *  __e1000e_write_kmrn_reg - Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary.  Then write the data to PHY register
+ *  at the offset using the kumeran interface.  Release any acquired semaphores
+ *  before exiting.
+ **/
+static s32 __e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
+                                  bool locked)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | data;
+	ew32(KMRNCTRLSTA, kmrnctrlsta);
+
+	udelay(2);
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_kmrn_reg -  Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore then writes the data to the PHY register at the offset
+ *  using the kumeran interface.  Release the acquired semaphore before exiting.
+ **/
+s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_kmrn_reg(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_write_kmrn_reg_locked -  Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Write the data to PHY register at the offset using the kumeran interface.
+ *  Assumes semaphore already acquired.
+ **/
+s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_kmrn_reg(hw, offset, data, true);
+}
+
+/**
+ *  e1000e_copper_link_setup_82577 - Setup 82577 PHY for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up Carrier-sense on Transmit and downshift values.
+ **/
+s32 e1000e_copper_link_setup_82577(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/* Enable CRS on TX. This must be set for half-duplex operation. */
+	ret_val = e1e_rphy(hw, I82577_CFG_REG, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= I82577_CFG_ASSERT_CRS_ON_TX;
+
+	/* Enable downshift */
+	phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;
+
+	ret_val = e1e_wphy(hw, I82577_CFG_REG, phy_data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_copper_link_setup_m88 - Setup m88 PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up MDI/MDI-X and polarity for m88 PHY's.  If necessary, transmit clock
+ *  and downshift values are set also.
+ **/
+s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/* Enable CRS on TX. This must be set for half-duplex operation. */
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	/* For BM PHY this bit is downshift enable */
+	if (phy->type != e1000_phy_bm)
+		phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+
+	/*
+	 * Options:
+	 *   MDI/MDI-X = 0 (default)
+	 *   0 - Auto for all speeds
+	 *   1 - MDI mode
+	 *   2 - MDI-X mode
+	 *   3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
+	 */
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+
+	switch (phy->mdix) {
+	case 1:
+		phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE;
+		break;
+	case 2:
+		phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE;
+		break;
+	case 3:
+		phy_data |= M88E1000_PSCR_AUTO_X_1000T;
+		break;
+	case 0:
+	default:
+		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
+		break;
+	}
+
+	/*
+	 * Options:
+	 *   disable_polarity_correction = 0 (default)
+	 *       Automatic Correction for Reversed Cable Polarity
+	 *   0 - Disabled
+	 *   1 - Enabled
+	 */
+	phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
+	if (phy->disable_polarity_correction == 1)
+		phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
+
+	/* Enable downshift on BM (disabled by default) */
+	if (phy->type == e1000_phy_bm)
+		phy_data |= BME1000_PSCR_ENABLE_DOWNSHIFT;
+
+	ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	if ((phy->type == e1000_phy_m88) &&
+	    (phy->revision < E1000_REVISION_4) &&
+	    (phy->id != BME1000_E_PHY_ID_R2)) {
+		/*
+		 * Force TX_CLK in the Extended PHY Specific Control Register
+		 * to 25MHz clock.
+		 */
+		ret_val = e1e_rphy(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy_data |= M88E1000_EPSCR_TX_CLK_25;
+
+		if ((phy->revision == E1000_REVISION_2) &&
+		    (phy->id == M88E1111_I_PHY_ID)) {
+			/* 82573L PHY - set the downshift counter to 5x. */
+			phy_data &= ~M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK;
+			phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
+		} else {
+			/* Configure Master and Slave downshift values */
+			phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
+			phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
+		}
+		ret_val = e1e_wphy(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             phy_data);
+		if (ret_val)
+			goto out;
+	}
+
+	if ((phy->type == e1000_phy_bm) && (phy->id == BME1000_E_PHY_ID_R2)) {
+		/* Set PHY page 0, register 29 to 0x0003 */
+		ret_val = e1e_wphy(hw, 29, 0x0003);
+		if (ret_val)
+			goto out;
+
+		/* Set PHY page 0, register 30 to 0x0000 */
+		ret_val = e1e_wphy(hw, 30, 0x0000);
+		if (ret_val)
+			goto out;
+	}
+
+	/* Commit the changes. */
+	ret_val = e1000e_commit_phy(hw);
+	if (ret_val) {
+		e_dbg("Error committing the PHY changes\n");
+		goto out;
+	}
+
+	if (phy->type == e1000_phy_82578) {
+		ret_val = e1e_rphy(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                            &phy_data);
+		if (ret_val)
+			goto out;
+
+		/* 82578 PHY - set the downshift count to 1x. */
+		phy_data |= I82578_EPSCR_DOWNSHIFT_ENABLE;
+		phy_data &= ~I82578_EPSCR_DOWNSHIFT_COUNTER_MASK;
+		ret_val = e1e_wphy(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             phy_data);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_copper_link_setup_igp - Setup igp PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for
+ *  igp PHY's.
+ **/
+s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = e1000e_phy_hw_reset(hw);
+	if (ret_val) {
+		e_dbg("Error resetting the PHY.\n");
+		goto out;
+	}
+
+	/*
+	 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
+	 * timeout issues when LFS is enabled.
+	 */
+	msleep(100);
+
+	/*
+	 * The NVM settings will configure LPLU in D3 for
+	 * non-IGP1 PHYs.
+	 */
+	if (phy->type == e1000_phy_igp) {
+		/* disable lplu d3 during driver init */
+		ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
+		if (ret_val) {
+			e_dbg("Error Disabling LPLU D3\n");
+			goto out;
+		}
+	}
+
+	/* disable lplu d0 during driver init */
+	if (hw->phy.ops.set_d0_lplu_state) {
+		ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
+		if (ret_val) {
+			e_dbg("Error Disabling LPLU D0\n");
+			goto out;
+		}
+	}
+	/* Configure mdi-mdix settings */
+	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CTRL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+
+	switch (phy->mdix) {
+	case 1:
+		data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 2:
+		data |= IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 0:
+	default:
+		data |= IGP01E1000_PSCR_AUTO_MDIX;
+		break;
+	}
+	ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CTRL, data);
+	if (ret_val)
+		goto out;
+
+	/* set auto-master slave resolution settings */
+	if (hw->mac.autoneg) {
+		/*
+		 * when autonegotiation advertisement is only 1000Mbps then we
+		 * should disable SmartSpeed and enable Auto MasterSlave
+		 * resolution as hardware default.
+		 */
+		if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {
+			/* Disable SmartSpeed */
+			ret_val = e1e_rphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+
+			/* Set auto Master/Slave resolution process */
+			ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~CR_1000T_MS_ENABLE;
+			ret_val = e1e_wphy(hw, PHY_1000T_CTRL, data);
+			if (ret_val)
+				goto out;
+		}
+
+		ret_val = e1e_rphy(hw, PHY_1000T_CTRL, &data);
+		if (ret_val)
+			goto out;
+
+		/* load defaults for future use */
+		phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ?
+			((data & CR_1000T_MS_VALUE) ?
+			e1000_ms_force_master :
+			e1000_ms_force_slave) :
+			e1000_ms_auto;
+
+		switch (phy->ms_type) {
+		case e1000_ms_force_master:
+			data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_force_slave:
+			data |= CR_1000T_MS_ENABLE;
+			data &= ~(CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_auto:
+			data &= ~CR_1000T_MS_ENABLE;
+		default:
+			break;
+		}
+		ret_val = e1e_wphy(hw, PHY_1000T_CTRL, data);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_copper_link_autoneg - Setup/Enable autoneg for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs initial bounds checking on autoneg advertisement parameter, then
+ *  configure to advertise the full capability.  Setup the PHY to autoneg
+ *  and restart the negotiation process between the link partner.  If
+ *  autoneg_wait_to_complete, then wait for autoneg to complete before exiting.
+ **/
+static s32 e1000e_copper_link_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_ctrl;
+
+	/*
+	 * Perform some bounds checking on the autoneg advertisement
+	 * parameter.
+	 */
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/*
+	 * If autoneg_advertised is zero, we assume it was not defaulted
+	 * by the calling code so we set to advertise full capability.
+	 */
+	if (phy->autoneg_advertised == 0)
+		phy->autoneg_advertised = phy->autoneg_mask;
+
+	e_dbg("Reconfiguring auto-neg advertisement params\n");
+	ret_val = e1000e_phy_setup_autoneg(hw);
+	if (ret_val) {
+		e_dbg("Error Setting up Auto-Negotiation\n");
+		goto out;
+	}
+	e_dbg("Restarting Auto-Neg\n");
+
+	/*
+	 * Restart auto-negotiation by setting the Auto Neg Enable bit and
+	 * the Auto Neg Restart bit in the PHY control register.
+	 */
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Does the user want to wait for Auto-Neg to complete here, or
+	 * check at a later time (for example, callback routine).
+	 */
+	if (phy->autoneg_wait_to_complete) {
+		ret_val = hw->mac.ops.wait_autoneg(hw);
+		if (ret_val) {
+			e_dbg("Error while waiting for "
+			         "autoneg to complete\n");
+			goto out;
+		}
+	}
+
+	hw->mac.get_link_status = true;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_phy_setup_autoneg - Configure PHY for auto-negotiation
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the MII auto-neg advertisement register and/or the 1000T control
+ *  register and if the PHY is already setup for auto-negotiation, then
+ *  return successful.  Otherwise, setup advertisement and flow control to
+ *  the appropriate values for the wanted auto-negotiation.
+ **/
+static s32 e1000e_phy_setup_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 mii_autoneg_adv_reg;
+	u16 mii_1000t_ctrl_reg = 0;
+
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/* Read the MII Auto-Neg Advertisement Register (Address 4). */
+	ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		/* Read the MII 1000Base-T Control Register (Address 9). */
+		ret_val = e1e_rphy(hw, PHY_1000T_CTRL,
+		                            &mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Need to parse both autoneg_advertised and fc and set up
+	 * the appropriate PHY registers.  First we will parse for
+	 * autoneg_advertised software override.  Since we can advertise
+	 * a plethora of combinations, we need to check each bit
+	 * individually.
+	 */
+
+	/*
+	 * First we clear all the 10/100 mb speed bits in the Auto-Neg
+	 * Advertisement Register (Address 4) and the 1000 mb speed bits in
+	 * the  1000Base-T Control Register (Address 9).
+	 */
+	mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |
+	                         NWAY_AR_100TX_HD_CAPS |
+	                         NWAY_AR_10T_FD_CAPS   |
+	                         NWAY_AR_10T_HD_CAPS);
+	mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
+
+	e_dbg("autoneg_advertised %x\n", phy->autoneg_advertised);
+
+	/* Do we want to advertise 10 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
+		e_dbg("Advertise 10mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;
+	}
+
+	/* Do we want to advertise 10 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_FULL) {
+		e_dbg("Advertise 10mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_HALF) {
+		e_dbg("Advertise 100mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_FULL) {
+		e_dbg("Advertise 100mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS;
+	}
+
+	/* We do not allow the Phy to advertise 1000 Mb Half Duplex */
+	if (phy->autoneg_advertised & ADVERTISE_1000_HALF)
+		e_dbg("Advertise 1000mb Half duplex request denied!\n");
+
+	/* Do we want to advertise 1000 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_1000_FULL) {
+		e_dbg("Advertise 1000mb Full duplex\n");
+		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
+	}
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the PHY advertisement registers accordingly.  If
+	 * auto-negotiation is enabled, then software will have to set the
+	 * "PAUSE" bits to the correct value in the Auto-Negotiation
+	 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto-
+	 * negotiation.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          but we do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 *  other:  No software override.  The flow control configuration
+	 *          in the EEPROM is used.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/*
+		 * Flow control (Rx & Tx) is completely disabled by a
+		 * software over-ride.
+		 */
+		mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled, and Tx Flow control is
+		 * disabled, by a software over-ride.
+		 *
+		 * Since there really isn't a way to advertise that we are
+		 * capable of Rx Pause ONLY, we will advertise that we
+		 * support both symmetric and asymmetric Rx PAUSE.  Later
+		 * (in e1000e_config_fc_after_link_up) we will disable the
+		 * hw's ability to send PAUSE frames.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is
+		 * disabled, by a software over-ride.
+		 */
+		mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR;
+		mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE;
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	default:
+		e_dbg("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = e1e_wphy(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		ret_val = e1e_wphy(hw,
+		                              PHY_1000T_CTRL,
+		                              mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_setup_copper_link - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+s32 e1000e_setup_copper_link(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	bool link;
+
+	if (hw->mac.autoneg) {
+		/*
+		 * Setup autoneg and flow control advertisement and perform
+		 * autonegotiation.
+		 */
+		ret_val = e1000e_copper_link_autoneg(hw);
+		if (ret_val)
+			goto out;
+	} else {
+#if 0
+		/*
+		 * PHY will be set to 10H, 10F, 100H or 100F
+		 * depending on user settings.
+		 */
+		e_dbg("Forcing Speed and Duplex\n");
+		ret_val = hw->phy.ops.force_speed_duplex(hw);
+		if (ret_val) {
+			e_dbg("Error Forcing Speed and Duplex\n");
+			goto out;
+		}
+#endif
+	}
+
+	/*
+	 * Check link status. Wait up to 100 microseconds for link to become
+	 * valid.
+	 */
+	ret_val = e1000e_phy_has_link_generic(hw,
+	                                     COPPER_LINK_UP_LIMIT,
+	                                     10,
+	                                     &link);
+	if (ret_val)
+		goto out;
+
+	if (link) {
+		e_dbg("Valid link established!!!\n");
+		e1000e_config_collision_dist(hw);
+		ret_val = e1000e_config_fc_after_link_up(hw);
+	} else {
+		e_dbg("Unable to establish link!!!\n");
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Waits for link and returns
+ *  successful if link up is successful, else -E1000_ERR_PHY (-2).
+ **/
+s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  IGP requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+	phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+
+	ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	e_dbg("IGP PSCR: %X\n", phy_data);
+
+	udelay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		e_dbg("Waiting for forced speed/duplex link on IGP phy.\n");
+
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			e_dbg("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Resets the PHY to commit the
+ *  changes.  If time expires while waiting for link up, we reset the DSP.
+ *  After reset, TX_CLK and CRS on Tx must be set.  Return successful upon
+ *  successful completion, else return corresponding error code.
+ **/
+s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+	ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	e_dbg("M88E1000 PSCR: %X\n", phy_data);
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/* Reset the phy to commit changes. */
+	ret_val = e1000e_commit_phy(hw);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_wait_to_complete) {
+		e_dbg("Waiting for forced speed/duplex link on M88 phy.\n");
+
+		ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			/*
+			 * We didn't get link.
+			 * Reset the DSP and cross our fingers.
+			 */
+			ret_val = e1e_wphy(hw,
+			                              M88E1000_PHY_PAGE_SELECT,
+			                              0x001d);
+			if (ret_val)
+				goto out;
+			ret_val = e1000e_phy_reset_dsp(hw);
+			if (ret_val)
+				goto out;
+		}
+
+		/* Try once more */
+		ret_val = e1000e_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1e_rphy(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Resetting the phy means we need to re-force TX_CLK in the
+	 * Extended PHY Specific Control Register to 25MHz clock from
+	 * the reset value of 2.5MHz.
+	 */
+	phy_data |= M88E1000_EPSCR_TX_CLK_25;
+	ret_val = e1e_wphy(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * In addition, we must re-enable CRS on Tx for both half and full
+	 * duplex.
+	 */
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+	ret_val = e1e_wphy(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_ife - Force PHY speed & duplex
+ *  @hw: pointer to the HW structure
+ *
+ *  Forces the speed and duplex settings of the PHY.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+s32 e1000e_phy_force_speed_duplex_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	if (phy->type != e1000_phy_ife) {
+		ret_val = e1000e_phy_force_speed_duplex_igp(hw);
+		goto out;
+	}
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	e1000e_phy_force_speed_duplex_setup(hw, &data);
+
+	ret_val = e1e_wphy(hw, PHY_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	/* Disable MDI-X support for 10/100 */
+	ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IFE_PMC_AUTO_MDIX;
+	data &= ~IFE_PMC_FORCE_MDIX;
+
+	ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	e_dbg("IFE PMC: %X\n", data);
+
+	udelay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		e_dbg("Waiting for forced speed/duplex link on IFE phy.\n");
+
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			e_dbg("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @phy_ctrl: pointer to current value of PHY_CONTROL
+ *
+ *  Forces speed and duplex on the PHY by doing the following: disable flow
+ *  control, force speed/duplex on the MAC, disable auto speed detection,
+ *  disable auto-negotiation, configure duplex, configure speed, configure
+ *  the collision distance, write configuration to CTRL register.  The
+ *  caller must write to the PHY_CONTROL register for these settings to
+ *  take affect.
+ **/
+void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 ctrl;
+
+	/* Turn off flow control when forcing speed/duplex */
+	hw->fc.current_mode = e1000_fc_none;
+
+	/* Force speed/duplex on the mac */
+	ctrl = er32(CTRL);
+	ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ctrl &= ~E1000_CTRL_SPD_SEL;
+
+	/* Disable Auto Speed Detection */
+	ctrl &= ~E1000_CTRL_ASDE;
+
+	/* Disable autoneg on the phy */
+	*phy_ctrl &= ~MII_CR_AUTO_NEG_EN;
+
+	/* Forcing Full or Half Duplex? */
+	if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) {
+		ctrl &= ~E1000_CTRL_FD;
+		*phy_ctrl &= ~MII_CR_FULL_DUPLEX;
+		e_dbg("Half Duplex\n");
+	} else {
+		ctrl |= E1000_CTRL_FD;
+		*phy_ctrl |= MII_CR_FULL_DUPLEX;
+		e_dbg("Full Duplex\n");
+	}
+
+	/* Forcing 10mb or 100mb? */
+	if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) {
+		ctrl |= E1000_CTRL_SPD_100;
+		*phy_ctrl |= MII_CR_SPEED_100;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10);
+		e_dbg("Forcing 100mb\n");
+	} else {
+		ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
+		*phy_ctrl |= MII_CR_SPEED_10;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100);
+		e_dbg("Forcing 10mb\n");
+	}
+
+	e1000e_config_collision_dist(hw);
+
+	ew32(CTRL, ctrl);
+}
+#endif
+
+/**
+ *  e1000e_set_d3_lplu_state - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.
+ **/
+s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &data);
+	if (ret_val)
+		goto out;
+
+	if (!active) {
+		data &= ~IGP02E1000_PM_D3_LPLU;
+		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		if (ret_val)
+			goto out;
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = e1e_rphy(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = e1e_rphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = e1e_wphy(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	} else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
+	           (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
+	           (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
+		data |= IGP02E1000_PM_D3_LPLU;
+		ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT,
+		                              data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                             &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                              data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_downshift - Checks whether a downshift in speed occurred
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  A downshift is detected by querying the PHY link health.
+ **/
+s32 e1000e_check_downshift(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	switch (phy->type) {
+	case e1000_phy_m88:
+	case e1000_phy_gg82563:
+	case e1000_phy_bm:
+	case e1000_phy_82578:
+		offset	= M88E1000_PHY_SPEC_STATUS;
+		mask	= M88E1000_PSSR_DOWNSHIFT;
+		break;
+	case e1000_phy_igp_2:
+	case e1000_phy_igp:
+	case e1000_phy_igp_3:
+		offset	= IGP01E1000_PHY_LINK_HEALTH;
+		mask	= IGP01E1000_PLHR_SS_DOWNGRADE;
+		break;
+	default:
+		/* speed downshift not supported */
+		phy->speed_downgraded = false;
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = e1e_rphy(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->speed_downgraded = (phy_data & mask) ? true : false;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_polarity_m88 - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY specific status register.
+ **/
+s32 e1000e_check_polarity_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_polarity_igp - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY port status register, and the
+ *  current speed (since there is no polarity at 100Mbps).
+ **/
+s32 e1000e_check_polarity_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data, offset, mask;
+
+	/*
+	 * Polarity is determined based on the speed of
+	 * our connection.
+	 */
+	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+		offset	= IGP01E1000_PHY_PCS_INIT_REG;
+		mask	= IGP01E1000_PHY_POLARITY_MASK;
+	} else {
+		/*
+		 * This really only applies to 10Mbps since
+		 * there is no polarity for 100Mbps (always 0).
+		 */
+		offset	= IGP01E1000_PHY_PORT_STATUS;
+		mask	= IGP01E1000_PSSR_POLARITY_REVERSED;
+	}
+
+	ret_val = e1e_rphy(hw, offset, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & mask)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_polarity_ife - Check cable polarity for IFE PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Polarity is determined on the polarity reversal feature being enabled.
+ **/
+s32 e1000e_check_polarity_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	/*
+	 * Polarity is determined based on the reversal feature being enabled.
+	 */
+	if (phy->polarity_correction) {
+		offset = IFE_PHY_EXTENDED_STATUS_CONTROL;
+		mask = IFE_PESC_POLARITY_REVERSED;
+	} else {
+		offset = IFE_PHY_SPECIAL_CONTROL;
+		mask = IFE_PSC_FORCE_POLARITY;
+	}
+
+	ret_val = e1e_rphy(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->cable_polarity = (phy_data & mask)
+		                       ? e1000_rev_polarity_reversed
+		                       : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_wait_autoneg - Wait for auto-neg completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Waits for auto-negotiation to complete or for the auto-negotiation time
+ *  limit to expire, which ever happens first.
+ **/
+s32 e1000e_wait_autoneg(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	/* Break after autoneg completes or PHY_AUTO_NEG_LIMIT expires. */
+	for (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) {
+		ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_AUTONEG_COMPLETE)
+			break;
+		msleep(100);
+	}
+
+	/*
+	 * PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation
+	 * has completed.
+	 */
+	return ret_val;
+}
+
+/**
+ *  e1000e_phy_has_link_generic - Polls PHY for link
+ *  @hw: pointer to the HW structure
+ *  @iterations: number of times to poll for link
+ *  @usec_interval: delay between polling attempts
+ *  @success: pointer to whether polling was successful or not
+ *
+ *  Polls the PHY status register for link, 'iterations' number of times.
+ **/
+s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                               u32 usec_interval, bool *success)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	for (i = 0; i < iterations; i++) {
+		/*
+		 * Some PHYs require the PHY_STATUS register to be read
+		 * twice due to the link bit being sticky.  No harm doing
+		 * it across the board.
+		 */
+		ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status);
+		if (ret_val) {
+			/*
+			 * If the first read fails, another entity may have
+			 * ownership of the resources, wait and try again to
+			 * see if they have relinquished the resources yet.
+			 */
+			udelay(usec_interval);
+		}
+		ret_val = e1e_rphy(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_LINK_STATUS)
+			break;
+		if (usec_interval >= 1000)
+			mdelay(usec_interval/1000);
+		else
+			udelay(usec_interval);
+	}
+
+	*success = (i < iterations) ? true : false;
+
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000e_get_cable_length_m88 - Determine cable length for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY specific status register to retrieve the cable length
+ *  information.  The cable length is determined by averaging the minimum and
+ *  maximum values to get the "average" cable length.  The m88 PHY has four
+ *  possible cable length values, which are:
+ *	Register Value		Cable Length
+ *	0			< 50 meters
+ *	1			50 - 80 meters
+ *	2			80 - 110 meters
+ *	3			110 - 140 meters
+ *	4			> 140 meters
+ **/
+s32 e1000e_get_cable_length_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, index;
+
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+	        M88E1000_PSSR_CABLE_LENGTH_SHIFT;
+	if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+	phy->min_cable_length = e1000_m88_cable_length_table[index];
+	phy->max_cable_length = e1000_m88_cable_length_table[index + 1];
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_cable_length_igp_2 - Determine cable length for igp2 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  The automatic gain control (agc) normalizes the amplitude of the
+ *  received signal, adjusting for the attenuation produced by the
+ *  cable.  By reading the AGC registers, which represent the
+ *  combination of coarse and fine gain value, the value can be put
+ *  into a lookup table to obtain the approximate cable length
+ *  for each channel.
+ **/
+s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data, i, agc_value = 0;
+	u16 cur_agc_index, max_agc_index = 0;
+	u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
+	u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
+	                                                 {IGP02E1000_PHY_AGC_A,
+	                                                  IGP02E1000_PHY_AGC_B,
+	                                                  IGP02E1000_PHY_AGC_C,
+	                                                  IGP02E1000_PHY_AGC_D};
+
+	/* Read the AGC registers for all channels */
+	for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
+		ret_val = e1e_rphy(hw, agc_reg_array[i], &phy_data);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Getting bits 15:9, which represent the combination of
+		 * coarse and fine gain values.  The result is a number
+		 * that can be put into the lookup table to obtain the
+		 * approximate cable length.
+		 */
+		cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
+		                IGP02E1000_AGC_LENGTH_MASK;
+
+		/* Array index bound check. */
+		if ((cur_agc_index >= IGP02E1000_CABLE_LENGTH_TABLE_SIZE) ||
+		    (cur_agc_index == 0)) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+
+		/* Remove min & max AGC values from calculation. */
+		if (e1000_igp_2_cable_length_table[min_agc_index] >
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			min_agc_index = cur_agc_index;
+		if (e1000_igp_2_cable_length_table[max_agc_index] <
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			max_agc_index = cur_agc_index;
+
+		agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
+	}
+
+	agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
+	              e1000_igp_2_cable_length_table[max_agc_index]);
+	agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
+
+	/* Calculate cable length with the error range of +/- 10 meters. */
+	phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ?
+	                         (agc_value - IGP02E1000_AGC_RANGE) : 0;
+	phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE;
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000e_get_phy_info_m88 - Retrieve PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Valid for only copper links.  Read the PHY status register (sticky read)
+ *  to verify that link is up.  Read the PHY special control register to
+ *  determine the polarity and 10base-T extended distance.  Read the PHY
+ *  special status register to determine MDI/MDIx and current speed.  If
+ *  speed is 1000, then determine cable length, local and remote receiver.
+ **/
+s32 e1000e_get_phy_info_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32  ret_val;
+	u16 phy_data;
+	bool link;
+
+	if (phy->media_type != e1000_media_type_copper) {
+		e_dbg("Phy info is only valid for copper media\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		e_dbg("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL)
+	                           ? true : false;
+
+	ret_val = e1000e_check_polarity_m88(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_rphy(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX) ? true : false;
+
+	if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
+#if 0
+		ret_val = e1000e_get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = e1e_rphy(hw, PHY_1000T_STATUS, &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+#endif
+	} else {
+		/* Set values to "undefined" */
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_phy_info_igp - Retrieve igp PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Read PHY status to determine if link is up.  If link is up, then
+ *  set/determine 10base-T extended distance and polarity correction.  Read
+ *  PHY port status to determine MDI/MDIx and speed.  Based on the speed,
+ *  determine on the cable length, local and remote receiver.
+ **/
+s32 e1000e_get_phy_info_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		e_dbg("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	phy->polarity_correction = true;
+
+	ret_val = e1000e_check_polarity_igp(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & IGP01E1000_PSSR_MDIX) ? true : false;
+
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+#if 0
+		ret_val = phy->ops.get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = e1e_rphy(hw, PHY_1000T_STATUS, &data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+#endif
+	} else {
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_phy_sw_reset - PHY software reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Does a software reset of the PHY by reading the PHY control register and
+ *  setting/write the control register reset bit to the PHY.
+ **/
+s32 e1000e_phy_sw_reset(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_ctrl;
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= MII_CR_RESET;
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	udelay(1);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_phy_hw_reset_generic - PHY hardware reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify the reset block is not blocking us from resetting.  Acquire
+ *  semaphore (if necessary) and read/set/write the device control reset
+ *  bit in the PHY.  Wait the appropriate delay time for the device to
+ *  reset and release the semaphore (if necessary).
+ **/
+s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl;
+
+	ret_val = e1000e_check_reset_block(hw);
+	if (ret_val) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = phy->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ctrl = er32(CTRL);
+	ew32(CTRL, ctrl | E1000_CTRL_PHY_RST);
+	e1e_flush();
+
+	udelay(phy->reset_delay_us);
+
+	ew32(CTRL, ctrl);
+	e1e_flush();
+
+	udelay(150);
+
+	phy->ops.release(hw);
+
+	ret_val = phy->ops.get_cfg_done(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_cfg_done - Generic configuration done
+ *  @hw: pointer to the HW structure
+ *
+ *  Generic function to wait 10 milli-seconds for configuration to complete
+ *  and return success.
+ **/
+s32 e1000e_get_cfg_done(struct e1000_hw *hw __unused)
+{
+	mdelay(10);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_phy_init_script_igp3 - Inits the IGP3 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes a Intel Gigabit PHY3 when an EEPROM is not present.
+ **/
+s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw)
+{
+	e_dbg("Running IGP 3 PHY init script\n");
+
+	/* PHY init IGP 3 */
+	/* Enable rise/fall, 10-mode work in class-A */
+	e1e_wphy(hw, 0x2F5B, 0x9018);
+	/* Remove all caps from Replica path filter */
+	e1e_wphy(hw, 0x2F52, 0x0000);
+	/* Bias trimming for ADC, AFE and Driver (Default) */
+	e1e_wphy(hw, 0x2FB1, 0x8B24);
+	/* Increase Hybrid poly bias */
+	e1e_wphy(hw, 0x2FB2, 0xF8F0);
+	/* Add 4% to Tx amplitude in Gig mode */
+	e1e_wphy(hw, 0x2010, 0x10B0);
+	/* Disable trimming (TTT) */
+	e1e_wphy(hw, 0x2011, 0x0000);
+	/* Poly DC correction to 94.6% + 2% for all channels */
+	e1e_wphy(hw, 0x20DD, 0x249A);
+	/* ABS DC correction to 95.9% */
+	e1e_wphy(hw, 0x20DE, 0x00D3);
+	/* BG temp curve trim */
+	e1e_wphy(hw, 0x28B4, 0x04CE);
+	/* Increasing ADC OPAMP stage 1 currents to max */
+	e1e_wphy(hw, 0x2F70, 0x29E4);
+	/* Force 1000 ( required for enabling PHY regs configuration) */
+	e1e_wphy(hw, 0x0000, 0x0140);
+	/* Set upd_freq to 6 */
+	e1e_wphy(hw, 0x1F30, 0x1606);
+	/* Disable NPDFE */
+	e1e_wphy(hw, 0x1F31, 0xB814);
+	/* Disable adaptive fixed FFE (Default) */
+	e1e_wphy(hw, 0x1F35, 0x002A);
+	/* Enable FFE hysteresis */
+	e1e_wphy(hw, 0x1F3E, 0x0067);
+	/* Fixed FFE for short cable lengths */
+	e1e_wphy(hw, 0x1F54, 0x0065);
+	/* Fixed FFE for medium cable lengths */
+	e1e_wphy(hw, 0x1F55, 0x002A);
+	/* Fixed FFE for long cable lengths */
+	e1e_wphy(hw, 0x1F56, 0x002A);
+	/* Enable Adaptive Clip Threshold */
+	e1e_wphy(hw, 0x1F72, 0x3FB0);
+	/* AHT reset limit to 1 */
+	e1e_wphy(hw, 0x1F76, 0xC0FF);
+	/* Set AHT master delay to 127 msec */
+	e1e_wphy(hw, 0x1F77, 0x1DEC);
+	/* Set scan bits for AHT */
+	e1e_wphy(hw, 0x1F78, 0xF9EF);
+	/* Set AHT Preset bits */
+	e1e_wphy(hw, 0x1F79, 0x0210);
+	/* Change integ_factor of channel A to 3 */
+	e1e_wphy(hw, 0x1895, 0x0003);
+	/* Change prop_factor of channels BCD to 8 */
+	e1e_wphy(hw, 0x1796, 0x0008);
+	/* Change cg_icount + enable integbp for channels BCD */
+	e1e_wphy(hw, 0x1798, 0xD008);
+	/*
+	 * Change cg_icount + enable integbp + change prop_factor_master
+	 * to 8 for channel A
+	 */
+	e1e_wphy(hw, 0x1898, 0xD918);
+	/* Disable AHT in Slave mode on channel A */
+	e1e_wphy(hw, 0x187A, 0x0800);
+	/*
+	 * Enable LPLU and disable AN to 1000 in non-D0a states,
+	 * Enable SPD+B2B
+	 */
+	e1e_wphy(hw, 0x0019, 0x008D);
+	/* Enable restart AN on an1000_dis change */
+	e1e_wphy(hw, 0x001B, 0x2080);
+	/* Enable wh_fifo read clock in 10/100 modes */
+	e1e_wphy(hw, 0x0014, 0x0045);
+	/* Restart AN, Speed selection is 1000 */
+	e1e_wphy(hw, 0x0000, 0x1340);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000e_get_phy_type_from_id - Get PHY type from id
+ *  @phy_id: phy_id read from the phy
+ *
+ *  Returns the phy type from the id.
+ **/
+enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id)
+{
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	switch (phy_id)	{
+	case M88E1000_I_PHY_ID:
+	case M88E1000_E_PHY_ID:
+	case M88E1111_I_PHY_ID:
+	case M88E1011_I_PHY_ID:
+		phy_type = e1000_phy_m88;
+		break;
+	case IGP01E1000_I_PHY_ID: /* IGP 1 & 2 share this */
+		phy_type = e1000_phy_igp_2;
+		break;
+	case GG82563_E_PHY_ID:
+		phy_type = e1000_phy_gg82563;
+		break;
+	case IGP03E1000_E_PHY_ID:
+		phy_type = e1000_phy_igp_3;
+		break;
+	case IFE_E_PHY_ID:
+	case IFE_PLUS_E_PHY_ID:
+	case IFE_C_E_PHY_ID:
+		phy_type = e1000_phy_ife;
+		break;
+	case BME1000_E_PHY_ID:
+	case BME1000_E_PHY_ID_R2:
+		phy_type = e1000_phy_bm;
+		break;
+	case I82578_E_PHY_ID:
+		phy_type = e1000_phy_82578;
+		break;
+	case I82577_E_PHY_ID:
+		phy_type = e1000_phy_82577;
+		break;
+	default:
+		phy_type = e1000_phy_unknown;
+		break;
+	}
+	return phy_type;
+}
+
+/**
+ *  e1000e_determine_phy_address - Determines PHY address.
+ *  @hw: pointer to the HW structure
+ *
+ *  This uses a trial and error method to loop through possible PHY
+ *  addresses. It tests each by reading the PHY ID registers and
+ *  checking for a match.
+ **/
+s32 e1000e_determine_phy_address(struct e1000_hw *hw)
+{
+	s32 ret_val = -E1000_ERR_PHY_TYPE;
+	u32 phy_addr = 0;
+	u32 i;
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	hw->phy.id = phy_type;
+
+	for (phy_addr = 0; phy_addr < E1000_MAX_PHY_ADDR; phy_addr++) {
+		hw->phy.addr = phy_addr;
+		i = 0;
+
+		do {
+			e1000e_get_phy_id(hw);
+			phy_type = e1000e_get_phy_type_from_id(hw->phy.id);
+
+			/*
+			 * If phy_type is valid, break - we found our
+			 * PHY address
+			 */
+			if (phy_type  != e1000_phy_unknown) {
+				ret_val = E1000_SUCCESS;
+				goto out;
+			}
+			msleep(1);
+			i++;
+		} while (i < 10);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_get_phy_addr_for_bm_page - Retrieve PHY page address
+ *  @page: page to access
+ *
+ *  Returns the phy address for the page requested.
+ **/
+static u32 e1000e_get_phy_addr_for_bm_page(u32 page, u32 reg)
+{
+	u32 phy_addr = 2;
+
+	if ((page >= 768) || (page == 0 && reg == 25) || (reg == 31))
+		phy_addr = 1;
+
+	return phy_addr;
+}
+
+/**
+ *  e1000e_write_phy_reg_bm - Write BM PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val;
+	u32 page_select = 0;
+	u32 page = offset >> IGP_PAGE_SHIFT;
+	u32 page_shift = 0;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset, &data,
+		                                         false);
+		goto out;
+	}
+
+	hw->phy.addr = e1000e_get_phy_addr_for_bm_page(page, offset);
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		/*
+		 * Page select is register 31 for phy address 1 and 22 for
+		 * phy address 2 and 3. Page select is shifted only for
+		 * phy address 1.
+		 */
+		if (hw->phy.addr == 1) {
+			page_shift = IGP_PAGE_SHIFT;
+			page_select = IGP01E1000_PHY_PAGE_SELECT;
+		} else {
+			page_shift = 0;
+			page_select = BM_PHY_PAGE_SELECT;
+		}
+
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
+		                                   (page << page_shift));
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+out:
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_bm - Read BM PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val;
+	u32 page_select = 0;
+	u32 page = offset >> IGP_PAGE_SHIFT;
+	u32 page_shift = 0;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset, data,
+		                                         true);
+		goto out;
+	}
+
+	hw->phy.addr = e1000e_get_phy_addr_for_bm_page(page, offset);
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		/*
+		 * Page select is register 31 for phy address 1 and 22 for
+		 * phy address 2 and 3. Page select is shifted only for
+		 * phy address 1.
+		 */
+		if (hw->phy.addr == 1) {
+			page_shift = IGP_PAGE_SHIFT;
+			page_select = IGP01E1000_PHY_PAGE_SELECT;
+		} else {
+			page_shift = 0;
+			page_select = BM_PHY_PAGE_SELECT;
+		}
+
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
+		                                   (page << page_shift));
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+out:
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_bm2 - Read BM PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val;
+	u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset, data,
+		                                         true);
+		goto out;
+	}
+
+	hw->phy.addr = 1;
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
+		                                   page);
+
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+out:
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_bm2 - Write BM PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val;
+	u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		return ret_val;
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset, &data,
+		                                         false);
+		goto out;
+	}
+
+	hw->phy.addr = 1;
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
+		                                   page);
+
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+out:
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/**
+ *  e1000e_access_phy_wakeup_reg_bm - Read BM PHY wakeup register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read or written
+ *  @data: pointer to the data to read or write
+ *  @read: determines if operation is read or write
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting. Note that procedure to read the wakeup
+ *  registers are different. It works as such:
+ *  1) Set page 769, register 17, bit 2 = 1
+ *  2) Set page to 800 for host (801 if we were manageability)
+ *  3) Write the address using the address opcode (0x11)
+ *  4) Read or write the data using the data opcode (0x12)
+ *  5) Restore 769_17.2 to its original value
+ *
+ *  Assumes semaphore already acquired.
+ **/
+static s32 e1000e_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
+                                          u16 *data, bool read)
+{
+	s32 ret_val;
+	u16 reg = BM_PHY_REG_NUM(offset);
+	u16 phy_reg = 0;
+
+	/* Gig must be disabled for MDIO accesses to page 800 */
+	if ((hw->mac.type == e1000_pchlan) &&
+	   (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
+		e_dbg("Attempting to access page 800 while gig enabled.\n");
+
+	/* All operations in this function are phy address 1 */
+	hw->phy.addr = 1;
+
+	/* Set page 769 */
+	e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
+	                         (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
+	if (ret_val) {
+		e_dbg("Could not read PHY page 769\n");
+		goto out;
+	}
+
+	/* First clear bit 4 to avoid a power state change */
+	phy_reg &= ~(BM_WUC_HOST_WU_BIT);
+	ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
+	if (ret_val) {
+		e_dbg("Could not clear PHY page 769 bit 4\n");
+		goto out;
+	}
+
+	/* Write bit 2 = 1, and clear bit 4 to 769_17 */
+	ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG,
+	                                   phy_reg | BM_WUC_ENABLE_BIT);
+	if (ret_val) {
+		e_dbg("Could not write PHY page 769 bit 2\n");
+		goto out;
+	}
+
+	/* Select page 800 */
+	ret_val = e1000e_write_phy_reg_mdic(hw,
+	                                   IGP01E1000_PHY_PAGE_SELECT,
+	                                   (BM_WUC_PAGE << IGP_PAGE_SHIFT));
+
+	/* Write the page 800 offset value using opcode 0x11 */
+	ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
+	if (ret_val) {
+		e_dbg("Could not write address opcode to page 800\n");
+		goto out;
+	}
+
+	if (read) {
+	        /* Read the page 800 value using opcode 0x12 */
+		ret_val = e1000e_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
+		                                  data);
+	} else {
+	        /* Write the page 800 value using opcode 0x12 */
+		ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
+		                                   *data);
+	}
+
+	if (ret_val) {
+		e_dbg("Could not access data value from page 800\n");
+		goto out;
+	}
+
+	/*
+	 * Restore 769_17.2 to its original value
+	 * Set page 769
+	 */
+	e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
+	                         (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
+
+	/* Clear 769_17.2 */
+	ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
+	if (ret_val) {
+		e_dbg("Could not clear PHY page 769 bit 2\n");
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * e1000e_power_up_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void e1000e_power_up_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	e1e_rphy(hw, PHY_CONTROL, &mii_reg);
+	mii_reg &= ~MII_CR_POWER_DOWN;
+	e1e_wphy(hw, PHY_CONTROL, mii_reg);
+}
+
+/**
+ * e1000e_power_down_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void e1000e_power_down_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	e1e_rphy(hw, PHY_CONTROL, &mii_reg);
+	mii_reg |= MII_CR_POWER_DOWN;
+	e1e_wphy(hw, PHY_CONTROL, mii_reg);
+	msleep(1);
+}
+
+/**
+ *  e1000e_set_mdio_slow_mode_hv - Set slow MDIO access mode
+ *  @hw:   pointer to the HW structure
+ *  @slow: true for slow mode, false for normal mode
+ *
+ *  Assumes semaphore already acquired.
+ **/
+s32 e1000e_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 data = 0;
+
+	/* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */
+	hw->phy.addr = 1;
+	ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
+				         (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
+	if (ret_val)
+		goto out;
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1,
+	                                   (0x2180 | (slow << 10)));
+	if (ret_val)
+		goto out;
+
+	/* dummy read when reverting to fast mode - throw away result */
+	if (!slow)
+		ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  __e1000e_read_phy_reg_hv -  Read HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and stores the retrieved information in data.  Release any acquired
+ *  semaphore before exiting.
+ **/
+static s32 __e1000e_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
+                                   bool locked)
+{
+	s32 ret_val;
+	u16 page = BM_PHY_REG_PAGE(offset);
+	u16 reg = BM_PHY_REG_NUM(offset);
+	bool in_slow_mode = false;
+
+	if (!locked) {
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			return ret_val;
+	}
+
+	/* Workaround failure in MDIO access while cable is disconnected */
+	if ((hw->phy.type == e1000_phy_82577) &&
+	    !(er32(STATUS) & E1000_STATUS_LU)) {
+		ret_val = e1000e_set_mdio_slow_mode_hv(hw, true);
+		if (ret_val)
+			goto out;
+
+		in_slow_mode = true;
+	}
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset,
+		                                         data, true);
+		goto out;
+	}
+
+	if (page > 0 && page < HV_INTC_FC_PAGE_START) {
+		ret_val = e1000e_access_phy_debug_regs_hv(hw, offset,
+		                                         data, true);
+		goto out;
+	}
+
+	hw->phy.addr = e1000e_get_phy_addr_for_hv_page(page);
+
+	if (page == HV_INTC_FC_PAGE_START)
+		page = 0;
+
+	if (reg > MAX_PHY_MULTI_PAGE_REG) {
+		u32 phy_addr = hw->phy.addr;
+
+		hw->phy.addr = 1;
+
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+					     IGP01E1000_PHY_PAGE_SELECT,
+					     (page << IGP_PAGE_SHIFT));
+		hw->phy.addr = phy_addr;
+
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
+	                                  data);
+out:
+	/* Revert to MDIO fast mode, if applicable */
+	if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
+		ret_val |= e1000e_set_mdio_slow_mode_hv(hw, false);
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_read_phy_reg_hv -  Read HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore then reads the PHY register at offset and stores
+ *  the retrieved information in data.  Release the acquired semaphore
+ *  before exiting.
+ **/
+s32 e1000e_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_phy_reg_hv(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_read_phy_reg_hv_locked -  Read HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset and stores the retrieved information
+ *  in data.  Assumes semaphore already acquired.
+ **/
+s32 e1000e_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __e1000e_read_phy_reg_hv(hw, offset, data, true);
+}
+
+/**
+ *  __e1000e_write_phy_reg_hv - Write HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+static s32 __e1000e_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
+                                    bool locked)
+{
+	s32 ret_val;
+	u16 page = BM_PHY_REG_PAGE(offset);
+	u16 reg = BM_PHY_REG_NUM(offset);
+	bool in_slow_mode = false;
+
+	if (!locked) {
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			return ret_val;
+	}
+
+	/* Workaround failure in MDIO access while cable is disconnected */
+	if ((hw->phy.type == e1000_phy_82577) &&
+	    !(er32(STATUS) & E1000_STATUS_LU)) {
+		ret_val = e1000e_set_mdio_slow_mode_hv(hw, true);
+		if (ret_val)
+			goto out;
+
+		in_slow_mode = true;
+	}
+
+	/* Page 800 works differently than the rest so it has its own func */
+	if (page == BM_WUC_PAGE) {
+		ret_val = e1000e_access_phy_wakeup_reg_bm(hw, offset,
+		                                         &data, false);
+		goto out;
+	}
+
+	if (page > 0 && page < HV_INTC_FC_PAGE_START) {
+		ret_val = e1000e_access_phy_debug_regs_hv(hw, offset,
+		                                         &data, false);
+		goto out;
+	}
+
+	hw->phy.addr = e1000e_get_phy_addr_for_hv_page(page);
+
+	if (page == HV_INTC_FC_PAGE_START)
+		page = 0;
+
+	/*
+	 * Workaround MDIO accesses being disabled after entering IEEE Power
+	 * Down (whenever bit 11 of the PHY Control register is set)
+	 */
+	if ((hw->phy.type == e1000_phy_82578) &&
+	    (hw->phy.revision >= 1) &&
+	    (hw->phy.addr == 2) &&
+	    ((MAX_PHY_REG_ADDRESS & reg) == 0) &&
+	    (data & (1 << 11))) {
+		u16 data2 = 0x7EFF;
+		ret_val = e1000e_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3,
+		                                         &data2, false);
+		if (ret_val)
+			goto out;
+	}
+
+	if (reg > MAX_PHY_MULTI_PAGE_REG) {
+		u32 phy_addr = hw->phy.addr;
+
+		hw->phy.addr = 1;
+
+		/* Page is shifted left, PHY expects (page x 32) */
+		ret_val = e1000e_write_phy_reg_mdic(hw,
+					     IGP01E1000_PHY_PAGE_SELECT,
+					     (page << IGP_PAGE_SHIFT));
+		hw->phy.addr = phy_addr;
+
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
+	                                  data);
+
+out:
+	/* Revert to MDIO fast mode, if applicable */
+	if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
+		ret_val |= e1000e_set_mdio_slow_mode_hv(hw, false);
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+	return ret_val;
+}
+
+/**
+ *  e1000e_write_phy_reg_hv - Write HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore then writes the data to PHY register at the offset.
+ *  Release the acquired semaphores before exiting.
+ **/
+s32 e1000e_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_phy_reg_hv(hw, offset, data, false);
+}
+
+/**
+ *  e1000e_write_phy_reg_hv_locked - Write HV PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset.  Assumes semaphore
+ *  already acquired.
+ **/
+s32 e1000e_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __e1000e_write_phy_reg_hv(hw, offset, data, true);
+}
+
+/**
+ *  e1000e_get_phy_addr_for_hv_page - Get PHY adrress based on page
+ *  @page: page to be accessed
+ **/
+static u32 e1000e_get_phy_addr_for_hv_page(u32 page)
+{
+	u32 phy_addr = 2;
+
+	if (page >= HV_INTC_FC_PAGE_START)
+		phy_addr = 1;
+
+	return phy_addr;
+}
+
+/**
+ *  e1000e_access_phy_debug_regs_hv - Read HV PHY vendor specific high registers
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read or written
+ *  @data: pointer to the data to be read or written
+ *  @read: determines if operation is read or written
+ *
+ *  Reads the PHY register at offset and stores the retreived information
+ *  in data.  Assumes semaphore already acquired.  Note that the procedure
+ *  to read these regs uses the address port and data port to read/write.
+ **/
+static s32 e1000e_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
+                                          u16 *data, bool read)
+{
+	s32 ret_val;
+	u32 addr_reg = 0;
+	u32 data_reg = 0;
+
+	/* This takes care of the difference with desktop vs mobile phy */
+	addr_reg = (hw->phy.type == e1000_phy_82578) ?
+	           I82578_ADDR_REG : I82577_ADDR_REG;
+	data_reg = addr_reg + 1;
+
+	/* All operations in this function are phy address 2 */
+	hw->phy.addr = 2;
+
+	/* masking with 0x3F to remove the page from offset */
+	ret_val = e1000e_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);
+	if (ret_val) {
+		e_dbg("Could not write PHY the HV address register\n");
+		goto out;
+	}
+
+	/* Read or write the data value next */
+	if (read)
+		ret_val = e1000e_read_phy_reg_mdic(hw, data_reg, data);
+	else
+		ret_val = e1000e_write_phy_reg_mdic(hw, data_reg, *data);
+
+	if (ret_val) {
+		e_dbg("Could not read data value from HV data register\n");
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_link_stall_workaround_hv - Si workaround
+ *  @hw: pointer to the HW structure
+ *
+ *  This function works around a Si bug where the link partner can get
+ *  a link up indication before the PHY does.  If small packets are sent
+ *  by the link partner they can be placed in the packet buffer without
+ *  being properly accounted for by the PHY and will stall preventing
+ *  further packets from being received.  The workaround is to clear the
+ *  packet buffer after the PHY detects link up.
+ **/
+s32 e1000e_link_stall_workaround_hv(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	if (hw->phy.type != e1000_phy_82578)
+		goto out;
+
+	/* Do not apply workaround if in PHY loopback bit 14 set */
+	e1e_rphy(hw, PHY_CONTROL, &data);
+	if (data & PHY_CONTROL_LB)
+		goto out;
+
+	/* check if link is up and at 1Gbps */
+	ret_val = e1e_rphy(hw, BM_CS_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	data &= BM_CS_STATUS_LINK_UP |
+	        BM_CS_STATUS_RESOLVED |
+	        BM_CS_STATUS_SPEED_MASK;
+
+	if (data != (BM_CS_STATUS_LINK_UP |
+	             BM_CS_STATUS_RESOLVED |
+	             BM_CS_STATUS_SPEED_1000))
+		goto out;
+
+	msleep(200);
+
+	/* flush the packets in the fifo buffer */
+	ret_val = e1e_wphy(hw, HV_MUX_DATA_CTRL,
+	                                HV_MUX_DATA_CTRL_GEN_TO_MAC |
+	                                HV_MUX_DATA_CTRL_FORCE_SPEED);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_wphy(hw, HV_MUX_DATA_CTRL,
+	                                HV_MUX_DATA_CTRL_GEN_TO_MAC);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000e_check_polarity_82577 - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY specific status register.
+ **/
+s32 e1000e_check_polarity_82577(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	ret_val = e1e_rphy(hw, I82577_PHY_STATUS_2, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & I82577_PHY_STATUS2_REV_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000e_phy_force_speed_duplex_82577 - Force speed/duplex for I82577 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Waits for link and returns
+ *  successful if link up is successful, else -E1000_ERR_PHY (-2).
+ **/
+s32 e1000e_phy_force_speed_duplex_82577(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	ret_val = e1e_rphy(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	e1000e_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = e1e_wphy(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  82577 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = e1e_rphy(hw, I82577_PHY_CTRL_2, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~I82577_PHY_CTRL2_AUTO_MDIX;
+	phy_data &= ~I82577_PHY_CTRL2_FORCE_MDI_MDIX;
+
+	ret_val = e1e_wphy(hw, I82577_PHY_CTRL_2, phy_data);
+	if (ret_val)
+		goto out;
+
+	e_dbg("I82577_PHY_CTRL_2: %X\n", phy_data);
+
+	udelay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		e_dbg("Waiting for forced speed/duplex link on 82577 phy\n");
+
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			e_dbg("Link taking longer than expected.\n");
+
+		/* Try once more */
+		ret_val = e1000e_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  e1000e_get_phy_info_82577 - Retrieve I82577 PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Read PHY status to determine if link is up.  If link is up, then
+ *  set/determine 10base-T extended distance and polarity correction.  Read
+ *  PHY port status to determine MDI/MDIx and speed.  Based on the speed,
+ *  determine on the cable length, local and remote receiver.
+ **/
+s32 e1000e_get_phy_info_82577(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	ret_val = e1000e_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		e_dbg("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	phy->polarity_correction = true;
+
+	ret_val = e1000e_check_polarity_82577(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = e1e_rphy(hw, I82577_PHY_STATUS_2, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & I82577_PHY_STATUS2_MDIX) ? true : false;
+
+	if ((data & I82577_PHY_STATUS2_SPEED_MASK) ==
+	    I82577_PHY_STATUS2_SPEED_1000MBPS) {
+#if 0
+		ret_val = e1000e_get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = e1e_rphy(hw, PHY_1000T_STATUS, &data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+#endif
+	} else {
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  e1000e_get_cable_length_82577 - Determine cable length for 82577 PHY
+ *  @hw: pointer to the HW structure
+ *
+ * Reads the diagnostic status register and verifies result is valid before
+ * placing it in the phy_cable_length field.
+ **/
+s32 e1000e_get_cable_length_82577(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, length;
+
+	ret_val = e1e_rphy(hw, I82577_PHY_DIAG_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	length = (phy_data & I82577_DSTATUS_CABLE_LENGTH) >>
+	         I82577_DSTATUS_CABLE_LENGTH_SHIFT;
+
+	if (length == E1000_CABLE_LENGTH_UNDEFINED)
+		ret_val = -E1000_ERR_PHY;
+
+	phy->cable_length = length;
+
+out:
+	return ret_val;
+}
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_phy.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_phy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_phy.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_phy.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,261 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_PHY_H_
+#define _E1000E_PHY_H_
+
+void e1000e_init_phy_ops_generic(struct e1000_hw *hw);
+s32  e1000e_check_downshift(struct e1000_hw *hw);
+s32  e1000e_check_polarity_m88(struct e1000_hw *hw);
+s32  e1000e_check_polarity_igp(struct e1000_hw *hw);
+s32  e1000e_check_polarity_ife(struct e1000_hw *hw);
+s32  e1000e_check_reset_block_generic(struct e1000_hw *hw);
+s32  e1000e_copper_link_setup_igp(struct e1000_hw *hw);
+s32  e1000e_copper_link_setup_m88(struct e1000_hw *hw);
+#if 0
+s32  e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
+s32  e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
+s32  e1000e_phy_force_speed_duplex_ife(struct e1000_hw *hw);
+#endif
+#if 0
+s32  e1000e_get_cable_length_m88(struct e1000_hw *hw);
+s32  e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
+#endif
+s32  e1000e_get_cfg_done(struct e1000_hw *hw);
+s32  e1000e_get_phy_id(struct e1000_hw *hw);
+s32  e1000e_get_phy_info_igp(struct e1000_hw *hw);
+s32  e1000e_get_phy_info_m88(struct e1000_hw *hw);
+s32  e1000e_phy_sw_reset(struct e1000_hw *hw);
+#if 0
+void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
+#endif
+s32  e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
+s32  e1000e_phy_reset_dsp(struct e1000_hw *hw);
+s32  e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+s32  e1000e_setup_copper_link(struct e1000_hw *hw);
+s32  e1000e_wait_autoneg(struct e1000_hw *hw);
+s32  e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_phy_reset_dsp(struct e1000_hw *hw);
+s32  e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                                u32 usec_interval, bool *success);
+s32  e1000e_phy_init_script_igp3(struct e1000_hw *hw);
+enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
+s32  e1000e_determine_phy_address(struct e1000_hw *hw);
+s32  e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
+void e1000e_power_up_phy_copper(struct e1000_hw *hw);
+void e1000e_power_down_phy_copper(struct e1000_hw *hw);
+s32  e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000e_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000e_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
+s32  e1000e_link_stall_workaround_hv(struct e1000_hw *hw);
+s32  e1000e_copper_link_setup_82577(struct e1000_hw *hw);
+s32  e1000e_check_polarity_82577(struct e1000_hw *hw);
+s32  e1000e_get_phy_info_82577(struct e1000_hw *hw);
+#if 0
+s32  e1000e_phy_force_speed_duplex_82577(struct e1000_hw *hw);
+#endif
+#if 0
+s32  e1000e_get_cable_length_82577(struct e1000_hw *hw);
+#endif
+
+#define E1000_MAX_PHY_ADDR                4
+
+/* IGP01E1000 Specific Registers */
+#define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */
+#define IGP01E1000_PHY_PORT_STATUS        0x11 /* Status */
+#define IGP01E1000_PHY_PORT_CTRL          0x12 /* Control */
+#define IGP01E1000_PHY_LINK_HEALTH        0x13 /* PHY Link Health */
+#define IGP01E1000_GMII_FIFO              0x14 /* GMII FIFO */
+#define IGP01E1000_PHY_CHANNEL_QUALITY    0x15 /* PHY Channel Quality */
+#define IGP02E1000_PHY_POWER_MGMT         0x19 /* Power Management */
+#define IGP01E1000_PHY_PAGE_SELECT        0x1F /* Page Select */
+#define BM_PHY_PAGE_SELECT                22   /* Page Select for BM */
+#define IGP_PAGE_SHIFT                    5
+#define PHY_REG_MASK                      0x1F
+
+/* BM/HV Specific Registers */
+#define BM_PORT_CTRL_PAGE                 769
+#define BM_PCIE_PAGE                      770
+#define BM_WUC_PAGE                       800
+#define BM_WUC_ADDRESS_OPCODE             0x11
+#define BM_WUC_DATA_OPCODE                0x12
+#define BM_WUC_ENABLE_PAGE                BM_PORT_CTRL_PAGE
+#define BM_WUC_ENABLE_REG                 17
+#define BM_WUC_ENABLE_BIT                 (1 << 2)
+#define BM_WUC_HOST_WU_BIT                (1 << 4)
+
+#define PHY_UPPER_SHIFT                   21
+#define BM_PHY_REG(page, reg) \
+	(((reg) & MAX_PHY_REG_ADDRESS) |\
+	 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
+	 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
+#define BM_PHY_REG_PAGE(offset) \
+	((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))
+#define BM_PHY_REG_NUM(offset) \
+	((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
+	 (((offset) >> (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)) &\
+		~MAX_PHY_REG_ADDRESS)))
+
+#define HV_INTC_FC_PAGE_START             768
+#define I82578_ADDR_REG                   29
+#define I82577_ADDR_REG                   16
+#define I82577_CFG_REG                    22
+#define I82577_CFG_ASSERT_CRS_ON_TX       (1 << 15)
+#define I82577_CFG_ENABLE_DOWNSHIFT       (3 << 10) /* auto downshift 100/10 */
+#define I82577_CTRL_REG                   23
+
+/* 82577 specific PHY registers */
+#define I82577_PHY_CTRL_2            18
+#define I82577_PHY_LBK_CTRL          19
+#define I82577_PHY_STATUS_2          26
+#define I82577_PHY_DIAG_STATUS       31
+
+/* I82577 PHY Status 2 */
+#define I82577_PHY_STATUS2_REV_POLARITY   0x0400
+#define I82577_PHY_STATUS2_MDIX           0x0800
+#define I82577_PHY_STATUS2_SPEED_MASK     0x0300
+#define I82577_PHY_STATUS2_SPEED_1000MBPS 0x0200
+#define I82577_PHY_STATUS2_SPEED_100MBPS  0x0100
+
+/* I82577 PHY Control 2 */
+#define I82577_PHY_CTRL2_AUTO_MDIX        0x0400
+#define I82577_PHY_CTRL2_FORCE_MDI_MDIX   0x0200
+
+/* I82577 PHY Diagnostics Status */
+#define I82577_DSTATUS_CABLE_LENGTH       0x03FC
+#define I82577_DSTATUS_CABLE_LENGTH_SHIFT 2
+
+/* BM PHY Copper Specific Control 1 */
+#define BM_CS_CTRL1                       16
+#define BM_CS_CTRL1_ENERGY_DETECT         0x0300 /* Enable Energy Detect */
+
+/* BM PHY Copper Specific Status */
+#define BM_CS_STATUS                      17
+#define BM_CS_STATUS_ENERGY_DETECT        0x0010 /* Energy Detect Status */
+#define BM_CS_STATUS_LINK_UP              0x0400
+#define BM_CS_STATUS_RESOLVED             0x0800
+#define BM_CS_STATUS_SPEED_MASK           0xC000
+#define BM_CS_STATUS_SPEED_1000           0x8000
+
+/* 82577 Mobile Phy Status Register */
+#define HV_M_STATUS                       26
+#define HV_M_STATUS_AUTONEG_COMPLETE      0x1000
+#define HV_M_STATUS_SPEED_MASK            0x0300
+#define HV_M_STATUS_SPEED_1000            0x0200
+#define HV_M_STATUS_LINK_UP               0x0040
+
+#define IGP01E1000_PHY_PCS_INIT_REG       0x00B4
+#define IGP01E1000_PHY_POLARITY_MASK      0x0078
+
+#define IGP01E1000_PSCR_AUTO_MDIX         0x1000
+#define IGP01E1000_PSCR_FORCE_MDI_MDIX    0x2000 /* 0=MDI, 1=MDIX */
+
+#define IGP01E1000_PSCFR_SMART_SPEED      0x0080
+
+/* Enable flexible speed on link-up */
+#define IGP01E1000_GMII_FLEX_SPD          0x0010
+#define IGP01E1000_GMII_SPD               0x0020 /* Enable SPD */
+
+#define IGP02E1000_PM_SPD                 0x0001 /* Smart Power Down */
+#define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */
+#define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */
+
+#define IGP01E1000_PLHR_SS_DOWNGRADE      0x8000
+
+#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
+#define IGP01E1000_PSSR_MDIX              0x0800
+#define IGP01E1000_PSSR_SPEED_MASK        0xC000
+#define IGP01E1000_PSSR_SPEED_1000MBPS    0xC000
+
+#define IGP02E1000_PHY_CHANNEL_NUM        4
+#define IGP02E1000_PHY_AGC_A              0x11B1
+#define IGP02E1000_PHY_AGC_B              0x12B1
+#define IGP02E1000_PHY_AGC_C              0x14B1
+#define IGP02E1000_PHY_AGC_D              0x18B1
+
+#define IGP02E1000_AGC_LENGTH_SHIFT       9   /* Course - 15:13, Fine - 12:9 */
+#define IGP02E1000_AGC_LENGTH_MASK        0x7F
+#define IGP02E1000_AGC_RANGE              15
+
+#define IGP03E1000_PHY_MISC_CTRL          0x1B
+#define IGP03E1000_PHY_MISC_DUPLEX_MANUAL_SET  0x1000 /* Manually Set Duplex */
+
+#define E1000_CABLE_LENGTH_UNDEFINED      0xFF
+
+#define E1000_KMRNCTRLSTA_OFFSET          0x001F0000
+#define E1000_KMRNCTRLSTA_OFFSET_SHIFT    16
+#define E1000_KMRNCTRLSTA_REN             0x00200000
+#define E1000_KMRNCTRLSTA_DIAG_OFFSET     0x3    /* Kumeran Diagnostic */
+#define E1000_KMRNCTRLSTA_TIMEOUTS        0x4    /* Kumeran Timeouts */
+#define E1000_KMRNCTRLSTA_INBAND_PARAM    0x9    /* Kumeran InBand Parameters */
+#define E1000_KMRNCTRLSTA_DIAG_NELPBK     0x1000 /* Nearend Loopback mode */
+#define E1000_KMRNCTRLSTA_K1_CONFIG        0x7
+#define E1000_KMRNCTRLSTA_K1_ENABLE        0x0002
+
+#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10
+#define IFE_PHY_SPECIAL_CONTROL     0x11 /* 100BaseTx PHY Special Control */
+#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */
+#define IFE_PHY_MDIX_CONTROL        0x1C /* MDI/MDI-X Control */
+
+/* IFE PHY Extended Status Control */
+#define IFE_PESC_POLARITY_REVERSED    0x0100
+
+/* IFE PHY Special Control */
+#define IFE_PSC_AUTO_POLARITY_DISABLE      0x0010
+#define IFE_PSC_FORCE_POLARITY             0x0020
+#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100
+
+/* IFE PHY Special Control and LED Control */
+#define IFE_PSCL_PROBE_MODE            0x0020
+#define IFE_PSCL_PROBE_LEDS_OFF        0x0006 /* Force LEDs 0 and 2 off */
+#define IFE_PSCL_PROBE_LEDS_ON         0x0007 /* Force LEDs 0 and 2 on */
+
+/* IFE PHY MDIX Control */
+#define IFE_PMC_MDIX_STATUS      0x0020 /* 1=MDI-X, 0=MDI */
+#define IFE_PMC_FORCE_MDIX       0x0040 /* 1=force MDI-X, 0=force MDI */
+#define IFE_PMC_AUTO_MDIX        0x0080 /* 1=enable auto MDI/MDI-X, 0=disable */
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_regs.h ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_regs.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/e1000e/e1000e_regs.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/e1000e/e1000e_regs.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,340 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _E1000E_REGS_H_
+#define _E1000E_REGS_H_
+
+#define E1000_CTRL     0x00000  /* Device Control - RW */
+#define E1000_CTRL_DUP 0x00004  /* Device Control Duplicate (Shadow) - RW */
+#define E1000_STATUS   0x00008  /* Device Status - RO */
+#define E1000_EECD     0x00010  /* EEPROM/Flash Control - RW */
+#define E1000_EERD     0x00014  /* EEPROM Read - RW */
+#define E1000_CTRL_EXT 0x00018  /* Extended Device Control - RW */
+#define E1000_FLA      0x0001C  /* Flash Access - RW */
+#define E1000_MDIC     0x00020  /* MDI Control - RW */
+#define E1000_SCTL     0x00024  /* SerDes Control - RW */
+#define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
+#define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
+#define E1000_FEXT     0x0002C  /* Future Extended - RW */
+#define E1000_FEXTNVM  0x00028  /* Future Extended NVM - RW */
+#define E1000_FCT      0x00030  /* Flow Control Type - RW */
+#define E1000_CONNSW   0x00034  /* Copper/Fiber switch control - RW */
+#define E1000_VET      0x00038  /* VLAN Ether Type - RW */
+#define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */
+#define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */
+#define E1000_ICS      0x000C8  /* Interrupt Cause Set - WO */
+#define E1000_IMS      0x000D0  /* Interrupt Mask Set - RW */
+#define E1000_IMC      0x000D8  /* Interrupt Mask Clear - WO */
+#define E1000_IAM      0x000E0  /* Interrupt Acknowledge Auto Mask */
+#define E1000_IVAR     0x000E4  /* Interrupt Vector Allocation Register - RW */
+#define E1000_SVCR     0x000F0
+#define E1000_SVT       0x000F4
+#define E1000_RCTL     0x00100  /* Rx Control - RW */
+#define E1000_FCTTV    0x00170  /* Flow Control Transmit Timer Value - RW */
+#define E1000_TXCW     0x00178  /* Tx Configuration Word - RW */
+#define E1000_RXCW     0x00180  /* Rx Configuration Word - RO */
+#define E1000_PBA_ECC  0x01100  /* PBA ECC Register */
+#define E1000_TCTL     0x00400  /* Tx Control - RW */
+#define E1000_TCTL_EXT 0x00404  /* Extended Tx Control - RW */
+#define E1000_TIPG     0x00410  /* Tx Inter-packet gap -RW */
+#define E1000_TBT      0x00448  /* Tx Burst Timer - RW */
+#define E1000_AIT      0x00458  /* Adaptive Interframe Spacing Throttle - RW */
+#define E1000_LEDCTL   0x00E00  /* LED Control - RW */
+#define E1000_EXTCNF_CTRL  0x00F00  /* Extended Configuration Control */
+#define E1000_EXTCNF_SIZE  0x00F08  /* Extended Configuration Size */
+#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */
+#define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */
+#define E1000_PBS      0x01008  /* Packet Buffer Size */
+#define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
+#define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */
+#define E1000_FLASHT   0x01028  /* FLASH Timer Register */
+#define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
+#define E1000_FLSWCTL  0x01030  /* FLASH control register */
+#define E1000_FLSWDATA 0x01034  /* FLASH data register */
+#define E1000_FLSWCNT  0x01038  /* FLASH Access Counter */
+#define E1000_FLOP     0x0103C  /* FLASH Opcode Register */
+#define E1000_I2CCMD   0x01028  /* SFPI2C Command Register - RW */
+#define E1000_I2CPARAMS 0x0102C /* SFPI2C Parameters Register - RW */
+#define E1000_WDSTP    0x01040  /* Watchdog Setup - RW */
+#define E1000_SWDSTS   0x01044  /* SW Device Status - RW */
+#define E1000_FRTIMER  0x01048  /* Free Running Timer - RW */
+#define E1000_ERT      0x02008  /* Early Rx Threshold - RW */
+#define E1000_FCRTL    0x02160  /* Flow Control Receive Threshold Low - RW */
+#define E1000_FCRTH    0x02168  /* Flow Control Receive Threshold High - RW */
+#define E1000_PSRCTL   0x02170  /* Packet Split Receive Control - RW */
+#define E1000_RDFPCQ(_n)  (0x02430 + (0x4 * (_n)))
+#define E1000_PBRTH    0x02458  /* PB Rx Arbitration Threshold - RW */
+#define E1000_FCRTV    0x02460  /* Flow Control Refresh Timer Value - RW */
+/* Split and Replication Rx Control - RW */
+#define E1000_RDPUMB   0x025CC  /* DMA Rx Descriptor uC Mailbox - RW */
+#define E1000_RDPUAD   0x025D0  /* DMA Rx Descriptor uC Addr Command - RW */
+#define E1000_RDPUWD   0x025D4  /* DMA Rx Descriptor uC Data Write - RW */
+#define E1000_RDPURD   0x025D8  /* DMA Rx Descriptor uC Data Read - RW */
+#define E1000_RDPUCTL  0x025DC  /* DMA Rx Descriptor uC Control - RW */
+#define E1000_RDTR     0x02820  /* Rx Delay Timer - RW */
+#define E1000_RADV     0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
+/*
+ * Convenience macros
+ *
+ * Note: "_n" is the queue number of the register to be written to.
+ *
+ * Example usage:
+ * E1000_RDBAL_REG(current_rx_queue)
+ */
+#define E1000_RDBAL(_n)      ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \
+                                         (0x0C000 + ((_n) * 0x40)))
+#define E1000_RDBAH(_n)      ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \
+                                         (0x0C004 + ((_n) * 0x40)))
+#define E1000_RDLEN(_n)      ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \
+                                         (0x0C008 + ((_n) * 0x40)))
+#define E1000_SRRCTL(_n)     ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
+                                         (0x0C00C + ((_n) * 0x40)))
+#define E1000_RDH(_n)        ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \
+                                         (0x0C010 + ((_n) * 0x40)))
+#define E1000_RXCTL(_n)      ((_n) < 4 ? (0x02814 + ((_n) * 0x100)) : \
+                                         (0x0C014 + ((_n) * 0x40)))
+#define E1000_DCA_RXCTRL(_n) E1000_RXCTL(_n)
+#define E1000_RDT(_n)        ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \
+                                         (0x0C018 + ((_n) * 0x40)))
+#define E1000_RXDCTL(_n)     ((_n) < 4 ? (0x02828 + ((_n) * 0x100)) : \
+                                         (0x0C028 + ((_n) * 0x40)))
+#define E1000_RQDPC(_n)      ((_n) < 4 ? (0x02830 + ((_n) * 0x100)) : \
+                                         (0x0C030 + ((_n) * 0x40)))
+#define E1000_TDBAL(_n)      ((_n) < 4 ? (0x03800 + ((_n) * 0x100)) : \
+                                         (0x0E000 + ((_n) * 0x40)))
+#define E1000_TDBAH(_n)      ((_n) < 4 ? (0x03804 + ((_n) * 0x100)) : \
+                                         (0x0E004 + ((_n) * 0x40)))
+#define E1000_TDLEN(_n)      ((_n) < 4 ? (0x03808 + ((_n) * 0x100)) : \
+                                         (0x0E008 + ((_n) * 0x40)))
+#define E1000_TDH(_n)        ((_n) < 4 ? (0x03810 + ((_n) * 0x100)) : \
+                                         (0x0E010 + ((_n) * 0x40)))
+#define E1000_TXCTL(_n)      ((_n) < 4 ? (0x03814 + ((_n) * 0x100)) : \
+                                         (0x0E014 + ((_n) * 0x40)))
+#define E1000_DCA_TXCTRL(_n) E1000_TXCTL(_n)
+#define E1000_TDT(_n)        ((_n) < 4 ? (0x03818 + ((_n) * 0x100)) : \
+                                         (0x0E018 + ((_n) * 0x40)))
+#define E1000_TXDCTL(_n)     ((_n) < 4 ? (0x03828 + ((_n) * 0x100)) : \
+                                         (0x0E028 + ((_n) * 0x40)))
+#define E1000_TDWBAL(_n)     ((_n) < 4 ? (0x03838 + ((_n) * 0x100)) : \
+                                         (0x0E038 + ((_n) * 0x40)))
+#define E1000_TDWBAH(_n)     ((_n) < 4 ? (0x0383C + ((_n) * 0x100)) : \
+                                         (0x0E03C + ((_n) * 0x40)))
+#define E1000_TARC(_n)                   (0x03840 + ((_n) * 0x100))
+#define E1000_RSRPD    0x02C00  /* Rx Small Packet Detect - RW */
+#define E1000_RAID     0x02C08  /* Receive Ack Interrupt Delay - RW */
+#define E1000_TXDMAC   0x03000  /* Tx DMA Control - RW */
+#define E1000_KABGTXD  0x03004  /* AFE Band Gap Transmit Ref Data */
+#define E1000_PSRTYPE(_i)       (0x05480 + ((_i) * 4))
+#define E1000_RAL(_i)  (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
+                                       (0x054E0 + ((_i - 16) * 8)))
+#define E1000_RAH(_i)  (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
+                                       (0x054E4 + ((_i - 16) * 8)))
+#define E1000_IP4AT_REG(_i)     (0x05840 + ((_i) * 8))
+#define E1000_IP6AT_REG(_i)     (0x05880 + ((_i) * 4))
+#define E1000_WUPM_REG(_i)      (0x05A00 + ((_i) * 4))
+#define E1000_FFMT_REG(_i)      (0x09000 + ((_i) * 8))
+#define E1000_FFVT_REG(_i)      (0x09800 + ((_i) * 8))
+#define E1000_FFLT_REG(_i)      (0x05F00 + ((_i) * 8))
+#define E1000_TDFH     0x03410  /* Tx Data FIFO Head - RW */
+#define E1000_TDFT     0x03418  /* Tx Data FIFO Tail - RW */
+#define E1000_TDFHS    0x03420  /* Tx Data FIFO Head Saved - RW */
+#define E1000_TDFTS    0x03428  /* Tx Data FIFO Tail Saved - RW */
+#define E1000_TDFPC    0x03430  /* Tx Data FIFO Packet Count - RW */
+#define E1000_TDPUMB   0x0357C  /* DMA Tx Descriptor uC Mail Box - RW */
+#define E1000_TDPUAD   0x03580  /* DMA Tx Descriptor uC Addr Command - RW */
+#define E1000_TDPUWD   0x03584  /* DMA Tx Descriptor uC Data Write - RW */
+#define E1000_TDPURD   0x03588  /* DMA Tx Descriptor uC Data  Read  - RW */
+#define E1000_TDPUCTL  0x0358C  /* DMA Tx Descriptor uC Control - RW */
+#define E1000_DTXCTL   0x03590  /* DMA Tx Control - RW */
+#define E1000_TIDV     0x03820  /* Tx Interrupt Delay Value - RW */
+#define E1000_TADV     0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
+#define E1000_TSPMT    0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+#define E1000_CRCERRS  0x04000  /* CRC Error Count - R/clr */
+#define E1000_ALGNERRC 0x04004  /* Alignment Error Count - R/clr */
+#define E1000_SYMERRS  0x04008  /* Symbol Error Count - R/clr */
+#define E1000_RXERRC   0x0400C  /* Receive Error Count - R/clr */
+#define E1000_MPC      0x04010  /* Missed Packet Count - R/clr */
+#define E1000_SCC      0x04014  /* Single Collision Count - R/clr */
+#define E1000_ECOL     0x04018  /* Excessive Collision Count - R/clr */
+#define E1000_MCC      0x0401C  /* Multiple Collision Count - R/clr */
+#define E1000_LATECOL  0x04020  /* Late Collision Count - R/clr */
+#define E1000_COLC     0x04028  /* Collision Count - R/clr */
+#define E1000_DC       0x04030  /* Defer Count - R/clr */
+#define E1000_TNCRS    0x04034  /* Tx-No CRS - R/clr */
+#define E1000_SEC      0x04038  /* Sequence Error Count - R/clr */
+#define E1000_CEXTERR  0x0403C  /* Carrier Extension Error Count - R/clr */
+#define E1000_RLEC     0x04040  /* Receive Length Error Count - R/clr */
+#define E1000_XONRXC   0x04048  /* XON Rx Count - R/clr */
+#define E1000_XONTXC   0x0404C  /* XON Tx Count - R/clr */
+#define E1000_XOFFRXC  0x04050  /* XOFF Rx Count - R/clr */
+#define E1000_XOFFTXC  0x04054  /* XOFF Tx Count - R/clr */
+#define E1000_FCRUC    0x04058  /* Flow Control Rx Unsupported Count- R/clr */
+#define E1000_PRC64    0x0405C  /* Packets Rx (64 bytes) - R/clr */
+#define E1000_PRC127   0x04060  /* Packets Rx (65-127 bytes) - R/clr */
+#define E1000_PRC255   0x04064  /* Packets Rx (128-255 bytes) - R/clr */
+#define E1000_PRC511   0x04068  /* Packets Rx (255-511 bytes) - R/clr */
+#define E1000_PRC1023  0x0406C  /* Packets Rx (512-1023 bytes) - R/clr */
+#define E1000_PRC1522  0x04070  /* Packets Rx (1024-1522 bytes) - R/clr */
+#define E1000_GPRC     0x04074  /* Good Packets Rx Count - R/clr */
+#define E1000_BPRC     0x04078  /* Broadcast Packets Rx Count - R/clr */
+#define E1000_MPRC     0x0407C  /* Multicast Packets Rx Count - R/clr */
+#define E1000_GPTC     0x04080  /* Good Packets Tx Count - R/clr */
+#define E1000_GORCL    0x04088  /* Good Octets Rx Count Low - R/clr */
+#define E1000_GORCH    0x0408C  /* Good Octets Rx Count High - R/clr */
+#define E1000_GOTCL    0x04090  /* Good Octets Tx Count Low - R/clr */
+#define E1000_GOTCH    0x04094  /* Good Octets Tx Count High - R/clr */
+#define E1000_RNBC     0x040A0  /* Rx No Buffers Count - R/clr */
+#define E1000_RUC      0x040A4  /* Rx Undersize Count - R/clr */
+#define E1000_RFC      0x040A8  /* Rx Fragment Count - R/clr */
+#define E1000_ROC      0x040AC  /* Rx Oversize Count - R/clr */
+#define E1000_RJC      0x040B0  /* Rx Jabber Count - R/clr */
+#define E1000_MGTPRC   0x040B4  /* Management Packets Rx Count - R/clr */
+#define E1000_MGTPDC   0x040B8  /* Management Packets Dropped Count - R/clr */
+#define E1000_MGTPTC   0x040BC  /* Management Packets Tx Count - R/clr */
+#define E1000_TORL     0x040C0  /* Total Octets Rx Low - R/clr */
+#define E1000_TORH     0x040C4  /* Total Octets Rx High - R/clr */
+#define E1000_TOTL     0x040C8  /* Total Octets Tx Low - R/clr */
+#define E1000_TOTH     0x040CC  /* Total Octets Tx High - R/clr */
+#define E1000_TPR      0x040D0  /* Total Packets Rx - R/clr */
+#define E1000_TPT      0x040D4  /* Total Packets Tx - R/clr */
+#define E1000_PTC64    0x040D8  /* Packets Tx (64 bytes) - R/clr */
+#define E1000_PTC127   0x040DC  /* Packets Tx (65-127 bytes) - R/clr */
+#define E1000_PTC255   0x040E0  /* Packets Tx (128-255 bytes) - R/clr */
+#define E1000_PTC511   0x040E4  /* Packets Tx (256-511 bytes) - R/clr */
+#define E1000_PTC1023  0x040E8  /* Packets Tx (512-1023 bytes) - R/clr */
+#define E1000_PTC1522  0x040EC  /* Packets Tx (1024-1522 Bytes) - R/clr */
+#define E1000_MPTC     0x040F0  /* Multicast Packets Tx Count - R/clr */
+#define E1000_BPTC     0x040F4  /* Broadcast Packets Tx Count - R/clr */
+#define E1000_TSCTC    0x040F8  /* TCP Segmentation Context Tx - R/clr */
+#define E1000_TSCTFC   0x040FC  /* TCP Segmentation Context Tx Fail - R/clr */
+#define E1000_IAC      0x04100  /* Interrupt Assertion Count */
+#define E1000_ICRXPTC  0x04104  /* Interrupt Cause Rx Pkt Timer Expire Count */
+#define E1000_ICRXATC  0x04108  /* Interrupt Cause Rx Abs Timer Expire Count */
+#define E1000_ICTXPTC  0x0410C  /* Interrupt Cause Tx Pkt Timer Expire Count */
+#define E1000_ICTXATC  0x04110  /* Interrupt Cause Tx Abs Timer Expire Count */
+#define E1000_ICTXQEC  0x04118  /* Interrupt Cause Tx Queue Empty Count */
+#define E1000_ICTXQMTC 0x0411C  /* Interrupt Cause Tx Queue Min Thresh Count */
+#define E1000_ICRXDMTC 0x04120  /* Interrupt Cause Rx Desc Min Thresh Count */
+#define E1000_ICRXOC   0x04124  /* Interrupt Cause Receiver Overrun Count */
+#define E1000_CRC_OFFSET 0x05F50  /* CRC Offset register */
+
+#define E1000_PCS_CFG0    0x04200  /* PCS Configuration 0 - RW */
+#define E1000_PCS_LCTL    0x04208  /* PCS Link Control - RW */
+#define E1000_PCS_LSTAT   0x0420C  /* PCS Link Status - RO */
+#define E1000_CBTMPC      0x0402C  /* Circuit Breaker Tx Packet Count */
+#define E1000_HTDPMC      0x0403C  /* Host Transmit Discarded Packets */
+#define E1000_CBRDPC      0x04044  /* Circuit Breaker Rx Dropped Count */
+#define E1000_CBRMPC      0x040FC  /* Circuit Breaker Rx Packet Count */
+#define E1000_RPTHC       0x04104  /* Rx Packets To Host */
+#define E1000_HGPTC       0x04118  /* Host Good Packets Tx Count */
+#define E1000_HTCBDPC     0x04124  /* Host Tx Circuit Breaker Dropped Count */
+#define E1000_HGORCL      0x04128  /* Host Good Octets Received Count Low */
+#define E1000_HGORCH      0x0412C  /* Host Good Octets Received Count High */
+#define E1000_HGOTCL      0x04130  /* Host Good Octets Transmit Count Low */
+#define E1000_HGOTCH      0x04134  /* Host Good Octets Transmit Count High */
+#define E1000_LENERRS     0x04138  /* Length Errors Count */
+#define E1000_SCVPC       0x04228  /* SerDes/SGMII Code Violation Pkt Count */
+#define E1000_HRMPC       0x0A018  /* Header Redirection Missed Packet Count */
+#define E1000_PCS_ANADV   0x04218  /* AN advertisement - RW */
+#define E1000_PCS_LPAB    0x0421C  /* Link Partner Ability - RW */
+#define E1000_PCS_NPTX    0x04220  /* AN Next Page Transmit - RW */
+#define E1000_PCS_LPABNP  0x04224  /* Link Partner Ability Next Page - RW */
+#define E1000_1GSTAT_RCV  0x04228  /* 1GSTAT Code Violation Packet Count - RW */
+#define E1000_RXCSUM   0x05000  /* Rx Checksum Control - RW */
+#define E1000_RLPML    0x05004  /* Rx Long Packet Max Length */
+#define E1000_RFCTL    0x05008  /* Receive Filter Control*/
+#define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
+#define E1000_RA       0x05400  /* Receive Address - RW Array */
+#define E1000_VFTA     0x05600  /* VLAN Filter Table Array - RW Array */
+#define E1000_VT_CTL   0x0581C  /* VMDq Control - RW */
+#define E1000_VFQA0    0x0B000  /* VLAN Filter Queue Array 0 - RW Array */
+#define E1000_VFQA1    0x0B200  /* VLAN Filter Queue Array 1 - RW Array */
+#define E1000_WUC      0x05800  /* Wakeup Control - RW */
+#define E1000_WUFC     0x05808  /* Wakeup Filter Control - RW */
+#define E1000_WUS      0x05810  /* Wakeup Status - RO */
+#define E1000_MANC     0x05820  /* Management Control - RW */
+#define E1000_IPAV     0x05838  /* IP Address Valid - RW */
+#define E1000_IP4AT    0x05840  /* IPv4 Address Table - RW Array */
+#define E1000_IP6AT    0x05880  /* IPv6 Address Table - RW Array */
+#define E1000_WUPL     0x05900  /* Wakeup Packet Length - RW */
+#define E1000_WUPM     0x05A00  /* Wakeup Packet Memory - RO A */
+#define E1000_PBACL    0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
+#define E1000_FFLT     0x05F00  /* Flexible Filter Length Table - RW Array */
+#define E1000_HOST_IF  0x08800  /* Host Interface */
+#define E1000_FFMT     0x09000  /* Flexible Filter Mask Table - RW Array */
+#define E1000_FFVT     0x09800  /* Flexible Filter Value Table - RW Array */
+
+#define E1000_KMRNCTRLSTA 0x00034 /* MAC-PHY interface - RW */
+#define E1000_MDPHYA      0x0003C /* PHY address - RW */
+#define E1000_MANC2H      0x05860 /* Management Control To Host - RW */
+#define E1000_SW_FW_SYNC  0x05B5C /* Software-Firmware Synchronization - RW */
+#define E1000_CCMCTL      0x05B48 /* CCM Control Register */
+#define E1000_GIOCTL      0x05B44 /* GIO Analog Control Register */
+#define E1000_SCCTL       0x05B4C /* PCIc PLL Configuration Register */
+#define E1000_GCR         0x05B00 /* PCI-Ex Control */
+#define E1000_GCR2        0x05B64 /* PCI-Ex Control #2 */
+#define E1000_GSCL_1    0x05B10 /* PCI-Ex Statistic Control #1 */
+#define E1000_GSCL_2    0x05B14 /* PCI-Ex Statistic Control #2 */
+#define E1000_GSCL_3    0x05B18 /* PCI-Ex Statistic Control #3 */
+#define E1000_GSCL_4    0x05B1C /* PCI-Ex Statistic Control #4 */
+#define E1000_FACTPS    0x05B30 /* Function Active and Power State to MNG */
+#define E1000_SWSM      0x05B50 /* SW Semaphore */
+#define E1000_FWSM      0x05B54 /* FW Semaphore */
+#define E1000_SWSM2     0x05B58 /* Driver-only SW semaphore (not used by BOOT agents) */
+#define E1000_DCA_ID    0x05B70 /* DCA Requester ID Information - RO */
+#define E1000_DCA_CTRL  0x05B74 /* DCA Control - RW */
+#define E1000_FFLT_DBG  0x05F04 /* Debug Register */
+#define E1000_HICR      0x08F00 /* Host Interface Control */
+
+/* RSS registers */
+#define E1000_CPUVEC    0x02C10 /* CPU Vector Register - RW */
+#define E1000_MRQC      0x05818 /* Multiple Receive Control - RW */
+#define E1000_IMIR(_i)      (0x05A80 + ((_i) * 4))  /* Immediate Interrupt */
+#define E1000_IMIREXT(_i)   (0x05AA0 + ((_i) * 4))  /* Immediate Interrupt Ext*/
+#define E1000_IMIRVP    0x05AC0 /* Immediate Interrupt Rx VLAN Priority - RW */
+#define E1000_MSIXBM(_i)    (0x01600 + ((_i) * 4)) /* MSI-X Allocation Register
+                                                    * (_i) - RW */
+#define E1000_MSIXTADD(_i)  (0x0C000 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * low reg - RW */
+#define E1000_MSIXTUADD(_i) (0x0C004 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * upper reg - RW */
+#define E1000_MSIXTMSG(_i)  (0x0C008 + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * message reg - RW */
+#define E1000_MSIXVCTRL(_i) (0x0C00C + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * vector ctrl reg - RW */
+#define E1000_MSIXPBA    0x0E000 /* MSI-X Pending bit array */
+#define E1000_RETA(_i)  (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
+#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+#define E1000_RSSIM     0x05864 /* RSS Interrupt Mask */
+#define E1000_RSSIR     0x05868 /* RSS Interrupt Request */
+#define E1000_RXMTRL     0x0B634 /* Time sync Rx EtherType and Msg Type - RW */
+#define E1000_RXUDP      0x0B638 /* Time Sync Rx UDP Port - RW */
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/eepro100.c ipxe-1.0.1~lliurex1505/src/drivers/net/eepro100.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/eepro100.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/eepro100.c	2012-01-06 23:49:04.000000000 +0000
@@ -25,8 +25,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  *
  *              date       version  by      what
@@ -910,7 +909,7 @@
  * Initial allocation & initialization of the rx ring.
  *
  * @v netdev  		Device of rx ring.
- * @ret rc    		Non-zero if error occurred
+ * @ret rc    		Non-zero if error occured
  */
 static int ifec_rx_setup ( struct net_device *netdev )
 {
@@ -1142,7 +1141,6 @@
 PCI_ROM(0x8086, 0x5201, "eepro100-5201", "Intel EtherExpress PRO/100 Intelligent Server", 0),
 PCI_ROM(0x8086, 0x1092, "82562-3",       "Intel Pro/100 VE Network", 0),
 PCI_ROM(0x8086, 0x27dc, "eepro100-27dc", "Intel 82801G (ICH7) Chipset Ethernet Controller", 0),
-PCI_ROM(0x8086, 0x10fe, "82552",         "Intel 82552 10/100 Network Connection", 0),
 };
 
 /* Cards with device ids 0x1030 to 0x103F, 0x2449, 0x2459 or 0x245D might need
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/efi/snpnet.c ipxe-1.0.1~lliurex1505/src/drivers/net/efi/snpnet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/efi/snpnet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/efi/snpnet.c	2012-01-06 23:49:04.000000000 +0000
@@ -56,27 +56,29 @@
 			     struct io_buffer *iobuf ) {
 	struct snpnet_device *snpnetdev = netdev->priv;
 	EFI_SIMPLE_NETWORK_PROTOCOL *snp = snpnetdev->snp;
-	void *txbuf=NULL;
-	size_t len = iob_len ( iobuf );
 	EFI_STATUS efirc;
-	int rc;
+	size_t len = iob_len ( iobuf );
 
-	if ( ( efirc = snp->Transmit ( snp, 0, len, iobuf->data, NULL, NULL,
-				       NULL ) ) != 0 ) {
-		return -EEFI ( efirc );
-	}
-	/* since GetStatus is so inconsistent, don't try more than one outstanding transmit at a time */
-	while ( txbuf == NULL ) {
-		if ( ( efirc = snp->GetStatus ( snp, NULL, &txbuf ) ) != 0 ) {
-			rc = -EEFI ( efirc );
-			DBGC ( snp, "SNP %p could not get status %s\n", snp,
-			       strerror ( rc ) );
+	efirc = snp->Transmit ( snp, 0, len, iobuf->data, NULL, NULL, NULL );
+	return EFIRC_TO_RC ( efirc );
+}
+
+/**
+ * Find a I/O buffer on the list of outstanding Tx buffers and complete it.
+ *
+ * @v snpnetdev		SNP network device
+ * @v txbuf		Buffer address
+ */
+static void snpnet_complete ( struct net_device *netdev, void *txbuf ) {
+	struct io_buffer *tmp;
+	struct io_buffer *iobuf;
+
+	list_for_each_entry_safe ( iobuf, tmp, &netdev->tx_queue, list ) {
+		if ( iobuf->data == txbuf ) {
+			netdev_tx_complete ( netdev, iobuf );
 			break;
 		}
-
 	}
-	netdev_tx_complete ( netdev, iobuf );
-	return 0;
 }
 
 /**
@@ -87,10 +89,25 @@
 static void snpnet_poll ( struct net_device *netdev ) {
 	struct snpnet_device *snpnetdev = netdev->priv;
 	EFI_SIMPLE_NETWORK_PROTOCOL *snp = snpnetdev->snp;
+	EFI_STATUS efirc;
 	struct io_buffer *iobuf = NULL;
 	UINTN len;
-	EFI_STATUS efirc;
-	int rc;
+	void *txbuf;
+
+	/* Process Tx completions */
+	while ( 1 ) {
+		efirc = snp->GetStatus ( snp, NULL, &txbuf );
+		if ( efirc ) {
+			DBGC ( snp, "SNP %p could not get status %s\n", snp,
+			       efi_strerror ( efirc ) );
+			break;
+		}
+
+		if ( txbuf == NULL )
+			break;
+
+		snpnet_complete ( netdev, txbuf );
+	}
 
 	/* Process received packets */
 	while ( 1 ) {
@@ -117,13 +134,12 @@
 		}
 
 		/* Other error? */
-		if ( efirc != 0 ) {
-			rc = -EEFI ( efirc );
+		if ( efirc ) {
 			DBGC ( snp, "SNP %p receive packet error: %s "
 				    "(len was %zd, is now %zd)\n",
-			       snp, strerror ( rc ), iob_len(iobuf),
+			       snp, efi_strerror ( efirc ), iob_len(iobuf),
 			       (size_t)len );
-			netdev_rx_err ( netdev, iobuf, rc );
+			netdev_rx_err ( netdev, iobuf, efirc );
 			break;
 		}
 
@@ -142,27 +158,25 @@
 static int snpnet_open ( struct net_device *netdev ) {
 	struct snpnet_device *snpnetdev = netdev->priv;
 	EFI_SIMPLE_NETWORK_PROTOCOL *snp = snpnetdev->snp;
-	EFI_MAC_ADDRESS *mac;
-	UINT32 enableFlags, disableFlags;
 	EFI_STATUS efirc;
-	int rc;
+	UINT32 enableFlags, disableFlags;
 
 	snpnetdev->close_state = snp->Mode->State;
 	if ( snp->Mode->State != EfiSimpleNetworkInitialized ) {
-		if ( ( efirc = snp->Initialize ( snp, 0, 0 ) ) != 0 ) {
-			rc = -EEFI ( efirc );
+		efirc = snp->Initialize ( snp, 0, 0 );
+		if ( efirc ) {
 			DBGC ( snp, "SNP %p could not initialize: %s\n",
-			       snp, strerror ( rc ) );
-			return rc;
+			       snp, efi_strerror ( efirc ) );
+			return EFIRC_TO_RC ( efirc );
 		}
 	}
 
         /* Use the default MAC address */
-	mac = ( ( void * ) netdev->ll_addr );
-	if ( ( efirc = snp->StationAddress ( snp, FALSE, mac ) ) != 0 ) {
-		rc = -EEFI ( efirc );
+	efirc = snp->StationAddress ( snp, FALSE,
+				      (EFI_MAC_ADDRESS *)netdev->ll_addr );
+	if ( efirc ) {
 		DBGC ( snp, "SNP %p could not reset station address: %s\n",
-		       snp, strerror ( rc ) );
+		       snp, efi_strerror ( efirc ) );
 	}
 
 	/* Set up receive filters to receive unicast and broadcast packets
@@ -184,11 +198,11 @@
 		enableFlags |= EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS;
 	}
 	disableFlags &= ~enableFlags;
-	if ( ( efirc = snp->ReceiveFilters ( snp, enableFlags, disableFlags,
-					     FALSE, 0, NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
+	efirc = snp->ReceiveFilters ( snp, enableFlags, disableFlags,
+				      FALSE, 0, NULL );
+	if ( efirc ) {
 		DBGC ( snp, "SNP %p could not set receive filters: %s\n",
-		       snp, strerror ( rc ) );
+		       snp, efi_strerror ( efirc ) );
 	}
 
 	DBGC ( snp, "SNP %p opened\n", snp );
@@ -204,13 +218,12 @@
 	struct snpnet_device *snpnetdev = netdev->priv;
 	EFI_SIMPLE_NETWORK_PROTOCOL *snp = snpnetdev->snp;
 	EFI_STATUS efirc;
-	int rc;
 
 	if ( snpnetdev->close_state != EfiSimpleNetworkInitialized ) {
-		if ( ( efirc = snp->Shutdown ( snp ) ) != 0 ) {
-			rc = -EEFI ( efirc );
+		efirc = snp->Shutdown ( snp );
+		if ( efirc ) {
 			DBGC ( snp, "SNP %p could not shut down: %s\n",
-			       snp, strerror ( rc ) );
+			       snp, efi_strerror ( efirc ) );
 		}
 	}
 }
@@ -270,10 +283,11 @@
 
 	/* Start the interface */
 	if ( snp->Mode->State == EfiSimpleNetworkStopped ) {
-		if ( ( efirc = snp->Start ( snp ) ) != 0 ) {
-			rc = -EEFI ( efirc );
+		efirc = snp->Start ( snp );
+		if ( efirc ) {
 			DBGC ( snp, "SNP %p could not start: %s\n", snp,
-			       strerror ( rc ) );
+			       efi_strerror ( efirc ) );
+			rc = EFIRC_TO_RC ( efirc );
 			goto err_start;
 		}
 	}
@@ -315,27 +329,25 @@
  */
 void snpnet_remove ( struct snp_device *snpdev ) {
 	EFI_SIMPLE_NETWORK_PROTOCOL *snp = snpdev->snp;
-	struct net_device *netdev = snpdev->netdev;
 	EFI_STATUS efirc;
-	int rc;
+	struct net_device *netdev = snpdev->netdev;
 
 	if ( snp->Mode->State == EfiSimpleNetworkInitialized &&
 	     snpdev->removal_state != EfiSimpleNetworkInitialized ) {
 		DBGC ( snp, "SNP %p shutting down\n", snp );
-		if ( ( efirc = snp->Shutdown ( snp ) ) != 0 ) {
-			rc = -EEFI ( efirc );
+		efirc = snp->Shutdown ( snp );
+		if ( efirc ) {
 			DBGC ( snp, "SNP %p could not shut down: %s\n",
-			       snp, strerror ( rc ) );
+			       snp, efi_strerror ( efirc ) );
 		}
 	}
 
 	if ( snp->Mode->State == EfiSimpleNetworkStarted &&
 	     snpdev->removal_state == EfiSimpleNetworkStopped ) {
 		DBGC ( snp, "SNP %p stopping\n", snp );
-		if ( ( efirc = snp->Stop ( snp ) ) != 0 ) {
-			rc = -EEFI ( efirc );
-			DBGC ( snp, "SNP %p could not be stopped: %s\n",
-			       snp, strerror ( rc ) );
+		efirc = snp->Stop ( snp );
+		if ( efirc ) {
+			DBGC ( snp, "SNP %p could not be stopped\n", snp );
 		}
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/epic100.c ipxe-1.0.1~lliurex1505/src/drivers/net/epic100.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/epic100.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/epic100.c	2012-01-06 23:49:04.000000000 +0000
@@ -10,6 +10,7 @@
 #include <ipxe/pci.h>
 #include <ipxe/ethernet.h>
 #include "nic.h"
+#include <ipxe/console.h>
 #include "epic100.h"
 
 /* Condensed operations for readability */
@@ -250,7 +251,7 @@
 
     outl(tmp, txcon);
 
-    /* Give address of RX and TX ring to the chip */
+    /* Give adress of RX and TX ring to the chip */
     outl(virt_to_le32desc(&rx_ring), prcdar);
     outl(virt_to_le32desc(&tx_ring), ptcdar);
 
@@ -365,7 +366,7 @@
  * Arguments: none
  *
  * returns:   1 if a packet was received.
- *            0 if no packet was received.
+ *            0 if no pacet was received.
  * side effects:
  *            returns the packet in the array nic->packet.
  *            returns the length of the packet in nic->packetlen.
@@ -376,7 +377,7 @@
 {
     int entry;
     int retcode;
-    unsigned long status;
+    int status;
     entry = cur_rx % RX_RING_SIZE;
 
     if ((rx_ring[entry].status & cpu_to_le32(RRING_OWN)) == RRING_OWN)
@@ -401,7 +402,7 @@
 	retcode = 0;
     } else {
 	/* Omit the four octet CRC from the length. */
-	nic->packetlen = (status >> 16) - 4;
+	nic->packetlen = le32_to_cpu((rx_ring[entry].buflength))- 4;
 	memcpy(nic->packet, &rx_packet[entry * PKT_BUF_SZ], nic->packetlen);
 	retcode = 1;
     }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/epic100.h ipxe-1.0.1~lliurex1505/src/drivers/net/epic100.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/epic100.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/epic100.h	2012-01-06 23:49:04.000000000 +0000
@@ -64,7 +64,7 @@
 #define INTR_RX_STATUS_OK	(0x00008000)	/* rx status valid. NI */
 #define INTR_PCI_TGT_ABT	(0x00004000)	/* PCI Target abort */
 #define INTR_PCI_MASTER_ABT	(0x00002000)	/* PCI Master abort */
-#define INTR_PCI_PARITY_ERR	(0x00001000)	/* PCI address parity error */
+#define INTR_PCI_PARITY_ERR	(0x00001000)	/* PCI adress parity error */
 #define INTR_PCI_DATA_ERR	(0x00000800)	/* PCI data parity error */
 #define INTR_RX_THR_CROSSED	(0x00000400)	/* rx copy threshold crossed */
 #define INTR_CNTFULL		(0x00000200)	/* Counter overflow */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/etherfabric.c ipxe-1.0.1~lliurex1505/src/drivers/net/etherfabric.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/etherfabric.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/etherfabric.c	2012-01-06 23:49:04.000000000 +0000
@@ -20,11 +20,11 @@
 
 #include <stdint.h>
 #include <stdlib.h>
-#include <stdio.h>
 #include <unistd.h>
 #include <errno.h>
 #include <assert.h>
 #include <byteswap.h>
+#include <ipxe/console.h>
 #include <ipxe/io.h>
 #include <ipxe/pci.h>
 #include <ipxe/malloc.h>
@@ -93,6 +93,7 @@
 #define LPA_EF_10000FULL		0x00040000
 #define LPA_EF_10000HALF		0x00080000
 
+#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
 #define LPA_EF_1000		( LPA_EF_1000FULL | LPA_EF_1000HALF )
 #define LPA_EF_10000               ( LPA_EF_10000FULL | LPA_EF_10000HALF )
 #define LPA_EF_DUPLEX		( LPA_10FULL | LPA_100FULL | LPA_EF_1000FULL | \
@@ -1566,7 +1567,7 @@
 	efab_dword_t md_stat;
 	int count;
 
-	/* wait up to 10ms */
+	/* wait upto 10ms */
 	for (count = 0; count < 1000; count++) {
 		falcon_readl ( efab, &md_stat, FCN_MD_STAT_REG_KER );
 		if ( EFAB_DWORD_FIELD ( md_stat, FCN_MD_BSY ) == 0 ) {
@@ -2195,7 +2196,7 @@
 	falcon_xmac_writel ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
 
 	/* Give some time for the link to establish */
-	for (count = 0; count < 1000; count++) { /* wait up to 10ms */
+	for (count = 0; count < 1000; count++) { /* wait upto 10ms */
 		falcon_xmac_readl ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
 		if ( EFAB_DWORD_FIELD ( reg, FCN_XX_RST_XX_EN ) == 0 ) {
 			falcon_setup_xaui ( efab );
@@ -3395,7 +3396,7 @@
 		falcon_read ( efab, &reg, FCN_SRM_CFG_REG_KER );
 		if ( !EFAB_OWORD_FIELD ( reg, FCN_SRAM_OOB_BT_INIT_EN ) )
 			return 0;
-	} while (++count < 20);	/* wait up to 0.4 sec */
+	} while (++count < 20);	/* wait upto 0.4 sec */
 
 	EFAB_ERR ( "timed out waiting for SRAM reset\n");
 	return -ETIMEDOUT;
@@ -3426,7 +3427,7 @@
 	falcon_write ( efab, &reg, FCN_RX_DC_CFG_REG_KER );
 	
 	/* Set number of RSS CPUs
-	 * bug7244: Increase filter depth to reduce RX_RESET likelihood
+	 * bug7244: Increase filter depth to reduce RX_RESET likelyhood
 	 */
 	EFAB_POPULATE_OWORD_5 ( reg,
 				FCN_NUM_KER, 0,
@@ -3798,8 +3799,7 @@
 	}
 	else {
 		/* write to the INT_ACK register */
-		EFAB_ZERO_DWORD ( reg );
-		falcon_writel ( efab, &reg, FCN_INT_ACK_KER_REG_A1 );
+		falcon_writel ( efab, 0, FCN_INT_ACK_KER_REG_A1 );
 		mb();
 		falcon_readl ( efab, &reg,
 			       WORK_AROUND_BROKEN_PCI_READS_REG_KER_A1 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/forcedeth.c ipxe-1.0.1~lliurex1505/src/drivers/net/forcedeth.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/forcedeth.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/forcedeth.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  *    You should have received a copy of the GNU General Public License
  *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- *    02110-1301, USA.
+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * Portions of this code are taken from the Linux forcedeth driver that was
  * based on a cleanroom reimplementation which was based on reverse engineered
@@ -741,7 +740,8 @@
 		 ioaddr + NvRegReceiverStatus );
 
 	/* Set up slot time */
-	low = ( random() & NVREG_SLOTTIME_MASK );
+	get_random_bytes ( &low, sizeof(low) );
+	low &= NVREG_SLOTTIME_MASK;
 	writel ( low | NVREG_SLOTTIME_DEFAULT, ioaddr + NvRegSlotTime );
 
 	writel ( NVREG_TX_DEFERRAL_DEFAULT , ioaddr + NvRegTxDeferral );
@@ -998,7 +998,7 @@
 
 	DBG ( "forcedeth_poll: status = %#04x\n", status );
 
-	/* Link change interrupt occurred. Call always if link is down,
+	/* Link change interrupt occured. Call always if link is down,
 	 * to give auto-neg a chance to finish */
 	if ( ( status & NVREG_IRQ_LINK ) || ! ( netdev_link_ok ( netdev ) ) )
 		forcedeth_link_status ( netdev );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/forcedeth.h ipxe-1.0.1~lliurex1505/src/drivers/net/forcedeth.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/forcedeth.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/forcedeth.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  *    You should have received a copy of the GNU General Public License
  *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- *    02110-1301, USA.
+ *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * Portions of this code are taken from the Linux forcedeth driver that was
  * based on a cleanroom reimplementation which was based on reverse engineered
@@ -55,7 +54,7 @@
 #define DESC_VER_3	3
 
 #define RX_RING_SIZE		16
-#define TX_RING_SIZE		32
+#define TX_RING_SIZE		16
 #define RXTX_RING_SIZE		( ( RX_RING_SIZE ) + ( TX_RING_SIZE ) )
 #define RX_RING_MIN		128
 #define TX_RING_MIN		64
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/hfa384x.h ipxe-1.0.1~lliurex1505/src/drivers/net/hfa384x.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/hfa384x.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/hfa384x.h	2012-01-06 23:49:04.000000000 +0000
@@ -39,7 +39,7 @@
 *
 * --------------------------------------------------------------------
 *
-* Portions of the development of this software were funded by
+* Portions of the development of this software were funded by 
 * Intersil Corporation as part of PRISM(R) chipset product development.
 *
 * --------------------------------------------------------------------
@@ -65,18 +65,18 @@
 
 /*------ Constants --------------------------------------------*/
 /*--- Mins & Maxs -----------------------------------*/
-#define		HFA384x_CMD_ALLOC_LEN_MIN	((uint16_t)4)
-#define		HFA384x_CMD_ALLOC_LEN_MAX	((uint16_t)2400)
-#define		HFA384x_BAP_DATALEN_MAX		((uint16_t)4096)
-#define		HFA384x_BAP_OFFSET_MAX		((uint16_t)4096)
-#define		HFA384x_PORTID_MAX		((uint16_t)7)
-#define		HFA384x_NUMPORTS_MAX		((uint16_t)(HFA384x_PORTID_MAX+1))
-#define		HFA384x_PDR_LEN_MAX		((uint16_t)512)	/* in bytes, from EK */
-#define		HFA384x_PDA_RECS_MAX		((uint16_t)200)	/* a guess */
-#define		HFA384x_PDA_LEN_MAX		((uint16_t)1024)	/* in bytes, from EK */
-#define		HFA384x_SCANRESULT_MAX		((uint16_t)31)
-#define		HFA384x_HSCANRESULT_MAX		((uint16_t)31)
-#define		HFA384x_CHINFORESULT_MAX	((uint16_t)16)
+#define		HFA384x_CMD_ALLOC_LEN_MIN	((UINT16)4)
+#define		HFA384x_CMD_ALLOC_LEN_MAX	((UINT16)2400)
+#define		HFA384x_BAP_DATALEN_MAX		((UINT16)4096)
+#define		HFA384x_BAP_OFFSET_MAX		((UINT16)4096)
+#define		HFA384x_PORTID_MAX		((UINT16)7)
+#define		HFA384x_NUMPORTS_MAX		((UINT16)(HFA384x_PORTID_MAX+1))
+#define		HFA384x_PDR_LEN_MAX		((UINT16)512)	/* in bytes, from EK */
+#define		HFA384x_PDA_RECS_MAX		((UINT16)200)	/* a guess */
+#define		HFA384x_PDA_LEN_MAX		((UINT16)1024)	/* in bytes, from EK */
+#define		HFA384x_SCANRESULT_MAX		((UINT16)31)
+#define		HFA384x_HSCANRESULT_MAX		((UINT16)31)
+#define		HFA384x_CHINFORESULT_MAX	((UINT16)16)
 #define		HFA384x_DRVR_FIDSTACKLEN_MAX	(10)
 #define		HFA384x_DRVR_TXBUF_MAX		(sizeof(hfa384x_tx_frame_t) + \
 						WLAN_DATA_MAXLEN - \
@@ -86,63 +86,63 @@
 #define		HFA384x_INFODATA_MAXLEN		(sizeof(hfa384x_infodata_t))
 #define		HFA384x_INFOFRM_MAXLEN		(sizeof(hfa384x_InfFrame_t))
 #define		HFA384x_RID_GUESSING_MAXLEN	2048  /* I'm not really sure */
-#define		HFA384x_RIDDATA_MAXLEN		HFA384x_RID_GUESSING_MAXLEN
+#define		HFA384x_RIDDATA_MAXLEN		HFA384x_RID_GUESSING_MAXLEN	
 #define		HFA384x_USB_RWMEM_MAXLEN	2048
 
 /*--- Support Constants -----------------------------*/
-#define		HFA384x_BAP_PROC			((uint16_t)0)
-#define		HFA384x_BAP_int				((uint16_t)1)
-#define		HFA384x_PORTTYPE_IBSS			((uint16_t)0)
-#define		HFA384x_PORTTYPE_BSS			((uint16_t)1)
-#define		HFA384x_PORTTYPE_WDS			((uint16_t)2)
-#define		HFA384x_PORTTYPE_PSUEDOIBSS		((uint16_t)3)
-#define		HFA384x_PORTTYPE_HOSTAP    		((uint16_t)6)
-#define		HFA384x_WEPFLAGS_PRIVINVOKED		((uint16_t)BIT0)
-#define		HFA384x_WEPFLAGS_EXCLUDE		((uint16_t)BIT1)
-#define		HFA384x_WEPFLAGS_DISABLE_TXCRYPT	((uint16_t)BIT4)
-#define		HFA384x_WEPFLAGS_DISABLE_RXCRYPT	((uint16_t)BIT7)
-#define		HFA384x_WEPFLAGS_DISALLOW_MIXED 	((uint16_t)BIT11)
-#define		HFA384x_WEPFLAGS_IV_INTERVAL1		((uint16_t)0)
-#define		HFA384x_WEPFLAGS_IV_INTERVAL10		((uint16_t)BIT5)
-#define		HFA384x_WEPFLAGS_IV_INTERVAL50		((uint16_t)BIT6)
-#define		HFA384x_WEPFLAGS_IV_INTERVAL100		((uint16_t)(BIT5 | BIT6))
-#define		HFA384x_WEPFLAGS_FIRMWARE_WPA  		((uint16_t)BIT8)
-#define		HFA384x_WEPFLAGS_HOST_MIC      		((uint16_t)BIT9)
-#define 	HFA384x_ROAMMODE_FWSCAN_FWROAM		((uint16_t)1)
-#define 	HFA384x_ROAMMODE_FWSCAN_HOSTROAM	((uint16_t)2)
-#define 	HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM	((uint16_t)3)
-#define 	HFA384x_PORTSTATUS_DISABLED		((uint16_t)1)
-#define 	HFA384x_PORTSTATUS_INITSRCH		((uint16_t)2)
-#define 	HFA384x_PORTSTATUS_CONN_IBSS		((uint16_t)3)
-#define 	HFA384x_PORTSTATUS_CONN_ESS		((uint16_t)4)
-#define 	HFA384x_PORTSTATUS_OOR_ESS		((uint16_t)5)
-#define 	HFA384x_PORTSTATUS_CONN_WDS		((uint16_t)6)
-#define 	HFA384x_PORTSTATUS_HOSTAP		((uint16_t)8)
-#define		HFA384x_RATEBIT_1			((uint16_t)1)
-#define		HFA384x_RATEBIT_2			((uint16_t)2)
-#define		HFA384x_RATEBIT_5dot5			((uint16_t)4)
-#define		HFA384x_RATEBIT_11			((uint16_t)8)
+#define		HFA384x_BAP_PROC			((UINT16)0)
+#define		HFA384x_BAP_INT				((UINT16)1)
+#define		HFA384x_PORTTYPE_IBSS			((UINT16)0)
+#define		HFA384x_PORTTYPE_BSS			((UINT16)1)
+#define		HFA384x_PORTTYPE_WDS			((UINT16)2)
+#define		HFA384x_PORTTYPE_PSUEDOIBSS		((UINT16)3)
+#define		HFA384x_PORTTYPE_HOSTAP    		((UINT16)6)
+#define		HFA384x_WEPFLAGS_PRIVINVOKED		((UINT16)BIT0)
+#define		HFA384x_WEPFLAGS_EXCLUDE		((UINT16)BIT1)
+#define		HFA384x_WEPFLAGS_DISABLE_TXCRYPT	((UINT16)BIT4)
+#define		HFA384x_WEPFLAGS_DISABLE_RXCRYPT	((UINT16)BIT7)
+#define		HFA384x_WEPFLAGS_DISALLOW_MIXED 	((UINT16)BIT11)
+#define		HFA384x_WEPFLAGS_IV_INTERVAL1		((UINT16)0)
+#define		HFA384x_WEPFLAGS_IV_INTERVAL10		((UINT16)BIT5)
+#define		HFA384x_WEPFLAGS_IV_INTERVAL50		((UINT16)BIT6)
+#define		HFA384x_WEPFLAGS_IV_INTERVAL100		((UINT16)(BIT5 | BIT6))
+#define		HFA384x_WEPFLAGS_FIRMWARE_WPA  		((UINT16)BIT8)
+#define		HFA384x_WEPFLAGS_HOST_MIC      		((UINT16)BIT9)
+#define 	HFA384x_ROAMMODE_FWSCAN_FWROAM		((UINT16)1)
+#define 	HFA384x_ROAMMODE_FWSCAN_HOSTROAM	((UINT16)2)
+#define 	HFA384x_ROAMMODE_HOSTSCAN_HOSTROAM	((UINT16)3)
+#define 	HFA384x_PORTSTATUS_DISABLED		((UINT16)1)
+#define 	HFA384x_PORTSTATUS_INITSRCH		((UINT16)2)
+#define 	HFA384x_PORTSTATUS_CONN_IBSS		((UINT16)3)
+#define 	HFA384x_PORTSTATUS_CONN_ESS		((UINT16)4)
+#define 	HFA384x_PORTSTATUS_OOR_ESS		((UINT16)5)
+#define 	HFA384x_PORTSTATUS_CONN_WDS		((UINT16)6)
+#define 	HFA384x_PORTSTATUS_HOSTAP		((UINT16)8)
+#define		HFA384x_RATEBIT_1			((UINT16)1)
+#define		HFA384x_RATEBIT_2			((UINT16)2)
+#define		HFA384x_RATEBIT_5dot5			((UINT16)4)
+#define		HFA384x_RATEBIT_11			((UINT16)8)
 
 /*--- Just some symbolic names for legibility -------*/
-#define		HFA384x_TXCMD_NORECL		((uint16_t)0)
-#define		HFA384x_TXCMD_RECL		((uint16_t)1)
+#define		HFA384x_TXCMD_NORECL		((UINT16)0)
+#define		HFA384x_TXCMD_RECL		((UINT16)1)
 
 /*--- MAC Internal memory constants and macros ------*/
 /* masks and macros used to manipulate MAC internal memory addresses. */
-/* MAC internal memory addresses are 23 bit quantities.  The MAC uses
- * a paged address space where the upper 16 bits are the page number
- * and the lower 7 bits are the offset.  There are various Host API
- * elements that require two 16-bit quantities to specify a MAC
- * internal memory address.  Unfortunately, some of the API's use a
- * page/offset format where the offset value is JUST the lower seven
- * bits and the page is  the remaining 16 bits.  Some of the API's
- * assume that the 23 bit address has been split at the 16th bit.  We
- * refer to these two formats as AUX format and CMD format.  The
+/* MAC internal memory addresses are 23 bit quantities.  The MAC uses 
+ * a paged address space where the upper 16 bits are the page number 
+ * and the lower 7 bits are the offset.  There are various Host API 
+ * elements that require two 16-bit quantities to specify a MAC 
+ * internal memory address.  Unfortunately, some of the API's use a 
+ * page/offset format where the offset value is JUST the lower seven 
+ * bits and the page is  the remaining 16 bits.  Some of the API's 
+ * assume that the 23 bit address has been split at the 16th bit.  We 
+ * refer to these two formats as AUX format and CMD format.  The 
  * macros below help handle some of this.
- */
+ */ 
 
 /* Handy constant */
-#define		HFA384x_ADDR_AUX_OFF_MAX	((uint16_t)0x007f)
+#define		HFA384x_ADDR_AUX_OFF_MAX	((UINT16)0x007f)
 
 /* Mask bits for discarding unwanted pieces in a flat address */
 #define		HFA384x_ADDR_FLAT_AUX_PAGE_MASK	(0x007fff80)
@@ -160,25 +160,25 @@
 
 /* Make a 32-bit flat address from AUX format 16-bit page and offset */
 #define		HFA384x_ADDR_AUX_MKFLAT(p,o)	\
-		(((uint32_t)(((uint16_t)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) <<7) | \
-		((uint32_t)(((uint16_t)(o))&HFA384x_ADDR_AUX_OFF_MASK))
+		(((UINT32)(((UINT16)(p))&HFA384x_ADDR_AUX_PAGE_MASK)) <<7) | \
+		((UINT32)(((UINT16)(o))&HFA384x_ADDR_AUX_OFF_MASK))
 
 /* Make a 32-bit flat address from CMD format 16-bit page and offset */
 #define		HFA384x_ADDR_CMD_MKFLAT(p,o)	\
-		(((uint32_t)(((uint16_t)(p))&HFA384x_ADDR_CMD_PAGE_MASK)) <<16) | \
-		((uint32_t)(((uint16_t)(o))&HFA384x_ADDR_CMD_OFF_MASK))
+		(((UINT32)(((UINT16)(p))&HFA384x_ADDR_CMD_PAGE_MASK)) <<16) | \
+		((UINT32)(((UINT16)(o))&HFA384x_ADDR_CMD_OFF_MASK))
 
 /* Make AUX format offset and page from a 32-bit flat address */
 #define		HFA384x_ADDR_AUX_MKPAGE(f) \
-		((uint16_t)((((uint32_t)(f))&HFA384x_ADDR_FLAT_AUX_PAGE_MASK)>>7))
+		((UINT16)((((UINT32)(f))&HFA384x_ADDR_FLAT_AUX_PAGE_MASK)>>7))
 #define		HFA384x_ADDR_AUX_MKOFF(f) \
-		((uint16_t)(((uint32_t)(f))&HFA384x_ADDR_FLAT_AUX_OFF_MASK))
+		((UINT16)(((UINT32)(f))&HFA384x_ADDR_FLAT_AUX_OFF_MASK))
 
 /* Make CMD format offset and page from a 32-bit flat address */
 #define		HFA384x_ADDR_CMD_MKPAGE(f) \
-		((uint16_t)((((uint32_t)(f))&HFA384x_ADDR_FLAT_CMD_PAGE_MASK)>>16))
+		((UINT16)((((UINT32)(f))&HFA384x_ADDR_FLAT_CMD_PAGE_MASK)>>16))
 #define		HFA384x_ADDR_CMD_MKOFF(f) \
-		((uint16_t)(((uint32_t)(f))&HFA384x_ADDR_FLAT_CMD_OFF_MASK))
+		((UINT16)(((UINT32)(f))&HFA384x_ADDR_FLAT_CMD_OFF_MASK))
 
 /*--- Aux register masks/tests ----------------------*/
 /* Some of the upper bits of the AUX offset register are used to */
@@ -190,7 +190,7 @@
 
 /* Make AUX register offset and page values from a flat address */
 #define		HFA384x_AUX_MKOFF(f, c) \
-	(HFA384x_ADDR_AUX_MKOFF(f) | (((uint16_t)(c))<<12))
+	(HFA384x_ADDR_AUX_MKOFF(f) | (((UINT16)(c))<<12))
 #define		HFA384x_AUX_MKPAGE(f)	HFA384x_ADDR_AUX_MKPAGE(f)
 
 
@@ -284,91 +284,91 @@
 #endif
 
 /*--- Register Field Masks --------------------------*/
-#define		HFA384x_CMD_BUSY		((uint16_t)BIT15)
-#define		HFA384x_CMD_AINFO		((uint16_t)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))
-#define		HFA384x_CMD_MACPORT		((uint16_t)(BIT10 | BIT9 | BIT8))
-#define		HFA384x_CMD_RECL		((uint16_t)BIT8)
-#define		HFA384x_CMD_WRITE		((uint16_t)BIT8)
-#define		HFA384x_CMD_PROGMODE		((uint16_t)(BIT9 | BIT8))
-#define		HFA384x_CMD_CMDCODE		((uint16_t)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0))
-
-#define		HFA384x_STATUS_RESULT		((uint16_t)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))
-#define		HFA384x_STATUS_CMDCODE		((uint16_t)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0))
-
-#define		HFA384x_OFFSET_BUSY		((uint16_t)BIT15)
-#define		HFA384x_OFFSET_ERR		((uint16_t)BIT14)
-#define		HFA384x_OFFSET_DATAOFF		((uint16_t)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1))
-
-#define		HFA384x_EVSTAT_TICK		((uint16_t)BIT15)
-#define		HFA384x_EVSTAT_WTERR		((uint16_t)BIT14)
-#define		HFA384x_EVSTAT_INFDROP		((uint16_t)BIT13)
-#define		HFA384x_EVSTAT_INFO		((uint16_t)BIT7)
-#define		HFA384x_EVSTAT_DTIM		((uint16_t)BIT5)
-#define		HFA384x_EVSTAT_CMD		((uint16_t)BIT4)
-#define		HFA384x_EVSTAT_ALLOC		((uint16_t)BIT3)
-#define		HFA384x_EVSTAT_TXEXC		((uint16_t)BIT2)
-#define		HFA384x_EVSTAT_TX		((uint16_t)BIT1)
-#define		HFA384x_EVSTAT_RX		((uint16_t)BIT0)
+#define		HFA384x_CMD_BUSY		((UINT16)BIT15)
+#define		HFA384x_CMD_AINFO		((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))
+#define		HFA384x_CMD_MACPORT		((UINT16)(BIT10 | BIT9 | BIT8))
+#define		HFA384x_CMD_RECL		((UINT16)BIT8)
+#define		HFA384x_CMD_WRITE		((UINT16)BIT8)
+#define		HFA384x_CMD_PROGMODE		((UINT16)(BIT9 | BIT8))
+#define		HFA384x_CMD_CMDCODE		((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0))
+
+#define		HFA384x_STATUS_RESULT		((UINT16)(BIT14 | BIT13 | BIT12 | BIT11 | BIT10 | BIT9 | BIT8))
+#define		HFA384x_STATUS_CMDCODE		((UINT16)(BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0))
+
+#define		HFA384x_OFFSET_BUSY		((UINT16)BIT15)
+#define		HFA384x_OFFSET_ERR		((UINT16)BIT14)
+#define		HFA384x_OFFSET_DATAOFF		((UINT16)(BIT11 | BIT10 | BIT9 | BIT8 | BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1))
+
+#define		HFA384x_EVSTAT_TICK		((UINT16)BIT15)
+#define		HFA384x_EVSTAT_WTERR		((UINT16)BIT14)
+#define		HFA384x_EVSTAT_INFDROP		((UINT16)BIT13)
+#define		HFA384x_EVSTAT_INFO		((UINT16)BIT7)
+#define		HFA384x_EVSTAT_DTIM		((UINT16)BIT5)
+#define		HFA384x_EVSTAT_CMD		((UINT16)BIT4)
+#define		HFA384x_EVSTAT_ALLOC		((UINT16)BIT3)
+#define		HFA384x_EVSTAT_TXEXC		((UINT16)BIT2)
+#define		HFA384x_EVSTAT_TX		((UINT16)BIT1)
+#define		HFA384x_EVSTAT_RX		((UINT16)BIT0)
 
 #define         HFA384x_INT_BAP_OP           (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC)
 
 #define         HFA384x_INT_NORMAL           (HFA384x_EVSTAT_INFO|HFA384x_EVSTAT_RX|HFA384x_EVSTAT_TX|HFA384x_EVSTAT_TXEXC|HFA384x_EVSTAT_INFDROP|HFA384x_EVSTAT_ALLOC|HFA384x_EVSTAT_DTIM)
 
-#define		HFA384x_INTEN_TICK		((uint16_t)BIT15)
-#define		HFA384x_INTEN_WTERR		((uint16_t)BIT14)
-#define		HFA384x_INTEN_INFDROP		((uint16_t)BIT13)
-#define		HFA384x_INTEN_INFO		((uint16_t)BIT7)
-#define		HFA384x_INTEN_DTIM		((uint16_t)BIT5)
-#define		HFA384x_INTEN_CMD		((uint16_t)BIT4)
-#define		HFA384x_INTEN_ALLOC		((uint16_t)BIT3)
-#define		HFA384x_INTEN_TXEXC		((uint16_t)BIT2)
-#define		HFA384x_INTEN_TX		((uint16_t)BIT1)
-#define		HFA384x_INTEN_RX		((uint16_t)BIT0)
-
-#define		HFA384x_EVACK_TICK		((uint16_t)BIT15)
-#define		HFA384x_EVACK_WTERR		((uint16_t)BIT14)
-#define		HFA384x_EVACK_INFDROP		((uint16_t)BIT13)
-#define		HFA384x_EVACK_INFO		((uint16_t)BIT7)
-#define		HFA384x_EVACK_DTIM		((uint16_t)BIT5)
-#define		HFA384x_EVACK_CMD		((uint16_t)BIT4)
-#define		HFA384x_EVACK_ALLOC		((uint16_t)BIT3)
-#define		HFA384x_EVACK_TXEXC		((uint16_t)BIT2)
-#define		HFA384x_EVACK_TX		((uint16_t)BIT1)
-#define		HFA384x_EVACK_RX		((uint16_t)BIT0)
+#define		HFA384x_INTEN_TICK		((UINT16)BIT15)
+#define		HFA384x_INTEN_WTERR		((UINT16)BIT14)
+#define		HFA384x_INTEN_INFDROP		((UINT16)BIT13)
+#define		HFA384x_INTEN_INFO		((UINT16)BIT7)
+#define		HFA384x_INTEN_DTIM		((UINT16)BIT5)
+#define		HFA384x_INTEN_CMD		((UINT16)BIT4)
+#define		HFA384x_INTEN_ALLOC		((UINT16)BIT3)
+#define		HFA384x_INTEN_TXEXC		((UINT16)BIT2)
+#define		HFA384x_INTEN_TX		((UINT16)BIT1)
+#define		HFA384x_INTEN_RX		((UINT16)BIT0)
+
+#define		HFA384x_EVACK_TICK		((UINT16)BIT15)
+#define		HFA384x_EVACK_WTERR		((UINT16)BIT14)
+#define		HFA384x_EVACK_INFDROP		((UINT16)BIT13)
+#define		HFA384x_EVACK_INFO		((UINT16)BIT7)
+#define		HFA384x_EVACK_DTIM		((UINT16)BIT5)
+#define		HFA384x_EVACK_CMD		((UINT16)BIT4)
+#define		HFA384x_EVACK_ALLOC		((UINT16)BIT3)
+#define		HFA384x_EVACK_TXEXC		((UINT16)BIT2)
+#define		HFA384x_EVACK_TX		((UINT16)BIT1)
+#define		HFA384x_EVACK_RX		((UINT16)BIT0)
 
-#define		HFA384x_CONTROL_AUXEN		((uint16_t)(BIT15 | BIT14))
+#define		HFA384x_CONTROL_AUXEN		((UINT16)(BIT15 | BIT14))
 
 
 /*--- Command Code Constants --------------------------*/
 /*--- Controller Commands --------------------------*/
-#define		HFA384x_CMDCODE_INIT		((uint16_t)0x00)
-#define		HFA384x_CMDCODE_ENABLE		((uint16_t)0x01)
-#define		HFA384x_CMDCODE_DISABLE		((uint16_t)0x02)
-#define		HFA384x_CMDCODE_DIAG		((uint16_t)0x03)
+#define		HFA384x_CMDCODE_INIT		((UINT16)0x00)
+#define		HFA384x_CMDCODE_ENABLE		((UINT16)0x01)
+#define		HFA384x_CMDCODE_DISABLE		((UINT16)0x02)
+#define		HFA384x_CMDCODE_DIAG		((UINT16)0x03)
 
 /*--- Buffer Mgmt Commands --------------------------*/
-#define		HFA384x_CMDCODE_ALLOC		((uint16_t)0x0A)
-#define		HFA384x_CMDCODE_TX		((uint16_t)0x0B)
-#define		HFA384x_CMDCODE_CLRPRST		((uint16_t)0x12)
+#define		HFA384x_CMDCODE_ALLOC		((UINT16)0x0A)
+#define		HFA384x_CMDCODE_TX		((UINT16)0x0B)
+#define		HFA384x_CMDCODE_CLRPRST		((UINT16)0x12)
 
 /*--- Regulate Commands --------------------------*/
-#define		HFA384x_CMDCODE_NOTIFY		((uint16_t)0x10)
-#define		HFA384x_CMDCODE_INQ		((uint16_t)0x11)
+#define		HFA384x_CMDCODE_NOTIFY		((UINT16)0x10)
+#define		HFA384x_CMDCODE_INQ		((UINT16)0x11)
 
 /*--- Configure Commands --------------------------*/
-#define		HFA384x_CMDCODE_ACCESS		((uint16_t)0x21)
-#define		HFA384x_CMDCODE_DOWNLD		((uint16_t)0x22)
+#define		HFA384x_CMDCODE_ACCESS		((UINT16)0x21)
+#define		HFA384x_CMDCODE_DOWNLD		((UINT16)0x22)
 
 /*--- Debugging Commands -----------------------------*/
-#define 	HFA384x_CMDCODE_MONITOR		((uint16_t)(0x38))
-#define		HFA384x_MONITOR_ENABLE		((uint16_t)(0x0b))
-#define		HFA384x_MONITOR_DISABLE		((uint16_t)(0x0f))
+#define 	HFA384x_CMDCODE_MONITOR		((UINT16)(0x38))
+#define		HFA384x_MONITOR_ENABLE		((UINT16)(0x0b))
+#define		HFA384x_MONITOR_DISABLE		((UINT16)(0x0f))
 
 /*--- Result Codes --------------------------*/
-#define		HFA384x_SUCCESS			((uint16_t)(0x00))
-#define		HFA384x_CARD_FAIL		((uint16_t)(0x01))
-#define		HFA384x_NO_BUFF			((uint16_t)(0x05))
-#define		HFA384x_CMD_ERR			((uint16_t)(0x7F))
+#define		HFA384x_SUCCESS			((UINT16)(0x00))
+#define		HFA384x_CARD_FAIL		((UINT16)(0x01))
+#define		HFA384x_NO_BUFF			((UINT16)(0x05))
+#define		HFA384x_CMD_ERR			((UINT16)(0x7F))
 
 /*--- Programming Modes --------------------------
 	MODE 0: Disable programming
@@ -376,408 +376,408 @@
 	MODE 2: Enable non-volatile memory programming
 	MODE 3: Program non-volatile memory section
 --------------------------------------------------*/
-#define		HFA384x_PROGMODE_DISABLE	((uint16_t)0x00)
-#define		HFA384x_PROGMODE_RAM		((uint16_t)0x01)
-#define		HFA384x_PROGMODE_NV		((uint16_t)0x02)
-#define		HFA384x_PROGMODE_NVWRITE	((uint16_t)0x03)
+#define		HFA384x_PROGMODE_DISABLE	((UINT16)0x00)
+#define		HFA384x_PROGMODE_RAM		((UINT16)0x01)
+#define		HFA384x_PROGMODE_NV		((UINT16)0x02)
+#define		HFA384x_PROGMODE_NVWRITE	((UINT16)0x03)
 
 /*--- AUX register enable --------------------------*/
-#define		HFA384x_AUXPW0			((uint16_t)0xfe01)
-#define		HFA384x_AUXPW1			((uint16_t)0xdc23)
-#define		HFA384x_AUXPW2			((uint16_t)0xba45)
-
-#define		HFA384x_CONTROL_AUX_ISDISABLED	((uint16_t)0x0000)
-#define		HFA384x_CONTROL_AUX_ISENABLED	((uint16_t)0xc000)
-#define		HFA384x_CONTROL_AUX_DOENABLE	((uint16_t)0x8000)
-#define		HFA384x_CONTROL_AUX_DODISABLE	((uint16_t)0x4000)
+#define		HFA384x_AUXPW0			((UINT16)0xfe01)
+#define		HFA384x_AUXPW1			((UINT16)0xdc23)
+#define		HFA384x_AUXPW2			((UINT16)0xba45)
+
+#define		HFA384x_CONTROL_AUX_ISDISABLED	((UINT16)0x0000)
+#define		HFA384x_CONTROL_AUX_ISENABLED	((UINT16)0xc000)
+#define		HFA384x_CONTROL_AUX_DOENABLE	((UINT16)0x8000)
+#define		HFA384x_CONTROL_AUX_DODISABLE	((UINT16)0x4000)
 
 /*--- Record ID Constants --------------------------*/
 /*--------------------------------------------------------------------
 Configuration RIDs: Network Parameters, Static Configuration Entities
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_CNFPORTTYPE		((uint16_t)0xFC00)
-#define		HFA384x_RID_CNFOWNMACADDR	((uint16_t)0xFC01)
-#define		HFA384x_RID_CNFDESIREDSSID	((uint16_t)0xFC02)
-#define		HFA384x_RID_CNFOWNCHANNEL	((uint16_t)0xFC03)
-#define		HFA384x_RID_CNFOWNSSID		((uint16_t)0xFC04)
-#define		HFA384x_RID_CNFOWNATIMWIN	((uint16_t)0xFC05)
-#define		HFA384x_RID_CNFSYSSCALE		((uint16_t)0xFC06)
-#define		HFA384x_RID_CNFMAXDATALEN	((uint16_t)0xFC07)
-#define		HFA384x_RID_CNFWDSADDR		((uint16_t)0xFC08)
-#define		HFA384x_RID_CNFPMENABLED	((uint16_t)0xFC09)
-#define		HFA384x_RID_CNFPMEPS		((uint16_t)0xFC0A)
-#define		HFA384x_RID_CNFMULTICASTRX	((uint16_t)0xFC0B)
-#define		HFA384x_RID_CNFMAXSLEEPDUR	((uint16_t)0xFC0C)
-#define		HFA384x_RID_CNFPMHOLDDUR	((uint16_t)0xFC0D)
-#define		HFA384x_RID_CNFOWNNAME		((uint16_t)0xFC0E)
-#define		HFA384x_RID_CNFOWNDTIMPER	((uint16_t)0xFC10)
-#define		HFA384x_RID_CNFWDSADDR1		((uint16_t)0xFC11)
-#define		HFA384x_RID_CNFWDSADDR2		((uint16_t)0xFC12)
-#define		HFA384x_RID_CNFWDSADDR3		((uint16_t)0xFC13)
-#define		HFA384x_RID_CNFWDSADDR4		((uint16_t)0xFC14)
-#define		HFA384x_RID_CNFWDSADDR5		((uint16_t)0xFC15)
-#define		HFA384x_RID_CNFWDSADDR6		((uint16_t)0xFC16)
-#define		HFA384x_RID_CNFMCASTPMBUFF	((uint16_t)0xFC17)
+#define		HFA384x_RID_CNFPORTTYPE		((UINT16)0xFC00)
+#define		HFA384x_RID_CNFOWNMACADDR	((UINT16)0xFC01)
+#define		HFA384x_RID_CNFDESIREDSSID	((UINT16)0xFC02)
+#define		HFA384x_RID_CNFOWNCHANNEL	((UINT16)0xFC03)
+#define		HFA384x_RID_CNFOWNSSID		((UINT16)0xFC04)
+#define		HFA384x_RID_CNFOWNATIMWIN	((UINT16)0xFC05)
+#define		HFA384x_RID_CNFSYSSCALE		((UINT16)0xFC06)
+#define		HFA384x_RID_CNFMAXDATALEN	((UINT16)0xFC07)
+#define		HFA384x_RID_CNFWDSADDR		((UINT16)0xFC08)
+#define		HFA384x_RID_CNFPMENABLED	((UINT16)0xFC09)
+#define		HFA384x_RID_CNFPMEPS		((UINT16)0xFC0A)
+#define		HFA384x_RID_CNFMULTICASTRX	((UINT16)0xFC0B)
+#define		HFA384x_RID_CNFMAXSLEEPDUR	((UINT16)0xFC0C)
+#define		HFA384x_RID_CNFPMHOLDDUR	((UINT16)0xFC0D)
+#define		HFA384x_RID_CNFOWNNAME		((UINT16)0xFC0E)
+#define		HFA384x_RID_CNFOWNDTIMPER	((UINT16)0xFC10)
+#define		HFA384x_RID_CNFWDSADDR1		((UINT16)0xFC11)
+#define		HFA384x_RID_CNFWDSADDR2		((UINT16)0xFC12)
+#define		HFA384x_RID_CNFWDSADDR3		((UINT16)0xFC13)
+#define		HFA384x_RID_CNFWDSADDR4		((UINT16)0xFC14)
+#define		HFA384x_RID_CNFWDSADDR5		((UINT16)0xFC15)
+#define		HFA384x_RID_CNFWDSADDR6		((UINT16)0xFC16)
+#define		HFA384x_RID_CNFMCASTPMBUFF	((UINT16)0xFC17)
 
 /*--------------------------------------------------------------------
 Configuration RID lengths: Network Params, Static Config Entities
-  This is the length of JUST the DATA part of the RID (does not
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
 /* TODO: fill in the rest of these */
-#define		HFA384x_RID_CNFPORTTYPE_LEN	((uint16_t)2)
-#define		HFA384x_RID_CNFOWNMACADDR_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFDESIREDSSID_LEN	((uint16_t)34)
-#define		HFA384x_RID_CNFOWNCHANNEL_LEN	((uint16_t)2)
-#define		HFA384x_RID_CNFOWNSSID_LEN	((uint16_t)34)
-#define		HFA384x_RID_CNFOWNATIMWIN_LEN	((uint16_t)2)
-#define		HFA384x_RID_CNFSYSSCALE_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFMAXDATALEN_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFWDSADDR_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFPMENABLED_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFPMEPS_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFMULTICASTRX_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFMAXSLEEPDUR_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFPMHOLDDUR_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFOWNNAME_LEN	((uint16_t)34)
-#define		HFA384x_RID_CNFOWNDTIMPER_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFWDSADDR1_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWDSADDR2_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWDSADDR3_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWDSADDR4_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWDSADDR5_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWDSADDR6_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFMCASTPMBUFF_LEN	((uint16_t)0)
-#define		HFA384x_RID_CNFAUTHENTICATION_LEN ((uint16_t)sizeof(uint16_t))
-#define		HFA384x_RID_CNFMAXSLEEPDUR_LEN	((uint16_t)0)
+#define		HFA384x_RID_CNFPORTTYPE_LEN	((UINT16)2)
+#define		HFA384x_RID_CNFOWNMACADDR_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFDESIREDSSID_LEN	((UINT16)34)
+#define		HFA384x_RID_CNFOWNCHANNEL_LEN	((UINT16)2)
+#define		HFA384x_RID_CNFOWNSSID_LEN	((UINT16)34)
+#define		HFA384x_RID_CNFOWNATIMWIN_LEN	((UINT16)2)
+#define		HFA384x_RID_CNFSYSSCALE_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFMAXDATALEN_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFWDSADDR_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFPMENABLED_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFPMEPS_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFMULTICASTRX_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFPMHOLDDUR_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFOWNNAME_LEN	((UINT16)34)
+#define		HFA384x_RID_CNFOWNDTIMPER_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFWDSADDR1_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWDSADDR2_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWDSADDR3_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWDSADDR4_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWDSADDR5_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWDSADDR6_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFMCASTPMBUFF_LEN	((UINT16)0)
+#define		HFA384x_RID_CNFAUTHENTICATION_LEN ((UINT16)sizeof(UINT16))
+#define		HFA384x_RID_CNFMAXSLEEPDUR_LEN	((UINT16)0)
 
 /*--------------------------------------------------------------------
 Configuration RIDs: Network Parameters, Dynamic Configuration Entities
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_GROUPADDR		((uint16_t)0xFC80)
-#define		HFA384x_RID_CREATEIBSS		((uint16_t)0xFC81)
-#define		HFA384x_RID_FRAGTHRESH		((uint16_t)0xFC82)
-#define		HFA384x_RID_RTSTHRESH		((uint16_t)0xFC83)
-#define		HFA384x_RID_TXRATECNTL		((uint16_t)0xFC84)
-#define		HFA384x_RID_PROMISCMODE		((uint16_t)0xFC85)
-#define		HFA384x_RID_FRAGTHRESH0		((uint16_t)0xFC90)
-#define		HFA384x_RID_FRAGTHRESH1		((uint16_t)0xFC91)
-#define		HFA384x_RID_FRAGTHRESH2		((uint16_t)0xFC92)
-#define		HFA384x_RID_FRAGTHRESH3		((uint16_t)0xFC93)
-#define		HFA384x_RID_FRAGTHRESH4		((uint16_t)0xFC94)
-#define		HFA384x_RID_FRAGTHRESH5		((uint16_t)0xFC95)
-#define		HFA384x_RID_FRAGTHRESH6		((uint16_t)0xFC96)
-#define		HFA384x_RID_RTSTHRESH0		((uint16_t)0xFC97)
-#define		HFA384x_RID_RTSTHRESH1		((uint16_t)0xFC98)
-#define		HFA384x_RID_RTSTHRESH2		((uint16_t)0xFC99)
-#define		HFA384x_RID_RTSTHRESH3		((uint16_t)0xFC9A)
-#define		HFA384x_RID_RTSTHRESH4		((uint16_t)0xFC9B)
-#define		HFA384x_RID_RTSTHRESH5		((uint16_t)0xFC9C)
-#define		HFA384x_RID_RTSTHRESH6		((uint16_t)0xFC9D)
-#define		HFA384x_RID_TXRATECNTL0		((uint16_t)0xFC9E)
-#define		HFA384x_RID_TXRATECNTL1		((uint16_t)0xFC9F)
-#define		HFA384x_RID_TXRATECNTL2		((uint16_t)0xFCA0)
-#define		HFA384x_RID_TXRATECNTL3		((uint16_t)0xFCA1)
-#define		HFA384x_RID_TXRATECNTL4		((uint16_t)0xFCA2)
-#define		HFA384x_RID_TXRATECNTL5		((uint16_t)0xFCA3)
-#define		HFA384x_RID_TXRATECNTL6		((uint16_t)0xFCA4)
+#define		HFA384x_RID_GROUPADDR		((UINT16)0xFC80)
+#define		HFA384x_RID_CREATEIBSS		((UINT16)0xFC81)
+#define		HFA384x_RID_FRAGTHRESH		((UINT16)0xFC82)
+#define		HFA384x_RID_RTSTHRESH		((UINT16)0xFC83)
+#define		HFA384x_RID_TXRATECNTL		((UINT16)0xFC84)
+#define		HFA384x_RID_PROMISCMODE		((UINT16)0xFC85)
+#define		HFA384x_RID_FRAGTHRESH0		((UINT16)0xFC90)
+#define		HFA384x_RID_FRAGTHRESH1		((UINT16)0xFC91)
+#define		HFA384x_RID_FRAGTHRESH2		((UINT16)0xFC92)
+#define		HFA384x_RID_FRAGTHRESH3		((UINT16)0xFC93)
+#define		HFA384x_RID_FRAGTHRESH4		((UINT16)0xFC94)
+#define		HFA384x_RID_FRAGTHRESH5		((UINT16)0xFC95)
+#define		HFA384x_RID_FRAGTHRESH6		((UINT16)0xFC96)
+#define		HFA384x_RID_RTSTHRESH0		((UINT16)0xFC97)
+#define		HFA384x_RID_RTSTHRESH1		((UINT16)0xFC98)
+#define		HFA384x_RID_RTSTHRESH2		((UINT16)0xFC99)
+#define		HFA384x_RID_RTSTHRESH3		((UINT16)0xFC9A)
+#define		HFA384x_RID_RTSTHRESH4		((UINT16)0xFC9B)
+#define		HFA384x_RID_RTSTHRESH5		((UINT16)0xFC9C)
+#define		HFA384x_RID_RTSTHRESH6		((UINT16)0xFC9D)
+#define		HFA384x_RID_TXRATECNTL0		((UINT16)0xFC9E)
+#define		HFA384x_RID_TXRATECNTL1		((UINT16)0xFC9F)
+#define		HFA384x_RID_TXRATECNTL2		((UINT16)0xFCA0)
+#define		HFA384x_RID_TXRATECNTL3		((UINT16)0xFCA1)
+#define		HFA384x_RID_TXRATECNTL4		((UINT16)0xFCA2)
+#define		HFA384x_RID_TXRATECNTL5		((UINT16)0xFCA3)
+#define		HFA384x_RID_TXRATECNTL6		((UINT16)0xFCA4)
 
 /*--------------------------------------------------------------------
 Configuration RID Lengths: Network Param, Dynamic Config Entities
-  This is the length of JUST the DATA part of the RID (does not
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
 /* TODO: fill in the rest of these */
-#define		HFA384x_RID_GROUPADDR_LEN	((uint16_t)16 * WLAN_ADDR_LEN)
-#define		HFA384x_RID_CREATEIBSS_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL_LEN	((uint16_t)4)
-#define		HFA384x_RID_PROMISCMODE_LEN	((uint16_t)2)
-#define		HFA384x_RID_FRAGTHRESH0_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH1_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH2_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH3_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH4_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH5_LEN	((uint16_t)0)
-#define		HFA384x_RID_FRAGTHRESH6_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH0_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH1_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH2_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH3_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH4_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH5_LEN	((uint16_t)0)
-#define		HFA384x_RID_RTSTHRESH6_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL0_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL1_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL2_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL3_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL4_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL5_LEN	((uint16_t)0)
-#define		HFA384x_RID_TXRATECNTL6_LEN	((uint16_t)0)
+#define		HFA384x_RID_GROUPADDR_LEN	((UINT16)16 * WLAN_ADDR_LEN)
+#define		HFA384x_RID_CREATEIBSS_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL_LEN	((UINT16)4)
+#define		HFA384x_RID_PROMISCMODE_LEN	((UINT16)2)
+#define		HFA384x_RID_FRAGTHRESH0_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH1_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH2_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH3_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH4_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH5_LEN	((UINT16)0)
+#define		HFA384x_RID_FRAGTHRESH6_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH0_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH1_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH2_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH3_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH4_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH5_LEN	((UINT16)0)
+#define		HFA384x_RID_RTSTHRESH6_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL0_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL1_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL2_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL3_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL4_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL5_LEN	((UINT16)0)
+#define		HFA384x_RID_TXRATECNTL6_LEN	((UINT16)0)
 
 /*--------------------------------------------------------------------
 Configuration RIDs: Behavior Parameters
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_ITICKTIME		((uint16_t)0xFCE0)
+#define		HFA384x_RID_ITICKTIME		((UINT16)0xFCE0)
 
 /*--------------------------------------------------------------------
 Configuration RID Lengths: Behavior Parameters
-  This is the length of JUST the DATA part of the RID (does not
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_ITICKTIME_LEN	((uint16_t)2)
+#define		HFA384x_RID_ITICKTIME_LEN	((UINT16)2)
 
 /*----------------------------------------------------------------------
 Information RIDs: NIC Information
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_MAXLOADTIME		((uint16_t)0xFD00)
-#define		HFA384x_RID_DOWNLOADBUFFER	((uint16_t)0xFD01)
-#define		HFA384x_RID_PRIIDENTITY		((uint16_t)0xFD02)
-#define		HFA384x_RID_PRISUPRANGE		((uint16_t)0xFD03)
-#define		HFA384x_RID_PRI_CFIACTRANGES	((uint16_t)0xFD04)
-#define		HFA384x_RID_NICSERIALNUMBER	((uint16_t)0xFD0A)
-#define		HFA384x_RID_NICIDENTITY		((uint16_t)0xFD0B)
-#define		HFA384x_RID_MFISUPRANGE		((uint16_t)0xFD0C)
-#define		HFA384x_RID_CFISUPRANGE		((uint16_t)0xFD0D)
-#define		HFA384x_RID_CHANNELLIST		((uint16_t)0xFD10)
-#define		HFA384x_RID_REGULATORYDOMAINS	((uint16_t)0xFD11)
-#define		HFA384x_RID_TEMPTYPE		((uint16_t)0xFD12)
-#define		HFA384x_RID_CIS			((uint16_t)0xFD13)
-#define		HFA384x_RID_STAIDENTITY		((uint16_t)0xFD20)
-#define		HFA384x_RID_STASUPRANGE		((uint16_t)0xFD21)
-#define		HFA384x_RID_STA_MFIACTRANGES	((uint16_t)0xFD22)
-#define		HFA384x_RID_STA_CFIACTRANGES	((uint16_t)0xFD23)
-#define		HFA384x_RID_BUILDSEQ		((uint16_t)0xFFFE)
-#define		HFA384x_RID_FWID		((uint16_t)0xFFFF)
+#define		HFA384x_RID_MAXLOADTIME		((UINT16)0xFD00)
+#define		HFA384x_RID_DOWNLOADBUFFER	((UINT16)0xFD01)
+#define		HFA384x_RID_PRIIDENTITY		((UINT16)0xFD02)
+#define		HFA384x_RID_PRISUPRANGE		((UINT16)0xFD03)
+#define		HFA384x_RID_PRI_CFIACTRANGES	((UINT16)0xFD04)
+#define		HFA384x_RID_NICSERIALNUMBER	((UINT16)0xFD0A)
+#define		HFA384x_RID_NICIDENTITY		((UINT16)0xFD0B)
+#define		HFA384x_RID_MFISUPRANGE		((UINT16)0xFD0C)
+#define		HFA384x_RID_CFISUPRANGE		((UINT16)0xFD0D)
+#define		HFA384x_RID_CHANNELLIST		((UINT16)0xFD10)
+#define		HFA384x_RID_REGULATORYDOMAINS	((UINT16)0xFD11)
+#define		HFA384x_RID_TEMPTYPE		((UINT16)0xFD12)
+#define		HFA384x_RID_CIS			((UINT16)0xFD13)
+#define		HFA384x_RID_STAIDENTITY		((UINT16)0xFD20)
+#define		HFA384x_RID_STASUPRANGE		((UINT16)0xFD21)
+#define		HFA384x_RID_STA_MFIACTRANGES	((UINT16)0xFD22)
+#define		HFA384x_RID_STA_CFIACTRANGES	((UINT16)0xFD23)
+#define		HFA384x_RID_BUILDSEQ		((UINT16)0xFFFE)
+#define		HFA384x_RID_FWID		((UINT16)0xFFFF)
 
 /*----------------------------------------------------------------------
 Information RID Lengths: NIC Information
-  This is the length of JUST the DATA part of the RID (does not
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_MAXLOADTIME_LEN		((uint16_t)0)
-#define		HFA384x_RID_DOWNLOADBUFFER_LEN		((uint16_t)sizeof(hfa384x_downloadbuffer_t))
-#define		HFA384x_RID_PRIIDENTITY_LEN		((uint16_t)8)
-#define		HFA384x_RID_PRISUPRANGE_LEN		((uint16_t)10)
-#define		HFA384x_RID_CFIACTRANGES_LEN		((uint16_t)10)
-#define		HFA384x_RID_NICSERIALNUMBER_LEN		((uint16_t)12)
-#define		HFA384x_RID_NICIDENTITY_LEN		((uint16_t)8)
-#define		HFA384x_RID_MFISUPRANGE_LEN		((uint16_t)10)
-#define		HFA384x_RID_CFISUPRANGE_LEN		((uint16_t)10)
-#define		HFA384x_RID_CHANNELLIST_LEN		((uint16_t)0)
-#define		HFA384x_RID_REGULATORYDOMAINS_LEN	((uint16_t)12)
-#define		HFA384x_RID_TEMPTYPE_LEN		((uint16_t)0)
-#define		HFA384x_RID_CIS_LEN			((uint16_t)480)
-#define		HFA384x_RID_STAIDENTITY_LEN		((uint16_t)8)
-#define		HFA384x_RID_STASUPRANGE_LEN		((uint16_t)10)
-#define		HFA384x_RID_MFIACTRANGES_LEN		((uint16_t)10)
-#define		HFA384x_RID_CFIACTRANGES2_LEN		((uint16_t)10)
-#define		HFA384x_RID_BUILDSEQ_LEN		((uint16_t)sizeof(hfa384x_BuildSeq_t))
-#define		HFA384x_RID_FWID_LEN			((uint16_t)sizeof(hfa384x_FWID_t))
+#define		HFA384x_RID_MAXLOADTIME_LEN		((UINT16)0)
+#define		HFA384x_RID_DOWNLOADBUFFER_LEN		((UINT16)sizeof(hfa384x_downloadbuffer_t))
+#define		HFA384x_RID_PRIIDENTITY_LEN		((UINT16)8)
+#define		HFA384x_RID_PRISUPRANGE_LEN		((UINT16)10)
+#define		HFA384x_RID_CFIACTRANGES_LEN		((UINT16)10)
+#define		HFA384x_RID_NICSERIALNUMBER_LEN		((UINT16)12)
+#define		HFA384x_RID_NICIDENTITY_LEN		((UINT16)8)
+#define		HFA384x_RID_MFISUPRANGE_LEN		((UINT16)10)
+#define		HFA384x_RID_CFISUPRANGE_LEN		((UINT16)10)
+#define		HFA384x_RID_CHANNELLIST_LEN		((UINT16)0)
+#define		HFA384x_RID_REGULATORYDOMAINS_LEN	((UINT16)12)
+#define		HFA384x_RID_TEMPTYPE_LEN		((UINT16)0)
+#define		HFA384x_RID_CIS_LEN			((UINT16)480)
+#define		HFA384x_RID_STAIDENTITY_LEN		((UINT16)8)
+#define		HFA384x_RID_STASUPRANGE_LEN		((UINT16)10)
+#define		HFA384x_RID_MFIACTRANGES_LEN		((UINT16)10)
+#define		HFA384x_RID_CFIACTRANGES2_LEN		((UINT16)10)
+#define		HFA384x_RID_BUILDSEQ_LEN		((UINT16)sizeof(hfa384x_BuildSeq_t))
+#define		HFA384x_RID_FWID_LEN			((UINT16)sizeof(hfa384x_FWID_t))
 
 /*--------------------------------------------------------------------
 Information RIDs:  MAC Information
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_PORTSTATUS		((uint16_t)0xFD40)
-#define		HFA384x_RID_CURRENTSSID		((uint16_t)0xFD41)
-#define		HFA384x_RID_CURRENTBSSID	((uint16_t)0xFD42)
-#define		HFA384x_RID_COMMSQUALITY	((uint16_t)0xFD43)
-#define		HFA384x_RID_CURRENTTXRATE	((uint16_t)0xFD44)
-#define		HFA384x_RID_CURRENTBCNint	((uint16_t)0xFD45)
-#define		HFA384x_RID_CURRENTSCALETHRESH	((uint16_t)0xFD46)
-#define		HFA384x_RID_PROTOCOLRSPTIME	((uint16_t)0xFD47)
-#define		HFA384x_RID_SHORTRETRYLIMIT	((uint16_t)0xFD48)
-#define		HFA384x_RID_LONGRETRYLIMIT	((uint16_t)0xFD49)
-#define		HFA384x_RID_MAXTXLIFETIME	((uint16_t)0xFD4A)
-#define		HFA384x_RID_MAXRXLIFETIME	((uint16_t)0xFD4B)
-#define		HFA384x_RID_CFPOLLABLE		((uint16_t)0xFD4C)
-#define		HFA384x_RID_AUTHALGORITHMS	((uint16_t)0xFD4D)
-#define		HFA384x_RID_PRIVACYOPTIMP	((uint16_t)0xFD4F)
-#define		HFA384x_RID_DBMCOMMSQUALITY	((uint16_t)0xFD51)
-#define		HFA384x_RID_CURRENTTXRATE1	((uint16_t)0xFD80)
-#define		HFA384x_RID_CURRENTTXRATE2	((uint16_t)0xFD81)
-#define		HFA384x_RID_CURRENTTXRATE3	((uint16_t)0xFD82)
-#define		HFA384x_RID_CURRENTTXRATE4	((uint16_t)0xFD83)
-#define		HFA384x_RID_CURRENTTXRATE5	((uint16_t)0xFD84)
-#define		HFA384x_RID_CURRENTTXRATE6	((uint16_t)0xFD85)
-#define		HFA384x_RID_OWNMACADDRESS	((uint16_t)0xFD86)
-// #define	HFA384x_RID_PCFINFO		((uint16_t)0xFD87)
-#define		HFA384x_RID_SCANRESULTS       	((uint16_t)0xFD88) // NEW
-#define		HFA384x_RID_HOSTSCANRESULTS   	((uint16_t)0xFD89) // NEW
-#define		HFA384x_RID_AUTHENTICATIONUSED	((uint16_t)0xFD8A) // NEW
-#define		HFA384x_RID_ASSOCIATEFAILURE  	((uint16_t)0xFD8D) // 1.8.0
+#define		HFA384x_RID_PORTSTATUS		((UINT16)0xFD40)
+#define		HFA384x_RID_CURRENTSSID		((UINT16)0xFD41)
+#define		HFA384x_RID_CURRENTBSSID	((UINT16)0xFD42)
+#define		HFA384x_RID_COMMSQUALITY	((UINT16)0xFD43)
+#define		HFA384x_RID_CURRENTTXRATE	((UINT16)0xFD44)
+#define		HFA384x_RID_CURRENTBCNINT	((UINT16)0xFD45)
+#define		HFA384x_RID_CURRENTSCALETHRESH	((UINT16)0xFD46)
+#define		HFA384x_RID_PROTOCOLRSPTIME	((UINT16)0xFD47)
+#define		HFA384x_RID_SHORTRETRYLIMIT	((UINT16)0xFD48)
+#define		HFA384x_RID_LONGRETRYLIMIT	((UINT16)0xFD49)
+#define		HFA384x_RID_MAXTXLIFETIME	((UINT16)0xFD4A)
+#define		HFA384x_RID_MAXRXLIFETIME	((UINT16)0xFD4B)
+#define		HFA384x_RID_CFPOLLABLE		((UINT16)0xFD4C)
+#define		HFA384x_RID_AUTHALGORITHMS	((UINT16)0xFD4D)
+#define		HFA384x_RID_PRIVACYOPTIMP	((UINT16)0xFD4F)
+#define		HFA384x_RID_DBMCOMMSQUALITY	((UINT16)0xFD51)
+#define		HFA384x_RID_CURRENTTXRATE1	((UINT16)0xFD80)
+#define		HFA384x_RID_CURRENTTXRATE2	((UINT16)0xFD81)
+#define		HFA384x_RID_CURRENTTXRATE3	((UINT16)0xFD82)
+#define		HFA384x_RID_CURRENTTXRATE4	((UINT16)0xFD83)
+#define		HFA384x_RID_CURRENTTXRATE5	((UINT16)0xFD84)
+#define		HFA384x_RID_CURRENTTXRATE6	((UINT16)0xFD85)
+#define		HFA384x_RID_OWNMACADDRESS	((UINT16)0xFD86)
+// #define	HFA384x_RID_PCFINFO		((UINT16)0xFD87)
+#define		HFA384x_RID_SCANRESULTS       	((UINT16)0xFD88) // NEW
+#define		HFA384x_RID_HOSTSCANRESULTS   	((UINT16)0xFD89) // NEW
+#define		HFA384x_RID_AUTHENTICATIONUSED	((UINT16)0xFD8A) // NEW
+#define		HFA384x_RID_ASSOCIATEFAILURE  	((UINT16)0xFD8D) // 1.8.0
 
 /*--------------------------------------------------------------------
 Information RID Lengths:  MAC Information
-  This is the length of JUST the DATA part of the RID (does not
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_PORTSTATUS_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTSSID_LEN		((uint16_t)34)
-#define		HFA384x_RID_CURRENTBSSID_LEN		((uint16_t)WLAN_BSSID_LEN)
-#define		HFA384x_RID_COMMSQUALITY_LEN		((uint16_t)sizeof(hfa384x_commsquality_t))
-#define		HFA384x_RID_DBMCOMMSQUALITY_LEN		((uint16_t)sizeof(hfa384x_dbmcommsquality_t))
-#define		HFA384x_RID_CURRENTTXRATE_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTBCNINT_LEN		((uint16_t)0)
-#define		HFA384x_RID_STACURSCALETHRESH_LEN	((uint16_t)12)
-#define		HFA384x_RID_APCURSCALETHRESH_LEN	((uint16_t)6)
-#define		HFA384x_RID_PROTOCOLRSPTIME_LEN		((uint16_t)0)
-#define		HFA384x_RID_SHORTRETRYLIMIT_LEN		((uint16_t)0)
-#define		HFA384x_RID_LONGRETRYLIMIT_LEN		((uint16_t)0)
-#define		HFA384x_RID_MAXTXLIFETIME_LEN		((uint16_t)0)
-#define		HFA384x_RID_MAXRXLIFETIME_LEN		((uint16_t)0)
-#define		HFA384x_RID_CFPOLLABLE_LEN		((uint16_t)0)
-#define		HFA384x_RID_AUTHALGORITHMS_LEN		((uint16_t)4)
-#define		HFA384x_RID_PRIVACYOPTIMP_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE1_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE2_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE3_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE4_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE5_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTTXRATE6_LEN		((uint16_t)0)
-#define		HFA384x_RID_OWNMACADDRESS_LEN		((uint16_t)6)
-#define		HFA384x_RID_PCFINFO_LEN			((uint16_t)6)
-#define		HFA384x_RID_CNFAPPCFINFO_LEN		((uint16_t)sizeof(hfa384x_PCFInfo_data_t))
-#define		HFA384x_RID_SCANREQUEST_LEN		((uint16_t)sizeof(hfa384x_ScanRequest_data_t))
-#define		HFA384x_RID_JOINREQUEST_LEN		((uint16_t)sizeof(hfa384x_JoinRequest_data_t))
-#define		HFA384x_RID_AUTHENTICATESTA_LEN		((uint16_t)sizeof(hfa384x_authenticateStation_data_t))
-#define		HFA384x_RID_CHANNELINFOREQUEST_LEN	((uint16_t)sizeof(hfa384x_ChannelInfoRequest_data_t))
+#define		HFA384x_RID_PORTSTATUS_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTSSID_LEN		((UINT16)34)
+#define		HFA384x_RID_CURRENTBSSID_LEN		((UINT16)WLAN_BSSID_LEN)
+#define		HFA384x_RID_COMMSQUALITY_LEN		((UINT16)sizeof(hfa384x_commsquality_t))
+#define		HFA384x_RID_DBMCOMMSQUALITY_LEN		((UINT16)sizeof(hfa384x_dbmcommsquality_t))
+#define		HFA384x_RID_CURRENTTXRATE_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTBCNINT_LEN		((UINT16)0)
+#define		HFA384x_RID_STACURSCALETHRESH_LEN	((UINT16)12)
+#define		HFA384x_RID_APCURSCALETHRESH_LEN	((UINT16)6)
+#define		HFA384x_RID_PROTOCOLRSPTIME_LEN		((UINT16)0)
+#define		HFA384x_RID_SHORTRETRYLIMIT_LEN		((UINT16)0)
+#define		HFA384x_RID_LONGRETRYLIMIT_LEN		((UINT16)0)
+#define		HFA384x_RID_MAXTXLIFETIME_LEN		((UINT16)0)
+#define		HFA384x_RID_MAXRXLIFETIME_LEN		((UINT16)0)
+#define		HFA384x_RID_CFPOLLABLE_LEN		((UINT16)0)
+#define		HFA384x_RID_AUTHALGORITHMS_LEN		((UINT16)4)
+#define		HFA384x_RID_PRIVACYOPTIMP_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE1_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE2_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE3_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE4_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE5_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTTXRATE6_LEN		((UINT16)0)
+#define		HFA384x_RID_OWNMACADDRESS_LEN		((UINT16)6)
+#define		HFA384x_RID_PCFINFO_LEN			((UINT16)6)
+#define		HFA384x_RID_CNFAPPCFINFO_LEN		((UINT16)sizeof(hfa384x_PCFInfo_data_t))
+#define		HFA384x_RID_SCANREQUEST_LEN		((UINT16)sizeof(hfa384x_ScanRequest_data_t))
+#define		HFA384x_RID_JOINREQUEST_LEN		((UINT16)sizeof(hfa384x_JoinRequest_data_t))
+#define		HFA384x_RID_AUTHENTICATESTA_LEN		((UINT16)sizeof(hfa384x_authenticateStation_data_t))
+#define		HFA384x_RID_CHANNELINFOREQUEST_LEN	((UINT16)sizeof(hfa384x_ChannelInfoRequest_data_t))
 /*--------------------------------------------------------------------
 Information RIDs:  Modem Information
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_PHYTYPE		((uint16_t)0xFDC0)
-#define		HFA384x_RID_CURRENTCHANNEL	((uint16_t)0xFDC1)
-#define		HFA384x_RID_CURRENTPOWERSTATE	((uint16_t)0xFDC2)
-#define		HFA384x_RID_CCAMODE		((uint16_t)0xFDC3)
-#define		HFA384x_RID_SUPPORTEDDATARATES	((uint16_t)0xFDC6)
-#define		HFA384x_RID_LFOSTATUS           ((uint16_t)0xFDC7) // 1.7.1
+#define		HFA384x_RID_PHYTYPE		((UINT16)0xFDC0)
+#define		HFA384x_RID_CURRENTCHANNEL	((UINT16)0xFDC1)
+#define		HFA384x_RID_CURRENTPOWERSTATE	((UINT16)0xFDC2)
+#define		HFA384x_RID_CCAMODE		((UINT16)0xFDC3)
+#define		HFA384x_RID_SUPPORTEDDATARATES	((UINT16)0xFDC6)
+#define		HFA384x_RID_LFOSTATUS           ((UINT16)0xFDC7) // 1.7.1
 
 /*--------------------------------------------------------------------
-Information RID Lengths:  Modem Information
-  This is the length of JUST the DATA part of the RID (does not
+Information RID Lengths:  Modem Information 
+  This is the length of JUST the DATA part of the RID (does not 
   include the len or code fields)
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_PHYTYPE_LEN			((uint16_t)0)
-#define		HFA384x_RID_CURRENTCHANNEL_LEN		((uint16_t)0)
-#define		HFA384x_RID_CURRENTPOWERSTATE_LEN	((uint16_t)0)
-#define		HFA384x_RID_CCAMODE_LEN			((uint16_t)0)
-#define		HFA384x_RID_SUPPORTEDDATARATES_LEN	((uint16_t)10)
+#define		HFA384x_RID_PHYTYPE_LEN			((UINT16)0)
+#define		HFA384x_RID_CURRENTCHANNEL_LEN		((UINT16)0)
+#define		HFA384x_RID_CURRENTPOWERSTATE_LEN	((UINT16)0)
+#define		HFA384x_RID_CCAMODE_LEN			((UINT16)0)
+#define		HFA384x_RID_SUPPORTEDDATARATES_LEN	((UINT16)10)
 
 /*--------------------------------------------------------------------
 API ENHANCEMENTS (NOT ALREADY IMPLEMENTED)
 --------------------------------------------------------------------*/
-#define		HFA384x_RID_CNFWEPDEFAULTKEYID	((uint16_t)0xFC23)
-#define		HFA384x_RID_CNFWEPDEFAULTKEY0	((uint16_t)0xFC24)
-#define		HFA384x_RID_CNFWEPDEFAULTKEY1	((uint16_t)0xFC25)
-#define		HFA384x_RID_CNFWEPDEFAULTKEY2	((uint16_t)0xFC26)
-#define		HFA384x_RID_CNFWEPDEFAULTKEY3	((uint16_t)0xFC27)
-#define		HFA384x_RID_CNFWEPFLAGS		((uint16_t)0xFC28)
-#define		HFA384x_RID_CNFWEPKEYMAPTABLE	((uint16_t)0xFC29)
-#define		HFA384x_RID_CNFAUTHENTICATION	((uint16_t)0xFC2A)
-#define		HFA384x_RID_CNFMAXASSOCSTATIONS	((uint16_t)0xFC2B)
-#define		HFA384x_RID_CNFTXCONTROL	((uint16_t)0xFC2C)
-#define		HFA384x_RID_CNFROAMINGMODE	((uint16_t)0xFC2D)
-#define		HFA384x_RID_CNFHOSTAUTHASSOC	((uint16_t)0xFC2E)
-#define		HFA384x_RID_CNFRCVCRCERROR	((uint16_t)0xFC30)
-// #define		HFA384x_RID_CNFMMLIFE		((uint16_t)0xFC31)
-#define		HFA384x_RID_CNFALTRETRYCNT	((uint16_t)0xFC32)
-#define		HFA384x_RID_CNFAPBCNint		((uint16_t)0xFC33)
-#define		HFA384x_RID_CNFAPPCFINFO	((uint16_t)0xFC34)
-#define		HFA384x_RID_CNFSTAPCFINFO	((uint16_t)0xFC35)
-#define		HFA384x_RID_CNFPRIORITYQUSAGE	((uint16_t)0xFC37)
-#define		HFA384x_RID_CNFTIMCTRL		((uint16_t)0xFC40)
-#define		HFA384x_RID_CNFTHIRTY2TALLY	((uint16_t)0xFC42)
-#define		HFA384x_RID_CNFENHSECURITY	((uint16_t)0xFC43)
-#define		HFA384x_RID_CNFDBMADJUST  	((uint16_t)0xFC46) // NEW
-#define		HFA384x_RID_CNFWPADATA       	((uint16_t)0xFC48) // 1.7.0
-#define		HFA384x_RID_CNFPROPOGATIONDELAY	((uint16_t)0xFC49) // 1.7.6
-#define		HFA384x_RID_CNFSHORTPREAMBLE	((uint16_t)0xFCB0)
-#define		HFA384x_RID_CNFEXCLONGPREAMBLE	((uint16_t)0xFCB1)
-#define		HFA384x_RID_CNFAUTHRSPTIMEOUT	((uint16_t)0xFCB2)
-#define		HFA384x_RID_CNFBASICRATES	((uint16_t)0xFCB3)
-#define		HFA384x_RID_CNFSUPPRATES	((uint16_t)0xFCB4)
-#define		HFA384x_RID_CNFFALLBACKCTRL	((uint16_t)0xFCB5) // NEW
-#define		HFA384x_RID_WEPKEYSTATUS   	((uint16_t)0xFCB6) // NEW
-#define		HFA384x_RID_WEPKEYMAPINDEX 	((uint16_t)0xFCB7) // NEW
-#define		HFA384x_RID_BROADCASTKEYID 	((uint16_t)0xFCB8) // NEW
-#define		HFA384x_RID_ENTSECFLAGEYID 	((uint16_t)0xFCB9) // NEW
-#define		HFA384x_RID_CNFPASSIVESCANCTRL	((uint16_t)0xFCBA) // NEW STA
-#define		HFA384x_RID_CNFWPAHANDLING	((uint16_t)0xFCBB) // 1.7.0
-#define		HFA384x_RID_MDCCONTROL        	((uint16_t)0xFCBC) // 1.7.0/1.4.0
-#define		HFA384x_RID_MDCCOUNTRY        	((uint16_t)0xFCBD) // 1.7.0/1.4.0
-#define		HFA384x_RID_TXPOWERMAX        	((uint16_t)0xFCBE) // 1.7.0/1.4.0
-#define		HFA384x_RID_CNFLFOENBLED      	((uint16_t)0xFCBF) // 1.6.3
-#define         HFA384x_RID_CAPINFO             ((uint16_t)0xFCC0) // 1.7.0/1.3.7
-#define         HFA384x_RID_LISTENINTERVAL      ((uint16_t)0xFCC1) // 1.7.0/1.3.7
-#define         HFA384x_RID_DIVERSITYENABLED    ((uint16_t)0xFCC2) // 1.7.0/1.3.7
-#define         HFA384x_RID_LED_CONTROL         ((uint16_t)0xFCC4) // 1.7.6
-#define         HFA384x_RID_HFO_DELAY           ((uint16_t)0xFCC5) // 1.7.6
-#define         HFA384x_RID_DISSALOWEDBSSID     ((uint16_t)0xFCC6) // 1.8.0
-#define		HFA384x_RID_SCANREQUEST		((uint16_t)0xFCE1)
-#define		HFA384x_RID_JOINREQUEST		((uint16_t)0xFCE2)
-#define		HFA384x_RID_AUTHENTICATESTA	((uint16_t)0xFCE3)
-#define		HFA384x_RID_CHANNELINFOREQUEST	((uint16_t)0xFCE4)
-#define		HFA384x_RID_HOSTSCAN          	((uint16_t)0xFCE5) // NEW STA
-#define		HFA384x_RID_ASSOCIATESTA	((uint16_t)0xFCE6)
-
-#define		HFA384x_RID_CNFWEPDEFAULTKEY_LEN	((uint16_t)6)
-#define		HFA384x_RID_CNFWEP128DEFAULTKEY_LEN	((uint16_t)14)
-#define		HFA384x_RID_CNFPRIOQUSAGE_LEN		((uint16_t)4)
+#define		HFA384x_RID_CNFWEPDEFAULTKEYID	((UINT16)0xFC23)
+#define		HFA384x_RID_CNFWEPDEFAULTKEY0	((UINT16)0xFC24)
+#define		HFA384x_RID_CNFWEPDEFAULTKEY1	((UINT16)0xFC25)
+#define		HFA384x_RID_CNFWEPDEFAULTKEY2	((UINT16)0xFC26)
+#define		HFA384x_RID_CNFWEPDEFAULTKEY3	((UINT16)0xFC27)
+#define		HFA384x_RID_CNFWEPFLAGS		((UINT16)0xFC28)
+#define		HFA384x_RID_CNFWEPKEYMAPTABLE	((UINT16)0xFC29)
+#define		HFA384x_RID_CNFAUTHENTICATION	((UINT16)0xFC2A)
+#define		HFA384x_RID_CNFMAXASSOCSTATIONS	((UINT16)0xFC2B)
+#define		HFA384x_RID_CNFTXCONTROL	((UINT16)0xFC2C)
+#define		HFA384x_RID_CNFROAMINGMODE	((UINT16)0xFC2D)
+#define		HFA384x_RID_CNFHOSTAUTHASSOC	((UINT16)0xFC2E)
+#define		HFA384x_RID_CNFRCVCRCERROR	((UINT16)0xFC30)
+// #define		HFA384x_RID_CNFMMLIFE		((UINT16)0xFC31)
+#define		HFA384x_RID_CNFALTRETRYCNT	((UINT16)0xFC32)
+#define		HFA384x_RID_CNFAPBCNINT		((UINT16)0xFC33)
+#define		HFA384x_RID_CNFAPPCFINFO	((UINT16)0xFC34)
+#define		HFA384x_RID_CNFSTAPCFINFO	((UINT16)0xFC35)
+#define		HFA384x_RID_CNFPRIORITYQUSAGE	((UINT16)0xFC37)
+#define		HFA384x_RID_CNFTIMCTRL		((UINT16)0xFC40)
+#define		HFA384x_RID_CNFTHIRTY2TALLY	((UINT16)0xFC42)
+#define		HFA384x_RID_CNFENHSECURITY	((UINT16)0xFC43)
+#define		HFA384x_RID_CNFDBMADJUST  	((UINT16)0xFC46) // NEW
+#define		HFA384x_RID_CNFWPADATA       	((UINT16)0xFC48) // 1.7.0
+#define		HFA384x_RID_CNFPROPOGATIONDELAY	((UINT16)0xFC49) // 1.7.6
+#define		HFA384x_RID_CNFSHORTPREAMBLE	((UINT16)0xFCB0)
+#define		HFA384x_RID_CNFEXCLONGPREAMBLE	((UINT16)0xFCB1)
+#define		HFA384x_RID_CNFAUTHRSPTIMEOUT	((UINT16)0xFCB2)
+#define		HFA384x_RID_CNFBASICRATES	((UINT16)0xFCB3)
+#define		HFA384x_RID_CNFSUPPRATES	((UINT16)0xFCB4) 
+#define		HFA384x_RID_CNFFALLBACKCTRL	((UINT16)0xFCB5) // NEW 
+#define		HFA384x_RID_WEPKEYSTATUS   	((UINT16)0xFCB6) // NEW
+#define		HFA384x_RID_WEPKEYMAPINDEX 	((UINT16)0xFCB7) // NEW
+#define		HFA384x_RID_BROADCASTKEYID 	((UINT16)0xFCB8) // NEW 
+#define		HFA384x_RID_ENTSECFLAGEYID 	((UINT16)0xFCB9) // NEW
+#define		HFA384x_RID_CNFPASSIVESCANCTRL	((UINT16)0xFCBA) // NEW STA
+#define		HFA384x_RID_CNFWPAHANDLING	((UINT16)0xFCBB) // 1.7.0
+#define		HFA384x_RID_MDCCONTROL        	((UINT16)0xFCBC) // 1.7.0/1.4.0
+#define		HFA384x_RID_MDCCOUNTRY        	((UINT16)0xFCBD) // 1.7.0/1.4.0
+#define		HFA384x_RID_TXPOWERMAX        	((UINT16)0xFCBE) // 1.7.0/1.4.0
+#define		HFA384x_RID_CNFLFOENBLED      	((UINT16)0xFCBF) // 1.6.3
+#define         HFA384x_RID_CAPINFO             ((UINT16)0xFCC0) // 1.7.0/1.3.7
+#define         HFA384x_RID_LISTENINTERVAL      ((UINT16)0xFCC1) // 1.7.0/1.3.7
+#define         HFA384x_RID_DIVERSITYENABLED    ((UINT16)0xFCC2) // 1.7.0/1.3.7
+#define         HFA384x_RID_LED_CONTROL         ((UINT16)0xFCC4) // 1.7.6      
+#define         HFA384x_RID_HFO_DELAY           ((UINT16)0xFCC5) // 1.7.6      
+#define         HFA384x_RID_DISSALOWEDBSSID     ((UINT16)0xFCC6) // 1.8.0
+#define		HFA384x_RID_SCANREQUEST		((UINT16)0xFCE1)
+#define		HFA384x_RID_JOINREQUEST		((UINT16)0xFCE2)
+#define		HFA384x_RID_AUTHENTICATESTA	((UINT16)0xFCE3)
+#define		HFA384x_RID_CHANNELINFOREQUEST	((UINT16)0xFCE4)
+#define		HFA384x_RID_HOSTSCAN          	((UINT16)0xFCE5) // NEW STA
+#define		HFA384x_RID_ASSOCIATESTA	((UINT16)0xFCE6)
+
+#define		HFA384x_RID_CNFWEPDEFAULTKEY_LEN	((UINT16)6)
+#define		HFA384x_RID_CNFWEP128DEFAULTKEY_LEN	((UINT16)14)
+#define		HFA384x_RID_CNFPRIOQUSAGE_LEN		((UINT16)4)
 /*--------------------------------------------------------------------
 PD Record codes
 --------------------------------------------------------------------*/
-#define HFA384x_PDR_PCB_PARTNUM		((uint16_t)0x0001)
-#define HFA384x_PDR_PDAVER		((uint16_t)0x0002)
-#define HFA384x_PDR_NIC_SERIAL		((uint16_t)0x0003)
-#define HFA384x_PDR_MKK_MEASUREMENTS	((uint16_t)0x0004)
-#define HFA384x_PDR_NIC_RAMSIZE		((uint16_t)0x0005)
-#define HFA384x_PDR_MFISUPRANGE		((uint16_t)0x0006)
-#define HFA384x_PDR_CFISUPRANGE		((uint16_t)0x0007)
-#define HFA384x_PDR_NICID		((uint16_t)0x0008)
-//#define HFA384x_PDR_REFDAC_MEASUREMENTS	((uint16_t)0x0010)
-//#define HFA384x_PDR_VGDAC_MEASUREMENTS	((uint16_t)0x0020)
-//#define HFA384x_PDR_LEVEL_COMP_MEASUREMENTS	((uint16_t)0x0030)
-//#define HFA384x_PDR_MODEM_TRIMDAC_MEASUREMENTS	((uint16_t)0x0040)
-//#define HFA384x_PDR_COREGA_HACK		((uint16_t)0x00ff)
-#define HFA384x_PDR_MAC_ADDRESS		((uint16_t)0x0101)
-//#define HFA384x_PDR_MKK_CALLNAME	((uint16_t)0x0102)
-#define HFA384x_PDR_REGDOMAIN		((uint16_t)0x0103)
-#define HFA384x_PDR_ALLOWED_CHANNEL	((uint16_t)0x0104)
-#define HFA384x_PDR_DEFAULT_CHANNEL	((uint16_t)0x0105)
-//#define HFA384x_PDR_PRIVACY_OPTION	((uint16_t)0x0106)
-#define HFA384x_PDR_TEMPTYPE		((uint16_t)0x0107)
-//#define HFA384x_PDR_REFDAC_SETUP	((uint16_t)0x0110)
-//#define HFA384x_PDR_VGDAC_SETUP		((uint16_t)0x0120)
-//#define HFA384x_PDR_LEVEL_COMP_SETUP	((uint16_t)0x0130)
-//#define HFA384x_PDR_TRIMDAC_SETUP	((uint16_t)0x0140)
-#define HFA384x_PDR_IFR_SETTING		((uint16_t)0x0200)
-#define HFA384x_PDR_RFR_SETTING		((uint16_t)0x0201)
-#define HFA384x_PDR_HFA3861_BASELINE	((uint16_t)0x0202)
-#define HFA384x_PDR_HFA3861_SHADOW	((uint16_t)0x0203)
-#define HFA384x_PDR_HFA3861_IFRF	((uint16_t)0x0204)
-#define HFA384x_PDR_HFA3861_CHCALSP	((uint16_t)0x0300)
-#define HFA384x_PDR_HFA3861_CHCALI	((uint16_t)0x0301)
-#define HFA384x_PDR_MAX_TX_POWER  	((uint16_t)0x0302)
-#define HFA384x_PDR_MASTER_CHAN_LIST	((uint16_t)0x0303)
-#define HFA384x_PDR_3842_NIC_CONFIG	((uint16_t)0x0400)
-#define HFA384x_PDR_USB_ID		((uint16_t)0x0401)
-#define HFA384x_PDR_PCI_ID		((uint16_t)0x0402)
-#define HFA384x_PDR_PCI_IFCONF		((uint16_t)0x0403)
-#define HFA384x_PDR_PCI_PMCONF		((uint16_t)0x0404)
-#define HFA384x_PDR_RFENRGY		((uint16_t)0x0406)
-#define HFA384x_PDR_USB_POWER_TYPE      ((uint16_t)0x0407)
-//#define HFA384x_PDR_UNKNOWN408		((uint16_t)0x0408)
-#define HFA384x_PDR_USB_MAX_POWER	((uint16_t)0x0409)
-#define HFA384x_PDR_USB_MANUFACTURER	((uint16_t)0x0410)
-#define HFA384x_PDR_USB_PRODUCT  	((uint16_t)0x0411)
-#define HFA384x_PDR_ANT_DIVERSITY   	((uint16_t)0x0412)
-#define HFA384x_PDR_HFO_DELAY       	((uint16_t)0x0413)
-#define HFA384x_PDR_SCALE_THRESH 	((uint16_t)0x0414)
-
-#define HFA384x_PDR_HFA3861_MANF_TESTSP	((uint16_t)0x0900)
-#define HFA384x_PDR_HFA3861_MANF_TESTI	((uint16_t)0x0901)
-#define HFA384x_PDR_END_OF_PDA		((uint16_t)0x0000)
+#define HFA384x_PDR_PCB_PARTNUM		((UINT16)0x0001)
+#define HFA384x_PDR_PDAVER		((UINT16)0x0002)
+#define HFA384x_PDR_NIC_SERIAL		((UINT16)0x0003)
+#define HFA384x_PDR_MKK_MEASUREMENTS	((UINT16)0x0004)
+#define HFA384x_PDR_NIC_RAMSIZE		((UINT16)0x0005)
+#define HFA384x_PDR_MFISUPRANGE		((UINT16)0x0006)
+#define HFA384x_PDR_CFISUPRANGE		((UINT16)0x0007)
+#define HFA384x_PDR_NICID		((UINT16)0x0008)
+//#define HFA384x_PDR_REFDAC_MEASUREMENTS	((UINT16)0x0010)
+//#define HFA384x_PDR_VGDAC_MEASUREMENTS	((UINT16)0x0020)
+//#define HFA384x_PDR_LEVEL_COMP_MEASUREMENTS	((UINT16)0x0030)
+//#define HFA384x_PDR_MODEM_TRIMDAC_MEASUREMENTS	((UINT16)0x0040)
+//#define HFA384x_PDR_COREGA_HACK		((UINT16)0x00ff)
+#define HFA384x_PDR_MAC_ADDRESS		((UINT16)0x0101)
+//#define HFA384x_PDR_MKK_CALLNAME	((UINT16)0x0102)
+#define HFA384x_PDR_REGDOMAIN		((UINT16)0x0103)
+#define HFA384x_PDR_ALLOWED_CHANNEL	((UINT16)0x0104)
+#define HFA384x_PDR_DEFAULT_CHANNEL	((UINT16)0x0105)
+//#define HFA384x_PDR_PRIVACY_OPTION	((UINT16)0x0106)
+#define HFA384x_PDR_TEMPTYPE		((UINT16)0x0107)
+//#define HFA384x_PDR_REFDAC_SETUP	((UINT16)0x0110)
+//#define HFA384x_PDR_VGDAC_SETUP		((UINT16)0x0120)
+//#define HFA384x_PDR_LEVEL_COMP_SETUP	((UINT16)0x0130)
+//#define HFA384x_PDR_TRIMDAC_SETUP	((UINT16)0x0140)
+#define HFA384x_PDR_IFR_SETTING		((UINT16)0x0200)
+#define HFA384x_PDR_RFR_SETTING		((UINT16)0x0201)
+#define HFA384x_PDR_HFA3861_BASELINE	((UINT16)0x0202)
+#define HFA384x_PDR_HFA3861_SHADOW	((UINT16)0x0203)
+#define HFA384x_PDR_HFA3861_IFRF	((UINT16)0x0204)
+#define HFA384x_PDR_HFA3861_CHCALSP	((UINT16)0x0300)
+#define HFA384x_PDR_HFA3861_CHCALI	((UINT16)0x0301)
+#define HFA384x_PDR_MAX_TX_POWER  	((UINT16)0x0302)
+#define HFA384x_PDR_MASTER_CHAN_LIST	((UINT16)0x0303)
+#define HFA384x_PDR_3842_NIC_CONFIG	((UINT16)0x0400)
+#define HFA384x_PDR_USB_ID		((UINT16)0x0401)
+#define HFA384x_PDR_PCI_ID		((UINT16)0x0402)
+#define HFA384x_PDR_PCI_IFCONF		((UINT16)0x0403)
+#define HFA384x_PDR_PCI_PMCONF		((UINT16)0x0404)
+#define HFA384x_PDR_RFENRGY		((UINT16)0x0406)
+#define HFA384x_PDR_USB_POWER_TYPE      ((UINT16)0x0407)
+//#define HFA384x_PDR_UNKNOWN408		((UINT16)0x0408)
+#define HFA384x_PDR_USB_MAX_POWER	((UINT16)0x0409)
+#define HFA384x_PDR_USB_MANUFACTURER	((UINT16)0x0410)
+#define HFA384x_PDR_USB_PRODUCT  	((UINT16)0x0411)
+#define HFA384x_PDR_ANT_DIVERSITY   	((UINT16)0x0412)
+#define HFA384x_PDR_HFO_DELAY       	((UINT16)0x0413)
+#define HFA384x_PDR_SCALE_THRESH 	((UINT16)0x0414)
+
+#define HFA384x_PDR_HFA3861_MANF_TESTSP	((UINT16)0x0900)
+#define HFA384x_PDR_HFA3861_MANF_TESTI	((UINT16)0x0901)
+#define HFA384x_PDR_END_OF_PDA		((UINT16)0x0000)
 
 
 /*=============================================================*/
@@ -819,96 +819,96 @@
 
 /*--- Register Test/Get/Set Field macros ------------------------*/
 
-#define		HFA384x_CMD_ISBUSY(value)		((uint16_t)(((uint16_t)value) & HFA384x_CMD_BUSY))
-#define		HFA384x_CMD_AINFO_GET(value)		((uint16_t)(((uint16_t)(value) & HFA384x_CMD_AINFO) >> 8))
-#define		HFA384x_CMD_AINFO_SET(value)		((uint16_t)((uint16_t)(value) << 8))
-#define		HFA384x_CMD_MACPORT_GET(value)		((uint16_t)(HFA384x_CMD_AINFO_GET((uint16_t)(value) & HFA384x_CMD_MACPORT)))
-#define		HFA384x_CMD_MACPORT_SET(value)		((uint16_t)HFA384x_CMD_AINFO_SET(value))
-#define		HFA384x_CMD_ISRECL(value)		((uint16_t)(HFA384x_CMD_AINFO_GET((uint16_t)(value) & HFA384x_CMD_RECL)))
-#define		HFA384x_CMD_RECL_SET(value)		((uint16_t)HFA384x_CMD_AINFO_SET(value))
-#define		HFA384x_CMD_QOS_GET(value)		((uint16_t((((uint16_t)(value))&((uint16_t)0x3000)) >> 12))
-#define		HFA384x_CMD_QOS_SET(value)		((uint16_t)((((uint16_t)(value)) << 12) & 0x3000))
-#define		HFA384x_CMD_ISWRITE(value)		((uint16_t)(HFA384x_CMD_AINFO_GET((uint16_t)(value) & HFA384x_CMD_WRITE)))
-#define		HFA384x_CMD_WRITE_SET(value)		((uint16_t)HFA384x_CMD_AINFO_SET((uint16_t)value))
-#define		HFA384x_CMD_PROGMODE_GET(value)		((uint16_t)(HFA384x_CMD_AINFO_GET((uint16_t)(value) & HFA384x_CMD_PROGMODE)))
-#define		HFA384x_CMD_PROGMODE_SET(value)		((uint16_t)HFA384x_CMD_AINFO_SET((uint16_t)value))
-#define		HFA384x_CMD_CMDCODE_GET(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_CMD_CMDCODE))
-#define		HFA384x_CMD_CMDCODE_SET(value)		((uint16_t)(value))
-
-#define		HFA384x_STATUS_RESULT_GET(value)	((uint16_t)((((uint16_t)(value)) & HFA384x_STATUS_RESULT) >> 8))
-#define		HFA384x_STATUS_RESULT_SET(value)	(((uint16_t)(value)) << 8)
-#define		HFA384x_STATUS_CMDCODE_GET(value)	(((uint16_t)(value)) & HFA384x_STATUS_CMDCODE)
-#define		HFA384x_STATUS_CMDCODE_SET(value)	((uint16_t)(value))
-
-#define		HFA384x_OFFSET_ISBUSY(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_OFFSET_BUSY))
-#define		HFA384x_OFFSET_ISERR(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_OFFSET_ERR))
-#define		HFA384x_OFFSET_DATAOFF_GET(value)	((uint16_t)(((uint16_t)(value)) & HFA384x_OFFSET_DATAOFF))
-#define		HFA384x_OFFSET_DATAOFF_SET(value)	((uint16_t)(value))
-
-#define		HFA384x_EVSTAT_ISTICK(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_TICK))
-#define		HFA384x_EVSTAT_ISWTERR(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_WTERR))
-#define		HFA384x_EVSTAT_ISINFDROP(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_INFDROP))
-#define		HFA384x_EVSTAT_ISINFO(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_INFO))
-#define		HFA384x_EVSTAT_ISDTIM(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_DTIM))
-#define		HFA384x_EVSTAT_ISCMD(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_CMD))
-#define		HFA384x_EVSTAT_ISALLOC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_ALLOC))
-#define		HFA384x_EVSTAT_ISTXEXC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_TXEXC))
-#define		HFA384x_EVSTAT_ISTX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_TX))
-#define		HFA384x_EVSTAT_ISRX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVSTAT_RX))
-
-#define		HFA384x_EVSTAT_ISBAP_OP(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INT_BAP_OP))
-
-#define		HFA384x_INTEN_ISTICK(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_TICK))
-#define		HFA384x_INTEN_TICK_SET(value)		((uint16_t)(((uint16_t)(value)) << 15))
-#define		HFA384x_INTEN_ISWTERR(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_WTERR))
-#define		HFA384x_INTEN_WTERR_SET(value)		((uint16_t)(((uint16_t)(value)) << 14))
-#define		HFA384x_INTEN_ISINFDROP(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_INFDROP))
-#define		HFA384x_INTEN_INFDROP_SET(value)	((uint16_t)(((uint16_t)(value)) << 13))
-#define		HFA384x_INTEN_ISINFO(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_INFO))
-#define		HFA384x_INTEN_INFO_SET(value)		((uint16_t)(((uint16_t)(value)) << 7))
-#define		HFA384x_INTEN_ISDTIM(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_DTIM))
-#define		HFA384x_INTEN_DTIM_SET(value)		((uint16_t)(((uint16_t)(value)) << 5))
-#define		HFA384x_INTEN_ISCMD(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_CMD))
-#define		HFA384x_INTEN_CMD_SET(value)		((uint16_t)(((uint16_t)(value)) << 4))
-#define		HFA384x_INTEN_ISALLOC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_ALLOC))
-#define		HFA384x_INTEN_ALLOC_SET(value)		((uint16_t)(((uint16_t)(value)) << 3))
-#define		HFA384x_INTEN_ISTXEXC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_TXEXC))
-#define		HFA384x_INTEN_TXEXC_SET(value)		((uint16_t)(((uint16_t)(value)) << 2))
-#define		HFA384x_INTEN_ISTX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_TX))
-#define		HFA384x_INTEN_TX_SET(value)		((uint16_t)(((uint16_t)(value)) << 1))
-#define		HFA384x_INTEN_ISRX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_INTEN_RX))
-#define		HFA384x_INTEN_RX_SET(value)		((uint16_t)(((uint16_t)(value)) << 0))
-
-#define		HFA384x_EVACK_ISTICK(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_TICK))
-#define		HFA384x_EVACK_TICK_SET(value)		((uint16_t)(((uint16_t)(value)) << 15))
-#define		HFA384x_EVACK_ISWTERR(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_WTERR))
-#define		HFA384x_EVACK_WTERR_SET(value)		((uint16_t)(((uint16_t)(value)) << 14))
-#define		HFA384x_EVACK_ISINFDROP(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_INFDROP))
-#define		HFA384x_EVACK_INFDROP_SET(value)	((uint16_t)(((uint16_t)(value)) << 13))
-#define		HFA384x_EVACK_ISINFO(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_INFO))
-#define		HFA384x_EVACK_INFO_SET(value)		((uint16_t)(((uint16_t)(value)) << 7))
-#define		HFA384x_EVACK_ISDTIM(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_DTIM))
-#define		HFA384x_EVACK_DTIM_SET(value)		((uint16_t)(((uint16_t)(value)) << 5))
-#define		HFA384x_EVACK_ISCMD(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_CMD))
-#define		HFA384x_EVACK_CMD_SET(value)		((uint16_t)(((uint16_t)(value)) << 4))
-#define		HFA384x_EVACK_ISALLOC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_ALLOC))
-#define		HFA384x_EVACK_ALLOC_SET(value)		((uint16_t)(((uint16_t)(value)) << 3))
-#define		HFA384x_EVACK_ISTXEXC(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_TXEXC))
-#define		HFA384x_EVACK_TXEXC_SET(value)		((uint16_t)(((uint16_t)(value)) << 2))
-#define		HFA384x_EVACK_ISTX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_TX))
-#define		HFA384x_EVACK_TX_SET(value)		((uint16_t)(((uint16_t)(value)) << 1))
-#define		HFA384x_EVACK_ISRX(value)		((uint16_t)(((uint16_t)(value)) & HFA384x_EVACK_RX))
-#define		HFA384x_EVACK_RX_SET(value)		((uint16_t)(((uint16_t)(value)) << 0))
+#define		HFA384x_CMD_ISBUSY(value)		((UINT16)(((UINT16)value) & HFA384x_CMD_BUSY))
+#define		HFA384x_CMD_AINFO_GET(value)		((UINT16)(((UINT16)(value) & HFA384x_CMD_AINFO) >> 8))
+#define		HFA384x_CMD_AINFO_SET(value)		((UINT16)((UINT16)(value) << 8))
+#define		HFA384x_CMD_MACPORT_GET(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_MACPORT)))
+#define		HFA384x_CMD_MACPORT_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET(value))
+#define		HFA384x_CMD_ISRECL(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_RECL)))
+#define		HFA384x_CMD_RECL_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET(value))
+#define		HFA384x_CMD_QOS_GET(value)		((UINT16((((UINT16)(value))&((UINT16)0x3000)) >> 12))
+#define		HFA384x_CMD_QOS_SET(value)		((UINT16)((((UINT16)(value)) << 12) & 0x3000))
+#define		HFA384x_CMD_ISWRITE(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_WRITE)))
+#define		HFA384x_CMD_WRITE_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET((UINT16)value))
+#define		HFA384x_CMD_PROGMODE_GET(value)		((UINT16)(HFA384x_CMD_AINFO_GET((UINT16)(value) & HFA384x_CMD_PROGMODE)))
+#define		HFA384x_CMD_PROGMODE_SET(value)		((UINT16)HFA384x_CMD_AINFO_SET((UINT16)value))
+#define		HFA384x_CMD_CMDCODE_GET(value)		((UINT16)(((UINT16)(value)) & HFA384x_CMD_CMDCODE))
+#define		HFA384x_CMD_CMDCODE_SET(value)		((UINT16)(value))
+
+#define		HFA384x_STATUS_RESULT_GET(value)	((UINT16)((((UINT16)(value)) & HFA384x_STATUS_RESULT) >> 8))
+#define		HFA384x_STATUS_RESULT_SET(value)	(((UINT16)(value)) << 8)
+#define		HFA384x_STATUS_CMDCODE_GET(value)	(((UINT16)(value)) & HFA384x_STATUS_CMDCODE)
+#define		HFA384x_STATUS_CMDCODE_SET(value)	((UINT16)(value))
+
+#define		HFA384x_OFFSET_ISBUSY(value)		((UINT16)(((UINT16)(value)) & HFA384x_OFFSET_BUSY))
+#define		HFA384x_OFFSET_ISERR(value)		((UINT16)(((UINT16)(value)) & HFA384x_OFFSET_ERR))
+#define		HFA384x_OFFSET_DATAOFF_GET(value)	((UINT16)(((UINT16)(value)) & HFA384x_OFFSET_DATAOFF))
+#define		HFA384x_OFFSET_DATAOFF_SET(value)	((UINT16)(value))
+
+#define		HFA384x_EVSTAT_ISTICK(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_TICK))
+#define		HFA384x_EVSTAT_ISWTERR(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_WTERR))
+#define		HFA384x_EVSTAT_ISINFDROP(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_INFDROP))
+#define		HFA384x_EVSTAT_ISINFO(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_INFO))
+#define		HFA384x_EVSTAT_ISDTIM(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_DTIM))
+#define		HFA384x_EVSTAT_ISCMD(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_CMD))
+#define		HFA384x_EVSTAT_ISALLOC(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_ALLOC))
+#define		HFA384x_EVSTAT_ISTXEXC(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_TXEXC))
+#define		HFA384x_EVSTAT_ISTX(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_TX))
+#define		HFA384x_EVSTAT_ISRX(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVSTAT_RX))
+
+#define		HFA384x_EVSTAT_ISBAP_OP(value)		((UINT16)(((UINT16)(value)) & HFA384x_INT_BAP_OP))
+
+#define		HFA384x_INTEN_ISTICK(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_TICK))
+#define		HFA384x_INTEN_TICK_SET(value)		((UINT16)(((UINT16)(value)) << 15))
+#define		HFA384x_INTEN_ISWTERR(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_WTERR))
+#define		HFA384x_INTEN_WTERR_SET(value)		((UINT16)(((UINT16)(value)) << 14))
+#define		HFA384x_INTEN_ISINFDROP(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_INFDROP))
+#define		HFA384x_INTEN_INFDROP_SET(value)	((UINT16)(((UINT16)(value)) << 13))
+#define		HFA384x_INTEN_ISINFO(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_INFO))
+#define		HFA384x_INTEN_INFO_SET(value)		((UINT16)(((UINT16)(value)) << 7))
+#define		HFA384x_INTEN_ISDTIM(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_DTIM))
+#define		HFA384x_INTEN_DTIM_SET(value)		((UINT16)(((UINT16)(value)) << 5))
+#define		HFA384x_INTEN_ISCMD(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_CMD))
+#define		HFA384x_INTEN_CMD_SET(value)		((UINT16)(((UINT16)(value)) << 4))
+#define		HFA384x_INTEN_ISALLOC(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_ALLOC))
+#define		HFA384x_INTEN_ALLOC_SET(value)		((UINT16)(((UINT16)(value)) << 3))
+#define		HFA384x_INTEN_ISTXEXC(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_TXEXC))
+#define		HFA384x_INTEN_TXEXC_SET(value)		((UINT16)(((UINT16)(value)) << 2))
+#define		HFA384x_INTEN_ISTX(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_TX))
+#define		HFA384x_INTEN_TX_SET(value)		((UINT16)(((UINT16)(value)) << 1))
+#define		HFA384x_INTEN_ISRX(value)		((UINT16)(((UINT16)(value)) & HFA384x_INTEN_RX))
+#define		HFA384x_INTEN_RX_SET(value)		((UINT16)(((UINT16)(value)) << 0))
+
+#define		HFA384x_EVACK_ISTICK(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_TICK))
+#define		HFA384x_EVACK_TICK_SET(value)		((UINT16)(((UINT16)(value)) << 15))
+#define		HFA384x_EVACK_ISWTERR(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_WTERR))
+#define		HFA384x_EVACK_WTERR_SET(value)		((UINT16)(((UINT16)(value)) << 14))
+#define		HFA384x_EVACK_ISINFDROP(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_INFDROP))
+#define		HFA384x_EVACK_INFDROP_SET(value)	((UINT16)(((UINT16)(value)) << 13))
+#define		HFA384x_EVACK_ISINFO(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_INFO))
+#define		HFA384x_EVACK_INFO_SET(value)		((UINT16)(((UINT16)(value)) << 7))
+#define		HFA384x_EVACK_ISDTIM(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_DTIM))
+#define		HFA384x_EVACK_DTIM_SET(value)		((UINT16)(((UINT16)(value)) << 5))
+#define		HFA384x_EVACK_ISCMD(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_CMD))
+#define		HFA384x_EVACK_CMD_SET(value)		((UINT16)(((UINT16)(value)) << 4))
+#define		HFA384x_EVACK_ISALLOC(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_ALLOC))
+#define		HFA384x_EVACK_ALLOC_SET(value)		((UINT16)(((UINT16)(value)) << 3))
+#define		HFA384x_EVACK_ISTXEXC(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_TXEXC))
+#define		HFA384x_EVACK_TXEXC_SET(value)		((UINT16)(((UINT16)(value)) << 2))
+#define		HFA384x_EVACK_ISTX(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_TX))
+#define		HFA384x_EVACK_TX_SET(value)		((UINT16)(((UINT16)(value)) << 1))
+#define		HFA384x_EVACK_ISRX(value)		((UINT16)(((UINT16)(value)) & HFA384x_EVACK_RX))
+#define		HFA384x_EVACK_RX_SET(value)		((UINT16)(((UINT16)(value)) << 0))
 
-#define		HFA384x_CONTROL_AUXEN_SET(value)	((uint16_t)(((uint16_t)(value)) << 14))
-#define		HFA384x_CONTROL_AUXEN_GET(value)	((uint16_t)(((uint16_t)(value)) >> 14))
+#define		HFA384x_CONTROL_AUXEN_SET(value)	((UINT16)(((UINT16)(value)) << 14))
+#define		HFA384x_CONTROL_AUXEN_GET(value)	((UINT16)(((UINT16)(value)) >> 14))
 
 /* Byte Order */
 #ifdef __KERNEL__
-#define hfa384x2host_16(n)	(__le16_to_cpu((uint16_t)(n)))
-#define hfa384x2host_32(n)	(__le32_to_cpu((uint32_t)(n)))
-#define host2hfa384x_16(n)	(__cpu_to_le16((uint16_t)(n)))
-#define host2hfa384x_32(n)	(__cpu_to_le32((uint32_t)(n)))
+#define hfa384x2host_16(n)	(__le16_to_cpu((UINT16)(n)))
+#define hfa384x2host_32(n)	(__le32_to_cpu((UINT32)(n)))
+#define host2hfa384x_16(n)	(__cpu_to_le16((UINT16)(n)))
+#define host2hfa384x_32(n)	(__cpu_to_le32((UINT32)(n)))
 #endif
 
 /* Host Maintained State Info */
@@ -929,14 +929,14 @@
 /* Commonly used basic types */
 typedef struct hfa384x_bytestr
 {
-	uint16_t	len;
-	uint8_t	data[0];
+	UINT16	len;
+	UINT8	data[0];
 } __WLAN_ATTRIB_PACK__ hfa384x_bytestr_t;
 
 typedef struct hfa384x_bytestr32
 {
-	uint16_t	len;
-	uint8_t	data[32];
+	UINT16	len;
+	UINT8	data[32];
 } __WLAN_ATTRIB_PACK__ hfa384x_bytestr32_t;
 
 /*--------------------------------------------------------------------
@@ -946,114 +946,114 @@
 /* Prototype structure: all configuration record structures start with
 these members */
 
-typedef struct hfa384x_record
+typedef struct hfa384x_record 
 {
-	uint16_t	reclen;
-	uint16_t	rid;
+	UINT16	reclen;
+	UINT16	rid;
 } __WLAN_ATTRIB_PACK__ hfa384x_rec_t;
 
 typedef struct hfa384x_record16
 {
-	uint16_t	reclen;
-	uint16_t	rid;
-	uint16_t	val;
+	UINT16	reclen;
+	UINT16	rid;
+	UINT16	val;
 } __WLAN_ATTRIB_PACK__ hfa384x_rec16_t;
 
 typedef struct hfa384x_record32
 {
-	uint16_t	reclen;
-	uint16_t	rid;
-	uint32_t	val;
+	UINT16	reclen;
+	UINT16	rid;
+	UINT32	val;
 } __WLAN_ATTRIB_PACK__ hfa384x_rec32;
 
 /*-- Hardware/Firmware Component Information ----------*/
 typedef struct hfa384x_compident
 {
-	uint16_t	id;
-	uint16_t	variant;
-	uint16_t	major;
-	uint16_t	minor;
+	UINT16	id;
+	UINT16	variant;
+	UINT16	major;
+	UINT16	minor;
 } __WLAN_ATTRIB_PACK__ hfa384x_compident_t;
 
 typedef struct hfa384x_caplevel
 {
-	uint16_t	role;
-	uint16_t	id;
-	uint16_t	variant;
-	uint16_t	bottom;
-	uint16_t	top;
+	UINT16	role;
+	UINT16	id;
+	UINT16	variant;
+	UINT16	bottom;
+	UINT16	top;
 } __WLAN_ATTRIB_PACK__ hfa384x_caplevel_t;
 
 /*-- Configuration Record: cnfPortType --*/
 typedef struct hfa384x_cnfPortType
 {
-	uint16_t	cnfPortType;
+	UINT16	cnfPortType;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfPortType_t;
 
 /*-- Configuration Record: cnfOwnMACAddress --*/
 typedef struct hfa384x_cnfOwnMACAddress
 {
-	uint8_t	cnfOwnMACAddress[6];
+	UINT8	cnfOwnMACAddress[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnMACAddress_t;
 
 /*-- Configuration Record: cnfDesiredSSID --*/
 typedef struct hfa384x_cnfDesiredSSID
 {
-	uint8_t	cnfDesiredSSID[34];
+	UINT8	cnfDesiredSSID[34];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfDesiredSSID_t;
 
 /*-- Configuration Record: cnfOwnChannel --*/
 typedef struct hfa384x_cnfOwnChannel
 {
-	uint16_t	cnfOwnChannel;
+	UINT16	cnfOwnChannel;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnChannel_t;
 
 /*-- Configuration Record: cnfOwnSSID --*/
 typedef struct hfa384x_cnfOwnSSID
 {
-	uint8_t	cnfOwnSSID[34];
+	UINT8	cnfOwnSSID[34];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnSSID_t;
 
 /*-- Configuration Record: cnfOwnATIMWindow --*/
 typedef struct hfa384x_cnfOwnATIMWindow
 {
-	uint16_t	cnfOwnATIMWindow;
+	UINT16	cnfOwnATIMWindow;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnATIMWindow_t;
 
 /*-- Configuration Record: cnfSystemScale --*/
 typedef struct hfa384x_cnfSystemScale
 {
-	uint16_t	cnfSystemScale;
+	UINT16	cnfSystemScale;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfSystemScale_t;
 
 /*-- Configuration Record: cnfMaxDataLength --*/
 typedef struct hfa384x_cnfMaxDataLength
 {
-	uint16_t	cnfMaxDataLength;
+	UINT16	cnfMaxDataLength;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfMaxDataLength_t;
 
 /*-- Configuration Record: cnfWDSAddress --*/
 typedef struct hfa384x_cnfWDSAddress
 {
-	uint8_t	cnfWDSAddress[6];
+	UINT8	cnfWDSAddress[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfWDSAddress_t;
 
 /*-- Configuration Record: cnfPMEnabled --*/
 typedef struct hfa384x_cnfPMEnabled
 {
-	uint16_t	cnfPMEnabled;
+	UINT16	cnfPMEnabled;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfPMEnabled_t;
 
 /*-- Configuration Record: cnfPMEPS --*/
 typedef struct hfa384x_cnfPMEPS
 {
-	uint16_t	cnfPMEPS;
+	UINT16	cnfPMEPS;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfPMEPS_t;
 
 /*-- Configuration Record: cnfMulticastReceive --*/
 typedef struct hfa384x_cnfMulticastReceive
 {
-	uint16_t	cnfMulticastReceive;
+	UINT16	cnfMulticastReceive;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfMulticastReceive_t;
 
 /*-- Configuration Record: cnfAuthentication --*/
@@ -1064,37 +1064,37 @@
 /*-- Configuration Record: cnfMaxSleepDuration --*/
 typedef struct hfa384x_cnfMaxSleepDuration
 {
-	uint16_t	cnfMaxSleepDuration;
+	UINT16	cnfMaxSleepDuration;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfMaxSleepDuration_t;
 
 /*-- Configuration Record: cnfPMHoldoverDuration --*/
 typedef struct hfa384x_cnfPMHoldoverDuration
 {
-	uint16_t	cnfPMHoldoverDuration;
+	UINT16	cnfPMHoldoverDuration;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfPMHoldoverDuration_t;
 
 /*-- Configuration Record: cnfOwnName --*/
 typedef struct hfa384x_cnfOwnName
 {
-	uint8_t	cnfOwnName[34];
+	UINT8	cnfOwnName[34];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnName_t;
 
 /*-- Configuration Record: cnfOwnDTIMPeriod --*/
 typedef struct hfa384x_cnfOwnDTIMPeriod
 {
-	uint16_t	cnfOwnDTIMPeriod;
+	UINT16	cnfOwnDTIMPeriod;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfOwnDTIMPeriod_t;
 
 /*-- Configuration Record: cnfWDSAddress --*/
 typedef struct hfa384x_cnfWDSAddressN
 {
-	uint8_t	cnfWDSAddress[6];
+	UINT8	cnfWDSAddress[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfWDSAddressN_t;
 
 /*-- Configuration Record: cnfMulticastPMBuffering --*/
 typedef struct hfa384x_cnfMulticastPMBuffering
 {
-	uint16_t	cnfMulticastPMBuffering;
+	UINT16	cnfMulticastPMBuffering;
 } __WLAN_ATTRIB_PACK__ hfa384x_cnfMulticastPMBuffering_t;
 
 /*--------------------------------------------------------------------
@@ -1105,13 +1105,13 @@
 /*-- Configuration Record: GroupAddresses --*/
 typedef struct hfa384x_GroupAddresses
 {
-	uint8_t	MACAddress[16][6];
+	UINT8	MACAddress[16][6];
 } __WLAN_ATTRIB_PACK__ hfa384x_GroupAddresses_t;
 
 /*-- Configuration Record: CreateIBSS --*/
 typedef struct hfa384x_CreateIBSS
 {
-	uint16_t	CreateIBSS;
+	UINT16	CreateIBSS;
 } __WLAN_ATTRIB_PACK__ hfa384x_CreateIBSS_t;
 
 #define HFA384x_CREATEIBSS_JOINCREATEIBSS          0
@@ -1122,87 +1122,87 @@
 /*-- Configuration Record: FragmentationThreshold --*/
 typedef struct hfa384x_FragmentationThreshold
 {
-	uint16_t	FragmentationThreshold;
+	UINT16	FragmentationThreshold;
 } __WLAN_ATTRIB_PACK__ hfa384x_FragmentationThreshold_t;
 
 /*-- Configuration Record: RTSThreshold --*/
 typedef struct hfa384x_RTSThreshold
 {
-	uint16_t	RTSThreshold;
+	UINT16	RTSThreshold;
 } __WLAN_ATTRIB_PACK__ hfa384x_RTSThreshold_t;
 
 /*-- Configuration Record: TxRateControl --*/
 typedef struct hfa384x_TxRateControl
 {
-	uint16_t	TxRateControl;
+	UINT16	TxRateControl;
 } __WLAN_ATTRIB_PACK__ hfa384x_TxRateControl_t;
 
 /*-- Configuration Record: PromiscuousMode --*/
 typedef struct hfa384x_PromiscuousMode
 {
-	uint16_t	PromiscuousMode;
+	UINT16	PromiscuousMode;
 } __WLAN_ATTRIB_PACK__ hfa384x_PromiscuousMode_t;
 
 /*-- Configuration Record: ScanRequest (data portion only) --*/
 typedef struct hfa384x_ScanRequest_data
 {
-	uint16_t	channelList;
-	uint16_t	txRate;
+	UINT16	channelList;
+	UINT16	txRate;
 } __WLAN_ATTRIB_PACK__ hfa384x_ScanRequest_data_t;
 
 /*-- Configuration Record: HostScanRequest (data portion only) --*/
 typedef struct hfa384x_HostScanRequest_data
 {
-	uint16_t	channelList;
-	uint16_t	txRate;
+	UINT16	channelList;
+	UINT16	txRate;
 	hfa384x_bytestr32_t ssid;
 } __WLAN_ATTRIB_PACK__ hfa384x_HostScanRequest_data_t;
 
 /*-- Configuration Record: JoinRequest (data portion only) --*/
 typedef struct hfa384x_JoinRequest_data
 {
-	uint8_t	bssid[WLAN_BSSID_LEN];
-	uint16_t	channel;
+	UINT8	bssid[WLAN_BSSID_LEN];
+	UINT16	channel;
 } __WLAN_ATTRIB_PACK__ hfa384x_JoinRequest_data_t;
 
 /*-- Configuration Record: authenticateStation (data portion only) --*/
 typedef struct hfa384x_authenticateStation_data
 {
-	uint8_t	address[WLAN_ADDR_LEN];
-	uint16_t	status;
-	uint16_t	algorithm;
+	UINT8	address[WLAN_ADDR_LEN];
+	UINT16	status;
+	UINT16	algorithm;
 } __WLAN_ATTRIB_PACK__ hfa384x_authenticateStation_data_t;
 
 /*-- Configuration Record: associateStation (data portion only) --*/
 typedef struct hfa384x_associateStation_data
 {
-	uint8_t	address[WLAN_ADDR_LEN];
-	uint16_t	status;
-	uint16_t	type;
+	UINT8	address[WLAN_ADDR_LEN];
+	UINT16	status;
+	UINT16	type;
 } __WLAN_ATTRIB_PACK__ hfa384x_associateStation_data_t;
 
 /*-- Configuration Record: ChannelInfoRequest (data portion only) --*/
 typedef struct hfa384x_ChannelInfoRequest_data
 {
-	uint16_t	channelList;
-	uint16_t	channelDwellTime;
+	UINT16	channelList;
+	UINT16	channelDwellTime;
 } __WLAN_ATTRIB_PACK__ hfa384x_ChannelInfoRequest_data_t;
 
 /*-- Configuration Record: WEPKeyMapping (data portion only) --*/
 typedef struct hfa384x_WEPKeyMapping
 {
-	uint8_t	address[WLAN_ADDR_LEN];
-	uint16_t	key_index;
-	uint8_t 	key[16];
-	uint8_t 	mic_transmit_key[4];
-	uint8_t 	mic_receive_key[4];
+	UINT8	address[WLAN_ADDR_LEN];
+	UINT16	key_index;
+	UINT8 	key[16];
+	UINT8 	mic_transmit_key[4];
+	UINT8 	mic_receive_key[4];
 } __WLAN_ATTRIB_PACK__ hfa384x_WEPKeyMapping_t;
 
 /*-- Configuration Record: WPAData       (data portion only) --*/
 typedef struct hfa384x_WPAData
 {
-	uint16_t	datalen;
-        uint8_t 	data[0]; // max 80
+	UINT16	datalen;
+        UINT8 	data[0]; // max 80
 } __WLAN_ATTRIB_PACK__ hfa384x_WPAData_t;
 
 /*--------------------------------------------------------------------
@@ -1212,7 +1212,7 @@
 /*-- Configuration Record: TickTime --*/
 typedef struct hfa384x_TickTime
 {
-	uint16_t	TickTime;
+	UINT16	TickTime;
 } __WLAN_ATTRIB_PACK__ hfa384x_TickTime_t;
 
 /*--------------------------------------------------------------------
@@ -1222,146 +1222,146 @@
 /*-- Information Record: MaxLoadTime --*/
 typedef struct hfa384x_MaxLoadTime
 {
-	uint16_t	MaxLoadTime;
+	UINT16	MaxLoadTime;
 } __WLAN_ATTRIB_PACK__ hfa384x_MaxLoadTime_t;
 
 /*-- Information Record: DownLoadBuffer --*/
 /* NOTE: The page and offset are in AUX format */
 typedef struct hfa384x_downloadbuffer
 {
-	uint16_t	page;
-	uint16_t	offset;
-	uint16_t	len;
+	UINT16	page;
+	UINT16	offset;
+	UINT16	len;
 } __WLAN_ATTRIB_PACK__ hfa384x_downloadbuffer_t;
 
 /*-- Information Record: PRIIdentity --*/
 typedef struct hfa384x_PRIIdentity
 {
-	uint16_t	PRICompID;
-	uint16_t	PRIVariant;
-	uint16_t	PRIMajorVersion;
-	uint16_t	PRIMinorVersion;
+	UINT16	PRICompID;
+	UINT16	PRIVariant;
+	UINT16	PRIMajorVersion;
+	UINT16	PRIMinorVersion;
 } __WLAN_ATTRIB_PACK__ hfa384x_PRIIdentity_t;
 
 /*-- Information Record: PRISupRange --*/
 typedef struct hfa384x_PRISupRange
 {
-	uint16_t	PRIRole;
-	uint16_t	PRIID;
-	uint16_t	PRIVariant;
-	uint16_t	PRIBottom;
-	uint16_t	PRITop;
+	UINT16	PRIRole;
+	UINT16	PRIID;
+	UINT16	PRIVariant;
+	UINT16	PRIBottom;
+	UINT16	PRITop;
 } __WLAN_ATTRIB_PACK__ hfa384x_PRISupRange_t;
 
 /*-- Information Record: CFIActRanges --*/
 typedef struct hfa384x_CFIActRanges
 {
-	uint16_t	CFIRole;
-	uint16_t	CFIID;
-	uint16_t	CFIVariant;
-	uint16_t	CFIBottom;
-	uint16_t	CFITop;
+	UINT16	CFIRole;
+	UINT16	CFIID;
+	UINT16	CFIVariant;
+	UINT16	CFIBottom;
+	UINT16	CFITop;
 } __WLAN_ATTRIB_PACK__ hfa384x_CFIActRanges_t;
 
 /*-- Information Record: NICSerialNumber --*/
 typedef struct hfa384x_NICSerialNumber
 {
-	uint8_t	NICSerialNumber[12];
+	UINT8	NICSerialNumber[12];
 } __WLAN_ATTRIB_PACK__ hfa384x_NICSerialNumber_t;
 
 /*-- Information Record: NICIdentity --*/
 typedef struct hfa384x_NICIdentity
 {
-	uint16_t	NICCompID;
-	uint16_t	NICVariant;
-	uint16_t	NICMajorVersion;
-	uint16_t	NICMinorVersion;
+	UINT16	NICCompID;
+	UINT16	NICVariant;
+	UINT16	NICMajorVersion;
+	UINT16	NICMinorVersion;
 } __WLAN_ATTRIB_PACK__ hfa384x_NICIdentity_t;
 
 /*-- Information Record: MFISupRange --*/
 typedef struct hfa384x_MFISupRange
 {
-	uint16_t	MFIRole;
-	uint16_t	MFIID;
-	uint16_t	MFIVariant;
-	uint16_t	MFIBottom;
-	uint16_t	MFITop;
+	UINT16	MFIRole;
+	UINT16	MFIID;
+	UINT16	MFIVariant;
+	UINT16	MFIBottom;
+	UINT16	MFITop;
 } __WLAN_ATTRIB_PACK__ hfa384x_MFISupRange_t;
 
 /*-- Information Record: CFISupRange --*/
 typedef struct hfa384x_CFISupRange
 {
-	uint16_t	CFIRole;
-	uint16_t	CFIID;
-	uint16_t	CFIVariant;
-	uint16_t	CFIBottom;
-	uint16_t	CFITop;
+	UINT16	CFIRole;
+	UINT16	CFIID;
+	UINT16	CFIVariant;
+	UINT16	CFIBottom;
+	UINT16	CFITop;
 } __WLAN_ATTRIB_PACK__ hfa384x_CFISupRange_t;
 
 /*-- Information Record: BUILDSEQ:BuildSeq --*/
 typedef struct hfa384x_BuildSeq {
-	uint16_t	primary;
-	uint16_t	secondary;
+	UINT16	primary;
+	UINT16	secondary;
 } __WLAN_ATTRIB_PACK__ hfa384x_BuildSeq_t;
 
 /*-- Information Record: FWID --*/
 #define HFA384x_FWID_LEN	14
 typedef struct hfa384x_FWID {
-	uint8_t	primary[HFA384x_FWID_LEN];
-	uint8_t	secondary[HFA384x_FWID_LEN];
+	UINT8	primary[HFA384x_FWID_LEN];
+	UINT8	secondary[HFA384x_FWID_LEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_FWID_t;
 
 /*-- Information Record: ChannelList --*/
 typedef struct hfa384x_ChannelList
 {
-	uint16_t	ChannelList;
+	UINT16	ChannelList;
 } __WLAN_ATTRIB_PACK__ hfa384x_ChannelList_t;
 
 /*-- Information Record: RegulatoryDomains --*/
 typedef struct hfa384x_RegulatoryDomains
 {
-	uint8_t	RegulatoryDomains[12];
+	UINT8	RegulatoryDomains[12];
 } __WLAN_ATTRIB_PACK__ hfa384x_RegulatoryDomains_t;
 
 /*-- Information Record: TempType --*/
 typedef struct hfa384x_TempType
 {
-	uint16_t	TempType;
+	UINT16	TempType;
 } __WLAN_ATTRIB_PACK__ hfa384x_TempType_t;
 
 /*-- Information Record: CIS --*/
 typedef struct hfa384x_CIS
 {
-	uint8_t	CIS[480];
+	UINT8	CIS[480];
 } __WLAN_ATTRIB_PACK__ hfa384x_CIS_t;
 
 /*-- Information Record: STAIdentity --*/
 typedef struct hfa384x_STAIdentity
 {
-	uint16_t	STACompID;
-	uint16_t	STAVariant;
-	uint16_t	STAMajorVersion;
-	uint16_t	STAMinorVersion;
+	UINT16	STACompID;
+	UINT16	STAVariant;
+	UINT16	STAMajorVersion;
+	UINT16	STAMinorVersion;
 } __WLAN_ATTRIB_PACK__ hfa384x_STAIdentity_t;
 
 /*-- Information Record: STASupRange --*/
 typedef struct hfa384x_STASupRange
 {
-	uint16_t	STARole;
-	uint16_t	STAID;
-	uint16_t	STAVariant;
-	uint16_t	STABottom;
-	uint16_t	STATop;
+	UINT16	STARole;
+	UINT16	STAID;
+	UINT16	STAVariant;
+	UINT16	STABottom;
+	UINT16	STATop;
 } __WLAN_ATTRIB_PACK__ hfa384x_STASupRange_t;
 
 /*-- Information Record: MFIActRanges --*/
 typedef struct hfa384x_MFIActRanges
 {
-	uint16_t	MFIRole;
-	uint16_t	MFIID;
-	uint16_t	MFIVariant;
-	uint16_t	MFIBottom;
-	uint16_t	MFITop;
+	UINT16	MFIRole;
+	UINT16	MFIID;
+	UINT16	MFIVariant;
+	UINT16	MFIBottom;
+	UINT16	MFITop;
 } __WLAN_ATTRIB_PACK__ hfa384x_MFIActRanges_t;
 
 /*--------------------------------------------------------------------
@@ -1371,187 +1371,187 @@
 /*-- Information Record: PortStatus --*/
 typedef struct hfa384x_PortStatus
 {
-	uint16_t	PortStatus;
+	UINT16	PortStatus;
 } __WLAN_ATTRIB_PACK__ hfa384x_PortStatus_t;
 
-#define HFA384x_PSTATUS_DISABLED	((uint16_t)1)
-#define HFA384x_PSTATUS_SEARCHING	((uint16_t)2)
-#define HFA384x_PSTATUS_CONN_IBSS	((uint16_t)3)
-#define HFA384x_PSTATUS_CONN_ESS	((uint16_t)4)
-#define HFA384x_PSTATUS_OUTOFRANGE	((uint16_t)5)
-#define HFA384x_PSTATUS_CONN_WDS	((uint16_t)6)
+#define HFA384x_PSTATUS_DISABLED	((UINT16)1)
+#define HFA384x_PSTATUS_SEARCHING	((UINT16)2)
+#define HFA384x_PSTATUS_CONN_IBSS	((UINT16)3)
+#define HFA384x_PSTATUS_CONN_ESS	((UINT16)4)
+#define HFA384x_PSTATUS_OUTOFRANGE	((UINT16)5)
+#define HFA384x_PSTATUS_CONN_WDS	((UINT16)6)
 
 /*-- Information Record: CurrentSSID --*/
 typedef struct hfa384x_CurrentSSID
 {
-	uint8_t	CurrentSSID[34];
+	UINT8	CurrentSSID[34];
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentSSID_t;
 
 /*-- Information Record: CurrentBSSID --*/
 typedef struct hfa384x_CurrentBSSID
 {
-	uint8_t	CurrentBSSID[6];
+	UINT8	CurrentBSSID[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentBSSID_t;
 
 /*-- Information Record: commsquality --*/
 typedef struct hfa384x_commsquality
 {
-	uint16_t	CQ_currBSS;
-	uint16_t	ASL_currBSS;
-	uint16_t	ANL_currFC;
+	UINT16	CQ_currBSS;
+	UINT16	ASL_currBSS;
+	UINT16	ANL_currFC;
 } __WLAN_ATTRIB_PACK__ hfa384x_commsquality_t;
 
 /*-- Information Record: dmbcommsquality --*/
 typedef struct hfa384x_dbmcommsquality
 {
-	uint16_t	CQdbm_currBSS;
-	uint16_t	ASLdbm_currBSS;
-	uint16_t	ANLdbm_currFC;
+	UINT16	CQdbm_currBSS;
+	UINT16	ASLdbm_currBSS;
+	UINT16	ANLdbm_currFC;
 } __WLAN_ATTRIB_PACK__ hfa384x_dbmcommsquality_t;
 
 /*-- Information Record: CurrentTxRate --*/
 typedef struct hfa384x_CurrentTxRate
 {
-	uint16_t	CurrentTxRate;
+	UINT16	CurrentTxRate;
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentTxRate_t;
 
 /*-- Information Record: CurrentBeaconInterval --*/
 typedef struct hfa384x_CurrentBeaconInterval
 {
-	uint16_t	CurrentBeaconInterval;
+	UINT16	CurrentBeaconInterval;
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentBeaconInterval_t;
 
 /*-- Information Record: CurrentScaleThresholds --*/
 typedef struct hfa384x_CurrentScaleThresholds
 {
-	uint16_t	EnergyDetectThreshold;
-	uint16_t	CarrierDetectThreshold;
-	uint16_t	DeferDetectThreshold;
-	uint16_t	CellSearchThreshold; /* Stations only */
-	uint16_t	DeadSpotThreshold; /* Stations only */
+	UINT16	EnergyDetectThreshold;
+	UINT16	CarrierDetectThreshold;
+	UINT16	DeferDetectThreshold;
+	UINT16	CellSearchThreshold; /* Stations only */
+	UINT16	DeadSpotThreshold; /* Stations only */
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentScaleThresholds_t;
 
 /*-- Information Record: ProtocolRspTime --*/
 typedef struct hfa384x_ProtocolRspTime
 {
-	uint16_t	ProtocolRspTime;
+	UINT16	ProtocolRspTime;
 } __WLAN_ATTRIB_PACK__ hfa384x_ProtocolRspTime_t;
 
 /*-- Information Record: ShortRetryLimit --*/
 typedef struct hfa384x_ShortRetryLimit
 {
-	uint16_t	ShortRetryLimit;
+	UINT16	ShortRetryLimit;
 } __WLAN_ATTRIB_PACK__ hfa384x_ShortRetryLimit_t;
 
 /*-- Information Record: LongRetryLimit --*/
 typedef struct hfa384x_LongRetryLimit
 {
-	uint16_t	LongRetryLimit;
+	UINT16	LongRetryLimit;
 } __WLAN_ATTRIB_PACK__ hfa384x_LongRetryLimit_t;
 
 /*-- Information Record: MaxTransmitLifetime --*/
 typedef struct hfa384x_MaxTransmitLifetime
 {
-	uint16_t	MaxTransmitLifetime;
+	UINT16	MaxTransmitLifetime;
 } __WLAN_ATTRIB_PACK__ hfa384x_MaxTransmitLifetime_t;
 
 /*-- Information Record: MaxReceiveLifetime --*/
 typedef struct hfa384x_MaxReceiveLifetime
 {
-	uint16_t	MaxReceiveLifetime;
+	UINT16	MaxReceiveLifetime;
 } __WLAN_ATTRIB_PACK__ hfa384x_MaxReceiveLifetime_t;
 
 /*-- Information Record: CFPollable --*/
 typedef struct hfa384x_CFPollable
 {
-	uint16_t	CFPollable;
+	UINT16	CFPollable;
 } __WLAN_ATTRIB_PACK__ hfa384x_CFPollable_t;
 
 /*-- Information Record: AuthenticationAlgorithms --*/
 typedef struct hfa384x_AuthenticationAlgorithms
 {
-	uint16_t	AuthenticationType;
-	uint16_t	TypeEnabled;
+	UINT16	AuthenticationType;
+	UINT16	TypeEnabled;
 } __WLAN_ATTRIB_PACK__ hfa384x_AuthenticationAlgorithms_t;
 
 /*-- Information Record: AuthenticationAlgorithms
 (data only --*/
 typedef struct hfa384x_AuthenticationAlgorithms_data
 {
-	uint16_t	AuthenticationType;
-	uint16_t	TypeEnabled;
+	UINT16	AuthenticationType;
+	UINT16	TypeEnabled;
 } __WLAN_ATTRIB_PACK__ hfa384x_AuthenticationAlgorithms_data_t;
 
 /*-- Information Record: PrivacyOptionImplemented --*/
 typedef struct hfa384x_PrivacyOptionImplemented
 {
-	uint16_t	PrivacyOptionImplemented;
+	UINT16	PrivacyOptionImplemented;
 } __WLAN_ATTRIB_PACK__ hfa384x_PrivacyOptionImplemented_t;
 
 /*-- Information Record: OwnMACAddress --*/
 typedef struct hfa384x_OwnMACAddress
 {
-	uint8_t	OwnMACAddress[6];
+	UINT8	OwnMACAddress[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_OwnMACAddress_t;
 
 /*-- Information Record: PCFInfo --*/
 typedef struct hfa384x_PCFInfo
 {
-	uint16_t	MediumOccupancyLimit;
-	uint16_t	CFPPeriod;
-	uint16_t	CFPMaxDuration;
-	uint16_t	CFPFlags;
+	UINT16	MediumOccupancyLimit;
+	UINT16	CFPPeriod;
+	UINT16	CFPMaxDuration;
+	UINT16	CFPFlags;
 } __WLAN_ATTRIB_PACK__ hfa384x_PCFInfo_t;
 
 /*-- Information Record: PCFInfo (data portion only) --*/
 typedef struct hfa384x_PCFInfo_data
 {
-	uint16_t	MediumOccupancyLimit;
-	uint16_t	CFPPeriod;
-	uint16_t	CFPMaxDuration;
-	uint16_t	CFPFlags;
+	UINT16	MediumOccupancyLimit;
+	UINT16	CFPPeriod;
+	UINT16	CFPMaxDuration;
+	UINT16	CFPFlags;
 } __WLAN_ATTRIB_PACK__ hfa384x_PCFInfo_data_t;
 
 /*--------------------------------------------------------------------
-Information Record Structures: Modem Information Records
+Information Record Structures: Modem Information Records 
 --------------------------------------------------------------------*/
 
 /*-- Information Record: PHYType --*/
 typedef struct hfa384x_PHYType
 {
-	uint16_t	PHYType;
+	UINT16	PHYType;
 } __WLAN_ATTRIB_PACK__ hfa384x_PHYType_t;
 
 /*-- Information Record: CurrentChannel --*/
 typedef struct hfa384x_CurrentChannel
 {
-	uint16_t	CurrentChannel;
+	UINT16	CurrentChannel;
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentChannel_t;
 
 /*-- Information Record: CurrentPowerState --*/
 typedef struct hfa384x_CurrentPowerState
 {
-	uint16_t	CurrentPowerState;
+	UINT16	CurrentPowerState;
 } __WLAN_ATTRIB_PACK__ hfa384x_CurrentPowerState_t;
 
 /*-- Information Record: CCAMode --*/
 typedef struct hfa384x_CCAMode
 {
-	uint16_t	CCAMode;
+	UINT16	CCAMode;
 } __WLAN_ATTRIB_PACK__ hfa384x_CCAMode_t;
 
 /*-- Information Record: SupportedDataRates --*/
 typedef struct hfa384x_SupportedDataRates
 {
-	uint8_t	SupportedDataRates[10];
+	UINT8	SupportedDataRates[10];
 } __WLAN_ATTRIB_PACK__ hfa384x_SupportedDataRates_t;
 
 /*-- Information Record: LFOStatus --*/
-typedef struct hfa384x_LFOStatus
+typedef struct hfa384x_LFOStatus          
 {
-	uint16_t  TestResults;
-	uint16_t  LFOResult;
-	uint16_t  VRHFOResult;
+	UINT16  TestResults;
+	UINT16  LFOResult;
+	UINT16  VRHFOResult;
 } __WLAN_ATTRIB_PACK__ hfa384x_LFOStatus_t;
 
 #define HFA384x_TESTRESULT_ALLPASSED    BIT0
@@ -1563,11 +1563,11 @@
 /*-- Information Record: LEDControl --*/
 typedef struct hfa384x_LEDControl
 {
-	uint16_t  searching_on;
-	uint16_t  searching_off;
-	uint16_t  assoc_on;
-	uint16_t  assoc_off;
-	uint16_t  activity;
+	UINT16  searching_on;
+	UINT16  searching_off;
+	UINT16  assoc_on;
+	UINT16  assoc_off;
+	UINT16  activity;
 } __WLAN_ATTRIB_PACK__ hfa384x_LEDControl_t;
 
 /*--------------------------------------------------------------------
@@ -1578,32 +1578,32 @@
 ----------------------------------------------------------------------
 Control Info (offset 44-51)
 --------------------------------------------------------------------*/
-#define		HFA384x_FD_STATUS_OFF			((uint16_t)0x44)
-#define		HFA384x_FD_TIME_OFF			((uint16_t)0x46)
-#define		HFA384x_FD_SWSUPPORT_OFF		((uint16_t)0x4A)
-#define		HFA384x_FD_SILENCE_OFF			((uint16_t)0x4A)
-#define		HFA384x_FD_SIGNAL_OFF			((uint16_t)0x4B)
-#define		HFA384x_FD_RATE_OFF			((uint16_t)0x4C)
-#define		HFA384x_FD_RXFLOW_OFF			((uint16_t)0x4D)
-#define		HFA384x_FD_RESERVED_OFF			((uint16_t)0x4E)
-#define		HFA384x_FD_TXCONTROL_OFF		((uint16_t)0x50)
+#define		HFA384x_FD_STATUS_OFF			((UINT16)0x44)
+#define		HFA384x_FD_TIME_OFF			((UINT16)0x46)
+#define		HFA384x_FD_SWSUPPORT_OFF		((UINT16)0x4A)
+#define		HFA384x_FD_SILENCE_OFF			((UINT16)0x4A)
+#define		HFA384x_FD_SIGNAL_OFF			((UINT16)0x4B)
+#define		HFA384x_FD_RATE_OFF			((UINT16)0x4C)
+#define		HFA384x_FD_RXFLOW_OFF			((UINT16)0x4D)
+#define		HFA384x_FD_RESERVED_OFF			((UINT16)0x4E)
+#define		HFA384x_FD_TXCONTROL_OFF		((UINT16)0x50)
 /*--------------------------------------------------------------------
 802.11 Header (offset 52-6B)
 --------------------------------------------------------------------*/
-#define		HFA384x_FD_FRAMECONTROL_OFF		((uint16_t)0x52)
-#define		HFA384x_FD_DURATIONID_OFF		((uint16_t)0x54)
-#define		HFA384x_FD_ADDRESS1_OFF			((uint16_t)0x56)
-#define		HFA384x_FD_ADDRESS2_OFF			((uint16_t)0x5C)
-#define		HFA384x_FD_ADDRESS3_OFF			((uint16_t)0x62)
-#define		HFA384x_FD_SEQCONTROL_OFF		((uint16_t)0x68)
-#define		HFA384x_FD_ADDRESS4_OFF			((uint16_t)0x6A)
-#define		HFA384x_FD_DATALEN_OFF			((uint16_t)0x70)
+#define		HFA384x_FD_FRAMECONTROL_OFF		((UINT16)0x52)
+#define		HFA384x_FD_DURATIONID_OFF		((UINT16)0x54)
+#define		HFA384x_FD_ADDRESS1_OFF			((UINT16)0x56)
+#define		HFA384x_FD_ADDRESS2_OFF			((UINT16)0x5C)
+#define		HFA384x_FD_ADDRESS3_OFF			((UINT16)0x62)
+#define		HFA384x_FD_SEQCONTROL_OFF		((UINT16)0x68)
+#define		HFA384x_FD_ADDRESS4_OFF			((UINT16)0x6A)
+#define		HFA384x_FD_DATALEN_OFF			((UINT16)0x70) 
 /*--------------------------------------------------------------------
 802.3 Header (offset 72-7F)
 --------------------------------------------------------------------*/
-#define		HFA384x_FD_DESTADDRESS_OFF		((uint16_t)0x72)
-#define		HFA384x_FD_SRCADDRESS_OFF		((uint16_t)0x78)
-#define		HFA384x_FD_DATALENGTH_OFF		((uint16_t)0x7E)
+#define		HFA384x_FD_DESTADDRESS_OFF		((UINT16)0x72)
+#define		HFA384x_FD_SRCADDRESS_OFF		((UINT16)0x78)
+#define		HFA384x_FD_DATALENGTH_OFF		((UINT16)0x7E)
 
 /*--------------------------------------------------------------------
 FRAME STRUCTURES: Communication Frames
@@ -1613,67 +1613,67 @@
 /*-- Communication Frame: Transmit Frame Structure --*/
 typedef struct hfa384x_tx_frame
 {
-	uint16_t	status;
-	uint16_t	reserved1;
-	uint16_t	reserved2;
-	uint32_t	sw_support;
-	uint8_t	tx_retrycount;
-	uint8_t   tx_rate;
-	uint16_t	tx_control;
+	UINT16	status;
+	UINT16	reserved1;
+	UINT16	reserved2;
+	UINT32	sw_support;
+	UINT8	tx_retrycount;
+	UINT8   tx_rate;
+	UINT16	tx_control;
 
 	/*-- 802.11 Header Information --*/
 
-	uint16_t	frame_control;
-	uint16_t	duration_id;
-	uint8_t	address1[6];
-	uint8_t	address2[6];
-	uint8_t	address3[6];
-	uint16_t	sequence_control;
-	uint8_t	address4[6];
-	uint16_t	data_len; /* little endian format */
+	UINT16	frame_control;
+	UINT16	duration_id;
+	UINT8	address1[6];
+	UINT8	address2[6];
+	UINT8	address3[6];
+	UINT16	sequence_control;
+	UINT8	address4[6];
+	UINT16	data_len; /* little endian format */
 
 	/*-- 802.3 Header Information --*/
 
-	uint8_t	dest_addr[6];
-	uint8_t	src_addr[6];
-	uint16_t	data_length; /* big endian format */
+	UINT8	dest_addr[6];
+	UINT8	src_addr[6];
+	UINT16	data_length; /* big endian format */
 } __WLAN_ATTRIB_PACK__ hfa384x_tx_frame_t;
 /*--------------------------------------------------------------------
 Communication Frames: Field Masks for Transmit Frames
 --------------------------------------------------------------------*/
 /*-- Status Field --*/
-#define		HFA384x_TXSTATUS_ACKERR			((uint16_t)BIT5)
-#define		HFA384x_TXSTATUS_FORMERR		((uint16_t)BIT3)
-#define		HFA384x_TXSTATUS_DISCON			((uint16_t)BIT2)
-#define		HFA384x_TXSTATUS_AGEDERR		((uint16_t)BIT1)
-#define		HFA384x_TXSTATUS_RETRYERR		((uint16_t)BIT0)
+#define		HFA384x_TXSTATUS_ACKERR			((UINT16)BIT5)
+#define		HFA384x_TXSTATUS_FORMERR		((UINT16)BIT3)
+#define		HFA384x_TXSTATUS_DISCON			((UINT16)BIT2)
+#define		HFA384x_TXSTATUS_AGEDERR		((UINT16)BIT1)
+#define		HFA384x_TXSTATUS_RETRYERR		((UINT16)BIT0)
 /*-- Transmit Control Field --*/
-#define		HFA384x_TX_CFPOLL			((uint16_t)BIT12)
-#define		HFA384x_TX_PRST				((uint16_t)BIT11)
-#define		HFA384x_TX_MACPORT			((uint16_t)(BIT10 | BIT9 | BIT8))
-#define		HFA384x_TX_NOENCRYPT			((uint16_t)BIT7)
-#define		HFA384x_TX_RETRYSTRAT			((uint16_t)(BIT6 | BIT5))
-#define		HFA384x_TX_STRUCTYPE			((uint16_t)(BIT4 | BIT3))
-#define		HFA384x_TX_TXEX				((uint16_t)BIT2)
-#define		HFA384x_TX_TXOK				((uint16_t)BIT1)
+#define		HFA384x_TX_CFPOLL			((UINT16)BIT12)
+#define		HFA384x_TX_PRST				((UINT16)BIT11)
+#define		HFA384x_TX_MACPORT			((UINT16)(BIT10 | BIT9 | BIT8))
+#define		HFA384x_TX_NOENCRYPT			((UINT16)BIT7)
+#define		HFA384x_TX_RETRYSTRAT			((UINT16)(BIT6 | BIT5))
+#define		HFA384x_TX_STRUCTYPE			((UINT16)(BIT4 | BIT3))
+#define		HFA384x_TX_TXEX				((UINT16)BIT2)
+#define		HFA384x_TX_TXOK				((UINT16)BIT1)
 /*--------------------------------------------------------------------
 Communication Frames: Test/Get/Set Field Values for Transmit Frames
 --------------------------------------------------------------------*/
 /*-- Status Field --*/
 #define HFA384x_TXSTATUS_ISERROR(v)	\
-	(((uint16_t)(v))&\
+	(((UINT16)(v))&\
 	(HFA384x_TXSTATUS_ACKERR|HFA384x_TXSTATUS_FORMERR|\
 	HFA384x_TXSTATUS_DISCON|HFA384x_TXSTATUS_AGEDERR|\
 	HFA384x_TXSTATUS_RETRYERR))
 
-#define	HFA384x_TXSTATUS_ISACKERR(v)	((uint16_t)(((uint16_t)(v)) & HFA384x_TXSTATUS_ACKERR))
-#define	HFA384x_TXSTATUS_ISFORMERR(v)	((uint16_t)(((uint16_t)(v)) & HFA384x_TXSTATUS_FORMERR))
-#define	HFA384x_TXSTATUS_ISDISCON(v)	((uint16_t)(((uint16_t)(v)) & HFA384x_TXSTATUS_DISCON))
-#define	HFA384x_TXSTATUS_ISAGEDERR(v)	((uint16_t)(((uint16_t)(v)) & HFA384x_TXSTATUS_AGEDERR))
-#define	HFA384x_TXSTATUS_ISRETRYERR(v)	((uint16_t)(((uint16_t)(v)) & HFA384x_TXSTATUS_RETRYERR))
+#define	HFA384x_TXSTATUS_ISACKERR(v)	((UINT16)(((UINT16)(v)) & HFA384x_TXSTATUS_ACKERR))
+#define	HFA384x_TXSTATUS_ISFORMERR(v)	((UINT16)(((UINT16)(v)) & HFA384x_TXSTATUS_FORMERR))
+#define	HFA384x_TXSTATUS_ISDISCON(v)	((UINT16)(((UINT16)(v)) & HFA384x_TXSTATUS_DISCON))
+#define	HFA384x_TXSTATUS_ISAGEDERR(v)	((UINT16)(((UINT16)(v)) & HFA384x_TXSTATUS_AGEDERR))
+#define	HFA384x_TXSTATUS_ISRETRYERR(v)	((UINT16)(((UINT16)(v)) & HFA384x_TXSTATUS_RETRYERR))
 
-#define	HFA384x_TX_GET(v,m,s)		((((uint16_t)(v))&((uint16_t)(m)))>>((uint16_t)(s)))
-#define	HFA384x_TX_SET(v,m,s)		((((uint16_t)(v))<<((uint16_t)(s)))&((uint16_t)(m)))
+#define	HFA384x_TX_GET(v,m,s)		((((UINT16)(v))&((UINT16)(m)))>>((UINT16)(s)))
+#define	HFA384x_TX_SET(v,m,s)		((((UINT16)(v))<<((UINT16)(s)))&((UINT16)(m)))
 
 #define	HFA384x_TX_CFPOLL_GET(v)	HFA384x_TX_GET(v, HFA384x_TX_CFPOLL,12)
 #define	HFA384x_TX_CFPOLL_SET(v)	HFA384x_TX_SET(v, HFA384x_TX_CFPOLL,12)
@@ -1698,70 +1698,70 @@
 typedef struct hfa384x_rx_frame
 {
 	/*-- MAC rx descriptor (hfa384x byte order) --*/
-	uint16_t	status;
-	uint32_t	time;
-	uint8_t	silence;
-	uint8_t	signal;
-	uint8_t	rate;
-	uint8_t	rx_flow;
-	uint16_t	reserved1;
-	uint16_t	reserved2;
+	UINT16	status;
+	UINT32	time;
+	UINT8	silence;
+	UINT8	signal;
+	UINT8	rate;
+	UINT8	rx_flow;
+	UINT16	reserved1;
+	UINT16	reserved2;
 
 	/*-- 802.11 Header Information (802.11 byte order) --*/
-	uint16_t	frame_control;
-	uint16_t	duration_id;
-	uint8_t	address1[6];
-	uint8_t	address2[6];
-	uint8_t	address3[6];
-	uint16_t	sequence_control;
-	uint8_t	address4[6];
-	uint16_t	data_len; /* hfa384x (little endian) format */
+	UINT16	frame_control;
+	UINT16	duration_id;
+	UINT8	address1[6];
+	UINT8	address2[6];
+	UINT8	address3[6];
+	UINT16	sequence_control;
+	UINT8	address4[6];
+	UINT16	data_len; /* hfa384x (little endian) format */
 
 	/*-- 802.3 Header Information --*/
-	uint8_t	dest_addr[6];
-	uint8_t	src_addr[6];
-	uint16_t	data_length; /* IEEE? (big endian) format */
+	UINT8	dest_addr[6];
+	UINT8	src_addr[6];
+	UINT16	data_length; /* IEEE? (big endian) format */
 } __WLAN_ATTRIB_PACK__ hfa384x_rx_frame_t;
 /*--------------------------------------------------------------------
 Communication Frames: Field Masks for Receive Frames
 --------------------------------------------------------------------*/
 /*-- Offsets --------*/
-#define		HFA384x_RX_DATA_LEN_OFF			((uint16_t)44)
-#define		HFA384x_RX_80211HDR_OFF			((uint16_t)14)
-#define		HFA384x_RX_DATA_OFF			((uint16_t)60)
+#define		HFA384x_RX_DATA_LEN_OFF			((UINT16)44)
+#define		HFA384x_RX_80211HDR_OFF			((UINT16)14)
+#define		HFA384x_RX_DATA_OFF			((UINT16)60)
 
 /*-- Status Fields --*/
-#define		HFA384x_RXSTATUS_MSGTYPE		((uint16_t)(BIT15 | BIT14 | BIT13))
-#define		HFA384x_RXSTATUS_MACPORT		((uint16_t)(BIT10 | BIT9 | BIT8))
-#define		HFA384x_RXSTATUS_UNDECR			((uint16_t)BIT1)
-#define		HFA384x_RXSTATUS_FCSERR			((uint16_t)BIT0)
+#define		HFA384x_RXSTATUS_MSGTYPE		((UINT16)(BIT15 | BIT14 | BIT13))
+#define		HFA384x_RXSTATUS_MACPORT		((UINT16)(BIT10 | BIT9 | BIT8))
+#define		HFA384x_RXSTATUS_UNDECR			((UINT16)BIT1)
+#define		HFA384x_RXSTATUS_FCSERR			((UINT16)BIT0)
 /*--------------------------------------------------------------------
 Communication Frames: Test/Get/Set Field Values for Receive Frames
 --------------------------------------------------------------------*/
-#define		HFA384x_RXSTATUS_MSGTYPE_GET(value)	((uint16_t)((((uint16_t)(value)) & HFA384x_RXSTATUS_MSGTYPE) >> 13))
-#define		HFA384x_RXSTATUS_MSGTYPE_SET(value)	((uint16_t)(((uint16_t)(value)) << 13))
-#define		HFA384x_RXSTATUS_MACPORT_GET(value)	((uint16_t)((((uint16_t)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8))
-#define		HFA384x_RXSTATUS_MACPORT_SET(value)	((uint16_t)(((uint16_t)(value)) << 8))
-#define		HFA384x_RXSTATUS_ISUNDECR(value)	((uint16_t)(((uint16_t)(value)) & HFA384x_RXSTATUS_UNDECR))
-#define		HFA384x_RXSTATUS_ISFCSERR(value)	((uint16_t)(((uint16_t)(value)) & HFA384x_RXSTATUS_FCSERR))
+#define		HFA384x_RXSTATUS_MSGTYPE_GET(value)	((UINT16)((((UINT16)(value)) & HFA384x_RXSTATUS_MSGTYPE) >> 13))
+#define		HFA384x_RXSTATUS_MSGTYPE_SET(value)	((UINT16)(((UINT16)(value)) << 13))
+#define		HFA384x_RXSTATUS_MACPORT_GET(value)	((UINT16)((((UINT16)(value)) & HFA384x_RXSTATUS_MACPORT) >> 8))
+#define		HFA384x_RXSTATUS_MACPORT_SET(value)	((UINT16)(((UINT16)(value)) << 8))
+#define		HFA384x_RXSTATUS_ISUNDECR(value)	((UINT16)(((UINT16)(value)) & HFA384x_RXSTATUS_UNDECR))
+#define		HFA384x_RXSTATUS_ISFCSERR(value)	((UINT16)(((UINT16)(value)) & HFA384x_RXSTATUS_FCSERR))
 /*--------------------------------------------------------------------
  FRAME STRUCTURES: Information Types and Information Frame Structures
 ----------------------------------------------------------------------
 Information Types
 --------------------------------------------------------------------*/
-#define		HFA384x_IT_HANDOVERADDR			((uint16_t)0xF000UL)
-#define		HFA384x_IT_HANDOVERDEAUTHADDRESS	((uint16_t)0xF001UL)//AP 1.3.7
-#define		HFA384x_IT_COMMTALLIES			((uint16_t)0xF100UL)
-#define		HFA384x_IT_SCANRESULTS			((uint16_t)0xF101UL)
-#define		HFA384x_IT_CHINFORESULTS		((uint16_t)0xF102UL)
-#define		HFA384x_IT_HOSTSCANRESULTS		((uint16_t)0xF103UL)
-#define		HFA384x_IT_LINKSTATUS			((uint16_t)0xF200UL)
-#define		HFA384x_IT_ASSOCSTATUS			((uint16_t)0xF201UL)
-#define		HFA384x_IT_AUTHREQ			((uint16_t)0xF202UL)
-#define		HFA384x_IT_PSUSERCNT			((uint16_t)0xF203UL)
-#define		HFA384x_IT_KEYIDCHANGED			((uint16_t)0xF204UL)
-#define		HFA384x_IT_ASSOCREQ    			((uint16_t)0xF205UL)
-#define		HFA384x_IT_MICFAILURE  			((uint16_t)0xF206UL)
+#define		HFA384x_IT_HANDOVERADDR			((UINT16)0xF000UL)
+#define		HFA384x_IT_HANDOVERDEAUTHADDRESS	((UINT16)0xF001UL)//AP 1.3.7
+#define		HFA384x_IT_COMMTALLIES			((UINT16)0xF100UL)
+#define		HFA384x_IT_SCANRESULTS			((UINT16)0xF101UL)
+#define		HFA384x_IT_CHINFORESULTS		((UINT16)0xF102UL)
+#define		HFA384x_IT_HOSTSCANRESULTS		((UINT16)0xF103UL)
+#define		HFA384x_IT_LINKSTATUS			((UINT16)0xF200UL)
+#define		HFA384x_IT_ASSOCSTATUS			((UINT16)0xF201UL)
+#define		HFA384x_IT_AUTHREQ			((UINT16)0xF202UL)
+#define		HFA384x_IT_PSUSERCNT			((UINT16)0xF203UL)
+#define		HFA384x_IT_KEYIDCHANGED			((UINT16)0xF204UL)
+#define		HFA384x_IT_ASSOCREQ    			((UINT16)0xF205UL)
+#define		HFA384x_IT_MICFAILURE  			((UINT16)0xF206UL)
 
 /*--------------------------------------------------------------------
 Information Frames Structures
@@ -1771,80 +1771,80 @@
 /*--  Notification Frame,MAC Mgmt: Handover Address --*/
 typedef struct hfa384x_HandoverAddr
 {
-	uint16_t	framelen;
-	uint16_t	infotype;
-	uint8_t	handover_addr[WLAN_BSSID_LEN];
+	UINT16	framelen;
+	UINT16	infotype;
+	UINT8	handover_addr[WLAN_BSSID_LEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_HandoverAddr_t;
 
 /*--  Inquiry Frame, Diagnose: Communication Tallies --*/
 typedef struct hfa384x_CommTallies16
 {
-	uint16_t	txunicastframes;
-	uint16_t	txmulticastframes;
-	uint16_t	txfragments;
-	uint16_t	txunicastoctets;
-	uint16_t	txmulticastoctets;
-	uint16_t	txdeferredtrans;
-	uint16_t	txsingleretryframes;
-	uint16_t	txmultipleretryframes;
-	uint16_t	txretrylimitexceeded;
-	uint16_t	txdiscards;
-	uint16_t	rxunicastframes;
-	uint16_t	rxmulticastframes;
-	uint16_t	rxfragments;
-	uint16_t	rxunicastoctets;
-	uint16_t	rxmulticastoctets;
-	uint16_t	rxfcserrors;
-	uint16_t	rxdiscardsnobuffer;
-	uint16_t	txdiscardswrongsa;
-	uint16_t	rxdiscardswepundecr;
-	uint16_t	rxmsginmsgfrag;
-	uint16_t	rxmsginbadmsgfrag;
+	UINT16	txunicastframes;
+	UINT16	txmulticastframes;
+	UINT16	txfragments;
+	UINT16	txunicastoctets;
+	UINT16	txmulticastoctets;
+	UINT16	txdeferredtrans;
+	UINT16	txsingleretryframes;
+	UINT16	txmultipleretryframes;
+	UINT16	txretrylimitexceeded;
+	UINT16	txdiscards;
+	UINT16	rxunicastframes;
+	UINT16	rxmulticastframes;
+	UINT16	rxfragments;
+	UINT16	rxunicastoctets;
+	UINT16	rxmulticastoctets;
+	UINT16	rxfcserrors;
+	UINT16	rxdiscardsnobuffer;
+	UINT16	txdiscardswrongsa;
+	UINT16	rxdiscardswepundecr;
+	UINT16	rxmsginmsgfrag;
+	UINT16	rxmsginbadmsgfrag;
 } __WLAN_ATTRIB_PACK__ hfa384x_CommTallies16_t;
 
 typedef struct hfa384x_CommTallies32
 {
-	uint32_t	txunicastframes;
-	uint32_t	txmulticastframes;
-	uint32_t	txfragments;
-	uint32_t	txunicastoctets;
-	uint32_t	txmulticastoctets;
-	uint32_t	txdeferredtrans;
-	uint32_t	txsingleretryframes;
-	uint32_t	txmultipleretryframes;
-	uint32_t	txretrylimitexceeded;
-	uint32_t	txdiscards;
-	uint32_t	rxunicastframes;
-	uint32_t	rxmulticastframes;
-	uint32_t	rxfragments;
-	uint32_t	rxunicastoctets;
-	uint32_t	rxmulticastoctets;
-	uint32_t	rxfcserrors;
-	uint32_t	rxdiscardsnobuffer;
-	uint32_t	txdiscardswrongsa;
-	uint32_t	rxdiscardswepundecr;
-	uint32_t	rxmsginmsgfrag;
-	uint32_t	rxmsginbadmsgfrag;
+	UINT32	txunicastframes;
+	UINT32	txmulticastframes;
+	UINT32	txfragments;
+	UINT32	txunicastoctets;
+	UINT32	txmulticastoctets;
+	UINT32	txdeferredtrans;
+	UINT32	txsingleretryframes;
+	UINT32	txmultipleretryframes;
+	UINT32	txretrylimitexceeded;
+	UINT32	txdiscards;
+	UINT32	rxunicastframes;
+	UINT32	rxmulticastframes;
+	UINT32	rxfragments;
+	UINT32	rxunicastoctets;
+	UINT32	rxmulticastoctets;
+	UINT32	rxfcserrors;
+	UINT32	rxdiscardsnobuffer;
+	UINT32	txdiscardswrongsa;
+	UINT32	rxdiscardswepundecr;
+	UINT32	rxmsginmsgfrag;
+	UINT32	rxmsginbadmsgfrag;
 } __WLAN_ATTRIB_PACK__ hfa384x_CommTallies32_t;
 
 /*--  Inquiry Frame, Diagnose: Scan Results & Subfields--*/
 typedef struct hfa384x_ScanResultSub
 {
-	uint16_t	chid;
-	uint16_t	anl;
-	uint16_t	sl;
-	uint8_t	bssid[WLAN_BSSID_LEN];
-	uint16_t	bcnint;
-	uint16_t	capinfo;
+	UINT16	chid;
+	UINT16	anl;
+	UINT16	sl;
+	UINT8	bssid[WLAN_BSSID_LEN];
+	UINT16	bcnint;
+	UINT16	capinfo;
 	hfa384x_bytestr32_t	ssid;
-	uint8_t	supprates[10]; /* 802.11 info element */
-	uint16_t	proberesp_rate;
+	UINT8	supprates[10]; /* 802.11 info element */
+	UINT16	proberesp_rate;
 } __WLAN_ATTRIB_PACK__ hfa384x_ScanResultSub_t;
 
 typedef struct hfa384x_ScanResult
 {
-	uint16_t	rsvd;
-	uint16_t	scanreason;
+	UINT16	rsvd;
+	UINT16	scanreason;
 	hfa384x_ScanResultSub_t
 		result[HFA384x_SCANRESULT_MAX];
 } __WLAN_ATTRIB_PACK__ hfa384x_ScanResult_t;
@@ -1852,10 +1852,10 @@
 /*--  Inquiry Frame, Diagnose: ChInfo Results & Subfields--*/
 typedef struct hfa384x_ChInfoResultSub
 {
-	uint16_t	chid;
-	uint16_t	anl;
-	uint16_t	pnl;
-	uint16_t	active;
+	UINT16	chid;
+	UINT16	anl;
+	UINT16	pnl;
+	UINT16	active;
 } __WLAN_ATTRIB_PACK__ hfa384x_ChInfoResultSub_t;
 
 #define HFA384x_CHINFORESULT_BSSACTIVE	BIT0
@@ -1863,83 +1863,83 @@
 
 typedef struct hfa384x_ChInfoResult
 {
-	uint16_t	scanchannels;
-	hfa384x_ChInfoResultSub_t
+	UINT16	scanchannels;
+	hfa384x_ChInfoResultSub_t	
 		result[HFA384x_CHINFORESULT_MAX];
 } __WLAN_ATTRIB_PACK__ hfa384x_ChInfoResult_t;
 
 /*--  Inquiry Frame, Diagnose: Host Scan Results & Subfields--*/
 typedef struct hfa384x_HScanResultSub
 {
-	uint16_t	chid;
-	uint16_t	anl;
-	uint16_t	sl;
-	uint8_t	bssid[WLAN_BSSID_LEN];
-	uint16_t	bcnint;
-	uint16_t	capinfo;
+	UINT16	chid;
+	UINT16	anl;
+	UINT16	sl;
+	UINT8	bssid[WLAN_BSSID_LEN];
+	UINT16	bcnint;
+	UINT16	capinfo;
 	hfa384x_bytestr32_t	ssid;
-	uint8_t	supprates[10]; /* 802.11 info element */
-	uint16_t	proberesp_rate;
-	uint16_t	atim;
+	UINT8	supprates[10]; /* 802.11 info element */
+	UINT16	proberesp_rate;
+	UINT16	atim;
 } __WLAN_ATTRIB_PACK__ hfa384x_HScanResultSub_t;
 
 typedef struct hfa384x_HScanResult
 {
-	uint16_t	nresult;
-	uint16_t	rsvd;
+	UINT16	nresult;
+	UINT16	rsvd;
 	hfa384x_HScanResultSub_t
 		result[HFA384x_HSCANRESULT_MAX];
 } __WLAN_ATTRIB_PACK__ hfa384x_HScanResult_t;
 
 /*--  Unsolicited Frame, MAC Mgmt: LinkStatus --*/
 
-#define HFA384x_LINK_NOTCONNECTED	((uint16_t)0)
-#define HFA384x_LINK_CONNECTED		((uint16_t)1)
-#define HFA384x_LINK_DISCONNECTED	((uint16_t)2)
-#define HFA384x_LINK_AP_CHANGE		((uint16_t)3)
-#define HFA384x_LINK_AP_OUTOFRANGE	((uint16_t)4)
-#define HFA384x_LINK_AP_INRANGE		((uint16_t)5)
-#define HFA384x_LINK_ASSOCFAIL		((uint16_t)6)
+#define HFA384x_LINK_NOTCONNECTED	((UINT16)0)
+#define HFA384x_LINK_CONNECTED		((UINT16)1)
+#define HFA384x_LINK_DISCONNECTED	((UINT16)2)
+#define HFA384x_LINK_AP_CHANGE		((UINT16)3)
+#define HFA384x_LINK_AP_OUTOFRANGE	((UINT16)4)
+#define HFA384x_LINK_AP_INRANGE		((UINT16)5)
+#define HFA384x_LINK_ASSOCFAIL		((UINT16)6)
 
 typedef struct hfa384x_LinkStatus
 {
-	uint16_t	linkstatus;
+	UINT16	linkstatus;
 } __WLAN_ATTRIB_PACK__ hfa384x_LinkStatus_t;
 
 
 /*--  Unsolicited Frame, MAC Mgmt: AssociationStatus (--*/
 
-#define HFA384x_ASSOCSTATUS_STAASSOC	((uint16_t)1)
-#define HFA384x_ASSOCSTATUS_REASSOC	((uint16_t)2)
-#define HFA384x_ASSOCSTATUS_DISASSOC	((uint16_t)3)
-#define HFA384x_ASSOCSTATUS_ASSOCFAIL	((uint16_t)4)
-#define HFA384x_ASSOCSTATUS_AUTHFAIL	((uint16_t)5)
+#define HFA384x_ASSOCSTATUS_STAASSOC	((UINT16)1)
+#define HFA384x_ASSOCSTATUS_REASSOC	((UINT16)2)
+#define HFA384x_ASSOCSTATUS_DISASSOC	((UINT16)3)
+#define HFA384x_ASSOCSTATUS_ASSOCFAIL	((UINT16)4)
+#define HFA384x_ASSOCSTATUS_AUTHFAIL	((UINT16)5)
 
 typedef struct hfa384x_AssocStatus
 {
-	uint16_t	assocstatus;
-	uint8_t	sta_addr[WLAN_ADDR_LEN];
+	UINT16	assocstatus;
+	UINT8	sta_addr[WLAN_ADDR_LEN];
 	/* old_ap_addr is only valid if assocstatus == 2 */
-	uint8_t	old_ap_addr[WLAN_ADDR_LEN];
-	uint16_t	reason;
-	uint16_t	reserved;
+	UINT8	old_ap_addr[WLAN_ADDR_LEN];
+	UINT16	reason;
+	UINT16	reserved;
 } __WLAN_ATTRIB_PACK__ hfa384x_AssocStatus_t;
 
 /*--  Unsolicited Frame, MAC Mgmt: AuthRequest (AP Only) --*/
 
 typedef struct hfa384x_AuthRequest
 {
-	uint8_t	sta_addr[WLAN_ADDR_LEN];
-	uint16_t	algorithm;
+	UINT8	sta_addr[WLAN_ADDR_LEN];
+	UINT16	algorithm;
 } __WLAN_ATTRIB_PACK__ hfa384x_AuthReq_t;
 
 /*--  Unsolicited Frame, MAC Mgmt: AssocRequest (AP Only) --*/
 
 typedef struct hfa384x_AssocRequest
 {
-	uint8_t	sta_addr[WLAN_ADDR_LEN];
-	uint16_t	type;
-	uint8_t   wpa_data[80];
+	UINT8	sta_addr[WLAN_ADDR_LEN];
+	UINT16	type;
+	UINT8   wpa_data[80];
 } __WLAN_ATTRIB_PACK__ hfa384x_AssocReq_t;
 
 
@@ -1948,23 +1948,23 @@
 
 /*--  Unsolicited Frame, MAC Mgmt: MIC Failure  (AP Only) --*/
 
-typedef struct hfa384x_MicFailure
+typedef struct hfa384x_MicFailure  
 {
-	uint8_t	sender[WLAN_ADDR_LEN];
-	uint8_t	dest[WLAN_ADDR_LEN];
+	UINT8	sender[WLAN_ADDR_LEN];
+	UINT8	dest[WLAN_ADDR_LEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_MicFailure_t;
 
 /*--  Unsolicited Frame, MAC Mgmt: PSUserCount (AP Only) --*/
 
 typedef struct hfa384x_PSUserCount
 {
-	uint16_t	usercnt;
+	UINT16	usercnt;
 } __WLAN_ATTRIB_PACK__ hfa384x_PSUserCount_t;
 
 typedef struct hfa384x_KeyIDChanged
 {
-	uint8_t	sta_addr[WLAN_ADDR_LEN];
-	uint16_t	keyid;
+	UINT8	sta_addr[WLAN_ADDR_LEN];
+	UINT16	keyid;
 } __WLAN_ATTRIB_PACK__ hfa384x_KeyIDChanged_t;
 
 /*--  Collection of all Inf frames ---------------*/
@@ -1983,8 +1983,8 @@
 
 typedef struct hfa384x_InfFrame
 {
-	uint16_t			framelen;
-	uint16_t			infotype;
+	UINT16			framelen;
+	UINT16			infotype;
 	hfa384x_infodata_t	info;
 } __WLAN_ATTRIB_PACK__ hfa384x_InfFrame_t;
 
@@ -2022,46 +2022,46 @@
 
 typedef struct hfa384x_usb_txfrm {
 	hfa384x_tx_frame_t	desc;
-	uint8_t			data[WLAN_DATA_MAXLEN];
+	UINT8			data[WLAN_DATA_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_txfrm_t;
 
 typedef struct hfa384x_usb_cmdreq {
-	uint16_t		type;
-	uint16_t		cmd;
-	uint16_t		parm0;
-	uint16_t		parm1;
-	uint16_t		parm2;
-	uint8_t		pad[54];
+	UINT16		type;
+	UINT16		cmd;
+	UINT16		parm0;
+	UINT16		parm1;
+	UINT16		parm2;
+	UINT8		pad[54];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_cmdreq_t;
 
 typedef struct hfa384x_usb_wridreq {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint16_t		rid;
-	uint8_t		data[HFA384x_RIDDATA_MAXLEN];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT16		rid;
+	UINT8		data[HFA384x_RIDDATA_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_wridreq_t;
 
 typedef struct hfa384x_usb_rridreq {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint16_t		rid;
-	uint8_t		pad[58];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT16		rid;
+	UINT8		pad[58];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_rridreq_t;
 
 typedef struct hfa384x_usb_wmemreq {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint16_t		offset;
-	uint16_t		page;
-	uint8_t		data[HFA384x_USB_RWMEM_MAXLEN];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT16		offset;
+	UINT16		page;
+	UINT8		data[HFA384x_USB_RWMEM_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_wmemreq_t;
 
 typedef struct hfa384x_usb_rmemreq {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint16_t		offset;
-	uint16_t		page;
-	uint8_t		pad[56];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT16		offset;
+	UINT16		page;
+	UINT8		pad[56];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_rmemreq_t;
 
 /*------------------------------------*/
@@ -2069,54 +2069,54 @@
 
 typedef struct hfa384x_usb_rxfrm {
 	hfa384x_rx_frame_t	desc;
-	uint8_t			data[WLAN_DATA_MAXLEN];
+	UINT8			data[WLAN_DATA_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_rxfrm_t;
 
 typedef struct hfa384x_usb_infofrm {
-	uint16_t			type;
+	UINT16			type;
 	hfa384x_InfFrame_t	info;
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_infofrm_t;
 
 typedef struct hfa384x_usb_statusresp {
-	uint16_t		type;
-	uint16_t		status;
-	uint16_t		resp0;
-	uint16_t		resp1;
-	uint16_t		resp2;
+	UINT16		type;
+	UINT16		status;
+	UINT16		resp0;
+	UINT16		resp1;
+	UINT16		resp2;
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_cmdresp_t;
 
 typedef hfa384x_usb_cmdresp_t hfa384x_usb_wridresp_t;
 
 typedef struct hfa384x_usb_rridresp {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint16_t		rid;
-	uint8_t		data[HFA384x_RIDDATA_MAXLEN];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT16		rid;
+	UINT8		data[HFA384x_RIDDATA_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_rridresp_t;
 
 typedef hfa384x_usb_cmdresp_t hfa384x_usb_wmemresp_t;
 
 typedef struct hfa384x_usb_rmemresp {
-	uint16_t		type;
-	uint16_t		frmlen;
-	uint8_t		data[HFA384x_USB_RWMEM_MAXLEN];
+	UINT16		type;
+	UINT16		frmlen;
+	UINT8		data[HFA384x_USB_RWMEM_MAXLEN];
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_rmemresp_t;
 
 typedef struct hfa384x_usb_bufavail {
-	uint16_t		type;
-	uint16_t		frmlen;
+	UINT16		type;
+	UINT16		frmlen;
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_bufavail_t;
 
 typedef struct hfa384x_usb_error {
-	uint16_t		type;
-	uint16_t		errortype;
+	UINT16		type;
+	UINT16		errortype;
 } __WLAN_ATTRIB_PACK__ hfa384x_usb_error_t;
 
 /*----------------------------------------------------------*/
 /* Unions for packaging all the known packet types together */
 
 typedef union hfa384x_usbout {
-	uint16_t			type;
+	UINT16			type;
 	hfa384x_usb_txfrm_t	txfrm;
 	hfa384x_usb_cmdreq_t	cmdreq;
 	hfa384x_usb_wridreq_t	wridreq;
@@ -2126,7 +2126,7 @@
 } __WLAN_ATTRIB_PACK__ hfa384x_usbout_t;
 
 typedef union hfa384x_usbin {
-	uint16_t			type;
+	UINT16			type;
 	hfa384x_usb_rxfrm_t	rxfrm;
 	hfa384x_usb_txfrm_t	txfrm;
 	hfa384x_usb_infofrm_t	infofrm;
@@ -2137,7 +2137,7 @@
 	hfa384x_usb_rmemresp_t	rmemresp;
 	hfa384x_usb_bufavail_t	bufavail;
 	hfa384x_usb_error_t	usberror;
-	uint8_t			boguspad[3000];
+	UINT8			boguspad[3000];
 } __WLAN_ATTRIB_PACK__ hfa384x_usbin_t;
 
 #endif /* WLAN_USB */
@@ -2148,17 +2148,17 @@
 
 typedef struct hfa384x_pdr_pcb_partnum
 {
-	uint8_t	num[8];
+	UINT8	num[8];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_pcb_partnum_t;
 
 typedef struct hfa384x_pdr_pcb_tracenum
 {
-	uint8_t	num[8];
+	UINT8	num[8];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_pcb_tracenum_t;
 
 typedef struct hfa384x_pdr_nic_serial
 {
-	uint8_t	num[12];
+	UINT8	num[12];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_nic_serial_t;
 
 typedef struct hfa384x_pdr_mkk_measurements
@@ -2182,170 +2182,170 @@
 
 typedef struct hfa384x_pdr_nic_ramsize
 {
-	uint8_t	size[12]; /* units of KB */
+	UINT8	size[12]; /* units of KB */
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_nic_ramsize_t;
 
 typedef struct hfa384x_pdr_mfisuprange
 {
-	uint16_t	id;
-	uint16_t	variant;
-	uint16_t	bottom;
-	uint16_t	top;
+	UINT16	id;
+	UINT16	variant;
+	UINT16	bottom;
+	UINT16	top;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_mfisuprange_t;
 
 typedef struct hfa384x_pdr_cfisuprange
 {
-	uint16_t	id;
-	uint16_t	variant;
-	uint16_t	bottom;
-	uint16_t	top;
+	UINT16	id;
+	UINT16	variant;
+	UINT16	bottom;
+	UINT16	top;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_cfisuprange_t;
 
 typedef struct hfa384x_pdr_nicid
 {
-	uint16_t	id;
-	uint16_t	variant;
-	uint16_t	major;
-	uint16_t	minor;
+	UINT16	id;
+	UINT16	variant;
+	UINT16	major;
+	UINT16	minor;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_nicid_t;
 
 
 typedef struct hfa384x_pdr_refdac_measurements
 {
-	uint16_t	value[0];
+	UINT16	value[0];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_refdac_measurements_t;
 
 typedef struct hfa384x_pdr_vgdac_measurements
 {
-	uint16_t	value[0];
+	UINT16	value[0];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_vgdac_measurements_t;
 
 typedef struct hfa384x_pdr_level_comp_measurements
 {
-	uint16_t	value[0];
+	UINT16	value[0];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_level_compc_measurements_t;
 
 typedef struct hfa384x_pdr_mac_address
 {
-	uint8_t	addr[6];
+	UINT8	addr[6];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_mac_address_t;
 
 typedef struct hfa384x_pdr_mkk_callname
 {
-	uint8_t	callname[8];
+	UINT8	callname[8];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_mkk_callname_t;
 
 typedef struct hfa384x_pdr_regdomain
 {
-	uint16_t	numdomains;
-	uint16_t	domain[5];
+	UINT16	numdomains;
+	UINT16	domain[5];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_regdomain_t;
 
 typedef struct hfa384x_pdr_allowed_channel
 {
-	uint16_t	ch_bitmap;
+	UINT16	ch_bitmap;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_allowed_channel_t;
 
 typedef struct hfa384x_pdr_default_channel
 {
-	uint16_t	channel;
+	UINT16	channel;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_default_channel_t;
 
 typedef struct hfa384x_pdr_privacy_option
 {
-	uint16_t	available;
+	UINT16	available;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_privacy_option_t;
 
 typedef struct hfa384x_pdr_temptype
 {
-	uint16_t	type;
+	UINT16	type;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_temptype_t;
 
 typedef struct hfa384x_pdr_refdac_setup
 {
-	uint16_t	ch_value[14];
+	UINT16	ch_value[14];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_refdac_setup_t;
 
 typedef struct hfa384x_pdr_vgdac_setup
 {
-	uint16_t	ch_value[14];
+	UINT16	ch_value[14];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_vgdac_setup_t;
 
 typedef struct hfa384x_pdr_level_comp_setup
 {
-	uint16_t	ch_value[14];
+	UINT16	ch_value[14];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_level_comp_setup_t;
 
 typedef struct hfa384x_pdr_trimdac_setup
 {
-	uint16_t	trimidac;
-	uint16_t	trimqdac;
+	UINT16	trimidac;
+	UINT16	trimqdac;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_trimdac_setup_t;
 
 typedef struct hfa384x_pdr_ifr_setting
 {
-	uint16_t	value[3];
+	UINT16	value[3];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_ifr_setting_t;
 
 typedef struct hfa384x_pdr_rfr_setting
 {
-	uint16_t	value[3];
+	UINT16	value[3];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_rfr_setting_t;
 
 typedef struct hfa384x_pdr_hfa3861_baseline
 {
-	uint16_t	value[50];
+	UINT16	value[50];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_baseline_t;
 
 typedef struct hfa384x_pdr_hfa3861_shadow
 {
-	uint32_t	value[32];
+	UINT32	value[32];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_shadow_t;
 
 typedef struct hfa384x_pdr_hfa3861_ifrf
 {
-	uint32_t	value[20];
+	UINT32	value[20];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_ifrf_t;
 
 typedef struct hfa384x_pdr_hfa3861_chcalsp
 {
-	uint16_t	value[14];
+	UINT16	value[14];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_chcalsp_t;
 
 typedef struct hfa384x_pdr_hfa3861_chcali
 {
-	uint16_t	value[17];
+	UINT16	value[17];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_chcali_t;
 
 typedef struct hfa384x_pdr_hfa3861_nic_config
 {
-	uint16_t	config_bitmap;
+	UINT16	config_bitmap;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_nic_config_t;
 
 typedef struct hfa384x_pdr_hfo_delay
 {
-	uint8_t   hfo_delay;
+	UINT8   hfo_delay;
 } __WLAN_ATTRIB_PACK__ hfa384x_hfo_delay_t;
 
 typedef struct hfa384x_pdr_hfa3861_manf_testsp
 {
-	uint16_t	value[30];
+	UINT16	value[30];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_manf_testsp_t;
 
 typedef struct hfa384x_pdr_hfa3861_manf_testi
 {
-	uint16_t	value[30];
+	UINT16	value[30];
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_hfa3861_manf_testi_t;
 
 typedef struct hfa384x_end_of_pda
 {
-	uint16_t	crc;
+	UINT16	crc;
 } __WLAN_ATTRIB_PACK__ hfa384x_pdr_end_of_pda_t;
 
 typedef struct hfa384x_pdrec
 {
-	uint16_t	len; /* in words */
-	uint16_t	code;
+	UINT16	len; /* in words */
+	UINT16	code;
 	union pdr {
 	hfa384x_pdr_pcb_partnum_t	pcb_partnum;
 	hfa384x_pdr_pcb_tracenum_t	pcb_tracenum;
@@ -2393,19 +2393,19 @@
 --------------------------------------------------------------------*/
 typedef struct hfa384x_statusresult
 {
-	uint16_t	status;
-	uint16_t	resp0;
-	uint16_t	resp1;
-	uint16_t	resp2;
+	UINT16	status;
+	UINT16	resp0;
+	UINT16	resp1;
+	UINT16	resp2;
 } hfa384x_cmdresult_t;
 
 #if (WLAN_HOSTIF == WLAN_USB)
 
 /* USB Control Exchange (CTLX):
- *  A queue of the structure below is maintained for all of the
+ *  A queue of the structure below is maintained for all of the 
  *  Request/Response type USB packets supported by Prism2.
  */
-/* The following hfa384x_* structures are arguments to
+/* The following hfa384x_* structures are arguments to 
  * the usercb() for the different CTLX types.
  */
 typedef hfa384x_cmdresult_t hfa384x_wridresult_t;
@@ -2413,9 +2413,9 @@
 
 typedef struct hfa384x_rridresult
 {
-	uint16_t		rid;
+	UINT16		rid;
 	const void	*riddata;
-	unsigned int		riddata_len;
+	UINT		riddata_len;
 } hfa384x_rridresult_t;
 
 enum ctlx_state {
@@ -2437,7 +2437,7 @@
 typedef void (*ctlx_cmdcb_t)( struct hfa384x*, const struct hfa384x_usbctlx* );
 
 typedef void (*ctlx_usercb_t)(
-	struct hfa384x	*hw,
+	struct hfa384x	*hw, 
 	void		*ctlxresult,
 	void		*usercb_data);
 
@@ -2473,14 +2473,14 @@
 
 typedef struct hfa484x_metacmd
 {
-	uint16_t		cmd;
+	UINT16		cmd;
 
-	uint16_t          parm0;
-	uint16_t          parm1;
-	uint16_t          parm2;
+	UINT16          parm0;
+	UINT16          parm1;
+	UINT16          parm2;
 
 #if 0 //XXX cmd irq stuff
-	uint16_t          bulkid;         /* what RID/FID to copy down. */
+	UINT16          bulkid;         /* what RID/FID to copy down. */
 	int             bulklen;        /* how much to copy from BAP */
         char            *bulkdata;      /* And to where? */
 #endif
@@ -2509,27 +2509,27 @@
 /* XXX These are going away ASAP */
 typedef struct prism2sta_authlist
 {
-	unsigned int	cnt;
-	uint8_t	addr[WLAN_AUTH_MAX][WLAN_ADDR_LEN];
-	uint8_t	assoc[WLAN_AUTH_MAX];
+	UINT	cnt;
+	UINT8	addr[WLAN_AUTH_MAX][WLAN_ADDR_LEN];
+	UINT8	assoc[WLAN_AUTH_MAX];
 } prism2sta_authlist_t;
 
 typedef struct prism2sta_accesslist
 {
-	unsigned int	modify;
-	unsigned int	cnt;
-	uint8_t	addr[WLAN_ACCESS_MAX][WLAN_ADDR_LEN];
-	unsigned int	cnt1;
-	uint8_t	addr1[WLAN_ACCESS_MAX][WLAN_ADDR_LEN];
+	UINT	modify;
+	UINT	cnt;
+	UINT8	addr[WLAN_ACCESS_MAX][WLAN_ADDR_LEN];
+	UINT	cnt1;
+	UINT8	addr1[WLAN_ACCESS_MAX][WLAN_ADDR_LEN];
 } prism2sta_accesslist_t;
 
 typedef struct hfa384x
 {
 #if (WLAN_HOSTIF != WLAN_USB)
 	/* Resource config */
-	uint32_t			iobase;
+	UINT32			iobase;
 	char			__iomem *membase;
-	uint32_t			irq;
+	UINT32			irq;
 #else
 	/* USB support data */
 	struct usb_device	*usb;
@@ -2574,25 +2574,25 @@
 #endif
 
 	int                     sniff_fcs;
-	int                     sniff_channel;
-	int                     sniff_truncate;
+	int                     sniff_channel;  
+	int                     sniff_truncate;  
 	int                     sniffhdr;
 
 	wait_queue_head_t cmdq;	        /* wait queue itself */
 
 	/* Controller state */
-	uint32_t		state;
-	uint32_t		isap;
-	uint8_t		port_enabled[HFA384x_NUMPORTS_MAX];
+	UINT32		state;
+	UINT32		isap;
+	UINT8		port_enabled[HFA384x_NUMPORTS_MAX];
 #if (WLAN_HOSTIF != WLAN_USB)
-	unsigned int		auxen;
-	unsigned int            isram16;
+	UINT		auxen;
+	UINT            isram16;
 #endif /* !USB */
 
 	/* Download support */
-	unsigned int				dlstate;
+	UINT				dlstate;
 	hfa384x_downloadbuffer_t	bufinfo;
-	uint16_t				dltimeout;
+	UINT16				dltimeout;
 
 #if (WLAN_HOSTIF != WLAN_USB)
 	spinlock_t	cmdlock;
@@ -2600,15 +2600,15 @@
 	hfa384x_metacmd_t *cmddata;      /* for our async callback */
 
 	/* BAP support */
-	spinlock_t	baplock;
+	spinlock_t	baplock;	
 	struct tasklet_struct   bap_tasklet;
 
 	/* MAC buffer ids */
-        uint16_t          txfid_head;
-        uint16_t          txfid_tail;
-        unsigned int            txfid_N;
-        uint16_t          txfid_queue[HFA384x_DRVR_FIDSTACKLEN_MAX];
-	uint16_t			infofid;
+        UINT16          txfid_head;
+        UINT16          txfid_tail;
+        UINT            txfid_N;
+        UINT16          txfid_queue[HFA384x_DRVR_FIDSTACKLEN_MAX];
+	UINT16			infofid;
 	struct semaphore	infofid_sem;
 #endif /* !USB */
 
@@ -2625,31 +2625,31 @@
 	hfa384x_commsquality_t  qual;
 	struct timer_list	commsqual_timer;
 
-	uint16_t link_status;
-	uint16_t link_status_new;
+	UINT16 link_status;
+	UINT16 link_status_new;
 	struct sk_buff_head        authq;
 
 	/* And here we have stuff that used to be in priv */
 
 	/* State variables */
-	unsigned int		presniff_port_type;
-	uint16_t		presniff_wepflags;
-	uint32_t		dot11_desired_bss_type;
+	UINT		presniff_port_type;
+	UINT16		presniff_wepflags;
+	UINT32		dot11_desired_bss_type;
 	int		ap;	/* AP flag: 0 - Station, 1 - Access Point. */
 
 	int             dbmadjust;
 
 	/* Group Addresses - right now, there are up to a total
 	of MAX_GRP_ADDR group addresses */
-	uint8_t		dot11_grp_addr[MAX_GRP_ADDR][WLAN_ADDR_LEN];
-	unsigned int		dot11_grpcnt;
+	UINT8		dot11_grp_addr[MAX_GRP_ADDR][WLAN_ADDR_LEN];
+	UINT		dot11_grpcnt;
 
 	/* Component Identities */
 	hfa384x_compident_t	ident_nic;
 	hfa384x_compident_t	ident_pri_fw;
 	hfa384x_compident_t	ident_sta_fw;
 	hfa384x_compident_t	ident_ap_fw;
-	uint16_t			mm_mods;
+	UINT16			mm_mods;
 
 	/* Supplier compatibility ranges */
 	hfa384x_caplevel_t	cap_sup_mfi;
@@ -2665,14 +2665,14 @@
 	hfa384x_caplevel_t	cap_act_ap_cfi;  /* ap f/w to controller interface */
 	hfa384x_caplevel_t	cap_act_ap_mfi;  /* ap f/w to modem interface */
 
-	uint32_t			psusercount;  /* Power save user count. */
+	UINT32			psusercount;  /* Power save user count. */
 	hfa384x_CommTallies32_t	tallies;      /* Communication tallies. */
-	uint8_t			comment[WLAN_COMMENT_MAX+1]; /* User comment */
+	UINT8			comment[WLAN_COMMENT_MAX+1]; /* User comment */
 
 	/* Channel Info request results (AP only) */
 	struct {
 		atomic_t		done;
-		uint8_t			count;
+		UINT8			count;
 		hfa384x_ChInfoResult_t	results;
 	} channel_info;
 
@@ -2680,7 +2680,7 @@
 
 
         prism2sta_authlist_t	authlist;     /* Authenticated station list. */
-	unsigned int			accessmode;   /* Access mode. */
+	UINT			accessmode;   /* Access mode. */
         prism2sta_accesslist_t	allow;        /* Allowed station list. */
         prism2sta_accesslist_t	deny;         /* Denied station list. */
 
@@ -2690,23 +2690,23 @@
 /*--- Function Declarations -----------------------------------*/
 /*=============================================================*/
 #if (WLAN_HOSTIF == WLAN_USB)
-void
-hfa384x_create(
-	hfa384x_t *hw,
+void 
+hfa384x_create( 
+	hfa384x_t *hw, 
 	struct usb_device *usb);
 #else
-void
-hfa384x_create(
-	hfa384x_t *hw,
-	unsigned int irq,
-	uint32_t iobase,
-	uint8_t __iomem *membase);
+void 
+hfa384x_create( 
+	hfa384x_t *hw, 
+	UINT irq, 
+	UINT32 iobase, 
+	UINT8 __iomem *membase);
 #endif
 
 void hfa384x_destroy(hfa384x_t *hw);
 
 irqreturn_t
-hfa384x_INTerrupt(int irq, void *dev_id PT_REGS);
+hfa384x_interrupt(int irq, void *dev_id PT_REGS);
 int
 hfa384x_corereset( hfa384x_t *hw, int holdtime, int settletime, int genesis);
 int
@@ -2714,97 +2714,97 @@
 int
 hfa384x_drvr_commtallies( hfa384x_t *hw);
 int
-hfa384x_drvr_disable(hfa384x_t *hw, uint16_t macport);
+hfa384x_drvr_disable(hfa384x_t *hw, UINT16 macport);
 int
-hfa384x_drvr_enable(hfa384x_t *hw, uint16_t macport);
+hfa384x_drvr_enable(hfa384x_t *hw, UINT16 macport);
 int
 hfa384x_drvr_flashdl_enable(hfa384x_t *hw);
 int
 hfa384x_drvr_flashdl_disable(hfa384x_t *hw);
 int
-hfa384x_drvr_flashdl_write(hfa384x_t *hw, uint32_t daddr, void* buf, uint32_t len);
+hfa384x_drvr_flashdl_write(hfa384x_t *hw, UINT32 daddr, void* buf, UINT32 len);
 int
-hfa384x_drvr_getconfig(hfa384x_t *hw, uint16_t rid, void *buf, uint16_t len);
+hfa384x_drvr_getconfig(hfa384x_t *hw, UINT16 rid, void *buf, UINT16 len);
 int
-hfa384x_drvr_handover( hfa384x_t *hw, uint8_t *addr);
+hfa384x_drvr_handover( hfa384x_t *hw, UINT8 *addr);
 int
 hfa384x_drvr_hostscanresults( hfa384x_t *hw);
 int
 hfa384x_drvr_low_level(hfa384x_t *hw, hfa384x_metacmd_t *cmd);
 int
-hfa384x_drvr_mmi_read(hfa384x_t *hw, uint32_t address, uint32_t *result);
+hfa384x_drvr_mmi_read(hfa384x_t *hw, UINT32 address, UINT32 *result);
 int
-hfa384x_drvr_mmi_write(hfa384x_t *hw, uint32_t address, uint32_t data);
+hfa384x_drvr_mmi_write(hfa384x_t *hw, UINT32 address, UINT32 data);
 int
-hfa384x_drvr_ramdl_enable(hfa384x_t *hw, uint32_t exeaddr);
+hfa384x_drvr_ramdl_enable(hfa384x_t *hw, UINT32 exeaddr);
 int
 hfa384x_drvr_ramdl_disable(hfa384x_t *hw);
 int
-hfa384x_drvr_ramdl_write(hfa384x_t *hw, uint32_t daddr, void* buf, uint32_t len);
+hfa384x_drvr_ramdl_write(hfa384x_t *hw, UINT32 daddr, void* buf, UINT32 len);
 int
-hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len);
+hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, UINT len);
 int
 hfa384x_drvr_scanresults( hfa384x_t *hw);
 
 int
-hfa384x_drvr_setconfig(hfa384x_t *hw, uint16_t rid, void *buf, uint16_t len);
+hfa384x_drvr_setconfig(hfa384x_t *hw, UINT16 rid, void *buf, UINT16 len);
 
-static inline int
-hfa384x_drvr_getconfig16(hfa384x_t *hw, uint16_t rid, void *val)
+static inline int 
+hfa384x_drvr_getconfig16(hfa384x_t *hw, UINT16 rid, void *val)
 {
 	int		result = 0;
-	result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(uint16_t));
+	result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(UINT16));
 	if ( result == 0 ) {
-		*((uint16_t*)val) = hfa384x2host_16(*((uint16_t*)val));
+		*((UINT16*)val) = hfa384x2host_16(*((UINT16*)val));
 	}
 	return result;
 }
 
-static inline int
-hfa384x_drvr_getconfig32(hfa384x_t *hw, uint16_t rid, void *val)
+static inline int 
+hfa384x_drvr_getconfig32(hfa384x_t *hw, UINT16 rid, void *val)
 {
 	int		result = 0;
 
-	result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(uint32_t));
+	result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(UINT32));
 	if ( result == 0 ) {
-		*((uint32_t*)val) = hfa384x2host_32(*((uint32_t*)val));
+		*((UINT32*)val) = hfa384x2host_32(*((UINT32*)val));
 	}
 
 	return result;
 }
 
 static inline int
-hfa384x_drvr_setconfig16(hfa384x_t *hw, uint16_t rid, uint16_t val)
+hfa384x_drvr_setconfig16(hfa384x_t *hw, UINT16 rid, UINT16 val)
 {
-	uint16_t value = host2hfa384x_16(val);
+	UINT16 value = host2hfa384x_16(val);
 	return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
 }
 
 static inline int
-hfa384x_drvr_setconfig32(hfa384x_t *hw, uint16_t rid, uint32_t val)
+hfa384x_drvr_setconfig32(hfa384x_t *hw, UINT16 rid, UINT32 val)
 {
-	uint32_t value = host2hfa384x_32(val);
+	UINT32 value = host2hfa384x_32(val);
 	return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(value));
 }
 
-#if (WLAN_HOSTIF == WLAN_USB)
-int
-hfa384x_drvr_getconfig_async(hfa384x_t     *hw,
-                              uint16_t        rid,
-                              ctlx_usercb_t usercb,
-                              void          *usercb_data);
-
-int
-hfa384x_drvr_setconfig_async(hfa384x_t *hw,
-                              uint16_t rid,
-                              void *buf,
-                              uint16_t len,
-                              ctlx_usercb_t usercb,
-                              void *usercb_data);
+#if (WLAN_HOSTIF == WLAN_USB) 	 
+int 	 
+hfa384x_drvr_getconfig_async(hfa384x_t     *hw, 	 
+                              UINT16        rid, 	 
+                              ctlx_usercb_t usercb, 	 
+                              void          *usercb_data); 	 
+ 	 
+int 	 
+hfa384x_drvr_setconfig_async(hfa384x_t *hw, 	 
+                              UINT16 rid, 	 
+                              void *buf, 	 
+                              UINT16 len, 	 
+                              ctlx_usercb_t usercb, 	 
+                              void *usercb_data); 	 
 #else
 static inline int
-hfa384x_drvr_setconfig_async(hfa384x_t *hw, uint16_t rid, void *buf, uint16_t len,
-			     void *ptr1, void *ptr2)
+hfa384x_drvr_setconfig_async(hfa384x_t *hw, UINT16 rid, void *buf, UINT16 len, 
+			     void *ptr1, void *ptr2) 	 
 {
          (void)ptr1;
          (void)ptr2;
@@ -2813,19 +2813,19 @@
 #endif
 
 static inline int
-hfa384x_drvr_setconfig16_async(hfa384x_t *hw, uint16_t rid, uint16_t val)
-{
-	uint16_t value = host2hfa384x_16(val);
-	return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
-					    NULL , NULL);
+hfa384x_drvr_setconfig16_async(hfa384x_t *hw, UINT16 rid, UINT16 val)
+{ 	 
+	UINT16 value = host2hfa384x_16(val); 	 
+	return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), 
+					    NULL , NULL); 	 
 }
 
 static inline int
-hfa384x_drvr_setconfig32_async(hfa384x_t *hw, uint16_t rid, uint32_t val)
-{
-	uint32_t value = host2hfa384x_32(val);
-	return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value),
-					    NULL , NULL);
+hfa384x_drvr_setconfig32_async(hfa384x_t *hw, UINT16 rid, UINT32 val)
+{ 	 
+	UINT32 value = host2hfa384x_32(val); 	 
+	return hfa384x_drvr_setconfig_async(hw, rid, &value, sizeof(value), 
+					    NULL , NULL); 	 
 }
 
 
@@ -2841,87 +2841,87 @@
 int
 hfa384x_cmd_initialize(hfa384x_t *hw);
 int
-hfa384x_cmd_enable(hfa384x_t *hw, uint16_t macport);
+hfa384x_cmd_enable(hfa384x_t *hw, UINT16 macport);
 int
-hfa384x_cmd_disable(hfa384x_t *hw, uint16_t macport);
+hfa384x_cmd_disable(hfa384x_t *hw, UINT16 macport);
 int
 hfa384x_cmd_diagnose(hfa384x_t *hw);
 int
-hfa384x_cmd_allocate(hfa384x_t *hw, uint16_t len);
+hfa384x_cmd_allocate(hfa384x_t *hw, UINT16 len);
 int
-hfa384x_cmd_transmit(hfa384x_t *hw, uint16_t reclaim, uint16_t qos, uint16_t fid);
+hfa384x_cmd_transmit(hfa384x_t *hw, UINT16 reclaim, UINT16 qos, UINT16 fid);
 int
-hfa384x_cmd_clearpersist(hfa384x_t *hw, uint16_t fid);
+hfa384x_cmd_clearpersist(hfa384x_t *hw, UINT16 fid);
 int
-hfa384x_cmd_notify(hfa384x_t *hw, uint16_t reclaim, uint16_t fid, void *buf, uint16_t len);
+hfa384x_cmd_notify(hfa384x_t *hw, UINT16 reclaim, UINT16 fid, void *buf, UINT16 len);
 int
-hfa384x_cmd_inquire(hfa384x_t *hw, uint16_t fid);
+hfa384x_cmd_inquire(hfa384x_t *hw, UINT16 fid);
 int
-hfa384x_cmd_access(hfa384x_t *hw, uint16_t write, uint16_t rid, void *buf, uint16_t len);
+hfa384x_cmd_access(hfa384x_t *hw, UINT16 write, UINT16 rid, void *buf, UINT16 len);
 int
-hfa384x_cmd_monitor(hfa384x_t *hw, uint16_t enable);
+hfa384x_cmd_monitor(hfa384x_t *hw, UINT16 enable);
 int
 hfa384x_cmd_download(
-	hfa384x_t *hw,
-	uint16_t mode,
-	uint16_t lowaddr,
-	uint16_t highaddr,
-	uint16_t codelen);
+	hfa384x_t *hw, 
+	UINT16 mode, 
+	UINT16 lowaddr,
+	UINT16 highaddr, 
+	UINT16 codelen);
 int
 hfa384x_cmd_aux_enable(hfa384x_t *hw, int force);
 int
 hfa384x_cmd_aux_disable(hfa384x_t *hw);
 int
 hfa384x_copy_from_bap(
-	hfa384x_t *hw,
-	uint16_t	bap,
-	uint16_t	id,
-	uint16_t	offset,
+	hfa384x_t *hw, 
+	UINT16	bap, 
+	UINT16	id, 
+	UINT16	offset, 
 	void	*buf,
-	unsigned int	len);
+	UINT	len);
 int
 hfa384x_copy_to_bap(
-	hfa384x_t *hw,
-	uint16_t	bap,
-	uint16_t	id,
-	uint16_t	offset,
-	void	*buf,
-	unsigned int	len);
-void
+	hfa384x_t *hw, 
+	UINT16	bap, 
+	UINT16	id, 
+	UINT16	offset,
+	void	*buf, 
+	UINT	len);
+void 
 hfa384x_copy_from_aux(
-	hfa384x_t *hw,
-	uint32_t	cardaddr,
-	uint32_t	auxctl,
-	void	*buf,
-	unsigned int	len);
-void
+	hfa384x_t *hw, 
+	UINT32	cardaddr, 
+	UINT32	auxctl, 
+	void	*buf, 
+	UINT	len);
+void 
 hfa384x_copy_to_aux(
-	hfa384x_t *hw,
-	uint32_t	cardaddr,
-	uint32_t	auxctl,
-	void	*buf,
-	unsigned int	len);
+	hfa384x_t *hw, 
+	UINT32	cardaddr, 
+	UINT32	auxctl, 
+	void	*buf, 
+	UINT	len);
 
 #if (WLAN_HOSTIF != WLAN_USB)
 
-/*
+/* 
    HFA384x is a LITTLE ENDIAN part.
 
    the get/setreg functions implicitly byte-swap the data to LE.
    the _noswap variants do not perform a byte-swap on the data.
 */
 
-static inline uint16_t
-__hfa384x_getreg(hfa384x_t *hw, unsigned int reg);
+static inline UINT16 
+__hfa384x_getreg(hfa384x_t *hw, UINT reg);
 
-static inline void
-__hfa384x_setreg(hfa384x_t *hw, uint16_t val, unsigned int reg);
+static inline void   
+__hfa384x_setreg(hfa384x_t *hw, UINT16 val, UINT reg);
 
-static inline uint16_t
-__hfa384x_getreg_noswap(hfa384x_t *hw, unsigned int reg);
+static inline UINT16 
+__hfa384x_getreg_noswap(hfa384x_t *hw, UINT reg);
 
 static inline void
-__hfa384x_setreg_noswap(hfa384x_t *hw, uint16_t val, unsigned int reg);
+__hfa384x_setreg_noswap(hfa384x_t *hw, UINT16 val, UINT reg);
 
 #ifdef REVERSE_ENDIAN
 #define hfa384x_getreg __hfa384x_getreg_noswap
@@ -2949,8 +2949,8 @@
 * Returns:
 *       Value from the register in HOST ORDER!!!!
 ----------------------------------------------------------------*/
-static inline uint16_t
-__hfa384x_getreg(hfa384x_t *hw, unsigned int reg)
+static inline UINT16 
+__hfa384x_getreg(hfa384x_t *hw, UINT reg)
 {
 /*	printk(KERN_DEBUG "Reading from 0x%0x\n", hw->membase + reg); */
 #if ((WLAN_HOSTIF == WLAN_PCMCIA) || (WLAN_HOSTIF == WLAN_PLX))
@@ -2976,7 +2976,7 @@
 *       Nothing
 ----------------------------------------------------------------*/
 static inline void
-__hfa384x_setreg(hfa384x_t *hw, uint16_t val, unsigned int reg)
+__hfa384x_setreg(hfa384x_t *hw, UINT16 val, UINT reg)
 {
 #if ((WLAN_HOSTIF == WLAN_PCMCIA) || (WLAN_HOSTIF == WLAN_PLX))
 	wlan_outw_cpu_to_le16( val, hw->iobase + reg);
@@ -3001,8 +3001,8 @@
 * Returns:
 *       Value from the register.
 ----------------------------------------------------------------*/
-static inline uint16_t
-__hfa384x_getreg_noswap(hfa384x_t *hw, unsigned int reg)
+static inline UINT16
+__hfa384x_getreg_noswap(hfa384x_t *hw, UINT reg)
 {
 #if ((WLAN_HOSTIF == WLAN_PCMCIA) || (WLAN_HOSTIF == WLAN_PLX))
 	return wlan_inw(hw->iobase+reg);
@@ -3026,8 +3026,8 @@
 * Returns:
 *       Nothing
 ----------------------------------------------------------------*/
-static inline void
-__hfa384x_setreg_noswap(hfa384x_t *hw, uint16_t val, unsigned int reg)
+static inline void 
+__hfa384x_setreg_noswap(hfa384x_t *hw, UINT16 val, UINT reg)
 {
 #if ((WLAN_HOSTIF == WLAN_PCMCIA) || (WLAN_HOSTIF == WLAN_PLX))
 	wlan_outw( val, hw->iobase + reg);
@@ -3041,25 +3041,25 @@
 
 static inline void hfa384x_events_all(hfa384x_t *hw)
 {
-	hfa384x_setreg(hw,
+	hfa384x_setreg(hw, 
 		       HFA384x_INT_NORMAL
 #ifdef CMD_IRQ
 		       | HFA384x_INTEN_CMD_SET(1)
 #endif
 		       ,
-		       HFA384x_INTEN);
+		       HFA384x_INTEN);	
 
 }
 
 static inline void hfa384x_events_nobap(hfa384x_t *hw)
 {
-	hfa384x_setreg(hw,
+	hfa384x_setreg(hw, 
 		        (HFA384x_INT_NORMAL & ~HFA384x_INT_BAP_OP)
 #ifdef CMD_IRQ
 		       | HFA384x_INTEN_CMD_SET(1)
 #endif
 		       ,
-		       HFA384x_INTEN);
+		       HFA384x_INTEN);	
 
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_82575.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_82575.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_82575.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_82575.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1617 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/*
+ * 82575EB Gigabit Network Connection
+ * 82575EB Gigabit Backplane Connection
+ * 82575GB Gigabit Network Connection
+ * 82576 Gigabit Network Connection
+ * 82576 Quad Port Gigabit Mezzanine Adapter
+ */
+
+#include "igb.h"
+
+static s32  igb_init_phy_params_82575(struct e1000_hw *hw);
+static s32  igb_init_nvm_params_82575(struct e1000_hw *hw);
+static s32  igb_init_mac_params_82575(struct e1000_hw *hw);
+static s32  igb_acquire_phy_82575(struct e1000_hw *hw);
+static void igb_release_phy_82575(struct e1000_hw *hw);
+static s32  igb_acquire_nvm_82575(struct e1000_hw *hw);
+static void igb_release_nvm_82575(struct e1000_hw *hw);
+static s32  igb_check_for_link_82575(struct e1000_hw *hw);
+static s32  igb_get_cfg_done_82575(struct e1000_hw *hw);
+static s32  igb_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
+                                         u16 *duplex);
+static s32  igb_init_hw_82575(struct e1000_hw *hw);
+static s32  igb_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
+static s32  igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
+                                           u16 *data);
+static s32  igb_reset_hw_82575(struct e1000_hw *hw);
+static s32  igb_set_d0_lplu_state_82575(struct e1000_hw *hw,
+                                          bool active);
+static s32  igb_setup_copper_link_82575(struct e1000_hw *hw);
+static s32  igb_setup_serdes_link_82575(struct e1000_hw *hw);
+static s32  igb_valid_led_default_82575(struct e1000_hw *hw, u16 *data);
+static s32  igb_write_phy_reg_sgmii_82575(struct e1000_hw *hw,
+                                            u32 offset, u16 data);
+static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw);
+static s32  igb_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
+static s32  igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
+                                                 u16 *speed, u16 *duplex);
+static s32  igb_get_phy_id_82575(struct e1000_hw *hw);
+static void igb_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
+static bool igb_sgmii_active_82575(struct e1000_hw *hw);
+static s32  igb_reset_init_script_82575(struct e1000_hw *hw);
+static s32  igb_read_mac_addr_82575(struct e1000_hw *hw);
+static void igb_power_down_phy_copper_82575(struct e1000_hw *hw);
+static void igb_shutdown_serdes_link_82575(struct e1000_hw *hw);
+static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw);
+
+/**
+ *  igb_init_phy_params_82575 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_init_phy_params_82575");
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		phy->type = e1000_phy_none;
+		goto out;
+	}
+
+	phy->ops.power_up   = igb_power_up_phy_copper;
+	phy->ops.power_down = igb_power_down_phy_copper_82575;
+
+	phy->autoneg_mask           = AUTONEG_ADVERTISE_SPEED_DEFAULT;
+	phy->reset_delay_us         = 100;
+
+	phy->ops.acquire            = igb_acquire_phy_82575;
+	phy->ops.check_reset_block  = igb_check_reset_block_generic;
+	phy->ops.commit             = igb_phy_sw_reset_generic;
+	phy->ops.get_cfg_done       = igb_get_cfg_done_82575;
+	phy->ops.release            = igb_release_phy_82575;
+
+	if (igb_sgmii_active_82575(hw)) {
+		phy->ops.reset      = igb_phy_hw_reset_sgmii_82575;
+		phy->ops.read_reg   = igb_read_phy_reg_sgmii_82575;
+		phy->ops.write_reg  = igb_write_phy_reg_sgmii_82575;
+	} else {
+		phy->ops.reset      = igb_phy_hw_reset_generic;
+		phy->ops.read_reg   = igb_read_phy_reg_igp;
+		phy->ops.write_reg  = igb_write_phy_reg_igp;
+	}
+
+	/* Set phy->phy_addr and phy->id. */
+	ret_val = igb_get_phy_id_82575(hw);
+
+	/* Verify phy id and set remaining function pointers */
+	switch (phy->id) {
+	case M88E1111_I_PHY_ID:
+		phy->type                   = e1000_phy_m88;
+		phy->ops.check_polarity     = igb_check_polarity_m88;
+		phy->ops.get_info           = igb_get_phy_info_m88;
+#if 0
+		phy->ops.get_cable_length   = igb_get_cable_length_m88;
+#endif
+#if 0
+		phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
+#endif
+		break;
+	case IGP03E1000_E_PHY_ID:
+	case IGP04E1000_E_PHY_ID:
+		phy->type                   = e1000_phy_igp_3;
+		phy->ops.check_polarity     = igb_check_polarity_igp;
+		phy->ops.get_info           = igb_get_phy_info_igp;
+#if 0
+		phy->ops.get_cable_length   = igb_get_cable_length_igp_2;
+#endif
+#if 0
+		phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_igp;
+#endif
+		phy->ops.set_d0_lplu_state  = igb_set_d0_lplu_state_82575;
+		phy->ops.set_d3_lplu_state  = igb_set_d3_lplu_state_generic;
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_init_nvm_params_82575 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 igb_init_nvm_params_82575(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
+
+	DEBUGFUNC("igb_init_nvm_params_82575");
+
+	nvm->opcode_bits        = 8;
+	nvm->delay_usec         = 1;
+	switch (nvm->override) {
+	case e1000_nvm_override_spi_large:
+		nvm->page_size    = 32;
+		nvm->address_bits = 16;
+		break;
+	case e1000_nvm_override_spi_small:
+		nvm->page_size    = 8;
+		nvm->address_bits = 8;
+		break;
+	default:
+		nvm->page_size    = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;
+		break;
+	}
+
+	nvm->type              = e1000_nvm_eeprom_spi;
+
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+	                  E1000_EECD_SIZE_EX_SHIFT);
+
+	/*
+	 * Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
+
+	/* EEPROM access above 16k is unsupported */
+	if (size > 14)
+		size = 14;
+	nvm->word_size = 1 << size;
+
+	/* Function Pointers */
+	nvm->ops.acquire       = igb_acquire_nvm_82575;
+	nvm->ops.read          = igb_read_nvm_eerd;
+	nvm->ops.release       = igb_release_nvm_82575;
+	nvm->ops.update        = igb_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = igb_valid_led_default_82575;
+	nvm->ops.validate      = igb_validate_nvm_checksum_generic;
+	nvm->ops.write         = igb_write_nvm_spi;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_init_mac_params_82575 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+static s32 igb_init_mac_params_82575(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
+	u32 ctrl_ext = 0;
+
+	DEBUGFUNC("igb_init_mac_params_82575");
+
+	/* Set media type */
+        /*
+	 * The 82575 uses bits 22:23 for link mode. The mode can be changed
+         * based on the EEPROM. We cannot rely upon device ID. There
+         * is no distinguishable difference between fiber and internal
+         * SerDes mode on the 82575. There can be an external PHY attached
+         * on the SGMII interface. For this, we'll set sgmii_active to true.
+         */
+	hw->phy.media_type = e1000_media_type_copper;
+	dev_spec->sgmii_active = false;
+
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) {
+	case E1000_CTRL_EXT_LINK_MODE_SGMII:
+		dev_spec->sgmii_active = true;
+		ctrl_ext |= E1000_CTRL_I2C_ENA;
+		break;
+	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
+		hw->phy.media_type = e1000_media_type_internal_serdes;
+		ctrl_ext |= E1000_CTRL_I2C_ENA;
+		break;
+	default:
+		ctrl_ext &= ~E1000_CTRL_I2C_ENA;
+		break;
+	}
+
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set uta register count */
+	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
+	if (mac->type == e1000_82576)
+		mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+	/* Set if manageability features are enabled. */
+	mac->arc_subsystem_valid =
+	        (E1000_READ_REG(hw, E1000_FWSM) & E1000_FWSM_MODE_MASK)
+	                ? true : false;
+
+	/* Function pointers */
+
+	/* bus type/speed/width */
+	mac->ops.get_bus_info = igb_get_bus_info_pcie_generic;
+	/* reset */
+	mac->ops.reset_hw = igb_reset_hw_82575;
+	/* hw initialization */
+	mac->ops.init_hw = igb_init_hw_82575;
+	/* link setup */
+	mac->ops.setup_link = igb_setup_link_generic;
+	/* physical interface link setup */
+	mac->ops.setup_physical_interface =
+	        (hw->phy.media_type == e1000_media_type_copper)
+	                ? igb_setup_copper_link_82575
+	                : igb_setup_serdes_link_82575;
+	/* physical interface shutdown */
+	mac->ops.shutdown_serdes = igb_shutdown_serdes_link_82575;
+	/* check for link */
+	mac->ops.check_for_link = igb_check_for_link_82575;
+	/* receive address register setting */
+	mac->ops.rar_set = igb_rar_set_generic;
+	/* read mac address */
+	mac->ops.read_mac_addr = igb_read_mac_addr_82575;
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = igb_update_mc_addr_list_generic;
+	/* writing VFTA */
+	mac->ops.write_vfta = igb_write_vfta_generic;
+	/* clearing VFTA */
+	mac->ops.clear_vfta = igb_clear_vfta_generic;
+	/* setting MTA */
+#if 0
+	mac->ops.mta_set = igb_mta_set_generic;
+	/* ID LED init */
+	mac->ops.id_led_init = igb_id_led_init_generic;
+	/* blink LED */
+	mac->ops.blink_led = igb_blink_led_generic;
+	/* setup LED */
+	mac->ops.setup_led = igb_setup_led_generic;
+	/* cleanup LED */
+	mac->ops.cleanup_led = igb_cleanup_led_generic;
+	/* turn on/off LED */
+	mac->ops.led_on = igb_led_on_generic;
+	mac->ops.led_off = igb_led_off_generic;
+#endif
+	/* clear hardware counters */
+	mac->ops.clear_hw_cntrs = igb_clear_hw_cntrs_82575;
+	/* link info */
+	mac->ops.get_link_up_info = igb_get_link_up_info_82575;
+
+	/* set lan id for port to determine which phy lock to use */
+	hw->mac.ops.set_lan_id(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_init_function_pointers_82575 - Init func ptrs.
+ *  @hw: pointer to the HW structure
+ *
+ *  Called to initialize all function pointers and parameters.
+ **/
+void igb_init_function_pointers_82575(struct e1000_hw *hw)
+{
+	DEBUGFUNC("igb_init_function_pointers_82575");
+
+	hw->mac.ops.init_params = igb_init_mac_params_82575;
+	hw->nvm.ops.init_params = igb_init_nvm_params_82575;
+	hw->phy.ops.init_params = igb_init_phy_params_82575;
+#if 0
+	hw->mbx.ops.init_params = igb_init_mbx_params_pf;
+#endif
+}
+
+/**
+ *  igb_acquire_phy_82575 - Acquire rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire access rights to the correct PHY.
+ **/
+static s32 igb_acquire_phy_82575(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("igb_acquire_phy_82575");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+
+	return igb_acquire_swfw_sync_82575(hw, mask);
+}
+
+/**
+ *  igb_release_phy_82575 - Release rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to release access rights to the correct PHY.
+ **/
+static void igb_release_phy_82575(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("igb_release_phy_82575");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+
+	igb_release_swfw_sync_82575(hw, mask);
+}
+
+/**
+ *  igb_read_phy_reg_sgmii_82575 - Read PHY register using sgmii
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset using the serial gigabit media independent
+ *  interface and stores the retrieved information in data.
+ **/
+static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
+                                          u16 *data)
+{
+	s32 ret_val = -E1000_ERR_PARAM;
+
+	DEBUGFUNC("igb_read_phy_reg_sgmii_82575");
+
+	if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
+		DEBUGOUT1("PHY Address %u is out of range\n", offset);
+		goto out;
+	}
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_read_phy_reg_i2c(hw, offset, data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_phy_reg_sgmii_82575 - Write PHY register using sgmii
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset using the serial gigabit
+ *  media independent interface.
+ **/
+static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
+                                           u16 data)
+{
+	s32 ret_val = -E1000_ERR_PARAM;
+
+	DEBUGFUNC("igb_write_phy_reg_sgmii_82575");
+
+	if (offset > E1000_MAX_SGMII_PHY_REG_ADDR) {
+		DEBUGOUT1("PHY Address %d is out of range\n", offset);
+		goto out;
+	}
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_write_phy_reg_i2c(hw, offset, data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_phy_id_82575 - Retrieve PHY addr and id
+ *  @hw: pointer to the HW structure
+ *
+ *  Retrieves the PHY address and ID for both PHY's which do and do not use
+ *  sgmi interface.
+ **/
+static s32 igb_get_phy_id_82575(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32  ret_val = E1000_SUCCESS;
+	u16 phy_id;
+	u32 ctrl_ext;
+
+	DEBUGFUNC("igb_get_phy_id_82575");
+
+	/*
+	 * For SGMII PHYs, we try the list of possible addresses until
+	 * we find one that works.  For non-SGMII PHYs
+	 * (e.g. integrated copper PHYs), an address of 1 should
+	 * work.  The result of this function should mean phy->phy_addr
+	 * and phy->id are set correctly.
+	 */
+	if (!igb_sgmii_active_82575(hw)) {
+		phy->addr = 1;
+		ret_val = igb_get_phy_id(hw);
+		goto out;
+	}
+
+	/* Power on sgmii phy if it is disabled */
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT,
+	                ctrl_ext & ~E1000_CTRL_EXT_SDP3_DATA);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(300);
+
+	/*
+	 * The address field in the I2CCMD register is 3 bits and 0 is invalid.
+	 * Therefore, we need to test 1-7
+	 */
+	for (phy->addr = 1; phy->addr < 8; phy->addr++) {
+		ret_val = igb_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id);
+		if (ret_val == E1000_SUCCESS) {
+			DEBUGOUT2("Vendor ID 0x%08X read at address %u\n",
+			          phy_id,
+			          phy->addr);
+			/*
+			 * At the time of this writing, The M88 part is
+			 * the only supported SGMII PHY product.
+			 */
+			if (phy_id == M88_VENDOR)
+				break;
+		} else {
+			DEBUGOUT1("PHY address %u was unreadable\n",
+			          phy->addr);
+		}
+	}
+
+	/* A valid PHY type couldn't be found. */
+	if (phy->addr == 8) {
+		phy->addr = 0;
+		ret_val = -E1000_ERR_PHY;
+	} else {
+		ret_val = igb_get_phy_id(hw);
+	}
+
+	/* restore previous sfp cage power state */
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_phy_hw_reset_sgmii_82575 - Performs a PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Resets the PHY using the serial gigabit media independent interface.
+ **/
+static s32 igb_phy_hw_reset_sgmii_82575(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_phy_hw_reset_sgmii_82575");
+
+	/*
+	 * This isn't a true "hard" reset, but is the only reset
+	 * available to us at this time.
+	 */
+
+	DEBUGOUT("Soft resetting SGMII attached PHY...\n");
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
+
+	/*
+	 * SFP documentation requires the following to configure the SPF module
+	 * to work on SGMII.  No further documentation is given.
+	 */
+	ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.commit(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_set_d0_lplu_state_82575 - Set Low Power Linkup D0 state
+ *  @hw: pointer to the HW structure
+ *  @active: true to enable LPLU, false to disable
+ *
+ *  Sets the LPLU D0 state according to the active flag.  When
+ *  activating LPLU this function also disables smart speed
+ *  and vice versa.  LPLU will not be activated unless the
+ *  device autonegotiation advertisement meets standards of
+ *  either 10 or 10/100 or 10/100/1000 at all duplexes.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+static s32 igb_set_d0_lplu_state_82575(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	DEBUGFUNC("igb_set_d0_lplu_state_82575");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
+	if (ret_val)
+		goto out;
+
+	if (active) {
+		data |= IGP02E1000_PM_D0_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                            &data);
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                             data);
+		if (ret_val)
+			goto out;
+	} else {
+		data &= ~IGP02E1000_PM_D0_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_acquire_nvm_82575 - Request for access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the necessary semaphores for exclusive access to the EEPROM.
+ *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
+ *  Return successful if access grant bit set, else clear the request for
+ *  EEPROM access and return -E1000_ERR_NVM (-1).
+ **/
+static s32 igb_acquire_nvm_82575(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("igb_acquire_nvm_82575");
+
+	ret_val = igb_acquire_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_acquire_nvm_generic(hw);
+
+	if (ret_val)
+		igb_release_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_release_nvm_82575 - Release exclusive access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit,
+ *  then release the semaphores acquired.
+ **/
+static void igb_release_nvm_82575(struct e1000_hw *hw)
+{
+	DEBUGFUNC("igb_release_nvm_82575");
+
+	igb_release_nvm_generic(hw);
+	igb_release_swfw_sync_82575(hw, E1000_SWFW_EEP_SM);
+}
+
+/**
+ *  igb_acquire_swfw_sync_82575 - Acquire SW/FW semaphore
+ *  @hw: pointer to the HW structure
+ *  @mask: specifies which semaphore to acquire
+ *
+ *  Acquire the SW/FW semaphore to access the PHY or NVM.  The mask
+ *  will also specify which port we're acquiring the lock for.
+ **/
+static s32 igb_acquire_swfw_sync_82575(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+	u32 swmask = mask;
+	u32 fwmask = mask << 16;
+	s32 ret_val = E1000_SUCCESS;
+	s32 i = 0, timeout = 200; /* FIXME: find real value to use here */
+
+	DEBUGFUNC("igb_acquire_swfw_sync_82575");
+
+	while (i < timeout) {
+		if (igb_get_hw_semaphore_generic(hw)) {
+			ret_val = -E1000_ERR_SWFW_SYNC;
+			goto out;
+		}
+
+		swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+		if (!(swfw_sync & (fwmask | swmask)))
+			break;
+
+		/*
+		 * Firmware currently using resource (fwmask)
+		 * or other software thread using resource (swmask)
+		 */
+		igb_put_hw_semaphore_generic(hw);
+		msec_delay_irq(5);
+		i++;
+	}
+
+	if (i == timeout) {
+		DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
+		ret_val = -E1000_ERR_SWFW_SYNC;
+		goto out;
+	}
+
+	swfw_sync |= swmask;
+	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+	igb_put_hw_semaphore_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_release_swfw_sync_82575 - Release SW/FW semaphore
+ *  @hw: pointer to the HW structure
+ *  @mask: specifies which semaphore to acquire
+ *
+ *  Release the SW/FW semaphore used to access the PHY or NVM.  The mask
+ *  will also specify which port we're releasing the lock for.
+ **/
+static void igb_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+
+	DEBUGFUNC("igb_release_swfw_sync_82575");
+
+	while (igb_get_hw_semaphore_generic(hw) != E1000_SUCCESS);
+	/* Empty */
+
+	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+	swfw_sync &= ~mask;
+	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+	igb_put_hw_semaphore_generic(hw);
+}
+
+/**
+ *  igb_get_cfg_done_82575 - Read config done bit
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the management control register for the config done bit for
+ *  completion status.  NOTE: silicon which is EEPROM-less will fail trying
+ *  to read the config done bit, so an error is *ONLY* logged and returns
+ *  E1000_SUCCESS.  If we were to return with error, EEPROM-less silicon
+ *  would not be able to be reset or change link.
+ **/
+static s32 igb_get_cfg_done_82575(struct e1000_hw *hw)
+{
+	s32 timeout = PHY_CFG_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+	u32 mask = E1000_NVM_CFG_DONE_PORT_0;
+
+	DEBUGFUNC("igb_get_cfg_done_82575");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_NVM_CFG_DONE_PORT_1;
+	while (timeout) {
+		if (E1000_READ_REG(hw, E1000_EEMNGCTL) & mask)
+			break;
+		msec_delay(1);
+		timeout--;
+	}
+	if (!timeout) {
+		DEBUGOUT("MNG configuration cycle has not completed.\n");
+        }
+
+	/* If EEPROM is not marked present, init the PHY manually */
+	if (((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) == 0) &&
+	    (hw->phy.type == e1000_phy_igp_3))
+		igb_phy_init_script_igp3(hw);
+
+	return ret_val;
+}
+
+/**
+ *  igb_get_link_up_info_82575 - Get link speed/duplex info
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  This is a wrapper function, if using the serial gigabit media independent
+ *  interface, use PCS to retrieve the link speed and duplex information.
+ *  Otherwise, use the generic function to get the link speed and duplex info.
+ **/
+static s32 igb_get_link_up_info_82575(struct e1000_hw *hw, u16 *speed,
+                                        u16 *duplex)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("igb_get_link_up_info_82575");
+
+	if (hw->phy.media_type != e1000_media_type_copper)
+		ret_val = igb_get_pcs_speed_and_duplex_82575(hw, speed,
+		                                               duplex);
+	else
+		ret_val = igb_get_speed_and_duplex_copper_generic(hw, speed,
+		                                                    duplex);
+
+	return ret_val;
+}
+
+/**
+ *  igb_check_for_link_82575 - Check for link
+ *  @hw: pointer to the HW structure
+ *
+ *  If sgmii is enabled, then use the pcs register to determine link, otherwise
+ *  use the generic interface for determining link.
+ **/
+static s32 igb_check_for_link_82575(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	u16 speed, duplex;
+
+	DEBUGFUNC("igb_check_for_link_82575");
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed,
+		                                               &duplex);
+		/*
+		 * Use this flag to determine if link needs to be checked or
+		 * not.  If we have link clear the flag so that we do not
+		 * continue to check for link.
+		 */
+		hw->mac.get_link_status = !hw->mac.serdes_has_link;
+	} else {
+		ret_val = igb_check_for_copper_link_generic(hw);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  igb_get_pcs_speed_and_duplex_82575 - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Using the physical coding sub-layer (PCS), retrieve the current speed and
+ *  duplex, then store the values in the pointers provided.
+ **/
+static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
+                                                u16 *speed, u16 *duplex)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 pcs;
+
+	DEBUGFUNC("igb_get_pcs_speed_and_duplex_82575");
+
+	/* Set up defaults for the return values of this function */
+	mac->serdes_has_link = false;
+	*speed = 0;
+	*duplex = 0;
+
+	/*
+	 * Read the PCS Status register for link state. For non-copper mode,
+	 * the status register is not accurate. The PCS status register is
+	 * used instead.
+	 */
+	pcs = E1000_READ_REG(hw, E1000_PCS_LSTAT);
+
+	/*
+	 * The link up bit determines when link is up on autoneg. The sync ok
+	 * gets set once both sides sync up and agree upon link. Stable link
+	 * can be determined by checking for both link up and link sync ok
+	 */
+	if ((pcs & E1000_PCS_LSTS_LINK_OK) && (pcs & E1000_PCS_LSTS_SYNK_OK)) {
+		mac->serdes_has_link = true;
+
+		/* Detect and store PCS speed */
+		if (pcs & E1000_PCS_LSTS_SPEED_1000) {
+			*speed = SPEED_1000;
+		} else if (pcs & E1000_PCS_LSTS_SPEED_100) {
+			*speed = SPEED_100;
+		} else {
+			*speed = SPEED_10;
+		}
+
+		/* Detect and store PCS duplex */
+		if (pcs & E1000_PCS_LSTS_DUPLEX_FULL) {
+			*duplex = FULL_DUPLEX;
+		} else {
+			*duplex = HALF_DUPLEX;
+		}
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_shutdown_serdes_link_82575 - Remove link during power down
+ *  @hw: pointer to the HW structure
+ *
+ *  In the case of serdes shut down sfp and PCS on driver unload
+ *  when management pass thru is not enabled.
+ **/
+void igb_shutdown_serdes_link_82575(struct e1000_hw *hw)
+{
+#if 0
+	u32 reg;
+#endif
+	u16 eeprom_data = 0;
+
+	if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&
+	    !igb_sgmii_active_82575(hw))
+		return;
+
+	if (hw->bus.func == E1000_FUNC_0)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
+	else if (hw->bus.func == E1000_FUNC_1)
+		hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
+
+	/*
+	 * If APM is not enabled in the EEPROM and management interface is
+	 * not enabled, then power down.
+	 */
+#if 0
+	if (!(eeprom_data & E1000_NVM_APME_82575) &&
+	    !igb_enable_mng_pass_thru(hw)) {
+		/* Disable PCS to turn off link */
+		reg = E1000_READ_REG(hw, E1000_PCS_CFG0);
+		reg &= ~E1000_PCS_CFG_PCS_EN;
+		E1000_WRITE_REG(hw, E1000_PCS_CFG0, reg);
+
+		/* shutdown the laser */
+		reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
+		reg |= E1000_CTRL_EXT_SDP3_DATA;
+		E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);
+
+		/* flush the write to verify completion */
+		E1000_WRITE_FLUSH(hw);
+		msec_delay(1);
+	}
+#endif
+	return;
+}
+
+/**
+ *  igb_reset_hw_82575 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+static s32 igb_reset_hw_82575(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+
+	DEBUGFUNC("igb_reset_hw_82575");
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = igb_disable_pcie_master_generic(hw);
+	if (ret_val) {
+		DEBUGOUT("PCI-E Master disable polling has failed.\n");
+	}
+
+	/* set the completion timeout for interface */
+	ret_val = igb_set_pcie_completion_timeout(hw);
+	if (ret_val) {
+		DEBUGOUT("PCI-E Set completion timeout has failed.\n");
+	}
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGOUT("Issuing a global reset to MAC\n");
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
+
+	ret_val = igb_get_auto_rd_done_generic(hw);
+	if (ret_val) {
+		/*
+		 * When auto config read does not complete, do not
+		 * return with an error. This can happen in situations
+		 * where there is no eeprom and prevents getting link.
+		 */
+		DEBUGOUT("Auto Read Done did not complete\n");
+	}
+
+	/* If EEPROM is not present, run manual init scripts */
+	if ((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) == 0)
+		igb_reset_init_script_82575(hw);
+
+	/* Clear any pending interrupt events. */
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+	E1000_READ_REG(hw, E1000_ICR);
+
+	/* Install any alternate MAC address into RAR0 */
+	ret_val = igb_check_alt_mac_addr_generic(hw);
+
+	return ret_val;
+}
+
+/**
+ *  igb_init_hw_82575 - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+static s32 igb_init_hw_82575(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	u16 i, rar_count = mac->rar_entry_count;
+
+	DEBUGFUNC("igb_init_hw_82575");
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+	if (ret_val) {
+		DEBUGOUT("Error initializing identification LED\n");
+		/* This is not fatal and we should not stop init due to this */
+	}
+
+	/* Disabling VLAN filtering */
+	DEBUGOUT("Initializing the IEEE VLAN\n");
+	mac->ops.clear_vfta(hw);
+
+	/* Setup the receive address */
+	igb_init_rx_addrs_generic(hw, rar_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Zero out the Unicast HASH table */
+	DEBUGOUT("Zeroing the UTA\n");
+	for (i = 0; i < mac->uta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	igb_clear_hw_cntrs_82575(hw);
+
+	return ret_val;
+}
+
+/**
+ *  igb_setup_copper_link_82575 - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the link for auto-neg or forced speed and duplex.  Then we check
+ *  for link, once link is established calls to configure collision distance
+ *  and flow control are called.
+ **/
+static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32  ret_val;
+
+	DEBUGFUNC("igb_setup_copper_link_82575");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	ret_val = igb_setup_serdes_link_82575(hw);
+	if (ret_val)
+		goto out;
+
+	if (igb_sgmii_active_82575(hw) && !hw->phy.reset_disable) {
+		ret_val = hw->phy.ops.reset(hw);
+		if (ret_val) {
+			DEBUGOUT("Error resetting the PHY.\n");
+			goto out;
+		}
+	}
+	switch (hw->phy.type) {
+	case e1000_phy_m88:
+		ret_val = igb_copper_link_setup_m88(hw);
+		break;
+	case e1000_phy_igp_3:
+		ret_val = igb_copper_link_setup_igp(hw);
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		break;
+	}
+
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_setup_copper_link_generic(hw);
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_setup_serdes_link_82575 - Setup link for serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Configure the physical coding sub-layer (PCS) link.  The PCS link is
+ *  used on copper connections where the serialized gigabit media independent
+ *  interface (sgmii), or serdes fiber is being used.  Configures the link
+ *  for auto-negotiation or forces speed/duplex.
+ **/
+static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)
+{
+	u32 ctrl_reg, reg;
+
+	DEBUGFUNC("igb_setup_serdes_link_82575");
+
+	if ((hw->phy.media_type != e1000_media_type_internal_serdes) &&
+	    !igb_sgmii_active_82575(hw))
+		return E1000_SUCCESS;
+
+	/*
+	 * On the 82575, SerDes loopback mode persists until it is
+	 * explicitly turned off or a power cycle is performed.  A read to
+	 * the register does not indicate its status.  Therefore, we ensure
+	 * loopback mode is disabled during initialization.
+	 */
+	E1000_WRITE_REG(hw, E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
+
+	/* power on the sfp cage if present */
+	reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	reg &= ~E1000_CTRL_EXT_SDP3_DATA;
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg);
+
+	ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl_reg |= E1000_CTRL_SLU;
+
+	if (hw->mac.type == e1000_82575 || hw->mac.type == e1000_82576) {
+		/* set both sw defined pins */
+		ctrl_reg |= E1000_CTRL_SWDPIN0 | E1000_CTRL_SWDPIN1;
+
+		/* Set switch control to serdes energy detect */
+		reg = E1000_READ_REG(hw, E1000_CONNSW);
+		reg |= E1000_CONNSW_ENRGSRC;
+		E1000_WRITE_REG(hw, E1000_CONNSW, reg);
+	}
+
+	reg = E1000_READ_REG(hw, E1000_PCS_LCTL);
+
+	if (igb_sgmii_active_82575(hw)) {
+		/* allow time for SFP cage to power up phy */
+		msec_delay(300);
+
+		/* AN time out should be disabled for SGMII mode */
+		reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT);
+	} else {
+		ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD |
+		            E1000_CTRL_FD | E1000_CTRL_FRCDPX;
+	}
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);
+
+	/*
+	 * New SerDes mode allows for forcing speed or autonegotiating speed
+	 * at 1gb. Autoneg should be default set by most drivers. This is the
+	 * mode that will be compatible with older link partners and switches.
+	 * However, both are supported by the hardware and some drivers/tools.
+	 */
+
+	reg &= ~(E1000_PCS_LCTL_AN_ENABLE | E1000_PCS_LCTL_FLV_LINK_UP |
+	         E1000_PCS_LCTL_FSD | E1000_PCS_LCTL_FORCE_LINK);
+
+	/*
+	 * We force flow control to prevent the CTRL register values from being
+	 * overwritten by the autonegotiated flow control values
+	 */
+	reg |= E1000_PCS_LCTL_FORCE_FCTRL;
+
+	/*
+	 * we always set sgmii to autoneg since it is the phy that will be
+	 * forcing the link and the serdes is just a go-between
+	 */
+	if (hw->mac.autoneg || igb_sgmii_active_82575(hw)) {
+		/* Set PCS register for autoneg */
+		reg |= E1000_PCS_LCTL_FSV_1000 |  /* Force 1000 */
+		       E1000_PCS_LCTL_FDV_FULL |  /* SerDes Full dplx */
+		       E1000_PCS_LCTL_AN_ENABLE | /* Enable Autoneg */
+		       E1000_PCS_LCTL_AN_RESTART; /* Restart autoneg */
+		DEBUGOUT1("Configuring Autoneg:PCS_LCTL=0x%08X\n", reg);
+	} else {
+		/* Check for duplex first */
+		if (hw->mac.forced_speed_duplex & E1000_ALL_FULL_DUPLEX)
+			reg |= E1000_PCS_LCTL_FDV_FULL;
+
+		/* No need to check for 1000/full since the spec states that
+		 * it requires autoneg to be enabled */
+		/* Now set speed */
+		if (hw->mac.forced_speed_duplex & E1000_ALL_100_SPEED)
+			reg |= E1000_PCS_LCTL_FSV_100;
+
+		/* Force speed and force link */
+		reg |= E1000_PCS_LCTL_FSD |
+		       E1000_PCS_LCTL_FORCE_LINK |
+		       E1000_PCS_LCTL_FLV_LINK_UP;
+
+		DEBUGOUT1("Configuring Forced Link:PCS_LCTL=0x%08X\n", reg);
+	}
+
+	E1000_WRITE_REG(hw, E1000_PCS_LCTL, reg);
+
+	if (!igb_sgmii_active_82575(hw))
+		igb_force_mac_fc_generic(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_valid_led_default_82575 - Verify a valid default LED config
+ *  @hw: pointer to the HW structure
+ *  @data: pointer to the NVM (EEPROM)
+ *
+ *  Read the EEPROM for the current default LED configuration.  If the
+ *  LED configuration is not valid, set to a valid LED configuration.
+ **/
+static s32 igb_valid_led_default_82575(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("igb_valid_led_default_82575");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
+		switch(hw->phy.media_type) {
+		case e1000_media_type_internal_serdes:
+			*data = ID_LED_DEFAULT_82575_SERDES;
+			break;
+		case e1000_media_type_copper:
+		default:
+			*data = ID_LED_DEFAULT;
+			break;
+		}
+	}
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_sgmii_active_82575 - Return sgmii state
+ *  @hw: pointer to the HW structure
+ *
+ *  82575 silicon has a serialized gigabit media independent interface (sgmii)
+ *  which can be enabled for use in the embedded applications.  Simply
+ *  return the current state of the sgmii interface.
+ **/
+static bool igb_sgmii_active_82575(struct e1000_hw *hw)
+{
+	struct e1000_dev_spec_82575 *dev_spec = &hw->dev_spec._82575;
+	return dev_spec->sgmii_active;
+}
+
+/**
+ *  igb_reset_init_script_82575 - Inits HW defaults after reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Inits recommended HW defaults after a reset when there is no EEPROM
+ *  detected. This is only for the 82575.
+ **/
+static s32 igb_reset_init_script_82575(struct e1000_hw* hw)
+{
+	DEBUGFUNC("igb_reset_init_script_82575");
+
+	if (hw->mac.type == e1000_82575) {
+		DEBUGOUT("Running reset init script for 82575\n");
+		/* SerDes configuration via SERDESCTRL */
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x00, 0x0C);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x01, 0x78);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x1B, 0x23);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCTL, 0x23, 0x15);
+
+		/* CCM configuration via CCMCTL register */
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x14, 0x00);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_CCMCTL, 0x10, 0x00);
+
+		/* PCIe lanes configuration */
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x00, 0xEC);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x61, 0xDF);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x34, 0x05);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_GIOCTL, 0x2F, 0x81);
+
+		/* PCIe PLL Configuration */
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x02, 0x47);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x14, 0x00);
+		igb_write_8bit_ctrl_reg_generic(hw, E1000_SCCTL, 0x10, 0x00);
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_read_mac_addr_82575 - Read device MAC address
+ *  @hw: pointer to the HW structure
+ **/
+static s32 igb_read_mac_addr_82575(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_read_mac_addr_82575");
+
+	/*
+	 * If there's an alternate MAC address place it in RAR0
+	 * so that it will override the Si installed default perm
+	 * address.
+	 */
+	ret_val = igb_check_alt_mac_addr_generic(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_read_mac_addr_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ * igb_power_down_phy_copper_82575 - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+static void igb_power_down_phy_copper_82575(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	struct e1000_mac_info *mac = &hw->mac;
+
+	if (!(phy->ops.check_reset_block))
+		return;
+
+	/* If the management interface is not enabled, then power down */
+	if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw)))
+		igb_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  igb_clear_hw_cntrs_82575 - Clear device specific hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the hardware counters by reading the counter registers.
+ **/
+static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw)
+{
+	DEBUGFUNC("igb_clear_hw_cntrs_82575");
+
+	igb_clear_hw_cntrs_base_generic(hw);
+
+	E1000_READ_REG(hw, E1000_PRC64);
+	E1000_READ_REG(hw, E1000_PRC127);
+	E1000_READ_REG(hw, E1000_PRC255);
+	E1000_READ_REG(hw, E1000_PRC511);
+	E1000_READ_REG(hw, E1000_PRC1023);
+	E1000_READ_REG(hw, E1000_PRC1522);
+	E1000_READ_REG(hw, E1000_PTC64);
+	E1000_READ_REG(hw, E1000_PTC127);
+	E1000_READ_REG(hw, E1000_PTC255);
+	E1000_READ_REG(hw, E1000_PTC511);
+	E1000_READ_REG(hw, E1000_PTC1023);
+	E1000_READ_REG(hw, E1000_PTC1522);
+
+	E1000_READ_REG(hw, E1000_ALGNERRC);
+	E1000_READ_REG(hw, E1000_RXERRC);
+	E1000_READ_REG(hw, E1000_TNCRS);
+	E1000_READ_REG(hw, E1000_CEXTERR);
+	E1000_READ_REG(hw, E1000_TSCTC);
+	E1000_READ_REG(hw, E1000_TSCTFC);
+
+	E1000_READ_REG(hw, E1000_MGTPRC);
+	E1000_READ_REG(hw, E1000_MGTPDC);
+	E1000_READ_REG(hw, E1000_MGTPTC);
+
+	E1000_READ_REG(hw, E1000_IAC);
+	E1000_READ_REG(hw, E1000_ICRXOC);
+
+	E1000_READ_REG(hw, E1000_ICRXPTC);
+	E1000_READ_REG(hw, E1000_ICRXATC);
+	E1000_READ_REG(hw, E1000_ICTXPTC);
+	E1000_READ_REG(hw, E1000_ICTXATC);
+	E1000_READ_REG(hw, E1000_ICTXQEC);
+	E1000_READ_REG(hw, E1000_ICTXQMTC);
+	E1000_READ_REG(hw, E1000_ICRXDMTC);
+
+	E1000_READ_REG(hw, E1000_CBTMPC);
+	E1000_READ_REG(hw, E1000_HTDPMC);
+	E1000_READ_REG(hw, E1000_CBRMPC);
+	E1000_READ_REG(hw, E1000_RPTHC);
+	E1000_READ_REG(hw, E1000_HGPTC);
+	E1000_READ_REG(hw, E1000_HTCBDPC);
+	E1000_READ_REG(hw, E1000_HGORCL);
+	E1000_READ_REG(hw, E1000_HGORCH);
+	E1000_READ_REG(hw, E1000_HGOTCL);
+	E1000_READ_REG(hw, E1000_HGOTCH);
+	E1000_READ_REG(hw, E1000_LENERRS);
+
+	/* This register should not be read in copper configurations */
+	if ((hw->phy.media_type == e1000_media_type_internal_serdes) ||
+	    igb_sgmii_active_82575(hw))
+		E1000_READ_REG(hw, E1000_SCVPC);
+}
+
+/**
+ *  igb_rx_fifo_flush_82575 - Clean rx fifo after RX enable
+ *  @hw: pointer to the HW structure
+ *
+ *  After rx enable if managability is enabled then there is likely some
+ *  bad data at the start of the fifo and possibly in the DMA fifo.  This
+ *  function clears the fifos and flushes any packets that came in as rx was
+ *  being enabled.
+ **/
+void igb_rx_fifo_flush_82575(struct e1000_hw *hw)
+{
+	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
+	int i, ms_wait;
+
+	DEBUGFUNC("igb_rx_fifo_workaround_82575");
+	if (hw->mac.type != e1000_82575 ||
+	    !(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
+		return;
+
+	/* Disable all RX queues */
+	for (i = 0; i < 4; i++) {
+		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
+		                rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
+	}
+	/* Poll all queues to verify they have shut down */
+	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
+		msec_delay(1);
+		rx_enabled = 0;
+		for (i = 0; i < 4; i++)
+			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
+		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
+			break;
+	}
+
+	if (ms_wait == 10) {
+		DEBUGOUT("Queue disable timed out after 10ms\n");
+        }
+	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
+	 * incoming packets are rejected.  Set enable and wait 2ms so that
+	 * any packet that was coming in as RCTL.EN was set is flushed
+	 */
+	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
+
+	rlpml = E1000_READ_REG(hw, E1000_RLPML);
+	E1000_WRITE_REG(hw, E1000_RLPML, 0);
+
+	rctl = E1000_READ_REG(hw, E1000_RCTL);
+	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
+	temp_rctl |= E1000_RCTL_LPE;
+
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(2);
+
+	/* Enable RX queues that were previously enabled and restore our
+	 * previous state
+	 */
+	for (i = 0; i < 4; i++)
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
+	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+	E1000_WRITE_FLUSH(hw);
+
+	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	/* Flush receive errors generated by workaround */
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_MPC);
+}
+
+/**
+ *  igb_set_pcie_completion_timeout - set pci-e completion timeout
+ *  @hw: pointer to the HW structure
+ *
+ *  The defaults for 82575 and 82576 should be in the range of 50us to 50ms,
+ *  however the hardware default for these parts is 500us to 1ms which is less
+ *  than the 10ms recommended by the pci-e spec.  To address this we need to
+ *  increase the value to either 10ms to 200ms for capability version 1 config,
+ *  or 16ms to 55ms for version 2.
+ **/
+static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw)
+{
+	u32 gcr = E1000_READ_REG(hw, E1000_GCR);
+	s32 ret_val = E1000_SUCCESS;
+	u16 pcie_devctl2;
+
+	/* only take action if timeout value is defaulted to 0 */
+	if (gcr & E1000_GCR_CMPL_TMOUT_MASK)
+		goto out;
+
+	/*
+	 * if capababilities version is type 1 we can write the
+	 * timeout of 10ms to 200ms through the GCR register
+	 */
+	if (!(gcr & E1000_GCR_CAP_VER2)) {
+		gcr |= E1000_GCR_CMPL_TMOUT_10ms;
+		goto out;
+	}
+
+	/*
+	 * for version 2 capabilities we need to write the config space
+	 * directly in order to set the completion timeout value for
+	 * 16ms to 55ms
+	 */
+	ret_val = igb_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
+	                                  &pcie_devctl2);
+	if (ret_val)
+		goto out;
+
+	pcie_devctl2 |= PCIE_DEVICE_CONTROL2_16ms;
+
+	ret_val = igb_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
+	                                   &pcie_devctl2);
+out:
+	/* disable completion timeout resend */
+	gcr &= ~E1000_GCR_CMPL_TMOUT_RESEND;
+
+	E1000_WRITE_REG(hw, E1000_GCR, gcr);
+	return ret_val;
+}
+
+/**
+ *  igb_vmdq_set_loopback_pf - enable or disable vmdq loopback
+ *  @hw: pointer to the hardware struct
+ *  @enable: state to enter, either enabled or disabled
+ *
+ *  enables/disables L2 switch loopback functionality.
+ **/
+void igb_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable)
+{
+	u32 dtxswc = E1000_READ_REG(hw, E1000_DTXSWC);
+
+	if (enable)
+		dtxswc |= E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+	else
+		dtxswc &= ~E1000_DTXSWC_VMDQ_LOOPBACK_EN;
+
+	E1000_WRITE_REG(hw, E1000_DTXSWC, dtxswc);
+}
+
+/**
+ *  igb_vmdq_set_replication_pf - enable or disable vmdq replication
+ *  @hw: pointer to the hardware struct
+ *  @enable: state to enter, either enabled or disabled
+ *
+ *  enables/disables replication of packets across multiple pools.
+ **/
+void igb_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable)
+{
+	u32 vt_ctl = E1000_READ_REG(hw, E1000_VT_CTL);
+
+	if (enable)
+		vt_ctl |= E1000_VT_CTL_VM_REPL_EN;
+	else
+		vt_ctl &= ~E1000_VT_CTL_VM_REPL_EN;
+
+	E1000_WRITE_REG(hw, E1000_VT_CTL, vt_ctl);
+}
+
+static struct pci_device_id igb_82575_nics[] = {
+        PCI_ROM(0x8086, 0x10C9, "E1000_DEV_ID_82576", "E1000_DEV_ID_82576", 0),
+        PCI_ROM(0x8086, 0x150A, "E1000_DEV_ID_82576_NS", "E1000_DEV_ID_82576_NS", 0),
+        PCI_ROM(0x8086, 0x1518, "E1000_DEV_ID_82576_NS_SERDES", "E1000_DEV_ID_82576_NS_SERDES", 0),
+        PCI_ROM(0x8086, 0x10E6, "E1000_DEV_ID_82576_FIBER", "E1000_DEV_ID_82576_FIBER", 0),
+        PCI_ROM(0x8086, 0x10E7, "E1000_DEV_ID_82576_SERDES", "E1000_DEV_ID_82576_SERDES", 0),
+        PCI_ROM(0x8086, 0x150D, "E1000_DEV_ID_82576_SERDES_QUAD", "E1000_DEV_ID_82576_SERDES_QUAD", 0),
+        PCI_ROM(0x8086, 0x10E8, "E1000_DEV_ID_82576_QUAD_COPPER", "E1000_DEV_ID_82576_QUAD_COPPER", 0),
+        PCI_ROM(0x8086, 0x10A7, "E1000_DEV_ID_82575EB_COPPER", "E1000_DEV_ID_82575EB_COPPER", 0),
+        PCI_ROM(0x8086, 0x10A9, "E1000_DEV_ID_82575EB_FIBER_SERDES", "E1000_DEV_ID_82575EB_FIBER_SERDES", 0),
+        PCI_ROM(0x8086, 0x10D6, "E1000_DEV_ID_82575GB_QUAD_COPPER", "E1000_DEV_ID_82575GB_QUAD_COPPER", 0),
+};
+
+struct pci_driver igb_82575_driver __pci_driver = {
+        .ids = igb_82575_nics,
+        .id_count = (sizeof (igb_82575_nics) / sizeof (igb_82575_nics[0])),
+        .probe = igb_probe,
+        .remove = igb_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_82575.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_82575.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_82575.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_82575.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,442 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_82575_H_
+#define _IGB_82575_H_
+
+#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \
+                                     (ID_LED_DEF1_DEF2 <<  8) | \
+                                     (ID_LED_DEF1_DEF2 <<  4) | \
+                                     (ID_LED_OFF1_ON2))
+/*
+ * Receive Address Register Count
+ * Number of high/low register pairs in the RAR.  The RAR (Receive Address
+ * Registers) holds the directed and multicast addresses that we monitor.
+ * These entries are also used for MAC-based filtering.
+ */
+/*
+ * For 82576, there are an additional set of RARs that begin at an offset
+ * separate from the first set of RARs.
+ */
+#define E1000_RAR_ENTRIES_82575   16
+#define E1000_RAR_ENTRIES_82576   24
+
+struct e1000_adv_data_desc {
+	__le64 buffer_addr;    /* Address of the descriptor's data buffer */
+	union {
+		u32 data;
+		struct {
+			u32 datalen :16; /* Data buffer length */
+			u32 rsvd    :4;
+			u32 dtyp    :4;  /* Descriptor type */
+			u32 dcmd    :8;  /* Descriptor command */
+		} config;
+	} lower;
+	union {
+		u32 data;
+		struct {
+			u32 status  :4;  /* Descriptor status */
+			u32 idx     :4;
+			u32 popts   :6;  /* Packet Options */
+			u32 paylen  :18; /* Payload length */
+		} options;
+	} upper;
+};
+
+#define E1000_TXD_DTYP_ADV_C    0x2  /* Advanced Context Descriptor */
+#define E1000_TXD_DTYP_ADV_D    0x3  /* Advanced Data Descriptor */
+#define E1000_ADV_TXD_CMD_DEXT  0x20 /* Descriptor extension (0 = legacy) */
+#define E1000_ADV_TUCMD_IPV4    0x2  /* IP Packet Type: 1=IPv4 */
+#define E1000_ADV_TUCMD_IPV6    0x0  /* IP Packet Type: 0=IPv6 */
+#define E1000_ADV_TUCMD_L4T_UDP 0x0  /* L4 Packet TYPE of UDP */
+#define E1000_ADV_TUCMD_L4T_TCP 0x4  /* L4 Packet TYPE of TCP */
+#define E1000_ADV_TUCMD_MKRREQ  0x10 /* Indicates markers are required */
+#define E1000_ADV_DCMD_EOP      0x1  /* End of Packet */
+#define E1000_ADV_DCMD_IFCS     0x2  /* Insert FCS (Ethernet CRC) */
+#define E1000_ADV_DCMD_RS       0x8  /* Report Status */
+#define E1000_ADV_DCMD_VLE      0x40 /* Add VLAN tag */
+#define E1000_ADV_DCMD_TSE      0x80 /* TCP Seg enable */
+/* Extended Device Control */
+#define E1000_CTRL_EXT_NSICR    0x00000001 /* Disable Intr Clear all on read */
+
+struct e1000_adv_context_desc {
+	union {
+		u32 ip_config;
+		struct {
+			u32 iplen    :9;
+			u32 maclen   :7;
+			u32 vlan_tag :16;
+		} fields;
+	} ip_setup;
+	u32 seq_num;
+	union {
+		u64 l4_config;
+		struct {
+			u32 mkrloc :9;
+			u32 tucmd  :11;
+			u32 dtyp   :4;
+			u32 adv    :8;
+			u32 rsvd   :4;
+			u32 idx    :4;
+			u32 l4len  :8;
+			u32 mss    :16;
+		} fields;
+	} l4_setup;
+};
+
+/* SRRCTL bit definitions */
+#define E1000_SRRCTL_BSIZEPKT_SHIFT                     10 /* Shift _right_ */
+#define E1000_SRRCTL_BSIZEHDRSIZE_MASK                  0x00000F00
+#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT                 2  /* Shift _left_ */
+#define E1000_SRRCTL_DESCTYPE_LEGACY                    0x00000000
+#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF                0x02000000
+#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT                 0x04000000
+#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS          0x0A000000
+#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION           0x06000000
+#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION_LARGE_PKT 0x08000000
+#define E1000_SRRCTL_DESCTYPE_MASK                      0x0E000000
+#define E1000_SRRCTL_DROP_EN                            0x80000000
+
+#define E1000_SRRCTL_BSIZEPKT_MASK      0x0000007F
+#define E1000_SRRCTL_BSIZEHDR_MASK      0x00003F00
+
+#define E1000_TX_HEAD_WB_ENABLE   0x1
+#define E1000_TX_SEQNUM_WB_ENABLE 0x2
+
+#define E1000_MRQC_ENABLE_RSS_4Q            0x00000002
+#define E1000_MRQC_ENABLE_VMDQ              0x00000003
+#define E1000_MRQC_ENABLE_VMDQ_RSS_2Q       0x00000005
+#define E1000_MRQC_RSS_FIELD_IPV4_UDP       0x00400000
+#define E1000_MRQC_RSS_FIELD_IPV6_UDP       0x00800000
+#define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX    0x01000000
+
+#define E1000_VMRCTL_MIRROR_PORT_SHIFT      8
+#define E1000_VMRCTL_MIRROR_DSTPORT_MASK    (7 << E1000_VMRCTL_MIRROR_PORT_SHIFT)
+#define E1000_VMRCTL_POOL_MIRROR_ENABLE     (1 << 0)
+#define E1000_VMRCTL_UPLINK_MIRROR_ENABLE   (1 << 1)
+#define E1000_VMRCTL_DOWNLINK_MIRROR_ENABLE (1 << 2)
+
+#define E1000_EICR_TX_QUEUE ( \
+    E1000_EICR_TX_QUEUE0 |    \
+    E1000_EICR_TX_QUEUE1 |    \
+    E1000_EICR_TX_QUEUE2 |    \
+    E1000_EICR_TX_QUEUE3)
+
+#define E1000_EICR_RX_QUEUE ( \
+    E1000_EICR_RX_QUEUE0 |    \
+    E1000_EICR_RX_QUEUE1 |    \
+    E1000_EICR_RX_QUEUE2 |    \
+    E1000_EICR_RX_QUEUE3)
+
+#define E1000_EIMS_RX_QUEUE E1000_EICR_RX_QUEUE
+#define E1000_EIMS_TX_QUEUE E1000_EICR_TX_QUEUE
+
+#define EIMS_ENABLE_MASK ( \
+    E1000_EIMS_RX_QUEUE  | \
+    E1000_EIMS_TX_QUEUE  | \
+    E1000_EIMS_TCP_TIMER | \
+    E1000_EIMS_OTHER)
+
+/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIR_PORT_IM_EN     0x00010000  /* TCP port enable */
+#define E1000_IMIR_PORT_BP        0x00020000  /* TCP port check bypass */
+#define E1000_IMIREXT_SIZE_BP     0x00001000  /* Packet size bypass */
+#define E1000_IMIREXT_CTRL_URG    0x00002000  /* Check URG bit in header */
+#define E1000_IMIREXT_CTRL_ACK    0x00004000  /* Check ACK bit in header */
+#define E1000_IMIREXT_CTRL_PSH    0x00008000  /* Check PSH bit in header */
+#define E1000_IMIREXT_CTRL_RST    0x00010000  /* Check RST bit in header */
+#define E1000_IMIREXT_CTRL_SYN    0x00020000  /* Check SYN bit in header */
+#define E1000_IMIREXT_CTRL_FIN    0x00040000  /* Check FIN bit in header */
+#define E1000_IMIREXT_CTRL_BP     0x00080000  /* Bypass check of ctrl bits */
+
+/* Receive Descriptor - Advanced */
+union e1000_adv_rx_desc {
+	struct {
+		__le64 pkt_addr;             /* Packet buffer address */
+		__le64 hdr_addr;             /* Header buffer address */
+	} read;
+	struct {
+		struct {
+			union {
+				__le32 data;
+				struct {
+					__le16 pkt_info; /*RSS type, Pkt type*/
+					__le16 hdr_info; /* Split Header,
+							  * header buffer len*/
+				} hs_rss;
+			} lo_dword;
+			union {
+				__le32 rss;          /* RSS Hash */
+				struct {
+					__le16 ip_id;    /* IP id */
+					__le16 csum;     /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;     /* ext status/error */
+			__le16 length;           /* Packet length */
+			__le16 vlan;             /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+#define E1000_RXDADV_RSSTYPE_MASK        0x0000000F
+#define E1000_RXDADV_RSSTYPE_SHIFT       12
+#define E1000_RXDADV_HDRBUFLEN_MASK      0x7FE0
+#define E1000_RXDADV_HDRBUFLEN_SHIFT     5
+#define E1000_RXDADV_SPLITHEADER_EN      0x00001000
+#define E1000_RXDADV_SPH                 0x8000
+#define E1000_RXDADV_STAT_TS             0x10000 /* Pkt was time stamped */
+#define E1000_RXDADV_ERR_HBO             0x00800000
+
+/* RSS Hash results */
+#define E1000_RXDADV_RSSTYPE_NONE        0x00000000
+#define E1000_RXDADV_RSSTYPE_IPV4_TCP    0x00000001
+#define E1000_RXDADV_RSSTYPE_IPV4        0x00000002
+#define E1000_RXDADV_RSSTYPE_IPV6_TCP    0x00000003
+#define E1000_RXDADV_RSSTYPE_IPV6_EX     0x00000004
+#define E1000_RXDADV_RSSTYPE_IPV6        0x00000005
+#define E1000_RXDADV_RSSTYPE_IPV6_TCP_EX 0x00000006
+#define E1000_RXDADV_RSSTYPE_IPV4_UDP    0x00000007
+#define E1000_RXDADV_RSSTYPE_IPV6_UDP    0x00000008
+#define E1000_RXDADV_RSSTYPE_IPV6_UDP_EX 0x00000009
+
+/* RSS Packet Types as indicated in the receive descriptor */
+#define E1000_RXDADV_PKTTYPE_NONE        0x00000000
+#define E1000_RXDADV_PKTTYPE_IPV4        0x00000010 /* IPV4 hdr present */
+#define E1000_RXDADV_PKTTYPE_IPV4_EX     0x00000020 /* IPV4 hdr + extensions */
+#define E1000_RXDADV_PKTTYPE_IPV6        0x00000040 /* IPV6 hdr present */
+#define E1000_RXDADV_PKTTYPE_IPV6_EX     0x00000080 /* IPV6 hdr + extensions */
+#define E1000_RXDADV_PKTTYPE_TCP         0x00000100 /* TCP hdr present */
+#define E1000_RXDADV_PKTTYPE_UDP         0x00000200 /* UDP hdr present */
+#define E1000_RXDADV_PKTTYPE_SCTP        0x00000400 /* SCTP hdr present */
+#define E1000_RXDADV_PKTTYPE_NFS         0x00000800 /* NFS hdr present */
+
+#define E1000_RXDADV_PKTTYPE_IPSEC_ESP   0x00001000 /* IPSec ESP */
+#define E1000_RXDADV_PKTTYPE_IPSEC_AH    0x00002000 /* IPSec AH */
+#define E1000_RXDADV_PKTTYPE_LINKSEC     0x00004000 /* LinkSec Encap */
+#define E1000_RXDADV_PKTTYPE_ETQF        0x00008000 /* PKTTYPE is ETQF index */
+#define E1000_RXDADV_PKTTYPE_ETQF_MASK   0x00000070 /* ETQF has 8 indices */
+#define E1000_RXDADV_PKTTYPE_ETQF_SHIFT  4          /* Right-shift 4 bits */
+
+/* LinkSec results */
+/* Security Processing bit Indication */
+#define E1000_RXDADV_LNKSEC_STATUS_SECP         0x00020000
+#define E1000_RXDADV_LNKSEC_ERROR_BIT_MASK      0x18000000
+#define E1000_RXDADV_LNKSEC_ERROR_NO_SA_MATCH   0x08000000
+#define E1000_RXDADV_LNKSEC_ERROR_REPLAY_ERROR  0x10000000
+#define E1000_RXDADV_LNKSEC_ERROR_BAD_SIG       0x18000000
+
+#define E1000_RXDADV_IPSEC_STATUS_SECP          0x00020000
+#define E1000_RXDADV_IPSEC_ERROR_BIT_MASK       0x18000000
+#define E1000_RXDADV_IPSEC_ERROR_INVALID_PROTOCOL       0x08000000
+#define E1000_RXDADV_IPSEC_ERROR_INVALID_LENGTH         0x10000000
+#define E1000_RXDADV_IPSEC_ERROR_AUTHENTICATION_FAILED  0x18000000
+
+/* Transmit Descriptor - Advanced */
+union e1000_adv_tx_desc {
+	struct {
+		__le64 buffer_addr;    /* Address of descriptor's data buf */
+		__le32 cmd_type_len;
+		__le32 olinfo_status;
+	} read;
+	struct {
+		__le64 rsvd;       /* Reserved */
+		__le32 nxtseq_seed;
+		__le32 status;
+	} wb;
+};
+
+/* Adv Transmit Descriptor Config Masks */
+#define E1000_ADVTXD_DTYP_CTXT    0x00200000 /* Advanced Context Descriptor */
+#define E1000_ADVTXD_DTYP_DATA    0x00300000 /* Advanced Data Descriptor */
+#define E1000_ADVTXD_DCMD_EOP     0x01000000 /* End of Packet */
+#define E1000_ADVTXD_DCMD_IFCS    0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_ADVTXD_DCMD_RS      0x08000000 /* Report Status */
+#define E1000_ADVTXD_DCMD_DDTYP_ISCSI  0x10000000 /* DDP hdr type or iSCSI */
+#define E1000_ADVTXD_DCMD_DEXT    0x20000000 /* Descriptor extension (1=Adv) */
+#define E1000_ADVTXD_DCMD_VLE     0x40000000 /* VLAN pkt enable */
+#define E1000_ADVTXD_DCMD_TSE     0x80000000 /* TCP Seg enable */
+#define E1000_ADVTXD_MAC_LINKSEC  0x00040000 /* Apply LinkSec on packet */
+#define E1000_ADVTXD_MAC_TSTAMP   0x00080000 /* IEEE1588 Timestamp packet */
+#define E1000_ADVTXD_STAT_SN_CRC  0x00000002 /* NXTSEQ/SEED present in WB */
+#define E1000_ADVTXD_IDX_SHIFT    4  /* Adv desc Index shift */
+#define E1000_ADVTXD_POPTS_ISCO_1ST  0x00000000 /* 1st TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_MDL  0x00000800 /* Middle TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_FULL 0x00001800 /* 1st&Last TSO-full iSCSI PDU*/
+#define E1000_ADVTXD_POPTS_IPSEC     0x00000400 /* IPSec offload request */
+#define E1000_ADVTXD_PAYLEN_SHIFT    14 /* Adv desc PAYLEN shift */
+
+/* Context descriptors */
+struct e1000_adv_tx_context_desc {
+	__le32 vlan_macip_lens;
+	__le32 seqnum_seed;
+	__le32 type_tucmd_mlhl;
+	__le32 mss_l4len_idx;
+};
+
+#define E1000_ADVTXD_MACLEN_SHIFT    9  /* Adv ctxt desc mac len shift */
+#define E1000_ADVTXD_VLAN_SHIFT     16  /* Adv ctxt vlan tag shift */
+#define E1000_ADVTXD_TUCMD_IPV4    0x00000400  /* IP Packet Type: 1=IPv4 */
+#define E1000_ADVTXD_TUCMD_IPV6    0x00000000  /* IP Packet Type: 0=IPv6 */
+#define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000  /* L4 Packet TYPE of UDP */
+#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800  /* L4 Packet TYPE of TCP */
+#define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000  /* L4 Packet TYPE of SCTP */
+#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP    0x00002000 /* IPSec Type ESP */
+/* IPSec Encrypt Enable for ESP */
+#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN  0x00004000
+#define E1000_ADVTXD_TUCMD_MKRREQ  0x00002000 /* Req requires Markers and CRC */
+#define E1000_ADVTXD_L4LEN_SHIFT     8  /* Adv ctxt L4LEN shift */
+#define E1000_ADVTXD_MSS_SHIFT      16  /* Adv ctxt MSS shift */
+/* Adv ctxt IPSec SA IDX mask */
+#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK     0x000000FF
+/* Adv ctxt IPSec ESP len mask */
+#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK      0x000000FF
+
+/* Additional Transmit Descriptor Control definitions */
+#define E1000_TXDCTL_QUEUE_ENABLE  0x02000000 /* Enable specific Tx Queue */
+#define E1000_TXDCTL_SWFLSH        0x04000000 /* Tx Desc. write-back flushing */
+/* Tx Queue Arbitration Priority 0=low, 1=high */
+#define E1000_TXDCTL_PRIORITY      0x08000000
+
+/* Additional Receive Descriptor Control definitions */
+#define E1000_RXDCTL_QUEUE_ENABLE  0x02000000 /* Enable specific Rx Queue */
+#define E1000_RXDCTL_SWFLSH        0x04000000 /* Rx Desc. write-back flushing */
+
+/* Direct Cache Access (DCA) definitions */
+#define E1000_DCA_CTRL_DCA_ENABLE  0x00000000 /* DCA Enable */
+#define E1000_DCA_CTRL_DCA_DISABLE 0x00000001 /* DCA Disable */
+
+#define E1000_DCA_CTRL_DCA_MODE_CB1 0x00 /* DCA Mode CB1 */
+#define E1000_DCA_CTRL_DCA_MODE_CB2 0x02 /* DCA Mode CB2 */
+
+#define E1000_DCA_RXCTRL_CPUID_MASK 0x0000001F /* Rx CPUID Mask */
+#define E1000_DCA_RXCTRL_DESC_DCA_EN (1 << 5) /* DCA Rx Desc enable */
+#define E1000_DCA_RXCTRL_HEAD_DCA_EN (1 << 6) /* DCA Rx Desc header enable */
+#define E1000_DCA_RXCTRL_DATA_DCA_EN (1 << 7) /* DCA Rx Desc payload enable */
+
+#define E1000_DCA_TXCTRL_CPUID_MASK 0x0000001F /* Tx CPUID Mask */
+#define E1000_DCA_TXCTRL_DESC_DCA_EN (1 << 5) /* DCA Tx Desc enable */
+#define E1000_DCA_TXCTRL_TX_WB_RO_EN (1 << 11) /* Tx Desc writeback RO bit */
+
+#define E1000_DCA_TXCTRL_CPUID_MASK_82576 0xFF000000 /* Tx CPUID Mask */
+#define E1000_DCA_RXCTRL_CPUID_MASK_82576 0xFF000000 /* Rx CPUID Mask */
+#define E1000_DCA_TXCTRL_CPUID_SHIFT_82576 24 /* Tx CPUID */
+#define E1000_DCA_RXCTRL_CPUID_SHIFT_82576 24 /* Rx CPUID */
+
+/* Additional interrupt register bit definitions */
+#define E1000_ICR_LSECPNS       0x00000020          /* PN threshold - server */
+#define E1000_IMS_LSECPNS       E1000_ICR_LSECPNS   /* PN threshold - server */
+#define E1000_ICS_LSECPNS       E1000_ICR_LSECPNS   /* PN threshold - server */
+
+/* ETQF register bit definitions */
+#define E1000_ETQF_FILTER_ENABLE   (1 << 26)
+#define E1000_ETQF_IMM_INT         (1 << 29)
+#define E1000_ETQF_1588            (1 << 30)
+#define E1000_ETQF_QUEUE_ENABLE    (1 << 31)
+/*
+ * ETQF filter list: one static filter per filter consumer. This is
+ *                   to avoid filter collisions later. Add new filters
+ *                   here!!
+ *
+ * Current filters:
+ *    EAPOL 802.1x (0x888e): Filter 0
+ */
+#define E1000_ETQF_FILTER_EAPOL          0
+
+#define E1000_FTQF_VF_BP               0x00008000
+#define E1000_FTQF_1588_TIME_STAMP     0x08000000
+#define E1000_FTQF_MASK                0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP       0x10000000
+#define E1000_FTQF_MASK_SOURCE_ADDR_BP 0x20000000
+#define E1000_FTQF_MASK_DEST_ADDR_BP   0x40000000
+#define E1000_FTQF_MASK_SOURCE_PORT_BP 0x80000000
+
+#define E1000_NVM_APME_82575          0x0400
+#define MAX_NUM_VFS                   8
+
+#define E1000_DTXSWC_MAC_SPOOF_MASK   0x000000FF /* Per VF MAC spoof control */
+#define E1000_DTXSWC_VLAN_SPOOF_MASK  0x0000FF00 /* Per VF VLAN spoof control */
+#define E1000_DTXSWC_LLE_MASK         0x00FF0000 /* Per VF Local LB enables */
+#define E1000_DTXSWC_VLAN_SPOOF_SHIFT 8
+#define E1000_DTXSWC_LLE_SHIFT        16
+#define E1000_DTXSWC_VMDQ_LOOPBACK_EN (1 << 31)  /* global VF LB enable */
+
+/* Easy defines for setting default pool, would normally be left a zero */
+#define E1000_VT_CTL_DEFAULT_POOL_SHIFT 7
+#define E1000_VT_CTL_DEFAULT_POOL_MASK  (0x7 << E1000_VT_CTL_DEFAULT_POOL_SHIFT)
+
+/* Other useful VMD_CTL register defines */
+#define E1000_VT_CTL_IGNORE_MAC         (1 << 28)
+#define E1000_VT_CTL_DISABLE_DEF_POOL   (1 << 29)
+#define E1000_VT_CTL_VM_REPL_EN         (1 << 30)
+
+/* Per VM Offload register setup */
+#define E1000_VMOLR_RLPML_MASK 0x00003FFF /* Long Packet Maximum Length mask */
+#define E1000_VMOLR_LPE        0x00010000 /* Accept Long packet */
+#define E1000_VMOLR_RSSE       0x00020000 /* Enable RSS */
+#define E1000_VMOLR_AUPE       0x01000000 /* Accept untagged packets */
+#define E1000_VMOLR_ROMPE      0x02000000 /* Accept overflow multicast */
+#define E1000_VMOLR_ROPE       0x04000000 /* Accept overflow unicast */
+#define E1000_VMOLR_BAM        0x08000000 /* Accept Broadcast packets */
+#define E1000_VMOLR_MPME       0x10000000 /* Multicast promiscuous mode */
+#define E1000_VMOLR_STRVLAN    0x40000000 /* Vlan stripping enable */
+#define E1000_VMOLR_STRCRC     0x80000000 /* CRC stripping enable */
+
+#define E1000_VLVF_ARRAY_SIZE     32
+#define E1000_VLVF_VLANID_MASK    0x00000FFF
+#define E1000_VLVF_POOLSEL_SHIFT  12
+#define E1000_VLVF_POOLSEL_MASK   (0xFF << E1000_VLVF_POOLSEL_SHIFT)
+#define E1000_VLVF_LVLAN          0x00100000
+#define E1000_VLVF_VLANID_ENABLE  0x80000000
+
+#define E1000_VF_INIT_TIMEOUT 200 /* Number of retries to clear RSTI */
+
+#define E1000_IOVCTL 0x05BBC
+#define E1000_IOVCTL_REUSE_VFQ 0x00000001
+
+#define E1000_RPLOLR_STRVLAN   0x40000000
+#define E1000_RPLOLR_STRCRC    0x80000000
+
+#define E1000_DTXCTL_8023LL     0x0004
+#define E1000_DTXCTL_VLAN_ADDED 0x0008
+#define E1000_DTXCTL_OOS_ENABLE 0x0010
+#define E1000_DTXCTL_MDP_EN     0x0020
+#define E1000_DTXCTL_SPOOF_INT  0x0040
+
+#define ALL_QUEUES   0xFFFF
+
+/* RX packet buffer size defines */
+#define E1000_RXPBS_SIZE_MASK_82576  0x0000007F
+void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);
+void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);
+
+#endif /* _IGB_82575_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_api.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_api.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_api.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_api.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1108 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+/**
+ *  igb_init_mac_params - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the MAC
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 igb_init_mac_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mac.ops.init_params) {
+		ret_val = hw->mac.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("MAC Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("mac.init_mac_params was NULL\n");
+		ret_val = -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_init_nvm_params - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the NVM
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 igb_init_nvm_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->nvm.ops.init_params) {
+		ret_val = hw->nvm.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("NVM Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("nvm.init_nvm_params was NULL\n");
+		ret_val = -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_init_phy_params - Initialize PHY function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the PHY
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 igb_init_phy_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->phy.ops.init_params) {
+		ret_val = hw->phy.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("PHY Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("phy.init_phy_params was NULL\n");
+		ret_val =  -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  igb_init_mbx_params - Initialize mailbox function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function initializes the function pointers for the PHY
+ *  set of functions.  Called by drivers or by e1000_setup_init_funcs.
+ **/
+s32 igb_init_mbx_params(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	if (hw->mbx.ops.init_params) {
+		ret_val = hw->mbx.ops.init_params(hw);
+		if (ret_val) {
+			DEBUGOUT("Mailbox Initialization Error\n");
+			goto out;
+		}
+	} else {
+		DEBUGOUT("mbx.init_mbx_params was NULL\n");
+		ret_val =  -E1000_ERR_CONFIG;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  igb_set_mac_type - Sets MAC type
+ *  @hw: pointer to the HW structure
+ *
+ *  This function sets the mac type of the adapter based on the
+ *  device ID stored in the hw structure.
+ *  MUST BE FIRST FUNCTION CALLED (explicitly or through
+ *  igb_setup_init_funcs()).
+ **/
+s32 igb_set_mac_type(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_set_mac_type");
+
+	switch (hw->device_id) {
+	case E1000_DEV_ID_82575EB_COPPER:
+	case E1000_DEV_ID_82575EB_FIBER_SERDES:
+	case E1000_DEV_ID_82575GB_QUAD_COPPER:
+		mac->type = e1000_82575;
+		break;
+	case E1000_DEV_ID_82576:
+	case E1000_DEV_ID_82576_FIBER:
+	case E1000_DEV_ID_82576_SERDES:
+	case E1000_DEV_ID_82576_QUAD_COPPER:
+	case E1000_DEV_ID_82576_NS:
+	case E1000_DEV_ID_82576_NS_SERDES:
+	case E1000_DEV_ID_82576_SERDES_QUAD:
+		mac->type = e1000_82576;
+		break;
+	default:
+		/* Should never have loaded on this device */
+		ret_val = -E1000_ERR_MAC_INIT;
+		break;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  igb_setup_init_funcs - Initializes function pointers
+ *  @hw: pointer to the HW structure
+ *  @init_device: true will initialize the rest of the function pointers
+ *                 getting the device ready for use.  false will only set
+ *                 MAC type and the function pointers for the other init
+ *                 functions.  Passing false will not generate any hardware
+ *                 reads or writes.
+ *
+ *  This function must be called by a driver in order to use the rest
+ *  of the 'shared' code files. Called by drivers only.
+ **/
+s32 igb_setup_init_funcs(struct e1000_hw *hw, bool init_device)
+{
+	s32 ret_val;
+
+	/* Can't do much good without knowing the MAC type. */
+	ret_val = igb_set_mac_type(hw);
+	if (ret_val) {
+		DEBUGOUT("ERROR: MAC type could not be set properly.\n");
+		goto out;
+	}
+
+	if (!hw->hw_addr) {
+		DEBUGOUT("ERROR: Registers not mapped\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Init function pointers to generic implementations. We do this first
+	 * allowing a driver module to override it afterward.
+	 */
+	igb_init_mac_ops_generic(hw);
+	igb_init_nvm_ops_generic(hw);
+#if 0
+	igb_init_mbx_ops_generic(hw);
+#endif
+	/*
+	 * Set up the init function pointers. These are functions within the
+	 * adapter family file that sets up function pointers for the rest of
+	 * the functions in that family.
+	 */
+	switch (hw->mac.type) {
+	case e1000_82575:
+	case e1000_82576:
+		igb_init_function_pointers_82575(hw);
+		break;
+	default:
+		DEBUGOUT("Hardware not supported\n");
+		ret_val = -E1000_ERR_CONFIG;
+		break;
+	}
+
+	/*
+	 * Initialize the rest of the function pointers. These require some
+	 * register reads/writes in some cases.
+	 */
+	if (!(ret_val) && init_device) {
+		ret_val = igb_init_mac_params(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = igb_init_nvm_params(hw);
+		if (ret_val)
+			goto out;
+
+		ret_val = igb_init_phy_params(hw);
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = igb_init_mbx_params(hw);
+		if (ret_val)
+			goto out;
+#endif
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_bus_info - Obtain bus information for adapter
+ *  @hw: pointer to the HW structure
+ *
+ *  This will obtain information about the HW bus for which the
+ *  adapter is attached and stores it in the hw structure. This is a
+ *  function pointer entry point called by drivers.
+ **/
+s32 igb_get_bus_info(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.get_bus_info)
+		return hw->mac.ops.get_bus_info(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_clear_vfta - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  This clears the VLAN filter table on the adapter. This is a function
+ *  pointer entry point called by drivers.
+ **/
+void igb_clear_vfta(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.clear_vfta)
+		hw->mac.ops.clear_vfta(hw);
+}
+
+/**
+ *  igb_write_vfta - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: the 32-bit offset in which to write the value to.
+ *  @value: the 32-bit value to write at location offset.
+ *
+ *  This writes a 32-bit value to a 32-bit offset in the VLAN filter
+ *  table. This is a function pointer entry point called by drivers.
+ **/
+void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	if (hw->mac.ops.write_vfta)
+		hw->mac.ops.write_vfta(hw, offset, value);
+}
+
+/**
+ *  igb_update_mc_addr_list - Update Multicast addresses
+ *  @hw: pointer to the HW structure
+ *  @mc_addr_list: array of multicast addresses to program
+ *  @mc_addr_count: number of multicast addresses to program
+ *
+ *  Updates the Multicast Table Array.
+ *  The caller must have a packed mc_addr_list of multicast addresses.
+ **/
+void igb_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
+                               u32 mc_addr_count)
+{
+	if (hw->mac.ops.update_mc_addr_list)
+		hw->mac.ops.update_mc_addr_list(hw, mc_addr_list,
+		                                mc_addr_count);
+}
+
+/**
+ *  igb_force_mac_fc - Force MAC flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the MAC's flow control settings. Currently no func pointer exists
+ *  and all implementations are handled in the generic version of this
+ *  function.
+ **/
+s32 igb_force_mac_fc(struct e1000_hw *hw)
+{
+	return igb_force_mac_fc_generic(hw);
+}
+
+/**
+ *  igb_check_for_link - Check/Store link connection
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks the link condition of the adapter and stores the
+ *  results in the hw->mac structure. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 igb_check_for_link(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.check_for_link)
+		return hw->mac.ops.check_for_link(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_check_mng_mode - Check management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  This checks if the adapter has manageability enabled.
+ *  This is a function pointer entry point called by drivers.
+ **/
+bool igb_check_mng_mode(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.check_mng_mode)
+		return hw->mac.ops.check_mng_mode(hw);
+
+	return false;
+}
+
+#if 0
+/**
+ *  igb_mng_write_dhcp_info - Writes DHCP info to host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface
+ *  @length: size of the buffer
+ *
+ *  Writes the DHCP information to the host interface.
+ **/
+s32 igb_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length)
+{
+	return igb_mng_write_dhcp_info_generic(hw, buffer, length);
+}
+#endif
+
+/**
+ *  igb_reset_hw - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 igb_reset_hw(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.reset_hw)
+		return hw->mac.ops.reset_hw(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_init_hw - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation. This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 igb_init_hw(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.init_hw)
+		return hw->mac.ops.init_hw(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_setup_link - Configures link and flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  This configures link and flow control settings for the adapter. This
+ *  is a function pointer entry point called by drivers. While modules can
+ *  also call this, they probably call their own version of this function.
+ **/
+s32 igb_setup_link(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.setup_link)
+		return hw->mac.ops.setup_link(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_get_speed_and_duplex - Returns current speed and duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: pointer to a 16-bit value to store the speed
+ *  @duplex: pointer to a 16-bit value to store the duplex.
+ *
+ *  This returns the speed and duplex of the adapter in the two 'out'
+ *  variables passed in. This is a function pointer entry point called
+ *  by drivers.
+ **/
+s32 igb_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex)
+{
+	if (hw->mac.ops.get_link_up_info)
+		return hw->mac.ops.get_link_up_info(hw, speed, duplex);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_setup_led - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 igb_setup_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.setup_led)
+		return hw->mac.ops.setup_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_cleanup_led - Restores SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This restores the SW controllable LED to the value saved off by
+ *  e1000_setup_led. This is a function pointer entry point called by drivers.
+ **/
+s32 igb_cleanup_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.cleanup_led)
+		return hw->mac.ops.cleanup_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_blink_led - Blink SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This starts the adapter LED blinking. Request the LED to be setup first
+ *  and cleaned up after. This is a function pointer entry point called by
+ *  drivers.
+ **/
+s32 igb_blink_led(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.blink_led)
+		return hw->mac.ops.blink_led(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_id_led_init - store LED configurations in SW
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes the LED config in SW. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 igb_id_led_init(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.id_led_init)
+		return hw->mac.ops.id_led_init(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_led_on - Turn on SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED on. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 igb_led_on(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.led_on)
+		return hw->mac.ops.led_on(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_led_off - Turn off SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Turns the SW defined LED off. This is a function pointer entry point
+ *  called by drivers.
+ **/
+s32 igb_led_off(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.led_off)
+		return hw->mac.ops.led_off(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_reset_adaptive - Reset adaptive IFS
+ *  @hw: pointer to the HW structure
+ *
+ *  Resets the adaptive IFS. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void igb_reset_adaptive(struct e1000_hw *hw)
+{
+	igb_reset_adaptive_generic(hw);
+}
+
+/**
+ *  igb_update_adaptive - Update adaptive IFS
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates adapter IFS. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void igb_update_adaptive(struct e1000_hw *hw)
+{
+	igb_update_adaptive_generic(hw);
+}
+
+/**
+ *  igb_disable_pcie_master - Disable PCI-Express master access
+ *  @hw: pointer to the HW structure
+ *
+ *  Disables PCI-Express master access and verifies there are no pending
+ *  requests. Currently no func pointer exists and all implementations are
+ *  handled in the generic version of this function.
+ **/
+s32 igb_disable_pcie_master(struct e1000_hw *hw)
+{
+	return igb_disable_pcie_master_generic(hw);
+}
+
+/**
+ *  igb_config_collision_dist - Configure collision distance
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the collision distance to the default value and is used
+ *  during link setup.
+ **/
+void igb_config_collision_dist(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.config_collision_dist)
+		hw->mac.ops.config_collision_dist(hw);
+}
+
+/**
+ *  igb_rar_set - Sets a receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: address to set the RAR to
+ *  @index: the RAR to set
+ *
+ *  Sets a Receive Address Register (RAR) to the specified address.
+ **/
+void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	if (hw->mac.ops.rar_set)
+		hw->mac.ops.rar_set(hw, addr, index);
+}
+
+/**
+ *  igb_validate_mdi_setting - Ensures valid MDI/MDIX SW state
+ *  @hw: pointer to the HW structure
+ *
+ *  Ensures that the MDI/MDIX SW state is valid.
+ **/
+s32 igb_validate_mdi_setting(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.validate_mdi_setting)
+		return hw->mac.ops.validate_mdi_setting(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_mta_set - Sets multicast table bit
+ *  @hw: pointer to the HW structure
+ *  @hash_value: Multicast hash value.
+ *
+ *  This sets the bit in the multicast table corresponding to the
+ *  hash value.  This is a function pointer entry point called by drivers.
+ **/
+void igb_mta_set(struct e1000_hw *hw, u32 hash_value)
+{
+	if (hw->mac.ops.mta_set)
+		hw->mac.ops.mta_set(hw, hash_value);
+}
+
+/**
+ *  igb_hash_mc_addr - Determines address location in multicast table
+ *  @hw: pointer to the HW structure
+ *  @mc_addr: Multicast address to hash.
+ *
+ *  This hashes an address to determine its location in the multicast
+ *  table. Currently no func pointer exists and all implementations
+ *  are handled in the generic version of this function.
+ **/
+u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
+{
+	return igb_hash_mc_addr_generic(hw, mc_addr);
+}
+
+/**
+ *  igb_enable_tx_pkt_filtering - Enable packet filtering on TX
+ *  @hw: pointer to the HW structure
+ *
+ *  Enables packet filtering on transmit packets if manageability is enabled
+ *  and host interface is enabled.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+#if 0
+bool igb_enable_tx_pkt_filtering(struct e1000_hw *hw)
+{
+	return igb_enable_tx_pkt_filtering_generic(hw);
+}
+#endif
+
+/**
+ *  igb_mng_host_if_write - Writes to the manageability host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface buffer
+ *  @length: size of the buffer
+ *  @offset: location in the buffer to write to
+ *  @sum: sum of the data (not checksum)
+ *
+ *  This function writes the buffer content at the offset given on the host if.
+ *  It also does alignment considerations to do the writes in most efficient
+ *  way.  Also fills up the sum of the buffer in *buffer parameter.
+ **/
+s32 igb_mng_host_if_write(struct e1000_hw * hw, u8 *buffer, u16 length,
+                            u16 offset, u8 *sum)
+{
+	if (hw->mac.ops.mng_host_if_write)
+		return hw->mac.ops.mng_host_if_write(hw, buffer, length,
+		                                     offset, sum);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+
+/**
+ *  igb_mng_write_cmd_header - Writes manageability command header
+ *  @hw: pointer to the HW structure
+ *  @hdr: pointer to the host interface command header
+ *
+ *  Writes the command header after does the checksum calculation.
+ **/
+s32 igb_mng_write_cmd_header(struct e1000_hw *hw,
+                               struct e1000_host_mng_command_header *hdr)
+{
+	if (hw->mac.ops.mng_write_cmd_header)
+		return hw->mac.ops.mng_write_cmd_header(hw, hdr);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+
+/**
+ *  igb_mng_enable_host_if - Checks host interface is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
+ *
+ *  This function checks whether the HOST IF is enabled for command operation
+ *  and also checks whether the previous command is completed.  It busy waits
+ *  in case of previous command is not completed.
+ **/
+s32 igb_mng_enable_host_if(struct e1000_hw * hw)
+{
+	if (hw->mac.ops.mng_enable_host_if)
+		return hw->mac.ops.mng_enable_host_if(hw);
+
+	return E1000_NOT_IMPLEMENTED;
+}
+
+/**
+ *  igb_wait_autoneg - Waits for autonegotiation completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Waits for autoneg to complete. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+s32 igb_wait_autoneg(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.wait_autoneg)
+		return hw->mac.ops.wait_autoneg(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_check_reset_block - Verifies PHY can be reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks if the PHY is in a state that can be reset or if manageability
+ *  has it tied up. This is a function pointer entry point called by drivers.
+ **/
+s32 igb_check_reset_block(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.check_reset_block)
+		return hw->phy.ops.check_reset_block(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_read_phy_reg - Reads PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to read
+ *  @data: the buffer to store the 16-bit read.
+ *
+ *  Reads the PHY register and returns the value in data.
+ *  This is a function pointer entry point called by drivers.
+ **/
+s32 igb_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	if (hw->phy.ops.read_reg)
+		return hw->phy.ops.read_reg(hw, offset, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_write_phy_reg - Writes PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to write
+ *  @data: the value to write.
+ *
+ *  Writes the PHY register at offset with the value in data.
+ *  This is a function pointer entry point called by drivers.
+ **/
+s32 igb_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	if (hw->phy.ops.write_reg)
+		return hw->phy.ops.write_reg(hw, offset, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_release_phy - Generic release PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Return if silicon family does not require a semaphore when accessing the
+ *  PHY.
+ **/
+void igb_release_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.release)
+		hw->phy.ops.release(hw);
+}
+
+/**
+ *  igb_acquire_phy - Generic acquire PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Return success if silicon family does not require a semaphore when
+ *  accessing the PHY.
+ **/
+s32 igb_acquire_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.acquire)
+		return hw->phy.ops.acquire(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_read_kmrn_reg - Reads register using Kumeran interface
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to read
+ *  @data: the location to store the 16-bit value read.
+ *
+ *  Reads a register out of the Kumeran interface. Currently no func pointer
+ *  exists and all implementations are handled in the generic version of
+ *  this function.
+ **/
+s32 igb_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return igb_read_kmrn_reg_generic(hw, offset, data);
+}
+
+/**
+ *  igb_write_kmrn_reg - Writes register using Kumeran interface
+ *  @hw: pointer to the HW structure
+ *  @offset: the register to write
+ *  @data: the value to write.
+ *
+ *  Writes a register to the Kumeran interface. Currently no func pointer
+ *  exists and all implementations are handled in the generic version of
+ *  this function.
+ **/
+s32 igb_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return igb_write_kmrn_reg_generic(hw, offset, data);
+}
+
+#if 0
+/**
+ *  igb_get_cable_length - Retrieves cable length estimation
+ *  @hw: pointer to the HW structure
+ *
+ *  This function estimates the cable length and stores them in
+ *  hw->phy.min_length and hw->phy.max_length. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 igb_get_cable_length(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_cable_length)
+		return hw->phy.ops.get_cable_length(hw);
+
+	return E1000_SUCCESS;
+}
+#endif
+
+/**
+ *  igb_get_phy_info - Retrieves PHY information from registers
+ *  @hw: pointer to the HW structure
+ *
+ *  This function gets some information from various PHY registers and
+ *  populates hw->phy values with it. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 igb_get_phy_info(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.get_info)
+		return hw->phy.ops.get_info(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_phy_hw_reset - Hard PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs a hard PHY reset. This is a function pointer entry point called
+ *  by drivers.
+ **/
+s32 igb_phy_hw_reset(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.reset)
+		return hw->phy.ops.reset(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_phy_commit - Soft PHY reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs a soft PHY reset on those that apply. This is a function pointer
+ *  entry point called by drivers.
+ **/
+s32 igb_phy_commit(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.commit)
+		return hw->phy.ops.commit(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_set_d0_lplu_state - Sets low power link up state for D0
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D0
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D0
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.  This is a function pointer entry point called by drivers.
+ **/
+s32 igb_set_d0_lplu_state(struct e1000_hw *hw, bool active)
+{
+	if (hw->phy.ops.set_d0_lplu_state)
+		return hw->phy.ops.set_d0_lplu_state(hw, active);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_set_d3_lplu_state - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.  This is a function pointer entry point called by drivers.
+ **/
+s32 igb_set_d3_lplu_state(struct e1000_hw *hw, bool active)
+{
+	if (hw->phy.ops.set_d3_lplu_state)
+		return hw->phy.ops.set_d3_lplu_state(hw, active);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_read_mac_addr - Reads MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the MAC address out of the adapter and stores it in the HW structure.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+s32 igb_read_mac_addr(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.read_mac_addr)
+		return hw->mac.ops.read_mac_addr(hw);
+
+	return igb_read_mac_addr_generic(hw);
+}
+
+/**
+ *  igb_read_pba_num - Read device part number
+ *  @hw: pointer to the HW structure
+ *  @pba_num: pointer to device part number
+ *
+ *  Reads the product board assembly (PBA) number from the EEPROM and stores
+ *  the value in pba_num.
+ *  Currently no func pointer exists and all implementations are handled in the
+ *  generic version of this function.
+ **/
+s32 igb_read_pba_num(struct e1000_hw *hw, u32 *pba_num)
+{
+	return igb_read_pba_num_generic(hw, pba_num);
+}
+
+/**
+ *  igb_validate_nvm_checksum - Verifies NVM (EEPROM) checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Validates the NVM checksum is correct. This is a function pointer entry
+ *  point called by drivers.
+ **/
+s32 igb_validate_nvm_checksum(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.validate)
+		return hw->nvm.ops.validate(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_update_nvm_checksum - Updates NVM (EEPROM) checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the NVM checksum. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+s32 igb_update_nvm_checksum(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.update)
+		return hw->nvm.ops.update(hw);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_reload_nvm - Reloads EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
+ *  extended control register.
+ **/
+void igb_reload_nvm(struct e1000_hw *hw)
+{
+	if (hw->nvm.ops.reload)
+		hw->nvm.ops.reload(hw);
+}
+
+/**
+ *  igb_read_nvm - Reads NVM (EEPROM)
+ *  @hw: pointer to the HW structure
+ *  @offset: the word offset to read
+ *  @words: number of 16-bit words to read
+ *  @data: pointer to the properly sized buffer for the data.
+ *
+ *  Reads 16-bit chunks of data from the NVM (EEPROM). This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 igb_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	if (hw->nvm.ops.read)
+		return hw->nvm.ops.read(hw, offset, words, data);
+
+	return -E1000_ERR_CONFIG;
+}
+
+/**
+ *  igb_write_nvm - Writes to NVM (EEPROM)
+ *  @hw: pointer to the HW structure
+ *  @offset: the word offset to read
+ *  @words: number of 16-bit words to write
+ *  @data: pointer to the properly sized buffer for the data.
+ *
+ *  Writes 16-bit chunks of data to the NVM (EEPROM). This is a function
+ *  pointer entry point called by drivers.
+ **/
+s32 igb_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	if (hw->nvm.ops.write)
+		return hw->nvm.ops.write(hw, offset, words, data);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_write_8bit_ctrl_reg - Writes 8bit Control register
+ *  @hw: pointer to the HW structure
+ *  @reg: 32bit register offset
+ *  @offset: the register to write
+ *  @data: the value to write.
+ *
+ *  Writes the PHY register at offset with the value in data.
+ *  This is a function pointer entry point called by drivers.
+ **/
+s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,
+                              u8 data)
+{
+	return igb_write_8bit_ctrl_reg_generic(hw, reg, offset, data);
+}
+
+/**
+ * igb_power_up_phy - Restores link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * The phy may be powered down to save power, to turn off link when the
+ * driver is unloaded, or wake on lan is not enabled (among others).
+ **/
+void igb_power_up_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.power_up)
+		hw->phy.ops.power_up(hw);
+
+	igb_setup_link(hw);
+}
+
+/**
+ * igb_power_down_phy - Power down PHY
+ * @hw: pointer to the HW structure
+ *
+ * The phy may be powered down to save power, to turn off link when the
+ * driver is unloaded, or wake on lan is not enabled (among others).
+ **/
+void igb_power_down_phy(struct e1000_hw *hw)
+{
+	if (hw->phy.ops.power_down)
+		hw->phy.ops.power_down(hw);
+}
+
+/**
+ *  igb_shutdown_fiber_serdes_link - Remove link during power down
+ *  @hw: pointer to the HW structure
+ *
+ *  Shutdown the optics and PCS on driver unload.
+ **/
+void igb_shutdown_fiber_serdes_link(struct e1000_hw *hw)
+{
+	if (hw->mac.ops.shutdown_serdes)
+		hw->mac.ops.shutdown_serdes(hw);
+}
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_api.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_api.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_api.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_api.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,166 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_API_H_
+#define _IGB_API_H_
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <ipxe/io.h>
+#include <errno.h>
+#include <byteswap.h>
+#include <ipxe/pci.h>
+#include <ipxe/malloc.h>
+#include <ipxe/if_ether.h>
+#include <ipxe/ethernet.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/netdevice.h>
+
+#include "igb_hw.h"
+
+extern void    igb_init_function_pointers_82575(struct e1000_hw *hw) __attribute__((weak));
+extern void    igb_rx_fifo_flush_82575(struct e1000_hw *hw) __attribute__((weak));
+extern void    igb_init_function_pointers_vf(struct e1000_hw *hw) __attribute__((weak));
+extern void    igb_shutdown_fiber_serdes_link(struct e1000_hw *hw) __attribute__((weak));
+
+s32  igb_set_mac_type(struct e1000_hw *hw);
+s32  igb_setup_init_funcs(struct e1000_hw *hw, bool init_device);
+s32  igb_init_mac_params(struct e1000_hw *hw);
+s32  igb_init_nvm_params(struct e1000_hw *hw);
+s32  igb_init_phy_params(struct e1000_hw *hw);
+s32  igb_init_mbx_params(struct e1000_hw *hw);
+s32  igb_get_bus_info(struct e1000_hw *hw);
+void igb_clear_vfta(struct e1000_hw *hw);
+void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
+s32  igb_force_mac_fc(struct e1000_hw *hw);
+s32  igb_check_for_link(struct e1000_hw *hw);
+s32  igb_reset_hw(struct e1000_hw *hw);
+s32  igb_init_hw(struct e1000_hw *hw);
+s32  igb_setup_link(struct e1000_hw *hw);
+s32  igb_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed,
+                                u16 *duplex);
+s32  igb_disable_pcie_master(struct e1000_hw *hw);
+void igb_config_collision_dist(struct e1000_hw *hw);
+void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
+void igb_mta_set(struct e1000_hw *hw, u32 hash_value);
+u32  igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
+void igb_update_mc_addr_list(struct e1000_hw *hw,
+                               u8 *mc_addr_list, u32 mc_addr_count);
+s32  igb_setup_led(struct e1000_hw *hw);
+s32  igb_cleanup_led(struct e1000_hw *hw);
+s32  igb_check_reset_block(struct e1000_hw *hw);
+s32  igb_blink_led(struct e1000_hw *hw);
+s32  igb_led_on(struct e1000_hw *hw);
+s32  igb_led_off(struct e1000_hw *hw);
+s32 igb_id_led_init(struct e1000_hw *hw);
+void igb_reset_adaptive(struct e1000_hw *hw);
+void igb_update_adaptive(struct e1000_hw *hw);
+#if 0
+s32  igb_get_cable_length(struct e1000_hw *hw);
+#endif
+s32  igb_validate_mdi_setting(struct e1000_hw *hw);
+s32  igb_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
+                               u32 offset, u8 data);
+s32  igb_get_phy_info(struct e1000_hw *hw);
+void igb_release_phy(struct e1000_hw *hw);
+s32  igb_acquire_phy(struct e1000_hw *hw);
+s32  igb_phy_hw_reset(struct e1000_hw *hw);
+s32  igb_phy_commit(struct e1000_hw *hw);
+void igb_power_up_phy(struct e1000_hw *hw);
+void igb_power_down_phy(struct e1000_hw *hw);
+s32  igb_read_mac_addr(struct e1000_hw *hw);
+s32  igb_read_pba_num(struct e1000_hw *hw, u32 *part_num);
+void igb_reload_nvm(struct e1000_hw *hw);
+s32  igb_update_nvm_checksum(struct e1000_hw *hw);
+s32  igb_validate_nvm_checksum(struct e1000_hw *hw);
+s32  igb_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
+s32  igb_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_nvm(struct e1000_hw *hw, u16 offset, u16 words,
+                     u16 *data);
+s32  igb_wait_autoneg(struct e1000_hw *hw);
+s32  igb_set_d3_lplu_state(struct e1000_hw *hw, bool active);
+s32  igb_set_d0_lplu_state(struct e1000_hw *hw, bool active);
+bool igb_check_mng_mode(struct e1000_hw *hw);
+bool igb_enable_tx_pkt_filtering(struct e1000_hw *hw);
+s32  igb_mng_enable_host_if(struct e1000_hw *hw);
+s32  igb_mng_host_if_write(struct e1000_hw *hw,
+                             u8 *buffer, u16 length, u16 offset, u8 *sum);
+s32  igb_mng_write_cmd_header(struct e1000_hw *hw,
+                                struct e1000_host_mng_command_header *hdr);
+s32  igb_mng_write_dhcp_info(struct e1000_hw * hw,
+                                    u8 *buffer, u16 length);
+
+/*
+ * TBI_ACCEPT macro definition:
+ *
+ * This macro requires:
+ *      adapter = a pointer to struct e1000_hw
+ *      status = the 8 bit status field of the Rx descriptor with EOP set
+ *      error = the 8 bit error field of the Rx descriptor with EOP set
+ *      length = the sum of all the length fields of the Rx descriptors that
+ *               make up the current frame
+ *      last_byte = the last byte of the frame DMAed by the hardware
+ *      max_frame_length = the maximum frame length we want to accept.
+ *      min_frame_length = the minimum frame length we want to accept.
+ *
+ * This macro is a conditional that should be used in the interrupt
+ * handler's Rx processing routine when RxErrors have been detected.
+ *
+ * Typical use:
+ *  ...
+ *  if (TBI_ACCEPT) {
+ *      accept_frame = true;
+ *      e1000_tbi_adjust_stats(adapter, MacAddress);
+ *      frame_length--;
+ *  } else {
+ *      accept_frame = false;
+ *  }
+ *  ...
+ */
+
+/* The carrier extension symbol, as received by the NIC. */
+#define CARRIER_EXTENSION   0x0F
+
+#define TBI_ACCEPT(a, status, errors, length, last_byte, min_frame_size, max_frame_size) \
+    (e1000_tbi_sbp_enabled_82543(a) && \
+     (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
+     ((last_byte) == CARRIER_EXTENSION) && \
+     (((status) & E1000_RXD_STAT_VP) ? \
+          (((length) > (min_frame_size - VLAN_TAG_SIZE)) && \
+           ((length) <= (max_frame_size + 1))) : \
+          (((length) > min_frame_size) && \
+           ((length) <= (max_frame_size + VLAN_TAG_SIZE + 1)))))
+
+#endif /* _IGB_API_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,32 @@
+/*******************************************************************************
+
+  Intel PRO/1000 Linux driver
+  Copyright(c) 1999 - 2008 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  Linux NICS <linux.nics@intel.com>
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+REQUIRE_OBJECT(igb_main);
+REQUIRE_OBJECT(igb_82575);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_defines.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_defines.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_defines.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_defines.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1515 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_DEFINES_H_
+#define _IGB_DEFINES_H_
+
+/* Number of Transmit and Receive Descriptors must be a multiple of 8 */
+#define REQ_TX_DESCRIPTOR_MULTIPLE  8
+#define REQ_RX_DESCRIPTOR_MULTIPLE  8
+
+/* Definitions for power management and wakeup registers */
+/* Wake Up Control */
+#define E1000_WUC_APME       0x00000001 /* APM Enable */
+#define E1000_WUC_PME_EN     0x00000002 /* PME Enable */
+#define E1000_WUC_PME_STATUS 0x00000004 /* PME Status */
+#define E1000_WUC_APMPME     0x00000008 /* Assert PME on APM Wakeup */
+#define E1000_WUC_LSCWE      0x00000010 /* Link Status wake up enable */
+#define E1000_WUC_LSCWO      0x00000020 /* Link Status wake up override */
+#define E1000_WUC_SPM        0x80000000 /* Enable SPM */
+#define E1000_WUC_PHY_WAKE   0x00000100 /* if PHY supports wakeup */
+
+/* Wake Up Filter Control */
+#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
+#define E1000_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
+#define E1000_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
+#define E1000_WUFC_MC   0x00000008 /* Directed Multicast Wakeup Enable */
+#define E1000_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */
+#define E1000_WUFC_ARP  0x00000020 /* ARP Request Packet Wakeup Enable */
+#define E1000_WUFC_IPV4 0x00000040 /* Directed IPv4 Packet Wakeup Enable */
+#define E1000_WUFC_IPV6 0x00000080 /* Directed IPv6 Packet Wakeup Enable */
+#define E1000_WUFC_IGNORE_TCO   0x00008000 /* Ignore WakeOn TCO packets */
+#define E1000_WUFC_FLX0 0x00010000 /* Flexible Filter 0 Enable */
+#define E1000_WUFC_FLX1 0x00020000 /* Flexible Filter 1 Enable */
+#define E1000_WUFC_FLX2 0x00040000 /* Flexible Filter 2 Enable */
+#define E1000_WUFC_FLX3 0x00080000 /* Flexible Filter 3 Enable */
+#define E1000_WUFC_FLX4 0x00100000 /* Flexible Filter 4 Enable */
+#define E1000_WUFC_FLX5 0x00200000 /* Flexible Filter 5 Enable */
+#define E1000_WUFC_ALL_FILTERS  0x000F00FF /* Mask for all wakeup filters */
+#define E1000_WUFC_FLX_OFFSET   16 /* Offset to the Flexible Filters bits */
+#define E1000_WUFC_FLX_FILTERS  0x000F0000 /*Mask for the 4 flexible filters */
+/*
+ * For 82576 to utilize Extended filter masks in addition to
+ * existing (filter) masks
+ */
+#define E1000_WUFC_EXT_FLX_FILTERS      0x00300000 /* Ext. FLX filter mask */
+
+/* Wake Up Status */
+#define E1000_WUS_LNKC         E1000_WUFC_LNKC
+#define E1000_WUS_MAG          E1000_WUFC_MAG
+#define E1000_WUS_EX           E1000_WUFC_EX
+#define E1000_WUS_MC           E1000_WUFC_MC
+#define E1000_WUS_BC           E1000_WUFC_BC
+#define E1000_WUS_ARP          E1000_WUFC_ARP
+#define E1000_WUS_IPV4         E1000_WUFC_IPV4
+#define E1000_WUS_IPV6         E1000_WUFC_IPV6
+#define E1000_WUS_FLX0         E1000_WUFC_FLX0
+#define E1000_WUS_FLX1         E1000_WUFC_FLX1
+#define E1000_WUS_FLX2         E1000_WUFC_FLX2
+#define E1000_WUS_FLX3         E1000_WUFC_FLX3
+#define E1000_WUS_FLX_FILTERS  E1000_WUFC_FLX_FILTERS
+
+/* Wake Up Packet Length */
+#define E1000_WUPL_LENGTH_MASK 0x0FFF   /* Only the lower 12 bits are valid */
+
+/* Four Flexible Filters are supported */
+#define E1000_FLEXIBLE_FILTER_COUNT_MAX 4
+/* Two Extended Flexible Filters are supported (82576) */
+#define E1000_EXT_FLEXIBLE_FILTER_COUNT_MAX     2
+#define E1000_FHFT_LENGTH_OFFSET        0xFC /* Length byte in FHFT */
+#define E1000_FHFT_LENGTH_MASK          0x0FF /* Length in lower byte */
+
+/* Each Flexible Filter is at most 128 (0x80) bytes in length */
+#define E1000_FLEXIBLE_FILTER_SIZE_MAX  128
+
+#define E1000_FFLT_SIZE E1000_FLEXIBLE_FILTER_COUNT_MAX
+#define E1000_FFMT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+#define E1000_FFVT_SIZE E1000_FLEXIBLE_FILTER_SIZE_MAX
+
+/* Extended Device Control */
+#define E1000_CTRL_EXT_GPI0_EN   0x00000001 /* Maps SDP4 to GPI0 */
+#define E1000_CTRL_EXT_GPI1_EN   0x00000002 /* Maps SDP5 to GPI1 */
+#define E1000_CTRL_EXT_PHYINT_EN E1000_CTRL_EXT_GPI1_EN
+#define E1000_CTRL_EXT_GPI2_EN   0x00000004 /* Maps SDP6 to GPI2 */
+#define E1000_CTRL_EXT_GPI3_EN   0x00000008 /* Maps SDP7 to GPI3 */
+/* Reserved (bits 4,5) in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DATA 0x00000010 /* Value of SW Definable Pin 4 */
+#define E1000_CTRL_EXT_SDP5_DATA 0x00000020 /* Value of SW Definable Pin 5 */
+#define E1000_CTRL_EXT_PHY_INT   E1000_CTRL_EXT_SDP5_DATA
+#define E1000_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Definable Pin 6 */
+#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */
+/* SDP 4/5 (bits 8,9) are reserved in >= 82575 */
+#define E1000_CTRL_EXT_SDP4_DIR  0x00000100 /* Direction of SDP4 0=in 1=out */
+#define E1000_CTRL_EXT_SDP5_DIR  0x00000200 /* Direction of SDP5 0=in 1=out */
+#define E1000_CTRL_EXT_SDP6_DIR  0x00000400 /* Direction of SDP6 0=in 1=out */
+#define E1000_CTRL_EXT_SDP3_DIR  0x00000800 /* Direction of SDP3 0=in 1=out */
+#define E1000_CTRL_EXT_ASDCHK    0x00001000 /* Initiate an ASD sequence */
+#define E1000_CTRL_EXT_EE_RST    0x00002000 /* Reinitialize from EEPROM */
+#define E1000_CTRL_EXT_IPS       0x00004000 /* Invert Power State */
+/* Physical Func Reset Done Indication */
+#define E1000_CTRL_EXT_PFRSTD    0x00004000
+#define E1000_CTRL_EXT_SPD_BYPS  0x00008000 /* Speed Select Bypass */
+#define E1000_CTRL_EXT_RO_DIS    0x00020000 /* Relaxed Ordering disable */
+#define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */
+#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_GMII 0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_TBI  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_KMRN    0x00000000
+#define E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES  0x00C00000
+#define E1000_CTRL_EXT_LINK_MODE_PCIX_SERDES  0x00800000
+#define E1000_CTRL_EXT_LINK_MODE_SGMII   0x00800000
+#define E1000_CTRL_EXT_EIAME          0x01000000
+#define E1000_CTRL_EXT_IRCA           0x00000001
+#define E1000_CTRL_EXT_WR_WMARK_MASK  0x03000000
+#define E1000_CTRL_EXT_WR_WMARK_256   0x00000000
+#define E1000_CTRL_EXT_WR_WMARK_320   0x01000000
+#define E1000_CTRL_EXT_WR_WMARK_384   0x02000000
+#define E1000_CTRL_EXT_WR_WMARK_448   0x03000000
+#define E1000_CTRL_EXT_CANC           0x04000000 /* Int delay cancellation */
+#define E1000_CTRL_EXT_DRV_LOAD       0x10000000 /* Driver loaded bit for FW */
+/* IAME enable bit (27) was removed in >= 82575 */
+#define E1000_CTRL_EXT_IAME          0x08000000 /* Int acknowledge Auto-mask */
+#define E1000_CRTL_EXT_PB_PAREN       0x01000000 /* packet buffer parity error
+                                                  * detection enabled */
+#define E1000_CTRL_EXT_DF_PAREN       0x02000000 /* descriptor FIFO parity
+                                                  * error detection enable */
+#define E1000_CTRL_EXT_GHOST_PAREN    0x40000000
+#define E1000_CTRL_EXT_PBA_CLR        0x80000000 /* PBA Clear */
+#define E1000_I2CCMD_REG_ADDR_SHIFT   16
+#define E1000_I2CCMD_REG_ADDR         0x00FF0000
+#define E1000_I2CCMD_PHY_ADDR_SHIFT   24
+#define E1000_I2CCMD_PHY_ADDR         0x07000000
+#define E1000_I2CCMD_OPCODE_READ      0x08000000
+#define E1000_I2CCMD_OPCODE_WRITE     0x00000000
+#define E1000_I2CCMD_RESET            0x10000000
+#define E1000_I2CCMD_READY            0x20000000
+#define E1000_I2CCMD_INTERRUPT_ENA    0x40000000
+#define E1000_I2CCMD_ERROR            0x80000000
+#define E1000_MAX_SGMII_PHY_REG_ADDR  255
+#define E1000_I2CCMD_PHY_TIMEOUT      200
+#define E1000_IVAR_VALID        0x80
+#define E1000_GPIE_NSICR        0x00000001
+#define E1000_GPIE_MSIX_MODE    0x00000010
+#define E1000_GPIE_EIAME        0x40000000
+#define E1000_GPIE_PBA          0x80000000
+
+/* Receive Descriptor bit definitions */
+#define E1000_RXD_STAT_DD       0x01    /* Descriptor Done */
+#define E1000_RXD_STAT_EOP      0x02    /* End of Packet */
+#define E1000_RXD_STAT_IXSM     0x04    /* Ignore checksum */
+#define E1000_RXD_STAT_VP       0x08    /* IEEE VLAN Packet */
+#define E1000_RXD_STAT_UDPCS    0x10    /* UDP xsum calculated */
+#define E1000_RXD_STAT_TCPCS    0x20    /* TCP xsum calculated */
+#define E1000_RXD_STAT_IPCS     0x40    /* IP xsum calculated */
+#define E1000_RXD_STAT_PIF      0x80    /* passed in-exact filter */
+#define E1000_RXD_STAT_CRCV     0x100   /* Speculative CRC Valid */
+#define E1000_RXD_STAT_IPIDV    0x200   /* IP identification valid */
+#define E1000_RXD_STAT_UDPV     0x400   /* Valid UDP checksum */
+#define E1000_RXD_STAT_DYNINT   0x800   /* Pkt caused INT via DYNINT */
+#define E1000_RXD_STAT_ACK      0x8000  /* ACK Packet indication */
+#define E1000_RXD_ERR_CE        0x01    /* CRC Error */
+#define E1000_RXD_ERR_SE        0x02    /* Symbol Error */
+#define E1000_RXD_ERR_SEQ       0x04    /* Sequence Error */
+#define E1000_RXD_ERR_CXE       0x10    /* Carrier Extension Error */
+#define E1000_RXD_ERR_TCPE      0x20    /* TCP/UDP Checksum Error */
+#define E1000_RXD_ERR_IPE       0x40    /* IP Checksum Error */
+#define E1000_RXD_ERR_RXE       0x80    /* Rx Data Error */
+#define E1000_RXD_SPC_VLAN_MASK 0x0FFF  /* VLAN ID is in lower 12 bits */
+#define E1000_RXD_SPC_PRI_MASK  0xE000  /* Priority is in upper 3 bits */
+#define E1000_RXD_SPC_PRI_SHIFT 13
+#define E1000_RXD_SPC_CFI_MASK  0x1000  /* CFI is bit 12 */
+#define E1000_RXD_SPC_CFI_SHIFT 12
+
+#define E1000_RXDEXT_STATERR_CE    0x01000000
+#define E1000_RXDEXT_STATERR_SE    0x02000000
+#define E1000_RXDEXT_STATERR_SEQ   0x04000000
+#define E1000_RXDEXT_STATERR_CXE   0x10000000
+#define E1000_RXDEXT_STATERR_TCPE  0x20000000
+#define E1000_RXDEXT_STATERR_IPE   0x40000000
+#define E1000_RXDEXT_STATERR_RXE   0x80000000
+
+/* mask to determine if packets should be dropped due to frame errors */
+#define E1000_RXD_ERR_FRAME_ERR_MASK ( \
+    E1000_RXD_ERR_CE  |                \
+    E1000_RXD_ERR_SE  |                \
+    E1000_RXD_ERR_SEQ |                \
+    E1000_RXD_ERR_CXE |                \
+    E1000_RXD_ERR_RXE)
+
+/* Same mask, but for extended and packet split descriptors */
+#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
+    E1000_RXDEXT_STATERR_CE  |            \
+    E1000_RXDEXT_STATERR_SE  |            \
+    E1000_RXDEXT_STATERR_SEQ |            \
+    E1000_RXDEXT_STATERR_CXE |            \
+    E1000_RXDEXT_STATERR_RXE)
+
+#define E1000_MRQC_ENABLE_MASK                 0x00000007
+#define E1000_MRQC_ENABLE_RSS_2Q               0x00000001
+#define E1000_MRQC_ENABLE_RSS_INT              0x00000004
+#define E1000_MRQC_RSS_FIELD_MASK              0xFFFF0000
+#define E1000_MRQC_RSS_FIELD_IPV4_TCP          0x00010000
+#define E1000_MRQC_RSS_FIELD_IPV4              0x00020000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX       0x00040000
+#define E1000_MRQC_RSS_FIELD_IPV6_EX           0x00080000
+#define E1000_MRQC_RSS_FIELD_IPV6              0x00100000
+#define E1000_MRQC_RSS_FIELD_IPV6_TCP          0x00200000
+
+#define E1000_RXDPS_HDRSTAT_HDRSP              0x00008000
+#define E1000_RXDPS_HDRSTAT_HDRLEN_MASK        0x000003FF
+
+/* Management Control */
+#define E1000_MANC_SMBUS_EN      0x00000001 /* SMBus Enabled - RO */
+#define E1000_MANC_ASF_EN        0x00000002 /* ASF Enabled - RO */
+#define E1000_MANC_R_ON_FORCE    0x00000004 /* Reset on Force TCO - RO */
+#define E1000_MANC_RMCP_EN       0x00000100 /* Enable RCMP 026Fh Filtering */
+#define E1000_MANC_0298_EN       0x00000200 /* Enable RCMP 0298h Filtering */
+#define E1000_MANC_IPV4_EN       0x00000400 /* Enable IPv4 */
+#define E1000_MANC_IPV6_EN       0x00000800 /* Enable IPv6 */
+#define E1000_MANC_SNAP_EN       0x00001000 /* Accept LLC/SNAP */
+#define E1000_MANC_ARP_EN        0x00002000 /* Enable ARP Request Filtering */
+/* Enable Neighbor Discovery Filtering */
+#define E1000_MANC_NEIGHBOR_EN   0x00004000
+#define E1000_MANC_ARP_RES_EN    0x00008000 /* Enable ARP response Filtering */
+#define E1000_MANC_TCO_RESET     0x00010000 /* TCO Reset Occurred */
+#define E1000_MANC_RCV_TCO_EN    0x00020000 /* Receive TCO Packets Enabled */
+#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */
+#define E1000_MANC_RCV_ALL       0x00080000 /* Receive All Enabled */
+#define E1000_MANC_BLK_PHY_RST_ON_IDE   0x00040000 /* Block phy resets */
+/* Enable MAC address filtering */
+#define E1000_MANC_EN_MAC_ADDR_FILTER   0x00100000
+/* Enable MNG packets to host memory */
+#define E1000_MANC_EN_MNG2HOST   0x00200000
+/* Enable IP address filtering */
+#define E1000_MANC_EN_IP_ADDR_FILTER    0x00400000
+#define E1000_MANC_EN_XSUM_FILTER   0x00800000 /* Enable checksum filtering */
+#define E1000_MANC_BR_EN            0x01000000 /* Enable broadcast filtering */
+#define E1000_MANC_SMB_REQ       0x01000000 /* SMBus Request */
+#define E1000_MANC_SMB_GNT       0x02000000 /* SMBus Grant */
+#define E1000_MANC_SMB_CLK_IN    0x04000000 /* SMBus Clock In */
+#define E1000_MANC_SMB_DATA_IN   0x08000000 /* SMBus Data In */
+#define E1000_MANC_SMB_DATA_OUT  0x10000000 /* SMBus Data Out */
+#define E1000_MANC_SMB_CLK_OUT   0x20000000 /* SMBus Clock Out */
+
+#define E1000_MANC_SMB_DATA_OUT_SHIFT  28 /* SMBus Data Out Shift */
+#define E1000_MANC_SMB_CLK_OUT_SHIFT   29 /* SMBus Clock Out Shift */
+
+/* Receive Control */
+#define E1000_RCTL_RST            0x00000001    /* Software reset */
+#define E1000_RCTL_EN             0x00000002    /* enable */
+#define E1000_RCTL_SBP            0x00000004    /* store bad packet */
+#define E1000_RCTL_UPE            0x00000008    /* unicast promisc enable */
+#define E1000_RCTL_MPE            0x00000010    /* multicast promisc enable */
+#define E1000_RCTL_LPE            0x00000020    /* long packet enable */
+#define E1000_RCTL_LBM_NO         0x00000000    /* no loopback mode */
+#define E1000_RCTL_LBM_MAC        0x00000040    /* MAC loopback mode */
+#define E1000_RCTL_LBM_SLP        0x00000080    /* serial link loopback mode */
+#define E1000_RCTL_LBM_TCVR       0x000000C0    /* tcvr loopback mode */
+#define E1000_RCTL_DTYP_MASK      0x00000C00    /* Descriptor type mask */
+#define E1000_RCTL_DTYP_PS        0x00000400    /* Packet Split descriptor */
+#define E1000_RCTL_RDMTS_HALF     0x00000000    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_QUAT     0x00000100    /* rx desc min thresh size */
+#define E1000_RCTL_RDMTS_EIGTH    0x00000200    /* rx desc min thresh size */
+#define E1000_RCTL_MO_SHIFT       12            /* multicast offset shift */
+#define E1000_RCTL_MO_0           0x00000000    /* multicast offset 11:0 */
+#define E1000_RCTL_MO_1           0x00001000    /* multicast offset 12:1 */
+#define E1000_RCTL_MO_2           0x00002000    /* multicast offset 13:2 */
+#define E1000_RCTL_MO_3           0x00003000    /* multicast offset 15:4 */
+#define E1000_RCTL_MDR            0x00004000    /* multicast desc ring 0 */
+#define E1000_RCTL_BAM            0x00008000    /* broadcast enable */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
+#define E1000_RCTL_SZ_2048        0x00000000    /* rx buffer size 2048 */
+#define E1000_RCTL_SZ_1024        0x00010000    /* rx buffer size 1024 */
+#define E1000_RCTL_SZ_512         0x00020000    /* rx buffer size 512 */
+#define E1000_RCTL_SZ_256         0x00030000    /* rx buffer size 256 */
+/* these buffer sizes are valid if E1000_RCTL_BSEX is 1 */
+#define E1000_RCTL_SZ_16384       0x00010000    /* rx buffer size 16384 */
+#define E1000_RCTL_SZ_8192        0x00020000    /* rx buffer size 8192 */
+#define E1000_RCTL_SZ_4096        0x00030000    /* rx buffer size 4096 */
+#define E1000_RCTL_VFE            0x00040000    /* vlan filter enable */
+#define E1000_RCTL_CFIEN          0x00080000    /* canonical form enable */
+#define E1000_RCTL_CFI            0x00100000    /* canonical form indicator */
+#define E1000_RCTL_DPF            0x00400000    /* discard pause frames */
+#define E1000_RCTL_PMCF           0x00800000    /* pass MAC control frames */
+#define E1000_RCTL_BSEX           0x02000000    /* Buffer size extension */
+#define E1000_RCTL_SECRC          0x04000000    /* Strip Ethernet CRC */
+#define E1000_RCTL_FLXBUF_MASK    0x78000000    /* Flexible buffer size */
+#define E1000_RCTL_FLXBUF_SHIFT   27            /* Flexible buffer shift */
+
+/*
+ * Use byte values for the following shift parameters
+ * Usage:
+ *     psrctl |= (((ROUNDUP(value0, 128) >> E1000_PSRCTL_BSIZE0_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE0_MASK) |
+ *                ((ROUNDUP(value1, 1024) >> E1000_PSRCTL_BSIZE1_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE1_MASK) |
+ *                ((ROUNDUP(value2, 1024) << E1000_PSRCTL_BSIZE2_SHIFT) &
+ *                  E1000_PSRCTL_BSIZE2_MASK) |
+ *                ((ROUNDUP(value3, 1024) << E1000_PSRCTL_BSIZE3_SHIFT) |;
+ *                  E1000_PSRCTL_BSIZE3_MASK))
+ * where value0 = [128..16256],  default=256
+ *       value1 = [1024..64512], default=4096
+ *       value2 = [0..64512],    default=4096
+ *       value3 = [0..64512],    default=0
+ */
+
+#define E1000_PSRCTL_BSIZE0_MASK   0x0000007F
+#define E1000_PSRCTL_BSIZE1_MASK   0x00003F00
+#define E1000_PSRCTL_BSIZE2_MASK   0x003F0000
+#define E1000_PSRCTL_BSIZE3_MASK   0x3F000000
+
+#define E1000_PSRCTL_BSIZE0_SHIFT  7            /* Shift _right_ 7 */
+#define E1000_PSRCTL_BSIZE1_SHIFT  2            /* Shift _right_ 2 */
+#define E1000_PSRCTL_BSIZE2_SHIFT  6            /* Shift _left_ 6 */
+#define E1000_PSRCTL_BSIZE3_SHIFT 14            /* Shift _left_ 14 */
+
+/* SWFW_SYNC Definitions */
+#define E1000_SWFW_EEP_SM   0x01
+#define E1000_SWFW_PHY0_SM  0x02
+#define E1000_SWFW_PHY1_SM  0x04
+#define E1000_SWFW_CSR_SM   0x08
+
+/* FACTPS Definitions */
+#define E1000_FACTPS_LFS    0x40000000  /* LAN Function Select */
+/* Device Control */
+#define E1000_CTRL_FD       0x00000001  /* Full duplex.0=half; 1=full */
+#define E1000_CTRL_BEM      0x00000002  /* Endian Mode.0=little,1=big */
+#define E1000_CTRL_PRIOR    0x00000004  /* Priority on PCI. 0=rx,1=fair */
+#define E1000_CTRL_GIO_MASTER_DISABLE 0x00000004 /*Blocks new Master reqs */
+#define E1000_CTRL_LRST     0x00000008  /* Link reset. 0=normal,1=reset */
+#define E1000_CTRL_TME      0x00000010  /* Test mode. 0=normal,1=test */
+#define E1000_CTRL_SLE      0x00000020  /* Serial Link on 0=dis,1=en */
+#define E1000_CTRL_ASDE     0x00000020  /* Auto-speed detect enable */
+#define E1000_CTRL_SLU      0x00000040  /* Set link up (Force Link) */
+#define E1000_CTRL_ILOS     0x00000080  /* Invert Loss-Of Signal */
+#define E1000_CTRL_SPD_SEL  0x00000300  /* Speed Select Mask */
+#define E1000_CTRL_SPD_10   0x00000000  /* Force 10Mb */
+#define E1000_CTRL_SPD_100  0x00000100  /* Force 100Mb */
+#define E1000_CTRL_SPD_1000 0x00000200  /* Force 1Gb */
+#define E1000_CTRL_BEM32    0x00000400  /* Big Endian 32 mode */
+#define E1000_CTRL_FRCSPD   0x00000800  /* Force Speed */
+#define E1000_CTRL_FRCDPX   0x00001000  /* Force Duplex */
+#define E1000_CTRL_D_UD_EN  0x00002000  /* Dock/Undock enable */
+#define E1000_CTRL_D_UD_POLARITY 0x00004000 /* Defined polarity of Dock/Undock
+                                             * indication in SDP[0] */
+#define E1000_CTRL_FORCE_PHY_RESET 0x00008000 /* Reset both PHY ports, through
+                                               * PHYRST_N pin */
+#define E1000_CTRL_EXT_LINK_EN 0x00010000 /* enable link status from external
+                                           * LINK_0 and LINK_1 pins */
+#define E1000_CTRL_SWDPIN0  0x00040000  /* SWDPIN 0 value */
+#define E1000_CTRL_SWDPIN1  0x00080000  /* SWDPIN 1 value */
+#define E1000_CTRL_SWDPIN2  0x00100000  /* SWDPIN 2 value */
+#define E1000_CTRL_ADVD3WUC 0x00100000  /* D3 WUC */
+#define E1000_CTRL_SWDPIN3  0x00200000  /* SWDPIN 3 value */
+#define E1000_CTRL_SWDPIO0  0x00400000  /* SWDPIN 0 Input or output */
+#define E1000_CTRL_SWDPIO1  0x00800000  /* SWDPIN 1 input or output */
+#define E1000_CTRL_SWDPIO2  0x01000000  /* SWDPIN 2 input or output */
+#define E1000_CTRL_SWDPIO3  0x02000000  /* SWDPIN 3 input or output */
+#define E1000_CTRL_RST      0x04000000  /* Global reset */
+#define E1000_CTRL_RFCE     0x08000000  /* Receive Flow Control enable */
+#define E1000_CTRL_TFCE     0x10000000  /* Transmit flow control enable */
+#define E1000_CTRL_RTE      0x20000000  /* Routing tag enable */
+#define E1000_CTRL_VME      0x40000000  /* IEEE VLAN mode enable */
+#define E1000_CTRL_PHY_RST  0x80000000  /* PHY Reset */
+#define E1000_CTRL_SW2FW_INT 0x02000000 /* Initiate an interrupt to ME */
+#define E1000_CTRL_I2C_ENA  0x02000000  /* I2C enable */
+
+/*
+ * Bit definitions for the Management Data IO (MDIO) and Management Data
+ * Clock (MDC) pins in the Device Control Register.
+ */
+#define E1000_CTRL_PHY_RESET_DIR  E1000_CTRL_SWDPIO0
+#define E1000_CTRL_PHY_RESET      E1000_CTRL_SWDPIN0
+#define E1000_CTRL_MDIO_DIR       E1000_CTRL_SWDPIO2
+#define E1000_CTRL_MDIO           E1000_CTRL_SWDPIN2
+#define E1000_CTRL_MDC_DIR        E1000_CTRL_SWDPIO3
+#define E1000_CTRL_MDC            E1000_CTRL_SWDPIN3
+#define E1000_CTRL_PHY_RESET_DIR4 E1000_CTRL_EXT_SDP4_DIR
+#define E1000_CTRL_PHY_RESET4     E1000_CTRL_EXT_SDP4_DATA
+
+#define E1000_CONNSW_ENRGSRC             0x4
+#define E1000_PCS_CFG_PCS_EN             8
+#define E1000_PCS_LCTL_FLV_LINK_UP       1
+#define E1000_PCS_LCTL_FSV_10            0
+#define E1000_PCS_LCTL_FSV_100           2
+#define E1000_PCS_LCTL_FSV_1000          4
+#define E1000_PCS_LCTL_FDV_FULL          8
+#define E1000_PCS_LCTL_FSD               0x10
+#define E1000_PCS_LCTL_FORCE_LINK        0x20
+#define E1000_PCS_LCTL_LOW_LINK_LATCH    0x40
+#define E1000_PCS_LCTL_FORCE_FCTRL       0x80
+#define E1000_PCS_LCTL_AN_ENABLE         0x10000
+#define E1000_PCS_LCTL_AN_RESTART        0x20000
+#define E1000_PCS_LCTL_AN_TIMEOUT        0x40000
+#define E1000_PCS_LCTL_AN_SGMII_BYPASS   0x80000
+#define E1000_PCS_LCTL_AN_SGMII_TRIGGER  0x100000
+#define E1000_PCS_LCTL_FAST_LINK_TIMER   0x1000000
+#define E1000_PCS_LCTL_LINK_OK_FIX       0x2000000
+#define E1000_PCS_LCTL_CRS_ON_NI         0x4000000
+#define E1000_ENABLE_SERDES_LOOPBACK     0x0410
+
+#define E1000_PCS_LSTS_LINK_OK           1
+#define E1000_PCS_LSTS_SPEED_10          0
+#define E1000_PCS_LSTS_SPEED_100         2
+#define E1000_PCS_LSTS_SPEED_1000        4
+#define E1000_PCS_LSTS_DUPLEX_FULL       8
+#define E1000_PCS_LSTS_SYNK_OK           0x10
+#define E1000_PCS_LSTS_AN_COMPLETE       0x10000
+#define E1000_PCS_LSTS_AN_PAGE_RX        0x20000
+#define E1000_PCS_LSTS_AN_TIMED_OUT      0x40000
+#define E1000_PCS_LSTS_AN_REMOTE_FAULT   0x80000
+#define E1000_PCS_LSTS_AN_ERROR_RWS      0x100000
+
+/* Device Status */
+#define E1000_STATUS_FD         0x00000001      /* Full duplex.0=half,1=full */
+#define E1000_STATUS_LU         0x00000002      /* Link up.0=no,1=link */
+#define E1000_STATUS_FUNC_MASK  0x0000000C      /* PCI Function Mask */
+#define E1000_STATUS_FUNC_SHIFT 2
+#define E1000_STATUS_FUNC_0     0x00000000      /* Function 0 */
+#define E1000_STATUS_FUNC_1     0x00000004      /* Function 1 */
+#define E1000_STATUS_TXOFF      0x00000010      /* transmission paused */
+#define E1000_STATUS_TBIMODE    0x00000020      /* TBI mode */
+#define E1000_STATUS_SPEED_MASK 0x000000C0
+#define E1000_STATUS_SPEED_10   0x00000000      /* Speed 10Mb/s */
+#define E1000_STATUS_SPEED_100  0x00000040      /* Speed 100Mb/s */
+#define E1000_STATUS_SPEED_1000 0x00000080      /* Speed 1000Mb/s */
+#define E1000_STATUS_LAN_INIT_DONE 0x00000200  /* Lan Init Completion by NVM */
+#define E1000_STATUS_ASDV       0x00000300      /* Auto speed detect value */
+#define E1000_STATUS_PHYRA      0x00000400      /* PHY Reset Asserted */
+#define E1000_STATUS_DOCK_CI    0x00000800      /* Change in Dock/Undock state.
+                                                 * Clear on write '0'. */
+#define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Master request status */
+#define E1000_STATUS_MTXCKOK    0x00000400      /* MTX clock running OK */
+#define E1000_STATUS_PCI66      0x00000800      /* In 66Mhz slot */
+#define E1000_STATUS_BUS64      0x00001000      /* In 64 bit slot */
+#define E1000_STATUS_PCIX_MODE  0x00002000      /* PCI-X mode */
+#define E1000_STATUS_PCIX_SPEED 0x0000C000      /* PCI-X bus speed */
+#define E1000_STATUS_BMC_SKU_0  0x00100000 /* BMC USB redirect disabled */
+#define E1000_STATUS_BMC_SKU_1  0x00200000 /* BMC SRAM disabled */
+#define E1000_STATUS_BMC_SKU_2  0x00400000 /* BMC SDRAM disabled */
+#define E1000_STATUS_BMC_CRYPTO 0x00800000 /* BMC crypto disabled */
+#define E1000_STATUS_BMC_LITE   0x01000000 /* BMC external code execution
+                                            * disabled */
+#define E1000_STATUS_RGMII_ENABLE 0x02000000 /* RGMII disabled */
+#define E1000_STATUS_FUSE_8       0x04000000
+#define E1000_STATUS_FUSE_9       0x08000000
+#define E1000_STATUS_SERDES0_DIS  0x10000000 /* SERDES disabled on port 0 */
+#define E1000_STATUS_SERDES1_DIS  0x20000000 /* SERDES disabled on port 1 */
+
+/* Constants used to interpret the masked PCI-X bus speed. */
+#define E1000_STATUS_PCIX_SPEED_66  0x00000000 /* PCI-X bus speed 50-66 MHz */
+#define E1000_STATUS_PCIX_SPEED_100 0x00004000 /* PCI-X bus speed 66-100 MHz */
+#define E1000_STATUS_PCIX_SPEED_133 0x00008000 /*PCI-X bus speed 100-133 MHz*/
+
+#define SPEED_10    10
+#define SPEED_100   100
+#define SPEED_1000  1000
+#define HALF_DUPLEX 1
+#define FULL_DUPLEX 2
+
+#define PHY_FORCE_TIME   20
+
+#define ADVERTISE_10_HALF                 0x0001
+#define ADVERTISE_10_FULL                 0x0002
+#define ADVERTISE_100_HALF                0x0004
+#define ADVERTISE_100_FULL                0x0008
+#define ADVERTISE_1000_HALF               0x0010 /* Not used, just FYI */
+#define ADVERTISE_1000_FULL               0x0020
+
+/* 1000/H is not supported, nor spec-compliant. */
+#define E1000_ALL_SPEED_DUPLEX  (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_NOT_GIG       (ADVERTISE_10_HALF |   ADVERTISE_10_FULL | \
+                                ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_100_SPEED    (ADVERTISE_100_HALF |  ADVERTISE_100_FULL)
+#define E1000_ALL_10_SPEED      (ADVERTISE_10_HALF |   ADVERTISE_10_FULL)
+#define E1000_ALL_FULL_DUPLEX   (ADVERTISE_10_FULL |  ADVERTISE_100_FULL | \
+                                                     ADVERTISE_1000_FULL)
+#define E1000_ALL_HALF_DUPLEX   (ADVERTISE_10_HALF |  ADVERTISE_100_HALF)
+
+#define AUTONEG_ADVERTISE_SPEED_DEFAULT   E1000_ALL_SPEED_DUPLEX
+
+/* LED Control */
+#define E1000_LEDCTL_LED0_MODE_MASK       0x0000000F
+#define E1000_LEDCTL_LED0_MODE_SHIFT      0
+#define E1000_LEDCTL_LED0_BLINK_RATE      0x00000020
+#define E1000_LEDCTL_LED0_IVRT            0x00000040
+#define E1000_LEDCTL_LED0_BLINK           0x00000080
+#define E1000_LEDCTL_LED1_MODE_MASK       0x00000F00
+#define E1000_LEDCTL_LED1_MODE_SHIFT      8
+#define E1000_LEDCTL_LED1_BLINK_RATE      0x00002000
+#define E1000_LEDCTL_LED1_IVRT            0x00004000
+#define E1000_LEDCTL_LED1_BLINK           0x00008000
+#define E1000_LEDCTL_LED2_MODE_MASK       0x000F0000
+#define E1000_LEDCTL_LED2_MODE_SHIFT      16
+#define E1000_LEDCTL_LED2_BLINK_RATE      0x00200000
+#define E1000_LEDCTL_LED2_IVRT            0x00400000
+#define E1000_LEDCTL_LED2_BLINK           0x00800000
+#define E1000_LEDCTL_LED3_MODE_MASK       0x0F000000
+#define E1000_LEDCTL_LED3_MODE_SHIFT      24
+#define E1000_LEDCTL_LED3_BLINK_RATE      0x20000000
+#define E1000_LEDCTL_LED3_IVRT            0x40000000
+#define E1000_LEDCTL_LED3_BLINK           0x80000000
+
+#define E1000_LEDCTL_MODE_LINK_10_1000  0x0
+#define E1000_LEDCTL_MODE_LINK_100_1000 0x1
+#define E1000_LEDCTL_MODE_LINK_UP       0x2
+#define E1000_LEDCTL_MODE_ACTIVITY      0x3
+#define E1000_LEDCTL_MODE_LINK_ACTIVITY 0x4
+#define E1000_LEDCTL_MODE_LINK_10       0x5
+#define E1000_LEDCTL_MODE_LINK_100      0x6
+#define E1000_LEDCTL_MODE_LINK_1000     0x7
+#define E1000_LEDCTL_MODE_PCIX_MODE     0x8
+#define E1000_LEDCTL_MODE_FULL_DUPLEX   0x9
+#define E1000_LEDCTL_MODE_COLLISION     0xA
+#define E1000_LEDCTL_MODE_BUS_SPEED     0xB
+#define E1000_LEDCTL_MODE_BUS_SIZE      0xC
+#define E1000_LEDCTL_MODE_PAUSED        0xD
+#define E1000_LEDCTL_MODE_LED_ON        0xE
+#define E1000_LEDCTL_MODE_LED_OFF       0xF
+
+/* Transmit Descriptor bit definitions */
+#define E1000_TXD_DTYP_D     0x00100000 /* Data Descriptor */
+#define E1000_TXD_DTYP_C     0x00000000 /* Context Descriptor */
+#define E1000_TXD_POPTS_SHIFT 8         /* POPTS shift */
+#define E1000_TXD_POPTS_IXSM 0x01       /* Insert IP checksum */
+#define E1000_TXD_POPTS_TXSM 0x02       /* Insert TCP/UDP checksum */
+#define E1000_TXD_CMD_EOP    0x01000000 /* End of Packet */
+#define E1000_TXD_CMD_IFCS   0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_TXD_CMD_IC     0x04000000 /* Insert Checksum */
+#define E1000_TXD_CMD_RS     0x08000000 /* Report Status */
+#define E1000_TXD_CMD_RPS    0x10000000 /* Report Packet Sent */
+#define E1000_TXD_CMD_DEXT   0x20000000 /* Descriptor extension (0 = legacy) */
+#define E1000_TXD_CMD_VLE    0x40000000 /* Add VLAN tag */
+#define E1000_TXD_CMD_IDE    0x80000000 /* Enable Tidv register */
+#define E1000_TXD_STAT_DD    0x00000001 /* Descriptor Done */
+#define E1000_TXD_STAT_EC    0x00000002 /* Excess Collisions */
+#define E1000_TXD_STAT_LC    0x00000004 /* Late Collisions */
+#define E1000_TXD_STAT_TU    0x00000008 /* Transmit underrun */
+#define E1000_TXD_CMD_TCP    0x01000000 /* TCP packet */
+#define E1000_TXD_CMD_IP     0x02000000 /* IP packet */
+#define E1000_TXD_CMD_TSE    0x04000000 /* TCP Seg enable */
+#define E1000_TXD_STAT_TC    0x00000004 /* Tx Underrun */
+/* Extended desc bits for Linksec and timesync */
+
+/* Transmit Control */
+#define E1000_TCTL_RST    0x00000001    /* software reset */
+#define E1000_TCTL_EN     0x00000002    /* enable tx */
+#define E1000_TCTL_BCE    0x00000004    /* busy check enable */
+#define E1000_TCTL_PSP    0x00000008    /* pad short packets */
+#define E1000_TCTL_CT     0x00000ff0    /* collision threshold */
+#define E1000_TCTL_COLD   0x003ff000    /* collision distance */
+#define E1000_TCTL_SWXOFF 0x00400000    /* SW Xoff transmission */
+#define E1000_TCTL_PBE    0x00800000    /* Packet Burst Enable */
+#define E1000_TCTL_RTLC   0x01000000    /* Re-transmit on late collision */
+#define E1000_TCTL_NRTU   0x02000000    /* No Re-transmit on underrun */
+#define E1000_TCTL_MULR   0x10000000    /* Multiple request support */
+
+/* Transmit Arbitration Count */
+#define E1000_TARC0_ENABLE     0x00000400   /* Enable Tx Queue 0 */
+
+/* SerDes Control */
+#define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400
+
+/* Receive Checksum Control */
+#define E1000_RXCSUM_PCSS_MASK 0x000000FF   /* Packet Checksum Start */
+#define E1000_RXCSUM_IPOFL     0x00000100   /* IPv4 checksum offload */
+#define E1000_RXCSUM_TUOFL     0x00000200   /* TCP / UDP checksum offload */
+#define E1000_RXCSUM_IPV6OFL   0x00000400   /* IPv6 checksum offload */
+#define E1000_RXCSUM_CRCOFL    0x00000800   /* CRC32 offload enable */
+#define E1000_RXCSUM_IPPCSE    0x00001000   /* IP payload checksum enable */
+#define E1000_RXCSUM_PCSD      0x00002000   /* packet checksum disabled */
+
+/* Header split receive */
+#define E1000_RFCTL_ISCSI_DIS           0x00000001
+#define E1000_RFCTL_ISCSI_DWC_MASK      0x0000003E
+#define E1000_RFCTL_ISCSI_DWC_SHIFT     1
+#define E1000_RFCTL_NFSW_DIS            0x00000040
+#define E1000_RFCTL_NFSR_DIS            0x00000080
+#define E1000_RFCTL_NFS_VER_MASK        0x00000300
+#define E1000_RFCTL_NFS_VER_SHIFT       8
+#define E1000_RFCTL_IPV6_DIS            0x00000400
+#define E1000_RFCTL_IPV6_XSUM_DIS       0x00000800
+#define E1000_RFCTL_ACK_DIS             0x00001000
+#define E1000_RFCTL_ACKD_DIS            0x00002000
+#define E1000_RFCTL_IPFRSP_DIS          0x00004000
+#define E1000_RFCTL_EXTEN               0x00008000
+#define E1000_RFCTL_IPV6_EX_DIS         0x00010000
+#define E1000_RFCTL_NEW_IPV6_EXT_DIS    0x00020000
+#define E1000_RFCTL_LEF                 0x00040000
+
+/* Collision related configuration parameters */
+#define E1000_COLLISION_THRESHOLD       15
+#define E1000_CT_SHIFT                  4
+#define E1000_COLLISION_DISTANCE        63
+#define E1000_COLD_SHIFT                12
+
+/* Default values for the transmit IPG register */
+#define DEFAULT_82543_TIPG_IPGT_FIBER  9
+#define DEFAULT_82543_TIPG_IPGT_COPPER 8
+
+#define E1000_TIPG_IPGT_MASK  0x000003FF
+#define E1000_TIPG_IPGR1_MASK 0x000FFC00
+#define E1000_TIPG_IPGR2_MASK 0x3FF00000
+
+#define DEFAULT_82543_TIPG_IPGR1 8
+#define E1000_TIPG_IPGR1_SHIFT  10
+
+#define DEFAULT_82543_TIPG_IPGR2 6
+#define DEFAULT_80003ES2LAN_TIPG_IPGR2 7
+#define E1000_TIPG_IPGR2_SHIFT  20
+
+/* Ethertype field values */
+#define ETHERNET_IEEE_VLAN_TYPE 0x8100  /* 802.3ac packet */
+
+#define ETHERNET_FCS_SIZE       4
+#define MAX_JUMBO_FRAME_SIZE    0x3F00
+
+/* Extended Configuration Control and Size */
+#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP      0x00000020
+#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE       0x00000001
+#define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE       0x00000008
+#define E1000_EXTCNF_CTRL_SWFLAG                 0x00000020
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK   0x00FF0000
+#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT          16
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK   0x0FFF0000
+#define E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT          16
+
+#define E1000_PHY_CTRL_SPD_EN             0x00000001
+#define E1000_PHY_CTRL_D0A_LPLU           0x00000002
+#define E1000_PHY_CTRL_NOND0A_LPLU        0x00000004
+#define E1000_PHY_CTRL_NOND0A_GBE_DISABLE 0x00000008
+#define E1000_PHY_CTRL_GBE_DISABLE        0x00000040
+
+#define E1000_KABGTXD_BGSQLBIAS           0x00050000
+
+/* PBA constants */
+#define E1000_PBA_6K  0x0006    /* 6KB */
+#define E1000_PBA_8K  0x0008    /* 8KB */
+#define E1000_PBA_10K 0x000A    /* 10KB */
+#define E1000_PBA_12K 0x000C    /* 12KB */
+#define E1000_PBA_14K 0x000E    /* 14KB */
+#define E1000_PBA_16K 0x0010    /* 16KB */
+#define E1000_PBA_18K 0x0012
+#define E1000_PBA_20K 0x0014
+#define E1000_PBA_22K 0x0016
+#define E1000_PBA_24K 0x0018
+#define E1000_PBA_26K 0x001A
+#define E1000_PBA_30K 0x001E
+#define E1000_PBA_32K 0x0020
+#define E1000_PBA_34K 0x0022
+#define E1000_PBA_35K 0x0023
+#define E1000_PBA_38K 0x0026
+#define E1000_PBA_40K 0x0028
+#define E1000_PBA_48K 0x0030    /* 48KB */
+#define E1000_PBA_64K 0x0040    /* 64KB */
+
+#define E1000_PBS_16K E1000_PBA_16K
+#define E1000_PBS_24K E1000_PBA_24K
+
+#define IFS_MAX       80
+#define IFS_MIN       40
+#define IFS_RATIO     4
+#define IFS_STEP      10
+#define MIN_NUM_XMITS 1000
+
+/* SW Semaphore Register */
+#define E1000_SWSM_SMBI         0x00000001 /* Driver Semaphore bit */
+#define E1000_SWSM_SWESMBI      0x00000002 /* FW Semaphore bit */
+#define E1000_SWSM_WMNG         0x00000004 /* Wake MNG Clock */
+#define E1000_SWSM_DRV_LOAD     0x00000008 /* Driver Loaded Bit */
+
+#define E1000_SWSM2_LOCK        0x00000002 /* Secondary driver semaphore bit */
+
+/* Interrupt Cause Read */
+#define E1000_ICR_TXDW          0x00000001 /* Transmit desc written back */
+#define E1000_ICR_TXQE          0x00000002 /* Transmit Queue empty */
+#define E1000_ICR_LSC           0x00000004 /* Link Status Change */
+#define E1000_ICR_RXSEQ         0x00000008 /* rx sequence error */
+#define E1000_ICR_RXDMT0        0x00000010 /* rx desc min. threshold (0) */
+#define E1000_ICR_RXO           0x00000040 /* rx overrun */
+#define E1000_ICR_RXT0          0x00000080 /* rx timer intr (ring 0) */
+#define E1000_ICR_VMMB          0x00000100 /* VM MB event */
+#define E1000_ICR_MDAC          0x00000200 /* MDIO access complete */
+#define E1000_ICR_RXCFG         0x00000400 /* Rx /c/ ordered set */
+#define E1000_ICR_GPI_EN0       0x00000800 /* GP Int 0 */
+#define E1000_ICR_GPI_EN1       0x00001000 /* GP Int 1 */
+#define E1000_ICR_GPI_EN2       0x00002000 /* GP Int 2 */
+#define E1000_ICR_GPI_EN3       0x00004000 /* GP Int 3 */
+#define E1000_ICR_TXD_LOW       0x00008000
+#define E1000_ICR_SRPD          0x00010000
+#define E1000_ICR_ACK           0x00020000 /* Receive Ack frame */
+#define E1000_ICR_MNG           0x00040000 /* Manageability event */
+#define E1000_ICR_DOCK          0x00080000 /* Dock/Undock */
+#define E1000_ICR_INT_ASSERTED  0x80000000 /* If this bit asserted, the driver
+                                            * should claim the interrupt */
+#define E1000_ICR_RXD_FIFO_PAR0 0x00100000 /* Q0 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR0 0x00200000 /* Q0 Tx desc FIFO parity error */
+#define E1000_ICR_HOST_ARB_PAR 0x00400000 /* host arb read buffer parity err */
+#define E1000_ICR_PB_PAR        0x00800000 /* packet buffer parity error */
+#define E1000_ICR_RXD_FIFO_PAR1 0x01000000 /* Q1 Rx desc FIFO parity error */
+#define E1000_ICR_TXD_FIFO_PAR1 0x02000000 /* Q1 Tx desc FIFO parity error */
+#define E1000_ICR_ALL_PARITY    0x03F00000 /* all parity error bits */
+#define E1000_ICR_DSW           0x00000020 /* FW changed the status of DISSW
+                                            * bit in the FWSM */
+#define E1000_ICR_PHYINT        0x00001000 /* LAN connected device generates
+                                            * an interrupt */
+#define E1000_ICR_DOUTSYNC      0x10000000 /* NIC DMA out of sync */
+#define E1000_ICR_EPRST         0x00100000 /* ME hardware reset occurs */
+
+
+/* Extended Interrupt Cause Read */
+#define E1000_EICR_RX_QUEUE0    0x00000001 /* Rx Queue 0 Interrupt */
+#define E1000_EICR_RX_QUEUE1    0x00000002 /* Rx Queue 1 Interrupt */
+#define E1000_EICR_RX_QUEUE2    0x00000004 /* Rx Queue 2 Interrupt */
+#define E1000_EICR_RX_QUEUE3    0x00000008 /* Rx Queue 3 Interrupt */
+#define E1000_EICR_TX_QUEUE0    0x00000100 /* Tx Queue 0 Interrupt */
+#define E1000_EICR_TX_QUEUE1    0x00000200 /* Tx Queue 1 Interrupt */
+#define E1000_EICR_TX_QUEUE2    0x00000400 /* Tx Queue 2 Interrupt */
+#define E1000_EICR_TX_QUEUE3    0x00000800 /* Tx Queue 3 Interrupt */
+#define E1000_EICR_TCP_TIMER    0x40000000 /* TCP Timer */
+#define E1000_EICR_OTHER        0x80000000 /* Interrupt Cause Active */
+/* TCP Timer */
+#define E1000_TCPTIMER_KS       0x00000100 /* KickStart */
+#define E1000_TCPTIMER_COUNT_ENABLE       0x00000200 /* Count Enable */
+#define E1000_TCPTIMER_COUNT_FINISH       0x00000400 /* Count finish */
+#define E1000_TCPTIMER_LOOP     0x00000800 /* Loop */
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ */
+#define POLL_IMS_ENABLE_MASK ( \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ)
+
+/*
+ * This defines the bits that are set in the Interrupt Mask
+ * Set/Read Register.  Each bit is documented below:
+ *   o RXT0   = Receiver Timer Interrupt (ring 0)
+ *   o TXDW   = Transmit Descriptor Written Back
+ *   o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0)
+ *   o RXSEQ  = Receive Sequence Error
+ *   o LSC    = Link Status Change
+ */
+#define IMS_ENABLE_MASK ( \
+    E1000_IMS_RXT0   |    \
+    E1000_IMS_TXDW   |    \
+    E1000_IMS_RXDMT0 |    \
+    E1000_IMS_RXSEQ  |    \
+    E1000_IMS_LSC)
+
+/* Interrupt Mask Set */
+#define E1000_IMS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_IMS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_IMS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_IMS_VMMB      E1000_ICR_VMMB      /* Mail box activity */
+#define E1000_IMS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_IMS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_IMS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_IMS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_IMS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_IMS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_IMS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_IMS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_IMS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_IMS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_IMS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_IMS_SRPD      E1000_ICR_SRPD
+#define E1000_IMS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_IMS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_IMS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_IMS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_IMS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_IMS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_IMS_DSW       E1000_ICR_DSW
+#define E1000_IMS_PHYINT    E1000_ICR_PHYINT
+#define E1000_IMS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_IMS_EPRST     E1000_ICR_EPRST
+
+/* Extended Interrupt Mask Set */
+#define E1000_EIMS_RX_QUEUE0    E1000_EICR_RX_QUEUE0 /* Rx Queue 0 Interrupt */
+#define E1000_EIMS_RX_QUEUE1    E1000_EICR_RX_QUEUE1 /* Rx Queue 1 Interrupt */
+#define E1000_EIMS_RX_QUEUE2    E1000_EICR_RX_QUEUE2 /* Rx Queue 2 Interrupt */
+#define E1000_EIMS_RX_QUEUE3    E1000_EICR_RX_QUEUE3 /* Rx Queue 3 Interrupt */
+#define E1000_EIMS_TX_QUEUE0    E1000_EICR_TX_QUEUE0 /* Tx Queue 0 Interrupt */
+#define E1000_EIMS_TX_QUEUE1    E1000_EICR_TX_QUEUE1 /* Tx Queue 1 Interrupt */
+#define E1000_EIMS_TX_QUEUE2    E1000_EICR_TX_QUEUE2 /* Tx Queue 2 Interrupt */
+#define E1000_EIMS_TX_QUEUE3    E1000_EICR_TX_QUEUE3 /* Tx Queue 3 Interrupt */
+#define E1000_EIMS_TCP_TIMER    E1000_EICR_TCP_TIMER /* TCP Timer */
+#define E1000_EIMS_OTHER        E1000_EICR_OTHER   /* Interrupt Cause Active */
+
+/* Interrupt Cause Set */
+#define E1000_ICS_TXDW      E1000_ICR_TXDW      /* Tx desc written back */
+#define E1000_ICS_TXQE      E1000_ICR_TXQE      /* Transmit Queue empty */
+#define E1000_ICS_LSC       E1000_ICR_LSC       /* Link Status Change */
+#define E1000_ICS_RXSEQ     E1000_ICR_RXSEQ     /* rx sequence error */
+#define E1000_ICS_RXDMT0    E1000_ICR_RXDMT0    /* rx desc min. threshold */
+#define E1000_ICS_RXO       E1000_ICR_RXO       /* rx overrun */
+#define E1000_ICS_RXT0      E1000_ICR_RXT0      /* rx timer intr */
+#define E1000_ICS_MDAC      E1000_ICR_MDAC      /* MDIO access complete */
+#define E1000_ICS_RXCFG     E1000_ICR_RXCFG     /* Rx /c/ ordered set */
+#define E1000_ICS_GPI_EN0   E1000_ICR_GPI_EN0   /* GP Int 0 */
+#define E1000_ICS_GPI_EN1   E1000_ICR_GPI_EN1   /* GP Int 1 */
+#define E1000_ICS_GPI_EN2   E1000_ICR_GPI_EN2   /* GP Int 2 */
+#define E1000_ICS_GPI_EN3   E1000_ICR_GPI_EN3   /* GP Int 3 */
+#define E1000_ICS_TXD_LOW   E1000_ICR_TXD_LOW
+#define E1000_ICS_SRPD      E1000_ICR_SRPD
+#define E1000_ICS_ACK       E1000_ICR_ACK       /* Receive Ack frame */
+#define E1000_ICS_MNG       E1000_ICR_MNG       /* Manageability event */
+#define E1000_ICS_DOCK      E1000_ICR_DOCK      /* Dock/Undock */
+#define E1000_ICS_RXD_FIFO_PAR0 E1000_ICR_RXD_FIFO_PAR0 /* Q0 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR0 E1000_ICR_TXD_FIFO_PAR0 /* Q0 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_HOST_ARB_PAR  E1000_ICR_HOST_ARB_PAR  /* host arb read buffer
+                                                         * parity error */
+#define E1000_ICS_PB_PAR        E1000_ICR_PB_PAR        /* packet buffer parity
+                                                         * error */
+#define E1000_ICS_RXD_FIFO_PAR1 E1000_ICR_RXD_FIFO_PAR1 /* Q1 Rx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_TXD_FIFO_PAR1 E1000_ICR_TXD_FIFO_PAR1 /* Q1 Tx desc FIFO
+                                                         * parity error */
+#define E1000_ICS_DSW       E1000_ICR_DSW
+#define E1000_ICS_DOUTSYNC  E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
+#define E1000_ICS_PHYINT    E1000_ICR_PHYINT
+#define E1000_ICS_EPRST     E1000_ICR_EPRST
+
+/* Extended Interrupt Cause Set */
+#define E1000_EICS_RX_QUEUE0    E1000_EICR_RX_QUEUE0 /* Rx Queue 0 Interrupt */
+#define E1000_EICS_RX_QUEUE1    E1000_EICR_RX_QUEUE1 /* Rx Queue 1 Interrupt */
+#define E1000_EICS_RX_QUEUE2    E1000_EICR_RX_QUEUE2 /* Rx Queue 2 Interrupt */
+#define E1000_EICS_RX_QUEUE3    E1000_EICR_RX_QUEUE3 /* Rx Queue 3 Interrupt */
+#define E1000_EICS_TX_QUEUE0    E1000_EICR_TX_QUEUE0 /* Tx Queue 0 Interrupt */
+#define E1000_EICS_TX_QUEUE1    E1000_EICR_TX_QUEUE1 /* Tx Queue 1 Interrupt */
+#define E1000_EICS_TX_QUEUE2    E1000_EICR_TX_QUEUE2 /* Tx Queue 2 Interrupt */
+#define E1000_EICS_TX_QUEUE3    E1000_EICR_TX_QUEUE3 /* Tx Queue 3 Interrupt */
+#define E1000_EICS_TCP_TIMER    E1000_EICR_TCP_TIMER /* TCP Timer */
+#define E1000_EICS_OTHER        E1000_EICR_OTHER   /* Interrupt Cause Active */
+
+#define E1000_EITR_ITR_INT_MASK 0x0000FFFF
+
+/* Transmit Descriptor Control */
+#define E1000_TXDCTL_PTHRESH 0x0000003F /* TXDCTL Prefetch Threshold */
+#define E1000_TXDCTL_HTHRESH 0x00003F00 /* TXDCTL Host Threshold */
+#define E1000_TXDCTL_WTHRESH 0x003F0000 /* TXDCTL Writeback Threshold */
+#define E1000_TXDCTL_GRAN    0x01000000 /* TXDCTL Granularity */
+#define E1000_TXDCTL_LWTHRESH 0xFE000000 /* TXDCTL Low Threshold */
+#define E1000_TXDCTL_FULL_TX_DESC_WB 0x01010000 /* GRAN=1, WTHRESH=1 */
+#define E1000_TXDCTL_MAX_TX_DESC_PREFETCH 0x0100001F /* GRAN=1, PTHRESH=31 */
+/* Enable the counting of descriptors still to be processed. */
+#define E1000_TXDCTL_COUNT_DESC 0x00400000
+
+/* Flow Control Constants */
+#define FLOW_CONTROL_ADDRESS_LOW  0x00C28001
+#define FLOW_CONTROL_ADDRESS_HIGH 0x00000100
+#define FLOW_CONTROL_TYPE         0x8808
+
+/* 802.1q VLAN Packet Size */
+#define VLAN_TAG_SIZE              4    /* 802.3ac tag (not DMA'd) */
+#define E1000_VLAN_FILTER_TBL_SIZE 128  /* VLAN Filter Table (4096 bits) */
+
+/* Receive Address */
+/*
+ * Number of high/low register pairs in the RAR. The RAR (Receive Address
+ * Registers) holds the directed and multicast addresses that we monitor.
+ * Technically, we have 16 spots.  However, we reserve one of these spots
+ * (RAR[15]) for our directed address used by controllers with
+ * manageability enabled, allowing us room for 15 multicast addresses.
+ */
+#define E1000_RAR_ENTRIES     15
+#define E1000_RAH_AV  0x80000000        /* Receive descriptor valid */
+#define E1000_RAL_MAC_ADDR_LEN 4
+#define E1000_RAH_MAC_ADDR_LEN 2
+#define E1000_RAH_POOL_MASK 0x03FC0000
+#define E1000_RAH_POOL_1 0x00040000
+
+/* Error Codes */
+#define E1000_SUCCESS      0
+#define E1000_ERR_NVM      1
+#define E1000_ERR_PHY      2
+#define E1000_ERR_CONFIG   3
+#define E1000_ERR_PARAM    4
+#define E1000_ERR_MAC_INIT 5
+#define E1000_ERR_PHY_TYPE 6
+#define E1000_ERR_RESET   9
+#define E1000_ERR_MASTER_REQUESTS_PENDING 10
+#define E1000_ERR_HOST_INTERFACE_COMMAND 11
+#define E1000_BLK_PHY_RESET   12
+#define E1000_ERR_SWFW_SYNC 13
+#define E1000_NOT_IMPLEMENTED 14
+#define E1000_ERR_MBX      15
+
+/* Loop limit on how long we wait for auto-negotiation to complete */
+#define FIBER_LINK_UP_LIMIT               50
+#define COPPER_LINK_UP_LIMIT              10
+#define PHY_AUTO_NEG_LIMIT                45
+#define PHY_FORCE_LIMIT                   20
+/* Number of 100 microseconds we wait for PCI Express master disable */
+#define MASTER_DISABLE_TIMEOUT      800
+/* Number of milliseconds we wait for PHY configuration done after MAC reset */
+#define PHY_CFG_TIMEOUT             100
+/* Number of 2 milliseconds we wait for acquiring MDIO ownership. */
+#define MDIO_OWNERSHIP_TIMEOUT      10
+/* Number of milliseconds for NVM auto read done after MAC reset. */
+#define AUTO_READ_DONE_TIMEOUT      10
+
+/* Flow Control */
+#define E1000_FCRTH_RTH  0x0000FFF8     /* Mask Bits[15:3] for RTH */
+#define E1000_FCRTH_XFCE 0x80000000     /* External Flow Control Enable */
+#define E1000_FCRTL_RTL  0x0000FFF8     /* Mask Bits[15:3] for RTL */
+#define E1000_FCRTL_XONE 0x80000000     /* Enable XON frame transmission */
+
+/* Transmit Configuration Word */
+#define E1000_TXCW_FD         0x00000020        /* TXCW full duplex */
+#define E1000_TXCW_HD         0x00000040        /* TXCW half duplex */
+#define E1000_TXCW_PAUSE      0x00000080        /* TXCW sym pause request */
+#define E1000_TXCW_ASM_DIR    0x00000100        /* TXCW astm pause direction */
+#define E1000_TXCW_PAUSE_MASK 0x00000180        /* TXCW pause request mask */
+#define E1000_TXCW_RF         0x00003000        /* TXCW remote fault */
+#define E1000_TXCW_NP         0x00008000        /* TXCW next page */
+#define E1000_TXCW_CW         0x0000ffff        /* TxConfigWord mask */
+#define E1000_TXCW_TXC        0x40000000        /* Transmit Config control */
+#define E1000_TXCW_ANE        0x80000000        /* Auto-neg enable */
+
+/* Receive Configuration Word */
+#define E1000_RXCW_CW         0x0000ffff        /* RxConfigWord mask */
+#define E1000_RXCW_NC         0x04000000        /* Receive config no carrier */
+#define E1000_RXCW_IV         0x08000000        /* Receive config invalid */
+#define E1000_RXCW_CC         0x10000000        /* Receive config change */
+#define E1000_RXCW_C          0x20000000        /* Receive config */
+#define E1000_RXCW_SYNCH      0x40000000        /* Receive config synch */
+#define E1000_RXCW_ANC        0x80000000        /* Auto-neg complete */
+
+#define E1000_TSYNCTXCTL_VALID    0x00000001 /* tx timestamp valid */
+#define E1000_TSYNCTXCTL_ENABLED  0x00000010 /* enable tx timestampping */
+
+#define E1000_TSYNCRXCTL_VALID      0x00000001 /* rx timestamp valid */
+#define E1000_TSYNCRXCTL_TYPE_MASK  0x0000000E /* rx type mask */
+#define E1000_TSYNCRXCTL_TYPE_L2_V2       0x00
+#define E1000_TSYNCRXCTL_TYPE_L4_V1       0x02
+#define E1000_TSYNCRXCTL_TYPE_L2_L4_V2    0x04
+#define E1000_TSYNCRXCTL_TYPE_ALL         0x08
+#define E1000_TSYNCRXCTL_TYPE_EVENT_V2    0x0A
+#define E1000_TSYNCRXCTL_ENABLED    0x00000010 /* enable rx timestampping */
+
+#define E1000_TSYNCRXCFG_PTP_V1_CTRLT_MASK   0x000000FF
+#define E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE       0x00
+#define E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE  0x01
+#define E1000_TSYNCRXCFG_PTP_V1_FOLLOWUP_MESSAGE   0x02
+#define E1000_TSYNCRXCFG_PTP_V1_DELAY_RESP_MESSAGE 0x03
+#define E1000_TSYNCRXCFG_PTP_V1_MANAGEMENT_MESSAGE 0x04
+
+#define E1000_TSYNCRXCFG_PTP_V2_MSGID_MASK               0x00000F00
+#define E1000_TSYNCRXCFG_PTP_V2_SYNC_MESSAGE                 0x0000
+#define E1000_TSYNCRXCFG_PTP_V2_DELAY_REQ_MESSAGE            0x0100
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_REQ_MESSAGE       0x0200
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_RESP_MESSAGE      0x0300
+#define E1000_TSYNCRXCFG_PTP_V2_FOLLOWUP_MESSAGE             0x0800
+#define E1000_TSYNCRXCFG_PTP_V2_DELAY_RESP_MESSAGE           0x0900
+#define E1000_TSYNCRXCFG_PTP_V2_PATH_DELAY_FOLLOWUP_MESSAGE  0x0A00
+#define E1000_TSYNCRXCFG_PTP_V2_ANNOUNCE_MESSAGE             0x0B00
+#define E1000_TSYNCRXCFG_PTP_V2_SIGNALLING_MESSAGE           0x0C00
+#define E1000_TSYNCRXCFG_PTP_V2_MANAGEMENT_MESSAGE           0x0D00
+
+#define E1000_TIMINCA_16NS_SHIFT 24
+
+/* PCI Express Control */
+#define E1000_GCR_RXD_NO_SNOOP          0x00000001
+#define E1000_GCR_RXDSCW_NO_SNOOP       0x00000002
+#define E1000_GCR_RXDSCR_NO_SNOOP       0x00000004
+#define E1000_GCR_TXD_NO_SNOOP          0x00000008
+#define E1000_GCR_TXDSCW_NO_SNOOP       0x00000010
+#define E1000_GCR_TXDSCR_NO_SNOOP       0x00000020
+#define E1000_GCR_CMPL_TMOUT_MASK       0x0000F000
+#define E1000_GCR_CMPL_TMOUT_10ms       0x00001000
+#define E1000_GCR_CMPL_TMOUT_RESEND     0x00010000
+#define E1000_GCR_CAP_VER2              0x00040000
+
+#define PCIE_NO_SNOOP_ALL (E1000_GCR_RXD_NO_SNOOP         | \
+                           E1000_GCR_RXDSCW_NO_SNOOP      | \
+                           E1000_GCR_RXDSCR_NO_SNOOP      | \
+                           E1000_GCR_TXD_NO_SNOOP         | \
+                           E1000_GCR_TXDSCW_NO_SNOOP      | \
+                           E1000_GCR_TXDSCR_NO_SNOOP)
+
+/* PHY Control Register */
+#define MII_CR_SPEED_SELECT_MSB 0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_COLL_TEST_ENABLE 0x0080  /* Collision test enable */
+#define MII_CR_FULL_DUPLEX      0x0100  /* FDX =1, half duplex =0 */
+#define MII_CR_RESTART_AUTO_NEG 0x0200  /* Restart auto negotiation */
+#define MII_CR_ISOLATE          0x0400  /* Isolate PHY from MII */
+#define MII_CR_POWER_DOWN       0x0800  /* Power down */
+#define MII_CR_AUTO_NEG_EN      0x1000  /* Auto Neg Enable */
+#define MII_CR_SPEED_SELECT_LSB 0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define MII_CR_LOOPBACK         0x4000  /* 0 = normal, 1 = loopback */
+#define MII_CR_RESET            0x8000  /* 0 = normal, 1 = PHY reset */
+#define MII_CR_SPEED_1000       0x0040
+#define MII_CR_SPEED_100        0x2000
+#define MII_CR_SPEED_10         0x0000
+
+/* PHY Status Register */
+#define MII_SR_EXTENDED_CAPS     0x0001 /* Extended register capabilities */
+#define MII_SR_JABBER_DETECT     0x0002 /* Jabber Detected */
+#define MII_SR_LINK_STATUS       0x0004 /* Link Status 1 = link */
+#define MII_SR_AUTONEG_CAPS      0x0008 /* Auto Neg Capable */
+#define MII_SR_REMOTE_FAULT      0x0010 /* Remote Fault Detect */
+#define MII_SR_AUTONEG_COMPLETE  0x0020 /* Auto Neg Complete */
+#define MII_SR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
+#define MII_SR_EXTENDED_STATUS   0x0100 /* Ext. status info in Reg 0x0F */
+#define MII_SR_100T2_HD_CAPS     0x0200 /* 100T2 Half Duplex Capable */
+#define MII_SR_100T2_FD_CAPS     0x0400 /* 100T2 Full Duplex Capable */
+#define MII_SR_10T_HD_CAPS       0x0800 /* 10T   Half Duplex Capable */
+#define MII_SR_10T_FD_CAPS       0x1000 /* 10T   Full Duplex Capable */
+#define MII_SR_100X_HD_CAPS      0x2000 /* 100X  Half Duplex Capable */
+#define MII_SR_100X_FD_CAPS      0x4000 /* 100X  Full Duplex Capable */
+#define MII_SR_100T4_CAPS        0x8000 /* 100T4 Capable */
+
+/* Autoneg Advertisement Register */
+#define NWAY_AR_SELECTOR_FIELD   0x0001   /* indicates IEEE 802.3 CSMA/CD */
+#define NWAY_AR_10T_HD_CAPS      0x0020   /* 10T   Half Duplex Capable */
+#define NWAY_AR_10T_FD_CAPS      0x0040   /* 10T   Full Duplex Capable */
+#define NWAY_AR_100TX_HD_CAPS    0x0080   /* 100TX Half Duplex Capable */
+#define NWAY_AR_100TX_FD_CAPS    0x0100   /* 100TX Full Duplex Capable */
+#define NWAY_AR_100T4_CAPS       0x0200   /* 100T4 Capable */
+#define NWAY_AR_PAUSE            0x0400   /* Pause operation desired */
+#define NWAY_AR_ASM_DIR          0x0800   /* Asymmetric Pause Direction bit */
+#define NWAY_AR_REMOTE_FAULT     0x2000   /* Remote Fault detected */
+#define NWAY_AR_NEXT_PAGE        0x8000   /* Next Page ability supported */
+
+/* Link Partner Ability Register (Base Page) */
+#define NWAY_LPAR_SELECTOR_FIELD 0x0000 /* LP protocol selector field */
+#define NWAY_LPAR_10T_HD_CAPS    0x0020 /* LP is 10T   Half Duplex Capable */
+#define NWAY_LPAR_10T_FD_CAPS    0x0040 /* LP is 10T   Full Duplex Capable */
+#define NWAY_LPAR_100TX_HD_CAPS  0x0080 /* LP is 100TX Half Duplex Capable */
+#define NWAY_LPAR_100TX_FD_CAPS  0x0100 /* LP is 100TX Full Duplex Capable */
+#define NWAY_LPAR_100T4_CAPS     0x0200 /* LP is 100T4 Capable */
+#define NWAY_LPAR_PAUSE          0x0400 /* LP Pause operation desired */
+#define NWAY_LPAR_ASM_DIR        0x0800 /* LP Asymmetric Pause Direction bit */
+#define NWAY_LPAR_REMOTE_FAULT   0x2000 /* LP has detected Remote Fault */
+#define NWAY_LPAR_ACKNOWLEDGE    0x4000 /* LP has rx'd link code word */
+#define NWAY_LPAR_NEXT_PAGE      0x8000 /* Next Page ability supported */
+
+/* Autoneg Expansion Register */
+#define NWAY_ER_LP_NWAY_CAPS      0x0001 /* LP has Auto Neg Capability */
+#define NWAY_ER_PAGE_RXD          0x0002 /* LP is 10T   Half Duplex Capable */
+#define NWAY_ER_NEXT_PAGE_CAPS    0x0004 /* LP is 10T   Full Duplex Capable */
+#define NWAY_ER_LP_NEXT_PAGE_CAPS 0x0008 /* LP is 100TX Half Duplex Capable */
+#define NWAY_ER_PAR_DETECT_FAULT  0x0010 /* LP is 100TX Full Duplex Capable */
+
+/* 1000BASE-T Control Register */
+#define CR_1000T_ASYM_PAUSE      0x0080 /* Advertise asymmetric pause bit */
+#define CR_1000T_HD_CAPS         0x0100 /* Advertise 1000T HD capability */
+#define CR_1000T_FD_CAPS         0x0200 /* Advertise 1000T FD capability  */
+#define CR_1000T_REPEATER_DTE    0x0400 /* 1=Repeater/switch device port */
+                                        /* 0=DTE device */
+#define CR_1000T_MS_VALUE        0x0800 /* 1=Configure PHY as Master */
+                                        /* 0=Configure PHY as Slave */
+#define CR_1000T_MS_ENABLE      0x1000 /* 1=Master/Slave manual config value */
+                                        /* 0=Automatic Master/Slave config */
+#define CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
+#define CR_1000T_TEST_MODE_1     0x2000 /* Transmit Waveform test */
+#define CR_1000T_TEST_MODE_2     0x4000 /* Master Transmit Jitter test */
+#define CR_1000T_TEST_MODE_3     0x6000 /* Slave Transmit Jitter test */
+#define CR_1000T_TEST_MODE_4     0x8000 /* Transmitter Distortion test */
+
+/* 1000BASE-T Status Register */
+#define SR_1000T_IDLE_ERROR_CNT   0x00FF /* Num idle errors since last read */
+#define SR_1000T_ASYM_PAUSE_DIR  0x0100 /* LP asymmetric pause direction bit */
+#define SR_1000T_LP_HD_CAPS       0x0400 /* LP is 1000T HD capable */
+#define SR_1000T_LP_FD_CAPS       0x0800 /* LP is 1000T FD capable */
+#define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
+#define SR_1000T_LOCAL_RX_STATUS  0x2000 /* Local receiver OK */
+#define SR_1000T_MS_CONFIG_RES    0x4000 /* 1=Local Tx is Master, 0=Slave */
+#define SR_1000T_MS_CONFIG_FAULT  0x8000 /* Master/Slave config fault */
+
+#define SR_1000T_PHY_EXCESSIVE_IDLE_ERR_COUNT 5
+
+/* PHY 1000 MII Register/Bit Definitions */
+/* PHY Registers defined by IEEE */
+#define PHY_CONTROL      0x00 /* Control Register */
+#define PHY_STATUS       0x01 /* Status Register */
+#define PHY_ID1          0x02 /* Phy Id Reg (word 1) */
+#define PHY_ID2          0x03 /* Phy Id Reg (word 2) */
+#define PHY_AUTONEG_ADV  0x04 /* Autoneg Advertisement */
+#define PHY_LP_ABILITY   0x05 /* Link Partner Ability (Base Page) */
+#define PHY_AUTONEG_EXP  0x06 /* Autoneg Expansion Reg */
+#define PHY_NEXT_PAGE_TX 0x07 /* Next Page Tx */
+#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */
+#define PHY_1000T_CTRL   0x09 /* 1000Base-T Control Reg */
+#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
+#define PHY_EXT_STATUS   0x0F /* Extended Status Reg */
+
+#define PHY_CONTROL_LB   0x4000 /* PHY Loopback bit */
+
+/* NVM Control */
+#define E1000_EECD_SK        0x00000001 /* NVM Clock */
+#define E1000_EECD_CS        0x00000002 /* NVM Chip Select */
+#define E1000_EECD_DI        0x00000004 /* NVM Data In */
+#define E1000_EECD_DO        0x00000008 /* NVM Data Out */
+#define E1000_EECD_FWE_MASK  0x00000030
+#define E1000_EECD_FWE_DIS   0x00000010 /* Disable FLASH writes */
+#define E1000_EECD_FWE_EN    0x00000020 /* Enable FLASH writes */
+#define E1000_EECD_FWE_SHIFT 4
+#define E1000_EECD_REQ       0x00000040 /* NVM Access Request */
+#define E1000_EECD_GNT       0x00000080 /* NVM Access Grant */
+#define E1000_EECD_PRES      0x00000100 /* NVM Present */
+#define E1000_EECD_SIZE      0x00000200 /* NVM Size (0=64 word 1=256 word) */
+/* NVM Addressing bits based on type 0=small, 1=large */
+#define E1000_EECD_ADDR_BITS 0x00000400
+#define E1000_EECD_TYPE      0x00002000 /* NVM Type (1-SPI, 0-Microwire) */
+#define E1000_NVM_GRANT_ATTEMPTS   1000 /* NVM # attempts to gain grant */
+#define E1000_EECD_AUTO_RD          0x00000200  /* NVM Auto Read done */
+#define E1000_EECD_SIZE_EX_MASK     0x00007800  /* NVM Size */
+#define E1000_EECD_SIZE_EX_SHIFT     11
+#define E1000_EECD_NVADDS    0x00018000 /* NVM Address Size */
+#define E1000_EECD_SELSHAD   0x00020000 /* Select Shadow RAM */
+#define E1000_EECD_INITSRAM  0x00040000 /* Initialize Shadow RAM */
+#define E1000_EECD_FLUPD     0x00080000 /* Update FLASH */
+#define E1000_EECD_AUPDEN    0x00100000 /* Enable Autonomous FLASH update */
+#define E1000_EECD_SHADV     0x00200000 /* Shadow RAM Data Valid */
+#define E1000_EECD_SEC1VAL   0x00400000 /* Sector One Valid */
+#define E1000_EECD_SECVAL_SHIFT      22
+#define E1000_EECD_SEC1VAL_VALID_MASK (E1000_EECD_AUTO_RD | E1000_EECD_PRES)
+
+#define E1000_NVM_SWDPIN0   0x0001   /* SWDPIN 0 NVM Value */
+#define E1000_NVM_LED_LOGIC 0x0020   /* Led Logic Word */
+#define E1000_NVM_RW_REG_DATA   16  /* Offset to data in NVM read/write regs */
+#define E1000_NVM_RW_REG_DONE   2    /* Offset to READ/WRITE done bit */
+#define E1000_NVM_RW_REG_START  1    /* Start operation */
+#define E1000_NVM_RW_ADDR_SHIFT 2    /* Shift to the address bits */
+#define E1000_NVM_POLL_WRITE    1    /* Flag for polling for write complete */
+#define E1000_NVM_POLL_READ     0    /* Flag for polling for read complete */
+#define E1000_FLASH_UPDATES  2000
+
+/* NVM Word Offsets */
+#define NVM_COMPAT                 0x0003
+#define NVM_ID_LED_SETTINGS        0x0004
+#define NVM_VERSION                0x0005
+#define NVM_SERDES_AMPLITUDE       0x0006 /* SERDES output amplitude */
+#define NVM_PHY_CLASS_WORD         0x0007
+#define NVM_INIT_CONTROL1_REG      0x000A
+#define NVM_INIT_CONTROL2_REG      0x000F
+#define NVM_SWDEF_PINS_CTRL_PORT_1 0x0010
+#define NVM_INIT_CONTROL3_PORT_B   0x0014
+#define NVM_INIT_3GIO_3            0x001A
+#define NVM_SWDEF_PINS_CTRL_PORT_0 0x0020
+#define NVM_INIT_CONTROL3_PORT_A   0x0024
+#define NVM_CFG                    0x0012
+#define NVM_FLASH_VERSION          0x0032
+#define NVM_ALT_MAC_ADDR_PTR       0x0037
+#define NVM_CHECKSUM_REG           0x003F
+
+#define E1000_NVM_CFG_DONE_PORT_0  0x040000 /* MNG config cycle done */
+#define E1000_NVM_CFG_DONE_PORT_1  0x080000 /* ...for second port */
+
+/* Mask bits for fields in Word 0x0f of the NVM */
+#define NVM_WORD0F_PAUSE_MASK       0x3000
+#define NVM_WORD0F_PAUSE            0x1000
+#define NVM_WORD0F_ASM_DIR          0x2000
+#define NVM_WORD0F_ANE              0x0800
+#define NVM_WORD0F_SWPDIO_EXT_MASK  0x00F0
+#define NVM_WORD0F_LPLU             0x0001
+
+/* Mask bits for fields in Word 0x1a of the NVM */
+#define NVM_WORD1A_ASPM_MASK  0x000C
+
+/* For checksumming, the sum of all words in the NVM should equal 0xBABA. */
+#define NVM_SUM                    0xBABA
+
+#define NVM_MAC_ADDR_OFFSET        0
+#define NVM_PBA_OFFSET_0           8
+#define NVM_PBA_OFFSET_1           9
+#define NVM_RESERVED_WORD          0xFFFF
+#define NVM_PHY_CLASS_A            0x8000
+#define NVM_SERDES_AMPLITUDE_MASK  0x000F
+#define NVM_SIZE_MASK              0x1C00
+#define NVM_SIZE_SHIFT             10
+#define NVM_WORD_SIZE_BASE_SHIFT   6
+#define NVM_SWDPIO_EXT_SHIFT       4
+
+/* NVM Commands - SPI */
+#define NVM_MAX_RETRY_SPI          5000 /* Max wait of 5ms, for RDY signal */
+#define NVM_READ_OPCODE_SPI        0x03 /* NVM read opcode */
+#define NVM_WRITE_OPCODE_SPI       0x02 /* NVM write opcode */
+#define NVM_A8_OPCODE_SPI          0x08 /* opcode bit-3 = address bit-8 */
+#define NVM_WREN_OPCODE_SPI        0x06 /* NVM set Write Enable latch */
+#define NVM_WRDI_OPCODE_SPI        0x04 /* NVM reset Write Enable latch */
+#define NVM_RDSR_OPCODE_SPI        0x05 /* NVM read Status register */
+#define NVM_WRSR_OPCODE_SPI        0x01 /* NVM write Status register */
+
+/* SPI NVM Status Register */
+#define NVM_STATUS_RDY_SPI         0x01
+#define NVM_STATUS_WEN_SPI         0x02
+#define NVM_STATUS_BP0_SPI         0x04
+#define NVM_STATUS_BP1_SPI         0x08
+#define NVM_STATUS_WPEN_SPI        0x80
+
+/* Word definitions for ID LED Settings */
+#define ID_LED_RESERVED_0000 0x0000
+#define ID_LED_RESERVED_FFFF 0xFFFF
+#define ID_LED_DEFAULT       ((ID_LED_OFF1_ON2  << 12) | \
+                              (ID_LED_OFF1_OFF2 <<  8) | \
+                              (ID_LED_DEF1_DEF2 <<  4) | \
+                              (ID_LED_DEF1_DEF2))
+#define ID_LED_DEF1_DEF2     0x1
+#define ID_LED_DEF1_ON2      0x2
+#define ID_LED_DEF1_OFF2     0x3
+#define ID_LED_ON1_DEF2      0x4
+#define ID_LED_ON1_ON2       0x5
+#define ID_LED_ON1_OFF2      0x6
+#define ID_LED_OFF1_DEF2     0x7
+#define ID_LED_OFF1_ON2      0x8
+#define ID_LED_OFF1_OFF2     0x9
+
+#define IGP_ACTIVITY_LED_MASK   0xFFFFF0FF
+#define IGP_ACTIVITY_LED_ENABLE 0x0300
+#define IGP_LED3_MODE           0x07000000
+
+/* PCI/PCI-X/PCI-EX Config space */
+#define PCI_HEADER_TYPE_REGISTER     0x0E
+#define PCIE_LINK_STATUS             0x12
+#define PCIE_DEVICE_CONTROL2         0x28
+
+#define PCI_HEADER_TYPE_MULTIFUNC    0x80
+#define PCIE_LINK_WIDTH_MASK         0x3F0
+#define PCIE_LINK_WIDTH_SHIFT        4
+#define PCIE_DEVICE_CONTROL2_16ms    0x0005
+
+#ifndef ETH_ADDR_LEN
+#define ETH_ADDR_LEN                 6
+#endif
+
+#define PHY_REVISION_MASK      0xFFFFFFF0
+#define MAX_PHY_REG_ADDRESS    0x1F  /* 5 bit address bus (0-0x1F) */
+#define MAX_PHY_MULTI_PAGE_REG 0xF
+
+/* Bit definitions for valid PHY IDs. */
+/*
+ * I = Integrated
+ * E = External
+ */
+#define M88E1000_E_PHY_ID    0x01410C50
+#define M88E1000_I_PHY_ID    0x01410C30
+#define M88E1011_I_PHY_ID    0x01410C20
+#define IGP01E1000_I_PHY_ID  0x02A80380
+#define M88E1011_I_REV_4     0x04
+#define M88E1111_I_PHY_ID    0x01410CC0
+#define GG82563_E_PHY_ID     0x01410CA0
+#define IGP03E1000_E_PHY_ID  0x02A80390
+#define IFE_E_PHY_ID         0x02A80330
+#define IFE_PLUS_E_PHY_ID    0x02A80320
+#define IFE_C_E_PHY_ID       0x02A80310
+#define IGP04E1000_E_PHY_ID  0x02A80391
+#define M88_VENDOR           0x0141
+
+/* M88E1000 Specific Registers */
+#define M88E1000_PHY_SPEC_CTRL     0x10  /* PHY Specific Control Register */
+#define M88E1000_PHY_SPEC_STATUS   0x11  /* PHY Specific Status Register */
+#define M88E1000_INT_ENABLE        0x12  /* Interrupt Enable Register */
+#define M88E1000_INT_STATUS        0x13  /* Interrupt Status Register */
+#define M88E1000_EXT_PHY_SPEC_CTRL 0x14  /* Extended PHY Specific Control */
+#define M88E1000_RX_ERR_CNTR       0x15  /* Receive Error Counter */
+
+#define M88E1000_PHY_EXT_CTRL      0x1A  /* PHY extend control register */
+#define M88E1000_PHY_PAGE_SELECT   0x1D  /* Reg 29 for page number setting */
+#define M88E1000_PHY_GEN_CONTROL   0x1E  /* Its meaning depends on reg 29 */
+#define M88E1000_PHY_VCO_REG_BIT8  0x100 /* Bits 8 & 11 are adjusted for */
+#define M88E1000_PHY_VCO_REG_BIT11 0x800    /* improved BER performance */
+
+/* M88E1000 PHY Specific Control Register */
+#define M88E1000_PSCR_JABBER_DISABLE    0x0001 /* 1=Jabber Function disabled */
+#define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reverse enabled */
+#define M88E1000_PSCR_SQE_TEST          0x0004 /* 1=SQE Test enabled */
+/* 1=CLK125 low, 0=CLK125 toggling */
+#define M88E1000_PSCR_CLK125_DISABLE    0x0010
+#define M88E1000_PSCR_MDI_MANUAL_MODE  0x0000 /* MDI Crossover Mode bits 6:5 */
+                                               /* Manual MDI configuration */
+#define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020  /* Manual MDIX configuration */
+/* 1000BASE-T: Auto crossover, 100BASE-TX/10BASE-T: MDI Mode */
+#define M88E1000_PSCR_AUTO_X_1000T     0x0040
+/* Auto crossover enabled all speeds */
+#define M88E1000_PSCR_AUTO_X_MODE      0x0060
+/*
+ * 1=Enable Extended 10BASE-T distance (Lower 10BASE-T Rx Threshold
+ * 0=Normal 10BASE-T Rx Threshold
+ */
+#define M88E1000_PSCR_EN_10BT_EXT_DIST 0x0080
+/* 1=5-bit interface in 100BASE-TX, 0=MII interface in 100BASE-TX */
+#define M88E1000_PSCR_MII_5BIT_ENABLE      0x0100
+#define M88E1000_PSCR_SCRAMBLER_DISABLE    0x0200 /* 1=Scrambler disable */
+#define M88E1000_PSCR_FORCE_LINK_GOOD      0x0400 /* 1=Force link good */
+#define M88E1000_PSCR_ASSERT_CRS_ON_TX     0x0800 /* 1=Assert CRS on Tx */
+
+/* M88E1000 PHY Specific Status Register */
+#define M88E1000_PSSR_JABBER             0x0001 /* 1=Jabber */
+#define M88E1000_PSSR_REV_POLARITY       0x0002 /* 1=Polarity reversed */
+#define M88E1000_PSSR_DOWNSHIFT          0x0020 /* 1=Downshifted */
+#define M88E1000_PSSR_MDIX               0x0040 /* 1=MDIX; 0=MDI */
+/*
+ * 0 = <50M
+ * 1 = 50-80M
+ * 2 = 80-110M
+ * 3 = 110-140M
+ * 4 = >140M
+ */
+#define M88E1000_PSSR_CABLE_LENGTH       0x0380
+#define M88E1000_PSSR_LINK               0x0400 /* 1=Link up, 0=Link down */
+#define M88E1000_PSSR_SPD_DPLX_RESOLVED  0x0800 /* 1=Speed & Duplex resolved */
+#define M88E1000_PSSR_PAGE_RCVD          0x1000 /* 1=Page received */
+#define M88E1000_PSSR_DPLX               0x2000 /* 1=Duplex 0=Half Duplex */
+#define M88E1000_PSSR_SPEED              0xC000 /* Speed, bits 14:15 */
+#define M88E1000_PSSR_10MBS              0x0000 /* 00=10Mbs */
+#define M88E1000_PSSR_100MBS             0x4000 /* 01=100Mbs */
+#define M88E1000_PSSR_1000MBS            0x8000 /* 10=1000Mbs */
+
+#define M88E1000_PSSR_CABLE_LENGTH_SHIFT 7
+
+/* M88E1000 Extended PHY Specific Control Register */
+#define M88E1000_EPSCR_FIBER_LOOPBACK 0x4000 /* 1=Fiber loopback */
+/*
+ * 1 = Lost lock detect enabled.
+ * Will assert lost lock and bring
+ * link down if idle not seen
+ * within 1ms in 1000BASE-T
+ */
+#define M88E1000_EPSCR_DOWN_NO_IDLE   0x8000
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the master
+ */
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK 0x0C00
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_1X   0x0000
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_2X   0x0400
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_3X   0x0800
+#define M88E1000_EPSCR_MASTER_DOWNSHIFT_4X   0x0C00
+/*
+ * Number of times we will attempt to autonegotiate before downshifting if we
+ * are the slave
+ */
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK  0x0300
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_DIS   0x0000
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X    0x0100
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_2X    0x0200
+#define M88E1000_EPSCR_SLAVE_DOWNSHIFT_3X    0x0300
+#define M88E1000_EPSCR_TX_CLK_2_5     0x0060 /* 2.5 MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_25      0x0070 /* 25  MHz TX_CLK */
+#define M88E1000_EPSCR_TX_CLK_0       0x0000 /* NO  TX_CLK */
+
+/* M88EC018 Rev 2 specific DownShift settings */
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK  0x0E00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_1X    0x0000
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_2X    0x0200
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_3X    0x0400
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_4X    0x0600
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X    0x0800
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_6X    0x0A00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_7X    0x0C00
+#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_8X    0x0E00
+
+/*
+ * Bits...
+ * 15-5: page
+ * 4-0: register offset
+ */
+#define GG82563_PAGE_SHIFT        5
+#define GG82563_REG(page, reg)    \
+        (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
+#define GG82563_MIN_ALT_REG       30
+
+/* GG82563 Specific Registers */
+#define GG82563_PHY_SPEC_CTRL           \
+        GG82563_REG(0, 16) /* PHY Specific Control */
+#define GG82563_PHY_SPEC_STATUS         \
+        GG82563_REG(0, 17) /* PHY Specific Status */
+#define GG82563_PHY_INT_ENABLE          \
+        GG82563_REG(0, 18) /* Interrupt Enable */
+#define GG82563_PHY_SPEC_STATUS_2       \
+        GG82563_REG(0, 19) /* PHY Specific Status 2 */
+#define GG82563_PHY_RX_ERR_CNTR         \
+        GG82563_REG(0, 21) /* Receive Error Counter */
+#define GG82563_PHY_PAGE_SELECT         \
+        GG82563_REG(0, 22) /* Page Select */
+#define GG82563_PHY_SPEC_CTRL_2         \
+        GG82563_REG(0, 26) /* PHY Specific Control 2 */
+#define GG82563_PHY_PAGE_SELECT_ALT     \
+        GG82563_REG(0, 29) /* Alternate Page Select */
+#define GG82563_PHY_TEST_CLK_CTRL       \
+        GG82563_REG(0, 30) /* Test Clock Control (use reg. 29 to select) */
+
+#define GG82563_PHY_MAC_SPEC_CTRL       \
+        GG82563_REG(2, 21) /* MAC Specific Control Register */
+#define GG82563_PHY_MAC_SPEC_CTRL_2     \
+        GG82563_REG(2, 26) /* MAC Specific Control 2 */
+
+#define GG82563_PHY_DSP_DISTANCE    \
+        GG82563_REG(5, 26) /* DSP Distance */
+
+/* Page 193 - Port Control Registers */
+#define GG82563_PHY_KMRN_MODE_CTRL   \
+        GG82563_REG(193, 16) /* Kumeran Mode Control */
+#define GG82563_PHY_PORT_RESET          \
+        GG82563_REG(193, 17) /* Port Reset */
+#define GG82563_PHY_REVISION_ID         \
+        GG82563_REG(193, 18) /* Revision ID */
+#define GG82563_PHY_DEVICE_ID           \
+        GG82563_REG(193, 19) /* Device ID */
+#define GG82563_PHY_PWR_MGMT_CTRL       \
+        GG82563_REG(193, 20) /* Power Management Control */
+#define GG82563_PHY_RATE_ADAPT_CTRL     \
+        GG82563_REG(193, 25) /* Rate Adaptation Control */
+
+/* Page 194 - KMRN Registers */
+#define GG82563_PHY_KMRN_FIFO_CTRL_STAT \
+        GG82563_REG(194, 16) /* FIFO's Control/Status */
+#define GG82563_PHY_KMRN_CTRL           \
+        GG82563_REG(194, 17) /* Control */
+#define GG82563_PHY_INBAND_CTRL         \
+        GG82563_REG(194, 18) /* Inband Control */
+#define GG82563_PHY_KMRN_DIAGNOSTIC     \
+        GG82563_REG(194, 19) /* Diagnostic */
+#define GG82563_PHY_ACK_TIMEOUTS        \
+        GG82563_REG(194, 20) /* Acknowledge Timeouts */
+#define GG82563_PHY_ADV_ABILITY         \
+        GG82563_REG(194, 21) /* Advertised Ability */
+#define GG82563_PHY_LINK_PARTNER_ADV_ABILITY \
+        GG82563_REG(194, 23) /* Link Partner Advertised Ability */
+#define GG82563_PHY_ADV_NEXT_PAGE       \
+        GG82563_REG(194, 24) /* Advertised Next Page */
+#define GG82563_PHY_LINK_PARTNER_ADV_NEXT_PAGE \
+        GG82563_REG(194, 25) /* Link Partner Advertised Next page */
+#define GG82563_PHY_KMRN_MISC           \
+        GG82563_REG(194, 26) /* Misc. */
+
+/* MDI Control */
+#define E1000_MDIC_DATA_MASK 0x0000FFFF
+#define E1000_MDIC_REG_MASK  0x001F0000
+#define E1000_MDIC_REG_SHIFT 16
+#define E1000_MDIC_PHY_MASK  0x03E00000
+#define E1000_MDIC_PHY_SHIFT 21
+#define E1000_MDIC_OP_WRITE  0x04000000
+#define E1000_MDIC_OP_READ   0x08000000
+#define E1000_MDIC_READY     0x10000000
+#define E1000_MDIC_INT_EN    0x20000000
+#define E1000_MDIC_ERROR     0x40000000
+
+/* SerDes Control */
+#define E1000_GEN_CTL_READY             0x80000000
+#define E1000_GEN_CTL_ADDRESS_SHIFT     8
+#define E1000_GEN_POLL_TIMEOUT          640
+
+/* LinkSec register fields */
+#define E1000_LSECTXCAP_SUM_MASK        0x00FF0000
+#define E1000_LSECTXCAP_SUM_SHIFT       16
+#define E1000_LSECRXCAP_SUM_MASK        0x00FF0000
+#define E1000_LSECRXCAP_SUM_SHIFT       16
+
+#define E1000_LSECTXCTRL_EN_MASK        0x00000003
+#define E1000_LSECTXCTRL_DISABLE        0x0
+#define E1000_LSECTXCTRL_AUTH           0x1
+#define E1000_LSECTXCTRL_AUTH_ENCRYPT   0x2
+#define E1000_LSECTXCTRL_AISCI          0x00000020
+#define E1000_LSECTXCTRL_PNTHRSH_MASK   0xFFFFFF00
+#define E1000_LSECTXCTRL_RSV_MASK       0x000000D8
+
+#define E1000_LSECRXCTRL_EN_MASK        0x0000000C
+#define E1000_LSECRXCTRL_EN_SHIFT       2
+#define E1000_LSECRXCTRL_DISABLE        0x0
+#define E1000_LSECRXCTRL_CHECK          0x1
+#define E1000_LSECRXCTRL_STRICT         0x2
+#define E1000_LSECRXCTRL_DROP           0x3
+#define E1000_LSECRXCTRL_PLSH           0x00000040
+#define E1000_LSECRXCTRL_RP             0x00000080
+#define E1000_LSECRXCTRL_RSV_MASK       0xFFFFFF33
+
+
+
+#endif /* _IGB_DEFINES_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,324 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/* Linux PRO/1000 Ethernet Driver main header file */
+
+#ifndef _IGB_H_
+#define _IGB_H_
+
+#include "igb_api.h"
+
+extern int igb_probe ( struct pci_device *pdev );
+extern void igb_remove ( struct pci_device *pdev );
+
+struct igb_adapter;
+
+/* Interrupt defines */
+#define IGB_START_ITR                    648 /* ~6000 ints/sec */
+
+/* Interrupt modes, as used by the IntMode paramter */
+#define IGB_INT_MODE_LEGACY                0
+#define IGB_INT_MODE_MSI                   1
+#define IGB_INT_MODE_MSIX                  2
+
+#define HW_PERF
+/* TX/RX descriptor defines */
+#define IGB_DEFAULT_TXD                  256
+#define IGB_MIN_TXD                       80
+#define IGB_MAX_TXD                     4096
+
+#define IGB_DEFAULT_RXD                  256
+#define IGB_MIN_RXD                       80
+#define IGB_MAX_RXD                     4096
+
+#define IGB_MIN_ITR_USECS                 10 /* 100k irq/sec */
+#define IGB_MAX_ITR_USECS               8191 /* 120  irq/sec */
+
+#define NON_Q_VECTORS                      1
+#define MAX_Q_VECTORS                      8
+
+/* Transmit and receive queues */
+#define IGB_MAX_RX_QUEUES                  (adapter->vfs_allocated_count ? 2 : \
+                                           (hw->mac.type > e1000_82575 ? 8 : 4))
+#define IGB_ABS_MAX_TX_QUEUES              8
+#define IGB_MAX_TX_QUEUES                  IGB_MAX_RX_QUEUES
+
+#define IGB_MAX_VF_MC_ENTRIES              30
+#define IGB_MAX_VF_FUNCTIONS               8
+#define IGB_MAX_VFTA_ENTRIES               128
+#define IGB_MAX_UTA_ENTRIES                128
+#define MAX_EMULATION_MAC_ADDRS            16
+#define OUI_LEN                            3
+
+struct vf_data_storage {
+	unsigned char vf_mac_addresses[ETH_ALEN];
+	u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
+	u16 num_vf_mc_hashes;
+	u16 default_vf_vlan_id;
+	u16 vlans_enabled;
+	unsigned char em_mac_addresses[MAX_EMULATION_MAC_ADDRS * ETH_ALEN];
+	u32 uta_table_copy[IGB_MAX_UTA_ENTRIES];
+	u32 flags;
+	unsigned long last_nack;
+};
+
+#define IGB_VF_FLAG_CTS            0x00000001 /* VF is clear to send data */
+#define IGB_VF_FLAG_UNI_PROMISC    0x00000002 /* VF has unicast promisc */
+#define IGB_VF_FLAG_MULTI_PROMISC  0x00000004 /* VF has multicast promisc */
+
+/* RX descriptor control thresholds.
+ * PTHRESH - MAC will consider prefetch if it has fewer than this number of
+ *           descriptors available in its onboard memory.
+ *           Setting this to 0 disables RX descriptor prefetch.
+ * HTHRESH - MAC will only prefetch if there are at least this many descriptors
+ *           available in host memory.
+ *           If PTHRESH is 0, this should also be 0.
+ * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back
+ *           descriptors until either it has this many to write back, or the
+ *           ITR timer expires.
+ */
+#define IGB_RX_PTHRESH                    (hw->mac.type <= e1000_82576 ? 16 : 8)
+#define IGB_RX_HTHRESH                     8
+#define IGB_RX_WTHRESH                     1
+#define IGB_TX_PTHRESH                     8
+#define IGB_TX_HTHRESH                     1
+#define IGB_TX_WTHRESH                     ((hw->mac.type == e1000_82576 && \
+                                             adapter->msix_entries) ? 0 : 16)
+
+/* this is the size past which hardware will drop packets when setting LPE=0 */
+#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
+
+/* Supported Rx Buffer Sizes */
+#define IGB_RXBUFFER_128   128    /* Used for packet split */
+#define IGB_RXBUFFER_256   256    /* Used for packet split */
+#define IGB_RXBUFFER_512   512
+#define IGB_RXBUFFER_1024  1024
+#define IGB_RXBUFFER_2048  2048
+#define IGB_RXBUFFER_4096  4096
+#define IGB_RXBUFFER_8192  8192
+#define IGB_RXBUFFER_16384 16384
+
+/* Packet Buffer allocations */
+#define IGB_PBA_BYTES_SHIFT 0xA
+#define IGB_TX_HEAD_ADDR_SHIFT 7
+#define IGB_PBA_TX_MASK 0xFFFF0000
+
+#define IGB_FC_PAUSE_TIME 0x0680 /* 858 usec */
+
+/* How many Tx Descriptors do we need to call netif_wake_queue ? */
+#define IGB_TX_QUEUE_WAKE	32
+/* How many Rx Buffers do we bundle into one write to the hardware ? */
+#define IGB_RX_BUFFER_WRITE	16	/* Must be power of 2 */
+
+#define AUTO_ALL_MODES            0
+#define IGB_EEPROM_APME         0x0400
+
+#ifndef IGB_MASTER_SLAVE
+/* Switch to override PHY master/slave setting */
+#define IGB_MASTER_SLAVE	e1000_ms_hw_default
+#endif
+
+#define IGB_MNG_VLAN_NONE -1
+
+/* wrapper around a pointer to a socket buffer,
+ * so a DMA handle can be stored along with the buffer */
+struct igb_buffer {
+	struct sk_buff *skb;
+	dma_addr_t dma;
+	dma_addr_t page_dma;
+	union {
+		/* TX */
+		struct {
+			unsigned long time_stamp;
+			u16 length;
+			u16 next_to_watch;
+		};
+
+#ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
+		/* RX */
+		struct {
+			unsigned long page_offset;
+			struct page *page;
+		};
+#endif
+	};
+};
+
+struct igb_queue_stats {
+	u64 packets;
+	u64 bytes;
+};
+
+struct igb_q_vector {
+	struct igb_adapter *adapter; /* backlink */
+	struct igb_ring *rx_ring;
+	struct igb_ring *tx_ring;
+#if 0
+	struct napi_struct napi;
+#endif
+	u32 eims_value;
+	u16 cpu;
+
+	u16 itr_val;
+	u8 set_itr;
+	u8 itr_shift;
+	void __iomem *itr_register;
+
+#if 0
+	char name[IFNAMSIZ + 9];
+#endif
+#ifndef HAVE_NETDEV_NAPI_LIST
+	struct net_device poll_dev;
+#endif
+};
+
+struct igb_ring {
+	struct igb_q_vector *q_vector; /* backlink to q_vector */
+	struct pci_dev *pdev;          /* pci device for dma mapping */
+	dma_addr_t dma;                /* phys address of the ring */
+	void *desc;                    /* descriptor ring memory */
+	unsigned int size;             /* length of desc. ring in bytes */
+	u16 count;                     /* number of desc. in the ring */
+	u16 next_to_use;
+	u16 next_to_clean;
+	u8 queue_index;
+	u8 reg_idx;
+	void __iomem *head;
+	void __iomem *tail;
+	struct igb_buffer *buffer_info; /* array of buffer info structs */
+
+	unsigned int total_bytes;
+	unsigned int total_packets;
+
+	struct igb_queue_stats stats;
+
+	union {
+		/* TX */
+		struct {
+			unsigned int restart_queue;
+			u32 ctx_idx;
+			bool detect_tx_hung;
+		};
+		/* RX */
+		struct {
+			u64 hw_csum_err;
+			u64 hw_csum_good;
+			u32 rx_buffer_len;
+			u16 rx_ps_hdr_size;
+			bool rx_csum;
+#ifdef IGB_LRO
+			struct net_lro_mgr lro_mgr;
+			bool lro_used;
+#endif
+		};
+	};
+};
+
+
+#define IGB_ADVTXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)
+
+#define IGB_DESC_UNUSED(R) \
+	((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
+	(R)->next_to_clean - (R)->next_to_use - 1)
+
+#define E1000_RX_DESC_ADV(R, i)	    \
+	(&(((union e1000_adv_rx_desc *)((R).desc))[i]))
+#define E1000_TX_DESC_ADV(R, i)	    \
+	(&(((union e1000_adv_tx_desc *)((R).desc))[i]))
+#define E1000_TX_CTXTDESC_ADV(R, i)	    \
+	(&(((struct e1000_adv_tx_context_desc *)((R).desc))[i]))
+#define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
+#define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
+#define E1000_RX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_rx_desc)
+
+#define MAX_MSIX_COUNT 10
+/* board specific private data structure */
+
+/* board specific private data structure */
+struct igb_adapter {
+
+	/* OS defined structs */
+	struct net_device *netdev;
+	struct pci_device *pdev;
+	struct net_device_stats net_stats;
+
+	/* structs defined in e1000_hw.h */
+	struct e1000_hw hw;
+
+	struct e1000_phy_info phy_info;
+
+        u32 min_frame_size;
+        u32 max_frame_size;
+
+	u32 wol;
+	u32 pba;
+	u32 max_hw_frame_size;
+
+	bool fc_autoneg;
+
+	unsigned int flags;
+	unsigned int flags2;
+
+#define NUM_TX_DESC	8
+#define NUM_RX_DESC	8
+
+	struct io_buffer *tx_iobuf[NUM_TX_DESC];
+	struct io_buffer *rx_iobuf[NUM_RX_DESC];
+
+	struct e1000_tx_desc *tx_base;
+	struct e1000_rx_desc *rx_base;
+
+	uint32_t tx_ring_size;
+	uint32_t rx_ring_size;
+
+	uint32_t tx_head;
+	uint32_t tx_tail;
+	uint32_t tx_fill_ctr;
+
+	uint32_t rx_curr;
+
+	uint32_t ioaddr;
+	uint32_t irqno;
+
+        uint32_t tx_int_delay;
+        uint32_t tx_abs_int_delay;
+        uint32_t txd_cmd;
+};
+
+#define IGB_FLAG_HAS_MSI           (1 << 0)
+#define IGB_FLAG_MSI_ENABLE        (1 << 1)
+#define IGB_FLAG_DCA_ENABLED       (1 << 3)
+#define IGB_FLAG_LLI_PUSH          (1 << 4)
+#define IGB_FLAG_IN_NETPOLL        (1 << 5)
+#define IGB_FLAG_QUAD_PORT_A       (1 << 6)
+#define IGB_FLAG_QUEUE_PAIRS       (1 << 7)
+
+#define IGB_82576_TSYNC_SHIFT 19
+
+#endif /* _IGB_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_hw.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_hw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_hw.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_hw.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,697 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_HW_H_
+#define _IGB_HW_H_
+
+#include "igb_osdep.h"
+#include "igb_regs.h"
+#include "igb_defines.h"
+
+struct e1000_hw;
+
+#define E1000_DEV_ID_82576                    0x10C9
+#define E1000_DEV_ID_82576_FIBER              0x10E6
+#define E1000_DEV_ID_82576_SERDES             0x10E7
+#define E1000_DEV_ID_82576_QUAD_COPPER        0x10E8
+#define E1000_DEV_ID_82576_NS                 0x150A
+#define E1000_DEV_ID_82576_NS_SERDES          0x1518
+#define E1000_DEV_ID_82576_SERDES_QUAD        0x150D
+#define E1000_DEV_ID_82575EB_COPPER           0x10A7
+#define E1000_DEV_ID_82575EB_FIBER_SERDES     0x10A9
+#define E1000_DEV_ID_82575GB_QUAD_COPPER      0x10D6
+#define E1000_REVISION_0 0
+#define E1000_REVISION_1 1
+#define E1000_REVISION_2 2
+#define E1000_REVISION_3 3
+#define E1000_REVISION_4 4
+
+#define E1000_FUNC_0     0
+#define E1000_FUNC_1     1
+
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0   0
+#define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1   3
+
+enum e1000_mac_type {
+	e1000_undefined = 0,
+	e1000_82575,
+	e1000_82576,
+	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
+};
+
+enum e1000_media_type {
+	e1000_media_type_unknown = 0,
+	e1000_media_type_copper = 1,
+	e1000_media_type_fiber = 2,
+	e1000_media_type_internal_serdes = 3,
+	e1000_num_media_types
+};
+
+enum e1000_nvm_type {
+	e1000_nvm_unknown = 0,
+	e1000_nvm_none,
+	e1000_nvm_eeprom_spi,
+	e1000_nvm_flash_hw,
+	e1000_nvm_flash_sw
+};
+
+enum e1000_nvm_override {
+	e1000_nvm_override_none = 0,
+	e1000_nvm_override_spi_small,
+	e1000_nvm_override_spi_large,
+};
+
+enum e1000_phy_type {
+	e1000_phy_unknown = 0,
+	e1000_phy_none,
+	e1000_phy_m88,
+	e1000_phy_igp,
+	e1000_phy_igp_2,
+	e1000_phy_gg82563,
+	e1000_phy_igp_3,
+	e1000_phy_ife,
+	e1000_phy_vf,
+};
+
+enum e1000_bus_type {
+	e1000_bus_type_unknown = 0,
+	e1000_bus_type_pci,
+	e1000_bus_type_pcix,
+	e1000_bus_type_pci_express,
+	e1000_bus_type_reserved
+};
+
+enum e1000_bus_speed {
+	e1000_bus_speed_unknown = 0,
+	e1000_bus_speed_33,
+	e1000_bus_speed_66,
+	e1000_bus_speed_100,
+	e1000_bus_speed_120,
+	e1000_bus_speed_133,
+	e1000_bus_speed_2500,
+	e1000_bus_speed_5000,
+	e1000_bus_speed_reserved
+};
+
+enum e1000_bus_width {
+	e1000_bus_width_unknown = 0,
+	e1000_bus_width_pcie_x1,
+	e1000_bus_width_pcie_x2,
+	e1000_bus_width_pcie_x4 = 4,
+	e1000_bus_width_pcie_x8 = 8,
+	e1000_bus_width_32,
+	e1000_bus_width_64,
+	e1000_bus_width_reserved
+};
+
+enum e1000_1000t_rx_status {
+	e1000_1000t_rx_status_not_ok = 0,
+	e1000_1000t_rx_status_ok,
+	e1000_1000t_rx_status_undefined = 0xFF
+};
+
+enum e1000_rev_polarity {
+	e1000_rev_polarity_normal = 0,
+	e1000_rev_polarity_reversed,
+	e1000_rev_polarity_undefined = 0xFF
+};
+
+enum e1000_fc_mode {
+	e1000_fc_none = 0,
+	e1000_fc_rx_pause,
+	e1000_fc_tx_pause,
+	e1000_fc_full,
+	e1000_fc_default = 0xFF
+};
+
+enum e1000_ms_type {
+	e1000_ms_hw_default = 0,
+	e1000_ms_force_master,
+	e1000_ms_force_slave,
+	e1000_ms_auto
+};
+
+enum e1000_smart_speed {
+	e1000_smart_speed_default = 0,
+	e1000_smart_speed_on,
+	e1000_smart_speed_off
+};
+
+enum e1000_serdes_link_state {
+	e1000_serdes_link_down = 0,
+	e1000_serdes_link_autoneg_progress,
+	e1000_serdes_link_autoneg_complete,
+	e1000_serdes_link_forced_up
+};
+
+/* Receive Descriptor */
+struct e1000_rx_desc {
+	__le64 buffer_addr; /* Address of the descriptor's data buffer */
+	__le16 length;      /* Length of data DMAed into data buffer */
+	__le16 csum;        /* Packet checksum */
+	u8  status;         /* Descriptor status */
+	u8  errors;         /* Descriptor Errors */
+	__le16 special;
+};
+
+/* Receive Descriptor - Extended */
+union e1000_rx_desc_extended {
+	struct {
+		__le64 buffer_addr;
+		__le64 reserved;
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;         /* RSS Hash */
+				struct {
+					__le16 ip_id;  /* IP id */
+					__le16 csum;   /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length;
+			__le16 vlan;          /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+#define MAX_PS_BUFFERS 4
+/* Receive Descriptor - Packet Split */
+union e1000_rx_desc_packet_split {
+	struct {
+		/* one buffer for protocol header(s), three data buffers */
+		__le64 buffer_addr[MAX_PS_BUFFERS];
+	} read;
+	struct {
+		struct {
+			__le32 mrq;           /* Multiple Rx Queues */
+			union {
+				__le32 rss;           /* RSS Hash */
+				struct {
+					__le16 ip_id;    /* IP id */
+					__le16 csum;     /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error;  /* ext status/error */
+			__le16 length0;       /* length of buffer 0 */
+			__le16 vlan;          /* VLAN tag */
+		} middle;
+		struct {
+			__le16 header_status;
+			__le16 length[3];     /* length of buffers 1-3 */
+		} upper;
+		__le64 reserved;
+	} wb; /* writeback */
+};
+
+/* Transmit Descriptor */
+struct e1000_tx_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's data buffer */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 cso;           /* Checksum offset */
+			u8 cmd;           /* Descriptor control */
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 css;           /* Checksum start */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Offload Context Descriptor */
+struct e1000_context_desc {
+	union {
+		__le32 ip_config;
+		struct {
+			u8 ipcss;         /* IP checksum start */
+			u8 ipcso;         /* IP checksum offset */
+			__le16 ipcse;     /* IP checksum end */
+		} ip_fields;
+	} lower_setup;
+	union {
+		__le32 tcp_config;
+		struct {
+			u8 tucss;         /* TCP checksum start */
+			u8 tucso;         /* TCP checksum offset */
+			__le16 tucse;     /* TCP checksum end */
+		} tcp_fields;
+	} upper_setup;
+	__le32 cmd_and_length;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 hdr_len;       /* Header length */
+			__le16 mss;       /* Maximum segment size */
+		} fields;
+	} tcp_seg_setup;
+};
+
+/* Offload data descriptor */
+struct e1000_data_desc {
+	__le64 buffer_addr;   /* Address of the descriptor's buffer address */
+	union {
+		__le32 data;
+		struct {
+			__le16 length;    /* Data buffer length */
+			u8 typ_len_ext;
+			u8 cmd;
+		} flags;
+	} lower;
+	union {
+		__le32 data;
+		struct {
+			u8 status;        /* Descriptor status */
+			u8 popts;         /* Packet Options */
+			__le16 special;
+		} fields;
+	} upper;
+};
+
+/* Statistics counters collected by the MAC */
+struct e1000_hw_stats {
+	u64 crcerrs;
+	u64 algnerrc;
+	u64 symerrs;
+	u64 rxerrc;
+	u64 mpc;
+	u64 scc;
+	u64 ecol;
+	u64 mcc;
+	u64 latecol;
+	u64 colc;
+	u64 dc;
+	u64 tncrs;
+	u64 sec;
+	u64 cexterr;
+	u64 rlec;
+	u64 xonrxc;
+	u64 xontxc;
+	u64 xoffrxc;
+	u64 xofftxc;
+	u64 fcruc;
+	u64 prc64;
+	u64 prc127;
+	u64 prc255;
+	u64 prc511;
+	u64 prc1023;
+	u64 prc1522;
+	u64 gprc;
+	u64 bprc;
+	u64 mprc;
+	u64 gptc;
+	u64 gorc;
+	u64 gotc;
+	u64 rnbc;
+	u64 ruc;
+	u64 rfc;
+	u64 roc;
+	u64 rjc;
+	u64 mgprc;
+	u64 mgpdc;
+	u64 mgptc;
+	u64 tor;
+	u64 tot;
+	u64 tpr;
+	u64 tpt;
+	u64 ptc64;
+	u64 ptc127;
+	u64 ptc255;
+	u64 ptc511;
+	u64 ptc1023;
+	u64 ptc1522;
+	u64 mptc;
+	u64 bptc;
+	u64 tsctc;
+	u64 tsctfc;
+	u64 iac;
+	u64 icrxptc;
+	u64 icrxatc;
+	u64 ictxptc;
+	u64 ictxatc;
+	u64 ictxqec;
+	u64 ictxqmtc;
+	u64 icrxdmtc;
+	u64 icrxoc;
+	u64 cbtmpc;
+	u64 htdpmc;
+	u64 cbrdpc;
+	u64 cbrmpc;
+	u64 rpthc;
+	u64 hgptc;
+	u64 htcbdpc;
+	u64 hgorc;
+	u64 hgotc;
+	u64 lenerrs;
+	u64 scvpc;
+	u64 hrmpc;
+	u64 doosync;
+};
+
+
+struct e1000_phy_stats {
+	u32 idle_errors;
+	u32 receive_errors;
+};
+
+struct e1000_host_mng_dhcp_cookie {
+	u32 signature;
+	u8  status;
+	u8  reserved0;
+	u16 vlan_id;
+	u32 reserved1;
+	u16 reserved2;
+	u8  reserved3;
+	u8  checksum;
+};
+
+/* Host Interface "Rev 1" */
+struct e1000_host_command_header {
+	u8 command_id;
+	u8 command_length;
+	u8 command_options;
+	u8 checksum;
+};
+
+#define E1000_HI_MAX_DATA_LENGTH     252
+struct e1000_host_command_info {
+	struct e1000_host_command_header command_header;
+	u8 command_data[E1000_HI_MAX_DATA_LENGTH];
+};
+
+/* Host Interface "Rev 2" */
+struct e1000_host_mng_command_header {
+	u8  command_id;
+	u8  checksum;
+	u16 reserved1;
+	u16 reserved2;
+	u16 command_length;
+};
+
+#define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
+struct e1000_host_mng_command_info {
+	struct e1000_host_mng_command_header command_header;
+	u8 command_data[E1000_HI_MAX_MNG_DATA_LENGTH];
+};
+
+#include "igb_mac.h"
+#include "igb_phy.h"
+#include "igb_nvm.h"
+#include "igb_manage.h"
+
+struct e1000_mac_operations {
+	/* Function pointers for the MAC. */
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*id_led_init)(struct e1000_hw *);
+	s32  (*blink_led)(struct e1000_hw *);
+	s32  (*check_for_link)(struct e1000_hw *);
+	bool (*check_mng_mode)(struct e1000_hw *hw);
+	s32  (*cleanup_led)(struct e1000_hw *);
+	void (*clear_hw_cntrs)(struct e1000_hw *);
+	void (*clear_vfta)(struct e1000_hw *);
+	s32  (*get_bus_info)(struct e1000_hw *);
+	void (*set_lan_id)(struct e1000_hw *);
+	s32  (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
+	s32  (*led_on)(struct e1000_hw *);
+	s32  (*led_off)(struct e1000_hw *);
+	void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
+	s32  (*reset_hw)(struct e1000_hw *);
+	s32  (*init_hw)(struct e1000_hw *);
+	void (*shutdown_serdes)(struct e1000_hw *);
+	s32  (*setup_link)(struct e1000_hw *);
+	s32  (*setup_physical_interface)(struct e1000_hw *);
+	s32  (*setup_led)(struct e1000_hw *);
+	void (*write_vfta)(struct e1000_hw *, u32, u32);
+	void (*mta_set)(struct e1000_hw *, u32);
+	void (*config_collision_dist)(struct e1000_hw *);
+	void (*rar_set)(struct e1000_hw *, u8*, u32);
+	s32  (*read_mac_addr)(struct e1000_hw *);
+	s32  (*validate_mdi_setting)(struct e1000_hw *);
+	s32  (*mng_host_if_write)(struct e1000_hw *, u8*, u16, u16, u8*);
+	s32  (*mng_write_cmd_header)(struct e1000_hw *hw,
+                      struct e1000_host_mng_command_header*);
+	s32  (*mng_enable_host_if)(struct e1000_hw *);
+	s32  (*wait_autoneg)(struct e1000_hw *);
+};
+
+struct e1000_phy_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*check_polarity)(struct e1000_hw *);
+	s32  (*check_reset_block)(struct e1000_hw *);
+	s32  (*commit)(struct e1000_hw *);
+#if 0
+	s32  (*force_speed_duplex)(struct e1000_hw *);
+#endif
+	s32  (*get_cfg_done)(struct e1000_hw *hw);
+#if 0
+	s32  (*get_cable_length)(struct e1000_hw *);
+#endif
+	s32  (*get_info)(struct e1000_hw *);
+	s32  (*read_reg)(struct e1000_hw *, u32, u16 *);
+	s32  (*read_reg_locked)(struct e1000_hw *, u32, u16 *);
+	void (*release)(struct e1000_hw *);
+	s32  (*reset)(struct e1000_hw *);
+	s32  (*set_d0_lplu_state)(struct e1000_hw *, bool);
+	s32  (*set_d3_lplu_state)(struct e1000_hw *, bool);
+	s32  (*write_reg)(struct e1000_hw *, u32, u16);
+	s32  (*write_reg_locked)(struct e1000_hw *, u32, u16);
+	void (*power_up)(struct e1000_hw *);
+	void (*power_down)(struct e1000_hw *);
+};
+
+struct e1000_nvm_operations {
+	s32  (*init_params)(struct e1000_hw *);
+	s32  (*acquire)(struct e1000_hw *);
+	s32  (*read)(struct e1000_hw *, u16, u16, u16 *);
+	void (*release)(struct e1000_hw *);
+	void (*reload)(struct e1000_hw *);
+	s32  (*update)(struct e1000_hw *);
+	s32  (*valid_led_default)(struct e1000_hw *, u16 *);
+	s32  (*validate)(struct e1000_hw *);
+	s32  (*write)(struct e1000_hw *, u16, u16, u16 *);
+};
+
+struct e1000_mac_info {
+	struct e1000_mac_operations ops;
+	u8 addr[6];
+	u8 perm_addr[6];
+
+	enum e1000_mac_type type;
+
+	u32 collision_delta;
+	u32 ledctl_default;
+	u32 ledctl_mode1;
+	u32 ledctl_mode2;
+	u32 mc_filter_type;
+	u32 tx_packet_delta;
+	u32 txcw;
+
+	u16 current_ifs_val;
+	u16 ifs_max_val;
+	u16 ifs_min_val;
+	u16 ifs_ratio;
+	u16 ifs_step_size;
+	u16 mta_reg_count;
+	u16 uta_reg_count;
+
+	/* Maximum size of the MTA register table in all supported adapters */
+	#define MAX_MTA_REG 128
+	u32 mta_shadow[MAX_MTA_REG];
+	u16 rar_entry_count;
+
+	u8  forced_speed_duplex;
+
+	bool adaptive_ifs;
+	bool arc_subsystem_valid;
+	bool asf_firmware_present;
+	bool autoneg;
+	bool autoneg_failed;
+	bool get_link_status;
+	bool in_ifs_mode;
+	enum e1000_serdes_link_state serdes_link_state;
+	bool serdes_has_link;
+	bool tx_pkt_filtering;
+};
+
+struct e1000_phy_info {
+	struct e1000_phy_operations ops;
+	enum e1000_phy_type type;
+
+	enum e1000_1000t_rx_status local_rx;
+	enum e1000_1000t_rx_status remote_rx;
+	enum e1000_ms_type ms_type;
+	enum e1000_ms_type original_ms_type;
+	enum e1000_rev_polarity cable_polarity;
+	enum e1000_smart_speed smart_speed;
+
+	u32 addr;
+	u32 id;
+	u32 reset_delay_us; /* in usec */
+	u32 revision;
+
+	enum e1000_media_type media_type;
+
+	u16 autoneg_advertised;
+	u16 autoneg_mask;
+	u16 cable_length;
+	u16 max_cable_length;
+	u16 min_cable_length;
+
+	u8 mdix;
+
+	bool disable_polarity_correction;
+	bool is_mdix;
+	bool polarity_correction;
+	bool reset_disable;
+	bool speed_downgraded;
+	bool autoneg_wait_to_complete;
+};
+
+struct e1000_nvm_info {
+	struct e1000_nvm_operations ops;
+	enum e1000_nvm_type type;
+	enum e1000_nvm_override override;
+
+	u32 flash_bank_size;
+	u32 flash_base_addr;
+
+	u16 word_size;
+	u16 delay_usec;
+	u16 address_bits;
+	u16 opcode_bits;
+	u16 page_size;
+};
+
+struct e1000_bus_info {
+	enum e1000_bus_type type;
+	enum e1000_bus_speed speed;
+	enum e1000_bus_width width;
+
+	u16 func;
+	u16 pci_cmd_word;
+};
+
+struct e1000_fc_info {
+	u32 high_water;          /* Flow control high-water mark */
+	u32 low_water;           /* Flow control low-water mark */
+	u16 pause_time;          /* Flow control pause timer */
+	bool send_xon;           /* Flow control send XON */
+	bool strict_ieee;        /* Strict IEEE mode */
+	enum e1000_fc_mode current_mode; /* FC mode in effect */
+	enum e1000_fc_mode requested_mode; /* FC mode requested by caller */
+};
+
+struct e1000_mbx_operations {
+	s32 (*init_params)(struct e1000_hw *hw);
+	s32 (*read)(struct e1000_hw *, u32 *, u16,  u16);
+	s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
+	s32 (*read_posted)(struct e1000_hw *, u32 *, u16,  u16);
+	s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
+	s32 (*check_for_msg)(struct e1000_hw *, u16);
+	s32 (*check_for_ack)(struct e1000_hw *, u16);
+	s32 (*check_for_rst)(struct e1000_hw *, u16);
+};
+
+struct e1000_mbx_stats {
+	u32 msgs_tx;
+	u32 msgs_rx;
+
+	u32 acks;
+	u32 reqs;
+	u32 rsts;
+};
+
+struct e1000_mbx_info {
+	struct e1000_mbx_operations ops;
+	struct e1000_mbx_stats stats;
+	u32 timeout;
+	u32 usec_delay;
+	u16 size;
+};
+
+struct e1000_dev_spec_82575 {
+	bool sgmii_active;
+	bool global_device_reset;
+};
+
+struct e1000_dev_spec_vf {
+	u32	vf_number;
+	u32	v2p_mailbox;
+};
+
+
+struct e1000_hw {
+	void *back;
+
+	u8 __iomem *hw_addr;
+	u8 __iomem *flash_address;
+	unsigned long io_base;
+
+	struct e1000_mac_info  mac;
+	struct e1000_fc_info   fc;
+	struct e1000_phy_info  phy;
+	struct e1000_nvm_info  nvm;
+	struct e1000_bus_info  bus;
+	struct e1000_mbx_info mbx;
+	struct e1000_host_mng_dhcp_cookie mng_cookie;
+
+	union {
+		struct e1000_dev_spec_82575	_82575;
+		struct e1000_dev_spec_vf	vf;
+	} dev_spec;
+
+	u16 device_id;
+	u16 subsystem_vendor_id;
+	u16 subsystem_device_id;
+	u16 vendor_id;
+
+	u8  revision_id;
+};
+
+#include "igb_82575.h"
+
+/* These functions must be implemented by drivers */
+s32  igb_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
+s32  igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
+
+#endif /* _IGB_HW_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_mac.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_mac.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_mac.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_mac.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1991 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+static s32 igb_set_default_fc_generic(struct e1000_hw *hw);
+static s32 igb_commit_fc_settings_generic(struct e1000_hw *hw);
+static s32 igb_poll_fiber_serdes_link_generic(struct e1000_hw *hw);
+static s32 igb_validate_mdi_setting_generic(struct e1000_hw *hw);
+static void igb_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
+
+/**
+ *  igb_init_mac_ops_generic - Initialize MAC function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void igb_init_mac_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	DEBUGFUNC("igb_init_mac_ops_generic");
+
+	/* General Setup */
+	mac->ops.set_lan_id = igb_set_lan_id_multi_port_pcie;
+	mac->ops.read_mac_addr = igb_read_mac_addr_generic;
+	mac->ops.config_collision_dist = igb_config_collision_dist_generic;
+	/* LINK */
+	mac->ops.wait_autoneg = igb_wait_autoneg_generic;
+	/* Management */
+#if 0
+	mac->ops.mng_host_if_write = igb_mng_host_if_write_generic;
+	mac->ops.mng_write_cmd_header = igb_mng_write_cmd_header_generic;
+	mac->ops.mng_enable_host_if = igb_mng_enable_host_if_generic;
+#endif
+	/* VLAN, MC, etc. */
+	mac->ops.rar_set = igb_rar_set_generic;
+	mac->ops.validate_mdi_setting = igb_validate_mdi_setting_generic;
+}
+
+/**
+ *  igb_get_bus_info_pcie_generic - Get PCIe bus information
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines and stores the system bus information for a particular
+ *  network interface.  The following bus information is determined and stored:
+ *  bus speed, bus width, type (PCIe), and PCIe function.
+ **/
+s32 igb_get_bus_info_pcie_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_bus_info *bus = &hw->bus;
+
+	s32 ret_val;
+	u16 pcie_link_status;
+
+	DEBUGFUNC("igb_get_bus_info_pcie_generic");
+
+	bus->type = e1000_bus_type_pci_express;
+	bus->speed = e1000_bus_speed_2500;
+
+	ret_val = igb_read_pcie_cap_reg(hw,
+	                                  PCIE_LINK_STATUS,
+	                                  &pcie_link_status);
+	if (ret_val)
+		bus->width = e1000_bus_width_unknown;
+	else
+		bus->width = (enum e1000_bus_width)((pcie_link_status &
+		                                PCIE_LINK_WIDTH_MASK) >>
+		                               PCIE_LINK_WIDTH_SHIFT);
+
+	mac->ops.set_lan_id(hw);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
+ *
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers
+ *  and swaps the port value if requested.
+ **/
+static void igb_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	u32 reg;
+
+	/*
+	 * The status register reports the correct function number
+	 * for the device regardless of function swap state.
+	 */
+	reg = E1000_READ_REG(hw, E1000_STATUS);
+	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
+}
+
+/**
+ *  igb_set_lan_id_single_port - Set LAN id for a single port device
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the LAN function id to zero for a single port device.
+ **/
+void igb_set_lan_id_single_port(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+
+	bus->func = 0;
+}
+
+/**
+ *  igb_clear_vfta_generic - Clear VLAN filter table
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the register array which contains the VLAN filter table by
+ *  setting all the values to 0.
+ **/
+void igb_clear_vfta_generic(struct e1000_hw *hw)
+{
+	u32 offset;
+
+	DEBUGFUNC("igb_clear_vfta_generic");
+
+	for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
+                E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, 0);
+		E1000_WRITE_FLUSH(hw);
+	}
+}
+
+/**
+ *  igb_write_vfta_generic - Write value to VLAN filter table
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset in VLAN filter table
+ *  @value: register value written to VLAN filter table
+ *
+ *  Writes value at the given offset in the register array which stores
+ *  the VLAN filter table.
+ **/
+void igb_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
+{
+	DEBUGFUNC("igb_write_vfta_generic");
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_VFTA, offset, value);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  igb_init_rx_addrs_generic - Initialize receive address's
+ *  @hw: pointer to the HW structure
+ *  @rar_count: receive address registers
+ *
+ *  Setups the receive address registers by setting the base receive address
+ *  register to the devices MAC address and clearing all the other receive
+ *  address registers to 0.
+ **/
+void igb_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count)
+{
+	u32 i;
+	u8 mac_addr[ETH_ADDR_LEN] = {0};
+
+	DEBUGFUNC("igb_init_rx_addrs_generic");
+
+	/* Setup the receive address */
+	DEBUGOUT("Programming MAC Address into RAR[0]\n");
+
+	hw->mac.ops.rar_set(hw, hw->mac.addr, 0);
+
+	/* Zero out the other (rar_entry_count - 1) receive addresses */
+	DEBUGOUT1("Clearing RAR[1-%u]\n", rar_count-1);
+	for (i = 1; i < rar_count; i++)
+		hw->mac.ops.rar_set(hw, mac_addr, i);
+}
+
+/**
+ *  igb_check_alt_mac_addr_generic - Check for alternate MAC addr
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the nvm for an alternate MAC address.  An alternate MAC address
+ *  can be setup by pre-boot software and must be treated like a permanent
+ *  address and must override the actual permanent MAC address. If an
+ *  alternate MAC address is found it is programmed into RAR0, replacing
+ *  the permanent address that was installed into RAR0 by the Si on reset.
+ *  This function will return SUCCESS unless it encounters an error while
+ *  reading the EEPROM.
+ **/
+s32 igb_check_alt_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 i;
+	s32 ret_val = E1000_SUCCESS;
+	u16 offset, nvm_alt_mac_addr_offset, nvm_data;
+	u8 alt_mac_addr[ETH_ADDR_LEN];
+
+	DEBUGFUNC("igb_check_alt_mac_addr_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
+	                         &nvm_alt_mac_addr_offset);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (nvm_alt_mac_addr_offset == 0xFFFF) {
+		/* There is no Alternate MAC Address */
+		goto out;
+	}
+
+	if (hw->bus.func == E1000_FUNC_1)
+		nvm_alt_mac_addr_offset += E1000_ALT_MAC_ADDRESS_OFFSET_LAN1;
+	for (i = 0; i < ETH_ADDR_LEN; i += 2) {
+		offset = nvm_alt_mac_addr_offset + (i >> 1);
+		ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			goto out;
+		}
+
+		alt_mac_addr[i] = (u8)(nvm_data & 0xFF);
+		alt_mac_addr[i + 1] = (u8)(nvm_data >> 8);
+	}
+
+	/* if multicast bit is set, the alternate address will not be used */
+	if (alt_mac_addr[0] & 0x01) {
+		DEBUGOUT("Ignoring Alternate Mac Address with MC bit set\n");
+		goto out;
+	}
+
+	/*
+	 * We have a valid alternate MAC address, and we want to treat it the
+	 * same as the normal permanent MAC address stored by the HW into the
+	 * RAR. Do this by mapping this address into RAR0.
+	 */
+	hw->mac.ops.rar_set(hw, alt_mac_addr, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_rar_set_generic - Set receive address register
+ *  @hw: pointer to the HW structure
+ *  @addr: pointer to the receive address
+ *  @index: receive address array register
+ *
+ *  Sets the receive address array register at index to the address passed
+ *  in by addr.
+ **/
+void igb_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
+{
+	u32 rar_low, rar_high;
+
+	DEBUGFUNC("igb_rar_set_generic");
+
+	/*
+	 * HW expects these in little endian so we reverse the byte order
+	 * from network order (big endian) to little endian
+	 */
+	rar_low = ((u32) addr[0] |
+	           ((u32) addr[1] << 8) |
+	           ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
+
+	rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
+
+	/* If MAC address zero, no need to set the AV bit */
+	if (rar_low || rar_high)
+		rar_high |= E1000_RAH_AV;
+
+	/*
+	 * Some bridges will combine consecutive 32-bit writes into
+	 * a single burst write, which will malfunction on some parts.
+	 * The flushes avoid this.
+	 */
+	E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
+	E1000_WRITE_FLUSH(hw);
+	E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  igb_mta_set_generic - Set multicast filter table address
+ *  @hw: pointer to the HW structure
+ *  @hash_value: determines the MTA register and bit to set
+ *
+ *  The multicast table address is a register array of 32-bit registers.
+ *  The hash_value is used to determine what register the bit is in, the
+ *  current value is read, the new bit is OR'd in and the new value is
+ *  written back into the register.
+ **/
+void igb_mta_set_generic(struct e1000_hw *hw, u32 hash_value)
+{
+	u32 hash_bit, hash_reg, mta;
+
+	DEBUGFUNC("igb_mta_set_generic");
+	/*
+	 * The MTA is a register array of 32-bit registers. It is
+	 * treated like an array of (32*mta_reg_count) bits.  We want to
+	 * set bit BitArray[hash_value]. So we figure out what register
+	 * the bit is in, read it, OR in the new bit, then write
+	 * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
+	 * mask to bits 31:5 of the hash value which gives us the
+	 * register we're modifying.  The hash bit within that register
+	 * is determined by the lower 5 bits of the hash value.
+	 */
+	hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+	hash_bit = hash_value & 0x1F;
+
+	mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
+
+	mta |= (1 << hash_bit);
+
+	E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  igb_update_mc_addr_list_generic - Update Multicast addresses
+ *  @hw: pointer to the HW structure
+ *  @mc_addr_list: array of multicast addresses to program
+ *  @mc_addr_count: number of multicast addresses to program
+ *
+ *  Updates entire Multicast Table Array.
+ *  The caller must have a packed mc_addr_list of multicast addresses.
+ **/
+void igb_update_mc_addr_list_generic(struct e1000_hw *hw,
+                                       u8 *mc_addr_list, u32 mc_addr_count)
+{
+	u32 hash_value, hash_bit, hash_reg;
+	int i;
+
+	DEBUGFUNC("igb_update_mc_addr_list_generic");
+
+	/* clear mta_shadow */
+	memset(&hw->mac.mta_shadow, 0, sizeof(hw->mac.mta_shadow));
+
+	/* update mta_shadow from mc_addr_list */
+	for (i = 0; (u32) i < mc_addr_count; i++) {
+		hash_value = igb_hash_mc_addr_generic(hw, mc_addr_list);
+
+		hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
+		hash_bit = hash_value & 0x1F;
+
+		hw->mac.mta_shadow[hash_reg] |= (1 << hash_bit);
+		mc_addr_list += (ETH_ADDR_LEN);
+	}
+
+	/* replace the entire MTA table */
+	for (i = hw->mac.mta_reg_count - 1; i >= 0; i--)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, hw->mac.mta_shadow[i]);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  igb_hash_mc_addr_generic - Generate a multicast hash value
+ *  @hw: pointer to the HW structure
+ *  @mc_addr: pointer to a multicast address
+ *
+ *  Generates a multicast address hash value which is used to determine
+ *  the multicast filter table array address and new table value.  See
+ *  igb_mta_set_generic()
+ **/
+u32 igb_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr)
+{
+	u32 hash_value, hash_mask;
+	u8 bit_shift = 0;
+
+	DEBUGFUNC("igb_hash_mc_addr_generic");
+
+	/* Register count multiplied by bits per register */
+	hash_mask = (hw->mac.mta_reg_count * 32) - 1;
+
+	/*
+	 * For a mc_filter_type of 0, bit_shift is the number of left-shifts
+	 * where 0xFF would still fall within the hash mask.
+	 */
+	while (hash_mask >> bit_shift != 0xFF)
+		bit_shift++;
+
+	/*
+	 * The portion of the address that is used for the hash table
+	 * is determined by the mc_filter_type setting.
+	 * The algorithm is such that there is a total of 8 bits of shifting.
+	 * The bit_shift for a mc_filter_type of 0 represents the number of
+	 * left-shifts where the MSB of mc_addr[5] would still fall within
+	 * the hash_mask.  Case 0 does this exactly.  Since there are a total
+	 * of 8 bits of shifting, then mc_addr[4] will shift right the
+	 * remaining number of bits. Thus 8 - bit_shift.  The rest of the
+	 * cases are a variation of this algorithm...essentially raising the
+	 * number of bits to shift mc_addr[5] left, while still keeping the
+	 * 8-bit shifting total.
+	 *
+	 * For example, given the following Destination MAC Address and an
+	 * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask),
+	 * we can see that the bit_shift for case 0 is 4.  These are the hash
+	 * values resulting from each mc_filter_type...
+	 * [0] [1] [2] [3] [4] [5]
+	 * 01  AA  00  12  34  56
+	 * LSB                 MSB
+	 *
+	 * case 0: hash_value = ((0x34 >> 4) | (0x56 << 4)) & 0xFFF = 0x563
+	 * case 1: hash_value = ((0x34 >> 3) | (0x56 << 5)) & 0xFFF = 0xAC6
+	 * case 2: hash_value = ((0x34 >> 2) | (0x56 << 6)) & 0xFFF = 0x163
+	 * case 3: hash_value = ((0x34 >> 0) | (0x56 << 8)) & 0xFFF = 0x634
+	 */
+	switch (hw->mac.mc_filter_type) {
+	default:
+	case 0:
+		break;
+	case 1:
+		bit_shift += 1;
+		break;
+	case 2:
+		bit_shift += 2;
+		break;
+	case 3:
+		bit_shift += 4;
+		break;
+	}
+
+	hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
+	                          (((u16) mc_addr[5]) << bit_shift)));
+
+	return hash_value;
+}
+
+/**
+ *  igb_clear_hw_cntrs_base_generic - Clear base hardware counters
+ *  @hw: pointer to the HW structure
+ *
+ *  Clears the base hardware counters by reading the counter registers.
+ **/
+void igb_clear_hw_cntrs_base_generic(struct e1000_hw *hw)
+{
+	DEBUGFUNC("igb_clear_hw_cntrs_base_generic");
+
+	E1000_READ_REG(hw, E1000_CRCERRS);
+	E1000_READ_REG(hw, E1000_SYMERRS);
+	E1000_READ_REG(hw, E1000_MPC);
+	E1000_READ_REG(hw, E1000_SCC);
+	E1000_READ_REG(hw, E1000_ECOL);
+	E1000_READ_REG(hw, E1000_MCC);
+	E1000_READ_REG(hw, E1000_LATECOL);
+	E1000_READ_REG(hw, E1000_COLC);
+	E1000_READ_REG(hw, E1000_DC);
+	E1000_READ_REG(hw, E1000_SEC);
+	E1000_READ_REG(hw, E1000_RLEC);
+	E1000_READ_REG(hw, E1000_XONRXC);
+	E1000_READ_REG(hw, E1000_XONTXC);
+	E1000_READ_REG(hw, E1000_XOFFRXC);
+	E1000_READ_REG(hw, E1000_XOFFTXC);
+	E1000_READ_REG(hw, E1000_FCRUC);
+	E1000_READ_REG(hw, E1000_GPRC);
+	E1000_READ_REG(hw, E1000_BPRC);
+	E1000_READ_REG(hw, E1000_MPRC);
+	E1000_READ_REG(hw, E1000_GPTC);
+	E1000_READ_REG(hw, E1000_GORCL);
+	E1000_READ_REG(hw, E1000_GORCH);
+	E1000_READ_REG(hw, E1000_GOTCL);
+	E1000_READ_REG(hw, E1000_GOTCH);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_RUC);
+	E1000_READ_REG(hw, E1000_RFC);
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RJC);
+	E1000_READ_REG(hw, E1000_TORL);
+	E1000_READ_REG(hw, E1000_TORH);
+	E1000_READ_REG(hw, E1000_TOTL);
+	E1000_READ_REG(hw, E1000_TOTH);
+	E1000_READ_REG(hw, E1000_TPR);
+	E1000_READ_REG(hw, E1000_TPT);
+	E1000_READ_REG(hw, E1000_MPTC);
+	E1000_READ_REG(hw, E1000_BPTC);
+}
+
+/**
+ *  igb_check_for_copper_link_generic - Check for link (Copper)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks to see of the link status of the hardware has changed.  If a
+ *  change in link status has been detected, then we read the PHY registers
+ *  to get the current speed/duplex if link exists.
+ **/
+s32 igb_check_for_copper_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("igb_check_for_copper_link");
+
+	/*
+	 * We only want to go out to the PHY registers to see if Auto-Neg
+	 * has completed and/or if our link status has changed.  The
+	 * get_link_status flag is set upon receiving a Link Status
+	 * Change or Rx Sequence Error interrupt.
+	 */
+	if (!mac->get_link_status) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/*
+	 * First we want to see if the MII Status Register reports
+	 * link.  If so, then we want to get the current speed/duplex
+	 * of the PHY.
+	 */
+	ret_val = igb_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link)
+		goto out; /* No link detected */
+
+	mac->get_link_status = false;
+
+	/*
+	 * Check if there was DownShift, must be checked
+	 * immediately after link-up
+	 */
+	igb_check_downshift_generic(hw);
+
+	/*
+	 * If we are forcing speed/duplex, then we simply return since
+	 * we have already determined whether we have link or not.
+	 */
+	if (!mac->autoneg) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	/*
+	 * Auto-Neg is enabled.  Auto Speed Detection takes care
+	 * of MAC speed/duplex configuration.  So we only need to
+	 * configure Collision Distance in the MAC.
+	 */
+	igb_config_collision_dist_generic(hw);
+
+	/*
+	 * Configure Flow Control now that Auto-Neg has completed.
+	 * First, we need to restore the desired flow control
+	 * settings because we may have had to re-autoneg with a
+	 * different link partner.
+	 */
+	ret_val = igb_config_fc_after_link_up_generic(hw);
+	if (ret_val) {
+		DEBUGOUT("Error configuring flow control\n");
+        }
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_check_for_fiber_link_generic - Check for link (Fiber)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 igb_check_for_fiber_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_check_for_fiber_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	rxcw = E1000_READ_REG(hw, E1000_RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), the cable is plugged in (we have signal),
+	 * and our link partner is not trying to auto-negotiate with us (we
+	 * are receiving idles or data), we need to force link up. We also
+	 * need to give auto-negotiation time to complete, in case the cable
+	 * was just plugged in. The autoneg_failed flag does this.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((ctrl & E1000_CTRL_SWDPIN1) && (!(status & E1000_STATUS_LU)) &&
+	    (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = igb_config_fc_after_link_up_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_check_for_serdes_link_generic - Check for link (Serdes)
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks for link up on the hardware.  If link is not up and we have
+ *  a signal, then we need to force link up.
+ **/
+s32 igb_check_for_serdes_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 rxcw;
+	u32 ctrl;
+	u32 status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_check_for_serdes_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	rxcw = E1000_READ_REG(hw, E1000_RXCW);
+
+	/*
+	 * If we don't have link (auto-negotiation failed or link partner
+	 * cannot auto-negotiate), and our link partner is not trying to
+	 * auto-negotiate with us (we are receiving idles or data),
+	 * we need to force link up. We also need to give auto-negotiation
+	 * time to complete.
+	 */
+	/* (ctrl & E1000_CTRL_SWDPIN1) == 1 == have signal */
+	if ((!(status & E1000_STATUS_LU)) && (!(rxcw & E1000_RXCW_C))) {
+		if (mac->autoneg_failed == 0) {
+			mac->autoneg_failed = 1;
+			goto out;
+		}
+		DEBUGOUT("NOT RXing /C/, disable AutoNeg and force link.\n");
+
+		/* Disable auto-negotiation in the TXCW register */
+		E1000_WRITE_REG(hw, E1000_TXCW, (mac->txcw & ~E1000_TXCW_ANE));
+
+		/* Force link-up and also force full-duplex. */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= (E1000_CTRL_SLU | E1000_CTRL_FD);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+		/* Configure Flow Control after forcing link up. */
+		ret_val = igb_config_fc_after_link_up_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error configuring flow control\n");
+			goto out;
+		}
+	} else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) {
+		/*
+		 * If we are forcing link and we are receiving /C/ ordered
+		 * sets, re-enable auto-negotiation in the TXCW register
+		 * and disable forced link in the Device Control register
+		 * in an attempt to auto-negotiate with our link partner.
+		 */
+		DEBUGOUT("RXing /C/, enable AutoNeg and stop forcing link.\n");
+		E1000_WRITE_REG(hw, E1000_TXCW, mac->txcw);
+		E1000_WRITE_REG(hw, E1000_CTRL, (ctrl & ~E1000_CTRL_SLU));
+
+		mac->serdes_has_link = true;
+	} else if (!(E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW))) {
+		/*
+		 * If we force link for non-auto-negotiation switch, check
+		 * link status based on MAC synchronization for internal
+		 * serdes media type.
+		 */
+		/* SYNCH bit and IV bit are sticky. */
+		usec_delay(10);
+		rxcw = E1000_READ_REG(hw, E1000_RXCW);
+		if (rxcw & E1000_RXCW_SYNCH) {
+			if (!(rxcw & E1000_RXCW_IV)) {
+				mac->serdes_has_link = true;
+				DEBUGOUT("SERDES: Link up - forced.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			DEBUGOUT("SERDES: Link down - force failed.\n");
+		}
+	}
+
+	if (E1000_TXCW_ANE & E1000_READ_REG(hw, E1000_TXCW)) {
+		status = E1000_READ_REG(hw, E1000_STATUS);
+		if (status & E1000_STATUS_LU) {
+			/* SYNCH bit and IV bit are sticky, so reread rxcw. */
+			usec_delay(10);
+			rxcw = E1000_READ_REG(hw, E1000_RXCW);
+			if (rxcw & E1000_RXCW_SYNCH) {
+				if (!(rxcw & E1000_RXCW_IV)) {
+					mac->serdes_has_link = true;
+					DEBUGOUT("SERDES: Link up - autoneg "
+					   "completed sucessfully.\n");
+				} else {
+					mac->serdes_has_link = false;
+					DEBUGOUT("SERDES: Link down - invalid"
+					   "codewords detected in autoneg.\n");
+				}
+			} else {
+				mac->serdes_has_link = false;
+				DEBUGOUT("SERDES: Link down - no sync.\n");
+			}
+		} else {
+			mac->serdes_has_link = false;
+			DEBUGOUT("SERDES: Link down - autoneg failed\n");
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_setup_link_generic - Setup flow control and link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines which flow control settings to use, then configures flow
+ *  control.  Calls the appropriate media-specific link configuration
+ *  function.  Assuming the adapter has a valid link partner, a valid link
+ *  should be established.  Assumes the hardware has previously been reset
+ *  and the transmitter and receiver are not enabled.
+ **/
+s32 igb_setup_link_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_setup_link_generic");
+
+	/*
+	 * In the case of the phy reset being blocked, we already have a link.
+	 * We do not need to set it up again.
+	 */
+	if (hw->phy.ops.check_reset_block)
+		if (hw->phy.ops.check_reset_block(hw))
+			goto out;
+
+	/*
+	 * If requested flow control is set to default, set flow control
+	 * based on the EEPROM flow control settings.
+	 */
+	if (hw->fc.requested_mode == e1000_fc_default) {
+		ret_val = igb_set_default_fc_generic(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
+
+	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+		hw->fc.current_mode);
+
+	/* Call the necessary media_type subroutine to configure the link. */
+	ret_val = hw->mac.ops.setup_physical_interface(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Initialize the flow control address, type, and PAUSE timer
+	 * registers to their default values.  This is done even if flow
+	 * control is disabled, because it does not hurt anything to
+	 * initialize these registers.
+	 */
+	DEBUGOUT("Initializing the Flow Control address, type and timer regs\n");
+	E1000_WRITE_REG(hw, E1000_FCT, FLOW_CONTROL_TYPE);
+	E1000_WRITE_REG(hw, E1000_FCAH, FLOW_CONTROL_ADDRESS_HIGH);
+	E1000_WRITE_REG(hw, E1000_FCAL, FLOW_CONTROL_ADDRESS_LOW);
+
+	E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
+
+	ret_val = igb_set_fc_watermarks_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_setup_fiber_serdes_link_generic - Setup link for fiber/serdes
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures collision distance and flow control for fiber and serdes
+ *  links.  Upon successful setup, poll for link.
+ **/
+s32 igb_setup_fiber_serdes_link_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_setup_fiber_serdes_link_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/* Take the link out of reset */
+	ctrl &= ~E1000_CTRL_LRST;
+
+	igb_config_collision_dist_generic(hw);
+
+	ret_val = igb_commit_fc_settings_generic(hw);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Since auto-negotiation is enabled, take the link out of reset (the
+	 * link will be in reset, because we previously reset the chip). This
+	 * will restart auto-negotiation.  If auto-negotiation is successful
+	 * then the link-up status bit will be set and the flow control enable
+	 * bits (RFCE and TFCE) will be set according to their negotiated value.
+	 */
+	DEBUGOUT("Auto-negotiation enabled\n");
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(1);
+
+	/*
+	 * For these adapters, the SW definable pin 1 is set when the optics
+	 * detect a signal.  If we have a signal, then poll for a "Link-Up"
+	 * indication.
+	 */
+	if (hw->phy.media_type == e1000_media_type_internal_serdes ||
+	    (E1000_READ_REG(hw, E1000_CTRL) & E1000_CTRL_SWDPIN1)) {
+		ret_val = igb_poll_fiber_serdes_link_generic(hw);
+	} else {
+		DEBUGOUT("No signal detected\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_config_collision_dist_generic - Configure collision distance
+ *  @hw: pointer to the HW structure
+ *
+ *  Configures the collision distance to the default value and is used
+ *  during link setup. Currently no func pointer exists and all
+ *  implementations are handled in the generic version of this function.
+ **/
+void igb_config_collision_dist_generic(struct e1000_hw *hw)
+{
+	u32 tctl;
+
+	DEBUGFUNC("igb_config_collision_dist_generic");
+
+	tctl = E1000_READ_REG(hw, E1000_TCTL);
+
+	tctl &= ~E1000_TCTL_COLD;
+	tctl |= E1000_COLLISION_DISTANCE << E1000_COLD_SHIFT;
+
+	E1000_WRITE_REG(hw, E1000_TCTL, tctl);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ *  igb_poll_fiber_serdes_link_generic - Poll for link up
+ *  @hw: pointer to the HW structure
+ *
+ *  Polls for link up by reading the status register, if link fails to come
+ *  up with auto-negotiation, then the link is forced if a signal is detected.
+ **/
+static s32 igb_poll_fiber_serdes_link_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 i, status;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_poll_fiber_serdes_link_generic");
+
+	/*
+	 * If we have a signal (the cable is plugged in, or assumed true for
+	 * serdes media) then poll for a "Link-Up" indication in the Device
+	 * Status Register.  Time-out if a link isn't seen in 500 milliseconds
+	 * seconds (Auto-negotiation should complete in less than 500
+	 * milliseconds even if the other end is doing it in SW).
+	 */
+	for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) {
+		msec_delay(10);
+		status = E1000_READ_REG(hw, E1000_STATUS);
+		if (status & E1000_STATUS_LU)
+			break;
+	}
+	if (i == FIBER_LINK_UP_LIMIT) {
+		DEBUGOUT("Never got a valid link from auto-neg!!!\n");
+		mac->autoneg_failed = 1;
+		/*
+		 * AutoNeg failed to achieve a link, so we'll call
+		 * mac->check_for_link. This routine will force the
+		 * link up if we detect a signal. This will allow us to
+		 * communicate with non-autonegotiating link partners.
+		 */
+		ret_val = hw->mac.ops.check_for_link(hw);
+		if (ret_val) {
+			DEBUGOUT("Error while checking for link\n");
+			goto out;
+		}
+		mac->autoneg_failed = 0;
+	} else {
+		mac->autoneg_failed = 0;
+		DEBUGOUT("Valid Link Found\n");
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_commit_fc_settings_generic - Configure flow control
+ *  @hw: pointer to the HW structure
+ *
+ *  Write the flow control settings to the Transmit Config Word Register (TXCW)
+ *  base on the flow control settings in e1000_mac_info.
+ **/
+static s32 igb_commit_fc_settings_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 txcw;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_commit_fc_settings_generic");
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the device accordingly.  If auto-negotiation is enabled, then
+	 * software will have to set the "PAUSE" bits to the correct value in
+	 * the Transmit Config Word Register (TXCW) and re-start auto-
+	 * negotiation.  However, if auto-negotiation is disabled, then
+	 * software will have to manually configure the two flow control enable
+	 * bits in the CTRL register.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames,
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames but we
+	 *          do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/* Flow control completely disabled by a software over-ride. */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled and Tx Flow control is disabled
+		 * by a software over-ride. Since there really isn't a way to
+		 * advertise that we are capable of Rx Pause ONLY, we will
+		 * advertise that we support both symmetric and asymmetric RX
+		 * PAUSE.  Later, we will disable the adapter's ability to send
+		 * PAUSE frames.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is disabled,
+		 * by a software over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR);
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+		break;
+	}
+
+	E1000_WRITE_REG(hw, E1000_TXCW, txcw);
+	mac->txcw = txcw;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_set_fc_watermarks_generic - Set flow control high/low watermarks
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets the flow control high/low threshold (watermark) registers.  If
+ *  flow control XON frame transmission is enabled, then set XON frame
+ *  transmission as well.
+ **/
+s32 igb_set_fc_watermarks_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u32 fcrtl = 0, fcrth = 0;
+
+	DEBUGFUNC("igb_set_fc_watermarks_generic");
+
+	/*
+	 * Set the flow control receive threshold registers.  Normally,
+	 * these registers will be set to a default threshold that may be
+	 * adjusted later by the driver's runtime code.  However, if the
+	 * ability to transmit pause frames is not enabled, then these
+	 * registers will be set to 0.
+	 */
+	if (hw->fc.current_mode & e1000_fc_tx_pause) {
+		/*
+		 * We need to set up the Receive Threshold high and low water
+		 * marks as well as (optionally) enabling the transmission of
+		 * XON frames.
+		 */
+		fcrtl = hw->fc.low_water;
+		if (hw->fc.send_xon)
+			fcrtl |= E1000_FCRTL_XONE;
+
+		fcrth = hw->fc.high_water;
+	}
+	E1000_WRITE_REG(hw, E1000_FCRTL, fcrtl);
+	E1000_WRITE_REG(hw, E1000_FCRTH, fcrth);
+
+	return ret_val;
+}
+
+/**
+ *  igb_set_default_fc_generic - Set flow control default values
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the EEPROM for the default values for flow control and store the
+ *  values.
+ **/
+static s32 igb_set_default_fc_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 nvm_data;
+
+	DEBUGFUNC("igb_set_default_fc_generic");
+
+	/*
+	 * Read and store word 0x0F of the EEPROM. This word contains bits
+	 * that determine the hardware's default PAUSE (flow control) mode,
+	 * a bit that determines whether the HW defaults to enabling or
+	 * disabling auto-negotiation, and the direction of the
+	 * SW defined pins. If there is no SW over-ride of the flow
+	 * control setting, then the variable hw->fc will
+	 * be initialized based on a value in the EEPROM.
+	 */
+	ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
+
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if ((nvm_data & NVM_WORD0F_PAUSE_MASK) == 0)
+		hw->fc.requested_mode = e1000_fc_none;
+	else if ((nvm_data & NVM_WORD0F_PAUSE_MASK) ==
+		 NVM_WORD0F_ASM_DIR)
+		hw->fc.requested_mode = e1000_fc_tx_pause;
+	else
+		hw->fc.requested_mode = e1000_fc_full;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_force_mac_fc_generic - Force the MAC's flow control settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Force the MAC's flow control settings.  Sets the TFCE and RFCE bits in the
+ *  device control register to reflect the adapter settings.  TFCE and RFCE
+ *  need to be explicitly set by software when a copper PHY is used because
+ *  autonegotiation is managed by the PHY rather than the MAC.  Software must
+ *  also configure these bits when link is forced on a fiber connection.
+ **/
+s32 igb_force_mac_fc_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_force_mac_fc_generic");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	/*
+	 * Because we didn't get link via the internal auto-negotiation
+	 * mechanism (we either forced link or we got link via PHY
+	 * auto-neg), we have to manually enable/disable transmit an
+	 * receive flow control.
+	 *
+	 * The "Case" statement below enables/disable flow control
+	 * according to the "hw->fc.current_mode" parameter.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause
+	 *          frames but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          frames but we do not receive pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) is enabled.
+	 *  other:  No other values should be possible at this point.
+	 */
+	DEBUGOUT1("hw->fc.current_mode = %u\n", hw->fc.current_mode);
+
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE));
+		break;
+	case e1000_fc_rx_pause:
+		ctrl &= (~E1000_CTRL_TFCE);
+		ctrl |= E1000_CTRL_RFCE;
+		break;
+	case e1000_fc_tx_pause:
+		ctrl &= (~E1000_CTRL_RFCE);
+		ctrl |= E1000_CTRL_TFCE;
+		break;
+	case e1000_fc_full:
+		ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_config_fc_after_link_up_generic - Configures flow control after link
+ *  @hw: pointer to the HW structure
+ *
+ *  Checks the status of auto-negotiation after link up to ensure that the
+ *  speed and duplex were not forced.  If the link needed to be forced, then
+ *  flow control needs to be forced also.  If auto-negotiation is enabled
+ *  and did not fail, then we configure flow control based on our link
+ *  partner.
+ **/
+s32 igb_config_fc_after_link_up_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val = E1000_SUCCESS;
+	u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;
+	u16 speed, duplex;
+
+	DEBUGFUNC("igb_config_fc_after_link_up_generic");
+
+	/*
+	 * Check for the case where we have fiber media and auto-neg failed
+	 * so we had to force link.  In this case, we need to force the
+	 * configuration of the MAC to match the "fc" parameter.
+	 */
+	if (mac->autoneg_failed) {
+		if (hw->phy.media_type == e1000_media_type_fiber ||
+		    hw->phy.media_type == e1000_media_type_internal_serdes)
+			ret_val = igb_force_mac_fc_generic(hw);
+	} else {
+		if (hw->phy.media_type == e1000_media_type_copper)
+			ret_val = igb_force_mac_fc_generic(hw);
+	}
+
+	if (ret_val) {
+		DEBUGOUT("Error forcing flow control settings\n");
+		goto out;
+	}
+
+	/*
+	 * Check for the case where we have copper media and auto-neg is
+	 * enabled.  In this case, we need to check and see if Auto-Neg
+	 * has completed, and if so, how the PHY and link partner has
+	 * flow control configured.
+	 */
+	if ((hw->phy.media_type == e1000_media_type_copper) && mac->autoneg) {
+		/*
+		 * Read the MII Status Register and check to see if AutoNeg
+		 * has completed.  We read this twice because this reg has
+		 * some "sticky" (latched) bits.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &mii_status_reg);
+		if (ret_val)
+			goto out;
+
+		if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
+			DEBUGOUT("Copper PHY and Auto Neg "
+			         "has not completed.\n");
+			goto out;
+		}
+
+		/*
+		 * The AutoNeg process has completed, so we now need to
+		 * read both the Auto Negotiation Advertisement
+		 * Register (Address 4) and the Auto_Negotiation Base
+		 * Page Ability Register (Address 5) to determine how
+		 * flow control was negotiated.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_AUTONEG_ADV,
+		                             &mii_nway_adv_reg);
+		if (ret_val)
+			goto out;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_LP_ABILITY,
+		                             &mii_nway_lp_ability_reg);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Two bits in the Auto Negotiation Advertisement Register
+		 * (Address 4) and two bits in the Auto Negotiation Base
+		 * Page Ability Register (Address 5) determine flow control
+		 * for both the PHY and the link partner.  The following
+		 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,
+		 * 1999, describes these PAUSE resolution bits and how flow
+		 * control is determined based upon these settings.
+		 * NOTE:  DC = Don't Care
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    0    |  DC   |   DC    | e1000_fc_none
+		 *   0   |    1    |   0   |   DC    | e1000_fc_none
+		 *   0   |    1    |   1   |    0    | e1000_fc_none
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 *   1   |    0    |   0   |   DC    | e1000_fc_none
+		 *   1   |   DC    |   1   |   DC    | e1000_fc_full
+		 *   1   |    1    |   0   |    0    | e1000_fc_none
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 *
+		 * Are both PAUSE bits set to 1?  If so, this implies
+		 * Symmetric Flow Control is enabled at both ends.  The
+		 * ASM_DIR bits are irrelevant per the spec.
+		 *
+		 * For Symmetric Flow Control:
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |   DC    |   1   |   DC    | E1000_fc_full
+		 *
+		 */
+		if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		    (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
+			/*
+			 * Now we need to check if the user selected Rx ONLY
+			 * of pause frames.  In this case, we had to advertise
+			 * FULL flow control because we could not advertise RX
+			 * ONLY. Hence, we must now check to see if we need to
+			 * turn OFF  the TRANSMISSION of PAUSE frames.
+			 */
+			if (hw->fc.requested_mode == e1000_fc_full) {
+				hw->fc.current_mode = e1000_fc_full;
+				DEBUGOUT("Flow Control = FULL.\r\n");
+			} else {
+				hw->fc.current_mode = e1000_fc_rx_pause;
+				DEBUGOUT("Flow Control = "
+				         "RX PAUSE frames only.\r\n");
+			}
+		}
+		/*
+		 * For receiving PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
+		 */
+		else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		          (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		          (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_tx_pause;
+			DEBUGOUT("Flow Control = TX PAUSE frames only.\r\n");
+		}
+		/*
+		 * For transmitting PAUSE frames ONLY.
+		 *
+		 *   LOCAL DEVICE  |   LINK PARTNER
+		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
+		 *-------|---------|-------|---------|--------------------
+		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
+		 */
+		else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
+		         (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
+		         !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
+		         (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
+			hw->fc.current_mode = e1000_fc_rx_pause;
+			DEBUGOUT("Flow Control = RX PAUSE frames only.\r\n");
+		} else {
+			/*
+			 * Per the IEEE spec, at this point flow control
+			 * should be disabled.
+			 */
+			hw->fc.current_mode = e1000_fc_none;
+			DEBUGOUT("Flow Control = NONE.\r\n");
+		}
+
+		/*
+		 * Now we need to do one last check...  If we auto-
+		 * negotiated to HALF DUPLEX, flow control should not be
+		 * enabled per IEEE 802.3 spec.
+		 */
+		ret_val = mac->ops.get_link_up_info(hw, &speed, &duplex);
+		if (ret_val) {
+			DEBUGOUT("Error getting link speed and duplex\n");
+			goto out;
+		}
+
+		if (duplex == HALF_DUPLEX)
+			hw->fc.current_mode = e1000_fc_none;
+
+		/*
+		 * Now we call a subroutine to actually force the MAC
+		 * controller to use the correct flow control settings.
+		 */
+		ret_val = igb_force_mac_fc_generic(hw);
+		if (ret_val) {
+			DEBUGOUT("Error forcing flow control settings\n");
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_speed_and_duplex_copper_generic - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Read the status register for the current speed/duplex and store the current
+ *  speed and duplex for copper connections.
+ **/
+s32 igb_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
+                                              u16 *duplex)
+{
+	u32 status;
+
+	DEBUGFUNC("igb_get_speed_and_duplex_copper_generic");
+
+	status = E1000_READ_REG(hw, E1000_STATUS);
+	if (status & E1000_STATUS_SPEED_1000) {
+		*speed = SPEED_1000;
+		DEBUGOUT("1000 Mbs, ");
+	} else if (status & E1000_STATUS_SPEED_100) {
+		*speed = SPEED_100;
+		DEBUGOUT("100 Mbs, ");
+	} else {
+		*speed = SPEED_10;
+		DEBUGOUT("10 Mbs, ");
+	}
+
+	if (status & E1000_STATUS_FD) {
+		*duplex = FULL_DUPLEX;
+		DEBUGOUT("Full Duplex\n");
+	} else {
+		*duplex = HALF_DUPLEX;
+		DEBUGOUT("Half Duplex\n");
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_get_speed_and_duplex_fiber_generic - Retrieve current speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @speed: stores the current speed
+ *  @duplex: stores the current duplex
+ *
+ *  Sets the speed and duplex to gigabit full duplex (the only possible option)
+ *  for fiber/serdes links.
+ **/
+s32 igb_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw __unused,
+                                                  u16 *speed, u16 *duplex)
+{
+	DEBUGFUNC("igb_get_speed_and_duplex_fiber_serdes_generic");
+
+	*speed = SPEED_1000;
+	*duplex = FULL_DUPLEX;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_get_hw_semaphore_generic - Acquire hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire the HW semaphore to access the PHY or NVM
+ **/
+s32 igb_get_hw_semaphore_generic(struct e1000_hw *hw)
+{
+	u32 swsm;
+	s32 ret_val = E1000_SUCCESS;
+	s32 timeout = hw->nvm.word_size + 1;
+	s32 i = 0;
+
+	DEBUGFUNC("igb_get_hw_semaphore_generic");
+
+	/* Get the SW semaphore */
+	while (i < timeout) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		if (!(swsm & E1000_SWSM_SMBI))
+			break;
+
+		usec_delay(50);
+		i++;
+	}
+
+	if (i == timeout) {
+		DEBUGOUT("Driver can't access device - SMBI bit is set.\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	/* Get the FW semaphore. */
+	for (i = 0; i < timeout; i++) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
+
+		/* Semaphore acquired if bit latched */
+		if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
+			break;
+
+		usec_delay(50);
+	}
+
+	if (i == timeout) {
+		/* Release semaphores */
+		igb_put_hw_semaphore_generic(hw);
+		DEBUGOUT("Driver can't access the NVM\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_put_hw_semaphore_generic - Release hardware semaphore
+ *  @hw: pointer to the HW structure
+ *
+ *  Release hardware semaphore used to access the PHY or NVM
+ **/
+void igb_put_hw_semaphore_generic(struct e1000_hw *hw)
+{
+	u32 swsm;
+
+	DEBUGFUNC("igb_put_hw_semaphore_generic");
+
+	swsm = E1000_READ_REG(hw, E1000_SWSM);
+
+	swsm &= ~(E1000_SWSM_SMBI | E1000_SWSM_SWESMBI);
+
+	E1000_WRITE_REG(hw, E1000_SWSM, swsm);
+}
+
+/**
+ *  igb_get_auto_rd_done_generic - Check for auto read completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Check EEPROM for Auto Read done bit.
+ **/
+s32 igb_get_auto_rd_done_generic(struct e1000_hw *hw)
+{
+	s32 i = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_get_auto_rd_done_generic");
+
+	while (i < AUTO_READ_DONE_TIMEOUT) {
+		if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_AUTO_RD)
+			break;
+		msec_delay(1);
+		i++;
+	}
+
+	if (i == AUTO_READ_DONE_TIMEOUT) {
+		DEBUGOUT("Auto read by HW from NVM has not completed.\n");
+		ret_val = -E1000_ERR_RESET;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_valid_led_default_generic - Verify a valid default LED config
+ *  @hw: pointer to the HW structure
+ *  @data: pointer to the NVM (EEPROM)
+ *
+ *  Read the EEPROM for the current default LED configuration.  If the
+ *  LED configuration is not valid, set to a valid LED configuration.
+ **/
+s32 igb_valid_led_default_generic(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("igb_valid_led_default_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF)
+		*data = ID_LED_DEFAULT;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_id_led_init_generic -
+ *  @hw: pointer to the HW structure
+ *
+ **/
+s32 igb_id_led_init_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	const u32 ledctl_mask = 0x000000FF;
+	const u32 ledctl_on = E1000_LEDCTL_MODE_LED_ON;
+	const u32 ledctl_off = E1000_LEDCTL_MODE_LED_OFF;
+	u16 data, i, temp;
+	const u16 led_mask = 0x0F;
+
+	DEBUGFUNC("igb_id_led_init_generic");
+
+	ret_val = hw->nvm.ops.valid_led_default(hw, &data);
+	if (ret_val)
+		goto out;
+
+	mac->ledctl_default = E1000_READ_REG(hw, E1000_LEDCTL);
+	mac->ledctl_mode1 = mac->ledctl_default;
+	mac->ledctl_mode2 = mac->ledctl_default;
+
+	for (i = 0; i < 4; i++) {
+		temp = (data >> (i << 2)) & led_mask;
+		switch (temp) {
+		case ID_LED_ON1_DEF2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_ON1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_OFF1_DEF2:
+		case ID_LED_OFF1_ON2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode1 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode1 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+		switch (temp) {
+		case ID_LED_DEF1_ON2:
+		case ID_LED_ON1_ON2:
+		case ID_LED_OFF1_ON2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_on << (i << 3);
+			break;
+		case ID_LED_DEF1_OFF2:
+		case ID_LED_ON1_OFF2:
+		case ID_LED_OFF1_OFF2:
+			mac->ledctl_mode2 &= ~(ledctl_mask << (i << 3));
+			mac->ledctl_mode2 |= ledctl_off << (i << 3);
+			break;
+		default:
+			/* Do nothing */
+			break;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  igb_setup_led_generic - Configures SW controllable LED
+ *  @hw: pointer to the HW structure
+ *
+ *  This prepares the SW controllable LED for use and saves the current state
+ *  of the LED so it can be later restored.
+ **/
+s32 igb_setup_led_generic(struct e1000_hw *hw)
+{
+	u32 ledctl;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_setup_led_generic");
+
+	if (hw->mac.ops.setup_led != e1000_setup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		ledctl = E1000_READ_REG(hw, E1000_LEDCTL);
+		hw->mac.ledctl_default = ledctl;
+		/* Turn off LED0 */
+		ledctl &= ~(E1000_LEDCTL_LED0_IVRT |
+		            E1000_LEDCTL_LED0_BLINK |
+		            E1000_LEDCTL_LED0_MODE_MASK);
+		ledctl |= (E1000_LEDCTL_MODE_LED_OFF <<
+		           E1000_LEDCTL_LED0_MODE_SHIFT);
+		E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl);
+	} else if (hw->phy.media_type == e1000_media_type_copper) {
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_cleanup_led_generic - Set LED config to default operation
+ *  @hw: pointer to the HW structure
+ *
+ *  Remove the current LED configuration and set the LED configuration
+ *  to the default value, saved from the EEPROM.
+ **/
+s32 igb_cleanup_led_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_cleanup_led_generic");
+
+	if (hw->mac.ops.cleanup_led != e1000_cleanup_led_generic) {
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_blink_led_generic - Blink LED
+ *  @hw: pointer to the HW structure
+ *
+ *  Blink the LEDs which are set to be on.
+ **/
+s32 igb_blink_led_generic(struct e1000_hw *hw)
+{
+	u32 ledctl_blink = 0;
+	u32 i;
+
+	DEBUGFUNC("igb_blink_led_generic");
+
+	if (hw->phy.media_type == e1000_media_type_fiber) {
+		/* always blink LED0 for PCI-E fiber */
+		ledctl_blink = E1000_LEDCTL_LED0_BLINK |
+		     (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT);
+	} else {
+		/*
+		 * set the blink bit for each LED that's "on" (0x0E)
+		 * in ledctl_mode2
+		 */
+		ledctl_blink = hw->mac.ledctl_mode2;
+		for (i = 0; i < 4; i++)
+			if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) ==
+			    E1000_LEDCTL_MODE_LED_ON)
+				ledctl_blink |= (E1000_LEDCTL_LED0_BLINK <<
+				                 (i * 8));
+	}
+
+	E1000_WRITE_REG(hw, E1000_LEDCTL, ledctl_blink);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_led_on_generic - Turn LED on
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED on.
+ **/
+s32 igb_led_on_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+
+	DEBUGFUNC("igb_led_on_generic");
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl &= ~E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2);
+		break;
+	default:
+		break;
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_led_off_generic - Turn LED off
+ *  @hw: pointer to the HW structure
+ *
+ *  Turn LED off.
+ **/
+s32 igb_led_off_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+
+	DEBUGFUNC("igb_led_off_generic");
+
+	switch (hw->phy.media_type) {
+	case e1000_media_type_fiber:
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		ctrl |= E1000_CTRL_SWDPIN0;
+		ctrl |= E1000_CTRL_SWDPIO0;
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+		break;
+	case e1000_media_type_copper:
+		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode1);
+		break;
+	default:
+		break;
+	}
+
+	return E1000_SUCCESS;
+}
+#endif
+
+/**
+ *  igb_set_pcie_no_snoop_generic - Set PCI-express capabilities
+ *  @hw: pointer to the HW structure
+ *  @no_snoop: bitmap of snoop events
+ *
+ *  Set the PCI-express register to snoop for events enabled in 'no_snoop'.
+ **/
+void igb_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop)
+{
+	u32 gcr;
+
+	DEBUGFUNC("igb_set_pcie_no_snoop_generic");
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	if (no_snoop) {
+		gcr = E1000_READ_REG(hw, E1000_GCR);
+		gcr &= ~(PCIE_NO_SNOOP_ALL);
+		gcr |= no_snoop;
+		E1000_WRITE_REG(hw, E1000_GCR, gcr);
+	}
+out:
+	return;
+}
+
+/**
+ *  igb_disable_pcie_master_generic - Disables PCI-express master access
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns 0 (E1000_SUCCESS) if successful, else returns -10
+ *  (-E1000_ERR_MASTER_REQUESTS_PENDING) if master disable bit has not caused
+ *  the master requests to be disabled.
+ *
+ *  Disables PCI-Express master access and verifies there are no pending
+ *  requests.
+ **/
+s32 igb_disable_pcie_master_generic(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 timeout = MASTER_DISABLE_TIMEOUT;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_disable_pcie_master_generic");
+
+	if (hw->bus.type != e1000_bus_type_pci_express)
+		goto out;
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_GIO_MASTER_DISABLE;
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	while (timeout) {
+		if (!(E1000_READ_REG(hw, E1000_STATUS) &
+		      E1000_STATUS_GIO_MASTER_ENABLE))
+			break;
+		usec_delay(100);
+		timeout--;
+	}
+
+	if (!timeout) {
+		DEBUGOUT("Master requests are pending.\n");
+		ret_val = -E1000_ERR_MASTER_REQUESTS_PENDING;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_reset_adaptive_generic - Reset Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the Adaptive Interframe Spacing throttle to default values.
+ **/
+void igb_reset_adaptive_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("igb_reset_adaptive_generic");
+
+	if (!mac->adaptive_ifs) {
+		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	mac->current_ifs_val = 0;
+	mac->ifs_min_val = IFS_MIN;
+	mac->ifs_max_val = IFS_MAX;
+	mac->ifs_step_size = IFS_STEP;
+	mac->ifs_ratio = IFS_RATIO;
+
+	mac->in_ifs_mode = false;
+	E1000_WRITE_REG(hw, E1000_AIT, 0);
+out:
+	return;
+}
+
+/**
+ *  igb_update_adaptive_generic - Update Adaptive Interframe Spacing
+ *  @hw: pointer to the HW structure
+ *
+ *  Update the Adaptive Interframe Spacing Throttle value based on the
+ *  time between transmitted packets and time between collisions.
+ **/
+void igb_update_adaptive_generic(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+
+	DEBUGFUNC("igb_update_adaptive_generic");
+
+	if (!mac->adaptive_ifs) {
+		DEBUGOUT("Not in Adaptive IFS mode!\n");
+		goto out;
+	}
+
+	if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
+		if (mac->tx_packet_delta > MIN_NUM_XMITS) {
+			mac->in_ifs_mode = true;
+			if (mac->current_ifs_val < mac->ifs_max_val) {
+				if (!mac->current_ifs_val)
+					mac->current_ifs_val = mac->ifs_min_val;
+				else
+					mac->current_ifs_val +=
+						mac->ifs_step_size;
+				E1000_WRITE_REG(hw, E1000_AIT, mac->current_ifs_val);
+			}
+		}
+	} else {
+		if (mac->in_ifs_mode &&
+		    (mac->tx_packet_delta <= MIN_NUM_XMITS)) {
+			mac->current_ifs_val = 0;
+			mac->in_ifs_mode = false;
+			E1000_WRITE_REG(hw, E1000_AIT, 0);
+		}
+	}
+out:
+	return;
+}
+
+/**
+ *  igb_validate_mdi_setting_generic - Verify MDI/MDIx settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify that when not using auto-negotiation that MDI/MDIx is correctly
+ *  set, which is forced to MDI mode only.
+ **/
+static s32 igb_validate_mdi_setting_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_validate_mdi_setting_generic");
+
+	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
+		DEBUGOUT("Invalid MDI setting detected\n");
+		hw->phy.mdix = 1;
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_8bit_ctrl_reg_generic - Write a 8bit CTRL register
+ *  @hw: pointer to the HW structure
+ *  @reg: 32bit register offset such as E1000_SCTL
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes an address/data control type register.  There are several of these
+ *  and they all have the format address << 8 | data and bit 31 is polled for
+ *  completion.
+ **/
+s32 igb_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
+                                      u32 offset, u8 data)
+{
+	u32 i, regvalue = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_write_8bit_ctrl_reg_generic");
+
+	/* Set up the address and data */
+	regvalue = ((u32)data) | (offset << E1000_GEN_CTL_ADDRESS_SHIFT);
+	E1000_WRITE_REG(hw, reg, regvalue);
+
+	/* Poll the ready bit to see if the MDI read completed */
+	for (i = 0; i < E1000_GEN_POLL_TIMEOUT; i++) {
+		usec_delay(5);
+		regvalue = E1000_READ_REG(hw, reg);
+		if (regvalue & E1000_GEN_CTL_READY)
+			break;
+	}
+	if (!(regvalue & E1000_GEN_CTL_READY)) {
+		DEBUGOUT1("Reg %08x did not indicate ready\n", reg);
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_mac.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_mac.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_mac.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_mac.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,82 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_MAC_H_
+#define _IGB_MAC_H_
+
+/*
+ * Functions that should not be called directly from drivers but can be used
+ * by other files in this 'shared code'
+ */
+void igb_init_mac_ops_generic(struct e1000_hw *hw);
+s32  igb_blink_led_generic(struct e1000_hw *hw);
+s32  igb_check_for_copper_link_generic(struct e1000_hw *hw);
+s32  igb_check_for_fiber_link_generic(struct e1000_hw *hw);
+s32  igb_check_for_serdes_link_generic(struct e1000_hw *hw);
+s32  igb_cleanup_led_generic(struct e1000_hw *hw);
+s32  igb_config_fc_after_link_up_generic(struct e1000_hw *hw);
+s32  igb_disable_pcie_master_generic(struct e1000_hw *hw);
+s32  igb_force_mac_fc_generic(struct e1000_hw *hw);
+s32  igb_get_auto_rd_done_generic(struct e1000_hw *hw);
+s32  igb_get_bus_info_pcie_generic(struct e1000_hw *hw);
+void igb_set_lan_id_single_port(struct e1000_hw *hw);
+s32  igb_get_hw_semaphore_generic(struct e1000_hw *hw);
+s32  igb_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
+                                               u16 *duplex);
+s32  igb_get_speed_and_duplex_fiber_serdes_generic(struct e1000_hw *hw,
+                                                     u16 *speed, u16 *duplex);
+s32  igb_id_led_init_generic(struct e1000_hw *hw);
+s32  igb_led_on_generic(struct e1000_hw *hw);
+s32  igb_led_off_generic(struct e1000_hw *hw);
+void igb_update_mc_addr_list_generic(struct e1000_hw *hw,
+	                               u8 *mc_addr_list, u32 mc_addr_count);
+s32  igb_set_fc_watermarks_generic(struct e1000_hw *hw);
+s32  igb_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
+s32  igb_setup_led_generic(struct e1000_hw *hw);
+s32  igb_setup_link_generic(struct e1000_hw *hw);
+s32  igb_write_8bit_ctrl_reg_generic(struct e1000_hw *hw, u32 reg,
+                                       u32 offset, u8 data);
+
+u32  igb_hash_mc_addr_generic(struct e1000_hw *hw, u8 *mc_addr);
+
+void igb_clear_hw_cntrs_base_generic(struct e1000_hw *hw);
+void igb_clear_vfta_generic(struct e1000_hw *hw);
+void igb_config_collision_dist_generic(struct e1000_hw *hw);
+void igb_init_rx_addrs_generic(struct e1000_hw *hw, u16 rar_count);
+void igb_mta_set_generic(struct e1000_hw *hw, u32 hash_value);
+void igb_pcix_mmrbc_workaround_generic(struct e1000_hw *hw);
+void igb_put_hw_semaphore_generic(struct e1000_hw *hw);
+void igb_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
+s32  igb_check_alt_mac_addr_generic(struct e1000_hw *hw);
+void igb_reset_adaptive_generic(struct e1000_hw *hw);
+void igb_set_pcie_no_snoop_generic(struct e1000_hw *hw, u32 no_snoop);
+void igb_update_adaptive_generic(struct e1000_hw *hw);
+void igb_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
+
+#endif /* _IGB_MAC_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_main.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_main.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_main.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1010 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  Portions Copyright(c) 2010 Marty Connor <mdc@etherboot.org>
+  Portions Copyright(c) 2010 Entity Cyber, Inc.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+/* Low-level support routines */
+
+/**
+ * igb_read_pcie_cap_reg - retrieve PCIe capability register contents
+ * @hw: address of board private structure
+ * @reg: PCIe capability register requested
+ * @value: where to store requested value
+ **/
+int32_t igb_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
+{
+    struct igb_adapter *adapter = hw->back;
+    uint16_t cap_offset;
+
+#define	 PCI_CAP_ID_EXP	       0x10    /* PCI Express */
+    cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
+    if (!cap_offset)
+	return -E1000_ERR_CONFIG;
+
+    pci_read_config_word(adapter->pdev, cap_offset + reg, value);
+
+    return E1000_SUCCESS;
+}
+
+/**
+ * igb_write_pcie_cap_reg - write value to PCIe capability register
+ * @hw: address of board private structure
+ * @reg: PCIe capability register to write to
+ * @value: value to store in given register
+ **/
+int32_t igb_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
+{
+	struct igb_adapter *adapter = hw->back;
+	u16 cap_offset;
+
+	cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
+	if (!cap_offset)
+		return -E1000_ERR_CONFIG;
+
+	pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ * igb_irq_disable - Mask off interrupt generation on the NIC
+ * @adapter: board private structure
+ **/
+static void igb_irq_disable(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	E1000_WRITE_REG(hw, E1000_IAM, 0);
+	E1000_WRITE_REG(hw, E1000_IMC, ~0);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ * igb_irq_enable - Enable default interrupt generation settings
+ * @adapter: board private structure
+ **/
+static void igb_irq_enable(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK);
+	E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/**
+ * igb_get_hw_control - get control of the h/w from f/w
+ * @adapter: address of board private structure
+ *
+ * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
+ * For ASF and Pass Through versions of f/w this means that
+ * the driver is loaded.
+ *
+ **/
+void igb_get_hw_control(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 ctrl_ext;
+
+	/* Let firmware know the driver has taken over */
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT,
+			ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
+}
+
+/**
+ * igb_reset - put adapter in known initial state
+ * @adapter: board private structure
+ **/
+void igb_reset(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_fc_info *fc = &hw->fc;
+	u32 pba = 0;
+	u16 hwm;
+
+	/* Repartition Pba for greater than 9k mtu
+	 * To take effect CTRL.RST is required.
+	 */
+	switch (mac->type) {
+	case e1000_82576:
+		pba = E1000_READ_REG(hw, E1000_RXPBS);
+		pba &= E1000_RXPBS_SIZE_MASK_82576;
+		break;
+	case e1000_82575:
+	default:
+		pba = E1000_PBA_34K;
+		break;
+	}
+
+	/* flow control settings */
+	/* The high water mark must be low enough to fit one full frame
+	 * (or the size used for early receive) above it in the Rx FIFO.
+	 * Set it to the lower of:
+	 * - 90% of the Rx FIFO size, or
+	 * - the full Rx FIFO size minus one full frame */
+#define min(a,b) (((a)<(b))?(a):(b))
+	hwm = min(((pba << 10) * 9 / 10),
+			((pba << 10) - 2 * adapter->max_frame_size));
+
+	if (mac->type < e1000_82576) {
+		fc->high_water = hwm & 0xFFF8;	/* 8-byte granularity */
+		fc->low_water = fc->high_water - 8;
+	} else {
+		fc->high_water = hwm & 0xFFF0;	/* 16-byte granularity */
+		fc->low_water = fc->high_water - 16;
+	}
+	fc->pause_time = 0xFFFF;
+	fc->send_xon = 1;
+	fc->current_mode = fc->requested_mode;
+
+	/* Allow time for pending master requests to run */
+	igb_reset_hw(hw);
+	E1000_WRITE_REG(hw, E1000_WUC, 0);
+
+	if (igb_init_hw(hw)) {
+		DBG ("Hardware Error\n");
+        }
+
+	igb_get_phy_info(hw);
+}
+
+/**
+ * igb_sw_init - Initialize general software structures (struct igb_adapter)
+ * @adapter: board private structure to initialize
+ **/
+int igb_sw_init(struct igb_adapter *adapter)
+{
+	struct e1000_hw *hw = &adapter->hw;
+	struct pci_device *pdev = adapter->pdev;
+
+	/* PCI config space info */
+
+	hw->vendor_id = pdev->vendor;
+	hw->device_id = pdev->device;
+
+	pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
+
+	pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
+
+	adapter->max_frame_size = MAXIMUM_ETHERNET_VLAN_SIZE + ETH_HLEN + ETH_FCS_LEN;
+	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
+
+	/* Initialize the hardware-specific values */
+	if (igb_setup_init_funcs(hw, TRUE)) {
+		DBG ("Hardware Initialization Failure\n");
+		return -EIO;
+	}
+
+	/* Explicitly disable IRQ since the NIC can be in any state. */
+	igb_irq_disable(adapter);
+
+	return 0;
+}
+
+/* TX support routines */
+
+/**
+ * igb_setup_tx_resources - allocate Tx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int igb_setup_tx_resources ( struct igb_adapter *adapter )
+{
+	DBG ( "igb_setup_tx_resources\n" );
+
+	/* Allocate transmit descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata #23
+	   so we use malloc_dma() requesting a 128 byte block that is
+	   128 byte aligned. This should guarantee that the memory
+	   allocated will not cross a 64K boundary, because 128 is an
+	   even multiple of 65536 ( 65536 / 128 == 512 ), so all possible
+	   allocations of 128 bytes on a 128 byte boundary will not
+	   cross 64K bytes.
+	 */
+
+	adapter->tx_base =
+		malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
+
+	if ( ! adapter->tx_base ) {
+		return -ENOMEM;
+	}
+
+	memset ( adapter->tx_base, 0, adapter->tx_ring_size );
+
+	DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
+
+	return 0;
+}
+
+/**
+ * igb_process_tx_packets - process transmitted packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void igb_process_tx_packets ( struct net_device *netdev )
+{
+	struct igb_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t tx_status;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	/* Check status of transmitted packets
+	 */
+	DBG ( "process_tx_packets: tx_head = %d, tx_tail = %d\n", adapter->tx_head,
+	      adapter->tx_tail );
+
+	while ( ( i = adapter->tx_head ) != adapter->tx_tail ) {
+
+		tx_curr_desc = ( void * )  ( adapter->tx_base ) +
+					   ( i * sizeof ( *adapter->tx_base ) );
+
+		tx_status = tx_curr_desc->upper.data;
+
+		DBG ( "	 tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+		DBG ( "	 tx_status = %#08x\n", tx_status );
+
+		/* if the packet at tx_head is not owned by hardware it is for us */
+		if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
+			break;
+
+		DBG ( "Sent packet. tx_head: %d tx_tail: %d tx_status: %#08x\n",
+		      adapter->tx_head, adapter->tx_tail, tx_status );
+
+		if ( tx_status & ( E1000_TXD_STAT_EC | E1000_TXD_STAT_LC |
+				   E1000_TXD_STAT_TU ) ) {
+			netdev_tx_complete_err ( netdev, adapter->tx_iobuf[i], -EINVAL );
+			DBG ( "Error transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		} else {
+			netdev_tx_complete ( netdev, adapter->tx_iobuf[i] );
+			DBG ( "Success transmitting packet, tx_status: %#08x\n",
+			      tx_status );
+		}
+
+		/* Decrement count of used descriptors, clear this descriptor
+		 */
+		adapter->tx_fill_ctr--;
+		memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
+
+		adapter->tx_head = ( adapter->tx_head + 1 ) % NUM_TX_DESC;
+	}
+}
+
+static void igb_free_tx_resources ( struct igb_adapter *adapter )
+{
+	DBG ( "igb_free_tx_resources\n" );
+
+	free_dma ( adapter->tx_base, adapter->tx_ring_size );
+}
+
+/**
+ * igb_configure_tx - Configure 8254x Transmit Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Tx unit of the MAC after a reset.
+ **/
+static void igb_configure_tx ( struct igb_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	u32 tctl, txdctl;
+
+	DBG ( "igb_configure_tx\n" );
+
+	/* disable transmits while setting up the descriptors */
+	tctl = E1000_READ_REG ( hw, E1000_TCTL );
+	E1000_WRITE_REG ( hw, E1000_TCTL, tctl & ~E1000_TCTL_EN );
+	E1000_WRITE_FLUSH(hw);
+	mdelay(10);
+
+	E1000_WRITE_REG ( hw, E1000_TDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDBAL(0), virt_to_bus ( adapter->tx_base ) );
+	E1000_WRITE_REG ( hw, E1000_TDLEN(0), adapter->tx_ring_size );
+
+	DBG ( "E1000_TDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_TDBAL(0) ) );
+	DBG ( "E1000_TDLEN(0): %d\n",	  E1000_READ_REG ( hw, E1000_TDLEN(0) ) );
+
+	/* Setup the HW Tx Head and Tail descriptor pointers */
+	E1000_WRITE_REG ( hw, E1000_TDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_TDT(0), 0 );
+
+	adapter->tx_head = 0;
+	adapter->tx_tail = 0;
+	adapter->tx_fill_ctr = 0;
+
+	txdctl = E1000_READ_REG ( hw, E1000_TXDCTL(0) );
+	txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
+	E1000_WRITE_REG ( hw, E1000_TXDCTL(0), txdctl );
+
+	/* Setup Transmit Descriptor Settings for eop descriptor */
+	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
+
+	/* enable Report Status bit */
+	adapter->txd_cmd |= E1000_TXD_CMD_RS;
+
+	/* Program the Transmit Control Register */
+	tctl &= ~E1000_TCTL_CT;
+	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
+		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
+
+	igb_config_collision_dist(hw);
+
+	/* Enable transmits */
+	tctl |= E1000_TCTL_EN;
+	E1000_WRITE_REG(hw, E1000_TCTL, tctl);
+	E1000_WRITE_FLUSH(hw);
+}
+
+/* RX support routines */
+
+static void igb_free_rx_resources ( struct igb_adapter *adapter )
+{
+	int i;
+
+	DBG ( "igb_free_rx_resources\n" );
+
+	free_dma ( adapter->rx_base, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		free_iob ( adapter->rx_iobuf[i] );
+	}
+}
+
+/**
+ * igb_refill_rx_ring - allocate Rx io_buffers
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int igb_refill_rx_ring ( struct igb_adapter *adapter )
+{
+	int i, rx_curr;
+	int rc = 0;
+	struct e1000_rx_desc *rx_curr_desc;
+	struct e1000_hw *hw = &adapter->hw;
+	struct io_buffer *iob;
+
+	DBGP ("igb_refill_rx_ring\n");
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		rx_curr = ( ( adapter->rx_curr + i ) % NUM_RX_DESC );
+		rx_curr_desc = adapter->rx_base + rx_curr;
+
+		if ( rx_curr_desc->status & E1000_RXD_STAT_DD )
+			continue;
+
+		if ( adapter->rx_iobuf[rx_curr] != NULL )
+			continue;
+
+		DBG2 ( "Refilling rx desc %d\n", rx_curr );
+
+		iob = alloc_iob ( MAXIMUM_ETHERNET_VLAN_SIZE );
+		adapter->rx_iobuf[rx_curr] = iob;
+
+		if ( ! iob ) {
+			DBG ( "alloc_iob failed\n" );
+			rc = -ENOMEM;
+			break;
+		} else {
+			rx_curr_desc->buffer_addr = virt_to_bus ( iob->data );
+
+			E1000_WRITE_REG ( hw, E1000_RDT(0), rx_curr );
+		}
+	}
+	return rc;
+}
+
+/**
+ * igb_setup_rx_resources - allocate Rx resources (Descriptors)
+ *
+ * @v adapter	e1000 private structure
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ **/
+static int igb_setup_rx_resources ( struct igb_adapter *adapter )
+{
+	int i, rc = 0;
+
+	DBGP ( "igb_setup_rx_resources\n" );
+
+	/* Allocate receive descriptor ring memory.
+	   It must not cross a 64K boundary because of hardware errata
+	 */
+
+	adapter->rx_base =
+		malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
+
+	if ( ! adapter->rx_base ) {
+		return -ENOMEM;
+	}
+	memset ( adapter->rx_base, 0, adapter->rx_ring_size );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		/* let igb_refill_rx_ring() io_buffer allocations */
+		adapter->rx_iobuf[i] = NULL;
+	}
+
+	/* allocate io_buffers */
+	rc = igb_refill_rx_ring ( adapter );
+	if ( rc < 0 )
+		igb_free_rx_resources ( adapter );
+
+	return rc;
+}
+
+/**
+ * igb_configure_rx - Configure 8254x Receive Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Rx unit of the MAC after a reset.
+ **/
+static void igb_configure_rx ( struct igb_adapter *adapter )
+{
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl, rxdctl, rxcsum, mrqc;
+
+	DBGP ( "igb_configure_rx\n" );
+
+	/* disable receives while setting up the descriptors */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	E1000_WRITE_FLUSH(hw);
+	mdelay(10);
+
+	adapter->rx_curr = 0;
+
+	/* Setup the HW Rx Head and Tail Descriptor Pointers and
+	 * the Base and Length of the Rx Descriptor Ring */
+
+	E1000_WRITE_REG ( hw, E1000_RDBAL(0), virt_to_bus ( adapter->rx_base ) );
+	E1000_WRITE_REG ( hw, E1000_RDBAH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDLEN(0), adapter->rx_ring_size );
+
+	E1000_WRITE_REG ( hw, E1000_RDH(0), 0 );
+	E1000_WRITE_REG ( hw, E1000_RDT(0), 0 );
+
+	DBG ( "E1000_RDBAL(0): %#08x\n",  E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
+	DBG ( "E1000_RDLEN(0): %d\n",	  E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
+	DBG ( "E1000_RCTL:  %#08x\n",	  E1000_READ_REG ( hw, E1000_RCTL ) );
+
+	rxdctl = E1000_READ_REG ( hw, E1000_RXDCTL(0) );
+	rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
+	rxdctl &= 0xFFF00000;
+	rxdctl |= IGB_RX_PTHRESH;
+	rxdctl |= IGB_RX_HTHRESH << 8;
+	rxdctl |= IGB_RX_WTHRESH << 16;
+	E1000_WRITE_REG ( hw, E1000_RXDCTL(0), rxdctl );
+	E1000_WRITE_FLUSH ( hw );
+
+	rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
+	rxcsum &= ~( E1000_RXCSUM_TUOFL | E1000_RXCSUM_IPPCSE );
+	E1000_WRITE_REG ( hw, E1000_RXCSUM, 0 );
+
+	/* The initial value for MRQC disables multiple receive
+	 * queues, however this setting is not recommended.
+	 * - Intel® 82576 Gigabit Ethernet Controller Datasheet r2.41
+	 *   Section 8.10.9 Multiple Queues Command Register - MRQC
+	 */
+	mrqc = E1000_MRQC_ENABLE_VMDQ;
+	E1000_WRITE_REG ( hw, E1000_MRQC, mrqc );
+
+	/* Turn off loopback modes */
+	rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
+
+	/* set maximum packet size */
+	rctl |=	 E1000_RCTL_SZ_2048;
+
+	/* Broadcast enable, multicast promisc, unicast promisc */
+	rctl |=	 E1000_RCTL_BAM | E1000_RCTL_MPE | E1000_RCTL_UPE;
+
+	/* Store bad packets */
+	rctl |=	 E1000_RCTL_SBP;
+
+	/* enable LPE to prevent packets larger than max_frame_size */
+	rctl |= E1000_RCTL_LPE;
+
+	/* enable stripping of CRC. */
+	rctl |= E1000_RCTL_SECRC;
+
+	/* enable receive control register */
+	rctl |= E1000_RCTL_EN;
+	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+	E1000_WRITE_FLUSH(hw);
+
+	/* On the 82576, RDT([0]) must not be "bumped" before
+	 * the enable bit of RXDCTL([0]) is set.
+	 * - Intel® 82576 Gigabit Ethernet Controller Datasheet r2.41
+	 *   Section 4.5.9 receive Initialization
+	 *
+	 * By observation I have found this to occur when the enable bit of
+	 * RCTL is set. The datasheet recommends polling for this bit,
+	 * however as I see no evidence of this in the Linux igb driver
+	 * I have omitted that step.
+	 * - Simon Horman, May 2009
+	 */
+	E1000_WRITE_REG ( hw, E1000_RDT(0), NUM_RX_DESC - 1 );
+
+	DBG ( "RDBAH: %#08x\n",	 E1000_READ_REG ( hw, E1000_RDBAH(0) ) );
+	DBG ( "RDBAL: %#08x\n",	 E1000_READ_REG ( hw, E1000_RDBAL(0) ) );
+	DBG ( "RDLEN: %d\n",	 E1000_READ_REG ( hw, E1000_RDLEN(0) ) );
+	DBG ( "RCTL:  %#08x\n",	 E1000_READ_REG ( hw, E1000_RCTL ) );
+}
+
+/**
+ * igb_process_rx_packets - process received packets
+ *
+ * @v netdev	network interface device structure
+ **/
+static void igb_process_rx_packets ( struct net_device *netdev )
+{
+	struct igb_adapter *adapter = netdev_priv ( netdev );
+	uint32_t i;
+	uint32_t rx_status;
+	uint32_t rx_len;
+	uint32_t rx_err;
+	struct e1000_rx_desc *rx_curr_desc;
+
+	DBGP ( "igb_process_rx_packets\n" );
+
+	/* Process received packets
+	 */
+	while ( 1 ) {
+
+		i = adapter->rx_curr;
+
+		rx_curr_desc = ( void * )  ( adapter->rx_base ) +
+				  ( i * sizeof ( *adapter->rx_base ) );
+		rx_status = rx_curr_desc->status;
+
+		DBG2 ( "Before DD Check RX_status: %#08x\n", rx_status );
+
+		if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
+			break;
+
+		if ( adapter->rx_iobuf[i] == NULL )
+			break;
+
+		DBG ( "E1000_RCTL = %#08x\n", E1000_READ_REG ( &adapter->hw, E1000_RCTL ) );
+
+		rx_len = rx_curr_desc->length;
+
+		DBG ( "Received packet, rx_curr: %d  rx_status: %#08x  rx_len: %d\n",
+		      i, rx_status, rx_len );
+
+		rx_err = rx_curr_desc->errors;
+
+		iob_put ( adapter->rx_iobuf[i], rx_len );
+
+		if ( rx_err & E1000_RXD_ERR_FRAME_ERR_MASK ) {
+
+			netdev_rx_err ( netdev, adapter->rx_iobuf[i], -EINVAL );
+			DBG ( "igb_process_rx_packets: Corrupted packet received!"
+			      " rx_err: %#08x\n", rx_err );
+		} else	{
+			/* Add this packet to the receive queue. */
+			netdev_rx ( netdev, adapter->rx_iobuf[i] );
+		}
+		adapter->rx_iobuf[i] = NULL;
+
+		memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
+
+		adapter->rx_curr = ( adapter->rx_curr + 1 ) % NUM_RX_DESC;
+	}
+}
+
+/** Functions that implement the iPXE driver API **/
+
+/**
+ * igb_close - Disables a network interface
+ *
+ * @v netdev	network interface device structure
+ *
+ **/
+static void igb_close ( struct net_device *netdev )
+{
+	struct igb_adapter *adapter = netdev_priv ( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t rctl;
+
+	DBGP ( "igb_close\n" );
+
+	/* Disable and acknowledge interrupts */
+	igb_irq_disable ( adapter );
+	E1000_READ_REG ( hw, E1000_ICR );
+
+	/* disable receives */
+	rctl = E1000_READ_REG ( hw, E1000_RCTL );
+	E1000_WRITE_REG ( hw, E1000_RCTL, rctl & ~E1000_RCTL_EN );
+	E1000_WRITE_FLUSH(hw);
+
+	igb_reset ( adapter );
+
+	igb_free_tx_resources ( adapter );
+	igb_free_rx_resources ( adapter );
+}
+
+/**
+ * igb_transmit - Transmit a packet
+ *
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ *
+ * @ret rc	 Returns 0 on success, negative on failure
+ */
+static int igb_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
+{
+	struct igb_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+	uint32_t tx_curr = adapter->tx_tail;
+	struct e1000_tx_desc *tx_curr_desc;
+
+	DBGP ("igb_transmit\n");
+
+	if ( adapter->tx_fill_ctr == NUM_TX_DESC ) {
+		DBG ("TX overflow\n");
+		return -ENOBUFS;
+	}
+
+	/* Save pointer to iobuf we have been given to transmit,
+	   netdev_tx_complete() will need it later
+	 */
+	adapter->tx_iobuf[tx_curr] = iobuf;
+
+	tx_curr_desc = ( void * ) ( adapter->tx_base ) +
+		       ( tx_curr * sizeof ( *adapter->tx_base ) );
+
+	DBG ( "tx_curr_desc = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+	DBG ( "tx_curr_desc + 16 = %#08lx\n", virt_to_bus ( tx_curr_desc ) + 16 );
+	DBG ( "iobuf->data = %#08lx\n", virt_to_bus ( iobuf->data ) );
+
+	/* Add the packet to TX ring
+	 */
+	tx_curr_desc->buffer_addr = virt_to_bus ( iobuf->data );
+	tx_curr_desc->upper.data = 0;
+	tx_curr_desc->lower.data = adapter->txd_cmd | iob_len ( iobuf );
+
+	DBG ( "TX fill: %d tx_curr: %d addr: %#08lx len: %zd\n", adapter->tx_fill_ctr,
+	      tx_curr, virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
+
+	/* Point to next free descriptor */
+	adapter->tx_tail = ( adapter->tx_tail + 1 ) % NUM_TX_DESC;
+	adapter->tx_fill_ctr++;
+
+	/* Write new tail to NIC, making packet available for transmit
+	 */
+	E1000_WRITE_REG ( hw, E1000_TDT(0), adapter->tx_tail );
+	E1000_WRITE_FLUSH(hw);
+
+	return 0;
+}
+
+/**
+ * igb_poll - Poll for received packets
+ *
+ * @v netdev	Network device
+ */
+static void igb_poll ( struct net_device *netdev )
+{
+	struct igb_adapter *adapter = netdev_priv( netdev );
+	struct e1000_hw *hw = &adapter->hw;
+
+	uint32_t icr;
+
+	DBGP ( "igb_poll\n" );
+
+	/* Acknowledge interrupts */
+	icr = E1000_READ_REG ( hw, E1000_ICR );
+	if ( ! icr )
+		return;
+
+	DBG ( "igb_poll: intr_status = %#08x\n", icr );
+
+	igb_process_tx_packets ( netdev );
+
+	igb_process_rx_packets ( netdev );
+
+	igb_refill_rx_ring(adapter);
+}
+
+/**
+ * igb_irq - enable or Disable interrupts
+ *
+ * @v adapter	e1000 adapter
+ * @v action	requested interrupt action
+ **/
+static void igb_irq ( struct net_device *netdev, int enable )
+{
+	struct igb_adapter *adapter = netdev_priv ( netdev );
+
+	DBGP ( "igb_irq\n" );
+
+	if ( enable ) {
+		igb_irq_enable ( adapter );
+	} else {
+		igb_irq_disable ( adapter );
+	}
+}
+
+static struct net_device_operations igb_operations;
+
+/**
+ * igb_probe - Initial configuration of NIC
+ *
+ * @v pci	PCI device
+ * @v id	PCI IDs
+ *
+ * @ret rc	Return status code
+ **/
+int igb_probe ( struct pci_device *pdev )
+{
+	int i, err;
+	struct net_device *netdev;
+	struct igb_adapter *adapter;
+	unsigned long mmio_start, mmio_len;
+	struct e1000_hw *hw;
+
+	DBGP ( "igb_probe\n" );
+
+	err = -ENOMEM;
+
+	/* Allocate net device ( also allocates memory for netdev->priv
+	   and makes netdev-priv point to it ) */
+	netdev = alloc_etherdev ( sizeof ( struct igb_adapter ) );
+	if ( ! netdev ) {
+		DBG ( "err_alloc_etherdev\n" );
+		goto err_alloc_etherdev;
+	}
+
+	/* Associate igb-specific network operations operations with
+	 * generic network device layer */
+	netdev_init ( netdev, &igb_operations );
+
+	/* Associate this network device with given PCI device */
+	pci_set_drvdata ( pdev, netdev );
+	netdev->dev = &pdev->dev;
+
+	/* Initialize driver private storage */
+	adapter = netdev_priv ( netdev );
+	memset ( adapter, 0, ( sizeof ( *adapter ) ) );
+
+	adapter->pdev	    = pdev;
+
+	adapter->ioaddr	    = pdev->ioaddr;
+	adapter->hw.io_base = pdev->ioaddr;
+
+	hw		    = &adapter->hw;
+	hw->vendor_id	    = pdev->vendor;
+	hw->device_id	    = pdev->device;
+
+	adapter->irqno	    = pdev->irq;
+	adapter->netdev	    = netdev;
+	adapter->hw.back    = adapter;
+
+	adapter->min_frame_size	   = ETH_ZLEN + ETH_FCS_LEN;
+	adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN;
+
+	adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
+	adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
+
+	/* Fix up PCI device */
+	adjust_pci_device ( pdev );
+
+	err = -EIO;
+
+	mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
+	mmio_len   = pci_bar_size  ( pdev, PCI_BASE_ADDRESS_0 );
+
+	DBG ( "mmio_start: %#08lx\n", mmio_start );
+	DBG ( "mmio_len: %#08lx\n", mmio_len );
+
+	adapter->hw.hw_addr = ioremap ( mmio_start, mmio_len );
+	DBG ( "adapter->hw.hw_addr: %p\n", adapter->hw.hw_addr );
+
+	if ( ! adapter->hw.hw_addr ) {
+		DBG ( "err_ioremap\n" );
+		goto err_ioremap;
+	}
+
+	/* setup adapter struct */
+	err = igb_sw_init ( adapter );
+	if (err) {
+		DBG ( "err_sw_init\n" );
+		goto err_sw_init;
+	}
+
+	igb_get_bus_info(hw);
+
+	/* Copper options */
+	if (adapter->hw.phy.media_type == e1000_media_type_copper) {
+		adapter->hw.phy.mdix = AUTO_ALL_MODES;
+		adapter->hw.phy.disable_polarity_correction = 0;
+		adapter->hw.phy.ms_type = e1000_ms_hw_default;
+	}
+
+	DBG ( "adapter->hw.mac.type: %#08x\n", adapter->hw.mac.type );
+
+	/* Force auto-negotiation */
+	adapter->hw.mac.autoneg = 1;
+	adapter->fc_autoneg = 1;
+	adapter->hw.phy.autoneg_wait_to_complete = true;
+	adapter->hw.mac.adaptive_ifs = true;
+	adapter->hw.fc.requested_mode = e1000_fc_default;
+	adapter->hw.fc.current_mode = e1000_fc_default;
+
+	igb_validate_mdi_setting(hw);
+
+	/*
+	 * before reading the NVM, reset the controller to
+	 * put the device in a known good starting state
+	 */
+	igb_reset_hw(hw);
+
+	/*
+	 * systems with ASPM and others may see the checksum fail on the first
+	 * attempt. Let's give it a few tries
+	 */
+	for (i = 0;; i++) {
+		if (igb_validate_nvm_checksum(&adapter->hw) >= 0)
+			break;
+		if (i == 2) {
+			err = -EIO;
+			DBG ( "The NVM Checksum Is Not Valid\n" );
+			DBG ( "err_eeprom\n" );
+			goto err_eeprom;
+		}
+	}
+
+	/* copy the MAC address out of the EEPROM */
+	if ( igb_read_mac_addr ( &adapter->hw ) ) {
+		DBG ( "EEPROM Read Error\n" );
+	}
+
+	memcpy ( netdev->hw_addr, adapter->hw.mac.perm_addr, ETH_ALEN );
+
+	/* reset the hardware with the new settings */
+	igb_reset ( adapter );
+
+	/* let the f/w know that the h/w is now under the control of the
+	 * driver. */
+	igb_get_hw_control(adapter);
+
+	if ( ( err = register_netdev ( netdev ) ) != 0) {
+		DBG ( "err_register\n" );
+		goto err_register;
+	}
+
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
+
+	for (i = 0; i < 6; i++) {
+		DBG ("%02x%s", netdev->ll_addr[i], i == 5 ? "\n" : ":");
+        }
+
+	DBG ( "igb_probe succeeded!\n" );
+
+	/* No errors, return success */
+	return 0;
+
+/* Error return paths */
+err_register:
+err_eeprom:
+err_sw_init:
+	iounmap ( adapter->hw.hw_addr );
+err_ioremap:
+	netdev_put ( netdev );
+err_alloc_etherdev:
+	return err;
+}
+
+/**
+ * igb_remove - Device Removal Routine
+ *
+ * @v pdev PCI device information struct
+ *
+ **/
+void igb_remove ( struct pci_device *pdev )
+{
+	struct net_device *netdev = pci_get_drvdata ( pdev );
+	struct igb_adapter *adapter = netdev_priv ( netdev );
+
+	DBGP ( "igb_remove\n" );
+
+	if ( adapter->hw.flash_address )
+		iounmap ( adapter->hw.flash_address );
+	if  ( adapter->hw.hw_addr )
+		iounmap ( adapter->hw.hw_addr );
+
+	unregister_netdev ( netdev );
+	igb_reset  ( adapter );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+}
+
+/**
+ * igb_open - Called when a network interface is made active
+ *
+ * @v netdev	network interface device structure
+ * @ret rc	Return status code, 0 on success, negative value on failure
+ *
+ **/
+static int igb_open ( struct net_device *netdev )
+{
+	struct igb_adapter *adapter = netdev_priv(netdev);
+	int err;
+
+	DBGP ( "igb_open\n" );
+
+	/* allocate transmit descriptors */
+	err = igb_setup_tx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up TX resources!\n" );
+		goto err_setup_tx;
+	}
+
+	/* allocate receive descriptors */
+	err = igb_setup_rx_resources ( adapter );
+	if ( err ) {
+		DBG ( "Error setting up RX resources!\n" );
+		goto err_setup_rx;
+	}
+
+	igb_configure_tx ( adapter );
+
+	igb_configure_rx ( adapter );
+
+	DBG ( "E1000_RXDCTL(0): %#08x\n",  E1000_READ_REG ( &adapter->hw, E1000_RXDCTL(0) ) );
+
+	return 0;
+
+err_setup_rx:
+	DBG ( "err_setup_rx\n" );
+	igb_free_tx_resources ( adapter );
+err_setup_tx:
+	DBG ( "err_setup_tx\n" );
+	igb_reset ( adapter );
+
+	return err;
+}
+
+/** igb net device operations */
+static struct net_device_operations igb_operations = {
+	.open		= igb_open,
+	.close		= igb_close,
+	.transmit	= igb_transmit,
+	.poll		= igb_poll,
+	.irq		= igb_irq,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_manage.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_manage.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_manage.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_manage.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,388 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+#if 0
+
+static u8 e1000_calculate_checksum(u8 *buffer, u32 length);
+
+/**
+ *  e1000_calculate_checksum - Calculate checksum for buffer
+ *  @buffer: pointer to EEPROM
+ *  @length: size of EEPROM to calculate a checksum for
+ *
+ *  Calculates the checksum for some buffer on a specified length.  The
+ *  checksum calculated is returned.
+ **/
+static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
+{
+	u32 i;
+	u8  sum = 0;
+
+	DEBUGFUNC("igb_calculate_checksum");
+
+	if (!buffer)
+		return 0;
+
+	for (i = 0; i < length; i++)
+		sum += buffer[i];
+
+	return (u8) (0 - sum);
+}
+
+/**
+ *  e1000_mng_enable_host_if_generic - Checks host interface is enabled
+ *  @hw: pointer to the HW structure
+ *
+ *  Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
+ *
+ *  This function checks whether the HOST IF is enabled for command operation
+ *  and also checks whether the previous command is completed.  It busy waits
+ *  in case of previous command is not completed.
+ **/
+s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
+{
+	u32 hicr;
+	s32 ret_val = E1000_SUCCESS;
+	u8  i;
+
+	DEBUGFUNC("igb_mng_enable_host_if_generic");
+
+	/* Check that the host interface is enabled. */
+	hicr = E1000_READ_REG(hw, E1000_HICR);
+	if ((hicr & E1000_HICR_EN) == 0) {
+		DEBUGOUT("E1000_HOST_EN bit disabled.\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+	/* check the previous command is completed */
+	for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
+		hicr = E1000_READ_REG(hw, E1000_HICR);
+		if (!(hicr & E1000_HICR_C))
+			break;
+		msec_delay_irq(1);
+	}
+
+	if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
+		DEBUGOUT("Previous command timeout failed .\n");
+		ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_check_mng_mode_generic - Generic check management mode
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the firmware semaphore register and returns true (>0) if
+ *  manageability is enabled, else false (0).
+ **/
+bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
+{
+	u32 fwsm;
+
+	DEBUGFUNC("igb_check_mng_mode_generic");
+
+	fwsm = E1000_READ_REG(hw, E1000_FWSM);
+
+	return (fwsm & E1000_FWSM_MODE_MASK) ==
+	        (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
+}
+
+/**
+ *  e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on TX
+ *  @hw: pointer to the HW structure
+ *
+ *  Enables packet filtering on transmit packets if manageability is enabled
+ *  and host interface is enabled.
+ **/
+bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
+{
+	struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
+	u32 *buffer = (u32 *)&hw->mng_cookie;
+	u32 offset;
+	s32 ret_val, hdr_csum, csum;
+	u8 i, len;
+	bool tx_filter = true;
+
+	DEBUGFUNC("igb_enable_tx_pkt_filtering_generic");
+
+	/* No manageability, no filtering */
+	if (!hw->mac.ops.check_mng_mode(hw)) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/*
+	 * If we can't read from the host interface for whatever
+	 * reason, disable filtering.
+	 */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val != E1000_SUCCESS) {
+		tx_filter = false;
+		goto out;
+	}
+
+	/* Read in the header.  Length and offset are in dwords. */
+	len    = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
+	offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
+	for (i = 0; i < len; i++) {
+		*(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
+		                                           E1000_HOST_IF,
+		                                           offset + i);
+	}
+	hdr_csum = hdr->checksum;
+	hdr->checksum = 0;
+	csum = e1000_calculate_checksum((u8 *)hdr,
+	                                E1000_MNG_DHCP_COOKIE_LENGTH);
+	/*
+	 * If either the checksums or signature don't match, then
+	 * the cookie area isn't considered valid, in which case we
+	 * take the safe route of assuming Tx filtering is enabled.
+	 */
+	if (hdr_csum != csum)
+		goto out;
+	if (hdr->signature != E1000_IAMT_SIGNATURE)
+		goto out;
+
+	/* Cookie area is valid, make the final check for filtering. */
+	if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
+		tx_filter = false;
+
+out:
+	hw->mac.tx_pkt_filtering = tx_filter;
+	return tx_filter;
+}
+
+/**
+ *  e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface
+ *  @length: size of the buffer
+ *
+ *  Writes the DHCP information to the host interface.
+ **/
+s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
+                                      u16 length)
+{
+	struct e1000_host_mng_command_header hdr;
+	s32 ret_val;
+	u32 hicr;
+
+	DEBUGFUNC("igb_mng_write_dhcp_info_generic");
+
+	hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
+	hdr.command_length = length;
+	hdr.reserved1 = 0;
+	hdr.reserved2 = 0;
+	hdr.checksum = 0;
+
+	/* Enable the host interface */
+	ret_val = hw->mac.ops.mng_enable_host_if(hw);
+	if (ret_val)
+		goto out;
+
+	/* Populate the host interface with the contents of "buffer". */
+	ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
+	                                  sizeof(hdr), &(hdr.checksum));
+	if (ret_val)
+		goto out;
+
+	/* Write the manageability command header */
+	ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
+	if (ret_val)
+		goto out;
+
+	/* Tell the ARC a new command is pending. */
+	hicr = E1000_READ_REG(hw, E1000_HICR);
+	E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_mng_write_cmd_header_generic - Writes manageability command header
+ *  @hw: pointer to the HW structure
+ *  @hdr: pointer to the host interface command header
+ *
+ *  Writes the command header after does the checksum calculation.
+ **/
+s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr)
+{
+	u16 i, length = sizeof(struct e1000_host_mng_command_header);
+
+	DEBUGFUNC("igb_mng_write_cmd_header_generic");
+
+	/* Write the whole command header structure with new checksum. */
+
+	hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
+
+	length >>= 2;
+	/* Write the relevant command block into the ram area. */
+	for (i = 0; i < length; i++) {
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
+		                            *((u32 *) hdr + i));
+		E1000_WRITE_FLUSH(hw);
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_mng_host_if_write_generic - Write to the manageability host interface
+ *  @hw: pointer to the HW structure
+ *  @buffer: pointer to the host interface buffer
+ *  @length: size of the buffer
+ *  @offset: location in the buffer to write to
+ *  @sum: sum of the data (not checksum)
+ *
+ *  This function writes the buffer content at the offset given on the host if.
+ *  It also does alignment considerations to do the writes in most efficient
+ *  way.  Also fills up the sum of the buffer in *buffer parameter.
+ **/
+s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                    u16 length, u16 offset, u8 *sum)
+{
+	u8 *tmp;
+	u8 *bufptr = buffer;
+	u32 data = 0;
+	s32 ret_val = E1000_SUCCESS;
+	u16 remaining, i, j, prev_bytes;
+
+	DEBUGFUNC("igb_mng_host_if_write_generic");
+
+	/* sum = only sum of the data and it is not checksum */
+
+	if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
+		ret_val = -E1000_ERR_PARAM;
+		goto out;
+	}
+
+	tmp = (u8 *)&data;
+	prev_bytes = offset & 0x3;
+	offset >>= 2;
+
+	if (prev_bytes) {
+		data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
+		for (j = prev_bytes; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
+		length -= j - prev_bytes;
+		offset++;
+	}
+
+	remaining = length & 0x3;
+	length -= remaining;
+
+	/* Calculate length in DWORDs */
+	length >>= 2;
+
+	/*
+	 * The device driver writes the relevant command block into the
+	 * ram area.
+	 */
+	for (i = 0; i < length; i++) {
+		for (j = 0; j < sizeof(u32); j++) {
+			*(tmp + j) = *bufptr++;
+			*sum += *(tmp + j);
+		}
+
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
+		                            data);
+	}
+	if (remaining) {
+		for (j = 0; j < sizeof(u32); j++) {
+			if (j < remaining)
+				*(tmp + j) = *bufptr++;
+			else
+				*(tmp + j) = 0;
+
+			*sum += *(tmp + j);
+		}
+		E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_enable_mng_pass_thru - Enable processing of ARP's
+ *  @hw: pointer to the HW structure
+ *
+ *  Verifies the hardware needs to allow ARPs to be processed by the host.
+ **/
+bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
+{
+	u32 manc;
+	u32 fwsm, factps;
+	bool ret_val = false;
+
+	DEBUGFUNC("igb_enable_mng_pass_thru");
+
+	if (!hw->mac.asf_firmware_present)
+		goto out;
+
+	manc = E1000_READ_REG(hw, E1000_MANC);
+
+	if (!(manc & E1000_MANC_RCV_TCO_EN) ||
+	    !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
+		goto out;
+
+	if (hw->mac.arc_subsystem_valid) {
+		fwsm = E1000_READ_REG(hw, E1000_FWSM);
+		factps = E1000_READ_REG(hw, E1000_FACTPS);
+
+		if (!(factps & E1000_FACTPS_MNGCG) &&
+		    ((fwsm & E1000_FWSM_MODE_MASK) ==
+		     (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
+			ret_val = true;
+			goto out;
+		}
+	} else {
+		if ((manc & E1000_MANC_SMBUS_EN) &&
+		    !(manc & E1000_MANC_ASF_EN)) {
+			ret_val = true;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_manage.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_manage.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_manage.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_manage.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,83 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_MANAGE_H_
+#define _IGB_MANAGE_H_
+
+bool e1000_check_mng_mode_generic(struct e1000_hw *hw);
+bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw);
+s32  e1000_mng_enable_host_if_generic(struct e1000_hw *hw);
+s32  e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
+                                     u16 length, u16 offset, u8 *sum);
+s32  e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
+                                    struct e1000_host_mng_command_header *hdr);
+s32  e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw,
+                                       u8 *buffer, u16 length);
+bool e1000_enable_mng_pass_thru(struct e1000_hw *hw);
+
+enum e1000_mng_mode {
+	e1000_mng_mode_none = 0,
+	e1000_mng_mode_asf,
+	e1000_mng_mode_pt,
+	e1000_mng_mode_ipmi,
+	e1000_mng_mode_host_if_only
+};
+
+#define E1000_FACTPS_MNGCG    0x20000000
+
+#define E1000_FWSM_MODE_MASK  0xE
+#define E1000_FWSM_MODE_SHIFT 1
+
+#define E1000_MNG_IAMT_MODE                  0x3
+#define E1000_MNG_DHCP_COOKIE_LENGTH         0x10
+#define E1000_MNG_DHCP_COOKIE_OFFSET         0x6F0
+#define E1000_MNG_DHCP_COMMAND_TIMEOUT       10
+#define E1000_MNG_DHCP_TX_PAYLOAD_CMD        64
+#define E1000_MNG_DHCP_COOKIE_STATUS_PARSING 0x1
+#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN    0x2
+
+#define E1000_VFTA_ENTRY_SHIFT               5
+#define E1000_VFTA_ENTRY_MASK                0x7F
+#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
+
+#define E1000_HI_MAX_BLOCK_BYTE_LENGTH       1792 /* Num of bytes in range */
+#define E1000_HI_MAX_BLOCK_DWORD_LENGTH      448 /* Num of dwords in range */
+#define E1000_HI_COMMAND_TIMEOUT             500 /* Process HI command limit */
+
+#define E1000_HICR_EN              0x01  /* Enable bit - RO */
+/* Driver sets this bit when done to put command in RAM */
+#define E1000_HICR_C               0x02
+#define E1000_HICR_SV              0x04  /* Status Validity */
+#define E1000_HICR_FW_RESET_ENABLE 0x40
+#define E1000_HICR_FW_RESET        0x80
+
+/* Intel(R) Active Management Technology signature */
+#define E1000_IAMT_SIGNATURE  0x544D4149
+
+#endif /* _IGB_MANAGE_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_nvm.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_nvm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_nvm.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_nvm.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,627 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+static void igb_stop_nvm(struct e1000_hw *hw);
+static void igb_reload_nvm_generic(struct e1000_hw *hw);
+
+/**
+ *  igb_init_nvm_ops_generic - Initialize NVM function pointers
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups up the function pointers to no-op functions
+ **/
+void igb_init_nvm_ops_generic(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	DEBUGFUNC("igb_init_nvm_ops_generic");
+
+	/* Initialize function pointers */
+	nvm->ops.reload = igb_reload_nvm_generic;
+}
+
+/**
+ *  igb_raise_eec_clk - Raise EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Enable/Raise the EEPROM clock bit.
+ **/
+static void igb_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd | E1000_EECD_SK;
+	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(hw->nvm.delay_usec);
+}
+
+/**
+ *  igb_lower_eec_clk - Lower EEPROM clock
+ *  @hw: pointer to the HW structure
+ *  @eecd: pointer to the EEPROM
+ *
+ *  Clear/Lower the EEPROM clock bit.
+ **/
+static void igb_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
+{
+	*eecd = *eecd & ~E1000_EECD_SK;
+	E1000_WRITE_REG(hw, E1000_EECD, *eecd);
+	E1000_WRITE_FLUSH(hw);
+	usec_delay(hw->nvm.delay_usec);
+}
+
+/**
+ *  igb_shift_out_eec_bits - Shift data bits our to the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @data: data to send to the EEPROM
+ *  @count: number of bits to shift out
+ *
+ *  We need to shift 'count' bits out to the EEPROM.  So, the value in the
+ *  "data" parameter will be shifted out to the EEPROM one bit at a time.
+ *  In order to do this, "data" must be broken down into bits.
+ **/
+static void igb_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u32 mask;
+
+	DEBUGFUNC("igb_shift_out_eec_bits");
+
+	mask = 0x01 << (count - 1);
+	if (nvm->type == e1000_nvm_eeprom_spi)
+		eecd |= E1000_EECD_DO;
+
+	do {
+		eecd &= ~E1000_EECD_DI;
+
+		if (data & mask)
+			eecd |= E1000_EECD_DI;
+
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+
+		usec_delay(nvm->delay_usec);
+
+		igb_raise_eec_clk(hw, &eecd);
+		igb_lower_eec_clk(hw, &eecd);
+
+		mask >>= 1;
+	} while (mask);
+
+	eecd &= ~E1000_EECD_DI;
+	E1000_WRITE_REG(hw, E1000_EECD, eecd);
+}
+
+/**
+ *  igb_shift_in_eec_bits - Shift data bits in from the EEPROM
+ *  @hw: pointer to the HW structure
+ *  @count: number of bits to shift in
+ *
+ *  In order to read a register from the EEPROM, we need to shift 'count' bits
+ *  in from the EEPROM.  Bits are "shifted in" by raising the clock input to
+ *  the EEPROM (setting the SK bit), and then reading the value of the data out
+ *  "DO" bit.  During this "shifting in" process the data in "DI" bit should
+ *  always be clear.
+ **/
+static u16 igb_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
+{
+	u32 eecd;
+	u32 i;
+	u16 data;
+
+	DEBUGFUNC("igb_shift_in_eec_bits");
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
+	data = 0;
+
+	for (i = 0; i < count; i++) {
+		data <<= 1;
+		igb_raise_eec_clk(hw, &eecd);
+
+		eecd = E1000_READ_REG(hw, E1000_EECD);
+
+		eecd &= ~E1000_EECD_DI;
+		if (eecd & E1000_EECD_DO)
+			data |= 1;
+
+		igb_lower_eec_clk(hw, &eecd);
+	}
+
+	return data;
+}
+
+/**
+ *  igb_poll_eerd_eewr_done - Poll for EEPROM read/write completion
+ *  @hw: pointer to the HW structure
+ *  @ee_reg: EEPROM flag for polling
+ *
+ *  Polls the EEPROM status bit for either read or write completion based
+ *  upon the value of 'ee_reg'.
+ **/
+s32 igb_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
+{
+	u32 attempts = 100000;
+	u32 i, reg = 0;
+	s32 ret_val = -E1000_ERR_NVM;
+
+	DEBUGFUNC("igb_poll_eerd_eewr_done");
+
+	for (i = 0; i < attempts; i++) {
+		if (ee_reg == E1000_NVM_POLL_READ)
+			reg = E1000_READ_REG(hw, E1000_EERD);
+		else
+			reg = E1000_READ_REG(hw, E1000_EEWR);
+
+		if (reg & E1000_NVM_RW_REG_DONE) {
+			ret_val = E1000_SUCCESS;
+			break;
+		}
+
+		usec_delay(5);
+	}
+
+	return ret_val;
+}
+
+/**
+ *  igb_acquire_nvm_generic - Generic request for access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
+ *  Return successful if access grant bit set, else clear the request for
+ *  EEPROM access and return -E1000_ERR_NVM (-1).
+ **/
+s32 igb_acquire_nvm_generic(struct e1000_hw *hw)
+{
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_acquire_nvm_generic");
+
+	E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	while (timeout) {
+		if (eecd & E1000_EECD_GNT)
+			break;
+		usec_delay(5);
+		eecd = E1000_READ_REG(hw, E1000_EECD);
+		timeout--;
+	}
+
+	if (!timeout) {
+		eecd &= ~E1000_EECD_REQ;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		DEBUGOUT("Could not acquire NVM grant\n");
+		ret_val = -E1000_ERR_NVM;
+	}
+
+	return ret_val;
+}
+
+/**
+ *  igb_standby_nvm - Return EEPROM to standby state
+ *  @hw: pointer to the HW structure
+ *
+ *  Return the EEPROM to a standby state.
+ **/
+static void igb_standby_nvm(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+
+	DEBUGFUNC("igb_standby_nvm");
+
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Toggle CS to flush commands */
+		eecd |= E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+		eecd &= ~E1000_EECD_CS;
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		E1000_WRITE_FLUSH(hw);
+		usec_delay(nvm->delay_usec);
+	}
+}
+
+/**
+ *  igb_stop_nvm - Terminate EEPROM command
+ *  @hw: pointer to the HW structure
+ *
+ *  Terminates the current command by inverting the EEPROM's chip select pin.
+ **/
+static void igb_stop_nvm(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	DEBUGFUNC("igb_stop_nvm");
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+	if (hw->nvm.type == e1000_nvm_eeprom_spi) {
+		/* Pull CS high */
+		eecd |= E1000_EECD_CS;
+		igb_lower_eec_clk(hw, &eecd);
+	}
+}
+
+/**
+ *  igb_release_nvm_generic - Release exclusive access to EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Stop any current commands to the EEPROM and clear the EEPROM request bit.
+ **/
+void igb_release_nvm_generic(struct e1000_hw *hw)
+{
+	u32 eecd;
+
+	DEBUGFUNC("igb_release_nvm_generic");
+
+	igb_stop_nvm(hw);
+
+	eecd = E1000_READ_REG(hw, E1000_EECD);
+	eecd &= ~E1000_EECD_REQ;
+	E1000_WRITE_REG(hw, E1000_EECD, eecd);
+}
+
+/**
+ *  igb_ready_nvm_eeprom - Prepares EEPROM for read/write
+ *  @hw: pointer to the HW structure
+ *
+ *  Setups the EEPROM for reading and writing.
+ **/
+static s32 igb_ready_nvm_eeprom(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	s32 ret_val = E1000_SUCCESS;
+	u16 timeout = 0;
+	u8 spi_stat_reg;
+
+	DEBUGFUNC("igb_ready_nvm_eeprom");
+
+	if (nvm->type == e1000_nvm_eeprom_spi) {
+		/* Clear SK and CS */
+		eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
+		E1000_WRITE_REG(hw, E1000_EECD, eecd);
+		usec_delay(1);
+		timeout = NVM_MAX_RETRY_SPI;
+
+		/*
+		 * Read "Status Register" repeatedly until the LSB is cleared.
+		 * The EEPROM will signal that the command has been completed
+		 * by clearing bit 0 of the internal status register.  If it's
+		 * not cleared within 'timeout', then error out.
+		 */
+		while (timeout) {
+			igb_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
+			                         hw->nvm.opcode_bits);
+			spi_stat_reg = (u8)igb_shift_in_eec_bits(hw, 8);
+			if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
+				break;
+
+			usec_delay(5);
+			igb_standby_nvm(hw);
+			timeout--;
+		}
+
+		if (!timeout) {
+			DEBUGOUT("SPI NVM Status error\n");
+			ret_val = -E1000_ERR_NVM;
+			goto out;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_nvm_eerd - Reads EEPROM using EERD register
+ *  @hw: pointer to the HW structure
+ *  @offset: offset of word in the EEPROM to read
+ *  @words: number of words to read
+ *  @data: word read from the EEPROM
+ *
+ *  Reads a 16 bit word from the EEPROM using the EERD register.
+ **/
+s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i, eerd = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_read_nvm_eerd");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * too many words for the offset, and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	for (i = 0; i < words; i++) {
+		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		       E1000_NVM_RW_REG_START;
+
+		E1000_WRITE_REG(hw, E1000_EERD, eerd);
+		ret_val = igb_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
+		if (ret_val)
+			break;
+
+		data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
+		           E1000_NVM_RW_REG_DATA);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_nvm_spi - Write to EEPROM using SPI
+ *  @hw: pointer to the HW structure
+ *  @offset: offset within the EEPROM to be written to
+ *  @words: number of words to write
+ *  @data: 16 bit word(s) to be written to the EEPROM
+ *
+ *  Writes data to EEPROM at offset using SPI interface.
+ *
+ *  If e1000_update_nvm_checksum is not called after this function , the
+ *  EEPROM will most likely contain an invalid checksum.
+ **/
+s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	s32 ret_val;
+	u16 widx = 0;
+
+	DEBUGFUNC("igb_write_nvm_spi");
+
+	/*
+	 * A check for invalid values:  offset too large, too many words,
+	 * and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	ret_val = nvm->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	while (widx < words) {
+		u8 write_opcode = NVM_WRITE_OPCODE_SPI;
+
+		ret_val = igb_ready_nvm_eeprom(hw);
+		if (ret_val)
+			goto release;
+
+		igb_standby_nvm(hw);
+
+		/* Send the WRITE ENABLE command (8 bit opcode) */
+		igb_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
+		                         nvm->opcode_bits);
+
+		igb_standby_nvm(hw);
+
+		/*
+		 * Some SPI eeproms use the 8th address bit embedded in the
+		 * opcode
+		 */
+		if ((nvm->address_bits == 8) && (offset >= 128))
+			write_opcode |= NVM_A8_OPCODE_SPI;
+
+		/* Send the Write command (8-bit opcode + addr) */
+		igb_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
+		igb_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
+		                         nvm->address_bits);
+
+		/* Loop to allow for up to whole page write of eeprom */
+		while (widx < words) {
+			u16 word_out = data[widx];
+			word_out = (word_out >> 8) | (word_out << 8);
+			igb_shift_out_eec_bits(hw, word_out, 16);
+			widx++;
+
+			if ((((offset + widx) * 2) % nvm->page_size) == 0) {
+				igb_standby_nvm(hw);
+				break;
+			}
+		}
+	}
+
+	msec_delay(10);
+release:
+	nvm->ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_pba_num_generic - Read device part number
+ *  @hw: pointer to the HW structure
+ *  @pba_num: pointer to device part number
+ *
+ *  Reads the product board assembly (PBA) number from the EEPROM and stores
+ *  the value in pba_num.
+ **/
+s32 igb_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
+{
+	s32  ret_val;
+	u16 nvm_data;
+
+	DEBUGFUNC("igb_read_pba_num_generic");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num = (u32)(nvm_data << 16);
+
+	ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+	*pba_num |= nvm_data;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_mac_addr_generic - Read device MAC address
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the device MAC address from the EEPROM and stores the value.
+ *  Since devices with two ports use the same EEPROM, we increment the
+ *  last bit in the MAC address for the second port.
+ **/
+s32 igb_read_mac_addr_generic(struct e1000_hw *hw)
+{
+	u32 rar_high;
+	u32 rar_low;
+	u16 i;
+
+	rar_high = E1000_READ_REG(hw, E1000_RAH(0));
+	rar_low = E1000_READ_REG(hw, E1000_RAL(0));
+
+	for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
+
+	for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
+		hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
+
+	for (i = 0; i < ETH_ADDR_LEN; i++)
+		hw->mac.addr[i] = hw->mac.perm_addr[i];
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_validate_nvm_checksum_generic - Validate EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
+ **/
+s32 igb_validate_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	DEBUGFUNC("igb_validate_nvm_checksum_generic");
+
+	for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
+		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+
+	if (checksum != (u16) NVM_SUM) {
+		DEBUGOUT("NVM Checksum Invalid\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_update_nvm_checksum_generic - Update EEPROM checksum
+ *  @hw: pointer to the HW structure
+ *
+ *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
+ *  up to the checksum.  Then calculates the EEPROM checksum and writes the
+ *  value to the EEPROM.
+ **/
+s32 igb_update_nvm_checksum_generic(struct e1000_hw *hw)
+{
+	s32  ret_val;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	DEBUGFUNC("igb_update_nvm_checksum");
+
+	for (i = 0; i < NVM_CHECKSUM_REG; i++) {
+		ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
+		if (ret_val) {
+			DEBUGOUT("NVM Read Error while updating checksum.\n");
+			goto out;
+		}
+		checksum += nvm_data;
+	}
+	checksum = (u16) NVM_SUM - checksum;
+	ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
+	if (ret_val) {
+		DEBUGOUT("NVM Write Error while updating checksum.\n");
+        }
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_reload_nvm_generic - Reloads EEPROM
+ *  @hw: pointer to the HW structure
+ *
+ *  Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
+ *  extended control register.
+ **/
+static void igb_reload_nvm_generic(struct e1000_hw *hw)
+{
+	u32 ctrl_ext;
+
+	DEBUGFUNC("igb_reload_nvm_generic");
+
+	usec_delay(10);
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+	ctrl_ext |= E1000_CTRL_EXT_EE_RST;
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	E1000_WRITE_FLUSH(hw);
+}
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_nvm.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_nvm.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_nvm.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_nvm.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,52 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_NVM_H_
+#define _IGB_NVM_H_
+
+void igb_init_nvm_ops_generic(struct e1000_hw *hw);
+s32  igb_acquire_nvm_generic(struct e1000_hw *hw);
+
+s32  igb_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
+s32  igb_read_mac_addr_generic(struct e1000_hw *hw);
+s32  igb_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num);
+s32  igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  igb_valid_led_default_generic(struct e1000_hw *hw, u16 *data);
+s32  igb_validate_nvm_checksum_generic(struct e1000_hw *hw);
+s32  igb_write_nvm_eewr(struct e1000_hw *hw, u16 offset,
+                          u16 words, u16 *data);
+s32  igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words,
+                         u16 *data);
+s32  igb_update_nvm_checksum_generic(struct e1000_hw *hw);
+void igb_release_nvm_generic(struct e1000_hw *hw);
+
+#define E1000_STM_OPCODE  0xDB00
+
+#endif /* _IGB_NVM_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_osdep.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_osdep.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_osdep.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_osdep.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,124 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/* glue for the OS independent part of e1000
+ * includes register access macros
+ */
+
+#ifndef _IGB_OSDEP_H_
+#define _IGB_OSDEP_H_
+
+/* Begin OS Dependencies */
+
+#define u8         unsigned char
+#define bool       boolean_t
+#define dma_addr_t unsigned long
+#define __le16     uint16_t
+#define __le32     uint32_t
+#define __le64     uint64_t
+
+#define __iomem
+#define __devinit
+
+#define msleep(x) mdelay(x)
+
+#define ETH_FCS_LEN 4
+
+typedef int spinlock_t;
+typedef enum {
+    false = 0,
+    true = 1
+} boolean_t;
+
+#define TRUE  1
+#define FALSE 0
+
+#define usec_delay(x) udelay(x)
+#define msec_delay(x) mdelay(x)
+#define msec_delay_irq(x) mdelay(x)
+
+/* End OS Dependencies */
+
+#define PCI_COMMAND_REGISTER   PCI_COMMAND
+#define CMD_MEM_WRT_INVALIDATE PCI_COMMAND_INVALIDATE
+#define ETH_ADDR_LEN           ETH_ALEN
+
+#define DEBUGOUT(S) if (0) { printf(S); }
+#define DEBUGOUT1(S, A...) if (0) { printf(S, A); }
+
+#define DEBUGFUNC(F) DEBUGOUT(F "\n")
+#define DEBUGOUT2 DEBUGOUT1
+#define DEBUGOUT3 DEBUGOUT2
+#define DEBUGOUT7 DEBUGOUT3
+
+#define E1000_REGISTER(a, reg) (reg)
+
+#define E1000_WRITE_REG(a, reg, value) do {  \
+                writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg))); } while (0)
+
+#define E1000_READ_REG(a, reg) (readl((a)->hw_addr + E1000_REGISTER(a, reg)))
+
+#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) do { \
+          writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))); } while (0);
+
+#define E1000_READ_REG_ARRAY(a, reg, offset) ( \
+    readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
+
+#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
+#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
+
+#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
+    writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
+
+#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
+    readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
+
+#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
+    writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
+
+#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
+    readb((a)->hw_addr + E1000_REGISTER(a, reg) + (offset)))
+
+#define E1000_WRITE_REG_IO(a, reg, offset) do { \
+    outl(reg, ((a)->io_base));                  \
+    outl(offset, ((a)->io_base + 4));      } while (0)
+
+#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
+
+#define E1000_WRITE_FLASH_REG(a, reg, value) ( \
+    writel((value), ((a)->flash_address + reg)))
+
+#define E1000_WRITE_FLASH_REG16(a, reg, value) ( \
+    writew((value), ((a)->flash_address + reg)))
+
+#define E1000_READ_FLASH_REG(a, reg) (readl((a)->flash_address + reg))
+
+#define E1000_READ_FLASH_REG16(a, reg) (readw((a)->flash_address + reg))
+
+#endif /* _IGB_OSDEP_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_phy.c ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_phy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_phy.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_phy.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2470 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#include "igb.h"
+
+static s32 igb_phy_setup_autoneg(struct e1000_hw *hw);
+
+#if 0
+/* Cable length tables */
+static const u16 e1000_m88_cable_length_table[] =
+	{ 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
+#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_m88_cable_length_table) / \
+                 sizeof(e1000_m88_cable_length_table[0]))
+
+static const u16 e1000_igp_2_cable_length_table[] =
+    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,
+      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,
+      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,
+      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,
+      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,
+      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,
+      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,
+      104, 109, 114, 118, 121, 124};
+#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \
+                (sizeof(e1000_igp_2_cable_length_table) / \
+                 sizeof(e1000_igp_2_cable_length_table[0]))
+#endif
+
+/**
+ *  igb_check_reset_block_generic - Check if PHY reset is blocked
+ *  @hw: pointer to the HW structure
+ *
+ *  Read the PHY management control register and check whether a PHY reset
+ *  is blocked.  If a reset is not blocked return E1000_SUCCESS, otherwise
+ *  return E1000_BLK_PHY_RESET (12).
+ **/
+s32 igb_check_reset_block_generic(struct e1000_hw *hw)
+{
+	u32 manc;
+
+	DEBUGFUNC("igb_check_reset_block");
+
+	manc = E1000_READ_REG(hw, E1000_MANC);
+
+	return (manc & E1000_MANC_BLK_PHY_RST_ON_IDE) ?
+	       E1000_BLK_PHY_RESET : E1000_SUCCESS;
+}
+
+/**
+ *  igb_get_phy_id - Retrieve the PHY ID and revision
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY registers and stores the PHY ID and possibly the PHY
+ *  revision in the hardware structure.
+ **/
+s32 igb_get_phy_id(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_id;
+
+	DEBUGFUNC("igb_get_phy_id");
+
+	if (!(phy->ops.read_reg))
+		goto out;
+
+		ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id = (u32)(phy_id << 16);
+		usec_delay(20);
+		ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
+		if (ret_val)
+			goto out;
+
+		phy->id |= (u32)(phy_id & PHY_REVISION_MASK);
+		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_phy_reset_dsp_generic - Reset PHY DSP
+ *  @hw: pointer to the HW structure
+ *
+ *  Reset the digital signal processor.
+ **/
+s32 igb_phy_reset_dsp_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_phy_reset_dsp_generic");
+
+	if (!(hw->phy.ops.write_reg))
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1);
+	if (ret_val)
+		goto out;
+
+	ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_phy_reg_mdic - Read MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the MDI control register in the PHY at offset and stores the
+ *  information read to data.
+ **/
+s32 igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_read_phy_reg_mdic");
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = ((offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_READ));
+
+	E1000_WRITE_REG(hw, E1000_MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		usec_delay(50);
+		mdic = E1000_READ_REG(hw, E1000_MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		DEBUGOUT("MDI Read did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		DEBUGOUT("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	*data = (u16) mdic;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_phy_reg_mdic - Write MDI control register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write to register at offset
+ *
+ *  Writes data to MDI control register in the PHY at offset.
+ **/
+s32 igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, mdic = 0;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_write_phy_reg_mdic");
+
+	/*
+	 * Set up Op-code, Phy Address, and register offset in the MDI
+	 * Control register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	mdic = (((u32)data) |
+	        (offset << E1000_MDIC_REG_SHIFT) |
+	        (phy->addr << E1000_MDIC_PHY_SHIFT) |
+	        (E1000_MDIC_OP_WRITE));
+
+	E1000_WRITE_REG(hw, E1000_MDIC, mdic);
+
+	/*
+	 * Poll the ready bit to see if the MDI read completed
+	 * Increasing the time out as testing showed failures with
+	 * the lower time out
+	 */
+	for (i = 0; i < (E1000_GEN_POLL_TIMEOUT * 3); i++) {
+		usec_delay(50);
+		mdic = E1000_READ_REG(hw, E1000_MDIC);
+		if (mdic & E1000_MDIC_READY)
+			break;
+	}
+	if (!(mdic & E1000_MDIC_READY)) {
+		DEBUGOUT("MDI Write did not complete\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+	if (mdic & E1000_MDIC_ERROR) {
+		DEBUGOUT("MDI Error\n");
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_phy_reg_i2c - Read PHY register using i2c
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset using the i2c interface and stores the
+ *  retrieved information in data.
+ **/
+s32 igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, i2ccmd = 0;
+
+	DEBUGFUNC("igb_read_phy_reg_i2c");
+
+	/*
+	 * Set up Op-code, Phy Address, and register address in the I2CCMD
+	 * register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
+	          (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
+	          (E1000_I2CCMD_OPCODE_READ));
+
+	E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
+
+	/* Poll the ready bit to see if the I2C read completed */
+	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
+		usec_delay(50);
+		i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
+		if (i2ccmd & E1000_I2CCMD_READY)
+			break;
+	}
+	if (!(i2ccmd & E1000_I2CCMD_READY)) {
+		DEBUGOUT("I2CCMD Read did not complete\n");
+		return -E1000_ERR_PHY;
+	}
+	if (i2ccmd & E1000_I2CCMD_ERROR) {
+		DEBUGOUT("I2CCMD Error bit set\n");
+		return -E1000_ERR_PHY;
+	}
+
+	/* Need to byte-swap the 16-bit value. */
+	*data = ((i2ccmd >> 8) & 0x00FF) | ((i2ccmd << 8) & 0xFF00);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_write_phy_reg_i2c - Write PHY register using i2c
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset using the i2c interface.
+ **/
+s32 igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	u32 i, i2ccmd = 0;
+	u16 phy_data_swapped;
+
+	DEBUGFUNC("igb_write_phy_reg_i2c");
+
+	/* Swap the data bytes for the I2C interface */
+	phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
+
+	/*
+	 * Set up Op-code, Phy Address, and register address in the I2CCMD
+	 * register.  The MAC will take care of interfacing with the
+	 * PHY to retrieve the desired data.
+	 */
+	i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
+	          (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
+	          E1000_I2CCMD_OPCODE_WRITE |
+	          phy_data_swapped);
+
+	E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
+
+	/* Poll the ready bit to see if the I2C read completed */
+	for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
+		usec_delay(50);
+		i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
+		if (i2ccmd & E1000_I2CCMD_READY)
+			break;
+	}
+	if (!(i2ccmd & E1000_I2CCMD_READY)) {
+		DEBUGOUT("I2CCMD Write did not complete\n");
+		return -E1000_ERR_PHY;
+	}
+	if (i2ccmd & E1000_I2CCMD_ERROR) {
+		DEBUGOUT("I2CCMD Error bit set\n");
+		return -E1000_ERR_PHY;
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_read_phy_reg_m88 - Read m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and storing the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+s32 igb_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_read_phy_reg_m88");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_phy_reg_m88 - Write m88 PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 igb_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_write_phy_reg_m88");
+
+	if (!(hw->phy.ops.acquire))
+		goto out;
+
+	ret_val = hw->phy.ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+	hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  __igb_read_phy_reg_igp - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then reads the PHY register at offset
+ *  and stores the retrieved information in data.  Release any acquired
+ *  semaphores before exiting.
+ **/
+static s32 __igb_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
+                                    bool locked)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("__igb_read_phy_reg_igp");
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = igb_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val)
+			goto release;
+	}
+
+	ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                  data);
+
+release:
+	if (!locked)
+		hw->phy.ops.release(hw);
+out:
+	return ret_val;
+}
+/**
+ *  igb_read_phy_reg_igp - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore then reads the PHY register at offset and stores the
+ *  retrieved information in data.
+ *  Release the acquired semaphore before exiting.
+ **/
+s32 igb_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __igb_read_phy_reg_igp(hw, offset, data, false);
+}
+
+/**
+ *  igb_read_phy_reg_igp_locked - Read igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset and stores the retrieved information
+ *  in data.  Assumes semaphore already acquired.
+ **/
+s32 igb_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __igb_read_phy_reg_igp(hw, offset, data, true);
+}
+
+/**
+ *  igb_write_phy_reg_igp - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+static s32 __igb_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
+                                     bool locked)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_write_phy_reg_igp");
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	if (offset > MAX_PHY_MULTI_PAGE_REG) {
+		ret_val = igb_write_phy_reg_mdic(hw,
+		                                   IGP01E1000_PHY_PAGE_SELECT,
+		                                   (u16)offset);
+		if (ret_val)
+			goto release;
+	}
+
+	ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
+	                                   data);
+
+release:
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_phy_reg_igp - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 igb_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __igb_write_phy_reg_igp(hw, offset, data, false);
+}
+
+/**
+ *  igb_write_phy_reg_igp_locked - Write igp PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Writes the data to PHY register at the offset.
+ *  Assumes semaphore already acquired.
+ **/
+s32 igb_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __igb_write_phy_reg_igp(hw, offset, data, true);
+}
+
+/**
+ *  __igb_read_kmrn_reg - Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary.  Then reads the PHY register at offset
+ *  using the kumeran interface.  The information retrieved is stored in data.
+ *  Release any acquired semaphores before exiting.
+ **/
+static s32 __igb_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
+                                 bool locked)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("__igb_read_kmrn_reg");
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
+	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
+
+	usec_delay(2);
+
+	kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
+	*data = (u16)kmrnctrlsta;
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_read_kmrn_reg_generic -  Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Acquires semaphore then reads the PHY register at offset using the
+ *  kumeran interface.  The information retrieved is stored in data.
+ *  Release the acquired semaphore before exiting.
+ **/
+s32 igb_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __igb_read_kmrn_reg(hw, offset, data, false);
+}
+
+/**
+ *  igb_read_kmrn_reg_locked -  Read kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to be read
+ *  @data: pointer to the read data
+ *
+ *  Reads the PHY register at offset using the kumeran interface.  The
+ *  information retrieved is stored in data.
+ *  Assumes semaphore already acquired.
+ **/
+s32 igb_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	return __igb_read_kmrn_reg(hw, offset, data, true);
+}
+
+/**
+ *  __igb_write_kmrn_reg - Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *  @locked: semaphore has already been acquired or not
+ *
+ *  Acquires semaphore, if necessary.  Then write the data to PHY register
+ *  at the offset using the kumeran interface.  Release any acquired semaphores
+ *  before exiting.
+ **/
+static s32 __igb_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
+                                  bool locked)
+{
+	u32 kmrnctrlsta;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("igb_write_kmrn_reg_generic");
+
+	if (!locked) {
+		if (!(hw->phy.ops.acquire))
+			goto out;
+
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			goto out;
+	}
+
+	kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
+	               E1000_KMRNCTRLSTA_OFFSET) | data;
+	E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
+
+	usec_delay(2);
+
+	if (!locked)
+		hw->phy.ops.release(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_write_kmrn_reg_generic -  Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore then writes the data to the PHY register at the offset
+ *  using the kumeran interface.  Release the acquired semaphore before exiting.
+ **/
+s32 igb_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __igb_write_kmrn_reg(hw, offset, data, false);
+}
+
+/**
+ *  igb_write_kmrn_reg_locked -  Write kumeran register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Write the data to PHY register at the offset using the kumeran interface.
+ *  Assumes semaphore already acquired.
+ **/
+s32 igb_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	return __igb_write_kmrn_reg(hw, offset, data, true);
+}
+
+/**
+ *  igb_copper_link_setup_m88 - Setup m88 PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up MDI/MDI-X and polarity for m88 PHY's.  If necessary, transmit clock
+ *  and downshift values are set also.
+ **/
+s32 igb_copper_link_setup_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+
+	DEBUGFUNC("igb_copper_link_setup_m88");
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	/* Enable CRS on TX. This must be set for half-duplex operation. */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+
+	/*
+	 * Options:
+	 *   MDI/MDI-X = 0 (default)
+	 *   0 - Auto for all speeds
+	 *   1 - MDI mode
+	 *   2 - MDI-X mode
+	 *   3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes)
+	 */
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+
+	switch (phy->mdix) {
+	case 1:
+		phy_data |= M88E1000_PSCR_MDI_MANUAL_MODE;
+		break;
+	case 2:
+		phy_data |= M88E1000_PSCR_MDIX_MANUAL_MODE;
+		break;
+	case 3:
+		phy_data |= M88E1000_PSCR_AUTO_X_1000T;
+		break;
+	case 0:
+	default:
+		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
+		break;
+	}
+
+	/*
+	 * Options:
+	 *   disable_polarity_correction = 0 (default)
+	 *       Automatic Correction for Reversed Cable Polarity
+	 *   0 - Disabled
+	 *   1 - Enabled
+	 */
+	phy_data &= ~M88E1000_PSCR_POLARITY_REVERSAL;
+	if (phy->disable_polarity_correction == 1)
+		phy_data |= M88E1000_PSCR_POLARITY_REVERSAL;
+
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	if (phy->revision < E1000_REVISION_4) {
+		/*
+		 * Force TX_CLK in the Extended PHY Specific Control Register
+		 * to 25MHz clock.
+		 */
+		ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy_data |= M88E1000_EPSCR_TX_CLK_25;
+
+		if ((phy->revision == E1000_REVISION_2) &&
+		    (phy->id == M88E1111_I_PHY_ID)) {
+			/* 82573L PHY - set the downshift counter to 5x. */
+			phy_data &= ~M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK;
+			phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
+		} else {
+			/* Configure Master and Slave downshift values */
+			phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
+			phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
+			             M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
+		}
+		ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
+		                             phy_data);
+		if (ret_val)
+			goto out;
+	}
+
+	/* Commit the changes. */
+	ret_val = phy->ops.commit(hw);
+	if (ret_val) {
+		DEBUGOUT("Error committing the PHY changes\n");
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_copper_link_setup_igp - Setup igp PHY's for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for
+ *  igp PHY's.
+ **/
+s32 igb_copper_link_setup_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("igb_copper_link_setup_igp");
+
+	if (phy->reset_disable) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = hw->phy.ops.reset(hw);
+	if (ret_val) {
+		DEBUGOUT("Error resetting the PHY.\n");
+		goto out;
+	}
+
+	/*
+	 * Wait 100ms for MAC to configure PHY from NVM settings, to avoid
+	 * timeout issues when LFS is enabled.
+	 */
+	msec_delay(100);
+
+	/*
+	 * The NVM settings will configure LPLU in D3 for
+	 * non-IGP1 PHYs.
+	 */
+	if (phy->type == e1000_phy_igp) {
+		/* disable lplu d3 during driver init */
+		ret_val = hw->phy.ops.set_d3_lplu_state(hw, false);
+		if (ret_val) {
+			DEBUGOUT("Error Disabling LPLU D3\n");
+			goto out;
+		}
+	}
+
+	/* disable lplu d0 during driver init */
+	if (hw->phy.ops.set_d0_lplu_state) {
+		ret_val = hw->phy.ops.set_d0_lplu_state(hw, false);
+		if (ret_val) {
+			DEBUGOUT("Error Disabling LPLU D0\n");
+			goto out;
+		}
+	}
+	/* Configure mdi-mdix settings */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+
+	switch (phy->mdix) {
+	case 1:
+		data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 2:
+		data |= IGP01E1000_PSCR_FORCE_MDI_MDIX;
+		break;
+	case 0:
+	default:
+		data |= IGP01E1000_PSCR_AUTO_MDIX;
+		break;
+	}
+	ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, data);
+	if (ret_val)
+		goto out;
+
+	/* set auto-master slave resolution settings */
+	if (hw->mac.autoneg) {
+		/*
+		 * when autonegotiation advertisement is only 1000Mbps then we
+		 * should disable SmartSpeed and enable Auto MasterSlave
+		 * resolution as hardware default.
+		 */
+		if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {
+			/* Disable SmartSpeed */
+			ret_val = phy->ops.read_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+
+			/* Set auto Master/Slave resolution process */
+			ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~CR_1000T_MS_ENABLE;
+			ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
+			if (ret_val)
+				goto out;
+		}
+
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
+		if (ret_val)
+			goto out;
+
+		/* load defaults for future use */
+		phy->original_ms_type = (data & CR_1000T_MS_ENABLE) ?
+			((data & CR_1000T_MS_VALUE) ?
+			e1000_ms_force_master :
+			e1000_ms_force_slave) :
+			e1000_ms_auto;
+
+		switch (phy->ms_type) {
+		case e1000_ms_force_master:
+			data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_force_slave:
+			data |= CR_1000T_MS_ENABLE;
+			data &= ~(CR_1000T_MS_VALUE);
+			break;
+		case e1000_ms_auto:
+			data &= ~CR_1000T_MS_ENABLE;
+		default:
+			break;
+		}
+		ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL, data);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_copper_link_autoneg - Setup/Enable autoneg for copper link
+ *  @hw: pointer to the HW structure
+ *
+ *  Performs initial bounds checking on autoneg advertisement parameter, then
+ *  configure to advertise the full capability.  Setup the PHY to autoneg
+ *  and restart the negotiation process between the link partner.  If
+ *  autoneg_wait_to_complete, then wait for autoneg to complete before exiting.
+ **/
+s32 igb_copper_link_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_ctrl;
+
+	DEBUGFUNC("igb_copper_link_autoneg");
+
+	/*
+	 * Perform some bounds checking on the autoneg advertisement
+	 * parameter.
+	 */
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/*
+	 * If autoneg_advertised is zero, we assume it was not defaulted
+	 * by the calling code so we set to advertise full capability.
+	 */
+	if (phy->autoneg_advertised == 0)
+		phy->autoneg_advertised = phy->autoneg_mask;
+
+	DEBUGOUT("Reconfiguring auto-neg advertisement params\n");
+	ret_val = igb_phy_setup_autoneg(hw);
+	if (ret_val) {
+		DEBUGOUT("Error Setting up Auto-Negotiation\n");
+		goto out;
+	}
+	DEBUGOUT("Restarting Auto-Neg\n");
+
+	/*
+	 * Restart auto-negotiation by setting the Auto Neg Enable bit and
+	 * the Auto Neg Restart bit in the PHY control register.
+	 */
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= (MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG);
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Does the user want to wait for Auto-Neg to complete here, or
+	 * check at a later time (for example, callback routine).
+	 */
+	if (phy->autoneg_wait_to_complete) {
+		ret_val = hw->mac.ops.wait_autoneg(hw);
+		if (ret_val) {
+			DEBUGOUT("Error while waiting for "
+			         "autoneg to complete\n");
+			goto out;
+		}
+	}
+
+	hw->mac.get_link_status = true;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_phy_setup_autoneg - Configure PHY for auto-negotiation
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the MII auto-neg advertisement register and/or the 1000T control
+ *  register and if the PHY is already setup for auto-negotiation, then
+ *  return successful.  Otherwise, setup advertisement and flow control to
+ *  the appropriate values for the wanted auto-negotiation.
+ **/
+static s32 igb_phy_setup_autoneg(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 mii_autoneg_adv_reg;
+	u16 mii_1000t_ctrl_reg = 0;
+
+	DEBUGFUNC("igb_phy_setup_autoneg");
+
+	phy->autoneg_advertised &= phy->autoneg_mask;
+
+	/* Read the MII Auto-Neg Advertisement Register (Address 4). */
+	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		/* Read the MII 1000Base-T Control Register (Address 9). */
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
+		                            &mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+	/*
+	 * Need to parse both autoneg_advertised and fc and set up
+	 * the appropriate PHY registers.  First we will parse for
+	 * autoneg_advertised software override.  Since we can advertise
+	 * a plethora of combinations, we need to check each bit
+	 * individually.
+	 */
+
+	/*
+	 * First we clear all the 10/100 mb speed bits in the Auto-Neg
+	 * Advertisement Register (Address 4) and the 1000 mb speed bits in
+	 * the  1000Base-T Control Register (Address 9).
+	 */
+	mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |
+	                         NWAY_AR_100TX_HD_CAPS |
+	                         NWAY_AR_10T_FD_CAPS   |
+	                         NWAY_AR_10T_HD_CAPS);
+	mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
+
+	DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised);
+
+	/* Do we want to advertise 10 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
+		DEBUGOUT("Advertise 10mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;
+	}
+
+	/* Do we want to advertise 10 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_10_FULL) {
+		DEBUGOUT("Advertise 10mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_10T_FD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Half Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_HALF) {
+		DEBUGOUT("Advertise 100mb Half duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_HD_CAPS;
+	}
+
+	/* Do we want to advertise 100 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_100_FULL) {
+		DEBUGOUT("Advertise 100mb Full duplex\n");
+		mii_autoneg_adv_reg |= NWAY_AR_100TX_FD_CAPS;
+	}
+
+	/* We do not allow the Phy to advertise 1000 Mb Half Duplex */
+	if (phy->autoneg_advertised & ADVERTISE_1000_HALF) {
+		DEBUGOUT("Advertise 1000mb Half duplex request denied!\n");
+        }
+	/* Do we want to advertise 1000 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_1000_FULL) {
+		DEBUGOUT("Advertise 1000mb Full duplex\n");
+		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
+	}
+
+	/*
+	 * Check for a software override of the flow control settings, and
+	 * setup the PHY advertisement registers accordingly.  If
+	 * auto-negotiation is enabled, then software will have to set the
+	 * "PAUSE" bits to the correct value in the Auto-Negotiation
+	 * Advertisement Register (PHY_AUTONEG_ADV) and re-start auto-
+	 * negotiation.
+	 *
+	 * The possible values of the "fc" parameter are:
+	 *      0:  Flow control is completely disabled
+	 *      1:  Rx flow control is enabled (we can receive pause frames
+	 *          but not send pause frames).
+	 *      2:  Tx flow control is enabled (we can send pause frames
+	 *          but we do not support receiving pause frames).
+	 *      3:  Both Rx and Tx flow control (symmetric) are enabled.
+	 *  other:  No software override.  The flow control configuration
+	 *          in the EEPROM is used.
+	 */
+	switch (hw->fc.current_mode) {
+	case e1000_fc_none:
+		/*
+		 * Flow control (Rx & Tx) is completely disabled by a
+		 * software over-ride.
+		 */
+		mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_rx_pause:
+		/*
+		 * Rx Flow control is enabled, and Tx Flow control is
+		 * disabled, by a software over-ride.
+		 *
+		 * Since there really isn't a way to advertise that we are
+		 * capable of Rx Pause ONLY, we will advertise that we
+		 * support both symmetric and asymmetric Rx PAUSE.  Later
+		 * (in e1000_config_fc_after_link_up) we will disable the
+		 * hw's ability to send PAUSE frames.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	case e1000_fc_tx_pause:
+		/*
+		 * Tx Flow control is enabled, and Rx Flow control is
+		 * disabled, by a software over-ride.
+		 */
+		mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR;
+		mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE;
+		break;
+	case e1000_fc_full:
+		/*
+		 * Flow control (both Rx and Tx) is enabled by a software
+		 * over-ride.
+		 */
+		mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
+		break;
+	default:
+		DEBUGOUT("Flow control param set incorrectly\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
+
+	if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
+		ret_val = phy->ops.write_reg(hw,
+		                              PHY_1000T_CTRL,
+		                              mii_1000t_ctrl_reg);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_setup_copper_link_generic - Configure copper link settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the appropriate function to configure the link for auto-neg or forced
+ *  speed and duplex.  Then we check for link, once link is established calls
+ *  to configure collision distance and flow control are called.  If link is
+ *  not established, we return -E1000_ERR_PHY (-2).
+ **/
+s32 igb_setup_copper_link_generic(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	bool link;
+
+	DEBUGFUNC("igb_setup_copper_link_generic");
+
+	if (hw->mac.autoneg) {
+		/*
+		 * Setup autoneg and flow control advertisement and perform
+		 * autonegotiation.
+		 */
+		ret_val = igb_copper_link_autoneg(hw);
+		if (ret_val)
+			goto out;
+	} else {
+#if 0
+		/*
+		 * PHY will be set to 10H, 10F, 100H or 100F
+		 * depending on user settings.
+		 */
+		DEBUGOUT("Forcing Speed and Duplex\n");
+		ret_val = hw->phy.ops.force_speed_duplex(hw);
+		if (ret_val) {
+			DEBUGOUT("Error Forcing Speed and Duplex\n");
+			goto out;
+		}
+#endif
+	}
+
+	/*
+	 * Check link status. Wait up to 100 microseconds for link to become
+	 * valid.
+	 */
+	ret_val = igb_phy_has_link_generic(hw,
+	                                     COPPER_LINK_UP_LIMIT,
+	                                     10,
+	                                     &link);
+	if (ret_val)
+		goto out;
+
+	if (link) {
+		DEBUGOUT("Valid link established!!!\n");
+		igb_config_collision_dist_generic(hw);
+		ret_val = igb_config_fc_after_link_up_generic(hw);
+	} else {
+		DEBUGOUT("Unable to establish link!!!\n");
+	}
+
+out:
+	return ret_val;
+}
+
+#if 0
+/**
+ *  igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Waits for link and returns
+ *  successful if link up is successful, else -E1000_ERR_PHY (-2).
+ **/
+s32 igb_phy_force_speed_duplex_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("igb_phy_force_speed_duplex_igp");
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	igb_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  IGP requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~IGP01E1000_PSCR_AUTO_MDIX;
+	phy_data &= ~IGP01E1000_PSCR_FORCE_MDI_MDIX;
+
+	ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("IGP PSCR: %X\n", phy_data);
+
+	usec_delay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on IGP phy.\n");
+
+		ret_val = igb_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			DEBUGOUT("Link taking longer than expected.\n");
+                }
+		/* Try once more */
+		ret_val = igb_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Calls the PHY setup function to force speed and duplex.  Clears the
+ *  auto-crossover to force MDI manually.  Resets the PHY to commit the
+ *  changes.  If time expires while waiting for link up, we reset the DSP.
+ *  After reset, TX_CLK and CRS on Tx must be set.  Return successful upon
+ *  successful completion, else return corresponding error code.
+ **/
+s32 igb_phy_force_speed_duplex_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("igb_phy_force_speed_duplex_m88");
+
+	/*
+	 * Clear Auto-Crossover to force MDI manually.  M88E1000 requires MDI
+	 * forced whenever speed and duplex are forced.
+	 */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data &= ~M88E1000_PSCR_AUTO_X_MODE;
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("M88E1000 PSCR: %X\n", phy_data);
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	igb_phy_force_speed_duplex_setup(hw, &phy_data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/* Reset the phy to commit changes. */
+	ret_val = hw->phy.ops.commit(hw);
+	if (ret_val)
+		goto out;
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on M88 phy.\n");
+
+		ret_val = igb_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			/*
+			 * We didn't get link.
+			 * Reset the DSP and cross our fingers.
+			 */
+			ret_val = phy->ops.write_reg(hw,
+			                              M88E1000_PHY_PAGE_SELECT,
+			                              0x001d);
+			if (ret_val)
+				goto out;
+			ret_val = igb_phy_reset_dsp_generic(hw);
+			if (ret_val)
+				goto out;
+		}
+
+		/* Try once more */
+		ret_val = igb_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
+		                                     100000, &link);
+		if (ret_val)
+			goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * Resetting the phy means we need to re-force TX_CLK in the
+	 * Extended PHY Specific Control Register to 25MHz clock from
+	 * the reset value of 2.5MHz.
+	 */
+	phy_data |= M88E1000_EPSCR_TX_CLK_25;
+	ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_data);
+	if (ret_val)
+		goto out;
+
+	/*
+	 * In addition, we must re-enable CRS on Tx for both half and full
+	 * duplex.
+	 */
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy_data |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
+	ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data);
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  igb_phy_force_speed_duplex_ife - Force PHY speed & duplex
+ *  @hw: pointer to the HW structure
+ *
+ *  Forces the speed and duplex settings of the PHY.
+ *  This is a function pointer entry point only called by
+ *  PHY setup routines.
+ **/
+s32 igb_phy_force_speed_duplex_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	DEBUGFUNC("igb_phy_force_speed_duplex_ife");
+
+	if (phy->type != e1000_phy_ife) {
+		ret_val = igb_phy_force_speed_duplex_igp(hw);
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	igb_phy_force_speed_duplex_setup(hw, &data);
+
+	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	/* Disable MDI-X support for 10/100 */
+	ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);
+	if (ret_val)
+		goto out;
+
+	data &= ~IFE_PMC_AUTO_MDIX;
+	data &= ~IFE_PMC_FORCE_MDIX;
+
+	ret_val = phy->ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, data);
+	if (ret_val)
+		goto out;
+
+	DEBUGOUT1("IFE PMC: %X\n", data);
+
+	usec_delay(1);
+
+	if (phy->autoneg_wait_to_complete) {
+		DEBUGOUT("Waiting for forced speed/duplex link on IFE phy.\n");
+
+		ret_val = igb_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+
+		if (!link) {
+			DEBUGOUT("Link taking longer than expected.\n");
+                }
+		/* Try once more */
+		ret_val = igb_phy_has_link_generic(hw,
+		                                     PHY_FORCE_LIMIT,
+		                                     100000,
+		                                     &link);
+		if (ret_val)
+			goto out;
+	}
+
+out:
+	return ret_val;
+}
+#endif
+
+#if 0
+/**
+ *  igb_phy_force_speed_duplex_setup - Configure forced PHY speed/duplex
+ *  @hw: pointer to the HW structure
+ *  @phy_ctrl: pointer to current value of PHY_CONTROL
+ *
+ *  Forces speed and duplex on the PHY by doing the following: disable flow
+ *  control, force speed/duplex on the MAC, disable auto speed detection,
+ *  disable auto-negotiation, configure duplex, configure speed, configure
+ *  the collision distance, write configuration to CTRL register.  The
+ *  caller must write to the PHY_CONTROL register for these settings to
+ *  take affect.
+ **/
+void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	u32 ctrl;
+
+	DEBUGFUNC("igb_phy_force_speed_duplex_setup");
+
+	/* Turn off flow control when forcing speed/duplex */
+	hw->fc.current_mode = e1000_fc_none;
+
+	/* Force speed/duplex on the mac */
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= (E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	ctrl &= ~E1000_CTRL_SPD_SEL;
+
+	/* Disable Auto Speed Detection */
+	ctrl &= ~E1000_CTRL_ASDE;
+
+	/* Disable autoneg on the phy */
+	*phy_ctrl &= ~MII_CR_AUTO_NEG_EN;
+
+	/* Forcing Full or Half Duplex? */
+	if (mac->forced_speed_duplex & E1000_ALL_HALF_DUPLEX) {
+		ctrl &= ~E1000_CTRL_FD;
+		*phy_ctrl &= ~MII_CR_FULL_DUPLEX;
+		DEBUGOUT("Half Duplex\n");
+	} else {
+		ctrl |= E1000_CTRL_FD;
+		*phy_ctrl |= MII_CR_FULL_DUPLEX;
+		DEBUGOUT("Full Duplex\n");
+	}
+
+	/* Forcing 10mb or 100mb? */
+	if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) {
+		ctrl |= E1000_CTRL_SPD_100;
+		*phy_ctrl |= MII_CR_SPEED_100;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_10);
+		DEBUGOUT("Forcing 100mb\n");
+	} else {
+		ctrl &= ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
+		*phy_ctrl |= MII_CR_SPEED_10;
+		*phy_ctrl &= ~(MII_CR_SPEED_1000 | MII_CR_SPEED_100);
+		DEBUGOUT("Forcing 10mb\n");
+	}
+
+	igb_config_collision_dist_generic(hw);
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+}
+#endif
+
+/**
+ *  igb_set_d3_lplu_state_generic - Sets low power link up state for D3
+ *  @hw: pointer to the HW structure
+ *  @active: boolean used to enable/disable lplu
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  The low power link up (lplu) state is set to the power management level D3
+ *  and SmartSpeed is disabled when active is true, else clear lplu for D3
+ *  and enable Smartspeed.  LPLU and Smartspeed are mutually exclusive.  LPLU
+ *  is used during Dx states where the power conservation is most important.
+ *  During driver activity, SmartSpeed should be enabled so performance is
+ *  maintained.
+ **/
+s32 igb_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 data;
+
+	DEBUGFUNC("igb_set_d3_lplu_state_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
+	if (ret_val)
+		goto out;
+
+	if (!active) {
+		data &= ~IGP02E1000_PM_D3_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                             data);
+		if (ret_val)
+			goto out;
+		/*
+		 * LPLU and SmartSpeed are mutually exclusive.  LPLU is used
+		 * during Dx states where the power conservation is most
+		 * important.  During driver activity we should enable
+		 * SmartSpeed, so performance is maintained.
+		 */
+		if (phy->smart_speed == e1000_smart_speed_on) {
+			ret_val = phy->ops.read_reg(hw,
+			                            IGP01E1000_PHY_PORT_CONFIG,
+			                            &data);
+			if (ret_val)
+				goto out;
+
+			data |= IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		} else if (phy->smart_speed == e1000_smart_speed_off) {
+			ret_val = phy->ops.read_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             &data);
+			if (ret_val)
+				goto out;
+
+			data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+			ret_val = phy->ops.write_reg(hw,
+			                             IGP01E1000_PHY_PORT_CONFIG,
+			                             data);
+			if (ret_val)
+				goto out;
+		}
+	} else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
+	           (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
+	           (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
+		data |= IGP02E1000_PM_D3_LPLU;
+		ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
+		                              data);
+		if (ret_val)
+			goto out;
+
+		/* When LPLU is enabled, we should disable SmartSpeed */
+		ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                             &data);
+		if (ret_val)
+			goto out;
+
+		data &= ~IGP01E1000_PSCFR_SMART_SPEED;
+		ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
+		                              data);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_check_downshift_generic - Checks whether a downshift in speed occurred
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns 1
+ *
+ *  A downshift is detected by querying the PHY link health.
+ **/
+s32 igb_check_downshift_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	DEBUGFUNC("igb_check_downshift_generic");
+
+	switch (phy->type) {
+	case e1000_phy_m88:
+	case e1000_phy_gg82563:
+		offset	= M88E1000_PHY_SPEC_STATUS;
+		mask	= M88E1000_PSSR_DOWNSHIFT;
+		break;
+	case e1000_phy_igp_2:
+	case e1000_phy_igp:
+	case e1000_phy_igp_3:
+		offset	= IGP01E1000_PHY_LINK_HEALTH;
+		mask	= IGP01E1000_PLHR_SS_DOWNGRADE;
+		break;
+	default:
+		/* speed downshift not supported */
+		phy->speed_downgraded = false;
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->speed_downgraded = (phy_data & mask) ? true : false;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_check_polarity_m88 - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY specific status register.
+ **/
+s32 igb_check_polarity_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+
+	DEBUGFUNC("igb_check_polarity_m88");
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  igb_check_polarity_igp - Checks the polarity.
+ *  @hw: pointer to the HW structure
+ *
+ *  Success returns 0, Failure returns -E1000_ERR_PHY (-2)
+ *
+ *  Polarity is determined based on the PHY port status register, and the
+ *  current speed (since there is no polarity at 100Mbps).
+ **/
+s32 igb_check_polarity_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data, offset, mask;
+
+	DEBUGFUNC("igb_check_polarity_igp");
+
+	/*
+	 * Polarity is determined based on the speed of
+	 * our connection.
+	 */
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+		offset	= IGP01E1000_PHY_PCS_INIT_REG;
+		mask	= IGP01E1000_PHY_POLARITY_MASK;
+	} else {
+		/*
+		 * This really only applies to 10Mbps since
+		 * there is no polarity for 100Mbps (always 0).
+		 */
+		offset	= IGP01E1000_PHY_PORT_STATUS;
+		mask	= IGP01E1000_PSSR_POLARITY_REVERSED;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &data);
+
+	if (!ret_val)
+		phy->cable_polarity = (data & mask)
+		                      ? e1000_rev_polarity_reversed
+		                      : e1000_rev_polarity_normal;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_check_polarity_ife - Check cable polarity for IFE PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Polarity is determined on the polarity reversal feature being enabled.
+ **/
+s32 igb_check_polarity_ife(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, offset, mask;
+
+	DEBUGFUNC("igb_check_polarity_ife");
+
+	/*
+	 * Polarity is determined based on the reversal feature being enabled.
+	 */
+	if (phy->polarity_correction) {
+		offset = IFE_PHY_EXTENDED_STATUS_CONTROL;
+		mask = IFE_PESC_POLARITY_REVERSED;
+	} else {
+		offset = IFE_PHY_SPECIAL_CONTROL;
+		mask = IFE_PSC_FORCE_POLARITY;
+	}
+
+	ret_val = phy->ops.read_reg(hw, offset, &phy_data);
+
+	if (!ret_val)
+		phy->cable_polarity = (phy_data & mask)
+		                       ? e1000_rev_polarity_reversed
+		                       : e1000_rev_polarity_normal;
+
+	return ret_val;
+}
+
+/**
+ *  igb_wait_autoneg_generic - Wait for auto-neg completion
+ *  @hw: pointer to the HW structure
+ *
+ *  Waits for auto-negotiation to complete or for the auto-negotiation time
+ *  limit to expire, which ever happens first.
+ **/
+s32 igb_wait_autoneg_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	DEBUGFUNC("igb_wait_autoneg_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	/* Break after autoneg completes or PHY_AUTO_NEG_LIMIT expires. */
+	for (i = PHY_AUTO_NEG_LIMIT; i > 0; i--) {
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_AUTONEG_COMPLETE)
+			break;
+		msec_delay(100);
+	}
+
+	/*
+	 * PHY_AUTO_NEG_TIME expiration doesn't guarantee auto-negotiation
+	 * has completed.
+	 */
+	return ret_val;
+}
+
+/**
+ *  igb_phy_has_link_generic - Polls PHY for link
+ *  @hw: pointer to the HW structure
+ *  @iterations: number of times to poll for link
+ *  @usec_interval: delay between polling attempts
+ *  @success: pointer to whether polling was successful or not
+ *
+ *  Polls the PHY status register for link, 'iterations' number of times.
+ **/
+s32 igb_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                               u32 usec_interval, bool *success)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 i, phy_status;
+
+	DEBUGFUNC("igb_phy_has_link_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		return E1000_SUCCESS;
+
+	for (i = 0; i < iterations; i++) {
+		/*
+		 * Some PHYs require the PHY_STATUS register to be read
+		 * twice due to the link bit being sticky.  No harm doing
+		 * it across the board.
+		 */
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val) {
+			/*
+			 * If the first read fails, another entity may have
+			 * ownership of the resources, wait and try again to
+			 * see if they have relinquished the resources yet.
+			 */
+			usec_delay(usec_interval);
+		}
+		ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status);
+		if (ret_val)
+			break;
+		if (phy_status & MII_SR_LINK_STATUS)
+			break;
+		if (usec_interval >= 1000)
+			msec_delay_irq(usec_interval/1000);
+		else
+			usec_delay(usec_interval);
+	}
+
+	*success = (i < iterations) ? true : false;
+
+	return ret_val;
+}
+
+#if 0
+/**
+ *  igb_get_cable_length_m88 - Determine cable length for m88 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Reads the PHY specific status register to retrieve the cable length
+ *  information.  The cable length is determined by averaging the minimum and
+ *  maximum values to get the "average" cable length.  The m88 PHY has four
+ *  possible cable length values, which are:
+ *	Register Value		Cable Length
+ *	0			< 50 meters
+ *	1			50 - 80 meters
+ *	2			80 - 110 meters
+ *	3			110 - 140 meters
+ *	4			> 140 meters
+ **/
+s32 igb_get_cable_length_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 phy_data, index;
+
+	DEBUGFUNC("igb_get_cable_length_m88");
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
+	        M88E1000_PSSR_CABLE_LENGTH_SHIFT;
+	if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) {
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+	phy->min_cable_length = e1000_m88_cable_length_table[index];
+	phy->max_cable_length = e1000_m88_cable_length_table[index + 1];
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  The automatic gain control (agc) normalizes the amplitude of the
+ *  received signal, adjusting for the attenuation produced by the
+ *  cable.  By reading the AGC registers, which represent the
+ *  combination of coarse and fine gain value, the value can be put
+ *  into a lookup table to obtain the approximate cable length
+ *  for each channel.
+ **/
+s32 igb_get_cable_length_igp_2(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_data, i, agc_value = 0;
+	u16 cur_agc_index, max_agc_index = 0;
+	u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
+	u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] =
+	                                                 {IGP02E1000_PHY_AGC_A,
+	                                                  IGP02E1000_PHY_AGC_B,
+	                                                  IGP02E1000_PHY_AGC_C,
+	                                                  IGP02E1000_PHY_AGC_D};
+
+	DEBUGFUNC("igb_get_cable_length_igp_2");
+
+	/* Read the AGC registers for all channels */
+	for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
+		ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);
+		if (ret_val)
+			goto out;
+
+		/*
+		 * Getting bits 15:9, which represent the combination of
+		 * coarse and fine gain values.  The result is a number
+		 * that can be put into the lookup table to obtain the
+		 * approximate cable length.
+		 */
+		cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
+		                IGP02E1000_AGC_LENGTH_MASK;
+
+		/* Array index bound check. */
+		if ((cur_agc_index >= IGP02E1000_CABLE_LENGTH_TABLE_SIZE) ||
+		    (cur_agc_index == 0)) {
+			ret_val = -E1000_ERR_PHY;
+			goto out;
+		}
+
+		/* Remove min & max AGC values from calculation. */
+		if (e1000_igp_2_cable_length_table[min_agc_index] >
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			min_agc_index = cur_agc_index;
+		if (e1000_igp_2_cable_length_table[max_agc_index] <
+		    e1000_igp_2_cable_length_table[cur_agc_index])
+			max_agc_index = cur_agc_index;
+
+		agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
+	}
+
+	agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
+	              e1000_igp_2_cable_length_table[max_agc_index]);
+	agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
+
+	/* Calculate cable length with the error range of +/- 10 meters. */
+	phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ?
+	                         (agc_value - IGP02E1000_AGC_RANGE) : 0;
+	phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE;
+
+	phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
+
+out:
+	return ret_val;
+}
+#endif
+
+/**
+ *  igb_get_phy_info_m88 - Retrieve PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Valid for only copper links.  Read the PHY status register (sticky read)
+ *  to verify that link is up.  Read the PHY special control register to
+ *  determine the polarity and 10base-T extended distance.  Read the PHY
+ *  special status register to determine MDI/MDIx and current speed.  If
+ *  speed is 1000, then determine cable length, local and remote receiver.
+ **/
+s32 igb_get_phy_info_m88(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32  ret_val;
+	u16 phy_data;
+	bool link;
+
+	DEBUGFUNC("igb_get_phy_info_m88");
+
+	if (phy->media_type != e1000_media_type_copper) {
+		DEBUGOUT("Phy info is only valid for copper media\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = igb_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		DEBUGOUT("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL)
+	                           ? true : false;
+
+	ret_val = igb_check_polarity_m88(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (phy_data & M88E1000_PSSR_MDIX) ? true : false;
+
+	if ((phy_data & M88E1000_PSSR_SPEED) == M88E1000_PSSR_1000MBS) {
+#if 0
+		ret_val = hw->phy.ops.get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+#endif
+	} else {
+		/* Set values to "undefined" */
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_phy_info_igp - Retrieve igp PHY information
+ *  @hw: pointer to the HW structure
+ *
+ *  Read PHY status to determine if link is up.  If link is up, then
+ *  set/determine 10base-T extended distance and polarity correction.  Read
+ *  PHY port status to determine MDI/MDIx and speed.  Based on the speed,
+ *  determine on the cable length, local and remote receiver.
+ **/
+s32 igb_get_phy_info_igp(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val;
+	u16 data;
+	bool link;
+
+	DEBUGFUNC("igb_get_phy_info_igp");
+
+	ret_val = igb_phy_has_link_generic(hw, 1, 0, &link);
+	if (ret_val)
+		goto out;
+
+	if (!link) {
+		DEBUGOUT("Phy info is only valid if link is up\n");
+		ret_val = -E1000_ERR_CONFIG;
+		goto out;
+	}
+
+	phy->polarity_correction = true;
+
+	ret_val = igb_check_polarity_igp(hw);
+	if (ret_val)
+		goto out;
+
+	ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
+	if (ret_val)
+		goto out;
+
+	phy->is_mdix = (data & IGP01E1000_PSSR_MDIX) ? true : false;
+
+	if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
+	    IGP01E1000_PSSR_SPEED_1000MBPS) {
+#if 0
+		ret_val = phy->ops.get_cable_length(hw);
+#endif
+		ret_val = -E1000_ERR_CONFIG;
+		if (ret_val)
+			goto out;
+#if 0
+		ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
+		if (ret_val)
+			goto out;
+
+		phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
+		                ? e1000_1000t_rx_status_ok
+		                : e1000_1000t_rx_status_not_ok;
+
+		phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
+		                 ? e1000_1000t_rx_status_ok
+		                 : e1000_1000t_rx_status_not_ok;
+#endif
+	} else {
+		phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
+		phy->local_rx = e1000_1000t_rx_status_undefined;
+		phy->remote_rx = e1000_1000t_rx_status_undefined;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_phy_sw_reset_generic - PHY software reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Does a software reset of the PHY by reading the PHY control register and
+ *  setting/write the control register reset bit to the PHY.
+ **/
+s32 igb_phy_sw_reset_generic(struct e1000_hw *hw)
+{
+	s32 ret_val = E1000_SUCCESS;
+	u16 phy_ctrl;
+
+	DEBUGFUNC("igb_phy_sw_reset_generic");
+
+	if (!(hw->phy.ops.read_reg))
+		goto out;
+
+	ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	phy_ctrl |= MII_CR_RESET;
+	ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
+	if (ret_val)
+		goto out;
+
+	usec_delay(1);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_phy_hw_reset_generic - PHY hardware reset
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify the reset block is not blocking us from resetting.  Acquire
+ *  semaphore (if necessary) and read/set/write the device control reset
+ *  bit in the PHY.  Wait the appropriate delay time for the device to
+ *  reset and release the semaphore (if necessary).
+ **/
+s32 igb_phy_hw_reset_generic(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl;
+
+	DEBUGFUNC("igb_phy_hw_reset_generic");
+
+	ret_val = phy->ops.check_reset_block(hw);
+	if (ret_val) {
+		ret_val = E1000_SUCCESS;
+		goto out;
+	}
+
+	ret_val = phy->ops.acquire(hw);
+	if (ret_val)
+		goto out;
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
+	E1000_WRITE_FLUSH(hw);
+
+	usec_delay(phy->reset_delay_us);
+
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+	E1000_WRITE_FLUSH(hw);
+
+	usec_delay(150);
+
+	phy->ops.release(hw);
+
+	ret_val = phy->ops.get_cfg_done(hw);
+
+out:
+	return ret_val;
+}
+
+/**
+ *  igb_get_cfg_done_generic - Generic configuration done
+ *  @hw: pointer to the HW structure
+ *
+ *  Generic function to wait 10 milli-seconds for configuration to complete
+ *  and return success.
+ **/
+s32 igb_get_cfg_done_generic(struct e1000_hw *hw __unused)
+{
+	DEBUGFUNC("igb_get_cfg_done_generic");
+
+	msec_delay_irq(10);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_phy_init_script_igp3 - Inits the IGP3 PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Initializes a Intel Gigabit PHY3 when an EEPROM is not present.
+ **/
+s32 igb_phy_init_script_igp3(struct e1000_hw *hw)
+{
+	DEBUGOUT("Running IGP 3 PHY init script\n");
+
+	/* PHY init IGP 3 */
+	/* Enable rise/fall, 10-mode work in class-A */
+	hw->phy.ops.write_reg(hw, 0x2F5B, 0x9018);
+	/* Remove all caps from Replica path filter */
+	hw->phy.ops.write_reg(hw, 0x2F52, 0x0000);
+	/* Bias trimming for ADC, AFE and Driver (Default) */
+	hw->phy.ops.write_reg(hw, 0x2FB1, 0x8B24);
+	/* Increase Hybrid poly bias */
+	hw->phy.ops.write_reg(hw, 0x2FB2, 0xF8F0);
+	/* Add 4% to Tx amplitude in Gig mode */
+	hw->phy.ops.write_reg(hw, 0x2010, 0x10B0);
+	/* Disable trimming (TTT) */
+	hw->phy.ops.write_reg(hw, 0x2011, 0x0000);
+	/* Poly DC correction to 94.6% + 2% for all channels */
+	hw->phy.ops.write_reg(hw, 0x20DD, 0x249A);
+	/* ABS DC correction to 95.9% */
+	hw->phy.ops.write_reg(hw, 0x20DE, 0x00D3);
+	/* BG temp curve trim */
+	hw->phy.ops.write_reg(hw, 0x28B4, 0x04CE);
+	/* Increasing ADC OPAMP stage 1 currents to max */
+	hw->phy.ops.write_reg(hw, 0x2F70, 0x29E4);
+	/* Force 1000 ( required for enabling PHY regs configuration) */
+	hw->phy.ops.write_reg(hw, 0x0000, 0x0140);
+	/* Set upd_freq to 6 */
+	hw->phy.ops.write_reg(hw, 0x1F30, 0x1606);
+	/* Disable NPDFE */
+	hw->phy.ops.write_reg(hw, 0x1F31, 0xB814);
+	/* Disable adaptive fixed FFE (Default) */
+	hw->phy.ops.write_reg(hw, 0x1F35, 0x002A);
+	/* Enable FFE hysteresis */
+	hw->phy.ops.write_reg(hw, 0x1F3E, 0x0067);
+	/* Fixed FFE for short cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F54, 0x0065);
+	/* Fixed FFE for medium cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F55, 0x002A);
+	/* Fixed FFE for long cable lengths */
+	hw->phy.ops.write_reg(hw, 0x1F56, 0x002A);
+	/* Enable Adaptive Clip Threshold */
+	hw->phy.ops.write_reg(hw, 0x1F72, 0x3FB0);
+	/* AHT reset limit to 1 */
+	hw->phy.ops.write_reg(hw, 0x1F76, 0xC0FF);
+	/* Set AHT master delay to 127 msec */
+	hw->phy.ops.write_reg(hw, 0x1F77, 0x1DEC);
+	/* Set scan bits for AHT */
+	hw->phy.ops.write_reg(hw, 0x1F78, 0xF9EF);
+	/* Set AHT Preset bits */
+	hw->phy.ops.write_reg(hw, 0x1F79, 0x0210);
+	/* Change integ_factor of channel A to 3 */
+	hw->phy.ops.write_reg(hw, 0x1895, 0x0003);
+	/* Change prop_factor of channels BCD to 8 */
+	hw->phy.ops.write_reg(hw, 0x1796, 0x0008);
+	/* Change cg_icount + enable integbp for channels BCD */
+	hw->phy.ops.write_reg(hw, 0x1798, 0xD008);
+	/*
+	 * Change cg_icount + enable integbp + change prop_factor_master
+	 * to 8 for channel A
+	 */
+	hw->phy.ops.write_reg(hw, 0x1898, 0xD918);
+	/* Disable AHT in Slave mode on channel A */
+	hw->phy.ops.write_reg(hw, 0x187A, 0x0800);
+	/*
+	 * Enable LPLU and disable AN to 1000 in non-D0a states,
+	 * Enable SPD+B2B
+	 */
+	hw->phy.ops.write_reg(hw, 0x0019, 0x008D);
+	/* Enable restart AN on an1000_dis change */
+	hw->phy.ops.write_reg(hw, 0x001B, 0x2080);
+	/* Enable wh_fifo read clock in 10/100 modes */
+	hw->phy.ops.write_reg(hw, 0x0014, 0x0045);
+	/* Restart AN, Speed selection is 1000 */
+	hw->phy.ops.write_reg(hw, 0x0000, 0x1340);
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  igb_get_phy_type_from_id - Get PHY type from id
+ *  @phy_id: phy_id read from the phy
+ *
+ *  Returns the phy type from the id.
+ **/
+enum e1000_phy_type igb_get_phy_type_from_id(u32 phy_id)
+{
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	switch (phy_id)	{
+	case M88E1000_I_PHY_ID:
+	case M88E1000_E_PHY_ID:
+	case M88E1111_I_PHY_ID:
+	case M88E1011_I_PHY_ID:
+		phy_type = e1000_phy_m88;
+		break;
+	case IGP01E1000_I_PHY_ID: /* IGP 1 & 2 share this */
+		phy_type = e1000_phy_igp_2;
+		break;
+	case GG82563_E_PHY_ID:
+		phy_type = e1000_phy_gg82563;
+		break;
+	case IGP03E1000_E_PHY_ID:
+		phy_type = e1000_phy_igp_3;
+		break;
+	case IFE_E_PHY_ID:
+	case IFE_PLUS_E_PHY_ID:
+	case IFE_C_E_PHY_ID:
+		phy_type = e1000_phy_ife;
+		break;
+	default:
+		phy_type = e1000_phy_unknown;
+		break;
+	}
+	return phy_type;
+}
+
+/**
+ *  igb_determine_phy_address - Determines PHY address.
+ *  @hw: pointer to the HW structure
+ *
+ *  This uses a trial and error method to loop through possible PHY
+ *  addresses. It tests each by reading the PHY ID registers and
+ *  checking for a match.
+ **/
+s32 igb_determine_phy_address(struct e1000_hw *hw)
+{
+	s32 ret_val = -E1000_ERR_PHY_TYPE;
+	u32 phy_addr = 0;
+	u32 i;
+	enum e1000_phy_type phy_type = e1000_phy_unknown;
+
+	hw->phy.id = phy_type;
+
+	for (phy_addr = 0; phy_addr < E1000_MAX_PHY_ADDR; phy_addr++) {
+		hw->phy.addr = phy_addr;
+		i = 0;
+
+		do {
+			igb_get_phy_id(hw);
+			phy_type = igb_get_phy_type_from_id(hw->phy.id);
+
+			/*
+			 * If phy_type is valid, break - we found our
+			 * PHY address
+			 */
+			if (phy_type  != e1000_phy_unknown) {
+				ret_val = E1000_SUCCESS;
+				goto out;
+			}
+			msec_delay(1);
+			i++;
+		} while (i < 10);
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ * igb_power_up_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void igb_power_up_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+	mii_reg &= ~MII_CR_POWER_DOWN;
+	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
+}
+
+/**
+ * igb_power_down_phy_copper - Restore copper link in case of PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, restore the link to previous
+ * settings.
+ **/
+void igb_power_down_phy_copper(struct e1000_hw *hw)
+{
+	u16 mii_reg = 0;
+
+	/* The PHY will retain its settings across a power down/up cycle */
+	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+	mii_reg |= MII_CR_POWER_DOWN;
+	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
+	msec_delay(1);
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_phy.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_phy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_phy.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_phy.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,171 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_PHY_H_
+#define _IGB_PHY_H_
+
+void igb_init_phy_ops_generic(struct e1000_hw *hw);
+s32  igb_check_downshift_generic(struct e1000_hw *hw);
+s32  igb_check_polarity_m88(struct e1000_hw *hw);
+s32  igb_check_polarity_igp(struct e1000_hw *hw);
+s32  igb_check_polarity_ife(struct e1000_hw *hw);
+s32  igb_check_reset_block_generic(struct e1000_hw *hw);
+s32  igb_copper_link_autoneg(struct e1000_hw *hw);
+s32  igb_copper_link_setup_igp(struct e1000_hw *hw);
+s32  igb_copper_link_setup_m88(struct e1000_hw *hw);
+#if 0
+s32  igb_phy_force_speed_duplex_igp(struct e1000_hw *hw);
+s32  igb_phy_force_speed_duplex_m88(struct e1000_hw *hw);
+s32  igb_phy_force_speed_duplex_ife(struct e1000_hw *hw);
+#endif
+#if 0
+s32  igb_get_cable_length_m88(struct e1000_hw *hw);
+s32  igb_get_cable_length_igp_2(struct e1000_hw *hw);
+#endif
+s32  igb_get_cfg_done_generic(struct e1000_hw *hw);
+s32  igb_get_phy_id(struct e1000_hw *hw);
+s32  igb_get_phy_info_igp(struct e1000_hw *hw);
+s32  igb_get_phy_info_m88(struct e1000_hw *hw);
+s32  igb_phy_sw_reset_generic(struct e1000_hw *hw);
+#if 0
+void igb_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
+#endif
+s32  igb_phy_hw_reset_generic(struct e1000_hw *hw);
+s32  igb_phy_reset_dsp_generic(struct e1000_hw *hw);
+s32  igb_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_set_d3_lplu_state_generic(struct e1000_hw *hw, bool active);
+s32  igb_setup_copper_link_generic(struct e1000_hw *hw);
+s32  igb_wait_autoneg_generic(struct e1000_hw *hw);
+s32  igb_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_phy_reset_dsp(struct e1000_hw *hw);
+s32  igb_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
+                                u32 usec_interval, bool *success);
+s32  igb_phy_init_script_igp3(struct e1000_hw *hw);
+enum e1000_phy_type igb_get_phy_type_from_id(u32 phy_id);
+s32  igb_determine_phy_address(struct e1000_hw *hw);
+void igb_power_up_phy_copper(struct e1000_hw *hw);
+void igb_power_down_phy_copper(struct e1000_hw *hw);
+s32  igb_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
+s32  igb_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  igb_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data);
+
+#define E1000_MAX_PHY_ADDR                4
+
+/* IGP01E1000 Specific Registers */
+#define IGP01E1000_PHY_PORT_CONFIG        0x10 /* Port Config */
+#define IGP01E1000_PHY_PORT_STATUS        0x11 /* Status */
+#define IGP01E1000_PHY_PORT_CTRL          0x12 /* Control */
+#define IGP01E1000_PHY_LINK_HEALTH        0x13 /* PHY Link Health */
+#define IGP01E1000_GMII_FIFO              0x14 /* GMII FIFO */
+#define IGP01E1000_PHY_CHANNEL_QUALITY    0x15 /* PHY Channel Quality */
+#define IGP02E1000_PHY_POWER_MGMT         0x19 /* Power Management */
+#define IGP01E1000_PHY_PAGE_SELECT        0x1F /* Page Select */
+#define BM_PHY_PAGE_SELECT                22   /* Page Select for BM */
+#define IGP_PAGE_SHIFT                    5
+#define PHY_REG_MASK                      0x1F
+
+#define IGP01E1000_PHY_PCS_INIT_REG       0x00B4
+#define IGP01E1000_PHY_POLARITY_MASK      0x0078
+
+#define IGP01E1000_PSCR_AUTO_MDIX         0x1000
+#define IGP01E1000_PSCR_FORCE_MDI_MDIX    0x2000 /* 0=MDI, 1=MDIX */
+
+#define IGP01E1000_PSCFR_SMART_SPEED      0x0080
+
+/* Enable flexible speed on link-up */
+#define IGP01E1000_GMII_FLEX_SPD          0x0010
+#define IGP01E1000_GMII_SPD               0x0020 /* Enable SPD */
+
+#define IGP02E1000_PM_SPD                 0x0001 /* Smart Power Down */
+#define IGP02E1000_PM_D0_LPLU             0x0002 /* For D0a states */
+#define IGP02E1000_PM_D3_LPLU             0x0004 /* For all other states */
+
+#define IGP01E1000_PLHR_SS_DOWNGRADE      0x8000
+
+#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
+#define IGP01E1000_PSSR_MDIX              0x0800
+#define IGP01E1000_PSSR_SPEED_MASK        0xC000
+#define IGP01E1000_PSSR_SPEED_1000MBPS    0xC000
+
+#define IGP02E1000_PHY_CHANNEL_NUM        4
+#define IGP02E1000_PHY_AGC_A              0x11B1
+#define IGP02E1000_PHY_AGC_B              0x12B1
+#define IGP02E1000_PHY_AGC_C              0x14B1
+#define IGP02E1000_PHY_AGC_D              0x18B1
+
+#define IGP02E1000_AGC_LENGTH_SHIFT       9   /* Course - 15:13, Fine - 12:9 */
+#define IGP02E1000_AGC_LENGTH_MASK        0x7F
+#define IGP02E1000_AGC_RANGE              15
+
+#define IGP03E1000_PHY_MISC_CTRL          0x1B
+#define IGP03E1000_PHY_MISC_DUPLEX_MANUAL_SET  0x1000 /* Manually Set Duplex */
+
+#define E1000_CABLE_LENGTH_UNDEFINED      0xFF
+
+#define E1000_KMRNCTRLSTA_OFFSET          0x001F0000
+#define E1000_KMRNCTRLSTA_OFFSET_SHIFT    16
+#define E1000_KMRNCTRLSTA_REN             0x00200000
+#define E1000_KMRNCTRLSTA_DIAG_OFFSET     0x3    /* Kumeran Diagnostic */
+#define E1000_KMRNCTRLSTA_TIMEOUTS        0x4    /* Kumeran Timeouts */
+#define E1000_KMRNCTRLSTA_INBAND_PARAM    0x9    /* Kumeran InBand Parameters */
+#define E1000_KMRNCTRLSTA_DIAG_NELPBK     0x1000 /* Nearend Loopback mode */
+
+#define IFE_PHY_EXTENDED_STATUS_CONTROL 0x10
+#define IFE_PHY_SPECIAL_CONTROL     0x11 /* 100BaseTx PHY Special Control */
+#define IFE_PHY_SPECIAL_CONTROL_LED 0x1B /* PHY Special and LED Control */
+#define IFE_PHY_MDIX_CONTROL        0x1C /* MDI/MDI-X Control */
+
+/* IFE PHY Extended Status Control */
+#define IFE_PESC_POLARITY_REVERSED    0x0100
+
+/* IFE PHY Special Control */
+#define IFE_PSC_AUTO_POLARITY_DISABLE      0x0010
+#define IFE_PSC_FORCE_POLARITY             0x0020
+#define IFE_PSC_DISABLE_DYNAMIC_POWER_DOWN 0x0100
+
+/* IFE PHY Special Control and LED Control */
+#define IFE_PSCL_PROBE_MODE            0x0020
+#define IFE_PSCL_PROBE_LEDS_OFF        0x0006 /* Force LEDs 0 and 2 off */
+#define IFE_PSCL_PROBE_LEDS_ON         0x0007 /* Force LEDs 0 and 2 on */
+
+/* IFE PHY MDIX Control */
+#define IFE_PMC_MDIX_STATUS      0x0020 /* 1=MDI-X, 0=MDI */
+#define IFE_PMC_FORCE_MDIX       0x0040 /* 1=force MDI-X, 0=force MDI */
+#define IFE_PMC_AUTO_MDIX        0x0080 /* 1=enable auto MDI/MDI-X, 0=disable */
+
+#endif /* _IGB_PHY_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_regs.h ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_regs.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igb/igb_regs.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igb/igb_regs.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,486 @@
+/*******************************************************************************
+
+  Intel(R) Gigabit Ethernet Linux driver
+  Copyright(c) 2007-2009 Intel Corporation.
+
+  This program is free software; you can redistribute it and/or modify it
+  under the terms and conditions of the GNU General Public License,
+  version 2, as published by the Free Software Foundation.
+
+  This program is distributed in the hope it will be useful, but WITHOUT
+  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+  more details.
+
+  You should have received a copy of the GNU General Public License along with
+  this program; if not, write to the Free Software Foundation, Inc.,
+  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+
+  The full GNU General Public License is included in this distribution in
+  the file called "COPYING".
+
+  Contact Information:
+  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
+  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
+
+*******************************************************************************/
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _IGB_REGS_H_
+#define _IGB_REGS_H_
+
+#define E1000_CTRL     0x00000  /* Device Control - RW */
+#define E1000_CTRL_DUP 0x00004  /* Device Control Duplicate (Shadow) - RW */
+#define E1000_STATUS   0x00008  /* Device Status - RO */
+#define E1000_EECD     0x00010  /* EEPROM/Flash Control - RW */
+#define E1000_EERD     0x00014  /* EEPROM Read - RW */
+#define E1000_CTRL_EXT 0x00018  /* Extended Device Control - RW */
+#define E1000_FLA      0x0001C  /* Flash Access - RW */
+#define E1000_MDIC     0x00020  /* MDI Control - RW */
+#define E1000_SCTL     0x00024  /* SerDes Control - RW */
+#define E1000_FCAL     0x00028  /* Flow Control Address Low - RW */
+#define E1000_FCAH     0x0002C  /* Flow Control Address High -RW */
+#define E1000_FEXT     0x0002C  /* Future Extended - RW */
+#define E1000_FEXTNVM  0x00028  /* Future Extended NVM - RW */
+#define E1000_FCT      0x00030  /* Flow Control Type - RW */
+#define E1000_CONNSW   0x00034  /* Copper/Fiber switch control - RW */
+#define E1000_VET      0x00038  /* VLAN Ether Type - RW */
+#define E1000_ICR      0x000C0  /* Interrupt Cause Read - R/clr */
+#define E1000_ITR      0x000C4  /* Interrupt Throttling Rate - RW */
+#define E1000_ICS      0x000C8  /* Interrupt Cause Set - WO */
+#define E1000_IMS      0x000D0  /* Interrupt Mask Set - RW */
+#define E1000_IMC      0x000D8  /* Interrupt Mask Clear - WO */
+#define E1000_IAM      0x000E0  /* Interrupt Acknowledge Auto Mask */
+#define E1000_RCTL     0x00100  /* Rx Control - RW */
+#define E1000_FCTTV    0x00170  /* Flow Control Transmit Timer Value - RW */
+#define E1000_TXCW     0x00178  /* Tx Configuration Word - RW */
+#define E1000_RXCW     0x00180  /* Rx Configuration Word - RO */
+#define E1000_EICR     0x01580  /* Ext. Interrupt Cause Read - R/clr */
+#define E1000_EITR(_n) (0x01680 + (0x4 * (_n)))
+#define E1000_EICS     0x01520  /* Ext. Interrupt Cause Set - W0 */
+#define E1000_EIMS     0x01524  /* Ext. Interrupt Mask Set/Read - RW */
+#define E1000_EIMC     0x01528  /* Ext. Interrupt Mask Clear - WO */
+#define E1000_EIAC     0x0152C  /* Ext. Interrupt Auto Clear - RW */
+#define E1000_EIAM     0x01530  /* Ext. Interrupt Ack Auto Clear Mask - RW */
+#define E1000_GPIE     0x01514  /* General Purpose Interrupt Enable - RW */
+#define E1000_IVAR0    0x01700  /* Interrupt Vector Allocation (array) - RW */
+#define E1000_IVAR_MISC 0x01740 /* IVAR for "other" causes - RW */
+#define E1000_TCTL     0x00400  /* Tx Control - RW */
+#define E1000_TCTL_EXT 0x00404  /* Extended Tx Control - RW */
+#define E1000_TIPG     0x00410  /* Tx Inter-packet gap -RW */
+#define E1000_TBT      0x00448  /* Tx Burst Timer - RW */
+#define E1000_AIT      0x00458  /* Adaptive Interframe Spacing Throttle - RW */
+#define E1000_LEDCTL   0x00E00  /* LED Control - RW */
+#define E1000_EXTCNF_CTRL  0x00F00  /* Extended Configuration Control */
+#define E1000_EXTCNF_SIZE  0x00F08  /* Extended Configuration Size */
+#define E1000_PHY_CTRL     0x00F10  /* PHY Control Register in CSR */
+#define E1000_PBA      0x01000  /* Packet Buffer Allocation - RW */
+#define E1000_PBS      0x01008  /* Packet Buffer Size */
+#define E1000_EEMNGCTL 0x01010  /* MNG EEprom Control */
+#define E1000_EEARBC   0x01024  /* EEPROM Auto Read Bus Control */
+#define E1000_FLASHT   0x01028  /* FLASH Timer Register */
+#define E1000_EEWR     0x0102C  /* EEPROM Write Register - RW */
+#define E1000_FLSWCTL  0x01030  /* FLASH control register */
+#define E1000_FLSWDATA 0x01034  /* FLASH data register */
+#define E1000_FLSWCNT  0x01038  /* FLASH Access Counter */
+#define E1000_FLOP     0x0103C  /* FLASH Opcode Register */
+#define E1000_I2CCMD   0x01028  /* SFPI2C Command Register - RW */
+#define E1000_I2CPARAMS 0x0102C /* SFPI2C Parameters Register - RW */
+#define E1000_WDSTP    0x01040  /* Watchdog Setup - RW */
+#define E1000_SWDSTS   0x01044  /* SW Device Status - RW */
+#define E1000_FRTIMER  0x01048  /* Free Running Timer - RW */
+#define E1000_TCPTIMER 0x0104C  /* TCP Timer - RW */
+#define E1000_VPDDIAG  0x01060  /* VPD Diagnostic - RO */
+#define E1000_ICR_V2   0x01500  /* Interrupt Cause - new location - RC */
+#define E1000_ICS_V2   0x01504  /* Interrupt Cause Set - new location - WO */
+#define E1000_IMS_V2   0x01508  /* Interrupt Mask Set/Read - new location - RW */
+#define E1000_IMC_V2   0x0150C  /* Interrupt Mask Clear - new location - WO */
+#define E1000_IAM_V2   0x01510  /* Interrupt Ack Auto Mask - new location - RW */
+#define E1000_ERT      0x02008  /* Early Rx Threshold - RW */
+#define E1000_FCRTL    0x02160  /* Flow Control Receive Threshold Low - RW */
+#define E1000_FCRTH    0x02168  /* Flow Control Receive Threshold High - RW */
+#define E1000_PSRCTL   0x02170  /* Packet Split Receive Control - RW */
+#define E1000_RDFPCQ(_n)  (0x02430 + (0x4 * (_n)))
+#define E1000_PBRTH    0x02458  /* PB Rx Arbitration Threshold - RW */
+#define E1000_FCRTV    0x02460  /* Flow Control Refresh Timer Value - RW */
+/* Split and Replication Rx Control - RW */
+#define E1000_RDPUMB   0x025CC  /* DMA Rx Descriptor uC Mailbox - RW */
+#define E1000_RDPUAD   0x025D0  /* DMA Rx Descriptor uC Addr Command - RW */
+#define E1000_RDPUWD   0x025D4  /* DMA Rx Descriptor uC Data Write - RW */
+#define E1000_RDPURD   0x025D8  /* DMA Rx Descriptor uC Data Read - RW */
+#define E1000_RDPUCTL  0x025DC  /* DMA Rx Descriptor uC Control - RW */
+#define E1000_PBDIAG   0x02458  /* Packet Buffer Diagnostic - RW */
+#define E1000_RXPBS    0x02404  /* Rx Packet Buffer Size - RW */
+#define E1000_RDTR     0x02820  /* Rx Delay Timer - RW */
+#define E1000_RADV     0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
+/*
+ * Convenience macros
+ *
+ * Note: "_n" is the queue number of the register to be written to.
+ *
+ * Example usage:
+ * E1000_RDBAL_REG(current_rx_queue)
+ */
+#define E1000_RDBAL(_n)      ((_n) < 4 ? (0x02800 + ((_n) * 0x100)) : \
+                                         (0x0C000 + ((_n) * 0x40)))
+#define E1000_RDBAH(_n)      ((_n) < 4 ? (0x02804 + ((_n) * 0x100)) : \
+                                         (0x0C004 + ((_n) * 0x40)))
+#define E1000_RDLEN(_n)      ((_n) < 4 ? (0x02808 + ((_n) * 0x100)) : \
+                                         (0x0C008 + ((_n) * 0x40)))
+#define E1000_SRRCTL(_n)     ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
+                                         (0x0C00C + ((_n) * 0x40)))
+#define E1000_RDH(_n)        ((_n) < 4 ? (0x02810 + ((_n) * 0x100)) : \
+                                         (0x0C010 + ((_n) * 0x40)))
+#define E1000_RXCTL(_n)      ((_n) < 4 ? (0x02814 + ((_n) * 0x100)) : \
+                                         (0x0C014 + ((_n) * 0x40)))
+#define E1000_DCA_RXCTRL(_n) E1000_RXCTL(_n)
+#define E1000_RDT(_n)        ((_n) < 4 ? (0x02818 + ((_n) * 0x100)) : \
+                                         (0x0C018 + ((_n) * 0x40)))
+#define E1000_RXDCTL(_n)     ((_n) < 4 ? (0x02828 + ((_n) * 0x100)) : \
+                                         (0x0C028 + ((_n) * 0x40)))
+#define E1000_RQDPC(_n)      ((_n) < 4 ? (0x02830 + ((_n) * 0x100)) : \
+                                         (0x0C030 + ((_n) * 0x40)))
+#define E1000_TDBAL(_n)      ((_n) < 4 ? (0x03800 + ((_n) * 0x100)) : \
+                                         (0x0E000 + ((_n) * 0x40)))
+#define E1000_TDBAH(_n)      ((_n) < 4 ? (0x03804 + ((_n) * 0x100)) : \
+                                         (0x0E004 + ((_n) * 0x40)))
+#define E1000_TDLEN(_n)      ((_n) < 4 ? (0x03808 + ((_n) * 0x100)) : \
+                                         (0x0E008 + ((_n) * 0x40)))
+#define E1000_TDH(_n)        ((_n) < 4 ? (0x03810 + ((_n) * 0x100)) : \
+                                         (0x0E010 + ((_n) * 0x40)))
+#define E1000_TXCTL(_n)      ((_n) < 4 ? (0x03814 + ((_n) * 0x100)) : \
+                                         (0x0E014 + ((_n) * 0x40)))
+#define E1000_DCA_TXCTRL(_n) E1000_TXCTL(_n)
+#define E1000_TDT(_n)        ((_n) < 4 ? (0x03818 + ((_n) * 0x100)) : \
+                                         (0x0E018 + ((_n) * 0x40)))
+#define E1000_TXDCTL(_n)     ((_n) < 4 ? (0x03828 + ((_n) * 0x100)) : \
+                                         (0x0E028 + ((_n) * 0x40)))
+#define E1000_TDWBAL(_n)     ((_n) < 4 ? (0x03838 + ((_n) * 0x100)) : \
+                                         (0x0E038 + ((_n) * 0x40)))
+#define E1000_TDWBAH(_n)     ((_n) < 4 ? (0x0383C + ((_n) * 0x100)) : \
+                                         (0x0E03C + ((_n) * 0x40)))
+#define E1000_TARC(_n)                   (0x03840 + ((_n) * 0x100))
+#define E1000_RSRPD    0x02C00  /* Rx Small Packet Detect - RW */
+#define E1000_RAID     0x02C08  /* Receive Ack Interrupt Delay - RW */
+#define E1000_TXDMAC   0x03000  /* Tx DMA Control - RW */
+#define E1000_KABGTXD  0x03004  /* AFE Band Gap Transmit Ref Data */
+#define E1000_PSRTYPE(_i)       (0x05480 + ((_i) * 4))
+#define E1000_RAL(_i)  (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
+                                       (0x054E0 + ((_i - 16) * 8)))
+#define E1000_RAH(_i)  (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
+                                       (0x054E4 + ((_i - 16) * 8)))
+#define E1000_IP4AT_REG(_i)     (0x05840 + ((_i) * 8))
+#define E1000_IP6AT_REG(_i)     (0x05880 + ((_i) * 4))
+#define E1000_WUPM_REG(_i)      (0x05A00 + ((_i) * 4))
+#define E1000_FFMT_REG(_i)      (0x09000 + ((_i) * 8))
+#define E1000_FFVT_REG(_i)      (0x09800 + ((_i) * 8))
+#define E1000_FFLT_REG(_i)      (0x05F00 + ((_i) * 8))
+#define E1000_PBSLAC   0x03100  /* Packet Buffer Slave Access Control */
+#define E1000_PBSLAD(_n)  (0x03110 + (0x4 * (_n)))  /* Packet Buffer DWORD (_n) */
+#define E1000_TXPBS    0x03404  /* Tx Packet Buffer Size - RW */
+#define E1000_TDFH     0x03410  /* Tx Data FIFO Head - RW */
+#define E1000_TDFT     0x03418  /* Tx Data FIFO Tail - RW */
+#define E1000_TDFHS    0x03420  /* Tx Data FIFO Head Saved - RW */
+#define E1000_TDFTS    0x03428  /* Tx Data FIFO Tail Saved - RW */
+#define E1000_TDFPC    0x03430  /* Tx Data FIFO Packet Count - RW */
+#define E1000_TDPUMB   0x0357C  /* DMA Tx Descriptor uC Mail Box - RW */
+#define E1000_TDPUAD   0x03580  /* DMA Tx Descriptor uC Addr Command - RW */
+#define E1000_TDPUWD   0x03584  /* DMA Tx Descriptor uC Data Write - RW */
+#define E1000_TDPURD   0x03588  /* DMA Tx Descriptor uC Data  Read  - RW */
+#define E1000_TDPUCTL  0x0358C  /* DMA Tx Descriptor uC Control - RW */
+#define E1000_DTXCTL   0x03590  /* DMA Tx Control - RW */
+#define E1000_DTXTCPFLGL 0x0359C /* DMA Tx Control flag low - RW */
+#define E1000_DTXTCPFLGH 0x035A0 /* DMA Tx Control flag high - RW */
+#define E1000_DTXMXSZRQ  0x03540 /* DMA Tx Max Total Allow Size Requests - RW */
+#define E1000_TIDV     0x03820  /* Tx Interrupt Delay Value - RW */
+#define E1000_TADV     0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
+#define E1000_TSPMT    0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+#define E1000_CRCERRS  0x04000  /* CRC Error Count - R/clr */
+#define E1000_ALGNERRC 0x04004  /* Alignment Error Count - R/clr */
+#define E1000_SYMERRS  0x04008  /* Symbol Error Count - R/clr */
+#define E1000_RXERRC   0x0400C  /* Receive Error Count - R/clr */
+#define E1000_MPC      0x04010  /* Missed Packet Count - R/clr */
+#define E1000_SCC      0x04014  /* Single Collision Count - R/clr */
+#define E1000_ECOL     0x04018  /* Excessive Collision Count - R/clr */
+#define E1000_MCC      0x0401C  /* Multiple Collision Count - R/clr */
+#define E1000_LATECOL  0x04020  /* Late Collision Count - R/clr */
+#define E1000_COLC     0x04028  /* Collision Count - R/clr */
+#define E1000_DC       0x04030  /* Defer Count - R/clr */
+#define E1000_TNCRS    0x04034  /* Tx-No CRS - R/clr */
+#define E1000_SEC      0x04038  /* Sequence Error Count - R/clr */
+#define E1000_CEXTERR  0x0403C  /* Carrier Extension Error Count - R/clr */
+#define E1000_RLEC     0x04040  /* Receive Length Error Count - R/clr */
+#define E1000_XONRXC   0x04048  /* XON Rx Count - R/clr */
+#define E1000_XONTXC   0x0404C  /* XON Tx Count - R/clr */
+#define E1000_XOFFRXC  0x04050  /* XOFF Rx Count - R/clr */
+#define E1000_XOFFTXC  0x04054  /* XOFF Tx Count - R/clr */
+#define E1000_FCRUC    0x04058  /* Flow Control Rx Unsupported Count- R/clr */
+#define E1000_PRC64    0x0405C  /* Packets Rx (64 bytes) - R/clr */
+#define E1000_PRC127   0x04060  /* Packets Rx (65-127 bytes) - R/clr */
+#define E1000_PRC255   0x04064  /* Packets Rx (128-255 bytes) - R/clr */
+#define E1000_PRC511   0x04068  /* Packets Rx (255-511 bytes) - R/clr */
+#define E1000_PRC1023  0x0406C  /* Packets Rx (512-1023 bytes) - R/clr */
+#define E1000_PRC1522  0x04070  /* Packets Rx (1024-1522 bytes) - R/clr */
+#define E1000_GPRC     0x04074  /* Good Packets Rx Count - R/clr */
+#define E1000_BPRC     0x04078  /* Broadcast Packets Rx Count - R/clr */
+#define E1000_MPRC     0x0407C  /* Multicast Packets Rx Count - R/clr */
+#define E1000_GPTC     0x04080  /* Good Packets Tx Count - R/clr */
+#define E1000_GORCL    0x04088  /* Good Octets Rx Count Low - R/clr */
+#define E1000_GORCH    0x0408C  /* Good Octets Rx Count High - R/clr */
+#define E1000_GOTCL    0x04090  /* Good Octets Tx Count Low - R/clr */
+#define E1000_GOTCH    0x04094  /* Good Octets Tx Count High - R/clr */
+#define E1000_RNBC     0x040A0  /* Rx No Buffers Count - R/clr */
+#define E1000_RUC      0x040A4  /* Rx Undersize Count - R/clr */
+#define E1000_RFC      0x040A8  /* Rx Fragment Count - R/clr */
+#define E1000_ROC      0x040AC  /* Rx Oversize Count - R/clr */
+#define E1000_RJC      0x040B0  /* Rx Jabber Count - R/clr */
+#define E1000_MGTPRC   0x040B4  /* Management Packets Rx Count - R/clr */
+#define E1000_MGTPDC   0x040B8  /* Management Packets Dropped Count - R/clr */
+#define E1000_MGTPTC   0x040BC  /* Management Packets Tx Count - R/clr */
+#define E1000_TORL     0x040C0  /* Total Octets Rx Low - R/clr */
+#define E1000_TORH     0x040C4  /* Total Octets Rx High - R/clr */
+#define E1000_TOTL     0x040C8  /* Total Octets Tx Low - R/clr */
+#define E1000_TOTH     0x040CC  /* Total Octets Tx High - R/clr */
+#define E1000_TPR      0x040D0  /* Total Packets Rx - R/clr */
+#define E1000_TPT      0x040D4  /* Total Packets Tx - R/clr */
+#define E1000_PTC64    0x040D8  /* Packets Tx (64 bytes) - R/clr */
+#define E1000_PTC127   0x040DC  /* Packets Tx (65-127 bytes) - R/clr */
+#define E1000_PTC255   0x040E0  /* Packets Tx (128-255 bytes) - R/clr */
+#define E1000_PTC511   0x040E4  /* Packets Tx (256-511 bytes) - R/clr */
+#define E1000_PTC1023  0x040E8  /* Packets Tx (512-1023 bytes) - R/clr */
+#define E1000_PTC1522  0x040EC  /* Packets Tx (1024-1522 Bytes) - R/clr */
+#define E1000_MPTC     0x040F0  /* Multicast Packets Tx Count - R/clr */
+#define E1000_BPTC     0x040F4  /* Broadcast Packets Tx Count - R/clr */
+#define E1000_TSCTC    0x040F8  /* TCP Segmentation Context Tx - R/clr */
+#define E1000_TSCTFC   0x040FC  /* TCP Segmentation Context Tx Fail - R/clr */
+#define E1000_IAC      0x04100  /* Interrupt Assertion Count */
+#define E1000_ICRXPTC  0x04104  /* Interrupt Cause Rx Pkt Timer Expire Count */
+#define E1000_ICRXATC  0x04108  /* Interrupt Cause Rx Abs Timer Expire Count */
+#define E1000_ICTXPTC  0x0410C  /* Interrupt Cause Tx Pkt Timer Expire Count */
+#define E1000_ICTXATC  0x04110  /* Interrupt Cause Tx Abs Timer Expire Count */
+#define E1000_ICTXQEC  0x04118  /* Interrupt Cause Tx Queue Empty Count */
+#define E1000_ICTXQMTC 0x0411C  /* Interrupt Cause Tx Queue Min Thresh Count */
+#define E1000_ICRXDMTC 0x04120  /* Interrupt Cause Rx Desc Min Thresh Count */
+#define E1000_ICRXOC   0x04124  /* Interrupt Cause Receiver Overrun Count */
+
+#define E1000_LSECTXUT        0x04300  /* LinkSec Tx Untagged Packet Count - OutPktsUntagged */
+#define E1000_LSECTXPKTE      0x04304  /* LinkSec Encrypted Tx Packets Count - OutPktsEncrypted */
+#define E1000_LSECTXPKTP      0x04308  /* LinkSec Protected Tx Packet Count - OutPktsProtected */
+#define E1000_LSECTXOCTE      0x0430C  /* LinkSec Encrypted Tx Octets Count - OutOctetsEncrypted */
+#define E1000_LSECTXOCTP      0x04310  /* LinkSec Protected Tx Octets Count - OutOctetsProtected */
+#define E1000_LSECRXUT        0x04314  /* LinkSec Untagged non-Strict Rx Packet Count - InPktsUntagged/InPktsNoTag */
+#define E1000_LSECRXOCTD      0x0431C  /* LinkSec Rx Octets Decrypted Count - InOctetsDecrypted */
+#define E1000_LSECRXOCTV      0x04320  /* LinkSec Rx Octets Validated - InOctetsValidated */
+#define E1000_LSECRXBAD       0x04324  /* LinkSec Rx Bad Tag - InPktsBadTag */
+#define E1000_LSECRXNOSCI     0x04328  /* LinkSec Rx Packet No SCI Count - InPktsNoSci */
+#define E1000_LSECRXUNSCI     0x0432C  /* LinkSec Rx Packet Unknown SCI Count - InPktsUnknownSci */
+#define E1000_LSECRXUNCH      0x04330  /* LinkSec Rx Unchecked Packets Count - InPktsUnchecked */
+#define E1000_LSECRXDELAY     0x04340  /* LinkSec Rx Delayed Packet Count - InPktsDelayed */
+#define E1000_LSECRXLATE      0x04350  /* LinkSec Rx Late Packets Count - InPktsLate */
+#define E1000_LSECRXOK(_n)    (0x04360 + (0x04 * (_n))) /* LinkSec Rx Packet OK Count - InPktsOk */
+#define E1000_LSECRXINV(_n)   (0x04380 + (0x04 * (_n))) /* LinkSec Rx Invalid Count - InPktsInvalid */
+#define E1000_LSECRXNV(_n)    (0x043A0 + (0x04 * (_n))) /* LinkSec Rx Not Valid Count - InPktsNotValid */
+#define E1000_LSECRXUNSA      0x043C0  /* LinkSec Rx Unused SA Count - InPktsUnusedSa */
+#define E1000_LSECRXNUSA      0x043D0  /* LinkSec Rx Not Using SA Count - InPktsNotUsingSa */
+#define E1000_LSECTXCAP       0x0B000  /* LinkSec Tx Capabilities Register - RO */
+#define E1000_LSECRXCAP       0x0B300  /* LinkSec Rx Capabilities Register - RO */
+#define E1000_LSECTXCTRL      0x0B004  /* LinkSec Tx Control - RW */
+#define E1000_LSECRXCTRL      0x0B304  /* LinkSec Rx Control - RW */
+#define E1000_LSECTXSCL       0x0B008  /* LinkSec Tx SCI Low - RW */
+#define E1000_LSECTXSCH       0x0B00C  /* LinkSec Tx SCI High - RW */
+#define E1000_LSECTXSA        0x0B010  /* LinkSec Tx SA0 - RW */
+#define E1000_LSECTXPN0       0x0B018  /* LinkSec Tx SA PN 0 - RW */
+#define E1000_LSECTXPN1       0x0B01C  /* LinkSec Tx SA PN 1 - RW */
+#define E1000_LSECRXSCL       0x0B3D0  /* LinkSec Rx SCI Low - RW */
+#define E1000_LSECRXSCH       0x0B3E0  /* LinkSec Rx SCI High - RW */
+#define E1000_LSECTXKEY0(_n)  (0x0B020 + (0x04 * (_n))) /* LinkSec Tx 128-bit Key 0 - WO */
+#define E1000_LSECTXKEY1(_n)  (0x0B030 + (0x04 * (_n))) /* LinkSec Tx 128-bit Key 1 - WO */
+#define E1000_LSECRXSA(_n)    (0x0B310 + (0x04 * (_n))) /* LinkSec Rx SAs - RW */
+#define E1000_LSECRXPN(_n)    (0x0B330 + (0x04 * (_n))) /* LinkSec Rx SAs - RW */
+/*
+ * LinkSec Rx Keys  - where _n is the SA no. and _m the 4 dwords of the 128 bit
+ * key - RW.
+ */
+#define E1000_LSECRXKEY(_n, _m) (0x0B350 + (0x10 * (_n)) + (0x04 * (_m)))
+
+#define E1000_SSVPC             0x041A0  /* Switch Security Violation Packet Count */
+#define E1000_IPSCTRL           0xB430   /* IpSec Control Register */
+#define E1000_IPSRXCMD          0x0B408  /* IPSec Rx Command Register - RW */
+#define E1000_IPSRXIDX          0x0B400  /* IPSec Rx Index - RW */
+#define E1000_IPSRXIPADDR(_n)   (0x0B420+ (0x04 * (_n)))  /* IPSec Rx IPv4/v6 Address - RW */
+#define E1000_IPSRXKEY(_n)      (0x0B410 + (0x04 * (_n))) /* IPSec Rx 128-bit Key - RW */
+#define E1000_IPSRXSALT         0x0B404  /* IPSec Rx Salt - RW */
+#define E1000_IPSRXSPI          0x0B40C  /* IPSec Rx SPI - RW */
+#define E1000_IPSTXKEY(_n)      (0x0B460 + (0x04 * (_n))) /* IPSec Tx 128-bit Key - RW */
+#define E1000_IPSTXSALT         0x0B454  /* IPSec Tx Salt - RW */
+#define E1000_IPSTXIDX          0x0B450  /* IPSec Tx SA IDX - RW */
+#define E1000_PCS_CFG0    0x04200  /* PCS Configuration 0 - RW */
+#define E1000_PCS_LCTL    0x04208  /* PCS Link Control - RW */
+#define E1000_PCS_LSTAT   0x0420C  /* PCS Link Status - RO */
+#define E1000_CBTMPC      0x0402C  /* Circuit Breaker Tx Packet Count */
+#define E1000_HTDPMC      0x0403C  /* Host Transmit Discarded Packets */
+#define E1000_CBRDPC      0x04044  /* Circuit Breaker Rx Dropped Count */
+#define E1000_CBRMPC      0x040FC  /* Circuit Breaker Rx Packet Count */
+#define E1000_RPTHC       0x04104  /* Rx Packets To Host */
+#define E1000_HGPTC       0x04118  /* Host Good Packets Tx Count */
+#define E1000_HTCBDPC     0x04124  /* Host Tx Circuit Breaker Dropped Count */
+#define E1000_HGORCL      0x04128  /* Host Good Octets Received Count Low */
+#define E1000_HGORCH      0x0412C  /* Host Good Octets Received Count High */
+#define E1000_HGOTCL      0x04130  /* Host Good Octets Transmit Count Low */
+#define E1000_HGOTCH      0x04134  /* Host Good Octets Transmit Count High */
+#define E1000_LENERRS     0x04138  /* Length Errors Count */
+#define E1000_SCVPC       0x04228  /* SerDes/SGMII Code Violation Pkt Count */
+#define E1000_HRMPC       0x0A018  /* Header Redirection Missed Packet Count */
+#define E1000_PCS_ANADV   0x04218  /* AN advertisement - RW */
+#define E1000_PCS_LPAB    0x0421C  /* Link Partner Ability - RW */
+#define E1000_PCS_NPTX    0x04220  /* AN Next Page Transmit - RW */
+#define E1000_PCS_LPABNP  0x04224  /* Link Partner Ability Next Page - RW */
+#define E1000_1GSTAT_RCV  0x04228  /* 1GSTAT Code Violation Packet Count - RW */
+#define E1000_RXCSUM   0x05000  /* Rx Checksum Control - RW */
+#define E1000_RLPML    0x05004  /* Rx Long Packet Max Length */
+#define E1000_RFCTL    0x05008  /* Receive Filter Control*/
+#define E1000_MTA      0x05200  /* Multicast Table Array - RW Array */
+#define E1000_RA       0x05400  /* Receive Address - RW Array */
+#define E1000_RA2      0x054E0  /* 2nd half of receive address array - RW Array */
+#define E1000_VFTA     0x05600  /* VLAN Filter Table Array - RW Array */
+#define E1000_VT_CTL   0x0581C  /* VMDq Control - RW */
+#define E1000_VFQA0    0x0B000  /* VLAN Filter Queue Array 0 - RW Array */
+#define E1000_VFQA1    0x0B200  /* VLAN Filter Queue Array 1 - RW Array */
+#define E1000_WUC      0x05800  /* Wakeup Control - RW */
+#define E1000_WUFC     0x05808  /* Wakeup Filter Control - RW */
+#define E1000_WUS      0x05810  /* Wakeup Status - RO */
+#define E1000_MANC     0x05820  /* Management Control - RW */
+#define E1000_IPAV     0x05838  /* IP Address Valid - RW */
+#define E1000_IP4AT    0x05840  /* IPv4 Address Table - RW Array */
+#define E1000_IP6AT    0x05880  /* IPv6 Address Table - RW Array */
+#define E1000_WUPL     0x05900  /* Wakeup Packet Length - RW */
+#define E1000_WUPM     0x05A00  /* Wakeup Packet Memory - RO A */
+#define E1000_PBACL    0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
+#define E1000_FFLT     0x05F00  /* Flexible Filter Length Table - RW Array */
+#define E1000_HOST_IF  0x08800  /* Host Interface */
+#define E1000_FFMT     0x09000  /* Flexible Filter Mask Table - RW Array */
+#define E1000_FFVT     0x09800  /* Flexible Filter Value Table - RW Array */
+#define E1000_FHFT(_n)  (0x09000 + (_n * 0x100)) /* Flexible Host Filter Table */
+#define E1000_FHFT_EXT(_n) (0x09A00 + (_n * 0x100)) /* Ext Flexible Host Filter Table */
+
+
+#define E1000_KMRNCTRLSTA 0x00034 /* MAC-PHY interface - RW */
+#define E1000_MDPHYA      0x0003C /* PHY address - RW */
+#define E1000_MANC2H      0x05860 /* Management Control To Host - RW */
+#define E1000_SW_FW_SYNC  0x05B5C /* Software-Firmware Synchronization - RW */
+#define E1000_CCMCTL      0x05B48 /* CCM Control Register */
+#define E1000_GIOCTL      0x05B44 /* GIO Analog Control Register */
+#define E1000_SCCTL       0x05B4C /* PCIc PLL Configuration Register */
+#define E1000_GCR         0x05B00 /* PCI-Ex Control */
+#define E1000_GCR2        0x05B64 /* PCI-Ex Control #2 */
+#define E1000_GSCL_1    0x05B10 /* PCI-Ex Statistic Control #1 */
+#define E1000_GSCL_2    0x05B14 /* PCI-Ex Statistic Control #2 */
+#define E1000_GSCL_3    0x05B18 /* PCI-Ex Statistic Control #3 */
+#define E1000_GSCL_4    0x05B1C /* PCI-Ex Statistic Control #4 */
+#define E1000_FACTPS    0x05B30 /* Function Active and Power State to MNG */
+#define E1000_SWSM      0x05B50 /* SW Semaphore */
+#define E1000_FWSM      0x05B54 /* FW Semaphore */
+#define E1000_SWSM2     0x05B58 /* Driver-only SW semaphore (not used by BOOT agents) */
+#define E1000_DCA_ID    0x05B70 /* DCA Requester ID Information - RO */
+#define E1000_DCA_CTRL  0x05B74 /* DCA Control - RW */
+#define E1000_FFLT_DBG  0x05F04 /* Debug Register */
+#define E1000_HICR      0x08F00 /* Host Interface Control */
+
+/* RSS registers */
+#define E1000_CPUVEC    0x02C10 /* CPU Vector Register - RW */
+#define E1000_MRQC      0x05818 /* Multiple Receive Control - RW */
+#define E1000_IMIR(_i)      (0x05A80 + ((_i) * 4))  /* Immediate Interrupt */
+#define E1000_IMIREXT(_i)   (0x05AA0 + ((_i) * 4))  /* Immediate Interrupt Ext*/
+#define E1000_IMIRVP    0x05AC0 /* Immediate Interrupt Rx VLAN Priority - RW */
+#define E1000_MSIXBM(_i)    (0x01600 + ((_i) * 4)) /* MSI-X Allocation Register
+                                                    * (_i) - RW */
+#define E1000_MSIXTADD(_i)  (0x0C000 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * low reg - RW */
+#define E1000_MSIXTUADD(_i) (0x0C004 + ((_i) * 0x10)) /* MSI-X Table entry addr
+                                                       * upper reg - RW */
+#define E1000_MSIXTMSG(_i)  (0x0C008 + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * message reg - RW */
+#define E1000_MSIXVCTRL(_i) (0x0C00C + ((_i) * 0x10)) /* MSI-X Table entry
+                                                       * vector ctrl reg - RW */
+#define E1000_MSIXPBA    0x0E000 /* MSI-X Pending bit array */
+#define E1000_RETA(_i)  (0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
+#define E1000_RSSRK(_i) (0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+#define E1000_RSSIM     0x05864 /* RSS Interrupt Mask */
+#define E1000_RSSIR     0x05868 /* RSS Interrupt Request */
+/* VT Registers */
+#define E1000_SWPBS     0x03004 /* Switch Packet Buffer Size - RW */
+#define E1000_MBVFICR   0x00C80 /* Mailbox VF Cause - RWC */
+#define E1000_MBVFIMR   0x00C84 /* Mailbox VF int Mask - RW */
+#define E1000_VFLRE     0x00C88 /* VF Register Events - RWC */
+#define E1000_VFRE      0x00C8C /* VF Receive Enables */
+#define E1000_VFTE      0x00C90 /* VF Transmit Enables */
+#define E1000_QDE       0x02408 /* Queue Drop Enable - RW */
+#define E1000_DTXSWC    0x03500 /* DMA Tx Switch Control - RW */
+#define E1000_RPLOLR    0x05AF0 /* Replication Offload - RW */
+#define E1000_UTA       0x0A000 /* Unicast Table Array - RW */
+#define E1000_IOVTCL    0x05BBC /* IOV Control Register */
+#define E1000_VMRCTL    0X05D80 /* Virtual Mirror Rule Control */
+/* These act per VF so an array friendly macro is used */
+#define E1000_V2PMAILBOX(_n)   (0x00C40 + (4 * (_n)))
+#define E1000_P2VMAILBOX(_n)   (0x00C00 + (4 * (_n)))
+#define E1000_VMBMEM(_n)       (0x00800 + (64 * (_n)))
+#define E1000_VFVMBMEM(_n)     (0x00800 + (_n))
+#define E1000_VMOLR(_n)        (0x05AD0 + (4 * (_n)))
+#define E1000_VLVF(_n)         (0x05D00 + (4 * (_n))) /* VLAN Virtual Machine
+                                                       * Filter - RW */
+/* Time Sync */
+#define E1000_TSYNCRXCTL 0x0B620 /* Rx Time Sync Control register - RW */
+#define E1000_TSYNCTXCTL 0x0B614 /* Tx Time Sync Control register - RW */
+#define E1000_TSYNCRXCFG 0x05F50 /* Time Sync Rx Configuration - RW */
+#define E1000_RXSTMPL    0x0B624 /* Rx timestamp Low - RO */
+#define E1000_RXSTMPH    0x0B628 /* Rx timestamp High - RO */
+#define E1000_RXSATRL    0x0B62C /* Rx timestamp attribute low - RO */
+#define E1000_RXSATRH    0x0B630 /* Rx timestamp attribute high - RO */
+#define E1000_TXSTMPL    0x0B618 /* Tx timestamp value Low - RO */
+#define E1000_TXSTMPH    0x0B61C /* Tx timestamp value High - RO */
+#define E1000_SYSTIML    0x0B600 /* System time register Low - RO */
+#define E1000_SYSTIMH    0x0B604 /* System time register High - RO */
+#define E1000_TIMINCA    0x0B608 /* Increment attributes register - RW */
+
+/* Filtering Registers */
+#define E1000_SAQF(_n)  (0x05980 + (4 * (_n))) /* Source Address Queue Fltr */
+#define E1000_DAQF(_n)  (0x059A0 + (4 * (_n))) /* Dest Address Queue Fltr */
+#define E1000_SPQF(_n)  (0x059C0 + (4 * (_n))) /* Source Port Queue Fltr */
+#define E1000_FTQF(_n)  (0x059E0 + (4 * (_n))) /* 5-tuple Queue Fltr */
+#define E1000_TTQF(_n)  (0x059E0 + (4 * (_n))) /* 2-tuple Queue Fltr */
+#define E1000_SYNQF(_n) (0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
+#define E1000_ETQF(_n)  (0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
+
+#define E1000_RTTDCS            0x3600  /* Reedtown Tx Desc plane control and status */
+#define E1000_RTTPCS            0x3474  /* Reedtown Tx Packet Plane control and status */
+#define E1000_RTRPCS            0x2474  /* Rx packet plane control and status */
+#define E1000_RTRUP2TC          0x05AC4 /* Rx User Priority to Traffic Class */
+#define E1000_RTTUP2TC          0x0418  /* Transmit User Priority to Traffic Class */
+#define E1000_RTTDTCRC(_n)      (0x3610 + ((_n) * 4)) /* Tx Desc plane TC Rate-scheduler config */
+#define E1000_RTTPTCRC(_n)      (0x3480 + ((_n) * 4)) /* Tx Packet plane TC Rate-Scheduler Config */
+#define E1000_RTRPTCRC(_n)      (0x2480 + ((_n) * 4)) /* Rx Packet plane TC Rate-Scheduler Config */
+#define E1000_RTTDTCRS(_n)      (0x3630 + ((_n) * 4)) /* Tx Desc Plane TC Rate-Scheduler Status */
+#define E1000_RTTDTCRM(_n)      (0x3650 + ((_n) * 4)) /* Tx Desc Plane TC Rate-Scheduler MMW */
+#define E1000_RTTPTCRS(_n)      (0x34A0 + ((_n) * 4)) /* Tx Packet plane TC Rate-Scheduler Status */
+#define E1000_RTTPTCRM(_n)      (0x34C0 + ((_n) * 4)) /* Tx Packet plane TC Rate-scheduler MMW */
+#define E1000_RTRPTCRS(_n)      (0x24A0 + ((_n) * 4)) /* Rx Packet plane TC Rate-Scheduler Status */
+#define E1000_RTRPTCRM(_n)      (0x24C0 + ((_n) * 4)) /* Rx Packet plane TC Rate-Scheduler MMW */
+#define E1000_RTTDVMRM(_n)      (0x3670 + ((_n) * 4)) /* Tx Desc plane VM Rate-Scheduler MMW*/
+#define E1000_RTTBCNRM(_n)      (0x3690 + ((_n) * 4)) /* Tx BCN Rate-Scheduler MMW */
+#define E1000_RTTDQSEL          0x3604  /* Tx Desc Plane Queue Select */
+#define E1000_RTTDVMRC          0x3608  /* Tx Desc Plane VM Rate-Scheduler Config */
+#define E1000_RTTDVMRS          0x360C  /* Tx Desc Plane VM Rate-Scheduler Status */
+#define E1000_RTTBCNRC          0x36B0  /* Tx BCN Rate-Scheduler Config */
+#define E1000_RTTBCNRS          0x36B4  /* Tx BCN Rate-Scheduler Status */
+#define E1000_RTTBCNCR          0xB200  /* Tx BCN Control Register */
+#define E1000_RTTBCNTG          0x35A4  /* Tx BCN Tagging */
+#define E1000_RTTBCNCP          0xB208  /* Tx BCN Congestion point */
+#define E1000_RTRBCNCR          0xB20C  /* Rx BCN Control Register */
+#define E1000_RTTBCNRD          0x36B8  /* Tx BCN Rate Drift */
+#define E1000_PFCTOP            0x1080  /* Priority Flow Control Type and Opcode */
+#define E1000_RTTBCNIDX         0xB204  /* Tx BCN Congestion Point */
+#define E1000_RTTBCNACH         0x0B214 /* Tx BCN Control High */
+#define E1000_RTTBCNACL         0x0B210 /* Tx BCN Control Low */
+
+#endif /* _IGB_REGS_H_ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_main.c ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_main.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_main.c	2012-01-06 23:49:04.000000000 +0000
@@ -942,8 +942,7 @@
 }
 
 static struct pci_device_id igbvf_pci_tbl[] = {
-	PCI_ROM(0x8086, 0x10CA, "igbvf", "E1000_DEV_ID_82576_VF", 0),
-	PCI_ROM(0x8086, 0x1520, "i350vf", "E1000_DEV_ID_I350_VF", 0),
+	PCI_ROM(0x8086, 0x10CA, "igbvf", "E1000_DEV_ID_82576_VF", 0)
 };
 
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_osdep.h ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_osdep.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_osdep.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_osdep.h	2012-01-06 23:49:04.000000000 +0000
@@ -56,6 +56,9 @@
     true = 1
 } boolean_t;
 
+#define TRUE  1
+#define FALSE 0
+
 #define usec_delay(x) udelay(x)
 #define msec_delay(x) mdelay(x)
 #define msec_delay_irq(x) mdelay(x)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_vf.h ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_vf.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/igbvf/igbvf_vf.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/igbvf/igbvf_vf.h	2012-01-06 23:49:04.000000000 +0000
@@ -54,7 +54,6 @@
 struct e1000_hw;
 
 #define E1000_DEV_ID_82576_VF                 0x10CA
-#define E1000_DEV_ID_I350_VF                  0x1520
 
 #define E1000_VF_INIT_TIMEOUT 200 /* Number of retries to clear RSTI */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intel.c ipxe-1.0.1~lliurex1505/src/drivers/net/intel.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intel.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/intel.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,972 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include "intel.h"
-
-/** @file
- *
- * Intel 10/100/1000 network card driver
- *
- */
-
-/******************************************************************************
- *
- * EEPROM interface
- *
- ******************************************************************************
- */
-
-/**
- * Read data from EEPROM
- *
- * @v nvs		NVS device
- * @v address		Address from which to read
- * @v data		Data buffer
- * @v len		Length of data buffer
- * @ret rc		Return status code
- */
-static int intel_read_eeprom ( struct nvs_device *nvs, unsigned int address,
-			       void *data, size_t len ) {
-	struct intel_nic *intel =
-		container_of ( nvs, struct intel_nic, eeprom );
-	unsigned int i;
-	uint32_t value;
-	uint16_t *data_word = data;
-
-	/* Sanity check.  We advertise a blocksize of one word, so
-	 * should only ever receive single-word requests.
-	 */
-	assert ( len == sizeof ( *data_word ) );
-
-	/* Initiate read */
-	writel ( ( INTEL_EERD_START | ( address << intel->eerd_addr_shift ) ),
-		 intel->regs + INTEL_EERD );
-
-	/* Wait for read to complete */
-	for ( i = 0 ; i < INTEL_EEPROM_MAX_WAIT_MS ; i++ ) {
-
-		/* If read is not complete, delay 1ms and retry */
-		value = readl ( intel->regs + INTEL_EERD );
-		if ( ! ( value & intel->eerd_done ) ) {
-			mdelay ( 1 );
-			continue;
-		}
-
-		/* Extract data */
-		*data_word = cpu_to_le16 ( INTEL_EERD_DATA ( value ) );
-		return 0;
-	}
-
-	DBGC ( intel, "INTEL %p timed out waiting for EEPROM read\n", intel );
-	return -ETIMEDOUT;
-}
-
-/**
- * Write data to EEPROM
- *
- * @v nvs		NVS device
- * @v address		Address to which to write
- * @v data		Data buffer
- * @v len		Length of data buffer
- * @ret rc		Return status code
- */
-static int intel_write_eeprom ( struct nvs_device *nvs,
-				unsigned int address __unused,
-				const void *data __unused,
-				size_t len __unused ) {
-	struct intel_nic *intel =
-		container_of ( nvs, struct intel_nic, eeprom );
-
-	DBGC ( intel, "INTEL %p EEPROM write not supported\n", intel );
-	return -ENOTSUP;
-}
-
-/**
- * Initialise EEPROM
- *
- * @v intel		Intel device
- * @ret rc		Return status code
- */
-static int intel_init_eeprom ( struct intel_nic *intel ) {
-	unsigned int i;
-	uint32_t value;
-
-	/* The NIC automatically detects the type of attached EEPROM.
-	 * The EERD register provides access to only a single word at
-	 * a time, so we pretend to have a single-word block size.
-	 *
-	 * The EEPROM size may be larger than the minimum size, but
-	 * this doesn't matter to us since we access only the first
-	 * few words.
-	 */
-	intel->eeprom.word_len_log2 = INTEL_EEPROM_WORD_LEN_LOG2;
-	intel->eeprom.size = INTEL_EEPROM_MIN_SIZE_WORDS;
-	intel->eeprom.block_size = 1;
-	intel->eeprom.read = intel_read_eeprom;
-	intel->eeprom.write = intel_write_eeprom;
-
-	/* The layout of the EERD register was changed at some point
-	 * to accommodate larger EEPROMs.  Read from address zero (for
-	 * which the request layouts are compatible) to determine
-	 * which type of register we have.
-	 */
-	writel ( INTEL_EERD_START, intel->regs + INTEL_EERD );
-	for ( i = 0 ; i < INTEL_EEPROM_MAX_WAIT_MS ; i++ ) {
-		value = readl ( intel->regs + INTEL_EERD );
-		if ( value & INTEL_EERD_DONE_LARGE ) {
-			DBGC ( intel, "INTEL %p has large-format EERD\n",
-			       intel );
-			intel->eerd_done = INTEL_EERD_DONE_LARGE;
-			intel->eerd_addr_shift = INTEL_EERD_ADDR_SHIFT_LARGE;
-			return 0;
-		}
-		if ( value & INTEL_EERD_DONE_SMALL ) {
-			DBGC ( intel, "INTEL %p has small-format EERD\n",
-			       intel );
-			intel->eerd_done = INTEL_EERD_DONE_SMALL;
-			intel->eerd_addr_shift = INTEL_EERD_ADDR_SHIFT_SMALL;
-			return 0;
-		}
-		mdelay ( 1 );
-	}
-
-	DBGC ( intel, "INTEL %p timed out waiting for initial EEPROM read "
-	       "(value %08x)\n", intel, value );
-	return -ETIMEDOUT;
-}
-
-/******************************************************************************
- *
- * MAC address
- *
- ******************************************************************************
- */
-
-/**
- * Fetch initial MAC address from EEPROM
- *
- * @v intel		Intel device
- * @v hw_addr		Hardware address to fill in
- * @ret rc		Return status code
- */
-static int intel_fetch_mac_eeprom ( struct intel_nic *intel,
-				    uint8_t *hw_addr ) {
-	int rc;
-
-	/* Initialise EEPROM */
-	if ( ( rc = intel_init_eeprom ( intel ) ) != 0 )
-		return rc;
-
-	/* Read base MAC address from EEPROM */
-	if ( ( rc = nvs_read ( &intel->eeprom, INTEL_EEPROM_MAC,
-			       hw_addr, ETH_ALEN ) ) != 0 ) {
-		DBGC ( intel, "INTEL %p could not read EEPROM base MAC "
-		       "address: %s\n", intel, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Adjust MAC address for multi-port devices */
-	hw_addr[ETH_ALEN-1] ^= intel->port;
-
-	DBGC ( intel, "INTEL %p has EEPROM MAC address %s (port %d)\n",
-	       intel, eth_ntoa ( hw_addr ), intel->port );
-	return 0;
-}
-
-/**
- * Fetch initial MAC address
- *
- * @v intel		Intel device
- * @v hw_addr		Hardware address to fill in
- * @ret rc		Return status code
- */
-static int intel_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
-	union intel_receive_address mac;
-	int rc;
-
-	/* Read current address from RAL0/RAH0 */
-	mac.reg.low = cpu_to_le32 ( readl ( intel->regs + INTEL_RAL0 ) );
-	mac.reg.high = cpu_to_le32 ( readl ( intel->regs + INTEL_RAH0 ) );
-	DBGC ( intel, "INTEL %p has autoloaded MAC address %s\n",
-	       intel, eth_ntoa ( mac.raw ) );
-
-	/* Try to read address from EEPROM */
-	if ( ( rc = intel_fetch_mac_eeprom ( intel, hw_addr ) ) == 0 )
-		return 0;
-
-	/* Use current address if valid */
-	if ( is_valid_ether_addr ( mac.raw ) ) {
-		memcpy ( hw_addr, mac.raw, ETH_ALEN );
-		return 0;
-	}
-
-	DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
-	return -ENOENT;
-}
-
-/******************************************************************************
- *
- * Diagnostics
- *
- ******************************************************************************
- */
-
-/**
- * Dump diagnostic information
- *
- * @v intel		Intel device
- */
-static void __attribute__ (( unused )) intel_diag ( struct intel_nic *intel ) {
-
-	DBGC ( intel, "INTEL %p TX %04x(%02x)/%04x(%02x) "
-	       "RX %04x(%02x)/%04x(%02x)\n", intel,
-	       ( intel->tx.cons & 0xffff ),
-	       readl ( intel->regs + intel->tx.reg + INTEL_xDH ),
-	       ( intel->tx.prod & 0xffff ),
-	       readl ( intel->regs + intel->tx.reg + INTEL_xDT ),
-	       ( intel->rx.cons & 0xffff ),
-	       readl ( intel->regs + intel->rx.reg + INTEL_xDH ),
-	       ( intel->rx.prod & 0xffff ),
-	       readl ( intel->regs + intel->rx.reg + INTEL_xDT ) );
-}
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset hardware
- *
- * @v intel		Intel device
- * @ret rc		Return status code
- */
-static int intel_reset ( struct intel_nic *intel ) {
-	uint32_t pbs;
-	uint32_t ctrl;
-	uint32_t status;
-
-	/* Force RX and TX packet buffer allocation, to work around an
-	 * errata in ICH devices.
-	 */
-	pbs = readl ( intel->regs + INTEL_PBS );
-	if ( ( pbs == 0x14 ) || ( pbs == 0x18 ) ) {
-		DBGC ( intel, "INTEL %p WARNING: applying ICH PBS/PBA errata\n",
-		       intel );
-		writel ( 0x08, intel->regs + INTEL_PBA );
-		writel ( 0x10, intel->regs + INTEL_PBS );
-	}
-
-	/* Always reset MAC.  Required to reset the TX and RX rings. */
-	ctrl = readl ( intel->regs + INTEL_CTRL );
-	writel ( ( ctrl | INTEL_CTRL_RST ), intel->regs + INTEL_CTRL );
-	mdelay ( INTEL_RESET_DELAY_MS );
-
-	/* Set a sensible default configuration */
-	ctrl |= ( INTEL_CTRL_SLU | INTEL_CTRL_ASDE );
-	ctrl &= ~( INTEL_CTRL_LRST | INTEL_CTRL_FRCSPD | INTEL_CTRL_FRCDPLX );
-	writel ( ctrl, intel->regs + INTEL_CTRL );
-	mdelay ( INTEL_RESET_DELAY_MS );
-
-	/* If link is already up, do not attempt to reset the PHY.  On
-	 * some models (notably ICH), performing a PHY reset seems to
-	 * drop the link speed to 10Mbps.
-	 */
-	status = readl ( intel->regs + INTEL_STATUS );
-	if ( status & INTEL_STATUS_LU ) {
-		DBGC ( intel, "INTEL %p MAC reset (ctrl %08x)\n",
-		       intel, ctrl );
-		return 0;
-	}
-
-	/* Reset PHY and MAC simultaneously */
-	writel ( ( ctrl | INTEL_CTRL_RST | INTEL_CTRL_PHY_RST ),
-		 intel->regs + INTEL_CTRL );
-	mdelay ( INTEL_RESET_DELAY_MS );
-
-	/* PHY reset is not self-clearing on all models */
-	writel ( ctrl, intel->regs + INTEL_CTRL );
-	mdelay ( INTEL_RESET_DELAY_MS );
-
-	DBGC ( intel, "INTEL %p MAC+PHY reset (ctrl %08x)\n", intel, ctrl );
-	return 0;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void intel_check_link ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t status;
-
-	/* Read link status */
-	status = readl ( intel->regs + INTEL_STATUS );
-	DBGC ( intel, "INTEL %p link status is %08x\n", intel, status );
-
-	/* Update network device */
-	if ( status & INTEL_STATUS_LU ) {
-		netdev_link_up ( netdev );
-	} else {
-		netdev_link_down ( netdev );
-	}
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Create descriptor ring
- *
- * @v intel		Intel device
- * @v ring		Descriptor ring
- * @ret rc		Return status code
- */
-int intel_create_ring ( struct intel_nic *intel, struct intel_ring *ring ) {
-	physaddr_t address;
-	uint32_t dctl;
-
-	/* Allocate descriptor ring.  Align ring on its own size to
-	 * prevent any possible page-crossing errors due to hardware
-	 * errata.
-	 */
-	ring->desc = malloc_dma ( ring->len, ring->len );
-	if ( ! ring->desc )
-		return -ENOMEM;
-
-	/* Initialise descriptor ring */
-	memset ( ring->desc, 0, ring->len );
-
-	/* Program ring address */
-	address = virt_to_bus ( ring->desc );
-	writel ( ( address & 0xffffffffUL ),
-		 ( intel->regs + ring->reg + INTEL_xDBAL ) );
-	if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
-		writel ( ( ( ( uint64_t ) address ) >> 32 ),
-			 ( intel->regs + ring->reg + INTEL_xDBAH ) );
-	} else {
-		writel ( 0, intel->regs + ring->reg + INTEL_xDBAH );
-	}
-
-	/* Program ring length */
-	writel ( ring->len, ( intel->regs + ring->reg + INTEL_xDLEN ) );
-
-	/* Reset head and tail pointers */
-	writel ( 0, ( intel->regs + ring->reg + INTEL_xDH ) );
-	writel ( 0, ( intel->regs + ring->reg + INTEL_xDT ) );
-
-	/* Enable ring */
-	dctl = readl ( intel->regs + ring->reg + INTEL_xDCTL );
-	dctl |= INTEL_xDCTL_ENABLE;
-	writel ( dctl, intel->regs + ring->reg + INTEL_xDCTL );
-
-	DBGC ( intel, "INTEL %p ring %05x is at [%08llx,%08llx)\n",
-	       intel, ring->reg, ( ( unsigned long long ) address ),
-	       ( ( unsigned long long ) address + ring->len ) );
-
-	return 0;
-}
-
-/**
- * Destroy descriptor ring
- *
- * @v intel		Intel device
- * @v ring		Descriptor ring
- */
-void intel_destroy_ring ( struct intel_nic *intel, struct intel_ring *ring ) {
-
-	/* Clear ring length */
-	writel ( 0, ( intel->regs + ring->reg + INTEL_xDLEN ) );
-
-	/* Clear ring address */
-	writel ( 0, ( intel->regs + ring->reg + INTEL_xDBAL ) );
-	writel ( 0, ( intel->regs + ring->reg + INTEL_xDBAH ) );
-
-	/* Free descriptor ring */
-	free_dma ( ring->desc, ring->len );
-	ring->desc = NULL;
-	ring->prod = 0;
-	ring->cons = 0;
-}
-
-/**
- * Refill receive descriptor ring
- *
- * @v intel		Intel device
- */
-void intel_refill_rx ( struct intel_nic *intel ) {
-	struct intel_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	unsigned int rx_tail;
-	physaddr_t address;
-
-	while ( ( intel->rx.prod - intel->rx.cons ) < INTEL_RX_FILL ) {
-
-		/* Allocate I/O buffer */
-		iobuf = alloc_iob ( INTEL_RX_MAX_LEN );
-		if ( ! iobuf ) {
-			/* Wait for next refill */
-			return;
-		}
-
-		/* Get next receive descriptor */
-		rx_idx = ( intel->rx.prod++ % INTEL_NUM_RX_DESC );
-		rx_tail = ( intel->rx.prod % INTEL_NUM_RX_DESC );
-		rx = &intel->rx.desc[rx_idx];
-
-		/* Populate receive descriptor */
-		address = virt_to_bus ( iobuf->data );
-		rx->address = cpu_to_le64 ( address );
-		rx->length = 0;
-		rx->status = 0;
-		rx->errors = 0;
-		wmb();
-
-		/* Record I/O buffer */
-		assert ( intel->rx_iobuf[rx_idx] == NULL );
-		intel->rx_iobuf[rx_idx] = iobuf;
-
-		/* Push descriptor to card */
-		writel ( rx_tail, intel->regs + intel->rx.reg + INTEL_xDT );
-
-		DBGC2 ( intel, "INTEL %p RX %d is [%llx,%llx)\n", intel, rx_idx,
-			( ( unsigned long long ) address ),
-			( ( unsigned long long ) address + INTEL_RX_MAX_LEN ) );
-	}
-}
-
-/**
- * Discard unused receive I/O buffers
- *
- * @v intel		Intel device
- */
-void intel_empty_rx ( struct intel_nic *intel ) {
-	unsigned int i;
-
-	for ( i = 0 ; i < INTEL_NUM_RX_DESC ; i++ ) {
-		if ( intel->rx_iobuf[i] )
-			free_iob ( intel->rx_iobuf[i] );
-		intel->rx_iobuf[i] = NULL;
-	}
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int intel_open ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	union intel_receive_address mac;
-	uint32_t tctl;
-	uint32_t rctl;
-	int rc;
-
-	/* Create transmit descriptor ring */
-	if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Create receive descriptor ring */
-	if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Program MAC address */
-	memset ( &mac, 0, sizeof ( mac ) );
-	memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
-	writel ( le32_to_cpu ( mac.reg.low ), intel->regs + INTEL_RAL0 );
-	writel ( ( le32_to_cpu ( mac.reg.high ) | INTEL_RAH0_AV ),
-		 intel->regs + INTEL_RAH0 );
-
-	/* Enable transmitter  */
-	tctl = readl ( intel->regs + INTEL_TCTL );
-	tctl &= ~( INTEL_TCTL_CT_MASK | INTEL_TCTL_COLD_MASK );
-	tctl |= ( INTEL_TCTL_EN | INTEL_TCTL_PSP | INTEL_TCTL_CT_DEFAULT |
-		  INTEL_TCTL_COLD_DEFAULT );
-	writel ( tctl, intel->regs + INTEL_TCTL );
-
-	/* Enable receiver */
-	rctl = readl ( intel->regs + INTEL_RCTL );
-	rctl &= ~( INTEL_RCTL_BSIZE_BSEX_MASK );
-	rctl |= ( INTEL_RCTL_EN | INTEL_RCTL_UPE | INTEL_RCTL_MPE |
-		  INTEL_RCTL_BAM | INTEL_RCTL_BSIZE_2048 | INTEL_RCTL_SECRC );
-	writel ( rctl, intel->regs + INTEL_RCTL );
-
-	/* Fill receive ring */
-	intel_refill_rx ( intel );
-
-	/* Update link state */
-	intel_check_link ( netdev );
-
-	return 0;
-
-	intel_destroy_ring ( intel, &intel->rx );
- err_create_rx:
-	intel_destroy_ring ( intel, &intel->tx );
- err_create_tx:
-	return rc;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void intel_close ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-
-	/* Disable receiver */
-	writel ( 0, intel->regs + INTEL_RCTL );
-
-	/* Disable transmitter  */
-	writel ( 0, intel->regs + INTEL_TCTL );
-
-	/* Destroy receive descriptor ring */
-	intel_destroy_ring ( intel, &intel->rx );
-
-	/* Discard any unused receive buffers */
-	intel_empty_rx ( intel );
-
-	/* Destroy transmit descriptor ring */
-	intel_destroy_ring ( intel, &intel->tx );
-
-	/* Reset the NIC, to flush the transmit and receive FIFOs */
-	intel_reset ( intel );
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-int intel_transmit ( struct net_device *netdev, struct io_buffer *iobuf ) {
-	struct intel_nic *intel = netdev->priv;
-	struct intel_descriptor *tx;
-	unsigned int tx_idx;
-	unsigned int tx_tail;
-	physaddr_t address;
-
-	/* Get next transmit descriptor */
-	if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_NUM_TX_DESC ) {
-		DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
-		return -ENOBUFS;
-	}
-	tx_idx = ( intel->tx.prod++ % INTEL_NUM_TX_DESC );
-	tx_tail = ( intel->tx.prod % INTEL_NUM_TX_DESC );
-	tx = &intel->tx.desc[tx_idx];
-
-	/* Populate transmit descriptor */
-	address = virt_to_bus ( iobuf->data );
-	tx->address = cpu_to_le64 ( address );
-	tx->length = cpu_to_le16 ( iob_len ( iobuf ) );
-	tx->command = ( INTEL_DESC_CMD_RS | INTEL_DESC_CMD_IFCS |
-			INTEL_DESC_CMD_EOP );
-	tx->status = 0;
-	wmb();
-
-	/* Notify card that there are packets ready to transmit */
-	writel ( tx_tail, intel->regs + intel->tx.reg + INTEL_xDT );
-
-	DBGC2 ( intel, "INTEL %p TX %d is [%llx,%llx)\n", intel, tx_idx,
-		( ( unsigned long long ) address ),
-		( ( unsigned long long ) address + iob_len ( iobuf ) ) );
-
-	return 0;
-}
-
-/**
- * Poll for completed packets
- *
- * @v netdev		Network device
- */
-void intel_poll_tx ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	struct intel_descriptor *tx;
-	unsigned int tx_idx;
-
-	/* Check for completed packets */
-	while ( intel->tx.cons != intel->tx.prod ) {
-
-		/* Get next transmit descriptor */
-		tx_idx = ( intel->tx.cons % INTEL_NUM_TX_DESC );
-		tx = &intel->tx.desc[tx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( ! ( tx->status & INTEL_DESC_STATUS_DD ) )
-			return;
-
-		DBGC2 ( intel, "INTEL %p TX %d complete\n", intel, tx_idx );
-
-		/* Complete TX descriptor */
-		netdev_tx_complete_next ( netdev );
-		intel->tx.cons++;
-	}
-}
-
-/**
- * Poll for received packets
- *
- * @v netdev		Network device
- */
-void intel_poll_rx ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	struct intel_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	size_t len;
-
-	/* Check for received packets */
-	while ( intel->rx.cons != intel->rx.prod ) {
-
-		/* Get next receive descriptor */
-		rx_idx = ( intel->rx.cons % INTEL_NUM_RX_DESC );
-		rx = &intel->rx.desc[rx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( ! ( rx->status & INTEL_DESC_STATUS_DD ) )
-			return;
-
-		/* Populate I/O buffer */
-		iobuf = intel->rx_iobuf[rx_idx];
-		intel->rx_iobuf[rx_idx] = NULL;
-		len = le16_to_cpu ( rx->length );
-		iob_put ( iobuf, len );
-
-		/* Hand off to network stack */
-		if ( rx->errors ) {
-			DBGC ( intel, "INTEL %p RX %d error (length %zd, "
-			       "errors %02x)\n",
-			       intel, rx_idx, len, rx->errors );
-			netdev_rx_err ( netdev, iobuf, -EIO );
-		} else {
-			DBGC2 ( intel, "INTEL %p RX %d complete (length %zd)\n",
-				intel, rx_idx, len );
-			netdev_rx ( netdev, iobuf );
-		}
-		intel->rx.cons++;
-	}
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void intel_poll ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t icr;
-
-	/* Check for and acknowledge interrupts */
-	icr = readl ( intel->regs + INTEL_ICR );
-	if ( ! icr )
-		return;
-
-	/* Poll for TX completions, if applicable */
-	if ( icr & INTEL_IRQ_TXDW )
-		intel_poll_tx ( netdev );
-
-	/* Poll for RX completions, if applicable */
-	if ( icr & ( INTEL_IRQ_RXT0 | INTEL_IRQ_RXO ) )
-		intel_poll_rx ( netdev );
-
-	/* Report receive overruns */
-	if ( icr & INTEL_IRQ_RXO )
-		netdev_rx_err ( netdev, NULL, -ENOBUFS );
-
-	/* Check link state, if applicable */
-	if ( icr & INTEL_IRQ_LSC )
-		intel_check_link ( netdev );
-
-	/* Refill RX ring */
-	intel_refill_rx ( intel );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void intel_irq ( struct net_device *netdev, int enable ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t mask;
-
-	mask = ( INTEL_IRQ_TXDW | INTEL_IRQ_LSC | INTEL_IRQ_RXT0 );
-	if ( enable ) {
-		writel ( mask, intel->regs + INTEL_IMS );
-	} else {
-		writel ( mask, intel->regs + INTEL_IMC );
-	}
-}
-
-/** Intel network device operations */
-static struct net_device_operations intel_operations = {
-	.open		= intel_open,
-	.close		= intel_close,
-	.transmit	= intel_transmit,
-	.poll		= intel_poll,
-	.irq		= intel_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int intel_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct intel_nic *intel;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *intel ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &intel_operations );
-	intel = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( intel, 0, sizeof ( *intel ) );
-	intel->port = PCI_FUNC ( pci->busdevfn );
-	intel_init_ring ( &intel->tx, INTEL_NUM_TX_DESC, INTEL_TD );
-	intel_init_ring ( &intel->rx, INTEL_NUM_RX_DESC, INTEL_RD );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	intel->regs = ioremap ( pci->membase, INTEL_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = intel_reset ( intel ) ) != 0 )
-		goto err_reset;
-
-	/* Fetch MAC address */
-	if ( ( rc = intel_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
-		goto err_fetch_mac;
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Set initial link state */
-	intel_check_link ( netdev );
-
-	return 0;
-
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_fetch_mac:
-	intel_reset ( intel );
- err_reset:
-	iounmap ( intel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void intel_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct intel_nic *intel = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset the NIC */
-	intel_reset ( intel );
-
-	/* Free network device */
-	iounmap ( intel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Intel PCI device IDs */
-static struct pci_device_id intel_nics[] = {
-	PCI_ROM ( 0x8086, 0x0438, "dh8900cc", "DH8900CC", 0 ),
-	PCI_ROM ( 0x8086, 0x043a, "dh8900cc-f", "DH8900CC Fiber", 0 ),
-	PCI_ROM ( 0x8086, 0x043c, "dh8900cc-b", "DH8900CC Backplane", 0 ),
-	PCI_ROM ( 0x8086, 0x0440, "dh8900cc-s", "DH8900CC SFP", 0 ),
-	PCI_ROM ( 0x8086, 0x1000, "82542-f", "82542 (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x1001, "82543gc-f", "82543GC (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x1004, "82543gc", "82543GC (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1008, "82544ei", "82544EI (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1009, "82544ei-f", "82544EI (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x100c, "82544gc", "82544GC (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x100d, "82544gc-l", "82544GC (LOM)", 0 ),
-	PCI_ROM ( 0x8086, 0x100e, "82540em", "82540EM", 0 ),
-	PCI_ROM ( 0x8086, 0x100f, "82545em", "82545EM (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1010, "82546eb", "82546EB (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1011, "82545em-f", "82545EM (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x1012, "82546eb-f", "82546EB (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x1013, "82541ei", "82541EI", 0 ),
-	PCI_ROM ( 0x8086, 0x1014, "82541er", "82541ER", 0 ),
-	PCI_ROM ( 0x8086, 0x1015, "82540em-l", "82540EM (LOM)", 0 ),
-	PCI_ROM ( 0x8086, 0x1016, "82540ep-m", "82540EP (Mobile)", 0 ),
-	PCI_ROM ( 0x8086, 0x1017, "82540ep", "82540EP", 0 ),
-	PCI_ROM ( 0x8086, 0x1018, "82541ei", "82541EI", 0 ),
-	PCI_ROM ( 0x8086, 0x1019, "82547ei", "82547EI", 0 ),
-	PCI_ROM ( 0x8086, 0x101a, "82547ei-m", "82547EI (Mobile)", 0 ),
-	PCI_ROM ( 0x8086, 0x101d, "82546eb", "82546EB", 0 ),
-	PCI_ROM ( 0x8086, 0x101e, "82540ep-m", "82540EP (Mobile)", 0 ),
-	PCI_ROM ( 0x8086, 0x1026, "82545gm", "82545GM", 0 ),
-	PCI_ROM ( 0x8086, 0x1027, "82545gm-1", "82545GM", 0 ),
-	PCI_ROM ( 0x8086, 0x1028, "82545gm-2", "82545GM", 0 ),
-	PCI_ROM ( 0x8086, 0x1049, "82566mm", "82566MM", 0 ),
-	PCI_ROM ( 0x8086, 0x104a, "82566dm", "82566DM", 0 ),
-	PCI_ROM ( 0x8086, 0x104b, "82566dc", "82566DC", 0 ),
-	PCI_ROM ( 0x8086, 0x104c, "82562v", "82562V 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x104d, "82566mc", "82566MC", 0 ),
-	PCI_ROM ( 0x8086, 0x105e, "82571eb", "82571EB", 0 ),
-	PCI_ROM ( 0x8086, 0x105f, "82571eb-1", "82571EB", 0 ),
-	PCI_ROM ( 0x8086, 0x1060, "82571eb-2", "82571EB", 0 ),
-	PCI_ROM ( 0x8086, 0x1075, "82547gi", "82547GI", 0 ),
-	PCI_ROM ( 0x8086, 0x1076, "82541gi", "82541GI", 0 ),
-	PCI_ROM ( 0x8086, 0x1077, "82541gi-1", "82541GI", 0 ),
-	PCI_ROM ( 0x8086, 0x1078, "82541er", "82541ER", 0 ),
-	PCI_ROM ( 0x8086, 0x1079, "82546gb", "82546GB", 0 ),
-	PCI_ROM ( 0x8086, 0x107a, "82546gb-1", "82546GB", 0 ),
-	PCI_ROM ( 0x8086, 0x107b, "82546gb-2", "82546GB", 0 ),
-	PCI_ROM ( 0x8086, 0x107c, "82541pi", "82541PI", 0 ),
-	PCI_ROM ( 0x8086, 0x107d, "82572ei", "82572EI (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x107e, "82572ei-f", "82572EI (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x107f, "82572ei", "82572EI", 0 ),
-	PCI_ROM ( 0x8086, 0x108a, "82546gb-3", "82546GB", 0 ),
-	PCI_ROM ( 0x8086, 0x108b, "82573v", "82573V (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x108c, "82573e", "82573E (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1096, "80003es2lan", "80003ES2LAN (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x1098, "80003es2lan-s", "80003ES2LAN (Serdes)", 0 ),
-	PCI_ROM ( 0x8086, 0x1099, "82546gb-4", "82546GB (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x109a, "82573l", "82573L", 0 ),
-	PCI_ROM ( 0x8086, 0x10a4, "82571eb", "82571EB", 0 ),
-	PCI_ROM ( 0x8086, 0x10a5, "82571eb", "82571EB (Fiber)", 0 ),
-	PCI_ROM ( 0x8086, 0x10a7, "82575eb", "82575EB", 0 ),
-	PCI_ROM ( 0x8086, 0x10a9, "82575eb", "82575EB Backplane", 0 ),
-	PCI_ROM ( 0x8086, 0x10b5, "82546gb", "82546GB (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x10b9, "82572ei", "82572EI (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x10ba, "80003es2lan", "80003ES2LAN (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x10bb, "80003es2lan", "80003ES2LAN (Serdes)", 0 ),
-	PCI_ROM ( 0x8086, 0x10bc, "82571eb", "82571EB (Copper)", 0 ),
-	PCI_ROM ( 0x8086, 0x10bd, "82566dm-2", "82566DM-2", 0 ),
-	PCI_ROM ( 0x8086, 0x10bf, "82567lf", "82567LF", 0 ),
-	PCI_ROM ( 0x8086, 0x10c0, "82562v-2", "82562V-2 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x10c2, "82562g-2", "82562G-2 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x10c3, "82562gt-2", "82562GT-2 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x10c4, "82562gt", "82562GT 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x10c5, "82562g", "82562G 10/100", 0 ),
-	PCI_ROM ( 0x8086, 0x10c9, "82576", "82576", 0 ),
-	PCI_ROM ( 0x8086, 0x10cb, "82567v", "82567V", 0 ),
-	PCI_ROM ( 0x8086, 0x10cc, "82567lm-2", "82567LM-2", 0 ),
-	PCI_ROM ( 0x8086, 0x10cd, "82567lf-2", "82567LF-2", 0 ),
-	PCI_ROM ( 0x8086, 0x10ce, "82567v-2", "82567V-2", 0 ),
-	PCI_ROM ( 0x8086, 0x10d3, "82574l", "82574L", 0 ),
-	PCI_ROM ( 0x8086, 0x10d5, "82571pt", "82571PT PT Quad", 0 ),
-	PCI_ROM ( 0x8086, 0x10d6, "82575gb", "82575GB", 0 ),
-	PCI_ROM ( 0x8086, 0x10d9, "82571eb-d", "82571EB Dual Mezzanine", 0 ),
-	PCI_ROM ( 0x8086, 0x10da, "82571eb-q", "82571EB Quad Mezzanine", 0 ),
-	PCI_ROM ( 0x8086, 0x10de, "82567lm-3", "82567LM-3", 0 ),
-	PCI_ROM ( 0x8086, 0x10df, "82567lf-3", "82567LF-3", 0 ),
-	PCI_ROM ( 0x8086, 0x10e5, "82567lm-4", "82567LM-4", 0 ),
-	PCI_ROM ( 0x8086, 0x10e6, "82576", "82576", 0 ),
-	PCI_ROM ( 0x8086, 0x10e7, "82576-2", "82576", 0 ),
-	PCI_ROM ( 0x8086, 0x10e8, "82576-3", "82576", 0 ),
-	PCI_ROM ( 0x8086, 0x10ea, "82577lm", "82577LM", 0 ),
-	PCI_ROM ( 0x8086, 0x10eb, "82577lc", "82577LC", 0 ),
-	PCI_ROM ( 0x8086, 0x10ef, "82578dm", "82578DM", 0 ),
-	PCI_ROM ( 0x8086, 0x10f0, "82578dc", "82578DC", 0 ),
-	PCI_ROM ( 0x8086, 0x10f5, "82567lm", "82567LM", 0 ),
-	PCI_ROM ( 0x8086, 0x10f6, "82574l", "82574L", 0 ),
-	PCI_ROM ( 0x8086, 0x1501, "82567v-3", "82567V-3", 0 ),
-	PCI_ROM ( 0x8086, 0x1502, "82579lm", "82579LM", 0 ),
-	PCI_ROM ( 0x8086, 0x1503, "82579v", "82579V", 0 ),
-	PCI_ROM ( 0x8086, 0x150a, "82576ns", "82576NS", 0 ),
-	PCI_ROM ( 0x8086, 0x150c, "82583v", "82583V", 0 ),
-	PCI_ROM ( 0x8086, 0x150d, "82576-4", "82576 Backplane", 0 ),
-	PCI_ROM ( 0x8086, 0x150e, "82580", "82580", 0 ),
-	PCI_ROM ( 0x8086, 0x150f, "82580-f", "82580 Fiber", 0 ),
-	PCI_ROM ( 0x8086, 0x1510, "82580-b", "82580 Backplane", 0 ),
-	PCI_ROM ( 0x8086, 0x1511, "82580-s", "82580 SFP", 0 ),
-	PCI_ROM ( 0x8086, 0x1516, "82580-2", "82580", 0 ),
-	PCI_ROM ( 0x8086, 0x1518, "82576ns", "82576NS SerDes", 0 ),
-	PCI_ROM ( 0x8086, 0x1521, "i350", "I350", 0 ),
-	PCI_ROM ( 0x8086, 0x1522, "i350-f", "I350 Fiber", 0 ),
-	PCI_ROM ( 0x8086, 0x1523, "i350-b", "I350 Backplane", 0 ),
-	PCI_ROM ( 0x8086, 0x1524, "i350-2", "I350", 0 ),
-	PCI_ROM ( 0x8086, 0x1525, "82567v-4", "82567V-4", 0 ),
-	PCI_ROM ( 0x8086, 0x1526, "82576-5", "82576", 0 ),
-	PCI_ROM ( 0x8086, 0x1527, "82580-f2", "82580 Fiber", 0 ),
-	PCI_ROM ( 0x8086, 0x1533, "i210", "I210", 0 ),
-	PCI_ROM ( 0x8086, 0x153b, "i217", "I217", 0 ),
-	PCI_ROM ( 0x8086, 0x294c, "82566dc-2", "82566DC-2", 0 ),
-	PCI_ROM ( 0x8086, 0x2e6e, "cemedia", "CE Media Processor", 0 ),
-};
-
-/** Intel PCI driver */
-struct pci_driver intel_driver __pci_driver = {
-	.ids = intel_nics,
-	.id_count = ( sizeof ( intel_nics ) / sizeof ( intel_nics[0] ) ),
-	.probe = intel_probe,
-	.remove = intel_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intel.h ipxe-1.0.1~lliurex1505/src/drivers/net/intel.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intel.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/intel.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,256 +0,0 @@
-#ifndef _INTEL_H
-#define _INTEL_H
-
-/** @file
- *
- * Intel 10/100/1000 network card driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/nvs.h>
-
-/** Intel BAR size */
-#define INTEL_BAR_SIZE ( 128 * 1024 )
-
-/** A packet descriptor */
-struct intel_descriptor {
-	/** Buffer address */
-	uint64_t address;
-	/** Length */
-	uint16_t length;
-	/** Reserved */
-	uint8_t reserved_a;
-	/** Command */
-	uint8_t command;
-	/** Status */
-	uint8_t status;
-	/** Errors */
-	uint8_t errors;
-	/** Reserved */
-	uint16_t reserved_b;
-} __attribute__ (( packed ));
-
-/** Packet descriptor command bits */
-enum intel_descriptor_command {
-	/** Report status */
-	INTEL_DESC_CMD_RS = 0x08,
-	/** Insert frame checksum (CRC) */
-	INTEL_DESC_CMD_IFCS = 0x02,
-	/** End of packet */
-	INTEL_DESC_CMD_EOP = 0x01,
-};
-
-/** Packet descriptor status bits */
-enum intel_descriptor_status {
-	/** Descriptor done */
-	INTEL_DESC_STATUS_DD = 0x01,
-};
-
-/** Device Control Register */
-#define INTEL_CTRL 0x00000UL
-#define INTEL_CTRL_LRST		0x00000008UL	/**< Link reset */
-#define INTEL_CTRL_ASDE		0x00000020UL	/**< Auto-speed detection */
-#define INTEL_CTRL_SLU		0x00000040UL	/**< Set link up */
-#define INTEL_CTRL_FRCSPD	0x00000800UL	/**< Force speed */
-#define INTEL_CTRL_FRCDPLX	0x00001000UL	/**< Force duplex */
-#define INTEL_CTRL_RST		0x04000000UL	/**< Device reset */
-#define INTEL_CTRL_PHY_RST	0x80000000UL	/**< PHY reset */
-
-/** Time to delay for device reset, in milliseconds */
-#define INTEL_RESET_DELAY_MS 20
-
-/** Device Status Register */
-#define INTEL_STATUS 0x00008UL
-#define INTEL_STATUS_LU		0x00000002UL	/**< Link up */
-
-/** EEPROM Read Register */
-#define INTEL_EERD 0x00014UL
-#define INTEL_EERD_START	0x00000001UL	/**< Start read */
-#define INTEL_EERD_DONE_SMALL	0x00000010UL	/**< Read done (small EERD) */
-#define INTEL_EERD_DONE_LARGE	0x00000002UL	/**< Read done (large EERD) */
-#define INTEL_EERD_ADDR_SHIFT_SMALL 8		/**< Address shift (small) */
-#define INTEL_EERD_ADDR_SHIFT_LARGE 2		/**< Address shift (large) */
-#define INTEL_EERD_DATA(value)	( (value) >> 16 ) /**< Read data */
-
-/** Maximum time to wait for EEPROM read, in milliseconds */
-#define INTEL_EEPROM_MAX_WAIT_MS 100
-
-/** EEPROM word length */
-#define INTEL_EEPROM_WORD_LEN_LOG2 1
-
-/** Minimum EEPROM size, in words */
-#define INTEL_EEPROM_MIN_SIZE_WORDS 64
-
-/** Offset of MAC address within EEPROM */
-#define INTEL_EEPROM_MAC 0x00
-
-/** Interrupt Cause Read Register */
-#define INTEL_ICR 0x000c0UL
-#define INTEL_IRQ_TXDW		0x00000001UL	/**< Transmit descriptor done */
-#define INTEL_IRQ_LSC		0x00000004UL	/**< Link status change */
-#define INTEL_IRQ_RXT0		0x00000080UL	/**< Receive timer */
-#define INTEL_IRQ_RXO		0x00000400UL	/**< Receive overrun */
-
-/** Interrupt Mask Set/Read Register */
-#define INTEL_IMS 0x000d0UL
-
-/** Interrupt Mask Clear Register */
-#define INTEL_IMC 0x000d8UL
-
-/** Receive Control Register */
-#define INTEL_RCTL 0x00100UL
-#define INTEL_RCTL_EN		0x00000002UL	/**< Receive enable */
-#define INTEL_RCTL_UPE		0x00000008UL	/**< Unicast promiscuous mode */
-#define INTEL_RCTL_MPE		0x00000010UL	/**< Multicast promiscuous */
-#define INTEL_RCTL_BAM		0x00008000UL	/**< Broadcast accept mode */
-#define INTEL_RCTL_BSIZE_BSEX(bsex,bsize) \
-	( ( (bsize) << 16 ) | ( (bsex) << 25 ) ) /**< Buffer size */
-#define INTEL_RCTL_BSIZE_2048	INTEL_RCTL_BSIZE_BSEX ( 0, 0 )
-#define INTEL_RCTL_BSIZE_BSEX_MASK INTEL_RCTL_BSIZE_BSEX ( 1, 3 )
-#define INTEL_RCTL_SECRC	0x04000000UL	/**< Strip CRC */
-
-/** Transmit Control Register */
-#define INTEL_TCTL 0x00400UL
-#define INTEL_TCTL_EN		0x00000002UL	/**< Transmit enable */
-#define INTEL_TCTL_PSP		0x00000008UL	/**< Pad short packets */
-#define INTEL_TCTL_CT(x)	( (x) << 4 )	/**< Collision threshold */
-#define INTEL_TCTL_CT_DEFAULT	INTEL_TCTL_CT ( 0x0f )
-#define INTEL_TCTL_CT_MASK	INTEL_TCTL_CT ( 0xff )
-#define INTEL_TCTL_COLD(x)	( (x) << 12 )	/**< Collision distance */
-#define INTEL_TCTL_COLD_DEFAULT	INTEL_TCTL_COLD ( 0x040 )
-#define INTEL_TCTL_COLD_MASK	INTEL_TCTL_COLD ( 0x3ff )
-
-/** Packet Buffer Allocation */
-#define INTEL_PBA 0x01000UL
-
-/** Packet Buffer Size */
-#define INTEL_PBS 0x01008UL
-
-/** Receive Descriptor register block */
-#define INTEL_RD 0x02800UL
-
-/** Number of receive descriptors
- *
- * Minimum value is 8, since the descriptor ring length must be a
- * multiple of 128.
- */
-#define INTEL_NUM_RX_DESC 8
-
-/** Receive descriptor ring fill level */
-#define INTEL_RX_FILL 4
-
-/** Receive buffer length */
-#define INTEL_RX_MAX_LEN 2048
-
-/** Transmit Descriptor register block */
-#define INTEL_TD 0x03800UL
-
-/** Number of transmit descriptors
- *
- * Descriptor ring length must be a multiple of 16.  ICH8/9/10
- * requires a minimum of 16 TX descriptors.
- */
-#define INTEL_NUM_TX_DESC 16
-
-/** Receive/Transmit Descriptor Base Address Low (offset) */
-#define INTEL_xDBAL 0x00
-
-/** Receive/Transmit Descriptor Base Address High (offset) */
-#define INTEL_xDBAH 0x04
-
-/** Receive/Transmit Descriptor Length (offset) */
-#define INTEL_xDLEN 0x08
-
-/** Receive/Transmit Descriptor Head (offset) */
-#define INTEL_xDH 0x10
-
-/** Receive/Transmit Descriptor Tail (offset) */
-#define INTEL_xDT 0x18
-
-/** Receive/Transmit Descriptor Control (offset) */
-#define INTEL_xDCTL 0x28
-#define INTEL_xDCTL_ENABLE	0x02000000UL	/**< Queue enable */
-
-/** Receive Address Low */
-#define INTEL_RAL0 0x05400UL
-
-/** Receive Address High */
-#define INTEL_RAH0 0x05404UL
-#define INTEL_RAH0_AV		0x80000000UL	/**< Address valid */
-
-/** Receive address */
-union intel_receive_address {
-	struct {
-		uint32_t low;
-		uint32_t high;
-	} __attribute__ (( packed )) reg;
-	uint8_t raw[ETH_ALEN];
-};
-
-/** An Intel descriptor ring */
-struct intel_ring {
-	/** Descriptors */
-	struct intel_descriptor *desc;
-	/** Producer index */
-	unsigned int prod;
-	/** Consumer index */
-	unsigned int cons;
-
-	/** Register block */
-	unsigned int reg;
-	/** Length (in bytes) */
-	size_t len;
-};
-
-/**
- * Initialise descriptor ring
- *
- * @v ring		Descriptor ring
- * @v count		Number of descriptors
- * @v reg		Descriptor register block
- */
-static inline __attribute__ (( always_inline)) void
-intel_init_ring ( struct intel_ring *ring, unsigned int count,
-		  unsigned int reg ) {
-	ring->len = ( count * sizeof ( ring->desc[0] ) );
-	ring->reg = reg;
-}
-
-/** An Intel network card */
-struct intel_nic {
-	/** Registers */
-	void *regs;
-	/** Port number (for multi-port devices) */
-	unsigned int port;
-
-	/** EEPROM */
-	struct nvs_device eeprom;
-	/** EEPROM done flag */
-	uint32_t eerd_done;
-	/** EEPROM address shift */
-	unsigned int eerd_addr_shift;
-
-	/** Transmit descriptor ring */
-	struct intel_ring tx;
-	/** Receive descriptor ring */
-	struct intel_ring rx;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_iobuf[INTEL_NUM_RX_DESC];
-};
-
-extern int intel_create_ring ( struct intel_nic *intel,
-			       struct intel_ring *ring );
-extern void intel_destroy_ring ( struct intel_nic *intel,
-				 struct intel_ring *ring );
-extern void intel_refill_rx ( struct intel_nic *intel );
-extern void intel_empty_rx ( struct intel_nic *intel );
-extern int intel_transmit ( struct net_device *netdev,
-			    struct io_buffer *iobuf );
-extern void intel_poll_tx ( struct net_device *netdev );
-extern void intel_poll_rx ( struct net_device *netdev );
-
-#endif /* _INTEL_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intelx.c ipxe-1.0.1~lliurex1505/src/drivers/net/intelx.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intelx.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/intelx.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,465 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include "intelx.h"
-
-/** @file
- *
- * Intel 10 Gigabit Ethernet network card driver
- *
- */
-
-/******************************************************************************
- *
- * MAC address
- *
- ******************************************************************************
- */
-
-/**
- * Try to fetch initial MAC address
- *
- * @v intel		Intel device
- * @v ral0		RAL0 register address
- * @v hw_addr		Hardware address to fill in
- * @ret rc		Return status code
- */
-static int intelx_try_fetch_mac ( struct intel_nic *intel, unsigned int ral0,
-				  uint8_t *hw_addr ) {
-	union intel_receive_address mac;
-
-	/* Read current address from RAL0/RAH0 */
-	mac.reg.low = cpu_to_le32 ( readl ( intel->regs + ral0 ) );
-	mac.reg.high = cpu_to_le32 ( readl ( intel->regs + ral0 +
-					     ( INTELX_RAH0 - INTELX_RAL0 ) ) );
-
-	/* Use current address if valid */
-	if ( is_valid_ether_addr ( mac.raw ) ) {
-		DBGC ( intel, "INTEL %p has autoloaded MAC address %s at "
-		       "%#05x\n", intel, eth_ntoa ( mac.raw ), ral0 );
-		memcpy ( hw_addr, mac.raw, ETH_ALEN );
-		return 0;
-	}
-
-	return -ENOENT;
-}
-
-/**
- * Fetch initial MAC address
- *
- * @v intel		Intel device
- * @v hw_addr		Hardware address to fill in
- * @ret rc		Return status code
- */
-static int intelx_fetch_mac ( struct intel_nic *intel, uint8_t *hw_addr ) {
-	int rc;
-
-	/* Try to fetch address from INTELX_RAL0 */
-	if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0,
-					   hw_addr ) ) == 0 ) {
-		return 0;
-	}
-
-	/* Try to fetch address from INTELX_RAL0_ALT */
-	if ( ( rc = intelx_try_fetch_mac ( intel, INTELX_RAL0_ALT,
-					   hw_addr ) ) == 0 ) {
-		return 0;
-	}
-
-	DBGC ( intel, "INTEL %p has no MAC address to use\n", intel );
-	return -ENOENT;
-}
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset hardware
- *
- * @v intel		Intel device
- * @ret rc		Return status code
- */
-static int intelx_reset ( struct intel_nic *intel ) {
-	uint32_t ctrl;
-
-	/* Perform a global software reset */
-	ctrl = readl ( intel->regs + INTELX_CTRL );
-	writel ( ( ctrl | INTELX_CTRL_RST | INTELX_CTRL_LRST ),
-		 intel->regs + INTELX_CTRL );
-	mdelay ( INTELX_RESET_DELAY_MS );
-
-	DBGC ( intel, "INTEL %p reset (ctrl %08x)\n", intel, ctrl );
-	return 0;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void intelx_check_link ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t links;
-
-	/* Read link status */
-	links = readl ( intel->regs + INTELX_LINKS );
-	DBGC ( intel, "INTEL %p link status is %08x\n", intel, links );
-
-	/* Update network device */
-	if ( links & INTELX_LINKS_UP ) {
-		netdev_link_up ( netdev );
-	} else {
-		netdev_link_down ( netdev );
-	}
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int intelx_open ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	union intel_receive_address mac;
-	uint32_t ral0;
-	uint32_t rah0;
-	uint32_t dmatxctl;
-	uint32_t fctrl;
-	uint32_t srrctl;
-	uint32_t hlreg0;
-	uint32_t maxfrs;
-	uint32_t rdrxctl;
-	uint32_t rxctrl;
-	uint32_t dca_rxctrl;
-	int rc;
-
-	/* Create transmit descriptor ring */
-	if ( ( rc = intel_create_ring ( intel, &intel->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Create receive descriptor ring */
-	if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Program MAC address */
-	memset ( &mac, 0, sizeof ( mac ) );
-	memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
-	ral0 = le32_to_cpu ( mac.reg.low );
-	rah0 = ( le32_to_cpu ( mac.reg.high ) | INTELX_RAH0_AV );
-	writel ( ral0, intel->regs + INTELX_RAL0 );
-	writel ( rah0, intel->regs + INTELX_RAH0 );
-	writel ( ral0, intel->regs + INTELX_RAL0_ALT );
-	writel ( rah0, intel->regs + INTELX_RAH0_ALT );
-
-	/* Allocate interrupt vectors */
-	writel ( ( INTELX_IVAR_RX0_DEFAULT | INTELX_IVAR_RX0_VALID |
-		   INTELX_IVAR_TX0_DEFAULT | INTELX_IVAR_TX0_VALID ),
-		 intel->regs + INTELX_IVAR );
-
-	/* Enable transmitter  */
-	dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
-	dmatxctl |= INTELX_DMATXCTL_TE;
-	writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
-
-	/* Configure receive filter */
-	fctrl = readl ( intel->regs + INTELX_FCTRL );
-	fctrl |= ( INTELX_FCTRL_BAM | INTELX_FCTRL_UPE | INTELX_FCTRL_MPE );
-	writel ( fctrl, intel->regs + INTELX_FCTRL );
-
-	/* Configure receive buffer sizes */
-	srrctl = readl ( intel->regs + INTELX_SRRCTL );
-	srrctl &= ~INTELX_SRRCTL_BSIZE_MASK;
-	srrctl |= INTELX_SRRCTL_BSIZE_DEFAULT;
-	writel ( srrctl, intel->regs + INTELX_SRRCTL );
-
-	/* Configure jumbo frames.  Required to allow the extra 4-byte
-	 * headroom for VLANs, since we don't use the hardware's
-	 * native VLAN offload.
-	 */
-	hlreg0 = readl ( intel->regs + INTELX_HLREG0 );
-	hlreg0 |= INTELX_HLREG0_JUMBOEN;
-	writel ( hlreg0, intel->regs + INTELX_HLREG0 );
-
-	/* Configure frame size */
-	maxfrs = readl ( intel->regs + INTELX_MAXFRS );
-	maxfrs &= ~INTELX_MAXFRS_MFS_MASK;
-	maxfrs |= INTELX_MAXFRS_MFS_DEFAULT;
-	writel ( maxfrs, intel->regs + INTELX_MAXFRS );
-
-	/* Configure receive DMA */
-	rdrxctl = readl ( intel->regs + INTELX_RDRXCTL );
-	rdrxctl |= INTELX_RDRXCTL_SECRC;
-	writel ( rdrxctl, intel->regs + INTELX_RDRXCTL );
-
-	/* Clear "must-be-zero" bit for direct cache access (DCA).  We
-	 * leave DCA disabled anyway, but if we do not clear this bit
-	 * then the received packets contain garbage data.
-	 */
-	dca_rxctrl = readl ( intel->regs + INTELX_DCA_RXCTRL );
-	dca_rxctrl &= ~INTELX_DCA_RXCTRL_MUST_BE_ZERO;
-	writel ( dca_rxctrl, intel->regs + INTELX_DCA_RXCTRL );
-
-	/* Enable receiver */
-	rxctrl = readl ( intel->regs + INTELX_RXCTRL );
-	rxctrl |= INTELX_RXCTRL_RXEN;
-	writel ( rxctrl, intel->regs + INTELX_RXCTRL );
-
-	/* Fill receive ring */
-	intel_refill_rx ( intel );
-
-	/* Update link state */
-	intelx_check_link ( netdev );
-
-	return 0;
-
-	intel_destroy_ring ( intel, &intel->rx );
- err_create_rx:
-	intel_destroy_ring ( intel, &intel->tx );
- err_create_tx:
-	return rc;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void intelx_close ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t rxctrl;
-	uint32_t dmatxctl;
-
-	/* Disable receiver */
-	rxctrl = readl ( intel->regs + INTELX_RXCTRL );
-	rxctrl &= ~INTELX_RXCTRL_RXEN;
-	writel ( rxctrl, intel->regs + INTELX_RXCTRL );
-
-	/* Disable transmitter  */
-	dmatxctl = readl ( intel->regs + INTELX_DMATXCTL );
-	dmatxctl &= ~INTELX_DMATXCTL_TE;
-	writel ( dmatxctl, intel->regs + INTELX_DMATXCTL );
-
-	/* Destroy receive descriptor ring */
-	intel_destroy_ring ( intel, &intel->rx );
-
-	/* Discard any unused receive buffers */
-	intel_empty_rx ( intel );
-
-	/* Destroy transmit descriptor ring */
-	intel_destroy_ring ( intel, &intel->tx );
-
-	/* Reset the NIC, to flush the transmit and receive FIFOs */
-	intelx_reset ( intel );
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void intelx_poll ( struct net_device *netdev ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t eicr;
-
-	/* Check for and acknowledge interrupts */
-	eicr = readl ( intel->regs + INTELX_EICR );
-	if ( ! eicr )
-		return;
-
-	/* Poll for TX completions, if applicable */
-	if ( eicr & INTELX_EIRQ_TX0 )
-		intel_poll_tx ( netdev );
-
-	/* Poll for RX completions, if applicable */
-	if ( eicr & ( INTELX_EIRQ_RX0 | INTELX_EIRQ_RXO ) )
-		intel_poll_rx ( netdev );
-
-	/* Report receive overruns */
-	if ( eicr & INTELX_EIRQ_RXO )
-		netdev_rx_err ( netdev, NULL, -ENOBUFS );
-
-	/* Check link state, if applicable */
-	if ( eicr & INTELX_EIRQ_LSC )
-		intelx_check_link ( netdev );
-
-	/* Refill RX ring */
-	intel_refill_rx ( intel );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void intelx_irq ( struct net_device *netdev, int enable ) {
-	struct intel_nic *intel = netdev->priv;
-	uint32_t mask;
-
-	mask = ( INTELX_EIRQ_LSC | INTELX_EIRQ_RXO | INTELX_EIRQ_TX0 |
-		 INTELX_EIRQ_RX0 );
-	if ( enable ) {
-		writel ( mask, intel->regs + INTELX_EIMS );
-	} else {
-		writel ( mask, intel->regs + INTELX_EIMC );
-	}
-}
-
-/** Network device operations */
-static struct net_device_operations intelx_operations = {
-	.open		= intelx_open,
-	.close		= intelx_close,
-	.transmit	= intel_transmit,
-	.poll		= intelx_poll,
-	.irq		= intelx_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int intelx_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct intel_nic *intel;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *intel ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &intelx_operations );
-	intel = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( intel, 0, sizeof ( *intel ) );
-	intel->port = PCI_FUNC ( pci->busdevfn );
-	intel_init_ring ( &intel->tx, INTEL_NUM_TX_DESC, INTELX_TD );
-	intel_init_ring ( &intel->rx, INTEL_NUM_RX_DESC, INTELX_RD );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	intel->regs = ioremap ( pci->membase, INTEL_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = intelx_reset ( intel ) ) != 0 )
-		goto err_reset;
-
-	/* Fetch MAC address */
-	if ( ( rc = intelx_fetch_mac ( intel, netdev->hw_addr ) ) != 0 )
-		goto err_fetch_mac;
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Set initial link state */
-	intelx_check_link ( netdev );
-
-	return 0;
-
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_fetch_mac:
-	intelx_reset ( intel );
- err_reset:
-	iounmap ( intel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void intelx_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct intel_nic *intel = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset the NIC */
-	intelx_reset ( intel );
-
-	/* Free network device */
-	iounmap ( intel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** PCI device IDs */
-static struct pci_device_id intelx_nics[] = {
-	PCI_ROM ( 0x8086, 0x10fb, "82599", "82599", 0 ),
-};
-
-/** PCI driver */
-struct pci_driver intelx_driver __pci_driver = {
-	.ids = intelx_nics,
-	.id_count = ( sizeof ( intelx_nics ) / sizeof ( intelx_nics[0] ) ),
-	.probe = intelx_probe,
-	.remove = intelx_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intelx.h ipxe-1.0.1~lliurex1505/src/drivers/net/intelx.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/intelx.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/intelx.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,114 +0,0 @@
-#ifndef _INTELX_H
-#define _INTELX_H
-
-/** @file
- *
- * Intel 10 Gigabit Ethernet network card driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/if_ether.h>
-#include "intel.h"
-
-/** Device Control Register */
-#define INTELX_CTRL 0x00000UL
-#define INTELX_CTRL_LRST	0x00000008UL	/**< Link reset */
-#define INTELX_CTRL_RST		0x04000000UL	/**< Device reset */
-
-/** Time to delay for device reset, in milliseconds */
-#define INTELX_RESET_DELAY_MS 20
-
-/** Extended Interrupt Cause Read Register */
-#define INTELX_EICR 0x00800UL
-#define INTELX_EIRQ_RX0		0x00000001UL	/**< RX0 (via IVAR) */
-#define INTELX_EIRQ_TX0		0x00000002UL	/**< RX0 (via IVAR) */
-#define INTELX_EIRQ_RXO		0x00020000UL	/**< Receive overrun */
-#define INTELX_EIRQ_LSC		0x00100000UL	/**< Link status change */
-
-/** Interrupt Mask Set/Read Register */
-#define INTELX_EIMS 0x00880UL
-
-/** Interrupt Mask Clear Register */
-#define INTELX_EIMC 0x00888UL
-
-/** Interrupt Vector Allocation Register */
-#define INTELX_IVAR 0x00900UL
-#define INTELX_IVAR_RX0(bit)	( (bit) << 0 )	/**< RX queue 0 allocation */
-#define INTELX_IVAR_RX0_DEFAULT	INTELX_IVAR_RX0 ( 0x00 )
-#define INTELX_IVAR_RX0_MASK	INTELX_IVAR_RX0 ( 0x3f )
-#define INTELX_IVAR_RX0_VALID	0x00000080UL	/**< RX queue 0 valid */
-#define INTELX_IVAR_TX0(bit)	( (bit) << 8 )	/**< TX queue 0 allocation */
-#define INTELX_IVAR_TX0_DEFAULT	INTELX_IVAR_TX0 ( 0x01 )
-#define INTELX_IVAR_TX0_MASK	INTELX_IVAR_TX0 ( 0x3f )
-#define INTELX_IVAR_TX0_VALID	0x00008000UL	/**< TX queue 0 valid */
-
-/** Receive Filter Control Register */
-#define INTELX_FCTRL 0x05080UL
-#define INTELX_FCTRL_MPE	0x00000100UL	/**< Multicast promiscuous */
-#define INTELX_FCTRL_UPE	0x00000200UL	/**< Unicast promiscuous mode */
-#define INTELX_FCTRL_BAM	0x00000400UL	/**< Broadcast accept mode */
-
-/** Receive Address Low
- *
- * The MAC address registers RAL0/RAH0 exist at address 0x05400 for
- * the 82598 and 0x0a200 for the 82599, according to the datasheet.
- * In practice, the 82599 seems to also provide a copy of these
- * registers at 0x05400.  To aim for maximum compatibility, we try
- * both addresses when reading the initial MAC address, and set both
- * addresses when setting the MAC address.
- */
-#define INTELX_RAL0 0x05400UL
-#define INTELX_RAL0_ALT 0x0a200UL
-
-/** Receive Address High */
-#define INTELX_RAH0 0x05404UL
-#define INTELX_RAH0_ALT 0x0a204UL
-#define INTELX_RAH0_AV		0x80000000UL	/**< Address valid */
-
-/** Receive Descriptor register block */
-#define INTELX_RD 0x01000UL
-
-/** Split Receive Control Register */
-#define INTELX_SRRCTL 0x02100UL
-#define INTELX_SRRCTL_BSIZE(kb)	( (kb) << 0 )	/**< Receive buffer size */
-#define INTELX_SRRCTL_BSIZE_DEFAULT INTELX_SRRCTL_BSIZE ( 0x02 )
-#define INTELX_SRRCTL_BSIZE_MASK INTELX_SRRCTL_BSIZE ( 0x1f )
-
-/** Receive DMA Control Register */
-#define INTELX_RDRXCTL 0x02f00UL
-#define INTELX_RDRXCTL_SECRC	0x00000001UL	/**< Strip CRC */
-
-/** Receive Control Register */
-#define INTELX_RXCTRL 0x03000UL
-#define INTELX_RXCTRL_RXEN	0x00000001UL	/**< Receive enable */
-
-/** Transmit DMA Control Register */
-#define INTELX_DMATXCTL 0x04a80UL
-#define INTELX_DMATXCTL_TE	0x00000001UL	/**< Transmit enable */
-
-/** Transmit Descriptor register block */
-#define INTELX_TD 0x06000UL
-
-/** RX DCA Control Register */
-#define INTELX_DCA_RXCTRL 0x02200UL
-#define INTELX_DCA_RXCTRL_MUST_BE_ZERO 0x00001000UL /**< Must be zero */
-
-/** MAC Core Control 0 Register */
-#define INTELX_HLREG0 0x04240UL
-#define INTELX_HLREG0_JUMBOEN	0x00000004UL	/**< Jumbo frame enable */
-
-/** Maximum Frame Size Register */
-#define INTELX_MAXFRS 0x04268UL
-#define INTELX_MAXFRS_MFS(len)	( (len) << 16 )	/**< Maximum frame size */
-#define INTELX_MAXFRS_MFS_DEFAULT \
-	INTELX_MAXFRS_MFS ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
-#define INTELX_MAXFRS_MFS_MASK	INTELX_MAXFRS_MFS ( 0xffff )
-
-/** Link Status Register */
-#define INTELX_LINKS 0x042a4UL
-#define INTELX_LINKS_UP		0x40000000UL	/**< Link up */
-
-#endif /* _INTELX_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ipoib.c ipxe-1.0.1~lliurex1505/src/drivers/net/ipoib.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ipoib.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ipoib.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,30 +13,24 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <stdlib.h>
 #include <stdio.h>
 #include <unistd.h>
 #include <string.h>
 #include <byteswap.h>
 #include <errno.h>
 #include <ipxe/errortab.h>
-#include <ipxe/malloc.h>
 #include <ipxe/if_arp.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/ethernet.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/netdevice.h>
 #include <ipxe/infiniband.h>
 #include <ipxe/ib_pathrec.h>
 #include <ipxe/ib_mcast.h>
-#include <ipxe/retry.h>
 #include <ipxe/ipoib.h>
 
 /** @file
@@ -63,8 +57,6 @@
 	struct ib_completion_queue *cq;
 	/** Queue pair */
 	struct ib_queue_pair *qp;
-	/** Local MAC */
-	struct ipoib_mac mac;
 	/** Broadcast MAC */
 	struct ipoib_mac broadcast;
 	/** Joined to IPv4 broadcast multicast group
@@ -75,8 +67,6 @@
 	int broadcast_joined;
 	/** IPv4 broadcast multicast group membership */
 	struct ib_mc_membership broadcast_membership;
-	/** REMAC cache */
-	struct list_head peers;
 };
 
 /** Broadcast IPoIB address */
@@ -98,140 +88,184 @@
 
 /****************************************************************************
  *
- * IPoIB REMAC cache
+ * IPoIB peer cache
  *
  ****************************************************************************
  */
 
-/** An IPoIB REMAC cache entry */
+/**
+ * IPoIB peer address
+ *
+ * The IPoIB link-layer header is only four bytes long and so does not
+ * have sufficient room to store IPoIB MAC address(es).  We therefore
+ * maintain a cache of MAC addresses identified by a single-byte key,
+ * and abuse the spare two bytes within the link-layer header to
+ * communicate these MAC addresses between the link-layer code and the
+ * netdevice driver.
+ */
 struct ipoib_peer {
-	/** List of REMAC cache entries */
-	struct list_head list;
-	/** Remote Ethermet MAC */
-	struct ipoib_remac remac;
+	/** Key */
+	uint8_t key;
 	/** MAC address */
 	struct ipoib_mac mac;
 };
 
+/** Number of IPoIB peer cache entries
+ *
+ * Must be a power of two.
+ */
+#define IPOIB_NUM_CACHED_PEERS 4
+
+/** IPoIB peer address cache */
+static struct ipoib_peer ipoib_peer_cache[IPOIB_NUM_CACHED_PEERS];
+
+/** Oldest IPoIB peer cache entry index */
+static unsigned int ipoib_peer_cache_idx = 0;
+
+/** IPoIB peer cache entry validity flag */
+#define IPOIB_PEER_KEY_VALID 0x80
+
 /**
- * Find IPoIB MAC from REMAC
+ * Look up cached peer by key
  *
- * @v ipoib		IPoIB device
- * @v remac		Remote Ethernet MAC
- * @ret mac		IPoIB MAC (or NULL if not found)
+ * @v key		Peer cache key
+ * @ret peer		Peer cache entry, or NULL
  */
-static struct ipoib_mac * ipoib_find_remac ( struct ipoib_device *ipoib,
-					     const struct ipoib_remac *remac ) {
+static struct ipoib_peer * ipoib_lookup_peer_by_key ( unsigned int key ) {
 	struct ipoib_peer *peer;
+	unsigned int i;
 
-	/* Check for broadcast REMAC */
-	if ( is_broadcast_ether_addr ( remac ) )
-		return &ipoib->broadcast;
-
-	/* Try to find via REMAC cache */
-	list_for_each_entry ( peer, &ipoib->peers, list ) {
-		if ( memcmp ( remac, &peer->remac,
-			      sizeof ( peer->remac ) ) == 0 ) {
-			/* Move peer to start of list */
-			list_del ( &peer->list );
-			list_add ( &peer->list, &ipoib->peers );
-			return &peer->mac;
-		}
+	if ( ! key )
+		return NULL;
+
+	for ( i = 0 ; i < IPOIB_NUM_CACHED_PEERS ; i++ ) {
+		peer = &ipoib_peer_cache[i];
+		if ( peer->key == key )
+			return peer;
 	}
 
-	DBGC ( ipoib, "IPoIB %p unknown REMAC %s\n",
-	       ipoib, eth_ntoa ( remac ) );
+	DBG ( "IPoIB warning: peer cache lost track of key %x while still in "
+	      "use\n", key );
 	return NULL;
 }
 
 /**
- * Add IPoIB MAC to REMAC cache
+ * Store GID and QPN in peer cache
  *
- * @v ipoib		IPoIB device
- * @v remac		Remote Ethernet MAC
- * @v mac		IPoIB MAC
- * @ret rc		Return status code
+ * @v mac		Peer MAC address
+ * @ret peer		Peer cache entry
  */
-static int ipoib_map_remac ( struct ipoib_device *ipoib,
-			     const struct ipoib_remac *remac,
-			     const struct ipoib_mac *mac ) {
+static struct ipoib_peer * ipoib_cache_peer ( const struct ipoib_mac *mac ) {
 	struct ipoib_peer *peer;
+	uint8_t key;
+	unsigned int i;
 
-	/* Check for existing entry in REMAC cache */
-	list_for_each_entry ( peer, &ipoib->peers, list ) {
-		if ( memcmp ( remac, &peer->remac,
-			      sizeof ( peer->remac ) ) == 0 ) {
-			/* Move peer to start of list */
-			list_del ( &peer->list );
-			list_add ( &peer->list, &ipoib->peers );
-			/* Update MAC */
-			memcpy ( &peer->mac, mac, sizeof ( peer->mac ) );
-			return 0;
-		}
+	/* Look for existing cache entry */
+	for ( i = 0 ; i < IPOIB_NUM_CACHED_PEERS ; i++ ) {
+		peer = &ipoib_peer_cache[i];
+		if ( memcmp ( &peer->mac, mac, sizeof ( peer->mac ) ) == 0 )
+			return peer;
 	}
 
-	/* Create new entry */
-	peer = malloc ( sizeof ( *peer ) );
-	if ( ! peer )
-		return -ENOMEM;
-	memcpy ( &peer->remac, remac, sizeof ( peer->remac ) );
-	memcpy ( &peer->mac, mac, sizeof ( peer->mac ) );
-	list_add ( &peer->list, &ipoib->peers );
+	/* No entry found: create a new one */
+	key = ( ipoib_peer_cache_idx++ | IPOIB_PEER_KEY_VALID );
+	peer = &ipoib_peer_cache[ key % IPOIB_NUM_CACHED_PEERS ];
+	if ( peer->key )
+		DBG ( "IPoIB peer %x evicted from cache\n", peer->key );
 
-	return 0;
+	memset ( peer, 0, sizeof ( *peer ) );
+	peer->key = key;
+	memcpy ( &peer->mac, mac, sizeof ( peer->mac ) );
+	DBG ( "IPoIB peer %x has MAC %s\n",
+	      peer->key, ipoib_ntoa ( &peer->mac ) );
+	return peer;
 }
 
+/****************************************************************************
+ *
+ * IPoIB link layer
+ *
+ ****************************************************************************
+ */
+
 /**
- * Flush REMAC cache
+ * Add IPoIB link-layer header
  *
- * @v ipoib		IPoIB device
+ * @v netdev		Network device
+ * @v iobuf		I/O buffer
+ * @v ll_dest		Link-layer destination address
+ * @v ll_source		Source link-layer address
+ * @v net_proto		Network-layer protocol, in network-byte order
+ * @ret rc		Return status code
  */
-static void ipoib_flush_remac ( struct ipoib_device *ipoib ) {
-	struct ipoib_peer *peer;
-	struct ipoib_peer *tmp;
+static int ipoib_push ( struct net_device *netdev __unused,
+			struct io_buffer *iobuf, const void *ll_dest,
+			const void *ll_source __unused, uint16_t net_proto ) {
+	struct ipoib_hdr *ipoib_hdr =
+		iob_push ( iobuf, sizeof ( *ipoib_hdr ) );
+	const struct ipoib_mac *dest_mac = ll_dest;
+	const struct ipoib_mac *src_mac = ll_source;
+	struct ipoib_peer *dest;
+	struct ipoib_peer *src;
+
+	/* Add link-layer addresses to cache */
+	dest = ipoib_cache_peer ( dest_mac );
+	src = ipoib_cache_peer ( src_mac );
 
-	list_for_each_entry_safe ( peer, tmp, &ipoib->peers, list ) {
-		list_del ( &peer->list );
-		free ( peer );
-	}
+	/* Build IPoIB header */
+	ipoib_hdr->proto = net_proto;
+	ipoib_hdr->u.peer.dest = dest->key;
+	ipoib_hdr->u.peer.src = src->key;
+
+	return 0;
 }
 
 /**
- * Discard some entries from the REMAC cache
+ * Remove IPoIB link-layer header
  *
- * @ret discarded	Number of cached items discarded
+ * @v netdev		Network device
+ * @v iobuf		I/O buffer
+ * @ret ll_dest		Link-layer destination address
+ * @ret ll_source	Source link-layer address
+ * @ret net_proto	Network-layer protocol, in network-byte order
+ * @ret flags		Packet flags
+ * @ret rc		Return status code
  */
-static unsigned int ipoib_discard_remac ( void ) {
-	struct ib_device *ibdev;
-	struct ipoib_device *ipoib;
-	struct ipoib_peer *peer;
-	unsigned int discarded = 0;
+static int ipoib_pull ( struct net_device *netdev,
+			struct io_buffer *iobuf, const void **ll_dest,
+			const void **ll_source, uint16_t *net_proto,
+			unsigned int *flags ) {
+	struct ipoib_device *ipoib = netdev->priv;
+	struct ipoib_hdr *ipoib_hdr = iobuf->data;
+	struct ipoib_peer *dest;
+	struct ipoib_peer *source;
 
-	/* Try to discard one cache entry for each IPoIB device */
-	for_each_ibdev ( ibdev ) {
-		ipoib = ib_get_ownerdata ( ibdev );
-		list_for_each_entry_reverse ( peer, &ipoib->peers, list ) {
-			list_del ( &peer->list );
-			free ( peer );
-			discarded++;
-			break;
-		}
+	/* Sanity check */
+	if ( iob_len ( iobuf ) < sizeof ( *ipoib_hdr ) ) {
+		DBG ( "IPoIB packet too short for link-layer header\n" );
+		DBG_HD ( iobuf->data, iob_len ( iobuf ) );
+		return -EINVAL;
 	}
 
-	return discarded;
-}
+	/* Strip off IPoIB header */
+	iob_pull ( iobuf, sizeof ( *ipoib_hdr ) );
 
-/** IPoIB cache discarder */
-struct cache_discarder ipoib_discarder __cache_discarder ( CACHE_NORMAL ) = {
-	.discard = ipoib_discard_remac,
-};
+	/* Identify source and destination addresses, and clear
+	 * reserved word in IPoIB header
+	 */
+	dest = ipoib_lookup_peer_by_key ( ipoib_hdr->u.peer.dest );
+	source = ipoib_lookup_peer_by_key ( ipoib_hdr->u.peer.src );
+	ipoib_hdr->u.reserved = 0;
+
+	/* Fill in required fields */
+	*ll_dest = ( dest ? &dest->mac : &ipoib->broadcast );
+	*ll_source = ( source ? &source->mac : &ipoib->broadcast );
+	*net_proto = ipoib_hdr->proto;
+	*flags = ( ( *ll_dest == &ipoib->broadcast ) ?
+		   ( LL_MULTICAST | LL_BROADCAST ) : 0 );
 
-/****************************************************************************
- *
- * IPoIB link layer
- *
- ****************************************************************************
- */
+	return 0;
+}
 
 /**
  * Initialise IPoIB link-layer address
@@ -240,206 +274,133 @@
  * @v ll_addr		Link-layer address
  */
 static void ipoib_init_addr ( const void *hw_addr, void *ll_addr ) {
-	const uint8_t *guid = hw_addr;
-	uint8_t *eth_addr = ll_addr;
-	uint8_t guid_mask = IPOIB_GUID_MASK;
-	unsigned int i;
+	const union ib_guid *guid = hw_addr;
+	struct ipoib_mac *mac = ll_addr;
 
-	/* Extract bytes from GUID according to mask */
-	for ( i = 0 ; i < 8 ; i++, guid++, guid_mask <<= 1 ) {
-		if ( guid_mask & 0x80 )
-			*(eth_addr++) = *guid;
-	}
+	memset ( mac, 0, sizeof ( *mac ) );
+	memcpy ( &mac->gid.s.guid, guid, sizeof ( mac->gid.s.guid ) );
 }
 
-/** IPoIB protocol */
-struct ll_protocol ipoib_protocol __ll_protocol = {
-	.name		= "IPoIB",
-	.ll_proto	= htons ( ARPHRD_ETHER ),
-	.hw_addr_len	= sizeof ( union ib_guid ),
-	.ll_addr_len	= ETH_ALEN,
-	.ll_header_len	= ETH_HLEN,
-	.push		= eth_push,
-	.pull		= eth_pull,
-	.init_addr	= ipoib_init_addr,
-	.ntoa		= eth_ntoa,
-	.mc_hash	= eth_mc_hash,
-	.eth_addr	= eth_eth_addr,
-	.eui64		= eth_eui64,
-	.flags		= LL_NAME_ONLY,
-};
-
 /**
- * Allocate IPoIB device
+ * Transcribe IPoIB link-layer address
  *
- * @v priv_size		Size of driver private data
- * @ret netdev		Network device, or NULL
+ * @v ll_addr	Link-layer address
+ * @ret string	Link-layer address in human-readable format
  */
-struct net_device * alloc_ipoibdev ( size_t priv_size ) {
-	struct net_device *netdev;
+const char * ipoib_ntoa ( const void *ll_addr ) {
+	static char buf[45];
+	const struct ipoib_mac *mac = ll_addr;
 
-	netdev = alloc_netdev ( priv_size );
-	if ( netdev ) {
-		netdev->ll_protocol = &ipoib_protocol;
-		netdev->ll_broadcast = eth_broadcast;
-		netdev->max_pkt_len = IB_MAX_PAYLOAD_SIZE;
-	}
-	return netdev;
+	snprintf ( buf, sizeof ( buf ), "%08x:%08x:%08x:%08x:%08x",
+		   htonl ( mac->flags__qpn ), htonl ( mac->gid.dwords[0] ),
+		   htonl ( mac->gid.dwords[1] ),
+		   htonl ( mac->gid.dwords[2] ),
+		   htonl ( mac->gid.dwords[3] ) );
+	return buf;
 }
 
-/****************************************************************************
- *
- * IPoIB translation layer
- *
- ****************************************************************************
- */
-
 /**
- * Translate transmitted ARP packet
+ * Hash multicast address
  *
- * @v netdev		Network device
- * @v iobuf		Packet to be transmitted (with no link-layer headers)
+ * @v af		Address family
+ * @v net_addr		Network-layer address
+ * @v ll_addr		Link-layer address to fill in
  * @ret rc		Return status code
  */
-static int ipoib_translate_tx_arp ( struct net_device *netdev,
-				    struct io_buffer *iobuf ) {
-	struct ipoib_device *ipoib = netdev->priv;
-	struct arphdr *arphdr = iobuf->data;
-	struct ipoib_mac *target_ha = NULL;
-	void *sender_pa;
-	void *target_pa;
-
-	/* Do nothing unless ARP contains eIPoIB link-layer addresses */
-	if ( arphdr->ar_hln != ETH_ALEN )
-		return 0;
-
-	/* Fail unless we have room to expand packet */
-	if ( iob_tailroom ( iobuf ) < ( 2 * ( sizeof ( ipoib->mac ) -
-					      ETH_ALEN ) ) ) {
-		DBGC ( ipoib, "IPoIB %p insufficient space in TX ARP\n",
-		       ipoib );
-		return -ENOBUFS;
-	}
-
-	/* Look up REMAC, if applicable */
-	if ( arphdr->ar_op == ARPOP_REPLY ) {
-		target_ha = ipoib_find_remac ( ipoib, arp_target_pa ( arphdr ));
-		if ( ! target_ha )
-			return -ENXIO;
-	}
-
-	/* Construct new packet */
-	iob_put ( iobuf, ( 2 * ( sizeof ( ipoib->mac ) - ETH_ALEN ) ) );
-	sender_pa = arp_sender_pa ( arphdr );
-	target_pa = arp_target_pa ( arphdr );
-	arphdr->ar_hrd = htons ( ARPHRD_INFINIBAND );
-	arphdr->ar_hln = sizeof ( ipoib->mac );
-	memcpy ( arp_target_pa ( arphdr ), target_pa, arphdr->ar_pln );
-	memcpy ( arp_sender_pa ( arphdr ), sender_pa, arphdr->ar_pln );
-	memcpy ( arp_sender_ha ( arphdr ), &ipoib->mac, sizeof ( ipoib->mac ) );
-	memset ( arp_target_ha ( arphdr ), 0, sizeof ( ipoib->mac ) );
-	if ( target_ha ) {
-		memcpy ( arp_target_ha ( arphdr ), target_ha,
-			 sizeof ( *target_ha ) );
-	}
+static int ipoib_mc_hash ( unsigned int af __unused,
+			   const void *net_addr __unused,
+			   void *ll_addr __unused ) {
 
-	return 0;
+	return -ENOTSUP;
 }
 
 /**
- * Translate transmitted packet
+ * Generate Mellanox Ethernet-compatible compressed link-layer address
  *
- * @v netdev		Network device
- * @v iobuf		Packet to be transmitted (with no link-layer headers)
- * @v net_proto		Network-layer protocol (in network byte order)
- * @ret rc		Return status code
+ * @v ll_addr		Link-layer address
+ * @v eth_addr		Ethernet-compatible address to fill in
  */
-static int ipoib_translate_tx ( struct net_device *netdev,
-				struct io_buffer *iobuf, uint16_t net_proto ) {
-
-	switch ( net_proto ) {
-	case htons ( ETH_P_ARP ) :
-		return ipoib_translate_tx_arp ( netdev, iobuf );
-	case htons ( ETH_P_IP ) :
-		/* No translation needed */
-		return 0;
-	default:
-		/* Cannot handle other traffic via eIPoIB */
-		return -ENOTSUP;
-	}
+static int ipoib_mlx_eth_addr ( const union ib_guid *guid,
+				uint8_t *eth_addr ) {
+	eth_addr[0] = ( ( guid->bytes[3] == 2 ) ? 0x00 : 0x02 );
+	eth_addr[1] = guid->bytes[1];
+	eth_addr[2] = guid->bytes[2];
+	eth_addr[3] = guid->bytes[5];
+	eth_addr[4] = guid->bytes[6];
+	eth_addr[5] = guid->bytes[7];
+	return 0;
 }
 
+/** An IPoIB Ethernet-compatible compressed link-layer address generator */
+struct ipoib_eth_addr_handler {
+	/** GUID byte 1 */
+	uint8_t byte1;
+	/** GUID byte 2 */
+	uint8_t byte2;
+	/** Handler */
+	int ( * eth_addr ) ( const union ib_guid *guid,
+			     uint8_t *eth_addr );
+};
+
+/** IPoIB Ethernet-compatible compressed link-layer address generators */
+static struct ipoib_eth_addr_handler ipoib_eth_addr_handlers[] = {
+	{ 0x02, 0xc9, ipoib_mlx_eth_addr },
+};
+
 /**
- * Translate received ARP packet
+ * Generate Ethernet-compatible compressed link-layer address
  *
- * @v netdev		Network device
- * @v iobuf		Received packet (with no link-layer headers)
- * @v remac		Constructed Remote Ethernet MAC
- * @ret rc		Return status code
+ * @v ll_addr		Link-layer address
+ * @v eth_addr		Ethernet-compatible address to fill in
  */
-static int ipoib_translate_rx_arp ( struct net_device *netdev,
-				    struct io_buffer *iobuf,
-				    struct ipoib_remac *remac ) {
-	struct ipoib_device *ipoib = netdev->priv;
-	struct arphdr *arphdr = iobuf->data;
-	void *sender_pa;
-	void *target_pa;
-	int rc;
-
-	/* Do nothing unless ARP contains IPoIB link-layer addresses */
-	if ( arphdr->ar_hln != sizeof ( ipoib->mac ) )
-		return 0;
-
-	/* Create REMAC cache entry */
-	if ( ( rc = ipoib_map_remac ( ipoib, remac,
-				      arp_sender_ha ( arphdr ) ) ) != 0 ) {
-		DBGC ( ipoib, "IPoIB %p could not map REMAC: %s\n",
-		       ipoib, strerror ( rc ) );
-		return rc;
-	}
+static int ipoib_eth_addr ( const void *ll_addr, void *eth_addr ) {
+	const struct ipoib_mac *ipoib_addr = ll_addr;
+	const union ib_guid *guid = &ipoib_addr->gid.s.guid;
+	struct ipoib_eth_addr_handler *handler;
+	unsigned int i;
 
-	/* Construct new packet */
-	sender_pa = arp_sender_pa ( arphdr );
-	target_pa = arp_target_pa ( arphdr );
-	arphdr->ar_hrd = htons ( ARPHRD_ETHER );
-	arphdr->ar_hln = ETH_ALEN;
-	memcpy ( arp_sender_pa ( arphdr ), sender_pa, arphdr->ar_pln );
-	memcpy ( arp_target_pa ( arphdr ), target_pa, arphdr->ar_pln );
-	memcpy ( arp_sender_ha ( arphdr ), remac, ETH_ALEN );
-	memset ( arp_target_ha ( arphdr ), 0, ETH_ALEN );
-	if ( arphdr->ar_op == ARPOP_REPLY ) {
-		/* Assume received replies were directed to us */
-		memcpy ( arp_target_ha ( arphdr ), netdev->ll_addr, ETH_ALEN );
+	for ( i = 0 ; i < ( sizeof ( ipoib_eth_addr_handlers ) /
+			    sizeof ( ipoib_eth_addr_handlers[0] ) ) ; i++ ) {
+		handler = &ipoib_eth_addr_handlers[i];
+		if ( ( handler->byte1 == guid->bytes[1] ) &&
+		     ( handler->byte2 == guid->bytes[2] ) ) {
+			return handler->eth_addr ( guid, eth_addr );
+		}
 	}
-	iob_unput ( iobuf, ( 2 * ( sizeof ( ipoib->mac ) - ETH_ALEN ) ) );
-
-	return 0;
+	return -ENOTSUP;
 }
 
+/** IPoIB protocol */
+struct ll_protocol ipoib_protocol __ll_protocol = {
+	.name		= "IPoIB",
+	.ll_proto	= htons ( ARPHRD_INFINIBAND ),
+	.hw_addr_len	= sizeof ( union ib_guid ),
+	.ll_addr_len	= IPOIB_ALEN,
+	.ll_header_len	= IPOIB_HLEN,
+	.push		= ipoib_push,
+	.pull		= ipoib_pull,
+	.init_addr	= ipoib_init_addr,
+	.ntoa		= ipoib_ntoa,
+	.mc_hash	= ipoib_mc_hash,
+	.eth_addr	= ipoib_eth_addr,
+};
+
 /**
- * Translate received packet
+ * Allocate IPoIB device
  *
- * @v netdev		Network device
- * @v iobuf		Received packet (with no link-layer headers)
- * @v remac		Constructed Remote Ethernet MAC
- * @v net_proto		Network-layer protocol (in network byte order)
- * @ret rc		Return status code
+ * @v priv_size		Size of driver private data
+ * @ret netdev		Network device, or NULL
  */
-static int ipoib_translate_rx ( struct net_device *netdev,
-				struct io_buffer *iobuf,
-				struct ipoib_remac *remac,
-				uint16_t net_proto ) {
-
-	switch ( net_proto ) {
-	case htons ( ETH_P_ARP ) :
-		return ipoib_translate_rx_arp ( netdev, iobuf, remac );
-	case htons ( ETH_P_IP ) :
-		/* No translation needed */
-		return 0;
-	default:
-		/* Cannot handle other traffic via eIPoIB */
-		return -ENOTSUP;
+struct net_device * alloc_ipoibdev ( size_t priv_size ) {
+	struct net_device *netdev;
+
+	netdev = alloc_netdev ( priv_size );
+	if ( netdev ) {
+		netdev->ll_protocol = &ipoib_protocol;
+		netdev->ll_broadcast = ( uint8_t * ) &ipoib_broadcast;
+		netdev->max_pkt_len = IB_MAX_PAYLOAD_SIZE;
 	}
+	return netdev;
 }
 
 /****************************************************************************
@@ -460,18 +421,17 @@
 			    struct io_buffer *iobuf ) {
 	struct ipoib_device *ipoib = netdev->priv;
 	struct ib_device *ibdev = ipoib->ibdev;
-	struct ethhdr *ethhdr;
 	struct ipoib_hdr *ipoib_hdr;
-	struct ipoib_mac *mac;
-	struct ib_address_vector dest;
-	uint16_t net_proto;
+	struct ipoib_peer *dest;
+	struct ib_address_vector av;
 	int rc;
 
 	/* Sanity check */
-	if ( iob_len ( iobuf ) < sizeof ( *ethhdr ) ) {
+	if ( iob_len ( iobuf ) < sizeof ( *ipoib_hdr ) ) {
 		DBGC ( ipoib, "IPoIB %p buffer too short\n", ipoib );
 		return -EINVAL;
 	}
+	ipoib_hdr = iobuf->data;
 
 	/* Attempting transmission while link is down will put the
 	 * queue pair into an error state, so don't try it.
@@ -479,36 +439,23 @@
 	if ( ! ib_link_ok ( ibdev ) )
 		return -ENETUNREACH;
 
-	/* Strip eIPoIB header */
-	ethhdr = iobuf->data;
-	net_proto = ethhdr->h_protocol;
-	iob_pull ( iobuf, sizeof ( *ethhdr ) );
-
 	/* Identify destination address */
-	mac = ipoib_find_remac ( ipoib, ( ( void *) ethhdr->h_dest ) );
-	if ( ! mac )
+	dest = ipoib_lookup_peer_by_key ( ipoib_hdr->u.peer.dest );
+	if ( ! dest )
 		return -ENXIO;
-
-	/* Translate packet if applicable */
-	if ( ( rc = ipoib_translate_tx ( netdev, iobuf, net_proto ) ) != 0 )
-		return rc;
-
-	/* Prepend real IPoIB header */
-	ipoib_hdr = iob_push ( iobuf, sizeof ( *ipoib_hdr ) );
-	ipoib_hdr->proto = net_proto;
-	ipoib_hdr->reserved = 0;
+	ipoib_hdr->u.reserved = 0;
 
 	/* Construct address vector */
-	memset ( &dest, 0, sizeof ( dest ) );
-	dest.qpn = ( ntohl ( mac->flags__qpn ) & IB_QPN_MASK );
-	dest.gid_present = 1;
-	memcpy ( &dest.gid, &mac->gid, sizeof ( dest.gid ) );
-	if ( ( rc = ib_resolve_path ( ibdev, &dest ) ) != 0 ) {
+	memset ( &av, 0, sizeof ( av ) );
+	av.qpn = ( ntohl ( dest->mac.flags__qpn ) & IB_QPN_MASK );
+	av.gid_present = 1;
+	memcpy ( &av.gid, &dest->mac.gid, sizeof ( av.gid ) );
+	if ( ( rc = ib_resolve_path ( ibdev, &av ) ) != 0 ) {
 		/* Path not resolved yet */
 		return rc;
 	}
 
-	return ib_post_send ( ibdev, ipoib->qp, &dest, iobuf );
+	return ib_post_send ( ibdev, ipoib->qp, &av, iobuf );
 }
 
 /**
@@ -532,22 +479,19 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector, or NULL
- * @v source		Source address vector, or NULL
+ * @v av		Address vector, or NULL
  * @v iobuf		I/O buffer
  * @v rc		Completion status code
  */
 static void ipoib_complete_recv ( struct ib_device *ibdev __unused,
 				  struct ib_queue_pair *qp,
-				  struct ib_address_vector *dest,
-				  struct ib_address_vector *source,
+				  struct ib_address_vector *av,
 				  struct io_buffer *iobuf, int rc ) {
 	struct ipoib_device *ipoib = ib_qp_get_ownerdata ( qp );
 	struct net_device *netdev = ipoib->netdev;
 	struct ipoib_hdr *ipoib_hdr;
-	struct ethhdr *ethhdr;
-	struct ipoib_remac remac;
-	uint16_t net_proto;
+	struct ipoib_mac ll_src;
+	struct ipoib_peer *src;
 
 	/* Record errors */
 	if ( rc != 0 ) {
@@ -563,44 +507,20 @@
 		netdev_rx_err ( netdev, iobuf, -EIO );
 		return;
 	}
-	if ( ! source ) {
+	ipoib_hdr = iobuf->data;
+	if ( ! av ) {
 		DBGC ( ipoib, "IPoIB %p received packet without address "
 		       "vector\n", ipoib );
 		netdev_rx_err ( netdev, iobuf, -ENOTTY );
 		return;
 	}
 
-	/* Strip real IPoIB header */
-	ipoib_hdr = iobuf->data;
-	net_proto = ipoib_hdr->proto;
-	iob_pull ( iobuf, sizeof ( *ipoib_hdr ) );
-
-	/* Construct source address from remote QPN and LID */
-	remac.qpn = htonl ( source->qpn | EIPOIB_QPN_LA );
-	remac.lid = htons ( source->lid );
-
-	/* Translate packet if applicable */
-	if ( ( rc = ipoib_translate_rx ( netdev, iobuf, &remac,
-					 net_proto ) ) != 0 ) {
-		netdev_rx_err ( netdev, iobuf, rc );
-		return;
-	}
-
-	/* Prepend eIPoIB header */
-	ethhdr = iob_push ( iobuf, sizeof ( *ethhdr ) );
-	memcpy ( &ethhdr->h_source, &remac, sizeof ( ethhdr->h_source ) );
-	ethhdr->h_protocol = net_proto;
-
-	/* Construct destination address */
-	if ( dest->gid_present && ( memcmp ( &dest->gid, &ipoib->broadcast.gid,
-					     sizeof ( dest->gid ) ) == 0 ) ) {
-		/* Broadcast GID; use the Ethernet broadcast address */
-		memcpy ( &ethhdr->h_dest, eth_broadcast,
-			 sizeof ( ethhdr->h_dest ) );
-	} else {
-		/* Assume destination address is local Ethernet MAC */
-		memcpy ( &ethhdr->h_dest, netdev->ll_addr,
-			 sizeof ( ethhdr->h_dest ) );
+	/* Parse source address */
+	if ( av->gid_present ) {
+		ll_src.flags__qpn = htonl ( av->qpn );
+		memcpy ( &ll_src.gid, &av->gid, sizeof ( ll_src.gid ) );
+		src = ipoib_cache_peer ( &ll_src );
+		ipoib_hdr->u.peer.src = src->key;
 	}
 
 	/* Hand off to network layer */
@@ -614,42 +534,6 @@
 };
 
 /**
- * Allocate IPoIB receive I/O buffer
- *
- * @v len		Length of buffer
- * @ret iobuf		I/O buffer, or NULL
- *
- * Some Infiniband hardware requires 2kB alignment of receive buffers
- * and provides no way to disable header separation.  The result is
- * that there are only four bytes of link-layer header (the real IPoIB
- * header) before the payload.  This is not sufficient space to insert
- * an eIPoIB link-layer pseudo-header.
- *
- * We therefore allocate I/O buffers offset to start slightly before
- * the natural alignment boundary, in order to allow sufficient space.
- */
-static struct io_buffer * ipoib_alloc_iob ( size_t len ) {
-	struct io_buffer *iobuf;
-	size_t reserve_len;
-
-	/* Calculate additional length required at start of buffer */
-	reserve_len = ( sizeof ( struct ethhdr ) -
-			sizeof ( struct ipoib_hdr ) );
-
-	/* Allocate buffer */
-	iobuf = alloc_iob_raw ( ( len + reserve_len ), len, -reserve_len );
-	if ( iobuf ) {
-		iob_reserve ( iobuf, reserve_len );
-	}
-	return iobuf;
-}
-
-/** IPoIB queue pair operations */
-static struct ib_queue_pair_operations ipoib_qp_op = {
-	.alloc_iob = ipoib_alloc_iob,
-};
-
-/**
  * Poll IPoIB network device
  *
  * @v netdev		Network device
@@ -658,11 +542,7 @@
 	struct ipoib_device *ipoib = netdev->priv;
 	struct ib_device *ibdev = ipoib->ibdev;
 
-	/* Poll Infiniband device */
 	ib_poll_eq ( ibdev );
-
-	/* Poll the retry timers (required for IPoIB multicast join) */
-	retry_poll();
 }
 
 /**
@@ -729,14 +609,15 @@
 static void ipoib_link_state_changed ( struct ib_device *ibdev ) {
 	struct net_device *netdev = ib_get_ownerdata ( ibdev );
 	struct ipoib_device *ipoib = netdev->priv;
+	struct ipoib_mac *mac = ( ( struct ipoib_mac * ) netdev->ll_addr );
 	int rc;
 
 	/* Leave existing broadcast group */
 	ipoib_leave_broadcast_group ( ipoib );
 
 	/* Update MAC address based on potentially-new GID prefix */
-	memcpy ( &ipoib->mac.gid.s.prefix, &ibdev->gid.s.prefix,
-		 sizeof ( ipoib->mac.gid.s.prefix ) );
+	memcpy ( &mac->gid.s.prefix, &ibdev->gid.s.prefix,
+		 sizeof ( mac->gid.s.prefix ) );
 
 	/* Update broadcast GID based on potentially-new partition key */
 	ipoib->broadcast.gid.words[2] =
@@ -765,6 +646,7 @@
 static int ipoib_open ( struct net_device *netdev ) {
 	struct ipoib_device *ipoib = netdev->priv;
 	struct ib_device *ibdev = ipoib->ibdev;
+	struct ipoib_mac *mac = ( ( struct ipoib_mac * ) netdev->ll_addr );
 	int rc;
 
 	/* Open IB device */
@@ -784,9 +666,9 @@
 	}
 
 	/* Allocate queue pair */
-	ipoib->qp = ib_create_qp ( ibdev, IB_QPT_UD, IPOIB_NUM_SEND_WQES,
-				   ipoib->cq, IPOIB_NUM_RECV_WQES, ipoib->cq,
-				   &ipoib_qp_op );
+	ipoib->qp = ib_create_qp ( ibdev, IB_QPT_UD,
+				   IPOIB_NUM_SEND_WQES, ipoib->cq,
+				   IPOIB_NUM_RECV_WQES, ipoib->cq );
 	if ( ! ipoib->qp ) {
 		DBGC ( ipoib, "IPoIB %p could not allocate queue pair\n",
 		       ipoib );
@@ -796,7 +678,7 @@
 	ib_qp_set_ownerdata ( ipoib->qp, ipoib );
 
 	/* Update MAC address with QPN */
-	ipoib->mac.flags__qpn = htonl ( ipoib->qp->qpn );
+	mac->flags__qpn = htonl ( ipoib->qp->qpn );
 
 	/* Fill receive rings */
 	ib_refill_recv ( ibdev, ipoib->qp );
@@ -823,15 +705,13 @@
 static void ipoib_close ( struct net_device *netdev ) {
 	struct ipoib_device *ipoib = netdev->priv;
 	struct ib_device *ibdev = ipoib->ibdev;
-
-	/* Flush REMAC cache */
-	ipoib_flush_remac ( ipoib );
+	struct ipoib_mac *mac = ( ( struct ipoib_mac * ) netdev->ll_addr );
 
 	/* Leave broadcast group */
 	ipoib_leave_broadcast_group ( ipoib );
 
 	/* Remove QPN from MAC address */
-	ipoib->mac.flags__qpn = 0;
+	mac->flags__qpn = 0;
 
 	/* Tear down the queues */
 	ib_destroy_qp ( ibdev, ipoib->qp );
@@ -871,19 +751,15 @@
 	memset ( ipoib, 0, sizeof ( *ipoib ) );
 	ipoib->netdev = netdev;
 	ipoib->ibdev = ibdev;
-	INIT_LIST_HEAD ( &ipoib->peers );
 
 	/* Extract hardware address */
 	memcpy ( netdev->hw_addr, &ibdev->gid.s.guid,
 		 sizeof ( ibdev->gid.s.guid ) );
 
-	/* Set local MAC address */
-	memcpy ( &ipoib->mac.gid.s.guid, &ibdev->gid.s.guid,
-		 sizeof ( ipoib->mac.gid.s.guid ) );
-
-	/* Set default broadcast MAC address */
+	/* Set default broadcast address */
 	memcpy ( &ipoib->broadcast, &ipoib_broadcast,
 		 sizeof ( ipoib->broadcast ) );
+	netdev->ll_broadcast = ( ( uint8_t * ) &ipoib->broadcast );
 
 	/* Register network device */
 	if ( ( rc = register_netdev ( netdev ) ) != 0 )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/jme.c ipxe-1.0.1~lliurex1505/src/drivers/net/jme.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/jme.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/jme.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/jme.h ipxe-1.0.1~lliurex1505/src/drivers/net/jme.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/jme.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/jme.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/mii.c ipxe-1.0.1~lliurex1505/src/drivers/net/mii.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/mii.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/mii.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,113 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <ipxe/mii.h>
-
-/** @file
- *
- * Media Independent Interface
- *
- */
-
-/**
- * Restart autonegotiation
- *
- * @v mii		MII interface
- * @ret rc		Return status code
- */
-int mii_restart ( struct mii_interface *mii ) {
-	int bmcr;
-	int rc;
-
-	/* Read BMCR */
-	bmcr = mii_read ( mii, MII_BMCR );
-	if ( bmcr < 0 ) {
-		rc = bmcr;
-		DBGC ( mii, "MII %p could not read BMCR: %s\n",
-		       mii, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Enable and restart autonegotiation */
-	bmcr |= ( BMCR_ANENABLE | BMCR_ANRESTART );
-	if ( ( rc = mii_write ( mii, MII_BMCR, bmcr ) ) != 0 ) {
-		DBGC ( mii, "MII %p could not write BMCR: %s\n",
-		       mii, strerror ( rc ) );
-		return rc;
-	}
-
-	DBGC ( mii, "MII %p restarted autonegotiation\n", mii );
-	return 0;
-}
-
-/**
- * Reset MII interface
- *
- * @v mii		MII interface
- * @ret rc		Return status code
- */
-int mii_reset ( struct mii_interface *mii ) {
-	unsigned int i;
-	int bmcr;
-	int rc;
-
-	/* Power-up, enable autonegotiation and initiate reset */
-	if ( ( rc = mii_write ( mii, MII_BMCR,
-				( BMCR_RESET | BMCR_ANENABLE ) ) ) != 0 ) {
-		DBGC ( mii, "MII %p could not write BMCR: %s\n",
-		       mii, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Wait for reset to complete */
-	for ( i = 0 ; i < MII_RESET_MAX_WAIT_MS ; i++ ) {
-
-		/* Check if reset has completed */
-		bmcr = mii_read ( mii, MII_BMCR );
-		if ( bmcr < 0 ) {
-			rc = bmcr;
-			DBGC ( mii, "MII %p could not read BMCR: %s\n",
-			       mii, strerror ( rc ) );
-			return rc;
-		}
-
-		/* If reset is not complete, delay 1ms and retry */
-		if ( bmcr & BMCR_RESET ) {
-			mdelay ( 1 );
-			continue;
-		}
-
-		/* Force autonegotation on again, in case it was
-		 * cleared by the reset.
-		 */
-		if ( ( rc = mii_restart ( mii ) ) != 0 )
-			return rc;
-
-		DBGC ( mii, "MII %p reset after %dms\n", mii, i );
-		return 0;
-	}
-
-	DBGC ( mii, "MII %p timed out waiting for reset\n", mii );
-	return -ETIMEDOUT;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/mtd80x.c ipxe-1.0.1~lliurex1505/src/drivers/net/mtd80x.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/mtd80x.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/mtd80x.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1022 @@
+/**************************************************************************
+*
+*    mtd80x.c: Etherboot device driver for the mtd80x Ethernet chip.
+*    Written 2004-2004 by Erdem Güven <zuencap@yahoo.com>
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the License, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*    GNU General Public License for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not, write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*    Portions of this code based on:
+*               fealnx.c: A Linux device driver for the mtd80x Ethernet chip
+*               Written 1998-2000 by Donald Becker
+*
+***************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/* to get some global routines like printf */
+#include "etherboot.h"
+/* to get the interface to the body of the program */
+#include "nic.h"
+/* to get the PCI support functions, if this is a PCI NIC */
+#include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
+#include <mii.h>
+
+/* Condensed operations for readability. */
+#define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
+#define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))
+#define get_unaligned(ptr) (*(ptr))
+
+
+/* Operational parameters that are set at compile time. */
+
+/* Keep the ring sizes a power of two for compile efficiency.           */
+/* The compiler will convert <unsigned>'%'<2^N> into a bit mask.        */
+/* Making the Tx ring too large decreases the effectiveness of channel  */
+/* bonding and packet priority.                                         */
+/* There are no ill effects from too-large receive rings.               */
+#define TX_RING_SIZE 2
+#define TX_QUEUE_LEN 10 /* Limit ring entries actually used.  */
+#define RX_RING_SIZE 4
+
+/* Operational parameters that usually are not changed. */
+/* Time in jiffies before concluding the transmitter is hung. */
+#define HZ 100
+#define TX_TIME_OUT   (6*HZ)
+
+/* Allocation size of Rx buffers with normal sized Ethernet frames.
+   Do not change this value without good reason.  This is not a limit,
+   but a way to keep a consistent allocation size among drivers.
+ */
+#define PKT_BUF_SZ 1536
+
+/* for different PHY */
+enum phy_type_flags {
+    MysonPHY = 1,
+    AhdocPHY = 2,
+    SeeqPHY = 3,
+    MarvellPHY = 4,
+    Myson981 = 5,
+    LevelOnePHY = 6,
+    OtherPHY = 10,
+};
+
+/* A chip capabilities table*/
+enum chip_capability_flags {
+    HAS_MII_XCVR,
+    HAS_CHIP_XCVR,
+};
+
+#if 0 /* not used */
+static
+struct chip_info
+{
+    u16 dev_id;
+    int flag;
+}
+mtd80x_chips[] = {
+                     {0x0800, HAS_MII_XCVR},
+                     {0x0803, HAS_CHIP_XCVR},
+                     {0x0891, HAS_MII_XCVR}
+                 };
+static int chip_cnt = sizeof( mtd80x_chips ) / sizeof( struct chip_info );
+#endif
+
+/* Offsets to the Command and Status Registers. */
+enum mtd_offsets {
+    PAR0 = 0x0,        /* physical address 0-3 */
+    PAR1 = 0x04,        /* physical address 4-5 */
+    MAR0 = 0x08,        /* multicast address 0-3 */
+    MAR1 = 0x0C,        /* multicast address 4-7 */
+    FAR0 = 0x10,        /* flow-control address 0-3 */
+    FAR1 = 0x14,        /* flow-control address 4-5 */
+    TCRRCR = 0x18,        /* receive & transmit configuration */
+    BCR = 0x1C,        /* bus command */
+    TXPDR = 0x20,        /* transmit polling demand */
+    RXPDR = 0x24,        /* receive polling demand */
+    RXCWP = 0x28,        /* receive current word pointer */
+    TXLBA = 0x2C,        /* transmit list base address */
+    RXLBA = 0x30,        /* receive list base address */
+    ISR = 0x34,        /* interrupt status */
+    IMR = 0x38,        /* interrupt mask */
+    FTH = 0x3C,        /* flow control high/low threshold */
+    MANAGEMENT = 0x40,    /* bootrom/eeprom and mii management */
+    TALLY = 0x44,        /* tally counters for crc and mpa */
+    TSR = 0x48,        /* tally counter for transmit status */
+    BMCRSR = 0x4c,        /* basic mode control and status */
+    PHYIDENTIFIER = 0x50,    /* phy identifier */
+    ANARANLPAR = 0x54,    /* auto-negotiation advertisement and link
+                                                       partner ability */
+    ANEROCR = 0x58,        /* auto-negotiation expansion and pci conf. */
+    BPREMRPSR = 0x5c,    /* bypass & receive error mask and phy status */
+};
+
+/* Bits in the interrupt status/enable registers. */
+/* The bits in the Intr Status/Enable registers, mostly interrupt sources. */
+enum intr_status_bits {
+    RFCON = 0x00020000, /* receive flow control xon packet */
+    RFCOFF = 0x00010000, /* receive flow control xoff packet */
+    LSCStatus = 0x00008000, /* link status change */
+    ANCStatus = 0x00004000, /* autonegotiation completed */
+    FBE = 0x00002000, /* fatal bus error */
+    FBEMask = 0x00001800, /* mask bit12-11 */
+    ParityErr = 0x00000000, /* parity error */
+    TargetErr = 0x00001000, /* target abort */
+    MasterErr = 0x00000800, /* master error */
+    TUNF = 0x00000400, /* transmit underflow */
+    ROVF = 0x00000200, /* receive overflow */
+    ETI = 0x00000100, /* transmit early int */
+    ERI = 0x00000080, /* receive early int */
+    CNTOVF = 0x00000040, /* counter overflow */
+    RBU = 0x00000020, /* receive buffer unavailable */
+    TBU = 0x00000010, /* transmit buffer unavilable */
+    TI = 0x00000008, /* transmit interrupt */
+    RI = 0x00000004, /* receive interrupt */
+    RxErr = 0x00000002, /* receive error */
+};
+
+/* Bits in the NetworkConfig register. */
+enum rx_mode_bits {
+    RxModeMask   = 0xe0,
+    AcceptAllPhys = 0x80,        /* promiscuous mode */
+    AcceptBroadcast = 0x40,        /* accept broadcast */
+    AcceptMulticast = 0x20,        /* accept mutlicast */
+    AcceptRunt   = 0x08,        /* receive runt pkt */
+    ALP          = 0x04,        /* receive long pkt */
+    AcceptErr    = 0x02,        /* receive error pkt */
+
+    AcceptMyPhys = 0x00000000,
+    RxEnable     = 0x00000001,
+    RxFlowCtrl   = 0x00002000,
+    TxEnable     = 0x00040000,
+    TxModeFDX    = 0x00100000,
+    TxThreshold  = 0x00e00000,
+
+    PS1000       = 0x00010000,
+    PS10         = 0x00080000,
+    FD           = 0x00100000,
+};
+
+/* Bits in network_desc.status */
+enum rx_desc_status_bits {
+    RXOWN = 0x80000000, /* own bit */
+    FLNGMASK = 0x0fff0000, /* frame length */
+    FLNGShift = 16,
+    MARSTATUS = 0x00004000, /* multicast address received */
+    BARSTATUS = 0x00002000, /* broadcast address received */
+    PHYSTATUS = 0x00001000, /* physical address received */
+    RXFSD = 0x00000800, /* first descriptor */
+    RXLSD = 0x00000400, /* last descriptor */
+    ErrorSummary = 0x80, /* error summary */
+    RUNT = 0x40,  /* runt packet received */
+    LONG = 0x20,  /* long packet received */
+    FAE = 0x10,  /* frame align error */
+    CRC = 0x08,  /* crc error */
+    RXER = 0x04,  /* receive error */
+};
+
+enum rx_desc_control_bits {
+    RXIC = 0x00800000, /* interrupt control */
+    RBSShift = 0,
+};
+
+enum tx_desc_status_bits {
+    TXOWN = 0x80000000, /* own bit */
+    JABTO = 0x00004000, /* jabber timeout */
+    CSL = 0x00002000, /* carrier sense lost */
+    LC = 0x00001000, /* late collision */
+    EC = 0x00000800, /* excessive collision */
+    UDF = 0x00000400, /* fifo underflow */
+    DFR = 0x00000200, /* deferred */
+    HF = 0x00000100, /* heartbeat fail */
+    NCRMask = 0x000000ff, /* collision retry count */
+    NCRShift = 0,
+};
+
+enum tx_desc_control_bits {
+    TXIC = 0x80000000, /* interrupt control */
+    ETIControl = 0x40000000, /* early transmit interrupt */
+    TXLD = 0x20000000, /* last descriptor */
+    TXFD = 0x10000000, /* first descriptor */
+    CRCEnable = 0x08000000, /* crc control */
+    PADEnable = 0x04000000, /* padding control */
+    RetryTxLC = 0x02000000, /* retry late collision */
+    PKTSMask = 0x3ff800, /* packet size bit21-11 */
+    PKTSShift = 11,
+    TBSMask = 0x000007ff, /* transmit buffer bit 10-0 */
+    TBSShift = 0,
+};
+
+/* BootROM/EEPROM/MII Management Register */
+#define MASK_MIIR_MII_READ       0x00000000
+#define MASK_MIIR_MII_WRITE      0x00000008
+#define MASK_MIIR_MII_MDO        0x00000004
+#define MASK_MIIR_MII_MDI        0x00000002
+#define MASK_MIIR_MII_MDC        0x00000001
+
+/* ST+OP+PHYAD+REGAD+TA */
+#define OP_READ             0x6000 /* ST:01+OP:10+PHYAD+REGAD+TA:Z0 */
+#define OP_WRITE            0x5002 /* ST:01+OP:01+PHYAD+REGAD+TA:10 */
+
+/* ------------------------------------------------------------------------- */
+/*      Constants for Myson PHY                                              */
+/* ------------------------------------------------------------------------- */
+#define MysonPHYID      0xd0000302
+/* 89-7-27 add, (begin) */
+#define MysonPHYID0     0x0302
+#define StatusRegister  18
+#define SPEED100        0x0400 // bit10
+#define FULLMODE        0x0800 // bit11
+/* 89-7-27 add, (end) */
+
+/* ------------------------------------------------------------------------- */
+/*      Constants for Seeq 80225 PHY                                         */
+/* ------------------------------------------------------------------------- */
+#define SeeqPHYID0      0x0016
+
+#define MIIRegister18   18
+#define SPD_DET_100     0x80
+#define DPLX_DET_FULL   0x40
+
+/* ------------------------------------------------------------------------- */
+/*      Constants for Ahdoc 101 PHY                                          */
+/* ------------------------------------------------------------------------- */
+#define AhdocPHYID0     0x0022
+
+#define DiagnosticReg   18
+#define DPLX_FULL       0x0800
+#define Speed_100       0x0400
+
+/* 89/6/13 add, */
+/* -------------------------------------------------------------------------- */
+/*      Constants                                                             */
+/* -------------------------------------------------------------------------- */
+#define MarvellPHYID0           0x0141
+#define LevelOnePHYID0  0x0013
+
+#define MII1000BaseTControlReg  9
+#define MII1000BaseTStatusReg   10
+#define SpecificReg  17
+
+/* for 1000BaseT Control Register */
+#define PHYAbletoPerform1000FullDuplex  0x0200
+#define PHYAbletoPerform1000HalfDuplex  0x0100
+#define PHY1000AbilityMask              0x300
+
+// for phy specific status register, marvell phy.
+#define SpeedMask       0x0c000
+#define Speed_1000M     0x08000
+#define Speed_100M      0x4000
+#define Speed_10M       0
+#define Full_Duplex     0x2000
+
+// 89/12/29 add, for phy specific status register, levelone phy, (begin)
+#define LXT1000_100M    0x08000
+#define LXT1000_1000M   0x0c000
+#define LXT1000_Full    0x200
+// 89/12/29 add, for phy specific status register, levelone phy, (end)
+
+#if 0
+/* for 3-in-1 case */
+#define PS10            0x00080000
+#define FD              0x00100000
+#define PS1000          0x00010000
+#endif
+
+/* for PHY */
+#define LinkIsUp        0x0004
+#define LinkIsUp2 0x00040000
+
+/* Create a static buffer of size PKT_BUF_SZ for each
+RX and TX Descriptor.  All descriptors point to a
+part of this buffer */
+struct {
+	u8 txb[PKT_BUF_SZ * TX_RING_SIZE] __attribute__ ((aligned(8)));
+	u8 rxb[PKT_BUF_SZ * RX_RING_SIZE] __attribute__ ((aligned(8)));
+} mtd80x_bufs __shared;
+#define txb mtd80x_bufs.txb
+#define rxb mtd80x_bufs.rxb
+
+/* The Tulip Rx and Tx buffer descriptors. */
+struct mtd_desc
+{
+    s32 status;
+    s32 control;
+    u32 buffer;
+    u32 next_desc;
+    struct mtd_desc *next_desc_logical;
+    u8* skbuff;
+    u32 reserved1;
+    u32 reserved2;
+};
+
+struct mtd_private
+{
+    struct mtd_desc rx_ring[RX_RING_SIZE];
+    struct mtd_desc tx_ring[TX_RING_SIZE];
+
+    /* Frequently used values: keep some adjacent for cache effect. */
+    int flags;
+    struct pci_dev *pci_dev;
+    unsigned long crvalue;
+    unsigned long bcrvalue;
+    /*unsigned long imrvalue;*/
+    struct mtd_desc *cur_rx;
+    struct mtd_desc *lack_rxbuf;
+    int really_rx_count;
+    struct mtd_desc *cur_tx;
+    struct mtd_desc *cur_tx_copy;
+    int really_tx_count;
+    int free_tx_count;
+    unsigned int rx_buf_sz; /* Based on MTU+slack. */
+
+    /* These values are keep track of the transceiver/media in use. */
+    unsigned int linkok;
+    unsigned int line_speed;
+    unsigned int duplexmode;
+    unsigned int default_port:
+    4; /* Last dev->if_port value. */
+    unsigned int PHYType;
+
+    /* MII transceiver section. */
+    int mii_cnt;  /* MII device addresses. */
+    unsigned char phys[1]; /* MII device addresses. */
+
+    /*other*/
+    const char *nic_name;
+    int ioaddr;
+    u16 dev_id;
+};
+
+static struct mtd_private mtdx;
+
+static int mdio_read(struct nic * , int phy_id, int location);
+static void getlinktype(struct nic * );
+static void getlinkstatus(struct nic * );
+static void set_rx_mode(struct nic *);
+
+/**************************************************************************
+ *  init_ring - setup the tx and rx descriptors
+ *************************************************************************/
+static void init_ring(struct nic *nic __unused)
+{
+    int i;
+
+    mtdx.cur_rx = &mtdx.rx_ring[0];
+
+    mtdx.rx_buf_sz = PKT_BUF_SZ;
+    /*mtdx.rx_head_desc = &mtdx.rx_ring[0];*/
+
+    /* Initialize all Rx descriptors. */
+    /* Fill in the Rx buffers.  Handle allocation failure gracefully. */
+    for (i = 0; i < RX_RING_SIZE; i++)
+    {
+        mtdx.rx_ring[i].status = RXOWN;
+        mtdx.rx_ring[i].control = mtdx.rx_buf_sz << RBSShift;
+        mtdx.rx_ring[i].next_desc = virt_to_le32desc(&mtdx.rx_ring[i+1]);
+        mtdx.rx_ring[i].next_desc_logical = &mtdx.rx_ring[i+1];
+        mtdx.rx_ring[i].buffer = virt_to_le32desc(&rxb[i * PKT_BUF_SZ]);
+        mtdx.rx_ring[i].skbuff = &rxb[i * PKT_BUF_SZ];
+    }
+    /* Mark the last entry as wrapping the ring. */
+    mtdx.rx_ring[i-1].next_desc = virt_to_le32desc(&mtdx.rx_ring[0]);
+    mtdx.rx_ring[i-1].next_desc_logical = &mtdx.rx_ring[0];
+
+    /* We only use one transmit buffer, but two
+     * descriptors so transmit engines have somewhere
+     * to point should they feel the need */
+    mtdx.tx_ring[0].status = 0x00000000;
+    mtdx.tx_ring[0].buffer = virt_to_bus(&txb[0]);
+    mtdx.tx_ring[0].next_desc = virt_to_le32desc(&mtdx.tx_ring[1]);
+
+    /* This descriptor is never used */
+    mtdx.tx_ring[1].status = 0x00000000;
+    mtdx.tx_ring[1].buffer = 0; /*virt_to_bus(&txb[1]); */
+    mtdx.tx_ring[1].next_desc = virt_to_le32desc(&mtdx.tx_ring[0]);
+
+    return;
+}
+
+/**************************************************************************
+RESET - Reset Adapter
+***************************************************************************/
+static void mtd_reset( struct nic *nic )
+{
+    /* Reset the chip to erase previous misconfiguration. */
+    outl(0x00000001, mtdx.ioaddr + BCR);
+
+    init_ring(nic);
+
+    outl(virt_to_bus(mtdx.rx_ring), mtdx.ioaddr + RXLBA);
+    outl(virt_to_bus(mtdx.tx_ring), mtdx.ioaddr + TXLBA);
+
+    /* Initialize other registers. */
+    /* Configure the PCI bus bursts and FIFO thresholds. */
+    mtdx.bcrvalue = 0x10; /* little-endian, 8 burst length */
+    mtdx.crvalue = 0xa00; /* rx 128 burst length */
+
+	if ( mtdx.dev_id == 0x891 ) {
+		mtdx.bcrvalue |= 0x200;	/* set PROG bit */
+		mtdx.crvalue |= 0x02000000;	/* set enhanced bit */
+	}
+
+    outl( mtdx.bcrvalue, mtdx.ioaddr + BCR);
+
+    /* Restart Rx engine if stopped. */
+    outl(0, mtdx.ioaddr + RXPDR);
+
+    getlinkstatus(nic);
+    if (mtdx.linkok)
+    {
+        static const char* texts[]={"half","full","10","100","1000"};
+        getlinktype(nic);
+        DBG ( "Link is OK : %s %s\n", texts[mtdx.duplexmode-1], texts[mtdx.line_speed+1] );
+    } else
+    {
+        DBG ( "No link!!!\n" );
+    }
+
+    mtdx.crvalue |= /*TxEnable |*/ RxEnable | TxThreshold;
+    set_rx_mode(nic);
+
+    /* Clear interrupts by setting the interrupt mask. */
+    outl(FBE | TUNF | CNTOVF | RBU | TI | RI, mtdx.ioaddr + ISR);
+    outl( 0, mtdx.ioaddr + IMR);
+}
+
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static int mtd_poll(struct nic *nic, __unused int retrieve)
+{
+    s32 rx_status = mtdx.cur_rx->status;
+    int retval = 0;
+
+    if( ( rx_status & RXOWN ) != 0 )
+    {
+        return 0;
+    }
+
+    if (rx_status & ErrorSummary)
+    { /* there was a fatal error */
+        printf( "%s: Receive error, Rx status %8.8x, Error(s) %s%s%s\n",
+                mtdx.nic_name, (unsigned int) rx_status,
+                (rx_status & (LONG | RUNT)) ? "length_error ":"",
+                (rx_status & RXER) ? "frame_error ":"",
+                (rx_status & CRC) ? "crc_error ":"" );
+        retval = 0;
+    } else if( !((rx_status & RXFSD) && (rx_status & RXLSD)) )
+    {
+        /* this pkt is too long, over one rx buffer */
+        printf("Pkt is too long, over one rx buffer.\n");
+        retval = 0;
+    } else
+    { /* this received pkt is ok */
+        /* Omit the four octet CRC from the length. */
+        short pkt_len = ((rx_status & FLNGMASK) >> FLNGShift) - 4;
+
+        DBG ( " netdev_rx() normal Rx pkt length %d"
+ 	      " status %x.\n", pkt_len, (unsigned int) rx_status );
+
+        nic->packetlen = pkt_len;
+        memcpy(nic->packet, mtdx.cur_rx->skbuff, pkt_len);
+
+        retval = 1;
+    }
+
+    while( ( mtdx.cur_rx->status & RXOWN ) == 0 )
+    {
+        mtdx.cur_rx->status = RXOWN;
+        mtdx.cur_rx = mtdx.cur_rx->next_desc_logical;
+    }
+
+    /* Restart Rx engine if stopped. */
+    outl(0, mtdx.ioaddr + RXPDR);
+
+    return retval;
+}
+
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+static void mtd_transmit(
+    struct nic *nic,
+    const char *dest,            /* Destination */
+    unsigned int type,            /* Type */
+    unsigned int size,            /* size */
+    const char *data)            /* Packet */
+{
+    u32 to;
+    u32 tx_status;
+    unsigned int nstype = htons ( type );
+
+    memcpy( txb, dest, ETH_ALEN );
+    memcpy( txb + ETH_ALEN, nic->node_addr, ETH_ALEN );
+    memcpy( txb + 2 * ETH_ALEN, &nstype, 2 );
+    memcpy( txb + ETH_HLEN, data, size );
+
+    size += ETH_HLEN;
+    size &= 0x0FFF;
+    while( size < ETH_ZLEN )
+    {
+        txb[size++] = '\0';
+    }
+
+    mtdx.tx_ring[0].control = TXLD | TXFD | CRCEnable | PADEnable;
+    mtdx.tx_ring[0].control |= (size << PKTSShift); /* pkt size */
+    mtdx.tx_ring[0].control |= (size << TBSShift); /* buffer size */
+    mtdx.tx_ring[0].status = TXOWN;
+
+    /* Point to transmit descriptor */
+    outl(virt_to_bus(mtdx.tx_ring), mtdx.ioaddr + TXLBA);
+    /* Enable Tx */
+    outl( mtdx.crvalue | TxEnable, mtdx.ioaddr + TCRRCR);
+    /* Wake the potentially-idle transmit channel. */
+    outl(0, mtdx.ioaddr + TXPDR);
+
+    to = currticks() + TX_TIME_OUT;
+    while(( mtdx.tx_ring[0].status & TXOWN) && (currticks() < to));
+
+    /* Disable Tx */
+    outl( mtdx.crvalue & (~TxEnable), mtdx.ioaddr + TCRRCR);
+
+    tx_status = mtdx.tx_ring[0].status;
+    if (currticks() >= to){
+        DBG ( "TX Time Out" );
+    } else if( tx_status & (CSL | LC | EC | UDF | HF)){
+        printf( "Transmit error: %8.8x %s %s %s %s %s\n",
+                (unsigned int) tx_status,
+                tx_status & EC ? "abort" : "",
+                tx_status & CSL ? "carrier" : "",
+                tx_status & LC ? "late" : "",
+                tx_status & UDF ? "fifo" : "",
+                tx_status & HF ? "heartbeat" : "" );
+    }
+
+    /*hex_dump( txb, size );*/
+    /*pause();*/
+
+    DBG ( "TRANSMIT\n" );
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void mtd_disable ( struct nic *nic ) {
+
+    /* Disable Tx Rx*/
+    outl( mtdx.crvalue & (~TxEnable) & (~RxEnable), mtdx.ioaddr + TCRRCR );
+
+    /* Reset the chip to erase previous misconfiguration. */
+    mtd_reset(nic);
+
+    DBG ( "DISABLE\n" );
+}
+
+static struct nic_operations mtd_operations = {
+	.connect	= dummy_connect,
+	.poll		= mtd_poll,
+	.transmit	= mtd_transmit,
+	.irq		= dummy_irq,
+
+};
+
+static struct pci_device_id mtd80x_nics[] = {
+        PCI_ROM(0x1516, 0x0800, "MTD800", "Myson MTD800", 0),
+        PCI_ROM(0x1516, 0x0803, "MTD803", "Surecom EP-320X", 0),
+        PCI_ROM(0x1516, 0x0891, "MTD891", "Myson MTD891", 0),
+};
+
+PCI_DRIVER ( mtd80x_driver, mtd80x_nics, PCI_NO_CLASS );
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+***************************************************************************/
+
+static int mtd_probe ( struct nic *nic, struct pci_device *pci ) {
+
+    int i;
+
+    if (pci->ioaddr == 0)
+	    return 0;
+
+    adjust_pci_device(pci);
+
+    nic->ioaddr = pci->ioaddr;
+    nic->irqno = 0;
+
+    mtdx.nic_name = pci->id->name;
+    mtdx.dev_id = pci->device;
+    mtdx.ioaddr = nic->ioaddr;
+
+    /* read ethernet id */
+    for (i = 0; i < 6; ++i)
+    {
+        nic->node_addr[i] = inb(mtdx.ioaddr + PAR0 + i);
+    }
+
+    if (memcmp(nic->node_addr, "\0\0\0\0\0\0", 6) == 0)
+    {
+        return 0;
+    }
+
+    DBG ( "%s: ioaddr %4.4x MAC %s\n", mtdx.nic_name, mtdx.ioaddr, eth_ntoa ( nic->node_addr ) );
+
+    /* Reset the chip to erase previous misconfiguration. */
+    outl(0x00000001, mtdx.ioaddr + BCR);
+
+    /* find the connected MII xcvrs */
+
+    if( mtdx.dev_id != 0x803 )
+    {
+        int phy, phy_idx = 0;
+
+        for (phy = 1; phy < 32 && phy_idx < 1; phy++) {
+            int mii_status = mdio_read(nic, phy, 1);
+
+            if (mii_status != 0xffff && mii_status != 0x0000) {
+                mtdx.phys[phy_idx] = phy;
+
+                DBG ( "%s: MII PHY found at address %d, status "
+		      "0x%4.4x.\n", mtdx.nic_name, phy, mii_status );
+                /* get phy type */
+                {
+                    unsigned int data;
+
+                    data = mdio_read(nic, mtdx.phys[phy_idx], 2);
+                    if (data == SeeqPHYID0)
+                        mtdx.PHYType = SeeqPHY;
+                    else if (data == AhdocPHYID0)
+                        mtdx.PHYType = AhdocPHY;
+                    else if (data == MarvellPHYID0)
+                        mtdx.PHYType = MarvellPHY;
+                    else if (data == MysonPHYID0)
+                        mtdx.PHYType = Myson981;
+                    else if (data == LevelOnePHYID0)
+                        mtdx.PHYType = LevelOnePHY;
+                    else
+                        mtdx.PHYType = OtherPHY;
+                }
+                phy_idx++;
+            }
+        }
+
+        mtdx.mii_cnt = phy_idx;
+        if (phy_idx == 0) {
+            printf("%s: MII PHY not found -- this device may "
+                   "not operate correctly.\n", mtdx.nic_name);
+        }
+    } else {
+        mtdx.phys[0] = 32;
+        /* get phy type */
+        if (inl(mtdx.ioaddr + PHYIDENTIFIER) == MysonPHYID ) {
+            mtdx.PHYType = MysonPHY;
+            DBG ( "MysonPHY\n" );
+        } else {
+            mtdx.PHYType = OtherPHY;
+            DBG ( "OtherPHY\n" );
+        }
+    }
+
+    getlinkstatus(nic);
+    if( !mtdx.linkok )
+    {
+        printf("No link!!!\n");
+        return 0;
+    }
+
+    mtd_reset( nic );
+
+    /* point to NIC specific routines */
+    nic->nic_op	= &mtd_operations;
+    return 1;
+}
+
+
+/**************************************************************************/
+static void set_rx_mode(struct nic *nic __unused)
+{
+    u32 mc_filter[2];                       /* Multicast hash filter */
+    u32 rx_mode;
+
+    /* Too many to match, or accept all multicasts. */
+    mc_filter[1] = mc_filter[0] = ~0;
+    rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
+
+    outl(mc_filter[0], mtdx.ioaddr + MAR0);
+    outl(mc_filter[1], mtdx.ioaddr + MAR1);
+
+    mtdx.crvalue = ( mtdx.crvalue & ~RxModeMask ) | rx_mode;
+    outb( mtdx.crvalue, mtdx.ioaddr + TCRRCR);
+}
+/**************************************************************************/
+static unsigned int m80x_read_tick(void)
+/* function: Reads the Timer tick count register which decrements by 2 from  */
+/*           65536 to 0 every 1/36.414 of a second. Each 2 decrements of the */
+/*           count represents 838 nsec's.                                    */
+/* input   : none.                                                           */
+/* output  : none.                                                           */
+{
+    unsigned char tmp;
+    int value;
+
+    outb((char) 0x06, 0x43); // Command 8254 to latch T0's count
+
+    // now read the count.
+    tmp = (unsigned char) inb(0x40);
+    value = ((int) tmp) << 8;
+    tmp = (unsigned char) inb(0x40);
+    value |= (((int) tmp) & 0xff);
+    return (value);
+}
+
+static void m80x_delay(unsigned int interval)
+/* function: to wait for a specified time.                                   */
+/* input   : interval ... the specified time.                                */
+/* output  : none.                                                           */
+{
+    unsigned int interval1, interval2, i = 0;
+
+    interval1 = m80x_read_tick(); // get initial value
+    do
+    {
+        interval2 = m80x_read_tick();
+        if (interval1 < interval2)
+            interval1 += 65536;
+        ++i;
+    } while (((interval1 - interval2) < (u16) interval) && (i < 65535));
+}
+
+
+static u32 m80x_send_cmd_to_phy(long miiport, int opcode, int phyad, int regad)
+{
+    u32 miir;
+    int i;
+    unsigned int mask, data;
+
+    /* enable MII output */
+    miir = (u32) inl(miiport);
+    miir &= 0xfffffff0;
+
+    miir |= MASK_MIIR_MII_WRITE + MASK_MIIR_MII_MDO;
+
+    /* send 32 1's preamble */
+    for (i = 0; i < 32; i++) {
+        /* low MDC; MDO is already high (miir) */
+        miir &= ~MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+
+        /* high MDC */
+        miir |= MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+    }
+
+    /* calculate ST+OP+PHYAD+REGAD+TA */
+    data = opcode | (phyad << 7) | (regad << 2);
+
+    /* sent out */
+    mask = 0x8000;
+    while (mask) {
+        /* low MDC, prepare MDO */
+        miir &= ~(MASK_MIIR_MII_MDC + MASK_MIIR_MII_MDO);
+        if (mask & data)
+            miir |= MASK_MIIR_MII_MDO;
+
+        outl(miir, miiport);
+        /* high MDC */
+        miir |= MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+        m80x_delay(30);
+
+        /* next */
+        mask >>= 1;
+        if (mask == 0x2 && opcode == OP_READ)
+            miir &= ~MASK_MIIR_MII_WRITE;
+    }
+    return miir;
+}
+
+static int mdio_read(struct nic *nic __unused, int phyad, int regad)
+{
+    long miiport = mtdx.ioaddr + MANAGEMENT;
+    u32 miir;
+    unsigned int mask, data;
+
+    miir = m80x_send_cmd_to_phy(miiport, OP_READ, phyad, regad);
+
+    /* read data */
+    mask = 0x8000;
+    data = 0;
+    while (mask)
+    {
+        /* low MDC */
+        miir &= ~MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+
+        /* read MDI */
+        miir = inl(miiport);
+        if (miir & MASK_MIIR_MII_MDI)
+            data |= mask;
+
+        /* high MDC, and wait */
+        miir |= MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+        m80x_delay((int) 30);
+
+        /* next */
+        mask >>= 1;
+    }
+
+    /* low MDC */
+    miir &= ~MASK_MIIR_MII_MDC;
+    outl(miir, miiport);
+
+    return data & 0xffff;
+}
+
+#if 0 /* not used */
+static void mdio_write(struct nic *nic __unused, int phyad, int regad,
+		       int data)
+{
+    long miiport = mtdx.ioaddr + MANAGEMENT;
+    u32 miir;
+    unsigned int mask;
+
+    miir = m80x_send_cmd_to_phy(miiport, OP_WRITE, phyad, regad);
+
+    /* write data */
+    mask = 0x8000;
+    while (mask)
+    {
+        /* low MDC, prepare MDO */
+        miir &= ~(MASK_MIIR_MII_MDC + MASK_MIIR_MII_MDO);
+        if (mask & data)
+            miir |= MASK_MIIR_MII_MDO;
+        outl(miir, miiport);
+
+        /* high MDC */
+        miir |= MASK_MIIR_MII_MDC;
+        outl(miir, miiport);
+
+        /* next */
+        mask >>= 1;
+    }
+
+    /* low MDC */
+    miir &= ~MASK_MIIR_MII_MDC;
+    outl(miir, miiport);
+
+    return;
+}
+#endif
+
+static void getlinkstatus(struct nic *nic)
+/* function: Routine will read MII Status Register to get link status.       */
+/* input   : dev... pointer to the adapter block.                            */
+/* output  : none.                                                           */
+{
+    unsigned int i, DelayTime = 0x1000;
+
+    mtdx.linkok = 0;
+
+    if (mtdx.PHYType == MysonPHY)
+    {
+        for (i = 0; i < DelayTime; ++i) {
+            if (inl(mtdx.ioaddr + BMCRSR) & LinkIsUp2) {
+                mtdx.linkok = 1;
+                return;
+            }
+            // delay
+            m80x_delay(100);
+        }
+    } else
+    {
+        for (i = 0; i < DelayTime; ++i) {
+            if (mdio_read(nic, mtdx.phys[0], MII_BMSR) & BMSR_LSTATUS) {
+                mtdx.linkok = 1;
+                return;
+            }
+            // delay
+            m80x_delay(100);
+        }
+    }
+}
+
+
+static void getlinktype(struct nic *dev)
+{
+    if (mtdx.PHYType == MysonPHY)
+    { /* 3-in-1 case */
+        if (inl(mtdx.ioaddr + TCRRCR) & FD)
+            mtdx.duplexmode = 2; /* full duplex */
+        else
+            mtdx.duplexmode = 1; /* half duplex */
+        if (inl(mtdx.ioaddr + TCRRCR) & PS10)
+            mtdx.line_speed = 1; /* 10M */
+        else
+            mtdx.line_speed = 2; /* 100M */
+    } else
+    {
+        if (mtdx.PHYType == SeeqPHY) { /* this PHY is SEEQ 80225 */
+            unsigned int data;
+
+            data = mdio_read(dev, mtdx.phys[0], MIIRegister18);
+            if (data & SPD_DET_100)
+                mtdx.line_speed = 2; /* 100M */
+            else
+                mtdx.line_speed = 1; /* 10M */
+            if (data & DPLX_DET_FULL)
+                mtdx.duplexmode = 2; /* full duplex mode */
+            else
+                mtdx.duplexmode = 1; /* half duplex mode */
+        } else if (mtdx.PHYType == AhdocPHY) {
+            unsigned int data;
+
+            data = mdio_read(dev, mtdx.phys[0], DiagnosticReg);
+            if (data & Speed_100)
+                mtdx.line_speed = 2; /* 100M */
+            else
+                mtdx.line_speed = 1; /* 10M */
+            if (data & DPLX_FULL)
+                mtdx.duplexmode = 2; /* full duplex mode */
+            else
+                mtdx.duplexmode = 1; /* half duplex mode */
+        }
+        /* 89/6/13 add, (begin) */
+        else if (mtdx.PHYType == MarvellPHY) {
+            unsigned int data;
+
+            data = mdio_read(dev, mtdx.phys[0], SpecificReg);
+            if (data & Full_Duplex)
+                mtdx.duplexmode = 2; /* full duplex mode */
+            else
+                mtdx.duplexmode = 1; /* half duplex mode */
+            data &= SpeedMask;
+            if (data == Speed_1000M)
+                mtdx.line_speed = 3; /* 1000M */
+            else if (data == Speed_100M)
+                mtdx.line_speed = 2; /* 100M */
+            else
+                mtdx.line_speed = 1; /* 10M */
+        }
+        /* 89/6/13 add, (end) */
+        /* 89/7/27 add, (begin) */
+        else if (mtdx.PHYType == Myson981) {
+            unsigned int data;
+
+            data = mdio_read(dev, mtdx.phys[0], StatusRegister);
+
+            if (data & SPEED100)
+                mtdx.line_speed = 2;
+            else
+                mtdx.line_speed = 1;
+
+            if (data & FULLMODE)
+                mtdx.duplexmode = 2;
+            else
+                mtdx.duplexmode = 1;
+        }
+        /* 89/7/27 add, (end) */
+        /* 89/12/29 add */
+        else if (mtdx.PHYType == LevelOnePHY) {
+            unsigned int data;
+
+            data = mdio_read(dev, mtdx.phys[0], SpecificReg);
+            if (data & LXT1000_Full)
+                mtdx.duplexmode = 2; /* full duplex mode */
+            else
+                mtdx.duplexmode = 1; /* half duplex mode */
+            data &= SpeedMask;
+            if (data == LXT1000_1000M)
+                mtdx.line_speed = 3; /* 1000M */
+            else if (data == LXT1000_100M)
+                mtdx.line_speed = 2; /* 100M */
+            else
+                mtdx.line_speed = 1; /* 10M */
+        }
+        // chage crvalue
+        // mtdx.crvalue&=(~PS10)&(~FD);
+        mtdx.crvalue &= (~PS10) & (~FD) & (~PS1000);
+        if (mtdx.line_speed == 1)
+            mtdx.crvalue |= PS10;
+        else if (mtdx.line_speed == 3)
+            mtdx.crvalue |= PS1000;
+        if (mtdx.duplexmode == 2)
+            mtdx.crvalue |= FD;
+    }
+}
+
+DRIVER ( "MTD80X", nic_driver, pci_driver, mtd80x_driver,
+	 mtd_probe, mtd_disable );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myri10ge.c ipxe-1.0.1~lliurex1505/src/drivers/net/myri10ge.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myri10ge.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/myri10ge.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  ****************************************************************/
 
 FILE_LICENCE ( GPL2_ONLY );
@@ -305,10 +304,10 @@
 	command->response_addr.high = 0;
 	command->response_addr.low
 		= htonl ( virt_to_bus ( &priv->dma->command_response ) );
-	for ( i=0; i<9; i++ )
-		command->pad[i] = 0;
+	for ( i=0; i<36; i+=4 )
+		* ( uint32 * ) &command->pad[i] = 0;
 	wmb();
-	command->pad[9] = 0;
+	* ( uint32 * ) &command->pad[36] = 0;
 
 	/* Wait up to 2 seconds for a response. */
 
@@ -719,7 +718,7 @@
 		return 0;
 	}
 
-	/* Initialize NonVolatile Storage state. */
+	/* Initilize NonVolatile Storage state. */
 
 	priv->nvs.word_len_log2 = 0;
 	priv->nvs.size		= hdr.eeprom_len;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myri10ge_mcp.h ipxe-1.0.1~lliurex1505/src/drivers/net/myri10ge_mcp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myri10ge_mcp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/myri10ge_mcp.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  ****************************************************************/
 
 FILE_LICENCE ( GPL2_ONLY );
@@ -81,7 +80,7 @@
   /* 16 */
   struct mcp_dma_addr response_addr;
   /* 24 */
-  uint32_t pad[10];
+  uint8_t pad[40];
 };
 typedef struct mcp_cmd mcp_cmd_t;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myson.c ipxe-1.0.1~lliurex1505/src/drivers/net/myson.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myson.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/myson.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,670 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/mii.h>
-#include "myson.h"
-
-/** @file
- *
- * Myson Technology network card driver
- *
- */
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset controller chip
- *
- * @v myson		Myson device
- * @ret rc		Return status code
- */
-static int myson_soft_reset ( struct myson_nic *myson ) {
-	uint32_t bcr;
-	unsigned int i;
-
-	/* Initiate reset */
-	bcr = readl ( myson->regs + MYSON_BCR );
-	writel ( ( bcr | MYSON_BCR_SWR ), myson->regs + MYSON_BCR );
-
-	/* Wait for reset to complete */
-	for ( i = 0 ; i < MYSON_RESET_MAX_WAIT_MS ; i++ ) {
-
-		/* If reset is not complete, delay 1ms and retry */
-		if ( readl ( myson->regs + MYSON_BCR ) & MYSON_BCR_SWR ) {
-			mdelay ( 1 );
-			continue;
-		}
-
-		/* Apply a sensible default bus configuration */
-		bcr = readl ( myson->regs + MYSON_BCR );
-		bcr &= ~MYSON_BCR_PBL_MASK;
-		bcr |= ( MYSON_BCR_RLE | MYSON_BCR_RME | MYSON_BCR_WIE |
-			 MYSON_BCR_PBL_DEFAULT );
-		writel ( bcr, myson->regs + MYSON_BCR );
-		DBGC ( myson, "MYSON %p using configuration %08x\n",
-		       myson, bcr );
-
-		return 0;
-	}
-
-	DBGC ( myson, "MYSON %p timed out waiting for reset\n", myson );
-	return -ETIMEDOUT;
-}
-
-/**
- * Reload configuration from EEPROM
- *
- * @v myson		Myson device
- * @ret rc		Return status code
- */
-static int myson_reload_config ( struct myson_nic *myson ) {
-	unsigned int i;
-
-	/* Initiate reload */
-	writel ( MYSON_ROM_AUTOLD, myson->regs + MYSON_ROM_MII );
-
-	/* Wait for reload to complete */
-	for ( i = 0 ; i < MYSON_AUTOLD_MAX_WAIT_MS ; i++ ) {
-
-		/* If reload is not complete, delay 1ms and retry */
-		if ( readl ( myson->regs + MYSON_ROM_MII ) & MYSON_ROM_AUTOLD ){
-			mdelay ( 1 );
-			continue;
-		}
-
-		return 0;
-	}
-
-	DBGC ( myson, "MYSON %p timed out waiting for configuration "
-	       "reload\n", myson );
-	return -ETIMEDOUT;
-}
-
-/**
- * Reset hardware
- *
- * @v myson		Myson device
- * @ret rc		Return status code
- */
-static int myson_reset ( struct myson_nic *myson ) {
-	int rc;
-
-	/* Disable all interrupts */
-	writel ( 0, myson->regs + MYSON_IMR );
-
-	/* Perform soft reset */
-	if ( ( rc = myson_soft_reset ( myson ) ) != 0 )
-		return rc;
-
-	/* Reload configuration from EEPROM */
-	if ( ( rc = myson_reload_config ( myson ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Create descriptor ring
- *
- * @v myson		Myson device
- * @v ring		Descriptor ring
- * @ret rc		Return status code
- */
-static int myson_create_ring ( struct myson_nic *myson,
-			       struct myson_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-	struct myson_descriptor *desc;
-	struct myson_descriptor *next;
-	physaddr_t address;
-	unsigned int i;
-	int rc;
-
-	/* Allocate descriptor ring */
-	ring->desc = malloc_dma ( len, MYSON_RING_ALIGN );
-	if ( ! ring->desc ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	address = virt_to_bus ( ring->desc );
-
-	/* Check address is usable by card */
-	if ( ! myson_address_ok ( address + len ) ) {
-		DBGC ( myson, "MYSON %p cannot support 64-bit ring address\n",
-		       myson );
-		rc = -ENOTSUP;
-		goto err_64bit;
-	}
-
-	/* Initialise descriptor ring */
-	memset ( ring->desc, 0, len );
-	for ( i = 0 ; i < ring->count ; i++ ) {
-		desc = &ring->desc[i];
-		next = &ring->desc[ ( i + 1 ) % ring->count ];
-		desc->next = cpu_to_le32 ( virt_to_bus ( next ) );
-	}
-
-	/* Program ring address */
-	writel ( address, myson->regs + ring->reg );
-	DBGC ( myson, "MYSON %p ring %02x is at [%08llx,%08llx)\n",
-	       myson, ring->reg, ( ( unsigned long long ) address ),
-	       ( ( unsigned long long ) address + len ) );
-
-	return 0;
-
- err_64bit:
-	free_dma ( ring->desc, len );
-	ring->desc = NULL;
- err_alloc:
-	return rc;
-}
-
-/**
- * Destroy descriptor ring
- *
- * @v myson		Myson device
- * @v ring		Descriptor ring
- */
-static void myson_destroy_ring ( struct myson_nic *myson,
-				 struct myson_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-
-	/* Clear ring address */
-	writel ( 0, myson->regs + ring->reg );
-
-	/* Free descriptor ring */
-	free_dma ( ring->desc, len );
-	ring->desc = NULL;
-	ring->prod = 0;
-	ring->cons = 0;
-}
-
-/**
- * Refill receive descriptor ring
- *
- * @v netdev		Network device
- */
-static void myson_refill_rx ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	struct myson_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	physaddr_t address;
-
-	while ( ( myson->rx.prod - myson->rx.cons ) < MYSON_NUM_RX_DESC ) {
-
-		/* Allocate I/O buffer */
-		iobuf = alloc_iob ( MYSON_RX_MAX_LEN );
-		if ( ! iobuf ) {
-			/* Wait for next refill */
-			return;
-		}
-
-		/* Check address is usable by card */
-		address = virt_to_bus ( iobuf->data );
-		if ( ! myson_address_ok ( address ) ) {
-			DBGC ( myson, "MYSON %p cannot support 64-bit RX "
-			       "buffer address\n", myson );
-			netdev_rx_err ( netdev, iobuf, -ENOTSUP );
-			return;
-		}
-
-		/* Get next receive descriptor */
-		rx_idx = ( myson->rx.prod++ % MYSON_NUM_RX_DESC );
-		rx = &myson->rx.desc[rx_idx];
-
-		/* Populate receive descriptor */
-		rx->address = cpu_to_le32 ( address );
-		rx->control =
-			cpu_to_le32 ( MYSON_RX_CTRL_RBS ( MYSON_RX_MAX_LEN ) );
-		wmb();
-		rx->status = cpu_to_le32 ( MYSON_RX_STAT_OWN );
-		wmb();
-
-		/* Record I/O buffer */
-		assert ( myson->rx_iobuf[rx_idx] == NULL );
-		myson->rx_iobuf[rx_idx] = iobuf;
-
-		/* Notify card that there are descriptors available */
-		writel ( 0, myson->regs + MYSON_RXPDR );
-
-		DBGC2 ( myson, "MYSON %p RX %d is [%llx,%llx)\n", myson,
-			rx_idx, ( ( unsigned long long ) address ),
-			( ( unsigned long long ) address + MYSON_RX_MAX_LEN ) );
-	}
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int myson_open ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	union myson_physical_address mac;
-	int rc;
-
-	/* Set MAC address */
-	memset ( &mac, 0, sizeof ( mac ) );
-	memcpy ( mac.raw, netdev->ll_addr, ETH_ALEN );
-	writel ( le32_to_cpu ( mac.reg.low ), myson->regs + MYSON_PAR0 );
-	writel ( le32_to_cpu ( mac.reg.high ), myson->regs + MYSON_PAR4 );
-
-	/* Create transmit descriptor ring */
-	if ( ( rc = myson_create_ring ( myson, &myson->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Create receive descriptor ring */
-	if ( ( rc = myson_create_ring ( myson, &myson->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Configure transmitter and receiver */
-	writel ( ( MYSON_TCR_TE | MYSON_RCR_PROM | MYSON_RCR_AB | MYSON_RCR_AM |
-		   MYSON_RCR_ARP | MYSON_RCR_ALP | MYSON_RCR_RE ),
-		 myson->regs + MYSON_TCR_RCR );
-
-	/* Fill receive ring */
-	myson_refill_rx ( netdev );
-
-	return 0;
-
-	myson_destroy_ring ( myson, &myson->rx );
- err_create_rx:
-	myson_destroy_ring ( myson, &myson->tx );
- err_create_tx:
-	return rc;
-}
-
-/**
- * Wait for transmit and receive to become idle
- *
- * @v myson		Myson device
- * @ret rc		Return status code
- */
-static int myson_wait_idle ( struct myson_nic *myson ) {
-	uint32_t tcr_rcr;
-	unsigned int i;
-
-	/* Wait for both transmit and receive to be idle */
-	for ( i = 0 ; i < MYSON_IDLE_MAX_WAIT_MS ; i++ ) {
-
-		/* If either process is running, delay 1ms and retry */
-		tcr_rcr = readl ( myson->regs + MYSON_TCR_RCR );
-		if ( tcr_rcr & ( MYSON_TCR_TXS | MYSON_RCR_RXS ) ) {
-			mdelay ( 1 );
-			continue;
-		}
-
-		return 0;
-	}
-
-	DBGC ( myson, "MYSON %p timed out waiting for idle state (status "
-	       "%08x)\n", myson, tcr_rcr );
-	return -ETIMEDOUT;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void myson_close ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	unsigned int i;
-
-	/* Disable receiver and transmitter */
-	writel ( 0, myson->regs + MYSON_TCR_RCR );
-
-	/* Allow time for receiver and transmitter to become idle */
-	myson_wait_idle ( myson );
-
-	/* Destroy receive descriptor ring */
-	myson_destroy_ring ( myson, &myson->rx );
-
-	/* Discard any unused receive buffers */
-	for ( i = 0 ; i < MYSON_NUM_RX_DESC ; i++ ) {
-		if ( myson->rx_iobuf[i] )
-			free_iob ( myson->rx_iobuf[i] );
-		myson->rx_iobuf[i] = NULL;
-	}
-
-	/* Destroy transmit descriptor ring */
-	myson_destroy_ring ( myson, &myson->tx );
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int myson_transmit ( struct net_device *netdev,
-			    struct io_buffer *iobuf ) {
-	struct myson_nic *myson = netdev->priv;
-	struct myson_descriptor *tx;
-	unsigned int tx_idx;
-	physaddr_t address;
-
-	/* Check address is usable by card */
-	address = virt_to_bus ( iobuf->data );
-	if ( ! myson_address_ok ( address ) ) {
-		DBGC ( myson, "MYSON %p cannot support 64-bit TX buffer "
-		       "address\n", myson );
-		return -ENOTSUP;
-	}
-
-	/* Get next transmit descriptor */
-	if ( ( myson->tx.prod - myson->tx.cons ) >= MYSON_NUM_TX_DESC ) {
-		DBGC ( myson, "MYSON %p out of transmit descriptors\n",
-		       myson );
-		return -ENOBUFS;
-	}
-	tx_idx = ( myson->tx.prod++ % MYSON_NUM_TX_DESC );
-	tx = &myson->tx.desc[tx_idx];
-
-	/* Populate transmit descriptor */
-	tx->address = cpu_to_le32 ( address );
-	tx->control = cpu_to_le32 ( MYSON_TX_CTRL_IC | MYSON_TX_CTRL_LD |
-				    MYSON_TX_CTRL_FD | MYSON_TX_CTRL_CRC |
-				    MYSON_TX_CTRL_PAD | MYSON_TX_CTRL_RTLC |
-				    MYSON_TX_CTRL_PKTS ( iob_len ( iobuf ) ) |
-				    MYSON_TX_CTRL_TBS ( iob_len ( iobuf ) ) );
-	wmb();
-	tx->status = cpu_to_le32 ( MYSON_TX_STAT_OWN );
-	wmb();
-
-	/* Notify card that there are packets ready to transmit */
-	writel ( 0, myson->regs + MYSON_TXPDR );
-
-	DBGC2 ( myson, "MYSON %p TX %d is [%llx,%llx)\n", myson, tx_idx,
-		( ( unsigned long long ) address ),
-		( ( unsigned long long ) address + iob_len ( iobuf ) ) );
-
-	return 0;
-}
-
-/**
- * Poll for completed packets
- *
- * @v netdev		Network device
- */
-static void myson_poll_tx ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	struct myson_descriptor *tx;
-	unsigned int tx_idx;
-
-	/* Check for completed packets */
-	while ( myson->tx.cons != myson->tx.prod ) {
-
-		/* Get next transmit descriptor */
-		tx_idx = ( myson->tx.cons % MYSON_NUM_TX_DESC );
-		tx = &myson->tx.desc[tx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( tx->status & cpu_to_le32 ( MYSON_TX_STAT_OWN ) )
-			return;
-
-		/* Complete TX descriptor */
-		if ( tx->status & cpu_to_le32 ( MYSON_TX_STAT_ABORT |
-						MYSON_TX_STAT_CSL ) ) {
-			DBGC ( myson, "MYSON %p TX %d completion error "
-			       "(%08x)\n", myson, tx_idx,
-			       le32_to_cpu ( tx->status ) );
-			netdev_tx_complete_next_err ( netdev, -EIO );
-		} else {
-			DBGC2 ( myson, "MYSON %p TX %d complete\n",
-				myson, tx_idx );
-			netdev_tx_complete_next ( netdev );
-		}
-		myson->tx.cons++;
-	}
-}
-
-/**
- * Poll for received packets
- *
- * @v netdev		Network device
- */
-static void myson_poll_rx ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	struct myson_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	size_t len;
-
-	/* Check for received packets */
-	while ( myson->rx.cons != myson->rx.prod ) {
-
-		/* Get next receive descriptor */
-		rx_idx = ( myson->rx.cons % MYSON_NUM_RX_DESC );
-		rx = &myson->rx.desc[rx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( rx->status & MYSON_RX_STAT_OWN )
-			return;
-
-		/* Populate I/O buffer */
-		iobuf = myson->rx_iobuf[rx_idx];
-		myson->rx_iobuf[rx_idx] = NULL;
-		len = MYSON_RX_STAT_FLNG ( le32_to_cpu ( rx->status ) );
-		iob_put ( iobuf, len - 4 /* strip CRC */ );
-
-		/* Hand off to network stack */
-		if ( rx->status & cpu_to_le32 ( MYSON_RX_STAT_ES ) ) {
-			DBGC ( myson, "MYSON %p RX %d error (length %zd, "
-			       "status %08x)\n", myson, rx_idx, len,
-			       le32_to_cpu ( rx->status ) );
-			netdev_rx_err ( netdev, iobuf, -EIO );
-		} else {
-			DBGC2 ( myson, "MYSON %p RX %d complete (length "
-				"%zd)\n", myson, rx_idx, len );
-			netdev_rx ( netdev, iobuf );
-		}
-		myson->rx.cons++;
-	}
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void myson_poll ( struct net_device *netdev ) {
-	struct myson_nic *myson = netdev->priv;
-	uint32_t isr;
-	unsigned int i;
-
-	/* Polling the ISR seems to really upset this card; it ends up
-	 * getting no useful PCI transfers done and, for some reason,
-	 * flooding the network with invalid packets.  Work around
-	 * this by introducing deliberate delays between ISR reads.
-	 */
-	for ( i = 0 ; i < MYSON_ISR_IODELAY_COUNT ; i++ )
-		iodelay();
-
-	/* Check for and acknowledge interrupts */
-	isr = readl ( myson->regs + MYSON_ISR );
-	if ( ! isr )
-		return;
-	writel ( isr, myson->regs + MYSON_ISR );
-
-	/* Poll for TX completions, if applicable */
-	if ( isr & MYSON_IRQ_TI )
-		myson_poll_tx ( netdev );
-
-	/* Poll for RX completionsm, if applicable */
-	if ( isr & MYSON_IRQ_RI )
-		myson_poll_rx ( netdev );
-
-	/* Refill RX ring */
-	myson_refill_rx ( netdev );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void myson_irq ( struct net_device *netdev, int enable ) {
-	struct myson_nic *myson = netdev->priv;
-	uint32_t imr;
-
-	imr = ( enable ? ( MYSON_IRQ_TI | MYSON_IRQ_RI ) : 0 );
-	writel ( imr, myson->regs + MYSON_IMR );
-}
-
-/** Myson network device operations */
-static struct net_device_operations myson_operations = {
-	.open		= myson_open,
-	.close		= myson_close,
-	.transmit	= myson_transmit,
-	.poll		= myson_poll,
-	.irq		= myson_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int myson_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct myson_nic *myson;
-	union myson_physical_address mac;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *myson ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &myson_operations );
-	myson = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( myson, 0, sizeof ( *myson ) );
-	myson_init_ring ( &myson->tx, MYSON_NUM_TX_DESC, MYSON_TXLBA );
-	myson_init_ring ( &myson->rx, MYSON_NUM_RX_DESC, MYSON_RXLBA );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	myson->regs = ioremap ( pci->membase, MYSON_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = myson_reset ( myson ) ) != 0 )
-		goto err_reset;
-
-	/* Read MAC address */
-	mac.reg.low = cpu_to_le32 ( readl ( myson->regs + MYSON_PAR0 ) );
-	mac.reg.high = cpu_to_le32 ( readl ( myson->regs + MYSON_PAR4 ) );
-	memcpy ( netdev->hw_addr, mac.raw, ETH_ALEN );
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Mark as link up; we don't yet handle link state */
-	netdev_link_up ( netdev );
-
-	return 0;
-
-	unregister_netdev ( netdev );
- err_register_netdev:
-	myson_reset ( myson );
- err_reset:
-	iounmap ( myson->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void myson_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct myson_nic *myson = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	myson_reset ( myson );
-
-	/* Free network device */
-	iounmap ( myson->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Myson PCI device IDs */
-static struct pci_device_id myson_nics[] = {
-        PCI_ROM ( 0x1516, 0x0800, "mtd800", "MTD-8xx", 0 ),
-        PCI_ROM ( 0x1516, 0x0803, "mtd803", "Surecom EP-320X-S", 0 ),
-        PCI_ROM ( 0x1516, 0x0891, "mtd891", "MTD-8xx", 0 ),
-};
-
-/** Myson PCI driver */
-struct pci_driver myson_driver __pci_driver = {
-	.ids = myson_nics,
-	.id_count = ( sizeof ( myson_nics ) / sizeof ( myson_nics[0] ) ),
-	.probe = myson_probe,
-	.remove = myson_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myson.h ipxe-1.0.1~lliurex1505/src/drivers/net/myson.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/myson.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/myson.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,200 +0,0 @@
-#ifndef _MYSON_H
-#define _MYSON_H
-
-/** @file
- *
- * Myson Technology network card driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/if_ether.h>
-
-/** BAR size */
-#define MYSON_BAR_SIZE 256
-
-/** A packet descriptor */
-struct myson_descriptor {
-	/** Status */
-	uint32_t status;
-	/** Control */
-	uint32_t control;
-	/** Buffer start address */
-	uint32_t address;
-	/** Next descriptor address */
-	uint32_t next;
-} __attribute__ (( packed ));
-
-/* Transmit status */
-#define MYSON_TX_STAT_OWN	0x80000000UL	/**< Owner */
-#define MYSON_TX_STAT_ABORT	0x00002000UL	/**< Abort */
-#define MYSON_TX_STAT_CSL	0x00001000UL	/**< Carrier sense lost */
-
-/* Transmit control */
-#define MYSON_TX_CTRL_IC	0x80000000UL	/**< Interrupt control */
-#define MYSON_TX_CTRL_LD	0x20000000UL	/**< Last descriptor */
-#define MYSON_TX_CTRL_FD	0x10000000UL	/**< First descriptor */
-#define MYSON_TX_CTRL_CRC	0x08000000UL	/**< CRC append */
-#define MYSON_TX_CTRL_PAD	0x04000000UL	/**< Pad control */
-#define MYSON_TX_CTRL_RTLC	0x02000000UL	/**< Retry late collision */
-#define MYSON_TX_CTRL_PKTS(x)	( (x) << 11 )	/**< Packet size */
-#define MYSON_TX_CTRL_TBS(x)	( (x) << 0 )	/**< Transmit buffer size */
-
-/* Receive status */
-#define MYSON_RX_STAT_OWN	0x80000000UL	/**< Owner */
-#define MYSON_RX_STAT_FLNG(status) ( ( (status) >> 16 ) & 0xfff )
-#define MYSON_RX_STAT_ES	0x00000080UL	/**< Error summary */
-
-/* Receive control */
-#define MYSON_RX_CTRL_RBS(x)	( (x) << 0 )	/**< Receive buffer size */
-
-/** Descriptor ring alignment */
-#define MYSON_RING_ALIGN 4
-
-/** Physical Address Register 0 */
-#define MYSON_PAR0 0x00
-
-/** Physical Address Register 4 */
-#define MYSON_PAR4 0x04
-
-/** Physical address */
-union myson_physical_address {
-	struct {
-		uint32_t low;
-		uint32_t high;
-	} __attribute__ (( packed )) reg;
-	uint8_t raw[ETH_ALEN];
-};
-
-/** Transmit and Receive Configuration Register */
-#define MYSON_TCR_RCR 0x18
-#define MYSON_TCR_TXS		0x80000000UL	/**< Transmit status */
-#define MYSON_TCR_TE		0x00040000UL	/**< Transmit enable */
-#define MYSON_RCR_RXS		0x00008000UL	/**< Receive status */
-#define MYSON_RCR_PROM		0x00000080UL	/**< Promiscuous mode */
-#define MYSON_RCR_AB		0x00000040UL	/**< Accept broadcast */
-#define MYSON_RCR_AM		0x00000020UL	/**< Accept multicast */
-#define MYSON_RCR_ARP		0x00000008UL	/**< Accept runt packet */
-#define MYSON_RCR_ALP		0x00000004UL	/**< Accept long packet */
-#define MYSON_RCR_RE		0x00000001UL	/**< Receive enable */
-
-/** Maximum time to wait for transmit and receive to be idle, in milliseconds */
-#define MYSON_IDLE_MAX_WAIT_MS 100
-
-/** Bus Command Register */
-#define MYSON_BCR 0x1c
-#define MYSON_BCR_RLE		0x00000100UL	/**< Read line enable */
-#define MYSON_BCR_RME		0x00000080UL	/**< Read multiple enable */
-#define MYSON_BCR_WIE		0x00000040UL	/**< Write and invalidate */
-#define MYSON_BCR_PBL(x)	( (x) << 3 )	/**< Burst length */
-#define MYSON_BCR_PBL_MASK	MYSON_BCR_PBL ( 0x7 )
-#define MYSON_BCR_PBL_DEFAULT	MYSON_BCR_PBL ( 0x6 )
-#define MYSON_BCR_SWR		0x00000001UL	/**< Software reset */
-
-/** Maximum time to wait for a reset, in milliseconds */
-#define MYSON_RESET_MAX_WAIT_MS 100
-
-/** Transmit Poll Demand Register */
-#define MYSON_TXPDR 0x20
-
-/** Receive Poll Demand Register */
-#define MYSON_RXPDR 0x24
-
-/** Transmit List Base Address */
-#define MYSON_TXLBA 0x2c
-
-/** Number of transmit descriptors */
-#define MYSON_NUM_TX_DESC 4
-
-/** Receive List Base Address */
-#define MYSON_RXLBA 0x30
-
-/** Number of receive descriptors */
-#define MYSON_NUM_RX_DESC 4
-
-/** Receive buffer length */
-#define MYSON_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
-
-/** Interrupt Status Register */
-#define MYSON_ISR 0x34
-#define MYSON_IRQ_TI		0x00000008UL	/**< Transmit interrupt */
-#define MYSON_IRQ_RI		0x00000004UL	/**< Receive interrupt */
-
-/** Number of I/O delays between ISR reads */
-#define MYSON_ISR_IODELAY_COUNT 4
-
-/** Interrupt Mask Register */
-#define MYSON_IMR 0x38
-
-/** Boot ROM / EEPROM / MII Management Register */
-#define MYSON_ROM_MII 0x40
-#define MYSON_ROM_AUTOLD	0x00100000UL	/**< Auto load */
-
-/** Maximum time to wait for a configuration reload, in milliseconds */
-#define MYSON_AUTOLD_MAX_WAIT_MS 100
-
-/** A Myson descriptor ring */
-struct myson_ring {
-	/** Descriptors */
-	struct myson_descriptor *desc;
-	/** Producer index */
-	unsigned int prod;
-	/** Consumer index */
-	unsigned int cons;
-
-	/** Number of descriptors */
-	unsigned int count;
-	/** Descriptor start address register */
-	unsigned int reg;
-};
-
-/**
- * Initialise descriptor ring
- *
- * @v ring		Descriptor ring
- * @v count		Number of descriptors
- * @v reg		Descriptor base address register
- */
-static inline __attribute__ (( always_inline)) void
-myson_init_ring ( struct myson_ring *ring, unsigned int count,
-		  unsigned int reg ) {
-	ring->count = count;
-	ring->reg = reg;
-}
-
-/** A myson network card */
-struct myson_nic {
-	/** Registers */
-	void *regs;
-
-	/** Transmit descriptor ring */
-	struct myson_ring tx;
-	/** Receive descriptor ring */
-	struct myson_ring rx;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_iobuf[MYSON_NUM_RX_DESC];
-};
-
-/**
- * Check if card can access physical address
- *
- * @v address		Physical address
- * @v address_ok	Card can access physical address
- */
-static inline __attribute__ (( always_inline )) int
-myson_address_ok ( physaddr_t address ) {
-
-	/* In a 32-bit build, all addresses can be accessed */
-	if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
-		return 1;
-
-	/* Card can access all addresses below 4GB */
-	if ( ( address & ~0xffffffffULL ) == 0 )
-		return 1;
-
-	return 0;
-}
-
-#endif /* _MYSON_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/natsemi.c ipxe-1.0.1~lliurex1505/src/drivers/net/natsemi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/natsemi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/natsemi.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,929 +1,604 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
+/* 
+   natsemi.c - iPXE driver for the NatSemi DP8381x series.
+ 
+   Based on:
+
+   natsemi.c: An Etherboot driver for the NatSemi DP8381x series.
+
+   Copyright (C) 2001 Entity Cyber, Inc.
+   
+   This development of this Etherboot driver was funded by 
+   
+      Sicom Systems: http://www.sicompos.com/
+   
+   Author: Marty Connor <mdc@etherboot.org>
+   Adapted from a Linux driver which was written by Donald Becker
+   
+   This software may be used and distributed according to the terms
+   of the GNU Public License (GPL), incorporated herein by reference.
+   
+   Original Copyright Notice:
+   
+   Written/copyright 1999-2001 by Donald Becker.
+   
+   This software may be used and distributed according to the terms of
+   the GNU General Public License (GPL), incorporated herein by reference.
+   Drivers based on or derived from this code fall under the GPL and must
+   retain the authorship, copyright and license notice.  This file is not
+   a complete program and may only be used when the entire operating
+   system is licensed under the GPL.  License for under other terms may be
+   available.  Contact the original author for details.
+   
+   The original author may be reached as becker@scyld.com, or at
+   Scyld Computing Corporation
+   410 Severn Ave., Suite 210
+   Annapolis MD 21403
+   
+   Support information and updates available at
+   http://www.scyld.com/network/netsemi.html
+   
+   References:
+   
+   http://www.scyld.com/expert/100mbps.html
+   http://www.scyld.com/expert/NWay.html
+   Datasheet is available from:
+   http://www.national.com/pf/DP/DP83815.html
+
+*/
 
-FILE_LICENCE ( GPL2_OR_LATER );
+FILE_LICENCE ( GPL_ANY );
+
+/* Revision History */
+
+/*
+  02 Jul 2007  Udayan Kumar	 1.2 ported the driver from etherboot to iPXE API.
+				     Fully rewritten,adapting the old driver.
+		      	      	     Added a circular buffer for transmit and receive.
+		                     transmit routine will not wait for transmission to finish.
+			             poll routine deals with it.
+  13 Dec 2003  Tim Legge         1.1 Enabled Multicast Support
+  29 May 2001  Marty Connor	 1.0 Initial Release. Tested with Netgear FA311 and FA312 boards
+*/
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
 #include <string.h>
-#include <unistd.h>
+#include <ipxe/io.h>
 #include <errno.h>
 #include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
+#include <unistd.h>
+#include <ipxe/pci.h>
 #include <ipxe/if_ether.h>
+#include <ipxe/ethernet.h>
 #include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/nvs.h>
-#include <ipxe/bitbash.h>
+#include <ipxe/netdevice.h>
 #include <ipxe/spi_bit.h>
 #include <ipxe/threewire.h>
+#include <ipxe/nvo.h>
 #include "natsemi.h"
 
-/** @file
- *
- * National Semiconductor "MacPhyter" network card driver
- *
- * Based on the following datasheets:
- *
- *    http://www.ti.com/lit/ds/symlink/dp83820.pdf
- *    http://www.datasheets.org.uk/indexdl/Datasheet-03/DSA0041338.pdf
- *
- */
+/*  Function Prototypes: */
+ 
+static int natsemi_spi_read_bit ( struct bit_basher *, unsigned int );
+static void natsemi_spi_write_bit ( struct bit_basher *,unsigned int, unsigned long ); 
+static void natsemi_init_eeprom ( struct natsemi_private * ); 
+static int natsemi_probe (struct pci_device *pci);
+static void natsemi_reset (struct net_device *netdev);
+static int natsemi_open (struct net_device *netdev);
+static int natsemi_transmit (struct net_device *netdev, struct io_buffer *iobuf);
+static void natsemi_poll (struct net_device *netdev);
+static void natsemi_close (struct net_device *netdev);
+static void natsemi_irq (struct net_device *netdev, int enable);
+static void natsemi_remove (struct pci_device *pci);
 
-/******************************************************************************
- *
- * EEPROM interface
- *
- ******************************************************************************
- */
-
-/** Pin mapping for SPI bit-bashing interface */
-static const uint8_t natsemi_eeprom_bits[] = {
-	[SPI_BIT_SCLK]	= NATSEMI_MEAR_EECLK,
-	[SPI_BIT_MOSI]	= NATSEMI_MEAR_EEDI,
-	[SPI_BIT_MISO]	= NATSEMI_MEAR_EEDO,
-	[SPI_BIT_SS(0)]	= NATSEMI_MEAR_EESEL,
+/** natsemi net device operations */
+static struct net_device_operations natsemi_operations = {
+        .open           = natsemi_open,
+        .close          = natsemi_close,
+        .transmit       = natsemi_transmit,
+        .poll           = natsemi_poll,
+	.irq		= natsemi_irq,
 };
 
-/**
- * Read input bit
- *
- * @v basher		Bit-bashing interface
- * @v bit_id		Bit number
- * @ret zero		Input is a logic 0
- * @ret non-zero	Input is a logic 1
- */
 static int natsemi_spi_read_bit ( struct bit_basher *basher,
-				  unsigned int bit_id ) {
-	struct natsemi_nic *natsemi = container_of ( basher, struct natsemi_nic,
-						     spibit.basher );
-	uint32_t mask = natsemi_eeprom_bits[bit_id];
-	uint32_t reg;
-
-	DBG_DISABLE ( DBGLVL_IO );
-	reg = readl ( natsemi->regs + NATSEMI_MEAR );
-	DBG_ENABLE ( DBGLVL_IO );
-	return ( reg & mask );
+			      unsigned int bit_id ) {
+	struct natsemi_private *np = container_of ( basher, struct natsemi_private,
+						 spibit.basher );
+	uint8_t mask = natsemi_ee_bits[bit_id];
+	uint8_t eereg;
+
+	eereg = inb ( np->ioaddr + EE_REG );
+	return ( eereg & mask );
 }
 
-/**
- * Set/clear output bit
- *
- * @v basher		Bit-bashing interface
- * @v bit_id		Bit number
- * @v data		Value to write
- */
 static void natsemi_spi_write_bit ( struct bit_basher *basher,
-				    unsigned int bit_id, unsigned long data ) {
-	struct natsemi_nic *natsemi = container_of ( basher, struct natsemi_nic,
-						     spibit.basher );
-	uint32_t mask = natsemi_eeprom_bits[bit_id];
-	uint32_t reg;
-
-	DBG_DISABLE ( DBGLVL_IO );
-	reg = readl ( natsemi->regs + NATSEMI_MEAR );
-	reg &= ~mask;
-	reg |= ( data & mask );
-	writel ( reg, natsemi->regs + NATSEMI_MEAR );
-	DBG_ENABLE ( DBGLVL_IO );
+				unsigned int bit_id, unsigned long data ) {
+	struct natsemi_private *np = container_of ( basher, struct natsemi_private,
+						 spibit.basher );
+	uint8_t mask = natsemi_ee_bits[bit_id];
+	uint8_t eereg;
+
+	eereg = inb ( np->ioaddr + EE_REG );
+	eereg &= ~mask;
+	eereg |= ( data & mask );
+	outb ( eereg, np->ioaddr + EE_REG );
 }
 
-/** SPI bit-bashing interface */
 static struct bit_basher_operations natsemi_basher_ops = {
 	.read = natsemi_spi_read_bit,
 	.write = natsemi_spi_write_bit,
 };
 
-/**
- * Initialise EEPROM
- *
- * @v natsemi		National Semiconductor device
- */
-static void natsemi_init_eeprom ( struct natsemi_nic *natsemi ) {
-
-	/* Initialise SPI bit-bashing interface */
-	natsemi->spibit.basher.op = &natsemi_basher_ops;
-	natsemi->spibit.bus.mode = SPI_MODE_THREEWIRE;
-	natsemi->spibit.endianness =
-		( ( natsemi->flags & NATSEMI_EEPROM_LITTLE_ENDIAN ) ?
-		  SPI_BIT_LITTLE_ENDIAN : SPI_BIT_BIG_ENDIAN );
-	init_spi_bit_basher ( &natsemi->spibit );
-
-	/* Initialise EEPROM device */
-	init_at93c06 ( &natsemi->eeprom, 16 );
-	natsemi->eeprom.bus = &natsemi->spibit.bus;
-}
-
-/**
- * Get hardware address from sane EEPROM data
+/*
+ * Set up for EEPROM access
  *
- * @v natsemi		National Semiconductor device
- * @v eeprom		EEPROM data
- * @v hw_addr		Hardware address to fill in
+ * @v NAT		NATSEMI NIC
  */
-static void natsemi_hwaddr_sane ( struct natsemi_nic *natsemi,
-				  const uint16_t *eeprom, uint16_t *hw_addr ) {
-	int i;
-
-	/* Copy MAC address from EEPROM data */
-	for ( i = ( ( ETH_ALEN / 2 ) - 1 ) ; i >= 0 ; i-- )
-		*(hw_addr++) = eeprom[ NATSEMI_EEPROM_MAC_SANE + i ];
+static void natsemi_init_eeprom ( struct natsemi_private *np ) {
 
-	DBGC ( natsemi, "NATSEMI %p has sane EEPROM layout\n", natsemi );
-}
+	/* Initialise three-wire bus 
+	 */
+	np->spibit.basher.op = &natsemi_basher_ops;
+	np->spibit.bus.mode = SPI_MODE_THREEWIRE;
+	np->spibit.endianness = SPI_BIT_LITTLE_ENDIAN;
+	init_spi_bit_basher ( &np->spibit );
 
-/**
- * Get hardware address from insane EEPROM data
- *
- * @v natsemi		National Semiconductor device
- * @v eeprom		EEPROM data
- * @v hw_addr		Hardware address to fill in
- */
-static void natsemi_hwaddr_insane ( struct natsemi_nic *natsemi,
-				    const uint16_t *eeprom,
-				    uint16_t *hw_addr ) {
-	unsigned int i;
-	unsigned int offset;
-	uint16_t word;
-
-	/* Copy MAC address from EEPROM data */
-	for ( i = 0 ; i < ( ETH_ALEN / 2 ) ; i++ ) {
-		offset = ( NATSEMI_EEPROM_MAC_INSANE + i );
-		word = ( ( le16_to_cpu ( eeprom[ offset ] ) >> 15 ) |
-			 ( le16_to_cpu ( eeprom[ offset + 1 ] << 1 ) ) );
-		hw_addr[i] = cpu_to_le16 ( word );
-	}
+	/*natsemi DP 83815 only supports at93c46
+	 */
+	init_at93c46 ( &np->eeprom, 16 );
+	np->eeprom.bus = &np->spibit.bus;
 
-	DBGC ( natsemi, "NATSEMI %p has insane EEPROM layout\n", natsemi );
+	/* It looks that this portion of EEPROM can be used for
+	 * non-volatile stored options. Data sheet does not talk about
+	 * this region.  Currently it is not working. But with some
+	 * efforts it can.
+	 */
+	nvo_init ( &np->nvo, &np->eeprom.nvs, 0x0c, 0x68, NULL, NULL );
 }
 
 /**
- * Get hardware address from EEPROM
+ * Probe PCI device
  *
- * @v natsemi		National Semiconductor device
- * @v hw_addr		Hardware address to fill in
- * @ret rc		Return status code
+ * @v pci	PCI device
+ * @v id	PCI ID
+ * @ret rc	Return status code
  */
-static int natsemi_hwaddr ( struct natsemi_nic *natsemi, void *hw_addr ) {
-	uint16_t buf[NATSEMI_EEPROM_SIZE];
-	void ( * extract ) ( struct natsemi_nic *natsemi,
-			     const uint16_t *eeprom, uint16_t *hw_addr );
+static int natsemi_probe (struct pci_device *pci) {
+	struct net_device *netdev;
+	struct natsemi_private *np = NULL;
+	uint8_t ll_addr_encoded[MAX_LL_ADDR_LEN];
+	uint8_t last=0,last1=0;
+	uint8_t prev_bytes[2];
+	int i;
 	int rc;
 
-	/* Read EEPROM contents */
-	if ( ( rc = nvs_read ( &natsemi->eeprom.nvs, 0, buf,
-			       sizeof ( buf ) ) ) != 0 ) {
-		DBGC ( natsemi, "NATSEMI %p could not read EEPROM: %s\n",
-		       natsemi, strerror ( rc ) );
-		return rc;
-	}
-	DBGC2 ( natsemi, "NATSEMI %p EEPROM contents:\n", natsemi );
-	DBGC2_HDA ( natsemi, 0, buf, sizeof ( buf ) );
-
-	/* Extract MAC address from EEPROM contents */
-	extract = ( ( natsemi->flags & NATSEMI_EEPROM_INSANE ) ?
-		    natsemi_hwaddr_insane : natsemi_hwaddr_sane );
-	extract ( natsemi, buf, hw_addr );
-
-	return 0;
-}
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset controller chip
- *
- * @v natsemi		National Semiconductor device
- * @ret rc		Return status code
- */
-static int natsemi_soft_reset ( struct natsemi_nic *natsemi ) {
-	unsigned int i;
-
-	/* Initiate reset */
-	writel ( NATSEMI_CR_RST, natsemi->regs + NATSEMI_CR );
-
-	/* Wait for reset to complete */
-	for ( i = 0 ; i < NATSEMI_RESET_MAX_WAIT_MS ; i++ ) {
+	/* Allocate net device 
+	 */
+	netdev = alloc_etherdev (sizeof (*np));
+	if (! netdev) 
+		return -ENOMEM;
+
+	netdev_init (netdev, &natsemi_operations);
+	np = netdev->priv;
+	pci_set_drvdata (pci, netdev);
+	netdev->dev = &pci->dev;
+	memset (np, 0, sizeof (*np));
+	np->ioaddr = pci->ioaddr;
 
-		/* If reset is not complete, delay 1ms and retry */
-		if ( readl ( natsemi->regs + NATSEMI_CR ) & NATSEMI_CR_RST ) {
-			mdelay ( 1 );
-			continue;
-		}
+	adjust_pci_device (pci);
 
-		return 0;
+	natsemi_reset (netdev);
+	natsemi_init_eeprom ( np );
+	nvs_read ( &np->eeprom.nvs, EE_MAC-1, prev_bytes, 1 );
+	nvs_read ( &np->eeprom.nvs, EE_MAC, ll_addr_encoded, ETH_ALEN );
+
+	/* decoding the MAC address read from NVS 
+	 * and save it in netdev->ll_addr
+         */
+	last = prev_bytes[1] >> 7;
+	for ( i = 0 ; i < ETH_ALEN ; i++ ) {
+		last1 = ll_addr_encoded[i] >> 7;
+		netdev->hw_addr[i] = ll_addr_encoded[i] << 1 | last;
+		last = last1;
 	}
 
-	DBGC ( natsemi, "NATSEMI %p timed out waiting for reset\n", natsemi );
-	return -ETIMEDOUT;
-}
-
-/**
- * Reload configuration from EEPROM
- *
- * @v natsemi		National Semiconductor device
- * @ret rc		Return status code
- */
-static int natsemi_reload_config ( struct natsemi_nic *natsemi ) {
-	unsigned int i;
-
-	/* Initiate reload */
-	writel ( NATSEMI_PTSCR_EELOAD_EN, natsemi->regs + NATSEMI_PTSCR );
+	if ((rc = register_netdev (netdev)) != 0)
+		goto err_register_netdev;
 
-	/* Wait for reload to complete */
-	for ( i = 0 ; i < NATSEMI_EELOAD_MAX_WAIT_MS ; i++ ) {
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
 
-		/* If reload is not complete, delay 1ms and retry */
-		if ( readl ( natsemi->regs + NATSEMI_PTSCR ) &
-		     NATSEMI_PTSCR_EELOAD_EN ) {
-			mdelay ( 1 );
-			continue;
-		}
+	return 0;
 
-		return 0;
-	}
+err_register_netdev:
 
-	DBGC ( natsemi, "NATSEMI %p timed out waiting for configuration "
-	       "reload\n", natsemi );
-	return -ETIMEDOUT;
+	natsemi_reset (netdev);
+	netdev_put (netdev);
+	return rc;
 }
 
 /**
- * Reset hardware
+ * Remove PCI device
  *
- * @v natsemi		National Semiconductor device
- * @ret rc		Return status code
+ * @v pci	PCI device
  */
-static int natsemi_reset ( struct natsemi_nic *natsemi ) {
-	uint32_t cfg;
-	int rc;
-
-	/* Perform soft reset */
-	if ( ( rc = natsemi_soft_reset ( natsemi ) ) != 0 )
-		return rc;
-
-	/* Reload configuration from EEPROM */
-	if ( ( rc = natsemi_reload_config ( natsemi ) ) != 0 )
-		return rc;
-
-	/* Configure 64-bit operation, if applicable */
-	cfg = readl ( natsemi->regs + NATSEMI_CFG );
-	if ( natsemi->flags & NATSEMI_64BIT ) {
-		cfg |= ( NATSEMI_CFG_M64ADDR | NATSEMI_CFG_EXTSTS_EN );
-		if ( ! ( cfg & NATSEMI_CFG_PCI64_DET ) )
-			cfg &= ~NATSEMI_CFG_DATA64_EN;
-	}
-	writel ( cfg, natsemi->regs + NATSEMI_CFG );
-
-	/* Invalidate link status cache to force an update */
-	natsemi->cfg = ~cfg;
-
-	DBGC ( natsemi, "NATSEMI %p using configuration %08x\n",
-	       natsemi, cfg );
-	return 0;
+static void natsemi_remove (struct pci_device *pci) {
+	struct net_device *netdev = pci_get_drvdata (pci);
+ 
+	unregister_netdev (netdev);
+	natsemi_reset (netdev);
+	netdev_nullify ( netdev );
+	netdev_put (netdev);
 }
 
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
 /**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void natsemi_check_link ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	uint32_t cfg;
-
-	/* Read link status */
-	cfg = readl ( natsemi->regs + NATSEMI_CFG );
-
-	/* Do nothing unless link status has changed */
-	if ( cfg == natsemi->cfg )
-		return;
-
-	/* Set gigabit mode (if applicable) */
-	if ( natsemi->flags & NATSEMI_1000 ) {
-		cfg &= ~NATSEMI_CFG_MODE_1000;
-		if ( ! ( cfg & NATSEMI_CFG_SPDSTS1 ) )
-			cfg |= NATSEMI_CFG_MODE_1000;
-		writel ( cfg, natsemi->regs + NATSEMI_CFG );
-	}
-
-	/* Update link status */
-	natsemi->cfg = cfg;
-	DBGC ( natsemi, "NATSEMI %p link status is %08x\n", natsemi, cfg );
-
-	/* Update network device */
-	if ( cfg & NATSEMI_CFG_LNKSTS ) {
-		netdev_link_up ( netdev );
-	} else {
-		netdev_link_down ( netdev );
-	}
-}
-
-/******************************************************************************
+ * Reset NIC
  *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Set perfect match filter address
+ * @v		NATSEMI NIC
  *
- * @v natsemi		National Semiconductor device
- * @v mac		MAC address
+ * Issues a hardware reset and waits for the reset to complete.
  */
-static void natsemi_pmatch ( struct natsemi_nic *natsemi, const void *mac ) {
-	const uint16_t *pmatch = mac;
-	uint32_t rfcr;
-	unsigned int rfaddr;
-	unsigned int i;
-
-	for ( i = 0 ; i < ETH_ALEN ; i += sizeof ( *pmatch ) ) {
-
-		/* Select receive filter register address */
-		rfaddr = ( NATSEMI_RFADDR_PMATCH_BASE + i );
-		rfcr = readl ( natsemi->regs + NATSEMI_RFCR );
-		rfcr &= ~NATSEMI_RFCR_RFADDR_MASK;
-		rfcr |= NATSEMI_RFCR_RFADDR ( rfaddr );
-		writel ( rfcr, natsemi->regs + NATSEMI_RFCR );
-
-		/* Write receive filter data */
-		writel ( ( le16_to_cpu ( *(pmatch++) ) | NATSEMI_RFDR_BMASK ),
-			 natsemi->regs + NATSEMI_RFDR );
-	}
+static void natsemi_reset (struct net_device *netdev) 
+{
+	struct natsemi_private *np = netdev->priv;
+	int i;
+        u32 cfg;
+        u32 wcsr;
+        u32 rfcr;
+        u16 pmatch[3];
+        u16 sopass[3];
+
+	natsemi_irq (netdev, 0);
+
+        /*
+         * Resetting the chip causes some registers to be lost.
+         * Natsemi suggests NOT reloading the EEPROM while live, so instead
+         * we save the state that would have been loaded from EEPROM
+         * on a normal power-up (see the spec EEPROM map).
+         */
+
+        /* CFG */
+        cfg = inl (np->ioaddr + ChipConfig) & CFG_RESET_SAVE;
+
+        /* WCSR */
+        wcsr = inl (np->ioaddr + WOLCmd) & WCSR_RESET_SAVE;
+
+        /* RFCR */
+        rfcr = inl (np->ioaddr + RxFilterAddr) & RFCR_RESET_SAVE;
+
+        /* PMATCH */
+        for (i = 0; i < 3; i++) {
+		outl(i*2, np->ioaddr + RxFilterAddr);
+		pmatch[i] = inw(np->ioaddr + RxFilterData);
+        }
+
+        /* SOPAS */
+        for (i = 0; i < 3; i++) {
+	  	outl(0xa+(i*2), np->ioaddr + RxFilterAddr);
+		sopass[i] = inw(np->ioaddr + RxFilterData);
+        }
+
+        /* now whack the chip */
+        outl(ChipReset, np->ioaddr + ChipCmd);
+        for (i=0; i<NATSEMI_HW_TIMEOUT; i++) {
+		if (! (inl (np->ioaddr + ChipCmd) & ChipReset))
+		       break;
+		udelay(5);
+        }
+        if (i == NATSEMI_HW_TIMEOUT) {
+	  	DBG ("natsemi_reset: reset did not complete in %d usec.\n", i*5);
+        }
+
+        /* restore CFG */
+        cfg |= inl(np->ioaddr + ChipConfig) & ~CFG_RESET_SAVE;
+	cfg &= ~(CfgExtPhy | CfgPhyDis);
+        outl (cfg, np->ioaddr + ChipConfig);
+
+        /* restore WCSR */
+        wcsr |= inl (np->ioaddr + WOLCmd) & ~WCSR_RESET_SAVE;
+        outl (wcsr, np->ioaddr + WOLCmd);
+
+        /* read RFCR */
+        rfcr |= inl (np->ioaddr + RxFilterAddr) & ~RFCR_RESET_SAVE;
+
+        /* restore PMATCH */
+        for (i = 0; i < 3; i++) {
+	  	outl (i*2, np->ioaddr + RxFilterAddr);
+		outw (pmatch[i], np->ioaddr + RxFilterData);
+        }
+        for (i = 0; i < 3; i++) {
+		outl (0xa+(i*2), np->ioaddr + RxFilterAddr);
+		outw (sopass[i], np->ioaddr + RxFilterData);
+        }
+        /* restore RFCR */
+        outl (rfcr, np->ioaddr + RxFilterAddr);
 }
 
 /**
- * Create descriptor ring
+ * Open NIC
  *
- * @v natsemi		National Semiconductor device
- * @v ring		Descriptor ring
+ * @v netdev		Net device
  * @ret rc		Return status code
  */
-static int natsemi_create_ring ( struct natsemi_nic *natsemi,
-				 struct natsemi_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-	union natsemi_descriptor *desc;
-	union natsemi_descriptor *linked_desc;
-	physaddr_t address;
-	physaddr_t link;
-	size_t offset;
-	unsigned int i;
-	int rc;
-
-	/* Calculate descriptor offset */
-	offset = ( ( natsemi->flags & NATSEMI_64BIT ) ? 0 :
-		   offsetof ( typeof ( desc[i].d32pad ), d32 ) );
-
-	/* Allocate descriptor ring.  Align ring on its own size to
-	 * ensure that it can't possibly cross the boundary of 32-bit
-	 * address space.
-	 */
-	ring->desc = malloc_dma ( len, len );
-	if ( ! ring->desc ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	address = ( virt_to_bus ( ring->desc ) + offset );
-
-	/* Check address is usable by card */
-	if ( ! natsemi_address_ok ( natsemi, address ) ) {
-		DBGC ( natsemi, "NATSEMI %p cannot support 64-bit ring "
-		       "address\n", natsemi );
-		rc = -ENOTSUP;
-		goto err_64bit;
-	}
+static int natsemi_open (struct net_device *netdev)
+{
+	struct natsemi_private *np = netdev->priv;
+	uint32_t tx_config, rx_config;
+	int i;
+	
+	/* Disable PME:
+         * The PME bit is initialized from the EEPROM contents.
+         * PCI cards probably have PME disabled, but motherboard
+         * implementations may have PME set to enable WakeOnLan. 
+         * With PME set the chip will scan incoming packets but
+         * nothing will be written to memory. 
+         */
+        outl (inl (np->ioaddr + ClkRun) & ~0x100, np->ioaddr + ClkRun);
 
-	/* Initialise descriptor ring */
-	memset ( ring->desc, 0, len );
-	for ( i = 0 ; i < ring->count ; i++ ) {
-		linked_desc = &ring->desc [ ( i + 1 ) % ring->count ];
-		link = ( virt_to_bus ( linked_desc ) + offset );
-		if ( natsemi->flags & NATSEMI_64BIT ) {
-			ring->desc[i].d64.link = cpu_to_le64 ( link );
-		} else {
-			ring->desc[i].d32pad.d32.link = cpu_to_le32 ( link );
-		}
+	/* Set MAC address in NIC
+	 */
+	for (i = 0 ; i < ETH_ALEN ; i+=2) {
+		outl (i, np->ioaddr + RxFilterAddr);
+		outw (netdev->ll_addr[i] + (netdev->ll_addr[i + 1] << 8),
+		       np->ioaddr + RxFilterData);
 	}
 
-	/* Program ring address */
-	writel ( ( address & 0xffffffffUL ), natsemi->regs + ring->reg );
-	if ( natsemi->flags & NATSEMI_64BIT ) {
-		if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
-			writel ( ( ( ( uint64_t ) address ) >> 32 ),
-				 natsemi->regs + ring->reg + 4 );
-		} else {
-			writel ( 0, natsemi->regs + ring->reg + 4 );
-		}
+	/* Setup Tx Ring 
+	 */
+	np->tx_cur = 0;
+	np->tx_dirty = 0;
+	for (i = 0 ; i < TX_RING_SIZE ; i++) {
+		np->tx[i].link   = virt_to_bus ((i + 1 < TX_RING_SIZE) ? &np->tx[i + 1] : &np->tx[0]);
+		np->tx[i].cmdsts = 0;
+		np->tx[i].bufptr = 0;
 	}
+	outl (virt_to_bus (&np->tx[0]),np->ioaddr + TxRingPtr);
 
-	DBGC ( natsemi, "NATSEMI %p ring %02x is at [%08llx,%08llx)\n",
-	       natsemi, ring->reg,
-	       ( ( unsigned long long ) virt_to_bus ( ring->desc ) ),
-	       ( ( unsigned long long ) virt_to_bus ( ring->desc ) + len ) );
-
-	return 0;
-
- err_64bit:
-	free_dma ( ring->desc, len );
-	ring->desc = NULL;
- err_alloc:
-	return rc;
-}
-
-/**
- * Destroy descriptor ring
- *
- * @v natsemi		National Semiconductor device
- * @v ring		Descriptor ring
- */
-static void natsemi_destroy_ring ( struct natsemi_nic *natsemi,
-				   struct natsemi_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-
-	/* Clear ring address */
-	writel ( 0, natsemi->regs + ring->reg );
-	if ( natsemi->flags & NATSEMI_64BIT )
-		writel ( 0, natsemi->regs + ring->reg + 4 );
-
-	/* Free descriptor ring */
-	free_dma ( ring->desc, len );
-	ring->desc = NULL;
-	ring->prod = 0;
-	ring->cons = 0;
-}
-
-/**
- * Refill receive descriptor ring
- *
- * @v netdev		Network device
- */
-static void natsemi_refill_rx ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	union natsemi_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	physaddr_t address;
-
-	while ( ( natsemi->rx.prod - natsemi->rx.cons ) < NATSEMI_NUM_RX_DESC ){
-
-		/* Allocate I/O buffer */
-		iobuf = alloc_iob ( NATSEMI_RX_MAX_LEN );
-		if ( ! iobuf ) {
-			/* Wait for next refill */
-			return;
-		}
+	DBG ("Natsemi Tx descriptor loaded with: %#08x\n",
+	     inl (np->ioaddr + TxRingPtr));
 
-		/* Check address is usable by card */
-		address = virt_to_bus ( iobuf->data );
-		if ( ! natsemi_address_ok ( natsemi, address ) ) {
-			DBGC ( natsemi, "NATSEMI %p cannot support 64-bit RX "
-			       "buffer address\n", natsemi );
-			netdev_rx_err ( netdev, iobuf, -ENOTSUP );
-			return;
-		}
-
-		/* Get next receive descriptor */
-		rx_idx = ( natsemi->rx.prod++ % NATSEMI_NUM_RX_DESC );
-		rx = &natsemi->rx.desc[rx_idx];
-
-		/* Populate receive descriptor */
-		if ( natsemi->flags & NATSEMI_64BIT ) {
-			rx->d64.bufptr = cpu_to_le64 ( address );
-		} else {
-			rx->d32pad.d32.bufptr = cpu_to_le32 ( address );
-		}
-		wmb();
-		rx->common.cmdsts = cpu_to_le32 ( NATSEMI_DESC_INTR |
-						  NATSEMI_RX_MAX_LEN );
-		wmb();
-
-		/* Record I/O buffer */
-		assert ( natsemi->rx_iobuf[rx_idx] == NULL );
-		natsemi->rx_iobuf[rx_idx] = iobuf;
-
-		/* Notify card that there are descriptors available */
-		writel ( NATSEMI_CR_RXE, natsemi->regs + NATSEMI_CR );
-
-		DBGC2 ( natsemi, "NATSEMI %p RX %d is [%llx,%llx)\n", natsemi,
-			rx_idx, ( ( unsigned long long ) address ),
-			( ( unsigned long long ) address + NATSEMI_RX_MAX_LEN));
+	/* Setup RX ring
+	 */
+	np->rx_cur = 0;
+	for (i = 0 ; i < NUM_RX_DESC ; i++) {
+		np->iobuf[i] = alloc_iob (RX_BUF_SIZE);
+		if (! np->iobuf[i])
+			goto memory_alloc_err;
+		np->rx[i].link   = virt_to_bus ((i + 1 < NUM_RX_DESC) 
+						? &np->rx[i + 1] : &np->rx[0]);
+		np->rx[i].cmdsts = RX_BUF_SIZE;
+		np->rx[i].bufptr = virt_to_bus (np->iobuf[i]->data);
+		DBG (" Address of iobuf [%d] = %p and iobuf->data = %p \n", i, 
+		      &np->iobuf[i],  &np->iobuf[i]->data);
 	}
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int natsemi_open ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	int rc;
+	outl (virt_to_bus (&np->rx[0]), np->ioaddr + RxRingPtr);
 
-	/* Set MAC address */
-	natsemi_pmatch ( natsemi, netdev->ll_addr );
+	DBG ("Natsemi Rx descriptor loaded with: %#08x\n",
+	      inl (np->ioaddr + RxRingPtr));		
 
-	/* Create transmit descriptor ring */
-	if ( ( rc = natsemi_create_ring ( natsemi, &natsemi->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Set transmit configuration */
-	writel ( ( NATSEMI_TXCFG_CSI | NATSEMI_TXCFG_HBI | NATSEMI_TXCFG_ATP |
-		   NATSEMI_TXCFG_ECRETRY | NATSEMI_TXCFG_MXDMA_DEFAULT |
-		   NATSEMI_TXCFG_FLTH_DEFAULT | NATSEMI_TXCFG_DRTH_DEFAULT ),
-		 ( natsemi->regs + ( ( natsemi->flags & NATSEMI_64BIT ) ?
-				     NATSEMI_TXCFG_64 : NATSEMI_TXCFG_32 ) ) );
-
-	/* Create receive descriptor ring */
-	if ( ( rc = natsemi_create_ring ( natsemi, &natsemi->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Set receive configuration */
-	writel ( ( NATSEMI_RXCFG_ARP | NATSEMI_RXCFG_ATX | NATSEMI_RXCFG_ALP |
-		   NATSEMI_RXCFG_MXDMA_DEFAULT | NATSEMI_RXCFG_DRTH_DEFAULT ),
-		 ( natsemi->regs + ( ( natsemi->flags & NATSEMI_64BIT ) ?
-				     NATSEMI_RXCFG_64 : NATSEMI_RXCFG_32 ) ) );
-
-	/* Set receive filter configuration */
-	writel ( ( NATSEMI_RFCR_RFEN | NATSEMI_RFCR_AAB | NATSEMI_RFCR_AAM |
-		   NATSEMI_RFCR_AAU ), natsemi->regs + NATSEMI_RFCR );
-
-	/* Fill receive ring */
-	natsemi_refill_rx ( netdev );
-
-	/* Unmask transmit and receive interrupts.  (Interrupts will
-	 * not be generated unless enabled via the IER.)
+	/* Setup RX Filter 
 	 */
-	writel ( ( NATSEMI_IRQ_TXDESC | NATSEMI_IRQ_RXDESC ),
-		 natsemi->regs + NATSEMI_IMR );
+	outl (RxFilterEnable | AcceptBroadcast | AcceptAllMulticast | AcceptMyPhys,
+	      np->ioaddr + RxFilterAddr);
 
-	/* Update link state */
-	natsemi_check_link ( netdev );
+	/* Initialize other registers. 
+	 * Configure the PCI bus bursts and FIFO thresholds. 
+	 * Configure for standard, in-spec Ethernet. 
+	 */
+	if (inl (np->ioaddr + ChipConfig) & 0x20000000) {	/* Full duplex */
+		DBG ("Full duplex\n");
+		tx_config = 0xD0801002 |  0xC0000000;
+		rx_config = 0x10000020 |  0x10000000;
+	} else {
+		DBG ("Half duplex\n");
+		tx_config = 0x10801002 & ~0xC0000000;
+		rx_config = 0x00000020 & ~0x10000000;
+	}
+	outl (tx_config, np->ioaddr + TxConfig);
+	outl (rx_config, np->ioaddr + RxConfig);
+
+	DBG ("Tx config register = %#08x Rx config register = %#08x\n", 
+               inl (np->ioaddr + TxConfig),
+	       inl (np->ioaddr + RxConfig));
 
+	/*Set the Interrupt Mask register
+	 */
+	outl((RxOk|RxErr|TxOk|TxErr),np->ioaddr + IntrMask);
+	/*start the receiver 
+	 */
+        outl (RxOn, np->ioaddr + ChipCmd);
+	
 	return 0;
+		       
+memory_alloc_err:
 
-	natsemi_destroy_ring ( natsemi, &natsemi->rx );
- err_create_rx:
-	natsemi_destroy_ring ( natsemi, &natsemi->tx );
- err_create_tx:
-	return rc;
+	/* Frees any allocated buffers when memory
+	 * for all buffers requested is not available
+	 */
+	i = 0;
+	while (np->rx[i].cmdsts == RX_BUF_SIZE) {
+		free_iob (np->iobuf[i]);
+		i++;
+	}
+	return -ENOMEM;	
 }
 
 /**
- * Close network device
+ * Close NIC
  *
- * @v netdev		Network device
+ * @v netdev		Net device
  */
-static void natsemi_close ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	unsigned int i;
-
-	/* Mask transmit and receive interrupts */
-	writel ( 0, natsemi->regs + NATSEMI_IMR );
-
-	/* Reset and disable transmitter and receiver */
-	writel ( ( NATSEMI_CR_RXR | NATSEMI_CR_TXR ),
-		 natsemi->regs + NATSEMI_CR );
-
-	/* Discard any unused receive buffers */
-	for ( i = 0 ; i < NATSEMI_NUM_RX_DESC ; i++ ) {
-		if ( natsemi->rx_iobuf[i] )
-			free_iob ( natsemi->rx_iobuf[i] );
-		natsemi->rx_iobuf[i] = NULL;
-	}
+static void natsemi_close (struct net_device *netdev) 
+{
+	struct natsemi_private *np = netdev->priv;
+	int i;
 
-	/* Destroy receive descriptor ring */
-	natsemi_destroy_ring ( natsemi, &natsemi->rx );
+	natsemi_reset (netdev);
 
-	/* Destroy transmit descriptor ring */
-	natsemi_destroy_ring ( natsemi, &natsemi->tx );
+	for (i = 0; i < NUM_RX_DESC ; i++) {
+		free_iob (np->iobuf[i]);
+	}
 }
 
-/**
+/** 
  * Transmit packet
  *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int natsemi_transmit ( struct net_device *netdev,
-			       struct io_buffer *iobuf ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	union natsemi_descriptor *tx;
-	unsigned int tx_idx;
-	physaddr_t address;
-
-	/* Check address is usable by card */
-	address = virt_to_bus ( iobuf->data );
-	if ( ! natsemi_address_ok ( natsemi, address ) ) {
-		DBGC ( natsemi, "NATSEMI %p cannot support 64-bit TX buffer "
-		       "address\n", natsemi );
-		return -ENOTSUP;
-	}
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ * @ret rc	Return status code
+ */
+static int natsemi_transmit (struct net_device *netdev, struct io_buffer *iobuf)
+{
+	struct natsemi_private *np = netdev->priv;
 
-	/* Get next transmit descriptor */
-	if ( ( natsemi->tx.prod - natsemi->tx.cons ) >= NATSEMI_NUM_TX_DESC ) {
-		DBGC ( natsemi, "NATSEMI %p out of transmit descriptors\n",
-		       natsemi );
+	if (np->tx[np->tx_cur].cmdsts != 0) {
+		DBG ("TX overflow\n");
 		return -ENOBUFS;
 	}
-	tx_idx = ( natsemi->tx.prod++ % NATSEMI_NUM_TX_DESC );
-	tx = &natsemi->tx.desc[tx_idx];
 
-	/* Populate transmit descriptor */
-	if ( natsemi->flags & NATSEMI_64BIT ) {
-		tx->d64.bufptr = cpu_to_le64 ( address );
-	} else {
-		tx->d32pad.d32.bufptr = cpu_to_le32 ( address );
-	}
-	wmb();
-	tx->common.cmdsts = cpu_to_le32 ( NATSEMI_DESC_OWN | NATSEMI_DESC_INTR |
-					  iob_len ( iobuf ) );
-	wmb();
-
-	/* Notify card that there are packets ready to transmit */
-	writel ( NATSEMI_CR_TXE, natsemi->regs + NATSEMI_CR );
-
-	DBGC2 ( natsemi, "NATSEMI %p TX %d is [%llx,%llx)\n", natsemi, tx_idx,
-		( ( unsigned long long ) address ),
-		( ( unsigned long long ) address + iob_len ( iobuf ) ) );
-
-	return 0;
-}
+	/* Used by netdev_tx_complete ()
+	 */
+	np->tx_iobuf[np->tx_cur] = iobuf;
 
-/**
- * Poll for completed packets
- *
- * @v netdev		Network device
- */
-static void natsemi_poll_tx ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	union natsemi_descriptor *tx;
-	unsigned int tx_idx;
-
-	/* Check for completed packets */
-	while ( natsemi->tx.cons != natsemi->tx.prod ) {
-
-		/* Get next transmit descriptor */
-		tx_idx = ( natsemi->tx.cons % NATSEMI_NUM_TX_DESC );
-		tx = &natsemi->tx.desc[tx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( tx->common.cmdsts & cpu_to_le32 ( NATSEMI_DESC_OWN ) )
-			return;
-
-		/* Complete TX descriptor */
-		if ( tx->common.cmdsts & cpu_to_le32 ( NATSEMI_DESC_OK ) ) {
-			DBGC2 ( natsemi, "NATSEMI %p TX %d complete\n",
-				natsemi, tx_idx );
-			netdev_tx_complete_next ( netdev );
-		} else {
-			DBGC ( natsemi, "NATSEMI %p TX %d completion error "
-			       "(%08x)\n", natsemi, tx_idx,
-			       le32_to_cpu ( tx->common.cmdsts ) );
-			netdev_tx_complete_next_err ( netdev, -EIO );
-		}
-		natsemi->tx.cons++;
-	}
-}
+	/* Pad and align packet has not been used because its not required 
+	 * by the hardware.
+	 * 	iob_pad (iobuf, ETH_ZLEN); 
+	 * can be used to achieve it, if required
+	 */
 
-/**
- * Poll for received packets
- *
- * @v netdev		Network device
- */
-static void natsemi_poll_rx ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	union natsemi_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	size_t len;
-
-	/* Check for received packets */
-	while ( natsemi->rx.cons != natsemi->rx.prod ) {
-
-		/* Get next receive descriptor */
-		rx_idx = ( natsemi->rx.cons % NATSEMI_NUM_RX_DESC );
-		rx = &natsemi->rx.desc[rx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( ! ( rx->common.cmdsts & NATSEMI_DESC_OWN ) )
-			return;
-
-		/* Populate I/O buffer */
-		iobuf = natsemi->rx_iobuf[rx_idx];
-		natsemi->rx_iobuf[rx_idx] = NULL;
-		len = ( le32_to_cpu ( rx->common.cmdsts ) &
-			NATSEMI_DESC_SIZE_MASK );
-		iob_put ( iobuf, len - 4 /* strip CRC */ );
-
-		/* Hand off to network stack */
-		if ( rx->common.cmdsts & cpu_to_le32 ( NATSEMI_DESC_OK ) ) {
-			DBGC2 ( natsemi, "NATSEMI %p RX %d complete (length "
-				"%zd)\n", natsemi, rx_idx, len );
-			netdev_rx ( netdev, iobuf );
-		} else {
-			DBGC ( natsemi, "NATSEMI %p RX %d error (length %zd, "
-			       "status %08x)\n", natsemi, rx_idx, len,
-			       le32_to_cpu ( rx->common.cmdsts ) );
-			netdev_rx_err ( netdev, iobuf, -EIO );
-		}
-		natsemi->rx.cons++;
-	}
-}
+	/* Add the packet to TX ring
+	 */
+	np->tx[np->tx_cur].bufptr = virt_to_bus (iobuf->data);
+	np->tx[np->tx_cur].cmdsts = iob_len (iobuf) | OWN;
 
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void natsemi_poll ( struct net_device *netdev ) {
-	struct natsemi_nic *natsemi = netdev->priv;
-	uint32_t isr;
-
-	/* Poll for link state.  The PHY interrupt seems not to
-	 * function as expected, and polling for the link state is
-	 * only a single register read.
-	 */
-	natsemi_check_link ( netdev );
-
-	/* Check for and acknowledge interrupts */
-	isr = readl ( natsemi->regs + NATSEMI_ISR );
-	if ( ! isr )
-		return;
-
-	/* Poll for TX completions, if applicable */
-	if ( isr & NATSEMI_IRQ_TXDESC )
-		natsemi_poll_tx ( netdev );
-
-	/* Poll for RX completionsm, if applicable */
-	if ( isr & NATSEMI_IRQ_RXDESC )
-		natsemi_poll_rx ( netdev );
+	DBG ("TX id %d at %#08lx + %#08zx\n", np->tx_cur,
+	     virt_to_bus (&iobuf->data), iob_len (iobuf));
 
-	/* Refill RX ring */
-	natsemi_refill_rx ( netdev );
-}
+	/* increment the circular buffer pointer to the next buffer location
+	 */
+	np->tx_cur = (np->tx_cur + 1) % TX_RING_SIZE;
 
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void natsemi_irq ( struct net_device *netdev, int enable ) {
-	struct natsemi_nic *natsemi = netdev->priv;
+	/*start the transmitter 
+	 */
+        outl (TxOn, np->ioaddr + ChipCmd);
 
-	/* Enable or disable interrupts */
-	writel ( ( enable ? NATSEMI_IER_IE : 0 ), natsemi->regs + NATSEMI_IER );
+	return 0;
 }
 
-/** National Semiconductor network device operations */
-static struct net_device_operations natsemi_operations = {
-	.open		= natsemi_open,
-	.close		= natsemi_close,
-	.transmit	= natsemi_transmit,
-	.poll		= natsemi_poll,
-	.irq		= natsemi_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
+/** 
+ * Poll for received packets
  *
- * @v pci		PCI device
- * @ret rc		Return status code
+ * @v netdev	Network device
  */
-static int natsemi_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct natsemi_nic *natsemi;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *natsemi ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &natsemi_operations );
-	natsemi = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( natsemi, 0, sizeof ( *natsemi ) );
-	natsemi->flags = pci->id->driver_data;
-	natsemi_init_ring ( &natsemi->tx, NATSEMI_NUM_TX_DESC, NATSEMI_TXDP );
-	natsemi_init_ring ( &natsemi->rx, NATSEMI_NUM_RX_DESC, NATSEMI_RXDP );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	natsemi->regs = ioremap ( pci->membase, NATSEMI_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = natsemi_reset ( natsemi ) ) != 0 )
-		goto err_reset;
-
-	/* Initialise EEPROM */
-	natsemi_init_eeprom ( natsemi );
-
-	/* Read initial MAC address */
-	if ( ( rc = natsemi_hwaddr ( natsemi, netdev->hw_addr ) ) != 0 )
-		goto err_hwaddr;
+static void natsemi_poll (struct net_device *netdev)
+{
+	struct natsemi_private *np = netdev->priv;
+	unsigned int tx_status;
+	unsigned int rx_status;
+	unsigned int intr_status;
+	unsigned int rx_len;
+	struct io_buffer *rx_iob;
+	int i;
+	
+	/* read the interrupt register
+	 */
+	intr_status = inl (np->ioaddr + IntrStatus);
 
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
+	if (!intr_status)
+		goto end;
 
-	/* Set initial link state */
-	natsemi_check_link ( netdev );
+        DBG ("natsemi_poll: intr_status = %#08x\n", intr_status);
 
-	return 0;
+	/* Check status of transmitted packets
+	 */
+	i = np->tx_dirty;
+	while (i != np->tx_cur) {
+	  	tx_status = np->tx[np->tx_dirty].cmdsts;
+
+		DBG ("tx_dirty = %d tx_cur=%d tx_status=%#08x\n",
+		     np->tx_dirty, np->tx_cur, tx_status);
+		
+		if (tx_status & OWN) 
+			break;
+
+		if (! (tx_status & DescPktOK)) {
+			netdev_tx_complete_err (netdev,np->tx_iobuf[np->tx_dirty],-EINVAL);
+			DBG ("Error transmitting packet, tx_status: %#08x\n",
+			     tx_status);
+		} else {
+			netdev_tx_complete (netdev, np->tx_iobuf[np->tx_dirty]);
+			DBG ("Success transmitting packet\n");
+		}
 
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_hwaddr:
-	natsemi_reset ( natsemi );
- err_reset:
-	iounmap ( natsemi->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
+		np->tx[np->tx_dirty].cmdsts = 0;
+		np->tx_dirty = (np->tx_dirty + 1) % TX_RING_SIZE;
+		i = (i + 1) % TX_RING_SIZE;
+	}
+	
+	/* Process received packets 
+	 */
+	rx_status = (unsigned int) np->rx[np->rx_cur].cmdsts; 
+	while ((rx_status & OWN)) {
+		rx_len = (rx_status & DSIZE) - CRC_SIZE;
+
+                DBG ("Received packet, rx_curr = %d, rx_status = %#08x, rx_len = %d\n",
+                     np->rx_cur, rx_status, rx_len);
+                
+		if ((rx_status & (DescMore | DescPktOK | RxTooLong)) != DescPktOK) {
+			netdev_rx_err (netdev, NULL, -EINVAL);
+
+			DBG ("natsemi_poll: Corrupted packet received!"
+			     " Status = %#08x\n",
+			      np->rx[np->rx_cur].cmdsts);
+
+		} else 	{
+
+
+			/* If unable allocate space for this packet,
+			 *  try again next poll
+			 */
+			rx_iob = alloc_iob (rx_len);
+			if (! rx_iob) 
+				goto end;
+			memcpy (iob_put (rx_iob, rx_len), 
+				np->iobuf[np->rx_cur]->data, rx_len);
+			/* Add this packet to the receive queue. 
+			 */
+			netdev_rx (netdev, rx_iob);
+		}
+		np->rx[np->rx_cur].cmdsts = RX_BUF_SIZE;
+		np->rx_cur = (np->rx_cur + 1) % NUM_RX_DESC;
+		rx_status = np->rx[np->rx_cur].cmdsts; 
+	}
+end:
+	/* re-enable the potentially idle receive state machine 
+	 */
+	outl (RxOn, np->ioaddr + ChipCmd);	
+}				
 
 /**
- * Remove PCI device
+ * Enable/disable interrupts
  *
- * @v pci		PCI device
+ * @v netdev    Network device
+ * @v enable    Non-zero for enable, zero for disable
  */
-static void natsemi_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct natsemi_nic *natsemi = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	natsemi_reset ( natsemi );
+static void natsemi_irq (struct net_device *netdev, int enable)
+{
+        struct natsemi_private *np = netdev->priv;
 
-	/* Free network device */
-	iounmap ( natsemi->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
+	outl ((enable ? (RxOk | RxErr | TxOk|TxErr) : 0),
+	      np->ioaddr + IntrMask); 
+	outl ((enable ? 1 : 0), np->ioaddr + IntrEnable);
 }
 
-/** Flags for DP83815 */
-#define DP83815_FLAGS ( NATSEMI_EEPROM_LITTLE_ENDIAN | NATSEMI_EEPROM_INSANE )
-
-/** Flags for DP83820 */
-#define DP83820_FLAGS ( NATSEMI_64BIT | NATSEMI_1000 )
-
-/** National Semiconductor PCI device IDs */
 static struct pci_device_id natsemi_nics[] = {
-	PCI_ROM ( 0x100b, 0x0020, "dp83815", "DP83815", DP83815_FLAGS ),
-	PCI_ROM ( 0x100b, 0x0022, "dp83820", "DP83820", DP83820_FLAGS ),
+	PCI_ROM(0x100b, 0x0020, "dp83815", "DP83815", 0),
 };
 
-/** National Semiconductor PCI driver */
 struct pci_driver natsemi_driver __pci_driver = {
 	.ids = natsemi_nics,
-	.id_count = ( sizeof ( natsemi_nics ) / sizeof ( natsemi_nics[0] ) ),
+	.id_count = (sizeof (natsemi_nics) / sizeof (natsemi_nics[0])),
 	.probe = natsemi_probe,
 	.remove = natsemi_remove,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/natsemi.h ipxe-1.0.1~lliurex1505/src/drivers/net/natsemi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/natsemi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/natsemi.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,329 +1,232 @@
-#ifndef _NATSEMI_H
-#define _NATSEMI_H
+FILE_LICENCE ( GPL_ANY );
 
-/** @file
- *
- * National Semiconductor "MacPhyter" network card driver
- *
- */
+#define NATSEMI_HW_TIMEOUT 400
 
-FILE_LICENCE ( GPL2_OR_LATER );
+#define TX_RING_SIZE 4
+#define NUM_RX_DESC  4
+#define RX_BUF_SIZE 1536
+#define OWN       0x80000000
+#define DSIZE     0x00000FFF
+#define CRC_SIZE  4
 
-#include <stdint.h>
-#include <ipxe/spi.h>
-#include <ipxe/spi_bit.h>
-
-/** BAR size */
-#define NATSEMI_BAR_SIZE 0x100
-
-/** A 32-bit packet descriptor */
-struct natsemi_descriptor_32 {
-	/** Link to next descriptor */
+struct natsemi_tx {
 	uint32_t link;
-	/** Command / status */
 	uint32_t cmdsts;
-	/** Buffer pointer */
 	uint32_t bufptr;
-} __attribute__ (( packed ));
+};
 
-/** A 64-bit packet descriptor */
-struct natsemi_descriptor_64 {
-	/** Link to next descriptor */
-	uint64_t link;
-	/** Buffer pointer */
-	uint64_t bufptr;
-	/** Command / status */
+struct natsemi_rx {
+	uint32_t link;
 	uint32_t cmdsts;
-	/** Extended status */
-	uint32_t extsts;
-} __attribute__ (( packed ));
-
-/** A packet descriptor
- *
- * The 32-bit and 64-bit variants are overlaid such that "cmdsts" can
- * be accessed as a common field, and the overall size is a power of
- * two (to allow the descriptor ring length to be used as an
- * alignment).
- */
-union natsemi_descriptor {
-	/** Common fields */
-	struct {
-		/** Reserved */
-		uint8_t reserved_a[16];
-		/** Command / status */
-		uint32_t cmdsts;
-		/** Reserved */
-		uint8_t reserved_b[12];
-	} __attribute__ (( packed )) common;
-	/** 64-bit descriptor */
-	struct natsemi_descriptor_64 d64;
-	/** 32-bit descriptor */
-	struct {
-		/** Reserved */
-		uint8_t reserved[12];
-		/** Descriptor */
-		struct natsemi_descriptor_32 d32;
-	} __attribute__ (( packed )) d32pad;
-};
-
-/** Descriptor buffer size mask */
-#define NATSEMI_DESC_SIZE_MASK 0xfff
-
-/** Packet descriptor flags */
-enum natsemi_descriptor_flags {
-	/** Descriptor is owned by NIC */
-	NATSEMI_DESC_OWN = 0x80000000UL,
-	/** Request descriptor interrupt */
-	NATSEMI_DESC_INTR = 0x20000000UL,
-	/** Packet OK */
-	NATSEMI_DESC_OK = 0x08000000UL,
-};
-
-/** Command Register */
-#define NATSEMI_CR 0x0000
-#define NATSEMI_CR_RST		0x00000100UL	/**< Reset */
-#define NATSEMI_CR_RXR		0x00000020UL	/**< Receiver reset */
-#define NATSEMI_CR_TXR		0x00000010UL	/**< Transmit reset */
-#define NATSEMI_CR_RXE		0x00000004UL	/**< Receiver enable */
-#define NATSEMI_CR_TXE		0x00000001UL	/**< Transmit enable */
-
-/** Maximum time to wait for a reset, in milliseconds */
-#define NATSEMI_RESET_MAX_WAIT_MS 100
-
-/** Configuration and Media Status Register */
-#define NATSEMI_CFG 0x0004
-#define NATSEMI_CFG_LNKSTS	0x80000000UL	/**< Link status */
-#define NATSEMI_CFG_SPDSTS1	0x40000000UL	/**< Speed status bit 1 */
-#define NATSEMI_CFG_MODE_1000	0x00400000UL	/**< 1000 Mb/s mode control */
-#define NATSEMI_CFG_PCI64_DET	0x00002000UL	/**< PCI 64-bit bus detected */
-#define NATSEMI_CFG_DATA64_EN	0x00001000UL	/**< 64-bit data enable */
-#define NATSEMI_CFG_M64ADDR	0x00000800UL	/**< 64-bit address enable */
-#define NATSEMI_CFG_EXTSTS_EN	0x00000100UL	/**< Extended status enable */
-
-/** EEPROM Access Register */
-#define NATSEMI_MEAR 0x0008
-#define NATSEMI_MEAR_EESEL	0x00000008UL	/**< EEPROM chip select */
-#define NATSEMI_MEAR_EECLK	0x00000004UL	/**< EEPROM serial clock */
-#define NATSEMI_MEAR_EEDO	0x00000002UL	/**< EEPROM data out */
-#define NATSEMI_MEAR_EEDI	0x00000001UL	/**< EEPROM data in */
-
-/** Size of EEPROM (in bytes) */
-#define NATSEMI_EEPROM_SIZE 32
-
-/** Word offset of MAC address within sane EEPROM layout */
-#define NATSEMI_EEPROM_MAC_SANE 0x0a
-
-/** Word offset of MAC address within insane EEPROM layout */
-#define NATSEMI_EEPROM_MAC_INSANE 0x06
-
-/** PCI Test Control Register */
-#define NATSEMI_PTSCR 0x000c
-#define NATSEMI_PTSCR_EELOAD_EN	0x00000004UL	/**< Enable EEPROM load */
-
-/** Maximum time to wait for a configuration reload, in milliseconds */
-#define NATSEMI_EELOAD_MAX_WAIT_MS 100
-
-/** Interrupt Status Register */
-#define NATSEMI_ISR 0x0010
-#define NATSEMI_IRQ_TXDESC	0x00000080UL	/**< TX descriptor */
-#define NATSEMI_IRQ_RXDESC	0x00000002UL	/**< RX descriptor */
-
-/** Interrupt Mask Register */
-#define NATSEMI_IMR 0x0014
-
-/** Interrupt Enable Register */
-#define NATSEMI_IER 0x0018
-#define NATSEMI_IER_IE		0x00000001UL	/**< Interrupt enable */
-
-/** Transmit Descriptor Pointer */
-#define NATSEMI_TXDP 0x0020
-
-/** Transmit Descriptor Pointer High Dword (64-bit) */
-#define NATSEMI_TXDP_HI_64 0x0024
-
-/** Number of transmit descriptors */
-#define NATSEMI_NUM_TX_DESC 4
-
-/** Transmit configuration register (32-bit) */
-#define NATSEMI_TXCFG_32 0x24
-
-/** Transmit configuration register (64-bit) */
-#define NATSEMI_TXCFG_64 0x28
-#define NATSEMI_TXCFG_CSI	0x80000000UL	/**< Carrier sense ignore */
-#define NATSEMI_TXCFG_HBI	0x40000000UL	/**< Heartbeat ignore */
-#define NATSEMI_TXCFG_ATP	0x10000000UL	/**< Automatic padding */
-#define NATSEMI_TXCFG_ECRETRY	0x00800000UL	/**< Excess collision retry */
-#define NATSEMI_TXCFG_MXDMA(x)	( (x) << 20 )	/**< Max DMA burst size */
-#define NATSEMI_TXCFG_FLTH(x)	( (x) << 8 )	/**< Fill threshold */
-#define NATSEMI_TXCFG_DRTH(x)	( (x) << 0 )	/**< Drain threshold */
-
-/** Max DMA burst size (encoded value)
- *
- * This represents 256-byte bursts on 83815 controllers and 512-byte
- * bursts on 83820 controllers.
- */
-#define NATSEMI_TXCFG_MXDMA_DEFAULT NATSEMI_TXCFG_MXDMA ( 0x7 )
+	uint32_t bufptr;
+};
 
-/** Fill threshold (in units of 32 bytes)
- *
- * Must be at least as large as the max DMA burst size, so use a value
- * of 512 bytes.
- */
-#define NATSEMI_TXCFG_FLTH_DEFAULT NATSEMI_TXCFG_FLTH ( 512 / 32 )
+struct natsemi_private {
+	unsigned short ioaddr;
+	unsigned short tx_cur;
+	unsigned short tx_dirty;
+	unsigned short rx_cur;
+	struct natsemi_tx tx[TX_RING_SIZE];
+	struct natsemi_rx rx[NUM_RX_DESC];
+
+	/* need to add iobuf as we cannot free iobuf->data in close without this 
+	 * alternatively substracting sizeof(head) and sizeof(list_head) can also 
+	 * give the same.
+	 */
+	struct io_buffer *iobuf[NUM_RX_DESC];
+
+	/* netdev_tx_complete needs pointer to the iobuf of the data so as to free 
+	 * it from the memory.
+	 */
+	struct io_buffer *tx_iobuf[TX_RING_SIZE];
+	struct spi_bit_basher spibit;
+	struct spi_device eeprom;
+	struct nvo_block nvo;
+};
 
-/** Drain threshold (in units of 32 bytes)
- *
- * Start transmission once we receive a conservative 1024 bytes, to
- * avoid FIFO underrun errors.  (83815 does not allow us to specify a
- * value of 0 for "wait until whole packet is present".)
- *
- * Fill threshold plus drain threshold must be less than the transmit
- * FIFO size, which is 2kB on 83815 and 8kB on 83820.
- */
-#define NATSEMI_TXCFG_DRTH_DEFAULT NATSEMI_TXCFG_DRTH ( 1024 / 32 )
+/*
+ * Support for fibre connections on Am79C874:
+ * This phy needs a special setup when connected to a fibre cable.
+ * http://www.amd.com/files/connectivitysolutions/networking/archivednetworking/22235.pdf
+ */
+#define PHYID_AM79C874	0x0022561b
+
+enum {
+	MII_MCTRL	= 0x15,		/* mode control register */
+	MII_FX_SEL	= 0x0001,	/* 100BASE-FX (fiber) */
+	MII_EN_SCRM	= 0x0004,	/* enable scrambler (tp) */
+};
 
-/** Receive Descriptor Pointer */
-#define NATSEMI_RXDP 0x0030
 
-/** Receive Descriptor Pointer High Dword (64-bit) */
-#define NATSEMI_RXDP_HI_64 0x0034
 
-/** Number of receive descriptors */
-#define NATSEMI_NUM_RX_DESC 4
-
-/** Receive buffer length */
-#define NATSEMI_RX_MAX_LEN ( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ )
-
-/** Receive configuration register (32-bit) */
-#define NATSEMI_RXCFG_32 0x34
-
-/** Receive configuration register (64-bit) */
-#define NATSEMI_RXCFG_64 0x38
-#define NATSEMI_RXCFG_ARP	0x40000000UL	/**< Accept runt packets */
-#define NATSEMI_RXCFG_ATX	0x10000000UL	/**< Accept transmit packets */
-#define NATSEMI_RXCFG_ALP	0x08000000UL	/**< Accept long packets */
-#define NATSEMI_RXCFG_MXDMA(x)	( (x) << 20 )	/**< Max DMA burst size */
-#define NATSEMI_RXCFG_DRTH(x)	( (x) << 1 )	/**< Drain threshold */
-
-/** Max DMA burst size (encoded value)
- *
- * This represents 256-byte bursts on 83815 controllers and 512-byte
- * bursts on 83820 controllers.
- */
-#define NATSEMI_RXCFG_MXDMA_DEFAULT NATSEMI_RXCFG_MXDMA ( 0x7 )
+/* values we might find in the silicon revision register */
+#define SRR_DP83815_C	0x0302
+#define SRR_DP83815_D	0x0403
+#define SRR_DP83816_A4	0x0504
+#define SRR_DP83816_A5	0x0505
+
+/* NATSEMI: Offsets to the device registers.
+ * Unlike software-only systems, device drivers interact with complex hardware.
+ * It's not useful to define symbolic names for every register bit in the
+ * device.
+ */
+enum register_offsets {
+    ChipCmd      = 0x00, 
+    ChipConfig   = 0x04, 
+    EECtrl       = 0x08, 
+    PCIBusCfg    = 0x0C,
+    IntrStatus   = 0x10, 
+    IntrMask     = 0x14, 
+    IntrEnable   = 0x18,
+    TxRingPtr    = 0x20, 
+    TxConfig     = 0x24,
+    RxRingPtr    = 0x30,
+    RxConfig     = 0x34, 
+    ClkRun       = 0x3C,
+    WOLCmd       = 0x40, 
+    PauseCmd     = 0x44,
+    RxFilterAddr = 0x48, 
+    RxFilterData = 0x4C,
+    BootRomAddr  = 0x50, 
+    BootRomData  = 0x54, 
+    SiliconRev   = 0x58, 
+    StatsCtrl    = 0x5C,
+    StatsData    = 0x60, 
+    RxPktErrs    = 0x60, 
+    RxMissed     = 0x68, 
+    RxCRCErrs    = 0x64,
+    PCIPM        = 0x44,
+    PhyStatus    = 0xC0, 
+    MIntrCtrl    = 0xC4, 
+    MIntrStatus  = 0xC8,
+
+    /* These are from the spec, around page 78... on a separate table. 
+     */
+    PGSEL        = 0xCC, 
+    PMDCSR       = 0xE4, 
+    TSTDAT       = 0xFC, 
+    DSPCFG       = 0xF4, 
+    SDCFG        = 0x8C,
+    BasicControl = 0x80,	
+    BasicStatus  = 0x84
+	    
+};
 
-/** Drain threshold (in units of 8 bytes)
- *
- * Start draining after 64 bytes.
- *
- * Must be large enough to allow packet's accept/reject status to be
- * determined before draining begins.
+/* the values for the 'magic' registers above (PGSEL=1) */
+#define PMDCSR_VAL	0x189c	/* enable preferred adaptation circuitry */
+#define TSTDAT_VAL	0x0
+#define DSPCFG_VAL	0x5040
+#define SDCFG_VAL	0x008c	/* set voltage thresholds for Signal Detect */
+#define DSPCFG_LOCK	0x20	/* coefficient lock bit in DSPCFG */
+#define DSPCFG_COEF	0x1000	/* see coefficient (in TSTDAT) bit in DSPCFG */
+#define TSTDAT_FIXED	0xe8	/* magic number for bad coefficients */
+
+/* Bit in ChipCmd.
+ */
+enum ChipCmdBits {
+    ChipReset = 0x100, 
+    RxReset   = 0x20, 
+    TxReset   = 0x10, 
+    RxOff     = 0x08, 
+    RxOn      = 0x04,
+    TxOff     = 0x02, 
+    TxOn      = 0x01
+};
+
+enum ChipConfig_bits {
+	CfgPhyDis		= 0x200,
+	CfgPhyRst		= 0x400,
+	CfgExtPhy		= 0x1000,
+	CfgAnegEnable		= 0x2000,
+	CfgAneg100		= 0x4000,
+	CfgAnegFull		= 0x8000,
+	CfgAnegDone		= 0x8000000,
+	CfgFullDuplex		= 0x20000000,
+	CfgSpeed100		= 0x40000000,
+	CfgLink			= 0x80000000,
+};
+
+
+/* Bits in the RxMode register.
  */
-#define NATSEMI_RXCFG_DRTH_DEFAULT NATSEMI_RXCFG_DRTH ( 64 / 8 )
+enum rx_mode_bits {
+    AcceptErr          = 0x20,
+    AcceptRunt         = 0x10,
+    AcceptBroadcast    = 0xC0000000,
+    AcceptMulticast    = 0x00200000, 
+    AcceptAllMulticast = 0x20000000,
+    AcceptAllPhys      = 0x10000000, 
+    AcceptMyPhys       = 0x08000000,
+    RxFilterEnable     = 0x80000000
+};
 
-/** Receive Filter/Match Control Register */
-#define NATSEMI_RFCR 0x0048
-#define NATSEMI_RFCR_RFEN	0x80000000UL	/**< RX filter enable */
-#define NATSEMI_RFCR_AAB	0x40000000UL	/**< Accept all broadcast */
-#define NATSEMI_RFCR_AAM	0x20000000UL	/**< Accept all multicast */
-#define NATSEMI_RFCR_AAU	0x10000000UL	/**< Accept all unicast */
-#define NATSEMI_RFCR_RFADDR( addr ) ( (addr) << 0 ) /**< Extended address */
-#define NATSEMI_RFCR_RFADDR_MASK NATSEMI_RFCR_RFADDR ( 0x3ff )
-
-/** Perfect match filter address base */
-#define NATSEMI_RFADDR_PMATCH_BASE 0x000
-
-/** Receive Filter/Match Data Register */
-#define NATSEMI_RFDR 0x004c
-#define NATSEMI_RFDR_BMASK	0x00030000UL	/**< Byte mask */
-#define NATSEMI_RFDR_DATA( value ) ( (value) & 0xffff ) /**< Filter data */
-
-/** National Semiconductor network card flags */
-enum natsemi_nic_flags {
-	/** EEPROM is little-endian */
-	NATSEMI_EEPROM_LITTLE_ENDIAN = 0x0001,
-	/** EEPROM layout is insane */
-	NATSEMI_EEPROM_INSANE = 0x0002,
-	/** Card supports 64-bit operation */
-	NATSEMI_64BIT = 0x0004,
-	/** Card supports 1000Mbps link */
-	NATSEMI_1000 = 0x0008,
-};
-
-/** A National Semiconductor descriptor ring */
-struct natsemi_ring {
-	/** Descriptors */
-	union natsemi_descriptor *desc;
-	/** Producer index */
-	unsigned int prod;
-	/** Consumer index */
-	unsigned int cons;
-
-	/** Number of descriptors */
-	unsigned int count;
-	/** Descriptor start address register */
-	unsigned int reg;
-};
-
-/**
- * Initialise descriptor ring
- *
- * @v ring		Descriptor ring
- * @v count		Number of descriptors
- * @v reg		Descriptor start address register
+/* Bits in network_desc.status
  */
-static inline __attribute__ (( always_inline)) void
-natsemi_init_ring ( struct natsemi_ring *ring, unsigned int count,
-		    unsigned int reg ) {
-	ring->count = count;
-	ring->reg = reg;
-}
-
-/** A National Semiconductor network card */
-struct natsemi_nic {
-	/** Flags */
-	unsigned int flags;
-	/** Registers */
-	void *regs;
-	/** SPI bit-bashing interface */
-	struct spi_bit_basher spibit;
-	/** EEPROM */
-	struct spi_device eeprom;
+enum desc_status_bits {
+    DescOwn   = 0x80000000, 
+    DescMore  = 0x40000000, 
+    DescIntr  = 0x20000000,
+    DescNoCRC = 0x10000000,
+    DescPktOK = 0x08000000, 
+    RxTooLong = 0x00400000
+};
 
-	/** Transmit descriptor ring */
-	struct natsemi_ring tx;
-	/** Receive descriptor ring */
-	struct natsemi_ring rx;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_iobuf[NATSEMI_NUM_RX_DESC];
-
-	/** Link status (cache) */
-	uint32_t cfg;
-};
-
-/**
- * Check if card can access physical address
- *
- * @v natsemi		National Semiconductor device
- * @v address		Physical address
- * @v address_ok	Card can access physical address
+/*Bits in Interrupt Mask register
  */
-static inline __attribute__ (( always_inline )) int
-natsemi_address_ok ( struct natsemi_nic *natsemi, physaddr_t address ) {
+enum Intr_mask_register_bits {
+    RxOk       = 0x001,
+    RxErr      = 0x004,
+    TxOk       = 0x040,
+    TxErr      = 0x100 
+};	
 
-	/* In a 32-bit build, all addresses can be accessed */
-	if ( sizeof ( physaddr_t ) <= sizeof ( uint32_t ) )
-		return 1;
+enum MIntrCtrl_bits {
+  MICRIntEn               = 0x2,
+};
 
-	/* A 64-bit card can access all addresses */
-	if ( natsemi->flags & NATSEMI_64BIT )
-		return 1;
+/* CFG bits [13:16] [18:23] */
+#define CFG_RESET_SAVE 0xfde000
+/* WCSR bits [0:4] [9:10] */
+#define WCSR_RESET_SAVE 0x61f
+/* RFCR bits [20] [22] [27:31] */
+#define RFCR_RESET_SAVE 0xf8500000;
+
+/* Delay between EEPROM clock transitions.
+   No extra delay is needed with 33Mhz PCI, but future 66Mhz access may need
+   a delay. */
+#define eeprom_delay(ee_addr)   inl(ee_addr)
+
+enum EEPROM_Ctrl_Bits {
+	EE_ShiftClk   = 0x04,
+	EE_DataIn     = 0x01,
+	EE_ChipSelect = 0x08,
+	EE_DataOut    = 0x02
+};
 
-	/* A 32-bit card can access all addresses below 4GB */
-	if ( ( address & ~0xffffffffULL ) == 0 )
-		return 1;
+#define EE_Write0 (EE_ChipSelect)
+#define EE_Write1 (EE_ChipSelect | EE_DataIn)
 
-	return 0;
-}
+/* The EEPROM commands include the alway-set leading bit. */
+enum EEPROM_Cmds {
+  EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6),
+};
+
+/*  EEPROM access , values are devices specific
+ */
+#define EE_CS		0x08	/* EEPROM chip select */
+#define EE_SK		0x04	/* EEPROM shift clock */
+#define EE_DI		0x01	/* Data in */
+#define EE_DO		0x02	/* Data out */
+
+/* Offsets within EEPROM (these are word offsets)
+ */
+#define EE_MAC 7
+#define EE_REG  EECtrl
+
+static const uint8_t natsemi_ee_bits[] = {
+	[SPI_BIT_SCLK]	= EE_SK,
+	[SPI_BIT_MOSI]	= EE_DI,
+	[SPI_BIT_MISO]	= EE_DO,
+	[SPI_BIT_SS(0)]	= EE_CS,
+};
 
-#endif /* _NATSEMI_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ns83820.c ipxe-1.0.1~lliurex1505/src/drivers/net/ns83820.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ns83820.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ns83820.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1007 @@
+/**************************************************************************
+*    ns83820.c: Etherboot device driver for the National Semiconductor 83820
+*    Written 2004 by Timothy Legge <tlegge@rogers.com>
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the License, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*    GNU General Public License for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not, write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*    Portions of this code based on:
+*	ns83820.c by Benjamin LaHaise with contributions
+* 		for Linux kernel 2.4.x.
+*	
+*    Linux Driver Version 0.20, 20020610
+* 
+*    This development of this Etherboot driver was funded by:
+*
+*    NXTV: http://www.nxtv.com/
+*    	
+*    REVISION HISTORY:
+*    ================
+*
+*    v1.0	02-16-2004	timlegge	Initial port of Linux driver
+*    v1.1	02-19-2004	timlegge	More rohbust transmit and poll
+*    
+*    Indent Options: indent -kr -i8
+***************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+/* to get some global routines like printf */
+#include "etherboot.h"
+/* to get the interface to the body of the program */
+#include "nic.h"
+/* to get the PCI support functions, if this is a PCI NIC */
+#include <ipxe/pci.h>
+
+#if ARCH == ia64		/* Support 64-bit addressing */
+#define USE_64BIT_ADDR
+#endif
+
+#define HZ 100
+
+/* Condensed operations for readability. */
+#define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
+#define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))
+
+/* NIC specific static variables go here */
+
+/* Global parameters.  See MODULE_PARM near the bottom. */
+// static int ihr = 2;
+static int reset_phy = 0;
+static int lnksts = 0;		/* CFG_LNKSTS bit polarity */
+
+#if defined(CONFIG_HIGHMEM64G) || defined(__ia64__)
+#define USE_64BIT_ADDR	"+"
+#endif
+
+#if defined(USE_64BIT_ADDR)
+#define TRY_DAC	1
+#else
+#define TRY_DAC	0
+#endif
+
+/* tunables */
+#define RX_BUF_SIZE	1500	/* 8192 */
+
+/* Must not exceed ~65000. */
+#define NR_RX_DESC	64
+#define NR_TX_DESC	1
+
+		   /* not tunable *//* Extra 6 bytes for 64 bit alignment (divisable by 8) */
+#define REAL_RX_BUF_SIZE (RX_BUF_SIZE + 14 + 6)	/* rx/tx mac addr + type */
+
+#define MIN_TX_DESC_FREE	8
+
+/* register defines */
+#define CFGCS		0x04
+
+#define CR_TXE		0x00000001
+#define CR_TXD		0x00000002
+/* Ramit : Here's a tip, don't do a RXD immediately followed by an RXE
+ * The Receive engine skips one descriptor and moves
+ * onto the next one!! */
+#define CR_RXE		0x00000004
+#define CR_RXD		0x00000008
+#define CR_TXR		0x00000010
+#define CR_RXR		0x00000020
+#define CR_SWI		0x00000080
+#define CR_RST		0x00000100
+
+#define PTSCR_EEBIST_FAIL       0x00000001
+#define PTSCR_EEBIST_EN         0x00000002
+#define PTSCR_EELOAD_EN         0x00000004
+#define PTSCR_RBIST_FAIL        0x000001b8
+#define PTSCR_RBIST_DONE        0x00000200
+#define PTSCR_RBIST_EN          0x00000400
+#define PTSCR_RBIST_RST         0x00002000
+
+#define MEAR_EEDI		0x00000001
+#define MEAR_EEDO		0x00000002
+#define MEAR_EECLK		0x00000004
+#define MEAR_EESEL		0x00000008
+#define MEAR_MDIO		0x00000010
+#define MEAR_MDDIR		0x00000020
+#define MEAR_MDC		0x00000040
+
+#define ISR_TXDESC3	0x40000000
+#define ISR_TXDESC2	0x20000000
+#define ISR_TXDESC1	0x10000000
+#define ISR_TXDESC0	0x08000000
+#define ISR_RXDESC3	0x04000000
+#define ISR_RXDESC2	0x02000000
+#define ISR_RXDESC1	0x01000000
+#define ISR_RXDESC0	0x00800000
+#define ISR_TXRCMP	0x00400000
+#define ISR_RXRCMP	0x00200000
+#define ISR_DPERR	0x00100000
+#define ISR_SSERR	0x00080000
+#define ISR_RMABT	0x00040000
+#define ISR_RTABT	0x00020000
+#define ISR_RXSOVR	0x00010000
+#define ISR_HIBINT	0x00008000
+#define ISR_PHY		0x00004000
+#define ISR_PME		0x00002000
+#define ISR_SWI		0x00001000
+#define ISR_MIB		0x00000800
+#define ISR_TXURN	0x00000400
+#define ISR_TXIDLE	0x00000200
+#define ISR_TXERR	0x00000100
+#define ISR_TXDESC	0x00000080
+#define ISR_TXOK	0x00000040
+#define ISR_RXORN	0x00000020
+#define ISR_RXIDLE	0x00000010
+#define ISR_RXEARLY	0x00000008
+#define ISR_RXERR	0x00000004
+#define ISR_RXDESC	0x00000002
+#define ISR_RXOK	0x00000001
+
+#define TXCFG_CSI	0x80000000
+#define TXCFG_HBI	0x40000000
+#define TXCFG_MLB	0x20000000
+#define TXCFG_ATP	0x10000000
+#define TXCFG_ECRETRY	0x00800000
+#define TXCFG_BRST_DIS	0x00080000
+#define TXCFG_MXDMA1024	0x00000000
+#define TXCFG_MXDMA512	0x00700000
+#define TXCFG_MXDMA256	0x00600000
+#define TXCFG_MXDMA128	0x00500000
+#define TXCFG_MXDMA64	0x00400000
+#define TXCFG_MXDMA32	0x00300000
+#define TXCFG_MXDMA16	0x00200000
+#define TXCFG_MXDMA8	0x00100000
+
+#define CFG_LNKSTS	0x80000000
+#define CFG_SPDSTS	0x60000000
+#define CFG_SPDSTS1	0x40000000
+#define CFG_SPDSTS0	0x20000000
+#define CFG_DUPSTS	0x10000000
+#define CFG_TBI_EN	0x01000000
+#define CFG_MODE_1000	0x00400000
+/* Ramit : Dont' ever use AUTO_1000, it never works and is buggy.
+ * Read the Phy response and then configure the MAC accordingly */
+#define CFG_AUTO_1000	0x00200000
+#define CFG_PINT_CTL	0x001c0000
+#define CFG_PINT_DUPSTS	0x00100000
+#define CFG_PINT_LNKSTS	0x00080000
+#define CFG_PINT_SPDSTS	0x00040000
+#define CFG_TMRTEST	0x00020000
+#define CFG_MRM_DIS	0x00010000
+#define CFG_MWI_DIS	0x00008000
+#define CFG_T64ADDR	0x00004000
+#define CFG_PCI64_DET	0x00002000
+#define CFG_DATA64_EN	0x00001000
+#define CFG_M64ADDR	0x00000800
+#define CFG_PHY_RST	0x00000400
+#define CFG_PHY_DIS	0x00000200
+#define CFG_EXTSTS_EN	0x00000100
+#define CFG_REQALG	0x00000080
+#define CFG_SB		0x00000040
+#define CFG_POW		0x00000020
+#define CFG_EXD		0x00000010
+#define CFG_PESEL	0x00000008
+#define CFG_BROM_DIS	0x00000004
+#define CFG_EXT_125	0x00000002
+#define CFG_BEM		0x00000001
+
+#define EXTSTS_UDPPKT	0x00200000
+#define EXTSTS_TCPPKT	0x00080000
+#define EXTSTS_IPPKT	0x00020000
+
+#define SPDSTS_POLARITY	(CFG_SPDSTS1 | CFG_SPDSTS0 | CFG_DUPSTS | (lnksts ? CFG_LNKSTS : 0))
+
+#define MIBC_MIBS	0x00000008
+#define MIBC_ACLR	0x00000004
+#define MIBC_FRZ	0x00000002
+#define MIBC_WRN	0x00000001
+
+#define PCR_PSEN	(1 << 31)
+#define PCR_PS_MCAST	(1 << 30)
+#define PCR_PS_DA	(1 << 29)
+#define PCR_STHI_8	(3 << 23)
+#define PCR_STLO_4	(1 << 23)
+#define PCR_FFHI_8K	(3 << 21)
+#define PCR_FFLO_4K	(1 << 21)
+#define PCR_PAUSE_CNT	0xFFFE
+
+#define RXCFG_AEP	0x80000000
+#define RXCFG_ARP	0x40000000
+#define RXCFG_STRIPCRC	0x20000000
+#define RXCFG_RX_FD	0x10000000
+#define RXCFG_ALP	0x08000000
+#define RXCFG_AIRL	0x04000000
+#define RXCFG_MXDMA512	0x00700000
+#define RXCFG_DRTH	0x0000003e
+#define RXCFG_DRTH0	0x00000002
+
+#define RFCR_RFEN	0x80000000
+#define RFCR_AAB	0x40000000
+#define RFCR_AAM	0x20000000
+#define RFCR_AAU	0x10000000
+#define RFCR_APM	0x08000000
+#define RFCR_APAT	0x07800000
+#define RFCR_APAT3	0x04000000
+#define RFCR_APAT2	0x02000000
+#define RFCR_APAT1	0x01000000
+#define RFCR_APAT0	0x00800000
+#define RFCR_AARP	0x00400000
+#define RFCR_MHEN	0x00200000
+#define RFCR_UHEN	0x00100000
+#define RFCR_ULM	0x00080000
+
+#define VRCR_RUDPE	0x00000080
+#define VRCR_RTCPE	0x00000040
+#define VRCR_RIPE	0x00000020
+#define VRCR_IPEN	0x00000010
+#define VRCR_DUTF	0x00000008
+#define VRCR_DVTF	0x00000004
+#define VRCR_VTREN	0x00000002
+#define VRCR_VTDEN	0x00000001
+
+#define VTCR_PPCHK	0x00000008
+#define VTCR_GCHK	0x00000004
+#define VTCR_VPPTI	0x00000002
+#define VTCR_VGTI	0x00000001
+
+#define CR		0x00
+#define CFG		0x04
+#define MEAR		0x08
+#define PTSCR		0x0c
+#define	ISR		0x10
+#define	IMR		0x14
+#define	IER		0x18
+#define	IHR		0x1c
+#define TXDP		0x20
+#define TXDP_HI		0x24
+#define TXCFG		0x28
+#define GPIOR		0x2c
+#define RXDP		0x30
+#define RXDP_HI		0x34
+#define RXCFG		0x38
+#define PQCR		0x3c
+#define WCSR		0x40
+#define PCR		0x44
+#define RFCR		0x48
+#define RFDR		0x4c
+
+#define SRR		0x58
+
+#define VRCR		0xbc
+#define VTCR		0xc0
+#define VDR		0xc4
+#define CCSR		0xcc
+
+#define TBICR		0xe0
+#define TBISR		0xe4
+#define TANAR		0xe8
+#define TANLPAR		0xec
+#define TANER		0xf0
+#define TESR		0xf4
+
+#define TBICR_MR_AN_ENABLE	0x00001000
+#define TBICR_MR_RESTART_AN	0x00000200
+
+#define TBISR_MR_LINK_STATUS	0x00000020
+#define TBISR_MR_AN_COMPLETE	0x00000004
+
+#define TANAR_PS2 		0x00000100
+#define TANAR_PS1 		0x00000080
+#define TANAR_HALF_DUP 		0x00000040
+#define TANAR_FULL_DUP 		0x00000020
+
+#define GPIOR_GP5_OE		0x00000200
+#define GPIOR_GP4_OE		0x00000100
+#define GPIOR_GP3_OE		0x00000080
+#define GPIOR_GP2_OE		0x00000040
+#define GPIOR_GP1_OE		0x00000020
+#define GPIOR_GP3_OUT		0x00000004
+#define GPIOR_GP1_OUT		0x00000001
+
+#define LINK_AUTONEGOTIATE	0x01
+#define LINK_DOWN		0x02
+#define LINK_UP			0x04
+
+
+#define __kick_rx()	writel(CR_RXE, ns->base + CR)
+
+#define kick_rx() do { \
+	DBG("kick_rx: maybe kicking\n"); \
+		writel(virt_to_le32desc(&rx_ring[ns->cur_rx]), ns->base + RXDP); \
+		if (ns->next_rx == ns->next_empty) \
+			printf("uh-oh: next_rx == next_empty???\n"); \
+		__kick_rx(); \
+} while(0)
+
+
+#ifdef USE_64BIT_ADDR
+#define HW_ADDR_LEN	8
+#else
+#define HW_ADDR_LEN	4
+#endif
+
+#define CMDSTS_OWN	0x80000000
+#define CMDSTS_MORE	0x40000000
+#define CMDSTS_INTR	0x20000000
+#define CMDSTS_ERR	0x10000000
+#define CMDSTS_OK	0x08000000
+#define CMDSTS_LEN_MASK	0x0000ffff
+
+#define CMDSTS_DEST_MASK	0x01800000
+#define CMDSTS_DEST_SELF	0x00800000
+#define CMDSTS_DEST_MULTI	0x01000000
+
+#define DESC_SIZE	8	/* Should be cache line sized */
+
+#ifdef USE_64BIT_ADDR
+struct ring_desc {
+	uint64_t link;
+	uint64_t bufptr;
+	u32 cmdsts;
+	u32 extsts;		/* Extended status field */
+};
+#else
+struct ring_desc {
+	u32 link;
+	u32 bufptr;
+	u32 cmdsts;
+	u32 extsts;		/* Extended status field */
+};
+#endif
+
+/* Private Storage for the NIC */
+static struct ns83820_private {
+	u8 *base;
+	int up;
+	long idle;
+	u32 *next_rx_desc;
+	u16 next_rx, next_empty;
+	u32 cur_rx;
+	u32 *descs;
+	unsigned ihr;
+	u32 CFG_cache;
+	u32 MEAR_cache;
+	u32 IMR_cache;
+	int linkstate;
+	u16 tx_done_idx;
+	u16 tx_idx;
+	u16 tx_intr_idx;
+	u32 phy_descs;
+	u32 *tx_descs;
+
+} nsx;
+static struct ns83820_private *ns;
+
+/* Define the TX and RX Descriptor and Buffers */
+struct {
+	struct ring_desc tx_ring[NR_TX_DESC] __attribute__ ((aligned(8)));
+	unsigned char txb[NR_TX_DESC * REAL_RX_BUF_SIZE];
+	struct ring_desc rx_ring[NR_RX_DESC] __attribute__ ((aligned(8)));
+	unsigned char rxb[NR_RX_DESC * REAL_RX_BUF_SIZE]
+	__attribute__ ((aligned(8)));
+} ns83820_bufs __shared;
+#define tx_ring ns83820_bufs.tx_ring
+#define rx_ring ns83820_bufs.rx_ring
+#define txb ns83820_bufs.txb
+#define rxb ns83820_bufs.rxb
+
+static void phy_intr(struct nic *nic __unused)
+{
+	static char *speeds[] =
+	    { "10", "100", "1000", "1000(?)", "1000F" };
+	u32 cfg, new_cfg;
+	u32 tbisr, tanar, tanlpar;
+	int speed, fullduplex, newlinkstate;
+
+	cfg = readl(ns->base + CFG) ^ SPDSTS_POLARITY;
+	if (ns->CFG_cache & CFG_TBI_EN) {
+		/* we have an optical transceiver */
+		tbisr = readl(ns->base + TBISR);
+		tanar = readl(ns->base + TANAR);
+		tanlpar = readl(ns->base + TANLPAR);
+		DBG("phy_intr: tbisr=%hX, tanar=%hX, tanlpar=%hX\n",
+		    tbisr, tanar, tanlpar);
+
+		if ((fullduplex = (tanlpar & TANAR_FULL_DUP)
+		     && (tanar & TANAR_FULL_DUP))) {
+
+			/* both of us are full duplex */
+			writel(readl(ns->base + TXCFG)
+			       | TXCFG_CSI | TXCFG_HBI | TXCFG_ATP,
+			       ns->base + TXCFG);
+			writel(readl(ns->base + RXCFG) | RXCFG_RX_FD,
+			       ns->base + RXCFG);
+			/* Light up full duplex LED */
+			writel(readl(ns->base + GPIOR) | GPIOR_GP1_OUT,
+			       ns->base + GPIOR);
+
+		} else if (((tanlpar & TANAR_HALF_DUP)
+			    && (tanar & TANAR_HALF_DUP))
+			   || ((tanlpar & TANAR_FULL_DUP)
+			       && (tanar & TANAR_HALF_DUP))
+			   || ((tanlpar & TANAR_HALF_DUP)
+			       && (tanar & TANAR_FULL_DUP))) {
+
+			/* one or both of us are half duplex */
+			writel((readl(ns->base + TXCFG)
+				& ~(TXCFG_CSI | TXCFG_HBI)) | TXCFG_ATP,
+			       ns->base + TXCFG);
+			writel(readl(ns->base + RXCFG) & ~RXCFG_RX_FD,
+			       ns->base + RXCFG);
+			/* Turn off full duplex LED */
+			writel(readl(ns->base + GPIOR) & ~GPIOR_GP1_OUT,
+			       ns->base + GPIOR);
+		}
+
+		speed = 4;	/* 1000F */
+
+	} else {
+		/* we have a copper transceiver */
+		new_cfg =
+		    ns->CFG_cache & ~(CFG_SB | CFG_MODE_1000 | CFG_SPDSTS);
+
+		if (cfg & CFG_SPDSTS1)
+			new_cfg |= CFG_MODE_1000;
+		else
+			new_cfg &= ~CFG_MODE_1000;
+
+		speed = ((cfg / CFG_SPDSTS0) & 3);
+		fullduplex = (cfg & CFG_DUPSTS);
+
+		if (fullduplex)
+			new_cfg |= CFG_SB;
+
+		if ((cfg & CFG_LNKSTS) &&
+		    ((new_cfg ^ ns->CFG_cache) & CFG_MODE_1000)) {
+			writel(new_cfg, ns->base + CFG);
+			ns->CFG_cache = new_cfg;
+		}
+
+		ns->CFG_cache &= ~CFG_SPDSTS;
+		ns->CFG_cache |= cfg & CFG_SPDSTS;
+	}
+
+	newlinkstate = (cfg & CFG_LNKSTS) ? LINK_UP : LINK_DOWN;
+
+	if (newlinkstate & LINK_UP && ns->linkstate != newlinkstate) {
+		printf("link now %s mbps, %s duplex and up.\n",
+		       speeds[speed], fullduplex ? "full" : "half");
+	} else if (newlinkstate & LINK_DOWN
+		   && ns->linkstate != newlinkstate) {
+		printf("link now down.\n");
+	}
+	ns->linkstate = newlinkstate;
+}
+static void ns83820_set_multicast(struct nic *nic __unused);
+static void ns83820_setup_rx(struct nic *nic)
+{
+	unsigned i;
+	ns->idle = 1;
+	ns->next_rx = 0;
+	ns->next_rx_desc = ns->descs;
+	ns->next_empty = 0;
+	ns->cur_rx = 0;
+
+
+	for (i = 0; i < NR_RX_DESC; i++) {
+		rx_ring[i].link = virt_to_le32desc(&rx_ring[i + 1]);
+		rx_ring[i].bufptr =
+		    virt_to_le32desc(&rxb[i * REAL_RX_BUF_SIZE]);
+		rx_ring[i].cmdsts = cpu_to_le32(REAL_RX_BUF_SIZE);
+		rx_ring[i].extsts = cpu_to_le32(0);
+	}
+//      No need to wrap the ring 
+//      rx_ring[i].link = virt_to_le32desc(&rx_ring[0]);
+	writel(0, ns->base + RXDP_HI);
+	writel(virt_to_le32desc(&rx_ring[0]), ns->base + RXDP);
+
+	DBG("starting receiver\n");
+
+	writel(0x0001, ns->base + CCSR);
+	writel(0, ns->base + RFCR);
+	writel(0x7fc00000, ns->base + RFCR);
+	writel(0xffc00000, ns->base + RFCR);
+
+	ns->up = 1;
+
+	phy_intr(nic);
+
+	/* Okay, let it rip */
+	ns->IMR_cache |= ISR_PHY;
+	ns->IMR_cache |= ISR_RXRCMP;
+	//dev->IMR_cache |= ISR_RXERR;
+	//dev->IMR_cache |= ISR_RXOK;
+	ns->IMR_cache |= ISR_RXORN;
+	ns->IMR_cache |= ISR_RXSOVR;
+	ns->IMR_cache |= ISR_RXDESC;
+	ns->IMR_cache |= ISR_RXIDLE;
+	ns->IMR_cache |= ISR_TXDESC;
+	ns->IMR_cache |= ISR_TXIDLE;
+
+	// No reason to enable interupts...
+	// writel(ns->IMR_cache, ns->base + IMR);
+	// writel(1, ns->base + IER);
+	ns83820_set_multicast(nic);
+	kick_rx();
+}
+
+
+static void ns83820_do_reset(struct nic *nic __unused, u32 which)
+{
+	DBG("resetting chip...\n");
+	writel(which, ns->base + CR);
+	do {
+
+	} while (readl(ns->base + CR) & which);
+	DBG("okay!\n");
+}
+
+static void ns83820_reset(struct nic *nic)
+{
+	unsigned i;
+	DBG("ns83820_reset\n");
+
+	writel(0, ns->base + PQCR);
+
+	ns83820_setup_rx(nic);
+
+	for (i = 0; i < NR_TX_DESC; i++) {
+		tx_ring[i].link = 0;
+		tx_ring[i].bufptr = 0;
+		tx_ring[i].cmdsts = cpu_to_le32(0);
+		tx_ring[i].extsts = cpu_to_le32(0);
+	}
+
+	ns->tx_idx = 0;
+	ns->tx_done_idx = 0;
+	writel(0, ns->base + TXDP_HI);
+	return;
+}
+static void ns83820_getmac(struct nic *nic __unused, u8 * mac)
+{
+	unsigned i;
+	for (i = 0; i < 3; i++) {
+		u32 data;
+		/* Read from the perfect match memory: this is loaded by
+		 * the chip from the EEPROM via the EELOAD self test.
+		 */
+		writel(i * 2, ns->base + RFCR);
+		data = readl(ns->base + RFDR);
+		*mac++ = data;
+		*mac++ = data >> 8;
+	}
+}
+
+static void ns83820_set_multicast(struct nic *nic __unused)
+{
+	u8 *rfcr = ns->base + RFCR;
+	u32 and_mask = 0xffffffff;
+	u32 or_mask = 0;
+	u32 val;
+
+	/* Support Multicast */
+	and_mask &= ~(RFCR_AAU | RFCR_AAM);
+	or_mask |= RFCR_AAM;
+	val = (readl(rfcr) & and_mask) | or_mask;
+	/* Ramit : RFCR Write Fix doc says RFEN must be 0 modify other bits */
+	writel(val & ~RFCR_RFEN, rfcr);
+	writel(val, rfcr);
+
+}
+static void ns83820_run_bist(struct nic *nic __unused, const char *name,
+			     u32 enable, u32 done, u32 fail)
+{
+	int timed_out = 0;
+	long start;
+	u32 status;
+	int loops = 0;
+
+	DBG("start %s\n", name);
+
+	    start = currticks();
+
+	writel(enable, ns->base + PTSCR);
+	for (;;) {
+		loops++;
+		status = readl(ns->base + PTSCR);
+		if (!(status & enable))
+			break;
+		if (status & done)
+			break;
+		if (status & fail)
+			break;
+		if ((currticks() - start) >= HZ) {
+			timed_out = 1;
+			break;
+		}
+	}
+
+	if (status & fail)
+	  printf("%s failed! (0x%hX & 0x%hX)\n", name, (unsigned int) status, 
+		 (unsigned int) fail);
+	else if (timed_out)
+		printf("run_bist %s timed out! (%hX)\n", name, (unsigned int) status);
+	DBG("done %s in %d loops\n", name, loops);
+}
+
+/*************************************
+Check Link
+*************************************/
+static void ns83820_check_intr(struct nic *nic) {
+	int i;
+	u32 isr = readl(ns->base + ISR);
+	if(ISR_PHY & isr)
+		phy_intr(nic);
+	if(( ISR_RXIDLE | ISR_RXDESC | ISR_RXERR) & isr)
+		kick_rx();
+	for (i = 0; i < NR_RX_DESC; i++) {
+		if (rx_ring[i].cmdsts == CMDSTS_OWN) {
+//			rx_ring[i].link = virt_to_le32desc(&rx_ring[i + 1]);
+			rx_ring[i].cmdsts = cpu_to_le32(REAL_RX_BUF_SIZE);
+		}
+	}
+}
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static int ns83820_poll(struct nic *nic, int retrieve)
+{
+	/* return true if there's an ethernet packet ready to read */
+	/* nic->packet should contain data on return */
+	/* nic->packetlen should contain length of data */
+	u32 cmdsts;
+	int entry = ns->cur_rx;
+
+	ns83820_check_intr(nic);
+
+	cmdsts = le32_to_cpu(rx_ring[entry].cmdsts);
+
+	if ( ! ( (CMDSTS_OWN & (cmdsts)) && (cmdsts != (CMDSTS_OWN)) ) )
+	  return 0;
+
+	if ( ! retrieve ) return 1;
+
+	if (! (CMDSTS_OK & cmdsts) )
+	  return 0;
+
+	nic->packetlen = cmdsts & 0xffff;
+	memcpy(nic->packet,
+	       rxb + (entry * REAL_RX_BUF_SIZE),
+	       nic->packetlen);
+	//			rx_ring[entry].link = 0;
+	rx_ring[entry].cmdsts = cpu_to_le32(CMDSTS_OWN);
+
+	ns->cur_rx = (ns->cur_rx + 1) % NR_RX_DESC;
+
+	if (ns->cur_rx == 0)	/* We have wrapped the ring */
+	  kick_rx();
+
+	return 1;
+}
+
+static inline void kick_tx(struct nic *nic __unused)
+{
+	DBG("kick_tx\n");
+	writel(CR_TXE, ns->base + CR);
+}
+
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+static void ns83820_transmit(struct nic *nic, const char *d,	/* Destination */
+			     unsigned int t,	/* Type */
+			     unsigned int s,	/* size */
+			     const char *p)
+{				/* Packet */
+	/* send the packet to destination */
+
+	u16 nstype;
+	u32 cmdsts, extsts;
+	int cur_tx = 0;
+	u32 isr = readl(ns->base + ISR);
+	if (ISR_TXIDLE & isr)
+		kick_tx(nic);
+	/* point to the current txb incase multiple tx_rings are used */
+	memcpy(txb, d, ETH_ALEN);
+	memcpy(txb + ETH_ALEN, nic->node_addr, ETH_ALEN);
+	nstype = htons((u16) t);
+	memcpy(txb + 2 * ETH_ALEN, (u8 *) & nstype, 2);
+	memcpy(txb + ETH_HLEN, p, s);
+	s += ETH_HLEN;
+	s &= 0x0FFF;
+	while (s < ETH_ZLEN)
+		txb[s++] = '\0';
+
+	/* Setup the transmit descriptor */
+	extsts = 0;
+	extsts |= EXTSTS_UDPPKT;
+
+	tx_ring[cur_tx].bufptr = virt_to_le32desc(&txb);
+	tx_ring[cur_tx].extsts = cpu_to_le32(extsts);
+
+	cmdsts = cpu_to_le32(0);
+	cmdsts |= cpu_to_le32(CMDSTS_OWN | s);
+	tx_ring[cur_tx].cmdsts = cpu_to_le32(cmdsts);
+
+	writel(virt_to_le32desc(&tx_ring[0]), ns->base + TXDP);
+	kick_tx(nic);
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void ns83820_disable ( struct nic *nic ) {
+
+	/* put the card in its initial state */
+	/* This function serves 3 purposes.
+	 * This disables DMA and interrupts so we don't receive
+	 *  unexpected packets or interrupts from the card after
+	 *  etherboot has finished. 
+	 * This frees resources so etherboot may use
+	 *  this driver on another interface
+	 * This allows etherboot to reinitialize the interface
+	 *  if something is something goes wrong.
+	 */
+	/* disable interrupts */
+	writel(0, ns->base + IMR);
+	writel(0, ns->base + IER);
+	readl(ns->base + IER);
+
+	ns->up = 0;
+
+	ns83820_do_reset(nic, CR_RST);
+
+	ns->IMR_cache &=
+	    ~(ISR_RXOK | ISR_RXDESC | ISR_RXERR | ISR_RXEARLY |
+	      ISR_RXIDLE);
+	writel(ns->IMR_cache, ns->base + IMR);
+
+	/* touch the pci bus... */
+	readl(ns->base + IMR);
+
+	/* assumes the transmitter is already disabled and reset */
+	writel(0, ns->base + RXDP_HI);
+	writel(0, ns->base + RXDP);
+}
+
+/**************************************************************************
+IRQ - Enable, Disable, or Force interrupts
+***************************************************************************/
+static void ns83820_irq(struct nic *nic __unused, irq_action_t action __unused)
+{
+  switch ( action ) {
+  case DISABLE :
+    break;
+  case ENABLE :
+    break;
+  case FORCE :
+    break;
+  }
+}
+
+static struct nic_operations ns83820_operations = {
+	.connect	= dummy_connect,
+	.poll		= ns83820_poll,
+	.transmit	= ns83820_transmit,
+	.irq		= ns83820_irq,
+
+};
+
+static struct pci_device_id ns83820_nics[] = {
+	PCI_ROM(0x100b, 0x0022, "ns83820", "National Semiconductor 83820", 0),
+};
+
+PCI_DRIVER ( ns83820_driver, ns83820_nics, PCI_NO_CLASS );
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+***************************************************************************/
+
+#define board_found 1
+#define valid_link 0
+static int ns83820_probe ( struct nic *nic, struct pci_device *pci ) {
+
+	long addr;
+	int using_dac = 0;
+
+	if (pci->ioaddr == 0)
+		return 0;
+
+	printf("ns83820.c: Found %s, vendor=0x%hX, device=0x%hX\n",
+	       pci->id->name, pci->vendor, pci->device);
+
+	/* point to private storage */
+	ns = &nsx;
+
+	adjust_pci_device(pci);
+
+	addr = pci_bar_start(pci, PCI_BASE_ADDRESS_1);
+
+	ns->base = ioremap(addr, (1UL << 12));
+
+	if (!ns->base)
+		return 0;
+
+	nic->irqno  = 0;
+	nic->ioaddr = pci->ioaddr & ~3;
+
+	/* disable interrupts */
+	writel(0, ns->base + IMR);
+	writel(0, ns->base + IER);
+	readl(ns->base + IER);
+
+	ns->IMR_cache = 0;
+
+	ns83820_do_reset(nic, CR_RST);
+
+	/* Must reset the ram bist before running it */
+	writel(PTSCR_RBIST_RST, ns->base + PTSCR);
+	ns83820_run_bist(nic, "sram bist", PTSCR_RBIST_EN,
+			 PTSCR_RBIST_DONE, PTSCR_RBIST_FAIL);
+	ns83820_run_bist(nic, "eeprom bist", PTSCR_EEBIST_EN, 0,
+			 PTSCR_EEBIST_FAIL);
+	ns83820_run_bist(nic, "eeprom load", PTSCR_EELOAD_EN, 0, 0);
+
+	/* I love config registers */
+	ns->CFG_cache = readl(ns->base + CFG);
+
+	if ((ns->CFG_cache & CFG_PCI64_DET)) {
+		printf("%s: detected 64 bit PCI data bus.\n", pci->id->name);
+		/*dev->CFG_cache |= CFG_DATA64_EN; */
+		if (!(ns->CFG_cache & CFG_DATA64_EN))
+			printf
+			    ("%s: EEPROM did not enable 64 bit bus.  Disabled.\n",
+			     pci->id->name);
+	} else
+		ns->CFG_cache &= ~(CFG_DATA64_EN);
+
+	ns->CFG_cache &= (CFG_TBI_EN | CFG_MRM_DIS | CFG_MWI_DIS |
+			  CFG_T64ADDR | CFG_DATA64_EN | CFG_EXT_125 |
+			  CFG_M64ADDR);
+	ns->CFG_cache |=
+	    CFG_PINT_DUPSTS | CFG_PINT_LNKSTS | CFG_PINT_SPDSTS |
+	    CFG_EXTSTS_EN | CFG_EXD | CFG_PESEL;
+	ns->CFG_cache |= CFG_REQALG;
+	ns->CFG_cache |= CFG_POW;
+	ns->CFG_cache |= CFG_TMRTEST;
+
+	/* When compiled with 64 bit addressing, we must always enable
+	 * the 64 bit descriptor format.
+	 */
+#ifdef USE_64BIT_ADDR
+	ns->CFG_cache |= CFG_M64ADDR;
+#endif
+
+//FIXME: Enable section on dac or remove this
+	if (using_dac)
+		ns->CFG_cache |= CFG_T64ADDR;
+
+	/* Big endian mode does not seem to do what the docs suggest */
+	ns->CFG_cache &= ~CFG_BEM;
+
+	/* setup optical transceiver if we have one */
+	if (ns->CFG_cache & CFG_TBI_EN) {
+		DBG("%s: enabling optical transceiver\n", pci->id->name);
+		writel(readl(ns->base + GPIOR) | 0x3e8, ns->base + GPIOR);
+
+		/* setup auto negotiation feature advertisement */
+		writel(readl(ns->base + TANAR)
+		       | TANAR_HALF_DUP | TANAR_FULL_DUP,
+		       ns->base + TANAR);
+
+		/* start auto negotiation */
+		writel(TBICR_MR_AN_ENABLE | TBICR_MR_RESTART_AN,
+		       ns->base + TBICR);
+		writel(TBICR_MR_AN_ENABLE, ns->base + TBICR);
+		ns->linkstate = LINK_AUTONEGOTIATE;
+
+		ns->CFG_cache |= CFG_MODE_1000;
+	}
+	writel(ns->CFG_cache, ns->base + CFG);
+	DBG("CFG: %hX\n", ns->CFG_cache);
+
+	/* FIXME: reset_phy is defaulted to 0, should we reset anyway? */
+	if (reset_phy) {
+		DBG("%s: resetting phy\n", pci->id->name);
+		writel(ns->CFG_cache | CFG_PHY_RST, ns->base + CFG);
+		writel(ns->CFG_cache, ns->base + CFG);
+	}
+#if 0				/* Huh?  This sets the PCI latency register.  Should be done via 
+				 * the PCI layer.  FIXME.
+				 */
+	if (readl(dev->base + SRR))
+		writel(readl(dev->base + 0x20c) | 0xfe00,
+		       dev->base + 0x20c);
+#endif
+
+	/* Note!  The DMA burst size interacts with packet
+	 * transmission, such that the largest packet that
+	 * can be transmitted is 8192 - FLTH - burst size.
+	 * If only the transmit fifo was larger...
+	 */
+	/* Ramit : 1024 DMA is not a good idea, it ends up banging 
+	 * some DELL and COMPAQ SMP systems */
+	writel(TXCFG_CSI | TXCFG_HBI | TXCFG_ATP | TXCFG_MXDMA512
+	       | ((1600 / 32) * 0x100), ns->base + TXCFG);
+
+	/* Set Rx to full duplex, don't accept runt, errored, long or length
+	 * range errored packets.  Use 512 byte DMA.
+	 */
+	/* Ramit : 1024 DMA is not a good idea, it ends up banging 
+	 * some DELL and COMPAQ SMP systems 
+	 * Turn on ALP, only we are accpeting Jumbo Packets */
+	writel(RXCFG_AEP | RXCFG_ARP | RXCFG_AIRL | RXCFG_RX_FD
+	       | RXCFG_STRIPCRC
+	       //| RXCFG_ALP
+	       | (RXCFG_MXDMA512) | 0, ns->base + RXCFG);
+
+	/* Disable priority queueing */
+	writel(0, ns->base + PQCR);
+
+	/* Enable IP checksum validation and detetion of VLAN headers.
+	 * Note: do not set the reject options as at least the 0x102
+	 * revision of the chip does not properly accept IP fragments
+	 * at least for UDP.
+	 */
+	/* Ramit : Be sure to turn on RXCFG_ARP if VLAN's are enabled, since
+	 * the MAC it calculates the packetsize AFTER stripping the VLAN
+	 * header, and if a VLAN Tagged packet of 64 bytes is received (like
+	 * a ping with a VLAN header) then the card, strips the 4 byte VLAN
+	 * tag and then checks the packet size, so if RXCFG_ARP is not enabled,
+	 * it discrards it!.  These guys......
+	 */
+	writel(VRCR_IPEN | VRCR_VTDEN, ns->base + VRCR);
+
+	/* Enable per-packet TCP/UDP/IP checksumming */
+	writel(VTCR_PPCHK, ns->base + VTCR);
+
+	/* Ramit : Enable async and sync pause frames */
+//      writel(0, ns->base + PCR); 
+	writel((PCR_PS_MCAST | PCR_PS_DA | PCR_PSEN | PCR_FFLO_4K |
+		PCR_FFHI_8K | PCR_STLO_4 | PCR_STHI_8 | PCR_PAUSE_CNT),
+	       ns->base + PCR);
+
+	/* Disable Wake On Lan */
+	writel(0, ns->base + WCSR);
+
+	ns83820_getmac(nic, nic->node_addr);
+
+	if (using_dac) {
+		DBG("%s: using 64 bit addressing.\n", pci->id->name);
+	}
+
+	DBG("%s: DP83820 %d.%d: io=%#04lx\n",
+	    pci->id->name,
+	    (unsigned) readl(ns->base + SRR) >> 8,
+	    (unsigned) readl(ns->base + SRR) & 0xff,
+	    pci->ioaddr);
+
+#ifdef PHY_CODE_IS_FINISHED
+	ns83820_probe_phy(dev);
+#endif
+
+	ns83820_reset(nic);
+	/* point to NIC specific routines */
+	nic->nic_op	= &ns83820_operations;
+	return 1;
+}
+
+DRIVER ( "NS83820/PCI", nic_driver, pci_driver, ns83820_driver,
+	 ns83820_probe, ns83820_disable );
+
+/*
+ * Local variables:
+ *  c-basic-offset: 8
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ns8390.c ipxe-1.0.1~lliurex1505/src/drivers/net/ns8390.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/ns8390.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/ns8390.c	2012-01-06 23:49:04.000000000 +0000
@@ -895,7 +895,7 @@
 #endif
 			0 };
 		/* if no addresses supplied, fall back on defaults */
-		if (probe_addrs == NULL || probe_addrs[0] == 0)
+		if (probe_addrs == 0 || probe_addrs[0] == 0)
 			probe_addrs = base;
 		eth_bmem = 0;		/* No shared memory */
 		for (idx = 0; (eth_nic_base = probe_addrs[idx]) != 0; ++idx) {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/p80211hdr.h ipxe-1.0.1~lliurex1505/src/drivers/net/p80211hdr.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/p80211hdr.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/p80211hdr.h	2012-01-06 23:49:04.000000000 +0000
@@ -39,7 +39,7 @@
 *
 * --------------------------------------------------------------------
 *
-* Portions of the development of this software were funded by
+* Portions of the development of this software were funded by 
 * Intersil Corporation as part of PRISM(R) chipset product development.
 *
 * --------------------------------------------------------------------
@@ -47,7 +47,7 @@
 * This file declares the constants and types used in the interface
 * between a wlan driver and the user mode utilities.
 *
-* Note:
+* Note: 
 *  - Constant values are always in HOST byte order.  To assign
 *    values to multi-byte fields they _must_ be converted to
 *    ieee byte order.  To retrieve multi-byte values from incoming
@@ -117,7 +117,7 @@
 #define WLAN_FSTYPE_ASSOCRESP		0x01
 #define WLAN_FSTYPE_REASSOCREQ		0x02
 #define WLAN_FSTYPE_REASSOCRESP		0x03
-#define WLAN_FSTYPE_PROBEREQ		0x04
+#define WLAN_FSTYPE_PROBEREQ		0x04 
 #define WLAN_FSTYPE_PROBERESP		0x05
 #define WLAN_FSTYPE_BEACON		0x08
 #define WLAN_FSTYPE_ATIM		0x09
@@ -168,29 +168,29 @@
 /*                        SET_FC_FSTYPE(WLAN_FSTYPE_RTS) );   */
 /*------------------------------------------------------------*/
 
-#define WLAN_GET_FC_PVER(n)	 (((uint16_t)(n)) & (BIT0 | BIT1))
-#define WLAN_GET_FC_FTYPE(n)	((((uint16_t)(n)) & (BIT2 | BIT3)) >> 2)
-#define WLAN_GET_FC_FSTYPE(n)	((((uint16_t)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4)
-#define WLAN_GET_FC_TODS(n) 	((((uint16_t)(n)) & (BIT8)) >> 8)
-#define WLAN_GET_FC_FROMDS(n)	((((uint16_t)(n)) & (BIT9)) >> 9)
-#define WLAN_GET_FC_MOREFRAG(n) ((((uint16_t)(n)) & (BIT10)) >> 10)
-#define WLAN_GET_FC_RETRY(n)	((((uint16_t)(n)) & (BIT11)) >> 11)
-#define WLAN_GET_FC_PWRMGT(n)	((((uint16_t)(n)) & (BIT12)) >> 12)
-#define WLAN_GET_FC_MOREDATA(n) ((((uint16_t)(n)) & (BIT13)) >> 13)
-#define WLAN_GET_FC_ISWEP(n)	((((uint16_t)(n)) & (BIT14)) >> 14)
-#define WLAN_GET_FC_ORDER(n)	((((uint16_t)(n)) & (BIT15)) >> 15)
-
-#define WLAN_SET_FC_PVER(n)	((uint16_t)(n))
-#define WLAN_SET_FC_FTYPE(n)	(((uint16_t)(n)) << 2)
-#define WLAN_SET_FC_FSTYPE(n)	(((uint16_t)(n)) << 4)
-#define WLAN_SET_FC_TODS(n) 	(((uint16_t)(n)) << 8)
-#define WLAN_SET_FC_FROMDS(n)	(((uint16_t)(n)) << 9)
-#define WLAN_SET_FC_MOREFRAG(n) (((uint16_t)(n)) << 10)
-#define WLAN_SET_FC_RETRY(n)	(((uint16_t)(n)) << 11)
-#define WLAN_SET_FC_PWRMGT(n)	(((uint16_t)(n)) << 12)
-#define WLAN_SET_FC_MOREDATA(n) (((uint16_t)(n)) << 13)
-#define WLAN_SET_FC_ISWEP(n)	(((uint16_t)(n)) << 14)
-#define WLAN_SET_FC_ORDER(n)	(((uint16_t)(n)) << 15)
+#define WLAN_GET_FC_PVER(n)	 (((UINT16)(n)) & (BIT0 | BIT1))
+#define WLAN_GET_FC_FTYPE(n)	((((UINT16)(n)) & (BIT2 | BIT3)) >> 2)
+#define WLAN_GET_FC_FSTYPE(n)	((((UINT16)(n)) & (BIT4|BIT5|BIT6|BIT7)) >> 4)
+#define WLAN_GET_FC_TODS(n) 	((((UINT16)(n)) & (BIT8)) >> 8)
+#define WLAN_GET_FC_FROMDS(n)	((((UINT16)(n)) & (BIT9)) >> 9)
+#define WLAN_GET_FC_MOREFRAG(n) ((((UINT16)(n)) & (BIT10)) >> 10)
+#define WLAN_GET_FC_RETRY(n)	((((UINT16)(n)) & (BIT11)) >> 11)
+#define WLAN_GET_FC_PWRMGT(n)	((((UINT16)(n)) & (BIT12)) >> 12)
+#define WLAN_GET_FC_MOREDATA(n) ((((UINT16)(n)) & (BIT13)) >> 13)
+#define WLAN_GET_FC_ISWEP(n)	((((UINT16)(n)) & (BIT14)) >> 14)
+#define WLAN_GET_FC_ORDER(n)	((((UINT16)(n)) & (BIT15)) >> 15)
+
+#define WLAN_SET_FC_PVER(n)	((UINT16)(n))
+#define WLAN_SET_FC_FTYPE(n)	(((UINT16)(n)) << 2)
+#define WLAN_SET_FC_FSTYPE(n)	(((UINT16)(n)) << 4)
+#define WLAN_SET_FC_TODS(n) 	(((UINT16)(n)) << 8)
+#define WLAN_SET_FC_FROMDS(n)	(((UINT16)(n)) << 9)
+#define WLAN_SET_FC_MOREFRAG(n) (((UINT16)(n)) << 10)
+#define WLAN_SET_FC_RETRY(n)	(((UINT16)(n)) << 11)
+#define WLAN_SET_FC_PWRMGT(n)	(((UINT16)(n)) << 12)
+#define WLAN_SET_FC_MOREDATA(n) (((UINT16)(n)) << 13)
+#define WLAN_SET_FC_ISWEP(n)	(((UINT16)(n)) << 14)
+#define WLAN_SET_FC_ORDER(n)	(((UINT16)(n)) << 15)
 
 /*--- Duration Macros ----------------------------------------*/
 /* Macros to get/set the bitfields of the Duration Field      */
@@ -203,45 +203,45 @@
 /* Macros to get/set the bitfields of the Sequence Control    */
 /* Field.                                                     */
 /*------------------------------------------------------------*/
-#define WLAN_GET_SEQ_FRGNUM(n) (((uint16_t)(n)) & (BIT0|BIT1|BIT2|BIT3))
-#define WLAN_GET_SEQ_SEQNUM(n) ((((uint16_t)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
+#define WLAN_GET_SEQ_FRGNUM(n) (((UINT16)(n)) & (BIT0|BIT1|BIT2|BIT3))
+#define WLAN_GET_SEQ_SEQNUM(n) ((((UINT16)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4) 
 
 /*--- Data ptr macro -----------------------------------------*/
-/* Creates a uint8_t* to the data portion of a frame            */
+/* Creates a UINT8* to the data portion of a frame            */
 /* Assumes you're passing in a ptr to the beginning of the hdr*/
 /*------------------------------------------------------------*/
-#define WLAN_HDR_A3_DATAP(p) (((uint8_t*)(p)) + WLAN_HDR_A3_LEN)
-#define WLAN_HDR_A4_DATAP(p) (((uint8_t*)(p)) + WLAN_HDR_A4_LEN)
+#define WLAN_HDR_A3_DATAP(p) (((UINT8*)(p)) + WLAN_HDR_A3_LEN)
+#define WLAN_HDR_A4_DATAP(p) (((UINT8*)(p)) + WLAN_HDR_A4_LEN)
 
-#define DOT11_RATE5_ISBASIC_GET(r)     (((uint8_t)(r)) & BIT7)
+#define DOT11_RATE5_ISBASIC_GET(r)     (((UINT8)(r)) & BIT7)
 
 /*================================================================*/
 /* Types */
 
 /* BSS Timestamp */
-typedef uint8_t wlan_bss_ts_t[WLAN_BSS_TS_LEN];
+typedef UINT8 wlan_bss_ts_t[WLAN_BSS_TS_LEN];
 
 /* Generic 802.11 Header types */
 
 typedef struct p80211_hdr_a3
 {
-	uint16_t	fc;
-	uint16_t	dur;
-	uint8_t	a1[WLAN_ADDR_LEN];
-	uint8_t	a2[WLAN_ADDR_LEN];
-	uint8_t	a3[WLAN_ADDR_LEN];
-	uint16_t	seq;
+	UINT16	fc;
+	UINT16	dur;
+	UINT8	a1[WLAN_ADDR_LEN];
+	UINT8	a2[WLAN_ADDR_LEN];
+	UINT8	a3[WLAN_ADDR_LEN];
+	UINT16	seq;
 } __WLAN_ATTRIB_PACK__ p80211_hdr_a3_t;
 
 typedef struct p80211_hdr_a4
 {
-	uint16_t	fc;
-	uint16_t	dur;
-	uint8_t	a1[WLAN_ADDR_LEN];
-	uint8_t	a2[WLAN_ADDR_LEN];
-	uint8_t	a3[WLAN_ADDR_LEN];
-	uint16_t	seq;
-	uint8_t	a4[WLAN_ADDR_LEN];
+	UINT16	fc;
+	UINT16	dur;
+	UINT8	a1[WLAN_ADDR_LEN];
+	UINT8	a2[WLAN_ADDR_LEN];
+	UINT8	a3[WLAN_ADDR_LEN];
+	UINT16	seq;
+	UINT8	a4[WLAN_ADDR_LEN];
 } __WLAN_ATTRIB_PACK__ p80211_hdr_a4_t;
 
 typedef union p80211_hdr
@@ -258,7 +258,7 @@
 /*================================================================*/
 /* Function Declarations */
 
-/* Frame and header length macros */
+/* Frame and header lenght macros */
 
 #define WLAN_CTL_FRAMELEN(fstype) (\
 	(fstype) == WLAN_FSTYPE_BLOCKACKREQ	? 24 : \
@@ -273,9 +273,9 @@
 #define WLAN_FCS_LEN			4
 
 /* ftcl in HOST order */
-inline static uint16_t p80211_headerlen(uint16_t fctl)
+inline static UINT16 p80211_headerlen(UINT16 fctl)
 {
-	uint16_t hdrlen = 0;
+	UINT16 hdrlen = 0;
 
 	switch ( WLAN_GET_FC_FTYPE(fctl) ) {
 	case WLAN_FTYPE_MGMT:
@@ -288,13 +288,13 @@
 		}
 		break;
 	case WLAN_FTYPE_CTL:
-		hdrlen = WLAN_CTL_FRAMELEN(WLAN_GET_FC_FSTYPE(fctl)) -
-			WLAN_FCS_LEN;
+		hdrlen = WLAN_CTL_FRAMELEN(WLAN_GET_FC_FSTYPE(fctl)) - 
+			WLAN_FCS_LEN; 
 		break;
 	default:
 		hdrlen = WLAN_HDR_A3_LEN;
 	}
-
+	
 	return hdrlen;
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/pcnet32.c ipxe-1.0.1~lliurex1505/src/drivers/net/pcnet32.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/pcnet32.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/pcnet32.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
@@ -407,7 +406,7 @@
 	/*
 	 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
 	 * starting until the packet is loaded. Strike one for reliability, lose
-	 * one for latency - although on PCI this isn't a big loss. Older chips
+	 * one for latency - although on PCI this isnt a big loss. Older chips
 	 * have FIFO's smaller than a packet, so you can't do this.
 	 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
 	 */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/pcnet32.h ipxe-1.0.1~lliurex1505/src/drivers/net/pcnet32.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/pcnet32.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/pcnet32.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/nx_bitops.h ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/nx_bitops.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/nx_bitops.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/nx_bitops.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom.c ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -1454,8 +1453,11 @@
  *
  */
 
-/** Phantom CLP settings scope */
-static struct settings_scope phantom_settings_scope;
+/** Phantom CLP settings tag magic */
+#define PHN_CLP_TAG_MAGIC 0xc19c1900UL
+
+/** Phantom CLP settings tag magic mask */
+#define PHN_CLP_TAG_MAGIC_MASK 0xffffff00UL
 
 /** Phantom CLP data
  *
@@ -1686,8 +1688,8 @@
 	}
 
 	/* Allow for use of numbered settings */
-	if ( setting->scope == &phantom_settings_scope )
-		return setting->tag;
+	if ( ( setting->tag & PHN_CLP_TAG_MAGIC_MASK ) == PHN_CLP_TAG_MAGIC )
+		return ( setting->tag & ~PHN_CLP_TAG_MAGIC_MASK );
 
 	DBGC2 ( phantom, "Phantom %p has no \"%s\" setting\n",
 		phantom, setting->name );
@@ -2072,7 +2074,7 @@
 	assert ( phantom->port < PHN_MAX_NUM_PORTS );
 	settings_init ( &phantom->settings,
 			&phantom_settings_operations,
-			&netdev->refcnt, &phantom_settings_scope );
+			&netdev->refcnt, PHN_CLP_TAG_MAGIC );
 
 	/* Fix up PCI device */
 	adjust_pci_device ( pci );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom.h ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom_hw.h ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom_hw.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/phantom/phantom_hw.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/phantom/phantom_hw.h	2012-01-06 23:49:04.000000000 +0000
@@ -17,8 +17,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/prism2.c ipxe-1.0.1~lliurex1505/src/drivers/net/prism2.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/prism2.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/prism2.c	2012-01-06 23:49:04.000000000 +0000
@@ -69,10 +69,10 @@
 #define __cpu_to_le16(x) (x)
 #define __cpu_to_le32(x) (x)
 
-#define hfa384x2host_16(n)	(__le16_to_cpu((uint16_t)(n)))
-#define hfa384x2host_32(n)	(__le32_to_cpu((uint32_t)(n)))
-#define host2hfa384x_16(n)	(__cpu_to_le16((uint16_t)(n)))
-#define host2hfa384x_32(n)	(__cpu_to_le32((uint32_t)(n)))
+#define hfa384x2host_16(n)	(__le16_to_cpu((UINT16)(n)))
+#define hfa384x2host_32(n)	(__le32_to_cpu((UINT32)(n)))
+#define host2hfa384x_16(n)	(__cpu_to_le16((UINT16)(n)))
+#define host2hfa384x_32(n)	(__cpu_to_le32((UINT32)(n)))
 
 /*
  * PLX9052 PCI register offsets
@@ -119,18 +119,20 @@
 
 typedef struct hfa384x
 {
-  uint32_t iobase;
+  UINT32 iobase;
   void *membase;
-  uint16_t lastcmd;
-  uint16_t status;         /* in host order */
-  uint16_t resp0;          /* in host order */
-  uint16_t resp1;          /* in host order */
-  uint16_t resp2;          /* in host order */
-  uint8_t  bssid[WLAN_BSSID_LEN];
+  UINT16 lastcmd;
+  UINT16 status;         /* in host order */
+  UINT16 resp0;          /* in host order */
+  UINT16 resp1;          /* in host order */
+  UINT16 resp2;          /* in host order */
+  UINT8  bssid[WLAN_BSSID_LEN];
 } hfa384x_t;
 
 /* The global instance of the hardware (i.e. where we store iobase and membase, in the absence of anywhere better to put them */
-static hfa384x_t hw_global;
+static hfa384x_t hw_global = {
+  0, 0, 0, 0, 0, 0, 0, {0,0,0,0,0,0}
+};
 
 /*
  * 802.11 headers in addition to those in hfa384x_tx_frame_t (LLC and SNAP)
@@ -139,9 +141,9 @@
 
 typedef struct wlan_llc
 {
-  uint8_t   dsap;
-  uint8_t   ssap;
-  uint8_t   ctl;
+  UINT8   dsap;
+  UINT8   ssap;
+  UINT8   ctl;
 }  wlan_llc_t;
 
 static const wlan_llc_t wlan_llc_snap = { 0xaa, 0xaa, 0x03 }; /* LLC header indicating SNAP (?) */
@@ -149,8 +151,8 @@
 #define WLAN_IEEE_OUI_LEN 3
 typedef struct wlan_snap
 {
-  uint8_t   oui[WLAN_IEEE_OUI_LEN];
-  uint16_t  type;
+  UINT8   oui[WLAN_IEEE_OUI_LEN];
+  UINT16  type;
 } wlan_snap_t;
 
 typedef struct wlan_80211hdr
@@ -166,11 +168,11 @@
 /*
  * Hardware-level hfa384x functions
  * These are based on the ones in hfa384x.h (which are ifdef'd out since __KERNEL__ is not defined).
- * Basically, these functions are the result of hand-evaluating all the ifdefs and defines in the hfa384x.h versions.
+ * Basically, these functions are the result of hand-evaluating all the ifdefs and defines in the hfa384x.h versions. 
  */
 
 /* Retrieve the value of one of the MAC registers. */
-static inline uint16_t hfa384x_getreg( hfa384x_t *hw, unsigned int reg )
+static inline UINT16 hfa384x_getreg( hfa384x_t *hw, UINT reg )
 {
 #if (WLAN_HOSTIF == WLAN_PLX)
   return inw ( hw->iobase + reg );
@@ -180,7 +182,7 @@
 }
 
 /* Set the value of one of the MAC registers. */
-static inline void hfa384x_setreg( hfa384x_t *hw, uint16_t val, unsigned int reg )
+static inline void hfa384x_setreg( hfa384x_t *hw, UINT16 val, UINT reg )
 {
 #if (WLAN_HOSTIF == WLAN_PLX)
   outw ( val, hw->iobase + reg );
@@ -190,15 +192,15 @@
   return;
 }
 
-/*
+/* 
  * Noswap versions
  * Etherboot is i386 only, so swap and noswap are the same...
  */
-static inline uint16_t hfa384x_getreg_noswap( hfa384x_t *hw, unsigned int reg )
+static inline UINT16 hfa384x_getreg_noswap( hfa384x_t *hw, UINT reg )
 {
   return hfa384x_getreg ( hw, reg );
 }
-static inline void hfa384x_setreg_noswap( hfa384x_t *hw, uint16_t val, unsigned int reg )
+static inline void hfa384x_setreg_noswap( hfa384x_t *hw, UINT16 val, UINT reg )
 {
   hfa384x_setreg ( hw, val, reg );
 }
@@ -225,12 +227,12 @@
  *       >0              command indicated error, Status and Resp0-2 are
  *                       in hw structure.
  */
-static int hfa384x_docmd_wait( hfa384x_t *hw, uint16_t cmd, uint16_t parm0, uint16_t parm1, uint16_t parm2)
+static int hfa384x_docmd_wait( hfa384x_t *hw, UINT16 cmd, UINT16 parm0, UINT16 parm1, UINT16 parm2)
 {
-  uint16_t reg = 0;
-  uint16_t counter = 0;
-
-  /* wait for the busy bit to clear */
+  UINT16 reg = 0;
+  UINT16 counter = 0;
+  
+  /* wait for the busy bit to clear */	
   counter = 0;
   reg = hfa384x_getreg(hw, HFA384x_CMD);
   while ( HFA384x_CMD_ISBUSY(reg) && (counter < 10) ) {
@@ -249,7 +251,7 @@
   hfa384x_setreg(hw, parm2, HFA384x_PARAM2);
   hw->lastcmd = cmd;
   hfa384x_setreg(hw, cmd, HFA384x_CMD);
-
+  
   /* Now wait for completion */
   counter = 0;
   reg = hfa384x_getreg(hw, HFA384x_EVSTAT);
@@ -284,14 +286,14 @@
  *	hw		device structure
  *	id		FID or RID, destined for the select register (host order)
  *	offset		An _even_ offset into the buffer for the given FID/RID.
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_prepare_bap(hfa384x_t *hw, uint16_t id, uint16_t offset)
+static int hfa384x_prepare_bap(hfa384x_t *hw, UINT16 id, UINT16 offset)
 {
   int result = 0;
-  uint16_t reg;
-  uint16_t i;
+  UINT16 reg;
+  UINT16 i;
 
   /* Validate offset, buf, and len */
   if ( (offset > HFA384x_BAP_OFFSET_MAX) || (offset % 2) ) {
@@ -302,7 +304,7 @@
     udelay(10);
     hfa384x_setreg(hw, offset, HFA384x_OFFSET0);
     /* Wait for offset[busy] to clear (see BAP_TIMEOUT) */
-    i = 0;
+    i = 0; 
     do {
       reg = hfa384x_getreg(hw, HFA384x_OFFSET0);
       if ( i > 0 ) udelay(2);
@@ -328,28 +330,28 @@
  *	offset		An _even_ offset into the buffer for the given FID/RID.
  *	buf		ptr to array of bytes
  *	len		length of data to transfer in bytes
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_copy_from_bap(hfa384x_t *hw, uint16_t id, uint16_t offset,
-			  void *buf, unsigned int len)
+static int hfa384x_copy_from_bap(hfa384x_t *hw, UINT16 id, UINT16 offset,
+			  void *buf, UINT len)
 {
   int result = 0;
-  uint8_t	*d = (uint8_t*)buf;
-  uint16_t i;
-  uint16_t reg = 0;
-
+  UINT8	*d = (UINT8*)buf;
+  UINT16 i;
+  UINT16 reg = 0;
+  
   /* Prepare BAP */
   result = hfa384x_prepare_bap ( hw, id, offset );
   if ( result == 0 ) {
     /* Read even(len) buf contents from data reg */
     for ( i = 0; i < (len & 0xfffe); i+=2 ) {
-      *(uint16_t*)(&(d[i])) = hfa384x_getreg_noswap(hw, HFA384x_DATA0);
+      *(UINT16*)(&(d[i])) = hfa384x_getreg_noswap(hw, HFA384x_DATA0);
     }
     /* If len odd, handle last byte */
     if ( len % 2 ){
       reg = hfa384x_getreg_noswap(hw, HFA384x_DATA0);
-      d[len-1] = ((uint8_t*)(&reg))[0];
+      d[len-1] = ((UINT8*)(&reg))[0];
     }
   }
   if (result) {
@@ -367,30 +369,30 @@
  *	offset		An _even_ offset into the buffer for the given FID/RID.
  *	buf		ptr to array of bytes
  *	len		length of data to transfer in bytes
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_copy_to_bap(hfa384x_t *hw, uint16_t id, uint16_t offset,
-			void *buf, unsigned int len)
+static int hfa384x_copy_to_bap(hfa384x_t *hw, UINT16 id, UINT16 offset,
+			void *buf, UINT len)
 {
   int result = 0;
-  uint8_t	*d = (uint8_t*)buf;
-  uint16_t i;
-  uint16_t savereg;
+  UINT8	*d = (UINT8*)buf;
+  UINT16 i;
+  UINT16 savereg;
 
   /* Prepare BAP */
   result = hfa384x_prepare_bap ( hw, id, offset );
   if ( result == 0 ) {
     /* Write even(len) buf contents to data reg */
     for ( i = 0; i < (len & 0xfffe); i+=2 ) {
-      hfa384x_setreg_noswap(hw, *(uint16_t*)(&(d[i])), HFA384x_DATA0);
+      hfa384x_setreg_noswap(hw, *(UINT16*)(&(d[i])), HFA384x_DATA0);
     }
     /* If len odd, handle last byte */
     if ( len % 2 ){
       savereg = hfa384x_getreg_noswap(hw, HFA384x_DATA0);
       result = hfa384x_prepare_bap ( hw, id, offset + (len & 0xfffe) );
       if ( result == 0 ) {
-	((uint8_t*)(&savereg))[0] = d[len-1];
+	((UINT8*)(&savereg))[0] = d[len-1];
 	hfa384x_setreg_noswap(hw, savereg, HFA384x_DATA0);
       }
     }
@@ -410,10 +412,10 @@
  *			configuration record. (host order)
  *	rid		RID of the record to read/write. (host order)
  *
- * Returns:
+ * Returns: 
  *	0		success
  */
-static inline int hfa384x_cmd_access(hfa384x_t *hw, uint16_t write, uint16_t rid)
+static inline int hfa384x_cmd_access(hfa384x_t *hw, UINT16 write, UINT16 rid)
 {
   return hfa384x_docmd_wait(hw, HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_ACCESS) | HFA384x_CMD_WRITE_SET(write), rid, 0, 0);
 }
@@ -425,14 +427,14 @@
  *	hw		device structure
  *	rid		config/info record id (host order)
  *	buf		host side record buffer.  Upon return it will
- *			contain the body portion of the record (minus the
+ *			contain the body portion of the record (minus the 
  *			RID and len).
  *	len		buffer length (in bytes, should match record length)
  *
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_drvr_getconfig(hfa384x_t *hw, uint16_t rid, void *buf, uint16_t len)
+static int hfa384x_drvr_getconfig(hfa384x_t *hw, UINT16 rid, void *buf, UINT16 len)
 {
   int result = 0;
   hfa384x_rec_t	rec;
@@ -467,27 +469,27 @@
  *	rid		config/info record id (in host order)
  *	val		ptr to 16/32 bit buffer to receive value (in host order)
  *
- * Returns:
+ * Returns: 
  *	0		success
  */
 #if 0 /* Not actually used anywhere */
-static int hfa384x_drvr_getconfig16(hfa384x_t *hw, uint16_t rid, void *val)
+static int hfa384x_drvr_getconfig16(hfa384x_t *hw, UINT16 rid, void *val)
 {
   int result = 0;
-  result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(uint16_t));
+  result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(UINT16));
   if ( result == 0 ) {
-    *((uint16_t*)val) = hfa384x2host_16(*((uint16_t*)val));
+    *((UINT16*)val) = hfa384x2host_16(*((UINT16*)val));
   }
   return result;
 }
 #endif
 #if 0 /* Not actually used anywhere */
-static int hfa384x_drvr_getconfig32(hfa384x_t *hw, uint16_t rid, void *val)
+static int hfa384x_drvr_getconfig32(hfa384x_t *hw, UINT16 rid, void *val)
 {
   int result = 0;
-  result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(uint32_t));
+  result = hfa384x_drvr_getconfig(hw, rid, val, sizeof(UINT32));
   if ( result == 0 ) {
-    *((uint32_t*)val) = hfa384x2host_32(*((uint32_t*)val));
+    *((UINT32*)val) = hfa384x2host_32(*((UINT32*)val));
   }
   return result;
 }
@@ -502,10 +504,10 @@
  *	buf		host side record buffer
  *	len		buffer length (in bytes)
  *
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_drvr_setconfig(hfa384x_t *hw, uint16_t rid, void *buf, uint16_t len)
+static int hfa384x_drvr_setconfig(hfa384x_t *hw, UINT16 rid, void *buf, UINT16 len)
 {
   int result = 0;
   hfa384x_rec_t	rec;
@@ -539,21 +541,21 @@
  *	rid		config/info record id (in host order)
  *	val		16/32 bit value to store (in host order)
  *
- * Returns:
+ * Returns: 
  *	0		success
  */
-static int hfa384x_drvr_setconfig16(hfa384x_t *hw, uint16_t rid, uint16_t *val)
+static int hfa384x_drvr_setconfig16(hfa384x_t *hw, UINT16 rid, UINT16 *val)
 {
-  uint16_t value;
+  UINT16 value;
   value = host2hfa384x_16(*val);
-  return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(uint16_t));
+  return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(UINT16));
 }
 #if 0 /* Not actually used anywhere */
-static int hfa384x_drvr_setconfig32(hfa384x_t *hw, uint16_t rid, uint32_t *val)
+static int hfa384x_drvr_setconfig32(hfa384x_t *hw, UINT16 rid, UINT32 *val)
 {
-  uint32_t value;
+  UINT32 value;
   value = host2hfa384x_32(*val);
-  return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(uint32_t));
+  return hfa384x_drvr_setconfig(hw, rid, &value, sizeof(UINT32));
 }
 #endif
 
@@ -571,14 +573,14 @@
  *      descr           Descriptive text string of what is being waited for
  *                      (will be printed out if a timeout happens)
  *
- * Returns:
- *      value of EVSTAT register, or 0 on failure
+ * Returns: 
+ *      value of EVSTAT register, or 0 on failure 
  */
-static int hfa384x_wait_for_event(hfa384x_t *hw, uint16_t event_mask, uint16_t event_ack, int wait, int timeout, const char *descr)
+static int hfa384x_wait_for_event(hfa384x_t *hw, UINT16 event_mask, UINT16 event_ack, int wait, int timeout, const char *descr)
 {
-  uint16_t reg;
+  UINT16 reg;
   int count = 0;
-
+  
   do {
     reg = hfa384x_getreg(hw, HFA384x_EVSTAT);
     if ( count > 0 ) udelay(wait);
@@ -598,12 +600,12 @@
 ***************************************************************************/
 static int prism2_poll(struct nic *nic, int retrieve)
 {
-  uint16_t reg;
-  uint16_t rxfid;
-  uint16_t result;
+  UINT16 reg;
+  UINT16 rxfid;
+  UINT16 result;
   hfa384x_rx_frame_t rxdesc;
   hfa384x_t *hw = &hw_global;
-
+  
   /* Check for received packet */
   reg = hfa384x_getreg(hw, HFA384x_EVSTAT);
   if ( ! HFA384x_EVSTAT_ISRX(reg) ) {
@@ -615,7 +617,7 @@
 
   /* Acknowledge RX event */
   hfa384x_setreg(hw, HFA384x_EVACK_RX_SET(1), HFA384x_EVACK);
-  /* Get RX FID */
+  /* Get RX FID */  
   rxfid = hfa384x_getreg(hw, HFA384x_RXFID);
   /* Get the descriptor (including headers) */
   result = hfa384x_copy_from_bap(hw, rxfid, 0, &rxdesc, sizeof(rxdesc));
@@ -658,8 +660,8 @@
   hfa384x_t *hw = &hw_global;
   hfa384x_tx_frame_t txdesc;
   wlan_80211hdr_t p80211hdr = { wlan_llc_snap, {{0,0,0},0} };
-  uint16_t fid;
-  uint16_t status;
+  UINT16 fid;
+  UINT16 status;
   int result;
 
   // Request FID allocation
@@ -673,7 +675,7 @@
 
   /* Build Tx frame structure */
   memset(&txdesc, 0, sizeof(txdesc));
-  txdesc.tx_control = host2hfa384x_16( HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) |
+  txdesc.tx_control = host2hfa384x_16( HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) | 
 				       HFA384x_TX_TXEX_SET(1) | HFA384x_TX_TXOK_SET(1) );
   txdesc.frame_control =  host2ieee16( WLAN_SET_FC_FTYPE(WLAN_FTYPE_DATA) |
 				       WLAN_SET_FC_FSTYPE(WLAN_FSTYPE_DATAONLY) |
@@ -685,13 +687,13 @@
   /* Set up SNAP header */
   /* Let OUI default to RFC1042 (0x000000) */
   p80211hdr.snap.type = htons(t);
-
+  
   /* Copy txdesc, p80211hdr and payload parts to FID */
   result = hfa384x_copy_to_bap(hw, fid, 0, &txdesc, sizeof(txdesc));
   if ( result ) return; /* fail */
   result = hfa384x_copy_to_bap( hw, fid, sizeof(txdesc), &p80211hdr, sizeof(p80211hdr) );
   if ( result ) return; /* fail */
-  result = hfa384x_copy_to_bap( hw, fid, sizeof(txdesc) + sizeof(p80211hdr), (uint8_t*)p, s );
+  result = hfa384x_copy_to_bap( hw, fid, sizeof(txdesc) + sizeof(p80211hdr), (UINT8*)p, s );
   if ( result ) return; /* fail */
 
   /* Issue Tx command */
@@ -700,7 +702,7 @@
     printf("hfa384x: Transmit failed with result %#hx.\n", result);
     return;
   }
-
+  
   /* Wait for transmit completion (or exception) */
   result = hfa384x_wait_for_event(hw, HFA384x_EVSTAT_TXEXC | HFA384x_EVSTAT_TX, HFA384x_EVACK_INFO,
 				  200, 500, "Tx to complete\n" );
@@ -758,8 +760,8 @@
 ***************************************************************************/
 static int prism2_probe ( struct nic *nic, hfa384x_t *hw ) {
   int result;
-  uint16_t tmp16 = 0;
-  uint16_t infofid;
+  UINT16 tmp16 = 0;
+  UINT16 infofid;
   hfa384x_InfFrame_t inf;
   char ssid[HFA384x_RID_CNFDESIREDSSID_LEN];
   int info_count = 0;
@@ -818,17 +820,17 @@
     } else {
       printf ( "Attempting to autojoin to SSID %s (attempt %d)...", &ssid[2], info_count );
     }
-
+    
     if ( !hfa384x_wait_for_event(hw, HFA384x_EVSTAT_INFO, 0, 1000, 2000, "Info event" ) ) return 0;
     printf("done\n");
     infofid = hfa384x_getreg(hw, HFA384x_INFOFID);
     /* Retrieve the length */
-    result = hfa384x_copy_from_bap( hw, infofid, 0, &inf.framelen, sizeof(uint16_t));
+    result = hfa384x_copy_from_bap( hw, infofid, 0, &inf.framelen, sizeof(UINT16));
     if ( result ) return 0; /* fail */
     inf.framelen = hfa384x2host_16(inf.framelen);
     /* Retrieve the rest */
-    result = hfa384x_copy_from_bap( hw, infofid, sizeof(uint16_t),
-				    &(inf.infotype), inf.framelen * sizeof(uint16_t));
+    result = hfa384x_copy_from_bap( hw, infofid, sizeof(UINT16),
+				    &(inf.infotype), inf.framelen * sizeof(UINT16));
     if ( result ) return 0; /* fail */
     if ( inf.infotype != HFA384x_IT_LINKSTATUS ) {
       /* Not a Link Status info frame: die */
@@ -841,13 +843,13 @@
       printf ( "Link not connected (status %#hx)\n", inf.info.linkstatus.linkstatus );
     }
   } while ( inf.info.linkstatus.linkstatus != HFA384x_LINK_CONNECTED );
-
+    
   /* Retrieve BSSID and print Connected message */
   result = hfa384x_drvr_getconfig(hw, HFA384x_RID_CURRENTBSSID, hw->bssid, WLAN_BSSID_LEN);
 
   DBG ( "Link connected (BSSID %s - ", eth_ntoa ( hw->bssid ) );
   DBG ( " MAC address %s)\n", eth_ntoa (nic->node_addr ) );
-
+  
   /* point to NIC specific routines */
   nic->nic_op	= &prism2_operations;
   return 1;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/r8169.c ipxe-1.0.1~lliurex1505/src/drivers/net/r8169.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/r8169.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/r8169.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2232 @@
+/*
+ * Copyright (c) 2008 Marty Connor <mdc@etherboot.org>
+ * Copyright (c) 2008 Entity Cyber, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * This driver is based on rtl8169 data sheets and work by:
+ *
+ * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
+ * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
+ * Copyright (c) a lot of people too. Please respect their work.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <assert.h>
+#include <byteswap.h>
+#include <errno.h>
+#include <ipxe/ethernet.h>
+#include <ipxe/if_ether.h>
+#include <ipxe/io.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/malloc.h>
+#include <ipxe/netdevice.h>
+#include <ipxe/pci.h>
+#include <ipxe/timer.h>
+#include <mii.h>
+
+#include "r8169.h"
+
+/*** Low level hardware routines ***/
+
+static void mdio_write(void *ioaddr, int reg_addr, int value)
+{
+	int i;
+
+	DBGP ( "mdio_write\n" );
+
+	RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0x1f) << 16 | (value & 0xffff));
+
+	for (i = 20; i > 0; i--) {
+		/*
+		 * Check if the RTL8169 has completed writing to the specified
+		 * MII register.
+		 */
+		if (!(RTL_R32(PHYAR) & 0x80000000))
+			break;
+		udelay(25);
+	}
+}
+
+static int mdio_read(void *ioaddr, int reg_addr)
+{
+	int i, value = -1;
+
+	DBGP ( "mdio_read\n" );
+
+	RTL_W32(PHYAR, 0x0 | (reg_addr & 0x1f) << 16);
+
+	for (i = 20; i > 0; i--) {
+		/*
+		 * Check if the RTL8169 has completed retrieving data from
+		 * the specified MII register.
+		 */
+		if (RTL_R32(PHYAR) & 0x80000000) {
+			value = RTL_R32(PHYAR) & 0xffff;
+			break;
+		}
+		udelay(25);
+	}
+	return value;
+}
+
+static void mdio_patch(void *ioaddr, int reg_addr, int value)
+{
+	DBGP ( "mdio_patch\n" );
+
+	mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value);
+}
+
+static void rtl_ephy_write(void *ioaddr, int reg_addr, int value)
+{
+	unsigned int i;
+
+	DBGP ( "rtl_ephy_write\n" );
+
+	RTL_W32(EPHYAR, EPHYAR_WRITE_CMD | (value & EPHYAR_DATA_MASK) |
+		(reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
+
+	for (i = 0; i < 100; i++) {
+		if (!(RTL_R32(EPHYAR) & EPHYAR_FLAG))
+			break;
+		udelay(10);
+	}
+}
+
+static u16 rtl_ephy_read(void *ioaddr, int reg_addr)
+{
+	u16 value = 0xffff;
+	unsigned int i;
+
+	DBGP ( "rtl_ephy_read\n" );
+
+	RTL_W32(EPHYAR, (reg_addr & EPHYAR_REG_MASK) << EPHYAR_REG_SHIFT);
+
+	for (i = 0; i < 100; i++) {
+		if (RTL_R32(EPHYAR) & EPHYAR_FLAG) {
+			value = RTL_R32(EPHYAR) & EPHYAR_DATA_MASK;
+			break;
+		}
+		udelay(10);
+	}
+
+	return value;
+}
+
+static void rtl_csi_write(void *ioaddr, int addr, int value)
+{
+	unsigned int i;
+
+	DBGP ( "rtl_csi_write\n" );
+
+	RTL_W32(CSIDR, value);
+	RTL_W32(CSIAR, CSIAR_WRITE_CMD | (addr & CSIAR_ADDR_MASK) |
+		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
+
+	for (i = 0; i < 100; i++) {
+		if (!(RTL_R32(CSIAR) & CSIAR_FLAG))
+			break;
+		udelay(10);
+	}
+}
+
+static u32 rtl_csi_read(void *ioaddr, int addr)
+{
+	u32 value = ~0x00;
+	unsigned int i;
+
+	DBGP ( "rtl_csi_read\n" );
+
+	RTL_W32(CSIAR, (addr & CSIAR_ADDR_MASK) |
+		CSIAR_BYTE_ENABLE << CSIAR_BYTE_ENABLE_SHIFT);
+
+	for (i = 0; i < 100; i++) {
+		if (RTL_R32(CSIAR) & CSIAR_FLAG) {
+			value = RTL_R32(CSIDR);
+			break;
+		}
+		udelay(10);
+	}
+
+	return value;
+}
+
+static void rtl8169_irq_mask_and_ack(void *ioaddr)
+{
+	DBGP ( "rtl8169_irq_mask_and_ack\n" );
+
+	RTL_W16(IntrMask, 0x0000);
+
+	RTL_W16(IntrStatus, 0xffff);
+}
+
+static unsigned int rtl8169_tbi_reset_pending(void *ioaddr)
+{
+	DBGP ( "rtl8169_tbi_reset_pending\n" );
+
+	return RTL_R32(TBICSR) & TBIReset;
+}
+
+static unsigned int rtl8169_xmii_reset_pending(void *ioaddr)
+{
+	DBGP ( "rtl8169_xmii_reset_pending\n" );
+
+	return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET;
+}
+
+static unsigned int rtl8169_tbi_link_ok(void *ioaddr)
+{
+	DBGP ( "rtl8169_tbi_link_ok\n" );
+
+	return RTL_R32(TBICSR) & TBILinkOk;
+}
+
+static unsigned int rtl8169_xmii_link_ok(void *ioaddr)
+{
+	DBGP ( "rtl8169_xmii_link_ok\n" );
+
+	return RTL_R8(PHYstatus) & LinkStatus;
+}
+
+static void rtl8169_tbi_reset_enable(void *ioaddr)
+{
+	DBGP ( "rtl8169_tbi_reset_enable\n" );
+
+	RTL_W32(TBICSR, RTL_R32(TBICSR) | TBIReset);
+}
+
+static void rtl8169_xmii_reset_enable(void *ioaddr)
+{
+	unsigned int val;
+
+	DBGP ( "rtl8169_xmii_reset_enable\n" );
+
+	val = mdio_read(ioaddr, MII_BMCR) | BMCR_RESET;
+	mdio_write(ioaddr, MII_BMCR, val & 0xffff);
+}
+
+static int rtl8169_set_speed_tbi(struct net_device *dev,
+				 u8 autoneg, u16 speed, u8 duplex)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	int ret = 0;
+	u32 reg;
+
+	DBGP ( "rtl8169_set_speed_tbi\n" );
+
+	reg = RTL_R32(TBICSR);
+	if ((autoneg == AUTONEG_DISABLE) && (speed == SPEED_1000) &&
+	    (duplex == DUPLEX_FULL)) {
+		RTL_W32(TBICSR, reg & ~(TBINwEnable | TBINwRestart));
+	} else if (autoneg == AUTONEG_ENABLE)
+		RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart);
+	else {
+		DBG ( "incorrect speed setting refused in TBI mode\n" );
+		ret = -EOPNOTSUPP;
+	}
+	return ret;
+}
+
+static int rtl8169_set_speed_xmii(struct net_device *dev,
+				  u8 autoneg, u16 speed, u8 duplex)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	int auto_nego, giga_ctrl;
+
+	DBGP ( "rtl8169_set_speed_xmii\n" );
+
+	auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
+	auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
+		       ADVERTISE_100HALF | ADVERTISE_100FULL);
+	giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
+	giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+
+	if (autoneg == AUTONEG_ENABLE) {
+		auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
+			      ADVERTISE_100HALF | ADVERTISE_100FULL);
+		giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+	} else {
+		if (speed == SPEED_10)
+			auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
+		else if (speed == SPEED_100)
+			auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
+		else if (speed == SPEED_1000)
+			giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
+
+		if (duplex == DUPLEX_HALF)
+			auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
+
+		if (duplex == DUPLEX_FULL)
+			auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
+
+		/* This tweak comes straight from Realtek's driver. */
+		if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
+		    ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
+		     (tp->mac_version == RTL_GIGA_MAC_VER_16))) {
+			auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
+		}
+	}
+
+	/* The 8100e/8101e/8102e do Fast Ethernet only. */
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_07) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_08) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_09) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_10) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
+		if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF))) {
+			DBG ( "PHY does not support 1000Mbps.\n" );
+		}
+		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
+	}
+
+	auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
+
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
+	    (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
+		/*
+		 * Wake up the PHY.
+		 * Vendor specific (0x1f) and reserved (0x0e) MII registers.
+		 */
+		mdio_write(ioaddr, 0x1f, 0x0000);
+		mdio_write(ioaddr, 0x0e, 0x0000);
+	}
+
+	tp->phy_auto_nego_reg = auto_nego;
+	tp->phy_1000_ctrl_reg = giga_ctrl;
+
+	mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
+	mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
+	mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
+	return 0;
+}
+
+static int rtl8169_set_speed(struct net_device *dev,
+			     u8 autoneg, u16 speed, u8 duplex)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	int ret;
+
+	DBGP ( "rtl8169_set_speed\n" );
+
+	ret = tp->set_speed(dev, autoneg, speed, duplex);
+
+	return ret;
+}
+
+static void rtl8169_write_gmii_reg_bit(void *ioaddr, int reg,
+				       int bitnum, int bitval)
+{
+	int val;
+
+	DBGP ( "rtl8169_write_gmii_reg_bit\n" );
+
+	val = mdio_read(ioaddr, reg);
+	val = (bitval == 1) ?
+		val | (bitval << bitnum) :  val & ~(0x0001 << bitnum);
+	mdio_write(ioaddr, reg, val & 0xffff);
+}
+
+static void rtl8169_get_mac_version(struct rtl8169_private *tp,
+				    void *ioaddr)
+{
+	/*
+	 * The driver currently handles the 8168Bf and the 8168Be identically
+	 * but they can be identified more specifically through the test below
+	 * if needed:
+	 *
+	 * (RTL_R32(TxConfig) & 0x700000) == 0x500000 ? 8168Bf : 8168Be
+	 *
+	 * Same thing for the 8101Eb and the 8101Ec:
+	 *
+	 * (RTL_R32(TxConfig) & 0x700000) == 0x200000 ? 8101Eb : 8101Ec
+	 */
+	const struct {
+		u32 mask;
+		u32 val;
+		int mac_version;
+	} mac_info[] = {
+		/* 8168D family. */
+		{ 0x7c800000, 0x28000000,	RTL_GIGA_MAC_VER_25 },
+
+		/* 8168C family. */
+		{ 0x7cf00000, 0x3ca00000,	RTL_GIGA_MAC_VER_24 },
+		{ 0x7cf00000, 0x3c900000,	RTL_GIGA_MAC_VER_23 },
+		{ 0x7cf00000, 0x3c800000,	RTL_GIGA_MAC_VER_18 },
+		{ 0x7c800000, 0x3c800000,	RTL_GIGA_MAC_VER_24 },
+		{ 0x7cf00000, 0x3c000000,	RTL_GIGA_MAC_VER_19 },
+		{ 0x7cf00000, 0x3c200000,	RTL_GIGA_MAC_VER_20 },
+		{ 0x7cf00000, 0x3c300000,	RTL_GIGA_MAC_VER_21 },
+		{ 0x7cf00000, 0x3c400000,	RTL_GIGA_MAC_VER_22 },
+		{ 0x7c800000, 0x3c000000,	RTL_GIGA_MAC_VER_22 },
+
+		/* 8168B family. */
+		{ 0x7cf00000, 0x38000000,	RTL_GIGA_MAC_VER_12 },
+		{ 0x7cf00000, 0x38500000,	RTL_GIGA_MAC_VER_17 },
+		{ 0x7c800000, 0x38000000,	RTL_GIGA_MAC_VER_17 },
+		{ 0x7c800000, 0x30000000,	RTL_GIGA_MAC_VER_11 },
+
+		/* 8101 family. */
+		{ 0x7cf00000, 0x34a00000,	RTL_GIGA_MAC_VER_09 },
+		{ 0x7cf00000, 0x24a00000,	RTL_GIGA_MAC_VER_09 },
+		{ 0x7cf00000, 0x34900000,	RTL_GIGA_MAC_VER_08 },
+		{ 0x7cf00000, 0x24900000,	RTL_GIGA_MAC_VER_08 },
+		{ 0x7cf00000, 0x34800000,	RTL_GIGA_MAC_VER_07 },
+		{ 0x7cf00000, 0x24800000,	RTL_GIGA_MAC_VER_07 },
+		{ 0x7cf00000, 0x34000000,	RTL_GIGA_MAC_VER_13 },
+		{ 0x7cf00000, 0x34300000,	RTL_GIGA_MAC_VER_10 },
+		{ 0x7cf00000, 0x34200000,	RTL_GIGA_MAC_VER_16 },
+		{ 0x7c800000, 0x34800000,	RTL_GIGA_MAC_VER_09 },
+		{ 0x7c800000, 0x24800000,	RTL_GIGA_MAC_VER_09 },
+		{ 0x7c800000, 0x34000000,	RTL_GIGA_MAC_VER_16 },
+		/* FIXME: where did these entries come from ? -- FR */
+		{ 0xfc800000, 0x38800000,	RTL_GIGA_MAC_VER_15 },
+		{ 0xfc800000, 0x30800000,	RTL_GIGA_MAC_VER_14 },
+
+		/* 8110 family. */
+		{ 0xfc800000, 0x98000000,	RTL_GIGA_MAC_VER_06 },
+		{ 0xfc800000, 0x18000000,	RTL_GIGA_MAC_VER_05 },
+		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
+		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
+		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
+		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },
+
+		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_VER_01 }	/* Catch-all */
+	}, *p = mac_info;
+	u32 reg;
+
+	DBGP ( "rtl8169_get_mac_version\n" );
+
+	reg = RTL_R32(TxConfig);
+	while ((reg & p->mask) != p->val)
+		p++;
+	tp->mac_version = p->mac_version;
+
+	DBG ( "tp->mac_version = %d\n", tp->mac_version );
+
+	if (p->mask == 0x00000000) {
+		DBG ( "unknown MAC (%08x)\n", reg );
+	}
+}
+
+struct phy_reg {
+	u16 reg;
+	u16 val;
+};
+
+static void rtl_phy_write(void *ioaddr, struct phy_reg *regs, int len)
+{
+	DBGP ( "rtl_phy_write\n" );
+
+	while (len-- > 0) {
+		mdio_write(ioaddr, regs->reg, regs->val);
+		regs++;
+	}
+}
+
+static void rtl8169s_hw_phy_config(void *ioaddr)
+{
+	struct {
+		u16 regs[5]; /* Beware of bit-sign propagation */
+	} phy_magic[5] = { {
+		{ 0x0000,	//w 4 15 12 0
+		  0x00a1,	//w 3 15 0 00a1
+		  0x0008,	//w 2 15 0 0008
+		  0x1020,	//w 1 15 0 1020
+		  0x1000 } },{	//w 0 15 0 1000
+		{ 0x7000,	//w 4 15 12 7
+		  0xff41,	//w 3 15 0 ff41
+		  0xde60,	//w 2 15 0 de60
+		  0x0140,	//w 1 15 0 0140
+		  0x0077 } },{	//w 0 15 0 0077
+		{ 0xa000,	//w 4 15 12 a
+		  0xdf01,	//w 3 15 0 df01
+		  0xdf20,	//w 2 15 0 df20
+		  0xff95,	//w 1 15 0 ff95
+		  0xfa00 } },{	//w 0 15 0 fa00
+		{ 0xb000,	//w 4 15 12 b
+		  0xff41,	//w 3 15 0 ff41
+		  0xde20,	//w 2 15 0 de20
+		  0x0140,	//w 1 15 0 0140
+		  0x00bb } },{	//w 0 15 0 00bb
+		{ 0xf000,	//w 4 15 12 f
+		  0xdf01,	//w 3 15 0 df01
+		  0xdf20,	//w 2 15 0 df20
+		  0xff95,	//w 1 15 0 ff95
+		  0xbf00 }	//w 0 15 0 bf00
+		}
+	}, *p = phy_magic;
+	unsigned int i;
+
+	DBGP ( "rtl8169s_hw_phy_config\n" );
+
+	mdio_write(ioaddr, 0x1f, 0x0001);		//w 31 2 0 1
+	mdio_write(ioaddr, 0x15, 0x1000);		//w 21 15 0 1000
+	mdio_write(ioaddr, 0x18, 0x65c7);		//w 24 15 0 65c7
+	rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0);	//w 4 11 11 0
+
+	for (i = 0; i < ARRAY_SIZE(phy_magic); i++, p++) {
+		int val, pos = 4;
+
+		val = (mdio_read(ioaddr, pos) & 0x0fff) | (p->regs[0] & 0xffff);
+		mdio_write(ioaddr, pos, val);
+		while (--pos >= 0)
+			mdio_write(ioaddr, pos, p->regs[4 - pos] & 0xffff);
+		rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 1); //w 4 11 11 1
+		rtl8169_write_gmii_reg_bit(ioaddr, 4, 11, 0); //w 4 11 11 0
+	}
+	mdio_write(ioaddr, 0x1f, 0x0000); //w 31 2 0 0
+}
+
+static void rtl8169sb_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0002 },
+		{ 0x01, 0x90d0 },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8169sb_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168bb_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x10, 0xf41b },
+		{ 0x1f, 0x0000 }
+	};
+
+	mdio_write(ioaddr, 0x1f, 0x0001);
+	mdio_patch(ioaddr, 0x16, 1 << 0);
+
+	DBGP ( "rtl8168bb_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168bef_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x10, 0xf41b },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8168bef_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168cp_1_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0000 },
+		{ 0x1d, 0x0f00 },
+		{ 0x1f, 0x0002 },
+		{ 0x0c, 0x1ec8 },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8168cp_1_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168cp_2_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x1d, 0x3d98 },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8168cp_2_hw_phy_config\n" );
+
+	mdio_write(ioaddr, 0x1f, 0x0000);
+	mdio_patch(ioaddr, 0x14, 1 << 5);
+	mdio_patch(ioaddr, 0x0d, 1 << 5);
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl8168c_1_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x12, 0x2300 },
+		{ 0x1f, 0x0002 },
+		{ 0x00, 0x88d4 },
+		{ 0x01, 0x82b1 },
+		{ 0x03, 0x7002 },
+		{ 0x08, 0x9e30 },
+		{ 0x09, 0x01f0 },
+		{ 0x0a, 0x5500 },
+		{ 0x0c, 0x00c8 },
+		{ 0x1f, 0x0003 },
+		{ 0x12, 0xc096 },
+		{ 0x16, 0x000a },
+		{ 0x1f, 0x0000 },
+		{ 0x1f, 0x0000 },
+		{ 0x09, 0x2000 },
+		{ 0x09, 0x0000 }
+	};
+
+	DBGP ( "rtl8168c_1_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+
+	mdio_patch(ioaddr, 0x14, 1 << 5);
+	mdio_patch(ioaddr, 0x0d, 1 << 5);
+	mdio_write(ioaddr, 0x1f, 0x0000);
+}
+
+static void rtl8168c_2_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x12, 0x2300 },
+		{ 0x03, 0x802f },
+		{ 0x02, 0x4f02 },
+		{ 0x01, 0x0409 },
+		{ 0x00, 0xf099 },
+		{ 0x04, 0x9800 },
+		{ 0x04, 0x9000 },
+		{ 0x1d, 0x3d98 },
+		{ 0x1f, 0x0002 },
+		{ 0x0c, 0x7eb8 },
+		{ 0x06, 0x0761 },
+		{ 0x1f, 0x0003 },
+		{ 0x16, 0x0f0a },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8168c_2_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+
+	mdio_patch(ioaddr, 0x16, 1 << 0);
+	mdio_patch(ioaddr, 0x14, 1 << 5);
+	mdio_patch(ioaddr, 0x0d, 1 << 5);
+	mdio_write(ioaddr, 0x1f, 0x0000);
+}
+
+static void rtl8168c_3_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x12, 0x2300 },
+		{ 0x1d, 0x3d98 },
+		{ 0x1f, 0x0002 },
+		{ 0x0c, 0x7eb8 },
+		{ 0x06, 0x5461 },
+		{ 0x1f, 0x0003 },
+		{ 0x16, 0x0f0a },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8168c_3_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+
+	mdio_patch(ioaddr, 0x16, 1 << 0);
+	mdio_patch(ioaddr, 0x14, 1 << 5);
+	mdio_patch(ioaddr, 0x0d, 1 << 5);
+	mdio_write(ioaddr, 0x1f, 0x0000);
+}
+
+static void rtl8168c_4_hw_phy_config(void *ioaddr)
+{
+	DBGP ( "rtl8168c_4_hw_phy_config\n" );
+
+	rtl8168c_3_hw_phy_config(ioaddr);
+}
+
+static void rtl8168d_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init_0[] = {
+		{ 0x1f, 0x0001 },
+		{ 0x09, 0x2770 },
+		{ 0x08, 0x04d0 },
+		{ 0x0b, 0xad15 },
+		{ 0x0c, 0x5bf0 },
+		{ 0x1c, 0xf101 },
+		{ 0x1f, 0x0003 },
+		{ 0x14, 0x94d7 },
+		{ 0x12, 0xf4d6 },
+		{ 0x09, 0xca0f },
+		{ 0x1f, 0x0002 },
+		{ 0x0b, 0x0b10 },
+		{ 0x0c, 0xd1f7 },
+		{ 0x1f, 0x0002 },
+		{ 0x06, 0x5461 },
+		{ 0x1f, 0x0002 },
+		{ 0x05, 0x6662 },
+		{ 0x1f, 0x0000 },
+		{ 0x14, 0x0060 },
+		{ 0x1f, 0x0000 },
+		{ 0x0d, 0xf8a0 },
+		{ 0x1f, 0x0005 },
+		{ 0x05, 0xffc2 }
+	};
+
+	DBGP ( "rtl8168d_hw_phy_config\n" );
+
+	rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
+
+	if (mdio_read(ioaddr, 0x06) == 0xc400) {
+		struct phy_reg phy_reg_init_1[] = {
+			{ 0x1f, 0x0005 },
+			{ 0x01, 0x0300 },
+			{ 0x1f, 0x0000 },
+			{ 0x11, 0x401c },
+			{ 0x16, 0x4100 },
+			{ 0x1f, 0x0005 },
+			{ 0x07, 0x0010 },
+			{ 0x05, 0x83dc },
+			{ 0x06, 0x087d },
+			{ 0x05, 0x8300 },
+			{ 0x06, 0x0101 },
+			{ 0x06, 0x05f8 },
+			{ 0x06, 0xf9fa },
+			{ 0x06, 0xfbef },
+			{ 0x06, 0x79e2 },
+			{ 0x06, 0x835f },
+			{ 0x06, 0xe0f8 },
+			{ 0x06, 0x9ae1 },
+			{ 0x06, 0xf89b },
+			{ 0x06, 0xef31 },
+			{ 0x06, 0x3b65 },
+			{ 0x06, 0xaa07 },
+			{ 0x06, 0x81e4 },
+			{ 0x06, 0xf89a },
+			{ 0x06, 0xe5f8 },
+			{ 0x06, 0x9baf },
+			{ 0x06, 0x06ae },
+			{ 0x05, 0x83dc },
+			{ 0x06, 0x8300 },
+		};
+
+		rtl_phy_write(ioaddr, phy_reg_init_1,
+			      ARRAY_SIZE(phy_reg_init_1));
+	}
+
+	mdio_write(ioaddr, 0x1f, 0x0000);
+}
+
+static void rtl8102e_hw_phy_config(void *ioaddr)
+{
+	struct phy_reg phy_reg_init[] = {
+		{ 0x1f, 0x0003 },
+		{ 0x08, 0x441d },
+		{ 0x01, 0x9100 },
+		{ 0x1f, 0x0000 }
+	};
+
+	DBGP ( "rtl8102e_hw_phy_config\n" );
+
+	mdio_write(ioaddr, 0x1f, 0x0000);
+	mdio_patch(ioaddr, 0x11, 1 << 12);
+	mdio_patch(ioaddr, 0x19, 1 << 13);
+
+	rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
+static void rtl_hw_phy_config(struct net_device *dev)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "rtl_hw_phy_config\n" );
+
+	DBG ( "mac_version = 0x%02x\n", tp->mac_version );
+
+	switch (tp->mac_version) {
+	case RTL_GIGA_MAC_VER_01:
+		break;
+	case RTL_GIGA_MAC_VER_02:
+	case RTL_GIGA_MAC_VER_03:
+		rtl8169s_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_04:
+		rtl8169sb_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_07:
+	case RTL_GIGA_MAC_VER_08:
+	case RTL_GIGA_MAC_VER_09:
+		rtl8102e_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_11:
+		rtl8168bb_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_12:
+		rtl8168bef_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_17:
+		rtl8168bef_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_18:
+		rtl8168cp_1_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_19:
+		rtl8168c_1_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_20:
+		rtl8168c_2_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_21:
+		rtl8168c_3_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_22:
+		rtl8168c_4_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_23:
+	case RTL_GIGA_MAC_VER_24:
+		rtl8168cp_2_hw_phy_config(ioaddr);
+		break;
+	case RTL_GIGA_MAC_VER_25:
+		rtl8168d_hw_phy_config(ioaddr);
+		break;
+
+	default:
+		break;
+	}
+}
+
+static void rtl8169_phy_reset(struct net_device *dev __unused,
+			      struct rtl8169_private *tp)
+{
+	void *ioaddr = tp->mmio_addr;
+	unsigned int i;
+
+	DBGP ( "rtl8169_phy_reset\n" );
+
+	tp->phy_reset_enable(ioaddr);
+	for (i = 0; i < 100; i++) {
+		if (!tp->phy_reset_pending(ioaddr))
+			return;
+		mdelay ( 1 );
+	}
+	DBG ( "PHY reset failed.\n" );
+}
+
+static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
+{
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "rtl8169_init_phy\n" );
+
+	rtl_hw_phy_config(dev);
+
+	if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
+		DBG ( "Set MAC Reg C+CR Offset 0x82h = 0x01h\n" );
+		RTL_W8(0x82, 0x01);
+	}
+
+	pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
+
+	if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
+		pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+	if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
+		DBG ( "Set MAC Reg C+CR Offset 0x82h = 0x01h\n" );
+		RTL_W8(0x82, 0x01);
+		DBG ( "Set PHY Reg 0x0bh = 0x00h\n" );
+		mdio_write(ioaddr, 0x0b, 0x0000); //w 0x0b 15 0 0
+	}
+
+	rtl8169_phy_reset(dev, tp);
+
+	/*
+	 * rtl8169_set_speed_xmii takes good care of the Fast Ethernet
+	 * only 8101. Don't panic.
+	 */
+	rtl8169_set_speed(dev, AUTONEG_ENABLE, SPEED_1000, DUPLEX_FULL);
+
+	if ((RTL_R8(PHYstatus) & TBI_Enable))
+		DBG ( "TBI auto-negotiating\n" );
+}
+
+static const struct rtl_cfg_info {
+	void (*hw_start)(struct net_device *);
+	unsigned int region;
+	unsigned int align;
+	u16 intr_event;
+	u16 napi_event;
+	unsigned features;
+} rtl_cfg_infos [] = {
+	[RTL_CFG_0] = {
+		.hw_start	= rtl_hw_start_8169,
+		.region		= 1,
+		.align		= 0,
+		.intr_event	= SYSErr | LinkChg | RxOverflow |
+				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
+		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
+		.features	= RTL_FEATURE_GMII
+	},
+	[RTL_CFG_1] = {
+		.hw_start	= rtl_hw_start_8168,
+		.region		= 2,
+		.align		= 8,
+		.intr_event	= SYSErr | LinkChg | RxOverflow |
+				  TxErr | TxOK | RxOK | RxErr,
+		.napi_event	= TxErr | TxOK | RxOK | RxOverflow,
+		.features	= RTL_FEATURE_GMII
+	},
+	[RTL_CFG_2] = {
+		.hw_start	= rtl_hw_start_8101,
+		.region		= 2,
+		.align		= 8,
+		.intr_event	= SYSErr | LinkChg | RxOverflow | PCSTimeout |
+				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
+		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
+	}
+};
+
+static void rtl8169_hw_reset(void *ioaddr)
+{
+	DBGP ( "rtl8169_hw_reset\n" );
+
+	/* Disable interrupts */
+	rtl8169_irq_mask_and_ack(ioaddr);
+
+	/* Reset the chipset */
+	RTL_W8(ChipCmd, CmdReset);
+
+	/* PCI commit */
+	RTL_R8(ChipCmd);
+}
+
+static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
+{
+	void *ioaddr = tp->mmio_addr;
+	u32 cfg = rtl8169_rx_config;
+
+	DBGP ( "rtl_set_rx_tx_config_registers\n" );
+
+	cfg |= (RTL_R32(RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
+	RTL_W32(RxConfig, cfg);
+
+	/* Set DMA burst size and Interframe Gap Time */
+	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
+		(InterFrameGap << TxInterFrameGapShift));
+}
+
+static void rtl_soft_reset ( struct net_device *dev )
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	unsigned int i;
+
+	DBGP ( "rtl_hw_soft_reset\n" );
+
+	/* Soft reset the chip. */
+	RTL_W8(ChipCmd, CmdReset);
+
+	/* Check that the chip has finished the reset. */
+	for (i = 0; i < 100; i++) {
+		if ((RTL_R8(ChipCmd) & CmdReset) == 0)
+			break;
+		mdelay ( 1 );
+	}
+
+	if ( i == 100 ) {
+		DBG ( "Reset Failed! (> 100 iterations)\n" );
+	}
+}
+
+static void rtl_hw_start ( struct net_device *dev )
+{
+	struct rtl8169_private *tp = netdev_priv ( dev );
+
+	DBGP ( "rtl_hw_start\n" );
+
+	/* Soft reset NIC */
+	rtl_soft_reset ( dev );
+
+	tp->hw_start ( dev );
+}
+
+static void rtl_set_rx_tx_desc_registers(struct rtl8169_private *tp,
+					 void *ioaddr)
+{
+	DBGP ( "rtl_set_rx_tx_desc_registers\n" );
+
+	/*
+	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
+	 * register to be written before TxDescAddrLow to work.
+	 * Switching from MMIO to I/O access fixes the issue as well.
+	 */
+	RTL_W32 ( TxDescStartAddrHigh, 0 );
+	RTL_W32 ( TxDescStartAddrLow, virt_to_bus ( tp->tx_base ) );
+	RTL_W32 ( RxDescAddrHigh, 0 );
+	RTL_W32 ( RxDescAddrLow, virt_to_bus ( tp->rx_base ) );
+}
+
+static u16 rtl_rw_cpluscmd(void *ioaddr)
+{
+	u16 cmd;
+
+	DBGP ( "rtl_rw_cpluscmd\n" );
+
+	cmd = RTL_R16(CPlusCmd);
+	RTL_W16(CPlusCmd, cmd);
+	return cmd;
+}
+
+static void rtl_set_rx_max_size(void *ioaddr)
+{
+	DBGP ( "rtl_set_rx_max_size\n" );
+
+	RTL_W16 ( RxMaxSize, RX_BUF_SIZE );
+}
+
+static void rtl8169_set_magic_reg(void *ioaddr, unsigned mac_version)
+{
+	struct {
+		u32 mac_version;
+		u32 clk;
+		u32 val;
+	} cfg2_info [] = {
+		{ RTL_GIGA_MAC_VER_05, PCI_Clock_33MHz, 0x000fff00 }, // 8110SCd
+		{ RTL_GIGA_MAC_VER_05, PCI_Clock_66MHz, 0x000fffff },
+		{ RTL_GIGA_MAC_VER_06, PCI_Clock_33MHz, 0x00ffff00 }, // 8110SCe
+		{ RTL_GIGA_MAC_VER_06, PCI_Clock_66MHz, 0x00ffffff }
+	}, *p = cfg2_info;
+	unsigned int i;
+	u32 clk;
+
+	DBGP ( "rtl8169_set_magic_reg\n" );
+
+	clk = RTL_R8(Config2) & PCI_Clock_66MHz;
+	for (i = 0; i < ARRAY_SIZE(cfg2_info); i++, p++) {
+		if ((p->mac_version == mac_version) && (p->clk == clk)) {
+			RTL_W32(0x7c, p->val);
+			break;
+		}
+	}
+}
+
+static void rtl_set_rx_mode ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+	u32 tmp;
+
+	DBGP ( "rtl_set_rx_mode\n" );
+
+	/* Accept all Multicast Packets */
+
+	RTL_W32 ( MAR0 + 0, 0xffffffff );
+	RTL_W32 ( MAR0 + 4, 0xffffffff );
+
+	tmp = rtl8169_rx_config | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
+	      ( RTL_R32 ( RxConfig ) & rtl_chip_info[tp->chipset].RxConfigMask );
+
+	RTL_W32 ( RxConfig, tmp );
+}
+
+static void rtl_hw_start_8169(struct net_device *dev)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	struct pci_device *pdev = tp->pci_dev;
+
+	DBGP ( "rtl_hw_start_8169\n" );
+
+	if (tp->mac_version == RTL_GIGA_MAC_VER_05) {
+		RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | PCIMulRW);
+		pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08);
+	}
+
+	RTL_W8(Cfg9346, Cfg9346_Unlock);
+
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
+		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	rtl_set_rx_max_size(ioaddr);
+
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
+		rtl_set_rx_tx_config_registers(tp);
+
+	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
+
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
+		DBG ( "Set MAC Reg C+CR Offset 0xE0. "
+			"Bit-3 and bit-14 MUST be 1\n" );
+		tp->cp_cmd |= (1 << 14);
+	}
+
+	RTL_W16(CPlusCmd, tp->cp_cmd);
+
+	rtl8169_set_magic_reg(ioaddr, tp->mac_version);
+
+	/*
+	 * Undocumented corner. Supposedly:
+	 * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets
+	 */
+	RTL_W16(IntrMitigate, 0x0000);
+
+	rtl_set_rx_tx_desc_registers(tp, ioaddr);
+
+	if ((tp->mac_version != RTL_GIGA_MAC_VER_01) &&
+	    (tp->mac_version != RTL_GIGA_MAC_VER_02) &&
+	    (tp->mac_version != RTL_GIGA_MAC_VER_03) &&
+	    (tp->mac_version != RTL_GIGA_MAC_VER_04)) {
+		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+		rtl_set_rx_tx_config_registers(tp);
+	}
+
+	RTL_W8(Cfg9346, Cfg9346_Lock);
+
+	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
+	RTL_R8(IntrMask);
+
+	RTL_W32(RxMissed, 0);
+
+	rtl_set_rx_mode(dev);
+
+	/* no early-rx interrupts */
+	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
+
+	//        RTL_W16(IntrMask, tp->intr_event);
+}
+
+static void rtl_tx_performance_tweak(struct pci_device *pdev, u16 force)
+{
+	struct net_device *dev = pci_get_drvdata(pdev);
+	struct rtl8169_private *tp = netdev_priv(dev);
+	int cap = tp->pcie_cap;
+
+	DBGP ( "rtl_tx_performance_tweak\n" );
+
+	if (cap) {
+		u16 ctl;
+
+		pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
+		ctl = (ctl & ~PCI_EXP_DEVCTL_READRQ) | force;
+		pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
+	}
+}
+
+static void rtl_csi_access_enable(void *ioaddr)
+{
+	u32 csi;
+
+	DBGP ( "rtl_csi_access_enable\n" );
+
+	csi = rtl_csi_read(ioaddr, 0x070c) & 0x00ffffff;
+	rtl_csi_write(ioaddr, 0x070c, csi | 0x27000000);
+}
+
+struct ephy_info {
+	unsigned int offset;
+	u16 mask;
+	u16 bits;
+};
+
+static void rtl_ephy_init(void *ioaddr, struct ephy_info *e, int len)
+{
+	u16 w;
+
+	DBGP ( "rtl_ephy_init\n" );
+
+	while (len-- > 0) {
+		w = (rtl_ephy_read(ioaddr, e->offset) & ~e->mask) | e->bits;
+		rtl_ephy_write(ioaddr, e->offset, w);
+		e++;
+	}
+}
+
+static void rtl_disable_clock_request(struct pci_device *pdev)
+{
+	struct net_device *dev = pci_get_drvdata(pdev);
+	struct rtl8169_private *tp = netdev_priv(dev);
+	int cap = tp->pcie_cap;
+
+	DBGP ( "rtl_disable_clock_request\n" );
+
+	if (cap) {
+		u16 ctl;
+
+		pci_read_config_word(pdev, cap + PCI_EXP_LNKCTL, &ctl);
+		ctl &= ~PCI_EXP_LNKCTL_CLKREQ_EN;
+		pci_write_config_word(pdev, cap + PCI_EXP_LNKCTL, ctl);
+	}
+}
+
+#define R8168_CPCMD_QUIRK_MASK (\
+	EnableBist | \
+	Mac_dbgo_oe | \
+	Force_half_dup | \
+	Force_rxflow_en | \
+	Force_txflow_en | \
+	Cxpl_dbg_sel | \
+	ASF | \
+	PktCntrDisable | \
+	Mac_dbgo_sel)
+
+static void rtl_hw_start_8168bb(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168bb\n" );
+
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+
+	rtl_tx_performance_tweak(pdev,
+		(0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
+}
+
+static void rtl_hw_start_8168bef(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168bef\n" );
+
+	rtl_hw_start_8168bb(ioaddr, pdev);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	RTL_W8(Config4, RTL_R8(Config4) & ~(1 << 0));
+}
+
+static void __rtl_hw_start_8168cp(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "__rtl_hw_start_8168cp\n" );
+
+	RTL_W8(Config1, RTL_R8(Config1) | Speed_down);
+
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	rtl_disable_clock_request(pdev);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+}
+
+static void rtl_hw_start_8168cp_1(void *ioaddr, struct pci_device *pdev)
+{
+	static struct ephy_info e_info_8168cp[] = {
+		{ 0x01, 0,	0x0001 },
+		{ 0x02, 0x0800,	0x1000 },
+		{ 0x03, 0,	0x0042 },
+		{ 0x06, 0x0080,	0x0000 },
+		{ 0x07, 0,	0x2000 }
+	};
+
+	DBGP ( "rtl_hw_start_8168cp_1\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	rtl_ephy_init(ioaddr, e_info_8168cp, ARRAY_SIZE(e_info_8168cp));
+
+	__rtl_hw_start_8168cp(ioaddr, pdev);
+}
+
+static void rtl_hw_start_8168cp_2(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168cp_2\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+}
+
+static void rtl_hw_start_8168cp_3(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168cp_3\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	/* Magic. */
+	RTL_W8(DBG_REG, 0x20);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+}
+
+static void rtl_hw_start_8168c_1(void *ioaddr, struct pci_device *pdev)
+{
+	static struct ephy_info e_info_8168c_1[] = {
+		{ 0x02, 0x0800,	0x1000 },
+		{ 0x03, 0,	0x0002 },
+		{ 0x06, 0x0080,	0x0000 }
+	};
+
+	DBGP ( "rtl_hw_start_8168c_1\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	RTL_W8(DBG_REG, 0x06 | FIX_NAK_1 | FIX_NAK_2);
+
+	rtl_ephy_init(ioaddr, e_info_8168c_1, ARRAY_SIZE(e_info_8168c_1));
+
+	__rtl_hw_start_8168cp(ioaddr, pdev);
+}
+
+static void rtl_hw_start_8168c_2(void *ioaddr, struct pci_device *pdev)
+{
+	static struct ephy_info e_info_8168c_2[] = {
+		{ 0x01, 0,	0x0001 },
+		{ 0x03, 0x0400,	0x0220 }
+	};
+
+	DBGP ( "rtl_hw_start_8168c_2\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	rtl_ephy_init(ioaddr, e_info_8168c_2, ARRAY_SIZE(e_info_8168c_2));
+
+	__rtl_hw_start_8168cp(ioaddr, pdev);
+}
+
+static void rtl_hw_start_8168c_3(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168c_3\n" );
+
+	rtl_hw_start_8168c_2(ioaddr, pdev);
+}
+
+static void rtl_hw_start_8168c_4(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168c_4\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	__rtl_hw_start_8168cp(ioaddr, pdev);
+}
+
+static void rtl_hw_start_8168d(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8168d\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	rtl_disable_clock_request(pdev);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
+}
+
+static void rtl_hw_start_8168(struct net_device *dev)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	struct pci_device *pdev = tp->pci_dev;
+
+	DBGP ( "rtl_hw_start_8168\n" );
+
+	RTL_W8(Cfg9346, Cfg9346_Unlock);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	rtl_set_rx_max_size(ioaddr);
+
+	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
+
+	RTL_W16(CPlusCmd, tp->cp_cmd);
+
+	RTL_W16(IntrMitigate, 0x5151);
+
+	/* Work around for RxFIFO overflow. */
+	if (tp->mac_version == RTL_GIGA_MAC_VER_11) {
+		tp->intr_event |= RxFIFOOver | PCSTimeout;
+		tp->intr_event &= ~RxOverflow;
+	}
+
+	rtl_set_rx_tx_desc_registers(tp, ioaddr);
+
+	rtl_set_rx_mode(dev);
+
+	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
+		(InterFrameGap << TxInterFrameGapShift));
+
+	RTL_R8(IntrMask);
+
+	switch (tp->mac_version) {
+	case RTL_GIGA_MAC_VER_11:
+		rtl_hw_start_8168bb(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_12:
+	case RTL_GIGA_MAC_VER_17:
+		rtl_hw_start_8168bef(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_18:
+		rtl_hw_start_8168cp_1(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_19:
+		rtl_hw_start_8168c_1(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_20:
+		rtl_hw_start_8168c_2(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_21:
+		rtl_hw_start_8168c_3(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_22:
+		rtl_hw_start_8168c_4(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_23:
+		rtl_hw_start_8168cp_2(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_24:
+		rtl_hw_start_8168cp_3(ioaddr, pdev);
+	break;
+
+	case RTL_GIGA_MAC_VER_25:
+		rtl_hw_start_8168d(ioaddr, pdev);
+	break;
+
+	default:
+		DBG ( "Unknown chipset (mac_version = %d).\n",
+		      tp->mac_version );
+	break;
+	}
+
+	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+
+	RTL_W8(Cfg9346, Cfg9346_Lock);
+
+	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000);
+
+	//        RTL_W16(IntrMask, tp->intr_event);
+}
+
+#define R810X_CPCMD_QUIRK_MASK (\
+	EnableBist | \
+	Mac_dbgo_oe | \
+	Force_half_dup | \
+	Force_half_dup | \
+	Force_txflow_en | \
+	Cxpl_dbg_sel | \
+	ASF | \
+	PktCntrDisable | \
+	PCIDAC | \
+	PCIMulRW)
+
+static void rtl_hw_start_8102e_1(void *ioaddr, struct pci_device *pdev)
+{
+	static struct ephy_info e_info_8102e_1[] = {
+		{ 0x01,	0, 0x6e65 },
+		{ 0x02,	0, 0x091f },
+		{ 0x03,	0, 0xc2f9 },
+		{ 0x06,	0, 0xafb5 },
+		{ 0x07,	0, 0x0e00 },
+		{ 0x19,	0, 0xec80 },
+		{ 0x01,	0, 0x2e65 },
+		{ 0x01,	0, 0x6e65 }
+	};
+	u8 cfg1;
+
+	DBGP ( "rtl_hw_start_8102e_1\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	RTL_W8(DBG_REG, FIX_NAK_1);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	RTL_W8(Config1,
+	       LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	cfg1 = RTL_R8(Config1);
+	if ((cfg1 & LEDS0) && (cfg1 & LEDS1))
+		RTL_W8(Config1, cfg1 & ~LEDS0);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
+
+	rtl_ephy_init(ioaddr, e_info_8102e_1, ARRAY_SIZE(e_info_8102e_1));
+}
+
+static void rtl_hw_start_8102e_2(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8102e_2\n" );
+
+	rtl_csi_access_enable(ioaddr);
+
+	rtl_tx_performance_tweak(pdev, 0x5 << MAX_READ_REQUEST_SHIFT);
+
+	RTL_W8(Config1, MEMMAP | IOMAP | VPD | PMEnable);
+	RTL_W8(Config3, RTL_R8(Config3) & ~Beacon_en);
+
+	RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) & ~R810X_CPCMD_QUIRK_MASK);
+}
+
+static void rtl_hw_start_8102e_3(void *ioaddr, struct pci_device *pdev)
+{
+	DBGP ( "rtl_hw_start_8102e_3\n" );
+
+	rtl_hw_start_8102e_2(ioaddr, pdev);
+
+	rtl_ephy_write(ioaddr, 0x03, 0xc2f9);
+}
+
+static void rtl_hw_start_8101(struct net_device *dev)
+{
+	struct rtl8169_private *tp = netdev_priv(dev);
+	void *ioaddr = tp->mmio_addr;
+	struct pci_device *pdev = tp->pci_dev;
+
+	DBGP ( "rtl_hw_start_8101\n" );
+
+	if ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
+	    (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
+		int cap = tp->pcie_cap;
+
+		if (cap) {
+			pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL,
+					      PCI_EXP_DEVCTL_NOSNOOP_EN);
+		}
+	}
+
+	switch (tp->mac_version) {
+	case RTL_GIGA_MAC_VER_07:
+		rtl_hw_start_8102e_1(ioaddr, pdev);
+		break;
+
+	case RTL_GIGA_MAC_VER_08:
+		rtl_hw_start_8102e_3(ioaddr, pdev);
+		break;
+
+	case RTL_GIGA_MAC_VER_09:
+		rtl_hw_start_8102e_2(ioaddr, pdev);
+		break;
+	}
+
+	RTL_W8(Cfg9346, Cfg9346_Unlock);
+
+	RTL_W8(EarlyTxThres, EarlyTxThld);
+
+	rtl_set_rx_max_size(ioaddr);
+
+	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
+
+	RTL_W16(CPlusCmd, tp->cp_cmd);
+
+	RTL_W16(IntrMitigate, 0x0000);
+
+	rtl_set_rx_tx_desc_registers(tp, ioaddr);
+
+	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+	rtl_set_rx_tx_config_registers(tp);
+
+	RTL_W8(Cfg9346, Cfg9346_Lock);
+
+	RTL_R8(IntrMask);
+
+	rtl_set_rx_mode(dev);
+
+	RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
+
+	RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000);
+
+	//        RTL_W16(IntrMask, tp->intr_event);
+}
+
+/*** iPXE API Support Routines ***/
+
+/**
+ * setup_tx_resources - allocate tx resources (descriptors)
+ *
+ * @v tp	 Driver private storage
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ **/
+static int
+rtl8169_setup_tx_resources ( struct rtl8169_private *tp )
+{
+	DBGP ( "rtl8169_setup_tx_resources\n" );
+
+	tp->tx_base = malloc_dma ( R8169_TX_RING_BYTES, TX_RING_ALIGN );
+
+	if ( ! tp->tx_base ) {
+		return -ENOMEM;
+	}
+
+	memset ( tp->tx_base, 0, R8169_TX_RING_BYTES );
+
+	DBG ( "tp->tx_base      = %#08lx\n", virt_to_bus ( tp->tx_base ) );
+
+	tp->tx_fill_ctr = 0;
+	tp->tx_curr = 0;
+	tp->tx_tail = 0;
+
+	return 0;
+}
+
+static void
+rtl8169_process_tx_packets ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+
+	uint32_t tx_status;
+	struct TxDesc *tx_curr_desc;
+
+	DBGP ( "rtl8169_process_tx_packets\n" );
+
+	while ( tp->tx_tail != tp->tx_curr ) {
+
+		tx_curr_desc = tp->tx_base  + tp->tx_tail;
+
+		tx_status = tx_curr_desc->opts1;
+
+		DBG2 ( "Before DescOwn check tx_status: %#08x\n", tx_status );
+
+		/* if the packet at tx_tail is not owned by hardware it is for us */
+		if ( tx_status & DescOwn )
+			break;
+
+		DBG ( "Transmitted packet.\n" );
+		DBG ( "tp->tx_fill_ctr     = %d\n", tp->tx_fill_ctr );
+		DBG ( "tp->tx_tail         = %d\n", tp->tx_tail );
+		DBG ( "tp->tx_curr         = %d\n", tp->tx_curr );
+		DBG ( "tx_status           = %d\n", tx_status );
+		DBG ( "tx_curr_desc        = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+
+		/* Pass packet to core for processing */
+		netdev_tx_complete ( netdev, tp->tx_iobuf[tp->tx_tail] );
+
+		memset ( tx_curr_desc, 0, sizeof ( *tx_curr_desc ) );
+
+		/* Decrement count of used descriptors */
+		tp->tx_fill_ctr--;
+
+		/* Increment sent packets index */
+		tp->tx_tail = ( tp->tx_tail + 1 ) % NUM_TX_DESC;
+	}
+}
+
+static void
+rtl8169_free_tx_resources ( struct rtl8169_private *tp )
+{
+	DBGP ( "rtl8169_free_tx_resources\n" );
+
+	free_dma ( tp->tx_base, R8169_TX_RING_BYTES );
+}
+
+static void
+rtl8169_populate_rx_descriptor ( struct rtl8169_private *tp, struct RxDesc *rx_desc, uint32_t index )
+{
+	DBGP ( "rtl8169_populate_rx_descriptor\n" );
+
+	DBG ( "Populating rx descriptor %d\n", index );
+
+	memset ( rx_desc, 0, sizeof ( *rx_desc ) );
+
+	rx_desc->addr_hi = 0;
+	rx_desc->addr_lo = virt_to_bus ( tp->rx_iobuf[index]->data );
+	rx_desc->opts2 = 0;
+	rx_desc->opts1 = ( index == ( NUM_RX_DESC - 1 ) ? RingEnd : 0 ) |
+		RX_BUF_SIZE;
+	rx_desc->opts1 |= DescOwn;
+}
+
+/**
+ * Refill descriptor ring
+ *
+ * @v netdev		Net device
+ */
+static void rtl8169_refill_rx_ring ( struct rtl8169_private *tp )
+{
+	struct RxDesc *rx_curr_desc;
+	int i;
+
+	DBGP ( "rtl8169_refill_rx_ring\n" );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+
+		rx_curr_desc = ( tp->rx_base ) + i;
+
+		/* Don't touch descriptors owned by the NIC */
+		if ( rx_curr_desc->opts1 & DescOwn )
+			continue;
+
+		/* Don't touch descriptors with iobufs, they still need to be
+		   processed by the poll routine */
+		if ( tp->rx_iobuf[tp->rx_curr] != NULL )
+			continue;
+
+		/** If we can't get an iobuf for this descriptor
+		    try again later (next poll).
+		 */
+		if ( ! ( tp->rx_iobuf[i] = alloc_iob ( RX_BUF_SIZE ) ) ) {
+			DBG ( "Refill rx ring failed!!\n" );
+			break;
+		}
+
+		rtl8169_populate_rx_descriptor ( tp, rx_curr_desc, i );
+	}
+}
+
+/**
+ * setup_rx_resources - allocate Rx resources (Descriptors)
+ *
+ * @v tp:	 Driver private structure
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ *
+ **/
+static int
+rtl8169_setup_rx_resources ( struct rtl8169_private *tp )
+{
+	DBGP ( "rtl8169_setup_rx_resources\n" );
+
+	tp->rx_base = malloc_dma ( R8169_RX_RING_BYTES, RX_RING_ALIGN );
+
+	DBG ( "tp->rx_base      = %#08lx\n", virt_to_bus ( tp->rx_base ) );
+
+	if ( ! tp->rx_base ) {
+		return -ENOMEM;
+	}
+	memset ( tp->rx_base, 0, R8169_RX_RING_BYTES );
+
+	rtl8169_refill_rx_ring ( tp );
+
+	tp->rx_curr = 0;
+
+	return 0;
+}
+
+static void
+rtl8169_process_rx_packets ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	uint32_t rx_status;
+	uint16_t rx_len;
+	struct RxDesc *rx_curr_desc;
+	int i;
+
+	DBGP ( "rtl8169_process_rx_packets\n" );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+
+		rx_curr_desc = tp->rx_base  + tp->rx_curr;
+
+		rx_status = rx_curr_desc->opts1;
+
+		DBG2 ( "Before DescOwn check rx_status: %#08x\n", rx_status );
+
+		/* Hardware still owns the descriptor */
+		if ( rx_status & DescOwn )
+			break;
+
+		/* We own the descriptor, but it has not been refilled yet */
+		if ( tp->rx_iobuf[tp->rx_curr] == NULL )
+			break;
+
+		rx_len = rx_status & 0x3fff;
+
+		DBG ( "Received packet.\n" );
+		DBG ( "tp->rx_curr         = %d\n", tp->rx_curr );
+		DBG ( "rx_len              = %d\n", rx_len );
+		DBG ( "rx_status           = %#08x\n", rx_status );
+		DBG ( "rx_curr_desc        = %#08lx\n", virt_to_bus ( rx_curr_desc ) );
+
+		if ( rx_status & RxRES ) {
+
+			netdev_rx_err ( netdev, tp->rx_iobuf[tp->rx_curr], -EINVAL );
+
+			DBG ( "rtl8169_poll: Corrupted packet received!\n"
+			       " rx_status: %#08x\n", rx_status );
+
+		} else 	{
+
+			/* Adjust size of the iobuf to reflect received data */
+			iob_put ( tp->rx_iobuf[tp->rx_curr], rx_len );
+
+			/* Add this packet to the receive queue.  */
+			netdev_rx ( netdev, tp->rx_iobuf[tp->rx_curr] );
+		}
+
+		/* Invalidate this iobuf and descriptor */
+		tp->rx_iobuf[tp->rx_curr] = NULL;
+		memset ( rx_curr_desc, 0, sizeof ( *rx_curr_desc ) );
+
+		/* Update pointer to next available rx descriptor */
+		tp->rx_curr = ( tp->rx_curr + 1 ) % NUM_RX_DESC;
+	}
+	rtl8169_refill_rx_ring ( tp );
+}
+
+static void
+rtl8169_free_rx_resources ( struct rtl8169_private *tp )
+{
+	int i;
+
+	DBGP ( "rtl8169_free_rx_resources\n" );
+
+	free_dma ( tp->rx_base, R8169_RX_RING_BYTES );
+
+	for ( i = 0; i < NUM_RX_DESC; i++ ) {
+		free_iob ( tp->rx_iobuf[i] );
+		tp->rx_iobuf[i] = NULL;
+	}
+}
+
+static void rtl8169_irq_enable ( struct rtl8169_private *tp )
+{
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "rtl8169_irq_enable\n" );
+
+	RTL_W16 ( IntrMask, tp->intr_event );
+}
+
+static void rtl8169_irq_disable ( struct rtl8169_private *tp )
+{
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "rtl8169_irq_disable\n" );
+
+	RTL_W16 ( IntrMask, 0x0000 );
+}
+
+/*** iPXE Core API Routines ***/
+
+/**
+ * open - Called when a network interface is made active
+ *
+ * @v netdev	network interface device structure
+ * @ret rc	Return status code, 0 on success, negative value on failure
+ *
+ **/
+static int
+rtl8169_open ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+	int rc;
+
+	DBGP ( "rtl8169_open\n" );
+
+	/* allocate transmit descriptors */
+	rc = rtl8169_setup_tx_resources ( tp );
+	if ( rc ) {
+		DBG ( "Error setting up TX resources!\n" );
+		goto err_setup_tx;
+	}
+
+	/* allocate receive descriptors */
+	rc = rtl8169_setup_rx_resources ( tp );
+	if ( rc ) {
+		DBG ( "Error setting up RX resources!\n" );
+		goto err_setup_rx;
+	}
+
+	rtl_hw_start ( netdev );
+
+	DBG ( "TxDescStartAddrHigh   = %#08lx\n", RTL_R32 ( TxDescStartAddrHigh ) );
+	DBG ( "TxDescStartAddrLow    = %#08lx\n", RTL_R32 ( TxDescStartAddrLow  ) );
+	DBG ( "RxDescAddrHigh        = %#08lx\n", RTL_R32 ( RxDescAddrHigh ) );
+	DBG ( "RxDescAddrLow         = %#08lx\n", RTL_R32 ( RxDescAddrLow  ) );
+
+	return 0;
+
+err_setup_rx:
+	rtl8169_free_tx_resources ( tp );
+err_setup_tx:
+	rtl8169_hw_reset ( ioaddr );
+
+	return rc;
+}
+
+/**
+ * transmit - Transmit a packet
+ *
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ *
+ * @ret rc       Returns 0 on success, negative on failure
+ */
+static int
+rtl8169_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+	uint32_t tx_len = iob_len ( iobuf );
+
+	struct TxDesc *tx_curr_desc;
+
+	DBGP ("rtl8169_transmit\n");
+
+	if ( tp->tx_fill_ctr == NUM_TX_DESC ) {
+		DBG ("TX overflow\n");
+		return -ENOBUFS;
+	}
+
+	/**
+	 *  The rtl8169 family automatically pads short packets to a
+	 *  minimum size, but if it did not, like some older cards,
+	 *  we could do:
+	 *  iob_pad ( iobuf, ETH_ZLEN );
+	 */
+
+	/* Save pointer to this iobuf we have been given to transmit so
+	   we can pass it to netdev_tx_complete() later */
+	tp->tx_iobuf[tp->tx_curr] = iobuf;
+
+	tx_curr_desc = tp->tx_base + tp->tx_curr;
+
+	DBG ( "tp->tx_fill_ctr = %d\n", tp->tx_fill_ctr );
+	DBG ( "tp->tx_curr     = %d\n", tp->tx_curr );
+	DBG ( "tx_curr_desc    = %#08lx\n", virt_to_bus ( tx_curr_desc ) );
+	DBG ( "iobuf->data     = %#08lx\n", virt_to_bus ( iobuf->data ) );
+	DBG ( "tx_len          = %d\n", tx_len );
+
+	/* Configure current descriptor to transmit supplied packet */
+	tx_curr_desc->addr_hi = 0;
+	tx_curr_desc->addr_lo = virt_to_bus ( iobuf->data );
+	tx_curr_desc->opts2 = 0;
+	tx_curr_desc->opts1 = FirstFrag | LastFrag |
+		( tp->tx_curr == ( NUM_TX_DESC - 1 ) ? RingEnd : 0 ) |
+		tx_len;
+
+	/* Mark descriptor as owned by NIC */
+	tx_curr_desc->opts1 |= DescOwn;
+
+	DBG ( "tx_curr_desc->opts1   = %#08x\n", tx_curr_desc->opts1 );
+	DBG ( "tx_curr_desc->opts2   = %#08x\n", tx_curr_desc->opts2 );
+	DBG ( "tx_curr_desc->addr_hi = %#08x\n", tx_curr_desc->addr_hi );
+	DBG ( "tx_curr_desc->addr_lo = %#08x\n", tx_curr_desc->addr_lo );
+
+	RTL_W8 ( TxPoll, NPQ );	/* set polling bit */
+
+	/* Point to next free descriptor */
+	tp->tx_curr = ( tp->tx_curr + 1 ) % NUM_TX_DESC;
+
+	/* Increment number of tx descriptors in use */
+	tp->tx_fill_ctr++;
+
+	return 0;
+}
+
+/**
+ * poll - Poll for received packets
+ *
+ * @v netdev	Network device
+ */
+static void
+rtl8169_poll ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+
+	uint16_t intr_status;
+	uint16_t intr_mask;
+
+	DBGP ( "rtl8169_poll\n" );
+
+	intr_status = RTL_R16 ( IntrStatus );
+	intr_mask   = RTL_R16 ( IntrMask );
+
+	DBG2 ( "rtl8169_poll (before): intr_mask = %#04x  intr_status = %#04x\n",
+	      intr_mask, intr_status );
+
+	RTL_W16 ( IntrStatus, 0xffff );
+
+	/* hotplug / major error / no more work / shared irq */
+	if ( intr_status == 0xffff )
+		return;
+
+	/* Process transmitted packets */
+	rtl8169_process_tx_packets ( netdev );
+
+	/* Process received packets  */
+	rtl8169_process_rx_packets ( netdev );
+}
+
+/**
+ * close - Disable network interface
+ *
+ * @v netdev	network interface device structure
+ *
+ **/
+static void
+rtl8169_close ( struct net_device *netdev )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "r8169_close\n" );
+
+	rtl8169_hw_reset ( ioaddr );
+
+	rtl8169_free_tx_resources ( tp );
+	rtl8169_free_rx_resources ( tp );
+}
+
+/**
+ * irq - enable or Disable interrupts
+ *
+ * @v netdev    network adapter
+ * @v action    requested interrupt action
+ *
+ **/
+static void
+rtl8169_irq ( struct net_device *netdev, int action )
+{
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+
+	DBGP ( "rtl8169_irq\n" );
+
+	switch ( action ) {
+	case 0 :
+		rtl8169_irq_disable ( tp );
+		break;
+	default :
+		rtl8169_irq_enable ( tp );
+		break;
+	}
+}
+
+static struct net_device_operations rtl8169_operations = {
+	.open           = rtl8169_open,
+	.transmit       = rtl8169_transmit,
+	.poll           = rtl8169_poll,
+	.close          = rtl8169_close,
+	.irq            = rtl8169_irq,
+};
+
+/**
+ * probe - Initial configuration of NIC
+ *
+ * @v pci	PCI device
+ * @v id	PCI IDs
+ *
+ * @ret rc	Return status code
+ **/
+static int
+rtl8169_probe ( struct pci_device *pdev )
+{
+	int i, rc;
+	struct net_device *netdev;
+	struct rtl8169_private *tp;
+	void *ioaddr;
+
+	const struct rtl_cfg_info *cfg = rtl_cfg_infos + pdev->id->driver_data;
+
+	DBGP ( "rtl8169_probe\n" );
+
+	DBG ( "id->vendor = %#04x, id->device = %#04x\n",
+	      pdev->id->vendor, pdev->id->device );
+
+	DBG ( "cfg->intr_event = %#04x\n", cfg->intr_event );
+
+	rc = -ENOMEM;
+
+	/* Allocate net device ( also allocates memory for netdev->priv
+	   and makes netdev-priv point to it )
+	 */
+	netdev = alloc_etherdev ( sizeof ( *tp ) );
+
+	if ( ! netdev )
+		goto err_alloc_etherdev;
+
+	/* Associate driver-specific network operations with
+	   generic network device layer
+	 */
+	netdev_init ( netdev, &rtl8169_operations );
+
+	/* Associate this network device with the given PCI device */
+	pci_set_drvdata ( pdev, netdev );
+	netdev->dev = &pdev->dev;
+
+	/* Initialize driver private storage */
+	tp = netdev_priv ( netdev );
+	memset ( tp, 0, ( sizeof ( *tp ) ) );
+
+	tp->pci_dev    = pdev;
+	tp->irqno      = pdev->irq;
+	tp->netdev     = netdev;
+	tp->intr_event = cfg->intr_event;
+	tp->cp_cmd     = PCIMulRW;
+
+	tp->hw_start = cfg->hw_start;
+
+	rc = -EIO;
+
+	adjust_pci_device ( pdev );
+
+	/* ioremap MMIO region */
+	ioaddr = ioremap ( pdev->membase, R8169_REGS_SIZE );
+
+	if ( ! ioaddr ) {
+		DBG ( "cannot remap MMIO\n" );
+		rc = -EIO;
+		goto err_ioremap;
+	}
+
+	tp->mmio_addr = ioaddr;
+
+	tp->pcie_cap = pci_find_capability ( pdev, PCI_CAP_ID_EXP );
+	if ( tp->pcie_cap ) {
+		DBG (  "PCI Express capability\n" );
+	} else {
+		DBG (  "No PCI Express capability\n" );
+	}
+
+	/* Mask interrupts just in case */
+	rtl8169_irq_mask_and_ack ( ioaddr );
+
+	/* Soft reset NIC */
+	rtl_soft_reset ( netdev );
+
+	/* Identify chip attached to board */
+	rtl8169_get_mac_version ( tp, ioaddr );
+
+	for ( i = 0; (u32) i < ARRAY_SIZE ( rtl_chip_info ); i++ ) {
+		if ( tp->mac_version == rtl_chip_info[i].mac_version )
+			break;
+	}
+	if ( i == ARRAY_SIZE(rtl_chip_info ) ) {
+		/* Unknown chip: assume array element #0, original RTL-8169 */
+		DBG ( "Unknown chip version, assuming %s\n", rtl_chip_info[0].name );
+		i = 0;
+	}
+	tp->chipset = i;
+
+	if ((tp->mac_version <= RTL_GIGA_MAC_VER_06) &&
+	    (RTL_R8(PHYstatus) & TBI_Enable)) {
+		tp->set_speed = rtl8169_set_speed_tbi;
+		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
+		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
+		tp->link_ok = rtl8169_tbi_link_ok;
+
+		tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
+	} else {
+		tp->set_speed = rtl8169_set_speed_xmii;
+		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
+		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
+		tp->link_ok = rtl8169_xmii_link_ok;
+	}
+
+	/* Get MAC address */
+	for ( i = 0; i < MAC_ADDR_LEN; i++ )
+		netdev->hw_addr[i] = RTL_R8 ( MAC0 + i );
+
+	DBG ( "%s\n", eth_ntoa ( netdev->hw_addr ) );
+
+	rtl8169_init_phy ( netdev, tp );
+
+	if ( ( rc = register_netdev ( netdev ) ) != 0 )
+		goto err_register;
+
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
+
+	DBG ( "rtl8169_probe succeeded!\n" );
+
+	/* No errors, return success */
+	return 0;
+
+/* Error return paths */
+err_register:
+err_ioremap:
+	netdev_put ( netdev );
+err_alloc_etherdev:
+	return rc;
+}
+
+/**
+ * remove - Device Removal Routine
+ *
+ * @v pdev PCI device information struct
+ *
+ **/
+static void
+rtl8169_remove ( struct pci_device *pdev )
+{
+	struct net_device *netdev = pci_get_drvdata ( pdev );
+	struct rtl8169_private *tp = netdev_priv ( netdev );
+	void *ioaddr = tp->mmio_addr;
+
+	DBGP ( "rtl8169_remove\n" );
+
+	rtl8169_hw_reset ( ioaddr );
+
+	unregister_netdev ( netdev );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+}
+
+static struct pci_device_id rtl8169_nics[] = {
+	PCI_ROM(0x10ec, 0x8129, "rtl8169-0x8129", "rtl8169-0x8129", RTL_CFG_0),
+	PCI_ROM(0x10ec, 0x8136, "rtl8169-0x8136", "rtl8169-0x8136", RTL_CFG_2),
+	PCI_ROM(0x10ec, 0x8167, "rtl8169-0x8167", "rtl8169-0x8167", RTL_CFG_0),
+	PCI_ROM(0x10ec, 0x8168, "rtl8169-0x8168", "rtl8169-0x8168", RTL_CFG_1),
+	PCI_ROM(0x10ec, 0x8169, "rtl8169-0x8169", "rtl8169-0x8169", RTL_CFG_0),
+	PCI_ROM(0x1186, 0x4300, "rtl8169-0x4300", "rtl8169-0x4300", RTL_CFG_0),
+	PCI_ROM(0x1259, 0xc107, "rtl8169-0xc107", "rtl8169-0xc107", RTL_CFG_0),
+	PCI_ROM(0x16ec, 0x0116, "rtl8169-0x0116", "rtl8169-0x0116", RTL_CFG_0),
+	PCI_ROM(0x1737, 0x1032, "rtl8169-0x1032", "rtl8169-0x1032", RTL_CFG_0),
+	PCI_ROM(0x0001, 0x8168, "rtl8169-0x8168", "rtl8169-0x8168", RTL_CFG_2),
+};
+
+struct pci_driver rtl8169_driver __pci_driver = {
+  .ids = rtl8169_nics,
+  .id_count = ( sizeof ( rtl8169_nics ) / sizeof ( rtl8169_nics[0] ) ),
+  .probe = rtl8169_probe,
+  .remove = rtl8169_remove,
+};
+
+/*
+ * Local variables:
+ *  c-basic-offset: 8
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/r8169.h ipxe-1.0.1~lliurex1505/src/drivers/net/r8169.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/r8169.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/r8169.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,486 @@
+/*
+ * Copyright (c) 2008 Marty Connor <mdc@etherboot.org>
+ * Copyright (c) 2008 Entity Cyber, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ * This driver is based on rtl8169 data sheets and work by:
+ *
+ * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
+ * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
+ * Copyright (c) a lot of people too. Please respect their work.
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef _R8169_H_
+#define _R8169_H_
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+/** FIXME: include/linux/pci_regs.h has these PCI regs, maybe
+	   we need such a file in iPXE?
+**/
+#define  PCI_EXP_DEVCTL	        8	/* Device Control */
+#define  PCI_EXP_DEVCTL_READRQ	0x7000	/* Max_Read_Request_Size */
+#define  PCI_EXP_LNKCTL		16	/* Link Control */
+#define  PCI_EXP_LNKCTL_CLKREQ_EN 0x100	/* Enable clkreq */
+#define  PCI_EXP_DEVCTL_NOSNOOP_EN 0x0800  /* Enable No Snoop */
+
+/** FIXME: update mii.h in src/include/mii.h from Linux sources
+	   so we don't have to include these definitiions.
+**/
+/* The forced speed, 10Mb, 100Mb, gigabit, 2.5Gb, 10GbE. */
+#define SPEED_10		10
+#define SPEED_100		100
+#define SPEED_1000		1000
+#define SPEED_2500		2500
+#define SPEED_10000		10000
+
+/* Duplex, half or full. */
+#define DUPLEX_HALF		0x00
+#define DUPLEX_FULL		0x01
+
+#define AUTONEG_DISABLE		0x00
+#define AUTONEG_ENABLE		0x01
+
+/* MAC address length */
+#define MAC_ADDR_LEN	6
+
+#define MAX_READ_REQUEST_SHIFT	12
+#define RX_FIFO_THRESH	7	/* 7 means NO threshold, Rx buffer level before first PCI xfer. */
+#define RX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
+#define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
+#define EarlyTxThld	0x3F	/* 0x3F means NO early transmit */
+#define RxPacketMaxSize	0x3FE8	/* 16K - 1 - ETH_HLEN - VLAN - CRC... */
+#define SafeMtu		0x1c20	/* ... actually life sucks beyond ~7k */
+#define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */
+
+#define R8169_REGS_SIZE		256
+#define R8169_NAPI_WEIGHT	64
+#define NUM_TX_DESC	8	/* Number of Tx descriptor registers */
+#define NUM_RX_DESC	8	/* Number of Rx descriptor registers */
+#define RX_BUF_SIZE	1536	/* Rx Buffer size */
+#define R8169_TX_RING_BYTES	(NUM_TX_DESC * sizeof(struct TxDesc))
+#define R8169_RX_RING_BYTES	(NUM_RX_DESC * sizeof(struct RxDesc))
+
+#define TX_RING_ALIGN		256
+#define RX_RING_ALIGN		256
+
+#define RTL8169_TX_TIMEOUT	(6*HZ)
+#define RTL8169_PHY_TIMEOUT	(10*HZ)
+
+#define RTL_EEPROM_SIG		cpu_to_le32(0x8129)
+#define RTL_EEPROM_SIG_MASK	cpu_to_le32(0xffff)
+#define RTL_EEPROM_SIG_ADDR	0x0000
+
+/* write/read MMIO register */
+#define RTL_W8(reg, val8)	writeb ((val8), ioaddr + (reg))
+#define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))
+#define RTL_W32(reg, val32)	writel ((val32), ioaddr + (reg))
+#define RTL_R8(reg)		readb (ioaddr + (reg))
+#define RTL_R16(reg)		readw (ioaddr + (reg))
+#define RTL_R32(reg)		((unsigned long) readl (ioaddr + (reg)))
+
+enum mac_version {
+	RTL_GIGA_MAC_VER_01 = 0x01, // 8169
+	RTL_GIGA_MAC_VER_02 = 0x02, // 8169S
+	RTL_GIGA_MAC_VER_03 = 0x03, // 8110S
+	RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB
+	RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
+	RTL_GIGA_MAC_VER_06 = 0x06, // 8110SCe
+	RTL_GIGA_MAC_VER_07 = 0x07, // 8102e
+	RTL_GIGA_MAC_VER_08 = 0x08, // 8102e
+	RTL_GIGA_MAC_VER_09 = 0x09, // 8102e
+	RTL_GIGA_MAC_VER_10 = 0x0a, // 8101e
+	RTL_GIGA_MAC_VER_11 = 0x0b, // 8168Bb
+	RTL_GIGA_MAC_VER_12 = 0x0c, // 8168Be
+	RTL_GIGA_MAC_VER_13 = 0x0d, // 8101Eb
+	RTL_GIGA_MAC_VER_14 = 0x0e, // 8101 ?
+	RTL_GIGA_MAC_VER_15 = 0x0f, // 8101 ?
+	RTL_GIGA_MAC_VER_16 = 0x11, // 8101Ec
+	RTL_GIGA_MAC_VER_17 = 0x10, // 8168Bf
+	RTL_GIGA_MAC_VER_18 = 0x12, // 8168CP
+	RTL_GIGA_MAC_VER_19 = 0x13, // 8168C
+	RTL_GIGA_MAC_VER_20 = 0x14, // 8168C
+	RTL_GIGA_MAC_VER_21 = 0x15, // 8168C
+	RTL_GIGA_MAC_VER_22 = 0x16, // 8168C
+	RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP
+	RTL_GIGA_MAC_VER_24 = 0x18, // 8168CP
+	RTL_GIGA_MAC_VER_25 = 0x19, // 8168D
+};
+
+#define _R(NAME,MAC,MASK) \
+	{ .name = NAME, .mac_version = MAC, .RxConfigMask = MASK }
+
+static const struct {
+	const char *name;
+	u8 mac_version;
+	u32 RxConfigMask;	/* Clears the bits supported by this chip */
+} rtl_chip_info[] = {
+	_R("RTL8169",		RTL_GIGA_MAC_VER_01, 0xff7e1880), // 8169
+	_R("RTL8169s",		RTL_GIGA_MAC_VER_02, 0xff7e1880), // 8169S
+	_R("RTL8110s",		RTL_GIGA_MAC_VER_03, 0xff7e1880), // 8110S
+	_R("RTL8169sb/8110sb",	RTL_GIGA_MAC_VER_04, 0xff7e1880), // 8169SB
+	_R("RTL8169sc/8110sc",	RTL_GIGA_MAC_VER_05, 0xff7e1880), // 8110SCd
+	_R("RTL8169sc/8110sc",	RTL_GIGA_MAC_VER_06, 0xff7e1880), // 8110SCe
+	_R("RTL8102e",		RTL_GIGA_MAC_VER_07, 0xff7e1880), // PCI-E
+	_R("RTL8102e",		RTL_GIGA_MAC_VER_08, 0xff7e1880), // PCI-E
+	_R("RTL8102e",		RTL_GIGA_MAC_VER_09, 0xff7e1880), // PCI-E
+	_R("RTL8101e",		RTL_GIGA_MAC_VER_10, 0xff7e1880), // PCI-E
+	_R("RTL8168b/8111b",	RTL_GIGA_MAC_VER_11, 0xff7e1880), // PCI-E
+	_R("RTL8168b/8111b",	RTL_GIGA_MAC_VER_12, 0xff7e1880), // PCI-E
+	_R("RTL8101e",		RTL_GIGA_MAC_VER_13, 0xff7e1880), // PCI-E 8139
+	_R("RTL8100e",		RTL_GIGA_MAC_VER_14, 0xff7e1880), // PCI-E 8139
+	_R("RTL8100e",		RTL_GIGA_MAC_VER_15, 0xff7e1880), // PCI-E 8139
+	_R("RTL8168b/8111b",	RTL_GIGA_MAC_VER_17, 0xff7e1880), // PCI-E
+	_R("RTL8101e",		RTL_GIGA_MAC_VER_16, 0xff7e1880), // PCI-E
+	_R("RTL8168cp/8111cp",	RTL_GIGA_MAC_VER_18, 0xff7e1880), // PCI-E
+	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_19, 0xff7e1880), // PCI-E
+	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_20, 0xff7e1880), // PCI-E
+	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_21, 0xff7e1880), // PCI-E
+	_R("RTL8168c/8111c",	RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E
+	_R("RTL8168cp/8111cp",	RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E
+	_R("RTL8168cp/8111cp",	RTL_GIGA_MAC_VER_24, 0xff7e1880), // PCI-E
+	_R("RTL8168d/8111d",	RTL_GIGA_MAC_VER_25, 0xff7e1880)  // PCI-E
+};
+#undef _R
+
+enum cfg_version {
+	RTL_CFG_0 = 0x00,
+	RTL_CFG_1,
+	RTL_CFG_2
+};
+
+#if 0
+/** Device Table from Linux Driver **/
+static struct pci_device_id rtl8169_pci_tbl[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8129), 0, 0, RTL_CFG_0 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8136), 0, 0, RTL_CFG_2 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8167), 0, 0, RTL_CFG_0 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8168), 0, 0, RTL_CFG_1 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_REALTEK,	0x8169), 0, 0, RTL_CFG_0 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_DLINK,	0x4300), 0, 0, RTL_CFG_0 },
+	{ PCI_DEVICE(PCI_VENDOR_ID_AT,		0xc107), 0, 0, RTL_CFG_0 },
+	{ PCI_DEVICE(0x16ec,			0x0116), 0, 0, RTL_CFG_0 },
+	{ PCI_VENDOR_ID_LINKSYS,		0x1032,
+		PCI_ANY_ID, 0x0024, 0, 0, RTL_CFG_0 },
+	{ 0x0001,				0x8168,
+		PCI_ANY_ID, 0x2410, 0, 0, RTL_CFG_2 },
+	{0,},
+};
+#endif
+
+enum rtl_registers {
+	MAC0		= 0,	/* Ethernet hardware address. */
+	MAC4		= 4,
+	MAR0		= 8,	/* Multicast filter. */
+	CounterAddrLow		= 0x10,
+	CounterAddrHigh		= 0x14,
+	TxDescStartAddrLow	= 0x20,
+	TxDescStartAddrHigh	= 0x24,
+	TxHDescStartAddrLow	= 0x28,
+	TxHDescStartAddrHigh	= 0x2c,
+	FLASH		= 0x30,
+	ERSR		= 0x36,
+	ChipCmd		= 0x37,
+	TxPoll		= 0x38,
+	IntrMask	= 0x3c,
+	IntrStatus	= 0x3e,
+	TxConfig	= 0x40,
+	RxConfig	= 0x44,
+	RxMissed	= 0x4c,
+	Cfg9346		= 0x50,
+	Config0		= 0x51,
+	Config1		= 0x52,
+	Config2		= 0x53,
+	Config3		= 0x54,
+	Config4		= 0x55,
+	Config5		= 0x56,
+	MultiIntr	= 0x5c,
+	PHYAR		= 0x60,
+	PHYstatus	= 0x6c,
+	RxMaxSize	= 0xda,
+	CPlusCmd	= 0xe0,
+	IntrMitigate	= 0xe2,
+	RxDescAddrLow	= 0xe4,
+	RxDescAddrHigh	= 0xe8,
+	EarlyTxThres	= 0xec,
+	FuncEvent	= 0xf0,
+	FuncEventMask	= 0xf4,
+	FuncPresetState	= 0xf8,
+	FuncForceEvent	= 0xfc,
+};
+
+enum rtl8110_registers {
+	TBICSR			= 0x64,
+	TBI_ANAR		= 0x68,
+	TBI_LPAR		= 0x6a,
+};
+
+enum rtl8168_8101_registers {
+	CSIDR			= 0x64,
+	CSIAR			= 0x68,
+#define	CSIAR_FLAG			0x80000000
+#define	CSIAR_WRITE_CMD			0x80000000
+#define	CSIAR_BYTE_ENABLE		0x0f
+#define	CSIAR_BYTE_ENABLE_SHIFT		12
+#define	CSIAR_ADDR_MASK			0x0fff
+
+	EPHYAR			= 0x80,
+#define	EPHYAR_FLAG			0x80000000
+#define	EPHYAR_WRITE_CMD		0x80000000
+#define	EPHYAR_REG_MASK			0x1f
+#define	EPHYAR_REG_SHIFT		16
+#define	EPHYAR_DATA_MASK		0xffff
+	DBG_REG			= 0xd1,
+#define	FIX_NAK_1			(1 << 4)
+#define	FIX_NAK_2			(1 << 3)
+};
+
+enum rtl_register_content {
+	/* InterruptStatusBits */
+	SYSErr		= 0x8000,
+	PCSTimeout	= 0x4000,
+	SWInt		= 0x0100,
+	TxDescUnavail	= 0x0080,
+	RxFIFOOver	= 0x0040,
+	LinkChg		= 0x0020,
+	RxOverflow	= 0x0010,
+	TxErr		= 0x0008,
+	TxOK		= 0x0004,
+	RxErr		= 0x0002,
+	RxOK		= 0x0001,
+
+	/* RxStatusDesc */
+	RxFOVF	= (1 << 23),
+	RxRWT	= (1 << 22),
+	RxRES	= (1 << 21),
+	RxRUNT	= (1 << 20),
+	RxCRC	= (1 << 19),
+
+	/* ChipCmdBits */
+	CmdReset	= 0x10,
+	CmdRxEnb	= 0x08,
+	CmdTxEnb	= 0x04,
+	RxBufEmpty	= 0x01,
+
+	/* TXPoll register p.5 */
+	HPQ		= 0x80,		/* Poll cmd on the high prio queue */
+	NPQ		= 0x40,		/* Poll cmd on the low prio queue */
+	FSWInt		= 0x01,		/* Forced software interrupt */
+
+	/* Cfg9346Bits */
+	Cfg9346_Lock	= 0x00,
+	Cfg9346_Unlock	= 0xc0,
+
+	/* rx_mode_bits */
+	AcceptErr	= 0x20,
+	AcceptRunt	= 0x10,
+	AcceptBroadcast	= 0x08,
+	AcceptMulticast	= 0x04,
+	AcceptMyPhys	= 0x02,
+	AcceptAllPhys	= 0x01,
+
+	/* RxConfigBits */
+	RxCfgFIFOShift	= 13,
+	RxCfgDMAShift	=  8,
+
+	/* TxConfigBits */
+	TxInterFrameGapShift = 24,
+	TxDMAShift = 8,	/* DMA burst value (0-7) is shift this many bits */
+
+	/* Config1 register p.24 */
+	LEDS1		= (1 << 7),
+	LEDS0		= (1 << 6),
+	MSIEnable	= (1 << 5),	/* Enable Message Signaled Interrupt */
+	Speed_down	= (1 << 4),
+	MEMMAP		= (1 << 3),
+	IOMAP		= (1 << 2),
+	VPD		= (1 << 1),
+	PMEnable	= (1 << 0),	/* Power Management Enable */
+
+	/* Config2 register p. 25 */
+	PCI_Clock_66MHz = 0x01,
+	PCI_Clock_33MHz = 0x00,
+
+	/* Config3 register p.25 */
+	MagicPacket	= (1 << 5),	/* Wake up when receives a Magic Packet */
+	LinkUp		= (1 << 4),	/* Wake up when the cable connection is re-established */
+	Beacon_en	= (1 << 0),	/* 8168 only. Reserved in the 8168b */
+
+	/* Config5 register p.27 */
+	BWF		= (1 << 6),	/* Accept Broadcast wakeup frame */
+	MWF		= (1 << 5),	/* Accept Multicast wakeup frame */
+	UWF		= (1 << 4),	/* Accept Unicast wakeup frame */
+	LanWake		= (1 << 1),	/* LanWake enable/disable */
+	PMEStatus	= (1 << 0),	/* PME status can be reset by PCI RST# */
+
+	/* TBICSR p.28 */
+	TBIReset	= 0x80000000,
+	TBILoopback	= 0x40000000,
+	TBINwEnable	= 0x20000000,
+	TBINwRestart	= 0x10000000,
+	TBILinkOk	= 0x02000000,
+	TBINwComplete	= 0x01000000,
+
+	/* CPlusCmd p.31 */
+	EnableBist	= (1 << 15),	// 8168 8101
+	Mac_dbgo_oe	= (1 << 14),	// 8168 8101
+	Normal_mode	= (1 << 13),	// unused
+	Force_half_dup	= (1 << 12),	// 8168 8101
+	Force_rxflow_en	= (1 << 11),	// 8168 8101
+	Force_txflow_en	= (1 << 10),	// 8168 8101
+	Cxpl_dbg_sel	= (1 << 9),	// 8168 8101
+	ASF		= (1 << 8),	// 8168 8101
+	PktCntrDisable	= (1 << 7),	// 8168 8101
+	Mac_dbgo_sel	= 0x001c,	// 8168
+	RxVlan		= (1 << 6),
+	RxChkSum	= (1 << 5),
+	PCIDAC		= (1 << 4),
+	PCIMulRW	= (1 << 3),
+	INTT_0		= 0x0000,	// 8168
+	INTT_1		= 0x0001,	// 8168
+	INTT_2		= 0x0002,	// 8168
+	INTT_3		= 0x0003,	// 8168
+
+	/* rtl8169_PHYstatus */
+	TBI_Enable	= 0x80,
+	TxFlowCtrl	= 0x40,
+	RxFlowCtrl	= 0x20,
+	_1000bpsF	= 0x10,
+	_100bps		= 0x08,
+	_10bps		= 0x04,
+	LinkStatus	= 0x02,
+	FullDup		= 0x01,
+
+	/* _TBICSRBit */
+	TBILinkOK	= 0x02000000,
+
+	/* DumpCounterCommand */
+	CounterDump	= 0x8,
+};
+
+enum desc_status_bit {
+	DescOwn		= (1 << 31), /* Descriptor is owned by NIC */
+	RingEnd		= (1 << 30), /* End of descriptor ring */
+	FirstFrag	= (1 << 29), /* First segment of a packet */
+	LastFrag	= (1 << 28), /* Final segment of a packet */
+
+	/* Tx private */
+	LargeSend	= (1 << 27), /* TCP Large Send Offload (TSO) */
+	MSSShift	= 16,        /* MSS value position */
+	MSSMask		= 0xfff,     /* MSS value + LargeSend bit: 12 bits */
+	IPCS		= (1 << 18), /* Calculate IP checksum */
+	UDPCS		= (1 << 17), /* Calculate UDP/IP checksum */
+	TCPCS		= (1 << 16), /* Calculate TCP/IP checksum */
+	TxVlanTag	= (1 << 17), /* Add VLAN tag */
+
+	/* Rx private */
+	PID1		= (1 << 18), /* Protocol ID bit 1/2 */
+	PID0		= (1 << 17), /* Protocol ID bit 2/2 */
+
+#define RxProtoUDP	(PID1)
+#define RxProtoTCP	(PID0)
+#define RxProtoIP	(PID1 | PID0)
+#define RxProtoMask	RxProtoIP
+
+	IPFail		= (1 << 16), /* IP checksum failed */
+	UDPFail		= (1 << 15), /* UDP/IP checksum failed */
+	TCPFail		= (1 << 14), /* TCP/IP checksum failed */
+	RxVlanTag	= (1 << 16), /* VLAN tag available */
+};
+
+#define RsvdMask	0x3fffc000
+
+struct TxDesc {
+	volatile uint32_t opts1;
+	volatile uint32_t opts2;
+	volatile uint32_t addr_lo;
+	volatile uint32_t addr_hi;
+};
+
+struct RxDesc {
+	volatile uint32_t opts1;
+	volatile uint32_t opts2;
+	volatile uint32_t addr_lo;
+	volatile uint32_t addr_hi;
+};
+
+enum features {
+	RTL_FEATURE_WOL		= (1 << 0),
+	RTL_FEATURE_MSI		= (1 << 1),
+	RTL_FEATURE_GMII	= (1 << 2),
+};
+
+static void rtl_hw_start_8169(struct net_device *);
+static void rtl_hw_start_8168(struct net_device *);
+static void rtl_hw_start_8101(struct net_device *);
+
+struct rtl8169_private {
+
+	struct pci_device *pci_dev;
+	struct net_device *netdev;
+	uint8_t *hw_addr;
+	void *mmio_addr;
+	uint32_t irqno;
+
+	int chipset;
+	int mac_version;
+	u16 intr_event;
+
+	struct io_buffer *tx_iobuf[NUM_TX_DESC];
+	struct io_buffer *rx_iobuf[NUM_RX_DESC];
+
+	struct TxDesc *tx_base;
+	struct RxDesc *rx_base;
+
+	uint32_t tx_curr;
+	uint32_t rx_curr;
+
+	uint32_t tx_tail;
+
+	uint32_t tx_fill_ctr;
+
+	u16 cp_cmd;
+
+	int phy_auto_nego_reg;
+	int phy_1000_ctrl_reg;
+
+	int ( *set_speed ) (struct net_device *, u8 autoneg, u16 speed, u8 duplex );
+	void ( *phy_reset_enable ) ( void *ioaddr );
+	void ( *hw_start ) ( struct net_device * );
+	unsigned int ( *phy_reset_pending ) ( void *ioaddr );
+	unsigned int ( *link_ok ) ( void *ioaddr );
+
+	int pcie_cap;
+
+	unsigned features;
+
+};
+
+static const unsigned int rtl8169_rx_config =
+	(RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
+
+#endif /* _R8169_H_ */
+
+/*
+ * Local variables:
+ *  c-basic-offset: 8
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/realtek.c ipxe-1.0.1~lliurex1505/src/drivers/net/realtek.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/realtek.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/realtek.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1200 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * (EEPROM code originally implemented for rtl8139.c)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/nvs.h>
-#include <ipxe/threewire.h>
-#include <ipxe/bitbash.h>
-#include <ipxe/mii.h>
-#include "realtek.h"
-
-/** @file
- *
- * Realtek 10/100/1000 network card driver
- *
- * Based on the following datasheets:
- *
- *    http://www.datasheetarchive.com/dl/Datasheets-8/DSA-153536.pdf
- *    http://www.datasheetarchive.com/indexdl/Datasheet-028/DSA00494723.pdf
- */
-
-/******************************************************************************
- *
- * EEPROM interface
- *
- ******************************************************************************
- */
-
-/** Pin mapping for SPI bit-bashing interface */
-static const uint8_t realtek_eeprom_bits[] = {
-	[SPI_BIT_SCLK]	= RTL_9346CR_EESK,
-	[SPI_BIT_MOSI]	= RTL_9346CR_EEDI,
-	[SPI_BIT_MISO]	= RTL_9346CR_EEDO,
-	[SPI_BIT_SS(0)]	= RTL_9346CR_EECS,
-};
-
-/**
- * Open bit-bashing interface
- *
- * @v basher		Bit-bashing interface
- */
-static void realtek_spi_open_bit ( struct bit_basher *basher ) {
-	struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
-						 spibit.basher );
-
-	/* Enable EEPROM access */
-	writeb ( RTL_9346CR_EEM_EEPROM, rtl->regs + RTL_9346CR );
-	readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
-}
-
-/**
- * Close bit-bashing interface
- *
- * @v basher		Bit-bashing interface
- */
-static void realtek_spi_close_bit ( struct bit_basher *basher ) {
-	struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
-						 spibit.basher );
-
-	/* Disable EEPROM access */
-	writeb ( RTL_9346CR_EEM_NORMAL, rtl->regs + RTL_9346CR );
-	readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
-}
-
-/**
- * Read input bit
- *
- * @v basher		Bit-bashing interface
- * @v bit_id		Bit number
- * @ret zero		Input is a logic 0
- * @ret non-zero	Input is a logic 1
- */
-static int realtek_spi_read_bit ( struct bit_basher *basher,
-				  unsigned int bit_id ) {
-	struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
-						 spibit.basher );
-	uint8_t mask = realtek_eeprom_bits[bit_id];
-	uint8_t reg;
-
-	DBG_DISABLE ( DBGLVL_IO );
-	reg = readb ( rtl->regs + RTL_9346CR );
-	DBG_ENABLE ( DBGLVL_IO );
-	return ( reg & mask );
-}
-
-/**
- * Set/clear output bit
- *
- * @v basher		Bit-bashing interface
- * @v bit_id		Bit number
- * @v data		Value to write
- */
-static void realtek_spi_write_bit ( struct bit_basher *basher,
-				    unsigned int bit_id, unsigned long data ) {
-	struct realtek_nic *rtl = container_of ( basher, struct realtek_nic,
-						 spibit.basher );
-	uint8_t mask = realtek_eeprom_bits[bit_id];
-	uint8_t reg;
-
-	DBG_DISABLE ( DBGLVL_IO );
-	reg = readb ( rtl->regs + RTL_9346CR );
-	reg &= ~mask;
-	reg |= ( data & mask );
-	writeb ( reg, rtl->regs + RTL_9346CR );
-	readb ( rtl->regs + RTL_9346CR ); /* Ensure write reaches chip */
-	DBG_ENABLE ( DBGLVL_IO );
-}
-
-/** SPI bit-bashing interface */
-static struct bit_basher_operations realtek_basher_ops = {
-	.open = realtek_spi_open_bit,
-	.close = realtek_spi_close_bit,
-	.read = realtek_spi_read_bit,
-	.write = realtek_spi_write_bit,
-};
-
-/**
- * Initialise EEPROM
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int realtek_init_eeprom ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	uint16_t id;
-	int rc;
-
-	/* Initialise SPI bit-bashing interface */
-	rtl->spibit.basher.op = &realtek_basher_ops;
-	rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
-	init_spi_bit_basher ( &rtl->spibit );
-
-	/* Detect EEPROM type and initialise three-wire device */
-	if ( readl ( rtl->regs + RTL_RCR ) & RTL_RCR_9356SEL ) {
-		DBGC ( rtl, "REALTEK %p EEPROM is a 93C56\n", rtl );
-		init_at93c56 ( &rtl->eeprom, 16 );
-	} else {
-		DBGC ( rtl, "REALTEK %p EEPROM is a 93C46\n", rtl );
-		init_at93c46 ( &rtl->eeprom, 16 );
-	}
-	rtl->eeprom.bus = &rtl->spibit.bus;
-
-	/* Check for EEPROM presence.  Some onboard NICs will have no
-	 * EEPROM connected, with the BIOS being responsible for
-	 * programming the initial register values.
-	 */
-	if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_ID,
-			       &id, sizeof ( id ) ) ) != 0 ) {
-		DBGC ( rtl, "REALTEK %p could not read EEPROM ID: %s\n",
-		       rtl, strerror ( rc ) );
-		return rc;
-	}
-	if ( id != cpu_to_le16 ( RTL_EEPROM_ID_MAGIC ) ) {
-		DBGC ( rtl, "REALTEK %p EEPROM ID incorrect (%#04x); assuming "
-		       "no EEPROM\n", rtl, le16_to_cpu ( id ) );
-		return -ENODEV;
-	}
-
-	/* Initialise space for non-volatile options, if available
-	 *
-	 * We use offset 0x40 (i.e. address 0x20), length 0x40.  This
-	 * block is marked as VPD in the Realtek datasheets, so we use
-	 * it only if we detect that the card is not supporting VPD.
-	 */
-	if ( readb ( rtl->regs + RTL_CONFIG1 ) & RTL_CONFIG1_VPD ) {
-		DBGC ( rtl, "REALTEK %p EEPROM in use for VPD; cannot use "
-		       "for options\n", rtl );
-	} else {
-		nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, RTL_EEPROM_VPD,
-			   RTL_EEPROM_VPD_LEN, NULL, &netdev->refcnt );
-	}
-
-	return 0;
-}
-
-/******************************************************************************
- *
- * MII interface
- *
- ******************************************************************************
- */
-
-/**
- * Read from MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @ret value		Data read, or negative error
- */
-static int realtek_mii_read ( struct mii_interface *mii, unsigned int reg ) {
-	struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
-	unsigned int i;
-	uint32_t value;
-
-	/* Fail if PHYAR register is not present */
-	if ( ! rtl->have_phy_regs )
-		return -ENOTSUP;
-
-	/* Initiate read */
-	writel ( RTL_PHYAR_VALUE ( 0, reg, 0 ), rtl->regs + RTL_PHYAR );
-
-	/* Wait for read to complete */
-	for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
-
-		/* If read is not complete, delay 1us and retry */
-		value = readl ( rtl->regs + RTL_PHYAR );
-		if ( ! ( value & RTL_PHYAR_FLAG ) ) {
-			udelay ( 1 );
-			continue;
-		}
-
-		/* Return register value */
-		return ( RTL_PHYAR_DATA ( value ) );
-	}
-
-	DBGC ( rtl, "REALTEK %p timed out waiting for MII read\n", rtl );
-	return -ETIMEDOUT;
-}
-
-/**
- * Write to MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @v data		Data to write
- * @ret rc		Return status code
- */
-static int realtek_mii_write ( struct mii_interface *mii, unsigned int reg,
-			       unsigned int data) {
-	struct realtek_nic *rtl = container_of ( mii, struct realtek_nic, mii );
-	unsigned int i;
-
-	/* Fail if PHYAR register is not present */
-	if ( ! rtl->have_phy_regs )
-		return -ENOTSUP;
-
-	/* Initiate write */
-	writel ( RTL_PHYAR_VALUE ( RTL_PHYAR_FLAG, reg, data ),
-		 rtl->regs + RTL_PHYAR );
-
-	/* Wait for write to complete */
-	for ( i = 0 ; i < RTL_MII_MAX_WAIT_US ; i++ ) {
-
-		/* If write is not complete, delay 1us and retry */
-		if ( readl ( rtl->regs + RTL_PHYAR ) & RTL_PHYAR_FLAG ) {
-			udelay ( 1 );
-			continue;
-		}
-
-		return 0;
-	}
-
-	DBGC ( rtl, "REALTEK %p timed out waiting for MII write\n", rtl );
-	return -ETIMEDOUT;
-}
-
-/** Realtek MII operations */
-static struct mii_operations realtek_mii_operations = {
-	.read = realtek_mii_read,
-	.write = realtek_mii_write,
-};
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset hardware
- *
- * @v rtl		Realtek device
- * @ret rc		Return status code
- */
-static int realtek_reset ( struct realtek_nic *rtl ) {
-	unsigned int i;
-
-	/* Issue reset */
-	writeb ( RTL_CR_RST, rtl->regs + RTL_CR );
-
-	/* Wait for reset to complete */
-	for ( i = 0 ; i < RTL_RESET_MAX_WAIT_MS ; i++ ) {
-
-		/* If reset is not complete, delay 1ms and retry */
-		if ( readb ( rtl->regs + RTL_CR ) & RTL_CR_RST ) {
-			mdelay ( 1 );
-			continue;
-		}
-
-		return 0;
-	}
-
-	DBGC ( rtl, "REALTEK %p timed out waiting for reset\n", rtl );
-	return -ETIMEDOUT;
-}
-
-/**
- * Configure PHY for Gigabit operation
- *
- * @v rtl		Realtek device
- * @ret rc		Return status code
- */
-static int realtek_phy_speed ( struct realtek_nic *rtl ) {
-	int ctrl1000;
-	int rc;
-
-	/* Read CTRL1000 register */
-	ctrl1000 = mii_read ( &rtl->mii, MII_CTRL1000 );
-	if ( ctrl1000 < 0 ) {
-		rc = ctrl1000;
-		DBGC ( rtl, "REALTEK %p could not read CTRL1000: %s\n",
-		       rtl, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Advertise 1000Mbps speeds */
-	ctrl1000 |= ( ADVERTISE_1000FULL | ADVERTISE_1000HALF );
-	if ( ( rc = mii_write ( &rtl->mii, MII_CTRL1000, ctrl1000 ) ) != 0 ) {
-		DBGC ( rtl, "REALTEK %p could not write CTRL1000: %s\n",
-		       rtl, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Reset PHY
- *
- * @v rtl		Realtek device
- * @ret rc		Return status code
- */
-static int realtek_phy_reset ( struct realtek_nic *rtl ) {
-	int rc;
-
-	/* Do nothing if we have no separate PHY register access */
-	if ( ! rtl->have_phy_regs )
-		return 0;
-
-	/* Perform MII reset */
-	if ( ( rc = mii_reset ( &rtl->mii ) ) != 0 ) {
-		DBGC ( rtl, "REALTEK %p could not reset MII: %s\n",
-		       rtl, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Some cards (e.g. RTL8169SC) do not advertise Gigabit by
-	 * default.  Try to enable advertisement of Gigabit speeds.
-	 */
-	if ( ( rc = realtek_phy_speed ( rtl ) ) != 0 ) {
-		/* Ignore failures, since the register may not be
-		 * present on non-Gigabit PHYs (e.g. RTL8101).
-		 */
-	}
-
-	/* Restart autonegotiation */
-	if ( ( rc = mii_restart ( &rtl->mii ) ) != 0 ) {
-		DBGC ( rtl, "REALTEK %p could not restart MII: %s\n",
-		       rtl, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void realtek_check_link ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	uint8_t phystatus;
-	uint8_t msr;
-	int link_up;
-
-	/* Determine link state */
-	if ( rtl->have_phy_regs ) {
-		phystatus = readb ( rtl->regs + RTL_PHYSTATUS );
-		link_up = ( phystatus & RTL_PHYSTATUS_LINKSTS );
-		DBGC ( rtl, "REALTEK %p PHY status is %02x\n", rtl, phystatus );
-	} else {
-		msr = readb ( rtl->regs + RTL_MSR );
-		link_up = ( ! ( msr & RTL_MSR_LINKB ) );
-		DBGC ( rtl, "REALTEK %p media status is %02x\n", rtl, msr );
-	}
-
-	/* Report link state */
-	if ( link_up ) {
-		netdev_link_up ( netdev );
-	} else {
-		netdev_link_down ( netdev );
-	}
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Create receive buffer (legacy mode)
- *
- * @v rtl		Realtek device
- * @ret rc		Return status code
- */
-static int realtek_create_buffer ( struct realtek_nic *rtl ) {
-	size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
-	physaddr_t address;
-	int rc;
-
-	/* Do nothing unless in legacy mode */
-	if ( ! rtl->legacy )
-		return 0;
-
-	/* Allocate buffer */
-	rtl->rx_buffer = malloc_dma ( len, RTL_RXBUF_ALIGN );
-	if ( ! rtl->rx_buffer ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	address = virt_to_bus ( rtl->rx_buffer );
-
-	/* Check that card can support address */
-	if ( address & ~0xffffffffULL ) {
-		DBGC ( rtl, "REALTEK %p cannot support 64-bit RX buffer "
-		       "address\n", rtl );
-		rc = -ENOTSUP;
-		goto err_64bit;
-	}
-
-	/* Program buffer address */
-	writel ( address, rtl->regs + RTL_RBSTART );
-	DBGC ( rtl, "REALTEK %p receive buffer is at [%08llx,%08llx,%08llx)\n",
-	       rtl, ( ( unsigned long long ) address ),
-	       ( ( unsigned long long ) address + RTL_RXBUF_LEN ),
-	       ( ( unsigned long long ) address + len ) );
-
-	return 0;
-
- err_64bit:
-	free_dma ( rtl->rx_buffer, len );
-	rtl->rx_buffer = NULL;
- err_alloc:
-	return rc;
-}
-
-/**
- * Destroy receive buffer (legacy mode)
- *
- * @v rtl		Realtek device
- */
-static void realtek_destroy_buffer ( struct realtek_nic *rtl ) {
-	size_t len = ( RTL_RXBUF_LEN + RTL_RXBUF_PAD );
-
-	/* Do nothing unless in legacy mode */
-	if ( ! rtl->legacy )
-		return;
-
-	/* Clear buffer address */
-	writel ( 0, rtl->regs + RTL_RBSTART );
-
-	/* Free buffer */
-	free_dma ( rtl->rx_buffer, len );
-	rtl->rx_buffer = NULL;
-	rtl->rx_offset = 0;
-}
-
-/**
- * Create descriptor ring
- *
- * @v rtl		Realtek device
- * @v ring		Descriptor ring
- * @ret rc		Return status code
- */
-static int realtek_create_ring ( struct realtek_nic *rtl,
-				 struct realtek_ring *ring ) {
-	physaddr_t address;
-
-	/* Do nothing in legacy mode */
-	if ( rtl->legacy )
-		return 0;
-
-	/* Allocate descriptor ring */
-	ring->desc = malloc_dma ( ring->len, RTL_RING_ALIGN );
-	if ( ! ring->desc )
-		return -ENOMEM;
-
-	/* Initialise descriptor ring */
-	memset ( ring->desc, 0, ring->len );
-
-	/* Program ring address */
-	address = virt_to_bus ( ring->desc );
-	writel ( ( ( ( uint64_t ) address ) >> 32 ),
-		 rtl->regs + ring->reg + 4 );
-	writel ( ( address & 0xffffffffUL ), rtl->regs + ring->reg );
-	DBGC ( rtl, "REALTEK %p ring %02x is at [%08llx,%08llx)\n",
-	       rtl, ring->reg, ( ( unsigned long long ) address ),
-	       ( ( unsigned long long ) address + ring->len ) );
-
-	return 0;
-}
-
-/**
- * Destroy descriptor ring
- *
- * @v rtl		Realtek device
- * @v ring		Descriptor ring
- */
-static void realtek_destroy_ring ( struct realtek_nic *rtl,
-				   struct realtek_ring *ring ) {
-
-	/* Reset producer and consumer counters */
-	ring->prod = 0;
-	ring->cons = 0;
-
-	/* Do nothing more if in legacy mode */
-	if ( rtl->legacy )
-		return;
-
-	/* Clear ring address */
-	writel ( 0, rtl->regs + ring->reg );
-	writel ( 0, rtl->regs + ring->reg + 4 );
-
-	/* Free descriptor ring */
-	free_dma ( ring->desc, ring->len );
-	ring->desc = NULL;
-}
-
-/**
- * Refill receive descriptor ring
- *
- * @v rtl		Realtek device
- */
-static void realtek_refill_rx ( struct realtek_nic *rtl ) {
-	struct realtek_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	physaddr_t address;
-	int is_last;
-
-	/* Do nothing in legacy mode */
-	if ( rtl->legacy )
-		return;
-
-	while ( ( rtl->rx.prod - rtl->rx.cons ) < RTL_NUM_RX_DESC ) {
-
-		/* Allocate I/O buffer */
-		iobuf = alloc_iob ( RTL_RX_MAX_LEN );
-		if ( ! iobuf ) {
-			/* Wait for next refill */
-			return;
-		}
-
-		/* Get next receive descriptor */
-		rx_idx = ( rtl->rx.prod++ % RTL_NUM_RX_DESC );
-		is_last = ( rx_idx == ( RTL_NUM_RX_DESC - 1 ) );
-		rx = &rtl->rx.desc[rx_idx];
-
-		/* Populate receive descriptor */
-		address = virt_to_bus ( iobuf->data );
-		rx->address = cpu_to_le64 ( address );
-		rx->length = cpu_to_le16 ( RTL_RX_MAX_LEN );
-		wmb();
-		rx->flags = ( cpu_to_le16 ( RTL_DESC_OWN ) |
-			      ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
-		wmb();
-
-		/* Record I/O buffer */
-		assert ( rtl->rx_iobuf[rx_idx] == NULL );
-		rtl->rx_iobuf[rx_idx] = iobuf;
-
-		DBGC2 ( rtl, "REALTEK %p RX %d is [%llx,%llx)\n", rtl, rx_idx,
-			( ( unsigned long long ) address ),
-			( ( unsigned long long ) address + RTL_RX_MAX_LEN ) );
-	}
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int realtek_open ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	uint32_t tcr;
-	uint32_t rcr;
-	int rc;
-
-	/* Create transmit descriptor ring */
-	if ( ( rc = realtek_create_ring ( rtl, &rtl->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Create receive descriptor ring */
-	if ( ( rc = realtek_create_ring ( rtl, &rtl->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Create receive buffer */
-	if ( ( rc = realtek_create_buffer ( rtl ) ) != 0 )
-		goto err_create_buffer;
-
-	/* Accept all packets */
-	writel ( 0xffffffffUL, rtl->regs + RTL_MAR0 );
-	writel ( 0xffffffffUL, rtl->regs + RTL_MAR4 );
-
-	/* Enable transmitter and receiver.  RTL8139 requires that
-	 * this happens before writing to RCR.
-	 */
-	writeb ( ( RTL_CR_TE | RTL_CR_RE ), rtl->regs + RTL_CR );
-
-	/* Configure transmitter */
-	tcr = readl ( rtl->regs + RTL_TCR );
-	tcr &= ~RTL_TCR_MXDMA_MASK;
-	tcr |= RTL_TCR_MXDMA_DEFAULT;
-	writel ( tcr, rtl->regs + RTL_TCR );
-
-	/* Configure receiver */
-	rcr = readl ( rtl->regs + RTL_RCR );
-	rcr &= ~( RTL_RCR_RXFTH_MASK | RTL_RCR_RBLEN_MASK |
-		  RTL_RCR_MXDMA_MASK );
-	rcr |= ( RTL_RCR_RXFTH_DEFAULT | RTL_RCR_RBLEN_DEFAULT |
-		 RTL_RCR_MXDMA_DEFAULT | RTL_RCR_WRAP | RTL_RCR_AB |
-		 RTL_RCR_AM | RTL_RCR_APM | RTL_RCR_AAP );
-	writel ( rcr, rtl->regs + RTL_RCR );
-
-	/* Fill receive ring */
-	realtek_refill_rx ( rtl );
-
-	/* Update link state */
-	realtek_check_link ( netdev );
-
-	return 0;
-
-	realtek_destroy_buffer ( rtl );
- err_create_buffer:
-	realtek_destroy_ring ( rtl, &rtl->rx );
- err_create_rx:
-	realtek_destroy_ring ( rtl, &rtl->tx );
- err_create_tx:
-	return rc;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void realtek_close ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	unsigned int i;
-
-	/* Disable receiver and transmitter */
-	writeb ( 0, rtl->regs + RTL_CR );
-
-	/* Destroy receive buffer */
-	realtek_destroy_buffer ( rtl );
-
-	/* Destroy receive descriptor ring */
-	realtek_destroy_ring ( rtl, &rtl->rx );
-
-	/* Discard any unused receive buffers */
-	for ( i = 0 ; i < RTL_NUM_RX_DESC ; i++ ) {
-		if ( rtl->rx_iobuf[i] )
-			free_iob ( rtl->rx_iobuf[i] );
-		rtl->rx_iobuf[i] = NULL;
-	}
-
-	/* Destroy transmit descriptor ring */
-	realtek_destroy_ring ( rtl, &rtl->tx );
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int realtek_transmit ( struct net_device *netdev,
-			      struct io_buffer *iobuf ) {
-	struct realtek_nic *rtl = netdev->priv;
-	struct realtek_descriptor *tx;
-	unsigned int tx_idx;
-	physaddr_t address;
-	int is_last;
-
-	/* Get next transmit descriptor */
-	if ( ( rtl->tx.prod - rtl->tx.cons ) >= RTL_NUM_TX_DESC ) {
-		netdev_tx_defer ( netdev, iobuf );
-		return 0;
-	}
-	tx_idx = ( rtl->tx.prod++ % RTL_NUM_TX_DESC );
-
-	/* Transmit packet */
-	if ( rtl->legacy ) {
-
-		/* Pad and align packet */
-		iob_pad ( iobuf, ETH_ZLEN );
-		address = virt_to_bus ( iobuf->data );
-
-		/* Check that card can support address */
-		if ( address & ~0xffffffffULL ) {
-			DBGC ( rtl, "REALTEK %p cannot support 64-bit TX "
-			       "buffer address\n", rtl );
-			return -ENOTSUP;
-		}
-
-		/* Add to transmit ring */
-		writel ( address, rtl->regs + RTL_TSAD ( tx_idx ) );
-		writel ( ( RTL_TSD_ERTXTH_DEFAULT | iob_len ( iobuf ) ),
-			 rtl->regs + RTL_TSD ( tx_idx ) );
-
-	} else {
-
-		/* Populate transmit descriptor */
-		address = virt_to_bus ( iobuf->data );
-		is_last = ( tx_idx == ( RTL_NUM_TX_DESC - 1 ) );
-		tx = &rtl->tx.desc[tx_idx];
-		tx->address = cpu_to_le64 ( address );
-		tx->length = cpu_to_le16 ( iob_len ( iobuf ) );
-		wmb();
-		tx->flags = ( cpu_to_le16 ( RTL_DESC_OWN | RTL_DESC_FS |
-					    RTL_DESC_LS ) |
-			      ( is_last ? cpu_to_le16 ( RTL_DESC_EOR ) : 0 ) );
-		wmb();
-
-		/* Notify card that there are packets ready to transmit */
-		writeb ( RTL_TPPOLL_NPQ, rtl->regs + rtl->tppoll );
-	}
-
-	DBGC2 ( rtl, "REALTEK %p TX %d is [%llx,%llx)\n", rtl, tx_idx,
-		( ( unsigned long long ) virt_to_bus ( iobuf->data ) ),
-		( ( ( unsigned long long ) virt_to_bus ( iobuf->data ) ) +
-		  iob_len ( iobuf ) ) );
-
-	return 0;
-}
-
-/**
- * Poll for completed packets
- *
- * @v netdev		Network device
- */
-static void realtek_poll_tx ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	struct realtek_descriptor *tx;
-	unsigned int tx_idx;
-
-	/* Check for completed packets */
-	while ( rtl->tx.cons != rtl->tx.prod ) {
-
-		/* Get next transmit descriptor */
-		tx_idx = ( rtl->tx.cons % RTL_NUM_TX_DESC );
-
-		/* Stop if descriptor is still in use */
-		if ( rtl->legacy ) {
-
-			/* Check ownership bit in transmit status register */
-			if ( ! ( readl ( rtl->regs + RTL_TSD ( tx_idx ) ) &
-				 RTL_TSD_OWN ) )
-				return;
-
-		} else {
-
-			/* Check ownership bit in descriptor */
-			tx = &rtl->tx.desc[tx_idx];
-			if ( tx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
-				return;
-		}
-
-		DBGC2 ( rtl, "REALTEK %p TX %d complete\n", rtl, tx_idx );
-
-		/* Complete TX descriptor */
-		rtl->tx.cons++;
-		netdev_tx_complete_next ( netdev );
-	}
-}
-
-/**
- * Poll for received packets (legacy mode)
- *
- * @v netdev		Network device
- */
-static void realtek_legacy_poll_rx ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	struct realtek_legacy_header *rx;
-	struct io_buffer *iobuf;
-	size_t len;
-
-	/* Check for received packets */
-	while ( ! ( readb ( rtl->regs + RTL_CR ) & RTL_CR_BUFE ) ) {
-
-		/* Extract packet from receive buffer */
-		rx = ( rtl->rx_buffer + rtl->rx_offset );
-		len = le16_to_cpu ( rx->length );
-		if ( rx->status & cpu_to_le16 ( RTL_STAT_ROK ) ) {
-
-			DBGC2 ( rtl, "REALTEK %p RX offset %x+%zx\n",
-				rtl, rtl->rx_offset, len );
-
-			/* Allocate I/O buffer */
-			iobuf = alloc_iob ( len );
-			if ( ! iobuf ) {
-				netdev_rx_err ( netdev, NULL, -ENOMEM );
-				/* Leave packet for next poll */
-				break;
-			}
-
-			/* Copy data to I/O buffer */
-			memcpy ( iob_put ( iobuf, len ), rx->data, len );
-			iob_unput ( iobuf, 4 /* strip CRC */ );
-
-			/* Hand off to network stack */
-			netdev_rx ( netdev, iobuf );
-
-		} else {
-
-			DBGC ( rtl, "REALTEK %p RX offset %x+%zx error %04x\n",
-			       rtl, rtl->rx_offset, len,
-			       le16_to_cpu ( rx->status ) );
-			netdev_rx_err ( netdev, NULL, -EIO );
-		}
-
-		/* Update buffer offset */
-		rtl->rx_offset = ( rtl->rx_offset + sizeof ( *rx ) + len );
-		rtl->rx_offset = ( ( rtl->rx_offset + 3 ) & ~3 );
-		rtl->rx_offset = ( rtl->rx_offset % RTL_RXBUF_LEN );
-		writew ( ( rtl->rx_offset - 16 ), rtl->regs + RTL_CAPR );
-
-		/* Give chip time to react before rechecking RTL_CR */
-		readw ( rtl->regs + RTL_CAPR );
-	}
-}
-
-/**
- * Poll for received packets
- *
- * @v netdev		Network device
- */
-static void realtek_poll_rx ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	struct realtek_descriptor *rx;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	size_t len;
-
-	/* Poll receive buffer if in legacy mode */
-	if ( rtl->legacy ) {
-		realtek_legacy_poll_rx ( netdev );
-		return;
-	}
-
-	/* Check for received packets */
-	while ( rtl->rx.cons != rtl->rx.prod ) {
-
-		/* Get next receive descriptor */
-		rx_idx = ( rtl->rx.cons % RTL_NUM_RX_DESC );
-		rx = &rtl->rx.desc[rx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( rx->flags & cpu_to_le16 ( RTL_DESC_OWN ) )
-			return;
-
-		/* Populate I/O buffer */
-		iobuf = rtl->rx_iobuf[rx_idx];
-		rtl->rx_iobuf[rx_idx] = NULL;
-		len = ( le16_to_cpu ( rx->length ) & RTL_DESC_SIZE_MASK );
-		iob_put ( iobuf, ( len - 4 /* strip CRC */ ) );
-
-		/* Hand off to network stack */
-		if ( rx->flags & cpu_to_le16 ( RTL_DESC_RES ) ) {
-			DBGC ( rtl, "REALTEK %p RX %d error (length %zd, "
-			       "flags %04x)\n", rtl, rx_idx, len,
-			       le16_to_cpu ( rx->flags ) );
-			netdev_rx_err ( netdev, iobuf, -EIO );
-		} else {
-			DBGC2 ( rtl, "REALTEK %p RX %d complete (length "
-				"%zd)\n", rtl, rx_idx, len );
-			netdev_rx ( netdev, iobuf );
-		}
-		rtl->rx.cons++;
-	}
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void realtek_poll ( struct net_device *netdev ) {
-	struct realtek_nic *rtl = netdev->priv;
-	uint16_t isr;
-
-	/* Check for and acknowledge interrupts */
-	isr = readw ( rtl->regs + RTL_ISR );
-	if ( ! isr )
-		return;
-	writew ( isr, rtl->regs + RTL_ISR );
-
-	/* Poll for TX completions, if applicable */
-	if ( isr & ( RTL_IRQ_TER | RTL_IRQ_TOK ) )
-		realtek_poll_tx ( netdev );
-
-	/* Poll for RX completionsm, if applicable */
-	if ( isr & ( RTL_IRQ_RER | RTL_IRQ_ROK ) )
-		realtek_poll_rx ( netdev );
-
-	/* Check link state, if applicable */
-	if ( isr & RTL_IRQ_PUN_LINKCHG )
-		realtek_check_link ( netdev );
-
-	/* Refill RX ring */
-	realtek_refill_rx ( rtl );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void realtek_irq ( struct net_device *netdev, int enable ) {
-	struct realtek_nic *rtl = netdev->priv;
-	uint16_t imr;
-
-	/* Set interrupt mask */
-	imr = ( enable ? ( RTL_IRQ_PUN_LINKCHG | RTL_IRQ_TER | RTL_IRQ_TOK |
-			   RTL_IRQ_RER | RTL_IRQ_ROK ) : 0 );
-	writew ( imr, rtl->regs + RTL_IMR );
-}
-
-/** Realtek network device operations */
-static struct net_device_operations realtek_operations = {
-	.open		= realtek_open,
-	.close		= realtek_close,
-	.transmit	= realtek_transmit,
-	.poll		= realtek_poll,
-	.irq		= realtek_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Detect device type
- *
- * @v rtl		Realtek device
- */
-static void realtek_detect ( struct realtek_nic *rtl ) {
-	uint16_t rms;
-	uint16_t check_rms;
-	uint16_t cpcr;
-	uint16_t check_cpcr;
-
-	/* The RX Packet Maximum Size register is present only on
-	 * 8169.  Try to set to our intended MTU.
-	 */
-	rms = RTL_RX_MAX_LEN;
-	writew ( rms, rtl->regs + RTL_RMS );
-	check_rms = readw ( rtl->regs + RTL_RMS );
-
-	/* The C+ Command register is present only on 8169 and 8139C+.
-	 * Try to enable C+ mode and PCI Dual Address Cycle (for
-	 * 64-bit systems), if supported.
-	 *
-	 * Note that enabling DAC seems to cause bizarre behaviour
-	 * (lockups, garbage data on the wire) on some systems, even
-	 * if only 32-bit addresses are used.
-	 */
-	cpcr = readw ( rtl->regs + RTL_CPCR );
-	cpcr |= ( RTL_CPCR_MULRW | RTL_CPCR_CPRX | RTL_CPCR_CPTX );
-	if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) )
-		cpcr |= RTL_CPCR_DAC;
-	writew ( cpcr, rtl->regs + RTL_CPCR );
-	check_cpcr = readw ( rtl->regs + RTL_CPCR );
-
-	/* Detect device type */
-	if ( check_rms == rms ) {
-		DBGC ( rtl, "REALTEK %p appears to be an RTL8169\n", rtl );
-		rtl->have_phy_regs = 1;
-		rtl->tppoll = RTL_TPPOLL_8169;
-	} else {
-		if ( ( check_cpcr == cpcr ) && ( cpcr != 0xffff ) ) {
-			DBGC ( rtl, "REALTEK %p appears to be an RTL8139C+\n",
-			       rtl );
-			rtl->tppoll = RTL_TPPOLL_8139CP;
-		} else {
-			DBGC ( rtl, "REALTEK %p appears to be an RTL8139\n",
-			       rtl );
-			rtl->legacy = 1;
-		}
-	}
-}
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int realtek_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct realtek_nic *rtl;
-	unsigned int i;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *rtl ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &realtek_operations );
-	rtl = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( rtl, 0, sizeof ( *rtl ) );
-	realtek_init_ring ( &rtl->tx, RTL_NUM_TX_DESC, RTL_TNPDS );
-	realtek_init_ring ( &rtl->rx, RTL_NUM_RX_DESC, RTL_RDSAR );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	rtl->regs = ioremap ( pci->membase, RTL_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = realtek_reset ( rtl ) ) != 0 )
-		goto err_reset;
-
-	/* Detect device type */
-	realtek_detect ( rtl );
-
-	/* Initialise EEPROM */
-	if ( ( rc = realtek_init_eeprom ( netdev ) ) == 0 ) {
-
-		/* Read MAC address from EEPROM */
-		if ( ( rc = nvs_read ( &rtl->eeprom.nvs, RTL_EEPROM_MAC,
-				       netdev->hw_addr, ETH_ALEN ) ) != 0 ) {
-			DBGC ( rtl, "REALTEK %p could not read MAC address: "
-			       "%s\n", rtl, strerror ( rc ) );
-			goto err_nvs_read;
-		}
-
-	} else {
-
-		/* EEPROM not present.  Fall back to reading the
-		 * current ID register value, which will hopefully
-		 * have been programmed by the platform firmware.
-		 */
-		for ( i = 0 ; i < ETH_ALEN ; i++ )
-			netdev->hw_addr[i] = readb ( rtl->regs + RTL_IDR0 + i );
-	}
-
-	/* Initialise and reset MII interface */
-	mii_init ( &rtl->mii, &realtek_mii_operations );
-	if ( ( rc = realtek_phy_reset ( rtl ) ) != 0 )
-		goto err_phy_reset;
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Set initial link state */
-	realtek_check_link ( netdev );
-
-	/* Register non-volatile options, if applicable */
-	if ( rtl->nvo.nvs ) {
-		if ( ( rc = register_nvo ( &rtl->nvo,
-					   netdev_settings ( netdev ) ) ) != 0)
-			goto err_register_nvo;
-	}
-
-	return 0;
-
- err_register_nvo:
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_phy_reset:
- err_nvs_read:
-	realtek_reset ( rtl );
- err_reset:
-	iounmap ( rtl->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void realtek_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct realtek_nic *rtl = netdev->priv;
-
-	/* Unregister non-volatile options, if applicable */
-	if ( rtl->nvo.nvs )
-		unregister_nvo ( &rtl->nvo );
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	realtek_reset ( rtl );
-
-	/* Free network device */
-	iounmap ( rtl->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Realtek PCI device IDs */
-static struct pci_device_id realtek_nics[] = {
-	PCI_ROM ( 0x0001, 0x8168, "clone8169",	"Cloned 8169", 0 ),
-	PCI_ROM ( 0x018a, 0x0106, "fpc0106tx",	"LevelOne FPC-0106TX", 0 ),
-	PCI_ROM ( 0x021b, 0x8139, "hne300",	"Compaq HNE-300", 0 ),
-	PCI_ROM ( 0x02ac, 0x1012, "s1012",	"SpeedStream 1012", 0 ),
-	PCI_ROM ( 0x0357, 0x000a, "ttpmon",	"TTTech TTP-Monitoring", 0 ),
-	PCI_ROM ( 0x10ec, 0x8129, "rtl8129",	"RTL-8129", 0 ),
-	PCI_ROM ( 0x10ec, 0x8136, "rtl8136",	"RTL8101E/RTL8102E", 0 ),
-	PCI_ROM ( 0x10ec, 0x8138, "rtl8138",	"RT8139 (B/C)", 0 ),
-	PCI_ROM ( 0x10ec, 0x8139, "rtl8139",	"RTL-8139/8139C/8139C+", 0 ),
-	PCI_ROM ( 0x10ec, 0x8167, "rtl8167",	"RTL-8110SC/8169SC", 0 ),
-	PCI_ROM ( 0x10ec, 0x8168, "rtl8168",	"RTL8111/8168B", 0 ),
-	PCI_ROM ( 0x10ec, 0x8169, "rtl8169",	"RTL-8169", 0 ),
-	PCI_ROM ( 0x1113, 0x1211, "smc1211",	"SMC2-1211TX", 0 ),
-	PCI_ROM ( 0x1186, 0x1300, "dfe538",	"DFE530TX+/DFE538TX", 0 ),
-	PCI_ROM ( 0x1186, 0x1340, "dfe690",	"DFE-690TXD", 0 ),
-	PCI_ROM ( 0x1186, 0x4300, "dge528t",	"DGE-528T", 0 ),
-	PCI_ROM ( 0x11db, 0x1234, "sega8139",	"Sega Enterprises 8139", 0 ),
-	PCI_ROM ( 0x1259, 0xa117, "allied8139",	"Allied Telesyn 8139", 0 ),
-	PCI_ROM ( 0x1259, 0xa11e, "allied81xx",	"Allied Telesyn 81xx", 0 ),
-	PCI_ROM ( 0x1259, 0xc107, "allied8169",	"Allied Telesyn 8169", 0 ),
-	PCI_ROM ( 0x126c, 0x1211, "northen8139","Northern Telecom 8139", 0 ),
-	PCI_ROM ( 0x13d1, 0xab06, "fe2000vx",	"Abocom FE2000VX", 0 ),
-	PCI_ROM ( 0x1432, 0x9130, "edi8139",	"Edimax 8139", 0 ),
-	PCI_ROM ( 0x14ea, 0xab06, "fnw3603tx",	"Planex FNW-3603-TX", 0 ),
-	PCI_ROM ( 0x14ea, 0xab07, "fnw3800tx",	"Planex FNW-3800-TX", 0 ),
-	PCI_ROM ( 0x1500, 0x1360, "delta8139",	"Delta Electronics 8139", 0 ),
-	PCI_ROM ( 0x16ec, 0x0116, "usr997902",	"USR997902", 0 ),
-	PCI_ROM ( 0x1737, 0x1032, "linksys8169","Linksys 8169", 0 ),
-	PCI_ROM ( 0x1743, 0x8139, "rolf100",	"Peppercorn ROL/F-100", 0 ),
-	PCI_ROM ( 0x4033, 0x1360, "addron8139",	"Addtron 8139", 0 ),
-	PCI_ROM ( 0xffff, 0x8139, "clonse8139",	"Cloned 8139", 0 ),
-};
-
-/** Realtek PCI driver */
-struct pci_driver realtek_driver __pci_driver = {
-	.ids = realtek_nics,
-	.id_count = ( sizeof ( realtek_nics ) / sizeof ( realtek_nics[0] ) ),
-	.probe = realtek_probe,
-	.remove = realtek_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/realtek.h ipxe-1.0.1~lliurex1505/src/drivers/net/realtek.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/realtek.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/realtek.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,293 +0,0 @@
-#ifndef _REALTEK_H
-#define _REALTEK_H
-
-/** @file
- *
- * Realtek 10/100/1000 network card driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/spi.h>
-#include <ipxe/spi_bit.h>
-#include <ipxe/nvo.h>
-#include <ipxe/if_ether.h>
-
-/** PCI memory BAR size */
-#define RTL_BAR_SIZE 0x100
-
-/** A packet descriptor */
-struct realtek_descriptor {
-	/** Buffer size */
-	uint16_t length;
-	/** Flags */
-	uint16_t flags;
-	/** Reserved */
-	uint32_t reserved;
-	/** Buffer address */
-	uint64_t address;
-} __attribute__ (( packed ));
-
-/** Descriptor buffer size mask */
-#define RTL_DESC_SIZE_MASK 0x3fff
-
-/** Packet descriptor flags */
-enum realtek_descriptor_flags {
-	/** Descriptor is owned by NIC */
-	RTL_DESC_OWN = 0x8000,
-	/** End of descriptor ring */
-	RTL_DESC_EOR = 0x4000,
-	/** First segment descriptor */
-	RTL_DESC_FS = 0x2000,
-	/** Last segment descriptor */
-	RTL_DESC_LS = 0x1000,
-	/** Receive error summary */
-	RTL_DESC_RES = 0x0020,
-};
-
-/** Descriptor ring alignment */
-#define RTL_RING_ALIGN 256
-
-/** A legacy mode receive packet header */
-struct realtek_legacy_header {
-	/** Status */
-	uint16_t status;
-	/** Length */
-	uint16_t length;
-	/** Packet data */
-	uint8_t data[0];
-} __attribute__ (( packed ));
-
-/** Legacy mode status bits */
-enum realtek_legacy_status {
-	/** Received OK */
-	RTL_STAT_ROK = 0x0001,
-};
-
-/** ID Register 0 (6 bytes) */
-#define RTL_IDR0 0x00
-
-/** Multicast Register 0 (dword) */
-#define RTL_MAR0 0x08
-
-/** Multicast Register 4 (dword) */
-#define RTL_MAR4 0x0c
-
-/** Transmit Status of Descriptor N (dword, 8139 only) */
-#define RTL_TSD(n) ( 0x10 + 4 * (n) )
-#define RTL_TSD_ERTXTH(x)	( (x) << 16 ) /**< Early TX threshold */
-#define RTL_TSD_ERTXTH_DEFAULT RTL_TSD_ERTXTH ( 256 / 32 )
-#define RTL_TSD_OWN		0x00002000UL /**< Ownership */
-
-/** Transmit Start Address of Descriptor N (dword, 8139 only) */
-#define RTL_TSAD(n) ( 0x20 + 4 * (n) )
-
-/** Transmit Normal Priority Descriptors (qword) */
-#define RTL_TNPDS 0x20
-
-/** Number of transmit descriptors
- *
- * This is a hardware limit when using legacy mode.
- */
-#define RTL_NUM_TX_DESC 4
-
-/** Receive Buffer Start Address (dword, 8139 only) */
-#define RTL_RBSTART 0x30
-
-/** Receive buffer length */
-#define RTL_RXBUF_LEN 8192
-
-/** Receive buffer padding */
-#define RTL_RXBUF_PAD 2038 /* Allow space for WRAP */
-
-/** Receive buffer alignment */
-#define RTL_RXBUF_ALIGN 16
-
-/** Command Register (byte) */
-#define RTL_CR 0x37
-#define RTL_CR_RST		0x10	/**< Reset */
-#define RTL_CR_RE		0x08	/**< Receiver Enable */
-#define RTL_CR_TE		0x04	/**< Transmit Enable */
-#define RTL_CR_BUFE		0x01	/**< Receive buffer empty */
-
-/** Maximum time to wait for a reset, in milliseconds */
-#define RTL_RESET_MAX_WAIT_MS 100
-
-/** Current Address of Packet Read (word, 8139 only) */
-#define RTL_CAPR 0x38
-
-/** Transmit Priority Polling Register (byte, 8169 only) */
-#define RTL_TPPOLL_8169 0x38
-#define RTL_TPPOLL_NPQ		0x40	/**< Normal Priority Queue Polling */
-
-/** Interrupt Mask Register (word) */
-#define RTL_IMR 0x3c
-#define RTL_IRQ_PUN_LINKCHG	0x0020	/**< Packet underrun / link change */
-#define RTL_IRQ_TER		0x0008	/**< Transmit error */
-#define RTL_IRQ_TOK		0x0004	/**< Transmit OK */
-#define RTL_IRQ_RER		0x0002	/**< Receive error */
-#define RTL_IRQ_ROK		0x0001	/**< Receive OK */
-
-/** Interrupt Status Register (word) */
-#define RTL_ISR 0x3e
-
-/** Transmit (Tx) Configuration Register (dword) */
-#define RTL_TCR 0x40
-#define RTL_TCR_MXDMA(x)	( (x) << 8 ) /**< Max DMA burst size */
-#define RTL_TCR_MXDMA_MASK	RTL_TCR_MXDMA ( 0x7 )
-#define RTL_TCR_MXDMA_DEFAULT	RTL_TCR_MXDMA ( 0x7 /* Unlimited */ )
-
-/** Receive (Rx) Configuration Register (dword) */
-#define RTL_RCR 0x44
-#define RTL_RCR_RXFTH(x)	( (x) << 13 ) /**< Receive FIFO threshold */
-#define RTL_RCR_RXFTH_MASK	RTL_RCR_RXFTH ( 0x7 )
-#define RTL_RCR_RXFTH_DEFAULT	RTL_RCR_RXFTH ( 0x7 /* Whole packet */ )
-#define RTL_RCR_RBLEN(x)	( (x) << 11 ) /**< Receive buffer length */
-#define RTL_RCR_RBLEN_MASK	RTL_RCR_RBLEN ( 0x3 )
-#define RTL_RCR_RBLEN_DEFAULT	RTL_RCR_RBLEN ( 0 /* 8kB */ )
-#define RTL_RCR_MXDMA(x)	( (x) << 8 ) /**< Max DMA burst size */
-#define RTL_RCR_MXDMA_MASK	RTL_RCR_MXDMA ( 0x7 )
-#define RTL_RCR_MXDMA_DEFAULT	RTL_RCR_MXDMA ( 0x7 /* Unlimited */ )
-#define RTL_RCR_WRAP		0x00000080UL /**< Overrun receive buffer */
-#define RTL_RCR_9356SEL		0x00000040UL /**< EEPROM is a 93C56 */
-#define RTL_RCR_AB		0x00000008UL /**< Accept broadcast packets */
-#define RTL_RCR_AM		0x00000004UL /**< Accept multicast packets */
-#define RTL_RCR_APM		0x00000002UL /**< Accept physical match */
-#define RTL_RCR_AAP		0x00000001UL /**< Accept all packets */
-
-/** 93C46 (93C56) Command Register (byte) */
-#define RTL_9346CR 0x50
-#define RTL_9346CR_EEM(x)	( (x) << 6 ) /**< Mode select */
-#define RTL_9346CR_EEM_EEPROM	RTL_9346CR_EEM ( 0x2 ) /**< EEPROM mode */
-#define RTL_9346CR_EEM_NORMAL	RTL_9346CR_EEM ( 0x0 ) /**< Normal mode */
-#define RTL_9346CR_EECS		0x08	/**< Chip select */
-#define RTL_9346CR_EESK		0x04	/**< Clock */
-#define RTL_9346CR_EEDI		0x02	/**< Data in */
-#define RTL_9346CR_EEDO		0x01	/**< Data out */
-
-/** Word offset of ID code word within EEPROM */
-#define RTL_EEPROM_ID ( 0x00 / 2 )
-
-/** EEPROM code word magic value */
-#define RTL_EEPROM_ID_MAGIC 0x8129
-
-/** Word offset of MAC address within EEPROM */
-#define RTL_EEPROM_MAC ( 0x0e / 2 )
-
-/** Word offset of VPD / non-volatile options within EEPROM */
-#define RTL_EEPROM_VPD ( 0x40 / 2 )
-
-/** Length of VPD / non-volatile options within EEPROM */
-#define RTL_EEPROM_VPD_LEN 0x40
-
-/** Configuration Register 1 (byte) */
-#define RTL_CONFIG1 0x52
-#define RTL_CONFIG1_VPD		0x02	/**< Vital Product Data enabled */
-
-/** Media Status Register (byte, 8139 only) */
-#define RTL_MSR 0x58
-#define RTL_MSR_LINKB		0x04	/**< Inverse of link status */
-
-/** PHY Access Register (dword, 8169 only) */
-#define RTL_PHYAR 0x60
-#define RTL_PHYAR_FLAG		0x80000000UL /**< Read/write flag */
-
-/** Construct PHY Access Register value */
-#define RTL_PHYAR_VALUE( flag, reg, data ) ( (flag) | ( (reg) << 16 ) | (data) )
-
-/** Extract PHY Access Register data */
-#define RTL_PHYAR_DATA( value ) ( (value) & 0xffff )
-
-/** Maximum time to wait for PHY access, in microseconds */
-#define RTL_MII_MAX_WAIT_US 500
-
-/** PHY (GMII, MII, or TBI) Status Register (byte, 8169 only) */
-#define RTL_PHYSTATUS 0x6c
-#define RTL_PHYSTATUS_LINKSTS	0x02	/**< Link ok */
-
-/** Transmit Priority Polling Register (byte, 8139C+ only) */
-#define RTL_TPPOLL_8139CP 0xd9
-
-/** RX Packet Maximum Size Register (word) */
-#define RTL_RMS 0xda
-
-/** C+ Command Register (word) */
-#define RTL_CPCR 0xe0
-#define RTL_CPCR_DAC		0x0010	/**< PCI Dual Address Cycle Enable */
-#define RTL_CPCR_MULRW		0x0008	/**< PCI Multiple Read/Write Enable */
-#define RTL_CPCR_CPRX		0x0002	/**< C+ receive enable */
-#define RTL_CPCR_CPTX		0x0001	/**< C+ transmit enable */
-
-/** Receive Descriptor Start Address Register (qword) */
-#define RTL_RDSAR 0xe4
-
-/** Number of receive descriptors */
-#define RTL_NUM_RX_DESC 4
-
-/** Receive buffer length */
-#define RTL_RX_MAX_LEN \
-	( ETH_FRAME_LEN + 4 /* VLAN */ + 4 /* CRC */ + 4 /* extra space */ )
-
-/** A Realtek descriptor ring */
-struct realtek_ring {
-	/** Descriptors */
-	struct realtek_descriptor *desc;
-	/** Producer index */
-	unsigned int prod;
-	/** Consumer index */
-	unsigned int cons;
-
-	/** Descriptor start address register */
-	unsigned int reg;
-	/** Length (in bytes) */
-	size_t len;
-};
-
-/**
- * Initialise descriptor ring
- *
- * @v ring		Descriptor ring
- * @v count		Number of descriptors
- * @v reg		Descriptor start address register
- */
-static inline __attribute__ (( always_inline)) void
-realtek_init_ring ( struct realtek_ring *ring, unsigned int count,
-		    unsigned int reg ) {
-	ring->len = ( count * sizeof ( ring->desc[0] ) );
-	ring->reg = reg;
-}
-
-/** A Realtek network card */
-struct realtek_nic {
-	/** Registers */
-	void *regs;
-	/** SPI bit-bashing interface */
-	struct spi_bit_basher spibit;
-	/** EEPROM */
-	struct spi_device eeprom;
-	/** Non-volatile options */
-	struct nvo_block nvo;
-	/** MII interface */
-	struct mii_interface mii;
-
-	/** Legacy datapath mode */
-	int legacy;
-	/** PHYAR and PHYSTATUS registers are present */
-	int have_phy_regs;
-	/** TPPoll register offset */
-	unsigned int tppoll;
-
-	/** Transmit descriptor ring */
-	struct realtek_ring tx;
-	/** Receive descriptor ring */
-	struct realtek_ring rx;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_iobuf[RTL_NUM_RX_DESC];
-	/** Receive buffer (legacy mode) */
-	void *rx_buffer;
-	/** Offset within receive buffer (legacy mode) */
-	unsigned int rx_offset;
-};
-
-#endif /* _REALTEK_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rhine.c ipxe-1.0.1~lliurex1505/src/drivers/net/rhine.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rhine.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/rhine.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,787 +0,0 @@
-/*
- * Copyright (C) 2012 Adrian Jamroz <adrian.jamroz@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/mii.h>
-#include "rhine.h"
-
-/** @file
- *
- * VIA Rhine network driver
- *
- */
-
-/******************************************************************************
- *
- * MII interface
- *
- ******************************************************************************
- */
-
-/**
- * Read from MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @ret value		Data read, or negative error
- */
-static int rhine_mii_read ( struct mii_interface *mii, unsigned int reg ) {
-	struct rhine_nic *rhn = container_of ( mii, struct rhine_nic, mii );
-	unsigned int timeout = RHINE_TIMEOUT_US;
-	uint8_t cr;
-
-	DBGC2 ( rhn, "RHINE %p MII read reg %d\n", rhn, reg );
-
-	/* Initiate read */
-	writeb ( reg, rhn->regs + RHINE_MII_ADDR );
-	cr = readb ( rhn->regs + RHINE_MII_CR );
-	writeb ( ( cr | RHINE_MII_CR_RDEN ), rhn->regs + RHINE_MII_CR );
-
-	/* Wait for read to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		cr = readb ( rhn->regs + RHINE_MII_CR );
-		if ( ! ( cr & RHINE_MII_CR_RDEN ) )
-			return readw ( rhn->regs + RHINE_MII_RDWR );
-	}
-
-	DBGC ( rhn, "RHINE %p MII read timeout\n", rhn );
-	return -ETIMEDOUT;
-}
-
-/**
- * Write to MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @v data		Data to write
- * @ret rc		Return status code
- */
-static int rhine_mii_write ( struct mii_interface *mii, unsigned int reg,
-                             unsigned int data ) {
-	struct rhine_nic *rhn = container_of ( mii, struct rhine_nic, mii );
-	unsigned int timeout = RHINE_TIMEOUT_US;
-	uint8_t cr;
-
-	DBGC2 ( rhn, "RHINE %p MII write reg %d data 0x%04x\n",
-	        rhn, reg, data );
-
-	/* Initiate write */
-	writeb ( reg, rhn->regs + RHINE_MII_ADDR );
-	writew ( data, rhn->regs + RHINE_MII_RDWR );
-	cr = readb ( rhn->regs + RHINE_MII_CR );
-	writeb ( ( cr | RHINE_MII_CR_WREN ), rhn->regs + RHINE_MII_CR );
-
-	/* Wait for write to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		cr = readb ( rhn->regs + RHINE_MII_CR );
-		if ( ! ( cr & RHINE_MII_CR_WREN ) )
-			return 0;
-	}
-
-	DBGC ( rhn, "RHINE %p MII write timeout\n", rhn );
-	return -ETIMEDOUT;
-}
-
-/** Rhine MII operations */
-static struct mii_operations rhine_mii_operations = {
-	.read = rhine_mii_read,
-	.write = rhine_mii_write,
-};
-
-/**
- * Enable auto-polling
- *
- * @v rhn		Rhine device
- * @ret rc		Return status code
- *
- * This is voodoo.  There seems to be no documentation on exactly what
- * we are waiting for, or why we have to do anything other than simply
- * turn the feature on.
- */
-static int rhine_mii_autopoll ( struct rhine_nic *rhn ) {
-	unsigned int timeout = RHINE_TIMEOUT_US;
-	uint8_t addr;
-
-	/* Initiate auto-polling */
-	writeb ( MII_BMSR, rhn->regs + RHINE_MII_ADDR );
-	writeb ( RHINE_MII_CR_AUTOPOLL, rhn->regs + RHINE_MII_CR );
-
-	/* Wait for auto-polling to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		addr = readb ( rhn->regs + RHINE_MII_ADDR );
-		if ( ! ( addr & RHINE_MII_ADDR_MDONE ) ) {
-			writeb ( ( MII_BMSR | RHINE_MII_ADDR_MSRCEN ),
-				 rhn->regs + RHINE_MII_ADDR );
-			return 0;
-		}
-	}
-
-	DBGC ( rhn, "RHINE %p MII auto-poll timeout\n", rhn );
-	return -ETIMEDOUT;
-}
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset hardware
- *
- * @v rhn		Rhine device
- * @ret rc		Return status code
- *
- * We're using PIO because this might reset the MMIO enable bit.
- */
-static int rhine_reset ( struct rhine_nic *rhn ) {
-	unsigned int timeout = RHINE_TIMEOUT_US;
-	uint8_t cr1;
-
-	DBGC ( rhn, "RHINE %p reset\n", rhn );
-
-	/* Initiate reset */
-	outb ( RHINE_CR1_RESET, rhn->ioaddr + RHINE_CR1 );
-
-	/* Wait for reset to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		cr1 = inb ( rhn->ioaddr + RHINE_CR1 );
-		if ( ! ( cr1 & RHINE_CR1_RESET ) )
-			return 0;
-	}
-
-	DBGC ( rhn, "RHINE %p reset timeout\n", rhn );
-	return -ETIMEDOUT;
-}
-
-/**
- * Enable MMIO register access
- *
- * @v rhn		Rhine device
- * @v revision		Card revision
- */
-static void rhine_enable_mmio ( struct rhine_nic *rhn, int revision ) {
-	uint8_t conf;
-
-	if ( revision < RHINE_REVISION_OLD ) {
-		conf = inb ( rhn->ioaddr + RHINE_CHIPCFG_A );
-		outb ( ( conf | RHINE_CHIPCFG_A_MMIO ),
-		       rhn->ioaddr + RHINE_CHIPCFG_A );
-	} else {
-		conf = inb ( rhn->ioaddr + RHINE_CHIPCFG_D );
-		outb ( ( conf | RHINE_CHIPCFG_D_MMIO ),
-		       rhn->ioaddr + RHINE_CHIPCFG_D );
-	}
-}
-
-/**
- * Reload EEPROM contents
- *
- * @v rhn		Rhine device
- * @ret rc		Return status code
- *
- * We're using PIO because this might reset the MMIO enable bit.
- */
-static int rhine_reload_eeprom ( struct rhine_nic *rhn ) {
-	unsigned int timeout = RHINE_TIMEOUT_US;
-	uint8_t eeprom;
-
-	/* Initiate reload */
-	eeprom = inb ( rhn->ioaddr + RHINE_EEPROM_CTRL );
-	outb ( ( eeprom | RHINE_EEPROM_CTRL_RELOAD ),
-	       rhn->ioaddr + RHINE_EEPROM_CTRL );
-
-	/* Wait for reload to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		eeprom = inb ( rhn->ioaddr + RHINE_EEPROM_CTRL );
-		if ( ! ( eeprom & RHINE_EEPROM_CTRL_RELOAD ) )
-			return 0;
-	}
-
-	DBGC ( rhn, "RHINE %p EEPROM reload timeout\n", rhn );
-	return -ETIMEDOUT;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void rhine_check_link ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	uint8_t mii_sr;
-
-	/* Read MII status register */
-	mii_sr = readb ( rhn->regs + RHINE_MII_SR );
-	DBGC ( rhn, "RHINE %p link status %02x\n", rhn, mii_sr );
-
-	/* Report link state */
-	if ( ! ( mii_sr & RHINE_MII_SR_LINKPOLL ) ) {
-		netdev_link_up ( netdev );
-	} else if ( mii_sr & RHINE_MII_SR_PHYERR ) {
-		netdev_link_err ( netdev, -EIO );
-	} else {
-		netdev_link_down ( netdev );
-	}
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Create descriptor ring
- *
- * @v rhn		Rhine device
- * @v ring		Descriptor ring
- * @ret rc		Return status code
- */
-static int rhine_create_ring ( struct rhine_nic *rhn,
-			       struct rhine_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-	struct rhine_descriptor *next;
-	physaddr_t address;
-	unsigned int i;
-
-	/* Allocate descriptors */
-	ring->desc = malloc_dma ( len, RHINE_RING_ALIGN );
-	if ( ! ring->desc )
-		return -ENOMEM;
-
-	/* Initialise descriptor ring */
-	memset ( ring->desc, 0, len );
-	for ( i = 0 ; i < ring->count ; i++ ) {
-		next = &ring->desc[ ( i + 1 ) % ring->count ];
-		ring->desc[i].next = cpu_to_le32 ( virt_to_bus ( next ) );
-	}
-
-	/* Program ring address */
-	address = virt_to_bus ( ring->desc );
-	writel ( address, rhn->regs + ring->reg );
-
-	DBGC ( rhn, "RHINE %p ring %02x is at [%08llx,%08llx)\n",
-	       rhn, ring->reg, ( ( unsigned long long ) address ),
-	       ( ( unsigned long long ) address + len ) );
-
-	return 0;
-}
-
-/**
- * Destroy descriptor ring
- *
- * @v rhn		Rhine device
- * @v ring		Descriptor ring
- */
-static void rhine_destroy_ring ( struct rhine_nic *rhn,
-				 struct rhine_ring *ring ) {
-	size_t len = ( ring->count * sizeof ( ring->desc[0] ) );
-
-	/* Clear ring address */
-	writel ( 0, rhn->regs + ring->reg );
-
-	/* Free descriptor ring */
-	free_dma ( ring->desc, len );
-	ring->desc = NULL;
-	ring->prod = 0;
-	ring->cons = 0;
-}
-
-/**
- * Refill RX descriptor ring
- *
- * @v rhn		Rhine device
- */
-static void rhine_refill_rx ( struct rhine_nic *rhn ) {
-	struct rhine_descriptor *desc;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	physaddr_t address;
-
-	while ( ( rhn->rx.prod - rhn->rx.cons ) < RHINE_RXDESC_NUM ) {
-
-		/* Allocate I/O buffer */
-		iobuf = alloc_iob ( RHINE_RX_MAX_LEN );
-		if ( ! iobuf ) {
-			/* Wait for next refill */
-			return;
-		}
-
-		/* Populate next receive descriptor */
-		rx_idx = ( rhn->rx.prod++ % RHINE_RXDESC_NUM );
-		desc = &rhn->rx.desc[rx_idx];
-		address = virt_to_bus ( iobuf->data );
-		desc->buffer = cpu_to_le32 ( address );
-		desc->des1 =
-			cpu_to_le32 ( RHINE_DES1_SIZE ( RHINE_RX_MAX_LEN - 1) |
-				      RHINE_DES1_CHAIN | RHINE_DES1_IC );
-		wmb();
-		desc->des0 = cpu_to_le32 ( RHINE_DES0_OWN );
-
-		/* Record I/O buffer */
-		rhn->rx_iobuf[rx_idx] = iobuf;
-
-		DBGC2 ( rhn, "RHINE %p RX %d is [%llx,%llx)\n", rhn, rx_idx,
-			( ( unsigned long long ) address ),
-			( ( unsigned long long ) address + RHINE_RX_MAX_LEN ) );
-	}
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int rhine_open ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	int rc;
-
-	/* Create transmit ring */
-	if ( ( rc = rhine_create_ring ( rhn, &rhn->tx ) ) != 0 )
-		goto err_create_tx;
-
-	/* Create receive ring */
-	if ( ( rc = rhine_create_ring ( rhn, &rhn->rx ) ) != 0 )
-		goto err_create_rx;
-
-	/* Set receive configuration */
-	writeb ( ( RHINE_RCR_PHYS_ACCEPT | RHINE_RCR_BCAST_ACCEPT |
-		   RHINE_RCR_RUNT_ACCEPT ), rhn->regs + RHINE_RCR );
-
-	/* Enable link status monitoring */
-	if ( ( rc = rhine_mii_autopoll ( rhn ) ) != 0 )
-		goto err_mii_autopoll;
-
-	/* Some cards need an extra delay(observed with VT6102) */
-	mdelay ( 10 );
-
-	/* Enable RX/TX of packets */
-	writeb ( ( RHINE_CR0_STARTNIC | RHINE_CR0_RXEN | RHINE_CR0_TXEN ),
-		 rhn->regs + RHINE_CR0 );
-
-	/* Enable auto polling and full duplex operation */
-	rhn->cr1 = RHINE_CR1_FDX;
-	writeb ( rhn->cr1, rhn->regs + RHINE_CR1 );
-
-	/* Refill RX ring */
-	rhine_refill_rx ( rhn );
-
-	/* Update link state */
-	rhine_check_link ( netdev );
-
-	return 0;
-
- err_mii_autopoll:
-	rhine_destroy_ring ( rhn, &rhn->rx );
- err_create_rx:
-	rhine_destroy_ring ( rhn, &rhn->tx );
- err_create_tx:
-	return rc;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void rhine_close ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	unsigned int i;
-
-	/* Disable interrupts */
-	writeb ( 0, RHINE_IMR0 );
-	writeb ( 0, RHINE_IMR1 );
-
-	/* Stop card, clear RXON and TXON bits */
-	writeb ( RHINE_CR0_STOPNIC, rhn->regs + RHINE_CR0 );
-
-	/* Destroy receive ring */
-	rhine_destroy_ring ( rhn, &rhn->rx );
-
-	/* Discard any unused receive buffers */
-	for ( i = 0 ; i < RHINE_RXDESC_NUM ; i++ ) {
-		if ( rhn->rx_iobuf[i] )
-			free_iob ( rhn->rx_iobuf[i] );
-		rhn->rx_iobuf[i] = NULL;
-	}
-
-	/* Destroy transmit ring */
-	rhine_destroy_ring ( rhn, &rhn->tx );
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int rhine_transmit ( struct net_device *netdev,
-                            struct io_buffer *iobuf ) {
-	struct rhine_nic *rhn = netdev->priv;
-	struct rhine_descriptor *desc;
-	physaddr_t address;
-	unsigned int tx_idx;
-
-	/* Get next transmit descriptor */
-	if ( ( rhn->tx.prod - rhn->tx.cons ) >= RHINE_TXDESC_NUM )
-		return -ENOBUFS;
-	tx_idx = ( rhn->tx.prod++ % RHINE_TXDESC_NUM );
-	desc = &rhn->tx.desc[tx_idx];
-
-	/* Pad and align packet */
-	iob_pad ( iobuf, ETH_ZLEN );
-	address = virt_to_bus ( iobuf->data );
-
-	/* Populate transmit descriptor */
-	desc->buffer = cpu_to_le32 ( address );
-	desc->des1 = cpu_to_le32 ( RHINE_DES1_IC | RHINE_TDES1_STP |
-				   RHINE_TDES1_EDP | RHINE_DES1_CHAIN |
-				   RHINE_DES1_SIZE ( iob_len ( iobuf ) ) );
-	wmb();
-	desc->des0 = cpu_to_le32 ( RHINE_DES0_OWN );
-	wmb();
-
-	/* Notify card that there are packets ready to transmit */
-	writeb ( ( rhn->cr1 | RHINE_CR1_TXPOLL ), rhn->regs + RHINE_CR1 );
-
-	DBGC2 ( rhn, "RHINE %p TX %d is [%llx,%llx)\n", rhn, tx_idx,
-		( ( unsigned long long ) address ),
-		( ( unsigned long long ) address + iob_len ( iobuf ) ) );
-
-	return 0;
-}
-
-/**
- * Poll for completed packets
- *
- * @v netdev		Network device
- */
-static void rhine_poll_tx ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	struct rhine_descriptor *desc;
-	unsigned int tx_idx;
-	uint32_t des0;
-
-	/* Check for completed packets */
-	while ( rhn->tx.cons != rhn->tx.prod ) {
-
-		/* Get next transmit descriptor */
-		tx_idx = ( rhn->tx.cons % RHINE_TXDESC_NUM );
-		desc = &rhn->tx.desc[tx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( desc->des0 & cpu_to_le32 ( RHINE_DES0_OWN ) )
-			return;
-
-		/* Complete TX descriptor */
-		des0 = le32_to_cpu ( desc->des0 );
-		if ( des0 & RHINE_TDES0_TERR ) {
-			DBGC ( rhn, "RHINE %p TX %d error (DES0 %08x)\n",
-			       rhn, tx_idx, des0 );
-			netdev_tx_complete_next_err ( netdev, -EIO );
-		} else {
-			DBGC2 ( rhn, "RHINE %p TX %d complete\n", rhn, tx_idx );
-			netdev_tx_complete_next ( netdev );
-		}
-		rhn->tx.cons++;
-	}
-}
-
-/**
- * Poll for received packets
- *
- * @v netdev		Network device
- */
-static void rhine_poll_rx ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	struct rhine_descriptor *desc;
-	struct io_buffer *iobuf;
-	unsigned int rx_idx;
-	uint32_t des0;
-	size_t len;
-
-	/* Check for received packets */
-	while ( rhn->rx.cons != rhn->rx.prod ) {
-
-		/* Get next receive descriptor */
-		rx_idx = ( rhn->rx.cons % RHINE_RXDESC_NUM );
-		desc = &rhn->rx.desc[rx_idx];
-
-		/* Stop if descriptor is still in use */
-		if ( desc->des0 & cpu_to_le32 ( RHINE_DES0_OWN ) )
-			return;
-
-		/* Populate I/O buffer */
-		iobuf = rhn->rx_iobuf[rx_idx];
-		rhn->rx_iobuf[rx_idx] = NULL;
-		des0 = le32_to_cpu ( desc->des0 );
-		len = ( RHINE_DES0_GETSIZE ( des0 ) - 4 /* strip CRC */ );
-		iob_put ( iobuf, len );
-
-		/* Hand off to network stack */
-		if ( des0 & RHINE_RDES0_RXOK ) {
-			DBGC2 ( rhn, "RHINE %p RX %d complete (length %zd)\n",
-				rhn, rx_idx, len );
-			netdev_rx ( netdev, iobuf );
-		} else {
-			DBGC ( rhn, "RHINE %p RX %d error (length %zd, DES0 "
-			       "%08x)\n", rhn, rx_idx, len, des0 );
-			netdev_rx_err ( netdev, iobuf, -EIO );
-		}
-		rhn->rx.cons++;
-	}
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void rhine_poll ( struct net_device *netdev ) {
-	struct rhine_nic *rhn = netdev->priv;
-	uint8_t isr0;
-	uint8_t isr1;
-
-	/* Read and acknowledge interrupts */
-	isr0 = readb ( rhn->regs + RHINE_ISR0 );
-	isr1 = readb ( rhn->regs + RHINE_ISR1 );
-	if ( isr0 )
-		writeb ( isr0, rhn->regs + RHINE_ISR0 );
-	if ( isr1 )
-		writeb ( isr1, rhn->regs + RHINE_ISR1 );
-
-	/* Report unexpected errors */
-	if ( ( isr0 & ( RHINE_ISR0_MIBOVFL | RHINE_ISR0_PCIERR |
-			RHINE_ISR0_RXRINGERR | RHINE_ISR0_TXRINGERR ) ) ||
-	     ( isr1 & ( RHINE_ISR1_GPI | RHINE_ISR1_TXABORT |
-			RHINE_ISR1_RXFIFOOVFL | RHINE_ISR1_RXFIFOUNFL |
-			RHINE_ISR1_TXFIFOUNFL ) ) ) {
-		DBGC ( rhn, "RHINE %p unexpected ISR0 %02x ISR1 %02x\n",
-		       rhn, isr0, isr1 );
-		/* Report as a TX error */
-		netdev_tx_err ( netdev, NULL, -EIO );
-	}
-
-	/* Poll for TX completions, if applicable */
-	if ( isr0 & ( RHINE_ISR0_TXDONE | RHINE_ISR0_TXERR ) )
-		rhine_poll_tx ( netdev );
-
-	/* Poll for RX completions, if applicable */
-	if ( isr0 & ( RHINE_ISR0_RXDONE | RHINE_ISR0_RXERR ) )
-		rhine_poll_rx ( netdev );
-
-	/* Handle RX buffer exhaustion */
-	if ( isr1 & RHINE_ISR1_RXNOBUF ) {
-		rhine_poll_rx ( netdev );
-		netdev_rx_err ( netdev, NULL, -ENOBUFS );
-	}
-
-	/* Check link state, if applicable */
-	if ( isr1 & RHINE_ISR1_PORTSTATE )
-		rhine_check_link ( netdev );
-
-	/* Refill RX ring */
-	rhine_refill_rx ( rhn );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void rhine_irq ( struct net_device *netdev, int enable ) {
-	struct rhine_nic *nic = netdev->priv;
-
-	if ( enable ) {
-		/* Enable interrupts */
-		writeb ( 0xff, nic->regs + RHINE_IMR0 );
-		writeb ( 0xff, nic->regs + RHINE_IMR1 );
-	} else {
-		/* Disable interrupts */
-		writeb ( 0, nic->regs + RHINE_IMR0 );
-		writeb ( 0, nic->regs + RHINE_IMR1 );
-	}
-}
-
-/** Rhine network device operations */
-static struct net_device_operations rhine_operations = {
-	.open		= rhine_open,
-	.close		= rhine_close,
-	.transmit	= rhine_transmit,
-	.poll		= rhine_poll,
-	.irq		= rhine_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int rhine_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct rhine_nic *rhn;
-	uint8_t revision;
-	unsigned int i;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *rhn ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &rhine_operations );
-	rhn = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( rhn, 0, sizeof ( *rhn ) );
-	rhine_init_ring ( &rhn->tx, RHINE_TXDESC_NUM, RHINE_TXQUEUE_BASE );
-	rhine_init_ring ( &rhn->rx, RHINE_RXDESC_NUM, RHINE_RXQUEUE_BASE );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	rhn->regs = ioremap ( pci->membase, RHINE_BAR_SIZE );
-	rhn->ioaddr = pci->ioaddr;
-	DBGC ( rhn, "RHINE %p regs at %08lx, I/O at %04lx\n", rhn,
-	       pci->membase, pci->ioaddr );
-
-	/* Reset the NIC */
-	if ( ( rc = rhine_reset ( rhn ) ) != 0 )
-		goto err_reset;
-
-	/* Reload EEPROM */
-	if ( ( rc = rhine_reload_eeprom ( rhn ) ) != 0 )
-		goto err_reload_eeprom;
-
-	/* Read card revision and enable MMIO */
-	pci_read_config_byte ( pci, PCI_REVISION, &revision );
-	DBGC ( rhn, "RHINE %p revision %#02x detected\n", rhn, revision );
-	rhine_enable_mmio ( rhn, revision );
-
-	/* Read MAC address */
-	for ( i = 0 ; i < ETH_ALEN ; i++ )
-		netdev->hw_addr[i] = readb ( rhn->regs + RHINE_MAC + i );
-
-	/* Initialise and reset MII interface */
-	mii_init ( &rhn->mii, &rhine_mii_operations );
-	if ( ( rc = mii_reset ( &rhn->mii ) ) != 0 ) {
-		DBGC ( rhn, "RHINE %p could not reset MII: %s\n",
-		       rhn, strerror ( rc ) );
-		goto err_mii_reset;
-	}
-	DBGC ( rhn, "RHINE PHY vendor %04x device %04x\n",
-	       rhine_mii_read ( &rhn->mii, 0x02 ),
-	       rhine_mii_read ( &rhn->mii, 0x03 ) );
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Set initial link state */
-	rhine_check_link ( netdev );
-
-	return 0;
-
- err_register_netdev:
- err_mii_reset:
- err_reload_eeprom:
-	rhine_reset ( rhn );
- err_reset:
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void rhine_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct rhine_nic *nic = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	rhine_reset ( nic );
-
-	/* Free network device */
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Rhine PCI device IDs */
-static struct pci_device_id rhine_nics[] = {
-	PCI_ROM ( 0x1106, 0x3065, "dlink-530tx", "VIA VT6102", 0 ),
-	PCI_ROM ( 0x1106, 0x3106, "vt6105", "VIA VT6105", 0 ),
-	PCI_ROM ( 0x1106, 0x3043, "dlink-530tx-old", "VIA VT3043", 0 ),
-	PCI_ROM ( 0x1106, 0x3053, "vt6105m", "VIA VT6105M", 0 ),
-	PCI_ROM ( 0x1106, 0x6100, "via-rhine-old", "VIA 86C100A", 0 )
-};
-
-/** Rhine PCI driver */
-struct pci_driver rhine_driver __pci_driver = {
-	.ids = rhine_nics,
-	.id_count = ( sizeof ( rhine_nics ) / sizeof ( rhine_nics[0] ) ),
-	.probe = rhine_probe,
-	.remove = rhine_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rhine.h ipxe-1.0.1~lliurex1505/src/drivers/net/rhine.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rhine.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/rhine.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,250 +0,0 @@
-#ifndef _RHINE_H
-#define _RHINE_H
-
-/** @file
- *
- * VIA Rhine network driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** Rhine BAR size */
-#define RHINE_BAR_SIZE		256
-
-/** Default timeout */
-#define	RHINE_TIMEOUT_US	10000
-
-/** Rhine descriptor format */
-struct rhine_descriptor {
-	uint32_t	des0;
-	uint32_t	des1;
-	uint32_t	buffer;
-	uint32_t	next;
-} __attribute__ (( packed ));
-
-#define	RHINE_DES0_OWN		(1 << 31)	/*< Owned descriptor */
-#define RHINE_DES1_IC		(1 << 23)	/*< Generate interrupt */
-#define	RHINE_TDES1_EDP		(1 << 22)	/*< End of packet */
-#define	RHINE_TDES1_STP		(1 << 21)	/*< Start of packet */
-#define	RHINE_TDES1_TCPCK	(1 << 20)	/*< HW TCP checksum */
-#define	RHINE_TDES1_UDPCK	(1 << 19)	/*< HW UDP checksum */
-#define	RHINE_TDES1_IPCK	(1 << 18)	/*< HW IP checksum */
-#define	RHINE_TDES1_TAG		(1 << 17)	/*< Tagged frame */
-#define	RHINE_TDES1_CRC		(1 << 16)	/*< No CRC */
-#define	RHINE_DES1_CHAIN	(1 << 15)	/*< Chained descriptor */
-#define	RHINE_DES1_SIZE(_x)	((_x) & 0x7ff)	/*< Frame size */
-#define	RHINE_DES0_GETSIZE(_x)	(((_x) >> 16) & 0x7ff)
-
-#define	RHINE_RDES0_RXOK	(1 << 15)
-#define	RHINE_RDES0_VIDHIT	(1 << 14)
-#define	RHINE_RDES0_MAR		(1 << 13)
-#define	RHINE_RDES0_BAR		(1 << 12)
-#define	RHINE_RDES0_PHY		(1 << 11)
-#define	RHINE_RDES0_CHN		(1 << 10)
-#define	RHINE_RDES0_STP		(1 << 9)
-#define	RHINE_RDES0_EDP		(1 << 8)
-#define	RHINE_RDES0_BUFF	(1 << 7)
-#define	RHINE_RDES0_FRAG	(1 << 6)
-#define	RHINE_RDES0_RUNT	(1 << 5)
-#define	RHINE_RDES0_LONG	(1 << 4)
-#define	RHINE_RDES0_FOV		(1 << 3)
-#define	RHINE_RDES0_FAE		(1 << 2)
-#define	RHINE_RDES0_CRCE	(1 << 1)
-#define	RHINE_RDES0_RERR	(1 << 0)
-
-#define	RHINE_TDES0_TERR	(1 << 15)
-#define	RHINE_TDES0_UDF		(1 << 11)
-#define	RHINE_TDES0_CRS		(1 << 10)
-#define	RHINE_TDES0_OWC		(1 << 9)
-#define	RHINE_TDES0_ABT		(1 << 8)
-#define	RHINE_TDES0_CDH		(1 << 7)
-#define	RHINE_TDES0_COLS	(1 << 4)
-#define	RHINE_TDES0_NCR(_x)	((_x) & 0xf)
-
-#define	RHINE_RING_ALIGN	4
-
-/** Rhine descriptor rings sizes */
-#define	RHINE_RXDESC_NUM	4
-#define	RHINE_TXDESC_NUM	8
-#define	RHINE_RX_MAX_LEN	1536
-
-/** Rhine MAC address registers */
-#define	RHINE_MAC		0x00
-
-/** Receive control register */
-#define	RHINE_RCR		0x06
-#define	RHINE_RCR_FIFO_TRSH(_x)	(((_x) & 0x7) << 5) /*< RX FIFO threshold */
-#define	RHINE_RCR_PHYS_ACCEPT	(1 << 4)	/*< Accept matching PA */
-#define	RHINE_RCR_BCAST_ACCEPT	(1 << 3)	/*< Accept broadcast */
-#define	RHINE_RCR_MCAST_ACCEPT	(1 << 2)	/*< Accept multicast */
-#define	RHINE_RCR_RUNT_ACCEPT	(1 << 1)	/*< Accept runt frames */
-#define	RHINE_RCR_ERR_ACCEPT	(1 << 0)	/*< Accept erroneous frames */
-
-/** Transmit control register */
-#define	RHINE_TCR		0x07
-#define	RHINE_TCR_LOOPBACK(_x)	(((_x) & 0x3) << 1) /*< Transmit loop mode */
-#define	RHINE_TCR_TAGGING	(1 << 0)	/*< 802.1P/Q packet tagging */
-
-/** Command 0 register */
-#define	RHINE_CR0		0x08
-#define	RHINE_CR0_RXSTART	(1 << 6)
-#define	RHINE_CR0_TXSTART	(1 << 5)
-#define	RHINE_CR0_TXEN		(1 << 4)	/*< Transmit enable */
-#define	RHINE_CR0_RXEN		(1 << 3)	/*< Receive enable */
-#define	RHINE_CR0_STOPNIC	(1 << 2)	/*< Stop NIC */
-#define	RHINE_CR0_STARTNIC	(1 << 1)	/*< Start NIC */
-
-/** Command 1 register */
-#define	RHINE_CR1		0x09
-#define	RHINE_CR1_RESET		(1 << 7)	/*< Software reset */
-#define	RHINE_CR1_RXPOLL	(1 << 6)	/*< Receive poll demand */
-#define	RHINE_CR1_TXPOLL	(1 << 5)	/*< Xmit poll demand */
-#define	RHINE_CR1_AUTOPOLL	(1 << 3)	/*< Disable autopoll */
-#define	RHINE_CR1_FDX		(1 << 2)	/*< Full duplex */
-#define	RIHNE_CR1_ACCUNI	(1 << 1)	/*< Disable accept unicast */
-
-/** Transmit queue wake register */
-#define	RHINE_TXQUEUE_WAKE	0x0a
-
-/** Interrupt service 0 */
-#define	RHINE_ISR0		0x0c
-#define	RHINE_ISR0_MIBOVFL	(1 << 7)
-#define	RHINE_ISR0_PCIERR	(1 << 6)
-#define	RHINE_ISR0_RXRINGERR	(1 << 5)
-#define	RHINE_ISR0_TXRINGERR	(1 << 4)
-#define	RHINE_ISR0_TXERR	(1 << 3)
-#define	RHINE_ISR0_RXERR	(1 << 2)
-#define	RHINE_ISR0_TXDONE	(1 << 1)
-#define	RHINE_ISR0_RXDONE	(1 << 0)
-
-/** Interrupt service 1 */
-#define	RHINE_ISR1		0x0d
-#define	RHINE_ISR1_GPI		(1 << 7)
-#define	RHINE_ISR1_PORTSTATE	(1 << 6)
-#define	RHINE_ISR1_TXABORT	(1 << 5)
-#define	RHINE_ISR1_RXNOBUF	(1 << 4)
-#define	RHINE_ISR1_RXFIFOOVFL	(1 << 3)
-#define	RHINE_ISR1_RXFIFOUNFL	(1 << 2)
-#define	RHINE_ISR1_TXFIFOUNFL	(1 << 1)
-#define	RHINE_ISR1_EARLYRX	(1 << 0)
-
-/** Interrupt enable mask register 0 */
-#define	RHINE_IMR0		0x0e
-
-/** Interrupt enable mask register 1 */
-#define	RHINE_IMR1		0x0f
-
-/** RX queue descriptor base address */
-#define	RHINE_RXQUEUE_BASE	0x18
-
-/** TX queue 0 descriptor base address */
-#define	RHINE_TXQUEUE_BASE	0x1c
-
-/** MII configuration */
-#define	RHINE_MII_CFG		0x6c
-
-/** MII status register */
-#define	RHINE_MII_SR		0x6d
-#define	RHINE_MII_SR_PHYRST	(1 << 7)	/*< PHY reset */
-#define	RHINE_MII_SR_LINKNWAY	(1 << 4)	/*< Link status after N-Way */
-#define	RHINE_MII_SR_PHYERR	(1 << 3)	/*< PHY device error */
-#define	RHINE_MII_SR_DUPLEX	(1 << 2)	/*< Duplex mode after N-Way */
-#define	RHINE_MII_SR_LINKPOLL	(1 << 1)	/*< Link status after poll */
-#define	RHINE_MII_SR_LINKSPD	(1 << 0)	/*< Link speed after N-Way */
-
-/** MII bus control 0 register */
-#define	RHINE_MII_BCR0		0x6e
-
-/** MII bus control 1 register */
-#define	RHINE_MII_BCR1		0x6f
-
-/** MII control register */
-#define	RHINE_MII_CR		0x70
-#define	RHINE_MII_CR_AUTOPOLL	(1 << 7)	/*< MII auto polling */
-#define	RHINE_MII_CR_RDEN	(1 << 6)	/*< PHY read enable */
-#define	RHINE_MII_CR_WREN	(1 << 5)	/*< PHY write enable */
-#define	RHINE_MII_CR_DIRECT	(1 << 4)	/*< Direct programming mode */
-#define	RHINE_MII_CR_MDIOOUT	(1 << 3)	/*< MDIO output enable */
-
-/** MII port address */
-#define	RHINE_MII_ADDR		0x71
-#define	RHINE_MII_ADDR_MSRCEN	(1 << 6)
-#define	RHINE_MII_ADDR_MDONE	(1 << 5)
-
-/** MII read/write data */
-#define	RHINE_MII_RDWR		0x72
-
-/** EERPOM control/status register */
-#define	RHINE_EEPROM_CTRL	0x74
-#define	RHINE_EEPROM_CTRL_STATUS	(1 << 7) /*< EEPROM status */
-#define	RHINE_EEPROM_CTRL_RELOAD	(1 << 5) /*< EEPROM reload */
-
-/** Chip configuration A */
-#define	RHINE_CHIPCFG_A		0x78
-/* MMIO enable. Only valid for Rhine I. Reserved on later boards */
-#define RHINE_CHIPCFG_A_MMIO	(1 << 5)
-
-/** Chip configuration B */
-#define	RHINE_CHIPCFG_B		0x79
-
-/** Chip configuation C */
-#define	RHINE_CHIPCFG_C		0x7a
-
-/** Chip configuration D */
-#define	RHINE_CHIPCFG_D		0x7b
-/* MMIO enable. Only valid on Rhine II and later. GPIOEN on Rhine I */
-#define RHINE_CHIPCFG_D_MMIO	(1 << 7)
-
-#define RHINE_REVISION_OLD	0x20
-
-/** A VIA Rhine descriptor ring */
-struct rhine_ring {
-	/** Descriptors */
-	struct rhine_descriptor *desc;
-	/** Producer index */
-	unsigned int prod;
-	/** Consumer index */
-	unsigned int cons;
-
-	/** Number of descriptors */
-	unsigned int count;
-	/** Register address */
-	unsigned int reg;
-};
-
-/**
- * Initialise descriptor ring
- *
- * @v ring		Descriptor ring
- * @v count		Number of descriptors (must be a power of 2)
- * @v reg		Register address
- */
-static inline __attribute__ (( always_inline)) void
-rhine_init_ring ( struct rhine_ring *ring, unsigned int count,
-		  unsigned int reg ) {
-	ring->count = count;
-	ring->reg = reg;
-}
-
-/** A VIA Rhine network card */
-struct rhine_nic {
-	/** I/O address (some PIO access is always required) */
-	unsigned long ioaddr;
-	/** Registers */
-	void *regs;
-	/** Cached value of CR1 (to avoid read-modify-write on fast path) */
-	uint8_t cr1;
-
-	/** MII interface */
-	struct mii_interface mii;
-
-	/** Transmit descriptor ring */
-	struct rhine_ring tx;
-	/** Receive descriptor ring */
-	struct rhine_ring rx;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_iobuf[RHINE_RXDESC_NUM];
-};
-
-#endif /* _RHINE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rtl8139.c ipxe-1.0.1~lliurex1505/src/drivers/net/rtl8139.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rtl8139.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/rtl8139.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,596 @@
+/* rtl8139.c - etherboot driver for the Realtek 8139 chipset
+
+  ported from the linux driver written by Donald Becker
+  by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
+
+  This software may be used and distributed according to the terms
+  of the GNU Public License, incorporated herein by reference.
+
+  changes to the original driver:
+  - removed support for interrupts, switching to polling mode (yuck!)
+  - removed support for the 8129 chip (external MII)
+
+*/
+
+FILE_LICENCE ( GPL_ANY );
+
+/*********************************************************************/
+/* Revision History                                                  */
+/*********************************************************************/
+
+/*
+  27 May 2006	mcb30@users.sourceforge.net (Michael Brown)
+     Rewrote to use the new net driver API, the updated PCI API, and
+     the generic three-wire serial device support for EEPROM access.
+
+  28 Dec 2002	ken_yap@users.sourceforge.net (Ken Yap)
+     Put in virt_to_bus calls to allow Etherboot relocation.
+
+  06 Apr 2001	ken_yap@users.sourceforge.net (Ken Yap)
+     Following email from Hyun-Joon Cha, added a disable routine, otherwise
+     NIC remains live and can crash the kernel later.
+
+  4 Feb 2000	espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
+     Shuffled things around, removed the leftovers from the 8129 support
+     that was in the Linux driver and added a bit more 8139 definitions.
+     Moved the 8K receive buffer to a fixed, available address outside the
+     0x98000-0x9ffff range.  This is a bit of a hack, but currently the only
+     way to make room for the Etherboot features that need substantial amounts
+     of code like the ANSI console support.  Currently the buffer is just below
+     0x10000, so this even conforms to the tagged boot image specification,
+     which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000.  My
+     interpretation of this "reserved" is that Etherboot may do whatever it
+     likes, as long as its environment is kept intact (like the BIOS
+     variables).  Hopefully fixed rtl_poll() once and for all.  The symptoms
+     were that if Etherboot was left at the boot menu for several minutes, the
+     first eth_poll failed.  Seems like I am the only person who does this.
+     First of all I fixed the debugging code and then set out for a long bug
+     hunting session.  It took me about a week full time work - poking around
+     various places in the driver, reading Don Becker's and Jeff Garzik's Linux
+     driver and even the FreeBSD driver (what a piece of crap!) - and
+     eventually spotted the nasty thing: the transmit routine was acknowledging
+     each and every interrupt pending, including the RxOverrun and RxFIFIOver
+     interrupts.  This confused the RTL8139 thoroughly.  It destroyed the
+     Rx ring contents by dumping the 2K FIFO contents right where we wanted to
+     get the next packet.  Oh well, what fun.
+
+  18 Jan 2000   mdc@etherboot.org (Marty Connor)
+     Drastically simplified error handling.  Basically, if any error
+     in transmission or reception occurs, the card is reset.
+     Also, pointed all transmit descriptors to the same buffer to
+     save buffer space.  This should decrease driver size and avoid
+     corruption because of exceeding 32K during runtime.
+
+  28 Jul 1999   (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
+     rtl_poll was quite broken: it used the RxOK interrupt flag instead
+     of the RxBufferEmpty flag which often resulted in very bad
+     transmission performace - below 1kBytes/s.
+
+*/
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <ipxe/io.h>
+#include <errno.h>
+#include <unistd.h>
+#include <byteswap.h>
+#include <ipxe/pci.h>
+#include <ipxe/if_ether.h>
+#include <ipxe/ethernet.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/netdevice.h>
+#include <ipxe/spi_bit.h>
+#include <ipxe/threewire.h>
+#include <ipxe/nvo.h>
+
+#define TX_RING_SIZE 4
+#define TX_MAX_LEN 8192
+
+struct rtl8139_tx {
+	unsigned int next;
+	struct io_buffer *iobuf[TX_RING_SIZE];
+};
+
+struct rtl8139_rx {
+	void *ring;
+	unsigned int offset;
+};
+
+struct rtl8139_nic {
+	unsigned short ioaddr;
+	struct rtl8139_tx tx;
+	struct rtl8139_rx rx;
+	struct spi_bit_basher spibit;
+	struct spi_device eeprom;
+	struct nvo_block nvo;
+};
+
+/* Tuning Parameters */
+#define TX_FIFO_THRESH	256	/* In bytes, rounded down to 32 byte units. */
+#define RX_FIFO_THRESH	4	/* Rx buffer level before first PCI xfer.  */
+#define RX_DMA_BURST	4	/* Maximum PCI burst, '4' is 256 bytes */
+#define TX_DMA_BURST	4	/* Calculate as 16<<val. */
+#define TX_IPG		3	/* This is the only valid value */
+#define RX_BUF_LEN_IDX	0	/* 0, 1, 2 is allowed - 8,16,32K rx buffer */
+#define RX_BUF_LEN ( (8192 << RX_BUF_LEN_IDX) )
+#define RX_BUF_PAD 4
+
+/* Symbolic offsets to registers. */
+enum RTL8139_registers {
+	MAC0=0,			/* Ethernet hardware address. */
+	MAR0=8,			/* Multicast filter. */
+	TxStatus0=0x10,		/* Transmit status (four 32bit registers). */
+	TxAddr0=0x20,		/* Tx descriptors (also four 32bit). */
+	RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
+	ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
+	IntrMask=0x3C, IntrStatus=0x3E,
+	TxConfig=0x40, RxConfig=0x44,
+	Timer=0x48,		/* general-purpose counter. */
+	RxMissed=0x4C,		/* 24 bits valid, write clears. */
+	Cfg9346=0x50, Config0=0x51, Config1=0x52,
+	TimerIntrReg=0x54,	/* intr if gp counter reaches this value */
+	MediaStatus=0x58,
+	Config3=0x59,
+	MultiIntr=0x5C,
+	RevisionID=0x5E,	/* revision of the RTL8139 chip */
+	TxSummary=0x60,
+	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
+	NWayExpansion=0x6A,
+	DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
+	NWayTestReg=0x70,
+	RxCnt=0x72,		/* packet received counter */
+	CSCR=0x74,		/* chip status and configuration register */
+	PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80,	/* undocumented */
+	/* from 0x84 onwards are a number of power management/wakeup frame
+	 * definitions we will probably never need to know about.  */
+};
+
+enum RxEarlyStatusBits {
+	ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
+};
+
+enum ChipCmdBits {
+	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
+
+enum IntrMaskBits {
+	SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
+	FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
+	TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
+};
+
+/* Interrupt register bits, using my own meaningful names. */
+enum IntrStatusBits {
+	PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
+	RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
+	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
+};
+enum TxStatusBits {
+	TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
+	TxOutOfWindow=0x20000000, TxAborted=0x40000000,
+	TxCarrierLost=0x80000000,
+};
+enum RxStatusBits {
+	RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
+	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
+	RxBadAlign=0x0002, RxStatusOK=0x0001,
+};
+
+enum MediaStatusBits {
+	MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
+	MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
+};
+
+enum MIIBMCRBits {
+	BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
+	BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
+};
+
+enum CSCRBits {
+	CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
+	CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
+	CSCR_LinkDownCmd=0x0f3c0,
+};
+
+enum RxConfigBits {
+	RxCfgWrap=0x80,
+	Eeprom9356=0x40,
+	AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
+	AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
+};
+
+enum Config1Bits {
+	VPDEnable=0x02,
+};
+
+/*  EEPROM access */
+#define EE_M1		0x80	/* Mode select bit 1 */
+#define EE_M0		0x40	/* Mode select bit 0 */
+#define EE_CS		0x08	/* EEPROM chip select */
+#define EE_SK		0x04	/* EEPROM shift clock */
+#define EE_DI		0x02	/* Data in */
+#define EE_DO		0x01	/* Data out */
+
+/* Offsets within EEPROM (these are word offsets) */
+#define EE_MAC 7
+
+static const uint8_t rtl_ee_bits[] = {
+	[SPI_BIT_SCLK]	= EE_SK,
+	[SPI_BIT_MOSI]	= EE_DI,
+	[SPI_BIT_MISO]	= EE_DO,
+	[SPI_BIT_SS(0)]	= ( EE_CS | EE_M1 ),
+};
+
+static int rtl_spi_read_bit ( struct bit_basher *basher,
+			      unsigned int bit_id ) {
+	struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
+						 spibit.basher );
+	uint8_t mask = rtl_ee_bits[bit_id];
+	uint8_t eereg;
+
+	eereg = inb ( rtl->ioaddr + Cfg9346 );
+	return ( eereg & mask );
+}
+
+static void rtl_spi_write_bit ( struct bit_basher *basher,
+				unsigned int bit_id, unsigned long data ) {
+	struct rtl8139_nic *rtl = container_of ( basher, struct rtl8139_nic,
+						 spibit.basher );
+	uint8_t mask = rtl_ee_bits[bit_id];
+	uint8_t eereg;
+
+	eereg = inb ( rtl->ioaddr + Cfg9346 );
+	eereg &= ~mask;
+	eereg |= ( data & mask );
+	outb ( eereg, rtl->ioaddr + Cfg9346 );
+}
+
+static struct bit_basher_operations rtl_basher_ops = {
+	.read = rtl_spi_read_bit,
+	.write = rtl_spi_write_bit,
+};
+
+/**
+ * Set up for EEPROM access
+ *
+ * @v netdev		Net device
+ */
+static void rtl_init_eeprom ( struct net_device *netdev ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+	int ee9356;
+	int vpd;
+
+	/* Initialise three-wire bus */
+	rtl->spibit.basher.op = &rtl_basher_ops;
+	rtl->spibit.bus.mode = SPI_MODE_THREEWIRE;
+	init_spi_bit_basher ( &rtl->spibit );
+
+	/* Detect EEPROM type and initialise three-wire device */
+	ee9356 = ( inw ( rtl->ioaddr + RxConfig ) & Eeprom9356 );
+	if ( ee9356 ) {
+		DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C56\n", rtl );
+		init_at93c56 ( &rtl->eeprom, 16 );
+	} else {
+		DBGC ( rtl, "rtl8139 %p EEPROM is an AT93C46\n", rtl );
+		init_at93c46 ( &rtl->eeprom, 16 );
+	}
+	rtl->eeprom.bus = &rtl->spibit.bus;
+
+	/* Initialise space for non-volatile options, if available
+	 *
+	 * We use offset 0x40 (i.e. address 0x20), length 0x40.  This
+	 * block is marked as VPD in the rtl8139 datasheets, so we use
+	 * it only if we detect that the card is not supporting VPD.
+	 */
+	vpd = ( inw ( rtl->ioaddr + Config1 ) & VPDEnable );
+	if ( vpd ) {
+		DBGC ( rtl, "rtl8139 %p EEPROM in use for VPD; cannot use "
+		       "for options\n", rtl );
+	} else {
+		nvo_init ( &rtl->nvo, &rtl->eeprom.nvs, 0x20, 0x40, NULL,
+			   &netdev->refcnt );
+	}
+}
+
+/**
+ * Reset NIC
+ *
+ * @v netdev		Net device
+ *
+ * Issues a hardware reset and waits for the reset to complete.
+ */
+static void rtl_reset ( struct net_device *netdev ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+
+	/* Reset chip */
+	outb ( CmdReset, rtl->ioaddr + ChipCmd );
+	mdelay ( 10 );
+	memset ( &rtl->tx, 0, sizeof ( rtl->tx ) );
+	rtl->rx.offset = 0;
+}
+
+/**
+ * Open NIC
+ *
+ * @v netdev		Net device
+ * @ret rc		Return status code
+ */
+static int rtl_open ( struct net_device *netdev ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+	int i;
+
+	/* Program the MAC address */
+	for ( i = 0 ; i < ETH_ALEN ; i++ )
+		outb ( netdev->ll_addr[i], rtl->ioaddr + MAC0 + i );
+
+	/* Set up RX ring */
+	rtl->rx.ring = malloc ( RX_BUF_LEN + RX_BUF_PAD );
+	if ( ! rtl->rx.ring )
+		return -ENOMEM;
+	outl ( virt_to_bus ( rtl->rx.ring ), rtl->ioaddr + RxBuf );
+	DBGC ( rtl, "rtl8139 %p RX ring at %lx\n",
+	       rtl, virt_to_bus ( rtl->rx.ring ) );
+
+	/* Enable TX and RX */
+	outb ( ( CmdRxEnb | CmdTxEnb ), rtl->ioaddr + ChipCmd );
+	outl ( ( ( RX_FIFO_THRESH << 13 ) | ( RX_BUF_LEN_IDX << 11 ) |
+		 ( RX_DMA_BURST << 8 ) | AcceptBroadcast | AcceptMulticast |
+		 AcceptMyPhys | AcceptAllPhys ), rtl->ioaddr + RxConfig );
+	outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 0 );
+	outl ( 0xffffffffUL, rtl->ioaddr + MAR0 + 4 );
+	outl ( ( ( TX_DMA_BURST << 8 ) | ( TX_IPG << 24 ) ),
+	       rtl->ioaddr + TxConfig );
+
+	return 0;
+}
+
+/**
+ * Close NIC
+ *
+ * @v netdev		Net device
+ */
+static void rtl_close ( struct net_device *netdev ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+
+	/* Reset the hardware to disable everything in one go */
+	rtl_reset ( netdev );
+
+	/* Free RX ring */
+	free ( rtl->rx.ring );
+	rtl->rx.ring = NULL;
+}
+
+/** 
+ * Transmit packet
+ *
+ * @v netdev	Network device
+ * @v iobuf	I/O buffer
+ * @ret rc	Return status code
+ */
+static int rtl_transmit ( struct net_device *netdev,
+			  struct io_buffer *iobuf ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+
+	/* Check for space in TX ring */
+	if ( rtl->tx.iobuf[rtl->tx.next] != NULL ) {
+		DBGC ( rtl, "rtl8139 %p TX overflow\n", rtl );
+		return -ENOBUFS;
+	}
+
+	/* Check for oversized packets */
+	if ( iob_len ( iobuf ) >= TX_MAX_LEN ) {
+		DBGC ( rtl, "rtl8139 %p TX too large (%zd bytes)\n",
+		       rtl, iob_len ( iobuf ) );
+		return -ERANGE;
+	}
+
+	/* Pad and align packet */
+	iob_pad ( iobuf, ETH_ZLEN );
+
+	/* Add to TX ring */
+	DBGC2 ( rtl, "rtl8139 %p TX id %d at %lx+%zx\n", rtl, rtl->tx.next,
+		virt_to_bus ( iobuf->data ), iob_len ( iobuf ) );
+	rtl->tx.iobuf[rtl->tx.next] = iobuf;
+	outl ( virt_to_bus ( iobuf->data ),
+	       rtl->ioaddr + TxAddr0 + 4 * rtl->tx.next );
+	outl ( ( ( ( TX_FIFO_THRESH & 0x7e0 ) << 11 ) | iob_len ( iobuf ) ),
+	       rtl->ioaddr + TxStatus0 + 4 * rtl->tx.next );
+	rtl->tx.next = ( rtl->tx.next + 1 ) % TX_RING_SIZE;
+
+	return 0;
+}
+
+/**
+ * Poll for received packets
+ *
+ * @v netdev	Network device
+ */
+static void rtl_poll ( struct net_device *netdev ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+	unsigned int status;
+	unsigned int tsad;
+	unsigned int rx_status;
+	unsigned int rx_len;
+	struct io_buffer *rx_iob;
+	int wrapped_len;
+	int i;
+
+	/* Acknowledge interrupts */
+	status = inw ( rtl->ioaddr + IntrStatus );
+	if ( ! status )
+		return;
+	outw ( status, rtl->ioaddr + IntrStatus );
+
+	/* Handle TX completions */
+	tsad = inw ( rtl->ioaddr + TxSummary );
+	for ( i = 0 ; i < TX_RING_SIZE ; i++ ) {
+		if ( ( rtl->tx.iobuf[i] != NULL ) && ( tsad & ( 1 << i ) ) ) {
+			DBGC2 ( rtl, "rtl8139 %p TX id %d complete\n",
+				rtl, i );
+			netdev_tx_complete ( netdev, rtl->tx.iobuf[i] );
+			rtl->tx.iobuf[i] = NULL;
+		}
+	}
+
+	/* Handle received packets */
+	while ( ! ( inb ( rtl->ioaddr + ChipCmd ) & RxBufEmpty ) ) {
+		rx_status = * ( ( uint16_t * )
+				( rtl->rx.ring + rtl->rx.offset ) );
+		rx_len = * ( ( uint16_t * )
+			     ( rtl->rx.ring + rtl->rx.offset + 2 ) );
+		if ( rx_status & RxOK ) {
+			DBGC2 ( rtl, "rtl8139 %p RX packet at offset "
+				"%x+%x\n", rtl, rtl->rx.offset, rx_len );
+
+			rx_iob = alloc_iob ( rx_len );
+			if ( ! rx_iob ) {
+				netdev_rx_err ( netdev, NULL, -ENOMEM );
+				/* Leave packet for next call to poll() */
+				break;
+			}
+
+			wrapped_len = ( ( rtl->rx.offset + 4 + rx_len )
+					- RX_BUF_LEN );
+			if ( wrapped_len < 0 )
+				wrapped_len = 0;
+
+			memcpy ( iob_put ( rx_iob, rx_len - wrapped_len ),
+				 rtl->rx.ring + rtl->rx.offset + 4,
+				 rx_len - wrapped_len );
+			memcpy ( iob_put ( rx_iob, wrapped_len ),
+				 rtl->rx.ring, wrapped_len );
+			iob_unput ( rx_iob, 4 ); /* Strip CRC */
+
+			netdev_rx ( netdev, rx_iob );
+		} else {
+			DBGC ( rtl, "rtl8139 %p RX bad packet (status %#04x "
+			       "len %d)\n", rtl, rx_status, rx_len );
+			netdev_rx_err ( netdev, NULL, -EINVAL );
+		}
+		rtl->rx.offset = ( ( ( rtl->rx.offset + 4 + rx_len + 3 ) & ~3 )
+				   % RX_BUF_LEN );
+		outw ( rtl->rx.offset - 16, rtl->ioaddr + RxBufPtr );
+	}
+}
+
+/**
+ * Enable/disable interrupts
+ *
+ * @v netdev	Network device
+ * @v enable	Interrupts should be enabled
+ */
+static void rtl_irq ( struct net_device *netdev, int enable ) {
+	struct rtl8139_nic *rtl = netdev->priv;
+
+	DBGC ( rtl, "rtl8139 %p interrupts %s\n",
+	       rtl, ( enable ? "enabled" : "disabled" ) );
+	outw ( ( enable ? ( ROK | RER | TOK | TER ) : 0 ),
+	       rtl->ioaddr + IntrMask );
+}
+
+/** RTL8139 net device operations */
+static struct net_device_operations rtl_operations = {
+	.open		= rtl_open,
+	.close		= rtl_close,
+	.transmit	= rtl_transmit,
+	.poll		= rtl_poll,
+	.irq		= rtl_irq,
+};
+
+/**
+ * Probe PCI device
+ *
+ * @v pci	PCI device
+ * @v id	PCI ID
+ * @ret rc	Return status code
+ */
+static int rtl_probe ( struct pci_device *pci ) {
+	struct net_device *netdev;
+	struct rtl8139_nic *rtl;
+	int rc;
+
+	/* Allocate net device */
+	netdev = alloc_etherdev ( sizeof ( *rtl ) );
+	if ( ! netdev )
+		return -ENOMEM;
+	netdev_init ( netdev, &rtl_operations );
+	rtl = netdev->priv;
+	pci_set_drvdata ( pci, netdev );
+	netdev->dev = &pci->dev;
+	memset ( rtl, 0, sizeof ( *rtl ) );
+	rtl->ioaddr = pci->ioaddr;
+
+	/* Fix up PCI device */
+	adjust_pci_device ( pci );
+
+	/* Reset the NIC, set up EEPROM access and read MAC address */
+	rtl_reset ( netdev );
+	rtl_init_eeprom ( netdev );
+	nvs_read ( &rtl->eeprom.nvs, EE_MAC, netdev->hw_addr, ETH_ALEN );
+
+	/* Register network device */
+	if ( ( rc = register_netdev ( netdev ) ) != 0 )
+		goto err_register_netdev;
+
+	/* Mark as link up; we don't yet handle link state */
+	netdev_link_up ( netdev );
+
+	/* Register non-volatile storage */
+	if ( rtl->nvo.nvs ) {
+		if ( ( rc = register_nvo ( &rtl->nvo,
+					   netdev_settings ( netdev ) ) ) != 0)
+			goto err_register_nvo;
+	}
+
+	return 0;
+
+ err_register_nvo:
+	unregister_netdev ( netdev );
+ err_register_netdev:
+	rtl_reset ( netdev );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+	return rc;
+}
+
+/**
+ * Remove PCI device
+ *
+ * @v pci	PCI device
+ */
+static void rtl_remove ( struct pci_device *pci ) {
+	struct net_device *netdev = pci_get_drvdata ( pci );
+	struct rtl8139_nic *rtl = netdev->priv;
+
+	if ( rtl->nvo.nvs )
+		unregister_nvo ( &rtl->nvo );
+	unregister_netdev ( netdev );
+	rtl_reset ( netdev );
+	netdev_nullify ( netdev );
+	netdev_put ( netdev );
+}
+
+static struct pci_device_id rtl8139_nics[] = {
+PCI_ROM(0x10ec, 0x8129, "rtl8129",       "Realtek 8129", 0),
+PCI_ROM(0x10ec, 0x8139, "rtl8139",       "Realtek 8139", 0),
+PCI_ROM(0x10ec, 0x8138, "rtl8139b",      "Realtek 8139B", 0),
+PCI_ROM(0x1186, 0x1300, "dfe538",        "DFE530TX+/DFE538TX", 0),
+PCI_ROM(0x1113, 0x1211, "smc1211-1",     "SMC EZ10/100", 0),
+PCI_ROM(0x1112, 0x1211, "smc1211",       "SMC EZ10/100", 0),
+PCI_ROM(0x1500, 0x1360, "delta8139",     "Delta Electronics 8139", 0),
+PCI_ROM(0x4033, 0x1360, "addtron8139",   "Addtron Technology 8139", 0),
+PCI_ROM(0x1186, 0x1340, "dfe690txd",     "D-Link DFE690TXD", 0),
+PCI_ROM(0x13d1, 0xab06, "fe2000vx",      "AboCom FE2000VX", 0),
+PCI_ROM(0x1259, 0xa117, "allied8139",    "Allied Telesyn 8139", 0),
+PCI_ROM(0x14ea, 0xab06, "fnw3603tx",     "Planex FNW-3603-TX", 0),
+PCI_ROM(0x14ea, 0xab07, "fnw3800tx",     "Planex FNW-3800-TX", 0),
+PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139", 0),
+};
+
+struct pci_driver rtl8139_driver __pci_driver = {
+	.ids = rtl8139_nics,
+	.id_count = ( sizeof ( rtl8139_nics ) / sizeof ( rtl8139_nics[0] ) ),
+	.probe = rtl_probe,
+	.remove = rtl_remove,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rtl818x/rtl8185_rtl8225.c ipxe-1.0.1~lliurex1505/src/drivers/net/rtl818x/rtl8185_rtl8225.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/rtl818x/rtl8185_rtl8225.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/rtl818x/rtl8185_rtl8225.c	2012-01-06 23:49:04.000000000 +0000
@@ -71,7 +71,7 @@
 	udelay(10);
 
 	for (i = 15; i >= 0; i--) {
-		u16 reg = ( reg80 | ( ( bangdata >> i ) & 1 ) );
+		u16 reg = reg80 | !!(bangdata & (1 << i));
 
 		if (i & 1)
 			rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sis190.h ipxe-1.0.1~lliurex1505/src/drivers/net/sis190.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sis190.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/sis190.h	2012-01-06 23:49:04.000000000 +0000
@@ -77,7 +77,7 @@
 	IntrStatus		= 0x20,
 	IntrMask		= 0x24,
 	IntrControl		= 0x28,
-	IntrTimer		= 0x2c,	// unused (Interrupt Timer)
+	IntrTimer		= 0x2c,	// unused (Interupt Timer)
 	PMControl		= 0x30,	// unused (Power Mgmt Control/Status)
 	rsv2			= 0x34,	// reserved
 	ROMControl		= 0x38,
@@ -218,7 +218,7 @@
 	RxSizeMask	= 0x0000ffff
 	/*
 	* The asic could apparently do vlan, TSO, jumbo (sis191 only) and
-	* provide two (unused with Linux) Tx queues. No publicly
+	* provide two (unused with Linux) Tx queues. No publically
 	* available documentation alas.
 	*/
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sis900.c ipxe-1.0.1~lliurex1505/src/drivers/net/sis900.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sis900.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/sis900.c	2012-01-06 23:49:04.000000000 +0000
@@ -111,7 +111,7 @@
 //  {"NS 83851 PHY",0x2000, 0x5C20, MIX },
     {"RTL 8201 10/100Mbps Phyceiver"   , 0x0000, 0x8200,rtl8201_read_mode},
     {"VIA 6103 10/100Mbps Phyceiver", 0x0101, 0x8f20,vt6103_read_mode},
-    {NULL,0,0,NULL}
+    {0,0,0,0}
 };
 
 static struct mii_phy {
@@ -328,7 +328,7 @@
  *
  * Side effects:
  *            leaves the ioaddress of the sis900 chip in the variable ioaddr.
- *            leaves the sis900 initialized, and ready to receive packets.
+ *            leaves the sis900 initialized, and ready to recieve packets.
  *
  * Returns:   struct nic *:          pointer to NIC data structure
  */
@@ -394,7 +394,7 @@
 
         mii_status = sis900_mdio_read(phy_addr, MII_STATUS);
         if (mii_status == 0xffff || mii_status == 0x0000)
-            /* the mii is not accessible, try next one */
+            /* the mii is not accessable, try next one */
             continue;
                 
         phy_id0 = sis900_mdio_read(phy_addr, MII_PHY_ID0);
@@ -508,7 +508,7 @@
 /* 
    Read and write the MII management registers using software-generated
    serial MDIO protocol. Note that the command bits and data bits are
-   sent out separately
+   send out seperately 
 */
 
 static void sis900_mdio_idle(long mdio_addr)
@@ -1171,8 +1171,8 @@
  *
  * Arguments: struct nic *nic:          NIC data structure
  *
- * Returns:   1 if a packet was received.
- *            0 if no packet was received.
+ * Returns:   1 if a packet was recieved.
+ *            0 if no pacet was recieved.
  *
  * Side effects:
  *            Returns (copies) the packet to the array nic->packet.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skeleton.c ipxe-1.0.1~lliurex1505/src/drivers/net/skeleton.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skeleton.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/skeleton.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,310 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/mii.h>
-#include "skeleton.h"
-
-/** @file
- *
- * Skeleton network driver
- *
- */
-
-/******************************************************************************
- *
- * MII interface
- *
- ******************************************************************************
- */
-
-/**
- * Read from MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @ret value		Data read, or negative error
- */
-static int skeleton_mii_read ( struct mii_interface *mii, unsigned int reg ) {
-	struct skeleton_nic *skel =
-		container_of ( mii, struct skeleton_nic, mii );
-
-	DBGC ( skel, "SKELETON %p does not yet support MII read\n", skel );
-	( void ) reg;
-	return -ENOTSUP;
-}
-
-/**
- * Write to MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @v data		Data to write
- * @ret rc		Return status code
- */
-static int skeleton_mii_write ( struct mii_interface *mii, unsigned int reg,
-				unsigned int data) {
-	struct skeleton_nic *skel =
-		container_of ( mii, struct skeleton_nic, mii );
-
-	DBGC ( skel, "SKELETON %p does not yet support MII write\n", skel );
-	( void ) reg;
-	( void ) data;
-	return -ENOTSUP;
-}
-
-/** Skeleton MII operations */
-static struct mii_operations skeleton_mii_operations = {
-	.read = skeleton_mii_read,
-	.write = skeleton_mii_write,
-};
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reset hardware
- *
- * @v skel		Skeleton device
- * @ret rc		Return status code
- */
-static int skeleton_reset ( struct skeleton_nic *skel ) {
-
-	DBGC ( skel, "SKELETON %p does not yet support reset\n", skel );
-	return -ENOTSUP;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void skeleton_check_link ( struct net_device *netdev ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	DBGC ( skel, "SKELETON %p does not yet support link state\n", skel );
-	netdev_link_err ( netdev, -ENOTSUP );
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int skeleton_open ( struct net_device *netdev ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	DBGC ( skel, "SKELETON %p does not yet support open\n", skel );
-	return -ENOTSUP;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void skeleton_close ( struct net_device *netdev ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	DBGC ( skel, "SKELETON %p does not yet support close\n", skel );
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int skeleton_transmit ( struct net_device *netdev,
-			       struct io_buffer *iobuf ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	DBGC ( skel, "SKELETON %p does not yet support transmit\n", skel );
-	( void ) iobuf;
-	return -ENOTSUP;
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void skeleton_poll ( struct net_device *netdev ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	/* Not yet implemented */
-	( void ) skel;
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void skeleton_irq ( struct net_device *netdev, int enable ) {
-	struct skeleton_nic *skel = netdev->priv;
-
-	DBGC ( skel, "SKELETON %p does not yet support interrupts\n", skel );
-	( void ) enable;
-}
-
-/** Skeleton network device operations */
-static struct net_device_operations skeleton_operations = {
-	.open		= skeleton_open,
-	.close		= skeleton_close,
-	.transmit	= skeleton_transmit,
-	.poll		= skeleton_poll,
-	.irq		= skeleton_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int skeleton_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct skeleton_nic *skel;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *skel ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &skeleton_operations );
-	skel = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-	memset ( skel, 0, sizeof ( *skel ) );
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	skel->regs = ioremap ( pci->membase, SKELETON_BAR_SIZE );
-
-	/* Reset the NIC */
-	if ( ( rc = skeleton_reset ( skel ) ) != 0 )
-		goto err_reset;
-
-	/* Initialise and reset MII interface */
-	mii_init ( &skel->mii, &skeleton_mii_operations );
-	if ( ( rc = mii_reset ( &skel->mii ) ) != 0 ) {
-		DBGC ( skel, "SKELETON %p could not reset MII: %s\n",
-		       skel, strerror ( rc ) );
-		goto err_mii_reset;
-	}
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	/* Set initial link state */
-	skeleton_check_link ( netdev );
-
-	return 0;
-
-	unregister_netdev ( netdev );
- err_register_netdev:
- err_mii_reset:
-	skeleton_reset ( skel );
- err_reset:
-	iounmap ( skel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void skeleton_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct skeleton_nic *skel = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	skeleton_reset ( skel );
-
-	/* Free network device */
-	iounmap ( skel->regs );
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Skeleton PCI device IDs */
-static struct pci_device_id skeleton_nics[] = {
-	PCI_ROM ( 0x5ce1, 0x5ce1, "skel",	"Skeleton", 0 ),
-};
-
-/** Skeleton PCI driver */
-struct pci_driver skeleton_driver __pci_driver = {
-	.ids = skeleton_nics,
-	.id_count = ( sizeof ( skeleton_nics ) / sizeof ( skeleton_nics[0] ) ),
-	.probe = skeleton_probe,
-	.remove = skeleton_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skeleton.h ipxe-1.0.1~lliurex1505/src/drivers/net/skeleton.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skeleton.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/skeleton.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,23 +0,0 @@
-#ifndef _SKELETON_H
-#define _SKELETON_H
-
-/** @file
- *
- * Skeleton network driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** Skeleton BAR size */
-#define SKELETON_BAR_SIZE 256
-
-/** A skeleton network card */
-struct skeleton_nic {
-	/** Registers */
-	void *regs;
-	/** MII interface */
-	struct mii_interface mii;
-};
-
-#endif /* _SKELETON_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skge.c ipxe-1.0.1~lliurex1505/src/drivers/net/skge.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skge.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/skge.c	2012-01-06 23:49:04.000000000 +0000
@@ -24,8 +24,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_ONLY );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skge.h ipxe-1.0.1~lliurex1505/src/drivers/net/skge.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/skge.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/skge.h	2012-01-06 23:49:04.000000000 +0000
@@ -1095,7 +1095,7 @@
 
 	PHY_ST_PRE_SUP	= 1<<6, /* Bit  6:	Preamble Suppression */
 	PHY_ST_AN_OVER	= 1<<5, /* Bit  5:	Auto-Negotiation Over */
-	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occurred */
+	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occured */
 	PHY_ST_AN_CAP	= 1<<3, /* Bit  3:	Auto-Negotiation Capability */
 	PHY_ST_LSYNC	= 1<<2, /* Bit  2:	Link Synchronized */
 	PHY_ST_JAB_DET	= 1<<1, /* Bit  1:	Jabber Detected */
@@ -1778,8 +1778,8 @@
 	GM_GPSR_LINK_UP		= 1<<12, /* Bit 12:	Link Up Status */
 	GM_GPSR_PAUSE		= 1<<11, /* Bit 11:	Pause State */
 	GM_GPSR_TX_ACTIVE	= 1<<10, /* Bit 10:	Tx in Progress */
-	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occurred */
-	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occurred */
+	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occured */
+	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occured */
 
 	GM_GPSR_PHY_ST_CH	= 1<<5,	/* Bit  5:	PHY Status Change */
 	GM_GPSR_GIG_SPEED	= 1<<4,	/* Bit  4:	Gigabit Speed (1 = 1000 Mbps) */
@@ -2284,7 +2284,7 @@
 	XM_ST_BC	= 1<<7,		/* Bit  7:	Broadcast packet */
 	XM_ST_MC	= 1<<6,		/* Bit  6:	Multicast packet */
 	XM_ST_UC	= 1<<5,		/* Bit  5:	Unicast packet */
-	XM_ST_TX_UR	= 1<<4,		/* Bit  4:	FIFO Underrun occurred */
+	XM_ST_TX_UR	= 1<<4,		/* Bit  4:	FIFO Underrun occured */
 	XM_ST_CS_ERR	= 1<<3,		/* Bit  3:	Carrier Sense Error */
 	XM_ST_LAT_COL	= 1<<2,		/* Bit  2:	Late Collision Error */
 	XM_ST_MUL_COL	= 1<<1,		/* Bit  1:	Multiple Collisions */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sky2.c ipxe-1.0.1~lliurex1505/src/drivers/net/sky2.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sky2.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/sky2.c	2012-01-06 23:49:04.000000000 +0000
@@ -21,8 +21,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_ONLY );
@@ -783,7 +782,7 @@
 	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
 	sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
 
-	/* On chips without ram buffer, pause is controlled by MAC level */
+	/* On chips without ram buffer, pause is controled by MAC level */
 	if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
 		sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
 		sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
@@ -2335,7 +2334,7 @@
 			sky2_show_addr(dev1);
 	}
 
-	pci_set_drvdata(pdev, hw);
+	pci_set_drvdata(pdev, dev);
 
 	return 0;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sky2.h ipxe-1.0.1~lliurex1505/src/drivers/net/sky2.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sky2.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/sky2.h	2012-01-06 23:49:04.000000000 +0000
@@ -1056,7 +1056,7 @@
 
 	PHY_ST_PRE_SUP	= 1<<6, /* Bit  6:	Preamble Suppression */
 	PHY_ST_AN_OVER	= 1<<5, /* Bit  5:	Auto-Negotiation Over */
-	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occurred */
+	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occured */
 	PHY_ST_AN_CAP	= 1<<3, /* Bit  3:	Auto-Negotiation Capability */
 	PHY_ST_LSYNC	= 1<<2, /* Bit  2:	Link Synchronized */
 	PHY_ST_JAB_DET	= 1<<1, /* Bit  1:	Jabber Detected */
@@ -1587,8 +1587,8 @@
 	GM_GPSR_LINK_UP		= 1<<12, /* Bit 12:	Link Up Status */
 	GM_GPSR_PAUSE		= 1<<11, /* Bit 11:	Pause State */
 	GM_GPSR_TX_ACTIVE	= 1<<10, /* Bit 10:	Tx in Progress */
-	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occurred */
-	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occurred */
+	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occured */
+	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occured */
 
 	GM_GPSR_PHY_ST_CH	= 1<<5,	/* Bit  5:	PHY Status Change */
 	GM_GPSR_GIG_SPEED	= 1<<4,	/* Bit  4:	Gigabit Speed (1 = 1000 Mbps) */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/smc9000.h ipxe-1.0.1~lliurex1505/src/drivers/net/smc9000.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/smc9000.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/smc9000.h	2012-01-06 23:49:04.000000000 +0000
@@ -107,7 +107,7 @@
 #define RPC_LED_10      (0x02)  // LED = 10Mbps link detect
 #define RPC_LED_FD      (0x03)  // LED = Full Duplex Mode
 #define RPC_LED_TX_RX   (0x04)  // LED = TX or RX packet occurred
-#define RPC_LED_100     (0x05)  // LED = 100Mbps link detect
+#define RPC_LED_100     (0x05)  // LED = 100Mbps link dectect
 #define RPC_LED_TX      (0x06)  // LED = TX packet occurred
 #define RPC_LED_RX      (0x07)  // LED = RX packet occurred
 #define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
@@ -125,7 +125,7 @@
 #define RPC_LED_10      (0x02)  // LED = 10Mbps link detect
 #define RPC_LED_FD      (0x03)  // LED = Full Duplex Mode
 #define RPC_LED_TX_RX   (0x04)  // LED = TX or RX packet occurred
-#define RPC_LED_100     (0x05)  // LED = 100Mbps link detect
+#define RPC_LED_100     (0x05)  // LED = 100Mbps link dectect
 #define RPC_LED_TX      (0x06)  // LED = TX packet occurred
 #define RPC_LED_RX      (0x07)  // LED = RX packet occurred
 #define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sundance.c ipxe-1.0.1~lliurex1505/src/drivers/net/sundance.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/sundance.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/sundance.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code based on:
 *               sundance.c: A Linux device driver for the Sundance ST201 "Alta"
@@ -258,7 +257,7 @@
 	const char *nic_name;
 	/* Frequently used values */
 
-	unsigned int cur_rx;	/* Producer/consumer ring indices */
+	unsigned int cur_rx;	/* Producer/consumer ring indicies */
 	unsigned int mtu;
 
 	/* These values keep track of the tranceiver/media in use */
@@ -441,7 +440,7 @@
 /**************************************************************************
 POLL - Wait for a frame
 ***************************************************************************/
-static int sundance_poll(struct nic *nic, int retrieve)
+static int sundance_poll(struct nic *nic, int retreive)
 {
 	/* return true if there's an ethernet packet ready to read */
 	/* nic->packet should contain data on return */
@@ -455,7 +454,7 @@
 		return 0;
 
 	/* There is a packet ready */
-	if(!retrieve)
+	if(!retreive)
 		return 1;
 
 	intr_status = inw(nic->ioaddr + IntrStatus);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3.c ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,945 +0,0 @@
-
-FILE_LICENCE ( GPL2_ONLY );
-
-#include <mii.h>
-#include <stdio.h>
-#include <errno.h>
-#include <unistd.h>
-#include <byteswap.h>
-#include <ipxe/pci.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/timer.h>
-#include <ipxe/malloc.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/netdevice.h>
-
-#include "tg3.h"
-
-#define TG3_DEF_RX_MODE		0
-#define TG3_DEF_TX_MODE		0
-
-static void tg3_refill_prod_ring(struct tg3 *tp);
-
-/* Do not place this n-ring entries value into the tp struct itself,
- * we really want to expose these constants to GCC so that modulo et
- * al.  operations are done with shifts and masks instead of with
- * hw multiply/modulo instructions.  Another solution would be to
- * replace things like '% foo' with '& (foo - 1)'.
- */
-
-#define TG3_TX_RING_BYTES	(sizeof(struct tg3_tx_buffer_desc) * \
-				 TG3_TX_RING_SIZE)
-
-/* FIXME: does TG3_RX_RET_MAX_SIZE_5705 work for all cards? */
-#define TG3_RX_RCB_RING_BYTES(tp) \
-	(sizeof(struct tg3_rx_buffer_desc) * (TG3_RX_RET_MAX_SIZE_5705))
-
-#define TG3_RX_STD_RING_BYTES(tp) \
-	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
-
-void tg3_rx_prodring_fini(struct tg3_rx_prodring_set *tpr)
-{	DBGP("%s\n", __func__);
-
-	if (tpr->rx_std) {
-		free_dma(tpr->rx_std, TG3_RX_STD_RING_BYTES(tp));
-		tpr->rx_std = NULL;
-	}
-}
-
-/*
- * Must not be invoked with interrupt sources disabled and
- * the hardware shutdown down.
- */
-static void tg3_free_consistent(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tp->tx_ring) {
-		free_dma(tp->tx_ring, TG3_TX_RING_BYTES);
-		tp->tx_ring = NULL;
-	}
-
-	free(tp->tx_buffers);
-	tp->tx_buffers = NULL;
-
-	if (tp->rx_rcb) {
-		free_dma(tp->rx_rcb, TG3_RX_RCB_RING_BYTES(tp));
-		tp->rx_rcb_mapping = 0;
-		tp->rx_rcb = NULL;
-	}
-
-	tg3_rx_prodring_fini(&tp->prodring);
-
-	if (tp->hw_status) {
-		free_dma(tp->hw_status, TG3_HW_STATUS_SIZE);
-		tp->status_mapping = 0;
-		tp->hw_status = NULL;
-	}
-}
-
-/*
- * Must not be invoked with interrupt sources disabled and
- * the hardware shutdown down.  Can sleep.
- */
-int tg3_alloc_consistent(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	struct tg3_hw_status *sblk;
-	struct tg3_rx_prodring_set *tpr = &tp->prodring;
-
-	tp->hw_status = malloc_dma(TG3_HW_STATUS_SIZE, TG3_DMA_ALIGNMENT);
-	if (!tp->hw_status) {
-		DBGC(tp->dev, "hw_status alloc failed\n");
-		goto err_out;
-	}
-	tp->status_mapping = virt_to_bus(tp->hw_status);
-
-	memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
-	sblk = tp->hw_status;
-
-	tpr->rx_std = malloc_dma(TG3_RX_STD_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
-	if (!tpr->rx_std) {
-		DBGC(tp->dev, "rx prodring alloc failed\n");
-		goto err_out;
-	}
-	tpr->rx_std_mapping = virt_to_bus(tpr->rx_std);
-	memset(tpr->rx_std, 0, TG3_RX_STD_RING_BYTES(tp));
-
-	tp->tx_buffers = zalloc(sizeof(struct ring_info) * TG3_TX_RING_SIZE);
-	if (!tp->tx_buffers)
-		goto err_out;
-
-	tp->tx_ring = malloc_dma(TG3_TX_RING_BYTES, TG3_DMA_ALIGNMENT);
-	if (!tp->tx_ring)
-		goto err_out;
-	tp->tx_desc_mapping = virt_to_bus(tp->tx_ring);
-
-	/*
-	 * When RSS is enabled, the status block format changes
-	 * slightly.  The "rx_jumbo_consumer", "reserved",
-	 * and "rx_mini_consumer" members get mapped to the
-	 * other three rx return ring producer indexes.
-	 */
-
-	tp->rx_rcb_prod_idx = &sblk->idx[0].rx_producer;
-
-	tp->rx_rcb = malloc_dma(TG3_RX_RCB_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
-	if (!tp->rx_rcb)
-		goto err_out;
-	tp->rx_rcb_mapping = virt_to_bus(tp->rx_rcb);
-
-	memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
-
-	return 0;
-
-err_out:
-	tg3_free_consistent(tp);
-	return -ENOMEM;
-}
-
-#define TG3_RX_STD_BUFF_RING_BYTES(tp) \
-	(sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)
-#define TG3_RX_STD_RING_BYTES(tp) \
-	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
-
-/* Initialize rx rings for packet processing.
- *
- * The chip has been shut down and the driver detached from
- * the networking, so no interrupts or new tx packets will
- * end up in the driver.
- */
-static int tg3_rx_prodring_alloc(struct tg3 __unused *tp,
-				 struct tg3_rx_prodring_set *tpr)
-{	DBGP("%s\n", __func__);
-
-	u32 i;
-
-	tpr->rx_std_cons_idx = 0;
-	tpr->rx_std_prod_idx = 0;
-
-	/* Initialize invariants of the rings, we only set this
-	 * stuff once.  This works because the card does not
-	 * write into the rx buffer posting rings.
-	 */
-	/* FIXME: does TG3_RX_STD_MAX_SIZE_5700 work on all cards? */
-	for (i = 0; i < TG3_RX_STD_MAX_SIZE_5700; i++) {
-		struct tg3_rx_buffer_desc *rxd;
-
-		rxd = &tpr->rx_std[i];
-		rxd->idx_len = (TG3_RX_STD_DMA_SZ - 64 - 2) << RXD_LEN_SHIFT;
-		rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT);
-		rxd->opaque = (RXD_OPAQUE_RING_STD |
-			       (i << RXD_OPAQUE_INDEX_SHIFT));
-	}
-
-	return 0;
-}
-
-static void tg3_rx_iob_free(struct io_buffer *iobs[], int i)
-{	DBGP("%s\n", __func__);
-
-	if (iobs[i] == NULL)
-		return;
-
-	free_iob(iobs[i]);
-	iobs[i] = NULL;
-}
-
-static void tg3_rx_prodring_free(struct tg3_rx_prodring_set *tpr)
-{	DBGP("%s\n", __func__);
-
-	unsigned int i;
-
-	for (i = 0; i < TG3_DEF_RX_RING_PENDING; i++)
-		tg3_rx_iob_free(tpr->rx_iobufs, i);
-}
-
-/* Initialize tx/rx rings for packet processing.
- *
- * The chip has been shut down and the driver detached from
- * the networking, so no interrupts or new tx packets will
- * end up in the driver.
- */
-int tg3_init_rings(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	/* Free up all the SKBs. */
-///	tg3_free_rings(tp);
-
-	tp->last_tag = 0;
-	tp->last_irq_tag = 0;
-	tp->hw_status->status = 0;
-	tp->hw_status->status_tag = 0;
-	memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
-
-	tp->tx_prod = 0;
-	tp->tx_cons = 0;
-	if (tp->tx_ring)
-		memset(tp->tx_ring, 0, TG3_TX_RING_BYTES);
-
-	tp->rx_rcb_ptr = 0;
-	if (tp->rx_rcb)
-		memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
-
-	if (tg3_rx_prodring_alloc(tp, &tp->prodring)) {
-		DBGC(tp->dev, "tg3_rx_prodring_alloc() failed\n");
-		tg3_rx_prodring_free(&tp->prodring);
-		return -ENOMEM;
-	}
-
-	return 0;
-}
-
-static int tg3_open(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-	struct tg3_rx_prodring_set *tpr = &tp->prodring;
-	int err = 0;
-
-	tg3_set_power_state_0(tp);
-
-	/* Initialize MAC address and backoff seed. */
-	__tg3_set_mac_addr(tp, 0);
-
-	err = tg3_alloc_consistent(tp);
-	if (err)
-		return err;
-
-	tpr->rx_std_iob_cnt = 0;
-
-	err = tg3_init_hw(tp, 1);
-	if (err != 0)
-		DBGC(tp->dev, "tg3_init_hw failed: %s\n", strerror(err));
-	else
-		tg3_refill_prod_ring(tp);
-
-	return err;
-}
-
-static inline u32 tg3_tx_avail(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	/* Tell compiler to fetch tx indices from memory. */
-	barrier();
-	return TG3_DEF_TX_RING_PENDING -
-	       ((tp->tx_prod - tp->tx_cons) & (TG3_TX_RING_SIZE - 1));
-}
-
-#if 0
-/**
- *
- * Prints all registers that could cause a set ERR bit in hw_status->status
- */
-static void tg3_dump_err_reg(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-		printf("FLOW_ATTN: %#08x\n", tr32(HOSTCC_FLOW_ATTN));
-		printf("MAC ATTN: %#08x\n", tr32(MAC_STATUS));
-		printf("MSI STATUS: %#08x\n", tr32(MSGINT_STATUS));
-		printf("DMA RD: %#08x\n", tr32(RDMAC_STATUS));
-		printf("DMA WR: %#08x\n", tr32(WDMAC_STATUS));
-		printf("TX CPU STATE: %#08x\n", tr32(TX_CPU_STATE));
-		printf("RX CPU STATE: %#08x\n", tr32(RX_CPU_STATE));
-}
-
-static void __unused tw32_mailbox2(struct tg3 *tp, uint32_t reg, uint32_t val)
-{	DBGP("%s\n", __func__);
-
-	tw32_mailbox(reg, val);
-	tr32(reg);
-}
-#endif
-
-#define NEXT_TX(N)		(((N) + 1) & (TG3_TX_RING_SIZE - 1))
-
-/* hard_start_xmit for devices that have the 4G bug and/or 40-bit bug and
- * support TG3_FLAG_HW_TSO_1 or firmware TSO only.
- */
-static int tg3_transmit(struct net_device *dev, struct io_buffer *iob)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-	u32 len, entry;
-	dma_addr_t mapping;
-
-	if (tg3_tx_avail(tp) < 1) {
-		DBGC(dev, "Transmit ring full\n");
-		return -ENOBUFS;
-	}
-
-	entry = tp->tx_prod;
-
-	iob_pad(iob, ETH_ZLEN);
-	mapping = virt_to_bus(iob->data);
-	len = iob_len(iob);
-
-	tp->tx_buffers[entry].iob = iob;
-
-	tg3_set_txd(tp, entry, mapping, len, TXD_FLAG_END);
-
-	entry = NEXT_TX(entry);
-
-	/* Packets are ready, update Tx producer idx local and on card. */
-	tw32_tx_mbox(tp->prodmbox, entry);
-
-	tp->tx_prod = entry;
-
-	mb();
-
-	return 0;
-}
-
-static void tg3_tx_complete(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-	u32 hw_idx = tp->hw_status->idx[0].tx_consumer;
-	u32 sw_idx = tp->tx_cons;
-
-	while (sw_idx != hw_idx) {
-		struct io_buffer *iob = tp->tx_buffers[sw_idx].iob;
-
-		DBGC2(dev, "Transmitted packet: %zd bytes\n", iob_len(iob));
-
-		netdev_tx_complete(dev, iob);
-		sw_idx = NEXT_TX(sw_idx);
-	}
-
-	tp->tx_cons = sw_idx;
-}
-
-#define TG3_RX_STD_BUFF_RING_BYTES(tp) \
-	(sizeof(struct ring_info) * TG3_RX_STD_MAX_SIZE_5700)
-#define TG3_RX_STD_RING_BYTES(tp) \
-	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
-
-/* Returns 0 or < 0 on error.
- *
- * We only need to fill in the address because the other members
- * of the RX descriptor are invariant, see tg3_init_rings.
- *
- * Note the purposeful assymetry of cpu vs. chip accesses.  For
- * posting buffers we only dirty the first cache line of the RX
- * descriptor (containing the address).  Whereas for the RX status
- * buffers the cpu only reads the last cacheline of the RX descriptor
- * (to fetch the error flags, vlan tag, checksum, and opaque cookie).
- */
-static int tg3_alloc_rx_iob(struct tg3_rx_prodring_set *tpr, u32 dest_idx_unmasked)
-{	DBGP("%s\n", __func__);
-
-	struct tg3_rx_buffer_desc *desc;
-	struct io_buffer *iob;
-	dma_addr_t mapping;
-	int dest_idx, iob_idx;
-
-	dest_idx = dest_idx_unmasked & (TG3_RX_STD_MAX_SIZE_5700 - 1);
-	desc = &tpr->rx_std[dest_idx];
-
-	/* Do not overwrite any of the map or rp information
-	 * until we are sure we can commit to a new buffer.
-	 *
-	 * Callers depend upon this behavior and assume that
-	 * we leave everything unchanged if we fail.
-	 */
-	iob = alloc_iob(TG3_RX_STD_DMA_SZ);
-	if (iob == NULL)
-		return -ENOMEM;
-
-	iob_idx = dest_idx % TG3_DEF_RX_RING_PENDING;
-	tpr->rx_iobufs[iob_idx] = iob;
-
-	mapping = virt_to_bus(iob->data);
-
-	desc->addr_hi = ((u64)mapping >> 32);
-	desc->addr_lo = ((u64)mapping & 0xffffffff);
-
-	return 0;
-}
-
-static void tg3_refill_prod_ring(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	struct tg3_rx_prodring_set *tpr = &tp->prodring;
-	int idx = tpr->rx_std_prod_idx;
-
-	DBGCP(tp->dev, "%s\n", __func__);
-
-	while (tpr->rx_std_iob_cnt < TG3_DEF_RX_RING_PENDING) {
-		if (tpr->rx_iobufs[idx % TG3_DEF_RX_RING_PENDING] == NULL) {
-			if (tg3_alloc_rx_iob(tpr, idx) < 0) {
-				DBGC(tp->dev, "alloc_iob() failed for descriptor %d\n", idx);
-				break;
-			}
-			DBGC2(tp->dev, "allocated iob_buffer for descriptor %d\n", idx);
-		}
-
-		idx = (idx + 1) % TG3_RX_STD_MAX_SIZE_5700;
-		tpr->rx_std_iob_cnt++;
-	}
-
-	if ((u32)idx != tpr->rx_std_prod_idx) {
-		tpr->rx_std_prod_idx = idx;
-		tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, idx);
-	}
-}
-
-static void tg3_rx_complete(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-
-	u32 sw_idx = tp->rx_rcb_ptr;
-	u16 hw_idx;
-	struct tg3_rx_prodring_set *tpr = &tp->prodring;
-
-	hw_idx = *(tp->rx_rcb_prod_idx);
-
-	while (sw_idx != hw_idx) {
-		struct tg3_rx_buffer_desc *desc = &tp->rx_rcb[sw_idx];
-		u32 desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
-		int iob_idx = desc_idx % TG3_DEF_RX_RING_PENDING;
-		struct io_buffer *iob = tpr->rx_iobufs[iob_idx];
-		unsigned int len;
-
-		DBGC2(dev, "RX - desc_idx: %d sw_idx: %d hw_idx: %d\n", desc_idx, sw_idx, hw_idx);
-
-		assert(iob != NULL);
-
-		if ((desc->err_vlan & RXD_ERR_MASK) != 0 &&
-		    (desc->err_vlan != RXD_ERR_ODD_NIBBLE_RCVD_MII)) {
-			/* drop packet */
-			DBGC(dev, "Corrupted packet received\n");
-			netdev_rx_err(dev, iob, -EINVAL);
-		} else {
-			len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) -
-			        ETH_FCS_LEN;
-			iob_put(iob, len);
-			netdev_rx(dev, iob);
-
-			DBGC2(dev, "Received packet: %d bytes %d %d\n", len, sw_idx, hw_idx);
-		}
-
-		sw_idx++;
-		sw_idx &= TG3_RX_RET_MAX_SIZE_5705 - 1;
-
-		tpr->rx_iobufs[iob_idx] = NULL;
-		tpr->rx_std_iob_cnt--;
-	}
-
-	if (tp->rx_rcb_ptr != sw_idx) {
-		tw32_rx_mbox(tp->consmbox, sw_idx);
-		tp->rx_rcb_ptr = sw_idx;
-	}
-
-	tg3_refill_prod_ring(tp);
-}
-
-static void tg3_poll(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-
-	/* ACK interrupts */
-	/*
-	 *tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00);
-	 */
-	tp->hw_status->status &= ~SD_STATUS_UPDATED;
-
-	tg3_poll_link(tp);
-	tg3_tx_complete(dev);
-	tg3_rx_complete(dev);
-}
-
-static void tg3_close(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-
-	DBGP("%s\n", __func__);
-
-	tg3_halt(tp);
-	tg3_rx_prodring_free(&tp->prodring);
-	tg3_flag_clear(tp, INIT_COMPLETE);
-
-	tg3_free_consistent(tp);
-
-}
-
-static void tg3_irq(struct net_device *dev, int enable)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-
-	DBGP("%s: %d\n", __func__, enable);
-
-	if (enable)
-		tg3_enable_ints(tp);
-	else
-		tg3_disable_ints(tp);
-}
-
-static struct net_device_operations tg3_netdev_ops = {
-	.open = tg3_open,
-	.close = tg3_close,
-	.poll = tg3_poll,
-	.transmit = tg3_transmit,
-	.irq = tg3_irq,
-};
-
-#define TEST_BUFFER_SIZE	0x2000
-
-int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device);
-void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val);
-
-static int tg3_test_dma(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	dma_addr_t buf_dma;
-	u32 *buf;
-	int ret = 0;
-
-	buf = malloc_dma(TEST_BUFFER_SIZE, TG3_DMA_ALIGNMENT);
-	if (!buf) {
-		ret = -ENOMEM;
-		goto out_nofree;
-	}
-	buf_dma = virt_to_bus(buf);
-	DBGC2(tp->dev, "dma test buffer, virt: %p phys: %#08x\n", buf, buf_dma);
-
-	if (tg3_flag(tp, 57765_PLUS)) {
-		tp->dma_rwctrl = DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
-		goto out;
-	}
-
-	tp->dma_rwctrl = ((0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
-	                 (0x6 << DMA_RWCTRL_PCI_READ_CMD_SHIFT));
-
-	if (tg3_flag(tp, PCI_EXPRESS)) {
-		/* DMA read watermark not used on PCIE */
-		tp->dma_rwctrl |= 0x00180000;
-	} else if (!tg3_flag(tp, PCIX_MODE)) {
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
-			tp->dma_rwctrl |= 0x003f0000;
-		else
-			tp->dma_rwctrl |= 0x003f000f;
-	} else {
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
-			u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f);
-			u32 read_water = 0x7;
-
-			if (ccval == 0x6 || ccval == 0x7)
-				tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
-
-			if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703)
-				read_water = 4;
-			/* Set bit 23 to enable PCIX hw bug fix */
-			tp->dma_rwctrl |=
-				(read_water << DMA_RWCTRL_READ_WATER_SHIFT) |
-				(0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) |
-				(1 << 23);
-		} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) {
-			/* 5780 always in PCIX mode */
-			tp->dma_rwctrl |= 0x00144000;
-		} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
-			/* 5714 always in PCIX mode */
-			tp->dma_rwctrl |= 0x00148000;
-		} else {
-			tp->dma_rwctrl |= 0x001b000f;
-		}
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)
-		tp->dma_rwctrl &= 0xfffffff0;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
-		/* Remove this if it causes problems for some boards. */
-		tp->dma_rwctrl |= DMA_RWCTRL_USE_MEM_READ_MULT;
-
-		/* On 5700/5701 chips, we need to set this bit.
-		 * Otherwise the chip will issue cacheline transactions
-		 * to streamable DMA memory with not all the byte
-		 * enables turned on.  This is an error on several
-		 * RISC PCI controllers, in particular sparc64.
-		 *
-		 * On 5703/5704 chips, this bit has been reassigned
-		 * a different meaning.  In particular, it is used
-		 * on those chips to enable a PCI-X workaround.
-		 */
-		tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE;
-	}
-
-	tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
-
-#if 0
-	/* Unneeded, already done by tg3_get_invariants.  */
-	tg3_switch_clocks(tp);
-#endif
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701)
-		goto out;
-
-	/* It is best to perform DMA test with maximum write burst size
-	 * to expose the 5700/5701 write DMA bug.
-	 */
-	tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
-	tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
-
-	while (1) {
-		u32 *p = buf, i;
-
-		for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++)
-			p[i] = i;
-
-		/* Send the buffer to the chip. */
-		ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, 1);
-		if (ret) {
-			DBGC(&tp->pdev->dev,
-				"%s: Buffer write failed. err = %d\n",
-				__func__, ret);
-			break;
-		}
-
-		/* validate data reached card RAM correctly. */
-		for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) {
-			u32 val;
-			tg3_read_mem(tp, 0x2100 + (i*4), &val);
-			if (le32_to_cpu(val) != p[i]) {
-				DBGC(&tp->pdev->dev,
-					"%s: Buffer corrupted on device! "
-					"(%d != %d)\n", __func__, val, i);
-				/* ret = -ENODEV here? */
-			}
-			p[i] = 0;
-		}
-
-		/* Now read it back. */
-		ret = tg3_do_test_dma(tp, buf, buf_dma, TEST_BUFFER_SIZE, 0);
-		if (ret) {
-			DBGC(&tp->pdev->dev, "%s: Buffer read failed. "
-				"err = %d\n", __func__, ret);
-			break;
-		}
-
-		/* Verify it. */
-		for (i = 0; i < TEST_BUFFER_SIZE / sizeof(u32); i++) {
-			if (p[i] == i)
-				continue;
-
-			if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
-			    DMA_RWCTRL_WRITE_BNDRY_16) {
-				tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
-				tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
-				tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
-				break;
-			} else {
-				DBGC(&tp->pdev->dev,
-					"%s: Buffer corrupted on read back! "
-					"(%d != %d)\n", __func__, p[i], i);
-				ret = -ENODEV;
-				goto out;
-			}
-		}
-
-		if (i == (TEST_BUFFER_SIZE / sizeof(u32))) {
-			/* Success. */
-			ret = 0;
-			break;
-		}
-	}
-
-	if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
-	    DMA_RWCTRL_WRITE_BNDRY_16) {
-		/* DMA test passed without adjusting DMA boundary,
-		 * now look for chipsets that are known to expose the
-		 * DMA bug without failing the test.
-		 */
-		tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
-		tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
-
-		tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
-	}
-
-out:
-	free_dma(buf, TEST_BUFFER_SIZE);
-out_nofree:
-	return ret;
-}
-
-static int tg3_init_one(struct pci_device *pdev)
-{	DBGP("%s\n", __func__);
-
-	struct net_device *dev;
-	struct tg3 *tp;
-	int err = 0;
-	unsigned long reg_base, reg_size;
-
-	adjust_pci_device(pdev);
-
-	dev = alloc_etherdev(sizeof(*tp));
-	if (!dev) {
-		DBGC(&pdev->dev, "Failed to allocate etherdev\n");
-		err = -ENOMEM;
-		goto err_out_disable_pdev;
-	}
-
-	netdev_init(dev, &tg3_netdev_ops);
-	pci_set_drvdata(pdev, dev);
-
-	dev->dev = &pdev->dev;
-
-	tp = netdev_priv(dev);
-	tp->pdev = pdev;
-	tp->dev = dev;
-	tp->rx_mode = TG3_DEF_RX_MODE;
-	tp->tx_mode = TG3_DEF_TX_MODE;
-
-	/* Subsystem IDs are required later */
-	pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->subsystem_vendor);
-	pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_ID, &tp->subsystem_device);
-
-	/* The word/byte swap controls here control register access byte
-	 * swapping.  DMA data byte swapping is controlled in the GRC_MODE
-	 * setting below.
-	 */
-	tp->misc_host_ctrl =
-		MISC_HOST_CTRL_MASK_PCI_INT |
-		MISC_HOST_CTRL_WORD_SWAP |
-		MISC_HOST_CTRL_INDIR_ACCESS |
-		MISC_HOST_CTRL_PCISTATE_RW;
-
-	/* The NONFRM (non-frame) byte/word swap controls take effect
-	 * on descriptor entries, anything which isn't packet data.
-	 *
-	 * The StrongARM chips on the board (one for tx, one for rx)
-	 * are running in big-endian mode.
-	 */
-	tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA |
-			GRC_MODE_WSWAP_NONFRM_DATA);
-#if __BYTE_ORDER == __BIG_ENDIAN
-	tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA;
-#endif
-
-	/* FIXME: how can we detect errors here? */
-	reg_base = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);
-	reg_size = pci_bar_size(pdev, PCI_BASE_ADDRESS_0);
-
-	tp->regs = ioremap(reg_base, reg_size);
-	if (!tp->regs) {
-		DBGC(&pdev->dev, "Failed to remap device registers\n");
-		errno = -ENOENT;
-		goto err_out_disable_pdev;
-	}
-
-	err = tg3_get_invariants(tp);
-	if (err) {
-		DBGC(&pdev->dev, "Problem fetching invariants of chip, aborting\n");
-		goto err_out_iounmap;
-	}
-
-	tg3_init_bufmgr_config(tp);
-
-	err = tg3_get_device_address(tp);
-	if (err) {
-		DBGC(&pdev->dev, "Could not obtain valid ethernet address, aborting\n");
-		goto err_out_iounmap;
-	}
-
-	/*
-	 * Reset chip in case UNDI or EFI driver did not shutdown
-	 * DMA self test will enable WDMAC and we'll see (spurious)
-	 * pending DMA on the PCI bus at that point.
-	 */
-	if ((tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE) ||
-	    (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
-		tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
-		tg3_halt(tp);
-	}
-
-	err = tg3_test_dma(tp);
-	if (err) {
-		DBGC(&pdev->dev, "DMA engine test failed, aborting\n");
-		goto err_out_iounmap;
-	}
-
-	tp->int_mbox = MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW;
-	tp->consmbox = MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW;
-	tp->prodmbox = MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW;
-
-	tp->coal_now = HOSTCC_MODE_NOW;
-
-	err = register_netdev(dev);
-	if (err) {
-		DBGC(&pdev->dev, "Cannot register net device, aborting\n");
-		goto err_out_iounmap;
-	}
-
-	/* Call tg3_setup_phy() to start autoneg process, which saves time
-	 * over starting autoneg in tg3_open();
-	 */
-	err = tg3_setup_phy(tp, 0);
-	if (err) {
-		DBGC(tp->dev, "tg3_setup_phy() call failed in %s\n", __func__);
-		goto err_out_iounmap;
-	}
-
-	return 0;
-
-err_out_iounmap:
-	if (tp->regs) {
-		iounmap(tp->regs);
-		tp->regs = NULL;
-	}
-
-	netdev_put(dev);
-
-err_out_disable_pdev:
-	pci_set_drvdata(pdev, NULL);
-	return err;
-}
-
-static void tg3_remove_one(struct pci_device *pci)
-{	DBGP("%s\n", __func__);
-
-	struct net_device *netdev = pci_get_drvdata(pci);
-
-	unregister_netdev(netdev);
-	netdev_nullify(netdev);
-	netdev_put(netdev);
-}
-
-static struct pci_device_id tg3_nics[] = {
-	PCI_ROM(0x14e4, 0x1644, "14e4-1644", "14e4-1644", 0),
-	PCI_ROM(0x14e4, 0x1645, "14e4-1645", "14e4-1645", 0),
-	PCI_ROM(0x14e4, 0x1646, "14e4-1646", "14e4-1646", 0),
-	PCI_ROM(0x14e4, 0x1647, "14e4-1647", "14e4-1647", 0),
-	PCI_ROM(0x14e4, 0x1648, "14e4-1648", "14e4-1648", 0),
-	PCI_ROM(0x14e4, 0x164d, "14e4-164d", "14e4-164d", 0),
-	PCI_ROM(0x14e4, 0x1653, "14e4-1653", "14e4-1653", 0),
-	PCI_ROM(0x14e4, 0x1654, "14e4-1654", "14e4-1654", 0),
-	PCI_ROM(0x14e4, 0x165d, "14e4-165d", "14e4-165d", 0),
-	PCI_ROM(0x14e4, 0x165e, "14e4-165e", "14e4-165e", 0),
-	PCI_ROM(0x14e4, 0x16a6, "14e4-16a6", "14e4-16a6", 0),
-	PCI_ROM(0x14e4, 0x16a7, "14e4-16a7", "14e4-16a7", 0),
-	PCI_ROM(0x14e4, 0x16a8, "14e4-16a8", "14e4-16a8", 0),
-	PCI_ROM(0x14e4, 0x16c6, "14e4-16c6", "14e4-16c6", 0),
-	PCI_ROM(0x14e4, 0x16c7, "14e4-16c7", "14e4-16c7", 0),
-	PCI_ROM(0x14e4, 0x1696, "14e4-1696", "14e4-1696", 0),
-	PCI_ROM(0x14e4, 0x169c, "14e4-169c", "14e4-169c", 0),
-	PCI_ROM(0x14e4, 0x169d, "14e4-169d", "14e4-169d", 0),
-	PCI_ROM(0x14e4, 0x170d, "14e4-170d", "14e4-170d", 0),
-	PCI_ROM(0x14e4, 0x170e, "14e4-170e", "14e4-170e", 0),
-	PCI_ROM(0x14e4, 0x1649, "14e4-1649", "14e4-1649", 0),
-	PCI_ROM(0x14e4, 0x166e, "14e4-166e", "14e4-166e", 0),
-	PCI_ROM(0x14e4, 0x1659, "14e4-1659", "14e4-1659", 0),
-	PCI_ROM(0x14e4, 0x165a, "14e4-165a", "14e4-165a", 0),
-	PCI_ROM(0x14e4, 0x1677, "14e4-1677", "14e4-1677", 0),
-	PCI_ROM(0x14e4, 0x167d, "14e4-167d", "14e4-167d", 0),
-	PCI_ROM(0x14e4, 0x167e, "14e4-167e", "14e4-167e", 0),
-	PCI_ROM(0x14e4, 0x1600, "14e4-1600", "14e4-1600", 0),
-	PCI_ROM(0x14e4, 0x1601, "14e4-1601", "14e4-1601", 0),
-	PCI_ROM(0x14e4, 0x16f7, "14e4-16f7", "14e4-16f7", 0),
-	PCI_ROM(0x14e4, 0x16fd, "14e4-16fd", "14e4-16fd", 0),
-	PCI_ROM(0x14e4, 0x16fe, "14e4-16fe", "14e4-16fe", 0),
-	PCI_ROM(0x14e4, 0x167a, "14e4-167a", "14e4-167a", 0),
-	PCI_ROM(0x14e4, 0x1672, "14e4-1672", "14e4-1672", 0),
-	PCI_ROM(0x14e4, 0x167b, "14e4-167b", "14e4-167b", 0),
-	PCI_ROM(0x14e4, 0x1673, "14e4-1673", "14e4-1673", 0),
-	PCI_ROM(0x14e4, 0x1674, "14e4-1674", "14e4-1674", 0),
-	PCI_ROM(0x14e4, 0x169a, "14e4-169a", "14e4-169a", 0),
-	PCI_ROM(0x14e4, 0x169b, "14e4-169b", "14e4-169b", 0),
-	PCI_ROM(0x14e4, 0x1693, "14e4-1693", "14e4-1693", 0),
-	PCI_ROM(0x14e4, 0x167f, "14e4-167f", "14e4-167f", 0),
-	PCI_ROM(0x14e4, 0x1668, "14e4-1668", "14e4-1668", 0),
-	PCI_ROM(0x14e4, 0x1669, "14e4-1669", "14e4-1669", 0),
-	PCI_ROM(0x14e4, 0x1678, "14e4-1678", "14e4-1678", 0),
-	PCI_ROM(0x14e4, 0x1679, "14e4-1679", "14e4-1679", 0),
-	PCI_ROM(0x14e4, 0x166a, "14e4-166a", "14e4-166a", 0),
-	PCI_ROM(0x14e4, 0x166b, "14e4-166b", "14e4-166b", 0),
-	PCI_ROM(0x14e4, 0x16dd, "14e4-16dd", "14e4-16dd", 0),
-	PCI_ROM(0x14e4, 0x1712, "14e4-1712", "14e4-1712", 0),
-	PCI_ROM(0x14e4, 0x1713, "14e4-1713", "14e4-1713", 0),
-	PCI_ROM(0x14e4, 0x1698, "14e4-1698", "14e4-1698", 0),
-	PCI_ROM(0x14e4, 0x1684, "14e4-1684", "14e4-1684", 0),
-	PCI_ROM(0x14e4, 0x165b, "14e4-165b", "14e4-165b", 0),
-	PCI_ROM(0x14e4, 0x1681, "14e4-1681", "14e4-1681", 0),
-	PCI_ROM(0x14e4, 0x1682, "14e4-1682", "14e4-1682", 0),
-	PCI_ROM(0x14e4, 0x1680, "14e4-1680", "14e4-1680", 0),
-	PCI_ROM(0x14e4, 0x1688, "14e4-1688", "14e4-1688", 0),
-	PCI_ROM(0x14e4, 0x1689, "14e4-1689", "14e4-1689", 0),
-	PCI_ROM(0x14e4, 0x1699, "14e4-1699", "14e4-1699", 0),
-	PCI_ROM(0x14e4, 0x16a0, "14e4-16a0", "14e4-16a0", 0),
-	PCI_ROM(0x14e4, 0x1692, "14e4-1692", "14e4-1692", 0),
-	PCI_ROM(0x14e4, 0x1690, "14e4-1690", "14e4-1690", 0),
-	PCI_ROM(0x14e4, 0x1694, "14e4-1694", "14e4-1694", 0),
-	PCI_ROM(0x14e4, 0x1691, "14e4-1691", "14e4-1691", 0),
-	PCI_ROM(0x14e4, 0x1655, "14e4-1655", "14e4-1655", 0),
-	PCI_ROM(0x14e4, 0x1656, "14e4-1656", "14e4-1656", 0),
-	PCI_ROM(0x14e4, 0x16b1, "14e4-16b1", "14e4-16b1", 0),
-	PCI_ROM(0x14e4, 0x16b5, "14e4-16b5", "14e4-16b5", 0),
-	PCI_ROM(0x14e4, 0x16b0, "14e4-16b0", "14e4-16b0", 0),
-	PCI_ROM(0x14e4, 0x16b4, "14e4-16b4", "14e4-16b4", 0),
-	PCI_ROM(0x14e4, 0x16b2, "14e4-16b2", "14e4-16b2", 0),
-	PCI_ROM(0x14e4, 0x16b6, "14e4-16b6", "14e4-16b6", 0),
-	PCI_ROM(0x14e4, 0x1657, "14e4-1657", "14e4-1657", 0),
-	PCI_ROM(0x14e4, 0x165f, "14e4-165f", "14e4-165f", 0),
-	PCI_ROM(0x1148, 0x4400, "1148-4400", "1148-4400", 0),
-	PCI_ROM(0x1148, 0x4500, "1148-4500", "1148-4500", 0),
-	PCI_ROM(0x173b, 0x03e8, "173b-03e8", "173b-03e8", 0),
-	PCI_ROM(0x173b, 0x03e9, "173b-03e9", "173b-03e9", 0),
-	PCI_ROM(0x173b, 0x03eb, "173b-03eb", "173b-03eb", 0),
-	PCI_ROM(0x173b, 0x03ea, "173b-03ea", "173b-03ea", 0),
-	PCI_ROM(0x106b, 0x1645, "106b-1645", "106b-1645", 0),
-};
-
-struct pci_driver tg3_pci_driver __pci_driver = {
-	.ids = tg3_nics,
-	.id_count = ARRAY_SIZE(tg3_nics),
-	.probe = tg3_init_one,
-	.remove = tg3_remove_one,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3.h ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,3431 +0,0 @@
-/* $Id: tg3.h,v 1.37.2.32 2002/03/11 12:18:18 davem Exp $
- * tg3.h: Definitions for Broadcom Tigon3 ethernet driver.
- *
- * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
- * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com)
- * Copyright (C) 2004 Sun Microsystems Inc.
- * Copyright (C) 2007-2011 Broadcom Corporation.
- */
-
-#ifndef _T3_H
-#define _T3_H
-
-#undef ERRFILE
-#define ERRFILE ERRFILE_tg3
-
-/* From linux/include/linux/pci_regs.h: */
-#define PCI_EXP_LNKCTL          16      /* Link Control */
-#define  PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */
-#define  PCI_CAP_ID_PCIX        0x07    /* PCI-X */
-
-#define  PCI_X_CMD_READ_2K      0x0008  /* 2Kbyte maximum read byte count */
-#define  PCI_X_CMD_MAX_READ     0x000c  /* Max Memory Read Byte Count */
-
-#define  PCI_X_CMD_MAX_SPLIT    0x0070  /* Max Outstanding Split Transactions */
-/* </pci_regs.h> */
-
-/* ethtool.h: */
-#define ADVERTISED_10baseT_Half         (1 << 0)
-#define ADVERTISED_10baseT_Full         (1 << 1)
-#define ADVERTISED_100baseT_Half        (1 << 2)
-#define ADVERTISED_100baseT_Full        (1 << 3)
-#define ADVERTISED_1000baseT_Half       (1 << 4)
-#define ADVERTISED_1000baseT_Full       (1 << 5)
-#define ADVERTISED_Autoneg              (1 << 6)
-/* </ethtool.h> */
-
-/* mdio.h: */
-#define MDIO_AN_EEE_ADV		60      /* EEE advertisement */
-
-#define MDIO_MMD_AN		7       /* Auto-Negotiation */
-
-#define MDIO_AN_EEE_ADV_100TX		0x0002  /* Advertise 100TX EEE cap */
-#define MDIO_AN_EEE_ADV_1000T		0x0004  /* Advertise 1000T EEE cap */
-/* </mdio.h> */
-
-/* mii.h */
-#define FLOW_CTRL_TX		0x01
-#define FLOW_CTRL_RX		0x02
-/* </mii.h> */
-
-/* pci_regs.h */
-#define PCI_X_CMD			2       /* Modes & Features */
-#define PCI_X_CMD_ERO			0x0002  /* Enable Relaxed Ordering */
-
-#define PCI_EXP_DEVCTL			8       /* Device Control */
-#define PCI_EXP_DEVCTL_RELAX_EN		0x0010 /* Enable relaxed ordering */
-#define PCI_EXP_DEVCTL_NOSNOOP_EN	0x0800  /* Enable No Snoop */
-#define PCI_EXP_DEVCTL_PAYLOAD		0x00e0  /* Max_Payload_Size */
-#define PCI_EXP_DEVSTA			10      /* Device Status */
-#define PCI_EXP_DEVSTA_CED		0x01    /* Correctable Error Detected */
-#define PCI_EXP_DEVSTA_NFED		0x02    /* Non-Fatal Error Detected */
-#define PCI_EXP_DEVSTA_FED		0x04    /* Fatal Error Detected */
-#define PCI_EXP_DEVSTA_URD		0x08    /* Unsupported Request Detected */
-/* </pci_regs.h> */
-
-/* pci_ids.h: */
-#define PCI_VENDOR_ID_BROADCOM		0x14e4
-#define PCI_DEVICE_ID_TIGON3_5752	0x1600
-#define PCI_DEVICE_ID_TIGON3_5752M	0x1601
-#define PCI_DEVICE_ID_NX2_5709		0x1639
-#define PCI_DEVICE_ID_NX2_5709S		0x163a
-#define PCI_DEVICE_ID_TIGON3_5700	0x1644
-#define PCI_DEVICE_ID_TIGON3_5701	0x1645
-#define PCI_DEVICE_ID_TIGON3_5702	0x1646
-#define PCI_DEVICE_ID_TIGON3_5703	0x1647
-#define PCI_DEVICE_ID_TIGON3_5704	0x1648
-#define PCI_DEVICE_ID_TIGON3_5704S_2	0x1649
-#define PCI_DEVICE_ID_NX2_5706		0x164a
-#define PCI_DEVICE_ID_NX2_5708		0x164c
-#define PCI_DEVICE_ID_TIGON3_5702FE	0x164d
-#define PCI_DEVICE_ID_NX2_57710		0x164e
-#define PCI_DEVICE_ID_NX2_57711		0x164f
-#define PCI_DEVICE_ID_NX2_57711E	0x1650
-#define PCI_DEVICE_ID_TIGON3_5705	0x1653
-#define PCI_DEVICE_ID_TIGON3_5705_2	0x1654
-#define PCI_DEVICE_ID_TIGON3_5721	0x1659
-#define PCI_DEVICE_ID_TIGON3_5722	0x165a
-#define PCI_DEVICE_ID_TIGON3_5723	0x165b
-#define PCI_DEVICE_ID_TIGON3_5705M	0x165d
-#define PCI_DEVICE_ID_TIGON3_5705M_2	0x165e
-#define PCI_DEVICE_ID_NX2_57712		0x1662
-#define PCI_DEVICE_ID_NX2_57712E	0x1663
-#define PCI_DEVICE_ID_TIGON3_5714	0x1668
-#define PCI_DEVICE_ID_TIGON3_5714S	0x1669
-#define PCI_DEVICE_ID_TIGON3_5780	0x166a
-#define PCI_DEVICE_ID_TIGON3_5780S	0x166b
-#define PCI_DEVICE_ID_TIGON3_5705F	0x166e
-#define PCI_DEVICE_ID_TIGON3_5754M	0x1672
-#define PCI_DEVICE_ID_TIGON3_5755M	0x1673
-#define PCI_DEVICE_ID_TIGON3_5756	0x1674
-#define PCI_DEVICE_ID_TIGON3_5751	0x1677
-#define PCI_DEVICE_ID_TIGON3_5715	0x1678
-#define PCI_DEVICE_ID_TIGON3_5715S	0x1679
-#define PCI_DEVICE_ID_TIGON3_5754	0x167a
-#define PCI_DEVICE_ID_TIGON3_5755	0x167b
-#define PCI_DEVICE_ID_TIGON3_5751M	0x167d
-#define PCI_DEVICE_ID_TIGON3_5751F	0x167e
-#define PCI_DEVICE_ID_TIGON3_5787F	0x167f
-#define PCI_DEVICE_ID_TIGON3_5761E	0x1680
-#define PCI_DEVICE_ID_TIGON3_5761	0x1681
-#define PCI_DEVICE_ID_TIGON3_5764	0x1684
-#define PCI_DEVICE_ID_TIGON3_5787M	0x1693
-#define PCI_DEVICE_ID_TIGON3_5782	0x1696
-#define PCI_DEVICE_ID_TIGON3_5784	0x1698
-#define PCI_DEVICE_ID_TIGON3_5786	0x169a
-#define PCI_DEVICE_ID_TIGON3_5787	0x169b
-#define PCI_DEVICE_ID_TIGON3_5788	0x169c
-#define PCI_DEVICE_ID_TIGON3_5789	0x169d
-#define PCI_DEVICE_ID_TIGON3_5702X	0x16a6
-#define PCI_DEVICE_ID_TIGON3_5703X	0x16a7
-#define PCI_DEVICE_ID_TIGON3_5704S	0x16a8
-#define PCI_DEVICE_ID_NX2_5706S		0x16aa
-#define PCI_DEVICE_ID_NX2_5708S		0x16ac
-#define PCI_DEVICE_ID_TIGON3_5702A3	0x16c6
-#define PCI_DEVICE_ID_TIGON3_5703A3	0x16c7
-#define PCI_DEVICE_ID_TIGON3_5781	0x16dd
-#define PCI_DEVICE_ID_TIGON3_5753	0x16f7
-#define PCI_DEVICE_ID_TIGON3_5753M	0x16fd
-#define PCI_DEVICE_ID_TIGON3_5753F	0x16fe
-#define PCI_DEVICE_ID_TIGON3_5901	0x170d
-#define PCI_DEVICE_ID_TIGON3_5901_2	0x170e
-#define PCI_DEVICE_ID_TIGON3_5906	0x1712
-#define PCI_DEVICE_ID_TIGON3_5906M	0x1713
-/* </pci_ids.h> */
-
-#define SPEED_10			10
-#define SPEED_100			100
-#define SPEED_1000			1000
-
-#define DUPLEX_HALF			0x00
-#define DUPLEX_FULL			0x01
-
-#define TG3_64BIT_REG_HIGH		0x00UL
-#define TG3_64BIT_REG_LOW		0x04UL
-
-/* Descriptor block info. */
-#define TG3_BDINFO_HOST_ADDR		0x0UL /* 64-bit */
-#define TG3_BDINFO_MAXLEN_FLAGS		0x8UL /* 32-bit */
-#define  BDINFO_FLAGS_USE_EXT_RECV	 0x00000001 /* ext rx_buffer_desc */
-#define  BDINFO_FLAGS_DISABLED		 0x00000002
-#define  BDINFO_FLAGS_MAXLEN_MASK	 0xffff0000
-#define  BDINFO_FLAGS_MAXLEN_SHIFT	 16
-#define TG3_BDINFO_NIC_ADDR		0xcUL /* 32-bit */
-#define TG3_BDINFO_SIZE			0x10UL
-
-#define RX_STD_MAX_SIZE                 1536
-#define TG3_RX_STD_MAX_SIZE_5700	512
-#define TG3_RX_STD_MAX_SIZE_5717	2048
-#define TG3_RX_JMB_MAX_SIZE_5700	256
-#define TG3_RX_JMB_MAX_SIZE_5717	1024
-#define TG3_RX_RET_MAX_SIZE_5700	1024
-#define TG3_RX_RET_MAX_SIZE_5705	512
-#define TG3_RX_RET_MAX_SIZE_5717	4096
-
-/* First 256 bytes are a mirror of PCI config space. */
-#define TG3PCI_VENDOR			0x00000000
-#define  TG3PCI_VENDOR_BROADCOM		 0x14e4
-#define TG3PCI_DEVICE			0x00000002
-#define  TG3PCI_DEVICE_TIGON3_1		 0x1644 /* BCM5700 */
-#define  TG3PCI_DEVICE_TIGON3_2		 0x1645 /* BCM5701 */
-#define  TG3PCI_DEVICE_TIGON3_3		 0x1646 /* BCM5702 */
-#define  TG3PCI_DEVICE_TIGON3_4		 0x1647 /* BCM5703 */
-#define  TG3PCI_DEVICE_TIGON3_5761S	 0x1688
-#define  TG3PCI_DEVICE_TIGON3_5761SE	 0x1689
-#define  TG3PCI_DEVICE_TIGON3_57780	 0x1692
-#define  TG3PCI_DEVICE_TIGON3_57760	 0x1690
-#define  TG3PCI_DEVICE_TIGON3_57790	 0x1694
-#define  TG3PCI_DEVICE_TIGON3_57788	 0x1691
-#define  TG3PCI_DEVICE_TIGON3_5785_G	 0x1699 /* GPHY */
-#define  TG3PCI_DEVICE_TIGON3_5785_F	 0x16a0 /* 10/100 only */
-#define  TG3PCI_DEVICE_TIGON3_5717	 0x1655
-#define  TG3PCI_DEVICE_TIGON3_5718	 0x1656
-#define  TG3PCI_DEVICE_TIGON3_57781	 0x16b1
-#define  TG3PCI_DEVICE_TIGON3_57785	 0x16b5
-#define  TG3PCI_DEVICE_TIGON3_57761	 0x16b0
-#define  TG3PCI_DEVICE_TIGON3_57762	 0x1682
-#define  TG3PCI_DEVICE_TIGON3_57765	 0x16b4
-#define  TG3PCI_DEVICE_TIGON3_57791	 0x16b2
-#define  TG3PCI_DEVICE_TIGON3_57795	 0x16b6
-#define  TG3PCI_DEVICE_TIGON3_5719	 0x1657
-#define  TG3PCI_DEVICE_TIGON3_5720	 0x165f
-/* 0x04 --> 0x2c unused */
-#define TG3PCI_SUBVENDOR_ID_BROADCOM		PCI_VENDOR_ID_BROADCOM
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6	0x1644
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5	0x0001
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6	0x0002
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95700A9	0x0003
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1	0x0005
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8	0x0006
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A7	0x0007
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10	0x0008
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12	0x8008
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1	0x0009
-#define TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2	0x8009
-#define TG3PCI_SUBVENDOR_ID_3COM		PCI_VENDOR_ID_3COM
-#define TG3PCI_SUBDEVICE_ID_3COM_3C996T		0x1000
-#define TG3PCI_SUBDEVICE_ID_3COM_3C996BT	0x1006
-#define TG3PCI_SUBDEVICE_ID_3COM_3C996SX	0x1004
-#define TG3PCI_SUBDEVICE_ID_3COM_3C1000T	0x1007
-#define TG3PCI_SUBDEVICE_ID_3COM_3C940BR01	0x1008
-#define TG3PCI_SUBVENDOR_ID_DELL		PCI_VENDOR_ID_DELL
-#define TG3PCI_SUBDEVICE_ID_DELL_VIPER		0x00d1
-#define TG3PCI_SUBDEVICE_ID_DELL_JAGUAR		0x0106
-#define TG3PCI_SUBDEVICE_ID_DELL_MERLOT		0x0109
-#define TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT	0x010a
-#define TG3PCI_SUBVENDOR_ID_COMPAQ		PCI_VENDOR_ID_COMPAQ
-#define TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE	0x007c
-#define TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2	0x009a
-#define TG3PCI_SUBDEVICE_ID_COMPAQ_CHANGELING	0x007d
-#define TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780	0x0085
-#define TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2	0x0099
-#define TG3PCI_SUBVENDOR_ID_IBM			PCI_VENDOR_ID_IBM
-#define TG3PCI_SUBDEVICE_ID_IBM_5703SAX2	0x0281
-/* 0x30 --> 0x64 unused */
-#define TG3PCI_MSI_DATA			0x00000064
-/* 0x66 --> 0x68 unused */
-#define TG3PCI_MISC_HOST_CTRL		0x00000068
-#define  MISC_HOST_CTRL_CLEAR_INT	 0x00000001
-#define  MISC_HOST_CTRL_MASK_PCI_INT	 0x00000002
-#define  MISC_HOST_CTRL_BYTE_SWAP	 0x00000004
-#define  MISC_HOST_CTRL_WORD_SWAP	 0x00000008
-#define  MISC_HOST_CTRL_PCISTATE_RW	 0x00000010
-#define  MISC_HOST_CTRL_CLKREG_RW	 0x00000020
-#define  MISC_HOST_CTRL_REGWORD_SWAP	 0x00000040
-#define  MISC_HOST_CTRL_INDIR_ACCESS	 0x00000080
-#define  MISC_HOST_CTRL_IRQ_MASK_MODE	 0x00000100
-#define  MISC_HOST_CTRL_TAGGED_STATUS	 0x00000200
-#define  MISC_HOST_CTRL_CHIPREV		 0xffff0000
-#define  MISC_HOST_CTRL_CHIPREV_SHIFT	 16
-#define  GET_CHIP_REV_ID(MISC_HOST_CTRL) \
-	 (((MISC_HOST_CTRL) & MISC_HOST_CTRL_CHIPREV) >> \
-	  MISC_HOST_CTRL_CHIPREV_SHIFT)
-#define  CHIPREV_ID_5700_A0		 0x7000
-#define  CHIPREV_ID_5700_A1		 0x7001
-#define  CHIPREV_ID_5700_B0		 0x7100
-#define  CHIPREV_ID_5700_B1		 0x7101
-#define  CHIPREV_ID_5700_B3		 0x7102
-#define  CHIPREV_ID_5700_ALTIMA		 0x7104
-#define  CHIPREV_ID_5700_C0		 0x7200
-#define  CHIPREV_ID_5701_A0		 0x0000
-#define  CHIPREV_ID_5701_B0		 0x0100
-#define  CHIPREV_ID_5701_B2		 0x0102
-#define  CHIPREV_ID_5701_B5		 0x0105
-#define  CHIPREV_ID_5703_A0		 0x1000
-#define  CHIPREV_ID_5703_A1		 0x1001
-#define  CHIPREV_ID_5703_A2		 0x1002
-#define  CHIPREV_ID_5703_A3		 0x1003
-#define  CHIPREV_ID_5704_A0		 0x2000
-#define  CHIPREV_ID_5704_A1		 0x2001
-#define  CHIPREV_ID_5704_A2		 0x2002
-#define  CHIPREV_ID_5704_A3		 0x2003
-#define  CHIPREV_ID_5705_A0		 0x3000
-#define  CHIPREV_ID_5705_A1		 0x3001
-#define  CHIPREV_ID_5705_A2		 0x3002
-#define  CHIPREV_ID_5705_A3		 0x3003
-#define  CHIPREV_ID_5750_A0		 0x4000
-#define  CHIPREV_ID_5750_A1		 0x4001
-#define  CHIPREV_ID_5750_A3		 0x4003
-#define  CHIPREV_ID_5750_C2		 0x4202
-#define  CHIPREV_ID_5752_A0_HW		 0x5000
-#define  CHIPREV_ID_5752_A0		 0x6000
-#define  CHIPREV_ID_5752_A1		 0x6001
-#define  CHIPREV_ID_5714_A2		 0x9002
-#define  CHIPREV_ID_5906_A1		 0xc001
-#define  CHIPREV_ID_57780_A0		 0x57780000
-#define  CHIPREV_ID_57780_A1		 0x57780001
-#define  CHIPREV_ID_5717_A0		 0x05717000
-#define  CHIPREV_ID_57765_A0		 0x57785000
-#define  CHIPREV_ID_5719_A0		 0x05719000
-#define  CHIPREV_ID_5720_A0		 0x05720000
-#define  GET_ASIC_REV(CHIP_REV_ID)	((CHIP_REV_ID) >> 12)
-#define   ASIC_REV_5700			 0x07
-#define   ASIC_REV_5701			 0x00
-#define   ASIC_REV_5703			 0x01
-#define   ASIC_REV_5704			 0x02
-#define   ASIC_REV_5705			 0x03
-#define   ASIC_REV_5750			 0x04
-#define   ASIC_REV_5752			 0x06
-#define   ASIC_REV_5780			 0x08
-#define   ASIC_REV_5714			 0x09
-#define   ASIC_REV_5755			 0x0a
-#define   ASIC_REV_5787			 0x0b
-#define   ASIC_REV_5906			 0x0c
-#define   ASIC_REV_USE_PROD_ID_REG	 0x0f
-#define   ASIC_REV_5784			 0x5784
-#define   ASIC_REV_5761			 0x5761
-#define   ASIC_REV_5785			 0x5785
-#define   ASIC_REV_57780		 0x57780
-#define   ASIC_REV_5717			 0x5717
-#define   ASIC_REV_57765		 0x57785
-#define   ASIC_REV_57766		 0x57766
-#define   ASIC_REV_5719			 0x5719
-#define   ASIC_REV_5720			 0x5720
-#define  GET_CHIP_REV(CHIP_REV_ID)	((CHIP_REV_ID) >> 8)
-#define   CHIPREV_5700_AX		 0x70
-#define   CHIPREV_5700_BX		 0x71
-#define   CHIPREV_5700_CX		 0x72
-#define   CHIPREV_5701_AX		 0x00
-#define   CHIPREV_5703_AX		 0x10
-#define   CHIPREV_5704_AX		 0x20
-#define   CHIPREV_5704_BX		 0x21
-#define   CHIPREV_5750_AX		 0x40
-#define   CHIPREV_5750_BX		 0x41
-#define   CHIPREV_5784_AX		 0x57840
-#define   CHIPREV_5761_AX		 0x57610
-#define   CHIPREV_57765_AX		 0x577650
-#define  GET_METAL_REV(CHIP_REV_ID)	((CHIP_REV_ID) & 0xff)
-#define   METAL_REV_A0			 0x00
-#define   METAL_REV_A1			 0x01
-#define   METAL_REV_B0			 0x00
-#define   METAL_REV_B1			 0x01
-#define   METAL_REV_B2			 0x02
-#define TG3PCI_DMA_RW_CTRL		0x0000006c
-#define  DMA_RWCTRL_DIS_CACHE_ALIGNMENT  0x00000001
-#define  DMA_RWCTRL_TAGGED_STAT_WA	 0x00000080
-#define  DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK 0x00000380
-#define  DMA_RWCTRL_READ_BNDRY_MASK	 0x00000700
-#define  DMA_RWCTRL_READ_BNDRY_DISAB	 0x00000000
-#define  DMA_RWCTRL_READ_BNDRY_16	 0x00000100
-#define  DMA_RWCTRL_READ_BNDRY_128_PCIX	 0x00000100
-#define  DMA_RWCTRL_READ_BNDRY_32	 0x00000200
-#define  DMA_RWCTRL_READ_BNDRY_256_PCIX	 0x00000200
-#define  DMA_RWCTRL_READ_BNDRY_64	 0x00000300
-#define  DMA_RWCTRL_READ_BNDRY_384_PCIX	 0x00000300
-#define  DMA_RWCTRL_READ_BNDRY_128	 0x00000400
-#define  DMA_RWCTRL_READ_BNDRY_256	 0x00000500
-#define  DMA_RWCTRL_READ_BNDRY_512	 0x00000600
-#define  DMA_RWCTRL_READ_BNDRY_1024	 0x00000700
-#define  DMA_RWCTRL_WRITE_BNDRY_MASK	 0x00003800
-#define  DMA_RWCTRL_WRITE_BNDRY_DISAB	 0x00000000
-#define  DMA_RWCTRL_WRITE_BNDRY_16	 0x00000800
-#define  DMA_RWCTRL_WRITE_BNDRY_128_PCIX 0x00000800
-#define  DMA_RWCTRL_WRITE_BNDRY_32	 0x00001000
-#define  DMA_RWCTRL_WRITE_BNDRY_256_PCIX 0x00001000
-#define  DMA_RWCTRL_WRITE_BNDRY_64	 0x00001800
-#define  DMA_RWCTRL_WRITE_BNDRY_384_PCIX 0x00001800
-#define  DMA_RWCTRL_WRITE_BNDRY_128	 0x00002000
-#define  DMA_RWCTRL_WRITE_BNDRY_256	 0x00002800
-#define  DMA_RWCTRL_WRITE_BNDRY_512	 0x00003000
-#define  DMA_RWCTRL_WRITE_BNDRY_1024	 0x00003800
-#define  DMA_RWCTRL_ONE_DMA		 0x00004000
-#define  DMA_RWCTRL_READ_WATER		 0x00070000
-#define  DMA_RWCTRL_READ_WATER_SHIFT	 16
-#define  DMA_RWCTRL_WRITE_WATER		 0x00380000
-#define  DMA_RWCTRL_WRITE_WATER_SHIFT	 19
-#define  DMA_RWCTRL_USE_MEM_READ_MULT	 0x00400000
-#define  DMA_RWCTRL_ASSERT_ALL_BE	 0x00800000
-#define  DMA_RWCTRL_PCI_READ_CMD	 0x0f000000
-#define  DMA_RWCTRL_PCI_READ_CMD_SHIFT	 24
-#define  DMA_RWCTRL_PCI_WRITE_CMD	 0xf0000000
-#define  DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	 28
-#define  DMA_RWCTRL_WRITE_BNDRY_64_PCIE	 0x10000000
-#define  DMA_RWCTRL_WRITE_BNDRY_128_PCIE 0x30000000
-#define  DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE 0x70000000
-#define TG3PCI_PCISTATE			0x00000070
-#define  PCISTATE_FORCE_RESET		 0x00000001
-#define  PCISTATE_INT_NOT_ACTIVE	 0x00000002
-#define  PCISTATE_CONV_PCI_MODE		 0x00000004
-#define  PCISTATE_BUS_SPEED_HIGH	 0x00000008
-#define  PCISTATE_BUS_32BIT		 0x00000010
-#define  PCISTATE_ROM_ENABLE		 0x00000020
-#define  PCISTATE_ROM_RETRY_ENABLE	 0x00000040
-#define  PCISTATE_FLAT_VIEW		 0x00000100
-#define  PCISTATE_RETRY_SAME_DMA	 0x00002000
-#define  PCISTATE_ALLOW_APE_CTLSPC_WR	 0x00010000
-#define  PCISTATE_ALLOW_APE_SHMEM_WR	 0x00020000
-#define  PCISTATE_ALLOW_APE_PSPACE_WR	 0x00040000
-#define TG3PCI_CLOCK_CTRL		0x00000074
-#define  CLOCK_CTRL_CORECLK_DISABLE	 0x00000200
-#define  CLOCK_CTRL_RXCLK_DISABLE	 0x00000400
-#define  CLOCK_CTRL_TXCLK_DISABLE	 0x00000800
-#define  CLOCK_CTRL_ALTCLK		 0x00001000
-#define  CLOCK_CTRL_PWRDOWN_PLL133	 0x00008000
-#define  CLOCK_CTRL_44MHZ_CORE		 0x00040000
-#define  CLOCK_CTRL_625_CORE		 0x00100000
-#define  CLOCK_CTRL_FORCE_CLKRUN	 0x00200000
-#define  CLOCK_CTRL_CLKRUN_OENABLE	 0x00400000
-#define  CLOCK_CTRL_DELAY_PCI_GRANT	 0x80000000
-#define TG3PCI_REG_BASE_ADDR		0x00000078
-#define TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c
-#define TG3PCI_REG_DATA			0x00000080
-#define TG3PCI_MEM_WIN_DATA		0x00000084
-#define TG3PCI_MISC_LOCAL_CTRL		0x00000090
-/* 0x94 --> 0x98 unused */
-#define TG3PCI_STD_RING_PROD_IDX	0x00000098 /* 64-bit */
-#define TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0 /* 64-bit */
-/* 0xa8 --> 0xb8 unused */
-#define TG3PCI_DUAL_MAC_CTRL		0x000000b8
-#define  DUAL_MAC_CTRL_CH_MASK		 0x00000003
-#define  DUAL_MAC_CTRL_ID		 0x00000004
-#define TG3PCI_PRODID_ASICREV		0x000000bc
-#define  PROD_ID_ASIC_REV_MASK		 0x0fffffff
-/* 0xc0 --> 0xf4 unused */
-
-#define TG3PCI_GEN2_PRODID_ASICREV	0x000000f4
-#define TG3PCI_GEN15_PRODID_ASICREV	0x000000fc
-/* 0xf8 --> 0x200 unused */
-
-#define TG3_CORR_ERR_STAT		0x00000110
-#define  TG3_CORR_ERR_STAT_CLEAR	0xffffffff
-/* 0x114 --> 0x200 unused */
-
-/* Mailbox registers */
-#define MAILBOX_INTERRUPT_0		0x00000200 /* 64-bit */
-#define MAILBOX_INTERRUPT_1		0x00000208 /* 64-bit */
-#define MAILBOX_INTERRUPT_2		0x00000210 /* 64-bit */
-#define MAILBOX_INTERRUPT_3		0x00000218 /* 64-bit */
-#define MAILBOX_GENERAL_0		0x00000220 /* 64-bit */
-#define MAILBOX_GENERAL_1		0x00000228 /* 64-bit */
-#define MAILBOX_GENERAL_2		0x00000230 /* 64-bit */
-#define MAILBOX_GENERAL_3		0x00000238 /* 64-bit */
-#define MAILBOX_GENERAL_4		0x00000240 /* 64-bit */
-#define MAILBOX_GENERAL_5		0x00000248 /* 64-bit */
-#define MAILBOX_GENERAL_6		0x00000250 /* 64-bit */
-#define MAILBOX_GENERAL_7		0x00000258 /* 64-bit */
-#define MAILBOX_RELOAD_STAT		0x00000260 /* 64-bit */
-#define MAILBOX_RCV_STD_PROD_IDX	0x00000268 /* 64-bit */
-#define TG3_RX_STD_PROD_IDX_REG		(MAILBOX_RCV_STD_PROD_IDX + \
-					 TG3_64BIT_REG_LOW)
-#define MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270 /* 64-bit */
-#define TG3_RX_JMB_PROD_IDX_REG		(MAILBOX_RCV_JUMBO_PROD_IDX + \
-					 TG3_64BIT_REG_LOW)
-#define MAILBOX_RCV_MINI_PROD_IDX	0x00000278 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_0	0x00000280 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_1	0x00000288 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_2	0x00000290 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_3	0x00000298 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_4	0x000002a0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_5	0x000002a8 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_6	0x000002b0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_7	0x000002b8 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_8	0x000002c0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_9	0x000002c8 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_10	0x000002d0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_11	0x000002d8 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_12	0x000002e0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_13	0x000002e8 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_14	0x000002f0 /* 64-bit */
-#define MAILBOX_RCVRET_CON_IDX_15	0x000002f8 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_0	0x00000300 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_1	0x00000308 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_2	0x00000310 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_3	0x00000318 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_4	0x00000320 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_5	0x00000328 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_6	0x00000330 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_7	0x00000338 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_8	0x00000340 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_9	0x00000348 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_10	0x00000350 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_11	0x00000358 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_12	0x00000360 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_13	0x00000368 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_14	0x00000370 /* 64-bit */
-#define MAILBOX_SNDHOST_PROD_IDX_15	0x00000378 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_0	0x00000380 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_1	0x00000388 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_2	0x00000390 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_3	0x00000398 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0 /* 64-bit */
-#define MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8 /* 64-bit */
-
-/* MAC control registers */
-#define MAC_MODE			0x00000400
-#define  MAC_MODE_RESET			 0x00000001
-#define  MAC_MODE_HALF_DUPLEX		 0x00000002
-#define  MAC_MODE_PORT_MODE_MASK	 0x0000000c
-#define  MAC_MODE_PORT_MODE_TBI		 0x0000000c
-#define  MAC_MODE_PORT_MODE_GMII	 0x00000008
-#define  MAC_MODE_PORT_MODE_MII		 0x00000004
-#define  MAC_MODE_PORT_MODE_NONE	 0x00000000
-#define  MAC_MODE_PORT_INT_LPBACK	 0x00000010
-#define  MAC_MODE_TAGGED_MAC_CTRL	 0x00000080
-#define  MAC_MODE_TX_BURSTING		 0x00000100
-#define  MAC_MODE_MAX_DEFER		 0x00000200
-#define  MAC_MODE_LINK_POLARITY		 0x00000400
-#define  MAC_MODE_RXSTAT_ENABLE		 0x00000800
-#define  MAC_MODE_RXSTAT_CLEAR		 0x00001000
-#define  MAC_MODE_RXSTAT_FLUSH		 0x00002000
-#define  MAC_MODE_TXSTAT_ENABLE		 0x00004000
-#define  MAC_MODE_TXSTAT_CLEAR		 0x00008000
-#define  MAC_MODE_TXSTAT_FLUSH		 0x00010000
-#define  MAC_MODE_SEND_CONFIGS		 0x00020000
-#define  MAC_MODE_MAGIC_PKT_ENABLE	 0x00040000
-#define  MAC_MODE_ACPI_ENABLE		 0x00080000
-#define  MAC_MODE_MIP_ENABLE		 0x00100000
-#define  MAC_MODE_TDE_ENABLE		 0x00200000
-#define  MAC_MODE_RDE_ENABLE		 0x00400000
-#define  MAC_MODE_FHDE_ENABLE		 0x00800000
-#define  MAC_MODE_KEEP_FRAME_IN_WOL	 0x01000000
-#define  MAC_MODE_APE_RX_EN		 0x08000000
-#define  MAC_MODE_APE_TX_EN		 0x10000000
-#define MAC_STATUS			0x00000404
-#define  MAC_STATUS_PCS_SYNCED		 0x00000001
-#define  MAC_STATUS_SIGNAL_DET		 0x00000002
-#define  MAC_STATUS_RCVD_CFG		 0x00000004
-#define  MAC_STATUS_CFG_CHANGED		 0x00000008
-#define  MAC_STATUS_SYNC_CHANGED	 0x00000010
-#define  MAC_STATUS_PORT_DEC_ERR	 0x00000400
-#define  MAC_STATUS_LNKSTATE_CHANGED	 0x00001000
-#define  MAC_STATUS_MI_COMPLETION	 0x00400000
-#define  MAC_STATUS_MI_INTERRUPT	 0x00800000
-#define  MAC_STATUS_AP_ERROR		 0x01000000
-#define  MAC_STATUS_ODI_ERROR		 0x02000000
-#define  MAC_STATUS_RXSTAT_OVERRUN	 0x04000000
-#define  MAC_STATUS_TXSTAT_OVERRUN	 0x08000000
-#define MAC_EVENT			0x00000408
-#define  MAC_EVENT_PORT_DECODE_ERR	 0x00000400
-#define  MAC_EVENT_LNKSTATE_CHANGED	 0x00001000
-#define  MAC_EVENT_MI_COMPLETION	 0x00400000
-#define  MAC_EVENT_MI_INTERRUPT		 0x00800000
-#define  MAC_EVENT_AP_ERROR		 0x01000000
-#define  MAC_EVENT_ODI_ERROR		 0x02000000
-#define  MAC_EVENT_RXSTAT_OVERRUN	 0x04000000
-#define  MAC_EVENT_TXSTAT_OVERRUN	 0x08000000
-#define MAC_LED_CTRL			0x0000040c
-#define  LED_CTRL_LNKLED_OVERRIDE	 0x00000001
-#define  LED_CTRL_1000MBPS_ON		 0x00000002
-#define  LED_CTRL_100MBPS_ON		 0x00000004
-#define  LED_CTRL_10MBPS_ON		 0x00000008
-#define  LED_CTRL_TRAFFIC_OVERRIDE	 0x00000010
-#define  LED_CTRL_TRAFFIC_BLINK		 0x00000020
-#define  LED_CTRL_TRAFFIC_LED		 0x00000040
-#define  LED_CTRL_1000MBPS_STATUS	 0x00000080
-#define  LED_CTRL_100MBPS_STATUS	 0x00000100
-#define  LED_CTRL_10MBPS_STATUS		 0x00000200
-#define  LED_CTRL_TRAFFIC_STATUS	 0x00000400
-#define  LED_CTRL_MODE_MAC		 0x00000000
-#define  LED_CTRL_MODE_PHY_1		 0x00000800
-#define  LED_CTRL_MODE_PHY_2		 0x00001000
-#define  LED_CTRL_MODE_SHASTA_MAC	 0x00002000
-#define  LED_CTRL_MODE_SHARED		 0x00004000
-#define  LED_CTRL_MODE_COMBO		 0x00008000
-#define  LED_CTRL_BLINK_RATE_MASK	 0x7ff80000
-#define  LED_CTRL_BLINK_RATE_SHIFT	 19
-#define  LED_CTRL_BLINK_PER_OVERRIDE	 0x00080000
-#define  LED_CTRL_BLINK_RATE_OVERRIDE	 0x80000000
-#define MAC_ADDR_0_HIGH			0x00000410 /* upper 2 bytes */
-#define MAC_ADDR_0_LOW			0x00000414 /* lower 4 bytes */
-#define MAC_ADDR_1_HIGH			0x00000418 /* upper 2 bytes */
-#define MAC_ADDR_1_LOW			0x0000041c /* lower 4 bytes */
-#define MAC_ADDR_2_HIGH			0x00000420 /* upper 2 bytes */
-#define MAC_ADDR_2_LOW			0x00000424 /* lower 4 bytes */
-#define MAC_ADDR_3_HIGH			0x00000428 /* upper 2 bytes */
-#define MAC_ADDR_3_LOW			0x0000042c /* lower 4 bytes */
-#define MAC_ACPI_MBUF_PTR		0x00000430
-#define MAC_ACPI_LEN_OFFSET		0x00000434
-#define  ACPI_LENOFF_LEN_MASK		 0x0000ffff
-#define  ACPI_LENOFF_LEN_SHIFT		 0
-#define  ACPI_LENOFF_OFF_MASK		 0x0fff0000
-#define  ACPI_LENOFF_OFF_SHIFT		 16
-#define MAC_TX_BACKOFF_SEED		0x00000438
-#define  TX_BACKOFF_SEED_MASK		 0x000003ff
-#define MAC_RX_MTU_SIZE			0x0000043c
-#define  RX_MTU_SIZE_MASK		 0x0000ffff
-#define MAC_PCS_TEST			0x00000440
-#define  PCS_TEST_PATTERN_MASK		 0x000fffff
-#define  PCS_TEST_PATTERN_SHIFT		 0
-#define  PCS_TEST_ENABLE		 0x00100000
-#define MAC_TX_AUTO_NEG			0x00000444
-#define  TX_AUTO_NEG_MASK		 0x0000ffff
-#define  TX_AUTO_NEG_SHIFT		 0
-#define MAC_RX_AUTO_NEG			0x00000448
-#define  RX_AUTO_NEG_MASK		 0x0000ffff
-#define  RX_AUTO_NEG_SHIFT		 0
-#define MAC_MI_COM			0x0000044c
-#define  MI_COM_CMD_MASK		 0x0c000000
-#define  MI_COM_CMD_WRITE		 0x04000000
-#define  MI_COM_CMD_READ		 0x08000000
-#define  MI_COM_READ_FAILED		 0x10000000
-#define  MI_COM_START			 0x20000000
-#define  MI_COM_BUSY			 0x20000000
-#define  MI_COM_PHY_ADDR_MASK		 0x03e00000
-#define  MI_COM_PHY_ADDR_SHIFT		 21
-#define  MI_COM_REG_ADDR_MASK		 0x001f0000
-#define  MI_COM_REG_ADDR_SHIFT		 16
-#define  MI_COM_DATA_MASK		 0x0000ffff
-#define MAC_MI_STAT			0x00000450
-#define  MAC_MI_STAT_LNKSTAT_ATTN_ENAB	 0x00000001
-#define  MAC_MI_STAT_10MBPS_MODE	 0x00000002
-#define MAC_MI_MODE			0x00000454
-#define  MAC_MI_MODE_CLK_10MHZ		 0x00000001
-#define  MAC_MI_MODE_SHORT_PREAMBLE	 0x00000002
-#define  MAC_MI_MODE_AUTO_POLL		 0x00000010
-#define  MAC_MI_MODE_500KHZ_CONST	 0x00008000
-#define  MAC_MI_MODE_BASE		 0x000c0000 /* XXX magic values XXX */
-#define MAC_AUTO_POLL_STATUS		0x00000458
-#define  MAC_AUTO_POLL_ERROR		 0x00000001
-#define MAC_TX_MODE			0x0000045c
-#define  TX_MODE_RESET			 0x00000001
-#define  TX_MODE_ENABLE			 0x00000002
-#define  TX_MODE_FLOW_CTRL_ENABLE	 0x00000010
-#define  TX_MODE_BIG_BCKOFF_ENABLE	 0x00000020
-#define  TX_MODE_LONG_PAUSE_ENABLE	 0x00000040
-#define  TX_MODE_MBUF_LOCKUP_FIX	 0x00000100
-#define  TX_MODE_JMB_FRM_LEN		 0x00400000
-#define  TX_MODE_CNT_DN_MODE		 0x00800000
-#define MAC_TX_STATUS			0x00000460
-#define  TX_STATUS_XOFFED		 0x00000001
-#define  TX_STATUS_SENT_XOFF		 0x00000002
-#define  TX_STATUS_SENT_XON		 0x00000004
-#define  TX_STATUS_LINK_UP		 0x00000008
-#define  TX_STATUS_ODI_UNDERRUN		 0x00000010
-#define  TX_STATUS_ODI_OVERRUN		 0x00000020
-#define MAC_TX_LENGTHS			0x00000464
-#define  TX_LENGTHS_SLOT_TIME_MASK	 0x000000ff
-#define  TX_LENGTHS_SLOT_TIME_SHIFT	 0
-#define  TX_LENGTHS_IPG_MASK		 0x00000f00
-#define  TX_LENGTHS_IPG_SHIFT		 8
-#define  TX_LENGTHS_IPG_CRS_MASK	 0x00003000
-#define  TX_LENGTHS_IPG_CRS_SHIFT	 12
-#define  TX_LENGTHS_JMB_FRM_LEN_MSK	 0x00ff0000
-#define  TX_LENGTHS_CNT_DWN_VAL_MSK	 0xff000000
-#define MAC_RX_MODE			0x00000468
-#define  RX_MODE_RESET			 0x00000001
-#define  RX_MODE_ENABLE			 0x00000002
-#define  RX_MODE_FLOW_CTRL_ENABLE	 0x00000004
-#define  RX_MODE_KEEP_MAC_CTRL		 0x00000008
-#define  RX_MODE_KEEP_PAUSE		 0x00000010
-#define  RX_MODE_ACCEPT_OVERSIZED	 0x00000020
-#define  RX_MODE_ACCEPT_RUNTS		 0x00000040
-#define  RX_MODE_LEN_CHECK		 0x00000080
-#define  RX_MODE_PROMISC		 0x00000100
-#define  RX_MODE_NO_CRC_CHECK		 0x00000200
-#define  RX_MODE_KEEP_VLAN_TAG		 0x00000400
-#define  RX_MODE_RSS_IPV4_HASH_EN	 0x00010000
-#define  RX_MODE_RSS_TCP_IPV4_HASH_EN	 0x00020000
-#define  RX_MODE_RSS_IPV6_HASH_EN	 0x00040000
-#define  RX_MODE_RSS_TCP_IPV6_HASH_EN	 0x00080000
-#define  RX_MODE_RSS_ITBL_HASH_BITS_7	 0x00700000
-#define  RX_MODE_RSS_ENABLE		 0x00800000
-#define  RX_MODE_IPV6_CSUM_ENABLE	 0x01000000
-#define MAC_RX_STATUS			0x0000046c
-#define  RX_STATUS_REMOTE_TX_XOFFED	 0x00000001
-#define  RX_STATUS_XOFF_RCVD		 0x00000002
-#define  RX_STATUS_XON_RCVD		 0x00000004
-#define MAC_HASH_REG_0			0x00000470
-#define MAC_HASH_REG_1			0x00000474
-#define MAC_HASH_REG_2			0x00000478
-#define MAC_HASH_REG_3			0x0000047c
-#define MAC_RCV_RULE_0			0x00000480
-#define MAC_RCV_VALUE_0			0x00000484
-#define MAC_RCV_RULE_1			0x00000488
-#define MAC_RCV_VALUE_1			0x0000048c
-#define MAC_RCV_RULE_2			0x00000490
-#define MAC_RCV_VALUE_2			0x00000494
-#define MAC_RCV_RULE_3			0x00000498
-#define MAC_RCV_VALUE_3			0x0000049c
-#define MAC_RCV_RULE_4			0x000004a0
-#define MAC_RCV_VALUE_4			0x000004a4
-#define MAC_RCV_RULE_5			0x000004a8
-#define MAC_RCV_VALUE_5			0x000004ac
-#define MAC_RCV_RULE_6			0x000004b0
-#define MAC_RCV_VALUE_6			0x000004b4
-#define MAC_RCV_RULE_7			0x000004b8
-#define MAC_RCV_VALUE_7			0x000004bc
-#define MAC_RCV_RULE_8			0x000004c0
-#define MAC_RCV_VALUE_8			0x000004c4
-#define MAC_RCV_RULE_9			0x000004c8
-#define MAC_RCV_VALUE_9			0x000004cc
-#define MAC_RCV_RULE_10			0x000004d0
-#define MAC_RCV_VALUE_10		0x000004d4
-#define MAC_RCV_RULE_11			0x000004d8
-#define MAC_RCV_VALUE_11		0x000004dc
-#define MAC_RCV_RULE_12			0x000004e0
-#define MAC_RCV_VALUE_12		0x000004e4
-#define MAC_RCV_RULE_13			0x000004e8
-#define MAC_RCV_VALUE_13		0x000004ec
-#define MAC_RCV_RULE_14			0x000004f0
-#define MAC_RCV_VALUE_14		0x000004f4
-#define MAC_RCV_RULE_15			0x000004f8
-#define MAC_RCV_VALUE_15		0x000004fc
-#define  RCV_RULE_DISABLE_MASK		 0x7fffffff
-#define MAC_RCV_RULE_CFG		0x00000500
-#define  RCV_RULE_CFG_DEFAULT_CLASS	0x00000008
-#define MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504
-/* 0x508 --> 0x520 unused */
-#define MAC_HASHREGU_0			0x00000520
-#define MAC_HASHREGU_1			0x00000524
-#define MAC_HASHREGU_2			0x00000528
-#define MAC_HASHREGU_3			0x0000052c
-#define MAC_EXTADDR_0_HIGH		0x00000530
-#define MAC_EXTADDR_0_LOW		0x00000534
-#define MAC_EXTADDR_1_HIGH		0x00000538
-#define MAC_EXTADDR_1_LOW		0x0000053c
-#define MAC_EXTADDR_2_HIGH		0x00000540
-#define MAC_EXTADDR_2_LOW		0x00000544
-#define MAC_EXTADDR_3_HIGH		0x00000548
-#define MAC_EXTADDR_3_LOW		0x0000054c
-#define MAC_EXTADDR_4_HIGH		0x00000550
-#define MAC_EXTADDR_4_LOW		0x00000554
-#define MAC_EXTADDR_5_HIGH		0x00000558
-#define MAC_EXTADDR_5_LOW		0x0000055c
-#define MAC_EXTADDR_6_HIGH		0x00000560
-#define MAC_EXTADDR_6_LOW		0x00000564
-#define MAC_EXTADDR_7_HIGH		0x00000568
-#define MAC_EXTADDR_7_LOW		0x0000056c
-#define MAC_EXTADDR_8_HIGH		0x00000570
-#define MAC_EXTADDR_8_LOW		0x00000574
-#define MAC_EXTADDR_9_HIGH		0x00000578
-#define MAC_EXTADDR_9_LOW		0x0000057c
-#define MAC_EXTADDR_10_HIGH		0x00000580
-#define MAC_EXTADDR_10_LOW		0x00000584
-#define MAC_EXTADDR_11_HIGH		0x00000588
-#define MAC_EXTADDR_11_LOW		0x0000058c
-#define MAC_SERDES_CFG			0x00000590
-#define  MAC_SERDES_CFG_EDGE_SELECT	 0x00001000
-#define MAC_SERDES_STAT			0x00000594
-/* 0x598 --> 0x5a0 unused */
-#define MAC_PHYCFG1			0x000005a0
-#define  MAC_PHYCFG1_RGMII_INT		 0x00000001
-#define  MAC_PHYCFG1_RXCLK_TO_MASK	 0x00001ff0
-#define  MAC_PHYCFG1_RXCLK_TIMEOUT	 0x00001000
-#define  MAC_PHYCFG1_TXCLK_TO_MASK	 0x01ff0000
-#define  MAC_PHYCFG1_TXCLK_TIMEOUT	 0x01000000
-#define  MAC_PHYCFG1_RGMII_EXT_RX_DEC	 0x02000000
-#define  MAC_PHYCFG1_RGMII_SND_STAT_EN	 0x04000000
-#define  MAC_PHYCFG1_TXC_DRV		 0x20000000
-#define MAC_PHYCFG2			0x000005a4
-#define  MAC_PHYCFG2_INBAND_ENABLE	 0x00000001
-#define  MAC_PHYCFG2_EMODE_MASK_MASK	 0x000001c0
-#define  MAC_PHYCFG2_EMODE_MASK_AC131	 0x000000c0
-#define  MAC_PHYCFG2_EMODE_MASK_50610	 0x00000100
-#define  MAC_PHYCFG2_EMODE_MASK_RT8211	 0x00000000
-#define  MAC_PHYCFG2_EMODE_MASK_RT8201	 0x000001c0
-#define  MAC_PHYCFG2_EMODE_COMP_MASK	 0x00000e00
-#define  MAC_PHYCFG2_EMODE_COMP_AC131	 0x00000600
-#define  MAC_PHYCFG2_EMODE_COMP_50610	 0x00000400
-#define  MAC_PHYCFG2_EMODE_COMP_RT8211	 0x00000800
-#define  MAC_PHYCFG2_EMODE_COMP_RT8201	 0x00000000
-#define  MAC_PHYCFG2_FMODE_MASK_MASK	 0x00007000
-#define  MAC_PHYCFG2_FMODE_MASK_AC131	 0x00006000
-#define  MAC_PHYCFG2_FMODE_MASK_50610	 0x00004000
-#define  MAC_PHYCFG2_FMODE_MASK_RT8211	 0x00000000
-#define  MAC_PHYCFG2_FMODE_MASK_RT8201	 0x00007000
-#define  MAC_PHYCFG2_FMODE_COMP_MASK	 0x00038000
-#define  MAC_PHYCFG2_FMODE_COMP_AC131	 0x00030000
-#define  MAC_PHYCFG2_FMODE_COMP_50610	 0x00008000
-#define  MAC_PHYCFG2_FMODE_COMP_RT8211	 0x00038000
-#define  MAC_PHYCFG2_FMODE_COMP_RT8201	 0x00000000
-#define  MAC_PHYCFG2_GMODE_MASK_MASK	 0x001c0000
-#define  MAC_PHYCFG2_GMODE_MASK_AC131	 0x001c0000
-#define  MAC_PHYCFG2_GMODE_MASK_50610	 0x00100000
-#define  MAC_PHYCFG2_GMODE_MASK_RT8211	 0x00000000
-#define  MAC_PHYCFG2_GMODE_MASK_RT8201	 0x001c0000
-#define  MAC_PHYCFG2_GMODE_COMP_MASK	 0x00e00000
-#define  MAC_PHYCFG2_GMODE_COMP_AC131	 0x00e00000
-#define  MAC_PHYCFG2_GMODE_COMP_50610	 0x00000000
-#define  MAC_PHYCFG2_GMODE_COMP_RT8211	 0x00200000
-#define  MAC_PHYCFG2_GMODE_COMP_RT8201	 0x00000000
-#define  MAC_PHYCFG2_ACT_MASK_MASK	 0x03000000
-#define  MAC_PHYCFG2_ACT_MASK_AC131	 0x03000000
-#define  MAC_PHYCFG2_ACT_MASK_50610	 0x01000000
-#define  MAC_PHYCFG2_ACT_MASK_RT8211	 0x03000000
-#define  MAC_PHYCFG2_ACT_MASK_RT8201	 0x01000000
-#define  MAC_PHYCFG2_ACT_COMP_MASK	 0x0c000000
-#define  MAC_PHYCFG2_ACT_COMP_AC131	 0x00000000
-#define  MAC_PHYCFG2_ACT_COMP_50610	 0x00000000
-#define  MAC_PHYCFG2_ACT_COMP_RT8211	 0x00000000
-#define  MAC_PHYCFG2_ACT_COMP_RT8201	 0x08000000
-#define  MAC_PHYCFG2_QUAL_MASK_MASK	 0x30000000
-#define  MAC_PHYCFG2_QUAL_MASK_AC131	 0x30000000
-#define  MAC_PHYCFG2_QUAL_MASK_50610	 0x30000000
-#define  MAC_PHYCFG2_QUAL_MASK_RT8211	 0x30000000
-#define  MAC_PHYCFG2_QUAL_MASK_RT8201	 0x30000000
-#define  MAC_PHYCFG2_QUAL_COMP_MASK	 0xc0000000
-#define  MAC_PHYCFG2_QUAL_COMP_AC131	 0x00000000
-#define  MAC_PHYCFG2_QUAL_COMP_50610	 0x00000000
-#define  MAC_PHYCFG2_QUAL_COMP_RT8211	 0x00000000
-#define  MAC_PHYCFG2_QUAL_COMP_RT8201	 0x00000000
-#define MAC_PHYCFG2_50610_LED_MODES \
-	(MAC_PHYCFG2_EMODE_MASK_50610 | \
-	 MAC_PHYCFG2_EMODE_COMP_50610 | \
-	 MAC_PHYCFG2_FMODE_MASK_50610 | \
-	 MAC_PHYCFG2_FMODE_COMP_50610 | \
-	 MAC_PHYCFG2_GMODE_MASK_50610 | \
-	 MAC_PHYCFG2_GMODE_COMP_50610 | \
-	 MAC_PHYCFG2_ACT_MASK_50610 | \
-	 MAC_PHYCFG2_ACT_COMP_50610 | \
-	 MAC_PHYCFG2_QUAL_MASK_50610 | \
-	 MAC_PHYCFG2_QUAL_COMP_50610)
-#define MAC_PHYCFG2_AC131_LED_MODES \
-	(MAC_PHYCFG2_EMODE_MASK_AC131 | \
-	 MAC_PHYCFG2_EMODE_COMP_AC131 | \
-	 MAC_PHYCFG2_FMODE_MASK_AC131 | \
-	 MAC_PHYCFG2_FMODE_COMP_AC131 | \
-	 MAC_PHYCFG2_GMODE_MASK_AC131 | \
-	 MAC_PHYCFG2_GMODE_COMP_AC131 | \
-	 MAC_PHYCFG2_ACT_MASK_AC131 | \
-	 MAC_PHYCFG2_ACT_COMP_AC131 | \
-	 MAC_PHYCFG2_QUAL_MASK_AC131 | \
-	 MAC_PHYCFG2_QUAL_COMP_AC131)
-#define MAC_PHYCFG2_RTL8211C_LED_MODES \
-	(MAC_PHYCFG2_EMODE_MASK_RT8211 | \
-	 MAC_PHYCFG2_EMODE_COMP_RT8211 | \
-	 MAC_PHYCFG2_FMODE_MASK_RT8211 | \
-	 MAC_PHYCFG2_FMODE_COMP_RT8211 | \
-	 MAC_PHYCFG2_GMODE_MASK_RT8211 | \
-	 MAC_PHYCFG2_GMODE_COMP_RT8211 | \
-	 MAC_PHYCFG2_ACT_MASK_RT8211 | \
-	 MAC_PHYCFG2_ACT_COMP_RT8211 | \
-	 MAC_PHYCFG2_QUAL_MASK_RT8211 | \
-	 MAC_PHYCFG2_QUAL_COMP_RT8211)
-#define MAC_PHYCFG2_RTL8201E_LED_MODES \
-	(MAC_PHYCFG2_EMODE_MASK_RT8201 | \
-	 MAC_PHYCFG2_EMODE_COMP_RT8201 | \
-	 MAC_PHYCFG2_FMODE_MASK_RT8201 | \
-	 MAC_PHYCFG2_FMODE_COMP_RT8201 | \
-	 MAC_PHYCFG2_GMODE_MASK_RT8201 | \
-	 MAC_PHYCFG2_GMODE_COMP_RT8201 | \
-	 MAC_PHYCFG2_ACT_MASK_RT8201 | \
-	 MAC_PHYCFG2_ACT_COMP_RT8201 | \
-	 MAC_PHYCFG2_QUAL_MASK_RT8201 | \
-	 MAC_PHYCFG2_QUAL_COMP_RT8201)
-#define MAC_EXT_RGMII_MODE		0x000005a8
-#define  MAC_RGMII_MODE_TX_ENABLE	 0x00000001
-#define  MAC_RGMII_MODE_TX_LOWPWR	 0x00000002
-#define  MAC_RGMII_MODE_TX_RESET	 0x00000004
-#define  MAC_RGMII_MODE_RX_INT_B	 0x00000100
-#define  MAC_RGMII_MODE_RX_QUALITY	 0x00000200
-#define  MAC_RGMII_MODE_RX_ACTIVITY	 0x00000400
-#define  MAC_RGMII_MODE_RX_ENG_DET	 0x00000800
-/* 0x5ac --> 0x5b0 unused */
-#define SERDES_RX_CTRL			0x000005b0	/* 5780/5714 only */
-#define  SERDES_RX_SIG_DETECT		 0x00000400
-#define SG_DIG_CTRL			0x000005b0
-#define  SG_DIG_USING_HW_AUTONEG	 0x80000000
-#define  SG_DIG_SOFT_RESET		 0x40000000
-#define  SG_DIG_DISABLE_LINKRDY		 0x20000000
-#define  SG_DIG_CRC16_CLEAR_N		 0x01000000
-#define  SG_DIG_EN10B			 0x00800000
-#define  SG_DIG_CLEAR_STATUS		 0x00400000
-#define  SG_DIG_LOCAL_DUPLEX_STATUS	 0x00200000
-#define  SG_DIG_LOCAL_LINK_STATUS	 0x00100000
-#define  SG_DIG_SPEED_STATUS_MASK	 0x000c0000
-#define  SG_DIG_SPEED_STATUS_SHIFT	 18
-#define  SG_DIG_JUMBO_PACKET_DISABLE	 0x00020000
-#define  SG_DIG_RESTART_AUTONEG		 0x00010000
-#define  SG_DIG_FIBER_MODE		 0x00008000
-#define  SG_DIG_REMOTE_FAULT_MASK	 0x00006000
-#define  SG_DIG_PAUSE_MASK		 0x00001800
-#define  SG_DIG_PAUSE_CAP		 0x00000800
-#define  SG_DIG_ASYM_PAUSE		 0x00001000
-#define  SG_DIG_GBIC_ENABLE		 0x00000400
-#define  SG_DIG_CHECK_END_ENABLE	 0x00000200
-#define  SG_DIG_SGMII_AUTONEG_TIMER	 0x00000100
-#define  SG_DIG_CLOCK_PHASE_SELECT	 0x00000080
-#define  SG_DIG_GMII_INPUT_SELECT	 0x00000040
-#define  SG_DIG_MRADV_CRC16_SELECT	 0x00000020
-#define  SG_DIG_COMMA_DETECT_ENABLE	 0x00000010
-#define  SG_DIG_AUTONEG_TIMER_REDUCE	 0x00000008
-#define  SG_DIG_AUTONEG_LOW_ENABLE	 0x00000004
-#define  SG_DIG_REMOTE_LOOPBACK		 0x00000002
-#define  SG_DIG_LOOPBACK		 0x00000001
-#define  SG_DIG_COMMON_SETUP (SG_DIG_CRC16_CLEAR_N | \
-			      SG_DIG_LOCAL_DUPLEX_STATUS | \
-			      SG_DIG_LOCAL_LINK_STATUS | \
-			      (0x2 << SG_DIG_SPEED_STATUS_SHIFT) | \
-			      SG_DIG_FIBER_MODE | SG_DIG_GBIC_ENABLE)
-#define SG_DIG_STATUS			0x000005b4
-#define  SG_DIG_CRC16_BUS_MASK		 0xffff0000
-#define  SG_DIG_PARTNER_FAULT_MASK	 0x00600000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_PARTNER_ASYM_PAUSE	 0x00100000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_PARTNER_PAUSE_CAPABLE	 0x00080000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_PARTNER_HALF_DUPLEX	 0x00040000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_PARTNER_FULL_DUPLEX	 0x00020000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_PARTNER_NEXT_PAGE	 0x00010000 /* If !MRADV_CRC16_SELECT */
-#define  SG_DIG_AUTONEG_STATE_MASK	 0x00000ff0
-#define  SG_DIG_IS_SERDES		 0x00000100
-#define  SG_DIG_COMMA_DETECTOR		 0x00000008
-#define  SG_DIG_MAC_ACK_STATUS		 0x00000004
-#define  SG_DIG_AUTONEG_COMPLETE	 0x00000002
-#define  SG_DIG_AUTONEG_ERROR		 0x00000001
-/* 0x5b8 --> 0x600 unused */
-#define MAC_TX_MAC_STATE_BASE		0x00000600 /* 16 bytes */
-#define MAC_RX_MAC_STATE_BASE		0x00000610 /* 20 bytes */
-/* 0x624 --> 0x670 unused */
-
-#define MAC_RSS_INDIR_TBL_0		0x00000630
-
-#define MAC_RSS_HASH_KEY_0		0x00000670
-#define MAC_RSS_HASH_KEY_1		0x00000674
-#define MAC_RSS_HASH_KEY_2		0x00000678
-#define MAC_RSS_HASH_KEY_3		0x0000067c
-#define MAC_RSS_HASH_KEY_4		0x00000680
-#define MAC_RSS_HASH_KEY_5		0x00000684
-#define MAC_RSS_HASH_KEY_6		0x00000688
-#define MAC_RSS_HASH_KEY_7		0x0000068c
-#define MAC_RSS_HASH_KEY_8		0x00000690
-#define MAC_RSS_HASH_KEY_9		0x00000694
-/* 0x698 --> 0x800 unused */
-
-#define MAC_TX_STATS_OCTETS		0x00000800
-#define MAC_TX_STATS_RESV1		0x00000804
-#define MAC_TX_STATS_COLLISIONS		0x00000808
-#define MAC_TX_STATS_XON_SENT		0x0000080c
-#define MAC_TX_STATS_XOFF_SENT		0x00000810
-#define MAC_TX_STATS_RESV2		0x00000814
-#define MAC_TX_STATS_MAC_ERRORS		0x00000818
-#define MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c
-#define MAC_TX_STATS_MULT_COLLISIONS	0x00000820
-#define MAC_TX_STATS_DEFERRED		0x00000824
-#define MAC_TX_STATS_RESV3		0x00000828
-#define MAC_TX_STATS_EXCESSIVE_COL	0x0000082c
-#define MAC_TX_STATS_LATE_COL		0x00000830
-#define MAC_TX_STATS_RESV4_1		0x00000834
-#define MAC_TX_STATS_RESV4_2		0x00000838
-#define MAC_TX_STATS_RESV4_3		0x0000083c
-#define MAC_TX_STATS_RESV4_4		0x00000840
-#define MAC_TX_STATS_RESV4_5		0x00000844
-#define MAC_TX_STATS_RESV4_6		0x00000848
-#define MAC_TX_STATS_RESV4_7		0x0000084c
-#define MAC_TX_STATS_RESV4_8		0x00000850
-#define MAC_TX_STATS_RESV4_9		0x00000854
-#define MAC_TX_STATS_RESV4_10		0x00000858
-#define MAC_TX_STATS_RESV4_11		0x0000085c
-#define MAC_TX_STATS_RESV4_12		0x00000860
-#define MAC_TX_STATS_RESV4_13		0x00000864
-#define MAC_TX_STATS_RESV4_14		0x00000868
-#define MAC_TX_STATS_UCAST		0x0000086c
-#define MAC_TX_STATS_MCAST		0x00000870
-#define MAC_TX_STATS_BCAST		0x00000874
-#define MAC_TX_STATS_RESV5_1		0x00000878
-#define MAC_TX_STATS_RESV5_2		0x0000087c
-#define MAC_RX_STATS_OCTETS		0x00000880
-#define MAC_RX_STATS_RESV1		0x00000884
-#define MAC_RX_STATS_FRAGMENTS		0x00000888
-#define MAC_RX_STATS_UCAST		0x0000088c
-#define MAC_RX_STATS_MCAST		0x00000890
-#define MAC_RX_STATS_BCAST		0x00000894
-#define MAC_RX_STATS_FCS_ERRORS		0x00000898
-#define MAC_RX_STATS_ALIGN_ERRORS	0x0000089c
-#define MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0
-#define MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4
-#define MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8
-#define MAC_RX_STATS_XOFF_ENTERED	0x000008ac
-#define MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0
-#define MAC_RX_STATS_JABBERS		0x000008b4
-#define MAC_RX_STATS_UNDERSIZE		0x000008b8
-/* 0x8bc --> 0xc00 unused */
-
-/* Send data initiator control registers */
-#define SNDDATAI_MODE			0x00000c00
-#define  SNDDATAI_MODE_RESET		 0x00000001
-#define  SNDDATAI_MODE_ENABLE		 0x00000002
-#define  SNDDATAI_MODE_STAT_OFLOW_ENAB	 0x00000004
-#define SNDDATAI_STATUS			0x00000c04
-#define  SNDDATAI_STATUS_STAT_OFLOW	 0x00000004
-#define SNDDATAI_STATSCTRL		0x00000c08
-#define  SNDDATAI_SCTRL_ENABLE		 0x00000001
-#define  SNDDATAI_SCTRL_FASTUPD		 0x00000002
-#define  SNDDATAI_SCTRL_CLEAR		 0x00000004
-#define  SNDDATAI_SCTRL_FLUSH		 0x00000008
-#define  SNDDATAI_SCTRL_FORCE_ZERO	 0x00000010
-#define SNDDATAI_STATSENAB		0x00000c0c
-#define SNDDATAI_STATSINCMASK		0x00000c10
-#define ISO_PKT_TX			0x00000c20
-/* 0xc24 --> 0xc80 unused */
-#define SNDDATAI_COS_CNT_0		0x00000c80
-#define SNDDATAI_COS_CNT_1		0x00000c84
-#define SNDDATAI_COS_CNT_2		0x00000c88
-#define SNDDATAI_COS_CNT_3		0x00000c8c
-#define SNDDATAI_COS_CNT_4		0x00000c90
-#define SNDDATAI_COS_CNT_5		0x00000c94
-#define SNDDATAI_COS_CNT_6		0x00000c98
-#define SNDDATAI_COS_CNT_7		0x00000c9c
-#define SNDDATAI_COS_CNT_8		0x00000ca0
-#define SNDDATAI_COS_CNT_9		0x00000ca4
-#define SNDDATAI_COS_CNT_10		0x00000ca8
-#define SNDDATAI_COS_CNT_11		0x00000cac
-#define SNDDATAI_COS_CNT_12		0x00000cb0
-#define SNDDATAI_COS_CNT_13		0x00000cb4
-#define SNDDATAI_COS_CNT_14		0x00000cb8
-#define SNDDATAI_COS_CNT_15		0x00000cbc
-#define SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0
-#define SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4
-#define SNDDATAI_SDCQ_FULL_CNT		0x00000cc8
-#define SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc
-#define SNDDATAI_STATS_UPDATED_CNT	0x00000cd0
-#define SNDDATAI_INTERRUPTS_CNT		0x00000cd4
-#define SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8
-#define SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc
-/* 0xce0 --> 0x1000 unused */
-
-/* Send data completion control registers */
-#define SNDDATAC_MODE			0x00001000
-#define  SNDDATAC_MODE_RESET		 0x00000001
-#define  SNDDATAC_MODE_ENABLE		 0x00000002
-#define  SNDDATAC_MODE_CDELAY		 0x00000010
-/* 0x1004 --> 0x1400 unused */
-
-/* Send BD ring selector */
-#define SNDBDS_MODE			0x00001400
-#define  SNDBDS_MODE_RESET		 0x00000001
-#define  SNDBDS_MODE_ENABLE		 0x00000002
-#define  SNDBDS_MODE_ATTN_ENABLE	 0x00000004
-#define SNDBDS_STATUS			0x00001404
-#define  SNDBDS_STATUS_ERROR_ATTN	 0x00000004
-#define SNDBDS_HWDIAG			0x00001408
-/* 0x140c --> 0x1440 */
-#define SNDBDS_SEL_CON_IDX_0		0x00001440
-#define SNDBDS_SEL_CON_IDX_1		0x00001444
-#define SNDBDS_SEL_CON_IDX_2		0x00001448
-#define SNDBDS_SEL_CON_IDX_3		0x0000144c
-#define SNDBDS_SEL_CON_IDX_4		0x00001450
-#define SNDBDS_SEL_CON_IDX_5		0x00001454
-#define SNDBDS_SEL_CON_IDX_6		0x00001458
-#define SNDBDS_SEL_CON_IDX_7		0x0000145c
-#define SNDBDS_SEL_CON_IDX_8		0x00001460
-#define SNDBDS_SEL_CON_IDX_9		0x00001464
-#define SNDBDS_SEL_CON_IDX_10		0x00001468
-#define SNDBDS_SEL_CON_IDX_11		0x0000146c
-#define SNDBDS_SEL_CON_IDX_12		0x00001470
-#define SNDBDS_SEL_CON_IDX_13		0x00001474
-#define SNDBDS_SEL_CON_IDX_14		0x00001478
-#define SNDBDS_SEL_CON_IDX_15		0x0000147c
-/* 0x1480 --> 0x1800 unused */
-
-/* Send BD initiator control registers */
-#define SNDBDI_MODE			0x00001800
-#define  SNDBDI_MODE_RESET		 0x00000001
-#define  SNDBDI_MODE_ENABLE		 0x00000002
-#define  SNDBDI_MODE_ATTN_ENABLE	 0x00000004
-#define  SNDBDI_MODE_MULTI_TXQ_EN	 0x00000020
-#define SNDBDI_STATUS			0x00001804
-#define  SNDBDI_STATUS_ERROR_ATTN	 0x00000004
-#define SNDBDI_IN_PROD_IDX_0		0x00001808
-#define SNDBDI_IN_PROD_IDX_1		0x0000180c
-#define SNDBDI_IN_PROD_IDX_2		0x00001810
-#define SNDBDI_IN_PROD_IDX_3		0x00001814
-#define SNDBDI_IN_PROD_IDX_4		0x00001818
-#define SNDBDI_IN_PROD_IDX_5		0x0000181c
-#define SNDBDI_IN_PROD_IDX_6		0x00001820
-#define SNDBDI_IN_PROD_IDX_7		0x00001824
-#define SNDBDI_IN_PROD_IDX_8		0x00001828
-#define SNDBDI_IN_PROD_IDX_9		0x0000182c
-#define SNDBDI_IN_PROD_IDX_10		0x00001830
-#define SNDBDI_IN_PROD_IDX_11		0x00001834
-#define SNDBDI_IN_PROD_IDX_12		0x00001838
-#define SNDBDI_IN_PROD_IDX_13		0x0000183c
-#define SNDBDI_IN_PROD_IDX_14		0x00001840
-#define SNDBDI_IN_PROD_IDX_15		0x00001844
-/* 0x1848 --> 0x1c00 unused */
-
-/* Send BD completion control registers */
-#define SNDBDC_MODE			0x00001c00
-#define SNDBDC_MODE_RESET		 0x00000001
-#define SNDBDC_MODE_ENABLE		 0x00000002
-#define SNDBDC_MODE_ATTN_ENABLE		 0x00000004
-/* 0x1c04 --> 0x2000 unused */
-
-/* Receive list placement control registers */
-#define RCVLPC_MODE			0x00002000
-#define  RCVLPC_MODE_RESET		 0x00000001
-#define  RCVLPC_MODE_ENABLE		 0x00000002
-#define  RCVLPC_MODE_CLASS0_ATTN_ENAB	 0x00000004
-#define  RCVLPC_MODE_MAPOOR_AATTN_ENAB	 0x00000008
-#define  RCVLPC_MODE_STAT_OFLOW_ENAB	 0x00000010
-#define RCVLPC_STATUS			0x00002004
-#define  RCVLPC_STATUS_CLASS0		 0x00000004
-#define  RCVLPC_STATUS_MAPOOR		 0x00000008
-#define  RCVLPC_STATUS_STAT_OFLOW	 0x00000010
-#define RCVLPC_LOCK			0x00002008
-#define  RCVLPC_LOCK_REQ_MASK		 0x0000ffff
-#define  RCVLPC_LOCK_REQ_SHIFT		 0
-#define  RCVLPC_LOCK_GRANT_MASK		 0xffff0000
-#define  RCVLPC_LOCK_GRANT_SHIFT	 16
-#define RCVLPC_NON_EMPTY_BITS		0x0000200c
-#define  RCVLPC_NON_EMPTY_BITS_MASK	 0x0000ffff
-#define RCVLPC_CONFIG			0x00002010
-#define RCVLPC_STATSCTRL		0x00002014
-#define  RCVLPC_STATSCTRL_ENABLE	 0x00000001
-#define  RCVLPC_STATSCTRL_FASTUPD	 0x00000002
-#define RCVLPC_STATS_ENABLE		0x00002018
-#define  RCVLPC_STATSENAB_ASF_FIX	 0x00000002
-#define  RCVLPC_STATSENAB_DACK_FIX	 0x00040000
-#define  RCVLPC_STATSENAB_LNGBRST_RFIX	 0x00400000
-#define RCVLPC_STATS_INCMASK		0x0000201c
-/* 0x2020 --> 0x2100 unused */
-#define RCVLPC_SELLST_BASE		0x00002100 /* 16 16-byte entries */
-#define  SELLST_TAIL			0x00000004
-#define  SELLST_CONT			0x00000008
-#define  SELLST_UNUSED			0x0000000c
-#define RCVLPC_COS_CNTL_BASE		0x00002200 /* 16 4-byte entries */
-#define RCVLPC_DROP_FILTER_CNT		0x00002240
-#define RCVLPC_DMA_WQ_FULL_CNT		0x00002244
-#define RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248
-#define RCVLPC_NO_RCV_BD_CNT		0x0000224c
-#define RCVLPC_IN_DISCARDS_CNT		0x00002250
-#define RCVLPC_IN_ERRORS_CNT		0x00002254
-#define RCVLPC_RCV_THRESH_HIT_CNT	0x00002258
-/* 0x225c --> 0x2400 unused */
-
-/* Receive Data and Receive BD Initiator Control */
-#define RCVDBDI_MODE			0x00002400
-#define  RCVDBDI_MODE_RESET		 0x00000001
-#define  RCVDBDI_MODE_ENABLE		 0x00000002
-#define  RCVDBDI_MODE_JUMBOBD_NEEDED	 0x00000004
-#define  RCVDBDI_MODE_FRM_TOO_BIG	 0x00000008
-#define  RCVDBDI_MODE_INV_RING_SZ	 0x00000010
-#define  RCVDBDI_MODE_LRG_RING_SZ	 0x00010000
-#define RCVDBDI_STATUS			0x00002404
-#define  RCVDBDI_STATUS_JUMBOBD_NEEDED	 0x00000004
-#define  RCVDBDI_STATUS_FRM_TOO_BIG	 0x00000008
-#define  RCVDBDI_STATUS_INV_RING_SZ	 0x00000010
-#define RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408
-/* 0x240c --> 0x2440 unused */
-#define RCVDBDI_JUMBO_BD		0x00002440 /* TG3_BDINFO_... */
-#define RCVDBDI_STD_BD			0x00002450 /* TG3_BDINFO_... */
-#define RCVDBDI_MINI_BD			0x00002460 /* TG3_BDINFO_... */
-#define RCVDBDI_JUMBO_CON_IDX		0x00002470
-#define RCVDBDI_STD_CON_IDX		0x00002474
-#define RCVDBDI_MINI_CON_IDX		0x00002478
-/* 0x247c --> 0x2480 unused */
-#define RCVDBDI_BD_PROD_IDX_0		0x00002480
-#define RCVDBDI_BD_PROD_IDX_1		0x00002484
-#define RCVDBDI_BD_PROD_IDX_2		0x00002488
-#define RCVDBDI_BD_PROD_IDX_3		0x0000248c
-#define RCVDBDI_BD_PROD_IDX_4		0x00002490
-#define RCVDBDI_BD_PROD_IDX_5		0x00002494
-#define RCVDBDI_BD_PROD_IDX_6		0x00002498
-#define RCVDBDI_BD_PROD_IDX_7		0x0000249c
-#define RCVDBDI_BD_PROD_IDX_8		0x000024a0
-#define RCVDBDI_BD_PROD_IDX_9		0x000024a4
-#define RCVDBDI_BD_PROD_IDX_10		0x000024a8
-#define RCVDBDI_BD_PROD_IDX_11		0x000024ac
-#define RCVDBDI_BD_PROD_IDX_12		0x000024b0
-#define RCVDBDI_BD_PROD_IDX_13		0x000024b4
-#define RCVDBDI_BD_PROD_IDX_14		0x000024b8
-#define RCVDBDI_BD_PROD_IDX_15		0x000024bc
-#define RCVDBDI_HWDIAG			0x000024c0
-/* 0x24c4 --> 0x2800 unused */
-
-/* Receive Data Completion Control */
-#define RCVDCC_MODE			0x00002800
-#define  RCVDCC_MODE_RESET		 0x00000001
-#define  RCVDCC_MODE_ENABLE		 0x00000002
-#define  RCVDCC_MODE_ATTN_ENABLE	 0x00000004
-/* 0x2804 --> 0x2c00 unused */
-
-/* Receive BD Initiator Control Registers */
-#define RCVBDI_MODE			0x00002c00
-#define  RCVBDI_MODE_RESET		 0x00000001
-#define  RCVBDI_MODE_ENABLE		 0x00000002
-#define  RCVBDI_MODE_RCB_ATTN_ENAB	 0x00000004
-#define RCVBDI_STATUS			0x00002c04
-#define  RCVBDI_STATUS_RCB_ATTN		 0x00000004
-#define RCVBDI_JUMBO_PROD_IDX		0x00002c08
-#define RCVBDI_STD_PROD_IDX		0x00002c0c
-#define RCVBDI_MINI_PROD_IDX		0x00002c10
-#define RCVBDI_MINI_THRESH		0x00002c14
-#define RCVBDI_STD_THRESH		0x00002c18
-#define RCVBDI_JUMBO_THRESH		0x00002c1c
-/* 0x2c20 --> 0x2d00 unused */
-
-#define STD_REPLENISH_LWM		0x00002d00
-#define JMB_REPLENISH_LWM		0x00002d04
-/* 0x2d08 --> 0x3000 unused */
-
-/* Receive BD Completion Control Registers */
-#define RCVCC_MODE			0x00003000
-#define  RCVCC_MODE_RESET		 0x00000001
-#define  RCVCC_MODE_ENABLE		 0x00000002
-#define  RCVCC_MODE_ATTN_ENABLE		 0x00000004
-#define RCVCC_STATUS			0x00003004
-#define  RCVCC_STATUS_ERROR_ATTN	 0x00000004
-#define RCVCC_JUMP_PROD_IDX		0x00003008
-#define RCVCC_STD_PROD_IDX		0x0000300c
-#define RCVCC_MINI_PROD_IDX		0x00003010
-/* 0x3014 --> 0x3400 unused */
-
-/* Receive list selector control registers */
-#define RCVLSC_MODE			0x00003400
-#define  RCVLSC_MODE_RESET		 0x00000001
-#define  RCVLSC_MODE_ENABLE		 0x00000002
-#define  RCVLSC_MODE_ATTN_ENABLE	 0x00000004
-#define RCVLSC_STATUS			0x00003404
-#define  RCVLSC_STATUS_ERROR_ATTN	 0x00000004
-/* 0x3408 --> 0x3600 unused */
-
-/* CPMU registers */
-#define TG3_CPMU_CTRL			0x00003600
-#define  CPMU_CTRL_LINK_IDLE_MODE	 0x00000200
-#define  CPMU_CTRL_LINK_AWARE_MODE	 0x00000400
-#define  CPMU_CTRL_LINK_SPEED_MODE	 0x00004000
-#define  CPMU_CTRL_GPHY_10MB_RXONLY	 0x00010000
-#define TG3_CPMU_LSPD_10MB_CLK		0x00003604
-#define  CPMU_LSPD_10MB_MACCLK_MASK	 0x001f0000
-#define  CPMU_LSPD_10MB_MACCLK_6_25	 0x00130000
-/* 0x3608 --> 0x360c unused */
-
-#define TG3_CPMU_LSPD_1000MB_CLK	0x0000360c
-#define  CPMU_LSPD_1000MB_MACCLK_62_5	 0x00000000
-#define  CPMU_LSPD_1000MB_MACCLK_12_5	 0x00110000
-#define  CPMU_LSPD_1000MB_MACCLK_MASK	 0x001f0000
-#define TG3_CPMU_LNK_AWARE_PWRMD	0x00003610
-#define  CPMU_LNK_AWARE_MACCLK_MASK	 0x001f0000
-#define  CPMU_LNK_AWARE_MACCLK_6_25	 0x00130000
-
-#define TG3_CPMU_D0_CLCK_POLICY		0x00003614
-/* 0x3614 --> 0x361c unused */
-
-#define TG3_CPMU_HST_ACC		0x0000361c
-#define  CPMU_HST_ACC_MACCLK_MASK	 0x001f0000
-#define  CPMU_HST_ACC_MACCLK_6_25	 0x00130000
-/* 0x3620 --> 0x3630 unused */
-
-#define TG3_CPMU_CLCK_ORIDE		0x00003624
-#define  CPMU_CLCK_ORIDE_MAC_ORIDE_EN	 0x80000000
-
-#define TG3_CPMU_CLCK_ORIDE_EN		0x00003628
-#define  CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN	 0x00002000
-
-#define TG3_CPMU_CLCK_STAT		0x00003630
-#define  CPMU_CLCK_STAT_MAC_CLCK_MASK	 0x001f0000
-#define  CPMU_CLCK_STAT_MAC_CLCK_62_5	 0x00000000
-#define  CPMU_CLCK_STAT_MAC_CLCK_12_5	 0x00110000
-#define  CPMU_CLCK_STAT_MAC_CLCK_6_25	 0x00130000
-/* 0x3634 --> 0x365c unused */
-
-#define TG3_CPMU_MUTEX_REQ		0x0000365c
-#define  CPMU_MUTEX_REQ_DRIVER		 0x00001000
-#define TG3_CPMU_MUTEX_GNT		0x00003660
-#define  CPMU_MUTEX_GNT_DRIVER		 0x00001000
-#define TG3_CPMU_PHY_STRAP		0x00003664
-#define TG3_CPMU_PHY_STRAP_IS_SERDES	 0x00000020
-/* 0x3664 --> 0x36b0 unused */
-
-#define TG3_CPMU_EEE_MODE		0x000036b0
-#define  TG3_CPMU_EEEMD_APE_TX_DET_EN	 0x00000004
-#define  TG3_CPMU_EEEMD_ERLY_L1_XIT_DET	 0x00000008
-#define  TG3_CPMU_EEEMD_SND_IDX_DET_EN	 0x00000040
-#define  TG3_CPMU_EEEMD_LPI_ENABLE	 0x00000080
-#define  TG3_CPMU_EEEMD_LPI_IN_TX	 0x00000100
-#define  TG3_CPMU_EEEMD_LPI_IN_RX	 0x00000200
-#define  TG3_CPMU_EEEMD_EEE_ENABLE	 0x00100000
-#define TG3_CPMU_EEE_DBTMR1		0x000036b4
-#define  TG3_CPMU_DBTMR1_PCIEXIT_2047US	 0x07ff0000
-#define  TG3_CPMU_DBTMR1_LNKIDLE_2047US	 0x000070ff
-#define TG3_CPMU_EEE_DBTMR2		0x000036b8
-#define  TG3_CPMU_DBTMR2_APE_TX_2047US	 0x07ff0000
-#define  TG3_CPMU_DBTMR2_TXIDXEQ_2047US	 0x000070ff
-#define TG3_CPMU_EEE_LNKIDL_CTRL	0x000036bc
-#define  TG3_CPMU_EEE_LNKIDL_PCIE_NL0	 0x01000000
-#define  TG3_CPMU_EEE_LNKIDL_UART_IDL	 0x00000004
-/* 0x36c0 --> 0x36d0 unused */
-
-#define TG3_CPMU_EEE_CTRL		0x000036d0
-#define TG3_CPMU_EEE_CTRL_EXIT_16_5_US	 0x0000019d
-#define TG3_CPMU_EEE_CTRL_EXIT_36_US	 0x00000384
-#define TG3_CPMU_EEE_CTRL_EXIT_20_1_US	 0x000001f8
-/* 0x36d4 --> 0x3800 unused */
-
-/* Mbuf cluster free registers */
-#define MBFREE_MODE			0x00003800
-#define  MBFREE_MODE_RESET		 0x00000001
-#define  MBFREE_MODE_ENABLE		 0x00000002
-#define MBFREE_STATUS			0x00003804
-/* 0x3808 --> 0x3c00 unused */
-
-/* Host coalescing control registers */
-#define HOSTCC_MODE			0x00003c00
-#define  HOSTCC_MODE_RESET		 0x00000001
-#define  HOSTCC_MODE_ENABLE		 0x00000002
-#define  HOSTCC_MODE_ATTN		 0x00000004
-#define  HOSTCC_MODE_NOW		 0x00000008
-#define  HOSTCC_MODE_FULL_STATUS	 0x00000000
-#define  HOSTCC_MODE_64BYTE		 0x00000080
-#define  HOSTCC_MODE_32BYTE		 0x00000100
-#define  HOSTCC_MODE_CLRTICK_RXBD	 0x00000200
-#define  HOSTCC_MODE_CLRTICK_TXBD	 0x00000400
-#define  HOSTCC_MODE_NOINT_ON_NOW	 0x00000800
-#define  HOSTCC_MODE_NOINT_ON_FORCE	 0x00001000
-#define  HOSTCC_MODE_COAL_VEC1_NOW	 0x00002000
-#define HOSTCC_STATUS			0x00003c04
-#define  HOSTCC_STATUS_ERROR_ATTN	 0x00000004
-#define HOSTCC_RXCOL_TICKS		0x00003c08
-#define  LOW_RXCOL_TICKS		 0x00000032
-#define  LOW_RXCOL_TICKS_CLRTCKS	 0x00000014
-#define  DEFAULT_RXCOL_TICKS		 0x00000048
-#define  HIGH_RXCOL_TICKS		 0x00000096
-#define  MAX_RXCOL_TICKS		 0x000003ff
-#define HOSTCC_TXCOL_TICKS		0x00003c0c
-#define  LOW_TXCOL_TICKS		 0x00000096
-#define  LOW_TXCOL_TICKS_CLRTCKS	 0x00000048
-#define  DEFAULT_TXCOL_TICKS		 0x0000012c
-#define  HIGH_TXCOL_TICKS		 0x00000145
-#define  MAX_TXCOL_TICKS		 0x000003ff
-#define HOSTCC_RXMAX_FRAMES		0x00003c10
-#define  LOW_RXMAX_FRAMES		 0x00000005
-#define  DEFAULT_RXMAX_FRAMES		 0x00000008
-#define  HIGH_RXMAX_FRAMES		 0x00000012
-#define  MAX_RXMAX_FRAMES		 0x000000ff
-#define HOSTCC_TXMAX_FRAMES		0x00003c14
-#define  LOW_TXMAX_FRAMES		 0x00000035
-#define  DEFAULT_TXMAX_FRAMES		 0x0000004b
-#define  HIGH_TXMAX_FRAMES		 0x00000052
-#define  MAX_TXMAX_FRAMES		 0x000000ff
-#define HOSTCC_RXCOAL_TICK_INT		0x00003c18
-#define  DEFAULT_RXCOAL_TICK_INT	 0x00000019
-#define  DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014
-#define  MAX_RXCOAL_TICK_INT		 0x000003ff
-#define HOSTCC_TXCOAL_TICK_INT		0x00003c1c
-#define  DEFAULT_TXCOAL_TICK_INT	 0x00000019
-#define  DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014
-#define  MAX_TXCOAL_TICK_INT		 0x000003ff
-#define HOSTCC_RXCOAL_MAXF_INT		0x00003c20
-#define  DEFAULT_RXCOAL_MAXF_INT	 0x00000005
-#define  MAX_RXCOAL_MAXF_INT		 0x000000ff
-#define HOSTCC_TXCOAL_MAXF_INT		0x00003c24
-#define  DEFAULT_TXCOAL_MAXF_INT	 0x00000005
-#define  MAX_TXCOAL_MAXF_INT		 0x000000ff
-#define HOSTCC_STAT_COAL_TICKS		0x00003c28
-#define  DEFAULT_STAT_COAL_TICKS	 0x000f4240
-#define  MAX_STAT_COAL_TICKS		 0xd693d400
-#define  MIN_STAT_COAL_TICKS		 0x00000064
-/* 0x3c2c --> 0x3c30 unused */
-#define HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30 /* 64-bit */
-#define HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38 /* 64-bit */
-#define HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40
-#define HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44
-#define HOSTCC_FLOW_ATTN		0x00003c48
-#define HOSTCC_FLOW_ATTN_MBUF_LWM	 0x00000040
-/* 0x3c4c --> 0x3c50 unused */
-#define HOSTCC_JUMBO_CON_IDX		0x00003c50
-#define HOSTCC_STD_CON_IDX		0x00003c54
-#define HOSTCC_MINI_CON_IDX		0x00003c58
-/* 0x3c5c --> 0x3c80 unused */
-#define HOSTCC_RET_PROD_IDX_0		0x00003c80
-#define HOSTCC_RET_PROD_IDX_1		0x00003c84
-#define HOSTCC_RET_PROD_IDX_2		0x00003c88
-#define HOSTCC_RET_PROD_IDX_3		0x00003c8c
-#define HOSTCC_RET_PROD_IDX_4		0x00003c90
-#define HOSTCC_RET_PROD_IDX_5		0x00003c94
-#define HOSTCC_RET_PROD_IDX_6		0x00003c98
-#define HOSTCC_RET_PROD_IDX_7		0x00003c9c
-#define HOSTCC_RET_PROD_IDX_8		0x00003ca0
-#define HOSTCC_RET_PROD_IDX_9		0x00003ca4
-#define HOSTCC_RET_PROD_IDX_10		0x00003ca8
-#define HOSTCC_RET_PROD_IDX_11		0x00003cac
-#define HOSTCC_RET_PROD_IDX_12		0x00003cb0
-#define HOSTCC_RET_PROD_IDX_13		0x00003cb4
-#define HOSTCC_RET_PROD_IDX_14		0x00003cb8
-#define HOSTCC_RET_PROD_IDX_15		0x00003cbc
-#define HOSTCC_SND_CON_IDX_0		0x00003cc0
-#define HOSTCC_SND_CON_IDX_1		0x00003cc4
-#define HOSTCC_SND_CON_IDX_2		0x00003cc8
-#define HOSTCC_SND_CON_IDX_3		0x00003ccc
-#define HOSTCC_SND_CON_IDX_4		0x00003cd0
-#define HOSTCC_SND_CON_IDX_5		0x00003cd4
-#define HOSTCC_SND_CON_IDX_6		0x00003cd8
-#define HOSTCC_SND_CON_IDX_7		0x00003cdc
-#define HOSTCC_SND_CON_IDX_8		0x00003ce0
-#define HOSTCC_SND_CON_IDX_9		0x00003ce4
-#define HOSTCC_SND_CON_IDX_10		0x00003ce8
-#define HOSTCC_SND_CON_IDX_11		0x00003cec
-#define HOSTCC_SND_CON_IDX_12		0x00003cf0
-#define HOSTCC_SND_CON_IDX_13		0x00003cf4
-#define HOSTCC_SND_CON_IDX_14		0x00003cf8
-#define HOSTCC_SND_CON_IDX_15		0x00003cfc
-#define HOSTCC_STATBLCK_RING1		0x00003d00
-/* 0x3d00 --> 0x3d80 unused */
-
-#define HOSTCC_RXCOL_TICKS_VEC1		0x00003d80
-#define HOSTCC_TXCOL_TICKS_VEC1		0x00003d84
-#define HOSTCC_RXMAX_FRAMES_VEC1	0x00003d88
-#define HOSTCC_TXMAX_FRAMES_VEC1	0x00003d8c
-#define HOSTCC_RXCOAL_MAXF_INT_VEC1	0x00003d90
-#define HOSTCC_TXCOAL_MAXF_INT_VEC1	0x00003d94
-/* 0x3d98 --> 0x4000 unused */
-
-/* Memory arbiter control registers */
-#define MEMARB_MODE			0x00004000
-#define  MEMARB_MODE_RESET		 0x00000001
-#define  MEMARB_MODE_ENABLE		 0x00000002
-#define MEMARB_STATUS			0x00004004
-#define MEMARB_TRAP_ADDR_LOW		0x00004008
-#define MEMARB_TRAP_ADDR_HIGH		0x0000400c
-/* 0x4010 --> 0x4400 unused */
-
-/* Buffer manager control registers */
-#define BUFMGR_MODE			0x00004400
-#define  BUFMGR_MODE_RESET		 0x00000001
-#define  BUFMGR_MODE_ENABLE		 0x00000002
-#define  BUFMGR_MODE_ATTN_ENABLE	 0x00000004
-#define  BUFMGR_MODE_BM_TEST		 0x00000008
-#define  BUFMGR_MODE_MBLOW_ATTN_ENAB	 0x00000010
-#define  BUFMGR_MODE_NO_TX_UNDERRUN	 0x80000000
-#define BUFMGR_STATUS			0x00004404
-#define  BUFMGR_STATUS_ERROR		 0x00000004
-#define  BUFMGR_STATUS_MBLOW		 0x00000010
-#define BUFMGR_MB_POOL_ADDR		0x00004408
-#define BUFMGR_MB_POOL_SIZE		0x0000440c
-#define BUFMGR_MB_RDMA_LOW_WATER	0x00004410
-#define  DEFAULT_MB_RDMA_LOW_WATER	 0x00000050
-#define  DEFAULT_MB_RDMA_LOW_WATER_5705	 0x00000000
-#define  DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
-#define  DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000
-#define BUFMGR_MB_MACRX_LOW_WATER	0x00004414
-#define  DEFAULT_MB_MACRX_LOW_WATER	  0x00000020
-#define  DEFAULT_MB_MACRX_LOW_WATER_5705  0x00000010
-#define  DEFAULT_MB_MACRX_LOW_WATER_5906  0x00000004
-#define  DEFAULT_MB_MACRX_LOW_WATER_57765 0x0000002a
-#define  DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
-#define  DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
-#define  DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765 0x0000007e
-#define BUFMGR_MB_HIGH_WATER		0x00004418
-#define  DEFAULT_MB_HIGH_WATER		 0x00000060
-#define  DEFAULT_MB_HIGH_WATER_5705	 0x00000060
-#define  DEFAULT_MB_HIGH_WATER_5906	 0x00000010
-#define  DEFAULT_MB_HIGH_WATER_57765	 0x000000a0
-#define  DEFAULT_MB_HIGH_WATER_JUMBO	 0x0000017c
-#define  DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
-#define  DEFAULT_MB_HIGH_WATER_JUMBO_57765 0x000000ea
-#define BUFMGR_RX_MB_ALLOC_REQ		0x0000441c
-#define  BUFMGR_MB_ALLOC_BIT		 0x10000000
-#define BUFMGR_RX_MB_ALLOC_RESP		0x00004420
-#define BUFMGR_TX_MB_ALLOC_REQ		0x00004424
-#define BUFMGR_TX_MB_ALLOC_RESP		0x00004428
-#define BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c
-#define BUFMGR_DMA_DESC_POOL_SIZE	0x00004430
-#define BUFMGR_DMA_LOW_WATER		0x00004434
-#define  DEFAULT_DMA_LOW_WATER		 0x00000005
-#define BUFMGR_DMA_HIGH_WATER		0x00004438
-#define  DEFAULT_DMA_HIGH_WATER		 0x0000000a
-#define BUFMGR_RX_DMA_ALLOC_REQ		0x0000443c
-#define BUFMGR_RX_DMA_ALLOC_RESP	0x00004440
-#define BUFMGR_TX_DMA_ALLOC_REQ		0x00004444
-#define BUFMGR_TX_DMA_ALLOC_RESP	0x00004448
-#define BUFMGR_HWDIAG_0			0x0000444c
-#define BUFMGR_HWDIAG_1			0x00004450
-#define BUFMGR_HWDIAG_2			0x00004454
-/* 0x4458 --> 0x4800 unused */
-
-/* Read DMA control registers */
-#define RDMAC_MODE			0x00004800
-#define  RDMAC_MODE_RESET		 0x00000001
-#define  RDMAC_MODE_ENABLE		 0x00000002
-#define  RDMAC_MODE_TGTABORT_ENAB	 0x00000004
-#define  RDMAC_MODE_MSTABORT_ENAB	 0x00000008
-#define  RDMAC_MODE_PARITYERR_ENAB	 0x00000010
-#define  RDMAC_MODE_ADDROFLOW_ENAB	 0x00000020
-#define  RDMAC_MODE_FIFOOFLOW_ENAB	 0x00000040
-#define  RDMAC_MODE_FIFOURUN_ENAB	 0x00000080
-#define  RDMAC_MODE_FIFOOREAD_ENAB	 0x00000100
-#define  RDMAC_MODE_LNGREAD_ENAB	 0x00000200
-#define  RDMAC_MODE_SPLIT_ENABLE	 0x00000800
-#define  RDMAC_MODE_BD_SBD_CRPT_ENAB	 0x00000800
-#define  RDMAC_MODE_SPLIT_RESET		 0x00001000
-#define  RDMAC_MODE_MBUF_RBD_CRPT_ENAB	 0x00001000
-#define  RDMAC_MODE_MBUF_SBD_CRPT_ENAB	 0x00002000
-#define  RDMAC_MODE_FIFO_SIZE_128	 0x00020000
-#define  RDMAC_MODE_FIFO_LONG_BURST	 0x00030000
-#define  RDMAC_MODE_MULT_DMA_RD_DIS	 0x01000000
-#define  RDMAC_MODE_IPV4_LSO_EN		 0x08000000
-#define  RDMAC_MODE_IPV6_LSO_EN		 0x10000000
-#define  RDMAC_MODE_H2BNC_VLAN_DET	 0x20000000
-#define RDMAC_STATUS			0x00004804
-#define  RDMAC_STATUS_TGTABORT		 0x00000004
-#define  RDMAC_STATUS_MSTABORT		 0x00000008
-#define  RDMAC_STATUS_PARITYERR		 0x00000010
-#define  RDMAC_STATUS_ADDROFLOW		 0x00000020
-#define  RDMAC_STATUS_FIFOOFLOW		 0x00000040
-#define  RDMAC_STATUS_FIFOURUN		 0x00000080
-#define  RDMAC_STATUS_FIFOOREAD		 0x00000100
-#define  RDMAC_STATUS_LNGREAD		 0x00000200
-/* 0x4808 --> 0x4900 unused */
-
-#define TG3_RDMA_RSRVCTRL_REG		0x00004900
-#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX	 0x00000004
-#define TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K	 0x00000c00
-#define TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK	 0x00000ff0
-#define TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K	 0x000c0000
-#define TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK	 0x000ff000
-#define TG3_RDMA_RSRVCTRL_TXMRGN_320B	 0x28000000
-#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK	 0xffe00000
-/* 0x4904 --> 0x4910 unused */
-
-#define TG3_LSO_RD_DMA_CRPTEN_CTRL	0x00004910
-#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K	 0x00030000
-#define TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K	 0x000c0000
-/* 0x4914 --> 0x4c00 unused */
-
-/* Write DMA control registers */
-#define WDMAC_MODE			0x00004c00
-#define  WDMAC_MODE_RESET		 0x00000001
-#define  WDMAC_MODE_ENABLE		 0x00000002
-#define  WDMAC_MODE_TGTABORT_ENAB	 0x00000004
-#define  WDMAC_MODE_MSTABORT_ENAB	 0x00000008
-#define  WDMAC_MODE_PARITYERR_ENAB	 0x00000010
-#define  WDMAC_MODE_ADDROFLOW_ENAB	 0x00000020
-#define  WDMAC_MODE_FIFOOFLOW_ENAB	 0x00000040
-#define  WDMAC_MODE_FIFOURUN_ENAB	 0x00000080
-#define  WDMAC_MODE_FIFOOREAD_ENAB	 0x00000100
-#define  WDMAC_MODE_LNGREAD_ENAB	 0x00000200
-#define  WDMAC_MODE_RX_ACCEL		 0x00000400
-#define  WDMAC_MODE_STATUS_TAG_FIX	 0x20000000
-#define  WDMAC_MODE_BURST_ALL_DATA	 0xc0000000
-#define WDMAC_STATUS			0x00004c04
-#define  WDMAC_STATUS_TGTABORT		 0x00000004
-#define  WDMAC_STATUS_MSTABORT		 0x00000008
-#define  WDMAC_STATUS_PARITYERR		 0x00000010
-#define  WDMAC_STATUS_ADDROFLOW		 0x00000020
-#define  WDMAC_STATUS_FIFOOFLOW		 0x00000040
-#define  WDMAC_STATUS_FIFOURUN		 0x00000080
-#define  WDMAC_STATUS_FIFOOREAD		 0x00000100
-#define  WDMAC_STATUS_LNGREAD		 0x00000200
-/* 0x4c08 --> 0x5000 unused */
-
-/* Per-cpu register offsets (arm9) */
-#define CPU_MODE			0x00000000
-#define  CPU_MODE_RESET			 0x00000001
-#define  CPU_MODE_HALT			 0x00000400
-#define CPU_STATE			0x00000004
-#define CPU_EVTMASK			0x00000008
-/* 0xc --> 0x1c reserved */
-#define CPU_PC				0x0000001c
-#define CPU_INSN			0x00000020
-#define CPU_SPAD_UFLOW			0x00000024
-#define CPU_WDOG_CLEAR			0x00000028
-#define CPU_WDOG_VECTOR			0x0000002c
-#define CPU_WDOG_PC			0x00000030
-#define CPU_HW_BP			0x00000034
-/* 0x38 --> 0x44 unused */
-#define CPU_WDOG_SAVED_STATE		0x00000044
-#define CPU_LAST_BRANCH_ADDR		0x00000048
-#define CPU_SPAD_UFLOW_SET		0x0000004c
-/* 0x50 --> 0x200 unused */
-#define CPU_R0				0x00000200
-#define CPU_R1				0x00000204
-#define CPU_R2				0x00000208
-#define CPU_R3				0x0000020c
-#define CPU_R4				0x00000210
-#define CPU_R5				0x00000214
-#define CPU_R6				0x00000218
-#define CPU_R7				0x0000021c
-#define CPU_R8				0x00000220
-#define CPU_R9				0x00000224
-#define CPU_R10				0x00000228
-#define CPU_R11				0x0000022c
-#define CPU_R12				0x00000230
-#define CPU_R13				0x00000234
-#define CPU_R14				0x00000238
-#define CPU_R15				0x0000023c
-#define CPU_R16				0x00000240
-#define CPU_R17				0x00000244
-#define CPU_R18				0x00000248
-#define CPU_R19				0x0000024c
-#define CPU_R20				0x00000250
-#define CPU_R21				0x00000254
-#define CPU_R22				0x00000258
-#define CPU_R23				0x0000025c
-#define CPU_R24				0x00000260
-#define CPU_R25				0x00000264
-#define CPU_R26				0x00000268
-#define CPU_R27				0x0000026c
-#define CPU_R28				0x00000270
-#define CPU_R29				0x00000274
-#define CPU_R30				0x00000278
-#define CPU_R31				0x0000027c
-/* 0x280 --> 0x400 unused */
-
-#define RX_CPU_BASE			0x00005000
-#define RX_CPU_MODE			0x00005000
-#define RX_CPU_STATE			0x00005004
-#define RX_CPU_PGMCTR			0x0000501c
-#define RX_CPU_HWBKPT			0x00005034
-#define TX_CPU_BASE			0x00005400
-#define TX_CPU_MODE			0x00005400
-#define TX_CPU_STATE			0x00005404
-#define TX_CPU_PGMCTR			0x0000541c
-
-#define VCPU_STATUS			0x00005100
-#define  VCPU_STATUS_INIT_DONE		 0x04000000
-#define  VCPU_STATUS_DRV_RESET		 0x08000000
-
-#define VCPU_CFGSHDW			0x00005104
-#define  VCPU_CFGSHDW_WOL_ENABLE	 0x00000001
-#define  VCPU_CFGSHDW_WOL_MAGPKT	 0x00000004
-#define  VCPU_CFGSHDW_ASPM_DBNC		 0x00001000
-
-/* Mailboxes */
-#define GRCMBOX_BASE			0x00005600
-#define GRCMBOX_INTERRUPT_0		0x00005800 /* 64-bit */
-#define GRCMBOX_INTERRUPT_1		0x00005808 /* 64-bit */
-#define GRCMBOX_INTERRUPT_2		0x00005810 /* 64-bit */
-#define GRCMBOX_INTERRUPT_3		0x00005818 /* 64-bit */
-#define GRCMBOX_GENERAL_0		0x00005820 /* 64-bit */
-#define GRCMBOX_GENERAL_1		0x00005828 /* 64-bit */
-#define GRCMBOX_GENERAL_2		0x00005830 /* 64-bit */
-#define GRCMBOX_GENERAL_3		0x00005838 /* 64-bit */
-#define GRCMBOX_GENERAL_4		0x00005840 /* 64-bit */
-#define GRCMBOX_GENERAL_5		0x00005848 /* 64-bit */
-#define GRCMBOX_GENERAL_6		0x00005850 /* 64-bit */
-#define GRCMBOX_GENERAL_7		0x00005858 /* 64-bit */
-#define GRCMBOX_RELOAD_STAT		0x00005860 /* 64-bit */
-#define GRCMBOX_RCVSTD_PROD_IDX		0x00005868 /* 64-bit */
-#define GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870 /* 64-bit */
-#define GRCMBOX_RCVMINI_PROD_IDX	0x00005878 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_0	0x00005880 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_1	0x00005888 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_2	0x00005890 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_3	0x00005898 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_4	0x000058a0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_5	0x000058a8 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_6	0x000058b0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_7	0x000058b8 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_8	0x000058c0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_9	0x000058c8 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_10	0x000058d0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_11	0x000058d8 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_12	0x000058e0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_13	0x000058e8 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_14	0x000058f0 /* 64-bit */
-#define GRCMBOX_RCVRET_CON_IDX_15	0x000058f8 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970 /* 64-bit */
-#define GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0 /* 64-bit */
-#define GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8 /* 64-bit */
-#define GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00
-#define GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04
-#define GRCMBOX_LOW_PRIO_EV_VEC		0x00005a08
-#define GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c
-/* 0x5a10 --> 0x5c00 */
-
-/* Flow Through queues */
-#define FTQ_RESET			0x00005c00
-/* 0x5c04 --> 0x5c10 unused */
-#define FTQ_DMA_NORM_READ_CTL		0x00005c10
-#define FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14
-#define FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18
-#define FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c
-#define FTQ_DMA_HIGH_READ_CTL		0x00005c20
-#define FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24
-#define FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28
-#define FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c
-#define FTQ_DMA_COMP_DISC_CTL		0x00005c30
-#define FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34
-#define FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38
-#define FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c
-#define FTQ_SEND_BD_COMP_CTL		0x00005c40
-#define FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44
-#define FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48
-#define FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c
-#define FTQ_SEND_DATA_INIT_CTL		0x00005c50
-#define FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54
-#define FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58
-#define FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c
-#define FTQ_DMA_NORM_WRITE_CTL		0x00005c60
-#define FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64
-#define FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68
-#define FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c
-#define FTQ_DMA_HIGH_WRITE_CTL		0x00005c70
-#define FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74
-#define FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78
-#define FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c
-#define FTQ_SWTYPE1_CTL			0x00005c80
-#define FTQ_SWTYPE1_FULL_CNT		0x00005c84
-#define FTQ_SWTYPE1_FIFO_ENQDEQ		0x00005c88
-#define FTQ_SWTYPE1_WRITE_PEEK		0x00005c8c
-#define FTQ_SEND_DATA_COMP_CTL		0x00005c90
-#define FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94
-#define FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98
-#define FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c
-#define FTQ_HOST_COAL_CTL		0x00005ca0
-#define FTQ_HOST_COAL_FULL_CNT		0x00005ca4
-#define FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8
-#define FTQ_HOST_COAL_WRITE_PEEK	0x00005cac
-#define FTQ_MAC_TX_CTL			0x00005cb0
-#define FTQ_MAC_TX_FULL_CNT		0x00005cb4
-#define FTQ_MAC_TX_FIFO_ENQDEQ		0x00005cb8
-#define FTQ_MAC_TX_WRITE_PEEK		0x00005cbc
-#define FTQ_MB_FREE_CTL			0x00005cc0
-#define FTQ_MB_FREE_FULL_CNT		0x00005cc4
-#define FTQ_MB_FREE_FIFO_ENQDEQ		0x00005cc8
-#define FTQ_MB_FREE_WRITE_PEEK		0x00005ccc
-#define FTQ_RCVBD_COMP_CTL		0x00005cd0
-#define FTQ_RCVBD_COMP_FULL_CNT		0x00005cd4
-#define FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8
-#define FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc
-#define FTQ_RCVLST_PLMT_CTL		0x00005ce0
-#define FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4
-#define FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8
-#define FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec
-#define FTQ_RCVDATA_INI_CTL		0x00005cf0
-#define FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4
-#define FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8
-#define FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc
-#define FTQ_RCVDATA_COMP_CTL		0x00005d00
-#define FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04
-#define FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08
-#define FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c
-#define FTQ_SWTYPE2_CTL			0x00005d10
-#define FTQ_SWTYPE2_FULL_CNT		0x00005d14
-#define FTQ_SWTYPE2_FIFO_ENQDEQ		0x00005d18
-#define FTQ_SWTYPE2_WRITE_PEEK		0x00005d1c
-/* 0x5d20 --> 0x6000 unused */
-
-/* Message signaled interrupt registers */
-#define MSGINT_MODE			0x00006000
-#define  MSGINT_MODE_RESET		 0x00000001
-#define  MSGINT_MODE_ENABLE		 0x00000002
-#define  MSGINT_MODE_ONE_SHOT_DISABLE	 0x00000020
-#define  MSGINT_MODE_MULTIVEC_EN	 0x00000080
-#define MSGINT_STATUS			0x00006004
-#define  MSGINT_STATUS_MSI_REQ		 0x00000001
-#define MSGINT_FIFO			0x00006008
-/* 0x600c --> 0x6400 unused */
-
-/* DMA completion registers */
-#define DMAC_MODE			0x00006400
-#define  DMAC_MODE_RESET		 0x00000001
-#define  DMAC_MODE_ENABLE		 0x00000002
-/* 0x6404 --> 0x6800 unused */
-
-/* GRC registers */
-#define GRC_MODE			0x00006800
-#define  GRC_MODE_UPD_ON_COAL		0x00000001
-#define  GRC_MODE_BSWAP_NONFRM_DATA	0x00000002
-#define  GRC_MODE_WSWAP_NONFRM_DATA	0x00000004
-#define  GRC_MODE_BSWAP_DATA		0x00000010
-#define  GRC_MODE_WSWAP_DATA		0x00000020
-#define  GRC_MODE_BYTE_SWAP_B2HRX_DATA	0x00000040
-#define  GRC_MODE_WORD_SWAP_B2HRX_DATA	0x00000080
-#define  GRC_MODE_SPLITHDR		0x00000100
-#define  GRC_MODE_NOFRM_CRACKING	0x00000200
-#define  GRC_MODE_INCL_CRC		0x00000400
-#define  GRC_MODE_ALLOW_BAD_FRMS	0x00000800
-#define  GRC_MODE_NOIRQ_ON_SENDS	0x00002000
-#define  GRC_MODE_NOIRQ_ON_RCV		0x00004000
-#define  GRC_MODE_FORCE_PCI32BIT	0x00008000
-#define  GRC_MODE_B2HRX_ENABLE		0x00008000
-#define  GRC_MODE_HOST_STACKUP		0x00010000
-#define  GRC_MODE_HOST_SENDBDS		0x00020000
-#define  GRC_MODE_HTX2B_ENABLE		0x00040000
-#define  GRC_MODE_NO_TX_PHDR_CSUM	0x00100000
-#define  GRC_MODE_NVRAM_WR_ENABLE	0x00200000
-#define  GRC_MODE_PCIE_TL_SEL		0x00000000
-#define  GRC_MODE_PCIE_PL_SEL		0x00400000
-#define  GRC_MODE_NO_RX_PHDR_CSUM	0x00800000
-#define  GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000
-#define  GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000
-#define  GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000
-#define  GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000
-#define  GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000
-#define  GRC_MODE_4X_NIC_SEND_RINGS	0x20000000
-#define  GRC_MODE_PCIE_DL_SEL		0x20000000
-#define  GRC_MODE_MCAST_FRM_ENABLE	0x40000000
-#define  GRC_MODE_PCIE_HI_1K_EN		0x80000000
-#define  GRC_MODE_PCIE_PORT_MASK	(GRC_MODE_PCIE_TL_SEL | \
-					 GRC_MODE_PCIE_PL_SEL | \
-					 GRC_MODE_PCIE_DL_SEL | \
-					 GRC_MODE_PCIE_HI_1K_EN)
-#define GRC_MISC_CFG			0x00006804
-#define  GRC_MISC_CFG_CORECLK_RESET	0x00000001
-#define  GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe
-#define  GRC_MISC_CFG_PRESCALAR_SHIFT	1
-#define  GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000
-#define  GRC_MISC_CFG_BOARD_ID_5700	0x0001e000
-#define  GRC_MISC_CFG_BOARD_ID_5701	0x00000000
-#define  GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000
-#define  GRC_MISC_CFG_BOARD_ID_5703	0x00000000
-#define  GRC_MISC_CFG_BOARD_ID_5703S	0x00002000
-#define  GRC_MISC_CFG_BOARD_ID_5704	0x00000000
-#define  GRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000
-#define  GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000
-#define  GRC_MISC_CFG_BOARD_ID_5788	0x00010000
-#define  GRC_MISC_CFG_BOARD_ID_5788M	0x00018000
-#define  GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000
-#define  GRC_MISC_CFG_EPHY_IDDQ		0x00200000
-#define  GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000
-#define GRC_LOCAL_CTRL			0x00006808
-#define  GRC_LCLCTRL_INT_ACTIVE		0x00000001
-#define  GRC_LCLCTRL_CLEARINT		0x00000002
-#define  GRC_LCLCTRL_SETINT		0x00000004
-#define  GRC_LCLCTRL_INT_ON_ATTN	0x00000008
-#define  GRC_LCLCTRL_GPIO_UART_SEL	0x00000010	/* 5755 only */
-#define  GRC_LCLCTRL_USE_SIG_DETECT	0x00000010	/* 5714/5780 only */
-#define  GRC_LCLCTRL_USE_EXT_SIG_DETECT	0x00000020	/* 5714/5780 only */
-#define  GRC_LCLCTRL_GPIO_INPUT3	0x00000020
-#define  GRC_LCLCTRL_GPIO_OE3		0x00000040
-#define  GRC_LCLCTRL_GPIO_OUTPUT3	0x00000080
-#define  GRC_LCLCTRL_GPIO_INPUT0	0x00000100
-#define  GRC_LCLCTRL_GPIO_INPUT1	0x00000200
-#define  GRC_LCLCTRL_GPIO_INPUT2	0x00000400
-#define  GRC_LCLCTRL_GPIO_OE0		0x00000800
-#define  GRC_LCLCTRL_GPIO_OE1		0x00001000
-#define  GRC_LCLCTRL_GPIO_OE2		0x00002000
-#define  GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000
-#define  GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000
-#define  GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000
-#define  GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000
-#define  GRC_LCLCTRL_MEMSZ_MASK		0x001c0000
-#define  GRC_LCLCTRL_MEMSZ_256K		0x00000000
-#define  GRC_LCLCTRL_MEMSZ_512K		0x00040000
-#define  GRC_LCLCTRL_MEMSZ_1M		0x00080000
-#define  GRC_LCLCTRL_MEMSZ_2M		0x000c0000
-#define  GRC_LCLCTRL_MEMSZ_4M		0x00100000
-#define  GRC_LCLCTRL_MEMSZ_8M		0x00140000
-#define  GRC_LCLCTRL_MEMSZ_16M		0x00180000
-#define  GRC_LCLCTRL_BANK_SELECT	0x00200000
-#define  GRC_LCLCTRL_SSRAM_TYPE		0x00400000
-#define  GRC_LCLCTRL_AUTO_SEEPROM	0x01000000
-#define GRC_TIMER			0x0000680c
-#define GRC_RX_CPU_EVENT		0x00006810
-#define  GRC_RX_CPU_DRIVER_EVENT	0x00004000
-#define GRC_RX_TIMER_REF		0x00006814
-#define GRC_RX_CPU_SEM			0x00006818
-#define GRC_REMOTE_RX_CPU_ATTN		0x0000681c
-#define GRC_TX_CPU_EVENT		0x00006820
-#define GRC_TX_TIMER_REF		0x00006824
-#define GRC_TX_CPU_SEM			0x00006828
-#define GRC_REMOTE_TX_CPU_ATTN		0x0000682c
-#define GRC_MEM_POWER_UP		0x00006830 /* 64-bit */
-#define GRC_EEPROM_ADDR			0x00006838
-#define  EEPROM_ADDR_WRITE		0x00000000
-#define  EEPROM_ADDR_READ		0x80000000
-#define  EEPROM_ADDR_COMPLETE		0x40000000
-#define  EEPROM_ADDR_FSM_RESET		0x20000000
-#define  EEPROM_ADDR_DEVID_MASK		0x1c000000
-#define  EEPROM_ADDR_DEVID_SHIFT	26
-#define  EEPROM_ADDR_START		0x02000000
-#define  EEPROM_ADDR_CLKPERD_SHIFT	16
-#define  EEPROM_ADDR_ADDR_MASK		0x0000ffff
-#define  EEPROM_ADDR_ADDR_SHIFT		0
-#define  EEPROM_DEFAULT_CLOCK_PERIOD	0x60
-#define  EEPROM_CHIP_SIZE		(64 * 1024)
-#define GRC_EEPROM_DATA			0x0000683c
-#define GRC_EEPROM_CTRL			0x00006840
-#define GRC_MDI_CTRL			0x00006844
-#define GRC_SEEPROM_DELAY		0x00006848
-/* 0x684c --> 0x6890 unused */
-#define GRC_VCPU_EXT_CTRL		0x00006890
-#define GRC_VCPU_EXT_CTRL_HALT_CPU	 0x00400000
-#define GRC_VCPU_EXT_CTRL_DISABLE_WOL	 0x20000000
-#define GRC_FASTBOOT_PC			0x00006894	/* 5752, 5755, 5787 */
-
-/* 0x6c00 --> 0x7000 unused */
-
-/* NVRAM Control registers */
-#define NVRAM_CMD			0x00007000
-#define  NVRAM_CMD_RESET		 0x00000001
-#define  NVRAM_CMD_DONE			 0x00000008
-#define  NVRAM_CMD_GO			 0x00000010
-#define  NVRAM_CMD_WR			 0x00000020
-#define  NVRAM_CMD_RD			 0x00000000
-#define  NVRAM_CMD_ERASE		 0x00000040
-#define  NVRAM_CMD_FIRST		 0x00000080
-#define  NVRAM_CMD_LAST			 0x00000100
-#define  NVRAM_CMD_WREN			 0x00010000
-#define  NVRAM_CMD_WRDI			 0x00020000
-#define NVRAM_STAT			0x00007004
-#define NVRAM_WRDATA			0x00007008
-#define NVRAM_ADDR			0x0000700c
-#define  NVRAM_ADDR_MSK			0x00ffffff
-#define NVRAM_RDDATA			0x00007010
-#define NVRAM_CFG1			0x00007014
-#define  NVRAM_CFG1_FLASHIF_ENAB	 0x00000001
-#define  NVRAM_CFG1_BUFFERED_MODE	 0x00000002
-#define  NVRAM_CFG1_PASS_THRU		 0x00000004
-#define  NVRAM_CFG1_STATUS_BITS		 0x00000070
-#define  NVRAM_CFG1_BIT_BANG		 0x00000008
-#define  NVRAM_CFG1_FLASH_SIZE		 0x02000000
-#define  NVRAM_CFG1_COMPAT_BYPASS	 0x80000000
-#define  NVRAM_CFG1_VENDOR_MASK		 0x03000003
-#define  FLASH_VENDOR_ATMEL_EEPROM	 0x02000000
-#define  FLASH_VENDOR_ATMEL_FLASH_BUFFERED	 0x02000003
-#define  FLASH_VENDOR_ATMEL_FLASH_UNBUFFERED	 0x00000003
-#define  FLASH_VENDOR_ST			 0x03000001
-#define  FLASH_VENDOR_SAIFUN		 0x01000003
-#define  FLASH_VENDOR_SST_SMALL		 0x00000001
-#define  FLASH_VENDOR_SST_LARGE		 0x02000001
-#define  NVRAM_CFG1_5752VENDOR_MASK	 0x03c00003
-#define  FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ	 0x00000000
-#define  FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ	 0x02000000
-#define  FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED	 0x02000003
-#define  FLASH_5752VENDOR_ST_M45PE10	 0x02400000
-#define  FLASH_5752VENDOR_ST_M45PE20	 0x02400002
-#define  FLASH_5752VENDOR_ST_M45PE40	 0x02400001
-#define  FLASH_5755VENDOR_ATMEL_FLASH_1	 0x03400001
-#define  FLASH_5755VENDOR_ATMEL_FLASH_2	 0x03400002
-#define  FLASH_5755VENDOR_ATMEL_FLASH_3	 0x03400000
-#define  FLASH_5755VENDOR_ATMEL_FLASH_4	 0x00000003
-#define  FLASH_5755VENDOR_ATMEL_FLASH_5	 0x02000003
-#define  FLASH_5755VENDOR_ATMEL_EEPROM_64KHZ	 0x03c00003
-#define  FLASH_5755VENDOR_ATMEL_EEPROM_376KHZ	 0x03c00002
-#define  FLASH_5787VENDOR_ATMEL_EEPROM_64KHZ	 0x03000003
-#define  FLASH_5787VENDOR_ATMEL_EEPROM_376KHZ	 0x03000002
-#define  FLASH_5787VENDOR_MICRO_EEPROM_64KHZ	 0x03000000
-#define  FLASH_5787VENDOR_MICRO_EEPROM_376KHZ	 0x02000000
-#define  FLASH_5761VENDOR_ATMEL_MDB021D	 0x00800003
-#define  FLASH_5761VENDOR_ATMEL_MDB041D	 0x00800000
-#define  FLASH_5761VENDOR_ATMEL_MDB081D	 0x00800002
-#define  FLASH_5761VENDOR_ATMEL_MDB161D	 0x00800001
-#define  FLASH_5761VENDOR_ATMEL_ADB021D	 0x00000003
-#define  FLASH_5761VENDOR_ATMEL_ADB041D	 0x00000000
-#define  FLASH_5761VENDOR_ATMEL_ADB081D	 0x00000002
-#define  FLASH_5761VENDOR_ATMEL_ADB161D	 0x00000001
-#define  FLASH_5761VENDOR_ST_M_M45PE20	 0x02800001
-#define  FLASH_5761VENDOR_ST_M_M45PE40	 0x02800000
-#define  FLASH_5761VENDOR_ST_M_M45PE80	 0x02800002
-#define  FLASH_5761VENDOR_ST_M_M45PE16	 0x02800003
-#define  FLASH_5761VENDOR_ST_A_M45PE20	 0x02000001
-#define  FLASH_5761VENDOR_ST_A_M45PE40	 0x02000000
-#define  FLASH_5761VENDOR_ST_A_M45PE80	 0x02000002
-#define  FLASH_5761VENDOR_ST_A_M45PE16	 0x02000003
-#define  FLASH_57780VENDOR_ATMEL_AT45DB011D 0x00400000
-#define  FLASH_57780VENDOR_ATMEL_AT45DB011B 0x03400000
-#define  FLASH_57780VENDOR_ATMEL_AT45DB021D 0x00400002
-#define  FLASH_57780VENDOR_ATMEL_AT45DB021B 0x03400002
-#define  FLASH_57780VENDOR_ATMEL_AT45DB041D 0x00400001
-#define  FLASH_57780VENDOR_ATMEL_AT45DB041B 0x03400001
-#define  FLASH_5717VENDOR_ATMEL_EEPROM	 0x02000001
-#define  FLASH_5717VENDOR_MICRO_EEPROM	 0x02000003
-#define  FLASH_5717VENDOR_ATMEL_MDB011D	 0x01000001
-#define  FLASH_5717VENDOR_ATMEL_MDB021D	 0x01000003
-#define  FLASH_5717VENDOR_ST_M_M25PE10	 0x02000000
-#define  FLASH_5717VENDOR_ST_M_M25PE20	 0x02000002
-#define  FLASH_5717VENDOR_ST_M_M45PE10	 0x00000001
-#define  FLASH_5717VENDOR_ST_M_M45PE20	 0x00000003
-#define  FLASH_5717VENDOR_ATMEL_ADB011B	 0x01400000
-#define  FLASH_5717VENDOR_ATMEL_ADB021B	 0x01400002
-#define  FLASH_5717VENDOR_ATMEL_ADB011D	 0x01400001
-#define  FLASH_5717VENDOR_ATMEL_ADB021D	 0x01400003
-#define  FLASH_5717VENDOR_ST_A_M25PE10	 0x02400000
-#define  FLASH_5717VENDOR_ST_A_M25PE20	 0x02400002
-#define  FLASH_5717VENDOR_ST_A_M45PE10	 0x02400001
-#define  FLASH_5717VENDOR_ST_A_M45PE20	 0x02400003
-#define  FLASH_5717VENDOR_ATMEL_45USPT	 0x03400000
-#define  FLASH_5717VENDOR_ST_25USPT	 0x03400002
-#define  FLASH_5717VENDOR_ST_45USPT	 0x03400001
-#define  FLASH_5720_EEPROM_HD		 0x00000001
-#define  FLASH_5720_EEPROM_LD		 0x00000003
-#define  FLASH_5720VENDOR_M_ATMEL_DB011D 0x01000000
-#define  FLASH_5720VENDOR_M_ATMEL_DB021D 0x01000002
-#define  FLASH_5720VENDOR_M_ATMEL_DB041D 0x01000001
-#define  FLASH_5720VENDOR_M_ATMEL_DB081D 0x01000003
-#define  FLASH_5720VENDOR_M_ST_M25PE10	 0x02000000
-#define  FLASH_5720VENDOR_M_ST_M25PE20	 0x02000002
-#define  FLASH_5720VENDOR_M_ST_M25PE40	 0x02000001
-#define  FLASH_5720VENDOR_M_ST_M25PE80	 0x02000003
-#define  FLASH_5720VENDOR_M_ST_M45PE10	 0x03000000
-#define  FLASH_5720VENDOR_M_ST_M45PE20	 0x03000002
-#define  FLASH_5720VENDOR_M_ST_M45PE40	 0x03000001
-#define  FLASH_5720VENDOR_M_ST_M45PE80	 0x03000003
-#define  FLASH_5720VENDOR_A_ATMEL_DB011B 0x01800000
-#define  FLASH_5720VENDOR_A_ATMEL_DB021B 0x01800002
-#define  FLASH_5720VENDOR_A_ATMEL_DB041B 0x01800001
-#define  FLASH_5720VENDOR_A_ATMEL_DB011D 0x01c00000
-#define  FLASH_5720VENDOR_A_ATMEL_DB021D 0x01c00002
-#define  FLASH_5720VENDOR_A_ATMEL_DB041D 0x01c00001
-#define  FLASH_5720VENDOR_A_ATMEL_DB081D 0x01c00003
-#define  FLASH_5720VENDOR_A_ST_M25PE10	 0x02800000
-#define  FLASH_5720VENDOR_A_ST_M25PE20	 0x02800002
-#define  FLASH_5720VENDOR_A_ST_M25PE40	 0x02800001
-#define  FLASH_5720VENDOR_A_ST_M25PE80	 0x02800003
-#define  FLASH_5720VENDOR_A_ST_M45PE10	 0x02c00000
-#define  FLASH_5720VENDOR_A_ST_M45PE20	 0x02c00002
-#define  FLASH_5720VENDOR_A_ST_M45PE40	 0x02c00001
-#define  FLASH_5720VENDOR_A_ST_M45PE80	 0x02c00003
-#define  FLASH_5720VENDOR_ATMEL_45USPT	 0x03c00000
-#define  FLASH_5720VENDOR_ST_25USPT	 0x03c00002
-#define  FLASH_5720VENDOR_ST_45USPT	 0x03c00001
-#define  NVRAM_CFG1_5752PAGE_SIZE_MASK	 0x70000000
-#define  FLASH_5752PAGE_SIZE_256	 0x00000000
-#define  FLASH_5752PAGE_SIZE_512	 0x10000000
-#define  FLASH_5752PAGE_SIZE_1K		 0x20000000
-#define  FLASH_5752PAGE_SIZE_2K		 0x30000000
-#define  FLASH_5752PAGE_SIZE_4K		 0x40000000
-#define  FLASH_5752PAGE_SIZE_264	 0x50000000
-#define  FLASH_5752PAGE_SIZE_528	 0x60000000
-#define NVRAM_CFG2			0x00007018
-#define NVRAM_CFG3			0x0000701c
-#define NVRAM_SWARB			0x00007020
-#define  SWARB_REQ_SET0			 0x00000001
-#define  SWARB_REQ_SET1			 0x00000002
-#define  SWARB_REQ_SET2			 0x00000004
-#define  SWARB_REQ_SET3			 0x00000008
-#define  SWARB_REQ_CLR0			 0x00000010
-#define  SWARB_REQ_CLR1			 0x00000020
-#define  SWARB_REQ_CLR2			 0x00000040
-#define  SWARB_REQ_CLR3			 0x00000080
-#define  SWARB_GNT0			 0x00000100
-#define  SWARB_GNT1			 0x00000200
-#define  SWARB_GNT2			 0x00000400
-#define  SWARB_GNT3			 0x00000800
-#define  SWARB_REQ0			 0x00001000
-#define  SWARB_REQ1			 0x00002000
-#define  SWARB_REQ2			 0x00004000
-#define  SWARB_REQ3			 0x00008000
-#define NVRAM_ACCESS			0x00007024
-#define  ACCESS_ENABLE			 0x00000001
-#define  ACCESS_WR_ENABLE		 0x00000002
-#define NVRAM_WRITE1			0x00007028
-/* 0x702c unused */
-
-#define NVRAM_ADDR_LOCKOUT		0x00007030
-/* 0x7034 --> 0x7500 unused */
-
-#define OTP_MODE			0x00007500
-#define OTP_MODE_OTP_THRU_GRC		 0x00000001
-#define OTP_CTRL			0x00007504
-#define OTP_CTRL_OTP_PROG_ENABLE	 0x00200000
-#define OTP_CTRL_OTP_CMD_READ		 0x00000000
-#define OTP_CTRL_OTP_CMD_INIT		 0x00000008
-#define OTP_CTRL_OTP_CMD_START		 0x00000001
-#define OTP_STATUS			0x00007508
-#define OTP_STATUS_CMD_DONE		 0x00000001
-#define OTP_ADDRESS			0x0000750c
-#define OTP_ADDRESS_MAGIC1		 0x000000a0
-#define OTP_ADDRESS_MAGIC2		 0x00000080
-/* 0x7510 unused */
-
-#define OTP_READ_DATA			0x00007514
-/* 0x7518 --> 0x7c04 unused */
-
-#define PCIE_TRANSACTION_CFG		0x00007c04
-#define PCIE_TRANS_CFG_1SHOT_MSI	 0x20000000
-#define PCIE_TRANS_CFG_LOM		 0x00000020
-/* 0x7c08 --> 0x7d28 unused */
-
-#define PCIE_PWR_MGMT_THRESH		0x00007d28
-#define PCIE_PWR_MGMT_L1_THRESH_MSK	 0x0000ff00
-#define PCIE_PWR_MGMT_L1_THRESH_4MS	 0x0000ff00
-#define PCIE_PWR_MGMT_EXT_ASPM_TMR_EN	 0x01000000
-/* 0x7d2c --> 0x7d54 unused */
-
-#define TG3_PCIE_LNKCTL			0x00007d54
-#define  TG3_PCIE_LNKCTL_L1_PLL_PD_EN	 0x00000008
-#define  TG3_PCIE_LNKCTL_L1_PLL_PD_DIS	 0x00000080
-/* 0x7d58 --> 0x7e70 unused */
-
-#define TG3_PCIE_PHY_TSTCTL		0x00007e2c
-#define  TG3_PCIE_PHY_TSTCTL_PCIE10	 0x00000040
-#define  TG3_PCIE_PHY_TSTCTL_PSCRAM	 0x00000020
-
-#define TG3_PCIE_EIDLE_DELAY		0x00007e70
-#define  TG3_PCIE_EIDLE_DELAY_MASK	 0x0000001f
-#define  TG3_PCIE_EIDLE_DELAY_13_CLKS	 0x0000000c
-/* 0x7e74 --> 0x8000 unused */
-
-
-/* Alternate PCIE definitions */
-#define TG3_PCIE_TLDLPL_PORT		0x00007c00
-#define TG3_PCIE_DL_LO_FTSMAX		0x0000000c
-#define TG3_PCIE_DL_LO_FTSMAX_MSK	0x000000ff
-#define TG3_PCIE_DL_LO_FTSMAX_VAL	0x0000002c
-#define TG3_PCIE_PL_LO_PHYCTL1		 0x00000004
-#define TG3_PCIE_PL_LO_PHYCTL1_L1PLLPD_EN	  0x00001000
-#define TG3_PCIE_PL_LO_PHYCTL5		 0x00000014
-#define TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ	  0x80000000
-
-#define TG3_REG_BLK_SIZE		0x00008000
-
-/* OTP bit definitions */
-#define TG3_OTP_AGCTGT_MASK		0x000000e0
-#define TG3_OTP_AGCTGT_SHIFT		1
-#define TG3_OTP_HPFFLTR_MASK		0x00000300
-#define TG3_OTP_HPFFLTR_SHIFT		1
-#define TG3_OTP_HPFOVER_MASK		0x00000400
-#define TG3_OTP_HPFOVER_SHIFT		1
-#define TG3_OTP_LPFDIS_MASK		0x00000800
-#define TG3_OTP_LPFDIS_SHIFT		11
-#define TG3_OTP_VDAC_MASK		0xff000000
-#define TG3_OTP_VDAC_SHIFT		24
-#define TG3_OTP_10BTAMP_MASK		0x0000f000
-#define TG3_OTP_10BTAMP_SHIFT		8
-#define TG3_OTP_ROFF_MASK		0x00e00000
-#define TG3_OTP_ROFF_SHIFT		11
-#define TG3_OTP_RCOFF_MASK		0x001c0000
-#define TG3_OTP_RCOFF_SHIFT		16
-
-#define TG3_OTP_DEFAULT			0x286c1640
-
-
-/* Hardware Legacy NVRAM layout */
-#define TG3_NVM_VPD_OFF			0x100
-#define TG3_NVM_VPD_LEN			256
-
-/* Hardware Selfboot NVRAM layout */
-#define TG3_NVM_HWSB_CFG1		0x00000004
-#define  TG3_NVM_HWSB_CFG1_MAJMSK	0xf8000000
-#define  TG3_NVM_HWSB_CFG1_MAJSFT	27
-#define  TG3_NVM_HWSB_CFG1_MINMSK	0x07c00000
-#define  TG3_NVM_HWSB_CFG1_MINSFT	22
-
-#define TG3_EEPROM_MAGIC		0x669955aa
-#define TG3_EEPROM_MAGIC_FW		0xa5000000
-#define TG3_EEPROM_MAGIC_FW_MSK		0xff000000
-#define TG3_EEPROM_SB_FORMAT_MASK	0x00e00000
-#define TG3_EEPROM_SB_FORMAT_1		0x00200000
-#define TG3_EEPROM_SB_REVISION_MASK	0x001f0000
-#define TG3_EEPROM_SB_REVISION_0	0x00000000
-#define TG3_EEPROM_SB_REVISION_2	0x00020000
-#define TG3_EEPROM_SB_REVISION_3	0x00030000
-#define TG3_EEPROM_SB_REVISION_4	0x00040000
-#define TG3_EEPROM_SB_REVISION_5	0x00050000
-#define TG3_EEPROM_SB_REVISION_6	0x00060000
-#define TG3_EEPROM_MAGIC_HW		0xabcd
-#define TG3_EEPROM_MAGIC_HW_MSK		0xffff
-
-#define TG3_NVM_DIR_START		0x18
-#define TG3_NVM_DIR_END			0x78
-#define TG3_NVM_DIRENT_SIZE		0xc
-#define TG3_NVM_DIRTYPE_SHIFT		24
-#define TG3_NVM_DIRTYPE_LENMSK		0x003fffff
-#define TG3_NVM_DIRTYPE_ASFINI		1
-#define TG3_NVM_DIRTYPE_EXTVPD		20
-#define TG3_NVM_PTREV_BCVER		0x94
-#define TG3_NVM_BCVER_MAJMSK		0x0000ff00
-#define TG3_NVM_BCVER_MAJSFT		8
-#define TG3_NVM_BCVER_MINMSK		0x000000ff
-
-#define TG3_EEPROM_SB_F1R0_EDH_OFF	0x10
-#define TG3_EEPROM_SB_F1R2_EDH_OFF	0x14
-#define TG3_EEPROM_SB_F1R2_MBA_OFF	0x10
-#define TG3_EEPROM_SB_F1R3_EDH_OFF	0x18
-#define TG3_EEPROM_SB_F1R4_EDH_OFF	0x1c
-#define TG3_EEPROM_SB_F1R5_EDH_OFF	0x20
-#define TG3_EEPROM_SB_F1R6_EDH_OFF	0x4c
-#define TG3_EEPROM_SB_EDH_MAJ_MASK	0x00000700
-#define TG3_EEPROM_SB_EDH_MAJ_SHFT	8
-#define TG3_EEPROM_SB_EDH_MIN_MASK	0x000000ff
-#define TG3_EEPROM_SB_EDH_BLD_MASK	0x0000f800
-#define TG3_EEPROM_SB_EDH_BLD_SHFT	11
-
-
-/* 32K Window into NIC internal memory */
-#define NIC_SRAM_WIN_BASE		0x00008000
-
-/* Offsets into first 32k of NIC internal memory. */
-#define NIC_SRAM_PAGE_ZERO		0x00000000
-#define NIC_SRAM_SEND_RCB		0x00000100 /* 16 * TG3_BDINFO_... */
-#define NIC_SRAM_RCV_RET_RCB		0x00000200 /* 16 * TG3_BDINFO_... */
-#define NIC_SRAM_STATS_BLK		0x00000300
-#define NIC_SRAM_STATUS_BLK		0x00000b00
-
-#define NIC_SRAM_FIRMWARE_MBOX		0x00000b50
-#define  NIC_SRAM_FIRMWARE_MBOX_MAGIC1	 0x4B657654
-#define  NIC_SRAM_FIRMWARE_MBOX_MAGIC2	 0x4861764b /* !dma on linkchg */
-
-#define NIC_SRAM_DATA_SIG		0x00000b54
-#define  NIC_SRAM_DATA_SIG_MAGIC	 0x4b657654 /* ascii for 'KevT' */
-
-#define NIC_SRAM_DATA_CFG			0x00000b58
-#define  NIC_SRAM_DATA_CFG_LED_MODE_MASK	 0x0000000c
-#define  NIC_SRAM_DATA_CFG_LED_MODE_MAC		 0x00000000
-#define  NIC_SRAM_DATA_CFG_LED_MODE_PHY_1	 0x00000004
-#define  NIC_SRAM_DATA_CFG_LED_MODE_PHY_2	 0x00000008
-#define  NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	 0x00000030
-#define  NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNOWN	 0x00000000
-#define  NIC_SRAM_DATA_CFG_PHY_TYPE_COPPER	 0x00000010
-#define  NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER	 0x00000020
-#define  NIC_SRAM_DATA_CFG_WOL_ENABLE		 0x00000040
-#define  NIC_SRAM_DATA_CFG_ASF_ENABLE		 0x00000080
-#define  NIC_SRAM_DATA_CFG_EEPROM_WP		 0x00000100
-#define  NIC_SRAM_DATA_CFG_MINI_PCI		 0x00001000
-#define  NIC_SRAM_DATA_CFG_FIBER_WOL		 0x00004000
-#define  NIC_SRAM_DATA_CFG_NO_GPIO2		 0x00100000
-#define  NIC_SRAM_DATA_CFG_APE_ENABLE		 0x00200000
-
-#define NIC_SRAM_DATA_VER			0x00000b5c
-#define  NIC_SRAM_DATA_VER_SHIFT		 16
-
-#define NIC_SRAM_DATA_PHY_ID		0x00000b74
-#define  NIC_SRAM_DATA_PHY_ID1_MASK	 0xffff0000
-#define  NIC_SRAM_DATA_PHY_ID2_MASK	 0x0000ffff
-
-#define NIC_SRAM_FW_CMD_MBOX		0x00000b78
-#define  FWCMD_NICDRV_ALIVE		 0x00000001
-#define  FWCMD_NICDRV_PAUSE_FW		 0x00000002
-#define  FWCMD_NICDRV_IPV4ADDR_CHG	 0x00000003
-#define  FWCMD_NICDRV_IPV6ADDR_CHG	 0x00000004
-#define  FWCMD_NICDRV_FIX_DMAR		 0x00000005
-#define  FWCMD_NICDRV_FIX_DMAW		 0x00000006
-#define  FWCMD_NICDRV_LINK_UPDATE	 0x0000000c
-#define  FWCMD_NICDRV_ALIVE2		 0x0000000d
-#define  FWCMD_NICDRV_ALIVE3		 0x0000000e
-#define NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c
-#define NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80
-#define NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00
-#define NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04
-#define  DRV_STATE_START		 0x00000001
-#define  DRV_STATE_START_DONE		 0x80000001
-#define  DRV_STATE_UNLOAD		 0x00000002
-#define  DRV_STATE_UNLOAD_DONE		 0x80000002
-#define  DRV_STATE_WOL			 0x00000003
-#define  DRV_STATE_SUSPEND		 0x00000004
-
-#define NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08
-
-#define NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14
-#define NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18
-
-#define NIC_SRAM_WOL_MBOX		0x00000d30
-#define  WOL_SIGNATURE			 0x474c0000
-#define  WOL_DRV_STATE_SHUTDOWN		 0x00000001
-#define  WOL_DRV_WOL			 0x00000002
-#define  WOL_SET_MAGIC_PKT		 0x00000004
-
-#define NIC_SRAM_DATA_CFG_2		0x00000d38
-
-#define  NIC_SRAM_DATA_CFG_2_APD_EN	 0x00000400
-#define  SHASTA_EXT_LED_MODE_MASK	 0x00018000
-#define  SHASTA_EXT_LED_LEGACY		 0x00000000
-#define  SHASTA_EXT_LED_SHARED		 0x00008000
-#define  SHASTA_EXT_LED_MAC		 0x00010000
-#define  SHASTA_EXT_LED_COMBO		 0x00018000
-
-#define NIC_SRAM_DATA_CFG_3		0x00000d3c
-#define  NIC_SRAM_ASPM_DEBOUNCE		 0x00000002
-
-#define NIC_SRAM_DATA_CFG_4		0x00000d60
-#define  NIC_SRAM_GMII_MODE		 0x00000002
-#define  NIC_SRAM_RGMII_INBAND_DISABLE	 0x00000004
-#define  NIC_SRAM_RGMII_EXT_IBND_RX_EN	 0x00000008
-#define  NIC_SRAM_RGMII_EXT_IBND_TX_EN	 0x00000010
-
-#define NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000
-
-#define NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000
-#define  NIC_SRAM_DMA_DESC_POOL_SIZE	 0x00002000
-#define NIC_SRAM_TX_BUFFER_DESC		0x00004000 /* 512 entries */
-#define NIC_SRAM_RX_BUFFER_DESC		0x00006000 /* 256 entries */
-#define NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000 /* 256 entries */
-#define NIC_SRAM_MBUF_POOL_BASE		0x00008000
-#define  NIC_SRAM_MBUF_POOL_SIZE96	 0x00018000
-#define  NIC_SRAM_MBUF_POOL_SIZE64	 0x00010000
-#define  NIC_SRAM_MBUF_POOL_BASE5705	0x00010000
-#define  NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000
-
-#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5700	128
-#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5755	64
-#define TG3_SRAM_RX_STD_BDCACHE_SIZE_5906	32
-
-#define TG3_SRAM_RX_JMB_BDCACHE_SIZE_5700	64
-#define TG3_SRAM_RX_JMB_BDCACHE_SIZE_5717	16
-
-
-/* Currently this is fixed. */
-#define TG3_PHY_MII_ADDR		0x01
-
-
-/*** Tigon3 specific PHY MII registers. ***/
-#define  TG3_BMCR_SPEED1000		0x0040
-
-#define MII_TG3_CTRL			0x09 /* 1000-baseT control register */
-#define  MII_TG3_CTRL_ADV_1000_HALF	0x0100
-#define  MII_TG3_CTRL_ADV_1000_FULL	0x0200
-#define  MII_TG3_CTRL_AS_MASTER		0x0800
-#define  MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000
-
-#define MII_TG3_MMD_CTRL		0x0d /* MMD Access Control register */
-#define MII_TG3_MMD_CTRL_DATA_NOINC	0x4000
-#define MII_TG3_MMD_ADDRESS		0x0e /* MMD Address Data register */
-
-#define MII_TG3_EXT_CTRL		0x10 /* Extended control register */
-#define  MII_TG3_EXT_CTRL_FIFO_ELASTIC	0x0001
-#define  MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002
-#define  MII_TG3_EXT_CTRL_FORCE_LED_OFF	0x0008
-#define  MII_TG3_EXT_CTRL_TBI		0x8000
-
-#define MII_TG3_EXT_STAT		0x11 /* Extended status register */
-#define  MII_TG3_EXT_STAT_LPASS		0x0100
-
-#define MII_TG3_RXR_COUNTERS		0x14 /* Local/Remote Receiver Counts */
-#define MII_TG3_DSP_RW_PORT		0x15 /* DSP coefficient read/write port */
-#define MII_TG3_DSP_CONTROL		0x16 /* DSP control register */
-#define MII_TG3_DSP_ADDRESS		0x17 /* DSP address register */
-
-#define MII_TG3_DSP_TAP1		0x0001
-#define  MII_TG3_DSP_TAP1_AGCTGT_DFLT	0x0007
-#define MII_TG3_DSP_TAP26		0x001a
-#define  MII_TG3_DSP_TAP26_ALNOKO	0x0001
-#define  MII_TG3_DSP_TAP26_RMRXSTO	0x0002
-#define  MII_TG3_DSP_TAP26_OPCSINPT	0x0004
-#define MII_TG3_DSP_AADJ1CH0		0x001f
-#define MII_TG3_DSP_CH34TP2		0x4022
-#define MII_TG3_DSP_CH34TP2_HIBW01	0x017b
-#define MII_TG3_DSP_AADJ1CH3		0x601f
-#define  MII_TG3_DSP_AADJ1CH3_ADCCKADJ	0x0002
-#define MII_TG3_DSP_EXP1_INT_STAT	0x0f01
-#define MII_TG3_DSP_EXP8		0x0f08
-#define  MII_TG3_DSP_EXP8_REJ2MHz	0x0001
-#define  MII_TG3_DSP_EXP8_AEDW		0x0200
-#define MII_TG3_DSP_EXP75		0x0f75
-#define MII_TG3_DSP_EXP96		0x0f96
-#define MII_TG3_DSP_EXP97		0x0f97
-
-#define MII_TG3_AUX_CTRL		0x18 /* auxiliary control register */
-
-#define MII_TG3_AUXCTL_SHDWSEL_AUXCTL	0x0000
-#define MII_TG3_AUXCTL_ACTL_TX_6DB	0x0400
-#define MII_TG3_AUXCTL_ACTL_SMDSP_ENA	0x0800
-#define MII_TG3_AUXCTL_ACTL_EXTPKTLEN	0x4000
-
-#define MII_TG3_AUXCTL_SHDWSEL_PWRCTL	0x0002
-#define MII_TG3_AUXCTL_PCTL_WOL_EN	0x0008
-#define MII_TG3_AUXCTL_PCTL_100TX_LPWR	0x0010
-#define MII_TG3_AUXCTL_PCTL_SPR_ISOLATE	0x0020
-#define MII_TG3_AUXCTL_PCTL_CL_AB_TXDAC	0x0040
-#define MII_TG3_AUXCTL_PCTL_VREG_11V	0x0180
-
-#define MII_TG3_AUXCTL_SHDWSEL_MISCTEST	0x0004
-
-#define MII_TG3_AUXCTL_SHDWSEL_MISC	0x0007
-#define MII_TG3_AUXCTL_MISC_WIRESPD_EN	0x0010
-#define MII_TG3_AUXCTL_MISC_FORCE_AMDIX	0x0200
-#define MII_TG3_AUXCTL_MISC_RDSEL_SHIFT	12
-#define MII_TG3_AUXCTL_MISC_WREN	0x8000
-
-
-#define MII_TG3_AUX_STAT		0x19 /* auxiliary status register */
-#define MII_TG3_AUX_STAT_LPASS		0x0004
-#define MII_TG3_AUX_STAT_SPDMASK	0x0700
-#define MII_TG3_AUX_STAT_10HALF		0x0100
-#define MII_TG3_AUX_STAT_10FULL		0x0200
-#define MII_TG3_AUX_STAT_100HALF	0x0300
-#define MII_TG3_AUX_STAT_100_4		0x0400
-#define MII_TG3_AUX_STAT_100FULL	0x0500
-#define MII_TG3_AUX_STAT_1000HALF	0x0600
-#define MII_TG3_AUX_STAT_1000FULL	0x0700
-#define MII_TG3_AUX_STAT_100		0x0008
-#define MII_TG3_AUX_STAT_FULL		0x0001
-
-#define MII_TG3_ISTAT			0x1a /* IRQ status register */
-#define MII_TG3_IMASK			0x1b /* IRQ mask register */
-
-/* ISTAT/IMASK event bits */
-#define MII_TG3_INT_LINKCHG		0x0002
-#define MII_TG3_INT_SPEEDCHG		0x0004
-#define MII_TG3_INT_DUPLEXCHG		0x0008
-#define MII_TG3_INT_ANEG_PAGE_RX	0x0400
-
-#define MII_TG3_MISC_SHDW		0x1c
-#define MII_TG3_MISC_SHDW_WREN		0x8000
-
-#define MII_TG3_MISC_SHDW_APD_WKTM_84MS	0x0001
-#define MII_TG3_MISC_SHDW_APD_ENABLE	0x0020
-#define MII_TG3_MISC_SHDW_APD_SEL	0x2800
-
-#define MII_TG3_MISC_SHDW_SCR5_C125OE	0x0001
-#define MII_TG3_MISC_SHDW_SCR5_DLLAPD	0x0002
-#define MII_TG3_MISC_SHDW_SCR5_SDTL	0x0004
-#define MII_TG3_MISC_SHDW_SCR5_DLPTLM	0x0008
-#define MII_TG3_MISC_SHDW_SCR5_LPED	0x0010
-#define MII_TG3_MISC_SHDW_SCR5_SEL	0x1400
-
-#define MII_TG3_TEST1			0x1e
-#define MII_TG3_TEST1_TRIM_EN		0x0010
-#define MII_TG3_TEST1_CRC_EN		0x8000
-
-/* Clause 45 expansion registers */
-#define TG3_CL45_D7_EEERES_STAT		0x803e
-#define TG3_CL45_D7_EEERES_STAT_LP_100TX	0x0002
-#define TG3_CL45_D7_EEERES_STAT_LP_1000T	0x0004
-
-
-/* Fast Ethernet Tranceiver definitions */
-#define MII_TG3_FET_PTEST		0x17
-#define  MII_TG3_FET_PTEST_FRC_TX_LINK	0x1000
-#define  MII_TG3_FET_PTEST_FRC_TX_LOCK	0x0800
-
-#define MII_TG3_FET_TEST		0x1f
-#define  MII_TG3_FET_SHADOW_EN		0x0080
-
-#define MII_TG3_FET_SHDW_MISCCTRL	0x10
-#define  MII_TG3_FET_SHDW_MISCCTRL_MDIX	0x4000
-
-#define MII_TG3_FET_SHDW_AUXMODE4	0x1a
-#define MII_TG3_FET_SHDW_AUXMODE4_SBPD	0x0008
-
-#define MII_TG3_FET_SHDW_AUXSTAT2	0x1b
-#define  MII_TG3_FET_SHDW_AUXSTAT2_APD	0x0020
-
-
-/* APE registers.  Accessible through BAR1 */
-#define TG3_APE_EVENT			0x000c
-#define  APE_EVENT_1			 0x00000001
-#define TG3_APE_LOCK_REQ		0x002c
-#define  APE_LOCK_REQ_DRIVER		 0x00001000
-#define TG3_APE_LOCK_GRANT		0x004c
-#define  APE_LOCK_GRANT_DRIVER		 0x00001000
-#define TG3_APE_SEG_SIG			0x4000
-#define  APE_SEG_SIG_MAGIC		 0x41504521
-
-/* APE shared memory.  Accessible through BAR1 */
-#define TG3_APE_FW_STATUS		0x400c
-#define  APE_FW_STATUS_READY		 0x00000100
-#define TG3_APE_FW_FEATURES		0x4010
-#define  TG3_APE_FW_FEATURE_NCSI	 0x00000002
-#define TG3_APE_FW_VERSION		0x4018
-#define  APE_FW_VERSION_MAJMSK		 0xff000000
-#define  APE_FW_VERSION_MAJSFT		 24
-#define  APE_FW_VERSION_MINMSK		 0x00ff0000
-#define  APE_FW_VERSION_MINSFT		 16
-#define  APE_FW_VERSION_REVMSK		 0x0000ff00
-#define  APE_FW_VERSION_REVSFT		 8
-#define  APE_FW_VERSION_BLDMSK		 0x000000ff
-#define TG3_APE_HOST_SEG_SIG		0x4200
-#define  APE_HOST_SEG_SIG_MAGIC		 0x484f5354
-#define TG3_APE_HOST_SEG_LEN		0x4204
-#define  APE_HOST_SEG_LEN_MAGIC		 0x00000020
-#define TG3_APE_HOST_INIT_COUNT		0x4208
-#define TG3_APE_HOST_DRIVER_ID		0x420c
-#define  APE_HOST_DRIVER_ID_LINUX	 0xf0000000
-#define  APE_HOST_DRIVER_ID_MAGIC(maj, min)	\
-	(APE_HOST_DRIVER_ID_LINUX | (maj & 0xff) << 16 | (min & 0xff) << 8)
-#define TG3_APE_HOST_BEHAVIOR		0x4210
-#define  APE_HOST_BEHAV_NO_PHYLOCK	 0x00000001
-#define TG3_APE_HOST_HEARTBEAT_INT_MS	0x4214
-#define  APE_HOST_HEARTBEAT_INT_DISABLE	 0
-#define  APE_HOST_HEARTBEAT_INT_5SEC	 5000
-#define TG3_APE_HOST_HEARTBEAT_COUNT	0x4218
-#define TG3_APE_HOST_DRVR_STATE		0x421c
-#define TG3_APE_HOST_DRVR_STATE_START	 0x00000001
-#define TG3_APE_HOST_DRVR_STATE_UNLOAD	 0x00000002
-#define TG3_APE_HOST_DRVR_STATE_WOL	 0x00000003
-#define TG3_APE_HOST_WOL_SPEED		0x4224
-#define TG3_APE_HOST_WOL_SPEED_AUTO	 0x00008000
-
-#define TG3_APE_EVENT_STATUS		0x4300
-
-#define  APE_EVENT_STATUS_DRIVER_EVNT	 0x00000010
-#define  APE_EVENT_STATUS_STATE_CHNGE	 0x00000500
-#define  APE_EVENT_STATUS_STATE_START	 0x00010000
-#define  APE_EVENT_STATUS_STATE_UNLOAD	 0x00020000
-#define  APE_EVENT_STATUS_STATE_WOL	 0x00030000
-#define  APE_EVENT_STATUS_STATE_SUSPEND	 0x00040000
-#define  APE_EVENT_STATUS_EVENT_PENDING	 0x80000000
-
-#define TG3_APE_PER_LOCK_REQ		0x8400
-#define  APE_LOCK_PER_REQ_DRIVER	 0x00001000
-#define TG3_APE_PER_LOCK_GRANT		0x8420
-#define  APE_PER_LOCK_GRANT_DRIVER	 0x00001000
-
-/* APE convenience enumerations. */
-#define TG3_APE_LOCK_GRC                1
-#define TG3_APE_LOCK_MEM                4
-
-#define TG3_EEPROM_SB_F1R2_MBA_OFF	0x10
-
-
-/* There are two ways to manage the TX descriptors on the tigon3.
- * Either the descriptors are in host DMA'able memory, or they
- * exist only in the cards on-chip SRAM.  All 16 send bds are under
- * the same mode, they may not be configured individually.
- *
- * This driver always uses host memory TX descriptors.
- *
- * To use host memory TX descriptors:
- *	1) Set GRC_MODE_HOST_SENDBDS in GRC_MODE register.
- *	   Make sure GRC_MODE_4X_NIC_SEND_RINGS is clear.
- *	2) Allocate DMA'able memory.
- *	3) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM:
- *	   a) Set TG3_BDINFO_HOST_ADDR to DMA address of memory
- *	      obtained in step 2
- *	   b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC.
- *	   c) Set len field of TG3_BDINFO_MAXLEN_FLAGS to number
- *            of TX descriptors.  Leave flags field clear.
- *	4) Access TX descriptors via host memory.  The chip
- *	   will refetch into local SRAM as needed when producer
- *	   index mailboxes are updated.
- *
- * To use on-chip TX descriptors:
- *	1) Set GRC_MODE_4X_NIC_SEND_RINGS in GRC_MODE register.
- *	   Make sure GRC_MODE_HOST_SENDBDS is clear.
- *	2) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM:
- *	   a) Set TG3_BDINFO_HOST_ADDR to zero.
- *	   b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC
- *	   c) TG3_BDINFO_MAXLEN_FLAGS is don't care.
- *	3) Access TX descriptors directly in on-chip SRAM
- *	   using normal {read,write}l().  (and not using
- *         pointer dereferencing of ioremap()'d memory like
- *	   the broken Broadcom driver does)
- *
- * Note that BDINFO_FLAGS_DISABLED should be set in the flags field of
- * TG3_BDINFO_MAXLEN_FLAGS of all unused SEND_RCB indices.
- */
-struct tg3_tx_buffer_desc {
-	u32				addr_hi;
-	u32				addr_lo;
-
-	u32				len_flags;
-#define TXD_FLAG_TCPUDP_CSUM		0x0001
-#define TXD_FLAG_IP_CSUM		0x0002
-#define TXD_FLAG_END			0x0004
-#define TXD_FLAG_IP_FRAG		0x0008
-#define TXD_FLAG_JMB_PKT		0x0008
-#define TXD_FLAG_IP_FRAG_END		0x0010
-#define TXD_FLAG_VLAN			0x0040
-#define TXD_FLAG_COAL_NOW		0x0080
-#define TXD_FLAG_CPU_PRE_DMA		0x0100
-#define TXD_FLAG_CPU_POST_DMA		0x0200
-#define TXD_FLAG_ADD_SRC_ADDR		0x1000
-#define TXD_FLAG_CHOOSE_SRC_ADDR	0x6000
-#define TXD_FLAG_NO_CRC			0x8000
-#define TXD_LEN_SHIFT			16
-
-	u32				vlan_tag;
-#define TXD_VLAN_TAG_SHIFT		0
-#define TXD_MSS_SHIFT			16
-};
-
-#define TXD_ADDR			0x00UL /* 64-bit */
-#define TXD_LEN_FLAGS			0x08UL /* 32-bit (upper 16-bits are len) */
-#define TXD_VLAN_TAG			0x0cUL /* 32-bit (upper 16-bits are tag) */
-#define TXD_SIZE			0x10UL
-
-struct tg3_rx_buffer_desc {
-	u32				addr_hi;
-	u32				addr_lo;
-
-	u32				idx_len;
-#define RXD_IDX_MASK	0xffff0000
-#define RXD_IDX_SHIFT	16
-#define RXD_LEN_MASK	0x0000ffff
-#define RXD_LEN_SHIFT	0
-
-	u32				type_flags;
-#define RXD_TYPE_SHIFT	16
-#define RXD_FLAGS_SHIFT	0
-
-#define RXD_FLAG_END			0x0004
-#define RXD_FLAG_MINI			0x0800
-#define RXD_FLAG_JUMBO			0x0020
-#define RXD_FLAG_VLAN			0x0040
-#define RXD_FLAG_ERROR			0x0400
-#define RXD_FLAG_IP_CSUM		0x1000
-#define RXD_FLAG_TCPUDP_CSUM		0x2000
-#define RXD_FLAG_IS_TCP			0x4000
-
-	u32				ip_tcp_csum;
-#define RXD_IPCSUM_MASK		0xffff0000
-#define RXD_IPCSUM_SHIFT	16
-#define RXD_TCPCSUM_MASK	0x0000ffff
-#define RXD_TCPCSUM_SHIFT	0
-
-	u32				err_vlan;
-
-#define RXD_VLAN_MASK			0x0000ffff
-
-#define RXD_ERR_BAD_CRC			0x00010000
-#define RXD_ERR_COLLISION		0x00020000
-#define RXD_ERR_LINK_LOST		0x00040000
-#define RXD_ERR_PHY_DECODE		0x00080000
-#define RXD_ERR_ODD_NIBBLE_RCVD_MII	0x00100000
-#define RXD_ERR_MAC_ABRT		0x00200000
-#define RXD_ERR_TOO_SMALL		0x00400000
-#define RXD_ERR_NO_RESOURCES		0x00800000
-#define RXD_ERR_HUGE_FRAME		0x01000000
-#define RXD_ERR_MASK			0xffff0000
-
-	u32				reserved;
-	u32				opaque;
-#define RXD_OPAQUE_INDEX_MASK		0x0000ffff
-#define RXD_OPAQUE_INDEX_SHIFT		0
-#define RXD_OPAQUE_RING_STD		0x00010000
-#define RXD_OPAQUE_RING_JUMBO		0x00020000
-#define RXD_OPAQUE_RING_MINI		0x00040000
-#define RXD_OPAQUE_RING_MASK		0x00070000
-};
-
-struct tg3_ext_rx_buffer_desc {
-	struct {
-		u32			addr_hi;
-		u32			addr_lo;
-	}				addrlist[3];
-	u32				len2_len1;
-	u32				resv_len3;
-	struct tg3_rx_buffer_desc	std;
-};
-
-/* We only use this when testing out the DMA engine
- * at probe time.  This is the internal format of buffer
- * descriptors used by the chip at NIC_SRAM_DMA_DESCS.
- */
-struct tg3_internal_buffer_desc {
-	u32				addr_hi;
-	u32				addr_lo;
-	u32				nic_mbuf;
-	/* XXX FIX THIS */
-#if __BYTE_ORDER == __BIG_ENDIAN
-	u16				cqid_sqid;
-	u16				len;
-#else
-	u16				len;
-	u16				cqid_sqid;
-#endif
-	u32				flags;
-	u32				__cookie1;
-	u32				__cookie2;
-	u32				__cookie3;
-};
-
-#define TG3_HW_STATUS_SIZE		0x50
-struct tg3_hw_status {
-	u32				status;
-#define SD_STATUS_UPDATED		0x00000001
-#define SD_STATUS_LINK_CHG		0x00000002
-#define SD_STATUS_ERROR			0x00000004
-
-	u32				status_tag;
-
-#if __BYTE_ORDER == __BIG_ENDIAN
-	u16				rx_consumer;
-	u16				rx_jumbo_consumer;
-#else
-	u16				rx_jumbo_consumer;
-	u16				rx_consumer;
-#endif
-
-#if __BYTE_ORDER == __BIG_ENDIAN
-	u16				reserved;
-	u16				rx_mini_consumer;
-#else
-	u16				rx_mini_consumer;
-	u16				reserved;
-#endif
-	struct {
-#if __BYTE_ORDER == __BIG_ENDIAN
-		u16			tx_consumer;
-		u16			rx_producer;
-#else
-		u16			rx_producer;
-		u16			tx_consumer;
-#endif
-	}				idx[16];
-};
-
-typedef struct {
-	u32 high, low;
-} tg3_stat64_t;
-
-struct tg3_hw_stats {
-	u8				__reserved0[0x400-0x300];
-
-	/* Statistics maintained by Receive MAC. */
-	tg3_stat64_t			rx_octets;
-	u64				__reserved1;
-	tg3_stat64_t			rx_fragments;
-	tg3_stat64_t			rx_ucast_packets;
-	tg3_stat64_t			rx_mcast_packets;
-	tg3_stat64_t			rx_bcast_packets;
-	tg3_stat64_t			rx_fcs_errors;
-	tg3_stat64_t			rx_align_errors;
-	tg3_stat64_t			rx_xon_pause_rcvd;
-	tg3_stat64_t			rx_xoff_pause_rcvd;
-	tg3_stat64_t			rx_mac_ctrl_rcvd;
-	tg3_stat64_t			rx_xoff_entered;
-	tg3_stat64_t			rx_frame_too_long_errors;
-	tg3_stat64_t			rx_jabbers;
-	tg3_stat64_t			rx_undersize_packets;
-	tg3_stat64_t			rx_in_length_errors;
-	tg3_stat64_t			rx_out_length_errors;
-	tg3_stat64_t			rx_64_or_less_octet_packets;
-	tg3_stat64_t			rx_65_to_127_octet_packets;
-	tg3_stat64_t			rx_128_to_255_octet_packets;
-	tg3_stat64_t			rx_256_to_511_octet_packets;
-	tg3_stat64_t			rx_512_to_1023_octet_packets;
-	tg3_stat64_t			rx_1024_to_1522_octet_packets;
-	tg3_stat64_t			rx_1523_to_2047_octet_packets;
-	tg3_stat64_t			rx_2048_to_4095_octet_packets;
-	tg3_stat64_t			rx_4096_to_8191_octet_packets;
-	tg3_stat64_t			rx_8192_to_9022_octet_packets;
-
-	u64				__unused0[37];
-
-	/* Statistics maintained by Transmit MAC. */
-	tg3_stat64_t			tx_octets;
-	u64				__reserved2;
-	tg3_stat64_t			tx_collisions;
-	tg3_stat64_t			tx_xon_sent;
-	tg3_stat64_t			tx_xoff_sent;
-	tg3_stat64_t			tx_flow_control;
-	tg3_stat64_t			tx_mac_errors;
-	tg3_stat64_t			tx_single_collisions;
-	tg3_stat64_t			tx_mult_collisions;
-	tg3_stat64_t			tx_deferred;
-	u64				__reserved3;
-	tg3_stat64_t			tx_excessive_collisions;
-	tg3_stat64_t			tx_late_collisions;
-	tg3_stat64_t			tx_collide_2times;
-	tg3_stat64_t			tx_collide_3times;
-	tg3_stat64_t			tx_collide_4times;
-	tg3_stat64_t			tx_collide_5times;
-	tg3_stat64_t			tx_collide_6times;
-	tg3_stat64_t			tx_collide_7times;
-	tg3_stat64_t			tx_collide_8times;
-	tg3_stat64_t			tx_collide_9times;
-	tg3_stat64_t			tx_collide_10times;
-	tg3_stat64_t			tx_collide_11times;
-	tg3_stat64_t			tx_collide_12times;
-	tg3_stat64_t			tx_collide_13times;
-	tg3_stat64_t			tx_collide_14times;
-	tg3_stat64_t			tx_collide_15times;
-	tg3_stat64_t			tx_ucast_packets;
-	tg3_stat64_t			tx_mcast_packets;
-	tg3_stat64_t			tx_bcast_packets;
-	tg3_stat64_t			tx_carrier_sense_errors;
-	tg3_stat64_t			tx_discards;
-	tg3_stat64_t			tx_errors;
-
-	u64				__unused1[31];
-
-	/* Statistics maintained by Receive List Placement. */
-	tg3_stat64_t			COS_rx_packets[16];
-	tg3_stat64_t			COS_rx_filter_dropped;
-	tg3_stat64_t			dma_writeq_full;
-	tg3_stat64_t			dma_write_prioq_full;
-	tg3_stat64_t			rxbds_empty;
-	tg3_stat64_t			rx_discards;
-	tg3_stat64_t			rx_errors;
-	tg3_stat64_t			rx_threshold_hit;
-
-	u64				__unused2[9];
-
-	/* Statistics maintained by Send Data Initiator. */
-	tg3_stat64_t			COS_out_packets[16];
-	tg3_stat64_t			dma_readq_full;
-	tg3_stat64_t			dma_read_prioq_full;
-	tg3_stat64_t			tx_comp_queue_full;
-
-	/* Statistics maintained by Host Coalescing. */
-	tg3_stat64_t			ring_set_send_prod_index;
-	tg3_stat64_t			ring_status_update;
-	tg3_stat64_t			nic_irqs;
-	tg3_stat64_t			nic_avoided_irqs;
-	tg3_stat64_t			nic_tx_threshold_hit;
-
-	/* NOT a part of the hardware statistics block format.
-	 * These stats are here as storage for tg3_periodic_fetch_stats().
-	 */
-	tg3_stat64_t			mbuf_lwm_thresh_hit;
-
-	u8				__reserved4[0xb00-0x9c8];
-};
-
-typedef u32 dma_addr_t;
-
-/* 'mapping' is superfluous as the chip does not write into
- * the tx/rx post rings so we could just fetch it from there.
- * But the cache behavior is better how we are doing it now.
- */
-struct ring_info {
-	struct io_buffer			*iob;
-///	dma_addr_t mapping;
-};
-
-struct tg3_link_config {
-	/* Describes what we're trying to get. */
-	u32				advertising;
-	u16				speed;
-	u8				duplex;
-	u8				autoneg;
-	u8				flowctrl;
-
-	/* Describes what we actually have. */
-	u8				active_flowctrl;
-
-	u8				active_duplex;
-#define SPEED_INVALID		0xffff
-#define DUPLEX_INVALID		0xff
-#define AUTONEG_INVALID		0xff
-	u16				active_speed;
-
-	/* When we go in and out of low power mode we need
-	 * to swap with this state.
-	 */
-	u16				orig_speed;
-	u8				orig_duplex;
-	u8				orig_autoneg;
-	u32				orig_advertising;
-};
-
-struct tg3_bufmgr_config {
-	u32		mbuf_read_dma_low_water;
-	u32		mbuf_mac_rx_low_water;
-	u32		mbuf_high_water;
-
-	u32		mbuf_read_dma_low_water_jumbo;
-	u32		mbuf_mac_rx_low_water_jumbo;
-	u32		mbuf_high_water_jumbo;
-
-	u32		dma_low_water;
-	u32		dma_high_water;
-};
-
-struct tg3_ethtool_stats {
-	/* Statistics maintained by Receive MAC. */
-	u64		rx_octets;
-	u64		rx_fragments;
-	u64		rx_ucast_packets;
-	u64		rx_mcast_packets;
-	u64		rx_bcast_packets;
-	u64		rx_fcs_errors;
-	u64		rx_align_errors;
-	u64		rx_xon_pause_rcvd;
-	u64		rx_xoff_pause_rcvd;
-	u64		rx_mac_ctrl_rcvd;
-	u64		rx_xoff_entered;
-	u64		rx_frame_too_long_errors;
-	u64		rx_jabbers;
-	u64		rx_undersize_packets;
-	u64		rx_in_length_errors;
-	u64		rx_out_length_errors;
-	u64		rx_64_or_less_octet_packets;
-	u64		rx_65_to_127_octet_packets;
-	u64		rx_128_to_255_octet_packets;
-	u64		rx_256_to_511_octet_packets;
-	u64		rx_512_to_1023_octet_packets;
-	u64		rx_1024_to_1522_octet_packets;
-	u64		rx_1523_to_2047_octet_packets;
-	u64		rx_2048_to_4095_octet_packets;
-	u64		rx_4096_to_8191_octet_packets;
-	u64		rx_8192_to_9022_octet_packets;
-
-	/* Statistics maintained by Transmit MAC. */
-	u64		tx_octets;
-	u64		tx_collisions;
-	u64		tx_xon_sent;
-	u64		tx_xoff_sent;
-	u64		tx_flow_control;
-	u64		tx_mac_errors;
-	u64		tx_single_collisions;
-	u64		tx_mult_collisions;
-	u64		tx_deferred;
-	u64		tx_excessive_collisions;
-	u64		tx_late_collisions;
-	u64		tx_collide_2times;
-	u64		tx_collide_3times;
-	u64		tx_collide_4times;
-	u64		tx_collide_5times;
-	u64		tx_collide_6times;
-	u64		tx_collide_7times;
-	u64		tx_collide_8times;
-	u64		tx_collide_9times;
-	u64		tx_collide_10times;
-	u64		tx_collide_11times;
-	u64		tx_collide_12times;
-	u64		tx_collide_13times;
-	u64		tx_collide_14times;
-	u64		tx_collide_15times;
-	u64		tx_ucast_packets;
-	u64		tx_mcast_packets;
-	u64		tx_bcast_packets;
-	u64		tx_carrier_sense_errors;
-	u64		tx_discards;
-	u64		tx_errors;
-
-	/* Statistics maintained by Receive List Placement. */
-	u64		dma_writeq_full;
-	u64		dma_write_prioq_full;
-	u64		rxbds_empty;
-	u64		rx_discards;
-	u64		rx_errors;
-	u64		rx_threshold_hit;
-
-	/* Statistics maintained by Send Data Initiator. */
-	u64		dma_readq_full;
-	u64		dma_read_prioq_full;
-	u64		tx_comp_queue_full;
-
-	/* Statistics maintained by Host Coalescing. */
-	u64		ring_set_send_prod_index;
-	u64		ring_status_update;
-	u64		nic_irqs;
-	u64		nic_avoided_irqs;
-	u64		nic_tx_threshold_hit;
-
-	u64		mbuf_lwm_thresh_hit;
-};
-
-/* number of io_buffers to allocate */
-#define TG3_DEF_RX_RING_PENDING		8
-
-struct tg3_rx_prodring_set {
-	u32				rx_std_prod_idx;
-	u32				rx_std_cons_idx;
-	u32				rx_std_iob_cnt;
-	struct tg3_rx_buffer_desc	*rx_std;
-	struct io_buffer		*rx_iobufs[TG3_DEF_RX_RING_PENDING];
-	dma_addr_t			rx_std_mapping;
-};
-
-#define TG3_IRQ_MAX_VECS_RSS		5
-#define TG3_IRQ_MAX_VECS		TG3_IRQ_MAX_VECS_RSS
-
-enum TG3_FLAGS {
-	TG3_FLAG_TAGGED_STATUS = 0,
-	TG3_FLAG_TXD_MBOX_HWBUG,
-	TG3_FLAG_USE_LINKCHG_REG,
-	TG3_FLAG_ERROR_PROCESSED,
-	TG3_FLAG_ENABLE_ASF,
-	TG3_FLAG_ASPM_WORKAROUND,
-	TG3_FLAG_POLL_SERDES,
-	TG3_FLAG_MBOX_WRITE_REORDER,
-	TG3_FLAG_PCIX_TARGET_HWBUG,
-	TG3_FLAG_WOL_SPEED_100MB,
-	TG3_FLAG_WOL_ENABLE,
-	TG3_FLAG_EEPROM_WRITE_PROT,
-	TG3_FLAG_NVRAM,
-	TG3_FLAG_NVRAM_BUFFERED,
-	TG3_FLAG_SUPPORT_MSI,
-	TG3_FLAG_SUPPORT_MSIX,
-	TG3_FLAG_PCIX_MODE,
-	TG3_FLAG_PCI_HIGH_SPEED,
-	TG3_FLAG_PCI_32BIT,
-	TG3_FLAG_SRAM_USE_CONFIG,
-	TG3_FLAG_TX_RECOVERY_PENDING,
-	TG3_FLAG_WOL_CAP,
-	TG3_FLAG_JUMBO_RING_ENABLE,
-	TG3_FLAG_PAUSE_AUTONEG,
-	TG3_FLAG_CPMU_PRESENT,
-	TG3_FLAG_BROKEN_CHECKSUMS,
-	TG3_FLAG_JUMBO_CAPABLE,
-	TG3_FLAG_CHIP_RESETTING,
-	TG3_FLAG_INIT_COMPLETE,
-	TG3_FLAG_RESTART_TIMER,
-	TG3_FLAG_TSO_BUG,
-	TG3_FLAG_IS_5788,
-	TG3_FLAG_MAX_RXPEND_64,
-	TG3_FLAG_TSO_CAPABLE,
-	TG3_FLAG_PCI_EXPRESS,
-	TG3_FLAG_ASF_NEW_HANDSHAKE,
-	TG3_FLAG_HW_AUTONEG,
-	TG3_FLAG_IS_NIC,
-	TG3_FLAG_FLASH,
-	TG3_FLAG_HW_TSO_1,
-	TG3_FLAG_5705_PLUS,
-	TG3_FLAG_5750_PLUS,
-	TG3_FLAG_HW_TSO_3,
-	TG3_FLAG_USING_MSI,
-	TG3_FLAG_USING_MSIX,
-	TG3_FLAG_ICH_WORKAROUND,
-	TG3_FLAG_5780_CLASS,
-	TG3_FLAG_HW_TSO_2,
-	TG3_FLAG_1SHOT_MSI,
-	TG3_FLAG_NO_FWARE_REPORTED,
-	TG3_FLAG_NO_NVRAM_ADDR_TRANS,
-	TG3_FLAG_ENABLE_APE,
-	TG3_FLAG_PROTECTED_NVRAM,
-	TG3_FLAG_MDIOBUS_INITED,
-	TG3_FLAG_LRG_PROD_RING_CAP,
-	TG3_FLAG_RGMII_INBAND_DISABLE,
-	TG3_FLAG_RGMII_EXT_IBND_RX_EN,
-	TG3_FLAG_RGMII_EXT_IBND_TX_EN,
-	TG3_FLAG_CLKREQ_BUG,
-	TG3_FLAG_5755_PLUS,
-	TG3_FLAG_NO_NVRAM,
-	TG3_FLAG_ENABLE_RSS,
-	TG3_FLAG_ENABLE_TSS,
-	TG3_FLAG_4G_DMA_BNDRY_BUG,
-	TG3_FLAG_USE_JUMBO_BDFLAG,
-	TG3_FLAG_L1PLLPD_EN,
-	TG3_FLAG_57765_PLUS,
-	TG3_FLAG_APE_HAS_NCSI,
-	TG3_FLAG_5717_PLUS,
-
-	/* Add new flags before this comment and TG3_FLAG_NUMBER_OF_FLAGS */
-	TG3_FLAG_NUMBER_OF_FLAGS,	/* Last entry in enum TG3_FLAGS */
-};
-
-/* Following definition is copied from linux-3.0rc1/include/linux/kernel.h */
-#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
-/* bitops.h */
-#define BITS_PER_BYTE           8
-#define BITS_TO_LONGS(nr)       DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
-/* types.h: */
-#define DECLARE_BITMAP(name,bits) \
-	unsigned long name[BITS_TO_LONGS(bits)]
-
-struct tg3 {
-	/* begin "general, frequently-used members" cacheline section */
-
-	/* If the IRQ handler (which runs lockless) needs to be
-	 * quiesced, the following bitmask state is used.  The
-	 * SYNC flag is set by non-IRQ context code to initiate
-	 * the quiescence.
-	 *
-	 * When the IRQ handler notices that SYNC is set, it
-	 * disables interrupts and returns.
-	 *
-	 * When all outstanding IRQ handlers have returned after
-	 * the SYNC flag has been set, the setter can be assured
-	 * that interrupts will no longer get run.
-	 *
-	 * In this way all SMP driver locks are never acquired
-	 * in hw IRQ context, only sw IRQ context or lower.
-	 */
-	unsigned int			irq_sync;
-
-	/* SMP locking strategy:
-	 *
-	 * lock: Held during reset, PHY access, timer, and when
-	 *       updating tg3_flags.
-	 *
-	 * netif_tx_lock: Held during tg3_start_xmit. tg3_tx holds
-	 *                netif_tx_lock when it needs to call
-	 *                netif_wake_queue.
-	 *
-	 * Both of these locks are to be held with BH safety.
-	 *
-	 * Because the IRQ handler, tg3_poll, and tg3_start_xmit
-	 * are running lockless, it is necessary to completely
-	 * quiesce the chip with tg3_netif_stop and tg3_full_lock
-	 * before reconfiguring the device.
-	 *
-	 * indirect_lock: Held when accessing registers indirectly
-	 *                with IRQ disabling.
-	 */
-
-	u32				(*read32_mbox) (struct tg3 *, u32);
-	void				(*write32_mbox) (struct tg3 *, u32,
-							 u32);
-	void				*regs;
-	struct net_device		*dev;
-	struct pci_device		*pdev;
-
-	u32				msg_enable;
-
-	/* begin "tx thread" cacheline section */
-	void				(*write32_tx_mbox) (struct tg3 *, u32,
-							    u32);
-
-	/* begin "rx thread" cacheline section */
-	void				(*write32_rx_mbox) (struct tg3 *, u32,
-							    u32);
-	u32				rx_std_max_post;
-	u32				rx_pkt_map_sz;
-
-	/* was struct tg3_napi: */
-	struct tg3_hw_status		*hw_status;
-
-	u32				last_tag;
-	u32				last_irq_tag;
-	u32				int_mbox;
-	/* NOTE: there was a coal_now in struct tg3_napi and struct tg3. We
-	 * didn't use coal_now in struct tg3, so it was removed */
-	u32				coal_now;
-
-	u32				consmbox;
-	u32				rx_rcb_ptr;
-	u16				*rx_rcb_prod_idx;
-	struct tg3_rx_prodring_set	prodring;
-	struct tg3_rx_buffer_desc	*rx_rcb;
-
-	u32				tx_prod;
-	u32				tx_cons;
-	u32				prodmbox;
-	struct tg3_tx_buffer_desc	*tx_ring;
-	struct ring_info		*tx_buffers;
-
-	dma_addr_t			status_mapping;
-	dma_addr_t			rx_rcb_mapping;
-	dma_addr_t			tx_desc_mapping;
-	/* end tg3_napi */
-
-	/* begin "everything else" cacheline(s) section */
-	unsigned long			rx_dropped;
-
-	DECLARE_BITMAP(tg3_flags, TG3_FLAG_NUMBER_OF_FLAGS);
-
-	union {
-	unsigned long			phy_crc_errors;
-	};
-
-	u16				timer_counter;
-	u16				timer_multiplier;
-	u32				timer_offset;
-	u16				asf_counter;
-	u16				asf_multiplier;
-
-	/* 1 second counter for transient serdes link events */
-	u32				serdes_counter;
-#define SERDES_AN_TIMEOUT_5704S		2
-#define SERDES_PARALLEL_DET_TIMEOUT	1
-#define SERDES_AN_TIMEOUT_5714S		1
-
-	struct tg3_link_config		link_config;
-	struct tg3_bufmgr_config	bufmgr_config;
-
-	/* cache h/w values, often passed straight to h/w */
-	u32				rx_mode;
-	u32				tx_mode;
-	u32				mac_mode;
-	u32				mi_mode;
-	u32				misc_host_ctrl;
-	u32				grc_mode;
-	u32				grc_local_ctrl;
-	u32				dma_rwctrl;
-	u32				coalesce_mode;
-
-	/* PCI block */
-	u32				pci_chip_rev_id;
-	u16				pci_cmd;
-	u8				pci_cacheline_sz;
-	u8				pci_lat_timer;
-
-	int				pm_cap;
-	union {
-	int				pcix_cap;
-	int				pcie_cap;
-	};
-	int				pcie_readrq;
-
-	u8				phy_addr;
-
-	/* PHY info */
-	u32				phy_id;
-#define TG3_PHY_ID_MASK			0xfffffff0
-#define TG3_PHY_ID_BCM5400		0x60008040
-#define TG3_PHY_ID_BCM5401		0x60008050
-#define TG3_PHY_ID_BCM5411		0x60008070
-#define TG3_PHY_ID_BCM5701		0x60008110
-#define TG3_PHY_ID_BCM5703		0x60008160
-#define TG3_PHY_ID_BCM5704		0x60008190
-#define TG3_PHY_ID_BCM5705		0x600081a0
-#define TG3_PHY_ID_BCM5750		0x60008180
-#define TG3_PHY_ID_BCM5752		0x60008100
-#define TG3_PHY_ID_BCM5714		0x60008340
-#define TG3_PHY_ID_BCM5780		0x60008350
-#define TG3_PHY_ID_BCM5755		0xbc050cc0
-#define TG3_PHY_ID_BCM5787		0xbc050ce0
-#define TG3_PHY_ID_BCM5756		0xbc050ed0
-#define TG3_PHY_ID_BCM5784		0xbc050fa0
-#define TG3_PHY_ID_BCM5761		0xbc050fd0
-#define TG3_PHY_ID_BCM5718C		0x5c0d8a00
-#define TG3_PHY_ID_BCM5718S		0xbc050ff0
-#define TG3_PHY_ID_BCM57765		0x5c0d8a40
-#define TG3_PHY_ID_BCM5719C		0x5c0d8a20
-#define TG3_PHY_ID_BCM5720C		0x5c0d8b60
-#define TG3_PHY_ID_BCM5906		0xdc00ac40
-#define TG3_PHY_ID_BCM8002		0x60010140
-#define TG3_PHY_ID_INVALID		0xffffffff
-
-#define PHY_ID_RTL8211C			0x001cc910
-#define PHY_ID_RTL8201E			0x00008200
-
-#define TG3_PHY_ID_REV_MASK		0x0000000f
-#define TG3_PHY_REV_BCM5401_B0		0x1
-
-	/* This macro assumes the passed PHY ID is
-	 * already masked with TG3_PHY_ID_MASK.
-	 */
-#define TG3_KNOWN_PHY_ID(X)		\
-	((X) == TG3_PHY_ID_BCM5400 || (X) == TG3_PHY_ID_BCM5401 || \
-	 (X) == TG3_PHY_ID_BCM5411 || (X) == TG3_PHY_ID_BCM5701 || \
-	 (X) == TG3_PHY_ID_BCM5703 || (X) == TG3_PHY_ID_BCM5704 || \
-	 (X) == TG3_PHY_ID_BCM5705 || (X) == TG3_PHY_ID_BCM5750 || \
-	 (X) == TG3_PHY_ID_BCM5752 || (X) == TG3_PHY_ID_BCM5714 || \
-	 (X) == TG3_PHY_ID_BCM5780 || (X) == TG3_PHY_ID_BCM5787 || \
-	 (X) == TG3_PHY_ID_BCM5755 || (X) == TG3_PHY_ID_BCM5756 || \
-	 (X) == TG3_PHY_ID_BCM5906 || (X) == TG3_PHY_ID_BCM5761 || \
-	 (X) == TG3_PHY_ID_BCM5718C || (X) == TG3_PHY_ID_BCM5718S || \
-	 (X) == TG3_PHY_ID_BCM57765 || (X) == TG3_PHY_ID_BCM5719C || \
-	 (X) == TG3_PHY_ID_BCM8002)
-
-	u32				phy_flags;
-#define TG3_PHYFLG_IS_LOW_POWER		0x00000001
-#define TG3_PHYFLG_IS_CONNECTED		0x00000002
-#define TG3_PHYFLG_USE_MI_INTERRUPT	0x00000004
-#define TG3_PHYFLG_PHY_SERDES		0x00000010
-#define TG3_PHYFLG_MII_SERDES		0x00000020
-#define TG3_PHYFLG_ANY_SERDES		(TG3_PHYFLG_PHY_SERDES |	\
-					TG3_PHYFLG_MII_SERDES)
-#define TG3_PHYFLG_IS_FET		0x00000040
-#define TG3_PHYFLG_10_100_ONLY		0x00000080
-#define TG3_PHYFLG_ENABLE_APD		0x00000100
-#define TG3_PHYFLG_CAPACITIVE_COUPLING	0x00000200
-#define TG3_PHYFLG_NO_ETH_WIRE_SPEED	0x00000400
-#define TG3_PHYFLG_JITTER_BUG		0x00000800
-#define TG3_PHYFLG_ADJUST_TRIM		0x00001000
-#define TG3_PHYFLG_ADC_BUG		0x00002000
-#define TG3_PHYFLG_5704_A0_BUG		0x00004000
-#define TG3_PHYFLG_BER_BUG		0x00008000
-#define TG3_PHYFLG_SERDES_PREEMPHASIS	0x00010000
-#define TG3_PHYFLG_PARALLEL_DETECT	0x00020000
-#define TG3_PHYFLG_EEE_CAP		0x00040000
-
-	u32				led_ctrl;
-	u32				phy_otp;
-	u32				setlpicnt;
-
-#define TG3_BPN_SIZE			24
-	char				board_part_number[TG3_BPN_SIZE];
-#define TG3_VER_SIZE			32
-	char				fw_ver[TG3_VER_SIZE];
-	u32				nic_sram_data_cfg;
-	u32				pci_clock_ctrl;
-	struct pci_device			*pdev_peer;
-
-	int				nvram_lock_cnt;
-	u32				nvram_size;
-#define TG3_NVRAM_SIZE_2KB		0x00000800
-#define TG3_NVRAM_SIZE_64KB		0x00010000
-#define TG3_NVRAM_SIZE_128KB		0x00020000
-#define TG3_NVRAM_SIZE_256KB		0x00040000
-#define TG3_NVRAM_SIZE_512KB		0x00080000
-#define TG3_NVRAM_SIZE_1MB		0x00100000
-#define TG3_NVRAM_SIZE_2MB		0x00200000
-
-	u32				nvram_pagesize;
-	u32				nvram_jedecnum;
-
-#define JEDEC_ATMEL			0x1f
-#define JEDEC_ST			0x20
-#define JEDEC_SAIFUN			0x4f
-#define JEDEC_SST			0xbf
-
-#define ATMEL_AT24C02_CHIP_SIZE		TG3_NVRAM_SIZE_2KB
-#define ATMEL_AT24C02_PAGE_SIZE		(8)
-
-#define ATMEL_AT24C64_CHIP_SIZE		TG3_NVRAM_SIZE_64KB
-#define ATMEL_AT24C64_PAGE_SIZE		(32)
-
-#define ATMEL_AT24C512_CHIP_SIZE	TG3_NVRAM_SIZE_512KB
-#define ATMEL_AT24C512_PAGE_SIZE	(128)
-
-#define ATMEL_AT45DB0X1B_PAGE_POS	9
-#define ATMEL_AT45DB0X1B_PAGE_SIZE	264
-
-#define ATMEL_AT25F512_PAGE_SIZE	256
-
-#define ST_M45PEX0_PAGE_SIZE		256
-
-#define SAIFUN_SA25F0XX_PAGE_SIZE	256
-
-#define SST_25VF0X0_PAGE_SIZE		4098
-
-	u16				subsystem_vendor;
-	u16				subsystem_device;
-};
-
-#define ARRAY_SIZE(x) ( sizeof(x) / sizeof((x)[0]) )
-
-#define TG3_TX_RING_SIZE		512
-#define TG3_DEF_TX_RING_PENDING		(TG3_TX_RING_SIZE - 1)
-
-#define	TG3_DMA_ALIGNMENT	16
-
-#define TG3_RX_STD_DMA_SZ		(1536 + 64 + 2)
-
-static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val)
-{
-	tp->write32_mbox(tp, off, val);
-///	if (!tg3_flag(tp, MBOX_WRITE_REORDER) && !tg3_flag(tp, ICH_WORKAROUND))
-///		tp->read32_mbox(tp, off);
-}
-
-u32 tg3_read_indirect_reg32(struct tg3 *tp, u32 off);
-void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val);
-u32 tg3_read_indirect_mbox(struct tg3 *tp, u32 off);
-void tg3_write_indirect_mbox(struct tg3 *tp, u32 off, u32 val);
-
-#define tw32(reg, val)			tg3_write_indirect_reg32(tp, reg, val)
-///#define tw32_mailbox(reg, val)		tg3_write_indirect_mbox(((val) & 0xffffffff), tp->regs + (reg))
-#define tw32_mailbox(reg, val)		tg3_write_indirect_mbox(tp, (reg), (val))
-#define tw32_mailbox_f(reg, val)	tw32_mailbox_flush(tp, (reg), (val))
-#define tw32_f(reg, val)		_tw32_flush(tp, (reg), (val), 0)
-#define tw32_wait_f(reg, val, us)	_tw32_flush(tp, (reg), (val), (us))
-
-#define tw32_tx_mbox(reg, val)		tp->write32_tx_mbox(tp, reg, val)
-#define tw32_rx_mbox(reg, val)		tp->write32_rx_mbox(tp, reg, val)
-
-#define tr32(reg)			tg3_read_indirect_reg32(tp, reg)
-#define tr32_mailbox(reg)		tp->read32_mbox(tp, reg)
-
-/* Functions & macros to verify TG3_FLAGS types */
-
-static inline int variable_test_bit(int nr, volatile const unsigned long *addr)
-{
-	int oldbit;
-
-	asm volatile("bt %2,%1\n\t"
-	             "sbb %0,%0"
-	             : "=r" (oldbit)
-	             : "m" (*(unsigned long *)addr), "Ir" (nr));
-
-	return oldbit;
-}
-
-static inline int _tg3_flag(enum TG3_FLAGS flag, unsigned long *bits)
-{
-	return variable_test_bit(flag, bits);
-}
-
-#define BITOP_ADDR(x) "+m" (*(volatile long *) (x))
-
-static inline void __set_bit(int nr, volatile unsigned long *addr)
-{
-	asm volatile("bts %1,%0" : BITOP_ADDR(addr) : "Ir" (nr) : "memory");
-}
-
-static inline void _tg3_flag_set(enum TG3_FLAGS flag, unsigned long *bits)
-{
-	__set_bit(flag, bits);
-}
-
-static inline void __clear_bit(int nr, volatile unsigned long *addr)
-{
-	asm volatile("btr %1,%0" : BITOP_ADDR(addr) : "Ir" (nr));
-}
-
-static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
-{
-	__clear_bit(flag, bits);
-}
-
-#define tg3_flag(tp, flag)				\
-	_tg3_flag(TG3_FLAG_##flag, (tp)->tg3_flags)
-#define tg3_flag_set(tp, flag)				\
-	_tg3_flag_set(TG3_FLAG_##flag, (tp)->tg3_flags)
-#define tg3_flag_clear(tp, flag)			\
-	_tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
-
-/* tg3_main.c forward declarations */
-int tg3_init_rings(struct tg3 *tp);
-void tg3_rx_prodring_fini(struct tg3_rx_prodring_set *tpr);
-///int tg3_rx_prodring_init(struct tg3 *tp, struct tg3_rx_prodring_set *tpr);
-
-/* tg3_phy.c forward declarations */
-u32 tg3_read_otp_phycfg(struct tg3 *tp);
-void tg3_mdio_init(struct tg3 *tp);
-int tg3_phy_probe(struct tg3 *tp);
-int tg3_phy_reset(struct tg3 *tp);
-int tg3_setup_phy(struct tg3 *tp, int force_reset);
-int tg3_readphy(struct tg3 *tp, int reg, u32 *val);
-int tg3_writephy(struct tg3 *tp, int reg, u32 val);
-
-/* tg3_hw.c forward declarations */
-void _tw32_flush(struct tg3 *tp, u32 off, u32 val, u32 usec_wait);
-void tg3_write_mem(struct tg3 *tp, u32 off, u32 val);
-int tg3_get_invariants(struct tg3 *tp);
-void tg3_init_bufmgr_config(struct tg3 *tp);
-int tg3_get_device_address(struct tg3 *tp);
-int tg3_halt(struct tg3 *tp);
-void tg3_set_txd(struct tg3 *tp, int entry, dma_addr_t mapping, int len, u32 flags);
-void tg3_set_power_state_0(struct tg3 *tp);
-int tg3_alloc_consistent(struct tg3 *tp);
-int tg3_init_hw(struct tg3 *tp, int reset_phy);
-void tg3_poll_link(struct tg3 *tp);
-void tg3_wait_for_event_ack(struct tg3 *tp);
-void __tg3_set_mac_addr(struct tg3 *tp, int skip_mac_1);
-void tg3_disable_ints(struct tg3 *tp);
-void tg3_enable_ints(struct tg3 *tp);
-
-static inline void tg3_generate_fw_event(struct tg3 *tp)
-{
-	u32 val;
-
-	val = tr32(GRC_RX_CPU_EVENT);
-	val |= GRC_RX_CPU_DRIVER_EVENT;
-	tw32_f(GRC_RX_CPU_EVENT, val);
-}
-
-/* linux-2.6.39, include/linux/mii.h: */
-/**
- * mii_resolve_flowctrl_fdx
- * @lcladv: value of MII ADVERTISE register
- * @rmtadv: value of MII LPA register
- *
- * Resolve full duplex flow control as per IEEE 802.3-2005 table 28B-3
- */
-static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv)
-{
-	u8 cap = 0;
-
-	if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) {
-		cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
-	} else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) {
-		if (lcladv & ADVERTISE_PAUSE_CAP)
-			cap = FLOW_CTRL_RX;
-		else if (rmtadv & ADVERTISE_PAUSE_CAP)
-			cap = FLOW_CTRL_TX;
-	}
-
-	return cap;
-}
-
-#define ETH_FCS_LEN 4
-
-#endif /* !(_T3_H) */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3_hw.c ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3_hw.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3_hw.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3_hw.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,2661 +0,0 @@
-/*
- * tg3.c: Broadcom Tigon3 ethernet driver.
- *
- * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
- * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com)
- * Copyright (C) 2004 Sun Microsystems Inc.
- * Copyright (C) 2005-2011 Broadcom Corporation.
- *
- * Firmware is:
- *	Derived from proprietary unpublished source code,
- *	Copyright (C) 2000-2003 Broadcom Corporation.
- *
- *	Permission is hereby granted for the distribution of this firmware
- *	data in hexadecimal or equivalent format, provided this copyright
- *	notice is accompanying it.
- */
-
-FILE_LICENCE ( GPL2_ONLY );
-
-#include <mii.h>
-#include <stdio.h>
-#include <errno.h>
-#include <unistd.h>
-#include <byteswap.h>
-#include <ipxe/pci.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/timer.h>
-#include <ipxe/malloc.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/netdevice.h>
-
-#include "tg3.h"
-
-#define RESET_KIND_SHUTDOWN	0
-#define RESET_KIND_INIT		1
-#define RESET_KIND_SUSPEND	2
-
-#define TG3_DEF_MAC_MODE	0
-
-void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val)
-{	DBGP("%s\n", __func__);
-
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off);
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val);
-}
-
-u32 tg3_read_indirect_reg32(struct tg3 *tp, u32 off)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off);
-	pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val);
-	return val;
-}
-
-static u32 tg3_read32_mbox_5906(struct tg3 *tp, u32 off)
-{	DBGP("%s\n", __func__);
-
-	return readl(tp->regs + off + GRCMBOX_BASE);
-}
-
-static void tg3_write32_mbox_5906(struct tg3 *tp, u32 off, u32 val)
-{	DBGP("%s\n", __func__);
-
-	writel(val, tp->regs + off + GRCMBOX_BASE);
-}
-
-void tg3_write_indirect_mbox(struct tg3 *tp, u32 off, u32 val)
-{	DBGP("%s\n", __func__);
-
-	if (off == (MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW)) {
-		pci_write_config_dword(tp->pdev, TG3PCI_RCV_RET_RING_CON_IDX +
-				       TG3_64BIT_REG_LOW, val);
-		return;
-	}
-	if (off == TG3_RX_STD_PROD_IDX_REG) {
-		pci_write_config_dword(tp->pdev, TG3PCI_STD_RING_PROD_IDX +
-				       TG3_64BIT_REG_LOW, val);
-		return;
-	}
-
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600);
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val);
-
-	/* In indirect mode when disabling interrupts, we also need
-	 * to clear the interrupt bit in the GRC local ctrl register.
-	 */
-	if ((off == (MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW)) &&
-	    (val == 0x1)) {
-		pci_write_config_dword(tp->pdev, TG3PCI_MISC_LOCAL_CTRL,
-				       tp->grc_local_ctrl|GRC_LCLCTRL_CLEARINT);
-	}
-}
-
-u32 tg3_read_indirect_mbox(struct tg3 *tp, u32 off)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-
-	pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off + 0x5600);
-	pci_read_config_dword(tp->pdev, TG3PCI_REG_DATA, &val);
-
-	return val;
-}
-
-/* usec_wait specifies the wait time in usec when writing to certain registers
- * where it is unsafe to read back the register without some delay.
- * GRC_LOCAL_CTRL is one example if the GPIOs are toggled to switch power.
- * TG3PCI_CLOCK_CTRL is another example if the clock frequencies are changed.
- */
-void _tw32_flush(struct tg3 *tp, u32 off, u32 val, u32 usec_wait)
-{	DBGP("%s\n", __func__);
-
-	tw32(off, val);
-	if (usec_wait)
-		udelay(usec_wait);
-	tr32(off);
-
-	/* Wait again after the read for the posted method to guarantee that
-	 * the wait time is met.
-	 */
-	if (usec_wait)
-		udelay(usec_wait);
-}
-
-/* stolen from legacy etherboot tg3 driver */
-void tg3_set_power_state_0(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	uint16_t power_control;
-	int pm = tp->pm_cap;
-
-	/* Make sure register accesses (indirect or otherwise)
-	 * will function correctly.
-	 */
-	pci_write_config_dword(tp->pdev,  TG3PCI_MISC_HOST_CTRL, tp->misc_host_ctrl);
-
-	pci_read_config_word(tp->pdev, pm + PCI_PM_CTRL, &power_control);
-
-	power_control |= PCI_PM_CTRL_PME_STATUS;
-	power_control &= ~(PCI_PM_CTRL_STATE_MASK);
-	power_control |= 0;
-	pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
-
-	tw32_wait_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl, 100);
-
-	return;
-}
-
-void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
-	    (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) {
-		*val = 0;
-		return;
-	}
-
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
-	pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
-
-	/* Always leave this as zero. */
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
-}
-
-#define PCI_VENDOR_ID_ARIMA                0x161f
-
-static void tg3_get_eeprom_hw_cfg(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-	u16 pmcsr;
-
-	/* On some early chips the SRAM cannot be accessed in D3hot state,
-	 * so need make sure we're in D0.
-	 */
-	pci_read_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, &pmcsr);
-	pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
-	pci_write_config_word(tp->pdev, tp->pm_cap + PCI_PM_CTRL, pmcsr);
-	mdelay(1);
-
-	/* Make sure register accesses (indirect or otherwise)
-	 * will function correctly.
-	 */
-	pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
-			       tp->misc_host_ctrl);
-
-	/* The memory arbiter has to be enabled in order for SRAM accesses
-	 * to succeed.  Normally on powerup the tg3 chip firmware will make
-	 * sure it is enabled, but other entities such as system netboot
-	 * code might disable it.
-	 */
-	val = tr32(MEMARB_MODE);
-	tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
-
-	tp->phy_id = TG3_PHY_ID_INVALID;
-	tp->led_ctrl = LED_CTRL_MODE_PHY_1;
-
-	/* Assume an onboard device by default.  */
-	tg3_flag_set(tp, EEPROM_WRITE_PROT);
-
-	tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val);
-	if (val == NIC_SRAM_DATA_SIG_MAGIC) {
-		u32 nic_cfg, led_cfg;
-		u32 nic_phy_id, ver, cfg2 = 0, cfg4 = 0, eeprom_phy_id;
-		int eeprom_phy_serdes = 0;
-
-		tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
-		tp->nic_sram_data_cfg = nic_cfg;
-
-		tg3_read_mem(tp, NIC_SRAM_DATA_VER, &ver);
-		ver >>= NIC_SRAM_DATA_VER_SHIFT;
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
-		    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701 &&
-		    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5703 &&
-		    (ver > 0) && (ver < 0x100))
-			tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2);
-
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785)
-			tg3_read_mem(tp, NIC_SRAM_DATA_CFG_4, &cfg4);
-
-		if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) ==
-		    NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER)
-			eeprom_phy_serdes = 1;
-
-		tg3_read_mem(tp, NIC_SRAM_DATA_PHY_ID, &nic_phy_id);
-		if (nic_phy_id != 0) {
-			u32 id1 = nic_phy_id & NIC_SRAM_DATA_PHY_ID1_MASK;
-			u32 id2 = nic_phy_id & NIC_SRAM_DATA_PHY_ID2_MASK;
-
-			eeprom_phy_id  = (id1 >> 16) << 10;
-			eeprom_phy_id |= (id2 & 0xfc00) << 16;
-			eeprom_phy_id |= (id2 & 0x03ff) <<  0;
-		} else
-			eeprom_phy_id = 0;
-
-		tp->phy_id = eeprom_phy_id;
-		if (eeprom_phy_serdes) {
-			if (!tg3_flag(tp, 5705_PLUS))
-				tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
-			else
-				tp->phy_flags |= TG3_PHYFLG_MII_SERDES;
-		}
-
-		if (tg3_flag(tp, 5750_PLUS))
-			led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
-				    SHASTA_EXT_LED_MODE_MASK);
-		else
-			led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK;
-
-		switch (led_cfg) {
-		default:
-		case NIC_SRAM_DATA_CFG_LED_MODE_PHY_1:
-			tp->led_ctrl = LED_CTRL_MODE_PHY_1;
-			break;
-
-		case NIC_SRAM_DATA_CFG_LED_MODE_PHY_2:
-			tp->led_ctrl = LED_CTRL_MODE_PHY_2;
-			break;
-
-		case NIC_SRAM_DATA_CFG_LED_MODE_MAC:
-			tp->led_ctrl = LED_CTRL_MODE_MAC;
-
-			/* Default to PHY_1_MODE if 0 (MAC_MODE) is
-			 * read on some older 5700/5701 bootcode.
-			 */
-			if (GET_ASIC_REV(tp->pci_chip_rev_id) ==
-			    ASIC_REV_5700 ||
-			    GET_ASIC_REV(tp->pci_chip_rev_id) ==
-			    ASIC_REV_5701)
-				tp->led_ctrl = LED_CTRL_MODE_PHY_1;
-
-			break;
-
-		case SHASTA_EXT_LED_SHARED:
-			tp->led_ctrl = LED_CTRL_MODE_SHARED;
-			if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
-			    tp->pci_chip_rev_id != CHIPREV_ID_5750_A1)
-				tp->led_ctrl |= (LED_CTRL_MODE_PHY_1 |
-						 LED_CTRL_MODE_PHY_2);
-			break;
-
-		case SHASTA_EXT_LED_MAC:
-			tp->led_ctrl = LED_CTRL_MODE_SHASTA_MAC;
-			break;
-
-		case SHASTA_EXT_LED_COMBO:
-			tp->led_ctrl = LED_CTRL_MODE_COMBO;
-			if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0)
-				tp->led_ctrl |= (LED_CTRL_MODE_PHY_1 |
-						 LED_CTRL_MODE_PHY_2);
-			break;
-
-		}
-
-		if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
-		     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) &&
-		    tp->subsystem_vendor == PCI_VENDOR_ID_DELL)
-			tp->led_ctrl = LED_CTRL_MODE_PHY_2;
-
-		if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX)
-			tp->led_ctrl = LED_CTRL_MODE_PHY_1;
-
-		if (nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP) {
-			tg3_flag_set(tp, EEPROM_WRITE_PROT);
-			if ((tp->subsystem_vendor ==
-			     PCI_VENDOR_ID_ARIMA) &&
-			    (tp->subsystem_device == 0x205a ||
-			     tp->subsystem_device == 0x2063))
-				tg3_flag_clear(tp, EEPROM_WRITE_PROT);
-		} else {
-			tg3_flag_clear(tp, EEPROM_WRITE_PROT);
-			tg3_flag_set(tp, IS_NIC);
-		}
-
-		if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
-			tg3_flag_set(tp, ENABLE_ASF);
-			if (tg3_flag(tp, 5750_PLUS))
-				tg3_flag_set(tp, ASF_NEW_HANDSHAKE);
-		}
-
-		if ((nic_cfg & NIC_SRAM_DATA_CFG_APE_ENABLE) &&
-		    tg3_flag(tp, ENABLE_ASF))
-			tg3_flag_set(tp, ENABLE_APE);
-
-		if (cfg2 & (1 << 17))
-			tp->phy_flags |= TG3_PHYFLG_CAPACITIVE_COUPLING;
-
-		/* serdes signal pre-emphasis in register 0x590 set by */
-		/* bootcode if bit 18 is set */
-		if (cfg2 & (1 << 18))
-			tp->phy_flags |= TG3_PHYFLG_SERDES_PREEMPHASIS;
-
-		if ((tg3_flag(tp, 57765_PLUS) ||
-		     (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
-		      GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX)) &&
-		    (cfg2 & NIC_SRAM_DATA_CFG_2_APD_EN))
-			tp->phy_flags |= TG3_PHYFLG_ENABLE_APD;
-
-		if (tg3_flag(tp, PCI_EXPRESS) &&
-		    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
-		    !tg3_flag(tp, 57765_PLUS)) {
-			u32 cfg3;
-
-			tg3_read_mem(tp, NIC_SRAM_DATA_CFG_3, &cfg3);
-		}
-
-		if (cfg4 & NIC_SRAM_RGMII_INBAND_DISABLE)
-			tg3_flag_set(tp, RGMII_INBAND_DISABLE);
-		if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_RX_EN)
-			tg3_flag_set(tp, RGMII_EXT_IBND_RX_EN);
-		if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN)
-			tg3_flag_set(tp, RGMII_EXT_IBND_TX_EN);
-	}
-}
-
-static void tg3_switch_clocks(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 clock_ctrl;
-	u32 orig_clock_ctrl;
-
-	if (tg3_flag(tp, CPMU_PRESENT) || tg3_flag(tp, 5780_CLASS))
-		return;
-
-	clock_ctrl = tr32(TG3PCI_CLOCK_CTRL);
-
-	orig_clock_ctrl = clock_ctrl;
-	clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN |
-		       CLOCK_CTRL_CLKRUN_OENABLE |
-		       0x1f);
-	tp->pci_clock_ctrl = clock_ctrl;
-
-	if (tg3_flag(tp, 5705_PLUS)) {
-		if (orig_clock_ctrl & CLOCK_CTRL_625_CORE) {
-			tw32_wait_f(TG3PCI_CLOCK_CTRL,
-				    clock_ctrl | CLOCK_CTRL_625_CORE, 40);
-		}
-	} else if ((orig_clock_ctrl & CLOCK_CTRL_44MHZ_CORE) != 0) {
-		tw32_wait_f(TG3PCI_CLOCK_CTRL,
-			    clock_ctrl |
-			    (CLOCK_CTRL_44MHZ_CORE | CLOCK_CTRL_ALTCLK),
-			    40);
-		tw32_wait_f(TG3PCI_CLOCK_CTRL,
-			    clock_ctrl | (CLOCK_CTRL_ALTCLK),
-			    40);
-	}
-	tw32_wait_f(TG3PCI_CLOCK_CTRL, clock_ctrl, 40);
-}
-
-int tg3_get_invariants(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 misc_ctrl_reg;
-	u32 pci_state_reg, grc_misc_cfg;
-	u32 val;
-	u16 pci_cmd;
-	int err;
-
-	/* Force memory write invalidate off.  If we leave it on,
-	 * then on 5700_BX chips we have to enable a workaround.
-	 * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary
-	 * to match the cacheline size.  The Broadcom driver have this
-	 * workaround but turns MWI off all the times so never uses
-	 * it.  This seems to suggest that the workaround is insufficient.
-	 */
-	pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
-	pci_cmd &= ~PCI_COMMAND_INVALIDATE;
-	pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
-
-	/* It is absolutely critical that TG3PCI_MISC_HOST_CTRL
-	 * has the register indirect write enable bit set before
-	 * we try to access any of the MMIO registers.  It is also
-	 * critical that the PCI-X hw workaround situation is decided
-	 * before that as well.
-	 */
-	pci_read_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
-			      &misc_ctrl_reg);
-
-	tp->pci_chip_rev_id = (misc_ctrl_reg >>
-			       MISC_HOST_CTRL_CHIPREV_SHIFT);
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_USE_PROD_ID_REG) {
-		u32 prod_id_asic_rev;
-
-		if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_5717 ||
-		    tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 ||
-		    tp->pdev->device == TG3PCI_DEVICE_TIGON3_5719 ||
-		    tp->pdev->device == TG3PCI_DEVICE_TIGON3_5720)
-			pci_read_config_dword(tp->pdev,
-					      TG3PCI_GEN2_PRODID_ASICREV,
-					      &prod_id_asic_rev);
-		else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57762 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
-			 tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795)
-			pci_read_config_dword(tp->pdev,
-					      TG3PCI_GEN15_PRODID_ASICREV,
-					      &prod_id_asic_rev);
-		else
-			pci_read_config_dword(tp->pdev, TG3PCI_PRODID_ASICREV,
-					      &prod_id_asic_rev);
-
-		tp->pci_chip_rev_id = prod_id_asic_rev;
-	}
-
-	/* Wrong chip ID in 5752 A0. This code can be removed later
-	 * as A0 is not in production.
-	 */
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
-		tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
-
-	/* Initialize misc host control in PCI block. */
-	tp->misc_host_ctrl |= (misc_ctrl_reg &
-			       MISC_HOST_CTRL_CHIPREV);
-	pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
-			       tp->misc_host_ctrl);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
-		tg3_flag_set(tp, 5717_PLUS);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766 ||
-	    tg3_flag(tp, 5717_PLUS))
-		tg3_flag_set(tp, 57765_PLUS);
-
-	/* Intentionally exclude ASIC_REV_5906 */
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
-	    tg3_flag(tp, 57765_PLUS))
-		tg3_flag_set(tp, 5755_PLUS);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
-	    tg3_flag(tp, 5755_PLUS) ||
-	    tg3_flag(tp, 5780_CLASS))
-		tg3_flag_set(tp, 5750_PLUS);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
-	    tg3_flag(tp, 5750_PLUS))
-		tg3_flag_set(tp, 5705_PLUS);
-
-	if (tg3_flag(tp, 5717_PLUS))
-		tg3_flag_set(tp, LRG_PROD_RING_CAP);
-
-	pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
-			      &pci_state_reg);
-
-	tp->pcie_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP);
-	if (tp->pcie_cap != 0) {
-		u16 lnkctl;
-
-		tg3_flag_set(tp, PCI_EXPRESS);
-
-		pci_read_config_word(tp->pdev,
-				     tp->pcie_cap + PCI_EXP_LNKCTL,
-				     &lnkctl);
-		if (lnkctl & PCI_EXP_LNKCTL_CLKREQ_EN) {
-			if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-			    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
-			    tp->pci_chip_rev_id == CHIPREV_ID_57780_A0 ||
-			    tp->pci_chip_rev_id == CHIPREV_ID_57780_A1)
-				tg3_flag_set(tp, CLKREQ_BUG);
-		} else if (tp->pci_chip_rev_id == CHIPREV_ID_5717_A0) {
-			tg3_flag_set(tp, L1PLLPD_EN);
-		}
-	} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) {
-		tg3_flag_set(tp, PCI_EXPRESS);
-	} else if (!tg3_flag(tp, 5705_PLUS) ||
-		   tg3_flag(tp, 5780_CLASS)) {
-		tp->pcix_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_PCIX);
-		if (!tp->pcix_cap) {
-			DBGC(&tp->pdev->dev,
-				"Cannot find PCI-X capability, aborting\n");
-			return -EIO;
-		}
-
-		if (!(pci_state_reg & PCISTATE_CONV_PCI_MODE))
-			tg3_flag_set(tp, PCIX_MODE);
-	}
-
-	/* If we have an AMD 762 or VIA K8T800 chipset, write
-	 * reordering to the mailbox registers done by the host
-	 * controller can cause major troubles.  We read back from
-	 * every mailbox register write to force the writes to be
-	 * posted to the chip in order.
-	 */
-
-	pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
-			     &tp->pci_cacheline_sz);
-	pci_read_config_byte(tp->pdev, PCI_LATENCY_TIMER,
-			     &tp->pci_lat_timer);
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 &&
-	    tp->pci_lat_timer < 64) {
-		tp->pci_lat_timer = 64;
-		pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER,
-				      tp->pci_lat_timer);
-	}
-
-	if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
-		/* 5700 BX chips need to have their TX producer index
-		 * mailboxes written twice to workaround a bug.
-		 */
-		tg3_flag_set(tp, TXD_MBOX_HWBUG);
-
-		/* If we are in PCI-X mode, enable register write workaround.
-		 *
-		 * The workaround is to use indirect register accesses
-		 * for all chip writes not to mailbox registers.
-		 */
-		if (tg3_flag(tp, PCIX_MODE)) {
-			u32 pm_reg;
-
-			tg3_flag_set(tp, PCIX_TARGET_HWBUG);
-
-			/* The chip can have it's power management PCI config
-			 * space registers clobbered due to this bug.
-			 * So explicitly force the chip into D0 here.
-			 */
-			pci_read_config_dword(tp->pdev,
-					      tp->pm_cap + PCI_PM_CTRL,
-					      &pm_reg);
-			pm_reg &= ~PCI_PM_CTRL_STATE_MASK;
-			pm_reg |= PCI_PM_CTRL_PME_ENABLE | 0 /* D0 */;
-			pci_write_config_dword(tp->pdev,
-					       tp->pm_cap + PCI_PM_CTRL,
-					       pm_reg);
-
-			/* Also, force SERR#/PERR# in PCI command. */
-			pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
-			pci_cmd |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
-			pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
-		}
-	}
-
-	if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0)
-		tg3_flag_set(tp, PCI_HIGH_SPEED);
-	if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0)
-		tg3_flag_set(tp, PCI_32BIT);
-
-	/* Chip-specific fixup from Broadcom driver */
-	if ((tp->pci_chip_rev_id == CHIPREV_ID_5704_A0) &&
-	    (!(pci_state_reg & PCISTATE_RETRY_SAME_DMA))) {
-		pci_state_reg |= PCISTATE_RETRY_SAME_DMA;
-		pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg);
-	}
-
-	tp->write32_mbox = tg3_write_indirect_reg32;
-	tp->write32_rx_mbox = tg3_write_indirect_mbox;
-	tp->write32_tx_mbox = tg3_write_indirect_mbox;
-	tp->read32_mbox = tg3_read_indirect_mbox;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-		tp->read32_mbox = tg3_read32_mbox_5906;
-		tp->write32_mbox = tg3_write32_mbox_5906;
-		tp->write32_tx_mbox = tg3_write32_mbox_5906;
-		tp->write32_rx_mbox = tg3_write32_mbox_5906;
-	}
-
-	/* Get eeprom hw config before calling tg3_set_power_state().
-	 * In particular, the TG3_FLAG_IS_NIC flag must be
-	 * determined before calling tg3_set_power_state() so that
-	 * we know whether or not to switch out of Vaux power.
-	 * When the flag is set, it means that GPIO1 is used for eeprom
-	 * write protect and also implies that it is a LOM where GPIOs
-	 * are not used to switch power.
-	 */
-	tg3_get_eeprom_hw_cfg(tp);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
-	    tg3_flag(tp, 57765_PLUS))
-		tg3_flag_set(tp, CPMU_PRESENT);
-
-	/* Set up tp->grc_local_ctrl before calling tg3_power_up().
-	 * GPIO1 driven high will bring 5700's external PHY out of reset.
-	 * It is also used as eeprom write protect on LOMs.
-	 */
-	tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
-	    tg3_flag(tp, EEPROM_WRITE_PROT))
-		tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
-				       GRC_LCLCTRL_GPIO_OUTPUT1);
-	/* Unused GPIO3 must be driven as output on 5752 because there
-	 * are no pull-up resistors on unused GPIO pins.
-	 */
-	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
-		tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
-		tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
-
-	if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5761 ||
-	    tp->pdev->device == TG3PCI_DEVICE_TIGON3_5761S) {
-		/* Turn off the debug UART. */
-		tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_UART_SEL;
-		if (tg3_flag(tp, IS_NIC))
-			/* Keep VMain power. */
-			tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE0 |
-					      GRC_LCLCTRL_GPIO_OUTPUT0;
-	}
-
-	/* Force the chip into D0. */
-	tg3_set_power_state_0(tp);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
-		tp->phy_flags |= TG3_PHYFLG_IS_FET;
-
-	/* A few boards don't want Ethernet@WireSpeed phy feature */
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
-	    (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
-	     (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
-	     (tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
-	    (tp->phy_flags & TG3_PHYFLG_IS_FET) ||
-	    (tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
-		tp->phy_flags |= TG3_PHYFLG_NO_ETH_WIRE_SPEED;
-
-	if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX ||
-	    GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5704_AX)
-		tp->phy_flags |= TG3_PHYFLG_ADC_BUG;
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0)
-		tp->phy_flags |= TG3_PHYFLG_5704_A0_BUG;
-
-	if (tg3_flag(tp, 5705_PLUS) &&
-	    !(tp->phy_flags & TG3_PHYFLG_IS_FET) &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
-	    !tg3_flag(tp, 57765_PLUS)) {
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761) {
-			if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 &&
-			    tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722)
-				tp->phy_flags |= TG3_PHYFLG_JITTER_BUG;
-			if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M)
-				tp->phy_flags |= TG3_PHYFLG_ADJUST_TRIM;
-		} else
-			tp->phy_flags |= TG3_PHYFLG_BER_BUG;
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
-	    GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX) {
-		tp->phy_otp = tg3_read_otp_phycfg(tp);
-		if (tp->phy_otp == 0)
-			tp->phy_otp = TG3_OTP_DEFAULT;
-	}
-
-	if (tg3_flag(tp, CPMU_PRESENT))
-		tp->mi_mode = MAC_MI_MODE_500KHZ_CONST;
-	else
-		tp->mi_mode = MAC_MI_MODE_BASE;
-
-	tp->coalesce_mode = 0;
-	if (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5700_AX &&
-	    GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5700_BX)
-		tp->coalesce_mode |= HOSTCC_MODE_32BYTE;
-
-	/* Set these bits to enable statistics workaround. */
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
-	    tp->pci_chip_rev_id == CHIPREV_ID_5719_A0 ||
-	    tp->pci_chip_rev_id == CHIPREV_ID_5720_A0) {
-		tp->coalesce_mode |= HOSTCC_MODE_ATTN;
-		tp->grc_mode |= GRC_MODE_IRQ_ON_FLOW_ATTN;
-	}
-
-	tg3_mdio_init(tp);
-
-	/* Initialize data/descriptor byte/word swapping. */
-	val = tr32(GRC_MODE);
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
-		val &= (GRC_MODE_BYTE_SWAP_B2HRX_DATA |
-			GRC_MODE_WORD_SWAP_B2HRX_DATA |
-			GRC_MODE_B2HRX_ENABLE |
-			GRC_MODE_HTX2B_ENABLE |
-			GRC_MODE_HOST_STACKUP);
-	else
-		val &= GRC_MODE_HOST_STACKUP;
-
-	tw32(GRC_MODE, val | tp->grc_mode);
-
-	tg3_switch_clocks(tp);
-
-	/* Clear this out for sanity. */
-	tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
-
-	pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
-			      &pci_state_reg);
-	if ((pci_state_reg & PCISTATE_CONV_PCI_MODE) == 0 &&
-	    !tg3_flag(tp, PCIX_TARGET_HWBUG)) {
-		u32 chiprevid = GET_CHIP_REV_ID(tp->misc_host_ctrl);
-
-		if (chiprevid == CHIPREV_ID_5701_A0 ||
-		    chiprevid == CHIPREV_ID_5701_B0 ||
-		    chiprevid == CHIPREV_ID_5701_B2 ||
-		    chiprevid == CHIPREV_ID_5701_B5) {
-			void *sram_base;
-
-			/* Write some dummy words into the SRAM status block
-			 * area, see if it reads back correctly.  If the return
-			 * value is bad, force enable the PCIX workaround.
-			 */
-			sram_base = tp->regs + NIC_SRAM_WIN_BASE + NIC_SRAM_STATS_BLK;
-
-			writel(0x00000000, sram_base);
-			writel(0x00000000, sram_base + 4);
-			writel(0xffffffff, sram_base + 4);
-			if (readl(sram_base) != 0x00000000)
-				tg3_flag_set(tp, PCIX_TARGET_HWBUG);
-		}
-	}
-
-	udelay(50);
-	/* FIXME: do we need nvram access? */
-///	tg3_nvram_init(tp);
-
-	grc_misc_cfg = tr32(GRC_MISC_CFG);
-	grc_misc_cfg &= GRC_MISC_CFG_BOARD_ID_MASK;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
-	    (grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788 ||
-	     grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788M))
-		tg3_flag_set(tp, IS_5788);
-
-	if (!tg3_flag(tp, IS_5788) &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
-		tg3_flag_set(tp, TAGGED_STATUS);
-	if (tg3_flag(tp, TAGGED_STATUS)) {
-		tp->coalesce_mode |= (HOSTCC_MODE_CLRTICK_RXBD |
-				      HOSTCC_MODE_CLRTICK_TXBD);
-
-		tp->misc_host_ctrl |= MISC_HOST_CTRL_TAGGED_STATUS;
-		pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
-				       tp->misc_host_ctrl);
-	}
-
-	/* Preserve the APE MAC_MODE bits */
-	if (tg3_flag(tp, ENABLE_APE))
-		tp->mac_mode = MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
-	else
-		tp->mac_mode = TG3_DEF_MAC_MODE;
-
-	/* these are limited to 10/100 only */
-	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 &&
-	     (grc_misc_cfg == 0x8000 || grc_misc_cfg == 0x4000)) ||
-	    (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
-	     tp->pdev->vendor == PCI_VENDOR_ID_BROADCOM &&
-	     (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5901 ||
-	      tp->pdev->device == PCI_DEVICE_ID_TIGON3_5901_2 ||
-	      tp->pdev->device == PCI_DEVICE_ID_TIGON3_5705F)) ||
-	    (tp->pdev->vendor == PCI_VENDOR_ID_BROADCOM &&
-	     (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5751F ||
-	      tp->pdev->device == PCI_DEVICE_ID_TIGON3_5753F ||
-	      tp->pdev->device == PCI_DEVICE_ID_TIGON3_5787F)) ||
-	    tp->pdev->device == TG3PCI_DEVICE_TIGON3_57790 ||
-	    tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
-	    tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795 ||
-	    (tp->phy_flags & TG3_PHYFLG_IS_FET))
-		tp->phy_flags |= TG3_PHYFLG_10_100_ONLY;
-
-	err = tg3_phy_probe(tp);
-	if (err) {
-		DBGC(&tp->pdev->dev, "phy probe failed, err: %s\n", strerror(err));
-		/* ... but do not return immediately ... */
-	}
-
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
-		tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT;
-	} else {
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700)
-			tp->phy_flags |= TG3_PHYFLG_USE_MI_INTERRUPT;
-		else
-			tp->phy_flags &= ~TG3_PHYFLG_USE_MI_INTERRUPT;
-	}
-
-	/* For all SERDES we poll the MAC status register. */
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
-		tg3_flag_set(tp, POLL_SERDES);
-	else
-		tg3_flag_clear(tp, POLL_SERDES);
-
-	/* Increment the rx prod index on the rx std ring by at most
-	 * 8 for these chips to workaround hw errata.
-	 */
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
-		tp->rx_std_max_post = 8;
-
-	return err;
-}
-
-void tg3_init_bufmgr_config(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, 57765_PLUS)) {
-		tp->bufmgr_config.mbuf_read_dma_low_water =
-			DEFAULT_MB_RDMA_LOW_WATER_5705;
-		tp->bufmgr_config.mbuf_mac_rx_low_water =
-			DEFAULT_MB_MACRX_LOW_WATER_57765;
-		tp->bufmgr_config.mbuf_high_water =
-			DEFAULT_MB_HIGH_WATER_57765;
-
-		tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
-			DEFAULT_MB_RDMA_LOW_WATER_5705;
-		tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
-			DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765;
-		tp->bufmgr_config.mbuf_high_water_jumbo =
-			DEFAULT_MB_HIGH_WATER_JUMBO_57765;
-	} else if (tg3_flag(tp, 5705_PLUS)) {
-		tp->bufmgr_config.mbuf_read_dma_low_water =
-			DEFAULT_MB_RDMA_LOW_WATER_5705;
-		tp->bufmgr_config.mbuf_mac_rx_low_water =
-			DEFAULT_MB_MACRX_LOW_WATER_5705;
-		tp->bufmgr_config.mbuf_high_water =
-			DEFAULT_MB_HIGH_WATER_5705;
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-			tp->bufmgr_config.mbuf_mac_rx_low_water =
-				DEFAULT_MB_MACRX_LOW_WATER_5906;
-			tp->bufmgr_config.mbuf_high_water =
-				DEFAULT_MB_HIGH_WATER_5906;
-		}
-
-		tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
-			DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780;
-		tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
-			DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780;
-		tp->bufmgr_config.mbuf_high_water_jumbo =
-			DEFAULT_MB_HIGH_WATER_JUMBO_5780;
-	} else {
-		tp->bufmgr_config.mbuf_read_dma_low_water =
-			DEFAULT_MB_RDMA_LOW_WATER;
-		tp->bufmgr_config.mbuf_mac_rx_low_water =
-			DEFAULT_MB_MACRX_LOW_WATER;
-		tp->bufmgr_config.mbuf_high_water =
-			DEFAULT_MB_HIGH_WATER;
-
-		tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
-			DEFAULT_MB_RDMA_LOW_WATER_JUMBO;
-		tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
-			DEFAULT_MB_MACRX_LOW_WATER_JUMBO;
-		tp->bufmgr_config.mbuf_high_water_jumbo =
-			DEFAULT_MB_HIGH_WATER_JUMBO;
-	}
-
-	tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER;
-	tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER;
-}
-
-#define TG3_FW_EVENT_TIMEOUT_USEC 2500
-
-void tg3_wait_for_event_ack(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int i;
-
-	for (i = 0; i < TG3_FW_EVENT_TIMEOUT_USEC / 10; i++) {
-		if (!(tr32(GRC_RX_CPU_EVENT) & GRC_RX_CPU_DRIVER_EVENT))
-			break;
-
-		udelay(10);
-	}
-}
-
-void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
-{	DBGP("%s\n", __func__);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
-	    (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC))
-		return;
-
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
-
-	/* Always leave this as zero. */
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
-}
-
-static void tg3_stop_fw(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, ENABLE_ASF) && !tg3_flag(tp, ENABLE_APE)) {
-		/* Wait for RX cpu to ACK the previous event. */
-		tg3_wait_for_event_ack(tp);
-
-		tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_PAUSE_FW);
-
-		tg3_generate_fw_event(tp);
-
-		/* Wait for RX cpu to ACK this event. */
-		tg3_wait_for_event_ack(tp);
-	}
-}
-
-static void tg3_write_sig_pre_reset(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	tg3_write_mem(tp, NIC_SRAM_FIRMWARE_MBOX,
-		      NIC_SRAM_FIRMWARE_MBOX_MAGIC1);
-}
-
-void tg3_disable_ints(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	tw32(TG3PCI_MISC_HOST_CTRL,
-	     (tp->misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT));
-
-	tw32_mailbox_f(tp->int_mbox, 0x00000001);
-}
-
-void tg3_enable_ints(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	tw32(TG3PCI_MISC_HOST_CTRL,
-	     (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT));
-
-	tp->coal_now = tp->coalesce_mode | HOSTCC_MODE_ENABLE;
-
-	tw32_mailbox_f(tp->int_mbox, tp->last_tag << 24);
-
-	/* Force an initial interrupt */
-	if (!tg3_flag(tp, TAGGED_STATUS) &&
-	    (tp->hw_status->status & SD_STATUS_UPDATED))
-		tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT);
-	else
-		tw32(HOSTCC_MODE, tp->coal_now);
-}
-
-#define MAX_WAIT_CNT 1000
-
-/* To stop a block, clear the enable bit and poll till it clears. */
-static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit)
-{	DBGP("%s\n", __func__);
-
-	unsigned int i;
-	u32 val;
-
-	if (tg3_flag(tp, 5705_PLUS)) {
-		switch (ofs) {
-		case RCVLSC_MODE:
-		case DMAC_MODE:
-		case MBFREE_MODE:
-		case BUFMGR_MODE:
-		case MEMARB_MODE:
-			/* We can't enable/disable these bits of the
-			 * 5705/5750, just say success.
-			 */
-			return 0;
-
-		default:
-			break;
-		}
-	}
-
-	val = tr32(ofs);
-	val &= ~enable_bit;
-	tw32_f(ofs, val);
-
-	for (i = 0; i < MAX_WAIT_CNT; i++) {
-		udelay(100);
-		val = tr32(ofs);
-		if ((val & enable_bit) == 0)
-			break;
-	}
-
-	if (i == MAX_WAIT_CNT) {
-		DBGC(&tp->pdev->dev,
-			"tg3_stop_block timed out, ofs=%lx enable_bit=%x\n",
-			ofs, enable_bit);
-		return -ENODEV;
-	}
-
-	return 0;
-}
-
-static int tg3_abort_hw(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int i, err;
-
-	tg3_disable_ints(tp);
-
-	tp->rx_mode &= ~RX_MODE_ENABLE;
-	tw32_f(MAC_RX_MODE, tp->rx_mode);
-	udelay(10);
-
-	err  = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE);
-
-	err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE);
-	err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE);
-	err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE);
-	err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE);
-
-	tp->mac_mode &= ~MAC_MODE_TDE_ENABLE;
-	tw32_f(MAC_MODE, tp->mac_mode);
-	udelay(40);
-
-	tp->tx_mode &= ~TX_MODE_ENABLE;
-	tw32_f(MAC_TX_MODE, tp->tx_mode);
-
-	for (i = 0; i < MAX_WAIT_CNT; i++) {
-		udelay(100);
-		if (!(tr32(MAC_TX_MODE) & TX_MODE_ENABLE))
-			break;
-	}
-	if (i >= MAX_WAIT_CNT) {
-		DBGC(&tp->pdev->dev,
-			"%s timed out, TX_MODE_ENABLE will not clear "
-			"MAC_TX_MODE=%08x\n", __func__, tr32(MAC_TX_MODE));
-		err |= -ENODEV;
-	}
-
-	err |= tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE);
-	err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE);
-
-	tw32(FTQ_RESET, 0xffffffff);
-	tw32(FTQ_RESET, 0x00000000);
-
-	err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE);
-	err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE);
-
-	if (tp->hw_status)
-		memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
-
-	return err;
-}
-
-void __tg3_set_mac_addr(struct tg3 *tp, int skip_mac_1)
-{	DBGP("%s\n", __func__);
-
-	u32 addr_high, addr_low;
-	int i;
-
-	addr_high = ((tp->dev->ll_addr[0] << 8) |
-		     tp->dev->ll_addr[1]);
-	addr_low = ((tp->dev->ll_addr[2] << 24) |
-		    (tp->dev->ll_addr[3] << 16) |
-		    (tp->dev->ll_addr[4] <<  8) |
-		    (tp->dev->ll_addr[5] <<  0));
-	for (i = 0; i < 4; i++) {
-		if (i == 1 && skip_mac_1)
-			continue;
-		tw32(MAC_ADDR_0_HIGH + (i * 8), addr_high);
-		tw32(MAC_ADDR_0_LOW + (i * 8), addr_low);
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
-		for (i = 0; i < 12; i++) {
-			tw32(MAC_EXTADDR_0_HIGH + (i * 8), addr_high);
-			tw32(MAC_EXTADDR_0_LOW + (i * 8), addr_low);
-		}
-	}
-
-	addr_high = (tp->dev->ll_addr[0] +
-		     tp->dev->ll_addr[1] +
-		     tp->dev->ll_addr[2] +
-		     tp->dev->ll_addr[3] +
-		     tp->dev->ll_addr[4] +
-		     tp->dev->ll_addr[5]) &
-		TX_BACKOFF_SEED_MASK;
-	tw32(MAC_TX_BACKOFF_SEED, addr_high);
-}
-
-/* Save PCI command register before chip reset */
-static void tg3_save_pci_state(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd);
-}
-
-/* Restore PCI state after chip reset */
-static void tg3_restore_pci_state(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-
-	/* Re-enable indirect register accesses. */
-	pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
-			       tp->misc_host_ctrl);
-
-	/* Set MAX PCI retry to zero. */
-	val = (PCISTATE_ROM_ENABLE | PCISTATE_ROM_RETRY_ENABLE);
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
-	    tg3_flag(tp, PCIX_MODE))
-		val |= PCISTATE_RETRY_SAME_DMA;
-
-	pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
-
-	pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785) {
-			pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
-					      tp->pci_cacheline_sz);
-			pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER,
-					      tp->pci_lat_timer);
-	}
-
-
-	/* Make sure PCI-X relaxed ordering bit is clear. */
-	if (tg3_flag(tp, PCIX_MODE)) {
-		u16 pcix_cmd;
-
-		pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
-				     &pcix_cmd);
-		pcix_cmd &= ~PCI_X_CMD_ERO;
-		pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
-				      pcix_cmd);
-	}
-}
-
-static int tg3_poll_fw(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int i;
-	u32 val;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-		/* Wait up to 20ms for init done. */
-		for (i = 0; i < 200; i++) {
-			if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE)
-				return 0;
-			udelay(100);
-		}
-		return -ENODEV;
-	}
-
-	/* Wait for firmware initialization to complete. */
-	for (i = 0; i < 100000; i++) {
-		tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val);
-		if (val == (u32)~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
-			break;
-		udelay(10);
-	}
-
-	/* Chip might not be fitted with firmware.  Some Sun onboard
-	 * parts are configured like that.  So don't signal the timeout
-	 * of the above loop as an error, but do report the lack of
-	 * running firmware once.
-	 */
-	if (i >= 100000 && !tg3_flag(tp, NO_FWARE_REPORTED)) {
-		tg3_flag_set(tp, NO_FWARE_REPORTED);
-
-		DBGC(tp->dev, "No firmware running\n");
-	}
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) {
-		/* The 57765 A0 needs a little more
-		 * time to do some important work.
-		 */
-		mdelay(10);
-	}
-
-	return 0;
-}
-
-static int tg3_nvram_lock(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, NVRAM)) {
-		int i;
-
-		if (tp->nvram_lock_cnt == 0) {
-			tw32(NVRAM_SWARB, SWARB_REQ_SET1);
-			for (i = 0; i < 8000; i++) {
-				if (tr32(NVRAM_SWARB) & SWARB_GNT1)
-					break;
-				udelay(20);
-			}
-			if (i == 8000) {
-				tw32(NVRAM_SWARB, SWARB_REQ_CLR1);
-				return -ENODEV;
-			}
-		}
-		tp->nvram_lock_cnt++;
-	}
-	return 0;
-}
-
-static void tg3_nvram_unlock(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, NVRAM)) {
-		if (tp->nvram_lock_cnt > 0)
-			tp->nvram_lock_cnt--;
-		if (tp->nvram_lock_cnt == 0)
-			tw32_f(NVRAM_SWARB, SWARB_REQ_CLR1);
-	}
-}
-
-static int tg3_chip_reset(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-	int err;
-
-	tg3_nvram_lock(tp);
-
-
-	/* No matching tg3_nvram_unlock() after this because
-	 * chip reset below will undo the nvram lock.
-	 */
-	tp->nvram_lock_cnt = 0;
-
-	/* GRC_MISC_CFG core clock reset will clear the memory
-	 * enable bit in PCI register 4 and the MSI enable bit
-	 * on some chips, so we save relevant registers here.
-	 */
-	tg3_save_pci_state(tp);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
-	    tg3_flag(tp, 5755_PLUS))
-		tw32(GRC_FASTBOOT_PC, 0);
-
-#if 0
-	/*
-	 * We must avoid the readl() that normally takes place.
-	 * It locks machines, causes machine checks, and other
-	 * fun things.  So, temporarily disable the 5701
-	 * hardware workaround, while we do the reset.
-	 */
-	write_op = tp->write32;
-	if (write_op == tg3_write_flush_reg32)
-		tp->write32 = tg3_write32;
-#endif
-
-	/* Prevent the irq handler from reading or writing PCI registers
-	 * during chip reset when the memory enable bit in the PCI command
-	 * register may be cleared.  The chip does not generate interrupt
-	 * at this time, but the irq handler may still be called due to irq
-	 * sharing or irqpoll.
-	 */
-	tg3_flag_set(tp, CHIP_RESETTING);
-
-	if (tp->hw_status) {
-		tp->hw_status->status = 0;
-		tp->hw_status->status_tag = 0;
-	}
-	tp->last_tag = 0;
-	tp->last_irq_tag = 0;
-
-	mb();
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) {
-		val = tr32(TG3_PCIE_LNKCTL) & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN;
-		tw32(TG3_PCIE_LNKCTL, val | TG3_PCIE_LNKCTL_L1_PLL_PD_DIS);
-	}
-
-	/* do the reset */
-	val = GRC_MISC_CFG_CORECLK_RESET;
-
-	if (tg3_flag(tp, PCI_EXPRESS)) {
-		/* Force PCIe 1.0a mode */
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
-		    !tg3_flag(tp, 57765_PLUS) &&
-		    tr32(TG3_PCIE_PHY_TSTCTL) ==
-		    (TG3_PCIE_PHY_TSTCTL_PCIE10 | TG3_PCIE_PHY_TSTCTL_PSCRAM))
-			tw32(TG3_PCIE_PHY_TSTCTL, TG3_PCIE_PHY_TSTCTL_PSCRAM);
-
-		if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
-			tw32(GRC_MISC_CFG, (1 << 29));
-			val |= (1 << 29);
-		}
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-		tw32(VCPU_STATUS, tr32(VCPU_STATUS) | VCPU_STATUS_DRV_RESET);
-		tw32(GRC_VCPU_EXT_CTRL,
-		     tr32(GRC_VCPU_EXT_CTRL) & ~GRC_VCPU_EXT_CTRL_HALT_CPU);
-	}
-
-	/* Manage gphy power for all CPMU absent PCIe devices. */
-	if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, CPMU_PRESENT))
-		val |= GRC_MISC_CFG_KEEP_GPHY_POWER;
-
-	tw32(GRC_MISC_CFG, val);
-
-	/* Unfortunately, we have to delay before the PCI read back.
-	 * Some 575X chips even will not respond to a PCI cfg access
-	 * when the reset command is given to the chip.
-	 *
-	 * How do these hardware designers expect things to work
-	 * properly if the PCI write is posted for a long period
-	 * of time?  It is always necessary to have some method by
-	 * which a register read back can occur to push the write
-	 * out which does the reset.
-	 *
-	 * For most tg3 variants the trick below was working.
-	 * Ho hum...
-	 */
-	udelay(120);
-
-	/* Flush PCI posted writes.  The normal MMIO registers
-	 * are inaccessible at this time so this is the only
-	 * way to make this reliably (actually, this is no longer
-	 * the case, see above).  I tried to use indirect
-	 * register read/write but this upset some 5701 variants.
-	 */
-	pci_read_config_dword(tp->pdev, PCI_COMMAND, &val);
-
-	udelay(120);
-
-	if (tg3_flag(tp, PCI_EXPRESS) && tp->pcie_cap) {
-		u16 val16;
-
-		if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) {
-			int i;
-			u32 cfg_val;
-
-			/* Wait for link training to complete.  */
-			for (i = 0; i < 5000; i++)
-				udelay(100);
-
-			pci_read_config_dword(tp->pdev, 0xc4, &cfg_val);
-			pci_write_config_dword(tp->pdev, 0xc4,
-					       cfg_val | (1 << 15));
-		}
-
-		/* Clear the "no snoop" and "relaxed ordering" bits. */
-		pci_read_config_word(tp->pdev,
-				     tp->pcie_cap + PCI_EXP_DEVCTL,
-				     &val16);
-		val16 &= ~(PCI_EXP_DEVCTL_RELAX_EN |
-			   PCI_EXP_DEVCTL_NOSNOOP_EN);
-		/*
-		 * Older PCIe devices only support the 128 byte
-		 * MPS setting.  Enforce the restriction.
-		 */
-		if (!tg3_flag(tp, CPMU_PRESENT))
-			val16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
-		pci_write_config_word(tp->pdev,
-				      tp->pcie_cap + PCI_EXP_DEVCTL,
-				      val16);
-
-		/* Clear error status */
-		pci_write_config_word(tp->pdev,
-				      tp->pcie_cap + PCI_EXP_DEVSTA,
-				      PCI_EXP_DEVSTA_CED |
-				      PCI_EXP_DEVSTA_NFED |
-				      PCI_EXP_DEVSTA_FED |
-				      PCI_EXP_DEVSTA_URD);
-	}
-
-	tg3_restore_pci_state(tp);
-
-	tg3_flag_clear(tp, CHIP_RESETTING);
-	tg3_flag_clear(tp, ERROR_PROCESSED);
-
-	val = 0;
-	if (tg3_flag(tp, 5780_CLASS))
-		val = tr32(MEMARB_MODE);
-	tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) {
-		tg3_stop_fw(tp);
-		tw32(0x5000, 0x400);
-	}
-
-	tw32(GRC_MODE, tp->grc_mode);
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
-		val = tr32(0xc4);
-
-		tw32(0xc4, val | (1 << 15));
-	}
-
-	if ((tp->nic_sram_data_cfg & NIC_SRAM_DATA_CFG_MINI_PCI) != 0 &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
-		tp->pci_clock_ctrl |= CLOCK_CTRL_CLKRUN_OENABLE;
-		if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0)
-			tp->pci_clock_ctrl |= CLOCK_CTRL_FORCE_CLKRUN;
-		tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
-	}
-
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
-		tp->mac_mode |= MAC_MODE_PORT_MODE_TBI;
-		val = tp->mac_mode;
-	} else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
-		tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
-		val = tp->mac_mode;
-	} else
-		val = 0;
-
-	tw32_f(MAC_MODE, val);
-	udelay(40);
-
-	err = tg3_poll_fw(tp);
-	if (err)
-		return err;
-
-	if (tg3_flag(tp, PCI_EXPRESS) &&
-	    tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
-	    !tg3_flag(tp, 57765_PLUS)) {
-		val = tr32(0x7c00);
-
-		tw32(0x7c00, val | (1 << 25));
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
-		val = tr32(TG3_CPMU_CLCK_ORIDE);
-		tw32(TG3_CPMU_CLCK_ORIDE, val & ~CPMU_CLCK_ORIDE_MAC_ORIDE_EN);
-	}
-
-	if (tg3_flag(tp, CPMU_PRESENT)) {
-		tw32(TG3_CPMU_D0_CLCK_POLICY, 0);
-		val = tr32(TG3_CPMU_CLCK_ORIDE_EN);
-		tw32(TG3_CPMU_CLCK_ORIDE_EN,
-		     val | CPMU_CLCK_ORIDE_MAC_CLCK_ORIDE_EN);
-	}
-
-	return 0;
-}
-
-int tg3_halt(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int err;
-
-	tg3_stop_fw(tp);
-
-	tg3_write_sig_pre_reset(tp);
-
-	tg3_abort_hw(tp);
-	err = tg3_chip_reset(tp);
-
-	__tg3_set_mac_addr(tp, 0);
-
-	if (err)
-		return err;
-
-	return 0;
-}
-
-static int tg3_nvram_read_using_eeprom(struct tg3 *tp,
-					u32 offset, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	u32 tmp;
-	int i;
-
-	if (offset > EEPROM_ADDR_ADDR_MASK || (offset % 4) != 0)
-		return -EINVAL;
-
-	tmp = tr32(GRC_EEPROM_ADDR) & ~(EEPROM_ADDR_ADDR_MASK |
-					EEPROM_ADDR_DEVID_MASK |
-					EEPROM_ADDR_READ);
-	tw32(GRC_EEPROM_ADDR,
-	     tmp |
-	     (0 << EEPROM_ADDR_DEVID_SHIFT) |
-	     ((offset << EEPROM_ADDR_ADDR_SHIFT) &
-	      EEPROM_ADDR_ADDR_MASK) |
-	     EEPROM_ADDR_READ | EEPROM_ADDR_START);
-
-	for (i = 0; i < 1000; i++) {
-		tmp = tr32(GRC_EEPROM_ADDR);
-
-		if (tmp & EEPROM_ADDR_COMPLETE)
-			break;
-		mdelay(1);
-	}
-	if (!(tmp & EEPROM_ADDR_COMPLETE))
-		return -EBUSY;
-
-	tmp = tr32(GRC_EEPROM_DATA);
-
-	/*
-	 * The data will always be opposite the native endian
-	 * format.  Perform a blind byteswap to compensate.
-	 */
-	*val = bswap_32(tmp);
-
-	return 0;
-}
-
-static u32 tg3_nvram_phys_addr(struct tg3 *tp, u32 addr)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, NVRAM) &&
-	    tg3_flag(tp, NVRAM_BUFFERED) &&
-	    tg3_flag(tp, FLASH) &&
-	    !tg3_flag(tp, NO_NVRAM_ADDR_TRANS) &&
-	    (tp->nvram_jedecnum == JEDEC_ATMEL))
-
-		addr = ((addr / tp->nvram_pagesize) <<
-			ATMEL_AT45DB0X1B_PAGE_POS) +
-		       (addr % tp->nvram_pagesize);
-
-	return addr;
-}
-
-static void tg3_enable_nvram_access(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) {
-		u32 nvaccess = tr32(NVRAM_ACCESS);
-
-		tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
-	}
-}
-
-static void tg3_disable_nvram_access(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, 5750_PLUS) && !tg3_flag(tp, PROTECTED_NVRAM)) {
-		u32 nvaccess = tr32(NVRAM_ACCESS);
-
-		tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
-	}
-}
-
-#define NVRAM_CMD_TIMEOUT 10000
-
-static int tg3_nvram_exec_cmd(struct tg3 *tp, u32 nvram_cmd)
-{	DBGP("%s\n", __func__);
-
-	int i;
-
-	tw32(NVRAM_CMD, nvram_cmd);
-	for (i = 0; i < NVRAM_CMD_TIMEOUT; i++) {
-		udelay(10);
-		if (tr32(NVRAM_CMD) & NVRAM_CMD_DONE) {
-			udelay(10);
-			break;
-		}
-	}
-
-	if (i == NVRAM_CMD_TIMEOUT)
-		return -EBUSY;
-
-	return 0;
-}
-
-/* NOTE: Data read in from NVRAM is byteswapped according to
- * the byteswapping settings for all other register accesses.
- * tg3 devices are BE devices, so on a BE machine, the data
- * returned will be exactly as it is seen in NVRAM.  On a LE
- * machine, the 32-bit value will be byteswapped.
- */
-static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	int ret;
-
-	if (!tg3_flag(tp, NVRAM))
-		return tg3_nvram_read_using_eeprom(tp, offset, val);
-
-	offset = tg3_nvram_phys_addr(tp, offset);
-
-	if (offset > NVRAM_ADDR_MSK)
-		return -EINVAL;
-
-	ret = tg3_nvram_lock(tp);
-	if (ret)
-		return ret;
-
-	tg3_enable_nvram_access(tp);
-
-	tw32(NVRAM_ADDR, offset);
-	ret = tg3_nvram_exec_cmd(tp, NVRAM_CMD_RD | NVRAM_CMD_GO |
-		NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE);
-
-	if (ret == 0)
-		*val = tr32(NVRAM_RDDATA);
-
-	tg3_disable_nvram_access(tp);
-
-	tg3_nvram_unlock(tp);
-
-	return ret;
-}
-
-/* Ensures NVRAM data is in bytestream format. */
-static int tg3_nvram_read_be32(struct tg3 *tp, u32 offset, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	u32 v = 0;
-	int res = tg3_nvram_read(tp, offset, &v);
-	if (!res)
-		*val = cpu_to_be32(v);
-	return res;
-}
-
-int tg3_get_device_address(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	struct net_device *dev = tp->dev;
-	u32 hi, lo, mac_offset;
-	int addr_ok = 0;
-
-	mac_offset = 0x7c;
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
-	    tg3_flag(tp, 5780_CLASS)) {
-		if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID)
-			mac_offset = 0xcc;
-		if (tg3_nvram_lock(tp))
-			tw32_f(NVRAM_CMD, NVRAM_CMD_RESET);
-		else
-			tg3_nvram_unlock(tp);
-	} else if (tg3_flag(tp, 5717_PLUS)) {
-		if (PCI_FUNC(tp->pdev->busdevfn) & 1)
-			mac_offset = 0xcc;
-		if (PCI_FUNC(tp->pdev->busdevfn) > 1)
-			mac_offset += 0x18c;
-	} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
-		mac_offset = 0x10;
-
-	/* First try to get it from MAC address mailbox. */
-	tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_HIGH_MBOX, &hi);
-	if ((hi >> 16) == 0x484b) {
-		dev->hw_addr[0] = (hi >>  8) & 0xff;
-		dev->hw_addr[1] = (hi >>  0) & 0xff;
-
-		tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_LOW_MBOX, &lo);
-		dev->hw_addr[2] = (lo >> 24) & 0xff;
-		dev->hw_addr[3] = (lo >> 16) & 0xff;
-		dev->hw_addr[4] = (lo >>  8) & 0xff;
-		dev->hw_addr[5] = (lo >>  0) & 0xff;
-
-		/* Some old bootcode may report a 0 MAC address in SRAM */
-		addr_ok = is_valid_ether_addr(&dev->hw_addr[0]);
-	}
-	if (!addr_ok) {
-		/* Next, try NVRAM. */
-		if (!tg3_flag(tp, NO_NVRAM) &&
-		    !tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
-		    !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
-			memcpy(&dev->hw_addr[0], ((char *)&hi) + 2, 2);
-			memcpy(&dev->hw_addr[2], (char *)&lo, sizeof(lo));
-		}
-		/* Finally just fetch it out of the MAC control regs. */
-		else {
-			hi = tr32(MAC_ADDR_0_HIGH);
-			lo = tr32(MAC_ADDR_0_LOW);
-
-			dev->hw_addr[5] = lo & 0xff;
-			dev->hw_addr[4] = (lo >> 8) & 0xff;
-			dev->hw_addr[3] = (lo >> 16) & 0xff;
-			dev->hw_addr[2] = (lo >> 24) & 0xff;
-			dev->hw_addr[1] = hi & 0xff;
-			dev->hw_addr[0] = (hi >> 8) & 0xff;
-		}
-	}
-
-	if (!is_valid_ether_addr(&dev->hw_addr[0])) {
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static void __tg3_set_rx_mode(struct net_device *dev)
-{	DBGP("%s\n", __func__);
-
-	struct tg3 *tp = netdev_priv(dev);
-	u32 rx_mode;
-
-	rx_mode = tp->rx_mode & ~(RX_MODE_PROMISC |
-				  RX_MODE_KEEP_VLAN_TAG);
-
-	rx_mode |= RX_MODE_KEEP_VLAN_TAG;
-
-	/* Accept all multicast. */
-	tw32(MAC_HASH_REG_0, 0xffffffff);
-	tw32(MAC_HASH_REG_1, 0xffffffff);
-	tw32(MAC_HASH_REG_2, 0xffffffff);
-	tw32(MAC_HASH_REG_3, 0xffffffff);
-
-	if (rx_mode != tp->rx_mode) {
-		tp->rx_mode = rx_mode;
-		tw32_f(MAC_RX_MODE, rx_mode);
-		udelay(10);
-	}
-}
-
-static void __tg3_set_coalesce(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-
-	tw32(HOSTCC_RXCOL_TICKS, 0);
-	tw32(HOSTCC_TXCOL_TICKS, LOW_TXCOL_TICKS);
-	tw32(HOSTCC_RXMAX_FRAMES, 1);
-	/* FIXME: mix between TXMAX and RXMAX taken from legacy driver */
-	tw32(HOSTCC_TXMAX_FRAMES, LOW_RXMAX_FRAMES);
-	tw32(HOSTCC_RXCOAL_MAXF_INT, 1);
-	tw32(HOSTCC_TXCOAL_MAXF_INT, 0);
-
-	if (!tg3_flag(tp, 5705_PLUS)) {
-		u32 val = DEFAULT_STAT_COAL_TICKS;
-
-		tw32(HOSTCC_RXCOAL_TICK_INT, DEFAULT_RXCOAL_TICK_INT);
-		tw32(HOSTCC_TXCOAL_TICK_INT, DEFAULT_TXCOAL_TICK_INT);
-
-		if (!netdev_link_ok(tp->dev))
-			val = 0;
-
-		tw32(HOSTCC_STAT_COAL_TICKS, val);
-	}
-}
-
-static void tg3_set_bdinfo(struct tg3 *tp, u32 bdinfo_addr,
-			   dma_addr_t mapping, u32 maxlen_flags,
-			   u32 nic_addr)
-{	DBGP("%s\n", __func__);
-
-	tg3_write_mem(tp,
-		      (bdinfo_addr + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH),
-		      ((u64) mapping >> 32));
-	tg3_write_mem(tp,
-		      (bdinfo_addr + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW),
-		      ((u64) mapping & 0xffffffff));
-	tg3_write_mem(tp,
-		      (bdinfo_addr + TG3_BDINFO_MAXLEN_FLAGS),
-		       maxlen_flags);
-
-	if (!tg3_flag(tp, 5705_PLUS))
-		tg3_write_mem(tp,
-			      (bdinfo_addr + TG3_BDINFO_NIC_ADDR),
-			      nic_addr);
-}
-
-static void tg3_rings_reset(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int i;
-	u32 txrcb, rxrcb, limit;
-
-	/* Disable all transmit rings but the first. */
-	if (!tg3_flag(tp, 5705_PLUS))
-		limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
-	else if (tg3_flag(tp, 5717_PLUS))
-		limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 4;
-	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
-		limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
-	else
-		limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
-
-	for (txrcb = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
-	     txrcb < limit; txrcb += TG3_BDINFO_SIZE)
-		tg3_write_mem(tp, txrcb + TG3_BDINFO_MAXLEN_FLAGS,
-			      BDINFO_FLAGS_DISABLED);
-
-
-	/* Disable all receive return rings but the first. */
-	if (tg3_flag(tp, 5717_PLUS))
-		limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
-	else if (!tg3_flag(tp, 5705_PLUS))
-		limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
-	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-		 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
-		limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
-	else
-		limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
-
-	for (rxrcb = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
-	     rxrcb < limit; rxrcb += TG3_BDINFO_SIZE)
-		tg3_write_mem(tp, rxrcb + TG3_BDINFO_MAXLEN_FLAGS,
-			      BDINFO_FLAGS_DISABLED);
-
-	/* Disable interrupts */
-	tw32_mailbox_f(tp->int_mbox, 1);
-
-	tp->tx_prod = 0;
-	tp->tx_cons = 0;
-	tw32_mailbox(tp->prodmbox, 0);
-	tw32_rx_mbox(tp->consmbox, 0);
-
-	/* Make sure the NIC-based send BD rings are disabled. */
-	if (!tg3_flag(tp, 5705_PLUS)) {
-		u32 mbox = MAILBOX_SNDNIC_PROD_IDX_0 + TG3_64BIT_REG_LOW;
-		for (i = 0; i < 16; i++)
-			tw32_tx_mbox(mbox + i * 8, 0);
-	}
-
-	txrcb = NIC_SRAM_SEND_RCB;
-	rxrcb = NIC_SRAM_RCV_RET_RCB;
-
-	/* Clear status block in ram. */
-	memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
-
-	/* Set status block DMA address */
-	tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH,
-	     ((u64) tp->status_mapping >> 32));
-	tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW,
-	     ((u64) tp->status_mapping & 0xffffffff));
-
-	if (tp->tx_ring) {
-		tg3_set_bdinfo(tp, txrcb, tp->tx_desc_mapping,
-			       (TG3_TX_RING_SIZE <<
-				BDINFO_FLAGS_MAXLEN_SHIFT),
-			       NIC_SRAM_TX_BUFFER_DESC);
-		txrcb += TG3_BDINFO_SIZE;
-	}
-
-	/* FIXME: will TG3_RX_RET_MAX_SIZE_5705 work on all cards? */
-	if (tp->rx_rcb) {
-		tg3_set_bdinfo(tp, rxrcb, tp->rx_rcb_mapping,
-			        TG3_RX_RET_MAX_SIZE_5705 <<
-				BDINFO_FLAGS_MAXLEN_SHIFT, 0);
-		rxrcb += TG3_BDINFO_SIZE;
-	}
-}
-
-static void tg3_setup_rxbd_thresholds(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 val, bdcache_maxcnt;
-
-	if (!tg3_flag(tp, 5750_PLUS) ||
-	    tg3_flag(tp, 5780_CLASS) ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
-		bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5700;
-	else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-		 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
-		bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5755;
-	else
-		bdcache_maxcnt = TG3_SRAM_RX_STD_BDCACHE_SIZE_5906;
-
-
-	/* NOTE: legacy driver uses RX_PENDING / 8, we only use 4 descriptors
-	 * for now, use / 4 so the result is > 0
-	 */
-	val = TG3_DEF_RX_RING_PENDING / 4;
-	tw32(RCVBDI_STD_THRESH, val);
-
-	if (tg3_flag(tp, 57765_PLUS))
-		tw32(STD_REPLENISH_LWM, bdcache_maxcnt);
-}
-
-static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
-{	DBGP("%s\n", __func__);
-
-	u32 val, rdmac_mode;
-	int i, err, limit;
-	struct tg3_rx_prodring_set *tpr = &tp->prodring;
-
-	tg3_stop_fw(tp);
-
-	tg3_write_sig_pre_reset(tp);
-
-	if (tg3_flag(tp, INIT_COMPLETE))
-		tg3_abort_hw(tp);
-
-	if (reset_phy)
-		tg3_phy_reset(tp);
-
-	err = tg3_chip_reset(tp);
-	if (err)
-		return err;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) {
-		val = tr32(PCIE_PWR_MGMT_THRESH) & ~PCIE_PWR_MGMT_L1_THRESH_MSK;
-		val |= PCIE_PWR_MGMT_EXT_ASPM_TMR_EN |
-		       PCIE_PWR_MGMT_L1_THRESH_4MS;
-		tw32(PCIE_PWR_MGMT_THRESH, val);
-
-		val = tr32(TG3_PCIE_EIDLE_DELAY) & ~TG3_PCIE_EIDLE_DELAY_MASK;
-		tw32(TG3_PCIE_EIDLE_DELAY, val | TG3_PCIE_EIDLE_DELAY_13_CLKS);
-
-		tw32(TG3_CORR_ERR_STAT, TG3_CORR_ERR_STAT_CLEAR);
-
-		val = tr32(TG3_PCIE_LNKCTL) & ~TG3_PCIE_LNKCTL_L1_PLL_PD_EN;
-		tw32(TG3_PCIE_LNKCTL, val | TG3_PCIE_LNKCTL_L1_PLL_PD_DIS);
-	}
-
-	if (tg3_flag(tp, L1PLLPD_EN)) {
-		u32 grc_mode = tr32(GRC_MODE);
-
-		/* Access the lower 1K of PL PCIE block registers. */
-		val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
-		tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL);
-
-		val = tr32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1);
-		tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL1,
-		     val | TG3_PCIE_PL_LO_PHYCTL1_L1PLLPD_EN);
-
-		tw32(GRC_MODE, grc_mode);
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
-		if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0) {
-			u32 grc_mode = tr32(GRC_MODE);
-
-			/* Access the lower 1K of PL PCIE block registers. */
-			val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
-			tw32(GRC_MODE, val | GRC_MODE_PCIE_PL_SEL);
-
-			val = tr32(TG3_PCIE_TLDLPL_PORT +
-				   TG3_PCIE_PL_LO_PHYCTL5);
-			tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_PL_LO_PHYCTL5,
-			     val | TG3_PCIE_PL_LO_PHYCTL5_DIS_L2CLKREQ);
-
-			tw32(GRC_MODE, grc_mode);
-		}
-
-		if (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_57765_AX) {
-			u32 grc_mode = tr32(GRC_MODE);
-
-			/* Access the lower 1K of DL PCIE block registers. */
-			val = grc_mode & ~GRC_MODE_PCIE_PORT_MASK;
-			tw32(GRC_MODE, val | GRC_MODE_PCIE_DL_SEL);
-
-			val = tr32(TG3_PCIE_TLDLPL_PORT +
-				   TG3_PCIE_DL_LO_FTSMAX);
-			val &= ~TG3_PCIE_DL_LO_FTSMAX_MSK;
-			tw32(TG3_PCIE_TLDLPL_PORT + TG3_PCIE_DL_LO_FTSMAX,
-			     val | TG3_PCIE_DL_LO_FTSMAX_VAL);
-
-			tw32(GRC_MODE, grc_mode);
-		}
-
-		val = tr32(TG3_CPMU_LSPD_10MB_CLK);
-		val &= ~CPMU_LSPD_10MB_MACCLK_MASK;
-		val |= CPMU_LSPD_10MB_MACCLK_6_25;
-		tw32(TG3_CPMU_LSPD_10MB_CLK, val);
-	}
-
-	/* This works around an issue with Athlon chipsets on
-	 * B3 tigon3 silicon.  This bit has no effect on any
-	 * other revision.  But do not set this on PCI Express
-	 * chips and don't even touch the clocks if the CPMU is present.
-	 */
-	if (!tg3_flag(tp, CPMU_PRESENT)) {
-		if (!tg3_flag(tp, PCI_EXPRESS))
-			tp->pci_clock_ctrl |= CLOCK_CTRL_DELAY_PCI_GRANT;
-		tw32_f(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
-	}
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
-	    tg3_flag(tp, PCIX_MODE)) {
-		val = tr32(TG3PCI_PCISTATE);
-		val |= PCISTATE_RETRY_SAME_DMA;
-		tw32(TG3PCI_PCISTATE, val);
-	}
-
-	if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5704_BX) {
-		/* Enable some hw fixes.  */
-		val = tr32(TG3PCI_MSI_DATA);
-		val |= (1 << 26) | (1 << 28) | (1 << 29);
-		tw32(TG3PCI_MSI_DATA, val);
-	}
-
-	/* Descriptor ring init may make accesses to the
-	 * NIC SRAM area to setup the TX descriptors, so we
-	 * can only do this after the hardware has been
-	 * successfully reset.
-	 */
-	err = tg3_init_rings(tp);
-	if (err)
-		return err;
-
-	if (tg3_flag(tp, 57765_PLUS)) {
-		val = tr32(TG3PCI_DMA_RW_CTRL) &
-		      ~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
-		if (tp->pci_chip_rev_id == CHIPREV_ID_57765_A0)
-			val &= ~DMA_RWCTRL_CRDRDR_RDMA_MRRS_MSK;
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
-		    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717)
-			val |= DMA_RWCTRL_TAGGED_STAT_WA;
-		tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
-	} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 &&
-		   GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5761) {
-		/* This value is determined during the probe time DMA
-		 * engine test, tg3_test_dma.
-		 */
-		tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
-	}
-
-	tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS |
-			  GRC_MODE_4X_NIC_SEND_RINGS |
-			  GRC_MODE_NO_TX_PHDR_CSUM |
-			  GRC_MODE_NO_RX_PHDR_CSUM);
-	tp->grc_mode |= GRC_MODE_HOST_SENDBDS;
-	tp->grc_mode |= GRC_MODE_NO_RX_PHDR_CSUM;
-
-	/* Pseudo-header checksum is done by hardware logic and not
-	 * the offload processers, so make the chip do the pseudo-
-	 * header checksums on receive.  For transmit it is more
-	 * convenient to do the pseudo-header checksum in software
-	 * as Linux does that on transmit for us in all cases.
-	 */
-	tp->grc_mode |= GRC_MODE_NO_TX_PHDR_CSUM;
-
-	tw32(GRC_MODE,
-	     tp->grc_mode |
-	     (GRC_MODE_IRQ_ON_MAC_ATTN | GRC_MODE_HOST_STACKUP));
-
-	/* Setup the timer prescalar register.  Clock is always 66Mhz. */
-	val = tr32(GRC_MISC_CFG);
-	val &= ~0xff;
-	val |= (65 << GRC_MISC_CFG_PRESCALAR_SHIFT);
-	tw32(GRC_MISC_CFG, val);
-
-	/* Initialize MBUF/DESC pool. */
-	if (tg3_flag(tp, 5750_PLUS)) {
-		/* Do nothing.  */
-	} else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
-		tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE);
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)
-			tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE64);
-		else
-			tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE96);
-		tw32(BUFMGR_DMA_DESC_POOL_ADDR, NIC_SRAM_DMA_DESC_POOL_BASE);
-		tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE);
-	}
-
-	tw32(BUFMGR_MB_RDMA_LOW_WATER,
-	     tp->bufmgr_config.mbuf_read_dma_low_water);
-	tw32(BUFMGR_MB_MACRX_LOW_WATER,
-	     tp->bufmgr_config.mbuf_mac_rx_low_water);
-	tw32(BUFMGR_MB_HIGH_WATER,
-	     tp->bufmgr_config.mbuf_high_water);
-
-	tw32(BUFMGR_DMA_LOW_WATER,
-	     tp->bufmgr_config.dma_low_water);
-	tw32(BUFMGR_DMA_HIGH_WATER,
-	     tp->bufmgr_config.dma_high_water);
-
-	val = BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE;
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
-		val |= BUFMGR_MODE_NO_TX_UNDERRUN;
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
-	    tp->pci_chip_rev_id == CHIPREV_ID_5719_A0 ||
-	    tp->pci_chip_rev_id == CHIPREV_ID_5720_A0)
-		val |= BUFMGR_MODE_MBLOW_ATTN_ENAB;
-	tw32(BUFMGR_MODE, val);
-	for (i = 0; i < 2000; i++) {
-		if (tr32(BUFMGR_MODE) & BUFMGR_MODE_ENABLE)
-			break;
-		udelay(10);
-	}
-	if (i >= 2000) {
-		DBGC(tp->dev, "%s cannot enable BUFMGR\n", __func__);
-		return -ENODEV;
-	}
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5906_A1)
-		tw32(ISO_PKT_TX, (tr32(ISO_PKT_TX) & ~0x3) | 0x2);
-
-	tg3_setup_rxbd_thresholds(tp);
-
-	/* Initialize TG3_BDINFO's at:
-	 *  RCVDBDI_STD_BD:	standard eth size rx ring
-	 *  RCVDBDI_JUMBO_BD:	jumbo frame rx ring
-	 *  RCVDBDI_MINI_BD:	small frame rx ring (??? does not work)
-	 *
-	 * like so:
-	 *  TG3_BDINFO_HOST_ADDR:	high/low parts of DMA address of ring
-	 *  TG3_BDINFO_MAXLEN_FLAGS:	(rx max buffer size << 16) |
-	 *                              ring attribute flags
-	 *  TG3_BDINFO_NIC_ADDR:	location of descriptors in nic SRAM
-	 *
-	 * Standard receive ring @ NIC_SRAM_RX_BUFFER_DESC, 512 entries.
-	 * Jumbo receive ring @ NIC_SRAM_RX_JUMBO_BUFFER_DESC, 256 entries.
-	 *
-	 * The size of each ring is fixed in the firmware, but the location is
-	 * configurable.
-	 */
-	tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH,
-	     ((u64) tpr->rx_std_mapping >> 32));
-	tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
-	     ((u64) tpr->rx_std_mapping & 0xffffffff));
-	if (!tg3_flag(tp, 5717_PLUS))
-		tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
-		     NIC_SRAM_RX_BUFFER_DESC);
-
-	/* Disable the mini ring */
-	if (!tg3_flag(tp, 5705_PLUS))
-		tw32(RCVDBDI_MINI_BD + TG3_BDINFO_MAXLEN_FLAGS,
-		     BDINFO_FLAGS_DISABLED);
-
-	val = TG3_RX_STD_MAX_SIZE_5700 << BDINFO_FLAGS_MAXLEN_SHIFT;
-
-	if (tg3_flag(tp, 57765_PLUS))
-		val |= (RX_STD_MAX_SIZE << 2);
-
-	tw32(RCVDBDI_STD_BD + TG3_BDINFO_MAXLEN_FLAGS, val);
-
-	tpr->rx_std_prod_idx = 0;
-
-	/* std prod index is updated by tg3_refill_prod_ring() */
-	tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, 0);
-	tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, 0);
-
-	tg3_rings_reset(tp);
-
-	__tg3_set_mac_addr(tp,0);
-
-#define	TG3_MAX_MTU	1522
-	/* MTU + ethernet header + FCS + optional VLAN tag */
-	tw32(MAC_RX_MTU_SIZE, TG3_MAX_MTU);
-
-	/* The slot time is changed by tg3_setup_phy if we
-	 * run at gigabit with half duplex.
-	 */
-	val = (2 << TX_LENGTHS_IPG_CRS_SHIFT) |
-	      (6 << TX_LENGTHS_IPG_SHIFT) |
-	      (32 << TX_LENGTHS_SLOT_TIME_SHIFT);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
-		val |= tr32(MAC_TX_LENGTHS) &
-		       (TX_LENGTHS_JMB_FRM_LEN_MSK |
-			TX_LENGTHS_CNT_DWN_VAL_MSK);
-
-	tw32(MAC_TX_LENGTHS, val);
-
-	/* Receive rules. */
-	tw32(MAC_RCV_RULE_CFG, RCV_RULE_CFG_DEFAULT_CLASS);
-	tw32(RCVLPC_CONFIG, 0x0181);
-
-	/* Calculate RDMAC_MODE setting early, we need it to determine
-	 * the RCVLPC_STATE_ENABLE mask.
-	 */
-	rdmac_mode = (RDMAC_MODE_ENABLE | RDMAC_MODE_TGTABORT_ENAB |
-		      RDMAC_MODE_MSTABORT_ENAB | RDMAC_MODE_PARITYERR_ENAB |
-		      RDMAC_MODE_ADDROFLOW_ENAB | RDMAC_MODE_FIFOOFLOW_ENAB |
-		      RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
-		      RDMAC_MODE_LNGREAD_ENAB);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
-		rdmac_mode |= RDMAC_MODE_MULT_DMA_RD_DIS;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780)
-		rdmac_mode |= RDMAC_MODE_BD_SBD_CRPT_ENAB |
-			      RDMAC_MODE_MBUF_RBD_CRPT_ENAB |
-			      RDMAC_MODE_MBUF_SBD_CRPT_ENAB;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
-	    tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) {
-		if (tg3_flag(tp, TSO_CAPABLE) &&
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
-			rdmac_mode |= RDMAC_MODE_FIFO_SIZE_128;
-		} else if (!(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH) &&
-			   !tg3_flag(tp, IS_5788)) {
-			rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
-		}
-	}
-
-	if (tg3_flag(tp, PCI_EXPRESS))
-		rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
-		rdmac_mode |= tr32(RDMAC_MODE) & RDMAC_MODE_H2BNC_VLAN_DET;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
-	    tg3_flag(tp, 57765_PLUS)) {
-		val = tr32(TG3_RDMA_RSRVCTRL_REG);
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
-		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
-			val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK |
-				 TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK |
-				 TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK);
-			val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B |
-			       TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K |
-			       TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K;
-		}
-		tw32(TG3_RDMA_RSRVCTRL_REG,
-		     val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
-		val = tr32(TG3_LSO_RD_DMA_CRPTEN_CTRL);
-		tw32(TG3_LSO_RD_DMA_CRPTEN_CTRL, val |
-		     TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_BD_4K |
-		     TG3_LSO_RD_DMA_CRPTEN_CTRL_BLEN_LSO_4K);
-	}
-
-	/* Receive/send statistics. */
-	if (tg3_flag(tp, 5750_PLUS)) {
-		val = tr32(RCVLPC_STATS_ENABLE);
-		val &= ~RCVLPC_STATSENAB_DACK_FIX;
-		tw32(RCVLPC_STATS_ENABLE, val);
-	} else if ((rdmac_mode & RDMAC_MODE_FIFO_SIZE_128) &&
-		   tg3_flag(tp, TSO_CAPABLE)) {
-		val = tr32(RCVLPC_STATS_ENABLE);
-		val &= ~RCVLPC_STATSENAB_LNGBRST_RFIX;
-		tw32(RCVLPC_STATS_ENABLE, val);
-	} else {
-		tw32(RCVLPC_STATS_ENABLE, 0xffffff);
-	}
-	tw32(RCVLPC_STATSCTRL, RCVLPC_STATSCTRL_ENABLE);
-	tw32(SNDDATAI_STATSENAB, 0xffffff);
-	tw32(SNDDATAI_STATSCTRL,
-	     (SNDDATAI_SCTRL_ENABLE |
-	      SNDDATAI_SCTRL_FASTUPD));
-
-	/* Setup host coalescing engine. */
-	tw32(HOSTCC_MODE, 0);
-	for (i = 0; i < 2000; i++) {
-		if (!(tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE))
-			break;
-		udelay(10);
-	}
-
-	__tg3_set_coalesce(tp);
-
-	if (!tg3_flag(tp, 5705_PLUS)) {
-		/* Status/statistics block address.  See tg3_timer,
-		 * the tg3_periodic_fetch_stats call there, and
-		 * tg3_get_stats to see how this works for 5705/5750 chips.
-		 * NOTE: stats block removed for iPXE
-		 */
-		tw32(HOSTCC_STATUS_BLK_NIC_ADDR, NIC_SRAM_STATUS_BLK);
-
-		/* Clear statistics and status block memory areas */
-		for (i = NIC_SRAM_STATS_BLK;
-		     i < NIC_SRAM_STATUS_BLK + TG3_HW_STATUS_SIZE;
-		     i += sizeof(u32)) {
-			tg3_write_mem(tp, i, 0);
-			udelay(40);
-		}
-	}
-
-	tw32(HOSTCC_MODE, HOSTCC_MODE_ENABLE | tp->coalesce_mode);
-
-	tw32(RCVCC_MODE, RCVCC_MODE_ENABLE | RCVCC_MODE_ATTN_ENABLE);
-	tw32(RCVLPC_MODE, RCVLPC_MODE_ENABLE);
-	if (!tg3_flag(tp, 5705_PLUS))
-		tw32(RCVLSC_MODE, RCVLSC_MODE_ENABLE | RCVLSC_MODE_ATTN_ENABLE);
-
-	if (tp->phy_flags & TG3_PHYFLG_MII_SERDES) {
-		tp->phy_flags &= ~TG3_PHYFLG_PARALLEL_DETECT;
-		/* reset to prevent losing 1st rx packet intermittently */
-		tw32_f(MAC_RX_MODE, RX_MODE_RESET);
-		udelay(10);
-	}
-
-	if (tg3_flag(tp, ENABLE_APE))
-		tp->mac_mode = MAC_MODE_APE_TX_EN | MAC_MODE_APE_RX_EN;
-	else
-		tp->mac_mode = 0;
-	tp->mac_mode |= MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
-		MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE;
-	if (!tg3_flag(tp, 5705_PLUS) &&
-	    !(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700)
-		tp->mac_mode |= MAC_MODE_LINK_POLARITY;
-	tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
-	udelay(40);
-
-	/* tp->grc_local_ctrl is partially set up during tg3_get_invariants().
-	 * If TG3_FLAG_IS_NIC is zero, we should read the
-	 * register to preserve the GPIO settings for LOMs. The GPIOs,
-	 * whether used as inputs or outputs, are set by boot code after
-	 * reset.
-	 */
-	if (!tg3_flag(tp, IS_NIC)) {
-		u32 gpio_mask;
-
-		gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE1 |
-			    GRC_LCLCTRL_GPIO_OE2 | GRC_LCLCTRL_GPIO_OUTPUT0 |
-			    GRC_LCLCTRL_GPIO_OUTPUT1 | GRC_LCLCTRL_GPIO_OUTPUT2;
-
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
-			gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
-				     GRC_LCLCTRL_GPIO_OUTPUT3;
-
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
-			gpio_mask |= GRC_LCLCTRL_GPIO_UART_SEL;
-
-		tp->grc_local_ctrl &= ~gpio_mask;
-		tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
-
-		/* GPIO1 must be driven high for eeprom write protect */
-		if (tg3_flag(tp, EEPROM_WRITE_PROT))
-			tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
-					       GRC_LCLCTRL_GPIO_OUTPUT1);
-	}
-	tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
-	udelay(100);
-
-	if (!tg3_flag(tp, 5705_PLUS)) {
-		tw32_f(DMAC_MODE, DMAC_MODE_ENABLE);
-		udelay(40);
-	}
-
-	val = (WDMAC_MODE_ENABLE | WDMAC_MODE_TGTABORT_ENAB |
-	       WDMAC_MODE_MSTABORT_ENAB | WDMAC_MODE_PARITYERR_ENAB |
-	       WDMAC_MODE_ADDROFLOW_ENAB | WDMAC_MODE_FIFOOFLOW_ENAB |
-	       WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB |
-	       WDMAC_MODE_LNGREAD_ENAB);
-
-	/* Enable host coalescing bug fix */
-	if (tg3_flag(tp, 5755_PLUS))
-		val |= WDMAC_MODE_STATUS_TAG_FIX;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785)
-		val |= WDMAC_MODE_BURST_ALL_DATA;
-
-	tw32_f(WDMAC_MODE, val);
-	udelay(40);
-
-	if (tg3_flag(tp, PCIX_MODE)) {
-		u16 pcix_cmd;
-
-		pci_read_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
-				     &pcix_cmd);
-		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) {
-			pcix_cmd &= ~PCI_X_CMD_MAX_READ;
-			pcix_cmd |= PCI_X_CMD_READ_2K;
-		} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
-			pcix_cmd &= ~(PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ);
-			pcix_cmd |= PCI_X_CMD_READ_2K;
-		}
-		pci_write_config_word(tp->pdev, tp->pcix_cap + PCI_X_CMD,
-				      pcix_cmd);
-	}
-
-	tw32_f(RDMAC_MODE, rdmac_mode);
-	udelay(40);
-
-	tw32(RCVDCC_MODE, RCVDCC_MODE_ENABLE | RCVDCC_MODE_ATTN_ENABLE);
-	if (!tg3_flag(tp, 5705_PLUS))
-		tw32(MBFREE_MODE, MBFREE_MODE_ENABLE);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761)
-		tw32(SNDDATAC_MODE,
-		     SNDDATAC_MODE_ENABLE | SNDDATAC_MODE_CDELAY);
-	else
-		tw32(SNDDATAC_MODE, SNDDATAC_MODE_ENABLE);
-
-	tw32(SNDBDC_MODE, SNDBDC_MODE_ENABLE | SNDBDC_MODE_ATTN_ENABLE);
-	tw32(RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB);
-	val = RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ;
-	if (tg3_flag(tp, LRG_PROD_RING_CAP))
-		val |= RCVDBDI_MODE_LRG_RING_SZ;
-	tw32(RCVDBDI_MODE, val);
-	tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE);
-
-	val = SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE;
-	if (tg3_flag(tp, ENABLE_TSS))
-		val |= SNDBDI_MODE_MULTI_TXQ_EN;
-	tw32(SNDBDI_MODE, val);
-	tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE);
-
-
-	/* FIXME: 5701 firmware fix? */
-#if 0
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0) {
-		err = tg3_load_5701_a0_firmware_fix(tp);
-		if (err)
-			return err;
-	}
-#endif
-
-	tp->tx_mode = TX_MODE_ENABLE;
-
-	if (tg3_flag(tp, 5755_PLUS) ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
-		tp->tx_mode |= TX_MODE_MBUF_LOCKUP_FIX;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720) {
-		val = TX_MODE_JMB_FRM_LEN | TX_MODE_CNT_DN_MODE;
-		tp->tx_mode &= ~val;
-		tp->tx_mode |= tr32(MAC_TX_MODE) & val;
-	}
-
-	tw32_f(MAC_TX_MODE, tp->tx_mode);
-	udelay(100);
-
-	tp->rx_mode = RX_MODE_ENABLE;
-
-	tw32_f(MAC_RX_MODE, tp->rx_mode);
-	udelay(10);
-
-	tw32(MAC_LED_CTRL, tp->led_ctrl);
-
-	tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB);
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
-		tw32_f(MAC_RX_MODE, RX_MODE_RESET);
-		udelay(10);
-	}
-	tw32_f(MAC_RX_MODE, tp->rx_mode);
-	udelay(10);
-
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) {
-		if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) &&
-			!(tp->phy_flags & TG3_PHYFLG_SERDES_PREEMPHASIS)) {
-			/* Set drive transmission level to 1.2V  */
-			/* only if the signal pre-emphasis bit is not set  */
-			val = tr32(MAC_SERDES_CFG);
-			val &= 0xfffff000;
-			val |= 0x880;
-			tw32(MAC_SERDES_CFG, val);
-		}
-		if (tp->pci_chip_rev_id == CHIPREV_ID_5703_A1)
-			tw32(MAC_SERDES_CFG, 0x616000);
-	}
-
-	/* Prevent chip from dropping frames when flow control
-	 * is enabled.
-	 */
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
-		val = 1;
-	else
-		val = 2;
-	tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
-	    (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)) {
-		/* Use hardware link auto-negotiation */
-		tg3_flag_set(tp, HW_AUTONEG);
-	}
-
-	if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) &&
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) {
-		u32 tmp;
-
-		tmp = tr32(SERDES_RX_CTRL);
-		tw32(SERDES_RX_CTRL, tmp | SERDES_RX_SIG_DETECT);
-		tp->grc_local_ctrl &= ~GRC_LCLCTRL_USE_EXT_SIG_DETECT;
-		tp->grc_local_ctrl |= GRC_LCLCTRL_USE_SIG_DETECT;
-		tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
-	}
-
-	err = tg3_setup_phy(tp, 0);
-	if (err)
-		return err;
-
-	if (!(tp->phy_flags & TG3_PHYFLG_PHY_SERDES) &&
-	    !(tp->phy_flags & TG3_PHYFLG_IS_FET)) {
-		u32 tmp;
-
-		/* Clear CRC stats. */
-		if (!tg3_readphy(tp, MII_TG3_TEST1, &tmp)) {
-			tg3_writephy(tp, MII_TG3_TEST1,
-				     tmp | MII_TG3_TEST1_CRC_EN);
-			tg3_readphy(tp, MII_TG3_RXR_COUNTERS, &tmp);
-		}
-	}
-
-	__tg3_set_rx_mode(tp->dev);
-
-	/* Initialize receive rules. */
-	tw32(MAC_RCV_RULE_0,  0xc2000000 & RCV_RULE_DISABLE_MASK);
-	tw32(MAC_RCV_VALUE_0, 0xffffffff & RCV_RULE_DISABLE_MASK);
-	tw32(MAC_RCV_RULE_1,  0x86000004 & RCV_RULE_DISABLE_MASK);
-	tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK);
-
-	if (tg3_flag(tp, 5705_PLUS) && !tg3_flag(tp, 5780_CLASS))
-		limit = 8;
-	else
-		limit = 16;
-	if (tg3_flag(tp, ENABLE_ASF))
-		limit -= 4;
-	switch (limit) {
-	case 16:
-		tw32(MAC_RCV_RULE_15,  0); tw32(MAC_RCV_VALUE_15,  0);
-	case 15:
-		tw32(MAC_RCV_RULE_14,  0); tw32(MAC_RCV_VALUE_14,  0);
-	case 14:
-		tw32(MAC_RCV_RULE_13,  0); tw32(MAC_RCV_VALUE_13,  0);
-	case 13:
-		tw32(MAC_RCV_RULE_12,  0); tw32(MAC_RCV_VALUE_12,  0);
-	case 12:
-		tw32(MAC_RCV_RULE_11,  0); tw32(MAC_RCV_VALUE_11,  0);
-	case 11:
-		tw32(MAC_RCV_RULE_10,  0); tw32(MAC_RCV_VALUE_10,  0);
-	case 10:
-		tw32(MAC_RCV_RULE_9,  0); tw32(MAC_RCV_VALUE_9,  0);
-	case 9:
-		tw32(MAC_RCV_RULE_8,  0); tw32(MAC_RCV_VALUE_8,  0);
-	case 8:
-		tw32(MAC_RCV_RULE_7,  0); tw32(MAC_RCV_VALUE_7,  0);
-	case 7:
-		tw32(MAC_RCV_RULE_6,  0); tw32(MAC_RCV_VALUE_6,  0);
-	case 6:
-		tw32(MAC_RCV_RULE_5,  0); tw32(MAC_RCV_VALUE_5,  0);
-	case 5:
-		tw32(MAC_RCV_RULE_4,  0); tw32(MAC_RCV_VALUE_4,  0);
-	case 4:
-		/* tw32(MAC_RCV_RULE_3,  0); tw32(MAC_RCV_VALUE_3,  0); */
-	case 3:
-		/* tw32(MAC_RCV_RULE_2,  0); tw32(MAC_RCV_VALUE_2,  0); */
-	case 2:
-	case 1:
-
-	default:
-		break;
-	}
-
-	return 0;
-}
-
-/* Called at device open time to get the chip ready for
- * packet processing.  Invoked with tp->lock held.
- */
-int tg3_init_hw(struct tg3 *tp, int reset_phy)
-{	DBGP("%s\n", __func__);
-
-	tg3_switch_clocks(tp);
-
-	tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
-
-	return tg3_reset_hw(tp, reset_phy);
-}
-
-void tg3_set_txd(struct tg3 *tp, int entry,
-			dma_addr_t mapping, int len, u32 flags)
-{	DBGP("%s\n", __func__);
-
-	struct tg3_tx_buffer_desc *txd = &tp->tx_ring[entry];
-
-	txd->addr_hi = ((u64) mapping >> 32);
-	txd->addr_lo = ((u64) mapping & 0xffffffff);
-	txd->len_flags = (len << TXD_LEN_SHIFT) | flags;
-	txd->vlan_tag = 0;
-}
-
-int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device)
-{	DBGP("%s\n", __func__);
-
-	struct tg3_internal_buffer_desc test_desc;
-	u32 sram_dma_descs;
-	int ret;
-	unsigned int i;
-
-	sram_dma_descs = NIC_SRAM_DMA_DESC_POOL_BASE;
-
-	tw32(FTQ_RCVBD_COMP_FIFO_ENQDEQ, 0);
-	tw32(FTQ_RCVDATA_COMP_FIFO_ENQDEQ, 0);
-	tw32(RDMAC_STATUS, 0);
-	tw32(WDMAC_STATUS, 0);
-
-	tw32(BUFMGR_MODE, 0);
-	tw32(FTQ_RESET, 0);
-
-	test_desc.addr_hi = ((u64) buf_dma) >> 32;
-	test_desc.addr_lo = buf_dma & 0xffffffff;
-	test_desc.nic_mbuf = 0x00002100;
-	test_desc.len = size;
-
-	/*
-	 * HP ZX1 was seeing test failures for 5701 cards running at 33Mhz
-	 * the *second* time the tg3 driver was getting loaded after an
-	 * initial scan.
-	 *
-	 * Broadcom tells me:
-	 *   ...the DMA engine is connected to the GRC block and a DMA
-	 *   reset may affect the GRC block in some unpredictable way...
-	 *   The behavior of resets to individual blocks has not been tested.
-	 *
-	 * Broadcom noted the GRC reset will also reset all sub-components.
-	 */
-	if (to_device) {
-		test_desc.cqid_sqid = (13 << 8) | 2;
-
-		tw32_f(RDMAC_MODE, RDMAC_MODE_ENABLE);
-		udelay(40);
-	} else {
-		test_desc.cqid_sqid = (16 << 8) | 7;
-
-		tw32_f(WDMAC_MODE, WDMAC_MODE_ENABLE);
-		udelay(40);
-	}
-	test_desc.flags = 0x00000005;
-
-	for (i = 0; i < (sizeof(test_desc) / sizeof(u32)); i++) {
-		u32 val;
-
-		val = *(((u32 *)&test_desc) + i);
-		pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR,
-				       sram_dma_descs + (i * sizeof(u32)));
-		pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val);
-	}
-	pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
-
-	if (to_device)
-		tw32(FTQ_DMA_HIGH_READ_FIFO_ENQDEQ, sram_dma_descs);
-	else
-		tw32(FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ, sram_dma_descs);
-
-	ret = -ENODEV;
-	for (i = 0; i < 40; i++) {
-		u32 val;
-
-		if (to_device)
-			val = tr32(FTQ_RCVBD_COMP_FIFO_ENQDEQ);
-		else
-			val = tr32(FTQ_RCVDATA_COMP_FIFO_ENQDEQ);
-		if ((val & 0xffff) == sram_dma_descs) {
-			ret = 0;
-			break;
-		}
-
-		udelay(100);
-	}
-
-	return ret;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3_phy.c ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3_phy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3/tg3_phy.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3/tg3_phy.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1603 +0,0 @@
-
-#include <mii.h>
-#include <stdio.h>
-#include <errno.h>
-#include <unistd.h>
-#include <byteswap.h>
-#include <ipxe/pci.h>
-
-#include "tg3.h"
-
-static void tg3_link_report(struct tg3 *tp);
-
-void tg3_mdio_init(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tg3_flag(tp, 5717_PLUS)) {
-		u32 is_serdes;
-
-		tp->phy_addr = PCI_FUNC(tp->pdev->busdevfn) + 1;
-
-		if (tp->pci_chip_rev_id != CHIPREV_ID_5717_A0)
-			is_serdes = tr32(SG_DIG_STATUS) & SG_DIG_IS_SERDES;
-		else
-			is_serdes = tr32(TG3_CPMU_PHY_STRAP) &
-				    TG3_CPMU_PHY_STRAP_IS_SERDES;
-		if (is_serdes)
-			tp->phy_addr += 7;
-	} else
-		tp->phy_addr = TG3_PHY_MII_ADDR;
-}
-
-static int tg3_issue_otp_command(struct tg3 *tp, u32 cmd)
-{	DBGP("%s\n", __func__);
-
-	int i;
-	u32 val;
-
-	tw32(OTP_CTRL, cmd | OTP_CTRL_OTP_CMD_START);
-	tw32(OTP_CTRL, cmd);
-
-	/* Wait for up to 1 ms for command to execute. */
-	for (i = 0; i < 100; i++) {
-		val = tr32(OTP_STATUS);
-		if (val & OTP_STATUS_CMD_DONE)
-			break;
-		udelay(10);
-	}
-
-	return (val & OTP_STATUS_CMD_DONE) ? 0 : -EBUSY;
-}
-
-/* Read the gphy configuration from the OTP region of the chip.  The gphy
- * configuration is a 32-bit value that straddles the alignment boundary.
- * We do two 32-bit reads and then shift and merge the results.
- */
-u32 tg3_read_otp_phycfg(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 bhalf_otp, thalf_otp;
-
-	tw32(OTP_MODE, OTP_MODE_OTP_THRU_GRC);
-
-	if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_INIT))
-		return 0;
-
-	tw32(OTP_ADDRESS, OTP_ADDRESS_MAGIC1);
-
-	if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_READ))
-		return 0;
-
-	thalf_otp = tr32(OTP_READ_DATA);
-
-	tw32(OTP_ADDRESS, OTP_ADDRESS_MAGIC2);
-
-	if (tg3_issue_otp_command(tp, OTP_CTRL_OTP_CMD_READ))
-		return 0;
-
-	bhalf_otp = tr32(OTP_READ_DATA);
-
-	return ((thalf_otp & 0x0000ffff) << 16) | (bhalf_otp >> 16);
-}
-
-#define PHY_BUSY_LOOPS	5000
-
-int tg3_readphy(struct tg3 *tp, int reg, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	u32 frame_val;
-	unsigned int loops;
-	int ret;
-
-	if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
-		tw32_f(MAC_MI_MODE,
-		     (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL));
-		udelay(80);
-	}
-
-	*val = 0x0;
-
-	frame_val  = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) &
-		      MI_COM_PHY_ADDR_MASK);
-	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
-		      MI_COM_REG_ADDR_MASK);
-	frame_val |= (MI_COM_CMD_READ | MI_COM_START);
-
-	tw32_f(MAC_MI_COM, frame_val);
-
-	loops = PHY_BUSY_LOOPS;
-	while (loops != 0) {
-		udelay(10);
-		frame_val = tr32(MAC_MI_COM);
-
-		if ((frame_val & MI_COM_BUSY) == 0) {
-			udelay(5);
-			frame_val = tr32(MAC_MI_COM);
-			break;
-		}
-		loops -= 1;
-	}
-
-	ret = -EBUSY;
-	if (loops != 0) {
-		*val = frame_val & MI_COM_DATA_MASK;
-		ret = 0;
-	}
-
-	if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
-		tw32_f(MAC_MI_MODE, tp->mi_mode);
-		udelay(80);
-	}
-
-	return ret;
-}
-
-struct subsys_tbl_ent {
-	u16 subsys_vendor, subsys_devid;
-	u32 phy_id;
-};
-
-static struct subsys_tbl_ent subsys_id_to_phy_id[] = {
-	/* Broadcom boards. */
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95700A6, TG3_PHY_ID_BCM5401 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701A5, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95700T6, TG3_PHY_ID_BCM8002 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95700A9, 0 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701T1, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701T8, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701A7, 0 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701A10, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95701A12, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX1, TG3_PHY_ID_BCM5703 },
-	{ TG3PCI_SUBVENDOR_ID_BROADCOM,
-	  TG3PCI_SUBDEVICE_ID_BROADCOM_95703AX2, TG3_PHY_ID_BCM5703 },
-
-	/* 3com boards. */
-	{ TG3PCI_SUBVENDOR_ID_3COM,
-	  TG3PCI_SUBDEVICE_ID_3COM_3C996T, TG3_PHY_ID_BCM5401 },
-	{ TG3PCI_SUBVENDOR_ID_3COM,
-	  TG3PCI_SUBDEVICE_ID_3COM_3C996BT, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_3COM,
-	  TG3PCI_SUBDEVICE_ID_3COM_3C996SX, 0 },
-	{ TG3PCI_SUBVENDOR_ID_3COM,
-	  TG3PCI_SUBDEVICE_ID_3COM_3C1000T, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_3COM,
-	  TG3PCI_SUBDEVICE_ID_3COM_3C940BR01, TG3_PHY_ID_BCM5701 },
-
-	/* DELL boards. */
-	{ TG3PCI_SUBVENDOR_ID_DELL,
-	  TG3PCI_SUBDEVICE_ID_DELL_VIPER, TG3_PHY_ID_BCM5401 },
-	{ TG3PCI_SUBVENDOR_ID_DELL,
-	  TG3PCI_SUBDEVICE_ID_DELL_JAGUAR, TG3_PHY_ID_BCM5401 },
-	{ TG3PCI_SUBVENDOR_ID_DELL,
-	  TG3PCI_SUBDEVICE_ID_DELL_MERLOT, TG3_PHY_ID_BCM5411 },
-	{ TG3PCI_SUBVENDOR_ID_DELL,
-	  TG3PCI_SUBDEVICE_ID_DELL_SLIM_MERLOT, TG3_PHY_ID_BCM5411 },
-
-	/* Compaq boards. */
-	{ TG3PCI_SUBVENDOR_ID_COMPAQ,
-	  TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_COMPAQ,
-	  TG3PCI_SUBDEVICE_ID_COMPAQ_BANSHEE_2, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_COMPAQ,
-	  TG3PCI_SUBDEVICE_ID_COMPAQ_CHANGELING, 0 },
-	{ TG3PCI_SUBVENDOR_ID_COMPAQ,
-	  TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780, TG3_PHY_ID_BCM5701 },
-	{ TG3PCI_SUBVENDOR_ID_COMPAQ,
-	  TG3PCI_SUBDEVICE_ID_COMPAQ_NC7780_2, TG3_PHY_ID_BCM5701 },
-
-	/* IBM boards. */
-	{ TG3PCI_SUBVENDOR_ID_IBM,
-	  TG3PCI_SUBDEVICE_ID_IBM_5703SAX2, 0 }
-};
-
-static struct subsys_tbl_ent *tg3_lookup_by_subsys(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int i;
-
-	DBGC(tp->dev, "Matching with: %x:%x\n", tp->subsystem_vendor, tp->subsystem_device);
-
-	for (i = 0; i < (int) ARRAY_SIZE(subsys_id_to_phy_id); i++) {
-		if ((subsys_id_to_phy_id[i].subsys_vendor ==
-		     tp->subsystem_vendor) &&
-		    (subsys_id_to_phy_id[i].subsys_devid ==
-		     tp->subsystem_device))
-			return &subsys_id_to_phy_id[i];
-	}
-	return NULL;
-}
-
-int tg3_writephy(struct tg3 *tp, int reg, u32 val)
-{	DBGP("%s\n", __func__);
-
-	u32 frame_val;
-	unsigned int loops;
-	int ret;
-
-	if ((tp->phy_flags & TG3_PHYFLG_IS_FET) &&
-	    (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL))
-		return 0;
-
-	if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
-		tw32_f(MAC_MI_MODE,
-		     (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL));
-		udelay(80);
-	}
-
-	frame_val  = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) &
-		      MI_COM_PHY_ADDR_MASK);
-	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
-		      MI_COM_REG_ADDR_MASK);
-	frame_val |= (val & MI_COM_DATA_MASK);
-	frame_val |= (MI_COM_CMD_WRITE | MI_COM_START);
-
-	tw32_f(MAC_MI_COM, frame_val);
-
-	loops = PHY_BUSY_LOOPS;
-	while (loops != 0) {
-		udelay(10);
-		frame_val = tr32(MAC_MI_COM);
-		if ((frame_val & MI_COM_BUSY) == 0) {
-			udelay(5);
-			frame_val = tr32(MAC_MI_COM);
-			break;
-		}
-		loops -= 1;
-	}
-
-	ret = -EBUSY;
-	if (loops != 0)
-		ret = 0;
-
-	if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
-		tw32_f(MAC_MI_MODE, tp->mi_mode);
-		udelay(80);
-	}
-
-	return ret;
-}
-
-static int tg3_bmcr_reset(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 phy_control;
-	int limit, err;
-
-	/* OK, reset it, and poll the BMCR_RESET bit until it
-	 * clears or we time out.
-	 */
-	phy_control = BMCR_RESET;
-	err = tg3_writephy(tp, MII_BMCR, phy_control);
-	if (err != 0)
-		return -EBUSY;
-
-	limit = 5000;
-	while (limit--) {
-		err = tg3_readphy(tp, MII_BMCR, &phy_control);
-		if (err != 0)
-			return -EBUSY;
-
-		if ((phy_control & BMCR_RESET) == 0) {
-			udelay(40);
-			break;
-		}
-		udelay(10);
-	}
-	if (limit < 0)
-		return -EBUSY;
-
-	return 0;
-}
-
-static int tg3_wait_macro_done(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int limit = 100;
-
-	while (limit--) {
-		u32 tmp32;
-
-		if (!tg3_readphy(tp, MII_TG3_DSP_CONTROL, &tmp32)) {
-			if ((tmp32 & 0x1000) == 0)
-				break;
-		}
-	}
-	if (limit < 0)
-		return -EBUSY;
-
-	return 0;
-}
-
-static int tg3_phy_write_and_check_testpat(struct tg3 *tp, int *resetp)
-{	DBGP("%s\n", __func__);
-
-	static const u32 test_pat[4][6] = {
-	{ 0x00005555, 0x00000005, 0x00002aaa, 0x0000000a, 0x00003456, 0x00000003 },
-	{ 0x00002aaa, 0x0000000a, 0x00003333, 0x00000003, 0x0000789a, 0x00000005 },
-	{ 0x00005a5a, 0x00000005, 0x00002a6a, 0x0000000a, 0x00001bcd, 0x00000003 },
-	{ 0x00002a5a, 0x0000000a, 0x000033c3, 0x00000003, 0x00002ef1, 0x00000005 }
-	};
-	int chan;
-
-	for (chan = 0; chan < 4; chan++) {
-		int i;
-
-		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
-			     (chan * 0x2000) | 0x0200);
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002);
-
-		for (i = 0; i < 6; i++)
-			tg3_writephy(tp, MII_TG3_DSP_RW_PORT,
-				     test_pat[chan][i]);
-
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202);
-		if (tg3_wait_macro_done(tp)) {
-			*resetp = 1;
-			return -EBUSY;
-		}
-
-		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
-			     (chan * 0x2000) | 0x0200);
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0082);
-		if (tg3_wait_macro_done(tp)) {
-			*resetp = 1;
-			return -EBUSY;
-		}
-
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0802);
-		if (tg3_wait_macro_done(tp)) {
-			*resetp = 1;
-			return -EBUSY;
-		}
-
-		for (i = 0; i < 6; i += 2) {
-			u32 low, high;
-
-			if (tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low) ||
-			    tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) ||
-			    tg3_wait_macro_done(tp)) {
-				*resetp = 1;
-				return -EBUSY;
-			}
-			low &= 0x7fff;
-			high &= 0x000f;
-			if (low != test_pat[chan][i] ||
-			    high != test_pat[chan][i+1]) {
-				tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000b);
-				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001);
-				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005);
-
-				return -EBUSY;
-			}
-		}
-	}
-
-	return 0;
-}
-
-static int tg3_phy_reset_chanpat(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int chan;
-
-	for (chan = 0; chan < 4; chan++) {
-		int i;
-
-		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
-			     (chan * 0x2000) | 0x0200);
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0002);
-		for (i = 0; i < 6; i++)
-			tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000);
-		tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0202);
-		if (tg3_wait_macro_done(tp))
-			return -EBUSY;
-	}
-
-	return 0;
-}
-
-static int tg3_phydsp_write(struct tg3 *tp, u32 reg, u32 val)
-{	DBGP("%s\n", __func__);
-
-	int err;
-
-	err = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, reg);
-	if (!err)
-		err = tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
-
-	return err;
-}
-
-static int tg3_phy_auxctl_write(struct tg3 *tp, int reg, u32 set)
-{	DBGP("%s\n", __func__);
-
-	if (reg == MII_TG3_AUXCTL_SHDWSEL_MISC)
-		set |= MII_TG3_AUXCTL_MISC_WREN;
-
-	return tg3_writephy(tp, MII_TG3_AUX_CTRL, set | reg);
-}
-
-#define TG3_PHY_AUXCTL_SMDSP_ENABLE(tp) \
-	tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL, \
-			     MII_TG3_AUXCTL_ACTL_SMDSP_ENA | \
-			     MII_TG3_AUXCTL_ACTL_TX_6DB)
-
-#define TG3_PHY_AUXCTL_SMDSP_DISABLE(tp) \
-	tg3_phy_auxctl_write((tp), MII_TG3_AUXCTL_SHDWSEL_AUXCTL, \
-			     MII_TG3_AUXCTL_ACTL_TX_6DB);
-
-static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 reg32, phy9_orig;
-	int retries, do_phy_reset, err;
-
-	retries = 10;
-	do_phy_reset = 1;
-	do {
-		if (do_phy_reset) {
-			err = tg3_bmcr_reset(tp);
-			if (err)
-				return err;
-			do_phy_reset = 0;
-		}
-
-		/* Disable transmitter and interrupt.  */
-		if (tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32))
-			continue;
-
-		reg32 |= 0x3000;
-		tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
-
-		/* Set full-duplex, 1000 mbps.  */
-		tg3_writephy(tp, MII_BMCR,
-			     BMCR_FULLDPLX | TG3_BMCR_SPEED1000);
-
-		/* Set to master mode.  */
-		if (tg3_readphy(tp, MII_TG3_CTRL, &phy9_orig))
-			continue;
-
-		tg3_writephy(tp, MII_TG3_CTRL,
-			     (MII_TG3_CTRL_AS_MASTER |
-			      MII_TG3_CTRL_ENABLE_AS_MASTER));
-
-		err = TG3_PHY_AUXCTL_SMDSP_ENABLE(tp);
-		if (err)
-			return err;
-
-		/* Block the PHY control access.  */
-		tg3_phydsp_write(tp, 0x8005, 0x0800);
-
-		err = tg3_phy_write_and_check_testpat(tp, &do_phy_reset);
-		if (!err)
-			break;
-	} while (--retries);
-
-	err = tg3_phy_reset_chanpat(tp);
-	if (err)
-		return err;
-
-	tg3_phydsp_write(tp, 0x8005, 0x0000);
-
-	tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
-	tg3_writephy(tp, MII_TG3_DSP_CONTROL, 0x0000);
-
-	TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);
-
-	tg3_writephy(tp, MII_TG3_CTRL, phy9_orig);
-
-	if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32)) {
-		reg32 &= ~0x3000;
-		tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
-	} else if (!err)
-		err = -EBUSY;
-
-	return err;
-}
-
-static void tg3_phy_apply_otp(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 otp, phy;
-
-	if (!tp->phy_otp)
-		return;
-
-	otp = tp->phy_otp;
-
-	if (TG3_PHY_AUXCTL_SMDSP_ENABLE(tp))
-		return;
-
-	phy = ((otp & TG3_OTP_AGCTGT_MASK) >> TG3_OTP_AGCTGT_SHIFT);
-	phy |= MII_TG3_DSP_TAP1_AGCTGT_DFLT;
-	tg3_phydsp_write(tp, MII_TG3_DSP_TAP1, phy);
-
-	phy = ((otp & TG3_OTP_HPFFLTR_MASK) >> TG3_OTP_HPFFLTR_SHIFT) |
-	      ((otp & TG3_OTP_HPFOVER_MASK) >> TG3_OTP_HPFOVER_SHIFT);
-	tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH0, phy);
-
-	phy = ((otp & TG3_OTP_LPFDIS_MASK) >> TG3_OTP_LPFDIS_SHIFT);
-	phy |= MII_TG3_DSP_AADJ1CH3_ADCCKADJ;
-	tg3_phydsp_write(tp, MII_TG3_DSP_AADJ1CH3, phy);
-
-	phy = ((otp & TG3_OTP_VDAC_MASK) >> TG3_OTP_VDAC_SHIFT);
-	tg3_phydsp_write(tp, MII_TG3_DSP_EXP75, phy);
-
-	phy = ((otp & TG3_OTP_10BTAMP_MASK) >> TG3_OTP_10BTAMP_SHIFT);
-	tg3_phydsp_write(tp, MII_TG3_DSP_EXP96, phy);
-
-	phy = ((otp & TG3_OTP_ROFF_MASK) >> TG3_OTP_ROFF_SHIFT) |
-	      ((otp & TG3_OTP_RCOFF_MASK) >> TG3_OTP_RCOFF_SHIFT);
-	tg3_phydsp_write(tp, MII_TG3_DSP_EXP97, phy);
-
-	TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);
-}
-
-static int tg3_phy_auxctl_read(struct tg3 *tp, int reg, u32 *val)
-{	DBGP("%s\n", __func__);
-
-	int err;
-
-	err = tg3_writephy(tp, MII_TG3_AUX_CTRL,
-			   (reg << MII_TG3_AUXCTL_MISC_RDSEL_SHIFT) |
-			   MII_TG3_AUXCTL_SHDWSEL_MISC);
-	if (!err)
-		err = tg3_readphy(tp, MII_TG3_AUX_CTRL, val);
-
-	return err;
-}
-
-static void tg3_phy_toggle_automdix(struct tg3 *tp, int enable)
-{	DBGP("%s\n", __func__);
-
-	u32 phy;
-
-	if (!tg3_flag(tp, 5705_PLUS) ||
-	    (tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
-		return;
-
-	if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
-		u32 ephy;
-
-		if (!tg3_readphy(tp, MII_TG3_FET_TEST, &ephy)) {
-			u32 reg = MII_TG3_FET_SHDW_MISCCTRL;
-
-			tg3_writephy(tp, MII_TG3_FET_TEST,
-				     ephy | MII_TG3_FET_SHADOW_EN);
-			if (!tg3_readphy(tp, reg, &phy)) {
-				if (enable)
-					phy |= MII_TG3_FET_SHDW_MISCCTRL_MDIX;
-				else
-					phy &= ~MII_TG3_FET_SHDW_MISCCTRL_MDIX;
-				tg3_writephy(tp, reg, phy);
-			}
-			tg3_writephy(tp, MII_TG3_FET_TEST, ephy);
-		}
-	} else {
-		int ret;
-
-		ret = tg3_phy_auxctl_read(tp,
-					  MII_TG3_AUXCTL_SHDWSEL_MISC, &phy);
-		if (!ret) {
-			if (enable)
-				phy |= MII_TG3_AUXCTL_MISC_FORCE_AMDIX;
-			else
-				phy &= ~MII_TG3_AUXCTL_MISC_FORCE_AMDIX;
-			tg3_phy_auxctl_write(tp,
-					     MII_TG3_AUXCTL_SHDWSEL_MISC, phy);
-		}
-	}
-}
-
-static void tg3_phy_set_wirespeed(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int ret;
-	u32 val;
-
-	if (tp->phy_flags & TG3_PHYFLG_NO_ETH_WIRE_SPEED)
-		return;
-
-	ret = tg3_phy_auxctl_read(tp, MII_TG3_AUXCTL_SHDWSEL_MISC, &val);
-	if (!ret)
-		tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_MISC,
-				     val | MII_TG3_AUXCTL_MISC_WIRESPD_EN);
-}
-
-/* This will reset the tigon3 PHY if there is no valid
- * link unless the FORCE argument is non-zero.
- */
-int tg3_phy_reset(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 val, cpmuctrl;
-	int err;
-
-	DBGCP(&tp->pdev->dev, "%s\n", __func__);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-		val = tr32(GRC_MISC_CFG);
-		tw32_f(GRC_MISC_CFG, val & ~GRC_MISC_CFG_EPHY_IDDQ);
-		udelay(40);
-	}
-	err  = tg3_readphy(tp, MII_BMSR, &val);
-	err |= tg3_readphy(tp, MII_BMSR, &val);
-	if (err != 0)
-		return -EBUSY;
-
-	netdev_link_down(tp->dev);
-	tg3_link_report(tp);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
-		err = tg3_phy_reset_5703_4_5(tp);
-		if (err)
-			return err;
-		goto out;
-	}
-
-	cpmuctrl = 0;
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
-	    GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX) {
-		cpmuctrl = tr32(TG3_CPMU_CTRL);
-		if (cpmuctrl & CPMU_CTRL_GPHY_10MB_RXONLY)
-			tw32(TG3_CPMU_CTRL,
-			     cpmuctrl & ~CPMU_CTRL_GPHY_10MB_RXONLY);
-	}
-
-	err = tg3_bmcr_reset(tp);
-	if (err)
-		return err;
-
-	if (cpmuctrl & CPMU_CTRL_GPHY_10MB_RXONLY) {
-		val = MII_TG3_DSP_EXP8_AEDW | MII_TG3_DSP_EXP8_REJ2MHz;
-		tg3_phydsp_write(tp, MII_TG3_DSP_EXP8, val);
-
-		tw32(TG3_CPMU_CTRL, cpmuctrl);
-	}
-
-	if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5784_AX ||
-	    GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX) {
-		val = tr32(TG3_CPMU_LSPD_1000MB_CLK);
-		if ((val & CPMU_LSPD_1000MB_MACCLK_MASK) ==
-		    CPMU_LSPD_1000MB_MACCLK_12_5) {
-			val &= ~CPMU_LSPD_1000MB_MACCLK_MASK;
-			udelay(40);
-			tw32_f(TG3_CPMU_LSPD_1000MB_CLK, val);
-		}
-	}
-
-	if (tg3_flag(tp, 5717_PLUS) &&
-	    (tp->phy_flags & TG3_PHYFLG_MII_SERDES))
-		return 0;
-
-	tg3_phy_apply_otp(tp);
-
-out:
-	if ((tp->phy_flags & TG3_PHYFLG_ADC_BUG) &&
-	    !TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) {
-		tg3_phydsp_write(tp, 0x201f, 0x2aaa);
-		tg3_phydsp_write(tp, 0x000a, 0x0323);
-		TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);
-	}
-
-	if (tp->phy_flags & TG3_PHYFLG_5704_A0_BUG) {
-		tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
-		tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
-	}
-
-	if (tp->phy_flags & TG3_PHYFLG_BER_BUG) {
-		if (!TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) {
-			tg3_phydsp_write(tp, 0x000a, 0x310b);
-			tg3_phydsp_write(tp, 0x201f, 0x9506);
-			tg3_phydsp_write(tp, 0x401f, 0x14e2);
-			TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);
-		}
-	} else if (tp->phy_flags & TG3_PHYFLG_JITTER_BUG) {
-		if (!TG3_PHY_AUXCTL_SMDSP_ENABLE(tp)) {
-			tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
-			if (tp->phy_flags & TG3_PHYFLG_ADJUST_TRIM) {
-				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b);
-				tg3_writephy(tp, MII_TG3_TEST1,
-					     MII_TG3_TEST1_TRIM_EN | 0x4);
-			} else
-				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b);
-
-			TG3_PHY_AUXCTL_SMDSP_DISABLE(tp);
-		}
-	}
-
-	if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
-		/* Cannot do read-modify-write on 5401 */
-		tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, 0x4c20);
-	}
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
-		/* adjust output voltage */
-		tg3_writephy(tp, MII_TG3_FET_PTEST, 0x12);
-	}
-
-	tg3_phy_toggle_automdix(tp, 1);
-	tg3_phy_set_wirespeed(tp);
-	return 0;
-}
-
-static int tg3_copper_is_advertising_all(struct tg3 *tp, u32 mask)
-{	DBGP("%s\n", __func__);
-
-	u32 adv_reg, all_mask = 0;
-
-	if (mask & ADVERTISED_10baseT_Half)
-		all_mask |= ADVERTISE_10HALF;
-	if (mask & ADVERTISED_10baseT_Full)
-		all_mask |= ADVERTISE_10FULL;
-	if (mask & ADVERTISED_100baseT_Half)
-		all_mask |= ADVERTISE_100HALF;
-	if (mask & ADVERTISED_100baseT_Full)
-		all_mask |= ADVERTISE_100FULL;
-
-	if (tg3_readphy(tp, MII_ADVERTISE, &adv_reg))
-		return 0;
-
-	if ((adv_reg & all_mask) != all_mask)
-		return 0;
-	if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY)) {
-		u32 tg3_ctrl;
-
-		all_mask = 0;
-		if (mask & ADVERTISED_1000baseT_Half)
-			all_mask |= ADVERTISE_1000HALF;
-		if (mask & ADVERTISED_1000baseT_Full)
-			all_mask |= ADVERTISE_1000FULL;
-
-		if (tg3_readphy(tp, MII_TG3_CTRL, &tg3_ctrl))
-			return 0;
-
-		if ((tg3_ctrl & all_mask) != all_mask)
-			return 0;
-	}
-	return 1;
-}
-
-static u16 tg3_advert_flowctrl_1000T(u8 flow_ctrl)
-{	DBGP("%s\n", __func__);
-
-	u16 miireg;
-
-	if ((flow_ctrl & FLOW_CTRL_TX) && (flow_ctrl & FLOW_CTRL_RX))
-		miireg = ADVERTISE_PAUSE_CAP;
-	else if (flow_ctrl & FLOW_CTRL_TX)
-		miireg = ADVERTISE_PAUSE_ASYM;
-	else if (flow_ctrl & FLOW_CTRL_RX)
-		miireg = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-	else
-		miireg = 0;
-
-	return miireg;
-}
-
-static int tg3_phy_autoneg_cfg(struct tg3 *tp, u32 advertise, u32 flowctrl)
-{	DBGP("%s\n", __func__);
-
-	int err = 0;
-	u32 val __unused, new_adv;
-
-	new_adv = ADVERTISE_CSMA;
-	if (advertise & ADVERTISED_10baseT_Half)
-		new_adv |= ADVERTISE_10HALF;
-	if (advertise & ADVERTISED_10baseT_Full)
-		new_adv |= ADVERTISE_10FULL;
-	if (advertise & ADVERTISED_100baseT_Half)
-		new_adv |= ADVERTISE_100HALF;
-	if (advertise & ADVERTISED_100baseT_Full)
-		new_adv |= ADVERTISE_100FULL;
-
-	new_adv |= tg3_advert_flowctrl_1000T(flowctrl);
-
-	err = tg3_writephy(tp, MII_ADVERTISE, new_adv);
-	if (err)
-		goto done;
-
-	if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
-		goto done;
-
-	new_adv = 0;
-	if (advertise & ADVERTISED_1000baseT_Half)
-		new_adv |= MII_TG3_CTRL_ADV_1000_HALF;
-	if (advertise & ADVERTISED_1000baseT_Full)
-		new_adv |= MII_TG3_CTRL_ADV_1000_FULL;
-
-	if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
-	    tp->pci_chip_rev_id == CHIPREV_ID_5701_B0)
-		new_adv |= (MII_TG3_CTRL_AS_MASTER |
-			    MII_TG3_CTRL_ENABLE_AS_MASTER);
-
-	err = tg3_writephy(tp, MII_TG3_CTRL, new_adv);
-	if (err)
-		goto done;
-
-	if (!(tp->phy_flags & TG3_PHYFLG_EEE_CAP))
-		goto done;
-
-done:
-	return err;
-}
-
-static int tg3_init_5401phy_dsp(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	int err;
-
-	/* Turn off tap power management. */
-	/* Set Extended packet length bit */
-	err = tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_AUXCTL, 0x4c20);
-
-	err |= tg3_phydsp_write(tp, 0x0012, 0x1804);
-	err |= tg3_phydsp_write(tp, 0x0013, 0x1204);
-	err |= tg3_phydsp_write(tp, 0x8006, 0x0132);
-	err |= tg3_phydsp_write(tp, 0x8006, 0x0232);
-	err |= tg3_phydsp_write(tp, 0x201f, 0x0a20);
-
-	udelay(40);
-
-	return err;
-}
-
-#define ADVERTISED_Autoneg              (1 << 6)
-#define ADVERTISED_Pause                (1 << 13)
-#define ADVERTISED_TP                   (1 << 7)
-#define ADVERTISED_FIBRE                (1 << 10)
-
-#define AUTONEG_ENABLE          0x01
-
-static void tg3_phy_init_link_config(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 adv = ADVERTISED_Autoneg |
-		  ADVERTISED_Pause;
-
-
-	if (!(tp->phy_flags & TG3_PHYFLG_10_100_ONLY))
-		adv |= ADVERTISED_1000baseT_Half |
-		       ADVERTISED_1000baseT_Full;
-	if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES))
-		adv |= ADVERTISED_100baseT_Half |
-		       ADVERTISED_100baseT_Full |
-		       ADVERTISED_10baseT_Half |
-		       ADVERTISED_10baseT_Full |
-		       ADVERTISED_TP;
-	else
-		adv |= ADVERTISED_FIBRE;
-
-	tp->link_config.advertising = adv;
-	tp->link_config.speed = SPEED_INVALID;
-	tp->link_config.duplex = DUPLEX_INVALID;
-	tp->link_config.autoneg = AUTONEG_ENABLE;
-	tp->link_config.active_speed = SPEED_INVALID;
-	tp->link_config.active_duplex = DUPLEX_INVALID;
-	tp->link_config.orig_speed = SPEED_INVALID;
-	tp->link_config.orig_duplex = DUPLEX_INVALID;
-	tp->link_config.orig_autoneg = AUTONEG_INVALID;
-}
-
-int tg3_phy_probe(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 hw_phy_id_1, hw_phy_id_2;
-	u32 hw_phy_id, hw_phy_id_masked;
-	int err;
-
-	/* flow control autonegotiation is default behavior */
-	tg3_flag_set(tp, PAUSE_AUTONEG);
-	tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
-
-	/* Reading the PHY ID register can conflict with ASF
-	 * firmware access to the PHY hardware.
-	 */
-	err = 0;
-	if (tg3_flag(tp, ENABLE_ASF) || tg3_flag(tp, ENABLE_APE)) {
-		hw_phy_id = hw_phy_id_masked = TG3_PHY_ID_INVALID;
-	} else {
-		/* Now read the physical PHY_ID from the chip and verify
-		 * that it is sane.  If it doesn't look good, we fall back
-		 * to either the hard-coded table based PHY_ID and failing
-		 * that the value found in the eeprom area.
-		 */
-		err |= tg3_readphy(tp, MII_PHYSID1, &hw_phy_id_1);
-		err |= tg3_readphy(tp, MII_PHYSID2, &hw_phy_id_2);
-
-		hw_phy_id  = (hw_phy_id_1 & 0xffff) << 10;
-		hw_phy_id |= (hw_phy_id_2 & 0xfc00) << 16;
-		hw_phy_id |= (hw_phy_id_2 & 0x03ff) <<  0;
-
-		hw_phy_id_masked = hw_phy_id & TG3_PHY_ID_MASK;
-	}
-
-	if (!err && TG3_KNOWN_PHY_ID(hw_phy_id_masked)) {
-		tp->phy_id = hw_phy_id;
-		if (hw_phy_id_masked == TG3_PHY_ID_BCM8002)
-			tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
-		else
-			tp->phy_flags &= ~TG3_PHYFLG_PHY_SERDES;
-	} else {
-		if (tp->phy_id != TG3_PHY_ID_INVALID) {
-			/* Do nothing, phy ID already set up in
-			 * tg3_get_eeprom_hw_cfg().
-			 */
-		} else {
-			struct subsys_tbl_ent *p;
-
-			/* No eeprom signature?  Try the hardcoded
-			 * subsys device table.
-			 */
-			p = tg3_lookup_by_subsys(tp);
-			if (!p) {
-				DBGC(&tp->pdev->dev, "lookup by subsys failed\n");
-				return -ENODEV;
-			}
-
-			tp->phy_id = p->phy_id;
-			if (!tp->phy_id ||
-			    tp->phy_id == TG3_PHY_ID_BCM8002)
-				tp->phy_flags |= TG3_PHYFLG_PHY_SERDES;
-		}
-	}
-
-	if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) &&
-	    ((tp->pdev->device == TG3PCI_DEVICE_TIGON3_5718 &&
-	      tp->pci_chip_rev_id != CHIPREV_ID_5717_A0) ||
-	     (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765 &&
-	      tp->pci_chip_rev_id != CHIPREV_ID_57765_A0)))
-		tp->phy_flags |= TG3_PHYFLG_EEE_CAP;
-
-	tg3_phy_init_link_config(tp);
-
-	if (!(tp->phy_flags & TG3_PHYFLG_ANY_SERDES) &&
-	    !tg3_flag(tp, ENABLE_APE) &&
-	    !tg3_flag(tp, ENABLE_ASF)) {
-		u32 bmsr;
-		u32 mask;
-
-		tg3_readphy(tp, MII_BMSR, &bmsr);
-		if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
-		    (bmsr & BMSR_LSTATUS))
-			goto skip_phy_reset;
-
-		err = tg3_phy_reset(tp);
-		if (err)
-			return err;
-
-		tg3_phy_set_wirespeed(tp);
-
-		mask = (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-			ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
-			ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full);
-		if (!tg3_copper_is_advertising_all(tp, mask)) {
-			tg3_phy_autoneg_cfg(tp, tp->link_config.advertising,
-			                    tp->link_config.flowctrl);
-
-			tg3_writephy(tp, MII_BMCR,
-				     BMCR_ANENABLE | BMCR_ANRESTART);
-		}
-	}
-
-skip_phy_reset:
-	if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
-		err = tg3_init_5401phy_dsp(tp);
-		if (err)
-			return err;
-
-		err = tg3_init_5401phy_dsp(tp);
-	}
-
-	return err;
-}
-
-void tg3_poll_link(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (tp->hw_status->status & SD_STATUS_LINK_CHG) {
-		DBGC(tp->dev,"link_changed\n");
-		tp->hw_status->status &= ~SD_STATUS_LINK_CHG;
-		tg3_setup_phy(tp, 0);
-	}
-}
-
-static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8 *duplex)
-{	DBGP("%s\n", __func__);
-
-	switch (val & MII_TG3_AUX_STAT_SPDMASK) {
-	case MII_TG3_AUX_STAT_10HALF:
-		*speed = SPEED_10;
-		*duplex = DUPLEX_HALF;
-		break;
-
-	case MII_TG3_AUX_STAT_10FULL:
-		*speed = SPEED_10;
-		*duplex = DUPLEX_FULL;
-		break;
-
-	case MII_TG3_AUX_STAT_100HALF:
-		*speed = SPEED_100;
-		*duplex = DUPLEX_HALF;
-		break;
-
-	case MII_TG3_AUX_STAT_100FULL:
-		*speed = SPEED_100;
-		*duplex = DUPLEX_FULL;
-		break;
-
-	case MII_TG3_AUX_STAT_1000HALF:
-		*speed = SPEED_1000;
-		*duplex = DUPLEX_HALF;
-		break;
-
-	case MII_TG3_AUX_STAT_1000FULL:
-		*speed = SPEED_1000;
-		*duplex = DUPLEX_FULL;
-		break;
-
-	default:
-		if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
-			*speed = (val & MII_TG3_AUX_STAT_100) ? SPEED_100 :
-				 SPEED_10;
-			*duplex = (val & MII_TG3_AUX_STAT_FULL) ? DUPLEX_FULL :
-				  DUPLEX_HALF;
-			break;
-		}
-		*speed = SPEED_INVALID;
-		*duplex = DUPLEX_INVALID;
-		break;
-	}
-}
-
-static int tg3_adv_1000T_flowctrl_ok(struct tg3 *tp, u32 *lcladv, u32 *rmtadv)
-{	DBGP("%s\n", __func__);
-
-	u32 curadv, reqadv;
-
-	if (tg3_readphy(tp, MII_ADVERTISE, lcladv))
-		return 1;
-
-	curadv = *lcladv & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-	reqadv = tg3_advert_flowctrl_1000T(tp->link_config.flowctrl);
-
-	if (tp->link_config.active_duplex == DUPLEX_FULL) {
-		if (curadv != reqadv)
-			return 0;
-
-		if (tg3_flag(tp, PAUSE_AUTONEG))
-			tg3_readphy(tp, MII_LPA, rmtadv);
-	} else {
-		/* Reprogram the advertisement register, even if it
-		 * does not affect the current link.  If the link
-		 * gets renegotiated in the future, we can save an
-		 * additional renegotiation cycle by advertising
-		 * it correctly in the first place.
-		 */
-		if (curadv != reqadv) {
-			*lcladv &= ~(ADVERTISE_PAUSE_CAP |
-				     ADVERTISE_PAUSE_ASYM);
-			tg3_writephy(tp, MII_ADVERTISE, *lcladv | reqadv);
-		}
-	}
-
-	return 1;
-}
-
-static u8 tg3_resolve_flowctrl_1000X(u16 lcladv, u16 rmtadv)
-{	DBGP("%s\n", __func__);
-
-	u8 cap = 0;
-
-	if (lcladv & ADVERTISE_1000XPAUSE) {
-		if (lcladv & ADVERTISE_1000XPSE_ASYM) {
-			if (rmtadv & LPA_1000XPAUSE)
-				cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
-			else if (rmtadv & LPA_1000XPAUSE_ASYM)
-				cap = FLOW_CTRL_RX;
-		} else {
-			if (rmtadv & LPA_1000XPAUSE)
-				cap = FLOW_CTRL_TX | FLOW_CTRL_RX;
-		}
-	} else if (lcladv & ADVERTISE_1000XPSE_ASYM) {
-		if ((rmtadv & LPA_1000XPAUSE) && (rmtadv & LPA_1000XPAUSE_ASYM))
-			cap = FLOW_CTRL_TX;
-	}
-
-	return cap;
-}
-
-static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv)
-{	DBGP("%s\n", __func__);
-
-	u8 flowctrl = 0;
-	u32 old_rx_mode = tp->rx_mode;
-	u32 old_tx_mode = tp->tx_mode;
-
-	if (tg3_flag(tp, PAUSE_AUTONEG)) {
-		if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
-			flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv);
-		else
-			flowctrl = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
-	} else
-		flowctrl = tp->link_config.flowctrl;
-
-	tp->link_config.active_flowctrl = flowctrl;
-
-	if (flowctrl & FLOW_CTRL_RX)
-		tp->rx_mode |= RX_MODE_FLOW_CTRL_ENABLE;
-	else
-		tp->rx_mode &= ~RX_MODE_FLOW_CTRL_ENABLE;
-
-	if (old_rx_mode != tp->rx_mode)
-		tw32_f(MAC_RX_MODE, tp->rx_mode);
-
-	if (flowctrl & FLOW_CTRL_TX)
-		tp->tx_mode |= TX_MODE_FLOW_CTRL_ENABLE;
-	else
-		tp->tx_mode &= ~TX_MODE_FLOW_CTRL_ENABLE;
-
-	if (old_tx_mode != tp->tx_mode)
-		tw32_f(MAC_TX_MODE, tp->tx_mode);
-}
-
-static void tg3_phy_copper_begin(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 new_adv;
-
-	if (tp->link_config.speed == SPEED_INVALID) {
-		if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
-			tp->link_config.advertising &=
-				~(ADVERTISED_1000baseT_Half |
-				  ADVERTISED_1000baseT_Full);
-
-		tg3_phy_autoneg_cfg(tp, tp->link_config.advertising,
-				    tp->link_config.flowctrl);
-	} else {
-		/* Asking for a specific link mode. */
-		if (tp->link_config.speed == SPEED_1000) {
-			if (tp->link_config.duplex == DUPLEX_FULL)
-				new_adv = ADVERTISED_1000baseT_Full;
-			else
-				new_adv = ADVERTISED_1000baseT_Half;
-		} else if (tp->link_config.speed == SPEED_100) {
-			if (tp->link_config.duplex == DUPLEX_FULL)
-				new_adv = ADVERTISED_100baseT_Full;
-			else
-				new_adv = ADVERTISED_100baseT_Half;
-		} else {
-			if (tp->link_config.duplex == DUPLEX_FULL)
-				new_adv = ADVERTISED_10baseT_Full;
-			else
-				new_adv = ADVERTISED_10baseT_Half;
-		}
-
-		tg3_phy_autoneg_cfg(tp, new_adv,
-				    tp->link_config.flowctrl);
-	}
-
-	tg3_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
-}
-
-static int tg3_5700_link_polarity(struct tg3 *tp, u32 speed)
-{	DBGP("%s\n", __func__);
-
-	if (tp->led_ctrl == LED_CTRL_MODE_PHY_2)
-		return 1;
-	else if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411) {
-		if (speed != SPEED_10)
-			return 1;
-	} else if (speed == SPEED_10)
-		return 1;
-
-	return 0;
-}
-
-#if 1
-
-static void tg3_ump_link_report(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	u32 reg;
-	u32 val;
-
-	if (!tg3_flag(tp, 5780_CLASS) || !tg3_flag(tp, ENABLE_ASF))
-		return;
-
-	tg3_wait_for_event_ack(tp);
-
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_LINK_UPDATE);
-
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 14);
-
-	val = 0;
-	if (!tg3_readphy(tp, MII_BMCR, &reg))
-		val = reg << 16;
-	if (!tg3_readphy(tp, MII_BMSR, &reg))
-		val |= (reg & 0xffff);
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, val);
-
-	val = 0;
-	if (!tg3_readphy(tp, MII_ADVERTISE, &reg))
-		val = reg << 16;
-	if (!tg3_readphy(tp, MII_LPA, &reg))
-		val |= (reg & 0xffff);
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 4, val);
-
-	val = 0;
-	if (!(tp->phy_flags & TG3_PHYFLG_MII_SERDES)) {
-		if (!tg3_readphy(tp, MII_CTRL1000, &reg))
-			val = reg << 16;
-		if (!tg3_readphy(tp, MII_STAT1000, &reg))
-			val |= (reg & 0xffff);
-	}
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 8, val);
-
-	if (!tg3_readphy(tp, MII_PHYADDR, &reg))
-		val = reg << 16;
-	else
-		val = 0;
-	tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX + 12, val);
-
-	tg3_generate_fw_event(tp);
-}
-
-/* NOTE: Debugging only code */
-static void tg3_link_report(struct tg3 *tp)
-{	DBGP("%s\n", __func__);
-
-	if (!netdev_link_ok(tp->dev)) {
-		DBGC(tp->dev, "Link is down\n");
-		tg3_ump_link_report(tp);
-	} else {
-		DBGC(tp->dev, "Link is up at %d Mbps, %s duplex\n",
-			    (tp->link_config.active_speed == SPEED_1000 ?
-			     1000 :
-			     (tp->link_config.active_speed == SPEED_100 ?
-			      100 : 10)),
-			    (tp->link_config.active_duplex == DUPLEX_FULL ?
-			     "full" : "half"));
-
-		DBGC(tp->dev, "Flow control is %s for TX and %s for RX\n",
-			    (tp->link_config.active_flowctrl & FLOW_CTRL_TX) ?
-			    "on" : "off",
-			    (tp->link_config.active_flowctrl & FLOW_CTRL_RX) ?
-			    "on" : "off");
-
-		if (tp->phy_flags & TG3_PHYFLG_EEE_CAP)
-			DBGC(tp->dev, "EEE is %s\n",
-				    tp->setlpicnt ? "enabled" : "disabled");
-
-		tg3_ump_link_report(tp);
-	}
-}
-#endif
-
-static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
-{	DBGP("%s\n", __func__);
-
-	int current_link_up;
-	u32 bmsr, val;
-	u32 lcl_adv, rmt_adv;
-	u16 current_speed;
-	u8 current_duplex;
-	int i, err;
-
-	tw32(MAC_EVENT, 0);
-
-	tw32_f(MAC_STATUS,
-	     (MAC_STATUS_SYNC_CHANGED |
-	      MAC_STATUS_CFG_CHANGED |
-	      MAC_STATUS_MI_COMPLETION |
-	      MAC_STATUS_LNKSTATE_CHANGED));
-	udelay(40);
-
-	if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
-		tw32_f(MAC_MI_MODE,
-		     (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL));
-		udelay(80);
-	}
-
-	tg3_phy_auxctl_write(tp, MII_TG3_AUXCTL_SHDWSEL_PWRCTL, 0);
-
-	/* Some third-party PHYs need to be reset on link going
-	 * down.
-	 */
-	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 ||
-	     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
-	     GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
-	    netdev_link_ok(tp->dev)) {
-		tg3_readphy(tp, MII_BMSR, &bmsr);
-		if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
-		    !(bmsr & BMSR_LSTATUS))
-			force_reset = 1;
-	}
-	if (force_reset)
-		tg3_phy_reset(tp);
-
-	if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5401) {
-		tg3_readphy(tp, MII_BMSR, &bmsr);
-		if (tg3_readphy(tp, MII_BMSR, &bmsr) ||
-		    !tg3_flag(tp, INIT_COMPLETE))
-			bmsr = 0;
-
-		if (!(bmsr & BMSR_LSTATUS)) {
-			err = tg3_init_5401phy_dsp(tp);
-			if (err)
-				return err;
-
-			tg3_readphy(tp, MII_BMSR, &bmsr);
-			for (i = 0; i < 1000; i++) {
-				udelay(10);
-				if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
-				    (bmsr & BMSR_LSTATUS)) {
-					udelay(40);
-					break;
-				}
-			}
-
-			if ((tp->phy_id & TG3_PHY_ID_REV_MASK) ==
-			    TG3_PHY_REV_BCM5401_B0 &&
-			    !(bmsr & BMSR_LSTATUS) &&
-			    tp->link_config.active_speed == SPEED_1000) {
-				err = tg3_phy_reset(tp);
-				if (!err)
-					err = tg3_init_5401phy_dsp(tp);
-				if (err)
-					return err;
-			}
-		}
-	} else if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
-		   tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) {
-		/* 5701 {A0,B0} CRC bug workaround */
-		tg3_writephy(tp, 0x15, 0x0a75);
-		tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68);
-		tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8d68);
-		tg3_writephy(tp, MII_TG3_MISC_SHDW, 0x8c68);
-	}
-
-	/* Clear pending interrupts... */
-	tg3_readphy(tp, MII_TG3_ISTAT, &val);
-	tg3_readphy(tp, MII_TG3_ISTAT, &val);
-
-	if (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT)
-		tg3_writephy(tp, MII_TG3_IMASK, ~MII_TG3_INT_LINKCHG);
-	else if (!(tp->phy_flags & TG3_PHYFLG_IS_FET))
-		tg3_writephy(tp, MII_TG3_IMASK, ~0);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
-	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701) {
-		if (tp->led_ctrl == LED_CTRL_MODE_PHY_1)
-			tg3_writephy(tp, MII_TG3_EXT_CTRL,
-				     MII_TG3_EXT_CTRL_LNK3_LED_MODE);
-		else
-			tg3_writephy(tp, MII_TG3_EXT_CTRL, 0);
-	}
-
-	current_link_up = 0;
-	current_speed = SPEED_INVALID;
-	current_duplex = DUPLEX_INVALID;
-
-	if (tp->phy_flags & TG3_PHYFLG_CAPACITIVE_COUPLING) {
-		err = tg3_phy_auxctl_read(tp,
-					  MII_TG3_AUXCTL_SHDWSEL_MISCTEST,
-					  &val);
-		if (!err && !(val & (1 << 10))) {
-			tg3_phy_auxctl_write(tp,
-					     MII_TG3_AUXCTL_SHDWSEL_MISCTEST,
-					     val | (1 << 10));
-			goto relink;
-		}
-	}
-
-	bmsr = 0;
-	for (i = 0; i < 100; i++) {
-		tg3_readphy(tp, MII_BMSR, &bmsr);
-		if (!tg3_readphy(tp, MII_BMSR, &bmsr) &&
-		    (bmsr & BMSR_LSTATUS))
-			break;
-		udelay(40);
-	}
-
-	if (bmsr & BMSR_LSTATUS) {
-		u32 aux_stat, bmcr;
-
-		tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat);
-		for (i = 0; i < 2000; i++) {
-			udelay(10);
-			if (!tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat) &&
-			    aux_stat)
-				break;
-		}
-
-		tg3_aux_stat_to_speed_duplex(tp, aux_stat,
-					     &current_speed,
-					     &current_duplex);
-
-		bmcr = 0;
-		for (i = 0; i < 200; i++) {
-			tg3_readphy(tp, MII_BMCR, &bmcr);
-			if (tg3_readphy(tp, MII_BMCR, &bmcr))
-				continue;
-			if (bmcr && bmcr != 0x7fff)
-				break;
-			udelay(10);
-		}
-
-		lcl_adv = 0;
-		rmt_adv = 0;
-
-		tp->link_config.active_speed = current_speed;
-		tp->link_config.active_duplex = current_duplex;
-
-		if ((bmcr & BMCR_ANENABLE) &&
-		    tg3_copper_is_advertising_all(tp,
-					tp->link_config.advertising)) {
-			if (tg3_adv_1000T_flowctrl_ok(tp, &lcl_adv,
-							  &rmt_adv)) {
-				current_link_up = 1;
-			}
-		}
-
-		if (current_link_up == 1 &&
-		    tp->link_config.active_duplex == DUPLEX_FULL)
-			tg3_setup_flow_control(tp, lcl_adv, rmt_adv);
-	}
-
-relink:
-	if (current_link_up == 0) {
-		tg3_phy_copper_begin(tp);
-
-		tg3_readphy(tp, MII_BMSR, &bmsr);
-		if ((!tg3_readphy(tp, MII_BMSR, &bmsr) && (bmsr & BMSR_LSTATUS)) ||
-		    (tp->mac_mode & MAC_MODE_PORT_INT_LPBACK))
-			current_link_up = 1;
-	}
-
-	tp->mac_mode &= ~MAC_MODE_PORT_MODE_MASK;
-	if (current_link_up == 1) {
-		if (tp->link_config.active_speed == SPEED_100 ||
-		    tp->link_config.active_speed == SPEED_10)
-			tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
-		else
-			tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
-	} else if (tp->phy_flags & TG3_PHYFLG_IS_FET)
-		tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
-	else
-		tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
-
-	tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX;
-	if (tp->link_config.active_duplex == DUPLEX_HALF)
-		tp->mac_mode |= MAC_MODE_HALF_DUPLEX;
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) {
-		if (current_link_up == 1 &&
-		    tg3_5700_link_polarity(tp, tp->link_config.active_speed))
-			tp->mac_mode |= MAC_MODE_LINK_POLARITY;
-		else
-			tp->mac_mode &= ~MAC_MODE_LINK_POLARITY;
-	}
-
-	/* ??? Without this setting Netgear GA302T PHY does not
-	 * ??? send/receive packets...
-	 */
-	if ((tp->phy_id & TG3_PHY_ID_MASK) == TG3_PHY_ID_BCM5411 &&
-	    tp->pci_chip_rev_id == CHIPREV_ID_5700_ALTIMA) {
-		tp->mi_mode |= MAC_MI_MODE_AUTO_POLL;
-		tw32_f(MAC_MI_MODE, tp->mi_mode);
-		udelay(80);
-	}
-
-	tw32_f(MAC_MODE, tp->mac_mode);
-	udelay(40);
-
-	/* Enabled attention when the link has changed state. */
-	tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
-	udelay(40);
-
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 &&
-	    current_link_up == 1 &&
-	    tp->link_config.active_speed == SPEED_1000 &&
-	    (tg3_flag(tp, PCIX_MODE) || tg3_flag(tp, PCI_HIGH_SPEED))) {
-		udelay(120);
-		/* NOTE: this freezes for mdc? */
-		tw32_f(MAC_STATUS,
-		     (MAC_STATUS_SYNC_CHANGED |
-		      MAC_STATUS_CFG_CHANGED));
-		udelay(40);
-		tg3_write_mem(tp,
-			      NIC_SRAM_FIRMWARE_MBOX,
-			      NIC_SRAM_FIRMWARE_MBOX_MAGIC2);
-	}
-
-	/* Prevent send BD corruption. */
-	if (tg3_flag(tp, CLKREQ_BUG)) {
-		u16 oldlnkctl, newlnkctl;
-
-		pci_read_config_word(tp->pdev,
-				     tp->pcie_cap + PCI_EXP_LNKCTL,
-				     &oldlnkctl);
-		if (tp->link_config.active_speed == SPEED_100 ||
-		    tp->link_config.active_speed == SPEED_10)
-			newlnkctl = oldlnkctl & ~PCI_EXP_LNKCTL_CLKREQ_EN;
-		else
-			newlnkctl = oldlnkctl | PCI_EXP_LNKCTL_CLKREQ_EN;
-		if (newlnkctl != oldlnkctl)
-			pci_write_config_word(tp->pdev,
-					      tp->pcie_cap + PCI_EXP_LNKCTL,
-					      newlnkctl);
-	}
-
-	if (current_link_up != netdev_link_ok(tp->dev)) {
-		if (current_link_up)
-			netdev_link_up(tp->dev);
-		else
-			netdev_link_down(tp->dev);
-		tg3_link_report(tp);
-	}
-
-	return 0;
-}
-
-int tg3_setup_phy(struct tg3 *tp, int force_reset)
-{	DBGP("%s\n", __func__);
-
-	u32 val;
-	int err;
-
-#if 0
-	if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
-		err = tg3_setup_fiber_phy(tp, force_reset);
-	else if (tp->phy_flags & TG3_PHYFLG_MII_SERDES)
-		err = tg3_setup_fiber_mii_phy(tp, force_reset);
-	else
-#endif
-	/* FIXME: add only copper phy variants for now */
-	err = tg3_setup_copper_phy(tp, force_reset);
-
-	val = (2 << TX_LENGTHS_IPG_CRS_SHIFT) |
-	      (6 << TX_LENGTHS_IPG_SHIFT);
-	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5720)
-		val |= tr32(MAC_TX_LENGTHS) &
-		       (TX_LENGTHS_JMB_FRM_LEN_MSK |
-			TX_LENGTHS_CNT_DWN_VAL_MSK);
-
-	if (tp->link_config.active_speed == SPEED_1000 &&
-	    tp->link_config.active_duplex == DUPLEX_HALF)
-		tw32(MAC_TX_LENGTHS, val |
-		     (0xff << TX_LENGTHS_SLOT_TIME_SHIFT));
-	else
-		tw32(MAC_TX_LENGTHS, val |
-		     (32 << TX_LENGTHS_SLOT_TIME_SHIFT));
-
-	if (!tg3_flag(tp, 5705_PLUS)) {
-		if (netdev_link_ok(tp->dev)) {
-			tw32(HOSTCC_STAT_COAL_TICKS, DEFAULT_STAT_COAL_TICKS);
-		} else {
-			tw32(HOSTCC_STAT_COAL_TICKS, 0);
-		}
-	}
-
-	val = tr32(PCIE_PWR_MGMT_THRESH);
-	if (!netdev_link_ok(tp->dev))
-		val = (val & ~PCIE_PWR_MGMT_L1_THRESH_MSK);
-	else
-		val |= PCIE_PWR_MGMT_L1_THRESH_MSK;
-	tw32(PCIE_PWR_MGMT_THRESH, val);
-
-	return err;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3.c ipxe-1.0.1~lliurex1505/src/drivers/net/tg3.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,3435 @@
+/* $Id$
+ * tg3.c: Broadcom Tigon3 ethernet driver.
+ *
+ * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2001, 2002 Jeff Garzik (jgarzik@mandrakesoft.com)
+ * Copyright (C) 2003 Eric Biederman (ebiederman@lnxi.com)  [etherboot port]
+ */
+
+FILE_LICENCE ( GPL2_ONLY );
+
+/* 11-13-2003	timlegge	Fix Issue with NetGear GA302T 
+ * 11-18-2003   ebiederm        Generalize NetGear Fix to what the code was supposed to be.
+ * 01-06-2005   Alf (Frederic Olivie) Add Dell bcm 5751 (0x1677) support
+ * 04-15-2005   Martin Vogt Add Fujitsu Siemens Computer (FSC) 0x1734 bcm 5751 0x105d support
+ */
+
+#include "etherboot.h"
+#include "nic.h"
+#include <errno.h>
+#include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
+#include "string.h"
+#include <mii.h>
+#include "tg3.h"
+
+#define SUPPORT_COPPER_PHY  1
+#define SUPPORT_FIBER_PHY   1
+#define SUPPORT_LINK_REPORT 1
+#define SUPPORT_PARTNO_STR  1
+#define SUPPORT_PHY_STR     1
+
+static struct tg3 tg3;
+
+/* These numbers seem to be hard coded in the NIC firmware somehow.
+ * You can't change the ring sizes, but you can change where you place
+ * them in the NIC onboard memory.
+ */
+#define TG3_RX_RING_SIZE		512
+#define TG3_DEF_RX_RING_PENDING		20	/* RX_RING_PENDING seems to be o.k. at 20 and 200 */
+#define TG3_RX_RCB_RING_SIZE	1024
+
+/*	(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ? \
+	 512 : 1024) */
+#define TG3_TX_RING_SIZE		512
+#define TG3_DEF_TX_RING_PENDING		(TG3_TX_RING_SIZE - 1)
+
+#define TG3_RX_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RING_SIZE)
+#define TG3_RX_RCB_RING_BYTES	(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE)
+
+#define TG3_TX_RING_BYTES	(sizeof(struct tg3_tx_buffer_desc) * TG3_TX_RING_SIZE)
+#define NEXT_TX(N)		(((N) + 1) & (TG3_TX_RING_SIZE - 1))
+#define PREV_TX(N)		(((N) - 1) & (TG3_TX_RING_SIZE - 1))
+
+#define RX_PKT_BUF_SZ		(1536 + 2 + 64)
+
+struct eth_frame {
+	uint8_t  dst_addr[ETH_ALEN];
+	uint8_t  src_addr[ETH_ALEN];
+	uint16_t type;
+	uint8_t  data [ETH_FRAME_LEN - ETH_HLEN];
+};
+
+struct bss {
+	struct tg3_rx_buffer_desc rx_std[TG3_RX_RING_SIZE];
+	struct tg3_rx_buffer_desc rx_rcb[TG3_RX_RCB_RING_SIZE];
+	struct tg3_tx_buffer_desc tx_ring[TG3_TX_RING_SIZE];
+	struct tg3_hw_status      hw_status;
+	struct tg3_hw_stats       hw_stats;
+	unsigned char             rx_bufs[TG3_DEF_RX_RING_PENDING][RX_PKT_BUF_SZ];
+	struct eth_frame	  tx_frame[2];
+} tg3_bss __shared;
+
+/**
+ * pci_save_state - save the PCI configuration space of a device before suspending
+ * @dev: - PCI device that we're dealing with
+ * @buffer: - buffer to hold config space context
+ *
+ * @buffer must be large enough to hold the entire PCI 2.2 config space 
+ * (>= 64 bytes).
+ */
+static int pci_save_state(struct pci_device *dev, uint32_t *buffer)
+{
+	int i;
+	for (i = 0; i < 16; i++)
+		pci_read_config_dword(dev, i * 4,&buffer[i]);
+	return 0;
+}
+
+/** 
+ * pci_restore_state - Restore the saved state of a PCI device
+ * @dev: - PCI device that we're dealing with
+ * @buffer: - saved PCI config space
+ *
+ */
+static int pci_restore_state(struct pci_device *dev, uint32_t *buffer)
+{
+	int i;
+
+	for (i = 0; i < 16; i++)
+		pci_write_config_dword(dev,i * 4, buffer[i]);
+	return 0;
+}
+
+static void tg3_write_indirect_reg32(uint32_t off, uint32_t val)
+{
+	pci_write_config_dword(tg3.pdev, TG3PCI_REG_BASE_ADDR, off);
+	pci_write_config_dword(tg3.pdev, TG3PCI_REG_DATA, val);
+}
+
+#define tw32(reg,val)		tg3_write_indirect_reg32((reg),(val))
+#define tw32_mailbox(reg, val)	writel(((val) & 0xffffffff), tg3.regs + (reg))
+#define tw16(reg,val)		writew(((val) & 0xffff), tg3.regs + (reg))
+#define tw8(reg,val)		writeb(((val) & 0xff), tg3.regs + (reg))
+#define tr32(reg)		readl(tg3.regs + (reg))
+#define tr16(reg)		readw(tg3.regs + (reg))
+#define tr8(reg)		readb(tg3.regs + (reg))
+
+static void tw32_carefully(uint32_t reg, uint32_t val)
+{
+	tw32(reg, val);
+	tr32(reg);
+	udelay(100);
+}
+
+static void tw32_mailbox2(uint32_t reg, uint32_t val)
+{
+	tw32_mailbox(reg, val);
+	tr32(reg);
+}
+
+static void tg3_write_mem(uint32_t off, uint32_t val)
+{
+	pci_write_config_dword(tg3.pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
+	pci_write_config_dword(tg3.pdev, TG3PCI_MEM_WIN_DATA, val);
+
+	/* Always leave this as zero. */
+	pci_write_config_dword(tg3.pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
+}
+
+static void tg3_read_mem(uint32_t off, uint32_t *val)
+{
+	pci_write_config_dword(tg3.pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
+	pci_read_config_dword(tg3.pdev, TG3PCI_MEM_WIN_DATA, val);
+
+	/* Always leave this as zero. */
+	pci_write_config_dword(tg3.pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0);
+}
+
+static void tg3_disable_ints(struct tg3 *tp)
+{
+	tw32(TG3PCI_MISC_HOST_CTRL,
+	     (tp->misc_host_ctrl | MISC_HOST_CTRL_MASK_PCI_INT));
+	tw32_mailbox2(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001);
+}
+
+static void tg3_switch_clocks(struct tg3 *tp)
+{
+	uint32_t orig_clock_ctrl, clock_ctrl;
+
+	clock_ctrl = tr32(TG3PCI_CLOCK_CTRL);
+
+	orig_clock_ctrl = clock_ctrl;
+	clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN | CLOCK_CTRL_CLKRUN_OENABLE | 0x1f);
+	tp->pci_clock_ctrl = clock_ctrl;
+	
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) &&
+	    (!((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
+	       && (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) &&
+		(orig_clock_ctrl & CLOCK_CTRL_44MHZ_CORE)!=0) {
+		tw32_carefully(TG3PCI_CLOCK_CTRL, 
+			clock_ctrl | (CLOCK_CTRL_44MHZ_CORE | CLOCK_CTRL_ALTCLK));
+		tw32_carefully(TG3PCI_CLOCK_CTRL, 
+			clock_ctrl | (CLOCK_CTRL_ALTCLK));
+	}
+	tw32_carefully(TG3PCI_CLOCK_CTRL, clock_ctrl);
+}
+
+#define PHY_BUSY_LOOPS	5000
+
+static int tg3_readphy(struct tg3 *tp, int reg, uint32_t *val)
+{
+	uint32_t frame_val;
+	int loops, ret;
+
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL);
+
+	*val = 0xffffffff;
+
+	frame_val  = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) &
+		      MI_COM_PHY_ADDR_MASK);
+	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
+		      MI_COM_REG_ADDR_MASK);
+	frame_val |= (MI_COM_CMD_READ | MI_COM_START);
+	
+	tw32_carefully(MAC_MI_COM, frame_val);
+
+	loops = PHY_BUSY_LOOPS;
+	while (loops-- > 0) {
+		udelay(10);
+		frame_val = tr32(MAC_MI_COM);
+
+		if ((frame_val & MI_COM_BUSY) == 0) {
+			udelay(5);
+			frame_val = tr32(MAC_MI_COM);
+			break;
+		}
+	}
+
+	ret = -EBUSY;
+	if (loops > 0) {
+		*val = frame_val & MI_COM_DATA_MASK;
+		ret = 0;
+	}
+
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+
+	return ret;
+}
+
+static int tg3_writephy(struct tg3 *tp, int reg, uint32_t val)
+{
+	uint32_t frame_val;
+	int loops, ret;
+
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL);
+
+	frame_val  = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) &
+		      MI_COM_PHY_ADDR_MASK);
+	frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) &
+		      MI_COM_REG_ADDR_MASK);
+	frame_val |= (val & MI_COM_DATA_MASK);
+	frame_val |= (MI_COM_CMD_WRITE | MI_COM_START);
+	
+	tw32_carefully(MAC_MI_COM, frame_val);
+
+	loops = PHY_BUSY_LOOPS;
+	while (loops-- > 0) {
+		udelay(10);
+		frame_val = tr32(MAC_MI_COM);
+		if ((frame_val & MI_COM_BUSY) == 0) {
+			udelay(5);
+			frame_val = tr32(MAC_MI_COM);
+			break;
+		}
+	}
+
+	ret = -EBUSY;
+	if (loops > 0)
+		ret = 0;
+
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+
+	return ret;
+}
+
+static int tg3_writedsp(struct tg3 *tp, uint16_t addr, uint16_t val)
+{
+	int err;
+	err  = tg3_writephy(tp, MII_TG3_DSP_ADDRESS, addr);
+	err |= tg3_writephy(tp, MII_TG3_DSP_RW_PORT, val);
+	return err;
+}
+
+
+static void tg3_phy_set_wirespeed(struct tg3 *tp)
+{
+	uint32_t val;
+
+	if (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED)
+		return;
+
+	tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x7007);
+	tg3_readphy(tp, MII_TG3_AUX_CTRL, &val);
+	tg3_writephy(tp, MII_TG3_AUX_CTRL, (val | (1 << 15) | (1 << 4)));
+}
+
+static int tg3_bmcr_reset(struct tg3 *tp)
+{
+	uint32_t phy_control;
+	int limit, err;
+
+	/* OK, reset it, and poll the BMCR_RESET bit until it
+	 * clears or we time out.
+	 */
+	phy_control = BMCR_RESET;
+	err = tg3_writephy(tp, MII_BMCR, phy_control);
+	if (err != 0)
+		return -EBUSY;
+
+	limit = 5000;
+	while (limit--) {
+		err = tg3_readphy(tp, MII_BMCR, &phy_control);
+		if (err != 0)
+			return -EBUSY;
+
+		if ((phy_control & BMCR_RESET) == 0) {
+			udelay(40);
+			break;
+		}
+		udelay(10);
+	}
+	if (limit <= 0)
+		return -EBUSY;
+
+	return 0;
+}
+
+static int tg3_wait_macro_done(struct tg3 *tp)
+{
+	int limit = 100;
+
+	while (limit--) {
+		uint32_t tmp32;
+
+		tg3_readphy(tp, 0x16, &tmp32);
+		if ((tmp32 & 0x1000) == 0)
+			break;
+	}
+	if (limit <= 0)
+		return -EBUSY;
+
+	return 0;
+}
+
+static int tg3_phy_write_and_check_testpat(struct tg3 *tp, int *resetp)
+{
+	static const uint32_t test_pat[4][6] = {
+	{ 0x00005555, 0x00000005, 0x00002aaa, 0x0000000a, 0x00003456, 0x00000003 },
+	{ 0x00002aaa, 0x0000000a, 0x00003333, 0x00000003, 0x0000789a, 0x00000005 },
+	{ 0x00005a5a, 0x00000005, 0x00002a6a, 0x0000000a, 0x00001bcd, 0x00000003 },
+	{ 0x00002a5a, 0x0000000a, 0x000033c3, 0x00000003, 0x00002ef1, 0x00000005 }
+	};
+	int chan;
+
+	for (chan = 0; chan < 4; chan++) {
+		int i;
+
+		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
+			(chan * 0x2000) | 0x0200);
+		tg3_writephy(tp, 0x16, 0x0002);
+
+		for (i = 0; i < 6; i++)
+			tg3_writephy(tp, MII_TG3_DSP_RW_PORT,
+				test_pat[chan][i]);
+
+		tg3_writephy(tp, 0x16, 0x0202);
+		if (tg3_wait_macro_done(tp)) {
+			*resetp = 1;
+			return -EBUSY;
+		}
+
+		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
+			     (chan * 0x2000) | 0x0200);
+		tg3_writephy(tp, 0x16, 0x0082);
+		if (tg3_wait_macro_done(tp)) {
+			*resetp = 1;
+			return -EBUSY;
+		}
+
+		tg3_writephy(tp, 0x16, 0x0802);
+		if (tg3_wait_macro_done(tp)) {
+			*resetp = 1;
+			return -EBUSY;
+		}
+
+		for (i = 0; i < 6; i += 2) {
+			uint32_t low, high;
+
+			tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &low);
+			tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high);
+			if (tg3_wait_macro_done(tp)) {
+				*resetp = 1;
+				return -EBUSY;
+			}
+			low &= 0x7fff;
+			high &= 0x000f;
+			if (low != test_pat[chan][i] ||
+			    high != test_pat[chan][i+1]) {
+				tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000b);
+				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4001);
+				tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x4005);
+
+				return -EBUSY;
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int tg3_phy_reset_chanpat(struct tg3 *tp)
+{
+	int chan;
+
+	for (chan = 0; chan < 4; chan++) {
+		int i;
+
+		tg3_writephy(tp, MII_TG3_DSP_ADDRESS,
+			     (chan * 0x2000) | 0x0200);
+		tg3_writephy(tp, 0x16, 0x0002);
+		for (i = 0; i < 6; i++)
+			tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x000);
+		tg3_writephy(tp, 0x16, 0x0202);
+		if (tg3_wait_macro_done(tp))
+			return -EBUSY;
+	}
+
+	return 0;
+}
+
+static int tg3_phy_reset_5703_4_5(struct tg3 *tp)
+{
+	uint32_t reg32, phy9_orig;
+	int retries, do_phy_reset, err;
+
+	retries = 10;
+	do_phy_reset = 1;
+	do {
+		if (do_phy_reset) {
+			err = tg3_bmcr_reset(tp);
+			if (err)
+				return err;
+			do_phy_reset = 0;
+		}
+		
+		/* Disable transmitter and interrupt.  */
+		tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32);
+		reg32 |= 0x3000;
+		tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
+
+		/* Set full-duplex, 1000 mbps.  */
+		tg3_writephy(tp, MII_BMCR,
+			BMCR_FULLDPLX | TG3_BMCR_SPEED1000);
+
+		/* Set to master mode.  */
+		tg3_readphy(tp, MII_TG3_CTRL, &phy9_orig);
+		tg3_writephy(tp, MII_TG3_CTRL,
+			(MII_TG3_CTRL_AS_MASTER |
+				MII_TG3_CTRL_ENABLE_AS_MASTER));
+
+		/* Enable SM_DSP_CLOCK and 6dB.  */
+		tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
+
+		/* Block the PHY control access.  */
+		tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
+		tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0800);
+
+		err = tg3_phy_write_and_check_testpat(tp, &do_phy_reset);
+		if (!err)
+			break;
+	} while (--retries);
+
+	err = tg3_phy_reset_chanpat(tp);
+	if (err)
+		return err;
+
+	tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8005);
+	tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x0000);
+
+	tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x8200);
+	tg3_writephy(tp, 0x16, 0x0000);
+
+	tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
+
+	tg3_writephy(tp, MII_TG3_CTRL, phy9_orig);
+
+	tg3_readphy(tp, MII_TG3_EXT_CTRL, &reg32);
+	reg32 &= ~0x3000;
+	tg3_writephy(tp, MII_TG3_EXT_CTRL, reg32);
+
+	return err;
+}
+
+/* This will reset the tigon3 PHY if there is no valid
+ * link.
+ */
+static int tg3_phy_reset(struct tg3 *tp)
+{
+	uint32_t phy_status;
+	int err;
+
+	err  = tg3_readphy(tp, MII_BMSR, &phy_status);
+	err |= tg3_readphy(tp, MII_BMSR, &phy_status);
+	if (err != 0)
+		return -EBUSY;
+
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) ||
+		(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
+		(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)) {
+		err = tg3_phy_reset_5703_4_5(tp);
+		if (err)
+			return err;
+		goto out;
+	}
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
+	  // Taken from Broadcom's source code
+	  tg3_writephy(tp, 0x18, 0x0c00);
+	  tg3_writephy(tp, 0x17, 0x000a);
+	  tg3_writephy(tp, 0x15, 0x310b);
+	  tg3_writephy(tp, 0x17, 0x201f);
+	  tg3_writephy(tp, 0x15, 0x9506);
+	  tg3_writephy(tp, 0x17, 0x401f);
+	  tg3_writephy(tp, 0x15, 0x14e2);
+	  tg3_writephy(tp, 0x18, 0x0400);
+	}
+	err = tg3_bmcr_reset(tp);
+	if (err)
+		return err;
+ out:
+	tg3_phy_set_wirespeed(tp);
+	return 0;
+}
+
+static void tg3_set_power_state_0(struct tg3 *tp)
+{
+	uint16_t power_control;
+	int pm = tp->pm_cap;
+
+	/* Make sure register accesses (indirect or otherwise)
+	 * will function correctly.
+	 */
+	pci_write_config_dword(tp->pdev,  TG3PCI_MISC_HOST_CTRL, tp->misc_host_ctrl);
+
+	pci_read_config_word(tp->pdev, pm + PCI_PM_CTRL, &power_control);
+
+	power_control |= PCI_PM_CTRL_PME_STATUS;
+	power_control &= ~(PCI_PM_CTRL_STATE_MASK);
+	power_control |= 0;
+	pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
+
+	tw32_carefully(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
+
+	return;
+}
+
+
+#if SUPPORT_LINK_REPORT
+static void tg3_link_report(struct tg3 *tp)
+{
+	if (!tp->carrier_ok) {
+		printf("Link is down.\n");
+	} else {
+		printf("Link is up at %d Mbps, %s duplex. %s %s %s\n",
+			(tp->link_config.active_speed == SPEED_1000 ?
+			       1000 :
+			(tp->link_config.active_speed == SPEED_100 ?
+				100 : 10)),
+			(tp->link_config.active_duplex == DUPLEX_FULL ?  
+				"full" : "half"),
+			(tp->tg3_flags & TG3_FLAG_TX_PAUSE) ? "TX" : "",
+			(tp->tg3_flags & TG3_FLAG_RX_PAUSE) ? "RX" : "",
+			(tp->tg3_flags & (TG3_FLAG_TX_PAUSE |TG3_FLAG_RX_PAUSE)) ? "flow control" : "");
+	}
+}
+#else
+#define tg3_link_report(tp)
+#endif
+
+static void tg3_setup_flow_control(struct tg3 *tp, uint32_t local_adv, uint32_t remote_adv)
+{
+	uint32_t new_tg3_flags = 0;
+
+	if (local_adv & ADVERTISE_PAUSE_CAP) {
+		if (local_adv & ADVERTISE_PAUSE_ASYM) {
+			if (remote_adv & LPA_PAUSE_CAP)
+				new_tg3_flags |=
+					(TG3_FLAG_RX_PAUSE |
+					 TG3_FLAG_TX_PAUSE);
+			else if (remote_adv & LPA_PAUSE_ASYM)
+				new_tg3_flags |=
+					(TG3_FLAG_RX_PAUSE);
+		} else {
+			if (remote_adv & LPA_PAUSE_CAP)
+				new_tg3_flags |=
+					(TG3_FLAG_RX_PAUSE |
+					 TG3_FLAG_TX_PAUSE);
+		}
+	} else if (local_adv & ADVERTISE_PAUSE_ASYM) {
+		if ((remote_adv & LPA_PAUSE_CAP) &&
+		    (remote_adv & LPA_PAUSE_ASYM))
+			new_tg3_flags |= TG3_FLAG_TX_PAUSE;
+	}
+
+	tp->tg3_flags &= ~(TG3_FLAG_RX_PAUSE | TG3_FLAG_TX_PAUSE);
+	tp->tg3_flags |= new_tg3_flags;
+
+	if (new_tg3_flags & TG3_FLAG_RX_PAUSE)
+		tp->rx_mode |= RX_MODE_FLOW_CTRL_ENABLE;
+	else
+		tp->rx_mode &= ~RX_MODE_FLOW_CTRL_ENABLE;
+
+	if (new_tg3_flags & TG3_FLAG_TX_PAUSE)
+		tp->tx_mode |= TX_MODE_FLOW_CTRL_ENABLE;
+	else
+		tp->tx_mode &= ~TX_MODE_FLOW_CTRL_ENABLE;
+}
+
+#if SUPPORT_COPPER_PHY
+static void tg3_aux_stat_to_speed_duplex(
+	struct tg3 *tp __unused, uint32_t val, uint8_t *speed, uint8_t *duplex)
+{
+	static const uint8_t map[] = {
+		[0] = (SPEED_INVALID << 2) | DUPLEX_INVALID,
+		[MII_TG3_AUX_STAT_10HALF >> 8]   = (SPEED_10 << 2) | DUPLEX_HALF,
+		[MII_TG3_AUX_STAT_10FULL >> 8]   = (SPEED_10 << 2) | DUPLEX_FULL,
+		[MII_TG3_AUX_STAT_100HALF >> 8]  = (SPEED_100 << 2) | DUPLEX_HALF,
+		[MII_TG3_AUX_STAT_100_4 >> 8] = (SPEED_INVALID << 2) | DUPLEX_INVALID,
+		[MII_TG3_AUX_STAT_100FULL >> 8]  = (SPEED_100 << 2) | DUPLEX_FULL,
+		[MII_TG3_AUX_STAT_1000HALF >> 8] = (SPEED_1000 << 2) | DUPLEX_HALF,
+		[MII_TG3_AUX_STAT_1000FULL >> 8] = (SPEED_1000 << 2) | DUPLEX_FULL,
+	};
+	uint8_t result;
+	result = map[(val & MII_TG3_AUX_STAT_SPDMASK) >> 8];
+	*speed = result >> 2;
+	*duplex = result & 3;
+}
+
+static int tg3_phy_copper_begin(struct tg3 *tp)
+{
+	uint32_t new_adv;
+
+	tp->link_config.advertising =
+		(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
+			ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
+			ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full |
+			ADVERTISED_Autoneg | ADVERTISED_MII);
+	
+	if (tp->tg3_flags & TG3_FLAG_10_100_ONLY) {
+		tp->link_config.advertising &=
+			~(ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full);
+	}
+	
+	new_adv = (ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
+	if (tp->link_config.advertising & ADVERTISED_10baseT_Half) {
+		new_adv |= ADVERTISE_10HALF;
+	}
+	if (tp->link_config.advertising & ADVERTISED_10baseT_Full) {
+		new_adv |= ADVERTISE_10FULL;
+	}
+	if (tp->link_config.advertising & ADVERTISED_100baseT_Half) {
+		new_adv |= ADVERTISE_100HALF;
+	}
+	if (tp->link_config.advertising & ADVERTISED_100baseT_Full) {
+		new_adv |= ADVERTISE_100FULL;
+	}
+	tg3_writephy(tp, MII_ADVERTISE, new_adv);
+	
+	if (tp->link_config.advertising &
+		(ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full)) {
+		new_adv = 0;
+		if (tp->link_config.advertising & ADVERTISED_1000baseT_Half) {
+			new_adv |= MII_TG3_CTRL_ADV_1000_HALF;
+		}
+		if (tp->link_config.advertising & ADVERTISED_1000baseT_Full) {
+			new_adv |= MII_TG3_CTRL_ADV_1000_FULL;
+		}
+		if (!(tp->tg3_flags & TG3_FLAG_10_100_ONLY) &&
+			(tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
+				tp->pci_chip_rev_id == CHIPREV_ID_5701_B0)) {
+			new_adv |= (MII_TG3_CTRL_AS_MASTER |
+				MII_TG3_CTRL_ENABLE_AS_MASTER);
+		}
+		tg3_writephy(tp, MII_TG3_CTRL, new_adv);
+	} else {
+		tg3_writephy(tp, MII_TG3_CTRL, 0);
+	}
+
+	tg3_writephy(tp, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
+
+	return 0;
+}
+
+static int tg3_init_5401phy_dsp(struct tg3 *tp)
+{
+	int err;
+
+	/* Turn off tap power management. */
+	err  = tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c20);
+	
+	err |= tg3_writedsp(tp, 0x0012, 0x1804);
+	err |= tg3_writedsp(tp, 0x0013, 0x1204);
+	err |= tg3_writedsp(tp, 0x8006, 0x0132);
+	err |= tg3_writedsp(tp, 0x8006, 0x0232);
+	err |= tg3_writedsp(tp, 0x201f, 0x0a20);
+
+	udelay(40);
+
+	return err;
+}
+
+static int tg3_setup_copper_phy(struct tg3 *tp)
+{
+	int current_link_up;
+	uint32_t bmsr, dummy;
+	int i, err;
+
+	tw32_carefully(MAC_STATUS,
+		(MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED
+		 | MAC_STATUS_LNKSTATE_CHANGED));
+
+	tp->mi_mode = MAC_MI_MODE_BASE;
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+
+	tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x02);
+
+	/* Some third-party PHYs need to be reset on link going
+	 * down.
+	 */
+	if (	(	(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) ||
+			(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
+			(tp->pci_chip_rev_id == CHIPREV_ID_5705_A0)) &&
+		(tp->carrier_ok)) {
+		tg3_readphy(tp, MII_BMSR, &bmsr);
+		tg3_readphy(tp, MII_BMSR, &bmsr);
+		if (!(bmsr & BMSR_LSTATUS))
+			tg3_phy_reset(tp);
+	}
+
+	if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
+		tg3_readphy(tp, MII_BMSR, &bmsr);
+		tg3_readphy(tp, MII_BMSR, &bmsr);
+
+		if (!(tp->tg3_flags & TG3_FLAG_INIT_COMPLETE))
+			bmsr = 0;
+
+		if (!(bmsr & BMSR_LSTATUS)) {
+			err = tg3_init_5401phy_dsp(tp);
+			if (err)
+				return err;
+
+			tg3_readphy(tp, MII_BMSR, &bmsr);
+			for (i = 0; i < 1000; i++) {
+				udelay(10);
+				tg3_readphy(tp, MII_BMSR, &bmsr);
+				if (bmsr & BMSR_LSTATUS) {
+					udelay(40);
+					break;
+				}
+			}
+
+			if ((tp->phy_id & PHY_ID_REV_MASK) == PHY_REV_BCM5401_B0 &&
+			    !(bmsr & BMSR_LSTATUS) &&
+			    tp->link_config.active_speed == SPEED_1000) {
+				err = tg3_phy_reset(tp);
+				if (!err)
+					err = tg3_init_5401phy_dsp(tp);
+				if (err)
+					return err;
+			}
+		}
+	} else if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
+		   tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) {
+		/* 5701 {A0,B0} CRC bug workaround */
+		tg3_writephy(tp, 0x15, 0x0a75);
+		tg3_writephy(tp, 0x1c, 0x8c68);
+		tg3_writephy(tp, 0x1c, 0x8d68);
+		tg3_writephy(tp, 0x1c, 0x8c68);
+	}
+
+	/* Clear pending interrupts... */
+	tg3_readphy(tp, MII_TG3_ISTAT, &dummy);
+	tg3_readphy(tp, MII_TG3_ISTAT, &dummy);
+
+	tg3_writephy(tp, MII_TG3_IMASK, ~0);
+
+	if (tp->led_mode == led_mode_three_link)
+		tg3_writephy(tp, MII_TG3_EXT_CTRL,
+			     MII_TG3_EXT_CTRL_LNK3_LED_MODE);
+	else
+		tg3_writephy(tp, MII_TG3_EXT_CTRL, 0);
+
+	current_link_up = 0;
+
+	tg3_readphy(tp, MII_BMSR, &bmsr);
+	tg3_readphy(tp, MII_BMSR, &bmsr);
+
+	if (bmsr & BMSR_LSTATUS) {
+		uint32_t aux_stat, bmcr;
+
+		tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat);
+		for (i = 0; i < 2000; i++) {
+			udelay(10);
+			tg3_readphy(tp, MII_TG3_AUX_STAT, &aux_stat);
+			if (aux_stat)
+				break;
+		}
+
+		tg3_aux_stat_to_speed_duplex(tp, aux_stat,
+			&tp->link_config.active_speed,
+			&tp->link_config.active_duplex);
+		tg3_readphy(tp, MII_BMCR, &bmcr);
+		tg3_readphy(tp, MII_BMCR, &bmcr);
+		if (bmcr & BMCR_ANENABLE) {
+			uint32_t gig_ctrl;
+			
+			current_link_up = 1;
+			
+			/* Force autoneg restart if we are exiting
+			 * low power mode.
+			 */
+			tg3_readphy(tp, MII_TG3_CTRL, &gig_ctrl);
+			if (!(gig_ctrl & (MII_TG3_CTRL_ADV_1000_HALF |
+				      MII_TG3_CTRL_ADV_1000_FULL))) {
+				current_link_up = 0;
+			}
+		} else {
+			current_link_up = 0;
+		}
+	}
+
+	if (current_link_up == 1 &&
+		(tp->link_config.active_duplex == DUPLEX_FULL)) {
+		uint32_t local_adv, remote_adv;
+
+		tg3_readphy(tp, MII_ADVERTISE, &local_adv);
+		local_adv &= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
+
+		tg3_readphy(tp, MII_LPA, &remote_adv);
+		remote_adv &= (LPA_PAUSE_CAP | LPA_PAUSE_ASYM);
+
+		/* If we are not advertising full pause capability,
+		 * something is wrong.  Bring the link down and reconfigure.
+		 */
+		if (local_adv != ADVERTISE_PAUSE_CAP) {
+			current_link_up = 0;
+		} else {
+			tg3_setup_flow_control(tp, local_adv, remote_adv);
+		}
+	}
+
+	if (current_link_up == 0) {
+		uint32_t tmp;
+
+		tg3_phy_copper_begin(tp);
+
+		tg3_readphy(tp, MII_BMSR, &tmp);
+		tg3_readphy(tp, MII_BMSR, &tmp);
+		if (tmp & BMSR_LSTATUS)
+			current_link_up = 1;
+	}
+
+	tp->mac_mode &= ~MAC_MODE_PORT_MODE_MASK;
+	if (current_link_up == 1) {
+		if (tp->link_config.active_speed == SPEED_100 ||
+		    tp->link_config.active_speed == SPEED_10)
+			tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
+		else
+			tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
+	} else
+		tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
+
+	tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX;
+	if (tp->link_config.active_duplex == DUPLEX_HALF)
+		tp->mac_mode |= MAC_MODE_HALF_DUPLEX;
+
+	tp->mac_mode &= ~MAC_MODE_LINK_POLARITY;
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) {
+		if ((tp->led_mode == led_mode_link10) ||
+		    (current_link_up == 1 &&
+		     tp->link_config.active_speed == SPEED_10))
+			tp->mac_mode |= MAC_MODE_LINK_POLARITY;
+	} else {
+		if (current_link_up == 1)
+			tp->mac_mode |= MAC_MODE_LINK_POLARITY;
+		tw32(MAC_LED_CTRL, LED_CTRL_PHY_MODE_1);
+	}
+
+	/* ??? Without this setting Netgear GA302T PHY does not
+	 * ??? send/receive packets...
+	 * With this other PHYs cannot bring up the link
+	 */
+	if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5411 &&
+		tp->pci_chip_rev_id == CHIPREV_ID_5700_ALTIMA) {
+		tp->mi_mode |= MAC_MI_MODE_AUTO_POLL;
+		tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+	}
+
+	tw32_carefully(MAC_MODE, tp->mac_mode);
+
+	/* Link change polled. */
+	tw32_carefully(MAC_EVENT, 0);
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 &&
+	    current_link_up == 1 &&
+	    tp->link_config.active_speed == SPEED_1000 &&
+	    ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ||
+	     (tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED))) {
+		udelay(120);
+		tw32_carefully(MAC_STATUS,
+			(MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED));
+		tg3_write_mem(
+			      NIC_SRAM_FIRMWARE_MBOX,
+			      NIC_SRAM_FIRMWARE_MBOX_MAGIC2);
+	}
+
+	if (current_link_up != tp->carrier_ok) {
+		tp->carrier_ok = current_link_up;
+		tg3_link_report(tp);
+	}
+
+	return 0;
+}
+#else
+#define tg3_setup_copper_phy(TP) (-EINVAL)
+#endif /* SUPPORT_COPPER_PHY */
+
+#if SUPPORT_FIBER_PHY
+struct tg3_fiber_aneginfo {
+	int state;
+#define ANEG_STATE_UNKNOWN		0
+#define ANEG_STATE_AN_ENABLE		1
+#define ANEG_STATE_RESTART_INIT		2
+#define ANEG_STATE_RESTART		3
+#define ANEG_STATE_DISABLE_LINK_OK	4
+#define ANEG_STATE_ABILITY_DETECT_INIT	5
+#define ANEG_STATE_ABILITY_DETECT	6
+#define ANEG_STATE_ACK_DETECT_INIT	7
+#define ANEG_STATE_ACK_DETECT		8
+#define ANEG_STATE_COMPLETE_ACK_INIT	9
+#define ANEG_STATE_COMPLETE_ACK		10
+#define ANEG_STATE_IDLE_DETECT_INIT	11
+#define ANEG_STATE_IDLE_DETECT		12
+#define ANEG_STATE_LINK_OK		13
+#define ANEG_STATE_NEXT_PAGE_WAIT_INIT	14
+#define ANEG_STATE_NEXT_PAGE_WAIT	15
+
+	uint32_t flags;
+#define MR_AN_ENABLE		0x00000001
+#define MR_RESTART_AN		0x00000002
+#define MR_AN_COMPLETE		0x00000004
+#define MR_PAGE_RX		0x00000008
+#define MR_NP_LOADED		0x00000010
+#define MR_TOGGLE_TX		0x00000020
+#define MR_LP_ADV_FULL_DUPLEX	0x00000040
+#define MR_LP_ADV_HALF_DUPLEX	0x00000080
+#define MR_LP_ADV_SYM_PAUSE	0x00000100
+#define MR_LP_ADV_ASYM_PAUSE	0x00000200
+#define MR_LP_ADV_REMOTE_FAULT1	0x00000400
+#define MR_LP_ADV_REMOTE_FAULT2	0x00000800
+#define MR_LP_ADV_NEXT_PAGE	0x00001000
+#define MR_TOGGLE_RX		0x00002000
+#define MR_NP_RX		0x00004000
+
+#define MR_LINK_OK		0x80000000
+
+	unsigned long link_time, cur_time;
+
+	uint32_t ability_match_cfg;
+	int ability_match_count;
+
+	char ability_match, idle_match, ack_match;
+
+	uint32_t txconfig, rxconfig;
+#define ANEG_CFG_NP		0x00000080
+#define ANEG_CFG_ACK		0x00000040
+#define ANEG_CFG_RF2		0x00000020
+#define ANEG_CFG_RF1		0x00000010
+#define ANEG_CFG_PS2		0x00000001
+#define ANEG_CFG_PS1		0x00008000
+#define ANEG_CFG_HD		0x00004000
+#define ANEG_CFG_FD		0x00002000
+#define ANEG_CFG_INVAL		0x00001f06
+
+};
+#define ANEG_OK		0
+#define ANEG_DONE	1
+#define ANEG_TIMER_ENAB	2
+#define ANEG_FAILED	-1
+
+#define ANEG_STATE_SETTLE_TIME	10000
+
+static int tg3_fiber_aneg_smachine(struct tg3 *tp,
+				   struct tg3_fiber_aneginfo *ap)
+{
+	unsigned long delta;
+	uint32_t rx_cfg_reg;
+	int ret;
+
+	if (ap->state == ANEG_STATE_UNKNOWN) {
+		ap->rxconfig = 0;
+		ap->link_time = 0;
+		ap->cur_time = 0;
+		ap->ability_match_cfg = 0;
+		ap->ability_match_count = 0;
+		ap->ability_match = 0;
+		ap->idle_match = 0;
+		ap->ack_match = 0;
+	}
+	ap->cur_time++;
+
+	if (tr32(MAC_STATUS) & MAC_STATUS_RCVD_CFG) {
+		rx_cfg_reg = tr32(MAC_RX_AUTO_NEG);
+
+		if (rx_cfg_reg != ap->ability_match_cfg) {
+			ap->ability_match_cfg = rx_cfg_reg;
+			ap->ability_match = 0;
+			ap->ability_match_count = 0;
+		} else {
+			if (++ap->ability_match_count > 1) {
+				ap->ability_match = 1;
+				ap->ability_match_cfg = rx_cfg_reg;
+			}
+		}
+		if (rx_cfg_reg & ANEG_CFG_ACK)
+			ap->ack_match = 1;
+		else
+			ap->ack_match = 0;
+
+		ap->idle_match = 0;
+	} else {
+		ap->idle_match = 1;
+		ap->ability_match_cfg = 0;
+		ap->ability_match_count = 0;
+		ap->ability_match = 0;
+		ap->ack_match = 0;
+
+		rx_cfg_reg = 0;
+	}
+
+	ap->rxconfig = rx_cfg_reg;
+	ret = ANEG_OK;
+
+	switch(ap->state) {
+	case ANEG_STATE_UNKNOWN:
+		if (ap->flags & (MR_AN_ENABLE | MR_RESTART_AN))
+			ap->state = ANEG_STATE_AN_ENABLE;
+
+		/* fallthru */
+	case ANEG_STATE_AN_ENABLE:
+		ap->flags &= ~(MR_AN_COMPLETE | MR_PAGE_RX);
+		if (ap->flags & MR_AN_ENABLE) {
+			ap->link_time = 0;
+			ap->cur_time = 0;
+			ap->ability_match_cfg = 0;
+			ap->ability_match_count = 0;
+			ap->ability_match = 0;
+			ap->idle_match = 0;
+			ap->ack_match = 0;
+
+			ap->state = ANEG_STATE_RESTART_INIT;
+		} else {
+			ap->state = ANEG_STATE_DISABLE_LINK_OK;
+		}
+		break;
+
+	case ANEG_STATE_RESTART_INIT:
+		ap->link_time = ap->cur_time;
+		ap->flags &= ~(MR_NP_LOADED);
+		ap->txconfig = 0;
+		tw32(MAC_TX_AUTO_NEG, 0);
+		tp->mac_mode |= MAC_MODE_SEND_CONFIGS;
+		tw32_carefully(MAC_MODE, tp->mac_mode);
+
+		ret = ANEG_TIMER_ENAB;
+		ap->state = ANEG_STATE_RESTART;
+
+		/* fallthru */
+	case ANEG_STATE_RESTART:
+		delta = ap->cur_time - ap->link_time;
+		if (delta > ANEG_STATE_SETTLE_TIME) {
+			ap->state = ANEG_STATE_ABILITY_DETECT_INIT;
+		} else {
+			ret = ANEG_TIMER_ENAB;
+		}
+		break;
+
+	case ANEG_STATE_DISABLE_LINK_OK:
+		ret = ANEG_DONE;
+		break;
+
+	case ANEG_STATE_ABILITY_DETECT_INIT:
+		ap->flags &= ~(MR_TOGGLE_TX);
+		ap->txconfig = (ANEG_CFG_FD | ANEG_CFG_PS1);
+		tw32(MAC_TX_AUTO_NEG, ap->txconfig);
+		tp->mac_mode |= MAC_MODE_SEND_CONFIGS;
+		tw32_carefully(MAC_MODE, tp->mac_mode);
+
+		ap->state = ANEG_STATE_ABILITY_DETECT;
+		break;
+
+	case ANEG_STATE_ABILITY_DETECT:
+		if (ap->ability_match != 0 && ap->rxconfig != 0) {
+			ap->state = ANEG_STATE_ACK_DETECT_INIT;
+		}
+		break;
+
+	case ANEG_STATE_ACK_DETECT_INIT:
+		ap->txconfig |= ANEG_CFG_ACK;
+		tw32(MAC_TX_AUTO_NEG, ap->txconfig);
+		tp->mac_mode |= MAC_MODE_SEND_CONFIGS;
+		tw32_carefully(MAC_MODE, tp->mac_mode);
+
+		ap->state = ANEG_STATE_ACK_DETECT;
+
+		/* fallthru */
+	case ANEG_STATE_ACK_DETECT:
+		if (ap->ack_match != 0) {
+			if ((ap->rxconfig & ~ANEG_CFG_ACK) ==
+			    (ap->ability_match_cfg & ~ANEG_CFG_ACK)) {
+				ap->state = ANEG_STATE_COMPLETE_ACK_INIT;
+			} else {
+				ap->state = ANEG_STATE_AN_ENABLE;
+			}
+		} else if (ap->ability_match != 0 &&
+			   ap->rxconfig == 0) {
+			ap->state = ANEG_STATE_AN_ENABLE;
+		}
+		break;
+
+	case ANEG_STATE_COMPLETE_ACK_INIT:
+		if (ap->rxconfig & ANEG_CFG_INVAL) {
+			ret = ANEG_FAILED;
+			break;
+		}
+		ap->flags &= ~(MR_LP_ADV_FULL_DUPLEX |
+			       MR_LP_ADV_HALF_DUPLEX |
+			       MR_LP_ADV_SYM_PAUSE |
+			       MR_LP_ADV_ASYM_PAUSE |
+			       MR_LP_ADV_REMOTE_FAULT1 |
+			       MR_LP_ADV_REMOTE_FAULT2 |
+			       MR_LP_ADV_NEXT_PAGE |
+			       MR_TOGGLE_RX |
+			       MR_NP_RX);
+		if (ap->rxconfig & ANEG_CFG_FD)
+			ap->flags |= MR_LP_ADV_FULL_DUPLEX;
+		if (ap->rxconfig & ANEG_CFG_HD)
+			ap->flags |= MR_LP_ADV_HALF_DUPLEX;
+		if (ap->rxconfig & ANEG_CFG_PS1)
+			ap->flags |= MR_LP_ADV_SYM_PAUSE;
+		if (ap->rxconfig & ANEG_CFG_PS2)
+			ap->flags |= MR_LP_ADV_ASYM_PAUSE;
+		if (ap->rxconfig & ANEG_CFG_RF1)
+			ap->flags |= MR_LP_ADV_REMOTE_FAULT1;
+		if (ap->rxconfig & ANEG_CFG_RF2)
+			ap->flags |= MR_LP_ADV_REMOTE_FAULT2;
+		if (ap->rxconfig & ANEG_CFG_NP)
+			ap->flags |= MR_LP_ADV_NEXT_PAGE;
+
+		ap->link_time = ap->cur_time;
+
+		ap->flags ^= (MR_TOGGLE_TX);
+		if (ap->rxconfig & 0x0008)
+			ap->flags |= MR_TOGGLE_RX;
+		if (ap->rxconfig & ANEG_CFG_NP)
+			ap->flags |= MR_NP_RX;
+		ap->flags |= MR_PAGE_RX;
+
+		ap->state = ANEG_STATE_COMPLETE_ACK;
+		ret = ANEG_TIMER_ENAB;
+		break;
+
+	case ANEG_STATE_COMPLETE_ACK:
+		if (ap->ability_match != 0 &&
+		    ap->rxconfig == 0) {
+			ap->state = ANEG_STATE_AN_ENABLE;
+			break;
+		}
+		delta = ap->cur_time - ap->link_time;
+		if (delta > ANEG_STATE_SETTLE_TIME) {
+			if (!(ap->flags & (MR_LP_ADV_NEXT_PAGE))) {
+				ap->state = ANEG_STATE_IDLE_DETECT_INIT;
+			} else {
+				if ((ap->txconfig & ANEG_CFG_NP) == 0 &&
+				    !(ap->flags & MR_NP_RX)) {
+					ap->state = ANEG_STATE_IDLE_DETECT_INIT;
+				} else {
+					ret = ANEG_FAILED;
+				}
+			}
+		}
+		break;
+
+	case ANEG_STATE_IDLE_DETECT_INIT:
+		ap->link_time = ap->cur_time;
+		tp->mac_mode &= ~MAC_MODE_SEND_CONFIGS;
+		tw32_carefully(MAC_MODE, tp->mac_mode);
+
+		ap->state = ANEG_STATE_IDLE_DETECT;
+		ret = ANEG_TIMER_ENAB;
+		break;
+
+	case ANEG_STATE_IDLE_DETECT:
+		if (ap->ability_match != 0 &&
+		    ap->rxconfig == 0) {
+			ap->state = ANEG_STATE_AN_ENABLE;
+			break;
+		}
+		delta = ap->cur_time - ap->link_time;
+		if (delta > ANEG_STATE_SETTLE_TIME) {
+			/* XXX another gem from the Broadcom driver :( */
+			ap->state = ANEG_STATE_LINK_OK;
+		}
+		break;
+
+	case ANEG_STATE_LINK_OK:
+		ap->flags |= (MR_AN_COMPLETE | MR_LINK_OK);
+		ret = ANEG_DONE;
+		break;
+
+	case ANEG_STATE_NEXT_PAGE_WAIT_INIT:
+		/* ??? unimplemented */
+		break;
+
+	case ANEG_STATE_NEXT_PAGE_WAIT:
+		/* ??? unimplemented */
+		break;
+
+	default:
+		ret = ANEG_FAILED;
+		break;
+	};
+
+	return ret;
+}
+
+static int tg3_setup_fiber_phy(struct tg3 *tp)
+{
+	uint32_t orig_pause_cfg;
+	uint16_t orig_active_speed;
+	uint8_t orig_active_duplex;
+	int current_link_up;
+	int i;
+
+	orig_pause_cfg =
+		(tp->tg3_flags & (TG3_FLAG_RX_PAUSE |
+				  TG3_FLAG_TX_PAUSE));
+	orig_active_speed = tp->link_config.active_speed;
+	orig_active_duplex = tp->link_config.active_duplex;
+
+	tp->mac_mode &= ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX);
+	tp->mac_mode |= MAC_MODE_PORT_MODE_TBI;
+	tw32_carefully(MAC_MODE, tp->mac_mode);
+
+	/* Reset when initting first time or we have a link. */
+	if (!(tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) ||
+	    (tr32(MAC_STATUS) & MAC_STATUS_PCS_SYNCED)) {
+		/* Set PLL lock range. */
+		tg3_writephy(tp, 0x16, 0x8007);
+
+		/* SW reset */
+		tg3_writephy(tp, MII_BMCR, BMCR_RESET);
+
+		/* Wait for reset to complete. */
+		mdelay(5);
+
+		/* Config mode; select PMA/Ch 1 regs. */
+		tg3_writephy(tp, 0x10, 0x8411);
+
+		/* Enable auto-lock and comdet, select txclk for tx. */
+		tg3_writephy(tp, 0x11, 0x0a10);
+
+		tg3_writephy(tp, 0x18, 0x00a0);
+		tg3_writephy(tp, 0x16, 0x41ff);
+
+		/* Assert and deassert POR. */
+		tg3_writephy(tp, 0x13, 0x0400);
+		udelay(40);
+		tg3_writephy(tp, 0x13, 0x0000);
+
+		tg3_writephy(tp, 0x11, 0x0a50);
+		udelay(40);
+		tg3_writephy(tp, 0x11, 0x0a10);
+
+		/* Wait for signal to stabilize */
+		mdelay(150);
+
+		/* Deselect the channel register so we can read the PHYID
+		 * later.
+		 */
+		tg3_writephy(tp, 0x10, 0x8011);
+	}
+
+	/* Disable link change interrupt.  */
+	tw32_carefully(MAC_EVENT, 0);
+
+	current_link_up = 0;
+	if (tr32(MAC_STATUS) & MAC_STATUS_PCS_SYNCED) {
+		if (!(tp->tg3_flags & TG3_FLAG_GOT_SERDES_FLOWCTL)) {
+			struct tg3_fiber_aneginfo aninfo;
+			int status = ANEG_FAILED;
+			unsigned int tick;
+			uint32_t tmp;
+
+			memset(&aninfo, 0, sizeof(aninfo));
+			aninfo.flags |= (MR_AN_ENABLE);
+
+			tw32(MAC_TX_AUTO_NEG, 0);
+
+			tmp = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK;
+			tw32_carefully(MAC_MODE, tmp | MAC_MODE_PORT_MODE_GMII);
+
+			tw32_carefully(MAC_MODE, tp->mac_mode | MAC_MODE_SEND_CONFIGS);
+
+			aninfo.state = ANEG_STATE_UNKNOWN;
+			aninfo.cur_time = 0;
+			tick = 0;
+			while (++tick < 195000) {
+				status = tg3_fiber_aneg_smachine(tp, &aninfo);
+				if (status == ANEG_DONE ||
+				    status == ANEG_FAILED)
+					break;
+
+				udelay(1);
+			}
+
+			tp->mac_mode &= ~MAC_MODE_SEND_CONFIGS;
+			tw32_carefully(MAC_MODE, tp->mac_mode);
+
+			if (status == ANEG_DONE &&
+			    (aninfo.flags &
+			     (MR_AN_COMPLETE | MR_LINK_OK |
+			      MR_LP_ADV_FULL_DUPLEX))) {
+				uint32_t local_adv, remote_adv;
+
+				local_adv = ADVERTISE_PAUSE_CAP;
+				remote_adv = 0;
+				if (aninfo.flags & MR_LP_ADV_SYM_PAUSE)
+					remote_adv |= LPA_PAUSE_CAP;
+				if (aninfo.flags & MR_LP_ADV_ASYM_PAUSE)
+					remote_adv |= LPA_PAUSE_ASYM;
+
+				tg3_setup_flow_control(tp, local_adv, remote_adv);
+
+				tp->tg3_flags |=
+					TG3_FLAG_GOT_SERDES_FLOWCTL;
+				current_link_up = 1;
+			}
+			for (i = 0; i < 60; i++) {
+				udelay(20);
+				tw32_carefully(MAC_STATUS,
+					(MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED));
+				if ((tr32(MAC_STATUS) &
+				     (MAC_STATUS_SYNC_CHANGED |
+				      MAC_STATUS_CFG_CHANGED)) == 0)
+					break;
+			}
+			if (current_link_up == 0 &&
+			    (tr32(MAC_STATUS) & MAC_STATUS_PCS_SYNCED)) {
+				current_link_up = 1;
+			}
+		} else {
+			/* Forcing 1000FD link up. */
+			current_link_up = 1;
+		}
+	}
+
+	tp->mac_mode &= ~MAC_MODE_LINK_POLARITY;
+	tw32_carefully(MAC_MODE, tp->mac_mode);
+
+	tp->hw_status->status =
+		(SD_STATUS_UPDATED |
+		 (tp->hw_status->status & ~SD_STATUS_LINK_CHG));
+
+	for (i = 0; i < 100; i++) {
+		udelay(20);
+		tw32_carefully(MAC_STATUS,
+			(MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED));
+		if ((tr32(MAC_STATUS) &
+		     (MAC_STATUS_SYNC_CHANGED |
+		      MAC_STATUS_CFG_CHANGED)) == 0)
+			break;
+	}
+
+	if ((tr32(MAC_STATUS) & MAC_STATUS_PCS_SYNCED) == 0)
+		current_link_up = 0;
+
+	if (current_link_up == 1) {
+		tp->link_config.active_speed = SPEED_1000;
+		tp->link_config.active_duplex = DUPLEX_FULL;
+	} else {
+		tp->link_config.active_speed = SPEED_INVALID;
+		tp->link_config.active_duplex = DUPLEX_INVALID;
+	}
+
+	if (current_link_up != tp->carrier_ok) {
+		tp->carrier_ok = current_link_up;
+		tg3_link_report(tp);
+	} else {
+		uint32_t now_pause_cfg =
+			tp->tg3_flags & (TG3_FLAG_RX_PAUSE |
+					 TG3_FLAG_TX_PAUSE);
+		if (orig_pause_cfg != now_pause_cfg ||
+		    orig_active_speed != tp->link_config.active_speed ||
+		    orig_active_duplex != tp->link_config.active_duplex)
+			tg3_link_report(tp);
+	}
+
+	if ((tr32(MAC_STATUS) & MAC_STATUS_PCS_SYNCED) == 0) {
+		tw32_carefully(MAC_MODE, tp->mac_mode | MAC_MODE_LINK_POLARITY);
+		if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) {
+			tw32_carefully(MAC_MODE, tp->mac_mode);
+		}
+	}
+
+	return 0;
+}
+#else
+#define tg3_setup_fiber_phy(TP) (-EINVAL)
+#endif /* SUPPORT_FIBER_PHY */
+
+static int tg3_setup_phy(struct tg3 *tp)
+{
+	int err;
+
+	if (tp->phy_id == PHY_ID_SERDES) {
+		err = tg3_setup_fiber_phy(tp);
+	} else {
+		err = tg3_setup_copper_phy(tp);
+	}
+
+	if (tp->link_config.active_speed == SPEED_1000 &&
+	    tp->link_config.active_duplex == DUPLEX_HALF)
+		tw32(MAC_TX_LENGTHS,
+		     ((2 << TX_LENGTHS_IPG_CRS_SHIFT) |
+		      (6 << TX_LENGTHS_IPG_SHIFT) |
+		      (0xff << TX_LENGTHS_SLOT_TIME_SHIFT)));
+	else
+		tw32(MAC_TX_LENGTHS,
+		     ((2 << TX_LENGTHS_IPG_CRS_SHIFT) |
+		      (6 << TX_LENGTHS_IPG_SHIFT) |
+		      (32 << TX_LENGTHS_SLOT_TIME_SHIFT)));
+
+	return err;
+}
+
+
+#define MAX_WAIT_CNT 1000
+
+/* To stop a block, clear the enable bit and poll till it
+ * clears.  
+ */
+static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, uint32_t enable_bit)
+{
+	unsigned int i;
+	uint32_t val;
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
+	    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
+		switch(ofs) {
+		case RCVLSC_MODE:
+		case DMAC_MODE:
+		case MBFREE_MODE:
+		case BUFMGR_MODE:
+		case MEMARB_MODE:
+			/* We can't enable/disable these bits of the
+			 * 5705 or 5787, just say success.
+			 */
+			return 0;
+		default:
+			break;
+		}
+	}
+	val = tr32(ofs);
+	val &= ~enable_bit;
+	tw32(ofs, val);
+	tr32(ofs);
+
+	for (i = 0; i < MAX_WAIT_CNT; i++) {
+		udelay(100);
+		val = tr32(ofs);
+		if ((val & enable_bit) == 0)
+			break;
+	}
+
+	if (i == MAX_WAIT_CNT) {
+		printf( "tg3_stop_block timed out, ofs=%#lx enable_bit=%3x\n",
+		       ofs, enable_bit );
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int tg3_abort_hw(struct tg3 *tp)
+{
+	int i, err;
+	uint32_t val;
+
+	tg3_disable_ints(tp);
+
+	tp->rx_mode &= ~RX_MODE_ENABLE;
+	tw32_carefully(MAC_RX_MODE, tp->rx_mode);
+
+	err  = tg3_stop_block(tp, RCVBDI_MODE,   RCVBDI_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RCVLPC_MODE,   RCVLPC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RCVLSC_MODE,   RCVLSC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RCVDBDI_MODE,  RCVDBDI_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RCVDCC_MODE,   RCVDCC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RCVCC_MODE,    RCVCC_MODE_ENABLE);
+
+	err |= tg3_stop_block(tp, SNDBDS_MODE,   SNDBDS_MODE_ENABLE);
+	err |= tg3_stop_block(tp, SNDBDI_MODE,   SNDBDI_MODE_ENABLE);
+	err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE);
+	err |= tg3_stop_block(tp, RDMAC_MODE,    RDMAC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, SNDBDC_MODE,   SNDBDC_MODE_ENABLE);
+	if (err)
+		goto out;
+
+	tp->mac_mode &= ~MAC_MODE_TDE_ENABLE;
+	tw32_carefully(MAC_MODE, tp->mac_mode);
+
+	tp->tx_mode &= ~TX_MODE_ENABLE;
+	tw32_carefully(MAC_TX_MODE, tp->tx_mode);
+
+	for (i = 0; i < MAX_WAIT_CNT; i++) {
+		udelay(100);
+		if (!(tr32(MAC_TX_MODE) & TX_MODE_ENABLE))
+			break;
+	}
+	if (i >= MAX_WAIT_CNT) {
+		printf("tg3_abort_hw timed out TX_MODE_ENABLE will not clear MAC_TX_MODE=%x\n",
+		       (unsigned int) tr32(MAC_TX_MODE));
+		return -ENODEV;
+	}
+
+	err  = tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, WDMAC_MODE,  WDMAC_MODE_ENABLE);
+	err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE);
+
+	val = tr32(FTQ_RESET);
+	val |= FTQ_RESET_DMA_READ_QUEUE | FTQ_RESET_DMA_HIGH_PRI_READ |
+	       FTQ_RESET_SEND_BD_COMPLETION | FTQ_RESET_DMA_WRITE |
+	       FTQ_RESET_DMA_HIGH_PRI_WRITE | FTQ_RESET_SEND_DATA_COMPLETION |
+	       FTQ_RESET_HOST_COALESCING | FTQ_RESET_MAC_TX |
+	       FTQ_RESET_RX_BD_COMPLETE | FTQ_RESET_RX_LIST_PLCMT |
+               FTQ_RESET_RX_DATA_COMPLETION;
+	tw32(FTQ_RESET, val);
+
+	err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE);
+	err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE);
+	if (err)
+		goto out;
+
+	memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
+
+out:
+	return err;
+}
+
+static void tg3_chip_reset(struct tg3 *tp)
+{
+	uint32_t val;
+
+	if (!(tp->tg3_flags2 & TG3_FLG2_SUN_5704)) {
+		/* Force NVRAM to settle.
+		 * This deals with a chip bug which can result in EEPROM
+		 * corruption.
+		 */
+		if (tp->tg3_flags & TG3_FLAG_NVRAM) {
+			int i;
+	
+			tw32(NVRAM_SWARB, SWARB_REQ_SET1);
+			for (i = 0; i < 100000; i++) {
+				if (tr32(NVRAM_SWARB) & SWARB_GNT1)
+					break;
+				udelay(10);
+			}
+		}
+	}
+	/* In Etherboot we don't need to worry about the 5701
+	 * REG_WRITE_BUG because we do all register writes indirectly.
+	 */
+
+	// Alf: here patched
+	/* do the reset */
+	val = GRC_MISC_CFG_CORECLK_RESET;
+	if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
+		if (tr32(0x7e2c) == 0x60) {
+			tw32(0x7e2c, 0x20);
+		}
+		if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
+			tw32(GRC_MISC_CFG, (1 << 29));
+			val |= (1 << 29);
+		}
+	}
+	
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)
+	    || (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
+	    || (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)) {
+		val |= GRC_MISC_CFG_KEEP_GPHY_POWER;
+	}
+
+	// Alf : Please VALIDATE THIS.
+	// It is necessary in my case (5751) to prevent a reboot, but
+	// I have no idea about a side effect on any other version.
+	// It appears to be what's done in tigon3.c from Broadcom
+	if (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
+	  tw32(GRC_MISC_CFG, 0x20000000) ;
+	  val |= 0x20000000 ;
+	}
+
+	tw32(GRC_MISC_CFG, val);
+
+	/* Flush PCI posted writes.  The normal MMIO registers
+	 * are inaccessible at this time so this is the only
+	 * way to make this reliably.  I tried to use indirect
+	 * register read/write but this upset some 5701 variants.
+	 */
+	pci_read_config_dword(tp->pdev, PCI_COMMAND, &val);
+
+	udelay(120);
+
+	/* Re-enable indirect register accesses. */
+	pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
+			       tp->misc_host_ctrl);
+
+	/* Set MAX PCI retry to zero. */
+	val = (PCISTATE_ROM_ENABLE | PCISTATE_ROM_RETRY_ENABLE);
+	if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
+	    (tp->tg3_flags & TG3_FLAG_PCIX_MODE))
+		val |= PCISTATE_RETRY_SAME_DMA;
+	pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
+
+	pci_restore_state(tp->pdev, tp->pci_cfg_state);
+
+	/* Make sure PCI-X relaxed ordering bit is clear. */
+	pci_read_config_dword(tp->pdev, TG3PCI_X_CAPS, &val);
+	val &= ~PCIX_CAPS_RELAXED_ORDERING;
+	pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
+
+	tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
+
+	if (((tp->nic_sram_data_cfg & NIC_SRAM_DATA_CFG_MINI_PCI) != 0) &&
+		(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)) {
+		tp->pci_clock_ctrl |=
+			(CLOCK_CTRL_FORCE_CLKRUN | CLOCK_CTRL_CLKRUN_OENABLE);
+		tw32(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
+	}
+
+	tw32(TG3PCI_MISC_HOST_CTRL, tp->misc_host_ctrl);
+}
+
+static void tg3_stop_fw(struct tg3 *tp)
+{
+	if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
+		uint32_t val;
+		int i;
+
+		tg3_write_mem(NIC_SRAM_FW_CMD_MBOX, FWCMD_NICDRV_PAUSE_FW);
+		val = tr32(GRC_RX_CPU_EVENT);
+		val |= (1 << 14);
+		tw32(GRC_RX_CPU_EVENT, val);
+
+		/* Wait for RX cpu to ACK the event.  */
+		for (i = 0; i < 100; i++) {
+			if (!(tr32(GRC_RX_CPU_EVENT) & (1 << 14)))
+				break;
+			udelay(1);
+		}
+	}
+}
+
+static int tg3_restart_fw(struct tg3 *tp, uint32_t state)
+{
+	uint32_t val;
+	int i;
+	
+	tg3_write_mem(NIC_SRAM_FIRMWARE_MBOX, 
+		NIC_SRAM_FIRMWARE_MBOX_MAGIC1);
+	/* Wait for firmware initialization to complete. */
+	for (i = 0; i < 100000; i++) {
+		tg3_read_mem(NIC_SRAM_FIRMWARE_MBOX, &val);
+		if (val == (uint32_t) ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
+			break;
+		udelay(10);
+	}
+	if (i >= 100000 &&
+		    !(tp->tg3_flags2 & TG3_FLG2_SUN_5704) &&
+		    !(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)) {
+		printf ( "Firmware will not restart magic=%#x\n",
+			val );
+		return -ENODEV;
+	}
+	if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
+	  state = DRV_STATE_SUSPEND;
+	}
+
+	if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
+	    (tp->pci_chip_rev_id != CHIPREV_ID_5750_A0)) {
+	  // Enable PCIE bug fix
+	  tg3_read_mem(0x7c00, &val);
+	  tg3_write_mem(0x7c00, val | 0x02000000);
+	}
+	tg3_write_mem(NIC_SRAM_FW_DRV_STATE_MBOX, state);
+	return 0;
+}
+
+static int tg3_halt(struct tg3 *tp)
+{
+	tg3_stop_fw(tp);
+	tg3_abort_hw(tp);
+	tg3_chip_reset(tp);
+	return tg3_restart_fw(tp, DRV_STATE_UNLOAD);
+}
+
+static void __tg3_set_mac_addr(struct tg3 *tp)
+{
+	uint32_t addr_high, addr_low;
+	int i;
+
+	addr_high = ((tp->nic->node_addr[0] << 8) |
+		     tp->nic->node_addr[1]);
+	addr_low = ((tp->nic->node_addr[2] << 24) |
+		    (tp->nic->node_addr[3] << 16) |
+		    (tp->nic->node_addr[4] <<  8) |
+		    (tp->nic->node_addr[5] <<  0));
+	for (i = 0; i < 4; i++) {
+		tw32(MAC_ADDR_0_HIGH + (i * 8), addr_high);
+		tw32(MAC_ADDR_0_LOW + (i * 8), addr_low);
+	}
+
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700) &&
+		(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) &&
+		(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705)) {
+		for(i = 0; i < 12; i++) {
+			tw32(MAC_EXTADDR_0_HIGH + (i * 8), addr_high);
+			tw32(MAC_EXTADDR_0_LOW + (i * 8), addr_low);
+		}
+	}
+	addr_high = (tp->nic->node_addr[0] +
+		     tp->nic->node_addr[1] +
+		     tp->nic->node_addr[2] +
+		     tp->nic->node_addr[3] +
+		     tp->nic->node_addr[4] +
+		     tp->nic->node_addr[5]) &
+		TX_BACKOFF_SEED_MASK;
+	tw32(MAC_TX_BACKOFF_SEED, addr_high);
+}
+
+static void tg3_set_bdinfo(struct tg3 *tp, uint32_t bdinfo_addr,
+			   dma_addr_t mapping, uint32_t maxlen_flags,
+			   uint32_t nic_addr)
+{
+	tg3_write_mem((bdinfo_addr +
+		       TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH),
+		      ((uint64_t) mapping >> 32));
+	tg3_write_mem((bdinfo_addr +
+		       TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW),
+		      ((uint64_t) mapping & 0xffffffff));
+	tg3_write_mem((bdinfo_addr +
+		       TG3_BDINFO_MAXLEN_FLAGS),
+		       maxlen_flags);
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
+		tg3_write_mem((bdinfo_addr + TG3_BDINFO_NIC_ADDR), nic_addr);
+	}
+}
+
+
+static void tg3_init_rings(struct tg3 *tp)
+{
+	unsigned i;
+
+	/* Zero out the tg3 variables */
+	memset(&tg3_bss, 0, sizeof(tg3_bss));
+	tp->rx_std    = &tg3_bss.rx_std[0];
+	tp->rx_rcb    = &tg3_bss.rx_rcb[0];
+	tp->tx_ring   = &tg3_bss.tx_ring[0];
+	tp->hw_status = &tg3_bss.hw_status;
+	tp->hw_stats  = &tg3_bss.hw_stats;
+	tp->mac_mode  = 0;
+
+
+	/* Initialize tx/rx rings for packet processing.
+	 *
+	 * The chip has been shut down and the driver detached from
+	 * the networking, so no interrupts or new tx packets will
+	 * end up in the driver.
+	 */
+
+	/* Initialize invariants of the rings, we only set this
+	 * stuff once.  This works because the card does not
+	 * write into the rx buffer posting rings.
+	 */
+	for (i = 0; i < TG3_RX_RING_SIZE; i++) {
+		struct tg3_rx_buffer_desc *rxd;
+
+		rxd = &tp->rx_std[i];
+		rxd->idx_len = (RX_PKT_BUF_SZ - 2 - 64)	<< RXD_LEN_SHIFT;
+		rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT);
+		rxd->opaque = (RXD_OPAQUE_RING_STD | (i << RXD_OPAQUE_INDEX_SHIFT));
+
+		/* Note where the receive buffer for the ring is placed */
+		rxd->addr_hi = 0;
+		rxd->addr_lo = virt_to_bus(
+			&tg3_bss.rx_bufs[i%TG3_DEF_RX_RING_PENDING][2]);
+	}
+}
+
+#define TG3_WRITE_SETTINGS(TABLE) \
+do { \
+	const uint32_t *_table, *_end; \
+	_table = TABLE; \
+	_end = _table + sizeof(TABLE)/sizeof(TABLE[0]);  \
+	for(; _table < _end; _table += 2) { \
+		tw32(_table[0], _table[1]); \
+	} \
+} while(0)
+
+
+/* initialize/reset the tg3 */
+static int tg3_setup_hw(struct tg3 *tp)
+{
+	uint32_t val, rdmac_mode;
+	int i, err, limit;
+
+	/* Simply don't support setups with extremly buggy firmware in etherboot */
+	if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0) {
+		printf("Error 5701_A0 firmware bug detected\n");
+		return -EINVAL;
+	}
+
+	tg3_disable_ints(tp);
+
+	/* Originally this was all in tg3_init_hw */
+
+	/* Force the chip into D0. */
+	tg3_set_power_state_0(tp);
+
+	tg3_switch_clocks(tp);
+
+	tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
+
+	// This should go somewhere else
+#define T3_PCIE_CAPABILITY_ID_REG           0xD0
+#define T3_PCIE_CAPABILITY_ID               0x10
+#define T3_PCIE_CAPABILITY_REG              0xD2
+
+	/* Originally this was all in tg3_reset_hw */
+
+	tg3_stop_fw(tp);
+
+	/* No need to call tg3_abort_hw here, it is called before tg3_setup_hw. */
+
+	tg3_chip_reset(tp);
+
+	tw32(GRC_MODE, tp->grc_mode);  /* Redundant? */
+
+	err = tg3_restart_fw(tp, DRV_STATE_START);
+	if (err)
+		return err;
+
+	if (tp->phy_id == PHY_ID_SERDES) {
+		tp->mac_mode = MAC_MODE_PORT_MODE_TBI;
+	}
+	tw32_carefully(MAC_MODE, tp->mac_mode);
+
+
+	/* This works around an issue with Athlon chipsets on
+	 * B3 tigon3 silicon.  This bit has no effect on any
+	 * other revision.
+	 * Alf: Except 5750 ! (which reboots)
+	 */
+
+        if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS))
+	  tp->pci_clock_ctrl |= CLOCK_CTRL_DELAY_PCI_GRANT;
+	tw32_carefully(TG3PCI_CLOCK_CTRL, tp->pci_clock_ctrl);
+
+	if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
+	    (tp->tg3_flags & TG3_FLAG_PCIX_MODE)) {
+		val = tr32(TG3PCI_PCISTATE);
+		val |= PCISTATE_RETRY_SAME_DMA;
+		tw32(TG3PCI_PCISTATE, val);
+	}
+
+	/* Descriptor ring init may make accesses to the
+	 * NIC SRAM area to setup the TX descriptors, so we
+	 * can only do this after the hardware has been
+	 * successfully reset.
+	 */
+	tg3_init_rings(tp);
+
+	/* Clear statistics/status block in chip */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
+		for (i = NIC_SRAM_STATS_BLK;
+		     i < NIC_SRAM_STATUS_BLK + TG3_HW_STATUS_SIZE;
+		     i += sizeof(uint32_t)) {
+			tg3_write_mem(i, 0);
+			udelay(40);
+		}
+	}
+
+	/* This value is determined during the probe time DMA
+	 * engine test, tg3_setup_dma.
+	 */
+	tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
+
+	tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS |
+			  GRC_MODE_4X_NIC_SEND_RINGS |
+			  GRC_MODE_NO_TX_PHDR_CSUM |
+			  GRC_MODE_NO_RX_PHDR_CSUM);
+	tp->grc_mode |= GRC_MODE_HOST_SENDBDS;
+	tp->grc_mode |= GRC_MODE_NO_TX_PHDR_CSUM;
+	tp->grc_mode |= GRC_MODE_NO_RX_PHDR_CSUM;
+
+	tw32(GRC_MODE,
+		tp->grc_mode | 
+		(GRC_MODE_IRQ_ON_MAC_ATTN | GRC_MODE_HOST_STACKUP));
+
+	/* Setup the timer prescalar register.  Clock is always 66Mhz. */
+	tw32(GRC_MISC_CFG,
+	     (65 << GRC_MISC_CFG_PRESCALAR_SHIFT));
+
+	/* Initialize MBUF/DESC pool. */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
+		/* Do nothing. */
+	} else if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) &&
+		(tp->pci_chip_rev_id != CHIPREV_ID_5721)) {
+		tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE);
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)
+			tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE64);
+		else
+			tw32(BUFMGR_MB_POOL_SIZE, NIC_SRAM_MBUF_POOL_SIZE96);
+		tw32(BUFMGR_DMA_DESC_POOL_ADDR, NIC_SRAM_DMA_DESC_POOL_BASE);
+		tw32(BUFMGR_DMA_DESC_POOL_SIZE, NIC_SRAM_DMA_DESC_POOL_SIZE);
+	}
+	if (!(tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE)) {
+		tw32(BUFMGR_MB_RDMA_LOW_WATER,
+		     tp->bufmgr_config.mbuf_read_dma_low_water);
+		tw32(BUFMGR_MB_MACRX_LOW_WATER,
+		     tp->bufmgr_config.mbuf_mac_rx_low_water);
+		tw32(BUFMGR_MB_HIGH_WATER,
+		     tp->bufmgr_config.mbuf_high_water);
+	} else {
+		tw32(BUFMGR_MB_RDMA_LOW_WATER,
+		     tp->bufmgr_config.mbuf_read_dma_low_water_jumbo);
+		tw32(BUFMGR_MB_MACRX_LOW_WATER,
+		     tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo);
+		tw32(BUFMGR_MB_HIGH_WATER,
+		     tp->bufmgr_config.mbuf_high_water_jumbo);
+	}
+	tw32(BUFMGR_DMA_LOW_WATER,
+	     tp->bufmgr_config.dma_low_water);
+	tw32(BUFMGR_DMA_HIGH_WATER,
+	     tp->bufmgr_config.dma_high_water);
+
+	tw32(BUFMGR_MODE, BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE);
+	for (i = 0; i < 2000; i++) {
+		if (tr32(BUFMGR_MODE) & BUFMGR_MODE_ENABLE)
+			break;
+		udelay(10);
+	}
+	if (i >= 2000) {
+		printf("tg3_setup_hw cannot enable BUFMGR\n");
+		return -ENODEV;
+	}
+
+	tw32(FTQ_RESET, 0xffffffff);
+	tw32(FTQ_RESET, 0x00000000);
+	for (i = 0; i < 2000; i++) {
+		if (tr32(FTQ_RESET) == 0x00000000)
+			break;
+		udelay(10);
+	}
+	if (i >= 2000) {
+		printf("tg3_setup_hw cannot reset FTQ\n");
+		return -ENODEV;
+	}
+
+	/* Initialize TG3_BDINFO's at:
+	 *  RCVDBDI_STD_BD:	standard eth size rx ring
+	 *  RCVDBDI_JUMBO_BD:	jumbo frame rx ring
+	 *  RCVDBDI_MINI_BD:	small frame rx ring (??? does not work)
+	 *
+	 * like so:
+	 *  TG3_BDINFO_HOST_ADDR:	high/low parts of DMA address of ring
+	 *  TG3_BDINFO_MAXLEN_FLAGS:	(rx max buffer size << 16) |
+	 *                              ring attribute flags
+	 *  TG3_BDINFO_NIC_ADDR:	location of descriptors in nic SRAM
+	 *
+	 * Standard receive ring @ NIC_SRAM_RX_BUFFER_DESC, 512 entries.
+	 * Jumbo receive ring @ NIC_SRAM_RX_JUMBO_BUFFER_DESC, 256 entries.
+	 *
+	 * ??? No space allocated for mini receive ring? :(
+	 *
+	 * The size of each ring is fixed in the firmware, but the location is
+	 * configurable.
+	 */
+	{
+		static const uint32_t table_all[] = {
+			/* Setup replenish thresholds. */
+			RCVBDI_STD_THRESH, TG3_DEF_RX_RING_PENDING / 8,
+
+			/* Etherboot lives below 4GB */
+			RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH, 0,
+			RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR, NIC_SRAM_RX_BUFFER_DESC,
+		};
+		static const uint32_t table_not_5705[] = {
+			/* Buffer maximum length */
+			RCVDBDI_STD_BD + TG3_BDINFO_MAXLEN_FLAGS, RX_STD_MAX_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT,
+			
+			/* Disable the mini frame rx ring */
+			RCVDBDI_MINI_BD + TG3_BDINFO_MAXLEN_FLAGS,	BDINFO_FLAGS_DISABLED,
+			
+			/* Disable the jumbo frame rx ring */
+			RCVBDI_JUMBO_THRESH, 0,
+			RCVDBDI_JUMBO_BD + TG3_BDINFO_MAXLEN_FLAGS, BDINFO_FLAGS_DISABLED,
+			
+			
+		};
+		TG3_WRITE_SETTINGS(table_all);
+		tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, 
+			virt_to_bus(tp->rx_std));
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 ||
+		    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
+			tw32(RCVDBDI_STD_BD + TG3_BDINFO_MAXLEN_FLAGS,
+				RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT);
+		} else {
+			TG3_WRITE_SETTINGS(table_not_5705);
+		}
+	}
+
+	
+	/* There is only one send ring on 5705 and 5787, no need to explicitly
+	 * disable the others.
+	 */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
+	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) {
+		/* Clear out send RCB ring in SRAM. */
+		for (i = NIC_SRAM_SEND_RCB; i < NIC_SRAM_RCV_RET_RCB; i += TG3_BDINFO_SIZE)
+			tg3_write_mem(i + TG3_BDINFO_MAXLEN_FLAGS, BDINFO_FLAGS_DISABLED);
+	}
+
+	tp->tx_prod = 0;
+	tw32_mailbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW, 0);
+	tw32_mailbox2(MAILBOX_SNDNIC_PROD_IDX_0 + TG3_64BIT_REG_LOW, 0);
+
+	tg3_set_bdinfo(tp,
+		NIC_SRAM_SEND_RCB,
+		virt_to_bus(tp->tx_ring),
+		(TG3_TX_RING_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT),
+		NIC_SRAM_TX_BUFFER_DESC);
+
+	/* There is only one receive return ring on 5705 and 5787, no need to
+	 * explicitly disable the others.
+	 */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
+	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) {
+		for (i = NIC_SRAM_RCV_RET_RCB; i < NIC_SRAM_STATS_BLK; i += TG3_BDINFO_SIZE) {
+			tg3_write_mem(i + TG3_BDINFO_MAXLEN_FLAGS,
+				BDINFO_FLAGS_DISABLED);
+		}
+	}
+
+	tp->rx_rcb_ptr = 0;
+	tw32_mailbox2(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, 0);
+
+	tg3_set_bdinfo(tp,
+		NIC_SRAM_RCV_RET_RCB,
+		virt_to_bus(tp->rx_rcb),
+		(TG3_RX_RCB_RING_SIZE << BDINFO_FLAGS_MAXLEN_SHIFT),
+		0);
+
+	tp->rx_std_ptr = TG3_DEF_RX_RING_PENDING;
+	tw32_mailbox2(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,
+		     tp->rx_std_ptr);
+
+	tw32_mailbox2(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW, 0);
+
+	/* Initialize MAC address and backoff seed. */
+	__tg3_set_mac_addr(tp);
+
+	/* Calculate RDMAC_MODE setting early, we need it to determine
+	 * the RCVLPC_STATE_ENABLE mask.
+	 */
+	rdmac_mode = (RDMAC_MODE_ENABLE | RDMAC_MODE_TGTABORT_ENAB |
+		RDMAC_MODE_MSTABORT_ENAB | RDMAC_MODE_PARITYERR_ENAB |
+		RDMAC_MODE_ADDROFLOW_ENAB | RDMAC_MODE_FIFOOFLOW_ENAB |
+		RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
+		RDMAC_MODE_LNGREAD_ENAB);
+	if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE)
+		rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE;
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
+		if (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) {
+			if (!(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH) &&
+				!(tp->tg3_flags2 & TG3_FLG2_IS_5788)) {
+				rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
+			}
+		}
+	}
+
+	/* Setup host coalescing engine. */
+	tw32(HOSTCC_MODE, 0);
+	for (i = 0; i < 2000; i++) {
+		if (!(tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE))
+			break;
+		udelay(10);
+	}
+
+	tp->mac_mode = MAC_MODE_TXSTAT_ENABLE | MAC_MODE_RXSTAT_ENABLE |
+		MAC_MODE_TDE_ENABLE | MAC_MODE_RDE_ENABLE | MAC_MODE_FHDE_ENABLE;
+	tw32_carefully(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
+
+	tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700)
+		tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
+				       GRC_LCLCTRL_GPIO_OUTPUT1);
+	tw32_carefully(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
+
+	tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0);
+	tr32(MAILBOX_INTERRUPT_0);
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
+		tw32_carefully(DMAC_MODE, DMAC_MODE_ENABLE);
+	}
+
+	val = (	WDMAC_MODE_ENABLE | WDMAC_MODE_TGTABORT_ENAB |
+		WDMAC_MODE_MSTABORT_ENAB | WDMAC_MODE_PARITYERR_ENAB |
+		WDMAC_MODE_ADDROFLOW_ENAB | WDMAC_MODE_FIFOOFLOW_ENAB |
+		WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB |
+		WDMAC_MODE_LNGREAD_ENAB);
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) &&
+		((tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH) != 0) &&
+		!(tp->tg3_flags2 & TG3_FLG2_IS_5788)) {
+		val |= WDMAC_MODE_RX_ACCEL;
+	}
+
+	/* Host coalescing bug fix */
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+		val |= (1 << 29);
+
+	tw32_carefully(WDMAC_MODE, val);
+
+	if ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) {
+		val = tr32(TG3PCI_X_CAPS);
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) {
+			val &= PCIX_CAPS_BURST_MASK;
+			val |= (PCIX_CAPS_MAX_BURST_CPIOB << PCIX_CAPS_BURST_SHIFT);
+		} else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
+			val &= ~(PCIX_CAPS_SPLIT_MASK | PCIX_CAPS_BURST_MASK);
+			val |= (PCIX_CAPS_MAX_BURST_CPIOB << PCIX_CAPS_BURST_SHIFT);
+			if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE)
+				val |= (tp->split_mode_max_reqs <<
+					PCIX_CAPS_SPLIT_SHIFT);
+		}
+		tw32(TG3PCI_X_CAPS, val);
+	}
+
+	tw32_carefully(RDMAC_MODE, rdmac_mode);
+	{
+		static const uint32_t table_all[] = {
+			/* MTU + ethernet header + FCS + optional VLAN tag */
+			MAC_RX_MTU_SIZE, ETH_MAX_MTU + ETH_HLEN + 8,
+			
+			/* The slot time is changed by tg3_setup_phy if we
+			 * run at gigabit with half duplex.
+			 */
+			MAC_TX_LENGTHS,	
+			(2 << TX_LENGTHS_IPG_CRS_SHIFT) |
+			(6 << TX_LENGTHS_IPG_SHIFT) |
+			(32 << TX_LENGTHS_SLOT_TIME_SHIFT),
+			
+			/* Receive rules. */
+			MAC_RCV_RULE_CFG, RCV_RULE_CFG_DEFAULT_CLASS,
+			RCVLPC_CONFIG, 0x0181,
+			
+			/* Receive/send statistics. */
+			RCVLPC_STATS_ENABLE, 0xffffff,
+			RCVLPC_STATSCTRL, RCVLPC_STATSCTRL_ENABLE,
+			SNDDATAI_STATSENAB, 0xffffff,
+			SNDDATAI_STATSCTRL, (SNDDATAI_SCTRL_ENABLE |SNDDATAI_SCTRL_FASTUPD),
+			
+			/* Host coalescing engine */
+			HOSTCC_RXCOL_TICKS, 0,
+			HOSTCC_TXCOL_TICKS, LOW_TXCOL_TICKS,
+			HOSTCC_RXMAX_FRAMES, 1,
+			HOSTCC_TXMAX_FRAMES, LOW_RXMAX_FRAMES,
+			HOSTCC_RXCOAL_MAXF_INT, 1,
+			HOSTCC_TXCOAL_MAXF_INT, 0,
+			
+			/* Status/statistics block address. */
+			/* Etherboot lives below 4GB, so HIGH == 0 */
+			HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, 0,
+
+			/* No need to enable 32byte coalesce mode. */
+			HOSTCC_MODE, HOSTCC_MODE_ENABLE | 0,
+			
+			RCVCC_MODE, RCVCC_MODE_ENABLE | RCVCC_MODE_ATTN_ENABLE,
+			RCVLPC_MODE, RCVLPC_MODE_ENABLE,
+			
+			RCVDCC_MODE, RCVDCC_MODE_ENABLE | RCVDCC_MODE_ATTN_ENABLE,
+
+			SNDDATAC_MODE, SNDDATAC_MODE_ENABLE,
+			SNDBDC_MODE, SNDBDC_MODE_ENABLE | SNDBDC_MODE_ATTN_ENABLE,
+			RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB,
+			RCVDBDI_MODE, RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ,
+			SNDDATAI_MODE, SNDDATAI_MODE_ENABLE,
+			SNDBDI_MODE, SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE,
+			SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE,
+			
+			/* Accept all multicast frames. */
+			MAC_HASH_REG_0, 0xffffffff,
+			MAC_HASH_REG_1, 0xffffffff,
+			MAC_HASH_REG_2, 0xffffffff,
+			MAC_HASH_REG_3, 0xffffffff,
+		};
+		static const uint32_t table_not_5705[] = {
+			/* Host coalescing engine */
+			HOSTCC_RXCOAL_TICK_INT, 0,
+			HOSTCC_TXCOAL_TICK_INT, 0,
+
+			/* Status/statistics block address. */
+			/* Etherboot lives below 4GB, so HIGH == 0 */
+			HOSTCC_STAT_COAL_TICKS, DEFAULT_STAT_COAL_TICKS,
+			HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, 0,
+			HOSTCC_STATS_BLK_NIC_ADDR, NIC_SRAM_STATS_BLK,
+			HOSTCC_STATUS_BLK_NIC_ADDR, NIC_SRAM_STATUS_BLK,
+
+			RCVLSC_MODE, RCVLSC_MODE_ENABLE | RCVLSC_MODE_ATTN_ENABLE,
+
+			MBFREE_MODE, MBFREE_MODE_ENABLE,
+		};
+		TG3_WRITE_SETTINGS(table_all);
+		tw32(HOSTCC_STATS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW,
+			virt_to_bus(tp->hw_stats));
+		tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW,
+			virt_to_bus(tp->hw_status));
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 &&
+		    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) {
+			TG3_WRITE_SETTINGS(table_not_5705);
+		}
+	}
+
+	tp->tx_mode = TX_MODE_ENABLE;
+	tw32_carefully(MAC_TX_MODE, tp->tx_mode);
+
+	tp->rx_mode = RX_MODE_ENABLE;
+	tw32_carefully(MAC_RX_MODE, tp->rx_mode);
+
+	tp->mi_mode = MAC_MI_MODE_BASE;
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+
+	tw32(MAC_LED_CTRL, 0);
+	tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB);
+	if (tp->phy_id == PHY_ID_SERDES) {
+		tw32_carefully(MAC_RX_MODE, RX_MODE_RESET);
+	}
+	tp->rx_mode |= RX_MODE_KEEP_VLAN_TAG; /* drop tagged vlan packets */
+	tw32_carefully(MAC_RX_MODE, tp->rx_mode);
+
+	if (tp->pci_chip_rev_id == CHIPREV_ID_5703_A1)
+		tw32(MAC_SERDES_CFG, 0x616000);
+
+	/* Prevent chip from dropping frames when flow control
+	 * is enabled.
+	 */
+	tw32(MAC_LOW_WMARK_MAX_RX_FRAME, 2);
+	tr32(MAC_LOW_WMARK_MAX_RX_FRAME);
+
+	err = tg3_setup_phy(tp);
+
+	/* Ignore CRC stats */
+
+	/* Initialize receive rules. */
+	tw32(MAC_RCV_RULE_0,  0xc2000000 & RCV_RULE_DISABLE_MASK);
+	tw32(MAC_RCV_VALUE_0, 0xffffffff & RCV_RULE_DISABLE_MASK);
+	tw32(MAC_RCV_RULE_1,  0x86000004 & RCV_RULE_DISABLE_MASK);
+	tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK);
+
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)
+	    || (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750))
+		limit = 8;
+	else
+		limit = 16;
+	if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF)
+		limit -= 4;
+	switch (limit) {
+	case 16:	tw32(MAC_RCV_RULE_15,  0); tw32(MAC_RCV_VALUE_15,  0);
+	case 15:	tw32(MAC_RCV_RULE_14,  0); tw32(MAC_RCV_VALUE_14,  0);
+	case 14:	tw32(MAC_RCV_RULE_13,  0); tw32(MAC_RCV_VALUE_13,  0);
+	case 13:	tw32(MAC_RCV_RULE_12,  0); tw32(MAC_RCV_VALUE_12,  0);
+	case 12:	tw32(MAC_RCV_RULE_11,  0); tw32(MAC_RCV_VALUE_11,  0);
+	case 11:	tw32(MAC_RCV_RULE_10,  0); tw32(MAC_RCV_VALUE_10,  0);
+	case 10:	tw32(MAC_RCV_RULE_9,  0);  tw32(MAC_RCV_VALUE_9,  0);
+	case 9:		tw32(MAC_RCV_RULE_8,  0);  tw32(MAC_RCV_VALUE_8,  0);
+	case 8:		tw32(MAC_RCV_RULE_7,  0);  tw32(MAC_RCV_VALUE_7,  0);
+	case 7:		tw32(MAC_RCV_RULE_6,  0);  tw32(MAC_RCV_VALUE_6,  0);
+	case 6:		tw32(MAC_RCV_RULE_5,  0);  tw32(MAC_RCV_VALUE_5,  0);
+	case 5:		tw32(MAC_RCV_RULE_4,  0);  tw32(MAC_RCV_VALUE_4,  0);
+	case 4:		/* tw32(MAC_RCV_RULE_3,  0); tw32(MAC_RCV_VALUE_3,  0); */
+	case 3:		/* tw32(MAC_RCV_RULE_2,  0); tw32(MAC_RCV_VALUE_2,  0); */
+	case 2:
+	case 1:
+	default:
+		break;
+	};
+
+	return err;
+}
+
+
+
+/* Chips other than 5700/5701 use the NVRAM for fetching info. */
+static void tg3_nvram_init(struct tg3 *tp)
+{
+	tw32(GRC_EEPROM_ADDR,
+	     (EEPROM_ADDR_FSM_RESET |
+	      (EEPROM_DEFAULT_CLOCK_PERIOD <<
+	       EEPROM_ADDR_CLKPERD_SHIFT)));
+
+	mdelay(1);
+
+	/* Enable seeprom accesses. */
+	tw32_carefully(GRC_LOCAL_CTRL,
+		tr32(GRC_LOCAL_CTRL) | GRC_LCLCTRL_AUTO_SEEPROM);
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 &&
+	    GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
+		uint32_t nvcfg1 = tr32(NVRAM_CFG1);
+
+		tp->tg3_flags |= TG3_FLAG_NVRAM;
+		if (nvcfg1 & NVRAM_CFG1_FLASHIF_ENAB) {
+			if (nvcfg1 & NVRAM_CFG1_BUFFERED_MODE)
+				tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
+		} else {
+			nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;
+			tw32(NVRAM_CFG1, nvcfg1);
+		}
+
+	} else {
+		tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED);
+	}
+}
+
+
+static int tg3_nvram_read_using_eeprom(
+	struct tg3 *tp __unused, uint32_t offset, uint32_t *val)
+{
+	uint32_t tmp;
+	int i;
+
+	if (offset > EEPROM_ADDR_ADDR_MASK ||
+		(offset % 4) != 0) {
+		return -EINVAL;
+	}
+
+	tmp = tr32(GRC_EEPROM_ADDR) & ~(EEPROM_ADDR_ADDR_MASK |
+					EEPROM_ADDR_DEVID_MASK |
+					EEPROM_ADDR_READ);
+	tw32(GRC_EEPROM_ADDR,
+	     tmp |
+	     (0 << EEPROM_ADDR_DEVID_SHIFT) |
+	     ((offset << EEPROM_ADDR_ADDR_SHIFT) &
+	      EEPROM_ADDR_ADDR_MASK) |
+	     EEPROM_ADDR_READ | EEPROM_ADDR_START);
+
+	for (i = 0; i < 10000; i++) {
+		tmp = tr32(GRC_EEPROM_ADDR);
+
+		if (tmp & EEPROM_ADDR_COMPLETE)
+			break;
+		udelay(100);
+	}
+	if (!(tmp & EEPROM_ADDR_COMPLETE)) {
+		return -EBUSY;
+	}
+
+	*val = tr32(GRC_EEPROM_DATA);
+	return 0;
+}
+
+static int tg3_nvram_read(struct tg3 *tp, uint32_t offset, uint32_t *val)
+{
+	int i, saw_done_clear;
+
+	if (!(tp->tg3_flags & TG3_FLAG_NVRAM))
+		return tg3_nvram_read_using_eeprom(tp, offset, val);
+
+	if (tp->tg3_flags & TG3_FLAG_NVRAM_BUFFERED)
+		offset = ((offset / NVRAM_BUFFERED_PAGE_SIZE) <<
+			  NVRAM_BUFFERED_PAGE_POS) +
+			(offset % NVRAM_BUFFERED_PAGE_SIZE);
+
+	if (offset > NVRAM_ADDR_MSK)
+		return -EINVAL;
+
+	tw32(NVRAM_SWARB, SWARB_REQ_SET1);
+	for (i = 0; i < 1000; i++) {
+		if (tr32(NVRAM_SWARB) & SWARB_GNT1)
+			break;
+		udelay(20);
+	}
+
+	tw32(NVRAM_ADDR, offset);
+	tw32(NVRAM_CMD,
+	     NVRAM_CMD_RD | NVRAM_CMD_GO |
+	     NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE);
+
+	/* Wait for done bit to clear then set again. */
+	saw_done_clear = 0;
+	for (i = 0; i < 1000; i++) {
+		udelay(10);
+		if (!saw_done_clear &&
+		    !(tr32(NVRAM_CMD) & NVRAM_CMD_DONE))
+			saw_done_clear = 1;
+		else if (saw_done_clear &&
+			 (tr32(NVRAM_CMD) & NVRAM_CMD_DONE))
+			break;
+	}
+	if (i >= 1000) {
+		tw32(NVRAM_SWARB, SWARB_REQ_CLR1);
+		return -EBUSY;
+	}
+
+	*val = bswap_32(tr32(NVRAM_RDDATA));
+	tw32(NVRAM_SWARB, 0x20);
+
+	return 0;
+}
+
+struct subsys_tbl_ent {
+	uint16_t subsys_vendor, subsys_devid;
+	uint32_t phy_id;
+};
+
+static struct subsys_tbl_ent subsys_id_to_phy_id[] = {
+	/* Broadcom boards. */
+	{ 0x14e4, 0x1644, PHY_ID_BCM5401 }, /* BCM95700A6 */
+	{ 0x14e4, 0x0001, PHY_ID_BCM5701 }, /* BCM95701A5 */
+	{ 0x14e4, 0x0002, PHY_ID_BCM8002 }, /* BCM95700T6 */
+	{ 0x14e4, 0x0003, PHY_ID_SERDES  }, /* BCM95700A9 */
+	{ 0x14e4, 0x0005, PHY_ID_BCM5701 }, /* BCM95701T1 */
+	{ 0x14e4, 0x0006, PHY_ID_BCM5701 }, /* BCM95701T8 */
+	{ 0x14e4, 0x0007, PHY_ID_SERDES  }, /* BCM95701A7 */
+	{ 0x14e4, 0x0008, PHY_ID_BCM5701 }, /* BCM95701A10 */
+	{ 0x14e4, 0x8008, PHY_ID_BCM5701 }, /* BCM95701A12 */
+	{ 0x14e4, 0x0009, PHY_ID_BCM5701 }, /* BCM95703Ax1 */
+	{ 0x14e4, 0x8009, PHY_ID_BCM5701 }, /* BCM95703Ax2 */
+
+	/* 3com boards. */
+	{ PCI_VENDOR_ID_3COM, 0x1000, PHY_ID_BCM5401 }, /* 3C996T */
+	{ PCI_VENDOR_ID_3COM, 0x1006, PHY_ID_BCM5701 }, /* 3C996BT */
+	/* { PCI_VENDOR_ID_3COM, 0x1002, PHY_ID_XXX },     3C996CT */
+	/* { PCI_VENDOR_ID_3COM, 0x1003, PHY_ID_XXX },     3C997T */
+	{ PCI_VENDOR_ID_3COM, 0x1004, PHY_ID_SERDES  }, /* 3C996SX */
+	/* { PCI_VENDOR_ID_3COM, 0x1005, PHY_ID_XXX },     3C997SZ */
+	{ PCI_VENDOR_ID_3COM, 0x1007, PHY_ID_BCM5701 }, /* 3C1000T */
+	{ PCI_VENDOR_ID_3COM, 0x1008, PHY_ID_BCM5701 }, /* 3C940BR01 */
+
+	/* DELL boards. */
+	{ PCI_VENDOR_ID_DELL, 0x00d1, PHY_ID_BCM5401 }, /* VIPER */
+	{ PCI_VENDOR_ID_DELL, 0x0106, PHY_ID_BCM5401 }, /* JAGUAR */
+	{ PCI_VENDOR_ID_DELL, 0x0109, PHY_ID_BCM5411 }, /* MERLOT */
+	{ PCI_VENDOR_ID_DELL, 0x010a, PHY_ID_BCM5411 }, /* SLIM_MERLOT */
+	{ PCI_VENDOR_ID_DELL, 0x0179, PHY_ID_BCM5751 }, /* EtherXpress */
+	
+	/* Fujitsu Siemens Computer */
+	{ PCI_VENDOR_ID_FSC, 0x105d, PHY_ID_BCM5751 }, /* Futro C200 */	
+
+	/* Compaq boards. */
+	{ PCI_VENDOR_ID_COMPAQ, 0x007c, PHY_ID_BCM5701 }, /* BANSHEE */
+	{ PCI_VENDOR_ID_COMPAQ, 0x009a, PHY_ID_BCM5701 }, /* BANSHEE_2 */
+	{ PCI_VENDOR_ID_COMPAQ, 0x007d, PHY_ID_SERDES  }, /* CHANGELING */
+	{ PCI_VENDOR_ID_COMPAQ, 0x0085, PHY_ID_BCM5701 }, /* NC7780 */
+	{ PCI_VENDOR_ID_COMPAQ, 0x0099, PHY_ID_BCM5701 }  /* NC7780_2 */
+};
+
+static int tg3_phy_probe(struct tg3 *tp)
+{
+	uint32_t eeprom_phy_id, hw_phy_id_1, hw_phy_id_2;
+	uint32_t hw_phy_id, hw_phy_id_masked;
+	enum phy_led_mode eeprom_led_mode;
+	uint32_t val;
+	unsigned i;
+	int eeprom_signature_found, err;
+
+	tp->phy_id = PHY_ID_INVALID;
+
+	for (i = 0; i < sizeof(subsys_id_to_phy_id)/sizeof(subsys_id_to_phy_id[0]); i++) {
+		if ((subsys_id_to_phy_id[i].subsys_vendor == tp->subsystem_vendor) &&
+			(subsys_id_to_phy_id[i].subsys_devid == tp->subsystem_device)) {
+			tp->phy_id = subsys_id_to_phy_id[i].phy_id;
+			break;
+		}
+	}
+
+	eeprom_phy_id = PHY_ID_INVALID;
+	eeprom_led_mode = led_mode_auto;
+	eeprom_signature_found = 0;
+	tg3_read_mem(NIC_SRAM_DATA_SIG, &val);
+	if (val == NIC_SRAM_DATA_SIG_MAGIC) {
+		uint32_t nic_cfg;
+
+		tg3_read_mem(NIC_SRAM_DATA_CFG, &nic_cfg);
+		tp->nic_sram_data_cfg = nic_cfg;
+
+		eeprom_signature_found = 1;
+
+		if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) ==
+		    NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER) {
+			eeprom_phy_id = PHY_ID_SERDES;
+		} else {
+			uint32_t nic_phy_id;
+
+			tg3_read_mem(NIC_SRAM_DATA_PHY_ID, &nic_phy_id);
+			if (nic_phy_id != 0) {
+				uint32_t id1 = nic_phy_id & NIC_SRAM_DATA_PHY_ID1_MASK;
+				uint32_t id2 = nic_phy_id & NIC_SRAM_DATA_PHY_ID2_MASK;
+
+				eeprom_phy_id  = (id1 >> 16) << 10;
+				eeprom_phy_id |= (id2 & 0xfc00) << 16;
+				eeprom_phy_id |= (id2 & 0x03ff) <<  0;
+			}
+		}
+
+		switch (nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK) {
+		case NIC_SRAM_DATA_CFG_LED_TRIPLE_SPD:
+			eeprom_led_mode = led_mode_three_link;
+			break;
+
+		case NIC_SRAM_DATA_CFG_LED_LINK_SPD:
+			eeprom_led_mode = led_mode_link10;
+			break;
+
+		default:
+			eeprom_led_mode = led_mode_auto;
+			break;
+		};
+		if (((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) ||
+			(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) ||
+			(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705)) &&
+			(nic_cfg & NIC_SRAM_DATA_CFG_EEPROM_WP)) {
+			tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT;
+		}
+
+		if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE)
+			tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
+		if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)
+			tp->tg3_flags |= TG3_FLAG_SERDES_WOL_CAP;
+	}
+
+	/* Now read the physical PHY_ID from the chip and verify
+	 * that it is sane.  If it doesn't look good, we fall back
+	 * to either the hard-coded table based PHY_ID and failing
+	 * that the value found in the eeprom area.
+	 */
+	err  = tg3_readphy(tp, MII_PHYSID1, &hw_phy_id_1);
+	err |= tg3_readphy(tp, MII_PHYSID2, &hw_phy_id_2);
+
+	hw_phy_id  = (hw_phy_id_1 & 0xffff) << 10;
+	hw_phy_id |= (hw_phy_id_2 & 0xfc00) << 16;
+	hw_phy_id |= (hw_phy_id_2 & 0x03ff) <<  0;
+
+	hw_phy_id_masked = hw_phy_id & PHY_ID_MASK;
+
+	if (!err && KNOWN_PHY_ID(hw_phy_id_masked)) {
+		tp->phy_id = hw_phy_id;
+	} else {
+		/* phy_id currently holds the value found in the
+		 * subsys_id_to_phy_id[] table or PHY_ID_INVALID
+		 * if a match was not found there.
+		 */
+		if (tp->phy_id == PHY_ID_INVALID) {
+			if (!eeprom_signature_found ||
+			    !KNOWN_PHY_ID(eeprom_phy_id & PHY_ID_MASK))
+				return -ENODEV;
+			tp->phy_id = eeprom_phy_id;
+		}
+	}
+
+	err = tg3_phy_reset(tp);
+	if (err)
+		return err;
+
+	if (tp->pci_chip_rev_id == CHIPREV_ID_5701_A0 ||
+	    tp->pci_chip_rev_id == CHIPREV_ID_5701_B0) {
+		uint32_t mii_tg3_ctrl;
+		
+		/* These chips, when reset, only advertise 10Mb
+		 * capabilities.  Fix that.
+		 */
+		err  = tg3_writephy(tp, MII_ADVERTISE,
+				    (ADVERTISE_CSMA |
+				     ADVERTISE_PAUSE_CAP |
+				     ADVERTISE_10HALF |
+				     ADVERTISE_10FULL |
+				     ADVERTISE_100HALF |
+				     ADVERTISE_100FULL));
+		mii_tg3_ctrl = (MII_TG3_CTRL_ADV_1000_HALF |
+				MII_TG3_CTRL_ADV_1000_FULL |
+				MII_TG3_CTRL_AS_MASTER |
+				MII_TG3_CTRL_ENABLE_AS_MASTER);
+		if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
+			mii_tg3_ctrl = 0;
+
+		err |= tg3_writephy(tp, MII_TG3_CTRL, mii_tg3_ctrl);
+		err |= tg3_writephy(tp, MII_BMCR,
+				    (BMCR_ANRESTART | BMCR_ANENABLE));
+	}
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) {
+		tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
+		tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x201f);
+		tg3_writedsp(tp, MII_TG3_DSP_RW_PORT, 0x2aaa);
+	}
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) {
+		tg3_writephy(tp, 0x1c, 0x8d68);
+		tg3_writephy(tp, 0x1c, 0x8d68);
+	}
+
+	/* Enable Ethernet@WireSpeed */
+	tg3_phy_set_wirespeed(tp);
+
+	if (!err && ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401)) {
+		err = tg3_init_5401phy_dsp(tp);
+	}
+
+	/* Determine the PHY led mode. 
+	 * Be careful if this gets set wrong it can result in an inability to 
+	 * establish a link.
+	 */
+	if (tp->phy_id == PHY_ID_SERDES) {
+		tp->led_mode = led_mode_three_link;
+	}
+	else if (tp->subsystem_vendor == PCI_VENDOR_ID_DELL) {
+		tp->led_mode = led_mode_link10;
+	} else {
+		tp->led_mode = led_mode_three_link;
+		if (eeprom_signature_found &&
+		    eeprom_led_mode != led_mode_auto)
+			tp->led_mode = eeprom_led_mode;
+	}
+
+	if (tp->phy_id == PHY_ID_SERDES)
+		tp->link_config.advertising =
+			(ADVERTISED_1000baseT_Half |
+			 ADVERTISED_1000baseT_Full |
+			 ADVERTISED_Autoneg |
+			 ADVERTISED_FIBRE);
+	if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
+		tp->link_config.advertising &=
+			~(ADVERTISED_1000baseT_Half |
+			  ADVERTISED_1000baseT_Full);
+
+	return err;
+}
+
+#if SUPPORT_PARTNO_STR
+static void tg3_read_partno(struct tg3 *tp)
+{
+	unsigned char vpd_data[256];
+	int i;
+
+	for (i = 0; i < 256; i += 4) {
+		uint32_t tmp;
+
+		if (tg3_nvram_read(tp, 0x100 + i, &tmp))
+			goto out_not_found;
+
+		vpd_data[i + 0] = ((tmp >>  0) & 0xff);
+		vpd_data[i + 1] = ((tmp >>  8) & 0xff);
+		vpd_data[i + 2] = ((tmp >> 16) & 0xff);
+		vpd_data[i + 3] = ((tmp >> 24) & 0xff);
+	}
+
+	/* Now parse and find the part number. */
+	for (i = 0; i < 256; ) {
+		unsigned char val = vpd_data[i];
+		int block_end;
+
+		if (val == 0x82 || val == 0x91) {
+			i = (i + 3 +
+			     (vpd_data[i + 1] +
+			      (vpd_data[i + 2] << 8)));
+			continue;
+		}
+
+		if (val != 0x90)
+			goto out_not_found;
+
+		block_end = (i + 3 +
+			     (vpd_data[i + 1] +
+			      (vpd_data[i + 2] << 8)));
+		i += 3;
+		while (i < block_end) {
+			if (vpd_data[i + 0] == 'P' &&
+			    vpd_data[i + 1] == 'N') {
+				int partno_len = vpd_data[i + 2];
+
+				if (partno_len > 24)
+					goto out_not_found;
+
+				memcpy(tp->board_part_number,
+				       &vpd_data[i + 3],
+				       partno_len);
+
+				/* Success. */
+				return;
+			}
+		}
+
+		/* Part number not found. */
+		goto out_not_found;
+	}
+
+out_not_found:
+	memcpy(tp->board_part_number, "none", sizeof("none"));
+}
+#else
+#define tg3_read_partno(TP) ((TP)->board_part_number[0] = '\0')
+#endif
+
+static int tg3_get_invariants(struct tg3 *tp)
+{
+	uint32_t misc_ctrl_reg;
+	uint32_t pci_state_reg, grc_misc_cfg;
+	uint16_t pci_cmd;
+	uint8_t  pci_latency;
+	uint32_t val ;
+	int err;
+
+	/* Read the subsystem vendor and device ids */
+	pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->subsystem_vendor);
+	pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_ID, &tp->subsystem_device);
+
+	/* The sun_5704 code needs infrastructure etherboot does have
+	 * ignore it for now.
+	 */
+
+	/* If we have an AMD 762 or Intel ICH/ICH0 chipset, write
+	 * reordering to the mailbox registers done by the host
+	 * controller can cause major troubles.  We read back from
+	 * every mailbox register write to force the writes to be
+	 * posted to the chip in order.
+	 *
+	 * TG3_FLAG_MBOX_WRITE_REORDER has been forced on.
+	 */
+
+	/* Force memory write invalidate off.  If we leave it on,
+	 * then on 5700_BX chips we have to enable a workaround.
+	 * The workaround is to set the TG3PCI_DMA_RW_CTRL boundry
+	 * to match the cacheline size.  The Broadcom driver have this
+	 * workaround but turns MWI off all the times so never uses
+	 * it.  This seems to suggest that the workaround is insufficient.
+	 */
+	pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
+	pci_cmd &= ~PCI_COMMAND_INVALIDATE;
+	/* Also, force SERR#/PERR# in PCI command. */
+	pci_cmd |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
+	pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
+
+	/* It is absolutely critical that TG3PCI_MISC_HOST_CTRL
+	 * has the register indirect write enable bit set before
+	 * we try to access any of the MMIO registers.  It is also
+	 * critical that the PCI-X hw workaround situation is decided
+	 * before that as well.
+	 */
+	pci_read_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL, &misc_ctrl_reg);
+
+	tp->pci_chip_rev_id = (misc_ctrl_reg >> MISC_HOST_CTRL_CHIPREV_SHIFT);
+
+	/* Initialize misc host control in PCI block. */
+	tp->misc_host_ctrl |= (misc_ctrl_reg &
+			       MISC_HOST_CTRL_CHIPREV);
+	pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
+			       tp->misc_host_ctrl);
+
+	pci_read_config_byte(tp->pdev, PCI_LATENCY_TIMER, &pci_latency);
+	if (pci_latency < 64) {
+		pci_write_config_byte(tp->pdev, PCI_LATENCY_TIMER, 64);
+	}
+
+	pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, &pci_state_reg);
+
+	/* If this is a 5700 BX chipset, and we are in PCI-X
+	 * mode, enable register write workaround.
+	 *
+	 * The workaround is to use indirect register accesses
+	 * for all chip writes not to mailbox registers.
+	 *
+	 * In etherboot to simplify things we just always use this work around.
+	 */
+	if ((pci_state_reg & PCISTATE_CONV_PCI_MODE) == 0) {
+		tp->tg3_flags |= TG3_FLAG_PCIX_MODE;
+	}
+	/* Back to back register writes can cause problems on the 5701,
+	 * the workaround is to read back all reg writes except those to
+	 * mailbox regs.
+	 * In etherboot we always use indirect register accesses so
+	 * we don't see this.
+	 */
+
+	if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0)
+		tp->tg3_flags |= TG3_FLAG_PCI_HIGH_SPEED;
+	if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0)
+		tp->tg3_flags |= TG3_FLAG_PCI_32BIT;
+
+	/* Chip-specific fixup from Broadcom driver */
+	if ((tp->pci_chip_rev_id == CHIPREV_ID_5704_A0) &&
+	    (!(pci_state_reg & PCISTATE_RETRY_SAME_DMA))) {
+		pci_state_reg |= PCISTATE_RETRY_SAME_DMA;
+		pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg);
+	}
+
+	/* determine if it is PCIE system */
+	// Alf : I have no idea what this is about...
+	// But it's definitely usefull
+	val = pci_find_capability(tp->pdev, PCI_CAP_ID_EXP);
+	if (val)
+		tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
+
+	/* Force the chip into D0. */
+	tg3_set_power_state_0(tp);
+
+	/* Etherboot does not ask the tg3 to do checksums */
+	/* Etherboot does not ask the tg3 to do jumbo frames */
+	/* Ehterboot does not ask the tg3 to use WakeOnLan. */
+
+	/* A few boards don't want Ethernet@WireSpeed phy feature */
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
+	    (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) ||
+		((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
+			(tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
+			(tp->pci_chip_rev_id != CHIPREV_ID_5705_A1))) {
+		tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED;
+	}
+
+	/* Avoid tagged irq status etherboot does not use irqs */
+
+	/* Only 5701 and later support tagged irq status mode.
+	 * Also, 5788 chips cannot use tagged irq status.
+	 *
+	 * However, since etherboot does not use irqs avoid tagged irqs
+	 * status  because the interrupt condition is more difficult to
+	 * fully clear in that mode.
+	 */
+	
+	/* Since some 5700_AX && 5700_BX have problems with 32BYTE
+	 * coalesce_mode, and the rest work fine anything set.
+	 * Don't enable HOST_CC_MODE_32BYTE in etherboot.
+	 */
+
+	/* Initialize MAC MI mode, polling disabled. */
+	tw32_carefully(MAC_MI_MODE, tp->mi_mode);
+
+	/* Initialize data/descriptor byte/word swapping. */
+	tw32(GRC_MODE, tp->grc_mode);
+
+	tg3_switch_clocks(tp);
+
+	/* Clear this out for sanity. */
+	tw32(TG3PCI_MEM_WIN_BASE_ADDR, 0);
+
+	/* Etherboot does not need to check if the PCIX_TARGET_HWBUG
+	 * is needed.  It always uses it.
+	 */
+	
+	udelay(50);
+	tg3_nvram_init(tp);
+
+	/* The TX descriptors will reside in main memory.
+	 */
+
+	/* See which board we are using.
+	 */
+	grc_misc_cfg = tr32(GRC_MISC_CFG);
+	grc_misc_cfg &= GRC_MISC_CFG_BOARD_ID_MASK;
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
+	    grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5704CIOBE) {
+		tp->tg3_flags |= TG3_FLAG_SPLIT_MODE;
+		tp->split_mode_max_reqs = SPLIT_MODE_5704_MAX_REQ;
+	}
+
+	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
+	    (grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788 ||
+	     grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788M))
+		tp->tg3_flags2 |= TG3_FLG2_IS_5788;
+
+#define PCI_DEVICE_ID_TIGON3_5901	0x170d
+#define PCI_DEVICE_ID_TIGON3_5901_2	0x170e
+
+	/* these are limited to 10/100 only */
+	if (((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) &&
+		    ((grc_misc_cfg == 0x8000) || (grc_misc_cfg == 0x4000))) ||
+		((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
+			(tp->pdev->vendor == PCI_VENDOR_ID_BROADCOM) &&
+			((tp->pdev->device == PCI_DEVICE_ID_TIGON3_5901) ||
+				(tp->pdev->device == PCI_DEVICE_ID_TIGON3_5901_2)))) {
+		tp->tg3_flags |= TG3_FLAG_10_100_ONLY;
+	}
+
+	err = tg3_phy_probe(tp);
+	if (err) {
+		printf("phy probe failed, err %d\n", err);
+	}
+
+	tg3_read_partno(tp);
+
+
+	/* 5700 BX chips need to have their TX producer index mailboxes
+	 * written twice to workaround a bug.
+	 * In etherboot we do this unconditionally to simplify things.
+	 */
+
+	/* 5700 chips can get confused if TX buffers straddle the
+	 * 4GB address boundary in some cases.
+	 * 
+	 * In etherboot we can ignore the problem as etherboot lives below 4GB.
+	 */
+
+	/* In etherboot wake-on-lan is unconditionally disabled */
+	return err;
+}
+
+static int  tg3_get_device_address(struct tg3 *tp)
+{
+	struct nic *nic = tp->nic;
+	uint32_t hi, lo, mac_offset;
+
+	if (PCI_FUNC(tp->pdev->busdevfn) == 0)
+		mac_offset = 0x7c;
+	else
+		mac_offset = 0xcc;
+
+	/* First try to get it from MAC address mailbox. */
+	tg3_read_mem(NIC_SRAM_MAC_ADDR_HIGH_MBOX, &hi);
+	if ((hi >> 16) == 0x484b) {
+		nic->node_addr[0] = (hi >>  8) & 0xff;
+		nic->node_addr[1] = (hi >>  0) & 0xff;
+
+		tg3_read_mem(NIC_SRAM_MAC_ADDR_LOW_MBOX, &lo);
+		nic->node_addr[2] = (lo >> 24) & 0xff;
+		nic->node_addr[3] = (lo >> 16) & 0xff;
+		nic->node_addr[4] = (lo >>  8) & 0xff;
+		nic->node_addr[5] = (lo >>  0) & 0xff;
+	}
+	/* Next, try NVRAM. */
+	else if (!tg3_nvram_read(tp, mac_offset + 0, &hi) &&
+		 !tg3_nvram_read(tp, mac_offset + 4, &lo)) {
+		nic->node_addr[0] = ((hi >> 16) & 0xff);
+		nic->node_addr[1] = ((hi >> 24) & 0xff);
+		nic->node_addr[2] = ((lo >>  0) & 0xff);
+		nic->node_addr[3] = ((lo >>  8) & 0xff);
+		nic->node_addr[4] = ((lo >> 16) & 0xff);
+		nic->node_addr[5] = ((lo >> 24) & 0xff);
+	}
+	/* Finally just fetch it out of the MAC control regs. */
+	else {
+		hi = tr32(MAC_ADDR_0_HIGH);
+		lo = tr32(MAC_ADDR_0_LOW);
+
+		nic->node_addr[5] = lo & 0xff;
+		nic->node_addr[4] = (lo >> 8) & 0xff;
+		nic->node_addr[3] = (lo >> 16) & 0xff;
+		nic->node_addr[2] = (lo >> 24) & 0xff;
+		nic->node_addr[1] = hi & 0xff;
+		nic->node_addr[0] = (hi >> 8) & 0xff;
+	}
+
+	return 0;
+}
+
+
+static int tg3_setup_dma(struct tg3 *tp)
+{
+	tw32(TG3PCI_CLOCK_CTRL, 0);
+
+	if ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) == 0) {
+		tp->dma_rwctrl =
+			(0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
+			(0x6 << DMA_RWCTRL_PCI_READ_CMD_SHIFT) |
+			(0x7 << DMA_RWCTRL_WRITE_WATER_SHIFT) |
+			(0x7 << DMA_RWCTRL_READ_WATER_SHIFT) |
+			(0x0f << DMA_RWCTRL_MIN_DMA_SHIFT);
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) {
+			tp->dma_rwctrl &= ~(DMA_RWCTRL_MIN_DMA << DMA_RWCTRL_MIN_DMA_SHIFT);
+		}
+	} else {
+		if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)
+			tp->dma_rwctrl =
+				(0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
+				(0x6 << DMA_RWCTRL_PCI_READ_CMD_SHIFT) |
+				(0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) |
+				(0x7 << DMA_RWCTRL_READ_WATER_SHIFT) |
+				(0x00 << DMA_RWCTRL_MIN_DMA_SHIFT);
+		else
+			tp->dma_rwctrl =
+				(0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
+				(0x6 << DMA_RWCTRL_PCI_READ_CMD_SHIFT) |
+				(0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) |
+				(0x3 << DMA_RWCTRL_READ_WATER_SHIFT) |
+				(0x0f << DMA_RWCTRL_MIN_DMA_SHIFT);
+
+		/* Wheee, some more chip bugs... */
+		if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) ||
+			(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)) {
+			uint32_t ccval = tr32(TG3PCI_CLOCK_CTRL) & 0x1f;
+
+			if ((ccval == 0x6) || (ccval == 0x7)) {
+				tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
+			}
+		}
+	}
+
+	if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) ||
+		(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704)) {
+		tp->dma_rwctrl &= ~(DMA_RWCTRL_MIN_DMA << DMA_RWCTRL_MIN_DMA_SHIFT);
+	}
+
+	/*
+	  Alf : Tried that, but it does not work. Should be this way though :-(
+	if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
+    	  tp->dma_rwctrl |= 0x001f0000;
+	}
+	*/
+	tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE;
+
+	tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
+
+	return 0;
+}
+
+static void tg3_init_link_config(struct tg3 *tp)
+{
+	tp->link_config.advertising =
+		(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
+		 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full |
+		 ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full |
+		 ADVERTISED_Autoneg | ADVERTISED_MII);
+	tp->carrier_ok = 0;
+	tp->link_config.active_speed = SPEED_INVALID;
+	tp->link_config.active_duplex = DUPLEX_INVALID;
+}
+
+
+#if SUPPORT_PHY_STR
+static const char * tg3_phy_string(struct tg3 *tp)
+{
+	switch (tp->phy_id & PHY_ID_MASK) {
+	case PHY_ID_BCM5400:	return "5400";
+	case PHY_ID_BCM5401:	return "5401";
+	case PHY_ID_BCM5411:	return "5411";
+	case PHY_ID_BCM5701:	return "5701";
+	case PHY_ID_BCM5703:	return "5703";
+	case PHY_ID_BCM5704:	return "5704";
+        case PHY_ID_BCM5705:    return "5705";
+        case PHY_ID_BCM5750:    return "5750";
+	case PHY_ID_BCM5751:	return "5751"; 
+	case PHY_ID_BCM5787:	return "5787";
+	case PHY_ID_BCM8002:	return "8002/serdes";
+	case PHY_ID_SERDES:	return "serdes";
+	default:		return "unknown";
+	};
+}
+#else
+#define tg3_phy_string(TP) "?"
+#endif
+
+
+static void tg3_poll_link(struct tg3 *tp)
+{
+	uint32_t mac_stat;
+
+	mac_stat = tr32(MAC_STATUS);
+	if (tp->phy_id == PHY_ID_SERDES) {
+		if (tp->carrier_ok?
+			(mac_stat & MAC_STATUS_LNKSTATE_CHANGED):
+			(mac_stat & MAC_STATUS_PCS_SYNCED)) {
+			tw32_carefully(MAC_MODE, tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK);
+			tw32_carefully(MAC_MODE, tp->mac_mode);
+
+			tg3_setup_phy(tp);
+		}
+	}
+	else {
+		if (mac_stat & MAC_STATUS_LNKSTATE_CHANGED) {
+			tg3_setup_phy(tp);
+		}
+	}
+}
+
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static void tg3_ack_irqs(struct tg3 *tp)
+{
+	if (tp->hw_status->status & SD_STATUS_UPDATED) {
+		/*
+		 * writing any value to intr-mbox-0 clears PCI INTA# and
+		 * chip-internal interrupt pending events.
+		 * writing non-zero to intr-mbox-0 additional tells the
+		 * NIC to stop sending us irqs, engaging "in-intr-handler"
+		 * event coalescing.
+		 */
+		tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 
+			0x00000001);
+		/*
+		 * Flush PCI write.  This also guarantees that our
+		 * status block has been flushed to host memory.
+		 */
+		tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW);
+		tp->hw_status->status &= ~SD_STATUS_UPDATED;
+	}
+}
+
+static int tg3_poll(struct nic *nic, int retrieve)
+{
+	/* return true if there's an ethernet packet ready to read */
+	/* nic->packet should contain data on return */
+	/* nic->packetlen should contain length of data */
+
+	struct tg3 *tp = &tg3;
+	int result;
+
+	result = 0;
+
+	if ( (tp->hw_status->idx[0].rx_producer != tp->rx_rcb_ptr) && !retrieve ) 
+	  return 1;
+
+	tg3_ack_irqs(tp);
+
+	if (tp->hw_status->idx[0].rx_producer != tp->rx_rcb_ptr) {
+		struct tg3_rx_buffer_desc *desc;
+		unsigned int len;
+		desc = &tp->rx_rcb[tp->rx_rcb_ptr];
+		if ((desc->opaque & RXD_OPAQUE_RING_MASK) == RXD_OPAQUE_RING_STD) {
+			len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) - 4; /* omit crc */
+			
+			nic->packetlen = len;
+			memcpy(nic->packet, bus_to_virt(desc->addr_lo), len);
+			result = 1;
+		}
+		tp->rx_rcb_ptr = (tp->rx_rcb_ptr + 1) % TG3_RX_RCB_RING_SIZE;
+		
+		/* ACK the status ring */
+		tw32_mailbox2(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, tp->rx_rcb_ptr);
+
+		/* Refill RX ring. */
+		if (result) {
+			tp->rx_std_ptr = (tp->rx_std_ptr + 1) % TG3_RX_RING_SIZE;
+			tw32_mailbox2(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW, tp->rx_std_ptr);
+		}
+	}
+	tg3_poll_link(tp);
+	return result;
+}
+
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+#if 0
+static void tg3_set_txd(struct tg3 *tp, int entry,
+	dma_addr_t mapping, int len, uint32_t flags,
+	uint32_t mss_and_is_end)
+{
+	struct tg3_tx_buffer_desc *txd =  &tp->tx_ring[entry];
+	int is_end = (mss_and_is_end & 0x1);
+	if (is_end) {
+		flags |= TXD_FLAG_END;
+	}
+
+	txd->addr_hi   = 0;
+	txd->addr_lo   = mapping & 0xffffffff;
+	txd->len_flags = (len << TXD_LEN_SHIFT) | flags;
+	txd->vlan_tag  = 0 << TXD_VLAN_TAG_SHIFT;
+}
+#endif
+
+static void tg3_transmit(struct nic *nic, const char *dst_addr,
+	unsigned int type, unsigned int size, const char *packet)
+{
+	static int frame_idx;
+	struct eth_frame *frame;
+	
+	/* send the packet to destination */
+	struct tg3_tx_buffer_desc *txd;
+	struct tg3 *tp;
+	uint32_t entry;
+	int i;
+
+	/* Wait until there is a free packet frame */
+	tp = &tg3;
+	i = 0;
+	entry = tp->tx_prod;
+	while((tp->hw_status->idx[0].tx_consumer != entry) &&
+		(tp->hw_status->idx[0].tx_consumer != PREV_TX(entry))) {
+		mdelay(10);	/* give the nick a chance */
+		if (++i > 500) { /* timeout 5s for transmit */
+			printf("transmit timed out\n");
+			tg3_halt(tp);
+			tg3_setup_hw(tp);
+			return;
+		}
+	}
+	if (i != 0) {
+		printf("#");
+	}
+	
+	/* Copy the packet to the our local buffer */
+	frame = &tg3_bss.tx_frame[frame_idx];
+	memcpy(frame->dst_addr, dst_addr, ETH_ALEN);
+	memcpy(frame->src_addr, nic->node_addr, ETH_ALEN);
+	frame->type = htons(type);
+	memset(frame->data, 0, sizeof(frame->data));
+	memcpy(frame->data, packet, size);
+
+	/* Setup the ring buffer entry to transmit */
+	txd            = &tp->tx_ring[entry];
+	txd->addr_hi   = 0; /* Etherboot runs under 4GB */
+	txd->addr_lo   = virt_to_bus(frame);
+	txd->len_flags = ((size + ETH_HLEN) << TXD_LEN_SHIFT) | TXD_FLAG_END;
+	txd->vlan_tag  = 0 << TXD_VLAN_TAG_SHIFT;
+
+	/* Advance to the next entry */
+	entry = NEXT_TX(entry);
+	frame_idx ^= 1;
+
+	/* Packets are ready, update Tx producer idx local and on card */
+	tw32_mailbox((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry);
+	tw32_mailbox2((MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW), entry);
+	tp->tx_prod = entry;
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void tg3_disable ( struct nic *nic __unused ) {
+	struct tg3 *tp = &tg3;
+	/* put the card in its initial state */
+	/* This function serves 3 purposes.
+	 * This disables DMA and interrupts so we don't receive
+	 *  unexpected packets or interrupts from the card after
+	 *  etherboot has finished. 
+	 * This frees resources so etherboot may use
+	 *  this driver on another interface
+	 * This allows etherboot to reinitialize the interface
+	 *  if something is something goes wrong.
+	 */
+	tg3_halt(tp);
+	tp->tg3_flags &= ~(TG3_FLAG_INIT_COMPLETE|TG3_FLAG_GOT_SERDES_FLOWCTL);
+	tp->carrier_ok = 0;
+	iounmap((void *)tp->regs);
+}
+
+/**************************************************************************
+IRQ - Enable, Disable, or Force interrupts
+***************************************************************************/
+static void tg3_irq(struct nic *nic __unused, irq_action_t action __unused)
+{
+  switch ( action ) {
+  case DISABLE :
+    break;
+  case ENABLE :
+    break;
+  case FORCE :
+    break;
+  }
+}
+
+static struct nic_operations tg3_operations = {
+	.connect	= dummy_connect,
+	.poll		= tg3_poll,
+	.transmit	= tg3_transmit,
+	.irq		= tg3_irq,
+
+};
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+You should omit the last argument struct pci_device * for a non-PCI NIC
+***************************************************************************/
+static int tg3_probe ( struct nic *nic, struct pci_device *pdev ) {
+
+	struct tg3 *tp = &tg3;
+	unsigned long tg3reg_base, tg3reg_len;
+	int i, err, pm_cap;
+
+	memset(tp, 0, sizeof(*tp));
+
+	adjust_pci_device(pdev);
+
+	nic->irqno  = 0;
+        nic->ioaddr = pdev->ioaddr;
+
+	/* Find power-management capability. */
+	pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
+	if (pm_cap == 0) {
+		printf("Cannot find PowerManagement capability, aborting.\n");
+		return 0;
+	}
+	tg3reg_base = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);
+	if (tg3reg_base == -1UL) {
+		printf("Unuseable bar\n");
+		return 0;
+	}
+	tg3reg_len  = pci_bar_size(pdev,  PCI_BASE_ADDRESS_0);
+
+	tp->pdev       = pdev;
+	tp->nic        = nic;
+	tp->pm_cap     = pm_cap;
+	tp->rx_mode    = 0;
+	tp->tx_mode    = 0;
+	tp->mi_mode    = MAC_MI_MODE_BASE;
+	tp->tg3_flags  = 0 & ~TG3_FLAG_INIT_COMPLETE; 
+	
+	/* The word/byte swap controls here control register access byte
+	 * swapping.  DMA data byte swapping is controlled in the GRC_MODE
+	 * setting below.
+	 */
+	tp->misc_host_ctrl =
+		MISC_HOST_CTRL_MASK_PCI_INT |
+		MISC_HOST_CTRL_WORD_SWAP |
+		MISC_HOST_CTRL_INDIR_ACCESS |
+		MISC_HOST_CTRL_PCISTATE_RW;
+
+	/* The NONFRM (non-frame) byte/word swap controls take effect
+	 * on descriptor entries, anything which isn't packet data.
+	 *
+	 * The StrongARM chips on the board (one for tx, one for rx)
+	 * are running in big-endian mode.
+	 */
+	tp->grc_mode = (GRC_MODE_WSWAP_DATA | GRC_MODE_BSWAP_DATA |
+			GRC_MODE_WSWAP_NONFRM_DATA);
+#if __BYTE_ORDER == __BIG_ENDIAN
+	tp->grc_mode |= GRC_MODE_BSWAP_NONFRM_DATA;
+#endif
+	tp->regs = (unsigned long) ioremap(tg3reg_base, tg3reg_len);
+	if (tp->regs == 0UL) {
+		printf("Cannot map device registers, aborting\n");
+		return 0;
+	}
+
+	tg3_init_link_config(tp);
+
+	err = tg3_get_invariants(tp);
+	if (err) {
+		printf("Problem fetching invariants of chip, aborting.\n");
+		goto err_out_iounmap;
+	}
+
+	err = tg3_get_device_address(tp);
+	if (err) {
+		printf("Could not obtain valid ethernet address, aborting.\n");
+		goto err_out_iounmap;
+	}
+
+	DBG ( "Ethernet addr: %s\n", eth_ntoa ( nic->node_addr ) );
+
+	tg3_setup_dma(tp);
+
+	/* Now that we have fully setup the chip, save away a snapshot
+	 * of the PCI config space.  We need to restore this after
+	 * GRC_MISC_CFG core clock resets and some resume events.
+	 */
+	pci_save_state(tp->pdev, tp->pci_cfg_state);
+
+	printf("Tigon3 [partno(%s) rev %hx PHY(%s)] (PCI%s:%s:%s)\n",
+		tp->board_part_number,
+		tp->pci_chip_rev_id,
+		tg3_phy_string(tp),
+		((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "X" : ""),
+		((tp->tg3_flags & TG3_FLAG_PCI_HIGH_SPEED) ?
+			((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "133MHz" : "66MHz") :
+			((tp->tg3_flags & TG3_FLAG_PCIX_MODE) ? "100MHz" : "33MHz")),
+		((tp->tg3_flags & TG3_FLAG_PCI_32BIT) ? "32-bit" : "64-bit"));
+
+
+	err = tg3_setup_hw(tp); 
+	if (err) {
+		goto err_out_disable;
+	} 
+	tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
+
+	/* Wait for a reasonable time for the link to come up */
+	tg3_poll_link(tp);
+	for(i = 0; !tp->carrier_ok && (i < VALID_LINK_TIMEOUT*100); i++) {
+		mdelay(1);
+		tg3_poll_link(tp);
+	}
+	if (!tp->carrier_ok){
+		printf("Valid link not established\n");
+		goto err_out_disable;
+	}
+
+	nic->nic_op	= &tg3_operations;
+	return 1;
+
+ err_out_iounmap:
+	iounmap((void *)tp->regs);
+	return 0;
+ err_out_disable:
+	tg3_disable(nic);
+	return 0;
+}
+
+
+static struct pci_device_id tg3_nics[] = {
+PCI_ROM(0x14e4, 0x1644, "tg3-5700",        "Broadcom Tigon 3 5700", 0),
+PCI_ROM(0x14e4, 0x1645, "tg3-5701",        "Broadcom Tigon 3 5701", 0),
+PCI_ROM(0x14e4, 0x1646, "tg3-5702",        "Broadcom Tigon 3 5702", 0),
+PCI_ROM(0x14e4, 0x1647, "tg3-5703",        "Broadcom Tigon 3 5703", 0),
+PCI_ROM(0x14e4, 0x1648, "tg3-5704",        "Broadcom Tigon 3 5704", 0),
+PCI_ROM(0x14e4, 0x164d, "tg3-5702FE",      "Broadcom Tigon 3 5702FE", 0),
+PCI_ROM(0x14e4, 0x1653, "tg3-5705",        "Broadcom Tigon 3 5705", 0),
+PCI_ROM(0x14e4, 0x1654, "tg3-5705_2",      "Broadcom Tigon 3 5705_2", 0),
+PCI_ROM(0x14e4, 0x1659, "tg3-5721",        "Broadcom Tigon 3 5721", 0),
+PCI_ROM(0x14e4, 0x165d, "tg3-5705M",       "Broadcom Tigon 3 5705M", 0),
+PCI_ROM(0x14e4, 0x165e, "tg3-5705M_2",     "Broadcom Tigon 3 5705M_2", 0),
+PCI_ROM(0x14e4, 0x1677, "tg3-5751",        "Broadcom Tigon 3 5751", 0),
+PCI_ROM(0x14e4, 0x167a, "tg3-5754",        "Broadcom Tigon 3 5754", 0),
+PCI_ROM(0x14e4, 0x1693, "tg3-5787",	   "Broadcom Tigon 3 5787", 0),
+PCI_ROM(0x14e4, 0x1696, "tg3-5782",        "Broadcom Tigon 3 5782", 0),
+PCI_ROM(0x14e4, 0x169a, "tg3-5786",        "Broadcom Tigon 3 5786", 0),
+PCI_ROM(0x14e4, 0x169c, "tg3-5788",        "Broadcom Tigon 3 5788", 0),
+PCI_ROM(0x14e4, 0x169d, "tg3-5789",        "Broadcom Tigon 3 5789", 0),
+PCI_ROM(0x14e4, 0x16a6, "tg3-5702X",       "Broadcom Tigon 3 5702X", 0),
+PCI_ROM(0x14e4, 0x16a7, "tg3-5703X",       "Broadcom Tigon 3 5703X", 0),
+PCI_ROM(0x14e4, 0x16a8, "tg3-5704S",       "Broadcom Tigon 3 5704S", 0),
+PCI_ROM(0x14e4, 0x16c6, "tg3-5702A3",      "Broadcom Tigon 3 5702A3", 0),
+PCI_ROM(0x14e4, 0x16c7, "tg3-5703A3",      "Broadcom Tigon 3 5703A3", 0),
+PCI_ROM(0x14e4, 0x170d, "tg3-5901",        "Broadcom Tigon 3 5901", 0),
+PCI_ROM(0x14e4, 0x170e, "tg3-5901_2",      "Broadcom Tigon 3 5901_2", 0),
+PCI_ROM(0x1148, 0x4400, "tg3-9DXX",        "Syskonnect 9DXX", 0),
+PCI_ROM(0x1148, 0x4500, "tg3-9MXX",        "Syskonnect 9MXX", 0),
+PCI_ROM(0x173b, 0x03e8, "tg3-ac1000",      "Altima AC1000", 0),
+PCI_ROM(0x173b, 0x03e9, "tg3-ac1001",      "Altima AC1001", 0),
+PCI_ROM(0x173b, 0x03ea, "tg3-ac9100",      "Altima AC9100", 0),
+PCI_ROM(0x173b, 0x03eb, "tg3-ac1003",      "Altima AC1003", 0),
+PCI_ROM(0x0e11, 0x00ca, "tg3-hp",	   "HP Tigon 3", 0),
+};
+
+PCI_DRIVER ( tg3_driver, tg3_nics, PCI_NO_CLASS );
+
+DRIVER ( "TG3", nic_driver, pci_driver, tg3_driver,
+	 tg3_probe, tg3_disable );
+
+/*
+ * Local variables:
+ *  c-basic-offset: 8
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3.h ipxe-1.0.1~lliurex1505/src/drivers/net/tg3.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tg3.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tg3.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,2121 @@
+/* $Id$
+ * tg3.h: Definitions for Broadcom Tigon3 ethernet driver.
+ *
+ * Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com)
+ * Copyright (C) 2001 Jeff Garzik (jgarzik@mandrakesoft.com)
+ */
+
+FILE_LICENCE ( GPL2_ONLY );
+
+#ifndef _T3_H
+#define _T3_H
+
+#include "stdint.h"
+
+typedef unsigned long dma_addr_t;
+
+/* From mii.h */
+
+/* Indicates what features are advertised by the interface. */
+#define ADVERTISED_10baseT_Half		(1 << 0)
+#define ADVERTISED_10baseT_Full		(1 << 1)
+#define ADVERTISED_100baseT_Half	(1 << 2)
+#define ADVERTISED_100baseT_Full	(1 << 3)
+#define ADVERTISED_1000baseT_Half	(1 << 4)
+#define ADVERTISED_1000baseT_Full	(1 << 5)
+#define ADVERTISED_Autoneg		(1 << 6)
+#define ADVERTISED_TP			(1 << 7)
+#define ADVERTISED_AUI			(1 << 8)
+#define ADVERTISED_MII			(1 << 9)
+#define ADVERTISED_FIBRE		(1 << 10)
+#define ADVERTISED_BNC			(1 << 11)
+
+/* The following are all involved in forcing a particular link
+ * mode for the device for setting things.  When getting the
+ * devices settings, these indicate the current mode and whether
+ * it was foced up into this mode or autonegotiated.
+ */
+
+/* The forced speed, 10Mb, 100Mb, gigabit. */
+#define SPEED_10		0
+#define SPEED_100		1
+#define SPEED_1000		2
+#define SPEED_INVALID           3
+
+
+/* Duplex, half or full. */
+#define DUPLEX_HALF		0x00
+#define DUPLEX_FULL		0x01
+#define DUPLEX_INVALID          0x02
+
+/* Which connector port. */
+#define PORT_TP			0x00
+#define PORT_AUI		0x01
+#define PORT_MII		0x02
+#define PORT_FIBRE		0x03
+#define PORT_BNC		0x04
+
+/* Which tranceiver to use. */
+#define XCVR_INTERNAL		0x00
+#define XCVR_EXTERNAL		0x01
+#define XCVR_DUMMY1		0x02
+#define XCVR_DUMMY2		0x03
+#define XCVR_DUMMY3		0x04
+
+/* Enable or disable autonegotiation.  If this is set to enable,
+ * the forced link modes above are completely ignored.
+ */
+#define AUTONEG_DISABLE		0x00
+#define AUTONEG_ENABLE		0x01
+
+/* Wake-On-Lan options. */
+#define WAKE_PHY		(1 << 0)
+#define WAKE_UCAST		(1 << 1)
+#define WAKE_MCAST		(1 << 2)
+#define WAKE_BCAST		(1 << 3)
+#define WAKE_ARP		(1 << 4)
+#define WAKE_MAGIC		(1 << 5)
+#define WAKE_MAGICSECURE	(1 << 6) /* only meaningful if WAKE_MAGIC */
+
+/* From tg3.h */
+
+#define TG3_64BIT_REG_HIGH		0x00UL
+#define TG3_64BIT_REG_LOW		0x04UL
+
+/* Descriptor block info. */
+#define TG3_BDINFO_HOST_ADDR		0x0UL /* 64-bit */
+#define TG3_BDINFO_MAXLEN_FLAGS		0x8UL /* 32-bit */
+#define  BDINFO_FLAGS_USE_EXT_RECV	 0x00000001 /* ext rx_buffer_desc */
+#define  BDINFO_FLAGS_DISABLED		 0x00000002
+#define  BDINFO_FLAGS_MAXLEN_MASK	 0xffff0000
+#define  BDINFO_FLAGS_MAXLEN_SHIFT	 16
+#define TG3_BDINFO_NIC_ADDR		0xcUL /* 32-bit */
+#define TG3_BDINFO_SIZE			0x10UL
+
+#define RX_COPY_THRESHOLD  		256
+
+#define RX_STD_MAX_SIZE			1536
+#define RX_STD_MAX_SIZE_5705		512
+#define RX_JUMBO_MAX_SIZE		0xdeadbeef /* XXX */
+
+/* First 256 bytes are a mirror of PCI config space. */
+#define TG3PCI_VENDOR			0x00000000
+#define  TG3PCI_VENDOR_BROADCOM		 0x14e4
+#define TG3PCI_DEVICE			0x00000002
+#define  TG3PCI_DEVICE_TIGON3_1		 0x1644 /* BCM5700 */
+#define  TG3PCI_DEVICE_TIGON3_2		 0x1645 /* BCM5701 */
+#define  TG3PCI_DEVICE_TIGON3_3		 0x1646 /* BCM5702 */
+#define  TG3PCI_DEVICE_TIGON3_4		 0x1647 /* BCM5703 */
+#define TG3PCI_COMMAND			0x00000004
+#define TG3PCI_STATUS			0x00000006
+#define TG3PCI_CCREVID			0x00000008
+#define TG3PCI_CACHELINESZ		0x0000000c
+#define TG3PCI_LATTIMER			0x0000000d
+#define TG3PCI_HEADERTYPE		0x0000000e
+#define TG3PCI_BIST			0x0000000f
+#define TG3PCI_BASE0_LOW		0x00000010
+#define TG3PCI_BASE0_HIGH		0x00000014
+/* 0x18 --> 0x2c unused */
+#define TG3PCI_SUBSYSVENID		0x0000002c
+#define TG3PCI_SUBSYSID			0x0000002e
+#define TG3PCI_ROMADDR			0x00000030
+#define TG3PCI_CAPLIST			0x00000034
+/* 0x35 --> 0x3c unused */
+#define TG3PCI_IRQ_LINE			0x0000003c
+#define TG3PCI_IRQ_PIN			0x0000003d
+#define TG3PCI_MIN_GNT			0x0000003e
+#define TG3PCI_MAX_LAT			0x0000003f
+#define TG3PCI_X_CAPS			0x00000040
+#define  PCIX_CAPS_RELAXED_ORDERING	 0x00020000
+#define  PCIX_CAPS_SPLIT_MASK		 0x00700000
+#define  PCIX_CAPS_SPLIT_SHIFT		 20
+#define  PCIX_CAPS_BURST_MASK		 0x000c0000
+#define  PCIX_CAPS_BURST_SHIFT		 18
+#define  PCIX_CAPS_MAX_BURST_CPIOB	 2
+#define TG3PCI_PM_CAP_PTR		0x00000041
+#define TG3PCI_X_COMMAND		0x00000042
+#define TG3PCI_X_STATUS			0x00000044
+#define TG3PCI_PM_CAP_ID		0x00000048
+#define TG3PCI_VPD_CAP_PTR		0x00000049
+#define TG3PCI_PM_CAPS			0x0000004a
+#define TG3PCI_PM_CTRL_STAT		0x0000004c
+#define TG3PCI_BR_SUPP_EXT		0x0000004e
+#define TG3PCI_PM_DATA			0x0000004f
+#define TG3PCI_VPD_CAP_ID		0x00000050
+#define TG3PCI_MSI_CAP_PTR		0x00000051
+#define TG3PCI_VPD_ADDR_FLAG		0x00000052
+#define  VPD_ADDR_FLAG_WRITE		0x00008000
+#define TG3PCI_VPD_DATA			0x00000054
+#define TG3PCI_MSI_CAP_ID		0x00000058
+#define TG3PCI_NXT_CAP_PTR		0x00000059
+#define TG3PCI_MSI_CTRL			0x0000005a
+#define TG3PCI_MSI_ADDR_LOW		0x0000005c
+#define TG3PCI_MSI_ADDR_HIGH		0x00000060
+#define TG3PCI_MSI_DATA			0x00000064
+/* 0x66 --> 0x68 unused */
+#define TG3PCI_MISC_HOST_CTRL		0x00000068
+#define  MISC_HOST_CTRL_CLEAR_INT	 0x00000001
+#define  MISC_HOST_CTRL_MASK_PCI_INT	 0x00000002
+#define  MISC_HOST_CTRL_BYTE_SWAP	 0x00000004
+#define  MISC_HOST_CTRL_WORD_SWAP	 0x00000008
+#define  MISC_HOST_CTRL_PCISTATE_RW	 0x00000010
+#define  MISC_HOST_CTRL_CLKREG_RW	 0x00000020
+#define  MISC_HOST_CTRL_REGWORD_SWAP	 0x00000040
+#define  MISC_HOST_CTRL_INDIR_ACCESS	 0x00000080
+#define  MISC_HOST_CTRL_IRQ_MASK_MODE	 0x00000100
+#define  MISC_HOST_CTRL_TAGGED_STATUS	 0x00000200
+#define  MISC_HOST_CTRL_CHIPREV		 0xffff0000
+#define  MISC_HOST_CTRL_CHIPREV_SHIFT	 16
+#define  GET_CHIP_REV_ID(MISC_HOST_CTRL) \
+	 (((MISC_HOST_CTRL) & MISC_HOST_CTRL_CHIPREV) >> \
+	  MISC_HOST_CTRL_CHIPREV_SHIFT)
+#define  CHIPREV_ID_5700_A0		 0x7000
+#define  CHIPREV_ID_5700_A1		 0x7001
+#define  CHIPREV_ID_5700_B0		 0x7100
+#define  CHIPREV_ID_5700_B1		 0x7101
+#define  CHIPREV_ID_5700_B3		 0x7102
+#define  CHIPREV_ID_5700_ALTIMA		 0x7104
+#define  CHIPREV_ID_5700_C0		 0x7200
+#define  CHIPREV_ID_5701_A0		 0x0000
+#define  CHIPREV_ID_5701_B0		 0x0100
+#define  CHIPREV_ID_5701_B2		 0x0102
+#define  CHIPREV_ID_5701_B5		 0x0105
+#define  CHIPREV_ID_5703_A0		 0x1000
+#define  CHIPREV_ID_5703_A1		 0x1001
+#define  CHIPREV_ID_5703_A2		 0x1002
+#define  CHIPREV_ID_5703_A3		 0x1003
+#define  CHIPREV_ID_5704_A0		 0x2000
+#define  CHIPREV_ID_5704_A1		 0x2001
+#define  CHIPREV_ID_5704_A2		 0x2002
+#define  CHIPREV_ID_5705_A0		 0x3000
+#define  CHIPREV_ID_5705_A1		 0x3001
+#define	 CHIPREV_ID_5705_A2              0x3002
+#define  CHIPREV_ID_5705_A3              0x3003
+#define  CHIPREV_ID_5721                 0x4101
+#define  CHIPREV_ID_5750_A0              0x4000
+#define  CHIPREV_ID_5750_A1              0x4001
+#define  CHIPREV_ID_5750_A3              0x4003
+#define  GET_ASIC_REV(CHIP_REV_ID)	((CHIP_REV_ID) >> 12)
+#define   ASIC_REV_5700			 0x07
+#define   ASIC_REV_5701			 0x00
+#define   ASIC_REV_5703			 0x01
+#define   ASIC_REV_5704			 0x02
+#define   ASIC_REV_5705			 0x03
+#define   ASIC_REV_5750			 0x04
+#define   ASIC_REV_5787			 0x0b
+#define  GET_CHIP_REV(CHIP_REV_ID)	((CHIP_REV_ID) >> 8)
+#define   CHIPREV_5700_AX		 0x70
+#define   CHIPREV_5700_BX		 0x71
+#define   CHIPREV_5700_CX		 0x72
+#define   CHIPREV_5701_AX		 0x00
+#define  GET_METAL_REV(CHIP_REV_ID)	((CHIP_REV_ID) & 0xff)
+#define   METAL_REV_A0			 0x00
+#define   METAL_REV_A1			 0x01
+#define   METAL_REV_B0			 0x00
+#define   METAL_REV_B1			 0x01
+#define   METAL_REV_B2			 0x02
+#define TG3PCI_DMA_RW_CTRL		0x0000006c
+#define  DMA_RWCTRL_MIN_DMA		 0x000000ff
+#define  DMA_RWCTRL_MIN_DMA_SHIFT	 0
+#define  DMA_RWCTRL_READ_BNDRY_MASK	 0x00000700
+#define  DMA_RWCTRL_READ_BNDRY_DISAB	 0x00000000
+#define  DMA_RWCTRL_READ_BNDRY_16	 0x00000100
+#define  DMA_RWCTRL_READ_BNDRY_32	 0x00000200
+#define  DMA_RWCTRL_READ_BNDRY_64	 0x00000300
+#define  DMA_RWCTRL_READ_BNDRY_128	 0x00000400
+#define  DMA_RWCTRL_READ_BNDRY_256	 0x00000500
+#define  DMA_RWCTRL_READ_BNDRY_512	 0x00000600
+#define  DMA_RWCTRL_READ_BNDRY_1024	 0x00000700
+#define  DMA_RWCTRL_WRITE_BNDRY_MASK	 0x00003800
+#define  DMA_RWCTRL_WRITE_BNDRY_DISAB	 0x00000000
+#define  DMA_RWCTRL_WRITE_BNDRY_16	 0x00000800
+#define  DMA_RWCTRL_WRITE_BNDRY_32	 0x00001000
+#define  DMA_RWCTRL_WRITE_BNDRY_64	 0x00001800
+#define  DMA_RWCTRL_WRITE_BNDRY_128	 0x00002000
+#define  DMA_RWCTRL_WRITE_BNDRY_256	 0x00002800
+#define  DMA_RWCTRL_WRITE_BNDRY_512	 0x00003000
+#define  DMA_RWCTRL_WRITE_BNDRY_1024	 0x00003800
+#define  DMA_RWCTRL_ONE_DMA		 0x00004000
+#define  DMA_RWCTRL_READ_WATER		 0x00070000
+#define  DMA_RWCTRL_READ_WATER_SHIFT	 16
+#define  DMA_RWCTRL_WRITE_WATER		 0x00380000
+#define  DMA_RWCTRL_WRITE_WATER_SHIFT	 19
+#define  DMA_RWCTRL_USE_MEM_READ_MULT	 0x00400000
+#define  DMA_RWCTRL_ASSERT_ALL_BE	 0x00800000
+#define  DMA_RWCTRL_PCI_READ_CMD	 0x0f000000
+#define  DMA_RWCTRL_PCI_READ_CMD_SHIFT	 24
+#define  DMA_RWCTRL_PCI_WRITE_CMD	 0xf0000000
+#define  DMA_RWCTRL_PCI_WRITE_CMD_SHIFT	 28
+#define TG3PCI_PCISTATE			0x00000070
+#define  PCISTATE_FORCE_RESET		 0x00000001
+#define  PCISTATE_INT_NOT_ACTIVE	 0x00000002
+#define  PCISTATE_CONV_PCI_MODE		 0x00000004
+#define  PCISTATE_BUS_SPEED_HIGH	 0x00000008
+#define  PCISTATE_BUS_32BIT		 0x00000010
+#define  PCISTATE_ROM_ENABLE		 0x00000020
+#define  PCISTATE_ROM_RETRY_ENABLE	 0x00000040
+#define  PCISTATE_FLAT_VIEW		 0x00000100
+#define  PCISTATE_RETRY_SAME_DMA	 0x00002000
+#define TG3PCI_CLOCK_CTRL		0x00000074
+#define  CLOCK_CTRL_CORECLK_DISABLE	 0x00000200
+#define  CLOCK_CTRL_RXCLK_DISABLE	 0x00000400
+#define  CLOCK_CTRL_TXCLK_DISABLE	 0x00000800
+#define  CLOCK_CTRL_ALTCLK		 0x00001000
+#define  CLOCK_CTRL_PWRDOWN_PLL133	 0x00008000
+#define  CLOCK_CTRL_44MHZ_CORE		 0x00040000
+#define  CLOCK_CTRL_625_CORE		 0x00100000
+#define  CLOCK_CTRL_FORCE_CLKRUN	 0x00200000
+#define  CLOCK_CTRL_CLKRUN_OENABLE	 0x00400000
+#define  CLOCK_CTRL_DELAY_PCI_GRANT	 0x80000000
+#define TG3PCI_REG_BASE_ADDR		0x00000078
+#define TG3PCI_MEM_WIN_BASE_ADDR	0x0000007c
+#define TG3PCI_REG_DATA			0x00000080
+#define TG3PCI_MEM_WIN_DATA		0x00000084
+#define TG3PCI_MODE_CTRL		0x00000088
+#define TG3PCI_MISC_CFG			0x0000008c
+#define TG3PCI_MISC_LOCAL_CTRL		0x00000090
+/* 0x94 --> 0x98 unused */
+#define TG3PCI_STD_RING_PROD_IDX	0x00000098 /* 64-bit */
+#define TG3PCI_RCV_RET_RING_CON_IDX	0x000000a0 /* 64-bit */
+#define TG3PCI_SND_PROD_IDX		0x000000a8 /* 64-bit */
+/* 0xb0 --> 0x100 unused */
+
+/* 0x100 --> 0x200 unused */
+
+/* Mailbox registers */
+#define MAILBOX_INTERRUPT_0		0x00000200 /* 64-bit */
+#define MAILBOX_INTERRUPT_1		0x00000208 /* 64-bit */
+#define MAILBOX_INTERRUPT_2		0x00000210 /* 64-bit */
+#define MAILBOX_INTERRUPT_3		0x00000218 /* 64-bit */
+#define MAILBOX_GENERAL_0		0x00000220 /* 64-bit */
+#define MAILBOX_GENERAL_1		0x00000228 /* 64-bit */
+#define MAILBOX_GENERAL_2		0x00000230 /* 64-bit */
+#define MAILBOX_GENERAL_3		0x00000238 /* 64-bit */
+#define MAILBOX_GENERAL_4		0x00000240 /* 64-bit */
+#define MAILBOX_GENERAL_5		0x00000248 /* 64-bit */
+#define MAILBOX_GENERAL_6		0x00000250 /* 64-bit */
+#define MAILBOX_GENERAL_7		0x00000258 /* 64-bit */
+#define MAILBOX_RELOAD_STAT		0x00000260 /* 64-bit */
+#define MAILBOX_RCV_STD_PROD_IDX	0x00000268 /* 64-bit */
+#define MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270 /* 64-bit */
+#define MAILBOX_RCV_MINI_PROD_IDX	0x00000278 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_0	0x00000280 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_1	0x00000288 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_2	0x00000290 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_3	0x00000298 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_4	0x000002a0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_5	0x000002a8 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_6	0x000002b0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_7	0x000002b8 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_8	0x000002c0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_9	0x000002c8 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_10	0x000002d0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_11	0x000002d8 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_12	0x000002e0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_13	0x000002e8 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_14	0x000002f0 /* 64-bit */
+#define MAILBOX_RCVRET_CON_IDX_15	0x000002f8 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_0	0x00000300 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_1	0x00000308 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_2	0x00000310 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_3	0x00000318 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_4	0x00000320 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_5	0x00000328 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_6	0x00000330 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_7	0x00000338 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_8	0x00000340 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_9	0x00000348 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_10	0x00000350 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_11	0x00000358 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_12	0x00000360 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_13	0x00000368 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_14	0x00000370 /* 64-bit */
+#define MAILBOX_SNDHOST_PROD_IDX_15	0x00000378 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_0	0x00000380 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_1	0x00000388 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_2	0x00000390 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_3	0x00000398 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_4	0x000003a0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_5	0x000003a8 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_6	0x000003b0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_7	0x000003b8 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_8	0x000003c0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_9	0x000003c8 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_10	0x000003d0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_11	0x000003d8 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_12	0x000003e0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_13	0x000003e8 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_14	0x000003f0 /* 64-bit */
+#define MAILBOX_SNDNIC_PROD_IDX_15	0x000003f8 /* 64-bit */
+
+/* MAC control registers */
+#define MAC_MODE			0x00000400
+#define  MAC_MODE_RESET			 0x00000001
+#define  MAC_MODE_HALF_DUPLEX		 0x00000002
+#define  MAC_MODE_PORT_MODE_MASK	 0x0000000c
+#define  MAC_MODE_PORT_MODE_TBI		 0x0000000c
+#define  MAC_MODE_PORT_MODE_GMII	 0x00000008
+#define  MAC_MODE_PORT_MODE_MII		 0x00000004
+#define  MAC_MODE_PORT_MODE_NONE	 0x00000000
+#define  MAC_MODE_PORT_INT_LPBACK	 0x00000010
+#define  MAC_MODE_TAGGED_MAC_CTRL	 0x00000080
+#define  MAC_MODE_TX_BURSTING		 0x00000100
+#define  MAC_MODE_MAX_DEFER		 0x00000200
+#define  MAC_MODE_LINK_POLARITY		 0x00000400
+#define  MAC_MODE_RXSTAT_ENABLE		 0x00000800
+#define  MAC_MODE_RXSTAT_CLEAR		 0x00001000
+#define  MAC_MODE_RXSTAT_FLUSH		 0x00002000
+#define  MAC_MODE_TXSTAT_ENABLE		 0x00004000
+#define  MAC_MODE_TXSTAT_CLEAR		 0x00008000
+#define  MAC_MODE_TXSTAT_FLUSH		 0x00010000
+#define  MAC_MODE_SEND_CONFIGS		 0x00020000
+#define  MAC_MODE_MAGIC_PKT_ENABLE	 0x00040000
+#define  MAC_MODE_ACPI_ENABLE		 0x00080000
+#define  MAC_MODE_MIP_ENABLE		 0x00100000
+#define  MAC_MODE_TDE_ENABLE		 0x00200000
+#define  MAC_MODE_RDE_ENABLE		 0x00400000
+#define  MAC_MODE_FHDE_ENABLE		 0x00800000
+#define MAC_STATUS			0x00000404
+#define  MAC_STATUS_PCS_SYNCED		 0x00000001
+#define  MAC_STATUS_SIGNAL_DET		 0x00000002
+#define  MAC_STATUS_RCVD_CFG		 0x00000004
+#define  MAC_STATUS_CFG_CHANGED		 0x00000008
+#define  MAC_STATUS_SYNC_CHANGED	 0x00000010
+#define  MAC_STATUS_PORT_DEC_ERR	 0x00000400
+#define  MAC_STATUS_LNKSTATE_CHANGED	 0x00001000
+#define  MAC_STATUS_MI_COMPLETION	 0x00400000
+#define  MAC_STATUS_MI_INTERRUPT	 0x00800000
+#define  MAC_STATUS_AP_ERROR		 0x01000000
+#define  MAC_STATUS_ODI_ERROR		 0x02000000
+#define  MAC_STATUS_RXSTAT_OVERRUN	 0x04000000
+#define  MAC_STATUS_TXSTAT_OVERRUN	 0x08000000
+#define MAC_EVENT			0x00000408
+#define  MAC_EVENT_PORT_DECODE_ERR	 0x00000400
+#define  MAC_EVENT_LNKSTATE_CHANGED	 0x00001000
+#define  MAC_EVENT_MI_COMPLETION	 0x00400000
+#define  MAC_EVENT_MI_INTERRUPT		 0x00800000
+#define  MAC_EVENT_AP_ERROR		 0x01000000
+#define  MAC_EVENT_ODI_ERROR		 0x02000000
+#define  MAC_EVENT_RXSTAT_OVERRUN	 0x04000000
+#define  MAC_EVENT_TXSTAT_OVERRUN	 0x08000000
+#define MAC_LED_CTRL			0x0000040c
+#define  LED_CTRL_LNKLED_OVERRIDE	 0x00000001
+#define  LED_CTRL_1000MBPS_ON		 0x00000002
+#define  LED_CTRL_100MBPS_ON		 0x00000004
+#define  LED_CTRL_10MBPS_ON		 0x00000008
+#define  LED_CTRL_TRAFFIC_OVERRIDE	 0x00000010
+#define  LED_CTRL_TRAFFIC_BLINK		 0x00000020
+#define  LED_CTRL_TRAFFIC_LED		 0x00000040
+#define  LED_CTRL_1000MBPS_STATUS	 0x00000080
+#define  LED_CTRL_100MBPS_STATUS	 0x00000100
+#define  LED_CTRL_10MBPS_STATUS		 0x00000200
+#define  LED_CTRL_TRAFFIC_STATUS	 0x00000400
+#define  LED_CTRL_MAC_MODE		 0x00000000
+#define  LED_CTRL_PHY_MODE_1		 0x00000800
+#define  LED_CTRL_PHY_MODE_2		 0x00001000
+#define  LED_CTRL_BLINK_RATE_MASK	 0x7ff80000
+#define  LED_CTRL_BLINK_RATE_SHIFT	 19
+#define  LED_CTRL_BLINK_PER_OVERRIDE	 0x00080000
+#define  LED_CTRL_BLINK_RATE_OVERRIDE	 0x80000000
+#define MAC_ADDR_0_HIGH			0x00000410 /* upper 2 bytes */
+#define MAC_ADDR_0_LOW			0x00000414 /* lower 4 bytes */
+#define MAC_ADDR_1_HIGH			0x00000418 /* upper 2 bytes */
+#define MAC_ADDR_1_LOW			0x0000041c /* lower 4 bytes */
+#define MAC_ADDR_2_HIGH			0x00000420 /* upper 2 bytes */
+#define MAC_ADDR_2_LOW			0x00000424 /* lower 4 bytes */
+#define MAC_ADDR_3_HIGH			0x00000428 /* upper 2 bytes */
+#define MAC_ADDR_3_LOW			0x0000042c /* lower 4 bytes */
+#define MAC_ACPI_MBUF_PTR		0x00000430
+#define MAC_ACPI_LEN_OFFSET		0x00000434
+#define  ACPI_LENOFF_LEN_MASK		 0x0000ffff
+#define  ACPI_LENOFF_LEN_SHIFT		 0
+#define  ACPI_LENOFF_OFF_MASK		 0x0fff0000
+#define  ACPI_LENOFF_OFF_SHIFT		 16
+#define MAC_TX_BACKOFF_SEED		0x00000438
+#define  TX_BACKOFF_SEED_MASK		 0x000003ff
+#define MAC_RX_MTU_SIZE			0x0000043c
+#define  RX_MTU_SIZE_MASK		 0x0000ffff
+#define MAC_PCS_TEST			0x00000440
+#define  PCS_TEST_PATTERN_MASK		 0x000fffff
+#define  PCS_TEST_PATTERN_SHIFT		 0
+#define  PCS_TEST_ENABLE		 0x00100000
+#define MAC_TX_AUTO_NEG			0x00000444
+#define  TX_AUTO_NEG_MASK		 0x0000ffff
+#define  TX_AUTO_NEG_SHIFT		 0
+#define MAC_RX_AUTO_NEG			0x00000448
+#define  RX_AUTO_NEG_MASK		 0x0000ffff
+#define  RX_AUTO_NEG_SHIFT		 0
+#define MAC_MI_COM			0x0000044c
+#define  MI_COM_CMD_MASK		 0x0c000000
+#define  MI_COM_CMD_WRITE		 0x04000000
+#define  MI_COM_CMD_READ		 0x08000000
+#define  MI_COM_READ_FAILED		 0x10000000
+#define  MI_COM_START			 0x20000000
+#define  MI_COM_BUSY			 0x20000000
+#define  MI_COM_PHY_ADDR_MASK		 0x03e00000
+#define  MI_COM_PHY_ADDR_SHIFT		 21
+#define  MI_COM_REG_ADDR_MASK		 0x001f0000
+#define  MI_COM_REG_ADDR_SHIFT		 16
+#define  MI_COM_DATA_MASK		 0x0000ffff
+#define MAC_MI_STAT			0x00000450
+#define  MAC_MI_STAT_LNKSTAT_ATTN_ENAB	 0x00000001
+#define MAC_MI_MODE			0x00000454
+#define  MAC_MI_MODE_CLK_10MHZ		 0x00000001
+#define  MAC_MI_MODE_SHORT_PREAMBLE	 0x00000002
+#define  MAC_MI_MODE_AUTO_POLL		 0x00000010
+#define  MAC_MI_MODE_CORE_CLK_62MHZ	 0x00008000
+#define  MAC_MI_MODE_BASE		 0x000c0000 /* XXX magic values XXX */
+#define MAC_AUTO_POLL_STATUS		0x00000458
+#define  MAC_AUTO_POLL_ERROR		 0x00000001
+#define MAC_TX_MODE			0x0000045c
+#define  TX_MODE_RESET			 0x00000001
+#define  TX_MODE_ENABLE			 0x00000002
+#define  TX_MODE_FLOW_CTRL_ENABLE	 0x00000010
+#define  TX_MODE_BIG_BCKOFF_ENABLE	 0x00000020
+#define  TX_MODE_LONG_PAUSE_ENABLE	 0x00000040
+#define MAC_TX_STATUS			0x00000460
+#define  TX_STATUS_XOFFED		 0x00000001
+#define  TX_STATUS_SENT_XOFF		 0x00000002
+#define  TX_STATUS_SENT_XON		 0x00000004
+#define  TX_STATUS_LINK_UP		 0x00000008
+#define  TX_STATUS_ODI_UNDERRUN		 0x00000010
+#define  TX_STATUS_ODI_OVERRUN		 0x00000020
+#define MAC_TX_LENGTHS			0x00000464
+#define  TX_LENGTHS_SLOT_TIME_MASK	 0x000000ff
+#define  TX_LENGTHS_SLOT_TIME_SHIFT	 0
+#define  TX_LENGTHS_IPG_MASK		 0x00000f00
+#define  TX_LENGTHS_IPG_SHIFT		 8
+#define  TX_LENGTHS_IPG_CRS_MASK	 0x00003000
+#define  TX_LENGTHS_IPG_CRS_SHIFT	 12
+#define MAC_RX_MODE			0x00000468
+#define  RX_MODE_RESET			 0x00000001
+#define  RX_MODE_ENABLE			 0x00000002
+#define  RX_MODE_FLOW_CTRL_ENABLE	 0x00000004
+#define  RX_MODE_KEEP_MAC_CTRL		 0x00000008
+#define  RX_MODE_KEEP_PAUSE		 0x00000010
+#define  RX_MODE_ACCEPT_OVERSIZED	 0x00000020
+#define  RX_MODE_ACCEPT_RUNTS		 0x00000040
+#define  RX_MODE_LEN_CHECK		 0x00000080
+#define  RX_MODE_PROMISC		 0x00000100
+#define  RX_MODE_NO_CRC_CHECK		 0x00000200
+#define  RX_MODE_KEEP_VLAN_TAG		 0x00000400
+#define MAC_RX_STATUS			0x0000046c
+#define  RX_STATUS_REMOTE_TX_XOFFED	 0x00000001
+#define  RX_STATUS_XOFF_RCVD		 0x00000002
+#define  RX_STATUS_XON_RCVD		 0x00000004
+#define MAC_HASH_REG_0			0x00000470
+#define MAC_HASH_REG_1			0x00000474
+#define MAC_HASH_REG_2			0x00000478
+#define MAC_HASH_REG_3			0x0000047c
+#define MAC_RCV_RULE_0			0x00000480
+#define MAC_RCV_VALUE_0			0x00000484
+#define MAC_RCV_RULE_1			0x00000488
+#define MAC_RCV_VALUE_1			0x0000048c
+#define MAC_RCV_RULE_2			0x00000490
+#define MAC_RCV_VALUE_2			0x00000494
+#define MAC_RCV_RULE_3			0x00000498
+#define MAC_RCV_VALUE_3			0x0000049c
+#define MAC_RCV_RULE_4			0x000004a0
+#define MAC_RCV_VALUE_4			0x000004a4
+#define MAC_RCV_RULE_5			0x000004a8
+#define MAC_RCV_VALUE_5			0x000004ac
+#define MAC_RCV_RULE_6			0x000004b0
+#define MAC_RCV_VALUE_6			0x000004b4
+#define MAC_RCV_RULE_7			0x000004b8
+#define MAC_RCV_VALUE_7			0x000004bc
+#define MAC_RCV_RULE_8			0x000004c0
+#define MAC_RCV_VALUE_8			0x000004c4
+#define MAC_RCV_RULE_9			0x000004c8
+#define MAC_RCV_VALUE_9			0x000004cc
+#define MAC_RCV_RULE_10			0x000004d0
+#define MAC_RCV_VALUE_10		0x000004d4
+#define MAC_RCV_RULE_11			0x000004d8
+#define MAC_RCV_VALUE_11		0x000004dc
+#define MAC_RCV_RULE_12			0x000004e0
+#define MAC_RCV_VALUE_12		0x000004e4
+#define MAC_RCV_RULE_13			0x000004e8
+#define MAC_RCV_VALUE_13		0x000004ec
+#define MAC_RCV_RULE_14			0x000004f0
+#define MAC_RCV_VALUE_14		0x000004f4
+#define MAC_RCV_RULE_15			0x000004f8
+#define MAC_RCV_VALUE_15		0x000004fc
+#define  RCV_RULE_DISABLE_MASK		 0x7fffffff
+#define MAC_RCV_RULE_CFG		0x00000500
+#define  RCV_RULE_CFG_DEFAULT_CLASS	0x00000008
+#define MAC_LOW_WMARK_MAX_RX_FRAME	0x00000504
+/* 0x508 --> 0x520 unused */
+#define MAC_HASHREGU_0			0x00000520
+#define MAC_HASHREGU_1			0x00000524
+#define MAC_HASHREGU_2			0x00000528
+#define MAC_HASHREGU_3			0x0000052c
+#define MAC_EXTADDR_0_HIGH		0x00000530
+#define MAC_EXTADDR_0_LOW		0x00000534
+#define MAC_EXTADDR_1_HIGH		0x00000538
+#define MAC_EXTADDR_1_LOW		0x0000053c
+#define MAC_EXTADDR_2_HIGH		0x00000540
+#define MAC_EXTADDR_2_LOW		0x00000544
+#define MAC_EXTADDR_3_HIGH		0x00000548
+#define MAC_EXTADDR_3_LOW		0x0000054c
+#define MAC_EXTADDR_4_HIGH		0x00000550
+#define MAC_EXTADDR_4_LOW		0x00000554
+#define MAC_EXTADDR_5_HIGH		0x00000558
+#define MAC_EXTADDR_5_LOW		0x0000055c
+#define MAC_EXTADDR_6_HIGH		0x00000560
+#define MAC_EXTADDR_6_LOW		0x00000564
+#define MAC_EXTADDR_7_HIGH		0x00000568
+#define MAC_EXTADDR_7_LOW		0x0000056c
+#define MAC_EXTADDR_8_HIGH		0x00000570
+#define MAC_EXTADDR_8_LOW		0x00000574
+#define MAC_EXTADDR_9_HIGH		0x00000578
+#define MAC_EXTADDR_9_LOW		0x0000057c
+#define MAC_EXTADDR_10_HIGH		0x00000580
+#define MAC_EXTADDR_10_LOW		0x00000584
+#define MAC_EXTADDR_11_HIGH		0x00000588
+#define MAC_EXTADDR_11_LOW		0x0000058c
+#define MAC_SERDES_CFG			0x00000590
+#define MAC_SERDES_STAT			0x00000594
+/* 0x598 --> 0x600 unused */
+#define MAC_TX_MAC_STATE_BASE		0x00000600 /* 16 bytes */
+#define MAC_RX_MAC_STATE_BASE		0x00000610 /* 20 bytes */
+/* 0x624 --> 0x800 unused */
+#define MAC_TX_STATS_OCTETS		0x00000800
+#define MAC_TX_STATS_RESV1		0x00000804
+#define MAC_TX_STATS_COLLISIONS		0x00000808
+#define MAC_TX_STATS_XON_SENT		0x0000080c
+#define MAC_TX_STATS_XOFF_SENT		0x00000810
+#define MAC_TX_STATS_RESV2		0x00000814
+#define MAC_TX_STATS_MAC_ERRORS		0x00000818
+#define MAC_TX_STATS_SINGLE_COLLISIONS	0x0000081c
+#define MAC_TX_STATS_MULT_COLLISIONS	0x00000820
+#define MAC_TX_STATS_DEFERRED		0x00000824
+#define MAC_TX_STATS_RESV3		0x00000828
+#define MAC_TX_STATS_EXCESSIVE_COL	0x0000082c
+#define MAC_TX_STATS_LATE_COL		0x00000830
+#define MAC_TX_STATS_RESV4_1		0x00000834
+#define MAC_TX_STATS_RESV4_2		0x00000838
+#define MAC_TX_STATS_RESV4_3		0x0000083c
+#define MAC_TX_STATS_RESV4_4		0x00000840
+#define MAC_TX_STATS_RESV4_5		0x00000844
+#define MAC_TX_STATS_RESV4_6		0x00000848
+#define MAC_TX_STATS_RESV4_7		0x0000084c
+#define MAC_TX_STATS_RESV4_8		0x00000850
+#define MAC_TX_STATS_RESV4_9		0x00000854
+#define MAC_TX_STATS_RESV4_10		0x00000858
+#define MAC_TX_STATS_RESV4_11		0x0000085c
+#define MAC_TX_STATS_RESV4_12		0x00000860
+#define MAC_TX_STATS_RESV4_13		0x00000864
+#define MAC_TX_STATS_RESV4_14		0x00000868
+#define MAC_TX_STATS_UCAST		0x0000086c
+#define MAC_TX_STATS_MCAST		0x00000870
+#define MAC_TX_STATS_BCAST		0x00000874
+#define MAC_TX_STATS_RESV5_1		0x00000878
+#define MAC_TX_STATS_RESV5_2		0x0000087c
+#define MAC_RX_STATS_OCTETS		0x00000880
+#define MAC_RX_STATS_RESV1		0x00000884
+#define MAC_RX_STATS_FRAGMENTS		0x00000888
+#define MAC_RX_STATS_UCAST		0x0000088c
+#define MAC_RX_STATS_MCAST		0x00000890
+#define MAC_RX_STATS_BCAST		0x00000894
+#define MAC_RX_STATS_FCS_ERRORS		0x00000898
+#define MAC_RX_STATS_ALIGN_ERRORS	0x0000089c
+#define MAC_RX_STATS_XON_PAUSE_RECVD	0x000008a0
+#define MAC_RX_STATS_XOFF_PAUSE_RECVD	0x000008a4
+#define MAC_RX_STATS_MAC_CTRL_RECVD	0x000008a8
+#define MAC_RX_STATS_XOFF_ENTERED	0x000008ac
+#define MAC_RX_STATS_FRAME_TOO_LONG	0x000008b0
+#define MAC_RX_STATS_JABBERS		0x000008b4
+#define MAC_RX_STATS_UNDERSIZE		0x000008b8
+/* 0x8bc --> 0xc00 unused */
+
+/* Send data initiator control registers */
+#define SNDDATAI_MODE			0x00000c00
+#define  SNDDATAI_MODE_RESET		 0x00000001
+#define  SNDDATAI_MODE_ENABLE		 0x00000002
+#define  SNDDATAI_MODE_STAT_OFLOW_ENAB	 0x00000004
+#define SNDDATAI_STATUS			0x00000c04
+#define  SNDDATAI_STATUS_STAT_OFLOW	 0x00000004
+#define SNDDATAI_STATSCTRL		0x00000c08
+#define  SNDDATAI_SCTRL_ENABLE		 0x00000001
+#define  SNDDATAI_SCTRL_FASTUPD		 0x00000002
+#define  SNDDATAI_SCTRL_CLEAR		 0x00000004
+#define  SNDDATAI_SCTRL_FLUSH		 0x00000008
+#define  SNDDATAI_SCTRL_FORCE_ZERO	 0x00000010
+#define SNDDATAI_STATSENAB		0x00000c0c
+#define SNDDATAI_STATSINCMASK		0x00000c10
+/* 0xc14 --> 0xc80 unused */
+#define SNDDATAI_COS_CNT_0		0x00000c80
+#define SNDDATAI_COS_CNT_1		0x00000c84
+#define SNDDATAI_COS_CNT_2		0x00000c88
+#define SNDDATAI_COS_CNT_3		0x00000c8c
+#define SNDDATAI_COS_CNT_4		0x00000c90
+#define SNDDATAI_COS_CNT_5		0x00000c94
+#define SNDDATAI_COS_CNT_6		0x00000c98
+#define SNDDATAI_COS_CNT_7		0x00000c9c
+#define SNDDATAI_COS_CNT_8		0x00000ca0
+#define SNDDATAI_COS_CNT_9		0x00000ca4
+#define SNDDATAI_COS_CNT_10		0x00000ca8
+#define SNDDATAI_COS_CNT_11		0x00000cac
+#define SNDDATAI_COS_CNT_12		0x00000cb0
+#define SNDDATAI_COS_CNT_13		0x00000cb4
+#define SNDDATAI_COS_CNT_14		0x00000cb8
+#define SNDDATAI_COS_CNT_15		0x00000cbc
+#define SNDDATAI_DMA_RDQ_FULL_CNT	0x00000cc0
+#define SNDDATAI_DMA_PRIO_RDQ_FULL_CNT	0x00000cc4
+#define SNDDATAI_SDCQ_FULL_CNT		0x00000cc8
+#define SNDDATAI_NICRNG_SSND_PIDX_CNT	0x00000ccc
+#define SNDDATAI_STATS_UPDATED_CNT	0x00000cd0
+#define SNDDATAI_INTERRUPTS_CNT		0x00000cd4
+#define SNDDATAI_AVOID_INTERRUPTS_CNT	0x00000cd8
+#define SNDDATAI_SND_THRESH_HIT_CNT	0x00000cdc
+/* 0xce0 --> 0x1000 unused */
+
+/* Send data completion control registers */
+#define SNDDATAC_MODE			0x00001000
+#define  SNDDATAC_MODE_RESET		 0x00000001
+#define  SNDDATAC_MODE_ENABLE		 0x00000002
+/* 0x1004 --> 0x1400 unused */
+
+/* Send BD ring selector */
+#define SNDBDS_MODE			0x00001400
+#define  SNDBDS_MODE_RESET		 0x00000001
+#define  SNDBDS_MODE_ENABLE		 0x00000002
+#define  SNDBDS_MODE_ATTN_ENABLE	 0x00000004
+#define SNDBDS_STATUS			0x00001404
+#define  SNDBDS_STATUS_ERROR_ATTN	 0x00000004
+#define SNDBDS_HWDIAG			0x00001408
+/* 0x140c --> 0x1440 */
+#define SNDBDS_SEL_CON_IDX_0		0x00001440
+#define SNDBDS_SEL_CON_IDX_1		0x00001444
+#define SNDBDS_SEL_CON_IDX_2		0x00001448
+#define SNDBDS_SEL_CON_IDX_3		0x0000144c
+#define SNDBDS_SEL_CON_IDX_4		0x00001450
+#define SNDBDS_SEL_CON_IDX_5		0x00001454
+#define SNDBDS_SEL_CON_IDX_6		0x00001458
+#define SNDBDS_SEL_CON_IDX_7		0x0000145c
+#define SNDBDS_SEL_CON_IDX_8		0x00001460
+#define SNDBDS_SEL_CON_IDX_9		0x00001464
+#define SNDBDS_SEL_CON_IDX_10		0x00001468
+#define SNDBDS_SEL_CON_IDX_11		0x0000146c
+#define SNDBDS_SEL_CON_IDX_12		0x00001470
+#define SNDBDS_SEL_CON_IDX_13		0x00001474
+#define SNDBDS_SEL_CON_IDX_14		0x00001478
+#define SNDBDS_SEL_CON_IDX_15		0x0000147c
+/* 0x1480 --> 0x1800 unused */
+
+/* Send BD initiator control registers */
+#define SNDBDI_MODE			0x00001800
+#define  SNDBDI_MODE_RESET		 0x00000001
+#define  SNDBDI_MODE_ENABLE		 0x00000002
+#define  SNDBDI_MODE_ATTN_ENABLE	 0x00000004
+#define SNDBDI_STATUS			0x00001804
+#define  SNDBDI_STATUS_ERROR_ATTN	 0x00000004
+#define SNDBDI_IN_PROD_IDX_0		0x00001808
+#define SNDBDI_IN_PROD_IDX_1		0x0000180c
+#define SNDBDI_IN_PROD_IDX_2		0x00001810
+#define SNDBDI_IN_PROD_IDX_3		0x00001814
+#define SNDBDI_IN_PROD_IDX_4		0x00001818
+#define SNDBDI_IN_PROD_IDX_5		0x0000181c
+#define SNDBDI_IN_PROD_IDX_6		0x00001820
+#define SNDBDI_IN_PROD_IDX_7		0x00001824
+#define SNDBDI_IN_PROD_IDX_8		0x00001828
+#define SNDBDI_IN_PROD_IDX_9		0x0000182c
+#define SNDBDI_IN_PROD_IDX_10		0x00001830
+#define SNDBDI_IN_PROD_IDX_11		0x00001834
+#define SNDBDI_IN_PROD_IDX_12		0x00001838
+#define SNDBDI_IN_PROD_IDX_13		0x0000183c
+#define SNDBDI_IN_PROD_IDX_14		0x00001840
+#define SNDBDI_IN_PROD_IDX_15		0x00001844
+/* 0x1848 --> 0x1c00 unused */
+
+/* Send BD completion control registers */
+#define SNDBDC_MODE			0x00001c00
+#define SNDBDC_MODE_RESET		 0x00000001
+#define SNDBDC_MODE_ENABLE		 0x00000002
+#define SNDBDC_MODE_ATTN_ENABLE		 0x00000004
+/* 0x1c04 --> 0x2000 unused */
+
+/* Receive list placement control registers */
+#define RCVLPC_MODE			0x00002000
+#define  RCVLPC_MODE_RESET		 0x00000001
+#define  RCVLPC_MODE_ENABLE		 0x00000002
+#define  RCVLPC_MODE_CLASS0_ATTN_ENAB	 0x00000004
+#define  RCVLPC_MODE_MAPOOR_AATTN_ENAB	 0x00000008
+#define  RCVLPC_MODE_STAT_OFLOW_ENAB	 0x00000010
+#define RCVLPC_STATUS			0x00002004
+#define  RCVLPC_STATUS_CLASS0		 0x00000004
+#define  RCVLPC_STATUS_MAPOOR		 0x00000008
+#define  RCVLPC_STATUS_STAT_OFLOW	 0x00000010
+#define RCVLPC_LOCK			0x00002008
+#define  RCVLPC_LOCK_REQ_MASK		 0x0000ffff
+#define  RCVLPC_LOCK_REQ_SHIFT		 0
+#define  RCVLPC_LOCK_GRANT_MASK		 0xffff0000
+#define  RCVLPC_LOCK_GRANT_SHIFT	 16
+#define RCVLPC_NON_EMPTY_BITS		0x0000200c
+#define  RCVLPC_NON_EMPTY_BITS_MASK	 0x0000ffff
+#define RCVLPC_CONFIG			0x00002010
+#define RCVLPC_STATSCTRL		0x00002014
+#define  RCVLPC_STATSCTRL_ENABLE	 0x00000001
+#define  RCVLPC_STATSCTRL_FASTUPD	 0x00000002
+#define RCVLPC_STATS_ENABLE		0x00002018
+#define  RCVLPC_STATSENAB_LNGBRST_RFIX	 0x00400000
+#define RCVLPC_STATS_INCMASK		0x0000201c
+/* 0x2020 --> 0x2100 unused */
+#define RCVLPC_SELLST_BASE		0x00002100 /* 16 16-byte entries */
+#define  SELLST_TAIL			0x00000004
+#define  SELLST_CONT			0x00000008
+#define  SELLST_UNUSED			0x0000000c
+#define RCVLPC_COS_CNTL_BASE		0x00002200 /* 16 4-byte entries */
+#define RCVLPC_DROP_FILTER_CNT		0x00002240
+#define RCVLPC_DMA_WQ_FULL_CNT		0x00002244
+#define RCVLPC_DMA_HIPRIO_WQ_FULL_CNT	0x00002248
+#define RCVLPC_NO_RCV_BD_CNT		0x0000224c
+#define RCVLPC_IN_DISCARDS_CNT		0x00002250
+#define RCVLPC_IN_ERRORS_CNT		0x00002254
+#define RCVLPC_RCV_THRESH_HIT_CNT	0x00002258
+/* 0x225c --> 0x2400 unused */
+
+/* Receive Data and Receive BD Initiator Control */
+#define RCVDBDI_MODE			0x00002400
+#define  RCVDBDI_MODE_RESET		 0x00000001
+#define  RCVDBDI_MODE_ENABLE		 0x00000002
+#define  RCVDBDI_MODE_JUMBOBD_NEEDED	 0x00000004
+#define  RCVDBDI_MODE_FRM_TOO_BIG	 0x00000008
+#define  RCVDBDI_MODE_INV_RING_SZ	 0x00000010
+#define RCVDBDI_STATUS			0x00002404
+#define  RCVDBDI_STATUS_JUMBOBD_NEEDED	 0x00000004
+#define  RCVDBDI_STATUS_FRM_TOO_BIG	 0x00000008
+#define  RCVDBDI_STATUS_INV_RING_SZ	 0x00000010
+#define RCVDBDI_SPLIT_FRAME_MINSZ	0x00002408
+/* 0x240c --> 0x2440 unused */
+#define RCVDBDI_JUMBO_BD		0x00002440 /* TG3_BDINFO_... */
+#define RCVDBDI_STD_BD			0x00002450 /* TG3_BDINFO_... */
+#define RCVDBDI_MINI_BD			0x00002460 /* TG3_BDINFO_... */
+#define RCVDBDI_JUMBO_CON_IDX		0x00002470
+#define RCVDBDI_STD_CON_IDX		0x00002474
+#define RCVDBDI_MINI_CON_IDX		0x00002478
+/* 0x247c --> 0x2480 unused */
+#define RCVDBDI_BD_PROD_IDX_0		0x00002480
+#define RCVDBDI_BD_PROD_IDX_1		0x00002484
+#define RCVDBDI_BD_PROD_IDX_2		0x00002488
+#define RCVDBDI_BD_PROD_IDX_3		0x0000248c
+#define RCVDBDI_BD_PROD_IDX_4		0x00002490
+#define RCVDBDI_BD_PROD_IDX_5		0x00002494
+#define RCVDBDI_BD_PROD_IDX_6		0x00002498
+#define RCVDBDI_BD_PROD_IDX_7		0x0000249c
+#define RCVDBDI_BD_PROD_IDX_8		0x000024a0
+#define RCVDBDI_BD_PROD_IDX_9		0x000024a4
+#define RCVDBDI_BD_PROD_IDX_10		0x000024a8
+#define RCVDBDI_BD_PROD_IDX_11		0x000024ac
+#define RCVDBDI_BD_PROD_IDX_12		0x000024b0
+#define RCVDBDI_BD_PROD_IDX_13		0x000024b4
+#define RCVDBDI_BD_PROD_IDX_14		0x000024b8
+#define RCVDBDI_BD_PROD_IDX_15		0x000024bc
+#define RCVDBDI_HWDIAG			0x000024c0
+/* 0x24c4 --> 0x2800 unused */
+
+/* Receive Data Completion Control */
+#define RCVDCC_MODE			0x00002800
+#define  RCVDCC_MODE_RESET		 0x00000001
+#define  RCVDCC_MODE_ENABLE		 0x00000002
+#define  RCVDCC_MODE_ATTN_ENABLE	 0x00000004
+/* 0x2804 --> 0x2c00 unused */
+
+/* Receive BD Initiator Control Registers */
+#define RCVBDI_MODE			0x00002c00
+#define  RCVBDI_MODE_RESET		 0x00000001
+#define  RCVBDI_MODE_ENABLE		 0x00000002
+#define  RCVBDI_MODE_RCB_ATTN_ENAB	 0x00000004
+#define RCVBDI_STATUS			0x00002c04
+#define  RCVBDI_STATUS_RCB_ATTN		 0x00000004
+#define RCVBDI_JUMBO_PROD_IDX		0x00002c08
+#define RCVBDI_STD_PROD_IDX		0x00002c0c
+#define RCVBDI_MINI_PROD_IDX		0x00002c10
+#define RCVBDI_MINI_THRESH		0x00002c14
+#define RCVBDI_STD_THRESH		0x00002c18
+#define RCVBDI_JUMBO_THRESH		0x00002c1c
+/* 0x2c20 --> 0x3000 unused */
+
+/* Receive BD Completion Control Registers */
+#define RCVCC_MODE			0x00003000
+#define  RCVCC_MODE_RESET		 0x00000001
+#define  RCVCC_MODE_ENABLE		 0x00000002
+#define  RCVCC_MODE_ATTN_ENABLE		 0x00000004
+#define RCVCC_STATUS			0x00003004
+#define  RCVCC_STATUS_ERROR_ATTN	 0x00000004
+#define RCVCC_JUMP_PROD_IDX		0x00003008
+#define RCVCC_STD_PROD_IDX		0x0000300c
+#define RCVCC_MINI_PROD_IDX		0x00003010
+/* 0x3014 --> 0x3400 unused */
+
+/* Receive list selector control registers */
+#define RCVLSC_MODE			0x00003400
+#define  RCVLSC_MODE_RESET		 0x00000001
+#define  RCVLSC_MODE_ENABLE		 0x00000002
+#define  RCVLSC_MODE_ATTN_ENABLE	 0x00000004
+#define RCVLSC_STATUS			0x00003404
+#define  RCVLSC_STATUS_ERROR_ATTN	 0x00000004
+/* 0x3408 --> 0x3800 unused */
+
+/* Mbuf cluster free registers */
+#define MBFREE_MODE			0x00003800
+#define  MBFREE_MODE_RESET		 0x00000001
+#define  MBFREE_MODE_ENABLE		 0x00000002
+#define MBFREE_STATUS			0x00003804
+/* 0x3808 --> 0x3c00 unused */
+
+/* Host coalescing control registers */
+#define HOSTCC_MODE			0x00003c00
+#define  HOSTCC_MODE_RESET		 0x00000001
+#define  HOSTCC_MODE_ENABLE		 0x00000002
+#define  HOSTCC_MODE_ATTN		 0x00000004
+#define  HOSTCC_MODE_NOW		 0x00000008
+#define  HOSTCC_MODE_FULL_STATUS	 0x00000000
+#define  HOSTCC_MODE_64BYTE		 0x00000080
+#define  HOSTCC_MODE_32BYTE		 0x00000100
+#define  HOSTCC_MODE_CLRTICK_RXBD	 0x00000200
+#define  HOSTCC_MODE_CLRTICK_TXBD	 0x00000400
+#define  HOSTCC_MODE_NOINT_ON_NOW	 0x00000800
+#define  HOSTCC_MODE_NOINT_ON_FORCE	 0x00001000
+#define HOSTCC_STATUS			0x00003c04
+#define  HOSTCC_STATUS_ERROR_ATTN	 0x00000004
+#define HOSTCC_RXCOL_TICKS		0x00003c08
+#define  LOW_RXCOL_TICKS		 0x00000032
+#define  DEFAULT_RXCOL_TICKS		 0x00000048
+#define  HIGH_RXCOL_TICKS		 0x00000096
+#define HOSTCC_TXCOL_TICKS		0x00003c0c
+#define  LOW_TXCOL_TICKS		 0x00000096
+#define  DEFAULT_TXCOL_TICKS		 0x0000012c
+#define  HIGH_TXCOL_TICKS		 0x00000145
+#define HOSTCC_RXMAX_FRAMES		0x00003c10
+#define  LOW_RXMAX_FRAMES		 0x00000005
+#define  DEFAULT_RXMAX_FRAMES		 0x00000008
+#define  HIGH_RXMAX_FRAMES		 0x00000012
+#define HOSTCC_TXMAX_FRAMES		0x00003c14
+#define  LOW_TXMAX_FRAMES		 0x00000035
+#define  DEFAULT_TXMAX_FRAMES		 0x0000004b
+#define  HIGH_TXMAX_FRAMES		 0x00000052
+#define HOSTCC_RXCOAL_TICK_INT		0x00003c18
+#define  DEFAULT_RXCOAL_TICK_INT	 0x00000019
+#define HOSTCC_TXCOAL_TICK_INT		0x00003c1c
+#define  DEFAULT_TXCOAL_TICK_INT	 0x00000019
+#define HOSTCC_RXCOAL_MAXF_INT		0x00003c20
+#define  DEFAULT_RXCOAL_MAXF_INT	 0x00000005
+#define HOSTCC_TXCOAL_MAXF_INT		0x00003c24
+#define  DEFAULT_TXCOAL_MAXF_INT	 0x00000005
+#define HOSTCC_STAT_COAL_TICKS		0x00003c28
+#define  DEFAULT_STAT_COAL_TICKS	 0x000f4240
+/* 0x3c2c --> 0x3c30 unused */
+#define HOSTCC_STATS_BLK_HOST_ADDR	0x00003c30 /* 64-bit */
+#define HOSTCC_STATUS_BLK_HOST_ADDR	0x00003c38 /* 64-bit */
+#define HOSTCC_STATS_BLK_NIC_ADDR	0x00003c40
+#define HOSTCC_STATUS_BLK_NIC_ADDR	0x00003c44
+#define HOSTCC_FLOW_ATTN		0x00003c48
+/* 0x3c4c --> 0x3c50 unused */
+#define HOSTCC_JUMBO_CON_IDX		0x00003c50
+#define HOSTCC_STD_CON_IDX		0x00003c54
+#define HOSTCC_MINI_CON_IDX		0x00003c58
+/* 0x3c5c --> 0x3c80 unused */
+#define HOSTCC_RET_PROD_IDX_0		0x00003c80
+#define HOSTCC_RET_PROD_IDX_1		0x00003c84
+#define HOSTCC_RET_PROD_IDX_2		0x00003c88
+#define HOSTCC_RET_PROD_IDX_3		0x00003c8c
+#define HOSTCC_RET_PROD_IDX_4		0x00003c90
+#define HOSTCC_RET_PROD_IDX_5		0x00003c94
+#define HOSTCC_RET_PROD_IDX_6		0x00003c98
+#define HOSTCC_RET_PROD_IDX_7		0x00003c9c
+#define HOSTCC_RET_PROD_IDX_8		0x00003ca0
+#define HOSTCC_RET_PROD_IDX_9		0x00003ca4
+#define HOSTCC_RET_PROD_IDX_10		0x00003ca8
+#define HOSTCC_RET_PROD_IDX_11		0x00003cac
+#define HOSTCC_RET_PROD_IDX_12		0x00003cb0
+#define HOSTCC_RET_PROD_IDX_13		0x00003cb4
+#define HOSTCC_RET_PROD_IDX_14		0x00003cb8
+#define HOSTCC_RET_PROD_IDX_15		0x00003cbc
+#define HOSTCC_SND_CON_IDX_0		0x00003cc0
+#define HOSTCC_SND_CON_IDX_1		0x00003cc4
+#define HOSTCC_SND_CON_IDX_2		0x00003cc8
+#define HOSTCC_SND_CON_IDX_3		0x00003ccc
+#define HOSTCC_SND_CON_IDX_4		0x00003cd0
+#define HOSTCC_SND_CON_IDX_5		0x00003cd4
+#define HOSTCC_SND_CON_IDX_6		0x00003cd8
+#define HOSTCC_SND_CON_IDX_7		0x00003cdc
+#define HOSTCC_SND_CON_IDX_8		0x00003ce0
+#define HOSTCC_SND_CON_IDX_9		0x00003ce4
+#define HOSTCC_SND_CON_IDX_10		0x00003ce8
+#define HOSTCC_SND_CON_IDX_11		0x00003cec
+#define HOSTCC_SND_CON_IDX_12		0x00003cf0
+#define HOSTCC_SND_CON_IDX_13		0x00003cf4
+#define HOSTCC_SND_CON_IDX_14		0x00003cf8
+#define HOSTCC_SND_CON_IDX_15		0x00003cfc
+/* 0x3d00 --> 0x4000 unused */
+
+/* Memory arbiter control registers */
+#define MEMARB_MODE			0x00004000
+#define  MEMARB_MODE_RESET		 0x00000001
+#define  MEMARB_MODE_ENABLE		 0x00000002
+#define MEMARB_STATUS			0x00004004
+#define MEMARB_TRAP_ADDR_LOW		0x00004008
+#define MEMARB_TRAP_ADDR_HIGH		0x0000400c
+/* 0x4010 --> 0x4400 unused */
+
+/* Buffer manager control registers */
+#define BUFMGR_MODE			0x00004400
+#define  BUFMGR_MODE_RESET		 0x00000001
+#define  BUFMGR_MODE_ENABLE		 0x00000002
+#define  BUFMGR_MODE_ATTN_ENABLE	 0x00000004
+#define  BUFMGR_MODE_BM_TEST		 0x00000008
+#define  BUFMGR_MODE_MBLOW_ATTN_ENAB	 0x00000010
+#define BUFMGR_STATUS			0x00004404
+#define  BUFMGR_STATUS_ERROR		 0x00000004
+#define  BUFMGR_STATUS_MBLOW		 0x00000010
+#define BUFMGR_MB_POOL_ADDR		0x00004408
+#define BUFMGR_MB_POOL_SIZE		0x0000440c
+#define BUFMGR_MB_RDMA_LOW_WATER	0x00004410
+#define  DEFAULT_MB_RDMA_LOW_WATER	 0x00000050
+#define  DEFAULT_MB_RDMA_LOW_WATER_5705	 0x00000000
+#define  DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130
+#define BUFMGR_MB_MACRX_LOW_WATER	0x00004414
+#define  DEFAULT_MB_MACRX_LOW_WATER	  0x00000020
+#define  DEFAULT_MB_MACRX_LOW_WATER_5705  0x00000010
+#define  DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
+#define BUFMGR_MB_HIGH_WATER		0x00004418
+#define  DEFAULT_MB_HIGH_WATER		 0x00000060
+#define  DEFAULT_MB_HIGH_WATER_5705	 0x00000060
+#define  DEFAULT_MB_HIGH_WATER_JUMBO	 0x0000017c
+#define BUFMGR_RX_MB_ALLOC_REQ		0x0000441c
+#define  BUFMGR_MB_ALLOC_BIT		 0x10000000
+#define BUFMGR_RX_MB_ALLOC_RESP		0x00004420
+#define BUFMGR_TX_MB_ALLOC_REQ		0x00004424
+#define BUFMGR_TX_MB_ALLOC_RESP		0x00004428
+#define BUFMGR_DMA_DESC_POOL_ADDR	0x0000442c
+#define BUFMGR_DMA_DESC_POOL_SIZE	0x00004430
+#define BUFMGR_DMA_LOW_WATER		0x00004434
+#define  DEFAULT_DMA_LOW_WATER		 0x00000005
+#define BUFMGR_DMA_HIGH_WATER		0x00004438
+#define  DEFAULT_DMA_HIGH_WATER		 0x0000000a
+#define BUFMGR_RX_DMA_ALLOC_REQ		0x0000443c
+#define BUFMGR_RX_DMA_ALLOC_RESP	0x00004440
+#define BUFMGR_TX_DMA_ALLOC_REQ		0x00004444
+#define BUFMGR_TX_DMA_ALLOC_RESP	0x00004448
+#define BUFMGR_HWDIAG_0			0x0000444c
+#define BUFMGR_HWDIAG_1			0x00004450
+#define BUFMGR_HWDIAG_2			0x00004454
+/* 0x4458 --> 0x4800 unused */
+
+/* Read DMA control registers */
+#define RDMAC_MODE			0x00004800
+#define  RDMAC_MODE_RESET		 0x00000001
+#define  RDMAC_MODE_ENABLE		 0x00000002
+#define  RDMAC_MODE_TGTABORT_ENAB	 0x00000004
+#define  RDMAC_MODE_MSTABORT_ENAB	 0x00000008
+#define  RDMAC_MODE_PARITYERR_ENAB	 0x00000010
+#define  RDMAC_MODE_ADDROFLOW_ENAB	 0x00000020
+#define  RDMAC_MODE_FIFOOFLOW_ENAB	 0x00000040
+#define  RDMAC_MODE_FIFOURUN_ENAB	 0x00000080
+#define  RDMAC_MODE_FIFOOREAD_ENAB	 0x00000100
+#define  RDMAC_MODE_LNGREAD_ENAB	 0x00000200
+#define  RDMAC_MODE_SPLIT_ENABLE	 0x00000800
+#define  RDMAC_MODE_SPLIT_RESET		 0x00001000
+#define  RDMAC_MODE_FIFO_SIZE_128	 0x00020000
+#define  RDMAC_MODE_FIFO_LONG_BURST	 0x00030000
+#define RDMAC_STATUS			0x00004804
+#define  RDMAC_STATUS_TGTABORT		 0x00000004
+#define  RDMAC_STATUS_MSTABORT		 0x00000008
+#define  RDMAC_STATUS_PARITYERR		 0x00000010
+#define  RDMAC_STATUS_ADDROFLOW		 0x00000020
+#define  RDMAC_STATUS_FIFOOFLOW		 0x00000040
+#define  RDMAC_STATUS_FIFOURUN		 0x00000080
+#define  RDMAC_STATUS_FIFOOREAD		 0x00000100
+#define  RDMAC_STATUS_LNGREAD		 0x00000200
+/* 0x4808 --> 0x4c00 unused */
+
+/* Write DMA control registers */
+#define WDMAC_MODE			0x00004c00
+#define  WDMAC_MODE_RESET		 0x00000001
+#define  WDMAC_MODE_ENABLE		 0x00000002
+#define  WDMAC_MODE_TGTABORT_ENAB	 0x00000004
+#define  WDMAC_MODE_MSTABORT_ENAB	 0x00000008
+#define  WDMAC_MODE_PARITYERR_ENAB	 0x00000010
+#define  WDMAC_MODE_ADDROFLOW_ENAB	 0x00000020
+#define  WDMAC_MODE_FIFOOFLOW_ENAB	 0x00000040
+#define  WDMAC_MODE_FIFOURUN_ENAB	 0x00000080
+#define  WDMAC_MODE_FIFOOREAD_ENAB	 0x00000100
+#define  WDMAC_MODE_LNGREAD_ENAB	 0x00000200
+#define  WDMAC_MODE_RX_ACCEL	 	 0x00000400
+#define WDMAC_STATUS			0x00004c04
+#define  WDMAC_STATUS_TGTABORT		 0x00000004
+#define  WDMAC_STATUS_MSTABORT		 0x00000008
+#define  WDMAC_STATUS_PARITYERR		 0x00000010
+#define  WDMAC_STATUS_ADDROFLOW		 0x00000020
+#define  WDMAC_STATUS_FIFOOFLOW		 0x00000040
+#define  WDMAC_STATUS_FIFOURUN		 0x00000080
+#define  WDMAC_STATUS_FIFOOREAD		 0x00000100
+#define  WDMAC_STATUS_LNGREAD		 0x00000200
+/* 0x4c08 --> 0x5000 unused */
+
+/* Per-cpu register offsets (arm9) */
+#define CPU_MODE			0x00000000
+#define  CPU_MODE_RESET			 0x00000001
+#define  CPU_MODE_HALT			 0x00000400
+#define CPU_STATE			0x00000004
+#define CPU_EVTMASK			0x00000008
+/* 0xc --> 0x1c reserved */
+#define CPU_PC				0x0000001c
+#define CPU_INSN			0x00000020
+#define CPU_SPAD_UFLOW			0x00000024
+#define CPU_WDOG_CLEAR			0x00000028
+#define CPU_WDOG_VECTOR			0x0000002c
+#define CPU_WDOG_PC			0x00000030
+#define CPU_HW_BP			0x00000034
+/* 0x38 --> 0x44 unused */
+#define CPU_WDOG_SAVED_STATE		0x00000044
+#define CPU_LAST_BRANCH_ADDR		0x00000048
+#define CPU_SPAD_UFLOW_SET		0x0000004c
+/* 0x50 --> 0x200 unused */
+#define CPU_R0				0x00000200
+#define CPU_R1				0x00000204
+#define CPU_R2				0x00000208
+#define CPU_R3				0x0000020c
+#define CPU_R4				0x00000210
+#define CPU_R5				0x00000214
+#define CPU_R6				0x00000218
+#define CPU_R7				0x0000021c
+#define CPU_R8				0x00000220
+#define CPU_R9				0x00000224
+#define CPU_R10				0x00000228
+#define CPU_R11				0x0000022c
+#define CPU_R12				0x00000230
+#define CPU_R13				0x00000234
+#define CPU_R14				0x00000238
+#define CPU_R15				0x0000023c
+#define CPU_R16				0x00000240
+#define CPU_R17				0x00000244
+#define CPU_R18				0x00000248
+#define CPU_R19				0x0000024c
+#define CPU_R20				0x00000250
+#define CPU_R21				0x00000254
+#define CPU_R22				0x00000258
+#define CPU_R23				0x0000025c
+#define CPU_R24				0x00000260
+#define CPU_R25				0x00000264
+#define CPU_R26				0x00000268
+#define CPU_R27				0x0000026c
+#define CPU_R28				0x00000270
+#define CPU_R29				0x00000274
+#define CPU_R30				0x00000278
+#define CPU_R31				0x0000027c
+/* 0x280 --> 0x400 unused */
+
+#define RX_CPU_BASE			0x00005000
+#define TX_CPU_BASE			0x00005400
+
+/* Mailboxes */
+#define GRCMBOX_INTERRUPT_0		0x00005800 /* 64-bit */
+#define GRCMBOX_INTERRUPT_1		0x00005808 /* 64-bit */
+#define GRCMBOX_INTERRUPT_2		0x00005810 /* 64-bit */
+#define GRCMBOX_INTERRUPT_3		0x00005818 /* 64-bit */
+#define GRCMBOX_GENERAL_0		0x00005820 /* 64-bit */
+#define GRCMBOX_GENERAL_1		0x00005828 /* 64-bit */
+#define GRCMBOX_GENERAL_2		0x00005830 /* 64-bit */
+#define GRCMBOX_GENERAL_3		0x00005838 /* 64-bit */
+#define GRCMBOX_GENERAL_4		0x00005840 /* 64-bit */
+#define GRCMBOX_GENERAL_5		0x00005848 /* 64-bit */
+#define GRCMBOX_GENERAL_6		0x00005850 /* 64-bit */
+#define GRCMBOX_GENERAL_7		0x00005858 /* 64-bit */
+#define GRCMBOX_RELOAD_STAT		0x00005860 /* 64-bit */
+#define GRCMBOX_RCVSTD_PROD_IDX		0x00005868 /* 64-bit */
+#define GRCMBOX_RCVJUMBO_PROD_IDX	0x00005870 /* 64-bit */
+#define GRCMBOX_RCVMINI_PROD_IDX	0x00005878 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_0	0x00005880 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_1	0x00005888 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_2	0x00005890 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_3	0x00005898 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_4	0x000058a0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_5	0x000058a8 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_6	0x000058b0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_7	0x000058b8 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_8	0x000058c0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_9	0x000058c8 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_10	0x000058d0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_11	0x000058d8 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_12	0x000058e0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_13	0x000058e8 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_14	0x000058f0 /* 64-bit */
+#define GRCMBOX_RCVRET_CON_IDX_15	0x000058f8 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_0	0x00005900 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_1	0x00005908 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_2	0x00005910 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_3	0x00005918 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_4	0x00005920 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_5	0x00005928 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_6	0x00005930 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_7	0x00005938 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_8	0x00005940 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_9	0x00005948 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_10	0x00005950 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_11	0x00005958 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_12	0x00005960 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_13	0x00005968 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_14	0x00005970 /* 64-bit */
+#define GRCMBOX_SNDHOST_PROD_IDX_15	0x00005978 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_0	0x00005980 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_1	0x00005988 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_2	0x00005990 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_3	0x00005998 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_4	0x000059a0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_5	0x000059a8 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_6	0x000059b0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_7	0x000059b8 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_8	0x000059c0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_9	0x000059c8 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_10	0x000059d0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_11	0x000059d8 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_12	0x000059e0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_13	0x000059e8 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_14	0x000059f0 /* 64-bit */
+#define GRCMBOX_SNDNIC_PROD_IDX_15	0x000059f8 /* 64-bit */
+#define GRCMBOX_HIGH_PRIO_EV_VECTOR	0x00005a00
+#define GRCMBOX_HIGH_PRIO_EV_MASK	0x00005a04
+#define GRCMBOX_LOW_PRIO_EV_VEC		0x00005a08
+#define GRCMBOX_LOW_PRIO_EV_MASK	0x00005a0c
+/* 0x5a10 --> 0x5c00 */
+
+/* Flow Through queues */
+#define FTQ_RESET			0x00005c00
+#define FTQ_RESET_DMA_READ_QUEUE	(1 << 1)
+#define FTQ_RESET_DMA_HIGH_PRI_READ	(1 << 2)
+#define FTQ_RESET_SEND_BD_COMPLETION	(1 << 4)
+#define FTQ_RESET_DMA_WRITE		(1 << 6)
+#define FTQ_RESET_DMA_HIGH_PRI_WRITE	(1 << 7)
+#define FTQ_RESET_SEND_DATA_COMPLETION	(1 << 9)
+#define FTQ_RESET_HOST_COALESCING	(1 << 10)
+#define FTQ_RESET_MAC_TX		(1 << 11)
+#define FTQ_RESET_RX_BD_COMPLETE	(1 << 13)
+#define FTQ_RESET_RX_LIST_PLCMT		(1 << 14)
+#define FTQ_RESET_RX_DATA_COMPLETION	(1 << 16)
+/* 0x5c04 --> 0x5c10 unused */
+#define FTQ_DMA_NORM_READ_CTL		0x00005c10
+#define FTQ_DMA_NORM_READ_FULL_CNT	0x00005c14
+#define FTQ_DMA_NORM_READ_FIFO_ENQDEQ	0x00005c18
+#define FTQ_DMA_NORM_READ_WRITE_PEEK	0x00005c1c
+#define FTQ_DMA_HIGH_READ_CTL		0x00005c20
+#define FTQ_DMA_HIGH_READ_FULL_CNT	0x00005c24
+#define FTQ_DMA_HIGH_READ_FIFO_ENQDEQ	0x00005c28
+#define FTQ_DMA_HIGH_READ_WRITE_PEEK	0x00005c2c
+#define FTQ_DMA_COMP_DISC_CTL		0x00005c30
+#define FTQ_DMA_COMP_DISC_FULL_CNT	0x00005c34
+#define FTQ_DMA_COMP_DISC_FIFO_ENQDEQ	0x00005c38
+#define FTQ_DMA_COMP_DISC_WRITE_PEEK	0x00005c3c
+#define FTQ_SEND_BD_COMP_CTL		0x00005c40
+#define FTQ_SEND_BD_COMP_FULL_CNT	0x00005c44
+#define FTQ_SEND_BD_COMP_FIFO_ENQDEQ	0x00005c48
+#define FTQ_SEND_BD_COMP_WRITE_PEEK	0x00005c4c
+#define FTQ_SEND_DATA_INIT_CTL		0x00005c50
+#define FTQ_SEND_DATA_INIT_FULL_CNT	0x00005c54
+#define FTQ_SEND_DATA_INIT_FIFO_ENQDEQ	0x00005c58
+#define FTQ_SEND_DATA_INIT_WRITE_PEEK	0x00005c5c
+#define FTQ_DMA_NORM_WRITE_CTL		0x00005c60
+#define FTQ_DMA_NORM_WRITE_FULL_CNT	0x00005c64
+#define FTQ_DMA_NORM_WRITE_FIFO_ENQDEQ	0x00005c68
+#define FTQ_DMA_NORM_WRITE_WRITE_PEEK	0x00005c6c
+#define FTQ_DMA_HIGH_WRITE_CTL		0x00005c70
+#define FTQ_DMA_HIGH_WRITE_FULL_CNT	0x00005c74
+#define FTQ_DMA_HIGH_WRITE_FIFO_ENQDEQ	0x00005c78
+#define FTQ_DMA_HIGH_WRITE_WRITE_PEEK	0x00005c7c
+#define FTQ_SWTYPE1_CTL			0x00005c80
+#define FTQ_SWTYPE1_FULL_CNT		0x00005c84
+#define FTQ_SWTYPE1_FIFO_ENQDEQ		0x00005c88
+#define FTQ_SWTYPE1_WRITE_PEEK		0x00005c8c
+#define FTQ_SEND_DATA_COMP_CTL		0x00005c90
+#define FTQ_SEND_DATA_COMP_FULL_CNT	0x00005c94
+#define FTQ_SEND_DATA_COMP_FIFO_ENQDEQ	0x00005c98
+#define FTQ_SEND_DATA_COMP_WRITE_PEEK	0x00005c9c
+#define FTQ_HOST_COAL_CTL		0x00005ca0
+#define FTQ_HOST_COAL_FULL_CNT		0x00005ca4
+#define FTQ_HOST_COAL_FIFO_ENQDEQ	0x00005ca8
+#define FTQ_HOST_COAL_WRITE_PEEK	0x00005cac
+#define FTQ_MAC_TX_CTL			0x00005cb0
+#define FTQ_MAC_TX_FULL_CNT		0x00005cb4
+#define FTQ_MAC_TX_FIFO_ENQDEQ		0x00005cb8
+#define FTQ_MAC_TX_WRITE_PEEK		0x00005cbc
+#define FTQ_MB_FREE_CTL			0x00005cc0
+#define FTQ_MB_FREE_FULL_CNT		0x00005cc4
+#define FTQ_MB_FREE_FIFO_ENQDEQ		0x00005cc8
+#define FTQ_MB_FREE_WRITE_PEEK		0x00005ccc
+#define FTQ_RCVBD_COMP_CTL		0x00005cd0
+#define FTQ_RCVBD_COMP_FULL_CNT		0x00005cd4
+#define FTQ_RCVBD_COMP_FIFO_ENQDEQ	0x00005cd8
+#define FTQ_RCVBD_COMP_WRITE_PEEK	0x00005cdc
+#define FTQ_RCVLST_PLMT_CTL		0x00005ce0
+#define FTQ_RCVLST_PLMT_FULL_CNT	0x00005ce4
+#define FTQ_RCVLST_PLMT_FIFO_ENQDEQ	0x00005ce8
+#define FTQ_RCVLST_PLMT_WRITE_PEEK	0x00005cec
+#define FTQ_RCVDATA_INI_CTL		0x00005cf0
+#define FTQ_RCVDATA_INI_FULL_CNT	0x00005cf4
+#define FTQ_RCVDATA_INI_FIFO_ENQDEQ	0x00005cf8
+#define FTQ_RCVDATA_INI_WRITE_PEEK	0x00005cfc
+#define FTQ_RCVDATA_COMP_CTL		0x00005d00
+#define FTQ_RCVDATA_COMP_FULL_CNT	0x00005d04
+#define FTQ_RCVDATA_COMP_FIFO_ENQDEQ	0x00005d08
+#define FTQ_RCVDATA_COMP_WRITE_PEEK	0x00005d0c
+#define FTQ_SWTYPE2_CTL			0x00005d10
+#define FTQ_SWTYPE2_FULL_CNT		0x00005d14
+#define FTQ_SWTYPE2_FIFO_ENQDEQ		0x00005d18
+#define FTQ_SWTYPE2_WRITE_PEEK		0x00005d1c
+/* 0x5d20 --> 0x6000 unused */
+
+/* Message signaled interrupt registers */
+#define MSGINT_MODE			0x00006000
+#define  MSGINT_MODE_RESET		 0x00000001
+#define  MSGINT_MODE_ENABLE		 0x00000002
+#define MSGINT_STATUS			0x00006004
+#define MSGINT_FIFO			0x00006008
+/* 0x600c --> 0x6400 unused */
+
+/* DMA completion registers */
+#define DMAC_MODE			0x00006400
+#define  DMAC_MODE_RESET		 0x00000001
+#define  DMAC_MODE_ENABLE		 0x00000002
+/* 0x6404 --> 0x6800 unused */
+
+/* GRC registers */
+#define GRC_MODE			0x00006800
+#define  GRC_MODE_UPD_ON_COAL		0x00000001
+#define  GRC_MODE_BSWAP_NONFRM_DATA	0x00000002
+#define  GRC_MODE_WSWAP_NONFRM_DATA	0x00000004
+#define  GRC_MODE_BSWAP_DATA		0x00000010
+#define  GRC_MODE_WSWAP_DATA		0x00000020
+#define  GRC_MODE_SPLITHDR		0x00000100
+#define  GRC_MODE_NOFRM_CRACKING	0x00000200
+#define  GRC_MODE_INCL_CRC		0x00000400
+#define  GRC_MODE_ALLOW_BAD_FRMS	0x00000800
+#define  GRC_MODE_NOIRQ_ON_SENDS	0x00002000
+#define  GRC_MODE_NOIRQ_ON_RCV		0x00004000
+#define  GRC_MODE_FORCE_PCI32BIT	0x00008000
+#define  GRC_MODE_HOST_STACKUP		0x00010000
+#define  GRC_MODE_HOST_SENDBDS		0x00020000
+#define  GRC_MODE_NO_TX_PHDR_CSUM	0x00100000
+#define  GRC_MODE_NO_RX_PHDR_CSUM	0x00800000
+#define  GRC_MODE_IRQ_ON_TX_CPU_ATTN	0x01000000
+#define  GRC_MODE_IRQ_ON_RX_CPU_ATTN	0x02000000
+#define  GRC_MODE_IRQ_ON_MAC_ATTN	0x04000000
+#define  GRC_MODE_IRQ_ON_DMA_ATTN	0x08000000
+#define  GRC_MODE_IRQ_ON_FLOW_ATTN	0x10000000
+#define  GRC_MODE_4X_NIC_SEND_RINGS	0x20000000
+#define  GRC_MODE_MCAST_FRM_ENABLE	0x40000000
+#define GRC_MISC_CFG			0x00006804
+#define  GRC_MISC_CFG_CORECLK_RESET	0x00000001
+#define  GRC_MISC_CFG_PRESCALAR_MASK	0x000000fe
+#define  GRC_MISC_CFG_PRESCALAR_SHIFT	1
+#define  GRC_MISC_CFG_BOARD_ID_MASK	0x0001e000
+#define  GRC_MISC_CFG_BOARD_ID_5700	0x0001e000
+#define  GRC_MISC_CFG_BOARD_ID_5701	0x00000000
+#define  GRC_MISC_CFG_BOARD_ID_5702FE	0x00004000
+#define  GRC_MISC_CFG_BOARD_ID_5703	0x00000000
+#define  GRC_MISC_CFG_BOARD_ID_5703S	0x00002000
+#define  GRC_MISC_CFG_BOARD_ID_5704	0x00000000
+#define  GRC_MISC_CFG_BOARD_ID_5704CIOBE 0x00004000
+#define  GRC_MISC_CFG_BOARD_ID_5704_A2	0x00008000
+#define  GRC_MISC_CFG_BOARD_ID_5788	0x00010000
+#define  GRC_MISC_CFG_BOARD_ID_5788M	0x00018000
+#define  GRC_MISC_CFG_BOARD_ID_AC91002A1 0x00018000
+#define  GRC_MISC_CFG_KEEP_GPHY_POWER	0x04000000
+#define GRC_LOCAL_CTRL			0x00006808
+#define  GRC_LCLCTRL_INT_ACTIVE		0x00000001
+#define  GRC_LCLCTRL_CLEARINT		0x00000002
+#define  GRC_LCLCTRL_SETINT		0x00000004
+#define  GRC_LCLCTRL_INT_ON_ATTN	0x00000008
+#define  GRC_LCLCTRL_GPIO_INPUT0	0x00000100
+#define  GRC_LCLCTRL_GPIO_INPUT1	0x00000200
+#define  GRC_LCLCTRL_GPIO_INPUT2	0x00000400
+#define  GRC_LCLCTRL_GPIO_OE0		0x00000800
+#define  GRC_LCLCTRL_GPIO_OE1		0x00001000
+#define  GRC_LCLCTRL_GPIO_OE2		0x00002000
+#define  GRC_LCLCTRL_GPIO_OUTPUT0	0x00004000
+#define  GRC_LCLCTRL_GPIO_OUTPUT1	0x00008000
+#define  GRC_LCLCTRL_GPIO_OUTPUT2	0x00010000
+#define  GRC_LCLCTRL_EXTMEM_ENABLE	0x00020000
+#define  GRC_LCLCTRL_MEMSZ_MASK		0x001c0000
+#define  GRC_LCLCTRL_MEMSZ_256K		0x00000000
+#define  GRC_LCLCTRL_MEMSZ_512K		0x00040000
+#define  GRC_LCLCTRL_MEMSZ_1M		0x00080000
+#define  GRC_LCLCTRL_MEMSZ_2M		0x000c0000
+#define  GRC_LCLCTRL_MEMSZ_4M		0x00100000
+#define  GRC_LCLCTRL_MEMSZ_8M		0x00140000
+#define  GRC_LCLCTRL_MEMSZ_16M		0x00180000
+#define  GRC_LCLCTRL_BANK_SELECT	0x00200000
+#define  GRC_LCLCTRL_SSRAM_TYPE		0x00400000
+#define  GRC_LCLCTRL_AUTO_SEEPROM	0x01000000
+#define GRC_TIMER			0x0000680c
+#define GRC_RX_CPU_EVENT		0x00006810
+#define GRC_RX_TIMER_REF		0x00006814
+#define GRC_RX_CPU_SEM			0x00006818
+#define GRC_REMOTE_RX_CPU_ATTN		0x0000681c
+#define GRC_TX_CPU_EVENT		0x00006820
+#define GRC_TX_TIMER_REF		0x00006824
+#define GRC_TX_CPU_SEM			0x00006828
+#define GRC_REMOTE_TX_CPU_ATTN		0x0000682c
+#define GRC_MEM_POWER_UP		0x00006830 /* 64-bit */
+#define GRC_EEPROM_ADDR			0x00006838
+#define  EEPROM_ADDR_WRITE		0x00000000
+#define  EEPROM_ADDR_READ		0x80000000
+#define  EEPROM_ADDR_COMPLETE		0x40000000
+#define  EEPROM_ADDR_FSM_RESET		0x20000000
+#define  EEPROM_ADDR_DEVID_MASK		0x1c000000
+#define  EEPROM_ADDR_DEVID_SHIFT	26
+#define  EEPROM_ADDR_START		0x02000000
+#define  EEPROM_ADDR_CLKPERD_SHIFT	16
+#define  EEPROM_ADDR_ADDR_MASK		0x0000ffff
+#define  EEPROM_ADDR_ADDR_SHIFT		0
+#define  EEPROM_DEFAULT_CLOCK_PERIOD	0x60
+#define  EEPROM_CHIP_SIZE		(64 * 1024)
+#define GRC_EEPROM_DATA			0x0000683c
+#define GRC_EEPROM_CTRL			0x00006840
+#define GRC_MDI_CTRL			0x00006844
+#define GRC_SEEPROM_DELAY		0x00006848
+/* 0x684c --> 0x6c00 unused */
+
+/* 0x6c00 --> 0x7000 unused */
+
+/* NVRAM Control registers */
+#define NVRAM_CMD			0x00007000
+#define  NVRAM_CMD_RESET		 0x00000001
+#define  NVRAM_CMD_DONE			 0x00000008
+#define  NVRAM_CMD_GO			 0x00000010
+#define  NVRAM_CMD_WR			 0x00000020
+#define  NVRAM_CMD_RD			 0x00000000
+#define  NVRAM_CMD_ERASE		 0x00000040
+#define  NVRAM_CMD_FIRST		 0x00000080
+#define  NVRAM_CMD_LAST			 0x00000100
+#define NVRAM_STAT			0x00007004
+#define NVRAM_WRDATA			0x00007008
+#define NVRAM_ADDR			0x0000700c
+#define  NVRAM_ADDR_MSK			0x00ffffff
+#define NVRAM_RDDATA			0x00007010
+#define NVRAM_CFG1			0x00007014
+#define  NVRAM_CFG1_FLASHIF_ENAB	 0x00000001
+#define  NVRAM_CFG1_BUFFERED_MODE	 0x00000002
+#define  NVRAM_CFG1_PASS_THRU		 0x00000004
+#define  NVRAM_CFG1_BIT_BANG		 0x00000008
+#define  NVRAM_CFG1_COMPAT_BYPASS	 0x80000000
+#define NVRAM_CFG2			0x00007018
+#define NVRAM_CFG3			0x0000701c
+#define NVRAM_SWARB			0x00007020
+#define  SWARB_REQ_SET0			 0x00000001
+#define  SWARB_REQ_SET1			 0x00000002
+#define  SWARB_REQ_SET2			 0x00000004
+#define  SWARB_REQ_SET3			 0x00000008
+#define  SWARB_REQ_CLR0			 0x00000010
+#define  SWARB_REQ_CLR1			 0x00000020
+#define  SWARB_REQ_CLR2			 0x00000040
+#define  SWARB_REQ_CLR3			 0x00000080
+#define  SWARB_GNT0			 0x00000100
+#define  SWARB_GNT1			 0x00000200
+#define  SWARB_GNT2			 0x00000400
+#define  SWARB_GNT3			 0x00000800
+#define  SWARB_REQ0			 0x00001000
+#define  SWARB_REQ1			 0x00002000
+#define  SWARB_REQ2			 0x00004000
+#define  SWARB_REQ3			 0x00008000
+#define    NVRAM_BUFFERED_PAGE_SIZE	   264
+#define    NVRAM_BUFFERED_PAGE_POS	   9
+/* 0x7024 --> 0x7400 unused */
+
+/* 0x7400 --> 0x8000 unused */
+
+/* 32K Window into NIC internal memory */
+#define NIC_SRAM_WIN_BASE		0x00008000
+
+/* Offsets into first 32k of NIC internal memory. */
+#define NIC_SRAM_PAGE_ZERO		0x00000000
+#define NIC_SRAM_SEND_RCB		0x00000100 /* 16 * TG3_BDINFO_... */
+#define NIC_SRAM_RCV_RET_RCB		0x00000200 /* 16 * TG3_BDINFO_... */
+#define NIC_SRAM_STATS_BLK		0x00000300
+#define NIC_SRAM_STATUS_BLK		0x00000b00
+
+#define NIC_SRAM_FIRMWARE_MBOX		0x00000b50
+#define  NIC_SRAM_FIRMWARE_MBOX_MAGIC1	 0x4B657654
+#define  NIC_SRAM_FIRMWARE_MBOX_MAGIC2	 0x4861764b /* !dma on linkchg */
+
+#define NIC_SRAM_DATA_SIG		0x00000b54
+#define  NIC_SRAM_DATA_SIG_MAGIC	 0x4b657654 /* ascii for 'KevT' */
+
+#define NIC_SRAM_DATA_CFG			0x00000b58
+#define  NIC_SRAM_DATA_CFG_LED_MODE_MASK	 0x0000000c
+#define  NIC_SRAM_DATA_CFG_LED_MODE_UNKNOWN	 0x00000000
+#define  NIC_SRAM_DATA_CFG_LED_TRIPLE_SPD	 0x00000004
+#define  NIC_SRAM_DATA_CFG_LED_OPEN_DRAIN	 0x00000004
+#define  NIC_SRAM_DATA_CFG_LED_LINK_SPD		 0x00000008
+#define  NIC_SRAM_DATA_CFG_LED_OUTPUT		 0x00000008
+#define  NIC_SRAM_DATA_CFG_PHY_TYPE_MASK	 0x00000030
+#define  NIC_SRAM_DATA_CFG_PHY_TYPE_UNKNOWN	 0x00000000
+#define  NIC_SRAM_DATA_CFG_PHY_TYPE_COPPER	 0x00000010
+#define  NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER	 0x00000020
+#define  NIC_SRAM_DATA_CFG_WOL_ENABLE		 0x00000040
+#define  NIC_SRAM_DATA_CFG_ASF_ENABLE		 0x00000080
+#define  NIC_SRAM_DATA_CFG_EEPROM_WP		 0x00000100
+#define  NIC_SRAM_DATA_CFG_MINI_PCI		 0x00001000
+#define  NIC_SRAM_DATA_CFG_FIBER_WOL		 0x00004000
+
+#define NIC_SRAM_DATA_PHY_ID		0x00000b74
+#define  NIC_SRAM_DATA_PHY_ID1_MASK	 0xffff0000
+#define  NIC_SRAM_DATA_PHY_ID2_MASK	 0x0000ffff
+
+#define NIC_SRAM_FW_CMD_MBOX		0x00000b78
+#define  FWCMD_NICDRV_ALIVE		 0x00000001
+#define  FWCMD_NICDRV_PAUSE_FW		 0x00000002
+#define  FWCMD_NICDRV_IPV4ADDR_CHG	 0x00000003
+#define  FWCMD_NICDRV_IPV6ADDR_CHG	 0x00000004
+#define  FWCMD_NICDRV_FIX_DMAR		 0x00000005
+#define  FWCMD_NICDRV_FIX_DMAW		 0x00000006
+#define NIC_SRAM_FW_CMD_LEN_MBOX	0x00000b7c
+#define NIC_SRAM_FW_CMD_DATA_MBOX	0x00000b80
+#define NIC_SRAM_FW_ASF_STATUS_MBOX	0x00000c00
+#define NIC_SRAM_FW_DRV_STATE_MBOX	0x00000c04
+#define  DRV_STATE_START		 0x00000001
+#define  DRV_STATE_UNLOAD		 0x00000002
+#define  DRV_STATE_WOL			 0x00000003
+#define  DRV_STATE_SUSPEND		 0x00000004
+
+#define NIC_SRAM_FW_RESET_TYPE_MBOX	0x00000c08
+
+#define NIC_SRAM_MAC_ADDR_HIGH_MBOX	0x00000c14
+#define NIC_SRAM_MAC_ADDR_LOW_MBOX	0x00000c18
+
+#define NIC_SRAM_RX_MINI_BUFFER_DESC	0x00001000
+
+#define NIC_SRAM_DMA_DESC_POOL_BASE	0x00002000
+#define  NIC_SRAM_DMA_DESC_POOL_SIZE	 0x00002000
+#define NIC_SRAM_TX_BUFFER_DESC		0x00004000 /* 512 entries */
+#define NIC_SRAM_RX_BUFFER_DESC		0x00006000 /* 256 entries */
+#define NIC_SRAM_RX_JUMBO_BUFFER_DESC	0x00007000 /* 256 entries */
+#define NIC_SRAM_MBUF_POOL_BASE		0x00008000
+#define  NIC_SRAM_MBUF_POOL_SIZE96	 0x00018000
+#define  NIC_SRAM_MBUF_POOL_SIZE64	 0x00010000
+#define  NIC_SRAM_MBUF_POOL_BASE5705	0x00010000
+#define  NIC_SRAM_MBUF_POOL_SIZE5705	0x0000e000
+
+/* Currently this is fixed. */
+#define PHY_ADDR		0x01
+
+/* Tigon3 specific PHY MII registers. */
+#define  TG3_BMCR_SPEED1000		0x0040
+
+#define MII_TG3_CTRL			0x09 /* 1000-baseT control register */
+#define  MII_TG3_CTRL_ADV_1000_HALF	0x0100
+#define  MII_TG3_CTRL_ADV_1000_FULL	0x0200
+#define  MII_TG3_CTRL_AS_MASTER		0x0800
+#define  MII_TG3_CTRL_ENABLE_AS_MASTER	0x1000
+
+#define MII_TG3_EXT_CTRL		0x10 /* Extended control register */
+#define  MII_TG3_EXT_CTRL_LNK3_LED_MODE	0x0002
+#define  MII_TG3_EXT_CTRL_TBI		0x8000
+
+#define MII_TG3_EXT_STAT		0x11 /* Extended status register */
+#define  MII_TG3_EXT_STAT_LPASS		0x0100
+
+#define MII_TG3_DSP_RW_PORT		0x15 /* DSP coefficient read/write port */
+
+#define MII_TG3_DSP_ADDRESS		0x17 /* DSP address register */
+
+#define MII_TG3_AUX_CTRL		0x18 /* auxilliary control register */
+
+#define MII_TG3_AUX_STAT		0x19 /* auxilliary status register */
+#define MII_TG3_AUX_STAT_LPASS		0x0004
+#define MII_TG3_AUX_STAT_SPDMASK	0x0700
+#define MII_TG3_AUX_STAT_10HALF		0x0100
+#define MII_TG3_AUX_STAT_10FULL		0x0200
+#define MII_TG3_AUX_STAT_100HALF	0x0300
+#define MII_TG3_AUX_STAT_100_4		0x0400
+#define MII_TG3_AUX_STAT_100FULL	0x0500
+#define MII_TG3_AUX_STAT_1000HALF	0x0600
+#define MII_TG3_AUX_STAT_1000FULL	0x0700
+
+#define MII_TG3_ISTAT			0x1a /* IRQ status register */
+#define MII_TG3_IMASK			0x1b /* IRQ mask register */
+
+/* ISTAT/IMASK event bits */
+#define MII_TG3_INT_LINKCHG		0x0002
+#define MII_TG3_INT_SPEEDCHG		0x0004
+#define MII_TG3_INT_DUPLEXCHG		0x0008
+#define MII_TG3_INT_ANEG_PAGE_RX	0x0400
+
+
+/* There are two ways to manage the TX descriptors on the tigon3.
+ * Either the descriptors are in host DMA'able memory, or they
+ * exist only in the cards on-chip SRAM.  All 16 send bds are under
+ * the same mode, they may not be configured individually.
+ *
+ * The mode we use is controlled by TG3_FLAG_HOST_TXDS in tp->tg3_flags.
+ *
+ * To use host memory TX descriptors:
+ *	1) Set GRC_MODE_HOST_SENDBDS in GRC_MODE register.
+ *	   Make sure GRC_MODE_4X_NIC_SEND_RINGS is clear.
+ *	2) Allocate DMA'able memory.
+ *	3) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM:
+ *	   a) Set TG3_BDINFO_HOST_ADDR to DMA address of memory
+ *	      obtained in step 2
+ *	   b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC.
+ *	   c) Set len field of TG3_BDINFO_MAXLEN_FLAGS to number
+ *            of TX descriptors.  Leave flags field clear.
+ *	4) Access TX descriptors via host memory.  The chip
+ *	   will refetch into local SRAM as needed when producer
+ *	   index mailboxes are updated.
+ *
+ * To use on-chip TX descriptors:
+ *	1) Set GRC_MODE_4X_NIC_SEND_RINGS in GRC_MODE register.
+ *	   Make sure GRC_MODE_HOST_SENDBDS is clear.
+ *	2) In NIC_SRAM_SEND_RCB (of desired index) of on-chip SRAM:
+ *	   a) Set TG3_BDINFO_HOST_ADDR to zero.
+ *	   b) Set TG3_BDINFO_NIC_ADDR to NIC_SRAM_TX_BUFFER_DESC
+ *	   c) TG3_BDINFO_MAXLEN_FLAGS is don't care.
+ *	3) Access TX descriptors directly in on-chip SRAM
+ *	   using normal {read,write}l().  (and not using
+ *         pointer dereferencing of ioremap()'d memory like
+ *	   the broken Broadcom driver does)
+ *
+ * Note that BDINFO_FLAGS_DISABLED should be set in the flags field of
+ * TG3_BDINFO_MAXLEN_FLAGS of all unused SEND_RCB indices.
+ */
+struct tg3_tx_buffer_desc {
+	uint32_t			addr_hi;
+	uint32_t			addr_lo;
+
+	uint32_t			len_flags;
+#define TXD_FLAG_TCPUDP_CSUM		0x0001
+#define TXD_FLAG_IP_CSUM		0x0002
+#define TXD_FLAG_END			0x0004
+#define TXD_FLAG_IP_FRAG		0x0008
+#define TXD_FLAG_IP_FRAG_END		0x0010
+#define TXD_FLAG_VLAN			0x0040
+#define TXD_FLAG_COAL_NOW		0x0080
+#define TXD_FLAG_CPU_PRE_DMA		0x0100
+#define TXD_FLAG_CPU_POST_DMA		0x0200
+#define TXD_FLAG_ADD_SRC_ADDR		0x1000
+#define TXD_FLAG_CHOOSE_SRC_ADDR	0x6000
+#define TXD_FLAG_NO_CRC			0x8000
+#define TXD_LEN_SHIFT			16
+
+	uint32_t			vlan_tag;
+#define TXD_VLAN_TAG_SHIFT		0
+#define TXD_MSS_SHIFT			16
+};
+
+#define TXD_ADDR			0x00UL /* 64-bit */
+#define TXD_LEN_FLAGS			0x08UL /* 32-bit (upper 16-bits are len) */
+#define TXD_VLAN_TAG			0x0cUL /* 32-bit (upper 16-bits are tag) */
+#define TXD_SIZE			0x10UL
+
+struct tg3_rx_buffer_desc {
+	uint32_t			addr_hi;
+	uint32_t			addr_lo;
+
+	uint32_t			idx_len;
+#define RXD_IDX_MASK	0xffff0000
+#define RXD_IDX_SHIFT	16
+#define RXD_LEN_MASK	0x0000ffff
+#define RXD_LEN_SHIFT	0
+
+	uint32_t			type_flags;
+#define RXD_TYPE_SHIFT	16
+#define RXD_FLAGS_SHIFT	0
+
+#define RXD_FLAG_END			0x0004
+#define RXD_FLAG_MINI			0x0800
+#define RXD_FLAG_JUMBO			0x0020
+#define RXD_FLAG_VLAN			0x0040
+#define RXD_FLAG_ERROR			0x0400
+#define RXD_FLAG_IP_CSUM		0x1000
+#define RXD_FLAG_TCPUDP_CSUM		0x2000
+#define RXD_FLAG_IS_TCP			0x4000
+
+	uint32_t			ip_tcp_csum;
+#define RXD_IPCSUM_MASK		0xffff0000
+#define RXD_IPCSUM_SHIFT	16
+#define RXD_TCPCSUM_MASK	0x0000ffff
+#define RXD_TCPCSUM_SHIFT	0
+
+	uint32_t			err_vlan;
+
+#define RXD_VLAN_MASK			0x0000ffff
+
+#define RXD_ERR_BAD_CRC			0x00010000
+#define RXD_ERR_COLLISION		0x00020000
+#define RXD_ERR_LINK_LOST		0x00040000
+#define RXD_ERR_PHY_DECODE		0x00080000
+#define RXD_ERR_ODD_NIBBLE_RCVD_MII	0x00100000
+#define RXD_ERR_MAC_ABRT		0x00200000
+#define RXD_ERR_TOO_SMALL		0x00400000
+#define RXD_ERR_NO_RESOURCES		0x00800000
+#define RXD_ERR_HUGE_FRAME		0x01000000
+#define RXD_ERR_MASK			0xffff0000
+
+	uint32_t			reserved;
+	uint32_t			opaque;
+#define RXD_OPAQUE_INDEX_MASK		0x0000ffff
+#define RXD_OPAQUE_INDEX_SHIFT		0
+#define RXD_OPAQUE_RING_STD		0x00010000
+#define RXD_OPAQUE_RING_JUMBO		0x00020000
+#define RXD_OPAQUE_RING_MINI		0x00040000
+#define RXD_OPAQUE_RING_MASK		0x00070000
+};
+
+struct tg3_ext_rx_buffer_desc {
+	struct {
+		uint32_t		addr_hi;
+		uint32_t		addr_lo;
+	}				addrlist[3];
+	uint32_t			len2_len1;
+	uint32_t			resv_len3;
+	struct tg3_rx_buffer_desc	std;
+};
+
+/* We only use this when testing out the DMA engine
+ * at probe time.  This is the internal format of buffer
+ * descriptors used by the chip at NIC_SRAM_DMA_DESCS.
+ */
+struct tg3_internal_buffer_desc {
+	uint32_t			addr_hi;
+	uint32_t			addr_lo;
+	uint32_t			nic_mbuf;
+	/* XXX FIX THIS */
+#if __BYTE_ORDER == __BIG_ENDIAN
+	uint16_t			cqid_sqid;
+	uint16_t			len;
+#else
+	uint16_t			len;
+	uint16_t			cqid_sqid;
+#endif
+	uint32_t			flags;
+	uint32_t			__cookie1;
+	uint32_t			__cookie2;
+	uint32_t			__cookie3;
+};
+
+#define TG3_HW_STATUS_SIZE		0x50
+struct tg3_hw_status {
+	uint32_t			status;
+#define SD_STATUS_UPDATED		0x00000001
+#define SD_STATUS_LINK_CHG		0x00000002
+#define SD_STATUS_ERROR			0x00000004
+
+	uint32_t			status_tag;
+
+#if __BYTE_ORDER == __BIG_ENDIAN
+	uint16_t			rx_consumer;
+	uint16_t			rx_jumbo_consumer;
+#else
+	uint16_t			rx_jumbo_consumer;
+	uint16_t			rx_consumer;
+#endif
+
+#if __BYTE_ORDER ==  __BIG_ENDIAN
+	uint16_t			reserved;
+	uint16_t			rx_mini_consumer;
+#else
+	uint16_t			rx_mini_consumer;
+	uint16_t			reserved;
+#endif
+	struct {
+#if __BYTE_ORDER ==  __BIG_ENDIAN
+		uint16_t		tx_consumer;
+		uint16_t		rx_producer;
+#else
+		uint16_t		rx_producer;
+		uint16_t		tx_consumer;
+#endif
+	}				idx[16];
+};
+
+typedef struct {
+	uint32_t high, low;
+} tg3_stat64_t;
+
+struct tg3_hw_stats {
+	uint8_t				__reserved0[0x400-0x300];
+
+	/* Statistics maintained by Receive MAC. */
+	tg3_stat64_t			rx_octets;
+	uint64_t			__reserved1;
+	tg3_stat64_t			rx_fragments;
+	tg3_stat64_t			rx_ucast_packets;
+	tg3_stat64_t			rx_mcast_packets;
+	tg3_stat64_t			rx_bcast_packets;
+	tg3_stat64_t			rx_fcs_errors;
+	tg3_stat64_t			rx_align_errors;
+	tg3_stat64_t			rx_xon_pause_rcvd;
+	tg3_stat64_t			rx_xoff_pause_rcvd;
+	tg3_stat64_t			rx_mac_ctrl_rcvd;
+	tg3_stat64_t			rx_xoff_entered;
+	tg3_stat64_t			rx_frame_too_long_errors;
+	tg3_stat64_t			rx_jabbers;
+	tg3_stat64_t			rx_undersize_packets;
+	tg3_stat64_t			rx_in_length_errors;
+	tg3_stat64_t			rx_out_length_errors;
+	tg3_stat64_t			rx_64_or_less_octet_packets;
+	tg3_stat64_t			rx_65_to_127_octet_packets;
+	tg3_stat64_t			rx_128_to_255_octet_packets;
+	tg3_stat64_t			rx_256_to_511_octet_packets;
+	tg3_stat64_t			rx_512_to_1023_octet_packets;
+	tg3_stat64_t			rx_1024_to_1522_octet_packets;
+	tg3_stat64_t			rx_1523_to_2047_octet_packets;
+	tg3_stat64_t			rx_2048_to_4095_octet_packets;
+	tg3_stat64_t			rx_4096_to_8191_octet_packets;
+	tg3_stat64_t			rx_8192_to_9022_octet_packets;
+
+	uint64_t			__unused0[37];
+
+	/* Statistics maintained by Transmit MAC. */
+	tg3_stat64_t			tx_octets;
+	uint64_t			__reserved2;
+	tg3_stat64_t			tx_collisions;
+	tg3_stat64_t			tx_xon_sent;
+	tg3_stat64_t			tx_xoff_sent;
+	tg3_stat64_t			tx_flow_control;
+	tg3_stat64_t			tx_mac_errors;
+	tg3_stat64_t			tx_single_collisions;
+	tg3_stat64_t			tx_mult_collisions;
+	tg3_stat64_t			tx_deferred;
+	uint64_t			__reserved3;
+	tg3_stat64_t			tx_excessive_collisions;
+	tg3_stat64_t			tx_late_collisions;
+	tg3_stat64_t			tx_collide_2times;
+	tg3_stat64_t			tx_collide_3times;
+	tg3_stat64_t			tx_collide_4times;
+	tg3_stat64_t			tx_collide_5times;
+	tg3_stat64_t			tx_collide_6times;
+	tg3_stat64_t			tx_collide_7times;
+	tg3_stat64_t			tx_collide_8times;
+	tg3_stat64_t			tx_collide_9times;
+	tg3_stat64_t			tx_collide_10times;
+	tg3_stat64_t			tx_collide_11times;
+	tg3_stat64_t			tx_collide_12times;
+	tg3_stat64_t			tx_collide_13times;
+	tg3_stat64_t			tx_collide_14times;
+	tg3_stat64_t			tx_collide_15times;
+	tg3_stat64_t			tx_ucast_packets;
+	tg3_stat64_t			tx_mcast_packets;
+	tg3_stat64_t			tx_bcast_packets;
+	tg3_stat64_t			tx_carrier_sense_errors;
+	tg3_stat64_t			tx_discards;
+	tg3_stat64_t			tx_errors;
+
+	uint64_t			__unused1[31];
+
+	/* Statistics maintained by Receive List Placement. */
+	tg3_stat64_t			COS_rx_packets[16];
+	tg3_stat64_t			COS_rx_filter_dropped;
+	tg3_stat64_t			dma_writeq_full;
+	tg3_stat64_t			dma_write_prioq_full;
+	tg3_stat64_t			rxbds_empty;
+	tg3_stat64_t			rx_discards;
+	tg3_stat64_t			rx_errors;
+	tg3_stat64_t			rx_threshold_hit;
+
+	uint64_t			__unused2[9];
+
+	/* Statistics maintained by Send Data Initiator. */
+	tg3_stat64_t			COS_out_packets[16];
+	tg3_stat64_t			dma_readq_full;
+	tg3_stat64_t			dma_read_prioq_full;
+	tg3_stat64_t			tx_comp_queue_full;
+
+	/* Statistics maintained by Host Coalescing. */
+	tg3_stat64_t			ring_set_send_prod_index;
+	tg3_stat64_t			ring_status_update;
+	tg3_stat64_t			nic_irqs;
+	tg3_stat64_t			nic_avoided_irqs;
+	tg3_stat64_t			nic_tx_threshold_hit;
+
+	uint8_t				__reserved4[0xb00-0x9c0];
+};
+
+enum phy_led_mode {
+	led_mode_auto,
+	led_mode_three_link,
+	led_mode_link10
+};
+
+#if 0
+/* 'mapping' is superfluous as the chip does not write into
+ * the tx/rx post rings so we could just fetch it from there.
+ * But the cache behavior is better how we are doing it now.
+ */
+struct ring_info {
+	struct sk_buff			*skb;
+	DECLARE_PCI_UNMAP_ADDR(mapping)
+};
+
+struct tx_ring_info {
+	struct sk_buff			*skb;
+	DECLARE_PCI_UNMAP_ADDR(mapping)
+	uint32_t			prev_vlan_tag;
+};
+#endif
+
+struct tg3_config_info {
+	uint32_t			flags;
+};
+
+struct tg3_link_config {
+	/* Describes what we're trying to get. */
+	uint32_t			advertising;
+#if 0
+	uint16_t			speed;
+	uint8_t				duplex;
+	uint8_t				autoneg;
+#define SPEED_INVALID		0xffff
+#define DUPLEX_INVALID		0xff
+#define AUTONEG_INVALID		0xff
+#endif
+
+	/* Describes what we actually have. */
+	uint8_t				active_speed;
+	uint8_t				active_duplex;
+
+	/* When we go in and out of low power mode we need
+	 * to swap with this state.
+	 */
+#if 0
+	int				phy_is_low_power;
+	uint16_t			orig_speed;
+	uint8_t				orig_duplex;
+	uint8_t				orig_autoneg;
+#endif
+};
+
+struct tg3_bufmgr_config {
+	uint32_t		mbuf_read_dma_low_water;
+	uint32_t		mbuf_mac_rx_low_water;
+	uint32_t		mbuf_high_water;
+
+	uint32_t		mbuf_read_dma_low_water_jumbo;
+	uint32_t		mbuf_mac_rx_low_water_jumbo;
+	uint32_t		mbuf_high_water_jumbo;
+
+	uint32_t		dma_low_water;
+	uint32_t		dma_high_water;
+};
+
+struct tg3 {
+#if 0
+	/* SMP locking strategy:
+	 *
+	 * lock: Held during all operations except TX packet
+	 *       processing.
+	 *
+	 * tx_lock: Held during tg3_start_xmit{,_4gbug} and tg3_tx
+	 *
+	 * If you want to shut up all asynchronous processing you must
+	 * acquire both locks, 'lock' taken before 'tx_lock'.  IRQs must
+	 * be disabled to take 'lock' but only softirq disabling is
+	 * necessary for acquisition of 'tx_lock'.
+	 */
+	spinlock_t			lock;
+	spinlock_t			tx_lock;
+#endif
+
+	uint32_t			tx_prod;
+#if 0
+	uint32_t			tx_cons;
+#endif
+	uint32_t			rx_rcb_ptr;
+	uint32_t			rx_std_ptr;
+#if 0
+	uint32_t			rx_jumbo_ptr;
+	spinlock_t			indirect_lock;
+
+	struct net_device_stats		net_stats;
+	struct net_device_stats		net_stats_prev;
+#endif
+	unsigned long			phy_crc_errors;
+
+#if 0
+	uint32_t			rx_offset;
+#endif
+	uint32_t			tg3_flags;
+#if 0
+#define TG3_FLAG_HOST_TXDS		0x00000001
+#endif
+#define TG3_FLAG_TXD_MBOX_HWBUG		0x00000002
+#define TG3_FLAG_RX_CHECKSUMS		0x00000004
+#define TG3_FLAG_USE_LINKCHG_REG	0x00000008
+#define TG3_FLAG_USE_MI_INTERRUPT	0x00000010
+#define TG3_FLAG_ENABLE_ASF		0x00000020
+#define TG3_FLAG_5701_REG_WRITE_BUG	0x00000040
+#define TG3_FLAG_POLL_SERDES		0x00000080
+#define TG3_FLAG_MBOX_WRITE_REORDER	0x00000100
+#define TG3_FLAG_PCIX_TARGET_HWBUG	0x00000200
+#define TG3_FLAG_WOL_SPEED_100MB	0x00000400
+#define TG3_FLAG_WOL_ENABLE		0x00000800
+#define TG3_FLAG_EEPROM_WRITE_PROT	0x00001000
+#define TG3_FLAG_NVRAM			0x00002000
+#define TG3_FLAG_NVRAM_BUFFERED		0x00004000
+#define TG3_FLAG_RX_PAUSE		0x00008000
+#define TG3_FLAG_TX_PAUSE		0x00010000
+#define TG3_FLAG_PCIX_MODE		0x00020000
+#define TG3_FLAG_PCI_HIGH_SPEED		0x00040000
+#define TG3_FLAG_PCI_32BIT		0x00080000
+#define TG3_FLAG_NO_TX_PSEUDO_CSUM	0x00100000
+#define TG3_FLAG_NO_RX_PSEUDO_CSUM	0x00200000
+#define TG3_FLAG_SERDES_WOL_CAP		0x00400000
+#define TG3_FLAG_JUMBO_ENABLE		0x00800000
+#define TG3_FLAG_10_100_ONLY		0x01000000
+#define TG3_FLAG_PAUSE_AUTONEG		0x02000000
+#define TG3_FLAG_PAUSE_RX		0x04000000
+#define TG3_FLAG_PAUSE_TX		0x08000000
+#define TG3_FLAG_BROKEN_CHECKSUMS	0x10000000
+#define TG3_FLAG_GOT_SERDES_FLOWCTL	0x20000000
+#define TG3_FLAG_SPLIT_MODE		0x40000000
+#define TG3_FLAG_INIT_COMPLETE		0x80000000
+
+	uint32_t			tg3_flags2;
+#define TG3_FLG2_RESTART_TIMER		0x00000001
+#define TG3_FLG2_SUN_5704		0x00000002
+#define TG3_FLG2_NO_ETH_WIRE_SPEED	0x00000004
+#define TG3_FLG2_IS_5788		0x00000008
+#define TG3_FLG2_MAX_RXPEND_64		0x00000010
+#define TG3_FLG2_TSO_CAPABLE		0x00000020
+  // Alf: Hope I'm not breaking anything here !
+#define TG3_FLG2_PCI_EXPRESS            0x00000040
+
+
+
+	uint32_t			split_mode_max_reqs;
+#define SPLIT_MODE_5704_MAX_REQ		3
+
+#if 0
+	struct timer_list		timer;
+	uint16_t			timer_counter;
+	uint16_t			timer_multiplier;
+	uint32_t			timer_offset;
+	uint16_t			asf_counter;
+	uint16_t			asf_multiplier;
+#endif
+
+	struct tg3_link_config		link_config;
+	struct tg3_bufmgr_config	bufmgr_config;
+
+#if 0
+	uint32_t			rx_pending;
+	uint32_t			rx_jumbo_pending;
+	uint32_t			tx_pending;
+#endif
+
+	/* cache h/w values, often passed straight to h/w */
+	uint32_t			rx_mode;
+	uint32_t			tx_mode;
+	uint32_t			mac_mode;
+	uint32_t			mi_mode;
+	uint32_t			misc_host_ctrl;
+	uint32_t			grc_mode;
+	uint32_t			grc_local_ctrl;
+	uint32_t			dma_rwctrl;
+#if 0
+	uint32_t			coalesce_mode;
+#endif
+
+	/* PCI block */
+	uint16_t			pci_chip_rev_id;
+#if 0
+	uint8_t				pci_cacheline_sz;
+	uint8_t				pci_lat_timer;
+	uint8_t				pci_hdr_type;
+	uint8_t				pci_bist;
+#endif
+	uint32_t			pci_cfg_state[64 / sizeof(uint32_t)];
+
+	int				pm_cap;
+
+	/* PHY info */
+	uint32_t			phy_id;
+#define PHY_ID_MASK			0xfffffff0
+#define PHY_ID_BCM5400			0x60008040
+#define PHY_ID_BCM5401			0x60008050
+#define PHY_ID_BCM5411			0x60008070
+#define PHY_ID_BCM5701			0x60008110
+#define PHY_ID_BCM5703			0x60008160
+#define PHY_ID_BCM5704			0x60008190
+#define PHY_ID_BCM5705			0x600081a0
+#define PHY_ID_BCM5750			0x60008180
+#define PHY_ID_BCM5787			0xbc050ce0
+#define PHY_ID_BCM8002			0x60010140
+#define PHY_ID_BCM5751			0x00206180
+#define PHY_ID_SERDES			0xfeedbee0
+#define PHY_ID_INVALID			0xffffffff
+#define PHY_ID_REV_MASK			0x0000000f
+#define PHY_REV_BCM5401_B0		0x1
+#define PHY_REV_BCM5401_B2		0x3
+#define PHY_REV_BCM5401_C0		0x6
+#define PHY_REV_BCM5411_X0		0x1 /* Found on Netgear GA302T */
+
+	enum phy_led_mode		led_mode;
+
+	char				board_part_number[24];
+	uint32_t			nic_sram_data_cfg;
+	uint32_t			pci_clock_ctrl;
+#if 0
+	struct pci_device		*pdev_peer;
+#endif
+
+	/* This macro assumes the passed PHY ID is already masked
+	 * with PHY_ID_MASK.
+	 */
+#define KNOWN_PHY_ID(X)		\
+	((X) == PHY_ID_BCM5400 || (X) == PHY_ID_BCM5401 || \
+	 (X) == PHY_ID_BCM5411 || (X) == PHY_ID_BCM5701 || \
+	 (X) == PHY_ID_BCM5703 || (X) == PHY_ID_BCM5704 || \
+	 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
+	 (X) == PHY_ID_BCM5751 || (X) == PHY_ID_BCM5787 || \
+	 (X) == PHY_ID_BCM8002 || (X) == PHY_ID_SERDES)
+
+	unsigned long			regs;
+	struct pci_device		*pdev;
+	struct nic			*nic;
+#if 0
+	struct net_device		*dev;
+#endif
+#if TG3_VLAN_TAG_USED
+	struct vlan_group		*vlgrp;
+#endif
+
+	struct tg3_rx_buffer_desc	*rx_std;
+#if 0
+	struct ring_info		*rx_std_buffers;
+	dma_addr_t			rx_std_mapping;
+	struct tg3_rx_buffer_desc	*rx_jumbo;
+	struct ring_info		*rx_jumbo_buffers;
+	dma_addr_t			rx_jumbo_mapping;
+#endif
+
+	struct tg3_rx_buffer_desc	*rx_rcb;
+#if 0
+	dma_addr_t			rx_rcb_mapping;
+#endif
+
+	/* TX descs are only used if TG3_FLAG_HOST_TXDS is set. */
+	struct tg3_tx_buffer_desc	*tx_ring;
+#if 0
+	struct tx_ring_info		*tx_buffers;
+	dma_addr_t			tx_desc_mapping;
+#endif
+
+	struct tg3_hw_status		*hw_status;
+#if 0
+	dma_addr_t			status_mapping;
+#endif
+#if 0
+	uint32_t			msg_enable;
+#endif
+
+	struct tg3_hw_stats		*hw_stats;
+#if 0
+	dma_addr_t			stats_mapping;
+#endif
+
+	int				carrier_ok;
+	uint16_t			subsystem_vendor;
+	uint16_t			subsystem_device;
+};
+
+#endif /* !(_T3_H) */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tlan.c ipxe-1.0.1~lliurex1505/src/drivers/net/tlan.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tlan.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tlan.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code based on:
 *	lan.c: Linux ThunderLan Driver:
@@ -94,7 +93,7 @@
 
 static const char *media[] = {
 	"10BaseT-HD ", "10BaseT-FD ", "100baseTx-HD ",
-	"100baseTx-FD", "100baseT4", NULL
+	"100baseTx-FD", "100baseT4", 0
 };
 
 /* This much match tlan_pci_tbl[]!  */
@@ -164,7 +163,7 @@
 	{"Compaq NetFlex-3/E", 0,	/* EISA card */
 	 {0, 0, 0, 0, 0, 0},
 	 TLAN_ADAPTER_ACTIVITY_LED, 0x83},
-	{NULL, 0,
+	{0, 0,
 	 {0, 0, 0, 0, 0, 0},
 	 0, 0},
 };
@@ -202,7 +201,7 @@
 	unsigned short vendor_id;	/* PCI Vendor code */
 	unsigned short dev_id;	/* PCI Device code */
 	const char *nic_name;
-	unsigned int cur_rx, dirty_rx;	/* Producer/consumer ring indices */
+	unsigned int cur_rx, dirty_rx;	/* Producer/consumer ring indicies */
 	unsigned rx_buf_sz;	/* Based on mtu + Slack */
 	struct TLanList *txList;
 	u32 txHead;
@@ -1085,11 +1084,11 @@
 *				for this device.
 *		phy		The address of the PHY to be queried.
 *		reg		The register whose contents are to be
-*				retrieved.
+*				retreived.
 *		val		A pointer to a variable to store the
 *				retrieved value.
 *
-*	This function uses the TLAN's MII bus to retrieve the contents
+*	This function uses the TLAN's MII bus to retreive the contents
 *	of a given register on a PHY.  It sends the appropriate info
 *	and then reads the 16-bit register value from the MII bus via
 *	the TLAN SIO register.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tlan.h ipxe-1.0.1~lliurex1505/src/drivers/net/tlan.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tlan.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tlan.h	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code (almost all) based on:
 *               tlan.c: Linux ThunderLan Driver:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tulip.c ipxe-1.0.1~lliurex1505/src/drivers/net/tulip.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/tulip.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/tulip.c	2012-01-06 23:49:04.000000000 +0000
@@ -228,7 +228,7 @@
       TULIP_IOTYPE, TULIP_SIZE, COMET },
     { "SG Thomson STE10/100A", { 0x2774104a, 0xffffffff, 0, 0, 0, 0 },
       TULIP_IOTYPE, 256, COMET },	/*Ramesh Chander*/
-    { NULL, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
+    { 0, { 0, 0, 0, 0, 0, 0 }, 0, 0, 0 },
 };
 
 enum tbl_flag {
@@ -264,7 +264,7 @@
     { "Xircom tulip work-alike", HAS_MII | HAS_MEDIA_TABLE | ALWAYS_CHECK_MII 
       | HAS_PWRDWN | HAS_NWAY },
     { "SGThomson STE10/100A", HAS_MII | MC_HASH_ONLY },	/*Ramesh Chander*/   
-    { NULL, 0 },
+    { 0, 0 },
 };
 
 /* A full-duplex map for media types. */
@@ -475,7 +475,7 @@
                                     0x1B03, 0x006D, /* 100baseTx, CSR12 0x1B */
                                     0x1B05, 0x006D, /* 100baseTx-FD CSR12 0x1B */
     }},
-    {NULL, 0, 0, 0, {}}};
+    {0, 0, 0, 0, {}}};
 
 static const char * block_name[] = {"21140 non-MII", "21140 MII PHY",
                                     "21142 Serial PHY", "21142 MII PHY", "21143 SYM PHY", "21143 reset method"};
@@ -720,7 +720,7 @@
 
     whereami("parse_eeprom\n");
 
-    tp->mtable = NULL;
+    tp->mtable = 0;
     /* Detect an old-style (SA only) EEPROM layout:
        memcmp(ee_data, ee_data+16, 8). */
     for (i = 0; i < 8; i ++)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/velocity.c ipxe-1.0.1~lliurex1505/src/drivers/net/velocity.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/velocity.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/velocity.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,807 +0,0 @@
-/*
- * Copyright (C) 2012 Adrian Jamróz <adrian.jamroz@gmail.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ethernet.h>
-#include <ipxe/if_ether.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/malloc.h>
-#include <ipxe/pci.h>
-#include <ipxe/mii.h>
-#include "velocity.h"
-
-#define	velocity_setbit(_reg, _mask)	writeb ( readb ( _reg ) | _mask, _reg )
-#define virt_to_le32bus(x)		( cpu_to_le32 ( virt_to_bus ( x ) ) )
-
-/** @file
- *
- * VIA Velocity network driver
- *
- */
-
-/******************************************************************************
- *
- * MII interface
- *
- ******************************************************************************
- */
-
-/**
- * Stop MII auto-polling
- *
- * @v vlc	Velocity device
- * @ret	rc	Return status code
- */
-static int velocity_autopoll_stop ( struct velocity_nic *vlc ) {
-	int timeout = VELOCITY_TIMEOUT_US;
-
-	/* Disable MII auto polling */
-	writeb ( 0, vlc->regs + VELOCITY_MIICR );
-
-	/* Wait for disabling to take effect */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( readb ( vlc->regs + VELOCITY_MIISR ) &
-		             VELOCITY_MIISR_IDLE )
-			return 0;
-	}
-
-	DBGC ( vlc, "MII autopoll stop timeout\n" );
-	return -ETIMEDOUT;
-}
-
-/**
- * Start MII auto-polling
- *
- * @v vlc	Velocity device
- * @ret rc	Return status code
- */
-static int velocity_autopoll_start ( struct velocity_nic *vlc ) {
-	int timeout = VELOCITY_TIMEOUT_US;
-
-	/* Enable MII auto polling */
-	writeb ( VELOCITY_MIICR_MAUTO, vlc->regs + VELOCITY_MIICR );
-
-	/* Wait for enabling to take effect */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( ( readb ( vlc->regs + VELOCITY_MIISR ) &
-		       VELOCITY_MIISR_IDLE ) == 0 )
-			return 0;
-	}
-
-	DBGC ( vlc, "MII autopoll start timeout\n" );
-	return -ETIMEDOUT;
-}
-
-/**
- * Read from MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @ret value		Data read, or negative error
- */
-static int velocity_mii_read ( struct mii_interface *mii, unsigned int reg ) {
-	struct velocity_nic *vlc =
-		container_of ( mii, struct velocity_nic, mii );
-	int timeout = VELOCITY_TIMEOUT_US;
-	int result;
-
-	DBGC2 ( vlc, "VELOCITY %p MII read reg %d\n", vlc, reg );
-
-	/* Disable autopolling before we can access MII */
-	velocity_autopoll_stop ( vlc );
-
-	/* Send read command and address */
-	writeb ( reg, vlc->regs + VELOCITY_MIIADDR );
-	velocity_setbit ( vlc->regs + VELOCITY_MIICR, VELOCITY_MIICR_RCMD );
-
-	/* Wait for read to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( ( readb ( vlc->regs + VELOCITY_MIICR ) &
-		       VELOCITY_MIICR_RCMD ) == 0 ) {
-			result = readw ( vlc->regs + VELOCITY_MIIDATA );
-			velocity_autopoll_start ( vlc );
-			return result;
-		}
-	}
-
-	/* Restart autopolling */
-	velocity_autopoll_start ( vlc );
-
-	DBGC ( vlc, "MII read timeout\n" );
-	return -ETIMEDOUT;
-}
-
-/**
- * Write to MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @v data		Data to write
- * @ret rc		Return status code
- */
-static int velocity_mii_write ( struct mii_interface *mii, unsigned int reg,
-				unsigned int data) {
-	struct velocity_nic *vlc =
-		container_of ( mii, struct velocity_nic, mii );
-	int timeout = VELOCITY_TIMEOUT_US;
-
-	DBGC2 ( vlc, "VELOCITY %p MII write reg %d data 0x%04x\n",
-			vlc, reg, data );
-
-	/* Disable autopolling before we can access MII */
-	velocity_autopoll_stop ( vlc );
-
-	/* Send write command, data and destination register */
-	writeb ( reg, vlc->regs + VELOCITY_MIIADDR );
-	writew ( data, vlc->regs + VELOCITY_MIIDATA );
-	velocity_setbit ( vlc->regs + VELOCITY_MIICR, VELOCITY_MIICR_WCMD );
-
-	/* Wait for write to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( ( readb ( vlc->regs + VELOCITY_MIICR ) &
-		       VELOCITY_MIICR_WCMD ) == 0 ) {
-			velocity_autopoll_start ( vlc );
-			return 0;
-		}
-	}
-
-	/* Restart autopolling */
-	velocity_autopoll_start ( vlc );
-
-	DBGC ( vlc, "MII write timeout\n" );
-	return -ETIMEDOUT;
-}
-
-/** Velocity MII operations */
-static struct mii_operations velocity_mii_operations = {
-	.read = velocity_mii_read,
-	.write = velocity_mii_write,
-};
-
-/**
- * Set Link speed 
- *
- * @v vlc	Velocity device
- */
-static void velocity_set_link ( struct velocity_nic *vlc ) {
-	int tmp;
-
-	/* Advertise 1000MBit */
-	tmp = velocity_mii_read ( &vlc->mii, MII_CTRL1000 );
-	tmp |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
-	velocity_mii_write ( &vlc->mii, MII_CTRL1000, tmp );
-
-	/* Enable GBit operation in MII Control Register */
-	tmp = velocity_mii_read ( &vlc->mii, MII_BMCR );
-	tmp |= BMCR_SPEED1000;
-	velocity_mii_write ( &vlc->mii, MII_BMCR, tmp );
-}
-
-/******************************************************************************
- *
- * Device reset
- *
- ******************************************************************************
- */
-
-/**
- * Reload eeprom contents
- *
- * @v vlc		Velocity device
- */
-static int velocity_reload_eeprom ( struct velocity_nic *vlc ) {
-	int timeout = VELOCITY_TIMEOUT_US;
-
-	/* Initiate reload */
-	velocity_setbit ( vlc->regs + VELOCITY_EECSR, VELOCITY_EECSR_RELOAD );
-
-	/* Wait for reload to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( ( readb ( vlc->regs + VELOCITY_EECSR ) &
-		       VELOCITY_EECSR_RELOAD ) == 0 )
-			return 0;
-	}
-
-	DBGC ( vlc, "VELOCITY %p EEPROM reload timeout\n", vlc );
-	return -ETIMEDOUT;
-}
-
-/**
- * Reset hardware
- *
- * @v vlc		Velocity device
- * @ret rc		Return status code
- */
-static int velocity_reset ( struct velocity_nic *vlc ) {
-	int timeout = VELOCITY_TIMEOUT_US;
-	uint8_t tmp;
-
-	DBGC ( vlc, "VELOCITY %p reset\n", vlc );
-
-	/* clear sticky Power state bits */
-	tmp = readb ( vlc->regs + VELOCITY_STICKY );
-	tmp &= ~( VELOCITY_STICKY_DS0 | VELOCITY_STICKY_DS1 );
-	writeb ( tmp, vlc->regs + VELOCITY_STICKY );
-
-	/* clear PACPI, which might have been enabled by the EEPROM reload */
-	tmp = readb ( vlc->regs + VELOCITY_CFGA );
-	tmp &= ~VELOCITY_CFGA_PACPI;
-	writeb ( tmp, vlc->regs + VELOCITY_CFGA );
-
-	velocity_setbit ( vlc->regs + VELOCITY_CRS1, VELOCITY_CR1_SFRST );
-
-	/* Wait for reset to complete */
-	while ( timeout-- ) {
-		udelay ( 1 );
-		if ( ( readb ( vlc->regs + VELOCITY_CRS1 ) &
-		       VELOCITY_CR1_SFRST ) == 0 )
-			return 0;
-	}
-
-	return -EINVAL;
-}
-
-/******************************************************************************
- *
- * Link state
- *
- ******************************************************************************
- */
-
-/**
- * Check link state
- *
- * @v netdev		Network device
- */
-static void velocity_check_link ( struct net_device *netdev ) {
-	struct velocity_nic *vlc = netdev->priv;
-
-	if ( readb ( vlc->regs + VELOCITY_PHYSTS0 ) & VELOCITY_PHYSTS0_LINK ) {
-		netdev_link_up ( netdev );
-		DBGC ( vlc, "VELOCITY %p link up\n", vlc );
-	} else {
-		netdev_link_down ( netdev );
-		DBGC ( vlc, "VELOCITY %p link down\n", vlc );
-	}
-
-	/* The card disables auto-poll after a link change */
-	velocity_autopoll_start ( vlc );
-}
-
-/******************************************************************************
- *
- * Network device interface
- *
- ******************************************************************************
- */
-
-/**
- * Allocate descriptor rings
- *
- * @v vlc	Velocity device
- * @ret rc	Return status code
- */
-static int velocity_alloc_rings ( struct velocity_nic *vlc ) {
-	int rc = 0;
-
-	/* Allocate RX descriptor ring */
-	vlc->rx_prod = 0;
-	vlc->rx_cons = 0;
-	vlc->rx_commit = 0;
-	vlc->rx_ring = malloc_dma ( VELOCITY_RXDESC_SIZE, VELOCITY_RING_ALIGN );
-	if ( ! vlc->rx_ring )
-		return -ENOMEM;
-
-	memset ( vlc->rx_ring, 0, VELOCITY_RXDESC_SIZE );
-
-	DBGC2 ( vlc, "VELOCITY %p RX ring start address: %p(phys: %#08lx)\n",
-	       vlc, vlc->rx_ring, virt_to_bus ( vlc->rx_ring ) );
-
-	/* Allocate TX descriptor ring */
-	vlc->tx_prod = 0;
-	vlc->tx_cons = 0;
-	vlc->tx_ring = malloc_dma ( VELOCITY_TXDESC_SIZE, VELOCITY_RING_ALIGN );
-	if ( ! vlc->tx_ring ) {
-		rc = -ENOMEM;
-		goto err_tx_alloc;
-	}
-
-	memset ( vlc->tx_ring, 0, VELOCITY_TXDESC_SIZE );
-
-	/* Send RX ring to the card */
-	writel ( virt_to_bus ( vlc->rx_ring ),
-	         vlc->regs + VELOCITY_RXDESC_ADDR_LO );
-	writew ( VELOCITY_RXDESC_NUM - 1, vlc->regs + VELOCITY_RXDESCNUM );
-
-	/* Send TX ring to the card */
-	writel ( virt_to_bus ( vlc->tx_ring ),
-	         vlc->regs + VELOCITY_TXDESC_ADDR_LO0 );
-	writew ( VELOCITY_TXDESC_NUM - 1, vlc->regs + VELOCITY_TXDESCNUM );
-
-	DBGC2 ( vlc, "VELOCITY %p TX ring start address: %p(phys: %#08lx)\n",
-	       vlc, vlc->tx_ring, virt_to_bus ( vlc->tx_ring ) );
-
-	return 0;
-
-err_tx_alloc:
-	free_dma ( vlc->rx_ring, VELOCITY_RXDESC_SIZE );
-	return rc;
-}
-
-/**
- * Refill receive descriptor ring
- *
- * @v vlc	Velocity device
- */
-static void velocity_refill_rx ( struct velocity_nic *vlc ) {
-	struct velocity_rx_descriptor *desc;
-	struct io_buffer *iobuf;
-	int rx_idx, i = 0;
-
-	/* Check for new packets */
-	while ( ( vlc->rx_prod - vlc->rx_cons ) < VELOCITY_RXDESC_NUM ) {
-		iobuf = alloc_iob ( VELOCITY_RX_MAX_LEN );
-
-		/* Memory pressure: try again next poll */
-		if ( ! iobuf )
-			break;
-
-		rx_idx = ( vlc->rx_prod++ % VELOCITY_RXDESC_NUM );
-		desc = &vlc->rx_ring[rx_idx];
-
-		/* Set descrptor fields */
-		desc->des1 = 0;
-		desc->addr = virt_to_le32bus ( iobuf-> data );
-		desc->des2 = cpu_to_le32 (
-		    VELOCITY_DES2_SIZE ( VELOCITY_RX_MAX_LEN - 1 ) |
-		    VELOCITY_DES2_IC );
-
-		vlc->rx_buffs[rx_idx] = iobuf;
-		i++;
-
-		/* Return RX descriptors in blocks of 4 (hw requirement) */
-		if ( rx_idx % 4 == 3 ) {
-			int j;
-			for (j = 0; j < 4; j++) {
-				desc = &vlc->rx_ring[rx_idx - j];
-				desc->des0 = cpu_to_le32 ( VELOCITY_DES0_OWN );
-			}
-			vlc->rx_commit += 4;
-		}
-	}
-
-	wmb();
-
-	if ( vlc->rx_commit ) {
-		writew ( vlc->rx_commit,
-		         vlc->regs + VELOCITY_RXDESC_RESIDUECNT );
-		vlc->rx_commit = 0;
-	}
-
-	if ( i > 0 )
-		DBGC2 ( vlc, "VELOCITY %p refilled %d RX descriptors\n",
-		        vlc, i );
-}
-
-/**
- * Open network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int velocity_open ( struct net_device *netdev ) {
-	struct velocity_nic *vlc = netdev->priv;
-	int rc;
-
-	DBGC ( vlc, "VELOCITY %p open\n", vlc );
-	DBGC ( vlc, "VELOCITY %p regs at: %p\n", vlc, vlc->regs );
-
-	/* Allocate descriptor rings */
-	if ( ( rc = velocity_alloc_rings ( vlc ) ) != 0 )
-		return rc;
-
-	velocity_refill_rx ( vlc );
-
-	/* Enable TX/RX queue */
-	writew ( VELOCITY_TXQCSRS_RUN0, vlc->regs + VELOCITY_TXQCSRS );
-	writew ( VELOCITY_RXQCSR_RUN | VELOCITY_RXQCSR_WAK,
-	         vlc->regs + VELOCITY_RXQCSRS );
-
-	/* Enable interrupts */
-	writeb ( 0xff, vlc->regs + VELOCITY_IMR0 );
-	writeb ( 0xff, vlc->regs + VELOCITY_IMR1 );
-
-	/* Start MAC */
-	writeb ( VELOCITY_CR0_STOP, vlc->regs + VELOCITY_CRC0 );
-	writeb ( VELOCITY_CR1_DPOLL, vlc->regs + VELOCITY_CRC0 );
-	writeb ( VELOCITY_CR0_START | VELOCITY_CR0_TXON | VELOCITY_CR0_RXON,
-	         vlc->regs + VELOCITY_CRS0 );
-
-	/* Receive all packets */
-	writeb ( 0xff, vlc->regs + VELOCITY_RCR );
-
-	/* Set initial link state */
-	velocity_check_link ( netdev );
-
-	velocity_autopoll_start ( vlc );
-
-	DBGC2 ( vlc, "VELOCITY %p CR3 %02x\n",
-	        vlc, readb ( vlc->regs + 0x0B ) );
-
-	return 0;
-}
-
-/**
- * Close network device
- *
- * @v netdev		Network device
- */
-static void velocity_close ( struct net_device *netdev ) {
-	struct velocity_nic *vlc = netdev->priv;
-	int i;
-
-	/* Stop NIC */
-	writeb ( VELOCITY_CR0_TXON | VELOCITY_CR0_RXON,
-	         vlc->regs + VELOCITY_CRC0 );
-	writeb ( VELOCITY_CR0_STOP, vlc->regs + VELOCITY_CRS0 );
-
-	/* Clear RX ring information */
-	writel ( 0, vlc->regs + VELOCITY_RXDESC_ADDR_LO );
-	writew ( 0, vlc->regs + VELOCITY_RXDESCNUM );
-
-	/* Destroy RX ring */
-	free_dma ( vlc->rx_ring, VELOCITY_RXDESC_SIZE );
-	vlc->rx_ring = NULL;
-	vlc->rx_prod = 0;
-	vlc->rx_cons = 0;
-
-	/* Discard receive buffers */
-	for ( i = 0 ; i < VELOCITY_RXDESC_NUM ; i++ ) {
-		if ( vlc->rx_buffs[i] )
-			free_iob ( vlc->rx_buffs[i] );
-		vlc->rx_buffs[i] = NULL;
-	}
-
-	/* Clear TX ring information */
-	writel ( 0, vlc->regs + VELOCITY_TXDESC_ADDR_LO0 );
-	writew ( 0, vlc->regs + VELOCITY_TXDESCNUM );
-
-	/* Destroy TX ring */
-	free_dma ( vlc->tx_ring, VELOCITY_TXDESC_SIZE );
-	vlc->tx_ring = NULL;
-	vlc->tx_prod = 0;
-	vlc->tx_cons = 0;
-}
-
-/**
- * Transmit packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- * @ret rc		Return status code
- */
-static int velocity_transmit ( struct net_device *netdev,
-			       struct io_buffer *iobuf ) {
-	struct velocity_nic *vlc = netdev->priv;
-	struct velocity_tx_descriptor *desc;
-	unsigned int tx_idx;
-
-	/* Pad packet to minimum length */
-	iob_pad ( iobuf, ETH_ZLEN );
-
-	tx_idx = ( vlc->tx_prod++ % VELOCITY_TXDESC_NUM );
-	desc = &vlc->tx_ring[tx_idx];
-
-	/* Set packet size and transfer ownership to NIC */
-	desc->des0 = cpu_to_le32 ( VELOCITY_DES0_OWN |
-	                           VELOCITY_DES2_SIZE ( iob_len ( iobuf ) ) );
-	/* Data in first desc fragment, only desc for packet, generate INT */
-	desc->des1 = cpu_to_le32 ( VELOCITY_DES1_FRAG ( 1 ) |
-	                           VELOCITY_DES1_TCPLS |
-				   VELOCITY_DES1_INTR );
-
-	desc->frags[0].addr = virt_to_le32bus ( iobuf->data );
-	desc->frags[0].des2 = cpu_to_le32 (
-	                      VELOCITY_DES2_SIZE ( iob_len ( iobuf ) ) );
-
-	wmb();
-
-	/* Initiate TX */
-	velocity_setbit ( vlc->regs + VELOCITY_TXQCSRS, VELOCITY_TXQCSRS_WAK0 );
-
-	DBGC2 ( vlc, "VELOCITY %p tx_prod=%d desc=%p iobuf=%p len=%zd\n",
-	        vlc, tx_idx, desc, iobuf->data, iob_len ( iobuf ) );
-
-	return 0;
-}
-
-/**
- * Poll for received packets.
- *
- * @v vlc	Velocity device
- */
-static void velocity_poll_rx ( struct velocity_nic *vlc ) {
-	struct velocity_rx_descriptor *desc;
-	struct io_buffer *iobuf;
-	int rx_idx;
-	size_t len;
-	uint32_t des0;
-
-	/* Check for packets */
-	while ( vlc->rx_cons != vlc->rx_prod ) {
-		rx_idx = ( vlc->rx_cons % VELOCITY_RXDESC_NUM );
-		desc = &vlc->rx_ring[rx_idx];
-
-		des0 = cpu_to_le32 ( desc->des0 );
-
-		/* Return if descriptor still in use */
-		if ( des0 & VELOCITY_DES0_OWN )
-			return;
-
-		iobuf = vlc->rx_buffs[rx_idx];
-
-		/* Get length, strip CRC */
-		len = VELOCITY_DES0_RMBC ( des0 ) - 4;
-		iob_put ( iobuf, len );
-
-		DBGC2 ( vlc, "VELOCITY %p got packet on idx=%d (prod=%d), len %zd\n",
-		    vlc, rx_idx, vlc->rx_prod % VELOCITY_RXDESC_NUM, len );
-
-		if ( des0 & VELOCITY_DES0_RX_ERR ) {
-			/* Report receive error */
-			netdev_rx_err ( vlc->netdev, iobuf, -EINVAL );
-			DBGC ( vlc, "VELOCITY %p receive error, status: %02x\n",
-			       vlc, des0 );
-		} else if ( des0 & VELOCITY_DES0_RXOK ) {
-			/* Report receive success */
-			netdev_rx( vlc->netdev, iobuf );
-		} else {
-			/* Card indicated neither success nor failure
-			 * Technically this shouldn't happen, but we saw it
-			 * in debugging once. */
-			DBGC ( vlc, "VELOCITY %p RX neither ERR nor OK: %04x\n",
-			       vlc, des0 );
-			DBGC ( vlc, "packet len: %zd\n", len );
-			DBGC_HD ( vlc, iobuf->data, 64 );
-
-			/* we don't know what it is, treat is as an error */
-			netdev_rx_err ( vlc->netdev, iobuf, -EINVAL );
-		}
-
-		vlc->rx_cons++;
-	}
-}
-
-/**
- * Poll for completed packets.
- *
- * @v vlc	Velocity device
- */
-static void velocity_poll_tx ( struct velocity_nic *vlc ) {
-	struct velocity_tx_descriptor *desc;
-	int tx_idx;
-
-	/* Check for packets */
-	while ( vlc->tx_cons != vlc->tx_prod ) {
-		tx_idx = ( vlc->tx_cons % VELOCITY_TXDESC_NUM );
-		desc = &vlc->tx_ring[tx_idx];
-
-		/* Return if descriptor still in use */
-		if ( le32_to_cpu ( desc->des0 ) & VELOCITY_DES0_OWN )
-			return;
-
-		/* Report errors */
-		if ( le32_to_cpu ( desc->des0 ) & VELOCITY_DES0_TERR ) {
-			netdev_tx_complete_next_err ( vlc->netdev, -EINVAL );
-			return;
-		}
-
-		netdev_tx_complete_next ( vlc->netdev );
-
-		DBGC2 ( vlc, "VELOCITY %p poll_tx cons=%d prod=%d tsr=%04x\n",
-		        vlc, tx_idx, vlc->tx_prod % VELOCITY_TXDESC_NUM,
-			( desc->des0 & 0xffff ) );
-		vlc->tx_cons++;
-	}
-}
-
-/**
- * Poll for completed and received packets
- *
- * @v netdev		Network device
- */
-static void velocity_poll ( struct net_device *netdev ) {
-	struct velocity_nic *vlc = netdev->priv;
-	uint8_t isr1;
-
-	isr1 = readb ( vlc->regs + VELOCITY_ISR1 );
-
-	/* ACK interrupts */
-	writew ( 0xFFFF, vlc->regs + VELOCITY_ISR0 );
-
-	/* Check for competed packets */
-	velocity_poll_rx ( vlc );
-	velocity_poll_tx ( vlc );
-
-	if ( isr1 & VELOCITY_ISR1_SRCI ) {
-		/* Update linkstate */
-		DBGC2 ( vlc, "VELOCITY %p link status interrupt\n", vlc );
-		velocity_check_link ( netdev );
-	}
-
-	velocity_refill_rx ( vlc );
-
-	/* deal with potential RX stall caused by RX ring underrun */
-	writew ( VELOCITY_RXQCSR_RUN | VELOCITY_RXQCSR_WAK,
-	         vlc->regs + VELOCITY_RXQCSRS );
-}
-
-/**
- * Enable or disable interrupts
- *
- * @v netdev		Network device
- * @v enable		Interrupts should be enabled
- */
-static void velocity_irq ( struct net_device *netdev, int enable ) {
-	struct velocity_nic *vlc = netdev->priv;
-
-	DBGC ( vlc, "VELOCITY %p interrupts %s\n", vlc,
-	    enable ? "enable" : "disable" );
-
-	if (enable) {
-		/* Enable interrupts */
-		writeb ( VELOCITY_CR3_GINTMSK1, vlc->regs + VELOCITY_CRS3 );
-	} else {
-		/* Disable interrupts */
-		writeb ( VELOCITY_CR3_GINTMSK1, vlc->regs + VELOCITY_CRC3 );
-	}
-}
-
-/** Velocity network device operations */
-static struct net_device_operations velocity_operations = {
-	.open		= velocity_open,
-	.close		= velocity_close,
-	.transmit	= velocity_transmit,
-	.poll		= velocity_poll,
-	.irq		= velocity_irq,
-};
-
-/******************************************************************************
- *
- * PCI interface
- *
- ******************************************************************************
- */
-
-/**
- * Probe PCI device
- *
- * @v pci		PCI device
- * @ret rc		Return status code
- */
-static int velocity_probe ( struct pci_device *pci ) {
-	struct net_device *netdev;
-	struct velocity_nic *vlc;
-	int rc;
-
-	/* Allocate and initialise net device */
-	netdev = alloc_etherdev ( sizeof ( *vlc ) );
-	if ( ! netdev ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	netdev_init ( netdev, &velocity_operations );
-	vlc = netdev->priv;
-	pci_set_drvdata ( pci, netdev );
-	netdev->dev = &pci->dev;
-
-	/* Fix up PCI device */
-	adjust_pci_device ( pci );
-
-	/* Map registers */
-	vlc->regs = ioremap ( pci->membase, VELOCITY_BAR_SIZE );
-	vlc->netdev = netdev;
-
-	/* Reset the NIC */
-	if ( ( rc = velocity_reset ( vlc ) ) != 0 )
-		goto err_reset;
-
-	/* Reload EEPROM */
-	if ( ( rc = velocity_reload_eeprom ( vlc ) ) != 0 )
-		goto err_reset;
-
-	/* Get MAC address */
-	netdev->hw_addr[0] = readb ( vlc->regs + VELOCITY_MAC0 );
-	netdev->hw_addr[1] = readb ( vlc->regs + VELOCITY_MAC1 );
-	netdev->hw_addr[2] = readb ( vlc->regs + VELOCITY_MAC2 );
-	netdev->hw_addr[3] = readb ( vlc->regs + VELOCITY_MAC3 );
-	netdev->hw_addr[4] = readb ( vlc->regs + VELOCITY_MAC4 );
-	netdev->hw_addr[5] = readb ( vlc->regs + VELOCITY_MAC5 );
-
-	/* Initialise and reset MII interface */
-	mii_init ( &vlc->mii, &velocity_mii_operations );
-	if ( ( rc = mii_reset ( &vlc->mii ) ) != 0 ) {
-		DBGC ( vlc, "VELOCITY %p could not reset MII: %s\n",
-		       vlc, strerror ( rc ) );
-		goto err_mii_reset;
-	}
-
-	/* Enable proper link advertising */
-	velocity_set_link ( vlc );
-
-	/* Register network device */
-	if ( ( rc = register_netdev ( netdev ) ) != 0 )
-		goto err_register_netdev;
-
-	return 0;
-
- err_register_netdev:
- err_mii_reset:
-	velocity_reset ( vlc );
- err_reset:
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
- err_alloc:
-	return rc;
-}
-
-/**
- * Remove PCI device
- *
- * @v pci		PCI device
- */
-static void velocity_remove ( struct pci_device *pci ) {
-	struct net_device *netdev = pci_get_drvdata ( pci );
-	struct velocity_nic *vlc = netdev->priv;
-
-	/* Unregister network device */
-	unregister_netdev ( netdev );
-
-	/* Reset card */
-	velocity_reset ( vlc );
-
-	/* Free network device */
-	netdev_nullify ( netdev );
-	netdev_put ( netdev );
-}
-
-/** Velocity PCI device IDs */
-static struct pci_device_id velocity_nics[] = {
-	PCI_ROM ( 0x1106, 0x3119, "vt6122",	"VIA Velocity", 0 ),
-};
-
-/** Velocity PCI driver */
-struct pci_driver velocity_driver __pci_driver = {
-	.ids = velocity_nics,
-	.id_count = ( sizeof ( velocity_nics ) / sizeof ( velocity_nics[0] ) ),
-	.probe = velocity_probe,
-	.remove = velocity_remove,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/velocity.h ipxe-1.0.1~lliurex1505/src/drivers/net/velocity.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/velocity.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/velocity.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,356 +0,0 @@
-#ifndef _VELOCITY_H
-#define _VELOCITY_H
-
-/** @file
- *
- * VIA Velocity network driver
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** Skeleton BAR size */
-#define	VELOCITY_BAR_SIZE 	256
-
-/** Default timeout */
-#define	VELOCITY_TIMEOUT_US	10 * 1000
-
-struct velocity_frag {
-	uint32_t	addr;
-	uint32_t	des2;
-} __attribute__ ((packed));
-
-/** Velocity descriptor format */
-struct velocity_tx_descriptor {
-	uint32_t	des0;
-	uint32_t	des1;
-	/* We only use the first fragment, the HW requires us to have 7 */
-	struct velocity_frag frags[7];
-} __attribute__ ((packed));
-
-struct velocity_rx_descriptor {
-	uint32_t	des0;
-	uint32_t	des1;
-	uint32_t	addr;
-	uint32_t	des2;
-} __attribute__ ((packed));
-
-#define	VELOCITY_DES0_RMBC(_n)	(((_n) >> 16) & 0x1fff)
-#define	VELOCITY_DES0_OWN	(1 << 31)
-#define	VELOCITY_DES0_TERR	(1 << 15)
-#define	VELOCITY_DES0_RXOK	(1 << 15)
-#define	VELOCITY_DES0_FDX	(1 << 14)
-#define	VELOCITY_DES0_GMII	(1 << 13)
-#define	VELOCITY_DES0_LNKFL	(1 << 12)
-#define	VELOCITY_DES0_SHDN	(1 << 10)
-#define	VELOCITY_DES0_CRS	(1 << 9)
-#define	VELOCITY_DES0_CDH	(1 << 8)
-#define	VELOCITY_DES0_ABT	(1 << 7)
-#define	VELOCITY_DES0_OWT	(1 << 6)
-#define	VELOCITY_DES0_OWC	(1 << 5)
-#define	VELOCITY_DES0_COLS	(1 << 4)
-
-#define VELOCITY_DES0_RXSHDN	(1 << 30)
-#define VELOCITY_DES0_RXER	(1 << 5)
-#define VELOCITY_DES0_RLE	(1 << 4)
-#define VELOCITY_DES0_CE	(1 << 3)
-#define VELOCITY_DES0_FAE	(1 << 2)
-#define VELOCITY_DES0_CRC	(1 << 1)
-#define VELOCITY_DES0_RX_ERR	( VELOCITY_DES0_RXER | \
-                                  VELOCITY_DES0_RLE | \
-                                  VELOCITY_DES0_CE | \
-                                  VELOCITY_DES0_FAE | \
-                                  VELOCITY_DES0_CRC )
-
-/** TX descriptor fragment number */
-#define	VELOCITY_DES1_FRAG(_n)	(((_n + 1) & 0xf) << 28)
-#define	VELOCITY_DES1_TCPLS	((1 << 24) | (1 << 25))
-#define	VELOCITY_DES1_INTR	(1 << 23)
-#define	VELOCITY_DES1_PIC	(1 << 22)
-#define	VELOCITY_DES1_VETAG	(1 << 21)
-#define	VELOCITY_DES1_IPCK	(1 << 20)
-#define	VELOCITY_DES1_UDPCK	(1 << 19)
-#define VELOCITY_DES1_TCPCK	(1 << 18)
-#define	VELOCITY_DES1_JMBO	(1 << 17)
-#define	VELOCITY_DES1_CRC	(1 << 16)
-
-#define	VELOCITY_DES2_IC	(1 << 31)
-#define	VELOCITY_DES2_SIZE(_n)	(((_n) & 0x1fff) << 16)
-
-/** Number of receive descriptors
- *
- * Must be a multiple of 4 (hardware requirement).
- */
-#define	VELOCITY_RXDESC_NUM	8
-#define	VELOCITY_RXDESC_SIZE	\
-    ( VELOCITY_RXDESC_NUM * sizeof ( struct velocity_rx_descriptor ) )
-
-/** Number of transmit descriptors */
-#define	VELOCITY_TXDESC_NUM	8
-#define	VELOCITY_TXDESC_SIZE	\
-    ( VELOCITY_TXDESC_NUM * sizeof ( struct velocity_tx_descriptor ) )
-
-/** Descriptor alignment */
-#define	VELOCITY_RING_ALIGN	64
-
-/** Receive buffer length */
-#define VELOCITY_RX_MAX_LEN 1536
-
-/** MAC address registers */
-#define VELOCITY_MAC0		0x00
-#define VELOCITY_MAC1		0x01
-#define	VELOCITY_MAC2		0x02
-#define VELOCITY_MAC3		0x03
-#define	VELOCITY_MAC4		0x04
-#define	VELOCITY_MAC5		0x05
-
-/** Receive control register */
-#define VELOCITY_RCR		0x06
-#define	RHINE_RCR_SYMERR_ACCEPT	(1 << 7)	/*< Accept symbol error */
-#define	RHINE_RCR_FILTER_ACCEPT	(1 << 6)	/*< Accept based on filter */
-#define	RHINE_RCR_LONG_ACCEPT	(1 << 5)	/*< Accept long packets */
-#define	RHINE_RCR_PROMISC	(1 << 4)	/*< Promiscuous mode */
-#define	RHINE_RCR_BCAST_ACCEPT	(1 << 3)	/*< Accept broadcast */
-#define	RHINE_RCR_MCAST_ACCEPT	(1 << 2)	/*< Accept multicast */
-#define	RHINE_RCR_RUNT_ACCEPT	(1 << 1)	/*< Accept runt frames */
-#define	RHINE_RCR_ERR_ACCEPT	(1 << 0)	/*< Accept erroneous frames */
-
-/** Transmit control register */
-#define VELOCITY_TCR			0x07
-#define	VELOCITY_TCR_LB0	(1 << 0)	/*< Loopback control */
-#define	VELOCITY_TCR_LB1	(1 << 1)	/*< Loopback control */
-#define	VELOCITY_TCR_COLTMC0	(1 << 2)	/*< Collision retry control */
-#define	VELOCITY_TCR_COLTMC1	(1 << 3)	/*< Collision retry control */
-
-/** Command register 0 (set) */
-#define VELOCITY_CRS0			0x08
-#define	VELOCITY_CR0_TXON	(1 << 3)	/*< Transmit enable */
-#define	VELOCITY_CR0_RXON	(1 << 2)	/*< Receive enable */
-#define	VELOCITY_CR0_STOP	(1 << 1)	/*< Stop NIC */
-#define	VELOCITY_CR0_START	(1 << 0)	/*< Start NIC */
-
-/** Command register 1 (set) */
-#define VELOCITY_CRS1			0x09
-#define	VELOCITY_CR1_SFRST	(1 << 7)	/*< Software reset */
-#define	VELOCITY_CR1_TM1EN	(1 << 6)	/*< Perioding software counting */
-#define	VELOCITY_CR1_TM0EN	(1 << 5)	/*< Single-shot software counting */
-#define	VELOCITY_CR1_DPOLL	(1 << 3)	/*< Disable auto polling */
-#define	VELOCITY_CR1_DISAU	(1 << 0)	/*< Unicast reception disable */
-
-/** Command register 2 (set) */
-#define VELOCITY_CRS2			0x0A
-#define	VELOCITY_CR2_XONEN	(1 << 7)	/*< XON/XOFF mode enable */
-#define	VELOCITY_CR2_FDXTFCEN	(1 << 6)	/*< FDX flow control TX */
-#define	VELOCITY_CR2_FDXRFCEN	(1 << 5)
-#define	VELOCITY_CR2_HDXFCEN	(1 << 4)
-
-/** Command register 3 (set) */
-#define VELOCITY_CRS3			0x0B
-#define	VELOCITY_CR3_FOSRST		(1 << 6)
-#define	VELOCITY_CR3_FPHYRST		(1 << 5)
-#define	VELOCITY_CR3_DIAG		(1 << 4)
-#define	VELOCITY_CR3_INTPCTL		(1 << 2)
-#define	VELOCITY_CR3_GINTMSK1		(1 << 1)
-#define	VELOCITY_CR3_SWPEND		(1 << 0)
-
-/** Command register 0 (clear) */
-#define VELOCITY_CRC0			0x0C
-
-/** Command register 1 (clear) */
-#define VELOCITY_CRC1			0x0D
-
-/** Command register 2 (clear */
-#define VELOCITY_CRC2			0x0E
-
-/** Command register 3 (clear */
-#define VELOCITY_CRC3			0x0F
-#define VELOCITY_CAM0			0x10
-#define VELOCITY_CAM1			0x11
-#define VELOCITY_CAM2			0x12
-#define VELOCITY_CAM3			0x13
-#define VELOCITY_CAM4			0x14
-#define VELOCITY_CAM5			0x15
-#define VELOCITY_CAM6			0x16
-#define VELOCITY_CAM7			0x17
-#define VELOCITY_TXDESC_HI		0x18    /* Hi part of 64bit txdesc base addr */
-#define VELOCITY_DATABUF_HI		0x1D    /* Hi part of 64bit data buffer addr */
-#define VELOCITY_INTCTL0		0x20    /* interrupt control register */
-#define VELOCITY_RXSUPPTHR		0x20
-#define VELOCITY_TXSUPPTHR		0x20
-#define VELOCITY_INTHOLDOFF		0x20
-#define VELOCITY_INTCTL1		0x21    /* interrupt control register */
-#define VELOCITY_TXHOSTERR		0x22    /* TX host error status */
-#define VELOCITY_RXHOSTERR		0x23    /* RX host error status */
-
-/** Interrupt status register 0 */
-#define VELOCITY_ISR0			0x24
-#define	VELOCITY_ISR0_PTX3		(1 << 7)
-#define	VELOCITY_ISR0_PTX2		(1 << 6)
-#define VELOCITY_ISR0_PTX1		(1 << 5)
-#define VELOCITY_ISR0_PTX0		(1 << 4)
-#define VELOCITY_ISR0_PTXI		(1 << 3)
-#define VELOCITY_ISR0_PRXI		(1 << 2)
-#define VELOCITY_ISR0_PPTXI		(1 << 1)
-#define VELOCITY_ISR0_PPRXI		(1 << 0)
-
-/** Interrupt status register 1 */
-#define VELOCITY_ISR1			0x25
-#define VELOCITY_ISR1_SRCI		(1 << 7)
-#define VELOCITY_ISR1_LSTPEI		(1 << 6)
-#define VELOCITY_ISR1_LSTEI		(1 << 5)
-#define VELOCITY_ISR1_OVFL		(1 << 4)
-#define VELOCITY_ISR1_FLONI		(1 << 3)
-#define VELOCITY_ISR1_RACEI		(1 << 2)
-
-/** Interrupt status register 2 */
-#define VELOCITY_ISR2			0x26
-#define VELOCITY_ISR2_HFLD		(1 << 7)
-#define VELOCITY_ISR2_UDPI		(1 << 6)
-#define VELOCITY_ISR2_MIBFI		(1 << 5)
-#define VELOCITY_ISR2_SHDNII		(1 << 4)
-#define VELOCITY_ISR2_PHYI		(1 << 3)
-#define VELOCITY_ISR2_PWEI		(1 << 2)
-#define VELOCITY_ISR2_TMR1I		(1 << 1)
-#define VELOCITY_ISR2_TMR0I		(1 << 0)
-
-/** Interrupt status register 3 */
-#define VELOCITY_ISR3			0x27
-
-/** Interrupt mask register 0 */
-#define VELOCITY_IMR0			0x28
-
-/** Interrupt mask register 1 */
-#define VELOCITY_IMR1			0x29
-
-/** Interrupt mask register 2 */
-#define VELOCITY_IMR2			0x2a
-
-/** Interrupt mask register 3 */
-#define VELOCITY_IMR3			0x2b
-
-#define VELOCITY_TXSTS_PORT		0x2C    /* Transmit status port (???) */
-#define VELOCITY_TXQCSRS		0x30    /* TX queue ctl/status set */
-
-#define	VELOCITY_TXQCSRS_DEAD3		(1 << 15)
-#define	VELOCITY_TXQCSRS_WAK3		(1 << 14)
-#define	VELOCITY_TXQCSRS_ACT3		(1 << 13)
-#define	VELOCITY_TXQCSRS_RUN3		(1 << 12)
-#define	VELOCITY_TXQCSRS_DEAD2		(1 << 11)
-#define	VELOCITY_TXQCSRS_WAK2		(1 << 10)
-#define	VELOCITY_TXQCSRS_ACT2		(1 << 9)
-#define	VELOCITY_TXQCSRS_RUN2		(1 << 8)
-#define VELOCITY_TXQCSRS_DEAD1		(1 << 7)
-#define	VELOCITY_TXQCSRS_WAK1		(1 << 6)
-#define	VELOCITY_TXQCSRS_ACT1		(1 << 5)
-#define VELOCITY_TXQCSRS_RUN1		(1 << 4)
-#define	VELOCITY_TXQCSRS_DEAD0		(1 << 3)
-#define	VELOCITY_TXQCSRS_WAK0		(1 << 2)
-#define	VELOCITY_TXQCSRS_ACT0		(1 << 1)
-#define	VELOCITY_TXQCSRS_RUN0		(1 << 0)
-
-#define VELOCITY_RXQCSRS		0x32    /* RX queue ctl/status set */
-#define VELOCITY_RXQCSRC		0x36
-
-#define	VELOCITY_RXQCSR_DEAD		(1 << 3)
-#define	VELOCITY_RXQCSR_WAK		(1 << 2)
-#define	VELOCITY_RXQCSR_ACT		(1 << 1)
-#define	VELOCITY_RXQCSR_RUN		(1 << 0)
-
-#define VELOCITY_TXQCSRC		0x34    /* TX queue ctl/status clear */
-#define VELOCITY_RXQCSRC		0x36    /* RX queue ctl/status clear */
-#define VELOCITY_RXDESC_ADDR_LO		0x38    /* RX desc base addr (lo 32 bits) */
-#define VELOCITY_RXDESC_CONSIDX		0x3C    /* Current RX descriptor index */
-#define VELOCITY_TXQTIMER		0x3E    /* TX queue timer pend register */
-#define VELOCITY_RXQTIMER		0x3F    /* RX queue timer pend register */
-#define VELOCITY_TXDESC_ADDR_LO0	0x40    /* TX desc0 base addr (lo 32 bits) */
-#define VELOCITY_TXDESC_ADDR_LO1	0x44    /* TX desc1 base addr (lo 32 bits) */
-#define VELOCITY_TXDESC_ADDR_LO2	0x48    /* TX desc2 base addr (lo 32 bits) */
-#define VELOCITY_TXDESC_ADDR_LO3	0x4C    /* TX desc3 base addr (lo 32 bits) */
-#define VELOCITY_RXDESCNUM		0x50    /* Size of RX desc ring */
-#define VELOCITY_TXDESCNUM		0x52    /* Size of TX desc ring */
-#define VELOCITY_TXDESC_CONSIDX0	0x54    /* Current TX descriptor index */
-#define VELOCITY_TXDESC_CONSIDX1	0x56    /* Current TX descriptor index */
-#define VELOCITY_TXDESC_CONSIDX2	0x58    /* Current TX descriptor index */
-#define VELOCITY_TXDESC_CONSIDX3	0x5A    /* Current TX descriptor index */
-#define VELOCITY_TX_PAUSE_TIMER		0x5C    /* TX pause frame timer */
-#define VELOCITY_RXDESC_RESIDUECNT	0x5E    /* RX descriptor residue count */
-#define VELOCITY_FIFOTEST0		0x60    /* FIFO test register */
-#define VELOCITY_FIFOTEST1		0x64    /* FIFO test register */
-#define VELOCITY_CAMADDR		0x68    /* CAM address register */
-#define VELOCITY_CAMCTL			0x69    /* CAM control register */
-#define VELOCITY_MIICFG			0x6C    /* MII port config register */
-#define VELOCITY_MIISR			0x6D    /* MII port status register */
-#define	VELOCITY_MIISR_IDLE		(1 << 7)
-#define VELOCITY_PHYSTS0		0x6E    /* PHY status register */
-#define	VELOCITY_PHYSTS0_LINK		(1 << 6)
-#define VELOCITY_PHYSTS1		0x6F    /* PHY status register */
-#define VELOCITY_MIICR			0x70    /* MII command register */
-#define VELOCITY_MIICR_MAUTO		(1 << 7)
-#define VELOCITY_MIICR_RCMD		(1 << 6)
-#define VELOCITY_MIICR_WCMD		(1 << 5)
-#define VELOCITY_MIICR_MDPM		(1 << 4)
-#define VELOCITY_MIICR_MOUT		(1 << 3)
-#define VELOCITY_MIICR_MDO		(1 << 2)
-#define VELOCITY_MIICR_MDI		(1 << 1)
-#define VELOCITY_MIICR_MDC		(1 << 0)
-
-#define VELOCITY_MIIADDR		0x71    /* MII address register */
-#define VELOCITY_MIIDATA		0x72    /* MII data register */
-#define VELOCITY_SSTIMER		0x74    /* single-shot timer */
-#define VELOCITY_PTIMER			0x76    /* periodic timer */
-#define VELOCITY_DMACFG0		0x7C    /* DMA config 0 */
-#define VELOCITY_DMACFG1		0x7D    /* DMA config 1 */
-#define VELOCITY_RXCFG			0x7E    /* MAC RX config */
-#define VELOCITY_TXCFG			0x7F    /* MAC TX config */
-#define VELOCITY_SWEEDATA		0x85    /* EEPROM software loaded data */
-
-/** Chip Configuration Register A */
-#define VELOCITY_CFGA			0x78
-#define VELOCITY_CFGA_PACPI		(1 << 0)
-
-/** Power Management Sticky Register */
-#define VELOCITY_STICKY			0x83
-#define VELOCITY_STICKY_DS0		(1 << 0)
-#define VELOCITY_STICKY_DS1		(1 << 1)
-
-#define VELOCITY_EEWRDAT		0x8C    /* EEPROM embedded write */
-#define VELOCITY_EECSUM			0x92    /* EEPROM checksum */
-#define VELOCITY_EECSR			0x93    /* EEPROM control/status */
-#define	VELOCITY_EECSR_RELOAD		(1 << 5)
-#define VELOCITY_EERDDAT		0x94    /* EEPROM embedded read */
-#define VELOCITY_EEADDR			0x96    /* EEPROM address */
-#define VELOCITY_EECMD			0x97    /* EEPROM embedded command */
-
-/** A Velocity network card */
-struct velocity_nic {
-	/** Registers */
-	void *regs;
-	/** MII interface */
-	struct mii_interface mii;
-	/** Netdev */
-	struct net_device *netdev;
-
-	/** Receive descriptor ring */
-	struct velocity_rx_descriptor *rx_ring;
-	/** Receive I/O buffers */
-	struct io_buffer *rx_buffs[VELOCITY_RXDESC_NUM];
-	/** Receive producer index */
-	unsigned int rx_prod;
-	/** Receive consumer index */
-	unsigned int rx_cons;
-	/** Receive commit number
-	  *
-	  * Used to fullfill the hardware requirement of returning receive buffers
-	  * to the hardware only in blocks of 4.
-	  */
-	unsigned int rx_commit;
-
-	/** Transmit descriptor ring */
-	struct velocity_tx_descriptor *tx_ring;
-	/** Transmit producer index */
-	unsigned int tx_prod;
-	/** Transmit consumer index */
-	unsigned int tx_cons;
-};
-
-#endif /* _VELOCITY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-rhine.c ipxe-1.0.1~lliurex1505/src/drivers/net/via-rhine.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-rhine.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/via-rhine.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1447 @@
+/* rhine.c:Fast Ethernet driver for Linux. */
+/*
+	Adapted 09-jan-2000 by Paolo Marini (paolom@prisma-eng.it)
+
+        originally written by Donald Becker.
+
+	This software may be used and distributed according to the terms
+	of the GNU Public License (GPL), incorporated herein by reference.
+	Drivers derived from this code also fall under the GPL and must retain
+	this authorship and copyright notice.
+
+	Under no circumstances are the authors responsible for
+	the proper functioning of this software, nor do the authors assume any
+	responsibility for damages incurred with its use.
+
+	This driver is designed for the VIA VT86C100A Rhine-II PCI Fast Ethernet
+	controller.
+
+*/
+
+static const char *version = "rhine.c v1.0.2 2004-10-29\n";
+
+/* A few user-configurable values. */
+
+// max time out delay time
+#define W_MAX_TIMEOUT	0x0FFFU
+
+/* Size of the in-memory receive ring. */
+#define RX_BUF_LEN_IDX	3	/* 0==8K, 1==16K, 2==32K, 3==64K */
+#define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
+
+/* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
+#define TX_BUF_SIZE	1536
+#define RX_BUF_SIZE	1536
+
+/* PCI Tuning Parameters
+   Threshold is bytes transferred to chip before transmission starts. */
+#define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
+
+/* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024. */
+#define RX_FIFO_THRESH	4	/* Rx buffer level before first PCI xfer.  */
+#define RX_DMA_BURST	4	/* Maximum PCI burst, '4' is 256 bytes */
+#define TX_DMA_BURST	4
+
+/* Operational parameters that usually are not changed. */
+/* Time in jiffies before concluding the transmitter is hung. */
+#define TX_TIMEOUT  ((2000*HZ)/1000)
+
+#include "etherboot.h"
+#include "nic.h"
+#include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
+
+/* define all ioaddr */
+
+#define byPAR0				ioaddr
+#define byRCR				ioaddr + 6
+#define byTCR				ioaddr + 7
+#define byCR0				ioaddr + 8
+#define byCR1				ioaddr + 9
+#define byISR0				ioaddr + 0x0c
+#define byISR1				ioaddr + 0x0d
+#define byIMR0				ioaddr + 0x0e
+#define byIMR1				ioaddr + 0x0f
+#define byMAR0				ioaddr + 0x10
+#define byMAR1				ioaddr + 0x11
+#define byMAR2				ioaddr + 0x12
+#define byMAR3				ioaddr + 0x13
+#define byMAR4				ioaddr + 0x14
+#define byMAR5				ioaddr + 0x15
+#define byMAR6				ioaddr + 0x16
+#define byMAR7				ioaddr + 0x17
+#define dwCurrentRxDescAddr		ioaddr + 0x18
+#define dwCurrentTxDescAddr		ioaddr + 0x1c
+#define dwCurrentRDSE0			ioaddr + 0x20
+#define dwCurrentRDSE1			ioaddr + 0x24
+#define dwCurrentRDSE2			ioaddr + 0x28
+#define dwCurrentRDSE3			ioaddr + 0x2c
+#define dwNextRDSE0			ioaddr + 0x30
+#define dwNextRDSE1			ioaddr + 0x34
+#define dwNextRDSE2			ioaddr + 0x38
+#define dwNextRDSE3			ioaddr + 0x3c
+#define dwCurrentTDSE0			ioaddr + 0x40
+#define dwCurrentTDSE1			ioaddr + 0x44
+#define dwCurrentTDSE2			ioaddr + 0x48
+#define dwCurrentTDSE3			ioaddr + 0x4c
+#define dwNextTDSE0			ioaddr + 0x50
+#define dwNextTDSE1			ioaddr + 0x54
+#define dwNextTDSE2			ioaddr + 0x58
+#define dwNextTDSE3			ioaddr + 0x5c
+#define dwCurrRxDMAPtr			ioaddr + 0x60
+#define dwCurrTxDMAPtr			ioaddr + 0x64
+#define byMPHY				ioaddr + 0x6c
+#define byMIISR				ioaddr + 0x6d
+#define byBCR0				ioaddr + 0x6e
+#define byBCR1				ioaddr + 0x6f
+#define byMIICR				ioaddr + 0x70
+#define byMIIAD				ioaddr + 0x71
+#define wMIIDATA			ioaddr + 0x72
+#define byEECSR				ioaddr + 0x74
+#define byTEST				ioaddr + 0x75
+#define byGPIO				ioaddr + 0x76
+#define byCFGA				ioaddr + 0x78
+#define byCFGB				ioaddr + 0x79
+#define byCFGC				ioaddr + 0x7a
+#define byCFGD				ioaddr + 0x7b
+#define wTallyCntMPA			ioaddr + 0x7c
+#define wTallyCntCRC			ioaddr + 0x7d
+#define bySTICKHW			ioaddr + 0x83
+#define byWOLcrClr			ioaddr + 0xA4
+#define byWOLcgClr			ioaddr + 0xA7
+#define byPwrcsrClr			ioaddr + 0xAC
+
+/*---------------------  Exioaddr Definitions -------------------------*/
+
+/*
+ * Bits in the RCR register
+ */
+
+#define RCR_RRFT2		0x80
+#define RCR_RRFT1		0x40
+#define RCR_RRFT0		0x20
+#define RCR_PROM		0x10
+#define RCR_AB			0x08
+#define RCR_AM			0x04
+#define RCR_AR			0x02
+#define RCR_SEP			0x01
+
+/*
+ * Bits in the TCR register
+ */
+
+#define TCR_RTSF		0x80
+#define TCR_RTFT1		0x40
+#define TCR_RTFT0		0x20
+#define TCR_OFSET		0x08
+#define TCR_LB1			0x04	/* loopback[1] */
+#define TCR_LB0			0x02	/* loopback[0] */
+
+/*
+ * Bits in the CR0 register
+ */
+
+#define CR0_RDMD		0x40	/* rx descriptor polling demand */
+#define CR0_TDMD		0x20	/* tx descriptor polling demand */
+#define CR0_TXON		0x10
+#define CR0_RXON		0x08
+#define CR0_STOP		0x04	/* stop NIC, default = 1 */
+#define CR0_STRT		0x02	/* start NIC */
+#define CR0_INIT		0x01	/* start init process */
+
+
+/*
+ * Bits in the CR1 register
+ */
+
+#define CR1_SFRST		0x80	/* software reset */
+#define CR1_RDMD1		0x40	/* RDMD1 */
+#define CR1_TDMD1		0x20	/* TDMD1 */
+#define CR1_KEYPAG		0x10	/* turn on par/key */
+#define CR1_DPOLL		0x08	/* disable rx/tx auto polling */
+#define CR1_FDX			0x04	/* full duplex mode */
+#define CR1_ETEN		0x02	/* early tx mode */
+#define CR1_EREN		0x01	/* early rx mode */
+
+/*
+ * Bits in the CR register
+ */
+
+#define CR_RDMD			0x0040	/* rx descriptor polling demand */
+#define CR_TDMD			0x0020	/* tx descriptor polling demand */
+#define CR_TXON			0x0010
+#define CR_RXON			0x0008
+#define CR_STOP			0x0004	/* stop NIC, default = 1 */
+#define CR_STRT			0x0002	/* start NIC */
+#define CR_INIT			0x0001	/* start init process */
+#define CR_SFRST		0x8000	/* software reset */
+#define CR_RDMD1		0x4000	/* RDMD1 */
+#define CR_TDMD1		0x2000	/* TDMD1 */
+#define CR_KEYPAG		0x1000	/* turn on par/key */
+#define CR_DPOLL		0x0800	/* disable rx/tx auto polling */
+#define CR_FDX			0x0400	/* full duplex mode */
+#define CR_ETEN			0x0200	/* early tx mode */
+#define CR_EREN			0x0100	/* early rx mode */
+
+/*
+ * Bits in the IMR0 register
+ */
+
+#define IMR0_CNTM		0x80
+#define IMR0_BEM		0x40
+#define IMR0_RUM		0x20
+#define IMR0_TUM		0x10
+#define IMR0_TXEM		0x08
+#define IMR0_RXEM		0x04
+#define IMR0_PTXM		0x02
+#define IMR0_PRXM		0x01
+
+/* define imrshadow */
+
+#define IMRShadow		0x5AFF
+
+/*
+ * Bits in the IMR1 register
+ */
+
+#define IMR1_INITM		0x80
+#define IMR1_SRCM		0x40
+#define IMR1_NBFM		0x10
+#define IMR1_PRAIM		0x08
+#define IMR1_RES0M		0x04
+#define IMR1_ETM		0x02
+#define IMR1_ERM		0x01
+
+/*
+ * Bits in the ISR register
+ */
+
+#define ISR_INITI		0x8000
+#define ISR_SRCI		0x4000
+#define ISR_ABTI		0x2000
+#define ISR_NORBF		0x1000
+#define ISR_PKTRA		0x0800
+#define ISR_RES0		0x0400
+#define ISR_ETI			0x0200
+#define ISR_ERI			0x0100
+#define ISR_CNT			0x0080
+#define ISR_BE			0x0040
+#define ISR_RU			0x0020
+#define ISR_TU			0x0010
+#define ISR_TXE			0x0008
+#define ISR_RXE			0x0004
+#define ISR_PTX			0x0002
+#define ISR_PRX			0x0001
+
+/*
+ * Bits in the ISR0 register
+ */
+
+#define ISR0_CNT		0x80
+#define ISR0_BE			0x40
+#define ISR0_RU			0x20
+#define ISR0_TU			0x10
+#define ISR0_TXE		0x08
+#define ISR0_RXE		0x04
+#define ISR0_PTX		0x02
+#define ISR0_PRX		0x01
+
+/*
+ * Bits in the ISR1 register
+ */
+
+#define ISR1_INITI		0x80
+#define ISR1_SRCI		0x40
+#define ISR1_NORBF		0x10
+#define ISR1_PKTRA		0x08
+#define ISR1_ETI		0x02
+#define ISR1_ERI		0x01
+
+/* ISR ABNORMAL CONDITION */
+
+#define ISR_ABNORMAL ISR_BE+ISR_RU+ISR_TU+ISR_CNT+ISR_NORBF+ISR_PKTRA
+
+/*
+ * Bits in the MIISR register
+ */
+
+#define MIISR_MIIERR		0x08
+#define MIISR_MRERR		0x04
+#define MIISR_LNKFL		0x02
+#define MIISR_SPEED		0x01
+
+/*
+ * Bits in the MIICR register
+ */
+
+#define MIICR_MAUTO		0x80
+#define MIICR_RCMD		0x40
+#define MIICR_WCMD		0x20
+#define MIICR_MDPM		0x10
+#define MIICR_MOUT		0x08
+#define MIICR_MDO		0x04
+#define MIICR_MDI		0x02
+#define MIICR_MDC		0x01
+
+/*
+ * Bits in the EECSR register
+ */
+
+#define EECSR_EEPR		0x80	/* eeprom programed status, 73h means programed */
+#define EECSR_EMBP		0x40	/* eeprom embeded programming */
+#define EECSR_AUTOLD		0x20	/* eeprom content reload */
+#define EECSR_DPM		0x10	/* eeprom direct programming */
+#define EECSR_CS		0x08	/* eeprom CS pin */
+#define EECSR_SK		0x04	/* eeprom SK pin */
+#define EECSR_DI		0x02	/* eeprom DI pin */
+#define EECSR_DO		0x01	/* eeprom DO pin */
+
+/*
+ * Bits in the BCR0 register
+ */
+
+#define BCR0_CRFT2		0x20
+#define BCR0_CRFT1		0x10
+#define BCR0_CRFT0		0x08
+#define BCR0_DMAL2		0x04
+#define BCR0_DMAL1		0x02
+#define BCR0_DMAL0		0x01
+
+/*
+ * Bits in the BCR1 register
+ */
+
+#define BCR1_CTSF		0x20
+#define BCR1_CTFT1		0x10
+#define BCR1_CTFT0		0x08
+#define BCR1_POT2		0x04
+#define BCR1_POT1		0x02
+#define BCR1_POT0		0x01
+
+/*
+ * Bits in the CFGA register
+ */
+
+#define CFGA_EELOAD		0x80	/* enable eeprom embeded and direct programming */
+#define CFGA_JUMPER		0x40
+#define CFGA_MTGPIO		0x08
+#define CFGA_T10EN		0x02
+#define CFGA_AUTO		0x01
+
+/*
+ * Bits in the CFGB register
+ */
+
+#define CFGB_PD			0x80
+#define CFGB_POLEN		0x02
+#define CFGB_LNKEN		0x01
+
+/*
+ * Bits in the CFGC register
+ */
+
+#define CFGC_M10TIO		0x80
+#define CFGC_M10POL		0x40
+#define CFGC_PHY1		0x20
+#define CFGC_PHY0		0x10
+#define CFGC_BTSEL		0x08
+#define CFGC_BPS2		0x04	/* bootrom select[2] */
+#define CFGC_BPS1		0x02	/* bootrom select[1] */
+#define CFGC_BPS0		0x01	/* bootrom select[0] */
+
+/*
+ * Bits in the CFGD register
+ */
+
+#define CFGD_GPIOEN		0x80
+#define CFGD_DIAG		0x40
+#define CFGD_MAGIC		0x10
+#define CFGD_RANDOM		0x08
+#define CFGD_CFDX		0x04
+#define CFGD_CEREN		0x02
+#define CFGD_CETEN		0x01
+
+/* Bits in RSR */
+#define RSR_RERR		0x00000001
+#define RSR_CRC			0x00000002
+#define RSR_FAE			0x00000004
+#define RSR_FOV			0x00000008
+#define RSR_LONG		0x00000010
+#define RSR_RUNT		0x00000020
+#define RSR_SERR		0x00000040
+#define RSR_BUFF		0x00000080
+#define RSR_EDP			0x00000100
+#define RSR_STP			0x00000200
+#define RSR_CHN			0x00000400
+#define RSR_PHY			0x00000800
+#define RSR_BAR			0x00001000
+#define RSR_MAR			0x00002000
+#define RSR_RXOK		0x00008000
+#define RSR_ABNORMAL		RSR_RERR+RSR_LONG+RSR_RUNT
+
+/* Bits in TSR */
+#define TSR_NCR0		0x00000001
+#define TSR_NCR1		0x00000002
+#define TSR_NCR2		0x00000004
+#define TSR_NCR3		0x00000008
+#define TSR_COLS		0x00000010
+#define TSR_CDH			0x00000080
+#define TSR_ABT			0x00000100
+#define TSR_OWC			0x00000200
+#define TSR_CRS			0x00000400
+#define TSR_UDF			0x00000800
+#define TSR_TBUFF		0x00001000
+#define TSR_SERR		0x00002000
+#define TSR_JAB			0x00004000
+#define TSR_TERR		0x00008000
+#define TSR_ABNORMAL		TSR_TERR+TSR_OWC+TSR_ABT+TSR_JAB+TSR_CRS
+#define TSR_OWN_BIT		0x80000000
+
+#define CB_DELAY_LOOP_WAIT	10	/* 10ms */
+/* enabled mask value of irq */
+
+#define W_IMR_MASK_VALUE	0x1BFF	/* initial value of IMR */
+
+/* Ethernet address filter type */
+#define PKT_TYPE_DIRECTED	0x0001	/* obsolete, directed address is always accepted */
+#define PKT_TYPE_MULTICAST	0x0002
+#define PKT_TYPE_ALL_MULTICAST	0x0004
+#define PKT_TYPE_BROADCAST	0x0008
+#define PKT_TYPE_PROMISCUOUS	0x0020
+#define PKT_TYPE_LONG		0x2000
+#define PKT_TYPE_RUNT		0x4000
+#define PKT_TYPE_ERROR		0x8000	/* accept error packets, e.g. CRC error */
+
+/* Loopback mode */
+
+#define NIC_LB_NONE		0x00
+#define NIC_LB_INTERNAL		0x01
+#define NIC_LB_PHY		0x02	/* MII or Internal-10BaseT loopback */
+
+#define TX_RING_SIZE		2
+#define RX_RING_SIZE		2
+#define PKT_BUF_SZ		1536	/* Size of each temporary Rx buffer. */
+
+#define PCI_REG_MODE3		0x53
+#define MODE3_MIION		0x04    /* in PCI_REG_MOD3 OF PCI space */
+
+enum rhine_revs {
+    VT86C100A       = 0x00,
+    VTunknown0      = 0x20,
+    VT6102          = 0x40,
+    VT8231          = 0x50, /* Integrated MAC */
+    VT8233          = 0x60, /* Integrated MAC */
+    VT8235          = 0x74, /* Integrated MAC */
+    VT8237          = 0x78, /* Integrated MAC */
+    VTunknown1      = 0x7C,
+    VT6105          = 0x80,
+    VT6105_B0       = 0x83,
+    VT6105L 	    = 0x8A,
+    VT6107          = 0x8C,
+    VTunknown2      = 0x8E,
+    VT6105M         = 0x90,
+};
+
+/* Transmit and receive descriptors definition */
+
+struct rhine_tx_desc
+{
+    union VTC_tx_status_tag
+    {
+	struct
+	{
+	    unsigned long ncro:1;
+	    unsigned long ncr1:1;
+	    unsigned long ncr2:1;
+	    unsigned long ncr3:1;
+	    unsigned long cols:1;
+	    unsigned long reserve_1:2;
+	    unsigned long cdh:1;
+	    unsigned long abt:1;
+	    unsigned long owc:1;
+	    unsigned long crs:1;
+	    unsigned long udf:1;
+	    unsigned long tbuff:1;
+	    unsigned long serr:1;
+	    unsigned long jab:1;
+	    unsigned long terr:1;
+	    unsigned long reserve_2:15;
+	    unsigned long own_bit:1;
+	}
+	bits;
+	unsigned long lw;
+    }
+    tx_status;
+
+    union VTC_tx_ctrl_tag
+    {
+	struct
+	{
+	    unsigned long tx_buf_size:11;
+	    unsigned long extend_tx_buf_size:4;
+	    unsigned long chn:1;
+	    unsigned long crc:1;
+	    unsigned long reserve_1:4;
+	    unsigned long stp:1;
+	    unsigned long edp:1;
+	    unsigned long ic:1;
+	    unsigned long reserve_2:8;
+	}
+	bits;
+	unsigned long lw;
+    }
+    tx_ctrl;
+
+    unsigned long buf_addr_1:32;
+    unsigned long buf_addr_2:32;
+
+};
+
+struct rhine_rx_desc
+{
+    union VTC_rx_status_tag
+    {
+	struct
+	{
+	    unsigned long rerr:1;
+	    unsigned long crc_error:1;
+	    unsigned long fae:1;
+	    unsigned long fov:1;
+	    unsigned long toolong:1;
+	    unsigned long runt:1;
+	    unsigned long serr:1;
+	    unsigned long buff:1;
+	    unsigned long edp:1;
+	    unsigned long stp:1;
+	    unsigned long chn:1;
+	    unsigned long phy:1;
+	    unsigned long bar:1;
+	    unsigned long mar:1;
+	    unsigned long reserve_1:1;
+	    unsigned long rxok:1;
+	    unsigned long frame_length:11;
+	    unsigned long reverve_2:4;
+	    unsigned long own_bit:1;
+	}
+	bits;
+	unsigned long lw;
+    }
+    rx_status;
+
+    union VTC_rx_ctrl_tag
+    {
+	struct
+	{
+	    unsigned long rx_buf_size:11;
+	    unsigned long extend_rx_buf_size:4;
+	    unsigned long reserved_1:17;
+	}
+	bits;
+	unsigned long lw;
+    }
+    rx_ctrl;
+
+    unsigned long buf_addr_1:32;
+    unsigned long buf_addr_2:32;
+
+};
+
+struct {
+	char txbuf[TX_RING_SIZE * PKT_BUF_SZ + 32];
+	char rxbuf[RX_RING_SIZE * PKT_BUF_SZ + 32];
+	char txdesc[TX_RING_SIZE * sizeof (struct rhine_tx_desc) + 32];
+	char rxdesc[RX_RING_SIZE * sizeof (struct rhine_rx_desc) + 32];
+} rhine_buffers __shared;
+
+/* The I/O extent. */
+#define rhine_TOTAL_SIZE 0x80
+
+#ifdef	HAVE_DEVLIST
+struct netdev_entry rhine_drv =
+    { "rhine", rhine_probe, rhine_TOTAL_SIZE, NULL };
+#endif
+
+static int rhine_debug = 1;
+
+/*
+				Theory of Operation
+
+I. Board Compatibility
+
+This driver is designed for the VIA 86c100A Rhine-II PCI Fast Ethernet
+controller.
+
+II. Board-specific settings
+
+Boards with this chip are functional only in a bus-master PCI slot.
+
+Many operational settings are loaded from the EEPROM to the Config word at
+offset 0x78.  This driver assumes that they are correct.
+If this driver is compiled to use PCI memory space operations the EEPROM
+must be configured to enable memory ops.
+
+III. Driver operation
+
+IIIa. Ring buffers
+
+This driver uses two statically allocated fixed-size descriptor lists
+formed into rings by a branch from the final descriptor to the beginning of
+the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.
+
+IIIb/c. Transmit/Receive Structure
+
+This driver attempts to use a zero-copy receive and transmit scheme.
+
+Alas, all data buffers are required to start on a 32 bit boundary, so
+the driver must often copy transmit packets into bounce buffers.
+
+The driver allocates full frame size skbuffs for the Rx ring buffers at
+open() time and passes the skb->data field to the chip as receive data
+buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,
+a fresh skbuff is allocated and the frame is copied to the new skbuff.
+When the incoming frame is larger, the skbuff is passed directly up the
+protocol stack.  Buffers consumed this way are replaced by newly allocated
+skbuffs in the last phase of netdev_rx().
+
+The RX_COPYBREAK value is chosen to trade-off the memory wasted by
+using a full-sized skbuff for small frames vs. the copying costs of larger
+frames.  New boards are typically used in generously configured machines
+and the underfilled buffers have negligible impact compared to the benefit of
+a single allocation size, so the default value of zero results in never
+copying packets.  When copying is done, the cost is usually mitigated by using
+a combined copy/checksum routine.  Copying also preloads the cache, which is
+most useful with small frames.
+
+Since the VIA chips are only able to transfer data to buffers on 32 bit
+boundaries, the the IP header at offset 14 in an ethernet frame isn't
+longword aligned for further processing.  Copying these unaligned buffers
+has the beneficial effect of 16-byte aligning the IP header.
+
+IIId. Synchronization
+
+The driver runs as two independent, single-threaded flows of control.  One
+is the send-packet routine, which enforces single-threaded use by the
+dev->tbusy flag.  The other thread is the interrupt handler, which is single
+threaded by the hardware and interrupt handling software.
+
+The send packet thread has partial control over the Tx ring and 'dev->tbusy'
+flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next
+queue slot is empty, it clears the tbusy flag when finished otherwise it sets
+the 'lp->tx_full' flag.
+
+The interrupt handler has exclusive control over the Rx ring and records stats
+from the Tx ring.  After reaping the stats, it marks the Tx queue entry as
+empty by incrementing the dirty_tx mark. Iff the 'lp->tx_full' flag is set, it
+clears both the tx_full and tbusy flags.
+
+IV. Notes
+
+IVb. References
+
+Preliminary VT86C100A manual from http://www.via.com.tw/
+http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
+http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
+
+IVc. Errata
+
+The VT86C100A manual is not reliable information.
+The chip does not handle unaligned transmit or receive buffers, resulting
+in significant performance degradation for bounce buffer copies on transmit
+and unaligned IP headers on receive.
+The chip does not pad to minimum transmit length.
+
+*/
+
+/* The rest of these values should never change. */
+#define NUM_TX_DESC	2	/* Number of Tx descriptor registers. */
+
+static struct rhine_private
+{
+    char devname[8];		/* Used only for kernel debugging. */
+    const char *product_name;
+    struct rhine_rx_desc *rx_ring;
+    struct rhine_tx_desc *tx_ring;
+    char *rx_buffs[RX_RING_SIZE];
+    char *tx_buffs[TX_RING_SIZE];
+
+    /* temporary Rx buffers. */
+
+    int chip_id;
+    int chip_revision;
+    unsigned short ioaddr;
+    unsigned int cur_rx, cur_tx;	/* The next free and used entries */
+    unsigned int dirty_rx, dirty_tx;
+    /* The saved address of a sent-in-place packet/buffer, for skfree(). */
+    struct sk_buff *tx_skbuff[TX_RING_SIZE];
+    unsigned char mc_filter[8];	/* Current multicast filter. */
+    char phys[4];		/* MII device addresses. */
+    unsigned int tx_full:1;	/* The Tx queue is full. */
+    unsigned int full_duplex:1;	/* Full-duplex operation requested. */
+    unsigned int default_port:4;	/* Last dev->if_port value. */
+    unsigned int media2:4;	/* Secondary monitored media port. */
+    unsigned int medialock:1;	/* Don't sense media type. */
+    unsigned int mediasense:1;	/* Media sensing in progress. */
+}
+rhine;
+
+static void rhine_probe1 (struct nic *nic, struct pci_device *pci, int ioaddr,
+				 int chip_id, int options);
+static int QueryAuto (int);
+static int ReadMII (int byMIIIndex, int);
+static void WriteMII (char, char, char, int);
+static void MIIDelay (void);
+static void rhine_init_ring (struct nic *dev);
+static void rhine_disable (struct nic *nic);
+static void rhine_reset (struct nic *nic);
+static int rhine_poll (struct nic *nic, int retreive);
+static void rhine_transmit (struct nic *nic, const char *d, unsigned int t,
+			    unsigned int s, const char *p);
+static void reload_eeprom(int ioaddr);
+
+
+static void reload_eeprom(int ioaddr)
+{
+	int i;
+	outb(0x20, byEECSR);
+	/* Typically 2 cycles to reload. */
+	for (i = 0; i < 150; i++)
+		if (! (inb(byEECSR) & 0x20))
+			break;
+}
+/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
+static void
+rhine_init_ring (struct nic *nic)
+{
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    int i;
+
+    tp->tx_full = 0;
+    tp->cur_rx = tp->cur_tx = 0;
+    tp->dirty_rx = tp->dirty_tx = 0;
+
+    for (i = 0; i < RX_RING_SIZE; i++)
+    {
+
+	tp->rx_ring[i].rx_status.bits.own_bit = 1;
+	tp->rx_ring[i].rx_ctrl.bits.rx_buf_size = 1536;
+
+	tp->rx_ring[i].buf_addr_1 = virt_to_bus (tp->rx_buffs[i]);
+	tp->rx_ring[i].buf_addr_2 = virt_to_bus (&tp->rx_ring[i + 1]);
+	/* printf("[%d]buf1=%hX,buf2=%hX",i,tp->rx_ring[i].buf_addr_1,tp->rx_ring[i].buf_addr_2); */
+    }
+    /* Mark the last entry as wrapping the ring. */
+    /* tp->rx_ring[i-1].rx_ctrl.bits.rx_buf_size =1518; */
+    tp->rx_ring[i - 1].buf_addr_2 = virt_to_bus (&tp->rx_ring[0]);
+    /*printf("[%d]buf1=%hX,buf2=%hX",i-1,tp->rx_ring[i-1].buf_addr_1,tp->rx_ring[i-1].buf_addr_2); */
+
+    /* The Tx buffer descriptor is filled in as needed, but we
+       do need to clear the ownership bit. */
+
+    for (i = 0; i < TX_RING_SIZE; i++)
+    {
+
+	tp->tx_ring[i].tx_status.lw = 0;
+	tp->tx_ring[i].tx_ctrl.lw = 0x00e08000;
+	tp->tx_ring[i].buf_addr_1 = virt_to_bus (tp->tx_buffs[i]);
+	tp->tx_ring[i].buf_addr_2 = virt_to_bus (&tp->tx_ring[i + 1]);
+	/* printf("[%d]buf1=%hX,buf2=%hX",i,tp->tx_ring[i].buf_addr_1,tp->tx_ring[i].buf_addr_2); */
+    }
+
+    tp->tx_ring[i - 1].buf_addr_2 = virt_to_bus (&tp->tx_ring[0]);
+    /* printf("[%d]buf1=%hX,buf2=%hX",i,tp->tx_ring[i-1].buf_addr_1,tp->tx_ring[i-1].buf_addr_2); */
+}
+
+int
+QueryAuto (int ioaddr)
+{
+    int byMIIIndex;
+    int MIIReturn;
+
+	int advertising,mii_reg5;
+	int negociated;
+
+    byMIIIndex = 0x04;
+    MIIReturn = ReadMII (byMIIIndex, ioaddr);
+	advertising=MIIReturn;
+
+    byMIIIndex = 0x05;
+    MIIReturn = ReadMII (byMIIIndex, ioaddr);
+	mii_reg5=MIIReturn;
+
+	negociated=mii_reg5 & advertising;
+
+	if ( (negociated & 0x100) || (negociated & 0x1C0) == 0x40 )
+		return 1;
+	else
+		return 0;
+
+}
+
+int
+ReadMII (int byMIIIndex, int ioaddr)
+{
+    int ReturnMII;
+    char byMIIAdrbak;
+    char byMIICRbak;
+    char byMIItemp;
+    unsigned long ct;
+
+    byMIIAdrbak = inb (byMIIAD);
+    byMIICRbak = inb (byMIICR);
+    outb (byMIICRbak & 0x7f, byMIICR);
+    MIIDelay ();
+
+    outb (byMIIIndex, byMIIAD);
+    MIIDelay ();
+
+    outb (inb (byMIICR) | 0x40, byMIICR);
+
+    byMIItemp = inb (byMIICR);
+    byMIItemp = byMIItemp & 0x40;
+
+    ct = currticks();
+    while (byMIItemp != 0 && ct + 2*1000 < currticks())
+    {
+	byMIItemp = inb (byMIICR);
+	byMIItemp = byMIItemp & 0x40;
+    }
+    MIIDelay ();
+
+    ReturnMII = inw (wMIIDATA);
+
+    outb (byMIIAdrbak, byMIIAD);
+    outb (byMIICRbak, byMIICR);
+    MIIDelay ();
+
+    return (ReturnMII);
+
+}
+
+void
+WriteMII (char byMIISetByte, char byMIISetBit, char byMIIOP, int ioaddr)
+{
+    int ReadMIItmp;
+    int MIIMask;
+    char byMIIAdrbak;
+    char byMIICRbak;
+    char byMIItemp;
+    unsigned long ct;
+
+
+    byMIIAdrbak = inb (byMIIAD);
+
+    byMIICRbak = inb (byMIICR);
+    outb (byMIICRbak & 0x7f, byMIICR);
+    MIIDelay ();
+    outb (byMIISetByte, byMIIAD);
+    MIIDelay ();
+
+    outb (inb (byMIICR) | 0x40, byMIICR);
+
+    byMIItemp = inb (byMIICR);
+    byMIItemp = byMIItemp & 0x40;
+
+    ct = currticks();
+    while (byMIItemp != 0 && ct + 2*1000 < currticks())
+    {
+	byMIItemp = inb (byMIICR);
+	byMIItemp = byMIItemp & 0x40;
+    }
+    MIIDelay ();
+
+    ReadMIItmp = inw (wMIIDATA);
+    MIIMask = 0x0001;
+    MIIMask = MIIMask << byMIISetBit;
+
+
+    if (byMIIOP == 0)
+    {
+	MIIMask = ~MIIMask;
+	ReadMIItmp = ReadMIItmp & MIIMask;
+    }
+    else
+    {
+	ReadMIItmp = ReadMIItmp | MIIMask;
+
+    }
+    outw (ReadMIItmp, wMIIDATA);
+    MIIDelay ();
+
+    outb (inb (byMIICR) | 0x20, byMIICR);
+    byMIItemp = inb (byMIICR);
+    byMIItemp = byMIItemp & 0x20;
+
+    ct = currticks();
+    while (byMIItemp != 0 && ct + 2*1000 < currticks())
+    {
+	byMIItemp = inb (byMIICR);
+	byMIItemp = byMIItemp & 0x20;
+    }
+    MIIDelay ();
+
+    outb (byMIIAdrbak & 0x7f, byMIIAD);
+    outb (byMIICRbak, byMIICR);
+    MIIDelay ();
+
+}
+
+void
+MIIDelay (void)
+{
+    int i;
+    for (i = 0; i < 0x7fff; i++)
+    {
+        ( void ) inb (0x61);
+        ( void ) inb (0x61);
+        ( void ) inb (0x61);
+        ( void ) inb (0x61);
+    }
+}
+
+/* Offsets to the device registers. */
+enum register_offsets {
+        StationAddr=0x00, RxConfig=0x06, TxConfig=0x07, ChipCmd=0x08,
+        IntrStatus=0x0C, IntrEnable=0x0E,
+        MulticastFilter0=0x10, MulticastFilter1=0x14,
+        RxRingPtr=0x18, TxRingPtr=0x1C, GFIFOTest=0x54,
+        MIIPhyAddr=0x6C, MIIStatus=0x6D, PCIBusConfig=0x6E,
+        MIICmd=0x70, MIIRegAddr=0x71, MIIData=0x72, MACRegEEcsr=0x74,
+        ConfigA=0x78, ConfigB=0x79, ConfigC=0x7A, ConfigD=0x7B,
+        RxMissed=0x7C, RxCRCErrs=0x7E, MiscCmd=0x81,
+        StickyHW=0x83, IntrStatus2=0x84, WOLcrClr=0xA4, WOLcgClr=0xA7,
+        PwrcsrClr=0xAC,
+};
+
+/* Bits in the interrupt status/mask registers. */
+enum intr_status_bits {
+        IntrRxDone=0x0001, IntrRxErr=0x0004, IntrRxEmpty=0x0020,
+        IntrTxDone=0x0002, IntrTxError=0x0008, IntrTxUnderrun=0x0210,
+        IntrPCIErr=0x0040,
+        IntrStatsMax=0x0080, IntrRxEarly=0x0100,
+        IntrRxOverflow=0x0400, IntrRxDropped=0x0800, IntrRxNoBuf=0x1000,
+        IntrTxAborted=0x2000, IntrLinkChange=0x4000,
+        IntrRxWakeUp=0x8000,
+        IntrNormalSummary=0x0003, IntrAbnormalSummary=0xC260,
+        IntrTxDescRace=0x080000,        /* mapped from IntrStatus2 */
+        IntrTxErrSummary=0x082218,
+};
+#define DEFAULT_INTR (IntrRxDone | IntrRxErr | IntrRxEmpty| IntrRxOverflow | \
+                   IntrRxDropped | IntrRxNoBuf) 
+
+/***************************************************************************
+ IRQ - PXE IRQ Handler
+***************************************************************************/
+void rhine_irq ( struct nic *nic, irq_action_t action ) {
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    /* Enable interrupts by setting the interrupt mask. */
+    unsigned int intr_status;
+
+    switch ( action ) {
+        case DISABLE :
+        case ENABLE :
+            intr_status = inw(nic->ioaddr + IntrStatus);
+            /* On Rhine-II, Bit 3 indicates Tx descriptor write-back race. */
+
+            /* added comment by guard */
+            /* For supporting VT6107, please use revision id to recognize different chips in driver */
+            // if (tp->chip_id == 0x3065)
+            if( tp->chip_revision < 0x80 && tp->chip_revision >=0x40 )
+                intr_status |= inb(nic->ioaddr + IntrStatus2) << 16;
+                intr_status = (intr_status & ~DEFAULT_INTR);
+                if ( action == ENABLE ) 
+                    intr_status = intr_status | DEFAULT_INTR;
+                    outw(intr_status, nic->ioaddr + IntrEnable);
+                break;
+        case FORCE :
+            outw(0x0010, nic->ioaddr + 0x84);
+           break;
+        }
+}
+
+static struct nic_operations rhine_operations;
+
+static int
+rhine_probe ( struct nic *nic, struct pci_device *pci ) {
+
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+
+    if (!pci->ioaddr)
+	return 0;
+
+    rhine_probe1 (nic, pci, pci->ioaddr, pci->device, -1);
+
+    adjust_pci_device ( pci );
+
+    rhine_reset (nic);
+
+    nic->nic_op	= &rhine_operations;
+
+    nic->irqno	  = pci->irq;
+    nic->ioaddr   = tp->ioaddr;
+
+    return 1;
+}
+
+static void set_rx_mode(struct nic *nic __unused) {
+    	struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+	unsigned char rx_mode;
+    	int ioaddr = tp->ioaddr;
+
+	/* ! IFF_PROMISC */
+	outl(0xffffffff, byMAR0);
+	outl(0xffffffff, byMAR4);
+	rx_mode = 0x0C;
+
+	outb(0x60 /* thresh */ | rx_mode, byRCR );
+}
+
+static void
+rhine_probe1 (struct nic *nic, struct pci_device *pci, int ioaddr, int chip_id, int options)
+{
+    struct rhine_private *tp;
+    static int did_version = 0;	/* Already printed version info. */
+    unsigned int i, ww;
+    unsigned int timeout;
+    int FDXFlag;
+    int byMIIvalue, LineSpeed, MIICRbak;
+    uint8_t revision_id;    
+    unsigned char mode3_reg;
+
+    if (rhine_debug > 0 && did_version++ == 0)
+	printf ("%s",version);
+
+    // get revision id.
+    pci_read_config_byte(pci, PCI_REVISION, &revision_id);
+
+    /* D-Link provided reset code (with comment additions) */
+    if (revision_id >= 0x40) {
+	unsigned char byOrgValue;
+	
+	if(rhine_debug > 0)
+		printf("Enabling Sticky Bit Workaround for Chip_id: 0x%hX\n"
+				, chip_id);
+	/* clear sticky bit before reset & read ethernet address */
+	byOrgValue = inb(bySTICKHW);
+	byOrgValue = byOrgValue & 0xFC;
+	outb(byOrgValue, bySTICKHW);
+
+	/* (bits written are cleared?) */
+	/* disable force PME-enable */
+	outb(0x80, byWOLcgClr);
+	/* disable power-event config bit */
+	outb(0xFF, byWOLcrClr);
+	/* clear power status (undocumented in vt6102 docs?) */
+	outb(0xFF, byPwrcsrClr);
+	
+    }
+
+    /* Reset the chip to erase previous misconfiguration. */
+    outw(CR_SFRST, byCR0);
+    // if vt3043 delay after reset
+    if (revision_id <0x40) {
+       udelay(10000);
+    }
+    // polling till software reset complete
+    // W_MAX_TIMEOUT is the timeout period
+    for(ww = 0; ww < W_MAX_TIMEOUT; ww++) {
+        if ((inw(byCR0) & CR_SFRST) == 0)
+		break;
+        }
+
+    // issue AUTOLoad in EECSR to reload eeprom
+    outb(0x20, byEECSR );
+
+    // if vt3065 delay after reset
+    if (revision_id >=0x40) {
+	// delay 8ms to let MAC stable
+	mdelay(8);
+        /*
+         * for 3065D, EEPROM reloaded will cause bit 0 in MAC_REG_CFGA
+         * turned on.  it makes MAC receive magic packet
+         * automatically. So, we turn it off. (D-Link)
+         */
+         outb(inb(byCFGA) & 0xFE, byCFGA);
+    }
+
+    /* turn on bit2 in PCI configuration register 0x53 , only for 3065*/
+    if (revision_id >= 0x40) {
+        pci_read_config_byte(pci, PCI_REG_MODE3, &mode3_reg);
+        pci_write_config_byte(pci, PCI_REG_MODE3, mode3_reg|MODE3_MIION);
+    }
+
+
+    /* back off algorithm ,disable the right-most 4-bit off CFGD*/
+    outb(inb(byCFGD) & (~(CFGD_RANDOM | CFGD_CFDX | CFGD_CEREN | CFGD_CETEN)), byCFGD);
+
+    /* reload eeprom */
+    reload_eeprom(ioaddr);
+
+    /* Perhaps this should be read from the EEPROM? */
+    for (i = 0; i < ETH_ALEN; i++)
+	nic->node_addr[i] = inb (byPAR0 + i);
+
+    DBG ( "IO address %#hX Ethernet Address: %s\n", ioaddr, eth_ntoa ( nic->node_addr ) );
+
+    /* restart MII auto-negotiation */
+    WriteMII (0, 9, 1, ioaddr);
+    printf ("Analyzing Media type,this may take several seconds... ");
+    for (i = 0; i < 5; i++)
+    {
+	/* need to wait 1 millisecond - we will round it up to 50-100ms */
+	timeout = currticks() + 2;
+	for (timeout = currticks() + 2; currticks() < timeout;)
+	    /* nothing */;
+	if (ReadMII (1, ioaddr) & 0x0020)
+	    break;
+    }
+    printf ("OK.\n");
+
+#if 0
+	/* JJM : for Debug */
+	printf("MII : Address %hhX ",inb(ioaddr+0x6c));
+	{
+	 unsigned char st1,st2,adv1,adv2,l1,l2;
+	
+	 st1=ReadMII(1,ioaddr)>>8;
+	 st2=ReadMII(1,ioaddr)&0xFF;
+	 adv1=ReadMII(4,ioaddr)>>8;
+	 adv2=ReadMII(4,ioaddr)&0xFF;
+	 l1=ReadMII(5,ioaddr)>>8;
+	 l2=ReadMII(5,ioaddr)&0xFF;
+	 printf(" status 0x%hhX%hhX, advertising 0x%hhX%hhX, link 0x%hhX%hhX\n", st1,st2,adv1,adv2,l1,l2);
+	}
+#endif
+
+    
+    /* query MII to know LineSpeed,duplex mode */
+    byMIIvalue = inb (ioaddr + 0x6d);
+    LineSpeed = byMIIvalue & MIISR_SPEED;
+    if (LineSpeed != 0)						//JJM
+    {
+	printf ("Linespeed=10Mbs");
+    }
+    else
+    {
+	printf ("Linespeed=100Mbs");
+    }
+	
+    FDXFlag = QueryAuto (ioaddr);
+    if (FDXFlag == 1)
+    {
+	printf (" Fullduplex\n");
+	outw (CR_FDX, byCR0);
+    }
+    else
+    {
+	printf (" Halfduplex\n");
+    }
+
+
+    /* set MII 10 FULL ON, only apply in vt3043 */
+    if(chip_id == 0x3043)
+        WriteMII (0x17, 1, 1, ioaddr);
+
+    /* turn on MII link change */
+    MIICRbak = inb (byMIICR);
+    outb (MIICRbak & 0x7F, byMIICR);
+    MIIDelay ();
+    outb (0x41, byMIIAD);
+    MIIDelay ();
+
+    /* while((inb(byMIIAD)&0x20)==0) ; */
+    outb (MIICRbak | 0x80, byMIICR);
+
+    nic->priv_data = &rhine;
+    tp = &rhine;
+    tp->chip_id = chip_id;
+    tp->ioaddr = ioaddr;
+    tp->phys[0] = -1;
+    tp->chip_revision = revision_id;
+
+    /* The lower four bits are the media type. */
+    if (options > 0)
+    {
+	tp->full_duplex = (options & 16) ? 1 : 0;
+	tp->default_port = options & 15;
+	if (tp->default_port)
+	    tp->medialock = 1;
+    }
+    return;
+}
+
+static void 
+rhine_disable ( struct nic *nic ) {
+
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    int ioaddr = tp->ioaddr;
+
+    rhine_reset(nic);
+
+    printf ("rhine disable\n");
+    /* Switch to loopback mode to avoid hardware races. */
+    outb(0x60 | 0x01, byTCR);
+    /* Stop the chip's Tx and Rx processes. */
+    outw(CR_STOP, byCR0);
+}
+
+/**************************************************************************
+ETH_RESET - Reset adapter
+***************************************************************************/
+static void
+rhine_reset (struct nic *nic)
+{
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    int ioaddr = tp->ioaddr;
+    int i, j;
+    int FDXFlag, CRbak;
+    void *rx_ring_tmp;
+    void *tx_ring_tmp;
+    void *rx_bufs_tmp;
+    void *tx_bufs_tmp;
+    unsigned long rx_ring_tmp1;
+    unsigned long tx_ring_tmp1;
+    unsigned long rx_bufs_tmp1;
+    unsigned long tx_bufs_tmp1;
+
+    /* printf ("rhine_reset\n"); */
+    /* Soft reset the chip. */
+    /*outb(CmdReset, ioaddr + ChipCmd); */
+
+    tx_bufs_tmp = rhine_buffers.txbuf;
+    tx_ring_tmp = rhine_buffers.txdesc;
+    rx_bufs_tmp = rhine_buffers.rxbuf;
+    rx_ring_tmp = rhine_buffers.rxdesc;
+
+    /* tune RD TD 32 byte alignment */
+    rx_ring_tmp1 = virt_to_bus ( rx_ring_tmp );
+    j = (rx_ring_tmp1 + 32) & (~0x1f);
+    /* printf ("txring[%d]", j); */
+    tp->rx_ring = (struct rhine_rx_desc *) bus_to_virt (j);
+
+    tx_ring_tmp1 = virt_to_bus ( tx_ring_tmp );
+    j = (tx_ring_tmp1 + 32) & (~0x1f);
+    tp->tx_ring = (struct rhine_tx_desc *) bus_to_virt (j);
+    /* printf ("rxring[%X]", j); */
+
+
+    tx_bufs_tmp1 = virt_to_bus ( tx_bufs_tmp );
+    j = (int) (tx_bufs_tmp1 + 32) & (~0x1f);
+    tx_bufs_tmp = bus_to_virt (j);
+    /* printf ("txb[%X]", j); */
+
+    rx_bufs_tmp1 = virt_to_bus ( rx_bufs_tmp );
+    j = (int) (rx_bufs_tmp1 + 32) & (~0x1f);
+    rx_bufs_tmp = bus_to_virt (j);
+    /* printf ("rxb[%X][%X]", rx_bufs_tmp1, j); */
+
+    for (i = 0; i < RX_RING_SIZE; i++)
+    {
+	tp->rx_buffs[i] = (char *) rx_bufs_tmp;
+	/* printf("r[%X]",tp->rx_buffs[i]); */
+	rx_bufs_tmp += 1536;
+    }
+
+    for (i = 0; i < TX_RING_SIZE; i++)
+    {
+	tp->tx_buffs[i] = (char *) tx_bufs_tmp;
+	/* printf("t[%X]",tp->tx_buffs[i]);  */
+	tx_bufs_tmp += 1536;
+    }
+
+    /* software reset */
+    outb (CR1_SFRST, byCR1);
+    MIIDelay ();
+
+    /* printf ("init ring"); */
+    rhine_init_ring (nic);
+    /*write TD RD Descriptor to MAC */
+    outl (virt_to_bus (tp->rx_ring), dwCurrentRxDescAddr);
+    outl (virt_to_bus (tp->tx_ring), dwCurrentTxDescAddr);
+
+    /* Setup Multicast */	
+    set_rx_mode(nic);
+
+    /* set TCR RCR threshold to store and forward*/
+    outb (0x3e, byBCR0);
+    outb (0x38, byBCR1);
+    outb (0x2c, byRCR);
+    outb (0x60, byTCR);
+    /* Set Fulldupex */
+    FDXFlag = QueryAuto (ioaddr);
+    if (FDXFlag == 1)
+    {
+	outb (CFGD_CFDX, byCFGD);
+	outw (CR_FDX, byCR0);
+    }
+
+    /* KICK NIC to WORK */
+    CRbak = inw (byCR0);
+    CRbak = CRbak & 0xFFFB;	/* not CR_STOP */
+    outw ((CRbak | CR_STRT | CR_TXON | CR_RXON | CR_DPOLL), byCR0);
+
+    /* disable all known interrupt */
+    outw (0, byIMR0);
+}
+/* Beware of PCI posted writes */
+#define IOSYNC  do { inb(nic->ioaddr + StationAddr); } while (0)
+
+static int
+rhine_poll (struct nic *nic, int retreive)
+{
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    int rxstatus, good = 0;;
+
+    if (tp->rx_ring[tp->cur_rx].rx_status.bits.own_bit == 0)
+    {
+        unsigned int intr_status;
+        /* There is a packet ready */
+        if(!retreive)
+            return 1;
+
+        intr_status = inw(nic->ioaddr + IntrStatus);
+        /* On Rhine-II, Bit 3 indicates Tx descriptor write-back race. */
+#if 0
+	if (tp->chip_id == 0x3065)
+	  intr_status |= inb(nic->ioaddr + IntrStatus2) << 16;
+#endif
+        /* Acknowledge all of the current interrupt sources ASAP. */
+        if (intr_status & IntrTxDescRace)
+           outb(0x08, nic->ioaddr + IntrStatus2);
+        outw(intr_status & 0xffff, nic->ioaddr + IntrStatus);
+	IOSYNC;
+
+	rxstatus = tp->rx_ring[tp->cur_rx].rx_status.lw;
+	if ((rxstatus & 0x0300) != 0x0300)
+	{
+	    printf("rhine_poll: bad status\n");
+	}
+	else if (rxstatus & (RSR_ABNORMAL))
+	{
+	    printf ("rxerr[%X]\n", rxstatus);
+	}
+	else
+	    good = 1;
+
+	if (good)
+	{
+	    nic->packetlen = tp->rx_ring[tp->cur_rx].rx_status.bits.frame_length;
+	    memcpy (nic->packet, tp->rx_buffs[tp->cur_rx], nic->packetlen);
+	    /* printf ("Packet RXed\n"); */
+	}
+	tp->rx_ring[tp->cur_rx].rx_status.bits.own_bit = 1;
+	tp->cur_rx++;
+	tp->cur_rx = tp->cur_rx % RX_RING_SIZE;
+    }
+        /* Acknowledge all of the current interrupt sources ASAP. */
+        outw(DEFAULT_INTR & ~IntrRxDone, nic->ioaddr + IntrStatus);
+
+        IOSYNC;
+
+    return good;
+}
+
+static void
+rhine_transmit (struct nic *nic,
+		const char *d, unsigned int t, unsigned int s, const char *p)
+{
+    struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
+    int ioaddr = tp->ioaddr;
+    int entry;
+    unsigned char CR1bak;
+    unsigned char CR0bak;
+    unsigned int nstype;
+    unsigned long ct;
+
+
+    /*printf ("rhine_transmit\n"); */
+    /* setup ethernet header */
+
+
+    /* Calculate the next Tx descriptor entry. */
+    entry = tp->cur_tx % TX_RING_SIZE;
+
+    memcpy (tp->tx_buffs[entry], d, ETH_ALEN);	/* dst */
+    memcpy (tp->tx_buffs[entry] + ETH_ALEN, nic->node_addr, ETH_ALEN);	/* src */
+    
+    nstype=htons(t);
+    memcpy(tp->tx_buffs[entry] + 2 * ETH_ALEN, (char*)&nstype, 2);
+
+    memcpy (tp->tx_buffs[entry] + ETH_HLEN, p, s);
+    s += ETH_HLEN;
+    while (s < ETH_ZLEN)
+	*((char *) tp->tx_buffs[entry] + (s++)) = 0;
+
+    tp->tx_ring[entry].tx_ctrl.bits.tx_buf_size = s;
+
+    tp->tx_ring[entry].tx_status.bits.own_bit = 1;
+
+
+    CR1bak = inb (byCR1);
+
+    CR1bak = CR1bak | CR1_TDMD1;
+    /*printf("tdsw=[%X]",tp->tx_ring[entry].tx_status.lw); */
+    /*printf("tdcw=[%X]",tp->tx_ring[entry].tx_ctrl.lw); */
+    /*printf("tdbuf1=[%X]",tp->tx_ring[entry].buf_addr_1); */
+    /*printf("tdbuf2=[%X]",tp->tx_ring[entry].buf_addr_2); */
+    /*printf("td1=[%X]",inl(dwCurrentTDSE0)); */
+    /*printf("td2=[%X]",inl(dwCurrentTDSE1)); */
+    /*printf("td3=[%X]",inl(dwCurrentTDSE2)); */
+    /*printf("td4=[%X]",inl(dwCurrentTDSE3)); */
+
+    outb (CR1bak, byCR1);
+    do
+    {
+	ct = currticks();
+        /* Wait until transmit is finished or timeout*/
+        while((tp->tx_ring[entry].tx_status.bits.own_bit !=0) &&
+		ct + 10*1000 < currticks())
+        ;
+
+        if(tp->tx_ring[entry].tx_status.bits.terr == 0)
+            break;
+
+        if(tp->tx_ring[entry].tx_status.bits.abt == 1)
+        {
+            // turn on TX
+            CR0bak = inb(byCR0);
+            CR0bak = CR0bak|CR_TXON;
+            outb(CR0bak,byCR0);
+        }
+    }while(0);
+    tp->cur_tx++;
+
+    /*outw(IMRShadow,byIMR0); */
+    /*dev_kfree_skb(tp->tx_skbuff[entry], FREE_WRITE); */
+    /*tp->tx_skbuff[entry] = 0; */
+}
+
+static struct nic_operations rhine_operations = {
+	.connect	= dummy_connect,
+	.poll		= rhine_poll,
+	.transmit	= rhine_transmit,
+	.irq		= rhine_irq,
+
+};
+
+static struct pci_device_id rhine_nics[] = {
+PCI_ROM(0x1106, 0x3065, "dlink-530tx",     "VIA 6102", 0),
+PCI_ROM(0x1106, 0x3106, "via-rhine-6105",  "VIA 6105", 0),
+PCI_ROM(0x1106, 0x3043, "dlink-530tx-old", "VIA 3043", 0),		/* Rhine-I 86c100a */
+PCI_ROM(0x1106, 0x3053, "via6105m",        "VIA 6105M", 0),
+PCI_ROM(0x1106, 0x6100, "via-rhine-old",   "VIA 86C100A", 0),	/* Rhine-II */
+};
+
+PCI_DRIVER ( rhine_driver, rhine_nics, PCI_NO_CLASS );
+
+DRIVER ( "VIA 86C100", nic_driver, pci_driver, rhine_driver,
+	 rhine_probe, rhine_disable );
+
+/* EOF via-rhine.c */
+
+/*
+ * Local variables:
+ *  c-basic-offset: 8
+ *  c-indent-level: 8
+ *  tab-width: 8
+ * End:
+ */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-velocity.c ipxe-1.0.1~lliurex1505/src/drivers/net/via-velocity.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-velocity.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/via-velocity.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1926 @@
+/**************************************************************************
+*    via-velocity.c: Etherboot device driver for the VIA 6120 Gigabit
+*    Changes for Etherboot port:
+*       Copyright (c) 2006 by Timothy Legge <tlegge@rogers.com>
+*
+*    This program is free software; you can redistribute it and/or modify
+*    it under the terms of the GNU General Public License as published by
+*    the Free Software Foundation; either version 2 of the License, or
+*    (at your option) any later version.
+*
+*    This program is distributed in the hope that it will be useful,
+*    but WITHOUT ANY WARRANTY; without even the implied warranty of
+*    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+*    GNU General Public License for more details.
+*
+*    You should have received a copy of the GNU General Public License
+*    along with this program; if not, write to the Free Software
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*
+*    This driver is based on:
+*         via-velocity.c: VIA Velocity VT6120, VT6122 Ethernet driver 
+*             The changes are (c) Copyright 2004, Red Hat Inc. 
+*                <alan@redhat.com>
+*             Additional fixes and clean up: Francois Romieu
+*
+*     Original code:
+*         Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
+*         All rights reserved.
+*             Author: Chuang Liang-Shing, AJ Jiang
+* 
+*    Linux Driver Version 2.6.15.4
+* 
+*    REVISION HISTORY:
+*    ================
+*
+*    v1.0	03-06-2006	timlegge	Initial port of Linux driver
+*    
+*    Indent Options: indent -kr -i8
+*************************************************************************/
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include "etherboot.h"
+#include "nic.h"
+#include <ipxe/pci.h>
+#include <ipxe/ethernet.h>
+
+#include "via-velocity.h"
+
+typedef int pci_power_t;
+
+#define PCI_D0  ((int) 0)
+#define PCI_D1  ((int) 1)
+#define PCI_D2  ((int) 2)
+#define PCI_D3hot       ((int) 3)
+#define PCI_D3cold      ((int) 4)
+#define PCI_POWER_ERROR ((int) -1)
+
+
+/* Condensed operations for readability. */
+#define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
+#define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))
+
+//FIXME: Move to pci.c
+int pci_set_power_state(struct pci_device *dev, int state);
+
+/* FIXME: Move BASE to the private structure */
+static u32 BASE;
+
+/* NIC specific static variables go here */
+#define VELOCITY_PARAM(N,D) \
+        static const int N[MAX_UNITS]=OPTION_DEFAULT;
+/*        MODULE_PARM(N, "1-" __MODULE_STRING(MAX_UNITS) "i");\
+        MODULE_PARM_DESC(N, D); */
+
+VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
+VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
+
+
+#define VLAN_ID_MIN     0
+#define VLAN_ID_MAX     4095
+#define VLAN_ID_DEF     0
+/* VID_setting[] is used for setting the VID of NIC.
+   0: default VID.
+   1-4094: other VIDs.
+*/
+VELOCITY_PARAM(VID_setting, "802.1Q VLAN ID");
+
+#define RX_THRESH_MIN   0
+#define RX_THRESH_MAX   3
+#define RX_THRESH_DEF   0
+/* rx_thresh[] is used for controlling the receive fifo threshold.
+   0: indicate the rxfifo threshold is 128 bytes.
+   1: indicate the rxfifo threshold is 512 bytes.
+   2: indicate the rxfifo threshold is 1024 bytes.
+   3: indicate the rxfifo threshold is store & forward.
+*/
+VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
+
+#define DMA_LENGTH_MIN  0
+#define DMA_LENGTH_MAX  7
+#define DMA_LENGTH_DEF  0
+
+/* DMA_length[] is used for controlling the DMA length
+   0: 8 DWORDs
+   1: 16 DWORDs
+   2: 32 DWORDs
+   3: 64 DWORDs
+   4: 128 DWORDs
+   5: 256 DWORDs
+   6: SF(flush till emply)
+   7: SF(flush till emply)
+*/
+VELOCITY_PARAM(DMA_length, "DMA length");
+
+#define TAGGING_DEF     0
+/* enable_tagging[] is used for enabling 802.1Q VID tagging.
+   0: disable VID seeting(default).
+   1: enable VID setting.
+*/
+VELOCITY_PARAM(enable_tagging, "Enable 802.1Q tagging");
+
+#define IP_ALIG_DEF     0
+/* IP_byte_align[] is used for IP header DWORD byte aligned
+   0: indicate the IP header won't be DWORD byte aligned.(Default) .
+   1: indicate the IP header will be DWORD byte aligned.
+      In some enviroment, the IP header should be DWORD byte aligned,
+      or the packet will be droped when we receive it. (eg: IPVS)
+*/
+VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
+
+#define TX_CSUM_DEF     1
+/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
+   (We only support RX checksum offload now)
+   0: disable csum_offload[checksum offload
+   1: enable checksum offload. (Default)
+*/
+VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
+
+#define FLOW_CNTL_DEF   1
+#define FLOW_CNTL_MIN   1
+#define FLOW_CNTL_MAX   5
+
+/* flow_control[] is used for setting the flow control ability of NIC.
+   1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
+   2: enable TX flow control.
+   3: enable RX flow control.
+   4: enable RX/TX flow control.
+   5: disable
+*/
+VELOCITY_PARAM(flow_control, "Enable flow control ability");
+
+#define MED_LNK_DEF 0
+#define MED_LNK_MIN 0
+#define MED_LNK_MAX 4
+/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
+   0: indicate autonegotiation for both speed and duplex mode
+   1: indicate 100Mbps half duplex mode
+   2: indicate 100Mbps full duplex mode
+   3: indicate 10Mbps half duplex mode
+   4: indicate 10Mbps full duplex mode
+
+   Note:
+        if EEPROM have been set to the force mode, this option is ignored
+            by driver.
+*/
+VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
+
+#define VAL_PKT_LEN_DEF     0
+/* ValPktLen[] is used for setting the checksum offload ability of NIC.
+   0: Receive frame with invalid layer 2 length (Default)
+   1: Drop frame with invalid layer 2 length
+*/
+VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
+
+#define WOL_OPT_DEF     0
+#define WOL_OPT_MIN     0
+#define WOL_OPT_MAX     7
+/* wol_opts[] is used for controlling wake on lan behavior.
+   0: Wake up if recevied a magic packet. (Default)
+   1: Wake up if link status is on/off.
+   2: Wake up if recevied an arp packet.
+   4: Wake up if recevied any unicast packet.
+   Those value can be sumed up to support more than one option.
+*/
+VELOCITY_PARAM(wol_opts, "Wake On Lan options");
+
+#define INT_WORKS_DEF   20
+#define INT_WORKS_MIN   10
+#define INT_WORKS_MAX   64
+
+VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
+
+/* The descriptors for this card are required to be aligned on
+64 byte boundaries.  As the align attribute does not guarantee alignment
+greater than the alignment of the start address (which for Etherboot
+is 16 bytes of alignment) it requires some extra steps.  Add 64 to the 
+size of the array and the init_ring adjusts the alignment */
+
+/* Define the TX Descriptor */
+static u8 tx_ring[TX_DESC_DEF * sizeof(struct tx_desc) + 64];
+
+/* Create a static buffer of size PKT_BUF_SZ for each TX Descriptor.  
+All descriptors point to a part of this buffer */
+static u8 txb[(TX_DESC_DEF * PKT_BUF_SZ) + 64];
+
+/* Define the RX Descriptor */
+static u8 rx_ring[RX_DESC_DEF * sizeof(struct rx_desc) + 64];
+
+/* Create a static buffer of size PKT_BUF_SZ for each RX Descriptor
+   All descriptors point to a part of this buffer */
+static u8 rxb[(RX_DESC_DEF * PKT_BUF_SZ) + 64];
+
+static void velocity_init_info(struct pci_device *pdev,
+			       struct velocity_info *vptr,
+			       struct velocity_info_tbl *info);
+static int velocity_get_pci_info(struct velocity_info *,
+				 struct pci_device *pdev);
+static int velocity_open(struct nic *nic, struct pci_device *pci);
+
+static int velocity_soft_reset(struct velocity_info *vptr);
+static void velocity_init_cam_filter(struct velocity_info *vptr);
+static void mii_init(struct velocity_info *vptr, u32 mii_status);
+static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
+static void velocity_print_link_status(struct velocity_info *vptr);
+static void safe_disable_mii_autopoll(struct mac_regs *regs);
+static void enable_flow_control_ability(struct velocity_info *vptr);
+static void enable_mii_autopoll(struct mac_regs *regs);
+static int velocity_mii_read(struct mac_regs *, u8 byIdx, u16 * pdata);
+static int velocity_mii_write(struct mac_regs *, u8 byMiiAddr, u16 data);
+static u32 mii_check_media_mode(struct mac_regs *regs);
+static u32 check_connection_type(struct mac_regs *regs);
+static int velocity_set_media_mode(struct velocity_info *vptr,
+				   u32 mii_status);
+
+
+/*
+ *	Internal board variants. At the moment we have only one
+ */
+
+static struct velocity_info_tbl chip_info_table[] = {
+	{CHIP_TYPE_VT6110,
+	 "VIA Networking Velocity Family Gigabit Ethernet Adapter", 256, 1,
+	 0x00FFFFFFUL},
+	{0, NULL, 0, 0, 0}
+};
+
+/**
+ *	velocity_set_int_opt	-	parser for integer options
+ *	@opt: pointer to option value
+ *	@val: value the user requested (or -1 for default)
+ *	@min: lowest value allowed
+ *	@max: highest value allowed
+ *	@def: default value
+ *	@name: property name
+ *	@dev: device name
+ *
+ *	Set an integer property in the module options. This function does
+ *	all the verification and checking as well as reporting so that
+ *	we don't duplicate code for each option.
+ */
+
+static void velocity_set_int_opt(int *opt, int val, int min, int max,
+				 int def, char *name, const char *devname)
+{
+	if (val == -1) {
+		printf("%s: set value of parameter %s to %d\n",
+		       devname, name, def);
+		*opt = def;
+	} else if (val < min || val > max) {
+		printf
+		    ("%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
+		     devname, name, min, max);
+		*opt = def;
+	} else {
+		printf("%s: set value of parameter %s to %d\n",
+		       devname, name, val);
+		*opt = val;
+	}
+}
+
+/**
+ *	velocity_set_bool_opt	-	parser for boolean options
+ *	@opt: pointer to option value
+ *	@val: value the user requested (or -1 for default)
+ *	@def: default value (yes/no)
+ *	@flag: numeric value to set for true.
+ *	@name: property name
+ *	@dev: device name
+ *
+ *	Set a boolean property in the module options. This function does
+ *	all the verification and checking as well as reporting so that
+ *	we don't duplicate code for each option.
+ */
+
+static void velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag,
+				  char *name, const char *devname)
+{
+	(*opt) &= (~flag);
+	if (val == -1) {
+		printf("%s: set parameter %s to %s\n",
+		       devname, name, def ? "TRUE" : "FALSE");
+		*opt |= (def ? flag : 0);
+	} else if (val < 0 || val > 1) {
+		printf
+		    ("%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
+		     devname, name);
+		*opt |= (def ? flag : 0);
+	} else {
+		printf("%s: set parameter %s to %s\n",
+		       devname, name, val ? "TRUE" : "FALSE");
+		*opt |= (val ? flag : 0);
+	}
+}
+
+/**
+ *	velocity_get_options	-	set options on device
+ *	@opts: option structure for the device
+ *	@index: index of option to use in module options array
+ *	@devname: device name
+ *
+ *	Turn the module and command options into a single structure
+ *	for the current device
+ */
+
+static void velocity_get_options(struct velocity_opt *opts, int index,
+				 const char *devname)
+{
+
+	/* FIXME Do the options need to be configurable */
+	velocity_set_int_opt(&opts->rx_thresh, -1, RX_THRESH_MIN,
+			     RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh",
+			     devname);
+	velocity_set_int_opt(&opts->DMA_length, DMA_length[index],
+			     DMA_LENGTH_MIN, DMA_LENGTH_MAX,
+			     DMA_LENGTH_DEF, "DMA_length", devname);
+	velocity_set_int_opt(&opts->numrx, RxDescriptors[index],
+			     RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF,
+			     "RxDescriptors", devname);
+	velocity_set_int_opt(&opts->numtx, TxDescriptors[index],
+			     TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF,
+			     "TxDescriptors", devname);
+	velocity_set_int_opt(&opts->vid, VID_setting[index], VLAN_ID_MIN,
+			     VLAN_ID_MAX, VLAN_ID_DEF, "VID_setting",
+			     devname);
+	velocity_set_bool_opt(&opts->flags, enable_tagging[index],
+			      TAGGING_DEF, VELOCITY_FLAGS_TAGGING,
+			      "enable_tagging", devname);
+	velocity_set_bool_opt(&opts->flags, txcsum_offload[index],
+			      TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM,
+			      "txcsum_offload", devname);
+	velocity_set_int_opt(&opts->flow_cntl, flow_control[index],
+			     FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF,
+			     "flow_control", devname);
+	velocity_set_bool_opt(&opts->flags, IP_byte_align[index],
+			      IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN,
+			      "IP_byte_align", devname);
+	velocity_set_bool_opt(&opts->flags, ValPktLen[index],
+			      VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN,
+			      "ValPktLen", devname);
+	velocity_set_int_opt((void *) &opts->spd_dpx, speed_duplex[index],
+			     MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF,
+			     "Media link mode", devname);
+	velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index],
+			     WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF,
+			     "Wake On Lan options", devname);
+	velocity_set_int_opt((int *) &opts->int_works, int_works[index],
+			     INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF,
+			     "Interrupt service works", devname);
+	opts->numrx = (opts->numrx & ~3);
+}
+
+/**
+ *	velocity_init_cam_filter	-	initialise CAM
+ *	@vptr: velocity to program
+ *
+ *	Initialize the content addressable memory used for filters. Load
+ *	appropriately according to the presence of VLAN
+ */
+
+static void velocity_init_cam_filter(struct velocity_info *vptr)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+
+	/* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
+	WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
+	WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
+
+	/* Disable all CAMs */
+	memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
+	memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
+	mac_set_cam_mask(regs, vptr->vCAMmask, VELOCITY_VLAN_ID_CAM);
+	mac_set_cam_mask(regs, vptr->mCAMmask, VELOCITY_MULTICAST_CAM);
+
+	/* Enable first VCAM */
+	if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
+		/* If Tagging option is enabled and VLAN ID is not zero, then
+		   turn on MCFG_RTGOPT also */
+		if (vptr->options.vid != 0)
+			WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
+
+		mac_set_cam(regs, 0, (u8 *) & (vptr->options.vid),
+			    VELOCITY_VLAN_ID_CAM);
+		vptr->vCAMmask[0] |= 1;
+		mac_set_cam_mask(regs, vptr->vCAMmask,
+				 VELOCITY_VLAN_ID_CAM);
+	} else {
+		u16 temp = 0;
+		mac_set_cam(regs, 0, (u8 *) & temp, VELOCITY_VLAN_ID_CAM);
+		temp = 1;
+		mac_set_cam_mask(regs, (u8 *) & temp,
+				 VELOCITY_VLAN_ID_CAM);
+	}
+}
+
+static inline void velocity_give_many_rx_descs(struct velocity_info *vptr)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+	int avail, dirty, unusable;
+
+	/*
+	 * RD number must be equal to 4X per hardware spec
+	 * (programming guide rev 1.20, p.13)
+	 */
+	if (vptr->rd_filled < 4)
+		return;
+
+	wmb();
+
+	unusable = vptr->rd_filled & 0x0003;
+	dirty = vptr->rd_dirty - unusable;
+	for (avail = vptr->rd_filled & 0xfffc; avail; avail--) {
+		dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
+//              printf("return dirty: %d\n", dirty);
+		vptr->rd_ring[dirty].rdesc0.owner = OWNED_BY_NIC;
+	}
+
+	writew(vptr->rd_filled & 0xfffc, &regs->RBRDU);
+	vptr->rd_filled = unusable;
+}
+
+static int velocity_rx_refill(struct velocity_info *vptr)
+{
+	int dirty = vptr->rd_dirty, done = 0, ret = 0;
+
+//      printf("rx_refill - rd_curr = %d, dirty = %d\n", vptr->rd_curr, dirty);
+	do {
+		struct rx_desc *rd = vptr->rd_ring + dirty;
+
+		/* Fine for an all zero Rx desc at init time as well */
+		if (rd->rdesc0.owner == OWNED_BY_NIC)
+			break;
+//              printf("rx_refill - after owner %d\n", dirty);
+
+		rd->inten = 1;
+		rd->pa_high = 0;
+		rd->rdesc0.len = cpu_to_le32(vptr->rx_buf_sz);;
+
+		done++;
+		dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
+	} while (dirty != vptr->rd_curr);
+
+	if (done) {
+//              printf("\nGive Back Desc\n");
+		vptr->rd_dirty = dirty;
+		vptr->rd_filled += done;
+		velocity_give_many_rx_descs(vptr);
+	}
+
+	return ret;
+}
+
+extern void hex_dump(const char *data, const unsigned int len);
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static int velocity_poll(struct nic *nic, int retrieve)
+{
+	/* Work out whether or not there's an ethernet packet ready to
+	 * read.  Return 0 if not.
+	 */
+
+	int rd_curr = vptr->rd_curr % RX_DESC_DEF;
+	struct rx_desc *rd = &(vptr->rd_ring[rd_curr]);
+
+	if (rd->rdesc0.owner == OWNED_BY_NIC)
+		return 0;
+	rmb();
+
+	if ( ! retrieve ) return 1;
+
+	/*
+	 *      Don't drop CE or RL error frame although RXOK is off
+	 */
+	if ((rd->rdesc0.RSR & RSR_RXOK)
+	    || (!(rd->rdesc0.RSR & RSR_RXOK)
+		&& (rd->rdesc0.RSR & (RSR_CE | RSR_RL)))) {
+
+		nic->packetlen = rd->rdesc0.len;
+		// ptr->rxb + (rd_curr * PKT_BUF_SZ)
+		memcpy(nic->packet, bus_to_virt(rd->pa_low),
+		       nic->packetlen - 4);
+
+		vptr->rd_curr++;
+		vptr->rd_curr = vptr->rd_curr % RX_DESC_DEF;
+		velocity_rx_refill(vptr);
+		return 1;	/* Remove this line once this method is implemented */
+	}
+	return 0;
+}
+
+#define TX_TIMEOUT  (1000);
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+static void velocity_transmit(struct nic *nic, const char *dest,	/* Destination */
+			      unsigned int type,	/* Type */
+			      unsigned int size,	/* size */
+			      const char *packet)
+{				/* Packet */
+	u16 nstype;
+	u32 to;
+	u8 *ptxb;
+	unsigned int pktlen;
+	struct tx_desc *td_ptr;
+
+	int entry = vptr->td_curr % TX_DESC_DEF;
+	td_ptr = &(vptr->td_rings[entry]);
+
+	/* point to the current txb incase multiple tx_rings are used */
+	ptxb = vptr->txb + (entry * PKT_BUF_SZ);
+	memcpy(ptxb, dest, ETH_ALEN);	/* Destination */
+	memcpy(ptxb + ETH_ALEN, nic->node_addr, ETH_ALEN);	/* Source */
+	nstype = htons((u16) type);	/* Type */
+	memcpy(ptxb + 2 * ETH_ALEN, (u8 *) & nstype, 2);	/* Type */
+	memcpy(ptxb + ETH_HLEN, packet, size);
+
+	td_ptr->tdesc1.TCPLS = TCPLS_NORMAL;
+	td_ptr->tdesc1.TCR = TCR0_TIC;
+	td_ptr->td_buf[0].queue = 0;
+
+	size += ETH_HLEN;
+	while (size < ETH_ZLEN)	/* pad to min length */
+		ptxb[size++] = '\0';
+
+	if (size < ETH_ZLEN) {
+//              printf("Padd that packet\n");
+		pktlen = ETH_ZLEN;
+//                memcpy(ptxb, skb->data, skb->len);
+		memset(ptxb + size, 0, ETH_ZLEN - size);
+
+		vptr->td_rings[entry].tdesc0.pktsize = pktlen;
+		vptr->td_rings[entry].td_buf[0].pa_low = virt_to_bus(ptxb);
+		vptr->td_rings[entry].td_buf[0].pa_high &=
+		    cpu_to_le32(0xffff0000UL);
+		vptr->td_rings[entry].td_buf[0].bufsize =
+		    vptr->td_rings[entry].tdesc0.pktsize;
+		vptr->td_rings[entry].tdesc1.CMDZ = 2;
+	} else {
+//              printf("Correct size packet\n");
+		td_ptr->tdesc0.pktsize = size;
+		td_ptr->td_buf[0].pa_low = virt_to_bus(ptxb);
+		td_ptr->td_buf[0].pa_high = 0;
+		td_ptr->td_buf[0].bufsize = td_ptr->tdesc0.pktsize;
+//                tdinfo->nskb_dma = 1;
+		td_ptr->tdesc1.CMDZ = 2;
+	}
+
+	if (vptr->flags & VELOCITY_FLAGS_TAGGING) {
+		td_ptr->tdesc1.pqinf.VID = (vptr->options.vid & 0xfff);
+		td_ptr->tdesc1.pqinf.priority = 0;
+		td_ptr->tdesc1.pqinf.CFI = 0;
+		td_ptr->tdesc1.TCR |= TCR0_VETAG;
+	}
+
+	vptr->td_curr = (entry + 1);
+
+	{
+
+		int prev = entry - 1;
+
+		if (prev < 0)
+			prev = TX_DESC_DEF - 1;
+		td_ptr->tdesc0.owner |= OWNED_BY_NIC;
+		td_ptr = &(vptr->td_rings[prev]);
+		td_ptr->td_buf[0].queue = 1;
+		mac_tx_queue_wake(vptr->mac_regs, 0);
+
+	}
+
+	to = currticks() + TX_TIMEOUT;
+	while ((td_ptr->tdesc0.owner & OWNED_BY_NIC) && (currticks() < to));	/* wait */
+
+	if (currticks() >= to) {
+		printf("TX Time Out");
+	}
+
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void velocity_disable(struct nic *nic __unused)
+{
+	/* put the card in its initial state */
+	/* This function serves 3 purposes.
+	 * This disables DMA and interrupts so we don't receive
+	 *  unexpected packets or interrupts from the card after
+	 *  etherboot has finished. 
+	 * This frees resources so etherboot may use
+	 *  this driver on another interface
+	 * This allows etherboot to reinitialize the interface
+	 *  if something is something goes wrong.
+	 */
+	struct mac_regs *regs = vptr->mac_regs;
+	mac_disable_int(regs);
+	writel(CR0_STOP, &regs->CR0Set);
+	writew(0xFFFF, &regs->TDCSRClr);
+	writeb(0xFF, &regs->RDCSRClr);
+	safe_disable_mii_autopoll(regs);
+	mac_clear_isr(regs);
+
+	/* Power down the chip */
+//      pci_set_power_state(vptr->pdev, PCI_D3hot);
+
+	vptr->flags &= (~VELOCITY_FLAGS_OPENED);
+}
+
+/**************************************************************************
+IRQ - handle interrupts
+***************************************************************************/
+static void velocity_irq(struct nic *nic __unused, irq_action_t action)
+{
+	/* This routine is somewhat optional.  Etherboot itself
+	 * doesn't use interrupts, but they are required under some
+	 * circumstances when we're acting as a PXE stack.
+	 *
+	 * If you don't implement this routine, the only effect will
+	 * be that your driver cannot be used via Etherboot's UNDI
+	 * API.  This won't affect programs that use only the UDP
+	 * portion of the PXE API, such as pxelinux.
+	 */
+
+	switch (action) {
+	case DISABLE:
+	case ENABLE:
+		/* Set receive interrupt enabled/disabled state */
+		/*
+		   outb ( action == ENABLE ? IntrMaskEnabled : IntrMaskDisabled,
+		   nic->ioaddr + IntrMaskRegister );
+		 */
+		break;
+	case FORCE:
+		/* Force NIC to generate a receive interrupt */
+		/*
+		   outb ( ForceInterrupt, nic->ioaddr + IntrForceRegister );
+		 */
+		break;
+	}
+}
+
+static struct nic_operations velocity_operations = {
+	.connect	= dummy_connect,
+	.poll		= velocity_poll,
+	.transmit	= velocity_transmit,
+	.irq		= velocity_irq,
+};
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+***************************************************************************/
+static int velocity_probe( struct nic *nic, struct pci_device *pci)
+{
+	int ret, i;
+	struct mac_regs *regs;
+
+	printf("via-velocity.c: Found %s Vendor=0x%hX Device=0x%hX\n",
+	       pci->id->name, pci->vendor, pci->device);
+
+	/* point to private storage */
+	vptr = &vptx;
+	info = chip_info_table;
+
+	velocity_init_info(pci, vptr, info);
+
+//FIXME: pci_enable_device(pci);
+//FIXME: pci_set_power_state(pci, PCI_D0);
+
+	ret = velocity_get_pci_info(vptr, pci);
+	if (ret < 0) {
+		printf("Failed to find PCI device.\n");
+		return 0;
+	}
+
+	regs = ioremap(vptr->memaddr, vptr->io_size);
+	if (regs == NULL) {
+		printf("Unable to remap io\n");
+		return 0;
+	}
+
+	vptr->mac_regs = regs;
+
+	BASE = vptr->ioaddr;
+
+	printf("Chip ID: %hX\n", vptr->chip_id);
+
+	for (i = 0; i < 6; i++)
+		nic->node_addr[i] = readb(&regs->PAR[i]);
+
+	DBG ( "%s: %s at ioaddr %#hX\n", pci->id->name, eth_ntoa ( nic->node_addr ),
+	      (unsigned int) BASE );
+
+	velocity_get_options(&vptr->options, 0, pci->id->name);
+
+	/* 
+	 *      Mask out the options cannot be set to the chip
+	 */
+	vptr->options.flags &= 0x00FFFFFFUL;	//info->flags = 0x00FFFFFFUL;
+
+	/*
+	 *      Enable the chip specified capbilities
+	 */
+
+	vptr->flags =
+	    vptr->options.
+	    flags | (0x00FFFFFFUL /*info->flags */  & 0xFF000000UL);
+
+	vptr->wol_opts = vptr->options.wol_opts;
+	vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
+
+	vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
+
+	if (vptr->flags & VELOCITY_FLAGS_TX_CSUM) {
+		printf("features missing\n");
+	}
+
+	/* and leave the chip powered down */
+// FIXME:       pci_set_power_state(pci, PCI_D3hot);
+
+	check_connection_type(vptr->mac_regs);
+	velocity_open(nic, pci);
+
+	/* store NIC parameters */
+	nic->nic_op = &velocity_operations;
+	return 1;
+}
+
+//#define IORESOURCE_IO              0x00000100      /* Resource type */
+
+/**
+ *	velocity_init_info	-	init private data
+ *	@pdev: PCI device
+ *	@vptr: Velocity info
+ *	@info: Board type
+ *
+ *	Set up the initial velocity_info struct for the device that has been
+ *	discovered.
+ */
+
+static void velocity_init_info(struct pci_device *pdev,
+			       struct velocity_info *vptr,
+			       struct velocity_info_tbl *info)
+{
+	memset(vptr, 0, sizeof(struct velocity_info));
+
+	vptr->pdev = pdev;
+	vptr->chip_id = info->chip_id;
+	vptr->io_size = info->io_size;
+	vptr->num_txq = info->txqueue;
+	vptr->multicast_limit = MCAM_SIZE;
+
+	printf
+	    ("chip_id: 0x%hX, io_size: %d, num_txq %d, multicast_limit: %d\n",
+	     vptr->chip_id, (unsigned int) vptr->io_size, vptr->num_txq,
+	     vptr->multicast_limit);
+	printf("Name: %s\n", info->name);
+
+//      spin_lock_init(&vptr->lock);
+//      INIT_LIST_HEAD(&vptr->list);
+}
+
+/**
+ *	velocity_get_pci_info	-	retrieve PCI info for device
+ *	@vptr: velocity device
+ *	@pdev: PCI device it matches
+ *
+ *	Retrieve the PCI configuration space data that interests us from
+ *	the kernel PCI layer
+ */
+
+#define IORESOURCE_IO   0x00000100	/* Resource type */
+#define IORESOURCE_PREFETCH        0x00001000	/* No side effects */
+
+#define IORESOURCE_MEM             0x00000200
+#define BAR_0           0
+#define BAR_1           1
+#define BAR_5           5
+#define  PCI_BASE_ADDRESS_SPACE 0x01	/* 0 = memory, 1 = I/O */
+#define  PCI_BASE_ADDRESS_SPACE_IO 0x01
+#define  PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
+#define  PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
+#define  PCI_BASE_ADDRESS_MEM_TYPE_32   0x00	/* 32 bit address */
+#define  PCI_BASE_ADDRESS_MEM_TYPE_1M   0x02	/* Below 1M [obsolete] */
+#define  PCI_BASE_ADDRESS_MEM_TYPE_64   0x04	/* 64 bit address */
+#define  PCI_BASE_ADDRESS_MEM_PREFETCH  0x08	/* prefetchable? */
+//#define  PCI_BASE_ADDRESS_MEM_MASK      (~0x0fUL)
+// #define  PCI_BASE_ADDRESS_IO_MASK       (~0x03UL)
+
+unsigned long pci_resource_flags(struct pci_device *pdev, unsigned int bar)
+{
+	uint32_t l, sz;
+	unsigned long flags = 0;
+
+	pci_read_config_dword(pdev, bar, &l);
+	pci_write_config_dword(pdev, bar, ~0);
+	pci_read_config_dword(pdev, bar, &sz);
+	pci_write_config_dword(pdev, bar, l);
+
+	if (!sz || sz == 0xffffffff)
+		printf("Weird size\n");
+	if (l == 0xffffffff)
+		l = 0;
+	if ((l & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY) {
+		/*    sz = pci_size(l, sz, PCI_BASE_ADDRESS_MEM_MASK);
+		   if (!sz)
+		   continue;
+		   res->start = l & PCI_BASE_ADDRESS_MEM_MASK;
+		 */ flags |= l & ~PCI_BASE_ADDRESS_MEM_MASK;
+		printf("Memory Resource\n");
+	} else {
+		//            sz = pci_size(l, sz, PCI_BASE_ADDRESS_IO_MASK & 0xffff);
+		///         if (!sz)
+		///              continue;
+//              res->start = l & PCI_BASE_ADDRESS_IO_MASK;
+		flags |= l & ~PCI_BASE_ADDRESS_IO_MASK;
+		printf("I/O Resource\n");
+	}
+	if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
+		printf("Why is it here\n");
+		flags |= IORESOURCE_IO;
+	} else {
+		printf("here\n");
+//flags &= ~IORESOURCE_IO;
+	}
+
+
+	if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
+		flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
+
+
+	return flags;
+}
+static int velocity_get_pci_info(struct velocity_info *vptr,
+				 struct pci_device *pdev)
+{
+	if (pci_read_config_byte(pdev, PCI_REVISION_ID, &vptr->rev_id) < 0) {
+		printf("DEBUG: pci_read_config_byte failed\n");
+		return -1;
+	}
+
+	adjust_pci_device(pdev);
+
+	vptr->ioaddr = pci_bar_start(pdev, PCI_BASE_ADDRESS_0);
+	vptr->memaddr = pci_bar_start(pdev, PCI_BASE_ADDRESS_1);
+
+	printf("Looking for I/O Resource - Found:");
+	if (!
+	    (pci_resource_flags(pdev, PCI_BASE_ADDRESS_0) & IORESOURCE_IO))
+	{
+		printf
+		    ("DEBUG: region #0 is not an I/O resource, aborting.\n");
+		return -1;
+	}
+
+	printf("Looking for Memory Resource - Found:");
+	if ((pci_resource_flags(pdev, PCI_BASE_ADDRESS_1) & IORESOURCE_IO)) {
+		printf("DEBUG: region #1 is an I/O resource, aborting.\n");
+		return -1;
+	}
+
+	if (pci_bar_size(pdev, PCI_BASE_ADDRESS_1) < 256) {
+		printf("DEBUG: region #1 is too small.\n");
+		return -1;
+	}
+	vptr->pdev = pdev;
+
+	return 0;
+}
+
+/**
+ *	velocity_print_link_status	-	link status reporting
+ *	@vptr: velocity to report on
+ *
+ *	Turn the link status of the velocity card into a kernel log
+ *	description of the new link state, detailing speed and duplex
+ *	status
+ */
+
+static void velocity_print_link_status(struct velocity_info *vptr)
+{
+
+	if (vptr->mii_status & VELOCITY_LINK_FAIL) {
+		printf("failed to detect cable link\n");
+	} else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
+		printf("Link autonegation");
+
+		if (vptr->mii_status & VELOCITY_SPEED_1000)
+			printf(" speed 1000M bps");
+		else if (vptr->mii_status & VELOCITY_SPEED_100)
+			printf(" speed 100M bps");
+		else
+			printf(" speed 10M bps");
+
+		if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
+			printf(" full duplex\n");
+		else
+			printf(" half duplex\n");
+	} else {
+		printf("Link forced");
+		switch (vptr->options.spd_dpx) {
+		case SPD_DPX_100_HALF:
+			printf(" speed 100M bps half duplex\n");
+			break;
+		case SPD_DPX_100_FULL:
+			printf(" speed 100M bps full duplex\n");
+			break;
+		case SPD_DPX_10_HALF:
+			printf(" speed 10M bps half duplex\n");
+			break;
+		case SPD_DPX_10_FULL:
+			printf(" speed 10M bps full duplex\n");
+			break;
+		default:
+			break;
+		}
+	}
+}
+
+/**
+ *	velocity_rx_reset	-	handle a receive reset
+ *	@vptr: velocity we are resetting
+ *
+ *	Reset the ownership and status for the receive ring side.
+ *	Hand all the receive queue to the NIC.
+ */
+
+static void velocity_rx_reset(struct velocity_info *vptr)
+{
+
+	struct mac_regs *regs = vptr->mac_regs;
+	int i;
+
+//ptr->rd_dirty = vptr->rd_filled = vptr->rd_curr = 0;
+
+	/*
+	 *      Init state, all RD entries belong to the NIC
+	 */
+	for (i = 0; i < vptr->options.numrx; ++i)
+		vptr->rd_ring[i].rdesc0.owner = OWNED_BY_NIC;
+
+	writew(RX_DESC_DEF, &regs->RBRDU);
+	writel(virt_to_le32desc(vptr->rd_ring), &regs->RDBaseLo);
+	writew(0, &regs->RDIdx);
+	writew(RX_DESC_DEF - 1, &regs->RDCSize);
+}
+
+/**
+ *	velocity_init_registers	-	initialise MAC registers
+ *	@vptr: velocity to init
+ *	@type: type of initialisation (hot or cold)
+ *
+ *	Initialise the MAC on a reset or on first set up on the
+ *	hardware.
+ */
+
+static void velocity_init_registers(struct nic *nic,
+				    struct velocity_info *vptr,
+				    enum velocity_init_type type)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+	int i, mii_status;
+
+	mac_wol_reset(regs);
+
+	switch (type) {
+	case VELOCITY_INIT_RESET:
+	case VELOCITY_INIT_WOL:
+
+//netif_stop_queue(vptr->dev);
+
+		/*
+		 *      Reset RX to prevent RX pointer not on the 4X location
+		 */
+		velocity_rx_reset(vptr);
+		mac_rx_queue_run(regs);
+		mac_rx_queue_wake(regs);
+
+		mii_status = velocity_get_opt_media_mode(vptr);
+
+		if (velocity_set_media_mode(vptr, mii_status) !=
+		    VELOCITY_LINK_CHANGE) {
+			velocity_print_link_status(vptr);
+			if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
+				printf("Link Failed\n");
+//                              netif_wake_queue(vptr->dev);
+		}
+
+		enable_flow_control_ability(vptr);
+
+		mac_clear_isr(regs);
+		writel(CR0_STOP, &regs->CR0Clr);
+		//writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), 
+		writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
+		       &regs->CR0Set);
+		break;
+
+	case VELOCITY_INIT_COLD:
+	default:
+		/*
+		 *      Do reset
+		 */
+		velocity_soft_reset(vptr);
+		mdelay(5);
+
+		mac_eeprom_reload(regs);
+		for (i = 0; i < 6; i++) {
+			writeb(nic->node_addr[i], &(regs->PAR[i]));
+		}
+		/*
+		 *      clear Pre_ACPI bit.
+		 */
+		BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
+		mac_set_rx_thresh(regs, vptr->options.rx_thresh);
+		mac_set_dma_length(regs, vptr->options.DMA_length);
+
+		writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
+		/*
+		 *      Back off algorithm use original IEEE standard
+		 */
+		BYTE_REG_BITS_SET(CFGB_OFSET,
+				  (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA |
+				   CFGB_BAKOPT), &regs->CFGB);
+
+		/*
+		 *      Init CAM filter
+		 */
+		velocity_init_cam_filter(vptr);
+
+		/*
+		 *      Set packet filter: Receive directed and broadcast address
+		 */
+//FIXME Multicast               velocity_set_multi(nic);
+
+		/*
+		 *      Enable MII auto-polling
+		 */
+		enable_mii_autopoll(regs);
+
+		vptr->int_mask = INT_MASK_DEF;
+
+		writel(virt_to_le32desc(vptr->rd_ring), &regs->RDBaseLo);
+		writew(vptr->options.numrx - 1, &regs->RDCSize);
+		mac_rx_queue_run(regs);
+		mac_rx_queue_wake(regs);
+
+		writew(vptr->options.numtx - 1, &regs->TDCSize);
+
+//              for (i = 0; i < vptr->num_txq; i++) {
+		writel(virt_to_le32desc(vptr->td_rings),
+		       &(regs->TDBaseLo[0]));
+		mac_tx_queue_run(regs, 0);
+//              }
+
+		init_flow_control_register(vptr);
+
+		writel(CR0_STOP, &regs->CR0Clr);
+		writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
+		       &regs->CR0Set);
+
+		mii_status = velocity_get_opt_media_mode(vptr);
+//              netif_stop_queue(vptr->dev);
+
+		mii_init(vptr, mii_status);
+
+		if (velocity_set_media_mode(vptr, mii_status) !=
+		    VELOCITY_LINK_CHANGE) {
+			velocity_print_link_status(vptr);
+			if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
+				printf("Link Faaailll\n");
+//                              netif_wake_queue(vptr->dev);
+		}
+
+		enable_flow_control_ability(vptr);
+		mac_hw_mibs_init(regs);
+		mac_write_int_mask(vptr->int_mask, regs);
+		mac_clear_isr(regs);
+
+
+	}
+	velocity_print_link_status(vptr);
+}
+
+/**
+ *	velocity_soft_reset	-	soft reset
+ *	@vptr: velocity to reset
+ *
+ *	Kick off a soft reset of the velocity adapter and then poll
+ *	until the reset sequence has completed before returning.
+ */
+
+static int velocity_soft_reset(struct velocity_info *vptr)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+	unsigned int i = 0;
+
+	writel(CR0_SFRST, &regs->CR0Set);
+
+	for (i = 0; i < W_MAX_TIMEOUT; i++) {
+		udelay(5);
+		if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
+			break;
+	}
+
+	if (i == W_MAX_TIMEOUT) {
+		writel(CR0_FORSRST, &regs->CR0Set);
+		/* FIXME: PCI POSTING */
+		/* delay 2ms */
+		mdelay(2);
+	}
+	return 0;
+}
+
+/**
+ *	velocity_init_rings	-	set up DMA rings
+ *	@vptr: Velocity to set up
+ *
+ *	Allocate PCI mapped DMA rings for the receive and transmit layer
+ *	to use.
+ */
+
+static int velocity_init_rings(struct velocity_info *vptr)
+{
+
+	int idx;
+
+	vptr->rd_curr = 0;
+	vptr->td_curr = 0;
+	memset(vptr->td_rings, 0, TX_DESC_DEF * sizeof(struct tx_desc));
+	memset(vptr->rd_ring, 0, RX_DESC_DEF * sizeof(struct rx_desc));
+//      memset(vptr->tx_buffs, 0, TX_DESC_DEF * PKT_BUF_SZ);
+
+
+	for (idx = 0; idx < RX_DESC_DEF; idx++) {
+		vptr->rd_ring[idx].rdesc0.RSR = 0;
+		vptr->rd_ring[idx].rdesc0.len = 0;
+		vptr->rd_ring[idx].rdesc0.reserved = 0;
+		vptr->rd_ring[idx].rdesc0.owner = 0;
+		vptr->rd_ring[idx].len = cpu_to_le32(vptr->rx_buf_sz);
+		vptr->rd_ring[idx].inten = 1;
+		vptr->rd_ring[idx].pa_low =
+		    virt_to_bus(vptr->rxb + (RX_DESC_DEF * idx));
+		vptr->rd_ring[idx].pa_high = 0;
+		vptr->rd_ring[idx].rdesc0.owner = OWNED_BY_NIC;
+	}
+
+/*	for (i = 0; idx < TX_DESC_DEF; idx++ ) {
+		vptr->td_rings[idx].tdesc1.TCPLS = TCPLS_NORMAL;
+		vptr->td_rings[idx].tdesc1.TCR = TCR0_TIC;
+		vptr->td_rings[idx].td_buf[0].queue = 0;
+		vptr->td_rings[idx].tdesc0.owner = ~OWNED_BY_NIC;
+		vptr->td_rings[idx].tdesc0.pktsize = 0;
+		vptr->td_rings[idx].td_buf[0].pa_low = cpu_to_le32(virt_to_bus(vptr->txb + (idx * PKT_BUF_SZ)));
+		vptr->td_rings[idx].td_buf[0].pa_high = 0;
+		vptr->td_rings[idx].td_buf[0].bufsize = 0;
+		vptr->td_rings[idx].tdesc1.CMDZ = 2;
+	}
+*/
+	return 0;
+}
+
+/**
+ *	velocity_open		-	interface activation callback
+ *	@dev: network layer device to open
+ *
+ *	Called when the network layer brings the interface up. Returns
+ *	a negative posix error code on failure, or zero on success.
+ *
+ *	All the ring allocation and set up is done on open for this
+ *	adapter to minimise memory usage when inactive
+ */
+
+#define PCI_BYTE_REG_BITS_ON(x,i,p) do{\
+    u8 byReg;\
+    pci_read_config_byte((p), (i), &(byReg));\
+    (byReg) |= (x);\
+    pci_write_config_byte((p), (i), (byReg));\
+} while (0)
+
+//
+// Registers in the PCI configuration space
+//
+#define PCI_REG_COMMAND         0x04	//
+#define PCI_REG_MODE0           0x60	//
+#define PCI_REG_MODE1           0x61	//
+#define PCI_REG_MODE2           0x62	//
+#define PCI_REG_MODE3           0x63	//
+#define PCI_REG_DELAY_TIMER     0x64	//
+
+// Bits in the (MODE2, 0x62) register
+//
+#define MODE2_PCEROPT       0x80	// take PCI bus ERror as a fatal and shutdown from software control
+#define MODE2_TXQ16         0x40	// TX write-back Queue control. 0->32 entries available in Tx write-back queue, 1->16 entries
+#define MODE2_TXPOST        0x08	// (Not support in VT3119)
+#define MODE2_AUTOOPT       0x04	// (VT3119 GHCI without such behavior)
+#define MODE2_MODE10T       0x02	// used to control tx Threshold for 10M case
+#define MODE2_TCPLSOPT      0x01	// TCP large send field update disable, hardware will not update related fields, leave it to software.
+
+//
+// Bits in the MODE3 register
+//
+#define MODE3_MIION         0x04	// MII symbol codine error detect enable ??
+
+// Bits in the (COMMAND, 0x04) register
+#define COMMAND_BUSM        0x04
+#define COMMAND_WAIT        0x80
+static int velocity_open(struct nic *nic, struct pci_device *pci __unused)
+{
+	u8 diff;
+	u32 TxPhyAddr, RxPhyAddr;
+	u32 TxBufPhyAddr, RxBufPhyAddr;
+	vptr->TxDescArrays = tx_ring;
+	if (vptr->TxDescArrays == 0)
+		printf("Allot Error");
+
+	/* Tx Descriptor needs 64 bytes alignment; */
+	TxPhyAddr = virt_to_bus(vptr->TxDescArrays);
+	printf("Unaligned Address : %X\n", TxPhyAddr);
+	diff = 64 - (TxPhyAddr - ((TxPhyAddr >> 6) << 6));
+	TxPhyAddr += diff;
+	vptr->td_rings = (struct tx_desc *) (vptr->TxDescArrays + diff);
+
+	printf("Aligned Address: %lX\n", virt_to_bus(vptr->td_rings));
+	vptr->tx_buffs = txb;
+	/* Rx Buffer needs 64 bytes alignment; */
+	TxBufPhyAddr = virt_to_bus(vptr->tx_buffs);
+	diff = 64 - (TxBufPhyAddr - ((TxBufPhyAddr >> 6) << 6));
+	TxBufPhyAddr += diff;
+	vptr->txb = (unsigned char *) (vptr->tx_buffs + diff);
+
+	vptr->RxDescArrays = rx_ring;
+	/* Rx Descriptor needs 64 bytes alignment; */
+	RxPhyAddr = virt_to_bus(vptr->RxDescArrays);
+	diff = 64 - (RxPhyAddr - ((RxPhyAddr >> 6) << 6));
+	RxPhyAddr += diff;
+	vptr->rd_ring = (struct rx_desc *) (vptr->RxDescArrays + diff);
+
+	vptr->rx_buffs = rxb;
+	/* Rx Buffer needs 64 bytes alignment; */
+	RxBufPhyAddr = virt_to_bus(vptr->rx_buffs);
+	diff = 64 - (RxBufPhyAddr - ((RxBufPhyAddr >> 6) << 6));
+	RxBufPhyAddr += diff;
+	vptr->rxb = (unsigned char *) (vptr->rx_buffs + diff);
+
+	if (vptr->RxDescArrays == NULL || vptr->RxDescArrays == NULL) {
+		printf("Allocate tx_ring or rd_ring failed\n");
+		return 0;
+	}
+
+	vptr->rx_buf_sz = PKT_BUF_SZ;
+/*
+    // turn this on to avoid retry forever
+    PCI_BYTE_REG_BITS_ON(MODE2_PCEROPT, PCI_REG_MODE2, pci);
+    // for some legacy BIOS and OS don't open BusM
+    // bit in PCI configuration space. So, turn it on.
+    PCI_BYTE_REG_BITS_ON(COMMAND_BUSM, PCI_REG_COMMAND, pci);
+    // turn this on to detect MII coding error
+    PCI_BYTE_REG_BITS_ON(MODE3_MIION, PCI_REG_MODE3, pci);
+ */
+	velocity_init_rings(vptr);
+
+	/* Ensure chip is running */
+//FIXME:        pci_set_power_state(vptr->pdev, PCI_D0);
+
+	velocity_init_registers(nic, vptr, VELOCITY_INIT_COLD);
+	mac_write_int_mask(0, vptr->mac_regs);
+//      _int(vptr->mac_regs);
+	//mac_enable_int(vptr->mac_regs);
+
+	vptr->flags |= VELOCITY_FLAGS_OPENED;
+	return 1;
+
+}
+
+/*
+ * MII access , media link mode setting functions
+ */
+
+
+/**
+ *	mii_init	-	set up MII
+ *	@vptr: velocity adapter
+ *	@mii_status:  links tatus
+ *
+ *	Set up the PHY for the current link state.
+ */
+
+static void mii_init(struct velocity_info *vptr, u32 mii_status __unused)
+{
+	u16 BMCR;
+
+	switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
+	case PHYID_CICADA_CS8201:
+		/*
+		 *      Reset to hardware default
+		 */
+		MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR,
+				 vptr->mac_regs);
+		/*
+		 *      Turn on ECHODIS bit in NWay-forced full mode and turn it
+		 *      off it in NWay-forced half mode for NWay-forced v.s. 
+		 *      legacy-forced issue.
+		 */
+		if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
+			MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR,
+					vptr->mac_regs);
+		else
+			MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR,
+					 vptr->mac_regs);
+		/*
+		 *      Turn on Link/Activity LED enable bit for CIS8201
+		 */
+		MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
+		break;
+	case PHYID_VT3216_32BIT:
+	case PHYID_VT3216_64BIT:
+		/*
+		 *      Reset to hardware default
+		 */
+		MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR,
+				vptr->mac_regs);
+		/*
+		 *      Turn on ECHODIS bit in NWay-forced full mode and turn it
+		 *      off it in NWay-forced half mode for NWay-forced v.s. 
+		 *      legacy-forced issue
+		 */
+		if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
+			MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR,
+					vptr->mac_regs);
+		else
+			MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR,
+					 vptr->mac_regs);
+		break;
+
+	case PHYID_MARVELL_1000:
+	case PHYID_MARVELL_1000S:
+		/*
+		 *      Assert CRS on Transmit 
+		 */
+		MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
+		/*
+		 *      Reset to hardware default 
+		 */
+		MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR,
+				vptr->mac_regs);
+		break;
+	default:
+		;
+	}
+	velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
+	if (BMCR & BMCR_ISO) {
+		BMCR &= ~BMCR_ISO;
+		velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
+	}
+}
+
+/**
+ *	safe_disable_mii_autopoll	-	autopoll off
+ *	@regs: velocity registers
+ *
+ *	Turn off the autopoll and wait for it to disable on the chip
+ */
+
+static void safe_disable_mii_autopoll(struct mac_regs *regs)
+{
+	u16 ww;
+
+	/*  turn off MAUTO */
+	writeb(0, &regs->MIICR);
+	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
+		udelay(1);
+		if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
+			break;
+	}
+}
+
+/**
+ *	enable_mii_autopoll	-	turn on autopolling
+ *	@regs: velocity registers
+ *
+ *	Enable the MII link status autopoll feature on the Velocity
+ *	hardware. Wait for it to enable.
+ */
+
+static void enable_mii_autopoll(struct mac_regs *regs)
+{
+	unsigned int ii;
+
+	writeb(0, &(regs->MIICR));
+	writeb(MIIADR_SWMPL, &regs->MIIADR);
+
+	for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
+		udelay(1);
+		if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
+			break;
+	}
+
+	writeb(MIICR_MAUTO, &regs->MIICR);
+
+	for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
+		udelay(1);
+		if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
+			break;
+	}
+
+}
+
+/**
+ *	velocity_mii_read	-	read MII data
+ *	@regs: velocity registers
+ *	@index: MII register index
+ *	@data: buffer for received data
+ *
+ *	Perform a single read of an MII 16bit register. Returns zero
+ *	on success or -ETIMEDOUT if the PHY did not respond.
+ */
+
+static int velocity_mii_read(struct mac_regs *regs, u8 index, u16 * data)
+{
+	u16 ww;
+
+	/*
+	 *      Disable MIICR_MAUTO, so that mii addr can be set normally
+	 */
+	safe_disable_mii_autopoll(regs);
+
+	writeb(index, &regs->MIIADR);
+
+	BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
+
+	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
+		if (!(readb(&regs->MIICR) & MIICR_RCMD))
+			break;
+	}
+
+	*data = readw(&regs->MIIDATA);
+
+	enable_mii_autopoll(regs);
+	if (ww == W_MAX_TIMEOUT)
+		return -1;
+	return 0;
+}
+
+/**
+ *	velocity_mii_write	-	write MII data
+ *	@regs: velocity registers
+ *	@index: MII register index
+ *	@data: 16bit data for the MII register
+ *
+ *	Perform a single write to an MII 16bit register. Returns zero
+ *	on success or -ETIMEDOUT if the PHY did not respond.
+ */
+
+static int velocity_mii_write(struct mac_regs *regs, u8 mii_addr, u16 data)
+{
+	u16 ww;
+
+	/*
+	 *      Disable MIICR_MAUTO, so that mii addr can be set normally
+	 */
+	safe_disable_mii_autopoll(regs);
+
+	/* MII reg offset */
+	writeb(mii_addr, &regs->MIIADR);
+	/* set MII data */
+	writew(data, &regs->MIIDATA);
+
+	/* turn on MIICR_WCMD */
+	BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
+
+	/* W_MAX_TIMEOUT is the timeout period */
+	for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
+		udelay(5);
+		if (!(readb(&regs->MIICR) & MIICR_WCMD))
+			break;
+	}
+	enable_mii_autopoll(regs);
+
+	if (ww == W_MAX_TIMEOUT)
+		return -1;
+	return 0;
+}
+
+/**
+ *	velocity_get_opt_media_mode	-	get media selection
+ *	@vptr: velocity adapter
+ *
+ *	Get the media mode stored in EEPROM or module options and load
+ *	mii_status accordingly. The requested link state information
+ *	is also returned.
+ */
+
+static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
+{
+	u32 status = 0;
+
+	switch (vptr->options.spd_dpx) {
+	case SPD_DPX_AUTO:
+		status = VELOCITY_AUTONEG_ENABLE;
+		break;
+	case SPD_DPX_100_FULL:
+		status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
+		break;
+	case SPD_DPX_10_FULL:
+		status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
+		break;
+	case SPD_DPX_100_HALF:
+		status = VELOCITY_SPEED_100;
+		break;
+	case SPD_DPX_10_HALF:
+		status = VELOCITY_SPEED_10;
+		break;
+	}
+	vptr->mii_status = status;
+	return status;
+}
+
+/**
+ *	mii_set_auto_on		-	autonegotiate on
+ *	@vptr: velocity
+ *
+ *	Enable autonegotation on this interface
+ */
+
+static void mii_set_auto_on(struct velocity_info *vptr)
+{
+	if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
+		MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
+	else
+		MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
+}
+
+
+/*
+static void mii_set_auto_off(struct velocity_info * vptr)
+{
+    MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
+}
+*/
+
+/**
+ *	set_mii_flow_control	-	flow control setup
+ *	@vptr: velocity interface
+ *
+ *	Set up the flow control on this interface according to
+ *	the supplied user/eeprom options.
+ */
+
+static void set_mii_flow_control(struct velocity_info *vptr)
+{
+	/*Enable or Disable PAUSE in ANAR */
+	switch (vptr->options.flow_cntl) {
+	case FLOW_CNTL_TX:
+		MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
+		break;
+
+	case FLOW_CNTL_RX:
+		MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
+		break;
+
+	case FLOW_CNTL_TX_RX:
+		MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
+		break;
+
+	case FLOW_CNTL_DISABLE:
+		MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR,
+				 vptr->mac_regs);
+		break;
+	default:
+		break;
+	}
+}
+
+/**
+ *	velocity_set_media_mode		-	set media mode
+ *	@mii_status: old MII link state
+ *
+ *	Check the media link state and configure the flow control
+ *	PHY and also velocity hardware setup accordingly. In particular
+ *	we need to set up CD polling and frame bursting.
+ */
+
+static int velocity_set_media_mode(struct velocity_info *vptr,
+				   u32 mii_status)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+
+	vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
+
+	/* Set mii link status */
+	set_mii_flow_control(vptr);
+
+	if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
+		MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR,
+				vptr->mac_regs);
+	}
+
+	/*
+	 *      If connection type is AUTO
+	 */
+	if (mii_status & VELOCITY_AUTONEG_ENABLE) {
+		printf("Velocity is AUTO mode\n");
+		/* clear force MAC mode bit */
+		BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
+		/* set duplex mode of MAC according to duplex mode of MII */
+		MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10,
+				MII_REG_ANAR, vptr->mac_regs);
+		MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000,
+				MII_REG_G1000CR, vptr->mac_regs);
+		MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR,
+				vptr->mac_regs);
+
+		/* enable AUTO-NEGO mode */
+		mii_set_auto_on(vptr);
+	} else {
+		u16 ANAR;
+		u8 CHIPGCR;
+
+		/*
+		 * 1. if it's 3119, disable frame bursting in halfduplex mode
+		 *    and enable it in fullduplex mode
+		 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
+		 * 3. only enable CD heart beat counter in 10HD mode
+		 */
+
+		/* set force MAC mode bit */
+		BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
+
+		CHIPGCR = readb(&regs->CHIPGCR);
+		CHIPGCR &= ~CHIPGCR_FCGMII;
+
+		if (mii_status & VELOCITY_DUPLEX_FULL) {
+			CHIPGCR |= CHIPGCR_FCFDX;
+			writeb(CHIPGCR, &regs->CHIPGCR);
+			printf
+			    ("DEBUG: set Velocity to forced full mode\n");
+			if (vptr->rev_id < REV_ID_VT3216_A0)
+				BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
+		} else {
+			CHIPGCR &= ~CHIPGCR_FCFDX;
+			printf
+			    ("DEBUG: set Velocity to forced half mode\n");
+			writeb(CHIPGCR, &regs->CHIPGCR);
+			if (vptr->rev_id < REV_ID_VT3216_A0)
+				BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
+		}
+
+		MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000,
+				 MII_REG_G1000CR, vptr->mac_regs);
+
+		if (!(mii_status & VELOCITY_DUPLEX_FULL)
+		    && (mii_status & VELOCITY_SPEED_10)) {
+			BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
+		} else {
+			BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
+		}
+		/* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
+		velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
+		ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
+		if (mii_status & VELOCITY_SPEED_100) {
+			if (mii_status & VELOCITY_DUPLEX_FULL)
+				ANAR |= ANAR_TXFD;
+			else
+				ANAR |= ANAR_TX;
+		} else {
+			if (mii_status & VELOCITY_DUPLEX_FULL)
+				ANAR |= ANAR_10FD;
+			else
+				ANAR |= ANAR_10;
+		}
+		velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
+		/* enable AUTO-NEGO mode */
+		mii_set_auto_on(vptr);
+		/* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
+	}
+	/* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
+	/* vptr->mii_status=check_connection_type(vptr->mac_regs); */
+	return VELOCITY_LINK_CHANGE;
+}
+
+/**
+ *	mii_check_media_mode	-	check media state
+ *	@regs: velocity registers
+ *
+ *	Check the current MII status and determine the link status
+ *	accordingly
+ */
+
+static u32 mii_check_media_mode(struct mac_regs *regs)
+{
+	u32 status = 0;
+	u16 ANAR;
+
+	if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
+		status |= VELOCITY_LINK_FAIL;
+
+	if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
+		status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
+	else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
+		status |= (VELOCITY_SPEED_1000);
+	else {
+		velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
+		if (ANAR & ANAR_TXFD)
+			status |=
+			    (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
+		else if (ANAR & ANAR_TX)
+			status |= VELOCITY_SPEED_100;
+		else if (ANAR & ANAR_10FD)
+			status |=
+			    (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
+		else
+			status |= (VELOCITY_SPEED_10);
+	}
+
+	if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
+		velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
+		if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
+		    == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
+			if (MII_REG_BITS_IS_ON
+			    (G1000CR_1000 | G1000CR_1000FD,
+			     MII_REG_G1000CR, regs))
+				status |= VELOCITY_AUTONEG_ENABLE;
+		}
+	}
+
+	return status;
+}
+
+static u32 check_connection_type(struct mac_regs *regs)
+{
+	u32 status = 0;
+	u8 PHYSR0;
+	u16 ANAR;
+	PHYSR0 = readb(&regs->PHYSR0);
+
+	/*
+	   if (!(PHYSR0 & PHYSR0_LINKGD))
+	   status|=VELOCITY_LINK_FAIL;
+	 */
+
+	if (PHYSR0 & PHYSR0_FDPX)
+		status |= VELOCITY_DUPLEX_FULL;
+
+	if (PHYSR0 & PHYSR0_SPDG)
+		status |= VELOCITY_SPEED_1000;
+	if (PHYSR0 & PHYSR0_SPD10)
+		status |= VELOCITY_SPEED_10;
+	else
+		status |= VELOCITY_SPEED_100;
+
+	if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
+		velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
+		if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
+		    == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
+			if (MII_REG_BITS_IS_ON
+			    (G1000CR_1000 | G1000CR_1000FD,
+			     MII_REG_G1000CR, regs))
+				status |= VELOCITY_AUTONEG_ENABLE;
+		}
+	}
+
+	return status;
+}
+
+/**
+ *	enable_flow_control_ability	-	flow control
+ *	@vptr: veloity to configure
+ *
+ *	Set up flow control according to the flow control options
+ *	determined by the eeprom/configuration.
+ */
+
+static void enable_flow_control_ability(struct velocity_info *vptr)
+{
+
+	struct mac_regs *regs = vptr->mac_regs;
+
+	switch (vptr->options.flow_cntl) {
+
+	case FLOW_CNTL_DEFAULT:
+		if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
+			writel(CR0_FDXRFCEN, &regs->CR0Set);
+		else
+			writel(CR0_FDXRFCEN, &regs->CR0Clr);
+
+		if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
+			writel(CR0_FDXTFCEN, &regs->CR0Set);
+		else
+			writel(CR0_FDXTFCEN, &regs->CR0Clr);
+		break;
+
+	case FLOW_CNTL_TX:
+		writel(CR0_FDXTFCEN, &regs->CR0Set);
+		writel(CR0_FDXRFCEN, &regs->CR0Clr);
+		break;
+
+	case FLOW_CNTL_RX:
+		writel(CR0_FDXRFCEN, &regs->CR0Set);
+		writel(CR0_FDXTFCEN, &regs->CR0Clr);
+		break;
+
+	case FLOW_CNTL_TX_RX:
+		writel(CR0_FDXTFCEN, &regs->CR0Set);
+		writel(CR0_FDXRFCEN, &regs->CR0Set);
+		break;
+
+	case FLOW_CNTL_DISABLE:
+		writel(CR0_FDXRFCEN, &regs->CR0Clr);
+		writel(CR0_FDXTFCEN, &regs->CR0Clr);
+		break;
+
+	default:
+		break;
+	}
+
+}
+
+/* FIXME: Move to pci.c */
+/**
+ * pci_set_power_state - Set the power state of a PCI device
+ * @dev: PCI device to be suspended
+ * @state: Power state we're entering
+ *
+ * Transition a device to a new power state, using the Power Management 
+ * Capabilities in the device's config space.
+ *
+ * RETURN VALUE: 
+ * -EINVAL if trying to enter a lower state than we're already in.
+ * 0 if we're already in the requested state.
+ * -EIO if device does not support PCI PM.
+ * 0 if we can successfully change the power state.
+ */
+
+int pci_set_power_state(struct pci_device *dev, int state)
+{
+	int pm;
+	u16 pmcsr;
+	int current_state = 0;
+
+	/* bound the state we're entering */
+	if (state > 3)
+		state = 3;
+
+	/* Validate current state:
+	 * Can enter D0 from any state, but if we can only go deeper 
+	 * to sleep if we're already in a low power state
+	 */
+	if (state > 0 && current_state > state)
+		return -1;
+	else if (current_state == state)
+		return 0;	/* we're already there */
+
+	/* find PCI PM capability in list */
+	pm = pci_find_capability(dev, PCI_CAP_ID_PM);
+
+	/* abort if the device doesn't support PM capabilities */
+	if (!pm)
+		return -2;
+
+	/* check if this device supports the desired state */
+	if (state == 1 || state == 2) {
+		u16 pmc;
+		pci_read_config_word(dev, pm + PCI_PM_PMC, &pmc);
+		if (state == 1 && !(pmc & PCI_PM_CAP_D1))
+			return -2;
+		else if (state == 2 && !(pmc & PCI_PM_CAP_D2))
+			return -2;
+	}
+
+	/* If we're in D3, force entire word to 0.
+	 * This doesn't affect PME_Status, disables PME_En, and
+	 * sets PowerState to 0.
+	 */
+	if (current_state >= 3)
+		pmcsr = 0;
+	else {
+		pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
+		pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
+		pmcsr |= state;
+	}
+
+	/* enter specified state */
+	pci_write_config_word(dev, pm + PCI_PM_CTRL, pmcsr);
+
+	/* Mandatory power management transition delays */
+	/* see PCI PM 1.1 5.6.1 table 18 */
+	if (state == 3 || current_state == 3)
+		mdelay(10);
+	else if (state == 2 || current_state == 2)
+		udelay(200);
+	current_state = state;
+
+	return 0;
+}
+
+static struct pci_device_id velocity_nics[] = {
+	PCI_ROM(0x1106, 0x3119, "via-velocity", "VIA Networking Velocity Family Gigabit Ethernet Adapter", 0),
+};
+
+PCI_DRIVER ( velocity_driver, velocity_nics, PCI_NO_CLASS );
+
+DRIVER ( "VIA-VELOCITY/PCI", nic_driver, pci_driver, velocity_driver,
+         velocity_probe, velocity_disable );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-velocity.h ipxe-1.0.1~lliurex1505/src/drivers/net/via-velocity.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/via-velocity.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/via-velocity.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,1932 @@
+/*
+ * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
+ * All rights reserved.
+ *
+ * This software may be redistributed and/or modified under
+ * the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ *
+ * File: via-velocity.h
+ *
+ * Purpose: Header file to define driver's private structures.
+ *
+ * Author: Chuang Liang-Shing, AJ Jiang
+ *
+ * Date: Jan 24, 2003
+ *
+ * Changes for Etherboot Port: 
+ *       Copyright (c) 2006 by Timothy Legge <tlegge@rogers.com>
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifndef VELOCITY_H
+#define VELOCITY_H
+
+#define VELOCITY_TX_CSUM_SUPPORT
+
+#define VELOCITY_NAME          "via-velocity"
+#define VELOCITY_FULL_DRV_NAM  "VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"
+#define VELOCITY_VERSION       "1.13"
+
+#define PKT_BUF_SZ          1564
+
+#define MAX_UNITS           8
+#define OPTION_DEFAULT      { [0 ... MAX_UNITS-1] = -1}
+
+#define REV_ID_VT6110       (0)
+
+#define BYTE_REG_BITS_ON(x,p)       do { writeb(readb((p))|(x),(p));} while (0)
+#define WORD_REG_BITS_ON(x,p)       do { writew(readw((p))|(x),(p));} while (0)
+#define DWORD_REG_BITS_ON(x,p)      do { writel(readl((p))|(x),(p));} while (0)
+
+#define BYTE_REG_BITS_IS_ON(x,p)    (readb((p)) & (x))
+#define WORD_REG_BITS_IS_ON(x,p)    (readw((p)) & (x))
+#define DWORD_REG_BITS_IS_ON(x,p)   (readl((p)) & (x))
+
+#define BYTE_REG_BITS_OFF(x,p)      do { writeb(readb((p)) & (~(x)),(p));} while (0)
+#define WORD_REG_BITS_OFF(x,p)      do { writew(readw((p)) & (~(x)),(p));} while (0)
+#define DWORD_REG_BITS_OFF(x,p)     do { writel(readl((p)) & (~(x)),(p));} while (0)
+
+#define BYTE_REG_BITS_SET(x,m,p)    do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0)
+#define WORD_REG_BITS_SET(x,m,p)    do { writew( (readw((p)) & (~(m))) |(x),(p));} while (0)
+#define DWORD_REG_BITS_SET(x,m,p)   do { writel( (readl((p)) & (~(m)))|(x),(p));}  while (0)
+
+#define VAR_USED(p)     do {(p)=(p);} while (0)
+
+/*
+ * Purpose: Structures for MAX RX/TX descriptors.
+ */
+
+
+#define B_OWNED_BY_CHIP     1
+#define B_OWNED_BY_HOST     0
+
+/*
+ * Bits in the RSR0 register
+ */
+
+#define RSR_DETAG          0x0080
+#define RSR_SNTAG          0x0040
+#define RSR_RXER           0x0020
+#define RSR_RL             0x0010
+#define RSR_CE             0x0008
+#define RSR_FAE            0x0004
+#define RSR_CRC            0x0002
+#define RSR_VIDM           0x0001
+
+/*
+ * Bits in the RSR1 register
+ */
+
+#define RSR_RXOK           0x8000	// rx OK
+#define RSR_PFT            0x4000	// Perfect filtering address match
+#define RSR_MAR            0x2000	// MAC accept multicast address packet
+#define RSR_BAR            0x1000	// MAC accept broadcast address packet
+#define RSR_PHY            0x0800	// MAC accept physical address packet
+#define RSR_VTAG           0x0400	// 802.1p/1q tagging packet indicator
+#define RSR_STP            0x0200	// start of packet
+#define RSR_EDP            0x0100	// end of packet
+
+/*
+ * Bits in the RSR1 register
+ */
+
+#define RSR1_RXOK           0x80	// rx OK
+#define RSR1_PFT            0x40	// Perfect filtering address match
+#define RSR1_MAR            0x20	// MAC accept multicast address packet
+#define RSR1_BAR            0x10	// MAC accept broadcast address packet
+#define RSR1_PHY            0x08	// MAC accept physical address packet
+#define RSR1_VTAG           0x04	// 802.1p/1q tagging packet indicator
+#define RSR1_STP            0x02	// start of packet
+#define RSR1_EDP            0x01	// end of packet
+
+/*
+ * Bits in the CSM register
+ */
+
+#define CSM_IPOK            0x40	//IP Checkusm validatiaon ok
+#define CSM_TUPOK           0x20	//TCP/UDP Checkusm validatiaon ok
+#define CSM_FRAG            0x10	//Fragment IP datagram
+#define CSM_IPKT            0x04	//Received an IP packet
+#define CSM_TCPKT           0x02	//Received a TCP packet
+#define CSM_UDPKT           0x01	//Received a UDP packet
+
+/*
+ * Bits in the TSR0 register
+ */
+
+#define TSR0_ABT            0x0080	// Tx abort because of excessive collision
+#define TSR0_OWT            0x0040	// Jumbo frame Tx abort
+#define TSR0_OWC            0x0020	// Out of window collision
+#define TSR0_COLS           0x0010	// experience collision in this transmit event
+#define TSR0_NCR3           0x0008	// collision retry counter[3]
+#define TSR0_NCR2           0x0004	// collision retry counter[2]
+#define TSR0_NCR1           0x0002	// collision retry counter[1]
+#define TSR0_NCR0           0x0001	// collision retry counter[0]
+#define TSR0_TERR           0x8000	//
+#define TSR0_FDX            0x4000	// current transaction is serviced by full duplex mode
+#define TSR0_GMII           0x2000	// current transaction is serviced by GMII mode
+#define TSR0_LNKFL          0x1000	// packet serviced during link down
+#define TSR0_SHDN           0x0400	// shutdown case
+#define TSR0_CRS            0x0200	// carrier sense lost
+#define TSR0_CDH            0x0100	// AQE test fail (CD heartbeat)
+
+/*
+ * Bits in the TSR1 register
+ */
+
+#define TSR1_TERR           0x80	//
+#define TSR1_FDX            0x40	// current transaction is serviced by full duplex mode
+#define TSR1_GMII           0x20	// current transaction is serviced by GMII mode
+#define TSR1_LNKFL          0x10	// packet serviced during link down
+#define TSR1_SHDN           0x04	// shutdown case
+#define TSR1_CRS            0x02	// carrier sense lost
+#define TSR1_CDH            0x01	// AQE test fail (CD heartbeat)
+
+//
+// Bits in the TCR0 register
+//
+#define TCR0_TIC            0x80	// assert interrupt immediately while descriptor has been send complete
+#define TCR0_PIC            0x40	// priority interrupt request, INA# is issued over adaptive interrupt scheme
+#define TCR0_VETAG          0x20	// enable VLAN tag
+#define TCR0_IPCK           0x10	// request IP  checksum calculation.
+#define TCR0_UDPCK          0x08	// request UDP checksum calculation.
+#define TCR0_TCPCK          0x04	// request TCP checksum calculation.
+#define TCR0_JMBO           0x02	// indicate a jumbo packet in GMAC side
+#define TCR0_CRC            0x01	// disable CRC generation
+
+#define TCPLS_NORMAL        3
+#define TCPLS_START         2
+#define TCPLS_END           1
+#define TCPLS_MED           0
+
+
+// max transmit or receive buffer size
+#define CB_RX_BUF_SIZE     2048UL	// max buffer size
+					// NOTE: must be multiple of 4
+
+#define CB_MAX_RD_NUM       512	// MAX # of RD
+#define CB_MAX_TD_NUM       256	// MAX # of TD
+
+#define CB_INIT_RD_NUM_3119 128	// init # of RD, for setup VT3119
+#define CB_INIT_TD_NUM_3119 64	// init # of TD, for setup VT3119
+
+#define CB_INIT_RD_NUM      128	// init # of RD, for setup default
+#define CB_INIT_TD_NUM      64	// init # of TD, for setup default
+
+// for 3119
+#define CB_TD_RING_NUM      4	// # of TD rings.
+#define CB_MAX_SEG_PER_PKT  7	// max data seg per packet (Tx)
+
+
+/*
+ *	If collisions excess 15 times , tx will abort, and
+ *	if tx fifo underflow, tx will fail
+ *	we should try to resend it
+ */
+
+#define CB_MAX_TX_ABORT_RETRY   3
+
+/*
+ *	Receive descriptor
+ */
+
+struct rdesc0 {
+	u16 RSR;		/* Receive status */
+	u16 len:14;		/* Received packet length */
+	u16 reserved:1;
+	u16 owner:1;		/* Who owns this buffer ? */
+};
+
+struct rdesc1 {
+	u16 PQTAG;
+	u8 CSM;
+	u8 IPKT;
+};
+
+struct rx_desc {
+	struct rdesc0 rdesc0;
+	struct rdesc1 rdesc1;
+	u32 pa_low;		/* Low 32 bit PCI address */
+	u16 pa_high;		/* Next 16 bit PCI address (48 total) */
+	u16 len:15;		/* Frame size */
+	u16 inten:1;		/* Enable interrupt */
+} __attribute__ ((__packed__));
+
+/*
+ *	Transmit descriptor
+ */
+
+struct tdesc0 {
+	u16 TSR;		/* Transmit status register */
+	u16 pktsize:14;		/* Size of frame */
+	u16 reserved:1;
+	u16 owner:1;		/* Who owns the buffer */
+};
+
+struct pqinf {			/* Priority queue info */
+	u16 VID:12;
+	u16 CFI:1;
+	u16 priority:3;
+} __attribute__ ((__packed__));
+
+struct tdesc1 {
+	struct pqinf pqinf;
+	u8 TCR;
+	u8 TCPLS:2;
+	u8 reserved:2;
+	u8 CMDZ:4;
+} __attribute__ ((__packed__));
+
+struct td_buf {
+	u32 pa_low;
+	u16 pa_high;
+	u16 bufsize:14;
+	u16 reserved:1;
+	u16 queue:1;
+} __attribute__ ((__packed__));
+
+struct tx_desc {
+	struct tdesc0 tdesc0;
+	struct tdesc1 tdesc1;
+	struct td_buf td_buf[7];
+};
+
+#ifdef LINUX
+struct velocity_rd_info {
+	struct sk_buff *skb;
+	dma_addr_t skb_dma;
+};
+
+
+/**
+ *	alloc_rd_info		-	allocate an rd info block
+ *
+ *	Alocate and initialize a receive info structure used for keeping
+ *	track of kernel side information related to each receive
+ *	descriptor we are using
+ */
+
+static inline struct velocity_rd_info *alloc_rd_info(void)
+{
+	struct velocity_rd_info *ptr;
+	if ((ptr =
+	     kmalloc(sizeof(struct velocity_rd_info), GFP_ATOMIC)) == NULL)
+		return NULL;
+	else {
+		memset(ptr, 0, sizeof(struct velocity_rd_info));
+		return ptr;
+	}
+}
+
+/*
+ *	Used to track transmit side buffers.
+ */
+
+struct velocity_td_info {
+	struct sk_buff *skb;
+	u8 *buf;
+	int nskb_dma;
+	dma_addr_t skb_dma[7];
+	dma_addr_t buf_dma;
+};
+
+#endif
+enum {
+	OWNED_BY_HOST = 0,
+	OWNED_BY_NIC = 1
+} velocity_owner;
+
+
+/*
+ *	MAC registers and macros.
+ */
+
+
+#define MCAM_SIZE           64
+#define VCAM_SIZE           64
+#define TX_QUEUE_NO         4
+
+#define MAX_HW_MIB_COUNTER  32
+#define VELOCITY_MIN_MTU    (1514-14)
+#define VELOCITY_MAX_MTU    (9000)
+
+/*
+ *	Registers in the MAC
+ */
+
+#define MAC_REG_PAR         0x00	// physical address
+#define MAC_REG_RCR         0x06
+#define MAC_REG_TCR         0x07
+#define MAC_REG_CR0_SET     0x08
+#define MAC_REG_CR1_SET     0x09
+#define MAC_REG_CR2_SET     0x0A
+#define MAC_REG_CR3_SET     0x0B
+#define MAC_REG_CR0_CLR     0x0C
+#define MAC_REG_CR1_CLR     0x0D
+#define MAC_REG_CR2_CLR     0x0E
+#define MAC_REG_CR3_CLR     0x0F
+#define MAC_REG_MAR         0x10
+#define MAC_REG_CAM         0x10
+#define MAC_REG_DEC_BASE_HI 0x18
+#define MAC_REG_DBF_BASE_HI 0x1C
+#define MAC_REG_ISR_CTL     0x20
+#define MAC_REG_ISR_HOTMR   0x20
+#define MAC_REG_ISR_TSUPTHR 0x20
+#define MAC_REG_ISR_RSUPTHR 0x20
+#define MAC_REG_ISR_CTL1    0x21
+#define MAC_REG_TXE_SR      0x22
+#define MAC_REG_RXE_SR      0x23
+#define MAC_REG_ISR         0x24
+#define MAC_REG_ISR0        0x24
+#define MAC_REG_ISR1        0x25
+#define MAC_REG_ISR2        0x26
+#define MAC_REG_ISR3        0x27
+#define MAC_REG_IMR         0x28
+#define MAC_REG_IMR0        0x28
+#define MAC_REG_IMR1        0x29
+#define MAC_REG_IMR2        0x2A
+#define MAC_REG_IMR3        0x2B
+#define MAC_REG_TDCSR_SET   0x30
+#define MAC_REG_RDCSR_SET   0x32
+#define MAC_REG_TDCSR_CLR   0x34
+#define MAC_REG_RDCSR_CLR   0x36
+#define MAC_REG_RDBASE_LO   0x38
+#define MAC_REG_RDINDX      0x3C
+#define MAC_REG_TDBASE_LO   0x40
+#define MAC_REG_RDCSIZE     0x50
+#define MAC_REG_TDCSIZE     0x52
+#define MAC_REG_TDINDX      0x54
+#define MAC_REG_TDIDX0      0x54
+#define MAC_REG_TDIDX1      0x56
+#define MAC_REG_TDIDX2      0x58
+#define MAC_REG_TDIDX3      0x5A
+#define MAC_REG_PAUSE_TIMER 0x5C
+#define MAC_REG_RBRDU       0x5E
+#define MAC_REG_FIFO_TEST0  0x60
+#define MAC_REG_FIFO_TEST1  0x64
+#define MAC_REG_CAMADDR     0x68
+#define MAC_REG_CAMCR       0x69
+#define MAC_REG_GFTEST      0x6A
+#define MAC_REG_FTSTCMD     0x6B
+#define MAC_REG_MIICFG      0x6C
+#define MAC_REG_MIISR       0x6D
+#define MAC_REG_PHYSR0      0x6E
+#define MAC_REG_PHYSR1      0x6F
+#define MAC_REG_MIICR       0x70
+#define MAC_REG_MIIADR      0x71
+#define MAC_REG_MIIDATA     0x72
+#define MAC_REG_SOFT_TIMER0 0x74
+#define MAC_REG_SOFT_TIMER1 0x76
+#define MAC_REG_CFGA        0x78
+#define MAC_REG_CFGB        0x79
+#define MAC_REG_CFGC        0x7A
+#define MAC_REG_CFGD        0x7B
+#define MAC_REG_DCFG0       0x7C
+#define MAC_REG_DCFG1       0x7D
+#define MAC_REG_MCFG0       0x7E
+#define MAC_REG_MCFG1       0x7F
+
+#define MAC_REG_TBIST       0x80
+#define MAC_REG_RBIST       0x81
+#define MAC_REG_PMCC        0x82
+#define MAC_REG_STICKHW     0x83
+#define MAC_REG_MIBCR       0x84
+#define MAC_REG_EERSV       0x85
+#define MAC_REG_REVID       0x86
+#define MAC_REG_MIBREAD     0x88
+#define MAC_REG_BPMA        0x8C
+#define MAC_REG_EEWR_DATA   0x8C
+#define MAC_REG_BPMD_WR     0x8F
+#define MAC_REG_BPCMD       0x90
+#define MAC_REG_BPMD_RD     0x91
+#define MAC_REG_EECHKSUM    0x92
+#define MAC_REG_EECSR       0x93
+#define MAC_REG_EERD_DATA   0x94
+#define MAC_REG_EADDR       0x96
+#define MAC_REG_EMBCMD      0x97
+#define MAC_REG_JMPSR0      0x98
+#define MAC_REG_JMPSR1      0x99
+#define MAC_REG_JMPSR2      0x9A
+#define MAC_REG_JMPSR3      0x9B
+#define MAC_REG_CHIPGSR     0x9C
+#define MAC_REG_TESTCFG     0x9D
+#define MAC_REG_DEBUG       0x9E
+#define MAC_REG_CHIPGCR     0x9F
+#define MAC_REG_WOLCR0_SET  0xA0
+#define MAC_REG_WOLCR1_SET  0xA1
+#define MAC_REG_PWCFG_SET   0xA2
+#define MAC_REG_WOLCFG_SET  0xA3
+#define MAC_REG_WOLCR0_CLR  0xA4
+#define MAC_REG_WOLCR1_CLR  0xA5
+#define MAC_REG_PWCFG_CLR   0xA6
+#define MAC_REG_WOLCFG_CLR  0xA7
+#define MAC_REG_WOLSR0_SET  0xA8
+#define MAC_REG_WOLSR1_SET  0xA9
+#define MAC_REG_WOLSR0_CLR  0xAC
+#define MAC_REG_WOLSR1_CLR  0xAD
+#define MAC_REG_PATRN_CRC0  0xB0
+#define MAC_REG_PATRN_CRC1  0xB2
+#define MAC_REG_PATRN_CRC2  0xB4
+#define MAC_REG_PATRN_CRC3  0xB6
+#define MAC_REG_PATRN_CRC4  0xB8
+#define MAC_REG_PATRN_CRC5  0xBA
+#define MAC_REG_PATRN_CRC6  0xBC
+#define MAC_REG_PATRN_CRC7  0xBE
+#define MAC_REG_BYTEMSK0_0  0xC0
+#define MAC_REG_BYTEMSK0_1  0xC4
+#define MAC_REG_BYTEMSK0_2  0xC8
+#define MAC_REG_BYTEMSK0_3  0xCC
+#define MAC_REG_BYTEMSK1_0  0xD0
+#define MAC_REG_BYTEMSK1_1  0xD4
+#define MAC_REG_BYTEMSK1_2  0xD8
+#define MAC_REG_BYTEMSK1_3  0xDC
+#define MAC_REG_BYTEMSK2_0  0xE0
+#define MAC_REG_BYTEMSK2_1  0xE4
+#define MAC_REG_BYTEMSK2_2  0xE8
+#define MAC_REG_BYTEMSK2_3  0xEC
+#define MAC_REG_BYTEMSK3_0  0xF0
+#define MAC_REG_BYTEMSK3_1  0xF4
+#define MAC_REG_BYTEMSK3_2  0xF8
+#define MAC_REG_BYTEMSK3_3  0xFC
+
+/*
+ *	Bits in the RCR register
+ */
+
+#define RCR_AS              0x80
+#define RCR_AP              0x40
+#define RCR_AL              0x20
+#define RCR_PROM            0x10
+#define RCR_AB              0x08
+#define RCR_AM              0x04
+#define RCR_AR              0x02
+#define RCR_SEP             0x01
+
+/*
+ *	Bits in the TCR register
+ */
+
+#define TCR_TB2BDIS         0x80
+#define TCR_COLTMC1         0x08
+#define TCR_COLTMC0         0x04
+#define TCR_LB1             0x02	/* loopback[1] */
+#define TCR_LB0             0x01	/* loopback[0] */
+
+/*
+ *	Bits in the CR0 register
+ */
+
+#define CR0_TXON            0x00000008UL
+#define CR0_RXON            0x00000004UL
+#define CR0_STOP            0x00000002UL	/* stop MAC, default = 1 */
+#define CR0_STRT            0x00000001UL	/* start MAC */
+#define CR0_SFRST           0x00008000UL	/* software reset */
+#define CR0_TM1EN           0x00004000UL
+#define CR0_TM0EN           0x00002000UL
+#define CR0_DPOLL           0x00000800UL	/* disable rx/tx auto polling */
+#define CR0_DISAU           0x00000100UL
+#define CR0_XONEN           0x00800000UL
+#define CR0_FDXTFCEN        0x00400000UL	/* full-duplex TX flow control enable */
+#define CR0_FDXRFCEN        0x00200000UL	/* full-duplex RX flow control enable */
+#define CR0_HDXFCEN         0x00100000UL	/* half-duplex flow control enable */
+#define CR0_XHITH1          0x00080000UL	/* TX XON high threshold 1 */
+#define CR0_XHITH0          0x00040000UL	/* TX XON high threshold 0 */
+#define CR0_XLTH1           0x00020000UL	/* TX pause frame low threshold 1 */
+#define CR0_XLTH0           0x00010000UL	/* TX pause frame low threshold 0 */
+#define CR0_GSPRST          0x80000000UL
+#define CR0_FORSRST         0x40000000UL
+#define CR0_FPHYRST         0x20000000UL
+#define CR0_DIAG            0x10000000UL
+#define CR0_INTPCTL         0x04000000UL
+#define CR0_GINTMSK1        0x02000000UL
+#define CR0_GINTMSK0        0x01000000UL
+
+/*
+ *	Bits in the CR1 register
+ */
+
+#define CR1_SFRST           0x80	/* software reset */
+#define CR1_TM1EN           0x40
+#define CR1_TM0EN           0x20
+#define CR1_DPOLL           0x08	/* disable rx/tx auto polling */
+#define CR1_DISAU           0x01
+
+/*
+ *	Bits in the CR2 register
+ */
+
+#define CR2_XONEN           0x80
+#define CR2_FDXTFCEN        0x40	/* full-duplex TX flow control enable */
+#define CR2_FDXRFCEN        0x20	/* full-duplex RX flow control enable */
+#define CR2_HDXFCEN         0x10	/* half-duplex flow control enable */
+#define CR2_XHITH1          0x08	/* TX XON high threshold 1 */
+#define CR2_XHITH0          0x04	/* TX XON high threshold 0 */
+#define CR2_XLTH1           0x02	/* TX pause frame low threshold 1 */
+#define CR2_XLTH0           0x01	/* TX pause frame low threshold 0 */
+
+/*
+ *	Bits in the CR3 register
+ */
+
+#define CR3_GSPRST          0x80
+#define CR3_FORSRST         0x40
+#define CR3_FPHYRST         0x20
+#define CR3_DIAG            0x10
+#define CR3_INTPCTL         0x04
+#define CR3_GINTMSK1        0x02
+#define CR3_GINTMSK0        0x01
+
+#define ISRCTL_UDPINT       0x8000
+#define ISRCTL_TSUPDIS      0x4000
+#define ISRCTL_RSUPDIS      0x2000
+#define ISRCTL_PMSK1        0x1000
+#define ISRCTL_PMSK0        0x0800
+#define ISRCTL_INTPD        0x0400
+#define ISRCTL_HCRLD        0x0200
+#define ISRCTL_SCRLD        0x0100
+
+/*
+ *	Bits in the ISR_CTL1 register
+ */
+
+#define ISRCTL1_UDPINT      0x80
+#define ISRCTL1_TSUPDIS     0x40
+#define ISRCTL1_RSUPDIS     0x20
+#define ISRCTL1_PMSK1       0x10
+#define ISRCTL1_PMSK0       0x08
+#define ISRCTL1_INTPD       0x04
+#define ISRCTL1_HCRLD       0x02
+#define ISRCTL1_SCRLD       0x01
+
+/*
+ *	Bits in the TXE_SR register
+ */
+
+#define TXESR_TFDBS         0x08
+#define TXESR_TDWBS         0x04
+#define TXESR_TDRBS         0x02
+#define TXESR_TDSTR         0x01
+
+/*
+ *	Bits in the RXE_SR register
+ */
+
+#define RXESR_RFDBS         0x08
+#define RXESR_RDWBS         0x04
+#define RXESR_RDRBS         0x02
+#define RXESR_RDSTR         0x01
+
+/*
+ *	Bits in the ISR register
+ */
+
+#define ISR_ISR3            0x80000000UL
+#define ISR_ISR2            0x40000000UL
+#define ISR_ISR1            0x20000000UL
+#define ISR_ISR0            0x10000000UL
+#define ISR_TXSTLI          0x02000000UL
+#define ISR_RXSTLI          0x01000000UL
+#define ISR_HFLD            0x00800000UL
+#define ISR_UDPI            0x00400000UL
+#define ISR_MIBFI           0x00200000UL
+#define ISR_SHDNI           0x00100000UL
+#define ISR_PHYI            0x00080000UL
+#define ISR_PWEI            0x00040000UL
+#define ISR_TMR1I           0x00020000UL
+#define ISR_TMR0I           0x00010000UL
+#define ISR_SRCI            0x00008000UL
+#define ISR_LSTPEI          0x00004000UL
+#define ISR_LSTEI           0x00002000UL
+#define ISR_OVFI            0x00001000UL
+#define ISR_FLONI           0x00000800UL
+#define ISR_RACEI           0x00000400UL
+#define ISR_TXWB1I          0x00000200UL
+#define ISR_TXWB0I          0x00000100UL
+#define ISR_PTX3I           0x00000080UL
+#define ISR_PTX2I           0x00000040UL
+#define ISR_PTX1I           0x00000020UL
+#define ISR_PTX0I           0x00000010UL
+#define ISR_PTXI            0x00000008UL
+#define ISR_PRXI            0x00000004UL
+#define ISR_PPTXI           0x00000002UL
+#define ISR_PPRXI           0x00000001UL
+
+/*
+ *	Bits in the IMR register
+ */
+
+#define IMR_TXSTLM          0x02000000UL
+#define IMR_UDPIM           0x00400000UL
+#define IMR_MIBFIM          0x00200000UL
+#define IMR_SHDNIM          0x00100000UL
+#define IMR_PHYIM           0x00080000UL
+#define IMR_PWEIM           0x00040000UL
+#define IMR_TMR1IM          0x00020000UL
+#define IMR_TMR0IM          0x00010000UL
+
+#define IMR_SRCIM           0x00008000UL
+#define IMR_LSTPEIM         0x00004000UL
+#define IMR_LSTEIM          0x00002000UL
+#define IMR_OVFIM           0x00001000UL
+#define IMR_FLONIM          0x00000800UL
+#define IMR_RACEIM          0x00000400UL
+#define IMR_TXWB1IM         0x00000200UL
+#define IMR_TXWB0IM         0x00000100UL
+
+#define IMR_PTX3IM          0x00000080UL
+#define IMR_PTX2IM          0x00000040UL
+#define IMR_PTX1IM          0x00000020UL
+#define IMR_PTX0IM          0x00000010UL
+#define IMR_PTXIM           0x00000008UL
+#define IMR_PRXIM           0x00000004UL
+#define IMR_PPTXIM          0x00000002UL
+#define IMR_PPRXIM          0x00000001UL
+
+/* 0x0013FB0FUL  =  initial value of IMR */
+
+#define INT_MASK_DEF        ( IMR_PPTXIM|IMR_PPRXIM| IMR_PTXIM|IMR_PRXIM | \
+                            IMR_PWEIM|IMR_TXWB0IM|IMR_TXWB1IM|IMR_FLONIM|  \
+                            IMR_OVFIM|IMR_LSTEIM|IMR_LSTPEIM|IMR_SRCIM|IMR_MIBFIM|\
+                            IMR_SHDNIM |IMR_TMR1IM|IMR_TMR0IM|IMR_TXSTLM )
+
+/*
+ *	Bits in the TDCSR0/1, RDCSR0 register
+ */
+
+#define TRDCSR_DEAD         0x0008
+#define TRDCSR_WAK          0x0004
+#define TRDCSR_ACT          0x0002
+#define TRDCSR_RUN	    0x0001
+
+/*
+ *	Bits in the CAMADDR register
+ */
+
+#define CAMADDR_CAMEN       0x80
+#define CAMADDR_VCAMSL      0x40
+
+/*
+ *	Bits in the CAMCR register
+ */
+
+#define CAMCR_PS1           0x80
+#define CAMCR_PS0           0x40
+#define CAMCR_AITRPKT       0x20
+#define CAMCR_AITR16        0x10
+#define CAMCR_CAMRD         0x08
+#define CAMCR_CAMWR         0x04
+#define CAMCR_PS_CAM_MASK   0x40
+#define CAMCR_PS_CAM_DATA   0x80
+#define CAMCR_PS_MAR        0x00
+
+/*
+ *	Bits in the MIICFG register
+ */
+
+#define MIICFG_MPO1         0x80
+#define MIICFG_MPO0         0x40
+#define MIICFG_MFDC         0x20
+
+/*
+ *	Bits in the MIISR register
+ */
+
+#define MIISR_MIDLE         0x80
+
+/*
+ *	 Bits in the PHYSR0 register
+ */
+
+#define PHYSR0_PHYRST       0x80
+#define PHYSR0_LINKGD       0x40
+#define PHYSR0_FDPX         0x10
+#define PHYSR0_SPDG         0x08
+#define PHYSR0_SPD10        0x04
+#define PHYSR0_RXFLC        0x02
+#define PHYSR0_TXFLC        0x01
+
+/*
+ *	Bits in the PHYSR1 register
+ */
+
+#define PHYSR1_PHYTBI       0x01
+
+/*
+ *	Bits in the MIICR register
+ */
+
+#define MIICR_MAUTO         0x80
+#define MIICR_RCMD          0x40
+#define MIICR_WCMD          0x20
+#define MIICR_MDPM          0x10
+#define MIICR_MOUT          0x08
+#define MIICR_MDO           0x04
+#define MIICR_MDI           0x02
+#define MIICR_MDC           0x01
+
+/*
+ *	Bits in the MIIADR register
+ */
+
+#define MIIADR_SWMPL        0x80
+
+/*
+ *	Bits in the CFGA register
+ */
+
+#define CFGA_PMHCTG         0x08
+#define CFGA_GPIO1PD        0x04
+#define CFGA_ABSHDN         0x02
+#define CFGA_PACPI          0x01
+
+/*
+ *	Bits in the CFGB register
+ */
+
+#define CFGB_GTCKOPT        0x80
+#define CFGB_MIIOPT         0x40
+#define CFGB_CRSEOPT        0x20
+#define CFGB_OFSET          0x10
+#define CFGB_CRANDOM        0x08
+#define CFGB_CAP            0x04
+#define CFGB_MBA            0x02
+#define CFGB_BAKOPT         0x01
+
+/*
+ *	Bits in the CFGC register
+ */
+
+#define CFGC_EELOAD         0x80
+#define CFGC_BROPT          0x40
+#define CFGC_DLYEN          0x20
+#define CFGC_DTSEL          0x10
+#define CFGC_BTSEL          0x08
+#define CFGC_BPS2           0x04	/* bootrom select[2] */
+#define CFGC_BPS1           0x02	/* bootrom select[1] */
+#define CFGC_BPS0           0x01	/* bootrom select[0] */
+
+/*
+ * Bits in the CFGD register
+ */
+
+#define CFGD_IODIS          0x80
+#define CFGD_MSLVDACEN      0x40
+#define CFGD_CFGDACEN       0x20
+#define CFGD_PCI64EN        0x10
+#define CFGD_HTMRL4         0x08
+
+/*
+ *	Bits in the DCFG1 register
+ */
+
+#define DCFG_XMWI           0x8000
+#define DCFG_XMRM           0x4000
+#define DCFG_XMRL           0x2000
+#define DCFG_PERDIS         0x1000
+#define DCFG_MRWAIT         0x0400
+#define DCFG_MWWAIT         0x0200
+#define DCFG_LATMEN         0x0100
+
+/*
+ *	Bits in the MCFG0 register
+ */
+
+#define MCFG_RXARB          0x0080
+#define MCFG_RFT1           0x0020
+#define MCFG_RFT0           0x0010
+#define MCFG_LOWTHOPT       0x0008
+#define MCFG_PQEN           0x0004
+#define MCFG_RTGOPT         0x0002
+#define MCFG_VIDFR          0x0001
+
+/*
+ *	Bits in the MCFG1 register
+ */
+
+#define MCFG_TXARB          0x8000
+#define MCFG_TXQBK1         0x0800
+#define MCFG_TXQBK0         0x0400
+#define MCFG_TXQNOBK        0x0200
+#define MCFG_SNAPOPT        0x0100
+
+/*
+ *	Bits in the PMCC  register
+ */
+
+#define PMCC_DSI            0x80
+#define PMCC_D2_DIS         0x40
+#define PMCC_D1_DIS         0x20
+#define PMCC_D3C_EN         0x10
+#define PMCC_D3H_EN         0x08
+#define PMCC_D2_EN          0x04
+#define PMCC_D1_EN          0x02
+#define PMCC_D0_EN          0x01
+
+/*
+ *	Bits in STICKHW
+ */
+
+#define STICKHW_SWPTAG      0x10
+#define STICKHW_WOLSR       0x08
+#define STICKHW_WOLEN       0x04
+#define STICKHW_DS1         0x02	/* R/W by software/cfg cycle */
+#define STICKHW_DS0         0x01	/* suspend well DS write port */
+
+/*
+ *	Bits in the MIBCR register
+ */
+
+#define MIBCR_MIBISTOK      0x80
+#define MIBCR_MIBISTGO      0x40
+#define MIBCR_MIBINC        0x20
+#define MIBCR_MIBHI         0x10
+#define MIBCR_MIBFRZ        0x08
+#define MIBCR_MIBFLSH       0x04
+#define MIBCR_MPTRINI       0x02
+#define MIBCR_MIBCLR        0x01
+
+/*
+ *	Bits in the EERSV register
+ */
+
+#define EERSV_BOOT_RPL      ((u8) 0x01)	/* Boot method selection for VT6110 */
+
+#define EERSV_BOOT_MASK     ((u8) 0x06)
+#define EERSV_BOOT_INT19    ((u8) 0x00)
+#define EERSV_BOOT_INT18    ((u8) 0x02)
+#define EERSV_BOOT_LOCAL    ((u8) 0x04)
+#define EERSV_BOOT_BEV      ((u8) 0x06)
+
+
+/*
+ *	Bits in BPCMD
+ */
+
+#define BPCMD_BPDNE         0x80
+#define BPCMD_EBPWR         0x02
+#define BPCMD_EBPRD         0x01
+
+/*
+ *	Bits in the EECSR register
+ */
+
+#define EECSR_EMBP          0x40	/* eeprom embeded programming */
+#define EECSR_RELOAD        0x20	/* eeprom content reload */
+#define EECSR_DPM           0x10	/* eeprom direct programming */
+#define EECSR_ECS           0x08	/* eeprom CS pin */
+#define EECSR_ECK           0x04	/* eeprom CK pin */
+#define EECSR_EDI           0x02	/* eeprom DI pin */
+#define EECSR_EDO           0x01	/* eeprom DO pin */
+
+/*
+ *	Bits in the EMBCMD register
+ */
+
+#define EMBCMD_EDONE        0x80
+#define EMBCMD_EWDIS        0x08
+#define EMBCMD_EWEN         0x04
+#define EMBCMD_EWR          0x02
+#define EMBCMD_ERD          0x01
+
+/*
+ *	Bits in TESTCFG register
+ */
+
+#define TESTCFG_HBDIS       0x80
+
+/*
+ *	Bits in CHIPGCR register
+ */
+
+#define CHIPGCR_FCGMII      0x80
+#define CHIPGCR_FCFDX       0x40
+#define CHIPGCR_FCRESV      0x20
+#define CHIPGCR_FCMODE      0x10
+#define CHIPGCR_LPSOPT      0x08
+#define CHIPGCR_TM1US       0x04
+#define CHIPGCR_TM0US       0x02
+#define CHIPGCR_PHYINTEN    0x01
+
+/*
+ *	Bits in WOLCR0
+ */
+
+#define WOLCR_MSWOLEN7      0x0080	/* enable pattern match filtering */
+#define WOLCR_MSWOLEN6      0x0040
+#define WOLCR_MSWOLEN5      0x0020
+#define WOLCR_MSWOLEN4      0x0010
+#define WOLCR_MSWOLEN3      0x0008
+#define WOLCR_MSWOLEN2      0x0004
+#define WOLCR_MSWOLEN1      0x0002
+#define WOLCR_MSWOLEN0      0x0001
+#define WOLCR_ARP_EN        0x0001
+
+/*
+ *	Bits in WOLCR1
+ */
+
+#define WOLCR_LINKOFF_EN      0x0800	/* link off detected enable */
+#define WOLCR_LINKON_EN       0x0400	/* link on detected enable */
+#define WOLCR_MAGIC_EN        0x0200	/* magic packet filter enable */
+#define WOLCR_UNICAST_EN      0x0100	/* unicast filter enable */
+
+
+/*
+ *	Bits in PWCFG
+ */
+
+#define PWCFG_PHYPWOPT          0x80	/* internal MII I/F timing */
+#define PWCFG_PCISTICK          0x40	/* PCI sticky R/W enable */
+#define PWCFG_WOLTYPE           0x20	/* pulse(1) or button (0) */
+#define PWCFG_LEGCY_WOL         0x10
+#define PWCFG_PMCSR_PME_SR      0x08
+#define PWCFG_PMCSR_PME_EN      0x04	/* control by PCISTICK */
+#define PWCFG_LEGACY_WOLSR      0x02	/* Legacy WOL_SR shadow */
+#define PWCFG_LEGACY_WOLEN      0x01	/* Legacy WOL_EN shadow */
+
+/*
+ *	Bits in WOLCFG
+ */
+
+#define WOLCFG_PMEOVR           0x80	/* for legacy use, force PMEEN always */
+#define WOLCFG_SAM              0x20	/* accept multicast case reset, default=0 */
+#define WOLCFG_SAB              0x10	/* accept broadcast case reset, default=0 */
+#define WOLCFG_SMIIACC          0x08	/* ?? */
+#define WOLCFG_SGENWH           0x02
+#define WOLCFG_PHYINTEN         0x01	/* 0:PHYINT trigger enable, 1:use internal MII
+					   to report status change */
+/*
+ *	Bits in WOLSR1
+ */
+
+#define WOLSR_LINKOFF_INT      0x0800
+#define WOLSR_LINKON_INT       0x0400
+#define WOLSR_MAGIC_INT        0x0200
+#define WOLSR_UNICAST_INT      0x0100
+
+/*
+ *	Ethernet address filter type
+ */
+
+#define PKT_TYPE_NONE               0x0000	/* Turn off receiver */
+#define PKT_TYPE_DIRECTED           0x0001	/* obselete, directed address is always accepted */
+#define PKT_TYPE_MULTICAST          0x0002
+#define PKT_TYPE_ALL_MULTICAST      0x0004
+#define PKT_TYPE_BROADCAST          0x0008
+#define PKT_TYPE_PROMISCUOUS        0x0020
+#define PKT_TYPE_LONG               0x2000	/* NOTE.... the definition of LONG is >2048 bytes in our chip */
+#define PKT_TYPE_RUNT               0x4000
+#define PKT_TYPE_ERROR              0x8000	/* Accept error packets, e.g. CRC error */
+
+/*
+ *	Loopback mode
+ */
+
+#define MAC_LB_NONE         0x00
+#define MAC_LB_INTERNAL     0x01
+#define MAC_LB_EXTERNAL     0x02
+
+/*
+ *	Enabled mask value of irq
+ */
+
+#if defined(_SIM)
+#define IMR_MASK_VALUE      0x0033FF0FUL	/* initial value of IMR
+						   set IMR0 to 0x0F according to spec */
+
+#else
+#define IMR_MASK_VALUE      0x0013FB0FUL	/* initial value of IMR
+						   ignore MIBFI,RACEI to
+						   reduce intr. frequency
+						   NOTE.... do not enable NoBuf int mask at driver driver
+						   when (1) NoBuf -> RxThreshold = SF
+						   (2) OK    -> RxThreshold = original value
+						 */
+#endif
+
+/*
+ *	Revision id
+ */
+
+#define REV_ID_VT3119_A0	0x00
+#define REV_ID_VT3119_A1	0x01
+#define REV_ID_VT3216_A0	0x10
+
+/*
+ *	Max time out delay time
+ */
+
+#define W_MAX_TIMEOUT       0x0FFFU
+
+
+/*
+ *	MAC registers as a structure. Cannot be directly accessed this
+ *	way but generates offsets for readl/writel() calls
+ */
+
+struct mac_regs {
+	volatile u8 PAR[6];	/* 0x00 */
+	volatile u8 RCR;
+	volatile u8 TCR;
+
+	volatile u32 CR0Set;	/* 0x08 */
+	volatile u32 CR0Clr;	/* 0x0C */
+
+	volatile u8 MARCAM[8];	/* 0x10 */
+
+	volatile u32 DecBaseHi;	/* 0x18 */
+	volatile u16 DbfBaseHi;	/* 0x1C */
+	volatile u16 reserved_1E;
+
+	volatile u16 ISRCTL;	/* 0x20 */
+	volatile u8 TXESR;
+	volatile u8 RXESR;
+
+	volatile u32 ISR;	/* 0x24 */
+	volatile u32 IMR;
+
+	volatile u32 TDStatusPort;	/* 0x2C */
+
+	volatile u16 TDCSRSet;	/* 0x30 */
+	volatile u8 RDCSRSet;
+	volatile u8 reserved_33;
+	volatile u16 TDCSRClr;
+	volatile u8 RDCSRClr;
+	volatile u8 reserved_37;
+
+	volatile u32 RDBaseLo;	/* 0x38 */
+	volatile u16 RDIdx;	/* 0x3C */
+	volatile u16 reserved_3E;
+
+	volatile u32 TDBaseLo[4];	/* 0x40 */
+
+	volatile u16 RDCSize;	/* 0x50 */
+	volatile u16 TDCSize;	/* 0x52 */
+	volatile u16 TDIdx[4];	/* 0x54 */
+	volatile u16 tx_pause_timer;	/* 0x5C */
+	volatile u16 RBRDU;	/* 0x5E */
+
+	volatile u32 FIFOTest0;	/* 0x60 */
+	volatile u32 FIFOTest1;	/* 0x64 */
+
+	volatile u8 CAMADDR;	/* 0x68 */
+	volatile u8 CAMCR;	/* 0x69 */
+	volatile u8 GFTEST;	/* 0x6A */
+	volatile u8 FTSTCMD;	/* 0x6B */
+
+	volatile u8 MIICFG;	/* 0x6C */
+	volatile u8 MIISR;
+	volatile u8 PHYSR0;
+	volatile u8 PHYSR1;
+	volatile u8 MIICR;
+	volatile u8 MIIADR;
+	volatile u16 MIIDATA;
+
+	volatile u16 SoftTimer0;	/* 0x74 */
+	volatile u16 SoftTimer1;
+
+	volatile u8 CFGA;	/* 0x78 */
+	volatile u8 CFGB;
+	volatile u8 CFGC;
+	volatile u8 CFGD;
+
+	volatile u16 DCFG;	/* 0x7C */
+	volatile u16 MCFG;
+
+	volatile u8 TBIST;	/* 0x80 */
+	volatile u8 RBIST;
+	volatile u8 PMCPORT;
+	volatile u8 STICKHW;
+
+	volatile u8 MIBCR;	/* 0x84 */
+	volatile u8 reserved_85;
+	volatile u8 rev_id;
+	volatile u8 PORSTS;
+
+	volatile u32 MIBData;	/* 0x88 */
+
+	volatile u16 EEWrData;
+
+	volatile u8 reserved_8E;
+	volatile u8 BPMDWr;
+	volatile u8 BPCMD;
+	volatile u8 BPMDRd;
+
+	volatile u8 EECHKSUM;	/* 0x92 */
+	volatile u8 EECSR;
+
+	volatile u16 EERdData;	/* 0x94 */
+	volatile u8 EADDR;
+	volatile u8 EMBCMD;
+
+
+	volatile u8 JMPSR0;	/* 0x98 */
+	volatile u8 JMPSR1;
+	volatile u8 JMPSR2;
+	volatile u8 JMPSR3;
+	volatile u8 CHIPGSR;	/* 0x9C */
+	volatile u8 TESTCFG;
+	volatile u8 DEBUG;
+	volatile u8 CHIPGCR;
+
+	volatile u16 WOLCRSet;	/* 0xA0 */
+	volatile u8 PWCFGSet;
+	volatile u8 WOLCFGSet;
+
+	volatile u16 WOLCRClr;	/* 0xA4 */
+	volatile u8 PWCFGCLR;
+	volatile u8 WOLCFGClr;
+
+	volatile u16 WOLSRSet;	/* 0xA8 */
+	volatile u16 reserved_AA;
+
+	volatile u16 WOLSRClr;	/* 0xAC */
+	volatile u16 reserved_AE;
+
+	volatile u16 PatternCRC[8];	/* 0xB0 */
+	volatile u32 ByteMask[4][4];	/* 0xC0 */
+} __attribute__ ((__packed__));
+
+
+enum hw_mib {
+	HW_MIB_ifRxAllPkts = 0,
+	HW_MIB_ifRxOkPkts,
+	HW_MIB_ifTxOkPkts,
+	HW_MIB_ifRxErrorPkts,
+	HW_MIB_ifRxRuntOkPkt,
+	HW_MIB_ifRxRuntErrPkt,
+	HW_MIB_ifRx64Pkts,
+	HW_MIB_ifTx64Pkts,
+	HW_MIB_ifRx65To127Pkts,
+	HW_MIB_ifTx65To127Pkts,
+	HW_MIB_ifRx128To255Pkts,
+	HW_MIB_ifTx128To255Pkts,
+	HW_MIB_ifRx256To511Pkts,
+	HW_MIB_ifTx256To511Pkts,
+	HW_MIB_ifRx512To1023Pkts,
+	HW_MIB_ifTx512To1023Pkts,
+	HW_MIB_ifRx1024To1518Pkts,
+	HW_MIB_ifTx1024To1518Pkts,
+	HW_MIB_ifTxEtherCollisions,
+	HW_MIB_ifRxPktCRCE,
+	HW_MIB_ifRxJumboPkts,
+	HW_MIB_ifTxJumboPkts,
+	HW_MIB_ifRxMacControlFrames,
+	HW_MIB_ifTxMacControlFrames,
+	HW_MIB_ifRxPktFAE,
+	HW_MIB_ifRxLongOkPkt,
+	HW_MIB_ifRxLongPktErrPkt,
+	HW_MIB_ifTXSQEErrors,
+	HW_MIB_ifRxNobuf,
+	HW_MIB_ifRxSymbolErrors,
+	HW_MIB_ifInRangeLengthErrors,
+	HW_MIB_ifLateCollisions,
+	HW_MIB_SIZE
+};
+
+enum chip_type {
+	CHIP_TYPE_VT6110 = 1,
+};
+
+struct velocity_info_tbl {
+	enum chip_type chip_id;
+	char *name;
+	int io_size;
+	int txqueue;
+	u32 flags;
+};
+
+static struct velocity_info_tbl *info;
+
+#define mac_hw_mibs_init(regs) {\
+	BYTE_REG_BITS_ON(MIBCR_MIBFRZ,&((regs)->MIBCR));\
+	BYTE_REG_BITS_ON(MIBCR_MIBCLR,&((regs)->MIBCR));\
+	do {}\
+		while (BYTE_REG_BITS_IS_ON(MIBCR_MIBCLR,&((regs)->MIBCR)));\
+	BYTE_REG_BITS_OFF(MIBCR_MIBFRZ,&((regs)->MIBCR));\
+}
+
+#define mac_read_isr(regs)  		readl(&((regs)->ISR))
+#define mac_write_isr(regs, x)  	writel((x),&((regs)->ISR))
+#define mac_clear_isr(regs) 		writel(0xffffffffL,&((regs)->ISR))
+
+#define mac_write_int_mask(mask, regs) 	writel((mask),&((regs)->IMR));
+#define mac_disable_int(regs)       	writel(CR0_GINTMSK1,&((regs)->CR0Clr))
+#define mac_enable_int(regs)    	writel(CR0_GINTMSK1,&((regs)->CR0Set))
+
+#define mac_hw_mibs_read(regs, MIBs) {\
+	int i;\
+	BYTE_REG_BITS_ON(MIBCR_MPTRINI,&((regs)->MIBCR));\
+	for (i=0;i<HW_MIB_SIZE;i++) {\
+		(MIBs)[i]=readl(&((regs)->MIBData));\
+	}\
+}
+
+#define mac_set_dma_length(regs, n) {\
+	BYTE_REG_BITS_SET((n),0x07,&((regs)->DCFG));\
+}
+
+#define mac_set_rx_thresh(regs, n) {\
+	BYTE_REG_BITS_SET((n),(MCFG_RFT0|MCFG_RFT1),&((regs)->MCFG));\
+}
+
+#define mac_rx_queue_run(regs) {\
+	writeb(TRDCSR_RUN, &((regs)->RDCSRSet));\
+}
+
+#define mac_rx_queue_wake(regs) {\
+	writeb(TRDCSR_WAK, &((regs)->RDCSRSet));\
+}
+
+#define mac_tx_queue_run(regs, n) {\
+	writew(TRDCSR_RUN<<((n)*4),&((regs)->TDCSRSet));\
+}
+
+#define mac_tx_queue_wake(regs, n) {\
+	writew(TRDCSR_WAK<<(n*4),&((regs)->TDCSRSet));\
+}
+
+#define mac_eeprom_reload(regs) {\
+	int i=0;\
+	BYTE_REG_BITS_ON(EECSR_RELOAD,&((regs)->EECSR));\
+	do {\
+		udelay(10);\
+		if (i++>0x1000) {\
+			break;\
+		}\
+	}while (BYTE_REG_BITS_IS_ON(EECSR_RELOAD,&((regs)->EECSR)));\
+}
+
+enum velocity_cam_type {
+	VELOCITY_VLAN_ID_CAM = 0,
+	VELOCITY_MULTICAST_CAM
+};
+
+/**
+ *	mac_get_cam_mask	-	Read a CAM mask
+ *	@regs: register block for this velocity
+ *	@mask: buffer to store mask
+ *	@cam_type: CAM to fetch
+ *
+ *	Fetch the mask bits of the selected CAM and store them into the
+ *	provided mask buffer.
+ */
+
+static inline void mac_get_cam_mask(struct mac_regs *regs, u8 * mask,
+				    enum velocity_cam_type cam_type)
+{
+	int i;
+	/* Select CAM mask */
+	BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		writeb(CAMADDR_VCAMSL, &regs->CAMADDR);
+	else
+		writeb(0, &regs->CAMADDR);
+
+	/* read mask */
+	for (i = 0; i < 8; i++)
+		*mask++ = readb(&(regs->MARCAM[i]));
+
+	/* disable CAMEN */
+	writeb(0, &regs->CAMADDR);
+
+	/* Select mar */
+	BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+
+}
+
+/**
+ *	mac_set_cam_mask	-	Set a CAM mask
+ *	@regs: register block for this velocity
+ *	@mask: CAM mask to load
+ *	@cam_type: CAM to store
+ *
+ *	Store a new mask into a CAM
+ */
+
+static inline void mac_set_cam_mask(struct mac_regs *regs, u8 * mask,
+				    enum velocity_cam_type cam_type)
+{
+	int i;
+	/* Select CAM mask */
+	BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
+	else
+		writeb(CAMADDR_CAMEN, &regs->CAMADDR);
+
+	for (i = 0; i < 8; i++) {
+		writeb(*mask++, &(regs->MARCAM[i]));
+	}
+	/* disable CAMEN */
+	writeb(0, &regs->CAMADDR);
+
+	/* Select mar */
+	BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+}
+
+/**
+ *	mac_set_cam	-	set CAM data
+ *	@regs: register block of this velocity
+ *	@idx: Cam index
+ *	@addr: 2 or 6 bytes of CAM data
+ *	@cam_type: CAM to load
+ *
+ *	Load an address or vlan tag into a CAM
+ */
+
+static inline void mac_set_cam(struct mac_regs *regs, int idx, u8 * addr,
+			       enum velocity_cam_type cam_type)
+{
+	int i;
+
+	/* Select CAM mask */
+	BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+
+	idx &= (64 - 1);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx,
+		       &regs->CAMADDR);
+	else
+		writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		writew(*((u16 *) addr), &regs->MARCAM[0]);
+	else {
+		for (i = 0; i < 6; i++) {
+			writeb(*addr++, &(regs->MARCAM[i]));
+		}
+	}
+	BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
+
+	udelay(10);
+
+	writeb(0, &regs->CAMADDR);
+
+	/* Select mar */
+	BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+}
+
+/**
+ *	mac_get_cam	-	fetch CAM data
+ *	@regs: register block of this velocity
+ *	@idx: Cam index
+ *	@addr: buffer to hold up to 6 bytes of CAM data
+ *	@cam_type: CAM to load
+ *
+ *	Load an address or vlan tag from a CAM into the buffer provided by
+ *	the caller. VLAN tags are 2 bytes the address cam entries are 6.
+ */
+
+static inline void mac_get_cam(struct mac_regs *regs, int idx, u8 * addr,
+			       enum velocity_cam_type cam_type)
+{
+	int i;
+
+	/* Select CAM mask */
+	BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+
+	idx &= (64 - 1);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx,
+		       &regs->CAMADDR);
+	else
+		writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
+
+	BYTE_REG_BITS_ON(CAMCR_CAMRD, &regs->CAMCR);
+
+	udelay(10);
+
+	if (cam_type == VELOCITY_VLAN_ID_CAM)
+		*((u16 *) addr) = readw(&(regs->MARCAM[0]));
+	else
+		for (i = 0; i < 6; i++, addr++)
+			*((u8 *) addr) = readb(&(regs->MARCAM[i]));
+
+	writeb(0, &regs->CAMADDR);
+
+	/* Select mar */
+	BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0,
+			  &regs->CAMCR);
+}
+
+/**
+ *	mac_wol_reset	-	reset WOL after exiting low power
+ *	@regs: register block of this velocity
+ *
+ *	Called after we drop out of wake on lan mode in order to
+ *	reset the Wake on lan features. This function doesn't restore
+ *	the rest of the logic from the result of sleep/wakeup
+ */
+
+inline static void mac_wol_reset(struct mac_regs *regs)
+{
+
+	/* Turn off SWPTAG right after leaving power mode */
+	BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
+	/* clear sticky bits */
+	BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
+
+	BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
+	BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
+	/* disable force PME-enable */
+	writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
+	/* disable power-event config bit */
+	writew(0xFFFF, &regs->WOLCRClr);
+	/* clear power status */
+	writew(0xFFFF, &regs->WOLSRClr);
+}
+
+
+/*
+ * Header for WOL definitions. Used to compute hashes
+ */
+
+typedef u8 MCAM_ADDR[ETH_ALEN];
+
+struct arp_packet {
+	u8 dest_mac[ETH_ALEN];
+	u8 src_mac[ETH_ALEN];
+	u16 type;
+	u16 ar_hrd;
+	u16 ar_pro;
+	u8 ar_hln;
+	u8 ar_pln;
+	u16 ar_op;
+	u8 ar_sha[ETH_ALEN];
+	u8 ar_sip[4];
+	u8 ar_tha[ETH_ALEN];
+	u8 ar_tip[4];
+} __attribute__ ((__packed__));
+
+struct _magic_packet {
+	u8 dest_mac[6];
+	u8 src_mac[6];
+	u16 type;
+	u8 MAC[16][6];
+	u8 password[6];
+} __attribute__ ((__packed__));
+
+/*
+ *	Store for chip context when saving and restoring status. Not
+ *	all fields are saved/restored currently.
+ */
+
+struct velocity_context {
+	u8 mac_reg[256];
+	MCAM_ADDR cam_addr[MCAM_SIZE];
+	u16 vcam[VCAM_SIZE];
+	u32 cammask[2];
+	u32 patcrc[2];
+	u32 pattern[8];
+};
+
+
+/*
+ *	MII registers.
+ */
+
+
+/*
+ *	Registers in the MII (offset unit is WORD)
+ */
+
+#define MII_REG_BMCR        0x00	// physical address
+#define MII_REG_BMSR        0x01	//
+#define MII_REG_PHYID1      0x02	// OUI
+#define MII_REG_PHYID2      0x03	// OUI + Module ID + REV ID
+#define MII_REG_ANAR        0x04	//
+#define MII_REG_ANLPAR      0x05	//
+#define MII_REG_G1000CR     0x09	//
+#define MII_REG_G1000SR     0x0A	//
+#define MII_REG_MODCFG      0x10	//
+#define MII_REG_TCSR        0x16	//
+#define MII_REG_PLED        0x1B	//
+// NS, MYSON only
+#define MII_REG_PCR         0x17	//
+// ESI only
+#define MII_REG_PCSR        0x17	//
+#define MII_REG_AUXCR       0x1C	//
+
+// Marvell 88E1000/88E1000S
+#define MII_REG_PSCR        0x10	// PHY specific control register
+
+//
+// Bits in the BMCR register
+//
+#define BMCR_RESET          0x8000	//
+#define BMCR_LBK            0x4000	//
+#define BMCR_SPEED100       0x2000	//
+#define BMCR_AUTO           0x1000	//
+#define BMCR_PD             0x0800	//
+#define BMCR_ISO            0x0400	//
+#define BMCR_REAUTO         0x0200	//
+#define BMCR_FDX            0x0100	//
+#define BMCR_SPEED1G        0x0040	//
+//
+// Bits in the BMSR register
+//
+#define BMSR_AUTOCM         0x0020	//
+#define BMSR_LNK            0x0004	//
+
+//
+// Bits in the ANAR register
+//
+#define ANAR_ASMDIR         0x0800	// Asymmetric PAUSE support
+#define ANAR_PAUSE          0x0400	// Symmetric PAUSE Support
+#define ANAR_T4             0x0200	//
+#define ANAR_TXFD           0x0100	//
+#define ANAR_TX             0x0080	//
+#define ANAR_10FD           0x0040	//
+#define ANAR_10             0x0020	//
+//
+// Bits in the ANLPAR register
+//
+#define ANLPAR_ASMDIR       0x0800	// Asymmetric PAUSE support
+#define ANLPAR_PAUSE        0x0400	// Symmetric PAUSE Support
+#define ANLPAR_T4           0x0200	//
+#define ANLPAR_TXFD         0x0100	//
+#define ANLPAR_TX           0x0080	//
+#define ANLPAR_10FD         0x0040	//
+#define ANLPAR_10           0x0020	//
+
+//
+// Bits in the G1000CR register
+//
+#define G1000CR_1000FD      0x0200	// PHY is 1000-T Full-duplex capable
+#define G1000CR_1000        0x0100	// PHY is 1000-T Half-duplex capable
+
+//
+// Bits in the G1000SR register
+//
+#define G1000SR_1000FD      0x0800	// LP PHY is 1000-T Full-duplex capable
+#define G1000SR_1000        0x0400	// LP PHY is 1000-T Half-duplex capable
+
+#define TCSR_ECHODIS        0x2000	//
+#define AUXCR_MDPPS         0x0004	//
+
+// Bits in the PLED register
+#define PLED_LALBE			0x0004	//
+
+// Marvell 88E1000/88E1000S Bits in the PHY specific control register (10h)
+#define PSCR_ACRSTX         0x0800	// Assert CRS on Transmit
+
+#define PHYID_CICADA_CS8201 0x000FC410UL
+#define PHYID_VT3216_32BIT  0x000FC610UL
+#define PHYID_VT3216_64BIT  0x000FC600UL
+#define PHYID_MARVELL_1000  0x01410C50UL
+#define PHYID_MARVELL_1000S 0x01410C40UL
+
+#define PHYID_REV_ID_MASK   0x0000000FUL
+
+#define PHYID_GET_PHY_REV_ID(i)     ((i) & PHYID_REV_ID_MASK)
+#define PHYID_GET_PHY_ID(i)         ((i) & ~PHYID_REV_ID_MASK)
+
+#define MII_REG_BITS_ON(x,i,p) do {\
+    u16 w;\
+    velocity_mii_read((p),(i),&(w));\
+    (w)|=(x);\
+    velocity_mii_write((p),(i),(w));\
+} while (0)
+
+#define MII_REG_BITS_OFF(x,i,p) do {\
+    u16 w;\
+    velocity_mii_read((p),(i),&(w));\
+    (w)&=(~(x));\
+    velocity_mii_write((p),(i),(w));\
+} while (0)
+
+#define MII_REG_BITS_IS_ON(x,i,p) ({\
+    u16 w;\
+    velocity_mii_read((p),(i),&(w));\
+    ((int) ((w) & (x)));})
+
+#define MII_GET_PHY_ID(p) ({\
+    u32 id;  \
+    u16 id2; \
+    u16 id1; \
+    velocity_mii_read((p),MII_REG_PHYID2, &id2);\
+    velocity_mii_read((p),MII_REG_PHYID1, &id1);\
+    id = ( ( (u32)id2 ) << 16 ) | id1;		\
+    (id);})
+
+#ifdef LINUX
+/*
+ * Inline debug routine
+ */
+
+
+enum velocity_msg_level {
+	MSG_LEVEL_ERR = 0,	//Errors that will cause abnormal operation.
+	MSG_LEVEL_NOTICE = 1,	//Some errors need users to be notified.
+	MSG_LEVEL_INFO = 2,	//Normal message.
+	MSG_LEVEL_VERBOSE = 3,	//Will report all trival errors.
+	MSG_LEVEL_DEBUG = 4	//Only for debug purpose.
+};
+
+#ifdef VELOCITY_DEBUG
+#define ASSERT(x) { \
+	if (!(x)) { \
+		printk(KERN_ERR "assertion %s failed: file %s line %d\n", #x,\
+			__FUNCTION__, __LINE__);\
+		BUG(); \
+	}\
+}
+#define VELOCITY_DBG(p,args...) printk(p, ##args)
+#else
+#define ASSERT(x)
+#define VELOCITY_DBG(x)
+#endif
+
+#define VELOCITY_PRT(l, p, args...) do {if (l<=msglevel) printf( p ,##args);} while (0)
+
+#define VELOCITY_PRT_CAMMASK(p,t) {\
+	int i;\
+	if ((t)==VELOCITY_MULTICAST_CAM) {\
+        	for (i=0;i<(MCAM_SIZE/8);i++)\
+			printk("%02X",(p)->mCAMmask[i]);\
+	}\
+	else {\
+		for (i=0;i<(VCAM_SIZE/8);i++)\
+			printk("%02X",(p)->vCAMmask[i]);\
+	}\
+	printk("\n");\
+}
+
+#endif
+
+#define     VELOCITY_WOL_MAGIC             0x00000000UL
+#define     VELOCITY_WOL_PHY               0x00000001UL
+#define     VELOCITY_WOL_ARP               0x00000002UL
+#define     VELOCITY_WOL_UCAST             0x00000004UL
+#define     VELOCITY_WOL_BCAST             0x00000010UL
+#define     VELOCITY_WOL_MCAST             0x00000020UL
+#define     VELOCITY_WOL_MAGIC_SEC         0x00000040UL
+
+/*
+ *	Flags for options
+ */
+
+#define     VELOCITY_FLAGS_TAGGING         0x00000001UL
+#define     VELOCITY_FLAGS_TX_CSUM         0x00000002UL
+#define     VELOCITY_FLAGS_RX_CSUM         0x00000004UL
+#define     VELOCITY_FLAGS_IP_ALIGN        0x00000008UL
+#define     VELOCITY_FLAGS_VAL_PKT_LEN     0x00000010UL
+
+#define     VELOCITY_FLAGS_FLOW_CTRL       0x01000000UL
+
+/*
+ *	Flags for driver status
+ */
+
+#define     VELOCITY_FLAGS_OPENED          0x00010000UL
+#define     VELOCITY_FLAGS_VMNS_CONNECTED  0x00020000UL
+#define     VELOCITY_FLAGS_VMNS_COMMITTED  0x00040000UL
+#define     VELOCITY_FLAGS_WOL_ENABLED     0x00080000UL
+
+/*
+ *	Flags for MII status
+ */
+
+#define     VELOCITY_LINK_FAIL             0x00000001UL
+#define     VELOCITY_SPEED_10              0x00000002UL
+#define     VELOCITY_SPEED_100             0x00000004UL
+#define     VELOCITY_SPEED_1000            0x00000008UL
+#define     VELOCITY_DUPLEX_FULL           0x00000010UL
+#define     VELOCITY_AUTONEG_ENABLE        0x00000020UL
+#define     VELOCITY_FORCED_BY_EEPROM      0x00000040UL
+
+/*
+ *	For velocity_set_media_duplex
+ */
+
+#define     VELOCITY_LINK_CHANGE           0x00000001UL
+
+enum speed_opt {
+	SPD_DPX_AUTO = 0,
+	SPD_DPX_100_HALF = 1,
+	SPD_DPX_100_FULL = 2,
+	SPD_DPX_10_HALF = 3,
+	SPD_DPX_10_FULL = 4
+};
+
+enum velocity_init_type {
+	VELOCITY_INIT_COLD = 0,
+	VELOCITY_INIT_RESET,
+	VELOCITY_INIT_WOL
+};
+
+enum velocity_flow_cntl_type {
+	FLOW_CNTL_DEFAULT = 1,
+	FLOW_CNTL_TX,
+	FLOW_CNTL_RX,
+	FLOW_CNTL_TX_RX,
+	FLOW_CNTL_DISABLE,
+};
+
+struct velocity_opt {
+	int numrx;		/* Number of RX descriptors */
+	int numtx;		/* Number of TX descriptors */
+	enum speed_opt spd_dpx;	/* Media link mode */
+	int vid;		/* vlan id */
+	int DMA_length;		/* DMA length */
+	int rx_thresh;		/* RX_THRESH */
+	int flow_cntl;
+	int wol_opts;		/* Wake on lan options */
+	int td_int_count;
+	int int_works;
+	int rx_bandwidth_hi;
+	int rx_bandwidth_lo;
+	int rx_bandwidth_en;
+	u32 flags;
+};
+
+#define RX_DESC_MIN     4
+#define RX_DESC_MAX     255
+#define RX_DESC_DEF     RX_DESC_MIN
+
+#define TX_DESC_MIN     1
+#define TX_DESC_MAX     256
+#define TX_DESC_DEF     TX_DESC_MIN
+
+static struct velocity_info {
+//      struct list_head list;
+
+	struct pci_device *pdev;
+//      struct net_device *dev;
+//      struct net_device_stats stats;
+
+#ifdef CONFIG_PM
+	u32 pci_state[16];
+#endif
+
+//      dma_addr_t rd_pool_dma;
+//      dma_addr_t td_pool_dma[TX_QUEUE_NO];
+
+//      dma_addr_t tx_bufs_dma;
+	u8 *tx_bufs;
+
+	u8 ip_addr[4];
+	enum chip_type chip_id;
+
+	struct mac_regs *mac_regs;
+	unsigned long memaddr;
+	unsigned long ioaddr;
+	u32 io_size;
+
+	u8 rev_id;
+
+#define AVAIL_TD(p,q)   ((p)->options.numtx-((p)->td_used[(q)]))
+
+	int num_txq;
+
+	volatile int td_used[TX_QUEUE_NO];
+	int td_curr;
+	int td_tail[TX_QUEUE_NO];
+	unsigned char *TxDescArrays;	/* Index of Tx Descriptor buffer */
+	unsigned char *RxDescArrays;	/* Index of Rx Descriptor buffer */
+	unsigned char *tx_buffs;
+	unsigned char *rx_buffs;
+
+	unsigned char *txb;
+	unsigned char *rxb;
+	struct tx_desc *td_rings;
+	struct velocity_td_info *td_infos[TX_QUEUE_NO];
+
+	int rd_curr;
+	int rd_dirty;
+	u32 rd_filled;
+	struct rx_desc *rd_ring;
+	struct velocity_rd_info *rd_info;	/* It's an array */
+
+#define GET_RD_BY_IDX(vptr, idx)   (vptr->rd_ring[idx])
+	u32 mib_counter[MAX_HW_MIB_COUNTER];
+	struct velocity_opt options;
+
+	u32 int_mask;
+
+	u32 flags;
+
+	int rx_buf_sz;
+	u32 mii_status;
+	u32 phy_id;
+	int multicast_limit;
+
+	u8 vCAMmask[(VCAM_SIZE / 8)];
+	u8 mCAMmask[(MCAM_SIZE / 8)];
+
+//      spinlock_t lock;
+
+	int wol_opts;
+	u8 wol_passwd[6];
+
+	struct velocity_context context;
+
+	u32 ticks;
+	u32 rx_bytes;
+
+} vptx;
+
+static struct velocity_info *vptr;
+
+#ifdef LINUX
+/**
+ *	velocity_get_ip		-	find an IP address for the device
+ *	@vptr: Velocity to query
+ *
+ *	Dig out an IP address for this interface so that we can
+ *	configure wakeup with WOL for ARP. If there are multiple IP
+ *	addresses on this chain then we use the first - multi-IP WOL is not
+ *	supported.
+ *
+ *	CHECK ME: locking
+ */
+
+inline static int velocity_get_ip(struct velocity_info *vptr)
+{
+	struct in_device *in_dev = (struct in_device *) vptr->dev->ip_ptr;
+	struct in_ifaddr *ifa;
+
+	if (in_dev != NULL) {
+		ifa = (struct in_ifaddr *) in_dev->ifa_list;
+		if (ifa != NULL) {
+			memcpy(vptr->ip_addr, &ifa->ifa_address, 4);
+			return 0;
+		}
+	}
+	return -ENOENT;
+}
+
+/**
+ *	velocity_update_hw_mibs	-	fetch MIB counters from chip
+ *	@vptr: velocity to update
+ *
+ *	The velocity hardware keeps certain counters in the hardware
+ * 	side. We need to read these when the user asks for statistics
+ *	or when they overflow (causing an interrupt). The read of the
+ *	statistic clears it, so we keep running master counters in user
+ *	space.
+ */
+
+static inline void velocity_update_hw_mibs(struct velocity_info *vptr)
+{
+	u32 tmp;
+	int i;
+	BYTE_REG_BITS_ON(MIBCR_MIBFLSH, &(vptr->mac_regs->MIBCR));
+
+	while (BYTE_REG_BITS_IS_ON
+	       (MIBCR_MIBFLSH, &(vptr->mac_regs->MIBCR)));
+
+	BYTE_REG_BITS_ON(MIBCR_MPTRINI, &(vptr->mac_regs->MIBCR));
+	for (i = 0; i < HW_MIB_SIZE; i++) {
+		tmp = readl(&(vptr->mac_regs->MIBData)) & 0x00FFFFFFUL;
+		vptr->mib_counter[i] += tmp;
+	}
+}
+#endif
+/**
+ *	init_flow_control_register 	-	set up flow control
+ *	@vptr: velocity to configure
+ *
+ *	Configure the flow control registers for this velocity device.
+ */
+
+static inline void init_flow_control_register(struct velocity_info *vptr)
+{
+	struct mac_regs *regs = vptr->mac_regs;
+
+	/* Set {XHITH1, XHITH0, XLTH1, XLTH0} in FlowCR1 to {1, 0, 1, 1}
+	   depend on RD=64, and Turn on XNOEN in FlowCR1 */
+	writel((CR0_XONEN | CR0_XHITH1 | CR0_XLTH1 | CR0_XLTH0),
+	       &regs->CR0Set);
+	writel((CR0_FDXTFCEN | CR0_FDXRFCEN | CR0_HDXFCEN | CR0_XHITH0),
+	       &regs->CR0Clr);
+
+	/* Set TxPauseTimer to 0xFFFF */
+	writew(0xFFFF, &regs->tx_pause_timer);
+
+	/* Initialize RBRDU to Rx buffer count. */
+	writew(vptr->options.numrx, &regs->RBRDU);
+}
+
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/virtio-net.c ipxe-1.0.1~lliurex1505/src/drivers/net/virtio-net.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/virtio-net.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/virtio-net.c	2012-01-06 23:49:04.000000000 +0000
@@ -69,7 +69,7 @@
  * Linux source.
  */
 
-/* Virtqueue indices */
+/* Virtqueue indicies */
 enum {
 	RX_INDEX = 0,
 	TX_INDEX,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vmxnet3.c ipxe-1.0.1~lliurex1505/src/drivers/net/vmxnet3.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vmxnet3.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/vmxnet3.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vmxnet3.h ipxe-1.0.1~lliurex1505/src/drivers/net/vmxnet3.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vmxnet3.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/vmxnet3.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vxge/vxge_main.c ipxe-1.0.1~lliurex1505/src/drivers/net/vxge/vxge_main.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/vxge/vxge_main.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/vxge/vxge_main.c	2012-01-06 23:49:04.000000000 +0000
@@ -252,7 +252,7 @@
 /*
  * vxge_irq - enable or Disable interrupts
  *
- * @netdev   netdevice structure reference
+ * @netdev   netdevice sturcture reference
  * @action   requested interrupt action
  */
 static void vxge_irq(struct net_device *netdev __unused, int action)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/w89c840.c ipxe-1.0.1~lliurex1505/src/drivers/net/w89c840.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/w89c840.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/w89c840.c	2012-01-06 23:49:04.000000000 +0000
@@ -26,8 +26,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/wlan_compat.h ipxe-1.0.1~lliurex1505/src/drivers/net/wlan_compat.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/net/wlan_compat.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/net/wlan_compat.h	2012-01-06 23:49:04.000000000 +0000
@@ -39,7 +39,7 @@
 *
 * --------------------------------------------------------------------
 *
-* Portions of the development of this software were funded by
+* Portions of the development of this software were funded by 
 * Intersil Corporation as part of PRISM(R) chipset product development.
 *
 * --------------------------------------------------------------------
@@ -109,7 +109,7 @@
 /* Lets try to figure out what we've got.  Kernel mode or User mode? */
 #if defined(__KERNEL__)
 	#define WLAN_OS				WLAN_LINUX_KERNEL
-#else
+#else 
 	#define WLAN_OS				WLAN_LINUX_USER
 #endif
 
@@ -179,8 +179,8 @@
           Linux/PPC on PowerMacs (PCI)
 	  Arm/Intel Xscale (PCI)
 
-   This may also affect PLX boards and other BE &| PPC platforms;
-   as new ones are discovered, add them below.
+   This may also affect PLX boards and other BE &| PPC platforms; 
+   as new ones are discovered, add them below. 
 */
 
 #if (WLAN_HOSTIF == WLAN_PCI)
@@ -226,6 +226,28 @@
 #define BIT30	0x40000000
 #define BIT31	0x80000000
 
+typedef unsigned char   UINT8;
+typedef unsigned short  UINT16;
+typedef unsigned long   UINT32;
+
+typedef signed char     INT8;
+typedef signed short    INT16;
+typedef signed long     INT32;
+
+typedef unsigned int    UINT;
+typedef signed int      INT;
+
+typedef unsigned long long	UINT64;
+typedef signed long long	INT64;
+
+#define UINT8_MAX	(0xffUL)
+#define UINT16_MAX	(0xffffUL)
+#define UINT32_MAX	(0xffffffffUL)
+
+#define INT8_MAX	(0x7fL)
+#define INT16_MAX	(0x7fffL)
+#define INT32_MAX	(0x7fffffffL)
+
 /*=============================================================*/
 /*------ Compiler Portability Macros --------------------------*/
 /*=============================================================*/
@@ -276,7 +298,7 @@
 			int __i__; \
 			printk(KERN_DEBUG x ":"); \
 			for( __i__=0; __i__ < (n); __i__++) \
-				printk( " %02x", ((uint8_t*)(p))[__i__]); \
+				printk( " %02x", ((UINT8*)(p))[__i__]); \
 			printk("\n"); }
 
 		#define DBFENTER { if ( WLAN_DBVAR >= 4 ){ WLAN_LOG_DEBUG0(3,"Enter\n"); } }
@@ -290,11 +312,11 @@
 		#define WLAN_LOG_DEBUG5(l,x,n1,n2,n3,n4,n5) if ( WLAN_DBVAR >= (l)) printk(KERN_DEBUG "%s: " x , __FUNCTION__ , (n1), (n2), (n3), (n4), (n5));
 		#define WLAN_LOG_DEBUG6(l,x,n1,n2,n3,n4,n5,n6) if ( WLAN_DBVAR >= (l)) printk(KERN_DEBUG "%s: " x , __FUNCTION__ , (n1), (n2), (n3), (n4), (n5), (n6));
 	#else
-		#define WLAN_ASSERT(c)
+		#define WLAN_ASSERT(c) 
 		#define WLAN_HEX_DUMP( l, s, p, n)
 
-		#define DBFENTER
-		#define DBFEXIT
+		#define DBFENTER 
+		#define DBFEXIT 
 
 		#define WLAN_LOG_DEBUG0(l, s)
 		#define WLAN_LOG_DEBUG1(l, s,n)
@@ -322,11 +344,11 @@
 	#define WLAN_LOG_NOTICE3(s,n1,n2,n3)
 	#define WLAN_LOG_NOTICE4(s,n1,n2,n3,n4)
 
-		#define WLAN_ASSERT(c)
+		#define WLAN_ASSERT(c) 
 		#define WLAN_HEX_DUMP( l, s, p, n)
 
-		#define DBFENTER
-		#define DBFEXIT
+		#define DBFENTER 
+		#define DBFEXIT 
 
 		#define WLAN_LOG_INFO0(s)
 		#define WLAN_LOG_INFO1(s,n)
@@ -356,7 +378,7 @@
 
 #ifdef CONFIG_SMP
 #define __SMP__			1
-#endif
+#endif	
 
 #ifndef KERNEL_VERSION
 #define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/nvs.c ipxe-1.0.1~lliurex1505/src/drivers/nvs/nvs.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/nvs.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/nvs/nvs.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/nvsvpd.c ipxe-1.0.1~lliurex1505/src/drivers/nvs/nvsvpd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/nvsvpd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/nvs/nvsvpd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/spi.c ipxe-1.0.1~lliurex1505/src/drivers/nvs/spi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/spi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/nvs/spi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/threewire.c ipxe-1.0.1~lliurex1505/src/drivers/nvs/threewire.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/drivers/nvs/threewire.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/drivers/nvs/threewire.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/autoboot_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/autoboot_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/autoboot_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/autoboot_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stdio.h>
@@ -33,29 +32,10 @@
  *
  */
 
-/** "autoboot" options */
-struct autoboot_options {};
-
-/** "autoboot" option list */
-static struct option_descriptor autoboot_opts[] = {};
-
-/**
- * "autoboot" payload
- *
- * @v netdev		Network device
- * @v opts		Command options
- * @ret rc		Return status code
- */
-static int autoboot_payload ( struct net_device *netdev,
-			      struct autoboot_options *opts __unused ) {
-	return netboot ( netdev );
-}
-
 /** "autoboot" command descriptor */
-static struct ifcommon_command_descriptor autoboot_cmd =
-	IFCOMMON_COMMAND_DESC ( struct autoboot_options, autoboot_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				autoboot_payload, 0 );
+static struct command_descriptor autoboot_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "autoboot" command
@@ -65,7 +45,7 @@
  * @ret rc		Return status code
  */
 static int autoboot_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &autoboot_cmd );
+	return ifcommon_exec ( argc, argv, &autoboot_cmd, netboot, 0 );
 }
 
 /** Booting commands */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/config_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/config_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/config_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/config_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <string.h>
@@ -45,6 +44,28 @@
 	COMMAND_DESC ( struct config_options, config_opts, 0, 1, "[<scope>]" );
 
 /**
+ * Parse settings scope name
+ *
+ * @v text		Text
+ * @ret value		Integer value
+ * @ret rc		Return status code
+ */
+static int parse_settings ( const char *text, struct settings **value ) {
+
+	/* Sanity check */
+	assert ( text != NULL );
+
+	/* Parse scope name */
+	*value = find_settings ( text );
+	if ( ! *value ) {
+		printf ( "\"%s\": no such scope\n", text );
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+/**
  * "config" command
  *
  * @v argc		Argument count
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/dhcp_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/dhcp_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/dhcp_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/dhcp_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -41,6 +40,44 @@
  *
  */
 
+/** "dhcp" command descriptor */
+static struct command_descriptor dhcp_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
+
+/**
+ * Execute "dhcp" command for a network device
+ *
+ * @v netdev		Network device
+ * @ret rc		Return status code
+ */
+static int dhcp_payload ( struct net_device *netdev ) {
+	int rc;
+
+	if ( ( rc = dhcp ( netdev ) ) != 0 ) {
+		printf ( "Could not configure %s: %s\n",
+			 netdev->name, strerror ( rc ) );
+
+		/* Close device on failure, to avoid memory exhaustion */
+		netdev_close ( netdev );
+
+		return rc;
+	}
+
+	return 0;
+}
+
+/**
+ * The "dhcp" command
+ *
+ * @v argc		Argument count
+ * @v argv		Argument list
+ * @ret rc		Return status code
+ */
+static int dhcp_exec ( int argc, char **argv ) {
+	return ifcommon_exec ( argc, argv, &dhcp_cmd, dhcp_payload, 1 );
+}
+
 /** "pxebs" options */
 struct pxebs_options {};
 
@@ -91,7 +128,7 @@
 struct command dhcp_commands[] __command = {
 	{
 		.name = "dhcp",
-		.exec = ifconf_exec, /* synonym for "ifconf" */
+		.exec = dhcp_exec,
 	},
 	{
 		.name = "pxebs",
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/digest_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/digest_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/digest_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/digest_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -29,7 +28,6 @@
 #include <ipxe/crypto.h>
 #include <ipxe/md5.h>
 #include <ipxe/sha1.h>
-#include <usr/imgmgmt.h>
 
 /** @file
  *
@@ -76,8 +74,8 @@
 
 	for ( i = optind ; i < argc ; i++ ) {
 
-		/* Acquire image */
-		if ( ( rc = imgacquire ( argv[i], &image ) ) != 0 )
+		/* find image */
+		if ( ( rc = parse_image ( argv[i], &image ) ) != 0 )
 			continue;
 		offset = 0;
 		len = image->len;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/fcmgmt_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/fcmgmt_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/fcmgmt_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/fcmgmt_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -43,7 +42,7 @@
  * @ret port		Fibre Channel port
  * @ret rc		Return status code
  */
-static int parse_fc_port ( char *text, struct fc_port **port ) {
+static int parse_fc_port ( const char *text, struct fc_port **port ) {
 
 	/* Sanity check */
 	assert ( text != NULL );
@@ -65,7 +64,7 @@
  * @ret port_id		Fibre Channel port ID
  * @ret rc		Return status code
  */
-static int parse_fc_port_id ( char *text, struct fc_port_id *port_id ) {
+static int parse_fc_port_id ( const char *text, struct fc_port_id *port_id ) {
 	int rc;
 
 	/* Sanity check */
@@ -87,7 +86,8 @@
  * @ret handler		Fibre Channel ELS handler
  * @ret rc		Return status code
  */
-static int parse_fc_els_handler ( char *text, struct fc_els_handler **handler ){
+static int parse_fc_els_handler ( const char *text,
+				  struct fc_els_handler **handler ) {
 
 	for_each_table_entry ( (*handler), FC_ELS_HANDLERS ) {
 		if ( strcasecmp ( (*handler)->name, text ) == 0 )
@@ -106,7 +106,7 @@
 
 /** "fcstat" command descriptor */
 static struct command_descriptor fcstat_cmd =
-	COMMAND_DESC ( struct fcstat_options, fcstat_opts, 0, 0, NULL );
+	COMMAND_DESC ( struct fcstat_options, fcstat_opts, 0, 0, "" );
 
 /**
  * The "fcstat" command
@@ -151,7 +151,8 @@
 
 /** "fcels" command descriptor */
 static struct command_descriptor fcels_cmd =
-	COMMAND_DESC ( struct fcels_options, fcels_opts, 1, 1, "<request>" );
+	COMMAND_DESC ( struct fcels_options, fcels_opts, 1, 1,
+		       "[--port <port>] [--id <peer port id>] <request>" );
 
 /**
  * The "fcels" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/gdbstub_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/gdbstub_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/gdbstub_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/gdbstub_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/ifmgmt_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/ifmgmt_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/ifmgmt_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/ifmgmt_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -34,6 +33,9 @@
  *
  */
 
+/** "if<xxx>" command options */
+struct option_descriptor ifcommon_opts[0];
+
 /**
  * Execute if<xxx> command
  *
@@ -45,24 +47,26 @@
  * @ret rc		Return status code
  */
 int ifcommon_exec ( int argc, char **argv,
-		    struct ifcommon_command_descriptor *ifcmd ) {
-	struct command_descriptor *cmd = &ifcmd->cmd;
-	uint8_t opts[cmd->len];
+		    struct command_descriptor *cmd,
+		    int ( * payload ) ( struct net_device * ),
+		    int stop_on_first_success ) {
+	struct ifcommon_options opts;
 	struct net_device *netdev;
-	int i;
 	int rc;
 
 	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, cmd, opts ) ) != 0 )
+	if ( ( rc = parse_options ( argc, argv, cmd, &opts ) ) != 0 )
 		return rc;
 
 	if ( optind != argc ) {
 		/* Treat arguments as a list of interfaces to try */
-		for ( i = optind ; i < argc ; i++ ) {
-			if ( ( rc = parse_netdev ( argv[i], &netdev ) ) != 0 )
+		while ( optind != argc ) {
+			if ( ( rc = parse_netdev ( argv[optind++],
+						   &netdev ) ) != 0 ) {
 				continue;
-			if ( ( ( rc = ifcmd->payload ( netdev, opts ) ) == 0 )
-			     && ifcmd->stop_on_first_success ) {
+			}
+			if ( ( ( rc = payload ( netdev ) ) == 0 ) &&
+			     stop_on_first_success ) {
 				return 0;
 			}
 		}
@@ -70,8 +74,8 @@
 		/* Try all interfaces */
 		rc = -ENODEV;
 		for_each_netdev ( netdev ) {
-			if ( ( ( rc = ifcmd->payload ( netdev, opts ) ) == 0 )
-			     && ifcmd->stop_on_first_success ) {
+			if ( ( ( rc = payload ( netdev ) ) == 0 ) &&
+			     stop_on_first_success ) {
 				return 0;
 			}
 		}
@@ -80,30 +84,21 @@
 	return rc;
 }
 
-/** "ifopen" options */
-struct ifopen_options {};
-
-/** "ifopen" option list */
-static struct option_descriptor ifopen_opts[] = {};
+/** "ifopen" command descriptor */
+static struct command_descriptor ifopen_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "ifopen" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int ifopen_payload ( struct net_device *netdev,
-			    struct ifopen_options *opts __unused ) {
+static int ifopen_payload ( struct net_device *netdev ) {
 	return ifopen ( netdev );
 }
 
-/** "ifopen" command descriptor */
-static struct ifcommon_command_descriptor ifopen_cmd =
-	IFCOMMON_COMMAND_DESC ( struct ifopen_options, ifopen_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				ifopen_payload, 0 );
-
 /**
  * The "ifopen" command
  *
@@ -112,34 +107,25 @@
  * @ret rc		Return status code
  */
 static int ifopen_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &ifopen_cmd );
+	return ifcommon_exec ( argc, argv, &ifopen_cmd, ifopen_payload, 0 );
 }
 
-/** "ifclose" options */
-struct ifclose_options {};
-
-/** "ifclose" option list */
-static struct option_descriptor ifclose_opts[] = {};
+/** "ifclose" command descriptor */
+static struct command_descriptor ifclose_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "ifclose" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int ifclose_payload ( struct net_device *netdev,
-			     struct ifclose_options *opts __unused ) {
+static int ifclose_payload ( struct net_device *netdev ) {
 	ifclose ( netdev );
 	return 0;
 }
 
-/** "ifclose" command descriptor */
-static struct ifcommon_command_descriptor ifclose_cmd =
-	IFCOMMON_COMMAND_DESC ( struct ifclose_options, ifclose_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				ifclose_payload, 0 );
-
 /**
  * The "ifclose" command
  *
@@ -148,34 +134,25 @@
  * @ret rc		Return status code
  */
 static int ifclose_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &ifclose_cmd );
+	return ifcommon_exec ( argc, argv, &ifclose_cmd, ifclose_payload, 0 );
 }
 
-/** "ifstat" options */
-struct ifstat_options {};
-
-/** "ifstat" option list */
-static struct option_descriptor ifstat_opts[] = {};
+/** "ifstat" command descriptor */
+static struct command_descriptor ifstat_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "ifstat" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int ifstat_payload ( struct net_device *netdev,
-			    struct ifstat_options *opts __unused ) {
+static int ifstat_payload ( struct net_device *netdev ) {
 	ifstat ( netdev );
 	return 0;
 }
 
-/** "ifstat" command descriptor */
-static struct ifcommon_command_descriptor ifstat_cmd =
-	IFCOMMON_COMMAND_DESC ( struct ifstat_options, ifstat_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				ifstat_payload, 0 );
-
 /**
  * The "ifstat" command
  *
@@ -184,60 +161,7 @@
  * @ret rc		Return status code
  */
 static int ifstat_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &ifstat_cmd );
-}
-
-/** "ifconf" options */
-struct ifconf_options {
-	/** Configurator */
-	struct net_device_configurator *configurator;
-};
-
-/** "ifconf" option list */
-static struct option_descriptor ifconf_opts[] = {
-	OPTION_DESC ( "configurator", 'c', required_argument,
-		      struct ifconf_options, configurator,
-		      parse_netdev_configurator ),
-};
-
-/**
- * "ifconf" payload
- *
- * @v netdev		Network device
- * @v opts		Command options
- * @ret rc		Return status code
- */
-static int ifconf_payload ( struct net_device *netdev,
-			    struct ifconf_options *opts ) {
-	int rc;
-
-	/* Attempt configuration */
-	if ( ( rc = ifconf ( netdev, opts->configurator ) ) != 0 ) {
-
-		/* Close device on failure, to avoid memory exhaustion */
-		netdev_close ( netdev );
-
-		return rc;
-	}
-
-	return 0;
-}
-
-/** "ifconf" command descriptor */
-static struct ifcommon_command_descriptor ifconf_cmd =
-	IFCOMMON_COMMAND_DESC ( struct ifconf_options, ifconf_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				ifconf_payload, 1 );
-
-/**
- * The "ifconf" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-int ifconf_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &ifconf_cmd );
+	return ifcommon_exec ( argc, argv, &ifstat_cmd, ifstat_payload, 0 );
 }
 
 /** Interface management commands */
@@ -254,8 +178,4 @@
 		.name = "ifstat",
 		.exec = ifstat_exec,
 	},
-	{
-		.name = "ifconf",
-		.exec = ifconf_exec,
-	},
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/image_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/image_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/image_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/image_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -27,7 +26,6 @@
 #include <ipxe/image.h>
 #include <ipxe/command.h>
 #include <ipxe/parseopt.h>
-#include <ipxe/shell.h>
 #include <usr/imgmgmt.h>
 
 /** @file
@@ -36,265 +34,164 @@
  *
  */
 
-/** "img{single}" options */
-struct imgsingle_options {
+/** "imgfetch" options */
+struct imgfetch_options {
 	/** Image name */
-	char *name;
-	/** Replace image */
-	int replace;
-	/** Free image after execution */
-	int autofree;
+	const char *name;
 };
 
-/** "img{single}" option list */
-static union {
-	/* "imgexec" takes all three options */
-	struct option_descriptor imgexec[3];
-	/* Other "img{single}" commands take only --name and --autofree */
-	struct option_descriptor imgsingle[2];
-} opts = {
-	.imgexec = {
-		OPTION_DESC ( "name", 'n', required_argument,
-			      struct imgsingle_options, name, parse_string ),
-		OPTION_DESC ( "autofree", 'a', no_argument,
-			      struct imgsingle_options, autofree, parse_flag ),
-		OPTION_DESC ( "replace", 'r', no_argument,
-			      struct imgsingle_options, replace, parse_flag ),
-	},
+/** "imgfetch" option list */
+static struct option_descriptor imgfetch_opts[] = {
+	OPTION_DESC ( "name", 'n', required_argument,
+		      struct imgfetch_options, name, parse_string ),
 };
 
-/** An "img{single}" family command descriptor */
-struct imgsingle_descriptor {
-	/** Command descriptor */
-	struct command_descriptor *cmd;
-	/** Function to use to acquire the image */
-	int ( * acquire ) ( const char *name, struct image **image );
-	/** Pre-action to take upon image, or NULL */
-	void ( * preaction ) ( struct image *image );
-	/** Action to take upon image, or NULL */
-	int ( * action ) ( struct image *image,
-			   struct imgsingle_options *opts );
-	/** Verb to describe action */
-	const char *verb;
-};
+/** "imgfetch" command descriptor */
+static struct command_descriptor imgfetch_cmd =
+	COMMAND_DESC ( struct imgfetch_options, imgfetch_opts, 1, MAX_ARGUMENTS,
+		       "[--name <name>] <uri> [<arguments>...]" );
 
 /**
- * The "img{single}" family of commands
+ * The "imgfetch" and friends command body
  *
  * @v argc		Argument count
  * @v argv		Argument list
- * @v desc		"img{single}" command descriptor
+ * @v cmd		Command descriptor
  * @v action_name	Action name (for error messages)
- * @v action		Action to take upon image
+ * @v action		Action to take upon a successful download
  * @ret rc		Return status code
  */
-static int imgsingle_exec ( int argc, char **argv,
-			    struct imgsingle_descriptor *desc ) {
-	struct imgsingle_options opts;
-	char *name_uri = NULL;
+static int imgfetch_core_exec ( int argc, char **argv,
+				const char *action_name,
+				int ( * action ) ( struct image *image ) ) {
+	struct imgfetch_options opts;
+	char *uri_string;
 	char *cmdline = NULL;
-	struct image *image;
 	int rc;
 
 	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, desc->cmd, &opts ) ) != 0 )
+	if ( ( rc = parse_options ( argc, argv, &imgfetch_cmd, &opts ) ) != 0 )
 		goto err_parse_options;
 
-	/* Parse name/URI string and command line, if present */
-	if ( optind < argc ) {
-		name_uri = argv[optind];
-		if ( argv[ optind + 1 ] != NULL ) {
-			cmdline = concat_args ( &argv[ optind + 1 ] );
-			if ( ! cmdline ) {
-				rc = -ENOMEM;
-				goto err_parse_cmdline;
-			}
-		}
-	}
+	/* Parse URI string */
+	uri_string = argv[optind];
 
-	/* Acquire the image */
-	if ( name_uri ) {
-		if ( ( rc = desc->acquire ( name_uri, &image ) ) != 0 )
-			goto err_acquire;
-	} else {
-		image = image_find_selected();
-		if ( ! image ) {
-			printf ( "No image selected\n" );
-			goto err_acquire;
-		}
-	}
-
-	/* Carry out command pre-action, if applicable */
-	if ( desc->preaction )
-		desc->preaction ( image );
-
-	/* Set the image name, if applicable */
-	if ( opts.name ) {
-		if ( ( rc = image_set_name ( image, opts.name ) ) != 0 ) {
-			printf ( "Could not name image: %s\n",
-				 strerror ( rc ) );
-			goto err_set_name;
+	/* Parse command line */
+	if ( argv[ optind + 1 ] != NULL ) {
+		cmdline = concat_args ( &argv[ optind + 1 ] );
+		if ( ! cmdline ) {
+			rc = -ENOMEM;
+			goto err_cmdline;
 		}
 	}
 
-	/* Set the command-line arguments, if applicable */
-	if ( cmdline ) {
-		if ( ( rc = image_set_cmdline ( image, cmdline ) ) != 0 ) {
-			printf ( "Could not set arguments: %s\n",
-				 strerror ( rc ) );
-			goto err_set_cmdline;
-		}
+	/* Fetch the image */
+	if ( ( rc = imgdownload_string ( uri_string, opts.name, cmdline,
+					 action ) ) != 0 ) {
+		printf ( "Could not %s %s: %s\n",
+			 action_name, uri_string, strerror ( rc ) );
+		goto err_imgdownload;
 	}
 
-	/* Set the auto-unregister flag, if applicable */
-	if ( opts.autofree )
-		image->flags |= IMAGE_AUTO_UNREGISTER;
-
-	/* Carry out command action, if applicable */
-	if ( desc->action ) {
-		if ( ( rc = desc->action ( image, &opts ) ) != 0 ) {
-			printf ( "Could not %s: %s\n",
-				 desc->verb, strerror ( rc ) );
-			goto err_action;
-		}
-	}
+	/* Free command line */
+	free ( cmdline );
 
-	/* Success */
-	rc = 0;
+	return 0;
 
- err_action:
- err_set_cmdline:
- err_set_name:
- err_acquire:
+ err_imgdownload:
 	free ( cmdline );
- err_parse_cmdline:
+ err_cmdline:
  err_parse_options:
 	return rc;
 }
 
-/** "imgfetch" command descriptor */
-static struct command_descriptor imgfetch_cmd =
-	COMMAND_DESC ( struct imgsingle_options, opts.imgsingle,
-		       1, MAX_ARGUMENTS, "<uri> [<arguments>...]" );
-
-/** "imgfetch" family command descriptor */
-struct imgsingle_descriptor imgfetch_desc = {
-	.cmd = &imgfetch_cmd,
-	.acquire = imgdownload_string,
-};
-
 /**
- * The "imgfetch" command
+ * The "imgfetch"/"module" command
  *
  * @v argc		Argument count
  * @v argv		Argument list
  * @ret rc		Return status code
  */
 static int imgfetch_exec ( int argc, char **argv ) {
-	return imgsingle_exec ( argc, argv, &imgfetch_desc );
+
+	return imgfetch_core_exec ( argc, argv, "fetch", NULL );
 }
 
 /**
- * "imgselect" command action
+ * The "kernel" command
  *
- * @v image		Image
- * @v opts		Options
+ * @v argc		Argument count
+ * @v argv		Argument list
  * @ret rc		Return status code
  */
-static int imgselect ( struct image *image,
-		       struct imgsingle_options *opts __unused ) {
-	return image_select ( image );
-}
-
-/** "imgselect" command descriptor */
-static struct command_descriptor imgselect_cmd =
-	COMMAND_DESC ( struct imgsingle_options, opts.imgsingle,
-		       1, MAX_ARGUMENTS, "<uri|image> [<arguments>...]" );
+static int kernel_exec ( int argc, char **argv ) {
 
-/** "imgselect" family command descriptor */
-struct imgsingle_descriptor imgselect_desc = {
-	.cmd = &imgselect_cmd,
-	.acquire = imgacquire,
-	.action = imgselect,
-	.verb = "select",
-};
+	return imgfetch_core_exec ( argc, argv, "select", image_select );
+}
 
 /**
- * The "imgselect" command
+ * The "chain" command
  *
  * @v argc		Argument count
  * @v argv		Argument list
  * @ret rc		Return status code
  */
-static int imgselect_exec ( int argc, char **argv ) {
-	return imgsingle_exec ( argc, argv, &imgselect_desc );
+static int chain_exec ( int argc, char **argv) {
+
+	return imgfetch_core_exec ( argc, argv, "boot", image_exec );
 }
 
-/** "imgexec" command descriptor */
-static struct command_descriptor imgexec_cmd =
-	COMMAND_DESC ( struct imgsingle_options, opts.imgexec,
-		       0, MAX_ARGUMENTS, "[<uri|image> [<arguments>...]]" );
+/** "imgselect" options */
+struct imgselect_options {};
+
+/** "imgselect" option list */
+static struct option_descriptor imgselect_opts[] = {};
+
+/** "imgselect" command descriptor */
+static struct command_descriptor imgselect_cmd =
+	COMMAND_DESC ( struct imgselect_options, imgselect_opts, 1, 1,
+		       "<image>" );
 
 /**
- * "imgexec" command action
+ * The "imgselect" command
  *
- * @v image		Image
- * @v opts		Options
+ * @v argc		Argument count
+ * @v argv		Argument list
  * @ret rc		Return status code
  */
-static int imgexec ( struct image *image, struct imgsingle_options *opts ) {
+static int imgselect_exec ( int argc, char **argv ) {
+	struct imgselect_options opts;
+	struct image *image;
 	int rc;
 
-	/* Perform replacement or execution as applicable */
-	if ( opts->replace ) {
-
-		/* Try to replace image */
-		if ( ( rc = image_replace ( image ) ) != 0 )
-			return rc;
-
-		/* Stop script and tail-recurse into replacement image */
-		shell_stop ( SHELL_STOP_COMMAND_SEQUENCE );
+	/* Parse options */
+	if ( ( rc = parse_options ( argc, argv, &imgselect_cmd, &opts ) ) != 0 )
+		return rc;
 
-	} else {
+	/* Parse image name */
+	if ( ( rc = parse_image ( argv[optind], &image ) ) != 0 )
+		return rc;
 
-		/* Try to execute image */
-		if ( ( rc = image_exec ( image ) ) != 0 )
-			return rc;
+	/* Load image */
+	if ( ( rc = imgselect ( image ) ) != 0 ) {
+		printf ( "Could not select %s: %s\n",
+			 image->name, strerror ( rc ) );
+		return rc;
 	}
 
 	return 0;
 }
 
-/** "imgexec" family command descriptor */
-struct imgsingle_descriptor imgexec_desc = {
-	.cmd = &imgexec_cmd,
-	.acquire = imgacquire,
-	.action = imgexec,
-	.verb = "boot",
-};
+/** "imgargs" options */
+struct imgargs_options {};
 
-/**
- * The "imgexec" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int imgexec_exec ( int argc, char **argv) {
-	return imgsingle_exec ( argc, argv, &imgexec_desc );
-}
+/** "imgargs" option list */
+static struct option_descriptor imgargs_opts[] = {};
 
 /** "imgargs" command descriptor */
 static struct command_descriptor imgargs_cmd =
-	COMMAND_DESC ( struct imgsingle_options, opts.imgsingle,
-		       1, MAX_ARGUMENTS, "<uri|image> [<arguments>...]" );
-
-/** "imgargs" family command descriptor */
-struct imgsingle_descriptor imgargs_desc = {
-	.cmd = &imgargs_cmd,
-	.acquire = imgacquire,
-	.preaction = image_clear_cmdline,
-};
+	COMMAND_DESC ( struct imgargs_options, imgargs_opts, 1, MAX_ARGUMENTS,
+		       "<image> [<arguments>...]" );
 
 /**
  * The "imgargs" command body
@@ -304,60 +201,105 @@
  * @ret rc		Return status code
  */
 static int imgargs_exec ( int argc, char **argv ) {
-	return imgsingle_exec ( argc, argv, &imgargs_desc );
+	struct imgargs_options opts;
+	struct image *image;
+	char *cmdline = NULL;
+	int rc;
+
+	/* Parse options */
+	if ( ( rc = parse_options ( argc, argv, &imgargs_cmd, &opts ) ) != 0 )
+		goto err_parse_options;
+
+	/* Parse image name */
+	if ( ( rc = parse_image ( argv[optind], &image ) ) != 0 )
+		goto err_parse_image;
+
+	/* Parse command line */
+	if ( argv[ optind + 1 ] != NULL ) {
+		cmdline = concat_args ( &argv[ optind + 1 ] );
+		if ( ! cmdline ) {
+			rc = -ENOMEM;
+			goto err_cmdline;
+		}
+	}
+
+	/* Set command line */
+	if ( ( rc = image_set_cmdline ( image, cmdline ) ) != 0 )
+		goto err_set_cmdline;
+
+	/* Free command line */
+	free ( cmdline );
+
+	return 0;
+
+ err_set_cmdline:
+	free ( cmdline );
+ err_cmdline:
+ err_parse_image:
+ err_parse_options:
+	return rc;
 }
 
-/** "img{multi}" options */
-struct imgmulti_options {};
+/** "imgexec" options */
+struct imgexec_options {};
 
-/** "img{multi}" option list */
-static struct option_descriptor imgmulti_opts[] = {};
+/** "imgexec" option list */
+static struct option_descriptor imgexec_opts[] = {};
 
-/** "img{multi}" command descriptor */
-static struct command_descriptor imgmulti_cmd =
-	COMMAND_DESC ( struct imgmulti_options, imgmulti_opts, 0, MAX_ARGUMENTS,
-		       "[<image>...]" );
+/** "imgexec" command descriptor */
+static struct command_descriptor imgexec_cmd =
+	COMMAND_DESC ( struct imgexec_options, imgexec_opts, 0, 1,
+		       "[<image>]" );
 
 /**
- * The "img{multi}" family of commands
+ * The "imgexec" command
  *
  * @v argc		Argument count
  * @v argv		Argument list
- * @v payload		Function to execute on each image
  * @ret rc		Return status code
  */
-static int imgmulti_exec ( int argc, char **argv,
-			   void ( * payload ) ( struct image *image ) ) {
-	struct imgmulti_options opts;
+static int imgexec_exec ( int argc, char **argv ) {
+	struct imgexec_options opts;
 	struct image *image;
-	struct image *tmp;
-	int i;
 	int rc;
 
 	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &imgmulti_cmd, &opts ) ) != 0 )
+	if ( ( rc = parse_options ( argc, argv, &imgexec_cmd, &opts ) ) != 0 )
 		return rc;
 
-	/* If no images are explicitly specified, process all images */
-	if ( optind == argc ) {
-		for_each_image_safe ( image, tmp )
-			payload ( image );
-		return 0;
-	}
-
-	/* Otherwise, process specified images */
-	for ( i = optind ; i < argc ; i++ ) {
-		image = find_image ( argv[i] );
+	/* Parse image name */
+	if ( optind < argc ) {
+		if ( ( rc = parse_image ( argv[optind], &image ) ) != 0 )
+			return rc;
+	} else {
+		image = imgautoselect();
 		if ( ! image ) {
-			printf ( "\"%s\": no such image\n", argv[i] );
-			return -ENOENT;
+			rc = -ENOTTY;
+			printf ( "No image selected: %s\n", strerror ( rc ) );
+			return rc;
 		}
-		payload ( image );
+	}
+
+	/* Execute image */
+	if ( ( rc = imgexec ( image ) ) != 0 ) {
+		printf ( "Could not execute %s: %s\n",
+			 image->name, strerror ( rc ) );
+		return rc;
 	}
 
 	return 0;
 }
 
+/** "imgstat" options */
+struct imgstat_options {};
+
+/** "imgstat" option list */
+static struct option_descriptor imgstat_opts[] = {};
+
+/** "imgstat" command descriptor */
+static struct command_descriptor imgstat_cmd =
+	COMMAND_DESC ( struct imgstat_options, imgstat_opts, 0, 0, "" );
+
 /**
  * The "imgstat" command
  *
@@ -366,9 +308,33 @@
  * @ret rc		Return status code
  */
 static int imgstat_exec ( int argc, char **argv ) {
-	return imgmulti_exec ( argc, argv, imgstat );
+	struct imgstat_options opts;
+	struct image *image;
+	int rc;
+
+	/* Parse options */
+	if ( ( rc = parse_options ( argc, argv, &imgstat_cmd, &opts ) ) != 0 )
+		return rc;
+
+	/* Show status of all images */
+	for_each_image ( image ) {
+		imgstat ( image );
+	}
+
+	return 0;
 }
 
+/** "imgfree" options */
+struct imgfree_options {};
+
+/** "imgfree" option list */
+static struct option_descriptor imgfree_opts[] = {};
+
+/** "imgfree" command descriptor */
+static struct command_descriptor imgfree_cmd =
+	COMMAND_DESC ( struct imgfree_options, imgfree_opts, 0, 1,
+		       "[<image>]" );
+
 /**
  * The "imgfree" command
  *
@@ -377,7 +343,28 @@
  * @ret rc		Return status code
  */
 static int imgfree_exec ( int argc, char **argv ) {
-	return imgmulti_exec ( argc, argv, unregister_image );
+	struct imgfree_options opts;
+	struct image *image;
+	struct image *tmp;
+	int rc;
+
+	/* Parse options */
+	if ( ( rc = parse_options ( argc, argv, &imgfree_cmd, &opts ) ) != 0 )
+		return rc;
+
+	if ( optind < argc ) {
+		/* Free specified image */
+		if ( ( rc = parse_image ( argv[optind], &image ) ) != 0 )
+			return rc;
+		imgfree ( image );
+	} else {
+		/* Free all images */
+		list_for_each_entry_safe ( image, tmp, &images, list ) {
+			imgfree ( image );
+		}
+	}
+
+	return 0;
 }
 
 /** Image management commands */
@@ -396,19 +383,19 @@
 	},
 	{
 		.name = "kernel",
-		.exec = imgselect_exec, /* synonym for "imgselect" */
+		.exec = kernel_exec,
 	},
 	{
 		.name = "chain",
-		.exec = imgexec_exec, /* synonym for "imgexec" */
+		.exec = chain_exec,
 	},
 	{
 		.name = "imgselect",
 		.exec = imgselect_exec,
 	},
 	{
-		.name = "imgload",
-		.exec = imgselect_exec, /* synonym for "imgselect" */
+		.name = "imgload", /* synonym for "imgselect" */
+		.exec = imgselect_exec,
 	},
 	{
 		.name = "imgargs",
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/image_trust_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/image_trust_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/image_trust_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/image_trust_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,171 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdio.h>
-#include <getopt.h>
-#include <ipxe/image.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <usr/imgmgmt.h>
-#include <usr/imgtrust.h>
-
-/** @file
- *
- * Image trust management commands
- *
- */
-
-/** "imgtrust" options */
-struct imgtrust_options {
-	/** Allow trusted images */
-	int allow;
-	/** Make trust requirement permanent */
-	int permanent;
-};
-
-/** "imgtrust" option list */
-static struct option_descriptor imgtrust_opts[] = {
-	OPTION_DESC ( "allow", 'a', no_argument,
-		      struct imgtrust_options, allow, parse_flag ),
-	OPTION_DESC ( "permanent", 'p', no_argument,
-		      struct imgtrust_options, permanent, parse_flag ),
-};
-
-/** "imgtrust" command descriptor */
-static struct command_descriptor imgtrust_cmd =
-	COMMAND_DESC ( struct imgtrust_options, imgtrust_opts, 0, 0, NULL );
-
-/**
- * The "imgtrust" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int imgtrust_exec ( int argc, char **argv ) {
-	struct imgtrust_options opts;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &imgtrust_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Set trust requirement */
-	if ( ( rc = image_set_trust ( ( ! opts.allow ),
-				      opts.permanent ) ) != 0 ) {
-		printf ( "Could not set image trust requirement: %s\n",
-			 strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/** "imgverify" options */
-struct imgverify_options {
-	/** Required signer common name */
-	char *signer;
-	/** Keep signature after verification */
-	int keep;
-};
-
-/** "imgverify" option list */
-static struct option_descriptor imgverify_opts[] = {
-	OPTION_DESC ( "signer", 's', required_argument,
-		      struct imgverify_options, signer, parse_string ),
-	OPTION_DESC ( "keep", 'k', no_argument,
-		      struct imgverify_options, keep, parse_flag ),
-};
-
-/** "imgverify" command descriptor */
-static struct command_descriptor imgverify_cmd =
-	COMMAND_DESC ( struct imgverify_options, imgverify_opts, 2, 2,
-		       "<uri|image> <signature uri|image>" );
-
-/**
- * The "imgverify" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int imgverify_exec ( int argc, char **argv ) {
-	struct imgverify_options opts;
-	const char *image_name_uri;
-	const char *signature_name_uri;
-	struct image *image;
-	struct image *signature;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &imgverify_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Parse image name/URI string */
-	image_name_uri = argv[optind];
-
-	/* Parse signature name/URI string */
-	signature_name_uri = argv[ optind + 1 ];
-
-	/* Acquire the image */
-	if ( ( rc = imgacquire ( image_name_uri, &image ) ) != 0 )
-		goto err_acquire_image;
-
-	/* Acquire the signature image */
-	if ( ( rc = imgacquire ( signature_name_uri, &signature ) ) != 0 )
-		goto err_acquire_signature;
-
-	/* Verify image */
-	if ( ( rc = imgverify ( image, signature, opts.signer ) ) != 0 ) {
-		printf ( "Could not verify: %s\n", strerror ( rc ) );
-		goto err_verify;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_verify:
-	/* Discard signature unless --keep was specified */
-	if ( ! opts.keep )
-		unregister_image ( signature );
- err_acquire_signature:
- err_acquire_image:
-	return rc;
-}
-
-/** Image trust management commands */
-struct command image_trust_commands[] __command = {
-	{
-		.name = "imgtrust",
-		.exec = imgtrust_exec,
-	},
-	{
-		.name = "imgverify",
-		.exec = imgverify_exec,
-	},
-};
-
-/* Drag in objects typically required for signature verification */
-REQUIRE_OBJECT ( rsa );
-REQUIRE_OBJECT ( md5 );
-REQUIRE_OBJECT ( sha1 );
-REQUIRE_OBJECT ( sha256 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/iwmgmt_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/iwmgmt_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/iwmgmt_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/iwmgmt_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -32,21 +31,18 @@
  *
  */
 
-/** "iwstat" options */
-struct iwstat_options {};
-
-/** "iwstat" option list */
-static struct option_descriptor iwstat_opts[] = {};
+/** "iwstat" command descriptor */
+static struct command_descriptor iwstat_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "iwstat" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int iwstat_payload ( struct net_device *netdev,
-			    struct iwstat_options *opts __unused ) {
+static int iwstat_payload ( struct net_device *netdev ) {
 	struct net80211_device *dev = net80211_get ( netdev );
 
 	if ( dev )
@@ -55,12 +51,6 @@
 	return 0;
 }
 
-/** "iwstat" command descriptor */
-static struct ifcommon_command_descriptor iwstat_cmd =
-	IFCOMMON_COMMAND_DESC ( struct iwstat_options, iwstat_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				iwstat_payload, 0 );
-
 /**
  * The "iwstat" command
  *
@@ -69,24 +59,21 @@
  * @ret rc		Return status code
  */
 static int iwstat_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &iwstat_cmd );
+	return ifcommon_exec ( argc, argv, &iwstat_cmd, iwstat_payload, 0 );
 }
 
-/** "iwlist" options */
-struct iwlist_options {};
-
-/** "iwlist" option list */
-static struct option_descriptor iwlist_opts[] = {};
+/** "iwlist" command descriptor */
+static struct command_descriptor iwlist_cmd =
+	COMMAND_DESC ( struct ifcommon_options, ifcommon_opts, 0, MAX_ARGUMENTS,
+		       "[<interface>...]" );
 
 /**
  * "iwlist" payload
  *
  * @v netdev		Network device
- * @v opts		Command options
  * @ret rc		Return status code
  */
-static int iwlist_payload ( struct net_device *netdev,
-			    struct iwlist_options *opts __unused ) {
+static int iwlist_payload ( struct net_device *netdev ) {
 	struct net80211_device *dev = net80211_get ( netdev );
 
 	if ( dev )
@@ -95,12 +82,6 @@
 	return 0;
 }
 
-/** "iwlist" command descriptor */
-static struct ifcommon_command_descriptor iwlist_cmd =
-	IFCOMMON_COMMAND_DESC ( struct iwlist_options, iwlist_opts,
-				0, MAX_ARGUMENTS, "[<interface>...]",
-				iwlist_payload, 0 );
-
 /**
  * The "iwlist" command
  *
@@ -109,7 +90,7 @@
  * @ret rc		Return status code
  */
 static int iwlist_exec ( int argc, char **argv ) {
-	return ifcommon_exec ( argc, argv, &iwlist_cmd );
+	return ifcommon_exec ( argc, argv, &iwlist_cmd, iwlist_payload, 0 );
 }
 
 /** Wireless interface management commands */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/login_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/login_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/login_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/login_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <string.h>
@@ -39,7 +38,7 @@
 
 /** "login" command descriptor */
 static struct command_descriptor login_cmd =
-	COMMAND_DESC ( struct login_options, login_opts, 0, 0, NULL );
+	COMMAND_DESC ( struct login_options, login_opts, 0, 0, "" );
 
 /**
  * "login" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/lotest_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/lotest_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/lotest_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/lotest_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -50,7 +49,8 @@
 /** "lotest" command descriptor */
 static struct command_descriptor lotest_cmd =
 	COMMAND_DESC ( struct lotest_options, lotest_opts, 2, 2,
-		       "<sending interface> <receiving interface>" );
+		       "[--mtu <mtu>] <sending interface> "
+		       "<receiving interface>" );
 
 /**
  * "lotest" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/menu_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/menu_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/menu_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/menu_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,290 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Menu commands
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <getopt.h>
-#include <ipxe/menu.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/settings.h>
-#include <ipxe/features.h>
-
-FEATURE ( FEATURE_MISC, "Menu", DHCP_EB_FEATURE_MENU, 1 );
-
-/** "menu" options */
-struct menu_options {
-	/** Name */
-	char *name;
-	/** Delete */
-	int delete;
-};
-
-/** "menu" option list */
-static struct option_descriptor menu_opts[] = {
-	OPTION_DESC ( "name", 'n', required_argument,
-		      struct menu_options, name, parse_string ),
-	OPTION_DESC ( "delete", 'd', no_argument,
-		      struct menu_options, delete, parse_flag ),
-};
-
-/** "menu" command descriptor */
-static struct command_descriptor menu_cmd =
-	COMMAND_DESC ( struct menu_options, menu_opts, 0, MAX_ARGUMENTS,
-		       "[<title>]" );
-
-/**
- * The "menu" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int menu_exec ( int argc, char **argv ) {
-	struct menu_options opts;
-	struct menu *menu;
-	char *title;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &menu_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse title */
-	title = concat_args ( &argv[optind] );
-	if ( ! title ) {
-		rc = -ENOMEM;
-		goto err_parse_title;
-	}
-
-	/* Create menu */
-	menu = create_menu ( opts.name, title );
-	if ( ! menu ) {
-		rc = -ENOMEM;
-		goto err_create_menu;
-	}
-
-	/* Destroy menu, if applicable */
-	if ( opts.delete )
-		destroy_menu ( menu );
-
-	/* Success */
-	rc = 0;
-
- err_create_menu:
-	free ( title );
- err_parse_title:
- err_parse_options:
-	return rc;
-}
-
-/** "item" options */
-struct item_options {
-	/** Menu name */
-	char *menu;
-	/** Shortcut key */
-	unsigned int key;
-	/** Use as default */
-	int is_default;
-	/** Use as a separator */
-	int is_gap;
-};
-
-/** "item" option list */
-static struct option_descriptor item_opts[] = {
-	OPTION_DESC ( "menu", 'm', required_argument,
-		      struct item_options, menu, parse_string ),
-	OPTION_DESC ( "key", 'k', required_argument,
-		      struct item_options, key, parse_key ),
-	OPTION_DESC ( "default", 'd', no_argument,
-		      struct item_options, is_default, parse_flag ),
-	OPTION_DESC ( "gap", 'g', no_argument,
-		      struct item_options, is_gap, parse_flag ),
-};
-
-/** "item" command descriptor */
-static struct command_descriptor item_cmd =
-	COMMAND_DESC ( struct item_options, item_opts, 0, MAX_ARGUMENTS,
-		       "[<label> [<text>]]" );
-
-/**
- * The "item" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int item_exec ( int argc, char **argv ) {
-	struct item_options opts;
-	struct menu *menu;
-	struct menu_item *item;
-	char *label = NULL;
-	char *text = NULL;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &item_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse label, if present */
-	if ( ! opts.is_gap )
-		label = argv[optind++]; /* May be NULL */
-
-	/* Parse text, if present */
-	if ( optind < argc ) {
-		text = concat_args ( &argv[optind] );
-		if ( ! text ) {
-			rc = -ENOMEM;
-			goto err_parse_text;
-		}
-	}
-
-	/* Identify menu */
-	if ( ( rc = parse_menu ( opts.menu, &menu ) ) != 0 )
-		goto err_parse_menu;
-
-	/* Add menu item */
-	item = add_menu_item ( menu, label, ( text ? text : "" ),
-			       opts.key, opts.is_default );
-	if ( ! item ) {
-		rc = -ENOMEM;
-		goto err_add_menu_item;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_add_menu_item:
- err_parse_menu:
-	free ( text );
- err_parse_text:
- err_parse_options:
-	return rc;
-}
-
-/** "choose" options */
-struct choose_options {
-	/** Menu name */
-	char *menu;
-	/** Timeout */
-	unsigned long timeout;
-	/** Default selection */
-	char *select;
-	/** Keep menu */
-	int keep;
-};
-
-/** "choose" option list */
-static struct option_descriptor choose_opts[] = {
-	OPTION_DESC ( "menu", 'm', required_argument,
-		      struct choose_options, menu, parse_string ),
-	OPTION_DESC ( "default", 'd', required_argument,
-		      struct choose_options, select, parse_string ),
-	OPTION_DESC ( "timeout", 't', required_argument,
-		      struct choose_options, timeout, parse_timeout ),
-	OPTION_DESC ( "keep", 'k', no_argument,
-		      struct choose_options, keep, parse_flag ),
-};
-
-/** "choose" command descriptor */
-static struct command_descriptor choose_cmd =
-	COMMAND_DESC ( struct choose_options, choose_opts, 1, 1, "<setting>" );
-
-/**
- * The "choose" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int choose_exec ( int argc, char **argv ) {
-	struct choose_options opts;
-	struct named_setting setting;
-	struct menu *menu;
-	struct menu_item *item;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &choose_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse setting name */
-	if ( ( rc = parse_autovivified_setting ( argv[optind],
-						 &setting ) ) != 0 )
-		goto err_parse_setting;
-
-	/* Identify menu */
-	if ( ( rc = parse_menu ( opts.menu, &menu ) ) != 0 )
-		goto err_parse_menu;
-
-	/* Show menu */
-	if ( ( rc = show_menu ( menu, opts.timeout, opts.select, &item ) ) != 0)
-		goto err_show_menu;
-
-	/* Apply default type if necessary */
-	if ( ! setting.setting.type )
-		setting.setting.type = &setting_type_string;
-
-	/* Store setting */
-	if ( ( rc = storef_setting ( setting.settings, &setting.setting,
-				     item->label ) ) != 0 ) {
-		printf ( "Could not store \"%s\": %s\n",
-			 setting.setting.name, strerror ( rc ) );
-		goto err_store;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_store:
- err_show_menu:
-	/* Destroy menu, if applicable */
-	if ( ! opts.keep )
-		destroy_menu ( menu );
- err_parse_menu:
- err_parse_setting:
- err_parse_options:
-	return rc;
-}
-
-/** Menu commands */
-struct command menu_commands[] __command = {
-	{
-		.name = "menu",
-		.exec = menu_exec,
-	},
-	{
-		.name = "item",
-		.exec = item_exec,
-	},
-	{
-		.name = "choose",
-		.exec = choose_exec,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/neighbour_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/neighbour_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/neighbour_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/neighbour_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,69 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Neighbour management commands
- *
- */
-
-#include <getopt.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/command.h>
-#include <usr/neighmgmt.h>
-
-/** "nstat" options */
-struct nstat_options {};
-
-/** "nstat" option list */
-static struct option_descriptor nstat_opts[] = {};
-
-/** "nstat" command descriptor */
-static struct command_descriptor nstat_cmd =
-	COMMAND_DESC ( struct nstat_options, nstat_opts, 0, 0, NULL );
-
-/**
- * The "nstat" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int nstat_exec ( int argc, char **argv ) {
-	struct nstat_options opts;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &nstat_cmd, &opts ) ) != 0)
-		return rc;
-
-	nstat();
-
-	return 0;
-}
-
-/** Neighbour management commands */
-struct command neighbour_commands[] __command = {
-	{
-		.name = "nstat",
-		.exec = nstat_exec,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/nslookup_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/nslookup_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/nslookup_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/nslookup_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,79 +0,0 @@
-/*
- * Copyright (C) 2012 Patrick Plenefisch <phplenefisch@wpi.edu>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <getopt.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <usr/nslookup.h>
-
-/** @file
- *
- * nslookup command
- *
- */
-
-/** "nslookup" options */
-struct nslookup_options {};
-
-/** "nslookup" option list */
-static struct option_descriptor nslookup_opts[] = {};
-
-/** "nslookup" command descriptor */
-static struct command_descriptor nslookup_cmd =
-	COMMAND_DESC ( struct nslookup_options, nslookup_opts, 2, 2,
-		       "<setting> <name>" );
-
-/**
- * The "nslookup" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int nslookup_exec ( int argc, char **argv ) {
-	struct nslookup_options opts;
-	const char *name;
-	const char *setting_name;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &nslookup_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Parse setting name */
-	setting_name = argv[optind];
-
-	/* Parse name to be resolved */
-	name = argv[ optind + 1 ];
-
-	/* Look up name */
-	if ( ( rc = nslookup ( name, setting_name ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/** The "nslookup" command */
-struct command nslookup_command __command = {
-	.name = "nslookup",
-	.exec = nslookup_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/nvo_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/nvo_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/nvo_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/nvo_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stdint.h>
@@ -23,7 +22,6 @@
 #include <string.h>
 #include <errno.h>
 #include <getopt.h>
-#include <byteswap.h>
 #include <ipxe/settings.h>
 #include <ipxe/command.h>
 #include <ipxe/parseopt.h>
@@ -56,44 +54,31 @@
  */
 static int show_exec ( int argc, char **argv ) {
 	struct show_options opts;
-	struct named_setting setting;
-	struct settings *origin;
+	const char *name;
 	char name_buf[32];
-	char *value;
+	char value_buf[256];
 	int rc;
 
 	/* Parse options */
 	if ( ( rc = parse_options ( argc, argv, &show_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
+		return rc;
 
 	/* Parse setting name */
-	if ( ( rc = parse_existing_setting ( argv[optind], &setting ) ) != 0 )
-		goto err_parse_setting;
+	name = argv[optind];
 
-	/* Fetch formatted setting value */
-	if ( ( rc = fetchf_setting_copy ( setting.settings, &setting.setting,
-					  &value ) ) < 0 ) {
+	/* Fetch setting */
+	if ( ( rc = fetchf_named_setting ( name, name_buf, sizeof ( name_buf ),
+					   value_buf,
+					   sizeof ( value_buf ) ) ) < 0 ) {
 		printf ( "Could not find \"%s\": %s\n",
-			 setting.setting.name, strerror ( rc ) );
-		goto err_fetchf;
+			 name, strerror ( rc ) );
+		return rc;
 	}
 
-	/* Fetch origin and format fully-qualified name */
-	origin = fetch_setting_origin ( setting.settings, &setting.setting );
-	assert ( origin != NULL );
-	setting_name ( origin, &setting.setting, name_buf, sizeof ( name_buf ));
-
 	/* Print setting value */
-	printf ( "%s = %s\n", name_buf, value );
+	printf ( "%s = %s\n", name_buf, value_buf );
 
-	/* Success */
-	rc = 0;
-
-	free ( value );
- err_fetchf:
- err_parse_setting:
- err_parse_options:
-	return rc;
+	return 0;
 }
 
 /** "set", "clear", and "read" options */
@@ -123,10 +108,9 @@
  */
 static int set_core_exec ( int argc, char **argv,
 			   struct command_descriptor *cmd,
-			   int ( * get_value ) ( struct named_setting *setting,
-						 char **args, char **value ) ) {
+			   int ( * get_value ) ( char **args, char **value ) ) {
 	struct set_core_options opts;
-	struct named_setting setting;
+	const char *name;
 	char *value;
 	int rc;
 
@@ -135,30 +119,25 @@
 		goto err_parse_options;
 
 	/* Parse setting name */
-	if ( ( rc = parse_autovivified_setting ( argv[optind],
-						 &setting ) ) != 0 )
-		goto err_parse_setting;
+	name = argv[optind];
 
 	/* Parse setting value */
-	if ( ( rc = get_value ( &setting, &argv[ optind + 1 ], &value ) ) != 0 )
+	if ( ( rc = get_value ( &argv[ optind + 1 ], &value ) ) != 0 )
 		goto err_get_value;
 
-	/* Apply default type if necessary */
-	if ( ! setting.setting.type )
-		setting.setting.type = &setting_type_string;
-
-	/* Store setting */
-	if ( ( rc = storef_setting ( setting.settings, &setting.setting,
-				     value ) ) != 0 ) {
-		printf ( "Could not store \"%s\": %s\n",
-			 setting.setting.name, strerror ( rc ) );
+	/* Determine total length of command line */
+	if ( ( rc = storef_named_setting ( name, value ) ) != 0 ) {
+		printf ( "Could not %s \"%s\": %s\n",
+			 argv[0], name, strerror ( rc ) );
 		goto err_store;
 	}
 
+	free ( value );
+	return 0;
+
  err_store:
 	free ( value );
  err_get_value:
- err_parse_setting:
  err_parse_options:
 	return rc;
 }
@@ -166,13 +145,11 @@
 /**
  * Get setting value for "set" command
  *
- * @v setting		Named setting
  * @v args		Remaining arguments
  * @ret value		Setting value
  * @ret rc		Return status code
  */
-static int set_value ( struct named_setting *setting __unused,
-		       char **args, char **value ) {
+static int set_value ( char **args, char **value ) {
 
 	*value = concat_args ( args );
 	if ( ! *value )
@@ -195,13 +172,11 @@
 /**
  * Get setting value for "clear" command
  *
- * @v setting		Named setting
  * @v args		Remaining arguments
  * @ret value		Setting value
  * @ret rc		Return status code
  */
-static int clear_value ( struct named_setting *setting __unused,
-			 char **args __unused, char **value ) {
+static int clear_value ( char **args __unused, char **value ) {
 
 	*value = NULL;
 	return 0;
@@ -221,28 +196,16 @@
 /**
  * Get setting value for "read" command
  *
- * @v setting		Named setting
- * @v args		Remaining arguments
  * @ret value		Setting value
  * @ret rc		Return status code
  */
-static int read_value ( struct named_setting *setting, char **args __unused,
-			char **value ) {
-	char *existing;
-	int rc;
+static int read_value ( char **args __unused, char **value ) {
 
-	/* Read existing value, treating errors as equivalent to an
-	 * empty initial setting.
-	 */
-	fetchf_setting_copy ( setting->settings, &setting->setting, &existing );
-
-	/* Read new value */
-	if ( ( rc = readline_history ( NULL, existing, NULL, value ) ) != 0 )
-		goto err_readline;
+	*value = readline ( NULL );
+	if ( ! *value )
+		return -ENOMEM;
 
- err_readline:
-	free ( existing );
-	return rc;
+	return 0;
 }
 
 /**
@@ -256,73 +219,6 @@
 	return set_core_exec ( argc, argv, &clear_read_cmd, read_value );
 }
 
-/** "inc" options */
-struct inc_options {};
-
-/** "inc" option list */
-static struct option_descriptor inc_opts[] = {};
-
-/** "inc" command descriptor */
-static struct command_descriptor inc_cmd =
-	COMMAND_DESC ( struct inc_options, inc_opts, 1, 2,
-		       "<setting> [<increment>]" );
-
-/**
- * "inc" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int inc_exec ( int argc, char **argv ) {
-	struct inc_options opts;
-	struct named_setting setting;
-	unsigned int increment = 1;
-	unsigned long value;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &inc_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse setting name */
-	if ( ( rc = parse_existing_setting ( argv[optind], &setting ) ) != 0 )
-		goto err_parse_setting;
-
-	/* Parse increment (if present) */
-	if ( ( ( optind + 1 ) < argc ) &&
-	     ( ( rc = parse_integer ( argv[ optind + 1 ], &increment ) ) != 0))
-		goto err_parse_increment;
-
-	/* Fetch existing setting value, if any, allowing for the fact
-	 * that numeric settings are big-endian and variable-length.
-	 */
-	if ( ( rc = fetchn_setting ( setting.settings, &setting.setting,
-				     &value ) ) != 0 ) {
-		/* Treat as a non-existent :int32 setting with a zero value */
-		value = 0;
-		if ( ! setting.setting.type )
-			setting.setting.type = &setting_type_int32;
-	}
-
-	/* Increment value */
-	value += increment;
-
-	/* Store updated setting value */
-	if ( ( rc = storen_setting ( setting.settings, &setting.setting,
-				     value ) ) != 0 ) {
-		printf ( "Could not store \"%s\": %s\n",
-			 setting.setting.name, strerror ( rc ) );
-		goto err_store;
-	}
-
- err_store:
- err_parse_increment:
- err_parse_setting:
- err_parse_options:
-	return rc;
-}
-
 /** Non-volatile option commands */
 struct command nvo_commands[] __command = {
 	{
@@ -341,8 +237,4 @@
 		.name = "read",
 		.exec = read_exec,
 	},
-	{
-		.name = "inc",
-		.exec = inc_exec,
-	},
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/param_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/param_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/param_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/param_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,161 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Form parameter commands
- *
- */
-
-#include <stdlib.h>
-#include <errno.h>
-#include <getopt.h>
-#include <ipxe/params.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/command.h>
-
-/** "params" options */
-struct params_options {
-	/** Name */
-	char *name;
-	/** Delete */
-	int delete;
-};
-
-/** "params" option list */
-static struct option_descriptor params_opts[] = {
-	OPTION_DESC ( "name", 'n', required_argument,
-		      struct params_options, name, parse_string ),
-	OPTION_DESC ( "delete", 'd', no_argument,
-		      struct params_options, delete, parse_flag ),
-};
-
-/** "params" command descriptor */
-static struct command_descriptor params_cmd =
-	COMMAND_DESC ( struct params_options, params_opts, 0, 0, NULL );
-
-/**
- * The "params" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int params_exec ( int argc, char **argv ) {
-	struct params_options opts;
-	struct parameters *params;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &params_cmd, &opts ) ) != 0)
-		return rc;
-
-	/* Create parameter list */
-	params = create_parameters ( opts.name );
-	if ( ! params )
-		return -ENOMEM;
-
-	/* Destroy parameter list, if applicable */
-	if ( opts.delete )
-		destroy_parameters ( params );
-
-	return 0;
-}
-
-/** "param" options */
-struct param_options {
-	/** Parameter list name */
-	char *params;
-};
-
-/** "param" option list */
-static struct option_descriptor param_opts[] = {
-	OPTION_DESC ( "params", 'p', required_argument,
-		      struct param_options, params, parse_string ),
-};
-
-/** "param" command descriptor */
-static struct command_descriptor param_cmd =
-	COMMAND_DESC ( struct param_options, param_opts, 1, MAX_ARGUMENTS,
-		       "<key> [<value>]" );
-
-/**
- * The "param" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int param_exec ( int argc, char **argv ) {
-	struct param_options opts;
-	char *key;
-	char *value;
-	struct parameters *params;
-	struct parameter *param;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &param_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse key */
-	key = argv[optind];
-
-	/* Parse value */
-	value = concat_args ( &argv[ optind + 1 ] );
-	if ( ! value ) {
-		rc = -ENOMEM;
-		goto err_parse_value;
-	}
-
-	/* Identify parameter list */
-	if ( ( rc = parse_parameters ( opts.params, &params ) ) != 0 )
-		goto err_parse_parameters;
-
-	/* Add parameter */
-	param = add_parameter ( params, key, value );
-	if ( ! param ) {
-		rc = -ENOMEM;
-		goto err_add_parameter;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_add_parameter:
- err_parse_parameters:
-	free ( value );
- err_parse_value:
- err_parse_options:
-	return rc;
-}
-
-/** Form parameter commands */
-struct command param_commands[] __command = {
-	{
-		.name = "params",
-		.exec = params_exec,
-	},
-	{
-		.name = "param",
-		.exec = param_exec,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/pci_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/pci_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/pci_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/pci_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,114 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdio.h>
-#include <getopt.h>
-#include <ipxe/pci.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * PCI commands
- *
- */
-
-/** "pciscan" options */
-struct pciscan_options {};
-
-/** "pciscan" option list */
-static struct option_descriptor pciscan_opts[] = {};
-
-/** "pciscan" command descriptor */
-static struct command_descriptor pciscan_cmd =
-	COMMAND_DESC ( struct pciscan_options, pciscan_opts, 1, 1,
-		       "<setting>" );
-
-/**
- * "pciscan" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int pciscan_exec ( int argc, char **argv ) {
-	struct pciscan_options opts;
-	struct named_setting setting;
-	struct pci_device pci;
-	unsigned long prev;
-	int next;
-	int len;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &pciscan_cmd, &opts ) ) != 0 )
-		goto err_parse_options;
-
-	/* Parse setting name */
-	if ( ( rc = parse_autovivified_setting ( argv[optind],
-						 &setting ) ) != 0 )
-		goto err_parse_setting;
-
-	/* Determine starting bus:dev.fn address */
-	if ( ( len = fetch_uint_setting ( setting.settings, &setting.setting,
-					  &prev ) ) < 0 ) {
-		/* Setting not yet defined: start searching from 00:00.0 */
-		prev = 0;
-	} else {
-		/* Setting is defined: start searching from next location */
-		prev++;
-	}
-
-	/* Find next existent PCI device */
-	if ( ( next = pci_find_next ( &pci, prev ) ) < 0 ) {
-		rc = next;
-		goto err_find_next;
-	}
-
-	/* Apply default type if necessary.  Use ":uint16" rather than
-	 * ":busdevfn" to allow for easy inclusion within a
-	 * "${pci/${location}.x.y}" constructed setting.
-	 */
-	if ( ! setting.setting.type )
-		setting.setting.type = &setting_type_uint16;
-
-	/* Store setting */
-	if ( ( rc = storen_setting ( setting.settings, &setting.setting,
-				     next ) ) != 0 ) {
-		printf ( "Could not store \"%s\": %s\n",
-			 setting.setting.name, strerror ( rc ) );
-		goto err_store;
-	}
-
- err_store:
- err_find_next:
- err_parse_setting:
- err_parse_options:
-	return rc;
-}
-
-/** PCI commands */
-struct command pci_commands[] __command = {
-	{
-		.name = "pciscan",
-		.exec = pciscan_exec,
-	},
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/ping_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/ping_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/ping_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/ping_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,100 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <getopt.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/timer.h>
-#include <usr/pingmgmt.h>
-
-/** @file
- *
- * Ping command
- *
- */
-
-/** Default payload length */
-#define PING_DEFAULT_SIZE 64
-
-/** Default timeout */
-#define PING_DEFAULT_TIMEOUT TICKS_PER_SEC
-
-/** "ping" options */
-struct ping_options {
-	/** Payload length */
-	unsigned int size;
-	/** Timeout (in ms) */
-	unsigned long timeout;
-};
-
-/** "ping" option list */
-static struct option_descriptor ping_opts[] = {
-	OPTION_DESC ( "size", 's', required_argument,
-		      struct ping_options, size, parse_integer ),
-	OPTION_DESC ( "timeout", 't', required_argument,
-		      struct ping_options, timeout, parse_timeout ),
-};
-
-/** "ping" command descriptor */
-static struct command_descriptor ping_cmd =
-	COMMAND_DESC ( struct ping_options, ping_opts, 1, 1, "<host>" );
-
-/**
- * The "ping" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int ping_exec ( int argc, char **argv ) {
-	struct ping_options opts;
-	const char *hostname;
-	int rc;
-
-	/* Initialise options */
-	memset ( &opts, 0, sizeof ( opts ) );
-	opts.size = PING_DEFAULT_SIZE;
-	opts.timeout = PING_DEFAULT_TIMEOUT;
-
-	/* Parse options */
-	if ( ( rc = reparse_options ( argc, argv, &ping_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Parse hostname */
-	hostname = argv[optind];
-
-	/* Ping */
-	if ( ( rc = ping ( hostname, opts.timeout, opts.size ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/** Ping command */
-struct command ping_command __command = {
-	.name = "ping",
-	.exec = ping_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/poweroff_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/poweroff_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/poweroff_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/poweroff_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdio.h>
-#include <string.h>
-#include <getopt.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/reboot.h>
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Power off command
- *
- */
-
-/** "poweroff" options */
-struct poweroff_options {};
-
-/** "poweroff" option list */
-static struct option_descriptor poweroff_opts[] = {};
-
-/** "poweroff" command descriptor */
-static struct command_descriptor poweroff_cmd =
-	COMMAND_DESC ( struct poweroff_options, poweroff_opts, 0, 0, NULL );
-
-/**
- * The "poweroff" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int poweroff_exec ( int argc, char **argv ) {
-	struct poweroff_options opts;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &poweroff_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Power off system */
-	rc = poweroff();
-	if ( rc != 0 )
-		printf ( "Could not power off: %s\n", strerror ( rc ) );
-
-	return rc;
-}
-
-/** "poweroff" command */
-struct command poweroff_command __command = {
-	.name = "poweroff",
-	.exec = poweroff_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/reboot_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/reboot_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/reboot_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/reboot_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2010 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <getopt.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <ipxe/reboot.h>
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Reboot command
- *
- */
-
-/** "reboot" options */
-struct reboot_options {
-	/** Perform a warm reboot */
-	int warm;
-};
-
-/** "reboot" option list */
-static struct option_descriptor reboot_opts[] = {
-	OPTION_DESC ( "warm", 'w', no_argument,
-		      struct reboot_options, warm, parse_flag ),
-};
-
-/** "reboot" command descriptor */
-static struct command_descriptor reboot_cmd =
-	COMMAND_DESC ( struct reboot_options, reboot_opts, 0, 0, NULL );
-
-/**
- * The "reboot" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int reboot_exec ( int argc, char **argv ) {
-	struct reboot_options opts;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &reboot_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Reboot system */
-	reboot ( opts.warm );
-
-	return 0;
-}
-
-/** "reboot" command */
-struct command reboot_command __command = {
-	.name = "reboot",
-	.exec = reboot_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/route_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/route_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/route_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/route_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -39,7 +38,7 @@
 
 /** "route" command descriptor */
 static struct command_descriptor route_cmd =
-	COMMAND_DESC ( struct route_options, route_opts, 0, 0, NULL );
+	COMMAND_DESC ( struct route_options, route_opts, 0, 0, "" );
 
 /**
  * The "route" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/sanboot_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/sanboot_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/sanboot_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/sanboot_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stdio.h>
@@ -46,38 +45,30 @@
 };
 
 /** "sanboot" option list */
-static union {
-	/* "sanboot" takes all three options */
-	struct option_descriptor sanboot[3];
-	/* "sanhook" takes only --drive and --no-describe */
-	struct option_descriptor sanhook[2];
-	/* "sanunhook" takes only --drive */
-	struct option_descriptor sanunhook[1];
-} opts = {
-	.sanboot = {
-		OPTION_DESC ( "drive", 'd', required_argument,
-			      struct sanboot_options, drive, parse_integer ),
-		OPTION_DESC ( "no-describe", 'n', no_argument,
-			      struct sanboot_options, no_describe, parse_flag ),
-		OPTION_DESC ( "keep", 'k', no_argument,
-			      struct sanboot_options, keep, parse_flag ),
-	},
+static struct option_descriptor sanboot_opts[] = {
+	OPTION_DESC ( "drive", 'd', required_argument,
+		      struct sanboot_options, drive, parse_integer ),
+	OPTION_DESC ( "no-describe", 'n', no_argument,
+		      struct sanboot_options, no_describe, parse_flag ),
+	OPTION_DESC ( "keep", 'k', no_argument,
+		      struct sanboot_options, keep, parse_flag ),
 };
 
-
 /** "sanhook" command descriptor */
 static struct command_descriptor sanhook_cmd =
-	COMMAND_DESC ( struct sanboot_options, opts.sanhook, 1, 1,
-		       "<root-path>" );
+	COMMAND_DESC ( struct sanboot_options, sanboot_opts, 1, 1,
+		       "[--drive <drive>] [--no-describe] <root-path>" );
 
 /** "sanboot" command descriptor */
 static struct command_descriptor sanboot_cmd =
-	COMMAND_DESC ( struct sanboot_options, opts.sanboot, 0, 1,
+	COMMAND_DESC ( struct sanboot_options, sanboot_opts, 0, 1,
+		       "[--drive <drive>] [--no-describe] [--keep] "
 		       "[<root-path>]" );
 
 /** "sanunhook" command descriptor */
 static struct command_descriptor sanunhook_cmd =
-	COMMAND_DESC ( struct sanboot_options, opts.sanunhook, 0, 0, NULL );
+	COMMAND_DESC ( struct sanboot_options, sanboot_opts, 0, 0,
+		       "[--drive <drive>]" );
 
 /**
  * The "sanboot", "sanhook" and "sanunhook" commands
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/sync_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/sync_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/sync_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/sync_cmd.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,79 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <stdio.h>
-#include <getopt.h>
-#include <ipxe/command.h>
-#include <ipxe/parseopt.h>
-#include <usr/sync.h>
-
-/** @file
- *
- * "sync" command
- *
- */
-
-/** "sync" options */
-struct sync_options {
-	/** Timeout */
-	unsigned long timeout;
-};
-
-/** "sync" option list */
-static struct option_descriptor sync_opts[] = {
-	OPTION_DESC ( "timeout", 't', required_argument,
-		      struct sync_options, timeout, parse_timeout ),
-};
-
-/** "sync" command descriptor */
-static struct command_descriptor sync_cmd =
-	COMMAND_DESC ( struct sync_options, sync_opts, 0, 0, NULL );
-
-/**
- * "sync" command
- *
- * @v argc		Argument count
- * @v argv		Argument list
- * @ret rc		Return status code
- */
-static int sync_exec ( int argc, char **argv ) {
-	struct sync_options opts;
-	int rc;
-
-	/* Parse options */
-	if ( ( rc = parse_options ( argc, argv, &sync_cmd, &opts ) ) != 0 )
-		return rc;
-
-	/* Wait for pending operations to complete */
-	if ( ( rc = sync ( opts.timeout ) ) != 0 ) {
-		printf ( "Operations did not complete: %s\n", strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/** Sync commands */
-struct command sync_command __command = {
-	.name = "sync",
-	.exec = sync_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/time_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/time_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/time_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/time_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  *
  * March-19-2009 @ 02:44: Added sleep command.
  * Shao Miller <shao.miller@yrdsb.edu.on.ca>.
@@ -57,8 +56,7 @@
 static int time_exec ( int argc, char **argv ) {
 	struct time_options opts;
 	unsigned long start;
-	unsigned long elapsed;
-	int decisecs;
+	int secs;
 	int rc;
 
 	/* Parse options */
@@ -67,11 +65,9 @@
 
 	start = currticks();
 	rc = execv ( argv[1], argv + 1 );
-	elapsed = ( currticks() - start );
-	decisecs = ( 10 * elapsed / ticks_per_sec() );
+	secs = (currticks() - start) / ticks_per_sec();
 
-	printf ( "%s: %d.%ds\n", argv[0],
-		 ( decisecs / 10 ), ( decisecs % 10 ) );
+	printf ( "%s: %ds\n", argv[0], secs );
 
 	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/vlan_cmd.c ipxe-1.0.1~lliurex1505/src/hci/commands/vlan_cmd.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/commands/vlan_cmd.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/commands/vlan_cmd.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -53,6 +52,7 @@
 /** "vcreate" command descriptor */
 static struct command_descriptor vcreate_cmd =
 	COMMAND_DESC ( struct vcreate_options, vcreate_opts, 1, 1,
+		       "--tag <tag> [--priority <priority>] "
 		       "<trunk interface>" );
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/editstring.c ipxe-1.0.1~lliurex1505/src/hci/editstring.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/editstring.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/editstring.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -37,7 +36,6 @@
                                unsigned int character ) __nonnull;
 static void delete_character ( struct edit_string *string ) __nonnull;
 static void backspace ( struct edit_string *string ) __nonnull;
-static void kill_sol ( struct edit_string *string ) __nonnull;
 static void kill_eol ( struct edit_string *string ) __nonnull;
 
 /**
@@ -111,17 +109,6 @@
 }
 
 /**
- * Delete to start of line
- *
- * @v string           Editable string
- */
-static void kill_sol ( struct edit_string *string ) {
-	size_t old_cursor = string->cursor;
-	string->cursor = 0;
-	insert_delete ( string, old_cursor, NULL );
-}
-
-/**
  * Delete to end of line
  *
  * @v string		Editable string
@@ -181,10 +168,6 @@
 		/* Delete character */
 		delete_character ( string );
 		break;
-	case CTRL_U:
-		/* Delete to start of line */
-		kill_sol ( string );
-		break;
 	case CTRL_K:
 		/* Delete to end of line */
 		kill_eol ( string );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/keymap/keymap_no-latin1.c ipxe-1.0.1~lliurex1505/src/hci/keymap/keymap_no-latin1.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/keymap/keymap_no-latin1.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/keymap/keymap_no-latin1.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,34 +0,0 @@
-/** @file
- *
- * "no-latin1" keyboard mapping
- *
- * This file is automatically generated; do not edit
- *
- */
-
-FILE_LICENCE ( PUBLIC_DOMAIN );
-
-#include <ipxe/keymap.h>
-
-/** "no-latin1" keyboard mapping */
-struct key_mapping no_latin1_mapping[] __keymap = {
-	{ 0x26, 0x2f },	/* '&' => '/' */
-	{ 0x28, 0x29 },	/* '(' => ')' */
-	{ 0x29, 0x3d },	/* ')' => '=' */
-	{ 0x2a, 0x28 },	/* '*' => '(' */
-	{ 0x2b, 0x60 },	/* '+' => '`' */
-	{ 0x2d, 0x2b },	/* '-' => '+' */
-	{ 0x2f, 0x2d },	/* '/' => '-' */
-	{ 0x3c, 0x3b },	/* '<' => ';' */
-	{ 0x3d, 0x5c },	/* '=' => '\\' */
-	{ 0x3e, 0x3a },	/* '>' => ':' */
-	{ 0x3f, 0x5f },	/* '?' => '_' */
-	{ 0x40, 0x22 },	/* '@' => '"' */
-	{ 0x5c, 0x27 },	/* '\\' => '\'' */
-	{ 0x5d, 0x7e },	/* ']' => '~' */
-	{ 0x5e, 0x26 },	/* '^' => '&' */
-	{ 0x5f, 0x3f },	/* '_' => '?' */
-	{ 0x60, 0x7c },	/* '`' => '|' */
-	{ 0x7c, 0x2a },	/* '|' => '*' */
-	{ 0x7d, 0x5e },	/* '}' => '^' */
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/linux_args.c ipxe-1.0.1~lliurex1505/src/hci/linux_args.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/linux_args.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/linux_args.c	2012-01-06 23:49:04.000000000 +0000
@@ -45,9 +45,9 @@
 
 /** Supported command-line options */
 static struct option options[] = {
-	{"net", 1, NULL, 'n'},
-	{"settings", 1, NULL, 's'},
-	{NULL, 0, NULL, 0}
+	{"net", 1, 0, 'n'},
+	{"settings", 1, 0, 's'},
+	{0, 0, 0, 0}
 };
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/ansi_screen.c ipxe-1.0.1~lliurex1505/src/hci/mucurses/ansi_screen.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/ansi_screen.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/mucurses/ansi_screen.c	2012-01-06 23:49:04.000000000 +0000
@@ -12,8 +12,6 @@
 unsigned short _COLS = 80;
 unsigned short _LINES = 24;
 
-static unsigned int saved_usage;
-
 static void ansiscr_reset ( struct _curses_screen *scr ) {
 	/* Reset terminal attributes and clear screen */
 	scr->attrs = 0;
@@ -22,16 +20,6 @@
 	printf ( "\033[0m" );
 }
 
-static void ansiscr_init ( struct _curses_screen *scr ) {
-	saved_usage = console_set_usage ( CONSOLE_USAGE_TUI );
-	ansiscr_reset ( scr );
-}
-
-static void ansiscr_exit ( struct _curses_screen *scr ) {
-	ansiscr_reset ( scr );
-	console_set_usage ( saved_usage );
-}
-
 static void ansiscr_movetoyx ( struct _curses_screen *scr,
 			       unsigned int y, unsigned int x ) {
 	if ( ( x != scr->curs_x ) || ( y != scr->curs_y ) ) {
@@ -77,8 +65,8 @@
 }
 
 SCREEN _ansi_screen = {
-	.init		= ansiscr_init,
-	.exit		= ansiscr_exit,
+	.init		= ansiscr_reset,
+	.exit		= ansiscr_reset,
 	.movetoyx	= ansiscr_movetoyx,
 	.putc		= ansiscr_putc,
 	.getc		= ansiscr_getc,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/kb.c ipxe-1.0.1~lliurex1505/src/hci/mucurses/kb.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/kb.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/mucurses/kb.c	2012-01-06 23:49:04.000000000 +0000
@@ -88,7 +88,7 @@
 	int c;
 
 	if ( n == 0 ) {
-		*str = '\0';
+		str = '\0';
 		return OK;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/mucurses.c ipxe-1.0.1~lliurex1505/src/hci/mucurses/mucurses.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/mucurses.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/mucurses/mucurses.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,3 +1,4 @@
+#include <ipxe/console.h>
 #include <curses.h>
 #include "mucurses.h"
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/widgets/editbox.c ipxe-1.0.1~lliurex1505/src/hci/mucurses/widgets/editbox.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/mucurses/widgets/editbox.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/mucurses/widgets/editbox.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/readline.c ipxe-1.0.1~lliurex1505/src/hci/readline.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/readline.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/readline.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -22,7 +21,6 @@
 #include <stdio.h>
 #include <string.h>
 #include <stdlib.h>
-#include <errno.h>
 #include <ipxe/console.h>
 #include <ipxe/keys.h>
 #include <ipxe/editstring.h>
@@ -242,25 +240,20 @@
  * Read line from console (with history)
  *
  * @v prompt		Prompt string
- * @v prefill		Prefill string, or NULL for no prefill
  * @v history		History buffer, or NULL for no history
  * @ret line		Line read from console (excluding terminating newline)
- * @ret rc		Return status code
  *
  * The returned line is allocated with malloc(); the caller must
  * eventually call free() to release the storage.
  */
-int readline_history ( const char *prompt, const char *prefill,
-		       struct readline_history *history, char **line ) {
+char * readline_history ( const char *prompt,
+			  struct readline_history *history ) {
 	char buf[READLINE_MAX];
 	struct edit_string string;
 	int key;
 	int move_by;
 	const char *new_string;
-	int rc;
-
-	/* Avoid returning uninitialised data on error */
-	*line = NULL;
+	char *line;
 
 	/* Display prompt, if applicable */
 	if ( prompt )
@@ -271,12 +264,6 @@
 	init_editstring ( &string, buf, sizeof ( buf ) );
 	buf[0] = '\0';
 
-	/* Prefill string, if applicable */
-	if ( prefill ) {
-		replace_string ( &string, prefill );
-		sync_console ( &string );
-	}
-
 	while ( 1 ) {
 		/* Handle keypress */
 		key = edit_string ( &string, getkey ( 0 ) );
@@ -285,11 +272,12 @@
 		switch ( key ) {
 		case CR:
 		case LF:
-			*line = strdup ( buf );
-			rc = ( ( *line ) ? 0 : -ENOMEM );
+			line = strdup ( buf );
+			if ( ! line )
+				printf ( "\nOut of memory" );
 			goto done;
 		case CTRL_C:
-			rc = -ECANCELED;
+			line = NULL;
 			goto done;
 		case KEY_UP:
 			move_by = 1;
@@ -315,12 +303,11 @@
  done:
 	putchar ( '\n' );
 	if ( history ) {
-		if ( *line && (*line)[0] )
-			history_append ( history, *line );
+		if ( line && line[0] )
+			history_append ( history, line );
 		history_cleanup ( history );
 	}
-	assert ( ( rc == 0 ) ^ ( *line == NULL ) );
-	return rc;
+	return line;
 }
 
 /**
@@ -333,8 +320,5 @@
  * eventually call free() to release the storage.
  */
 char * readline ( const char *prompt ) {
-	char *line;
-
-	readline_history ( prompt, NULL, NULL, &line );
-	return line;
+	return readline_history ( prompt, NULL );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/shell.c ipxe-1.0.1~lliurex1505/src/hci/shell.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/shell.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/shell.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -86,7 +85,7 @@
 
 	/* Read and execute commands */
 	do {
-		readline_history ( shell_prompt, NULL, &history, &line );
+		line = readline_history ( shell_prompt, &history );
 		if ( line ) {
 			rc = system ( line );
 			free ( line );
@@ -107,7 +106,7 @@
 
 /** "shell" command descriptor */
 static struct command_descriptor shell_cmd =
-	COMMAND_DESC ( struct shell_options, shell_opts, 0, 0, NULL );
+	COMMAND_DESC ( struct shell_options, shell_opts, 0, 0, "" );
 
 /**
  * "shell" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/login_ui.c ipxe-1.0.1~lliurex1505/src/hci/tui/login_ui.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/login_ui.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/tui/login_ui.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -33,11 +32,11 @@
 #include <ipxe/editbox.h>
 #include <ipxe/keys.h>
 #include <ipxe/login_ui.h>
-#include <config/colour.h>
 
 /* Colour pairs */
 #define CPAIR_NORMAL		1
-#define CPAIR_EDIT		2
+#define CPAIR_LABEL		2
+#define CPAIR_EDITBOX		3
 
 /* Screen layout */
 #define USERNAME_LABEL_ROW	8
@@ -66,8 +65,9 @@
 	/* Initialise UI */
 	initscr();
 	start_color();
-	init_pair ( CPAIR_NORMAL, COLOR_NORMAL_FG, COLOR_NORMAL_BG );
-	init_pair ( CPAIR_EDIT, COLOR_EDIT_FG, COLOR_EDIT_BG );
+	init_pair ( CPAIR_NORMAL, COLOR_WHITE, COLOR_BLACK );
+	init_pair ( CPAIR_LABEL, COLOR_WHITE, COLOR_BLACK );
+	init_pair ( CPAIR_EDITBOX, COLOR_WHITE, COLOR_BLUE );
 	init_editbox ( &username_box, username, sizeof ( username ), NULL,
 		       USERNAME_ROW, EDITBOX_COL, EDITBOX_WIDTH, 0 );
 	init_editbox ( &password_box, password, sizeof ( password ), NULL,
@@ -75,13 +75,11 @@
 		       EDITBOX_STARS );
 
 	/* Draw initial UI */
-	color_set ( CPAIR_NORMAL, NULL );
 	erase();
-	attron ( A_BOLD );
+	color_set ( CPAIR_LABEL, NULL );
 	mvprintw ( USERNAME_LABEL_ROW, LABEL_COL, "Username:" );
 	mvprintw ( PASSWORD_LABEL_ROW, LABEL_COL, "Password:" );
-	attroff ( A_BOLD );
-	color_set ( CPAIR_EDIT, NULL );
+	color_set ( CPAIR_EDITBOX, NULL );
 	draw_editbox ( &username_box );
 	draw_editbox ( &password_box );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/menu_ui.c ipxe-1.0.1~lliurex1505/src/hci/tui/menu_ui.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/menu_ui.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/tui/menu_ui.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,370 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Menu interface
- *
- */
-
-#include <string.h>
-#include <errno.h>
-#include <curses.h>
-#include <ipxe/keys.h>
-#include <ipxe/timer.h>
-#include <ipxe/console.h>
-#include <ipxe/menu.h>
-#include <config/colour.h>
-
-/* Colour pairs */
-#define CPAIR_NORMAL	1
-#define CPAIR_SELECT	2
-#define CPAIR_SEPARATOR	3
-
-/* Screen layout */
-#define TITLE_ROW	1
-#define MENU_ROW	3
-#define MENU_COL	1
-#define MENU_ROWS	18
-#define MENU_COLS	78
-#define MENU_PAD	2
-
-/** A menu user interface */
-struct menu_ui {
-	/** Menu */
-	struct menu *menu;
-	/** Number of menu items */
-	int count;
-	/** Currently selected item */
-	int selected;
-	/** First visible item */
-	int first_visible;
-	/** Timeout (0=indefinite) */
-	unsigned long timeout;
-};
-
-/**
- * Return a numbered menu item
- *
- * @v menu		Menu
- * @v index		Index
- * @ret item		Menu item, or NULL
- */
-static struct menu_item * menu_item ( struct menu *menu, unsigned int index ) {
-	struct menu_item *item;
-
-	list_for_each_entry ( item, &menu->items, list ) {
-		if ( index-- == 0 )
-			return item;
-	}
-
-	return NULL;
-}
-
-/**
- * Draw a numbered menu item
- *
- * @v ui		Menu user interface
- * @v index		Index
- */
-static void draw_menu_item ( struct menu_ui *ui, int index ) {
-	struct menu_item *item;
-	unsigned int row_offset;
-	char buf[ MENU_COLS + 1 /* NUL */ ];
-	char timeout_buf[6]; /* "(xxx)" + NUL */
-	size_t timeout_len;
-	size_t max_len;
-	size_t len;
-
-	/* Move to start of row */
-	row_offset = ( index - ui->first_visible );
-	move ( ( MENU_ROW + row_offset ), MENU_COL );
-
-	/* Get menu item */
-	item = menu_item ( ui->menu, index );
-	if ( item ) {
-
-		/* Draw separators in a different colour */
-		if ( ! item->label )
-			color_set ( CPAIR_SEPARATOR, NULL );
-
-		/* Highlight if this is the selected item */
-		if ( index == ui->selected ) {
-			color_set ( CPAIR_SELECT, NULL );
-			attron ( A_BOLD );
-		}
-
-		/* Construct row */
-		memset ( buf, ' ', ( sizeof ( buf ) - 1 ) );
-		buf[ sizeof ( buf ) -1 ] = '\0';
-		len = strlen ( item->text );
-		max_len = ( sizeof ( buf ) - 1 /* NUL */ - ( 2 * MENU_PAD ) );
-		if ( len > max_len )
-			len = max_len;
-		memcpy ( ( buf + MENU_PAD ), item->text, len );
-
-		/* Add timeout if applicable */
-		timeout_len =
-			snprintf ( timeout_buf, sizeof ( timeout_buf ), "(%ld)",
-				   ( ( ui->timeout + TICKS_PER_SEC - 1 ) /
-				     TICKS_PER_SEC ) );
-		if ( ( index == ui->selected ) && ( ui->timeout != 0 ) ) {
-			memcpy ( ( buf + MENU_COLS - MENU_PAD - timeout_len ),
-				 timeout_buf, timeout_len );
-		}
-
-		/* Print row */
-		printw ( "%s", buf );
-
-		/* Reset attributes */
-		color_set ( CPAIR_NORMAL, NULL );
-		attroff ( A_BOLD );
-
-	} else {
-		/* Clear row if there is no corresponding menu item */
-		clrtoeol();
-	}
-
-	/* Move cursor back to start of row */
-	move ( ( MENU_ROW + row_offset ), MENU_COL );
-}
-
-/**
- * Draw the current block of menu items
- *
- * @v ui		Menu user interface
- */
-static void draw_menu_items ( struct menu_ui *ui ) {
-	unsigned int i;
-
-	/* Jump scroll to correct point in list */
-	while ( ui->first_visible < ui->selected )
-		ui->first_visible += MENU_ROWS;
-	while ( ui->first_visible > ui->selected )
-		ui->first_visible -= MENU_ROWS;
-
-	/* Draw ellipses before and/or after the list as necessary */
-	color_set ( CPAIR_SEPARATOR, NULL );
-	mvaddstr ( ( MENU_ROW - 1 ), ( MENU_COL + MENU_PAD ),
-		   ( ( ui->first_visible > 0 ) ? "..." : "   " ) );
-	mvaddstr ( ( MENU_ROW + MENU_ROWS ), ( MENU_COL + MENU_PAD ),
-		   ( ( ( ui->first_visible + MENU_ROWS ) < ui->count ) ?
-		     "..." : "   " ) );
-	color_set ( CPAIR_NORMAL, NULL );
-
-	/* Draw visible items */
-	for ( i = 0 ; i < MENU_ROWS ; i++ )
-		draw_menu_item ( ui, ( ui->first_visible + i ) );
-}
-
-/**
- * Menu main loop
- *
- * @v ui		Menu user interface
- * @ret selected	Selected item
- * @ret rc		Return status code
- */
-static int menu_loop ( struct menu_ui *ui, struct menu_item **selected ) {
-	struct menu_item *item;
-	unsigned long timeout;
-	unsigned int delta;
-	int current;
-	int key;
-	int i;
-	int move;
-	int chosen = 0;
-	int rc = 0;
-
-	do {
-		/* Record current selection */
-		current = ui->selected;
-
-		/* Calculate timeout as remainder of current second */
-		timeout = ( ui->timeout % TICKS_PER_SEC );
-		if ( ( timeout == 0 ) && ( ui->timeout != 0 ) )
-			timeout = TICKS_PER_SEC;
-		ui->timeout -= timeout;
-
-		/* Get key */
-		move = 0;
-		key = getkey ( timeout );
-		if ( key < 0 ) {
-			/* Choose default if we finally time out */
-			if ( ui->timeout == 0 )
-				chosen = 1;
-		} else {
-			/* Cancel any timeout */
-			ui->timeout = 0;
-
-			/* Handle key */
-			switch ( key ) {
-			case KEY_UP:
-				move = -1;
-				break;
-			case KEY_DOWN:
-				move = +1;
-				break;
-			case KEY_PPAGE:
-				move = ( ui->first_visible - ui->selected - 1 );
-				break;
-			case KEY_NPAGE:
-				move = ( ui->first_visible - ui->selected
-					 + MENU_ROWS );
-				break;
-			case KEY_HOME:
-				move = -ui->count;
-				break;
-			case KEY_END:
-				move = +ui->count;
-				break;
-			case ESC:
-			case CTRL_C:
-				rc = -ECANCELED;
-				break;
-			case CR:
-			case LF:
-				chosen = 1;
-				break;
-			default:
-				i = 0;
-				list_for_each_entry ( item, &ui->menu->items,
-						      list ) {
-					if ( ! ( item->shortcut &&
-						 ( item->shortcut == key ) ) ) {
-						i++;
-						continue;
-					}
-					ui->selected = i;
-					if ( item->label ) {
-						chosen = 1;
-					} else {
-						move = +1;
-					}
-				}
-				break;
-			}
-		}
-
-		/* Move selection, if applicable */
-		while ( move ) {
-			ui->selected += move;
-			if ( ui->selected < 0 ) {
-				ui->selected = 0;
-				move = +1;
-			} else if ( ui->selected >= ui->count ) {
-				ui->selected = ( ui->count - 1 );
-				move = -1;
-			}
-			item = menu_item ( ui->menu, ui->selected );
-			if ( item->label )
-				break;
-			move = ( ( move > 0 ) ? +1 : -1 );
-		}
-
-		/* Redraw selection if necessary */
-		if ( ( ui->selected != current ) || ( timeout != 0 ) ) {
-			draw_menu_item ( ui, current );
-			delta = ( ui->selected - ui->first_visible );
-			if ( delta >= MENU_ROWS )
-				draw_menu_items ( ui );
-			draw_menu_item ( ui, ui->selected );
-		}
-
-		/* Record selection */
-		item = menu_item ( ui->menu, ui->selected );
-		assert ( item != NULL );
-		assert ( item->label != NULL );
-		*selected = item;
-
-	} while ( ( rc == 0 ) && ! chosen );
-
-	return rc;
-}
-
-/**
- * Show menu
- *
- * @v menu		Menu
- * @v timeout		Timeout period, in ticks (0=indefinite)
- * @ret selected	Selected item
- * @ret rc		Return status code
- */
-int show_menu ( struct menu *menu, unsigned long timeout,
-		const char *select, struct menu_item **selected ) {
-	struct menu_item *item;
-	struct menu_ui ui;
-	char buf[ MENU_COLS + 1 /* NUL */ ];
-	int labelled_count = 0;
-	int rc;
-
-	/* Initialise UI */
-	memset ( &ui, 0, sizeof ( ui ) );
-	ui.menu = menu;
-	ui.timeout = timeout;
-	list_for_each_entry ( item, &menu->items, list ) {
-		if ( item->label ) {
-			if ( ! labelled_count )
-				ui.selected = ui.count;
-			labelled_count++;
-			if ( select ) {
-				if ( strcmp ( select, item->label ) == 0 )
-					ui.selected = ui.count;
-			} else {
-				if ( item->is_default )
-					ui.selected = ui.count;
-			}
-		}
-		ui.count++;
-	}
-	if ( ! labelled_count ) {
-		/* Menus with no labelled items cannot be selected
-		 * from, and will seriously confuse the navigation
-		 * logic.  Refuse to display any such menus.
-		 */
-		return -ENOENT;
-	}
-
-	/* Initialise screen */
-	initscr();
-	start_color();
-	init_pair ( CPAIR_NORMAL, COLOR_NORMAL_FG, COLOR_NORMAL_BG );
-	init_pair ( CPAIR_SELECT, COLOR_SELECT_FG, COLOR_SELECT_BG );
-	init_pair ( CPAIR_SEPARATOR, COLOR_SEPARATOR_FG, COLOR_SEPARATOR_BG );
-	color_set ( CPAIR_NORMAL, NULL );
-	erase();
-
-	/* Draw initial content */
-	attron ( A_BOLD );
-	snprintf ( buf, sizeof ( buf ), "%s", ui.menu->title );
-	mvprintw ( TITLE_ROW, ( ( COLS - strlen ( buf ) ) / 2 ), "%s", buf );
-	attroff ( A_BOLD );
-	draw_menu_items ( &ui );
-	draw_menu_item ( &ui, ui.selected );
-
-	/* Enter main loop */
-	rc = menu_loop ( &ui, selected );
-	assert ( *selected );
-
-	/* Clear screen */
-	endwin();
-
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/settings_ui.c ipxe-1.0.1~lliurex1505/src/hci/tui/settings_ui.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/tui/settings_ui.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/tui/settings_ui.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -29,7 +28,6 @@
 #include <ipxe/editbox.h>
 #include <ipxe/keys.h>
 #include <ipxe/settings_ui.h>
-#include <config/colour.h>
 
 /** @file
  *
@@ -441,7 +439,7 @@
 static void init_widget ( struct setting_widget *widget,
 			  struct settings *settings ) {
 
-	widget->settings = settings_target ( settings );
+	widget->settings = settings;
 	widget->num_rows = select_setting_row ( widget, 0 );
 	widget->first_visible = SETTINGS_LIST_ROWS;
 	draw_title_row ( widget );
@@ -508,25 +506,13 @@
 			key = getkey ( 0 );
 			move = 0;
 			switch ( key ) {
-			case KEY_UP:
-				move = -1;
-				break;
 			case KEY_DOWN:
-				move = +1;
-				break;
-			case KEY_PPAGE:
-				move = ( widget.first_visible -
-					 widget.current - 1 );
-				break;
-			case KEY_NPAGE:
-				move = ( widget.first_visible - widget.current
-					 + SETTINGS_LIST_ROWS );
-				break;
-			case KEY_HOME:
-				move = -widget.num_rows;
+				if ( widget.current < ( widget.num_rows - 1 ) )
+					move = +1;
 				break;
-			case KEY_END:
-				move = +widget.num_rows;
+			case KEY_UP:
+				if ( widget.current > 0 )
+					move = -1;
 				break;
 			case CTRL_D:
 				if ( ! widget.row.setting )
@@ -557,16 +543,10 @@
 			}
 			if ( move ) {
 				next = ( widget.current + move );
-				if ( ( int ) next < 0 )
-					next = 0;
-				if ( next >= widget.num_rows )
-					next = ( widget.num_rows - 1 );
-				if ( next != widget.current ) {
-					draw_setting_row ( &widget );
-					redraw = 1;
-					reveal_setting_row ( &widget, next );
-					select_setting_row ( &widget, next );
-				}
+				draw_setting_row ( &widget );
+				redraw = 1;
+				reveal_setting_row ( &widget, next );
+				select_setting_row ( &widget, next );
 			}
 		}
 	}
@@ -577,11 +557,11 @@
 
 	initscr();
 	start_color();
-	init_pair ( CPAIR_NORMAL, COLOR_NORMAL_FG, COLOR_NORMAL_BG );
-	init_pair ( CPAIR_SELECT, COLOR_SELECT_FG, COLOR_SELECT_BG );
-	init_pair ( CPAIR_EDIT, COLOR_EDIT_FG, COLOR_EDIT_BG );
-	init_pair ( CPAIR_ALERT, COLOR_ALERT_FG, COLOR_ALERT_BG );
-	init_pair ( CPAIR_URL, COLOR_URL_FG, COLOR_URL_BG );
+	init_pair ( CPAIR_NORMAL, COLOR_WHITE, COLOR_BLUE );
+	init_pair ( CPAIR_SELECT, COLOR_WHITE, COLOR_RED );
+	init_pair ( CPAIR_EDIT, COLOR_BLACK, COLOR_CYAN );
+	init_pair ( CPAIR_ALERT, COLOR_WHITE, COLOR_RED );
+	init_pair ( CPAIR_URL, COLOR_CYAN, COLOR_BLUE );
 	color_set ( CPAIR_NORMAL, NULL );
 	erase();
 	
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/hci/wireless_errors.c ipxe-1.0.1~lliurex1505/src/hci/wireless_errors.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/hci/wireless_errors.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/hci/wireless_errors.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/image/efi_image.c ipxe-1.0.1~lliurex1505/src/image/efi_image.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/image/efi_image.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/image/efi_image.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,120 +13,19 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <errno.h>
-#include <stdlib.h>
-#include <wchar.h>
 #include <ipxe/efi/efi.h>
-#include <ipxe/efi/efi_snp.h>
-#include <ipxe/efi/efi_download.h>
-#include <ipxe/efi/efi_file.h>
-#include <ipxe/efi/efi_driver.h>
-#include <ipxe/efi/efi_strings.h>
 #include <ipxe/image.h>
 #include <ipxe/init.h>
 #include <ipxe/features.h>
-#include <ipxe/uri.h>
 
 FEATURE ( FEATURE_IMAGE, "EFI", DHCP_EB_FEATURE_EFI, 1 );
 
-/* Disambiguate the various error causes */
-#define EINFO_EEFI_LOAD							\
-	__einfo_uniqify ( EINFO_EPLATFORM, 0x01,			\
-			  "Could not load image" )
-#define EINFO_EEFI_LOAD_PROHIBITED					\
-	__einfo_platformify ( EINFO_EEFI_LOAD, EFI_SECURITY_VIOLATION,	\
-			      "Image prohibited by security policy" )
-#define EEFI_LOAD_PROHIBITED						\
-	__einfo_error ( EINFO_EEFI_LOAD_PROHIBITED )
-#define EEFI_LOAD( efirc ) EPLATFORM ( EINFO_EEFI_LOAD, efirc,		\
-				       EEFI_LOAD_PROHIBITED )
-#define EINFO_EEFI_START						\
-	__einfo_uniqify ( EINFO_EPLATFORM, 0x02,			\
-			  "Could not start image" )
-#define EEFI_START( efirc ) EPLATFORM ( EINFO_EEFI_START, efirc )
-
-/** EFI loaded image protocol GUID */
-static EFI_GUID efi_loaded_image_protocol_guid =
-	EFI_LOADED_IMAGE_PROTOCOL_GUID;
-
-/**
- * Create device path for image
- *
- * @v image		EFI image
- * @v parent		Parent device path
- * @ret path		Device path, or NULL on failure
- *
- * The caller must eventually free() the device path.
- */
-static EFI_DEVICE_PATH_PROTOCOL *
-efi_image_path ( struct image *image, EFI_DEVICE_PATH_PROTOCOL *parent ) {
-	EFI_DEVICE_PATH_PROTOCOL *path;
-	FILEPATH_DEVICE_PATH *filepath;
-	EFI_DEVICE_PATH_PROTOCOL *end;
-	size_t name_len;
-	size_t prefix_len;
-	size_t filepath_len;
-	size_t len;
-
-	/* Calculate device path lengths */
-	end = efi_devpath_end ( parent );
-	prefix_len = ( ( void * ) end - ( void * ) parent );
-	name_len = strlen ( image->name );
-	filepath_len = ( SIZE_OF_FILEPATH_DEVICE_PATH +
-			 ( name_len + 1 /* NUL */ ) * sizeof ( wchar_t ) );
-	len = ( prefix_len + filepath_len + sizeof ( *end ) );
-
-	/* Allocate device path */
-	path = zalloc ( len );
-	if ( ! path )
-		return NULL;
-
-	/* Construct device path */
-	memcpy ( path, parent, prefix_len );
-	filepath = ( ( ( void * ) path ) + prefix_len );
-	filepath->Header.Type = MEDIA_DEVICE_PATH;
-	filepath->Header.SubType = MEDIA_FILEPATH_DP;
-	filepath->Header.Length[0] = ( filepath_len & 0xff );
-	filepath->Header.Length[1] = ( filepath_len >> 8 );
-	efi_snprintf ( filepath->PathName, ( name_len + 1 /* NUL */ ),
-		       "%s", image->name );
-	end = ( ( ( void * ) filepath ) + filepath_len );
-	end->Type = END_DEVICE_PATH_TYPE;
-	end->SubType = END_ENTIRE_DEVICE_PATH_SUBTYPE;
-	end->Length[0] = sizeof ( *end );
-
-	return path;
-}
-
-/**
- * Create command line for image
- *
- * @v image             EFI image
- * @ret cmdline		Command line, or NULL on failure
- */
-static wchar_t * efi_image_cmdline ( struct image *image ) {
-	wchar_t *cmdline;
-	size_t len;
-
-	len = ( strlen ( image->name ) +
-		( image->cmdline ?
-		  ( 1 /* " " */ + strlen ( image->cmdline ) ) : 0 ) );
-	cmdline = zalloc ( ( len + 1 /* NUL */ ) * sizeof ( wchar_t ) );
-	if ( ! cmdline )
-		return NULL;
-	efi_snprintf ( cmdline, ( len + 1 /* NUL */ ), "%s%s%s",
-		       image->name,
-		       ( image->cmdline ? " " : "" ),
-		       ( image->cmdline ? image->cmdline : "" ) );
-	return cmdline;
-}
-
 /**
  * Execute EFI image
  *
@@ -135,121 +34,35 @@
  */
 static int efi_image_exec ( struct image *image ) {
 	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	struct efi_snp_device *snpdev;
-	EFI_DEVICE_PATH_PROTOCOL *path;
-	union {
-		EFI_LOADED_IMAGE_PROTOCOL *image;
-		void *interface;
-	} loaded;
 	EFI_HANDLE handle;
-	wchar_t *cmdline;
+	UINTN exit_data_size;
+	CHAR16 *exit_data;
 	EFI_STATUS efirc;
 	int rc;
 
-	/* Find an appropriate device handle to use */
-	snpdev = last_opened_snpdev();
-	if ( ! snpdev ) {
-		DBGC ( image, "EFIIMAGE %p could not identify SNP device\n",
-		       image );
-		rc = -ENODEV;
-		goto err_no_snpdev;
-	}
-
-	/* Install file I/O protocols */
-	if ( ( rc = efi_file_install ( &snpdev->handle ) ) != 0 ) {
-		DBGC ( image, "EFIIMAGE %p could not install file protocol: "
-		       "%s\n", image, strerror ( rc ) );
-		goto err_file_install;
-	}
-
-	/* Install iPXE download protocol */
-	if ( ( rc = efi_download_install ( &snpdev->handle ) ) != 0 ) {
-		DBGC ( image, "EFIIMAGE %p could not install iPXE download "
-		       "protocol: %s\n", image, strerror ( rc ) );
-		goto err_download_install;
-	}
-
-	/* Create device path for image */
-	path = efi_image_path ( image, &snpdev->path );
-	if ( ! path ) {
-		DBGC ( image, "EFIIMAGE %p could not create device path\n",
-		       image );
-		rc = -ENOMEM;
-		goto err_image_path;
-	}
-
-	/* Create command line for image */
-	cmdline = efi_image_cmdline ( image );
-	if ( ! cmdline ) {
-		DBGC ( image, "EFIIMAGE %p could not create command line\n",
-		       image );
-		rc = -ENOMEM;
-		goto err_cmdline;
-	}
-
 	/* Attempt loading image */
-	if ( ( efirc = bs->LoadImage ( FALSE, efi_image_handle, path,
+	if ( ( efirc = bs->LoadImage ( FALSE, efi_image_handle, NULL,
 				       user_to_virt ( image->data, 0 ),
 				       image->len, &handle ) ) != 0 ) {
 		/* Not an EFI image */
-		rc = -EEFI_LOAD ( efirc );
 		DBGC ( image, "EFIIMAGE %p could not load: %s\n",
-		       image, strerror ( rc ) );
-		goto err_load_image;
-	}
-
-	/* Get the loaded image protocol for the newly loaded image */
-	efirc = bs->OpenProtocol ( handle, &efi_loaded_image_protocol_guid,
-				   &loaded.interface, efi_image_handle,
-				   NULL, EFI_OPEN_PROTOCOL_GET_PROTOCOL );
-	if ( efirc ) {
-		/* Should never happen */
-		rc = -EEFI ( efirc );
-		goto err_open_protocol;
+		       image, efi_strerror ( efirc ) );
+		return -ENOEXEC;
 	}
 
-	/* Sanity checks */
-	assert ( loaded.image->ParentHandle == efi_image_handle );
-	assert ( loaded.image->DeviceHandle == snpdev->handle );
-	assert ( loaded.image->LoadOptionsSize == 0 );
-	assert ( loaded.image->LoadOptions == NULL );
-
-	/* Set command line */
-	loaded.image->LoadOptions = cmdline;
-	loaded.image->LoadOptionsSize =
-		( ( wcslen ( cmdline ) + 1 /* NUL */ ) * sizeof ( wchar_t ) );
-
 	/* Start the image */
-	if ( ( efirc = bs->StartImage ( handle, NULL, NULL ) ) != 0 ) {
-		rc = -EEFI_START ( efirc );
+	if ( ( efirc = bs->StartImage ( handle, &exit_data_size,
+					&exit_data ) ) != 0 ) {
 		DBGC ( image, "EFIIMAGE %p returned with status %s\n",
-		       image, strerror ( rc ) );
-		goto err_start_image;
+		       image, efi_strerror ( efirc ) );
 	}
+	rc = EFIRC_TO_RC ( efirc );
 
-	/* Success */
-	rc = 0;
-
- err_start_image:
- err_open_protocol:
 	/* Unload the image.  We can't leave it loaded, because we
 	 * have no "unload" operation.
 	 */
-	if ( ( efirc = bs->UnloadImage ( handle ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( image, "EFIIMAGE %p could not unload: %s\n",
-		       image, strerror ( rc ) );
-	}
- err_load_image:
-	free ( cmdline );
- err_cmdline:
-	free ( path );
- err_image_path:
-	efi_download_uninstall ( snpdev->handle );
- err_download_install:
-	efi_file_uninstall ( snpdev->handle );
- err_file_install:
- err_no_snpdev:
+	bs->UnloadImage ( handle );
+
 	return rc;
 }
 
@@ -263,17 +76,15 @@
 	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
 	EFI_HANDLE handle;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* Attempt loading image */
 	if ( ( efirc = bs->LoadImage ( FALSE, efi_image_handle, NULL,
 				       user_to_virt ( image->data, 0 ),
 				       image->len, &handle ) ) != 0 ) {
 		/* Not an EFI image */
-		rc = -EEFI_LOAD ( efirc );
 		DBGC ( image, "EFIIMAGE %p could not load: %s\n",
-		       image, strerror ( rc ) );
-		return rc;
+		       image, efi_strerror ( efirc ) );
+		return -ENOEXEC;
 	}
 
 	/* Unload the image.  We can't leave it loaded, because we
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/image/elf.c ipxe-1.0.1~lliurex1505/src/image/elf.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/image/elf.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/image/elf.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -39,7 +38,6 @@
 typedef Elf32_Ehdr	Elf_Ehdr;
 typedef Elf32_Phdr	Elf_Phdr;
 typedef Elf32_Off	Elf_Off;
-#define ELFCLASS	ELFCLASS32
 
 /**
  * Load ELF segment into memory
@@ -48,14 +46,11 @@
  * @v phdr		ELF program header
  * @v ehdr		ELF executable header
  * @ret entry		Entry point, if found
- * @ret max		Maximum used address
  * @ret rc		Return status code
  */
 static int elf_load_segment ( struct image *image, Elf_Phdr *phdr,
-			      Elf_Ehdr *ehdr, physaddr_t *entry,
-			      physaddr_t *max ) {
+			      Elf_Ehdr *ehdr, physaddr_t *entry ) {
 	physaddr_t dest;
-	physaddr_t end;
 	userptr_t buffer;
 	unsigned long e_offset;
 	int rc;
@@ -83,7 +78,6 @@
 		return -ENOEXEC;
 	}
 	buffer = phys_to_user ( dest );
-	end = ( dest + phdr->p_memsz );
 
 	DBGC ( image, "ELF %p loading segment [%x,%x) to [%x,%x,%x)\n", image,
 	       phdr->p_offset, ( phdr->p_offset + phdr->p_filesz ),
@@ -98,10 +92,6 @@
 		return rc;
 	}
 
-	/* Update maximum used address, if applicable */
-	if ( end > *max )
-		*max = end;
-
 	/* Copy image to segment */
 	memcpy_user ( buffer, 0, image->data, phdr->p_offset, phdr->p_filesz );
 
@@ -128,17 +118,9 @@
  *
  * @v image		ELF file
  * @ret entry		Entry point
- * @ret max		Maximum used address
  * @ret rc		Return status code
  */
-int elf_load ( struct image *image, physaddr_t *entry, physaddr_t *max ) {
-	static const uint8_t e_ident[] = {
-		[EI_MAG0]	= ELFMAG0,
-		[EI_MAG1]	= ELFMAG1,
-		[EI_MAG2]	= ELFMAG2,
-		[EI_MAG3]	= ELFMAG3,
-		[EI_CLASS]	= ELFCLASS,
-	};
+int elf_load ( struct image *image, physaddr_t *entry ) {
 	Elf_Ehdr ehdr;
 	Elf_Phdr phdr;
 	Elf_Off phoff;
@@ -147,15 +129,11 @@
 
 	/* Read ELF header */
 	copy_from_user ( &ehdr, image->data, 0, sizeof ( ehdr ) );
-	if ( memcmp ( &ehdr.e_ident[EI_MAG0], e_ident,
-		      sizeof ( e_ident ) ) != 0 ) {
+	if ( memcmp ( &ehdr.e_ident[EI_MAG0], ELFMAG, SELFMAG ) != 0 ) {
 		DBGC ( image, "ELF %p has invalid signature\n", image );
 		return -ENOEXEC;
 	}
 
-	/* Initialise maximum used address */
-	*max = 0;
-
 	/* Invalidate entry point */
 	*entry = 0;
 
@@ -169,7 +147,7 @@
 		}
 		copy_from_user ( &phdr, image->data, phoff, sizeof ( phdr ) );
 		if ( ( rc = elf_load_segment ( image, &phdr, &ehdr,
-					       entry, max ) ) != 0 ) {
+					       entry ) ) != 0 ) {
 			return rc;
 		}
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/image/script.c ipxe-1.0.1~lliurex1505/src/image/script.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/image/script.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/image/script.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -55,96 +54,43 @@
  * @ret rc		Return status code
  */
 static int process_script ( struct image *image,
-			    int ( * process_line ) ( struct image *image,
-						     size_t offset,
-						     const char *label,
-						     const char *command ),
+			    int ( * process_line ) ( const char *line ),
 			    int ( * terminate ) ( int rc ) ) {
-	size_t len = 0;
-	char *line = NULL;
-	size_t line_offset;
-	char *label;
-	char *command;
 	off_t eol;
-	size_t frag_len;
-	char *tmp;
+	size_t len;
 	int rc;
 
-	/* Initialise script and line offsets */
 	script_offset = 0;
-	line_offset = 0;
 
 	do {
-
+	
 		/* Find length of next line, excluding any terminating '\n' */
 		eol = memchr_user ( image->data, script_offset, '\n',
 				    ( image->len - script_offset ) );
 		if ( eol < 0 )
 			eol = image->len;
-		frag_len = ( eol - script_offset );
-
-		/* Allocate buffer for line */
-		tmp = realloc ( line, ( len + frag_len + 1 /* NUL */ ) );
-		if ( ! tmp ) {
-			rc = -ENOMEM;
-			goto err_alloc;
-		}
-		line = tmp;
-
-		/* Copy line */
-		copy_from_user ( ( line + len ), image->data, script_offset,
-				 frag_len );
-		len += frag_len;
-
-		/* Move to next line in script */
-		script_offset += ( frag_len + 1 );
-
-		/* Strip trailing CR, if present */
-		if ( len && ( line[ len - 1 ] == '\r' ) )
-			len--;
-
-		/* Handle backslash continuations */
-		if ( len && ( line[ len - 1 ] == '\\' ) ) {
-			len--;
-			rc = -EINVAL;
-			continue;
-		}
-
-		/* Terminate line */
-		line[len] = '\0';
+		len = ( eol - script_offset );
 
-		/* Split line into (optional) label and command */
-		command = line;
-		while ( isspace ( *command ) )
-			command++;
-		if ( *command == ':' ) {
-			label = ++command;
-			while ( *command && ! isspace ( *command ) )
-				command++;
-			if ( *command )
-				*(command++) = '\0';
-		} else {
-			label = NULL;
+		/* Copy line, terminate with NUL, and execute command */
+		{
+			char cmdbuf[ len + 1 ];
+
+			copy_from_user ( cmdbuf, image->data,
+					 script_offset, len );
+			cmdbuf[len] = '\0';
+			DBG ( "$ %s\n", cmdbuf );
+
+			/* Move to next line */
+			script_offset += ( len + 1 );
+
+			/* Process line */
+			rc = process_line ( cmdbuf );
+			if ( terminate ( rc ) )
+				return rc;
 		}
 
-		/* Process line */
-		rc = process_line ( image, line_offset, label, command );
-		if ( terminate ( rc ) )
-			goto err_process;
-
-		/* Free line */
-		free ( line );
-		line = NULL;
-		len = 0;
-
-		/* Update line offset */
-		line_offset = script_offset;
-
 	} while ( script_offset < image->len );
 
- err_process:
- err_alloc:
-	free ( line );
 	return rc;
 }
 
@@ -163,21 +109,18 @@
 /**
  * Execute script line
  *
- * @v image		Script
- * @v offset		Offset within script
- * @v label		Label, or NULL
- * @v command		Command
+ * @v line		Line of script
  * @ret rc		Return status code
  */
-static int script_exec_line ( struct image *image, size_t offset,
-			      const char *label __unused,
-			      const char *command ) {
+static int script_exec_line ( const char *line ) {
 	int rc;
 
-	DBGC ( image, "[%04zx] $ %s\n", offset, command );
+	/* Skip label lines */
+	if ( line[0] == ':' )
+		return 0;
 
 	/* Execute command */
-	if ( ( rc = system ( command ) ) != 0 )
+	if ( ( rc = system ( line ) ) != 0 )
 		return rc;
 
 	return 0;
@@ -231,7 +174,7 @@
 
 	/* Sanity check */
 	if ( image->len < sizeof ( test ) ) {
-		DBGC ( image, "Too short to be a script\n" );
+		DBG ( "Too short to be a script\n" );
 		return -ENOEXEC;
 	}
 
@@ -240,7 +183,7 @@
 	if ( ! ( ( ( memcmp ( test, ipxe_magic, sizeof ( test ) - 1 ) == 0 ) ||
 		   ( memcmp ( test, gpxe_magic, sizeof ( test ) - 1 ) == 0 )) &&
 		 isspace ( test[ sizeof ( test ) - 1 ] ) ) ) {
-		DBGC ( image, "Invalid magic signature\n" );
+		DBG ( "Invalid magic signature\n" );
 		return -ENOEXEC;
 	}
 
@@ -274,26 +217,20 @@
 /**
  * Check for presence of label
  *
- * @v image		Script
- * @v offset		Offset within script
- * @v label		Label
- * @v command		Command
+ * @v line		Script line
  * @ret rc		Return status code
  */
-static int goto_find_label ( struct image *image, size_t offset,
-			     const char *label, const char *command __unused ) {
+static int goto_find_label ( const char *line ) {
+	size_t len = strlen ( goto_label );
 
-	/* Check label exists */
-	if ( ! label )
+	if ( line[0] != ':' )
 		return -ENOENT;
 
-	/* Check label matches */
-	if ( strcmp ( goto_label, label ) != 0 )
+	if ( strncmp ( goto_label, &line[1], len ) != 0 )
 		return -ENOENT;
 
-	/* Update script offset */
-	script_offset = offset;
-	DBGC ( image, "[%04zx] Gone to :%s\n", offset, label );
+	if ( line[ 1 + len ] && ! isspace ( line[ 1 + len ] ) )
+		return -ENOENT;
 
 	return 0;
 }
@@ -339,8 +276,6 @@
 	if ( ( rc = process_script ( current_image, goto_find_label,
 				     terminate_on_label_found ) ) != 0 ) {
 		script_offset = saved_offset;
-		DBGC ( current_image, "[%04zx] No such label :%s\n",
-		       script_offset, goto_label );
 		return rc;
 	}
 
@@ -361,21 +296,21 @@
 	/** Key to wait for */
 	unsigned int key;
 	/** Timeout */
-	unsigned long timeout;
+	unsigned int timeout;
 };
 
 /** "prompt" option list */
 static struct option_descriptor prompt_opts[] = {
 	OPTION_DESC ( "key", 'k', required_argument,
-		      struct prompt_options, key, parse_key ),
+		      struct prompt_options, key, parse_integer ),
 	OPTION_DESC ( "timeout", 't', required_argument,
-		      struct prompt_options, timeout, parse_timeout ),
+		      struct prompt_options, timeout, parse_integer ),
 };
 
 /** "prompt" command descriptor */
 static struct command_descriptor prompt_cmd =
 	COMMAND_DESC ( struct prompt_options, prompt_opts, 0, MAX_ARGUMENTS,
-		       "[<text>]" );
+		       "[--key <key>] [--timeout <timeout>] [<text>]" );
 
 /**
  * "prompt" command
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/image/segment.c ipxe-1.0.1~lliurex1505/src/image/segment.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/image/segment.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/image/segment.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/big_bswap.h ipxe-1.0.1~lliurex1505/src/include/big_bswap.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/big_bswap.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/big_bswap.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,8 +1,6 @@
 #ifndef ETHERBOOT_BIG_BSWAP_H
 #define ETHERBOOT_BIG_BSWAP_H
 
-#define htonll(x)	(x)
-#define ntohll(x)	(x)
 #define ntohl(x) 	(x)
 #define htonl(x) 	(x)
 #define ntohs(x) 	(x)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/bootp.h ipxe-1.0.1~lliurex1505/src/include/bootp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/bootp.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/bootp.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,230 @@
+#ifndef	_BOOTP_H
+#define	_BOOTP_H
+
+#ifdef	ALTERNATE_DHCP_PORTS_1067_1068
+#undef	NON_STANDARD_BOOTP_SERVER
+#define	NON_STANDARD_BOOTP_SERVER	1067
+#undef	NON_STANDARD_BOOTP_CLIENT
+#define	NON_STANDARD_BOOTP_CLIENT	1068
+#endif
+
+#ifdef	NON_STANDARD_BOOTP_SERVER
+#define	BOOTP_SERVER	NON_STANDARD_BOOTP_SERVER
+#else
+#define BOOTP_SERVER	67
+#endif
+#ifdef	NON_STANDARD_BOOTP_CLIENT
+#define	BOOTP_CLIENT	NON_STANDARD_BOOTP_CLIENT
+#else
+#define BOOTP_CLIENT	68
+#endif
+#define PROXYDHCP_SERVER	4011 /* For PXE */
+
+#define BOOTP_REQUEST	1
+#define BOOTP_REPLY	2
+
+#define TAG_LEN(p)		(*((p)+1))
+#define RFC1533_COOKIE		99, 130, 83, 99
+#define RFC1533_PAD		0
+#define RFC1533_NETMASK		1
+#define RFC1533_TIMEOFFSET	2
+#define RFC1533_GATEWAY		3
+#define RFC1533_TIMESERVER	4
+#define RFC1533_IEN116NS	5
+#define RFC1533_DNS		6
+#define RFC1533_LOGSERVER	7
+#define RFC1533_COOKIESERVER	8
+#define RFC1533_LPRSERVER	9
+#define RFC1533_IMPRESSSERVER	10
+#define RFC1533_RESOURCESERVER	11
+#define RFC1533_HOSTNAME	12
+#define RFC1533_BOOTFILESIZE	13
+#define RFC1533_MERITDUMPFILE	14
+#define RFC1533_DOMAINNAME	15
+#define RFC1533_SWAPSERVER	16
+#define RFC1533_ROOTPATH	17
+#define RFC1533_EXTENSIONPATH	18
+#define RFC1533_IPFORWARDING	19
+#define RFC1533_IPSOURCEROUTING	20
+#define RFC1533_IPPOLICYFILTER	21
+#define RFC1533_IPMAXREASSEMBLY	22
+#define RFC1533_IPTTL		23
+#define RFC1533_IPMTU		24
+#define RFC1533_IPMTUPLATEAU	25
+#define RFC1533_INTMTU		26
+#define RFC1533_INTLOCALSUBNETS	27
+#define RFC1533_INTBROADCAST	28
+#define RFC1533_INTICMPDISCOVER	29
+#define RFC1533_INTICMPRESPOND	30
+#define RFC1533_INTROUTEDISCOVER 31
+#define RFC1533_INTROUTESOLICIT	32
+#define RFC1533_INTSTATICROUTES	33
+#define RFC1533_LLTRAILERENCAP	34
+#define RFC1533_LLARPCACHETMO	35
+#define RFC1533_LLETHERNETENCAP	36
+#define RFC1533_TCPTTL		37
+#define RFC1533_TCPKEEPALIVETMO	38
+#define RFC1533_TCPKEEPALIVEGB	39
+#define RFC1533_NISDOMAIN	40
+#define RFC1533_NISSERVER	41
+#define RFC1533_NTPSERVER	42
+#define RFC1533_VENDOR		43
+#define RFC1533_NBNS		44
+#define RFC1533_NBDD		45
+#define RFC1533_NBNT		46
+#define RFC1533_NBSCOPE		47
+#define RFC1533_XFS		48
+#define RFC1533_XDM		49
+#ifndef	NO_DHCP_SUPPORT
+#define RFC2132_REQ_ADDR	50
+#define RFC2132_MSG_TYPE	53
+#define RFC2132_SRV_ID		54
+#define RFC2132_PARAM_LIST	55
+#define RFC2132_MAX_SIZE	57
+#define	RFC2132_VENDOR_CLASS_ID	60
+#define RFC2132_CLIENT_ID       61
+#define	RFC2132_TFTP_SERVER_NAME 66
+#define	RFC2132_BOOTFILE_NAME	67
+#define RFC3004_USER_CLASS      77
+
+#ifdef PXE_DHCP_STRICT
+/*
+ * The following options are acknowledged in RFC3679 because they are
+ * widely used by PXE implementations, but have never been properly
+ * allocated. Despite other PXE options being correctly packed in a
+ * vendor encapsulated field, these are exposed. Sigh.  Note that the
+ * client UUID (option 97) is also noted in the PXE spec as using
+ * option 61.
+ */
+#define RFC3679_PXE_CLIENT_ARCH 93
+#define RFC3679_PXE_CLIENT_NDI  94
+#define RFC3679_PXE_CLIENT_UUID 97
+
+/* The lengths are fixed. */
+#define RFC3679_PXE_CLIENT_ARCH_LENGTH 2
+#define RFC3679_PXE_CLIENT_NDI_LENGTH 3
+#define RFC3679_PXE_CLIENT_UUID_LENGTH 17
+
+/*
+ * Values of RFC3679_PXE_CLIENT_ARCH can apparently be one of the
+ * following, according to the PXE spec. The spec only actually
+ * described the 2nd octet, not the first. Duh... assume 0.
+ */
+#define RFC3679_PXE_CLIENT_ARCH_IAX86PC   0,0
+#define RFC3679_PXE_CLIENT_ARCH_NECPC98   0,1
+#define RFC3679_PXE_CLIENT_ARCH_IA64PC    0,2
+#define RFC3679_PXE_CLIENT_ARCH_DECALPHA  0,3
+#define RFC3679_PXE_CLIENT_ARCH_ARCX86    0,4
+#define RFC3679_PXE_CLIENT_ARCH_INTELLEAN 0,5
+
+/* 
+ * Only one valid value of NDI type (must be 1) and UNDI version (must
+ * be 2.1)
+ */
+#define RFC3679_PXE_CLIENT_NDI_21 1,2,1
+
+/*
+ * UUID - type must be 1 and then 16 octets of UID, as with the client ID.
+ * The value is a default for testing only
+ */
+#define RFC3679_PXE_CLIENT_UUID_TYPE 0
+#warning "UUID is a default for testing ONLY!"
+#define RFC3679_PXE_CLIENT_UUID_DEFAULT \
+        RFC3679_PXE_CLIENT_UUID_TYPE, \
+        0xDE,0xAD,0xBE,0xEF, \
+        0xDE,0xAD,0xBE,0xEF, \
+        0xDE,0xAD,0xBE,0xEF, \
+        0xDE,0xAD,0xBE,0xEF
+/*
+ * The Vendor Class ID. Note that the Arch and UNDI version numbers
+ * are fixed and must be same as the ARCH and NDI above.
+ */
+#define RFC2132_VENDOR_CLASS_ID_PXE_LENGTH 32
+#define RFC2132_VENDOR_CLASS_ID_PXE \
+        'P','X','E','C','l','i','e','n','t',':', \
+        'A','r','c','h',':','0','0','0','0','0',':', \
+        'U','N','D','I',':','0','0','2','0','0','1'
+
+/*
+ * The following vendor options are required in the PXE spec to pull
+ * options for the *next* image. The PXE spec doesn't help us with
+ * this (like explaining why).
+ */
+#define RFC1533_VENDOR_PXE_OPT128 128
+#define RFC1533_VENDOR_PXE_OPT129 129
+#define RFC1533_VENDOR_PXE_OPT130 130
+#define RFC1533_VENDOR_PXE_OPT131 131
+#define RFC1533_VENDOR_PXE_OPT132 132
+#define RFC1533_VENDOR_PXE_OPT133 133
+#define RFC1533_VENDOR_PXE_OPT134 134
+#define RFC1533_VENDOR_PXE_OPT135 135
+
+#endif /* PXE_DHCP_STRICT */
+
+#define DHCPDISCOVER		1
+#define DHCPOFFER		2
+#define DHCPREQUEST		3
+#define DHCPACK			5
+#endif	/* NO_DHCP_SUPPORT */
+
+#define RFC1533_VENDOR_MAJOR	0
+#define RFC1533_VENDOR_MINOR	0
+
+#define RFC1533_VENDOR_MAGIC	128
+#define RFC1533_VENDOR_ADDPARM	129
+#define	RFC1533_VENDOR_ETHDEV	130
+/* We should really apply for an official Etherboot encap option */
+#define RFC1533_VENDOR_ETHERBOOT_ENCAP 150
+/* I'll leave it to FREEBSD to decide if they want to renumber */
+#ifdef	IMAGE_FREEBSD
+#define RFC1533_VENDOR_HOWTO    132
+#define RFC1533_VENDOR_KERNEL_ENV    133
+#endif
+#define RFC1533_VENDOR_NIC_DEV_ID 175
+#define RFC1533_VENDOR_ARCH     177
+
+#define RFC1533_END		255
+
+#define BOOTP_VENDOR_LEN	64
+#ifndef	NO_DHCP_SUPPORT
+#define DHCP_OPT_LEN		312
+#endif	/* NO_DHCP_SUPPORT */
+
+/* Format of a bootp packet */
+struct bootp_t {
+	uint8_t  bp_op;
+	uint8_t  bp_htype;
+	uint8_t  bp_hlen;
+	uint8_t  bp_hops;
+	uint32_t bp_xid;
+	uint16_t bp_secs;
+	uint16_t unused;
+	in_addr bp_ciaddr;
+	in_addr bp_yiaddr;
+	in_addr bp_siaddr;
+	in_addr bp_giaddr;
+	uint8_t  bp_hwaddr[16];
+	uint8_t  bp_sname[64];
+	char     bp_file[128];
+#ifdef	NO_DHCP_SUPPORT
+	uint8_t  bp_vend[BOOTP_VENDOR_LEN];
+#else
+	uint8_t  bp_vend[DHCP_OPT_LEN];
+#endif	/* NO_DHCP_SUPPORT */
+};
+
+/* Format of a bootp IP packet */
+struct bootpip_t
+{
+	struct iphdr ip;
+	struct udphdr udp;
+	struct bootp_t bp;
+};
+
+/* Format of bootp packet with extensions */
+struct bootpd_t {
+	struct bootp_t bootp_reply;
+	uint8_t bootp_extension[MAX_BOOTP_EXTLEN];
+};
+
+#endif	/* _BOOTP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/btext.h ipxe-1.0.1~lliurex1505/src/include/btext.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/btext.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/btext.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,62 @@
+/*
+ * This file describes the structure passed from the BootX application
+ * (for MacOS) when it is used to boot Linux.
+ *
+ * Written by Benjamin Herrenschmidt.
+ *  
+ * Move to LinuxBIOS by LYH  yhlu@tyan.com
+ *
+ */
+
+
+#ifndef _BTEXT_H__
+#define _BTEXT_H__
+
+#if 1
+#define u32 unsigned int
+#define u16 unsigned short
+#define u8 unsigned char
+#endif
+
+/* Here are the boot informations that are passed to the bootstrap
+ * Note that the kernel arguments and the device tree are appended
+ * at the end of this structure. */
+typedef struct boot_infos
+{
+
+    /* NEW (vers. 2) this holds the current _logical_ base addr of
+       the frame buffer (for use by early boot message) */
+    u8*       logicalDisplayBase;
+
+
+    /* Some infos about the current MacOS display */
+    u32       dispDeviceRect[4];       /* left,top,right,bottom */
+    u32       dispDeviceDepth;         /* (8, 16 or 32) */
+    u32       dispDeviceBase;          /* base address (physical) */
+    u32       dispDeviceRowBytes;      /* rowbytes (in bytes) */
+    u32       dispDeviceColorsOffset;  /* Colormap (8 bits only) or 0 (*) */
+
+
+    /* The framebuffer size (optional, currently 0) */
+    u32       frameBufferSize;         /* Represents a max size, can be 0. */
+
+
+} boot_infos_t;
+
+/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index is represented
+ * by 3 short words containing a 16 bits (unsigned) color component.
+ * Later versions may contain the gamma table for direct-color devices here.
+ */
+#define BOOTX_COLORTABLE_SIZE    (256UL*3UL*2UL)
+
+
+/*
+ * Definitions for using the procedures in btext.c.
+ *
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ */
+
+extern boot_infos_t disp_bi;
+extern u32 boot_text_mapped;
+
+#endif /* _BTEXT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/compiler.h ipxe-1.0.1~lliurex1505/src/include/compiler.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/compiler.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/compiler.h	2012-01-06 23:49:04.000000000 +0000
@@ -60,15 +60,11 @@
 /** Provide a symbol within this object file */
 #ifdef ASSEMBLY
 #define PROVIDE_SYMBOL( _sym )				\
-	.section ".provided", "a", @nobits ;		\
-	.hidden _sym ;					\
 	.globl	_sym ;					\
-	_sym: ;						\
-	.previous
+	.comm	_sym, 0
 #else /* ASSEMBLY */
 #define PROVIDE_SYMBOL( _sym )				\
-	char _sym[0]					\
-	  __attribute__ (( section ( ".provided" ) ))
+	char _sym[0]
 #endif /* ASSEMBLY */
 
 /** Require a symbol within this object file
@@ -264,9 +260,19 @@
 
 #ifndef ASSEMBLY
 
-/** printf() for debugging */
-extern void __attribute__ (( format ( printf, 1, 2 ) ))
-dbg_printf ( const char *fmt, ... );
+/** printf() for debugging
+ *
+ * This function exists so that the DBG() macros can expand to
+ * printf() calls without dragging the printf() prototype into scope.
+ *
+ * As far as the compiler is concerned, dbg_printf() and printf() are
+ * completely unrelated calls; it's only at the assembly stage that
+ * references to the dbg_printf symbol are collapsed into references
+ * to the printf symbol.
+ */
+extern int __attribute__ (( format ( printf, 1, 2 ) )) 
+dbg_printf ( const char *fmt, ... ) asm ( "printf" );
+
 extern void dbg_autocolourise ( unsigned long id );
 extern void dbg_decolourise ( void );
 extern void dbg_hex_dump_da ( unsigned long dispaddr,
@@ -333,7 +339,6 @@
 				unsigned long ul;		\
 				typeof ( dispaddr ) raw;	\
 			} da;					\
-			da.ul = 0;				\
 			da.raw = dispaddr;			\
 			dbg_hex_dump_da ( da.ul, data, len );	\
 		}						\
@@ -365,7 +370,6 @@
 				unsigned long ul;		\
 				typeof ( dispaddr ) raw;	\
 			} da;					\
-			da.ul = 0;				\
 			da.raw = dispaddr;			\
 			dbg_md5_da ( da.ul, data, len );	\
 		}						\
@@ -417,7 +421,6 @@
 				unsigned long ul;		\
 				typeof ( id ) raw;		\
 			} dbg_stream;				\
-			dbg_stream.ul = 0;			\
 			dbg_stream.raw = id;			\
 			dbg_autocolourise ( dbg_stream.ul );	\
 		}						\
@@ -655,7 +658,7 @@
  * be in the public domain.
  */
 #define FILE_LICENCE_PUBLIC_DOMAIN \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__public_domain__ ) )
+	PROVIDE_SYMBOL ( __licence_public_domain )
 
 /** Declare a file as being under version 2 (or later) of the GNU GPL
  *
@@ -664,7 +667,7 @@
  * (at your option) any later version".
  */
 #define FILE_LICENCE_GPL2_OR_LATER \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl2_or_later__ ) )
+	PROVIDE_SYMBOL ( __licence_gpl2_or_later )
 
 /** Declare a file as being under version 2 of the GNU GPL
  *
@@ -673,7 +676,7 @@
  * "or, at your option, any later version" clause.
  */
 #define FILE_LICENCE_GPL2_ONLY \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl2_only__ ) )
+	PROVIDE_SYMBOL ( __licence_gpl2_only )
 
 /** Declare a file as being under any version of the GNU GPL
  *
@@ -685,7 +688,7 @@
  * version ever published by the Free Software Foundation".
  */
 #define FILE_LICENCE_GPL_ANY \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__gpl_any__ ) )
+	PROVIDE_SYMBOL ( __licence_gpl_any )
 
 /** Declare a file as being under the three-clause BSD licence
  *
@@ -710,7 +713,7 @@
  * functionally equivalent to the standard three-clause BSD licence.
  */
 #define FILE_LICENCE_BSD3 \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__bsd3__ ) )
+	PROVIDE_SYMBOL ( __licence_bsd3 )
 
 /** Declare a file as being under the two-clause BSD licence
  *
@@ -731,7 +734,7 @@
  * functionally equivalent to the standard two-clause BSD licence.
  */
 #define FILE_LICENCE_BSD2 \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__bsd2__ ) )
+	PROVIDE_SYMBOL ( __licence_bsd2 )
 
 /** Declare a file as being under the one-clause MIT-style licence
  *
@@ -741,7 +744,7 @@
  * permission notice appear in all copies.
  */
 #define FILE_LICENCE_MIT \
-	PROVIDE_SYMBOL ( PREFIX_OBJECT ( __licence__mit__ ) )
+	PROVIDE_SYMBOL ( __licence_mit )
 
 /** Declare a particular licence as applying to a file */
 #define FILE_LICENCE( _licence ) FILE_LICENCE_ ## _licence
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/errno.h ipxe-1.0.1~lliurex1505/src/include/errno.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/errno.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/errno.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef ERRNO_H
@@ -30,16 +29,16 @@
  * maximum visibility into the source of an error even in an end-user
  * build with no debugging.  They are constructed as follows:
  *
- * Bits 7-0 : Platform-specific error code
+ * Bits 7-0 : PXE error code
  *
- * This is a losslessly compressed representation of the closest
- * equivalent error code defined by the platform (e.g. BIOS/PXE or
- * EFI).  It is used to generate errors to be returned to external
- * code.
+ * This is the closest equivalent PXE error code
+ * (e.g. PXENV_STATUS_OUT_OF_RESOURCES), and is the only part of the
+ * error that will be returned via the PXE API, since PXE has
+ * predefined error codes.
  *
  * Bits 12-8 : Per-file disambiguator
  *
- * When the same error code can be generated from multiple points
+ * When the same error number can be generated from multiple points
  * within a file, this field can be used to identify the unique
  * instance.
  *
@@ -54,7 +53,7 @@
  *
  * Bit 31 : Reserved
  *
- * Errors are usually return as negative error codes (e.g. -EINVAL);
+ * Errors are usually return as negative error numbers (e.g. -EINVAL);
  * bit 31 is therefore unusable.
  *
  *
@@ -63,10 +62,9 @@
  *
  *     return -EINVAL;
  *
- * By various bits of preprocessor magic, the platform-specific error
- * code and file identifier are already incorporated into the
- * definition of the POSIX error macro, which keeps the code
- * relatively clean.
+ * By various bits of preprocessor magic, the PXE error code and file
+ * identifier are already incorporated into the definition of the
+ * POSIX error macro, which keeps the code relatively clean.
  *
  *
  * Functions that wish to return failures should be declared as
@@ -100,10 +98,6 @@
  *
  */
 
-/* Get definitions for platform-specific error codes */
-#define PLATFORM_ERRNO(_platform) <ipxe/errno/_platform.h>
-#include PLATFORM_ERRNO(PLATFORM)
-
 /* Get definitions for file identifiers */
 #include <ipxe/errfile.h>
 
@@ -115,37 +109,37 @@
 #if ! ERRFILE
 extern char missing_errfile_declaration[] __attribute__ (( deprecated ));
 #undef ERRFILE
-#define ERRFILE ( ( int ) ( 0 * ( ( intptr_t ) missing_errfile_declaration ) ) )
+#define ERRFILE ( 0 * ( ( int ) missing_errfile_declaration ) )
 #endif
 
 /**
  * Declare error information
  *
- * @v platform		Platform error code (uncompressed)
- * @v posix		POSIX error code (0x00-0x7f)
+ * @v pxe		PXE error number (0x00-0xff)
+ * @v posix		POSIX error number (0x00-0x7f)
  * @v uniq		Error disambiguator (0x00-0x1f)
  * @v desc		Error description
  * @ret einfo		Error information
  */
-#define __einfo( platform, posix, uniq, desc ) ( platform, posix, uniq, desc )
+#define __einfo( pxe, posix, uniq, desc ) ( pxe, posix, uniq, desc )
 
 /**
- * Get platform error code
+ * Get PXE error number
  *
  * @v einfo		Error information
- * @ret platform	Platform error code (uncompressed)
+ * @ret pxe		PXE error number
  */
-#define __einfo_platform( einfo ) __einfo_extract_platform einfo
-#define __einfo_extract_platform( platform, posix, uniq, desc ) platform
+#define __einfo_pxe( einfo ) __einfo_extract_pxe einfo
+#define __einfo_extract_pxe( pxe, posix, uniq, desc ) pxe
 
 /**
- * Get POSIX error code
+ * Get POSIX error number
  *
  * @v einfo		Error information
- * @ret posix		POSIX error code
+ * @ret posix		POSIX error number
  */
 #define __einfo_posix( einfo ) __einfo_extract_posix einfo
-#define __einfo_extract_posix( platform, posix, uniq, desc ) posix
+#define __einfo_extract_posix( pxe, posix, uniq, desc ) posix
 
 /**
  * Get error disambiguator
@@ -154,7 +148,7 @@
  * @ret uniq		Error disambiguator
  */
 #define __einfo_uniq( einfo ) __einfo_extract_uniq einfo
-#define __einfo_extract_uniq( platform, posix, uniq, desc ) uniq
+#define __einfo_extract_uniq( pxe, posix, uniq, desc ) uniq
 
 /**
  * Get error description
@@ -163,50 +157,37 @@
  * @ret desc		Error description
  */
 #define __einfo_desc( einfo ) __einfo_extract_desc einfo
-#define __einfo_extract_desc( platform, posix, uniq, desc ) desc
+#define __einfo_extract_desc( pxe, posix, uniq, desc ) desc
 
 /**
  * Declare disambiguated error
  *
  * @v einfo_base	Base error information
- * @v uniq		Error disambiguator (0x00-0x1f)
+ * @v uniq		Error disambiguator
  * @v desc		Error description
  * @ret einfo		Error information
  */
 #define __einfo_uniqify( einfo_base, uniq, desc )			\
-	__einfo ( __einfo_platform ( einfo_base ),			\
+	__einfo ( __einfo_pxe ( einfo_base ),				\
 		  __einfo_posix ( einfo_base ),				\
 		  uniq, desc )
 
 /**
- * Declare platform-generated error
- *
- * @v einfo_base	Base error information
- * @v platform		Platform error code (uncompressed)
- * @v desc		Error description
- * @ret einfo		Error information
- */
-#define __einfo_platformify( einfo_base, platform, desc )		\
-	__einfo ( platform, __einfo_posix ( einfo_base ),		\
-		  __einfo_uniq ( einfo_base ), desc )
-
-/**
- * Get error code
+ * Get error number
  *
  * @v einfo		Error information
- * @ret errno		Error code
+ * @ret errno		Error number
  */
 #define __einfo_errno( einfo )						\
-	( ( int )							\
-	  ( ( __einfo_posix ( einfo ) << 24 ) | ( ERRFILE ) |		\
-	    ( __einfo_uniq ( einfo ) << 8 ) |				\
-	    ( PLATFORM_TO_ERRNO ( __einfo_platform ( einfo ) ) << 0 ) ) )
+	( ( __einfo_posix ( einfo ) << 24 ) | ( ERRFILE ) |		\
+	  ( __einfo_uniq ( einfo ) << 8 ) |				\
+	  ( __einfo_pxe ( einfo ) << 0 ) )
 
 /**
  * Disambiguate a base error based on non-constant information
  *
- * @v einfo_base	Base error information
- * @v uniq		Error disambiguator (0x00-0x1f)
+ * @v error_base	Base error
+ * @v uniq		Error disambiguator
  * @v ...		List of expected possible disambiguated errors
  * @ret error		Error
  *
@@ -218,36 +199,12 @@
  * EUNIQ() should not be used for constant error disambiguators; use
  * __einfo_uniqify() instead.
  */
-#define EUNIQ( einfo_base, uniq, ... ) ( {				\
-	euniq_discard ( 0, ##__VA_ARGS__ );				\
-	( ( int ) ( __einfo_error ( einfo_base ) |			\
-		    ( (uniq) << 8 ) ) ); } )
+#define EUNIQ( errno, uniq, ... ) ( {					\
+	euniq_discard ( 0, ##__VA_ARGS__);				\
+	( ( int ) ( (errno) | ( (uniq) << 8 ) ) ); } )
 static inline void euniq_discard ( int dummy __unused, ... ) {}
 
 /**
- * Generate an error based on an external platform error code
- *
- * @v einfo_base	Base error information
- * @v platform		Platform error code (uncompressed)
- * @v ...		List of expected possible platform-generated errors
- * @ret error		Error
- *
- * EPLATFORM() should be used when a platform error code resulting
- * from an external platform API call is being incorporated into an
- * error.  For example, EFI code uses EPLATFORM() to generate errors
- * resulting from calls to EFI APIs such as
- * InstallMultipleProtocolInterfaces().
- *
- * EPLATFORM() should not be used for constant platform-generated
- * errors; use __einfo_platformify() instead.
- */
-#define EPLATFORM( einfo_base, platform, ... ) ( {			\
-	eplatform_discard ( 0, ##__VA_ARGS__ );				\
-	( ( int ) ( __einfo_error ( einfo_base ) |			\
-		    PLATFORM_TO_ERRNO ( platform ) ) ); } )
-static inline void eplatform_discard ( int dummy __unused, ... ) {}
-
-/**
  * Declare error
  *
  * @v einfo		Error information
@@ -267,11 +224,125 @@
 		  ".align 8\n\t"					\
 		  "\n4:\n\t"						\
 		  ".previous\n\t" : :					\
-		  "i" ( __einfo_errno ( einfo ) ),			\
+		  "i" ( __einfo_errno ( einfo) ),			\
 		  "i" ( __LINE__ ) );					\
 	__einfo_errno ( einfo ); } )
 
 /**
+ * @defgroup pxeerrors PXE error codes
+ *
+ * The names, meanings and values of these error codes are defined by
+ * the PXE specification.
+ *
+ * @{
+ */
+
+/* Generic errors */
+#define	PXENV_STATUS_SUCCESS					       0x0000
+#define	PXENV_STATUS_FAILURE					       0x0001
+#define	PXENV_STATUS_BAD_FUNC					       0x0002
+#define	PXENV_STATUS_UNSUPPORTED				       0x0003
+#define	PXENV_STATUS_KEEP_UNDI					       0x0004
+#define	PXENV_STATUS_KEEP_ALL					       0x0005
+#define	PXENV_STATUS_OUT_OF_RESOURCES				       0x0006
+
+/* ARP errors (0x0010 to 0x001f) */
+#define	PXENV_STATUS_ARP_TIMEOUT				       0x0011
+
+/* Base-Code state errors */
+#define	PXENV_STATUS_UDP_CLOSED					       0x0018
+#define	PXENV_STATUS_UDP_OPEN					       0x0019
+#define	PXENV_STATUS_TFTP_CLOSED				       0x001a
+#define	PXENV_STATUS_TFTP_OPEN					       0x001b
+
+/* BIOS/system errors (0x0020 to 0x002f) */
+#define	PXENV_STATUS_MCOPY_PROBLEM				       0x0020
+#define	PXENV_STATUS_BIS_INTEGRITY_FAILURE			       0x0021
+#define	PXENV_STATUS_BIS_VALIDATE_FAILURE			       0x0022
+#define	PXENV_STATUS_BIS_INIT_FAILURE				       0x0023
+#define	PXENV_STATUS_BIS_SHUTDOWN_FAILURE			       0x0024
+#define	PXENV_STATUS_BIS_GBOA_FAILURE				       0x0025
+#define	PXENV_STATUS_BIS_FREE_FAILURE				       0x0026
+#define	PXENV_STATUS_BIS_GSI_FAILURE				       0x0027
+#define	PXENV_STATUS_BIS_BAD_CKSUM				       0x0028
+
+/* TFTP/MTFTP errors (0x0030 to 0x003f) */
+#define	PXENV_STATUS_TFTP_CANNOT_ARP_ADDRESS			       0x0030
+#define	PXENV_STATUS_TFTP_OPEN_TIMEOUT				       0x0032
+#define	PXENV_STATUS_TFTP_UNKNOWN_OPCODE			       0x0033
+#define	PXENV_STATUS_TFTP_READ_TIMEOUT				       0x0035
+#define	PXENV_STATUS_TFTP_ERROR_OPCODE				       0x0036
+#define	PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION		       0x0038
+#define	PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION		       0x0039
+#define	PXENV_STATUS_TFTP_TOO_MANY_PACKAGES			       0x003a
+#define	PXENV_STATUS_TFTP_FILE_NOT_FOUND			       0x003b
+#define	PXENV_STATUS_TFTP_ACCESS_VIOLATION			       0x003c
+#define	PXENV_STATUS_TFTP_NO_MCAST_ADDRESS			       0x003d
+#define	PXENV_STATUS_TFTP_NO_FILESIZE				       0x003e
+#define	PXENV_STATUS_TFTP_INVALID_PACKET_SIZE			       0x003f
+
+/* Reserved errors 0x0040 to 0x004f) */
+
+/* DHCP/BOOTP errors (0x0050 to 0x005f) */
+#define	PXENV_STATUS_DHCP_TIMEOUT				       0x0051
+#define	PXENV_STATUS_DHCP_NO_IP_ADDRESS				       0x0052
+#define	PXENV_STATUS_DHCP_NO_BOOTFILE_NAME			       0x0053
+#define	PXENV_STATUS_DHCP_BAD_IP_ADDRESS			       0x0054
+
+/* Driver errors (0x0060 to 0x006f) */
+#define	PXENV_STATUS_UNDI_INVALID_FUNCTION			       0x0060
+#define	PXENV_STATUS_UNDI_MEDIATEST_FAILED			       0x0061
+#define	PXENV_STATUS_UNDI_CANNOT_INIT_NIC_FOR_MCAST		       0x0062
+#define	PXENV_STATUS_UNDI_CANNOT_INITIALIZE_NIC			       0x0063
+#define	PXENV_STATUS_UNDI_CANNOT_INITIALIZE_PHY			       0x0064
+#define	PXENV_STATUS_UNDI_CANNOT_READ_CONFIG_DATA		       0x0065
+#define	PXENV_STATUS_UNDI_CANNOT_READ_INIT_DATA			       0x0066
+#define	PXENV_STATUS_UNDI_BAD_MAC_ADDRESS			       0x0067
+#define	PXENV_STATUS_UNDI_BAD_EEPROM_CHECKSUM			       0x0068
+#define	PXENV_STATUS_UNDI_ERROR_SETTING_ISR			       0x0069
+#define	PXENV_STATUS_UNDI_INVALID_STATE				       0x006a
+#define	PXENV_STATUS_UNDI_TRANSMIT_ERROR			       0x006b
+#define	PXENV_STATUS_UNDI_INVALID_PARAMETER			       0x006c
+
+/* ROM and NBP bootstrap errors (0x0070 to 0x007f) */
+#define	PXENV_STATUS_BSTRAP_PROMPT_MENU				       0x0074
+#define	PXENV_STATUS_BSTRAP_MCAST_ADDR				       0x0076
+#define	PXENV_STATUS_BSTRAP_MISSING_LIST			       0x0077
+#define	PXENV_STATUS_BSTRAP_NO_RESPONSE				       0x0078
+#define	PXENV_STATUS_BSTRAP_FILE_TOO_BIG			       0x0079
+
+/* Environment NBP errors (0x0080 to 0x008f) */
+
+/* Reserved errors (0x0090 to 0x009f) */
+
+/* Miscellaneous errors (0x00a0 to 0x00af) */
+#define	PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE			       0x00a0
+#define	PXENV_STATUS_BINL_NO_PXE_SERVER				       0x00a1
+#define	PXENV_STATUS_NOT_AVAILABLE_IN_PMODE			       0x00a2
+#define	PXENV_STATUS_NOT_AVAILABLE_IN_RMODE			       0x00a3
+
+/* BUSD errors (0x00b0 to 0x00bf) */
+#define	PXENV_STATUS_BUSD_DEVICE_NOT_SUPPORTED			       0x00b0
+
+/* Loader errors (0x00c0 to 0x00cf) */
+#define	PXENV_STATUS_LOADER_NO_FREE_BASE_MEMORY			       0x00c0
+#define	PXENV_STATUS_LOADER_NO_BC_ROMID				       0x00c1
+#define	PXENV_STATUS_LOADER_BAD_BC_ROMID			       0x00c2
+#define	PXENV_STATUS_LOADER_BAD_BC_RUNTIME_IMAGE		       0x00c3
+#define	PXENV_STATUS_LOADER_NO_UNDI_ROMID			       0x00c4
+#define	PXENV_STATUS_LOADER_BAD_UNDI_ROMID			       0x00c5
+#define	PXENV_STATUS_LOADER_BAD_UNDI_DRIVER_IMAGE		       0x00c6
+#define	PXENV_STATUS_LOADER_NO_PXE_STRUCT			       0x00c8
+#define	PXENV_STATUS_LOADER_NO_PXENV_STRUCT			       0x00c9
+#define	PXENV_STATUS_LOADER_UNDI_START				       0x00ca
+#define	PXENV_STATUS_LOADER_BC_START				       0x00cb
+
+/** @} */
+
+/** Derive PXENV_STATUS code from iPXE error number */
+#define PXENV_STATUS( rc ) ( (-(rc)) & 0x00ff )
+
+/**
  * @defgroup posixerrors POSIX error codes
  *
  * The names and meanings (but not the values) of these error codes
@@ -282,410 +353,409 @@
 
 /** Operation completed successfully */
 #define ENOERR __einfo_error ( EINFO_ENOERR )
-#define EINFO_ENOERR __einfo ( PLATFORM_ENOERR, 0x00, 0, \
+#define EINFO_ENOERR __einfo ( PXENV_STATUS_SUCCESS, 0x00, 0, \
 			       "Operation completed successfully" )
 
 /** Argument list too long */
 #define E2BIG __einfo_error ( EINFO_E2BIG )
-#define EINFO_E2BIG __einfo ( PLATFORM_E2BIG, 0x01, 0, \
+#define EINFO_E2BIG __einfo ( PXENV_STATUS_BAD_FUNC, 0x01, 0, \
 			      "Argument list too long" )
 
 /** Permission denied */
 #define EACCES __einfo_error ( EINFO_EACCES )
-#define EINFO_EACCES __einfo ( PLATFORM_EACCES, 0x02, 0, \
+#define EINFO_EACCES __einfo ( PXENV_STATUS_TFTP_ACCESS_VIOLATION, 0x02, 0, \
 			       "Permission denied" )
 
 /** Address already in use */
 #define EADDRINUSE __einfo_error ( EINFO_EADDRINUSE )
-#define EINFO_EADDRINUSE __einfo ( PLATFORM_EADDRINUSE, 0x03, 0, \
+#define EINFO_EADDRINUSE __einfo ( PXENV_STATUS_UDP_OPEN, 0x03, 0, \
 				   "Address already in use" )
 
 /** Address not available */
 #define EADDRNOTAVAIL __einfo_error ( EINFO_EADDRNOTAVAIL )
-#define EINFO_EADDRNOTAVAIL __einfo ( PLATFORM_EADDRNOTAVAIL, 0x04, 0, \
+#define EINFO_EADDRNOTAVAIL __einfo ( PXENV_STATUS_UDP_OPEN, 0x04, 0, \
 				      "Address not available" )
 
 /** Address family not supported */
 #define EAFNOSUPPORT __einfo_error ( EINFO_EAFNOSUPPORT )
-#define EINFO_EAFNOSUPPORT __einfo ( PLATFORM_EAFNOSUPPORT, 0x05, 0, \
+#define EINFO_EAFNOSUPPORT __einfo ( PXENV_STATUS_UNSUPPORTED, 0x05, 0, \
 				     "Address family not supported" )
 
 /** Resource temporarily unavailable */
 #define EAGAIN __einfo_error ( EINFO_EAGAIN )
-#define EINFO_EAGAIN __einfo ( PLATFORM_EAGAIN, 0x06, 0, \
+#define EINFO_EAGAIN __einfo ( PXENV_STATUS_FAILURE, 0x06, 0, \
 			       "Resource temporarily unavailable" )
 
 /** Connection already in progress */
 #define EALREADY __einfo_error ( EINFO_EALREADY )
-#define EINFO_EALREADY __einfo ( PLATFORM_EALREADY, 0x07, 0, \
+#define EINFO_EALREADY __einfo ( PXENV_STATUS_UDP_OPEN, 0x07, 0, \
 				 "Connection already in progress" )
 
 /** Bad file descriptor */
 #define EBADF __einfo_error ( EINFO_EBADF )
-#define EINFO_EBADF __einfo ( PLATFORM_EBADF, 0x08, 0, \
+#define EINFO_EBADF __einfo ( PXENV_STATUS_TFTP_CLOSED, 0x08, 0, \
 			      "Bad file descriptor" )
 
 /** Bad message */
 #define EBADMSG __einfo_error ( EINFO_EBADMSG )
-#define EINFO_EBADMSG __einfo ( PLATFORM_EBADMSG, 0x09, 0, \
+#define EINFO_EBADMSG __einfo ( PXENV_STATUS_FAILURE, 0x09, 0, \
 				"Bad message" )
 
 /** Device or resource busy */
 #define EBUSY __einfo_error ( EINFO_EBUSY )
-#define EINFO_EBUSY __einfo ( PLATFORM_EBUSY, 0x0a, 0, \
+#define EINFO_EBUSY __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x0a, 0, \
 			      "Device or resource busy" )
 
 /** Operation canceled */
 #define ECANCELED __einfo_error ( EINFO_ECANCELED )
-#define EINFO_ECANCELED __einfo ( PLATFORM_ECANCELED, 0x0b, 0, \
-				  "Operation canceled" )
+#define EINFO_ECANCELED __einfo ( PXENV_STATUS_BINL_CANCELED_BY_KEYSTROKE, \
+				  0x0b, 0, "Operation canceled" )
 
 /** No child processes */
 #define ECHILD __einfo_error ( EINFO_ECHILD )
-#define EINFO_ECHILD __einfo ( PLATFORM_ECHILD, 0x0c, 0, \
+#define EINFO_ECHILD __einfo ( PXENV_STATUS_TFTP_FILE_NOT_FOUND, 0x0c, 0, \
 			       "No child processes" )
 
 /** Connection aborted */
 #define ECONNABORTED __einfo_error ( EINFO_ECONNABORTED )
-#define EINFO_ECONNABORTED __einfo ( PLATFORM_ECONNABORTED, 0x0d, 0, \
-				     "Connection aborted" )
+#define EINFO_ECONNABORTED						  \
+	__einfo ( PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION, 0x0d, 0, \
+		  "Connection aborted" )
 
 /** Connection refused */
 #define ECONNREFUSED __einfo_error ( EINFO_ECONNREFUSED )
-#define EINFO_ECONNREFUSED __einfo ( PLATFORM_ECONNREFUSED, 0x0e, 0, \
-				     "Connection refused" )
+#define EINFO_ECONNREFUSED __einfo ( PXENV_STATUS_TFTP_CANNOT_OPEN_CONNECTION, \
+				     0x0e, 0, "Connection refused" )
 
 /** Connection reset */
 #define ECONNRESET __einfo_error ( EINFO_ECONNRESET )
-#define EINFO_ECONNRESET __einfo ( PLATFORM_ECONNRESET, 0x0f, 0, \
-				   "Connection reset" )
+#define EINFO_ECONNRESET						  \
+	__einfo ( PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION, 0x0f, 0, \
+		  "Connection reset" )
 
 /** Resource deadlock avoided */
 #define EDEADLK __einfo_error ( EINFO_EDEADLK )
-#define EINFO_EDEADLK __einfo ( PLATFORM_EDEADLK, 0x10, 0, \
+#define EINFO_EDEADLK __einfo ( PXENV_STATUS_FAILURE, 0x10, 0, \
 				"Resource deadlock avoided" )
 
 /** Destination address required */
 #define EDESTADDRREQ __einfo_error ( EINFO_EDESTADDRREQ )
-#define EINFO_EDESTADDRREQ __einfo ( PLATFORM_EDESTADDRREQ, 0x11, 0, \
+#define EINFO_EDESTADDRREQ __einfo ( PXENV_STATUS_BAD_FUNC, 0x11, 0, \
 				     "Destination address required" )
 
 /** Mathematics argument out of domain of function */
 #define EDOM __einfo_error ( EINFO_EDOM )
-#define EINFO_EDOM __einfo ( PLATFORM_EDOM, 0x12, 0, \
+#define EINFO_EDOM __einfo ( PXENV_STATUS_FAILURE, 0x12, 0, \
 			     "Mathematics argument out of domain of function" )
 
 /** Disk quota exceeded */
 #define EDQUOT __einfo_error ( EINFO_EDQUOT )
-#define EINFO_EDQUOT __einfo ( PLATFORM_EDQUOT, 0x13, 0, \
+#define EINFO_EDQUOT __einfo ( PXENV_STATUS_FAILURE, 0x13, 0, \
 			       "Disk quote exceeded" )
 
 /** File exists */
 #define EEXIST __einfo_error ( EINFO_EEXIST )
-#define EINFO_EEXIST __einfo ( PLATFORM_EEXIST, 0x14, 0, \
+#define EINFO_EEXIST __einfo ( PXENV_STATUS_FAILURE, 0x14, 0, \
 			       "File exists" )
 
 /** Bad address */
 #define EFAULT __einfo_error ( EINFO_EFAULT )
-#define EINFO_EFAULT __einfo ( PLATFORM_EFAULT, 0x15, 0, \
+#define EINFO_EFAULT __einfo ( PXENV_STATUS_MCOPY_PROBLEM, 0x15, 0, \
 			       "Bad address" )
 
 /** File too large */
 #define EFBIG __einfo_error ( EINFO_EFBIG )
-#define EINFO_EFBIG __einfo ( PLATFORM_EFBIG, 0x16, 0, \
+#define EINFO_EFBIG __einfo ( PXENV_STATUS_MCOPY_PROBLEM, 0x16, 0, \
 			      "File too large" )
 
 /** Host is unreachable */
 #define EHOSTUNREACH __einfo_error ( EINFO_EHOSTUNREACH )
-#define EINFO_EHOSTUNREACH __einfo ( PLATFORM_EHOSTUNREACH, 0x17, 0, \
+#define EINFO_EHOSTUNREACH __einfo ( PXENV_STATUS_ARP_TIMEOUT, 0x17, 0, \
 				     "Host is unreachable" )
 
 /** Identifier removed */
 #define EIDRM __einfo_error ( EINFO_EIDRM )
-#define EINFO_EIDRM __einfo ( PLATFORM_EIDRM, 0x18, 0, \
+#define EINFO_EIDRM __einfo ( PXENV_STATUS_FAILURE, 0x18, 0, \
 			      "Identifier removed" )
 
 /** Illegal byte sequence */
 #define EILSEQ __einfo_error ( EINFO_EILSEQ )
-#define EINFO_EILSEQ __einfo ( PLATFORM_EILSEQ, 0x19, 0, \
+#define EINFO_EILSEQ __einfo ( PXENV_STATUS_FAILURE, 0x19, 0, \
 			       "Illegal byte sequence" )
 
 /** Operation in progress */
 #define EINPROGRESS __einfo_error ( EINFO_EINPROGRESS )
-#define EINFO_EINPROGRESS __einfo ( PLATFORM_EINPROGRESS, 0x1a, 0, \
+#define EINFO_EINPROGRESS __einfo ( PXENV_STATUS_FAILURE, 0x1a, 0, \
 				    "Operation in progress" )
 
 /** Interrupted function call */
 #define EINTR __einfo_error ( EINFO_EINTR )
-#define EINFO_EINTR __einfo ( PLATFORM_EINTR, 0x1b, 0, \
+#define EINFO_EINTR __einfo ( PXENV_STATUS_FAILURE, 0x1b, 0, \
 			      "Interrupted function call" )
 
 /** Invalid argument */
 #define EINVAL __einfo_error ( EINFO_EINVAL )
-#define EINFO_EINVAL __einfo ( PLATFORM_EINVAL, 0x1c, 0, \
+#define EINFO_EINVAL __einfo ( PXENV_STATUS_BAD_FUNC, 0x1c, 0, \
 			       "Invalid argument" )
 
 /** Input/output error */
 #define EIO __einfo_error ( EINFO_EIO )
-#define EINFO_EIO __einfo ( PLATFORM_EIO, 0x1d, 0, \
-			    "Input/output error" )
+#define EINFO_EIO __einfo ( PXENV_STATUS_TFTP_CANNOT_READ_FROM_CONNECTION, \
+			    0x1d, 0, "Input/output error" )
 
 /** Socket is connected */
 #define EISCONN __einfo_error ( EINFO_EISCONN )
-#define EINFO_EISCONN __einfo ( PLATFORM_EISCONN, 0x1e, 0, \
+#define EINFO_EISCONN __einfo ( PXENV_STATUS_UDP_OPEN, 0x1e, 0, \
 				"Socket is connected" )
 
 /** Is a directory */
 #define EISDIR __einfo_error ( EINFO_EISDIR )
-#define EINFO_EISDIR __einfo ( PLATFORM_EISDIR, 0x1f, 0, \
+#define EINFO_EISDIR __einfo ( PXENV_STATUS_FAILURE, 0x1f, 0, \
 			       "Is a directory" )
 
 /** Too many levels of symbolic links */
 #define ELOOP __einfo_error ( EINFO_ELOOP )
-#define EINFO_ELOOP __einfo ( PLATFORM_ELOOP, 0x20, 0, \
+#define EINFO_ELOOP __einfo ( PXENV_STATUS_FAILURE, 0x20, 0, \
 			      "Too many levels of symbolic links" )
 
 /** Too many open files */
 #define EMFILE __einfo_error ( EINFO_EMFILE )
-#define EINFO_EMFILE __einfo ( PLATFORM_EMFILE, 0x21, 0, \
+#define EINFO_EMFILE __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x21, 0, \
 			       "Too many open files" )
 
 /** Too many links */
 #define EMLINK __einfo_error ( EINFO_EMLINK )
-#define EINFO_EMLINK __einfo ( PLATFORM_EMLINK, 0x22, 0, \
+#define EINFO_EMLINK __einfo ( PXENV_STATUS_FAILURE, 0x22, 0, \
 			       "Too many links" )
 
 /** Message too long */
 #define EMSGSIZE __einfo_error ( EINFO_EMSGSIZE )
-#define EINFO_EMSGSIZE __einfo ( PLATFORM_EMSGSIZE, 0x23, 0, \
+#define EINFO_EMSGSIZE __einfo ( PXENV_STATUS_BAD_FUNC, 0x23, 0, \
 				 "Message too long" )
 
 /** Multihop attempted */
 #define EMULTIHOP __einfo_error ( EINFO_EMULTIHOP )
-#define EINFO_EMULTIHOP __einfo ( PLATFORM_EMULTIHOP, 0x24, 0, \
+#define EINFO_EMULTIHOP __einfo ( PXENV_STATUS_FAILURE, 0x24, 0, \
 				  "Multihop attempted" )
 
 /** Filename too long */
 #define ENAMETOOLONG __einfo_error ( EINFO_ENAMETOOLONG )
-#define EINFO_ENAMETOOLONG __einfo ( PLATFORM_ENAMETOOLONG, 0x25, 0, \
+#define EINFO_ENAMETOOLONG __einfo ( PXENV_STATUS_FAILURE, 0x25, 0, \
 				     "Filename too long" )
 
 /** Network is down */
 #define ENETDOWN __einfo_error ( EINFO_ENETDOWN )
-#define EINFO_ENETDOWN __einfo ( PLATFORM_ENETDOWN, 0x26, 0, \
+#define EINFO_ENETDOWN __einfo ( PXENV_STATUS_ARP_TIMEOUT, 0x26, 0, \
 				 "Network is down" )
 
 /** Connection aborted by network */
 #define ENETRESET __einfo_error ( EINFO_ENETRESET )
-#define EINFO_ENETRESET __einfo ( PLATFORM_ENETRESET, 0x27, 0, \
+#define EINFO_ENETRESET __einfo ( PXENV_STATUS_FAILURE, 0x27, 0, \
 				  "Connection aborted by network" )
 
 /** Network unreachable */
 #define ENETUNREACH __einfo_error ( EINFO_ENETUNREACH )
-#define EINFO_ENETUNREACH __einfo ( PLATFORM_ENETUNREACH, 0x28, 0, \
+#define EINFO_ENETUNREACH __einfo ( PXENV_STATUS_ARP_TIMEOUT, 0x28, 0, \
 				    "Network unreachable" )
 
 /** Too many open files in system */
 #define ENFILE __einfo_error ( EINFO_ENFILE )
-#define EINFO_ENFILE __einfo ( PLATFORM_ENFILE, 0x29, 0, \
+#define EINFO_ENFILE __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x29, 0, \
 			       "Too many open files in system" )
 
 /** No buffer space available */
 #define ENOBUFS __einfo_error ( EINFO_ENOBUFS )
-#define EINFO_ENOBUFS __einfo ( PLATFORM_ENOBUFS, 0x2a, 0, \
+#define EINFO_ENOBUFS __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x2a, 0, \
 				"No buffer space available" )
 
 /** No message is available on the STREAM head read queue */
 #define ENODATA __einfo_error ( EINFO_ENODATA )
-#define EINFO_ENODATA __einfo ( PLATFORM_ENODATA, 0x2b, 0, \
-				"No message is available on the STREAM " \
-				"head read queue" )
+#define EINFO_ENODATA				 \
+	__einfo ( PXENV_STATUS_FAILURE, 0x2b, 0, \
+		  "No message is available on the STREAM head read queue" )
 
 /** No such device */
 #define ENODEV __einfo_error ( EINFO_ENODEV )
-#define EINFO_ENODEV __einfo ( PLATFORM_ENODEV, 0x2c, 0, \
+#define EINFO_ENODEV __einfo ( PXENV_STATUS_TFTP_FILE_NOT_FOUND, 0x2c, 0, \
 			       "No such device" )
 
 /** No such file or directory */
 #define ENOENT __einfo_error ( EINFO_ENOENT )
-#define EINFO_ENOENT __einfo ( PLATFORM_ENOENT, 0x2d, 0, \
+#define EINFO_ENOENT __einfo ( PXENV_STATUS_TFTP_FILE_NOT_FOUND, 0x2d, 0, \
 			       "No such file or directory" )
 
 /** Exec format error */
 #define ENOEXEC __einfo_error ( EINFO_ENOEXEC )
-#define EINFO_ENOEXEC __einfo ( PLATFORM_ENOEXEC, 0x2e, 0, \
+#define EINFO_ENOEXEC __einfo ( PXENV_STATUS_FAILURE, 0x2e, 0, \
 				"Exec format error" )
 
 /** No locks available */
 #define ENOLCK __einfo_error ( EINFO_ENOLCK )
-#define EINFO_ENOLCK __einfo ( PLATFORM_ENOLCK, 0x2f, 0, \
+#define EINFO_ENOLCK __einfo ( PXENV_STATUS_FAILURE, 0x2f, 0, \
 			       "No locks available" )
 
 /** Link has been severed */
 #define ENOLINK __einfo_error ( EINFO_ENOLINK )
-#define EINFO_ENOLINK __einfo ( PLATFORM_ENOLINK, 0x30, 0, \
+#define EINFO_ENOLINK __einfo ( PXENV_STATUS_FAILURE, 0x30, 0, \
 				"Link has been severed" )
 
 /** Not enough space */
 #define ENOMEM __einfo_error ( EINFO_ENOMEM )
-#define EINFO_ENOMEM __einfo ( PLATFORM_ENOMEM, 0x31, 0, \
+#define EINFO_ENOMEM __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x31, 0, \
 			       "Not enough space" )
 
 /** No message of the desired type */
 #define ENOMSG __einfo_error ( EINFO_ENOMSG )
-#define EINFO_ENOMSG __einfo ( PLATFORM_ENOMSG, 0x32, 0, \
+#define EINFO_ENOMSG __einfo ( PXENV_STATUS_FAILURE, 0x32, 0, \
 			       "No message of the desired type" )
 
 /** Protocol not available */
 #define ENOPROTOOPT __einfo_error ( EINFO_ENOPROTOOPT )
-#define EINFO_ENOPROTOOPT __einfo ( PLATFORM_ENOPROTOOPT, 0x33, 0, \
+#define EINFO_ENOPROTOOPT __einfo ( PXENV_STATUS_UNSUPPORTED, 0x33, 0, \
 				    "Protocol not available" )
 
 /** No space left on device */
 #define ENOSPC __einfo_error ( EINFO_ENOSPC )
-#define EINFO_ENOSPC __einfo ( PLATFORM_ENOSPC, 0x34, 0, \
+#define EINFO_ENOSPC __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x34, 0, \
 			       "No space left on device" )
 
 /** No STREAM resources */
 #define ENOSR __einfo_error ( EINFO_ENOSR )
-#define EINFO_ENOSR __einfo ( PLATFORM_ENOSR, 0x35, 0, \
+#define EINFO_ENOSR __einfo ( PXENV_STATUS_OUT_OF_RESOURCES, 0x35, 0, \
 			      "No STREAM resources" )
 
 /** Not a STREAM */
 #define ENOSTR __einfo_error ( EINFO_ENOSTR )
-#define EINFO_ENOSTR __einfo ( PLATFORM_ENOSTR, 0x36, 0, \
+#define EINFO_ENOSTR __einfo ( PXENV_STATUS_FAILURE, 0x36, 0, \
 			       "Not a STREAM" )
 
 /** Function not implemented */
 #define ENOSYS __einfo_error ( EINFO_ENOSYS )
-#define EINFO_ENOSYS __einfo ( PLATFORM_ENOSYS, 0x37, 0, \
+#define EINFO_ENOSYS __einfo ( PXENV_STATUS_UNSUPPORTED, 0x37, 0, \
 			       "Function not implemented" )
 
 /** The socket is not connected */
 #define ENOTCONN __einfo_error ( EINFO_ENOTCONN )
-#define EINFO_ENOTCONN __einfo ( PLATFORM_ENOTCONN, 0x38, 0, \
+#define EINFO_ENOTCONN __einfo ( PXENV_STATUS_FAILURE, 0x38, 0, \
 				 "The socket is not connected" )
 
 /** Not a directory */
 #define ENOTDIR __einfo_error ( EINFO_ENOTDIR )
-#define EINFO_ENOTDIR __einfo ( PLATFORM_ENOTDIR, 0x39, 0, \
+#define EINFO_ENOTDIR __einfo ( PXENV_STATUS_FAILURE, 0x39, 0, \
 				"Not a directory" )
 
 /** Directory not empty */
 #define ENOTEMPTY __einfo_error ( EINFO_ENOTEMPTY )
-#define EINFO_ENOTEMPTY __einfo ( PLATFORM_ENOTEMPTY, 0x3a, 0, \
+#define EINFO_ENOTEMPTY __einfo ( PXENV_STATUS_FAILURE, 0x3a, 0, \
 				  "Directory not empty" )
 
 /** Not a socket */
 #define ENOTSOCK __einfo_error ( EINFO_ENOTSOCK )
-#define EINFO_ENOTSOCK __einfo ( PLATFORM_ENOTSOCK, 0x3b, 0, \
+#define EINFO_ENOTSOCK __einfo ( PXENV_STATUS_FAILURE, 0x3b, 0, \
 				 "Not a socket" )
 
 /** Operation not supported */
 #define ENOTSUP __einfo_error ( EINFO_ENOTSUP )
-#define EINFO_ENOTSUP __einfo ( PLATFORM_ENOTSUP, 0x3c, 0, \
+#define EINFO_ENOTSUP __einfo ( PXENV_STATUS_UNSUPPORTED, 0x3c, 0, \
 				"Operation not supported" )
 
 /** Inappropriate I/O control operation */
 #define ENOTTY __einfo_error ( EINFO_ENOTTY )
-#define EINFO_ENOTTY __einfo ( PLATFORM_ENOTTY, 0x3d, 0, \
+#define EINFO_ENOTTY __einfo ( PXENV_STATUS_FAILURE, 0x3d, 0, \
 			       "Inappropriate I/O control operation" )
 
 /** No such device or address */
 #define ENXIO __einfo_error ( EINFO_ENXIO )
-#define EINFO_ENXIO __einfo ( PLATFORM_ENXIO, 0x3e, 0, \
+#define EINFO_ENXIO __einfo ( PXENV_STATUS_TFTP_FILE_NOT_FOUND, 0x3e, 0, \
 			      "No such device or address" )
 
 /** Operation not supported on socket */
 #define EOPNOTSUPP __einfo_error ( EINFO_EOPNOTSUPP )
-#define EINFO_EOPNOTSUPP __einfo ( PLATFORM_EOPNOTSUPP, 0x3f, 0, \
+#define EINFO_EOPNOTSUPP __einfo ( PXENV_STATUS_UNSUPPORTED, 0x3f, 0, \
 				   "Operation not supported on socket" )
 
 /** Value too large to be stored in data type */
 #define EOVERFLOW __einfo_error ( EINFO_EOVERFLOW )
-#define EINFO_EOVERFLOW __einfo ( PLATFORM_EOVERFLOW, 0x40, 0, \
+#define EINFO_EOVERFLOW __einfo ( PXENV_STATUS_FAILURE, 0x40, 0, \
 				  "Value too large to be stored in data type" )
 
 /** Operation not permitted */
 #define EPERM __einfo_error ( EINFO_EPERM )
-#define EINFO_EPERM __einfo ( PLATFORM_EPERM, 0x41, 0, \
+#define EINFO_EPERM __einfo ( PXENV_STATUS_TFTP_ACCESS_VIOLATION, 0x41, 0, \
 			      "Operation not permitted" )
 
 /** Broken pipe */
 #define EPIPE __einfo_error ( EINFO_EPIPE )
-#define EINFO_EPIPE __einfo ( PLATFORM_EPIPE, 0x42, 0, \
+#define EINFO_EPIPE __einfo ( PXENV_STATUS_FAILURE, 0x42, 0, \
 			      "Broken pipe" )
 
 /** Protocol error */
 #define EPROTO __einfo_error ( EINFO_EPROTO )
-#define EINFO_EPROTO __einfo ( PLATFORM_EPROTO, 0x43, 0, \
+#define EINFO_EPROTO __einfo ( PXENV_STATUS_FAILURE, 0x43, 0, \
 			       "Protocol error" )
 
 /** Protocol not supported */
 #define EPROTONOSUPPORT __einfo_error ( EINFO_EPROTONOSUPPORT )
-#define EINFO_EPROTONOSUPPORT __einfo ( PLATFORM_EPROTONOSUPPORT, 0x44, 0, \
+#define EINFO_EPROTONOSUPPORT __einfo ( PXENV_STATUS_UNSUPPORTED, 0x44, 0, \
 					"Protocol not supported" )
 
 /** Protocol wrong type for socket */
 #define EPROTOTYPE __einfo_error ( EINFO_EPROTOTYPE )
-#define EINFO_EPROTOTYPE __einfo ( PLATFORM_EPROTOTYPE, 0x45, 0, \
+#define EINFO_EPROTOTYPE __einfo ( PXENV_STATUS_FAILURE, 0x45, 0, \
 				   "Protocol wrong type for socket" )
 
 /** Result too large */
 #define ERANGE __einfo_error ( EINFO_ERANGE )
-#define EINFO_ERANGE __einfo ( PLATFORM_ERANGE, 0x46, 0, \
+#define EINFO_ERANGE __einfo ( PXENV_STATUS_FAILURE, 0x46, 0, \
 			       "Result too large" )
 
 /** Read-only file system */
 #define EROFS __einfo_error ( EINFO_EROFS )
-#define EINFO_EROFS __einfo ( PLATFORM_EROFS, 0x47, 0, \
+#define EINFO_EROFS __einfo ( PXENV_STATUS_FAILURE, 0x47, 0, \
 			      "Read-only file system" )
 
 /** Invalid seek */
 #define ESPIPE __einfo_error ( EINFO_ESPIPE )
-#define EINFO_ESPIPE __einfo ( PLATFORM_ESPIPE, 0x48, 0, \
+#define EINFO_ESPIPE __einfo ( PXENV_STATUS_FAILURE, 0x48, 0, \
 			       "Invalid seek" )
 
 /** No such process */
 #define ESRCH __einfo_error ( EINFO_ESRCH )
-#define EINFO_ESRCH __einfo ( PLATFORM_ESRCH, 0x49, 0, \
+#define EINFO_ESRCH __einfo ( PXENV_STATUS_TFTP_FILE_NOT_FOUND, 0x49, 0, \
 			      "No such process" )
 
 /** Stale file handle */
 #define ESTALE __einfo_error ( EINFO_ESTALE )
-#define EINFO_ESTALE __einfo ( PLATFORM_ESTALE, 0x4a, 0, \
+#define EINFO_ESTALE __einfo ( PXENV_STATUS_FAILURE, 0x4a, 0, \
 			       "Stale file handle" )
 
 /** Timer expired */
 #define ETIME __einfo_error ( EINFO_ETIME )
-#define EINFO_ETIME __einfo ( PLATFORM_ETIME, 0x4b, 0, \
+#define EINFO_ETIME __einfo ( PXENV_STATUS_FAILURE, 0x4b, 0, \
 			      "Timer expired" )
 
 /** Connection timed out */
 #define ETIMEDOUT __einfo_error ( EINFO_ETIMEDOUT )
-#define EINFO_ETIMEDOUT __einfo ( PLATFORM_ETIMEDOUT, 0x4c, 0, \
+#define EINFO_ETIMEDOUT __einfo ( PXENV_STATUS_TFTP_READ_TIMEOUT, 0x4c, 0, \
 				  "Connection timed out" )
 
 /** Text file busy */
 #define ETXTBSY __einfo_error ( EINFO_ETXTBSY )
-#define EINFO_ETXTBSY __einfo ( PLATFORM_ETXTBSY, 0x4d, 0, \
+#define EINFO_ETXTBSY __einfo ( PXENV_STATUS_FAILURE, 0x4d, 0, \
 				"Text file busy" )
 
 /** Operation would block */
 #define EWOULDBLOCK __einfo_error ( EINFO_EWOULDBLOCK )
-#define EINFO_EWOULDBLOCK __einfo ( PLATFORM_EWOULDBLOCK, 0x4e, 0, \
+#define EINFO_EWOULDBLOCK __einfo ( PXENV_STATUS_TFTP_OPEN, 0x4e, 0, \
 				    "Operation would block" )
 
 /** Improper link */
 #define EXDEV __einfo_error ( EINFO_EXDEV )
-#define EINFO_EXDEV __einfo ( PLATFORM_EXDEV, 0x4f, 0, \
+#define EINFO_EXDEV __einfo ( PXENV_STATUS_FAILURE, 0x4f, 0, \
 			      "Improper link" )
 
 /** @} */
 
-/** Platform-generated base error */
-#define EINFO_EPLATFORM __einfo ( 0, 0x7f, 0, "Platform-generated error" )
-
 extern int errno;
 
 #endif /* ERRNO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/etherboot.h ipxe-1.0.1~lliurex1505/src/include/etherboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/etherboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/etherboot.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,6 +14,7 @@
 #include <stdio.h>
 #include <unistd.h>
 #include <strings.h>
+#include <ipxe/console.h>
 #include <ipxe/timer.h>
 #include <ipxe/if_arp.h>
 #include <ipxe/if_ether.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/hci/ifmgmt_cmd.h ipxe-1.0.1~lliurex1505/src/include/hci/ifmgmt_cmd.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/hci/ifmgmt_cmd.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/hci/ifmgmt_cmd.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef _IFMGMT_CMD_H
@@ -26,47 +25,13 @@
 
 struct net_device;
 
-/** An "if<xxx>" command descriptor */
-struct ifcommon_command_descriptor {
-	/** Command descriptor */
-	struct command_descriptor cmd;
-	/** Payload
-	 *
-	 * @v netdev		Network device
-	 * @v opts		Command options
-	 * @ret rc		Return status code
-	 */
-	int ( * payload ) ( struct net_device *netdev, void *opts );
-	/** Stop on first success */
-	int stop_on_first_success;
-};
+struct ifcommon_options {};
 
-/**
- * Construct "if<xxx>" command descriptor
- *
- * @v _struct		Options structure type
- * @v _options		Option descriptor array
- * @v _check_args	Remaining argument checker
- * @v _usage		Command usage
- * @ret _command	Command descriptor
- */
-#define IFCOMMON_COMMAND_DESC( _struct, _options, _min_args,		\
-			       _max_args, _usage, _payload,		\
-			       _stop_on_first_success )			\
-	{								\
-		.cmd = COMMAND_DESC ( _struct, _options, _min_args,	\
-				      _max_args, _usage ),		\
-		.payload = ( ( int ( * ) ( struct net_device *netdev,	\
-					   void *opts ) )		\
-			     ( ( ( ( int ( * ) ( struct net_device *,	\
-						 _struct * ) ) NULL )	\
-				 == ( typeof ( _payload ) * ) NULL )	\
-			       ? _payload : _payload ) ),		\
-		.stop_on_first_success = _stop_on_first_success,	\
-	}
+extern struct option_descriptor ifcommon_opts[0];
 
 extern int ifcommon_exec (  int argc, char **argv,
-			    struct ifcommon_command_descriptor *cmd );
-extern int ifconf_exec ( int argc, char **argv );
+			    struct command_descriptor *cmd,
+			    int ( * payload ) ( struct net_device * ),
+			    int stop_on_first_success );
 
 #endif /* _IFMGMT_CMD_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/aes.h ipxe-1.0.1~lliurex1505/src/include/ipxe/aes.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/aes.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/aes.h	2012-01-06 23:49:04.000000000 +0000
@@ -21,10 +21,6 @@
 /** AES context size */
 #define AES_CTX_SIZE sizeof ( struct aes_context )
 
-/* AXTLS functions */
-extern void axtls_aes_encrypt ( const AES_CTX *ctx, uint32_t *data );
-extern void axtls_aes_decrypt ( const AES_CTX *ctx, uint32_t *data );
-
 extern struct cipher_algorithm aes_algorithm;
 extern struct cipher_algorithm aes_cbc_algorithm;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ansiesc.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ansiesc.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ansiesc.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ansiesc.h	2012-01-06 23:49:04.000000000 +0000
@@ -113,13 +113,6 @@
 /** Select graphic rendition */
 #define ANSIESC_SGR 'm'
 
-/** Explicit log message priority
- *
- * This is an iPXE private sequence identifier.  (The range 'p' to '~'
- * is reserved for private sequences.)
- */
-#define ANSIESC_LOG_PRIORITY 'p'
-
 /** @} */
 
 extern int ansiesc_process ( struct ansiesc_context *ctx, int c );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/arp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/arp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/arp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/arp.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,7 +11,6 @@
 
 #include <ipxe/tables.h>
 #include <ipxe/netdevice.h>
-#include <ipxe/neighbour.h>
 
 /** A network-layer protocol that relies upon ARP */
 struct arp_net_protocol {
@@ -35,26 +34,11 @@
 #define __arp_net_protocol __table_entry ( ARP_NET_PROTOCOLS, 01 )
 
 extern struct net_protocol arp_protocol __net_protocol;
-extern struct neighbour_discovery arp_discovery;
 
-/**
- * Transmit packet, determining link-layer address via ARP
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v net_source	Source network-layer address
- * @v ll_source		Source link-layer address
- * @ret rc		Return status code
- */
-static inline int arp_tx ( struct io_buffer *iobuf, struct net_device *netdev,
-			   struct net_protocol *net_protocol,
-			   const void *net_dest, const void *net_source,
-			   const void *ll_source ) {
-
-	return neighbour_tx ( iobuf, netdev, net_protocol, net_dest,
-			      &arp_discovery, net_source, ll_source );
-}
+extern int arp_resolve ( struct net_device *netdev,
+			 struct net_protocol *net_protocol,
+			 const void *dest_net_addr,
+			 const void *source_net_addr,
+			 void *dest_ll_addr );
 
 #endif /* _IPXE_ARP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/asn1.h ipxe-1.0.1~lliurex1505/src/include/ipxe/asn1.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/asn1.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/asn1.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,295 +9,38 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <stdint.h>
-#include <time.h>
-#include <ipxe/tables.h>
-
-/** An ASN.1 object cursor */
-struct asn1_cursor {
-	/** Start of data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-};
-
-/** An ASN.1 object builder */
-struct asn1_builder {
-	/** Data
-	 *
-	 * This is always dynamically allocated.  If @c data is NULL
-	 * while @len is non-zero, this indicates that a memory
-	 * allocation error has occurred during the building process.
-	 */
-	void *data;
-	/** Length of data */
-	size_t len;
-};
-
-/** Maximum (viable) length of ASN.1 length
- *
- * While in theory unlimited, this length is sufficient to contain a
- * size_t.
- */
-#define ASN1_MAX_LEN_LEN ( 1 + sizeof ( size_t ) )
-
-/** An ASN.1 header */
-struct asn1_builder_header {
-	/** Type */
-	uint8_t type;
-	/** Length (encoded) */
-	uint8_t length[ASN1_MAX_LEN_LEN];
-} __attribute__ (( packed ));
-
-/** ASN.1 end */
-#define ASN1_END 0x00
-
-/** ASN.1 boolean */
-#define ASN1_BOOLEAN 0x01
-
-/** ASN.1 integer */
 #define ASN1_INTEGER 0x02
-
-/** ASN.1 bit string */
 #define ASN1_BIT_STRING 0x03
-
-/** ASN.1 octet string */
 #define ASN1_OCTET_STRING 0x04
-
-/** ASN.1 null */
 #define ASN1_NULL 0x05
-
-/** ASN.1 object identifier */
 #define ASN1_OID 0x06
-
-/** ASN.1 enumeration */
-#define ASN1_ENUMERATED 0x0a
-
-/** ASN.1 UTC time */
-#define ASN1_UTC_TIME 0x17
-
-/** ASN.1 generalized time */
-#define ASN1_GENERALIZED_TIME 0x18
-
-/** ASN.1 sequence */
 #define ASN1_SEQUENCE 0x30
+#define ASN1_IP_ADDRESS 0x40
+#define ASN1_EXPLICIT_TAG 0xa0
 
-/** ASN.1 set */
-#define ASN1_SET 0x31
-
-/** ASN.1 implicit tag */
-#define ASN1_IMPLICIT_TAG( number) ( 0x80 | (number) )
-
-/** ASN.1 explicit tag */
-#define ASN1_EXPLICIT_TAG( number) ( 0xa0 | (number) )
-
-/** ASN.1 "any tag" magic value */
-#define ASN1_ANY -1U
-
-/** Initial OID byte */
-#define ASN1_OID_INITIAL( first, second ) ( ( (first) * 40 ) + (second) )
-
-/** Single-byte OID value
- *
- * Valid for values up to 127
- */
-#define ASN1_OID_SINGLE( value ) ( (value) & 0x7f )
-
-/** Double-byte OID value
- *
- * Valid for values up to 16383
- */
-#define ASN1_OID_DOUBLE( value ) \
-	( 0x80 | ( ( (value) >> 7 ) & 0x7f ) ), ASN1_OID_SINGLE ( (value) )
-
-/** Double-byte OID value
- *
- * Valid for values up to 2097151
+/**
+ * A DER-encoded ASN.1 object cursor
  */
-#define ASN1_OID_TRIPLE( value ) \
-	( 0x80 | ( ( (value) >> 14 ) & 0x7f ) ), ASN1_OID_DOUBLE ( (value) )
-
-/** ASN.1 OID for rsaEncryption (1.2.840.113549.1.1.1) */
-#define ASN1_OID_RSAENCRYPTION					\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 1 )
-
-/** ASN.1 OID for md5WithRSAEncryption (1.2.840.113549.1.1.4) */
-#define ASN1_OID_MD5WITHRSAENCRYPTION				\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 4 )
-
-/** ASN.1 OID for sha1WithRSAEncryption (1.2.840.113549.1.1.5) */
-#define ASN1_OID_SHA1WITHRSAENCRYPTION				\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 )
-
-/** ASN.1 OID for sha256WithRSAEncryption (1.2.840.113549.1.1.11) */
-#define ASN1_OID_SHA256WITHRSAENCRYPTION			\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 11 )
-
-/** ASN.1 OID for id-md5 (1.2.840.113549.2.5) */
-#define ASN1_OID_MD5						\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 2 ),	\
-	ASN1_OID_SINGLE ( 5 )
-
-/** ASN.1 OID for id-sha1 (1.3.14.3.2.26) */
-#define ASN1_OID_SHA1						\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 14 ),	\
-	ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 2 ),		\
-	ASN1_OID_SINGLE ( 26 )
-
-/** ASN.1 OID for id-sha256 (2.16.840.1.101.3.4.2.1) */
-#define ASN1_OID_SHA256						\
-	ASN1_OID_INITIAL ( 2, 16 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 101 ),		\
-	ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 4 ),		\
-	ASN1_OID_SINGLE ( 2 ), ASN1_OID_SINGLE ( 1 )
-
-/** ASN.1 OID for commonName (2.5.4.3) */
-#define ASN1_OID_COMMON_NAME					\
-	ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 4 ),	\
-	ASN1_OID_SINGLE ( 3 )
-
-/** ASN.1 OID for id-ce-keyUsage (2.5.29.15) */
-#define ASN1_OID_KEYUSAGE					\
-	ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ),	\
-	ASN1_OID_SINGLE ( 15 )
-
-/** ASN.1 OID for id-ce-basicConstraints (2.5.29.19) */
-#define ASN1_OID_BASICCONSTRAINTS				\
-	ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ),	\
-	ASN1_OID_SINGLE ( 19 )
-
-/** ASN.1 OID for id-ce-extKeyUsage (2.5.29.37) */
-#define ASN1_OID_EXTKEYUSAGE					\
-	ASN1_OID_INITIAL ( 2, 5 ), ASN1_OID_SINGLE ( 29 ),	\
-	ASN1_OID_SINGLE ( 37 )
-
-/** ASN.1 OID for id-kp-codeSigning (1.3.6.1.5.5.7.3.3) */
-#define ASN1_OID_CODESIGNING					\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ),		\
-	ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ),		\
-	ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 3 )
-
-/** ASN.1 OID for pkcs-signedData (1.2.840.113549.1.7.2) */
-#define ASN1_OID_SIGNEDDATA					\
-	ASN1_OID_INITIAL ( 1, 2 ), ASN1_OID_DOUBLE ( 840 ),	\
-	ASN1_OID_TRIPLE ( 113549 ), ASN1_OID_SINGLE ( 1 ),	\
-	ASN1_OID_SINGLE ( 7 ), ASN1_OID_SINGLE ( 2 )
-
-/** ASN.1 OID for id-pe-authorityInfoAccess (1.3.6.1.5.5.7.1.1) */
-#define ASN1_OID_AUTHORITYINFOACCESS				\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ),		\
-	ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ),		\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 1 )
-
-/** ASN.1 OID for id-ad-ocsp (1.3.6.1.5.5.7.48.1) */
-#define ASN1_OID_OCSP						\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ),		\
-	ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ),		\
-	ASN1_OID_SINGLE ( 48 ), ASN1_OID_SINGLE ( 1 )
-
-/** ASN.1 OID for id-pkix-ocsp-basic ( 1.3.6.1.5.5.7.48.1.1) */
-#define ASN1_OID_OCSP_BASIC					\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ),		\
-	ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ),		\
-	ASN1_OID_SINGLE ( 48 ), ASN1_OID_SINGLE ( 1 ),		\
-	ASN1_OID_SINGLE ( 1 )
-
-/** ASN.1 OID for id-kp-OCSPSigning (1.3.6.1.5.5.7.3.9) */
-#define ASN1_OID_OCSPSIGNING					\
-	ASN1_OID_INITIAL ( 1, 3 ), ASN1_OID_SINGLE ( 6 ),	\
-	ASN1_OID_SINGLE ( 1 ), ASN1_OID_SINGLE ( 5 ),		\
-	ASN1_OID_SINGLE ( 5 ), ASN1_OID_SINGLE ( 7 ),		\
-	ASN1_OID_SINGLE ( 3 ), ASN1_OID_SINGLE ( 9 )
-
-/** Define an ASN.1 cursor containing an OID */
-#define ASN1_OID_CURSOR( oid_value ) {				\
-		.data = oid_value,				\
-		.len = sizeof ( oid_value ),			\
-	}
-
-/** An ASN.1 OID-identified algorithm */
-struct asn1_algorithm {
-	/** Name */
-	const char *name;
-	/** Object identifier */
-	struct asn1_cursor oid;
-	/** Public-key algorithm (if applicable) */
-	struct pubkey_algorithm *pubkey;
-	/** Digest algorithm (if applicable) */
-	struct digest_algorithm *digest;
-};
-
-/** ASN.1 OID-identified algorithms */
-#define ASN1_ALGORITHMS __table ( struct asn1_algorithm, "asn1_algorithms" )
-
-/** Declare an ASN.1 OID-identified algorithm */
-#define __asn1_algorithm __table_entry ( ASN1_ALGORITHMS, 01 )
-
-/** An ASN.1 bit string */
-struct asn1_bit_string {
-	/** Data */
-	const void *data;
-	/** Length */
+struct asn1_cursor {
+	/** Start of data */
+	void *data;
+	/** Length of data */
 	size_t len;
-	/** Unused bits at end of data */
-	unsigned int unused;
-} __attribute__ (( packed ));
+};
 
 /**
- * Extract ASN.1 type
+ * Invalidate ASN.1 object cursor
  *
  * @v cursor		ASN.1 object cursor
- * @ret type		Type
  */
-static inline __attribute__ (( always_inline )) unsigned int
-asn1_type ( const struct asn1_cursor *cursor ) {
-	return ( *( ( const uint8_t * ) cursor->data ) );
+static inline __attribute__ (( always_inline )) void
+asn1_invalidate_cursor ( struct asn1_cursor *cursor ) {
+	cursor->len = 0;
 }
 
-extern void asn1_invalidate_cursor ( struct asn1_cursor *cursor );
 extern int asn1_enter ( struct asn1_cursor *cursor, unsigned int type );
 extern int asn1_skip_if_exists ( struct asn1_cursor *cursor,
 				 unsigned int type );
 extern int asn1_skip ( struct asn1_cursor *cursor, unsigned int type );
-extern int asn1_shrink ( struct asn1_cursor *cursor, unsigned int type );
-extern int asn1_enter_any ( struct asn1_cursor *cursor );
-extern int asn1_skip_any ( struct asn1_cursor *cursor );
-extern int asn1_shrink_any ( struct asn1_cursor *cursor );
-extern int asn1_boolean ( const struct asn1_cursor *cursor );
-extern int asn1_integer ( const struct asn1_cursor *cursor, int *value );
-extern int asn1_bit_string ( const struct asn1_cursor *cursor,
-			     struct asn1_bit_string *bits );
-extern int asn1_integral_bit_string ( const struct asn1_cursor *cursor,
-				      struct asn1_bit_string *bits );
-extern int asn1_compare ( const struct asn1_cursor *cursor1,
-			  const struct asn1_cursor *cursor2 );
-extern int asn1_algorithm ( const struct asn1_cursor *cursor,
-			    struct asn1_algorithm **algorithm );
-extern int asn1_pubkey_algorithm ( const struct asn1_cursor *cursor,
-				   struct asn1_algorithm **algorithm );
-extern int asn1_digest_algorithm ( const struct asn1_cursor *cursor,
-				   struct asn1_algorithm **algorithm );
-extern int asn1_signature_algorithm ( const struct asn1_cursor *cursor,
-				      struct asn1_algorithm **algorithm );
-extern int asn1_generalized_time ( const struct asn1_cursor *cursor,
-				   time_t *time );
-extern int asn1_prepend_raw ( struct asn1_builder *builder, const void *data,
-			      size_t len );
-extern int asn1_prepend ( struct asn1_builder *builder, unsigned int type,
-			  const void *data, size_t len );
-extern int asn1_wrap ( struct asn1_builder *builder, unsigned int type );
 
 #endif /* _IPXE_ASN1_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/base16.h ipxe-1.0.1~lliurex1505/src/include/ipxe/base16.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/base16.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/base16.h	2012-01-06 23:49:04.000000000 +0000
@@ -33,8 +33,6 @@
 }
 
 extern void base16_encode ( const uint8_t *raw, size_t len, char *encoded );
-extern int hex_decode ( const char *string, char separator, void *data,
-			size_t len );
 extern int base16_decode ( const char *encoded, uint8_t *raw );
 
 #endif /* _IPXE_BASE16_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bigint.h ipxe-1.0.1~lliurex1505/src/include/ipxe/bigint.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bigint.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/bigint.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,301 +0,0 @@
-#ifndef _IPXE_BIGINT_H
-#define _IPXE_BIGINT_H
-
-/** @file
- *
- * Big integer support
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * Define a big-integer type
- *
- * @v size		Number of elements
- * @ret bigint_t	Big integer type
- */
-#define bigint_t( size )						\
-	struct {							\
-		bigint_element_t element[ (size) ];			\
-	}
-
-/**
- * Determine number of elements required for a big-integer type
- *
- * @v len		Maximum length of big integer, in bytes
- * @ret size		Number of elements
- */
-#define bigint_required_size( len )					\
-	( ( (len) + sizeof ( bigint_element_t ) - 1 ) /			\
-	  sizeof ( bigint_element_t ) )
-
-/**
- * Determine number of elements in big-integer type
- *
- * @v bigint		Big integer
- * @ret size		Number of elements
- */
-#define bigint_size( bigint )						\
-	( sizeof ( *(bigint) ) / sizeof ( (bigint)->element[0] ) )
-
-/**
- * Initialise big integer
- *
- * @v value		Big integer to initialise
- * @v data		Raw data
- * @v len		Length of raw data
- */
-#define bigint_init( value, data, len ) do {				\
-	unsigned int size = bigint_size (value);			\
-	assert ( (len) <= ( size * sizeof ( (value)->element[0] ) ) );	\
-	bigint_init_raw ( (value)->element, size, (data), (len) );	\
-	} while ( 0 )
-
-/**
- * Finalise big integer
- *
- * @v value		Big integer to finalise
- * @v out		Output buffer
- * @v len		Length of output buffer
- */
-#define bigint_done( value, out, len ) do {				\
-	unsigned int size = bigint_size (value);			\
-	bigint_done_raw ( (value)->element, size, (out), (len) );	\
-	} while ( 0 )
-
-/**
- * Add big integers
- *
- * @v addend		Big integer to add
- * @v value		Big integer to be added to
- */
-#define bigint_add( addend, value ) do {				\
-	unsigned int size = bigint_size (addend);			\
-	bigint_add_raw ( (addend)->element, (value)->element, size );	\
-	} while ( 0 )
-
-/**
- * Subtract big integers
- *
- * @v subtrahend	Big integer to subtract
- * @v value		Big integer to be subtracted from
- */
-#define bigint_subtract( subtrahend, value ) do {			\
-	unsigned int size = bigint_size (subtrahend);			\
-	bigint_subtract_raw ( (subtrahend)->element, (value)->element,	\
-			      size );					\
-	} while ( 0 )
-
-/**
- * Rotate big integer left
- *
- * @v value		Big integer
- */
-#define bigint_rol( value ) do {					\
-	unsigned int size = bigint_size (value);			\
-	bigint_rol_raw ( (value)->element, size );			\
-	} while ( 0 )
-
-/**
- * Rotate big integer right
- *
- * @v value		Big integer
- */
-#define bigint_ror( value ) do {					\
-	unsigned int size = bigint_size (value);			\
-	bigint_ror_raw ( (value)->element, size );			\
-	} while ( 0 )
-
-/**
- * Test if big integer is equal to zero
- *
- * @v value		Big integer
- * @v size		Number of elements
- * @ret is_zero		Big integer is equal to zero
- */
-#define bigint_is_zero( value ) ( {					\
-	unsigned int size = bigint_size (value);			\
-	bigint_is_zero_raw ( (value)->element, size ); } )
-
-/**
- * Compare big integers
- *
- * @v value		Big integer
- * @v reference		Reference big integer
- * @ret geq		Big integer is greater than or equal to the reference
- */
-#define bigint_is_geq( value, reference ) ( {				\
-	unsigned int size = bigint_size (value);			\
-	bigint_is_geq_raw ( (value)->element, (reference)->element,	\
-			    size ); } )
-
-/**
- * Test if bit is set in big integer
- *
- * @v value		Big integer
- * @v bit		Bit to test
- * @ret is_set		Bit is set
- */
-#define bigint_bit_is_set( value, bit ) ( {				\
-	unsigned int size = bigint_size (value);			\
-	bigint_bit_is_set_raw ( (value)->element, size, bit ); } )
-
-/**
- * Find highest bit set in big integer
- *
- * @v value		Big integer
- * @ret max_bit		Highest bit set + 1 (or 0 if no bits set)
- */
-#define bigint_max_set_bit( value ) ( {					\
-	unsigned int size = bigint_size (value);			\
-	bigint_max_set_bit_raw ( (value)->element, size ); } )
-
-/**
- * Grow big integer
- *
- * @v source		Source big integer
- * @v dest		Destination big integer
- */
-#define bigint_grow( source, dest ) do {				\
-	unsigned int source_size = bigint_size (source);		\
-	unsigned int dest_size = bigint_size (dest);			\
-	bigint_grow_raw ( (source)->element, source_size,		\
-			  (dest)->element, dest_size );			\
-	} while ( 0 )
-
-/**
- * Shrink big integer
- *
- * @v source		Source big integer
- * @v dest		Destination big integer
- */
-#define bigint_shrink( source, dest ) do {				\
-	unsigned int source_size = bigint_size (source);		\
-	unsigned int dest_size = bigint_size (dest);			\
-	bigint_shrink_raw ( (source)->element, source_size,		\
-			    (dest)->element, dest_size );		\
-	} while ( 0 )
-
-/**
- * Multiply big integers
- *
- * @v multiplicand	Big integer to be multiplied
- * @v multiplier	Big integer to be multiplied
- * @v result		Big integer to hold result
- */
-#define bigint_multiply( multiplicand, multiplier, result ) do {	\
-	unsigned int size = bigint_size (multiplicand);			\
-	bigint_multiply_raw ( (multiplicand)->element,			\
-			      (multiplier)->element, (result)->element,	\
-			      size );					\
-	} while ( 0 )
-
-/**
- * Perform modular multiplication of big integers
- *
- * @v multiplicand	Big integer to be multiplied
- * @v multiplier	Big integer to be multiplied
- * @v modulus		Big integer modulus
- * @v result		Big integer to hold result
- * @v tmp		Temporary working space
- */
-#define bigint_mod_multiply( multiplicand, multiplier, modulus,		\
-			     result, tmp ) do {				\
-	unsigned int size = bigint_size (multiplicand);			\
-	bigint_mod_multiply_raw ( (multiplicand)->element,		\
-				  (multiplier)->element,		\
-				  (modulus)->element,			\
-				  (result)->element, size, tmp );	\
-	} while ( 0 )
-
-/**
- * Calculate temporary working space required for moduluar multiplication
- *
- * @v modulus		Big integer modulus
- * @ret len		Length of temporary working space
- */
-#define bigint_mod_multiply_tmp_len( modulus ) ( {			\
-	unsigned int size = bigint_size (modulus);			\
-	sizeof ( struct {						\
-		bigint_t ( size * 2 ) temp_result;			\
-		bigint_t ( size * 2 ) temp_modulus;			\
-	} ); } )
-
-/**
- * Perform modular exponentiation of big integers
- *
- * @v base		Big integer base
- * @v modulus		Big integer modulus
- * @v exponent		Big integer exponent
- * @v result		Big integer to hold result
- * @v tmp		Temporary working space
- */
-#define bigint_mod_exp( base, modulus, exponent, result, tmp ) do {	\
-	unsigned int size = bigint_size (base);				\
-	unsigned int exponent_size = bigint_size (exponent);		\
-	bigint_mod_exp_raw ( (base)->element, (modulus)->element,	\
-			     (exponent)->element, (result)->element,	\
-			     size, exponent_size, tmp );		\
-	} while ( 0 )
-
-/**
- * Calculate temporary working space required for moduluar exponentiation
- *
- * @v modulus		Big integer modulus
- * @v exponent		Big integer exponent
- * @ret len		Length of temporary working space
- */
-#define bigint_mod_exp_tmp_len( modulus, exponent ) ( {			\
-	unsigned int size = bigint_size (modulus);			\
-	unsigned int exponent_size = bigint_size (exponent);		\
-	size_t mod_multiply_len =					\
-		bigint_mod_multiply_tmp_len (modulus);			\
-	sizeof ( struct {						\
-		bigint_t ( size ) temp_base;				\
-		bigint_t ( exponent_size ) temp_exponent;		\
-		uint8_t mod_multiply[mod_multiply_len];			\
-	} ); } )
-
-#include <bits/bigint.h>
-
-void bigint_init_raw ( bigint_element_t *value0, unsigned int size,
-		       const void *data, size_t len );
-void bigint_done_raw ( const bigint_element_t *value0, unsigned int size,
-		       void *out, size_t len );
-void bigint_add_raw ( const bigint_element_t *addend0,
-		      bigint_element_t *value0, unsigned int size );
-void bigint_subtract_raw ( const bigint_element_t *subtrahend0,
-			   bigint_element_t *value0, unsigned int size );
-void bigint_rol_raw ( bigint_element_t *value0, unsigned int size );
-void bigint_ror_raw ( bigint_element_t *value0, unsigned int size );
-int bigint_is_zero_raw ( const bigint_element_t *value0, unsigned int size );
-int bigint_is_geq_raw ( const bigint_element_t *value0,
-			const bigint_element_t *reference0,
-			unsigned int size );
-int bigint_bit_is_set_raw ( const bigint_element_t *value0, unsigned int size,
-			    unsigned int bit );
-int bigint_max_set_bit_raw ( const bigint_element_t *value0,
-			     unsigned int size );
-void bigint_grow_raw ( const bigint_element_t *source0,
-		       unsigned int source_size, bigint_element_t *dest0,
-		       unsigned int dest_size );
-void bigint_shrink_raw ( const bigint_element_t *source0,
-			 unsigned int source_size, bigint_element_t *dest0,
-			 unsigned int dest_size );
-void bigint_multiply_raw ( const bigint_element_t *multiplicand0,
-			   const bigint_element_t *multiplier0,
-			   bigint_element_t *result0,
-			   unsigned int size );
-void bigint_mod_multiply_raw ( const bigint_element_t *multiplicand0,
-			       const bigint_element_t *multiplier0,
-			       const bigint_element_t *modulus0,
-			       bigint_element_t *result0,
-			       unsigned int size, void *tmp );
-void bigint_mod_exp_raw ( const bigint_element_t *base0,
-			  const bigint_element_t *modulus0,
-			  const bigint_element_t *exponent0,
-			  bigint_element_t *result0,
-			  unsigned int size, unsigned int exponent_size,
-			  void *tmp );
-
-#endif /* _IPXE_BIGINT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bitbash.h ipxe-1.0.1~lliurex1505/src/include/ipxe/bitbash.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bitbash.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/bitbash.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,18 +14,6 @@
 /** Bit-bashing operations */
 struct bit_basher_operations {
 	/**
-	 * Open bit-bashing interface (optional)
-	 *
-	 * @v basher		Bit-bashing interface
-	 */
-	void ( * open ) ( struct bit_basher *basher );
-	/**
-	 * Close bit-bashing interface (optional)
-	 *
-	 * @v basher		Bit-bashing interface
-	 */
-	void ( * close ) ( struct bit_basher *basher );
-	/**
 	 * Set/clear output bit
 	 *
 	 * @v basher		Bit-bashing interface
@@ -57,26 +45,6 @@
 	struct bit_basher_operations *op;
 };
 
-/**
- * Open bit-bashing interface
- *
- * @v basher		Bit-bashing interface
- */
-static inline void open_bit ( struct bit_basher *basher ) {
-	if ( basher->op->open )
-		basher->op->open ( basher );
-}
-
-/**
- * Close bit-bashing interface
- *
- * @v basher		Bit-bashing interface
- */
-static inline void close_bit ( struct bit_basher *basher ) {
-	if ( basher->op->close )
-		basher->op->close ( basher );
-}
-
 extern void write_bit ( struct bit_basher *basher, unsigned int bit_id,
 			unsigned long data );
 extern int read_bit ( struct bit_basher *basher, unsigned int bit_id );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bitops.h ipxe-1.0.1~lliurex1505/src/include/ipxe/bitops.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/bitops.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/bitops.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/clientcert.h ipxe-1.0.1~lliurex1505/src/include/ipxe/clientcert.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/clientcert.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/clientcert.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,43 +0,0 @@
-#ifndef _IPXE_CLIENTCERT_H
-#define _IPXE_CLIENTCERT_H
-
-/** @file
- *
- * Client certificate store
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-/** A client certificate */
-struct client_certificate {
-	/** Data */
-	const void *data;
-	/** Length */
-	size_t len;
-};
-
-/** A client private key */
-struct client_private_key {
-	/** Data */
-	const void *data;
-	/** Length */
-	size_t len;
-};
-
-extern struct client_certificate client_certificate;
-extern struct client_private_key client_private_key;
-
-/**
- * Check for presence of a client certificate
- *
- * @ret have_cert	We have a client certificate and private key
- */
-static inline int have_client_certificate ( void ) {
-	return ( ( client_certificate.len > 0 ) &&
-		 ( client_private_key.len > 0 ) );
-}
-
-#endif /* _IPXE_CLIENTCERT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/cms.h ipxe-1.0.1~lliurex1505/src/include/ipxe/cms.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/cms.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/cms.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,75 +0,0 @@
-#ifndef _IPXE_CMS_H
-#define _IPXE_CMS_H
-
-/** @file
- *
- * Cryptographic Message Syntax (PKCS #7)
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <time.h>
-#include <ipxe/asn1.h>
-#include <ipxe/crypto.h>
-#include <ipxe/x509.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/uaccess.h>
-
-/** CMS signer information */
-struct cms_signer_info {
-	/** List of signer information blocks */
-	struct list_head list;
-
-	/** Certificate chain */
-	struct x509_chain *chain;
-
-	/** Digest algorithm */
-	struct digest_algorithm *digest;
-	/** Public-key algorithm */
-	struct pubkey_algorithm *pubkey;
-
-	/** Signature */
-	void *signature;
-	/** Length of signature */
-	size_t signature_len;
-};
-
-/** A CMS signature */
-struct cms_signature {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** List of all certificates */
-	struct x509_chain *certificates;
-	/** List of signer information blocks */
-	struct list_head info;
-};
-
-/**
- * Get reference to CMS signature
- *
- * @v sig		CMS signature
- * @ret sig		CMS signature
- */
-static inline __attribute__ (( always_inline )) struct cms_signature *
-cms_get ( struct cms_signature *sig ) {
-	ref_get ( &sig->refcnt );
-	return sig;
-}
-
-/**
- * Drop reference to CMS signature
- *
- * @v sig		CMS signature
- */
-static inline __attribute__ (( always_inline )) void
-cms_put ( struct cms_signature *sig ) {
-	ref_put ( &sig->refcnt );
-}
-
-extern int cms_signature ( const void *data, size_t len,
-			   struct cms_signature **sig );
-extern int cms_verify ( struct cms_signature *sig, userptr_t data, size_t len,
-			const char *name, time_t time, struct x509_root *root );
-
-#endif /* _IPXE_CMS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/console.h ipxe-1.0.1~lliurex1505/src/include/ipxe/console.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/console.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/console.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,6 @@
 #ifndef _IPXE_CONSOLE_H
 #define _IPXE_CONSOLE_H
 
-#include <stdio.h>
 #include <ipxe/tables.h>
 
 /** @file
@@ -75,13 +74,6 @@
 	 *
 	 */
 	int ( *iskey ) ( void );
-
-	/** Console usage bitmask
-	 *
-	 * This is the bitwise OR of zero or more @c CONSOLE_USAGE_XXX
-	 * values.
-	 */
-	int usage;
 };
 
 /** Console driver table */
@@ -106,57 +98,10 @@
  */
 #define __console_driver __table_entry ( CONSOLES, 01 )
 
-/**
- * @defgroup consoleusage Console usages
- * @{
- */
-
-/** Standard output */
-#define CONSOLE_USAGE_STDOUT 0x0001
-
-/** Debug messages */
-#define CONSOLE_USAGE_DEBUG 0x0002
-
-/** Text-based user interface */
-#define CONSOLE_USAGE_TUI 0x0004
-
-/** Log messages */
-#define CONSOLE_USAGE_LOG 0x0008
-
-/** All console usages */
-#define CONSOLE_USAGE_ALL ( CONSOLE_USAGE_STDOUT | CONSOLE_USAGE_DEBUG | \
-			    CONSOLE_USAGE_TUI | CONSOLE_USAGE_LOG )
-
-/** @} */
-
-/**
- * Test to see if console has an explicit usage
- *
- * @v console		Console definition (e.g. CONSOLE_PCBIOS)
- * @ret explicit	Console has an explicit usage
- *
- * This relies upon the trick that the expression ( 2 * N + 1 ) will
- * be valid even if N is defined to be empty, since it will then
- * evaluate to give ( 2 * + 1 ) == ( 2 * +1 ) == 2.
- */
-#define CONSOLE_EXPLICIT( console ) ( ( 2 * console + 1 ) != 2 )
-
-extern int console_usage;
-
-/**
- * Set console usage
- *
- * @v usage		New console usage
- * @ret old_usage	Previous console usage
- */
-static inline __attribute__ (( always_inline )) int
-console_set_usage ( int usage ) {
-	int old_usage = console_usage;
-
-	console_usage = usage;
-	return old_usage;
-}
+/* Function prototypes */
 
+extern void putchar ( int character );
+extern int getchar ( void );
 extern int iskey ( void );
 extern int getkey ( unsigned long timeout );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/crypto.h ipxe-1.0.1~lliurex1505/src/include/ipxe/crypto.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/crypto.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/crypto.h	2012-01-06 23:49:04.000000000 +0000
@@ -96,67 +96,6 @@
 	const char *name;
 	/** Context size */
 	size_t ctxsize;
-	/** Initialise algorithm
-	 *
-	 * @v ctx		Context
-	 * @v key		Key
-	 * @v key_len		Length of key
-	 * @ret rc		Return status code
-	 */
-	int ( * init ) ( void *ctx, const void *key, size_t key_len );
-	/** Calculate maximum output length
-	 *
-	 * @v ctx		Context
-	 * @ret max_len		Maximum output length
-	 */
-	size_t ( * max_len ) ( void *ctx );
-	/** Encrypt
-	 *
-	 * @v ctx		Context
-	 * @v plaintext		Plaintext
-	 * @v plaintext_len	Length of plaintext
-	 * @v ciphertext	Ciphertext
-	 * @ret ciphertext_len	Length of ciphertext, or negative error
-	 */
-	int ( * encrypt ) ( void *ctx, const void *data, size_t len,
-			    void *out );
-	/** Decrypt
-	 *
-	 * @v ctx		Context
-	 * @v ciphertext	Ciphertext
-	 * @v ciphertext_len	Ciphertext length
-	 * @v plaintext		Plaintext
-	 * @ret plaintext_len	Plaintext length, or negative error
-	 */
-	int ( * decrypt ) ( void *ctx, const void *data, size_t len,
-			    void *out );
-	/** Sign digest value
-	 *
-	 * @v ctx		Context
-	 * @v digest		Digest algorithm
-	 * @v value		Digest value
-	 * @v signature		Signature
-	 * @ret signature_len	Signature length, or negative error
-	 */
-	int ( * sign ) ( void *ctx, struct digest_algorithm *digest,
-			 const void *value, void *signature );
-	/** Verify signed digest value
-	 *
-	 * @v ctx		Context
-	 * @v digest		Digest algorithm
-	 * @v value		Digest value
-	 * @v signature		Signature
-	 * @v signature_len	Signature length
-	 * @ret rc		Return status code
-	 */
-	int ( * verify ) ( void *ctx, struct digest_algorithm *digest,
-			   const void *value, const void *signature,
-			   size_t signature_len );
-	/** Finalise algorithm
-	 *
-	 * @v ctx		Context
-	 */
-	void ( * final ) ( void *ctx );
 };
 
 static inline void digest_init ( struct digest_algorithm *digest,
@@ -208,45 +147,10 @@
 	return ( cipher->blocksize == 1 );
 }
 
-static inline int pubkey_init ( struct pubkey_algorithm *pubkey, void *ctx,
-				const void *key, size_t key_len ) {
-	return pubkey->init ( ctx, key, key_len );
-}
-
-static inline size_t pubkey_max_len ( struct pubkey_algorithm *pubkey,
-				      void *ctx ) {
-	return pubkey->max_len ( ctx );
-}
-
-static inline int pubkey_encrypt ( struct pubkey_algorithm *pubkey, void *ctx,
-				   const void *data, size_t len, void *out ) {
-	return pubkey->encrypt ( ctx, data, len, out );
-}
-
-static inline int pubkey_decrypt ( struct pubkey_algorithm *pubkey, void *ctx,
-				   const void *data, size_t len, void *out ) {
-	return pubkey->decrypt ( ctx, data, len, out );
-}
-
-static inline int pubkey_sign ( struct pubkey_algorithm *pubkey, void *ctx,
-				struct digest_algorithm *digest,
-				const void *value, void *signature ) {
-	return pubkey->sign ( ctx, digest, value, signature );
-}
-
-static inline int pubkey_verify ( struct pubkey_algorithm *pubkey, void *ctx,
-				  struct digest_algorithm *digest,
-				  const void *value, const void *signature,
-				  size_t signature_len ) {
-	return pubkey->verify ( ctx, digest, value, signature, signature_len );
-}
-
-static inline void pubkey_final ( struct pubkey_algorithm *pubkey, void *ctx ) {
-	pubkey->final ( ctx );
-}
-
 extern struct digest_algorithm digest_null;
 extern struct cipher_algorithm cipher_null;
 extern struct pubkey_algorithm pubkey_null;
 
+void get_random_bytes ( void *buf, size_t len );
+
 #endif /* _IPXE_CRYPTO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/device.h ipxe-1.0.1~lliurex1505/src/include/ipxe/device.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/device.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/device.h	2012-01-06 23:49:04.000000000 +0000
@@ -54,9 +54,6 @@
 /** ISA bus type */
 #define BUS_TYPE_ISA 5
 
-/** TAP bus type */
-#define BUS_TYPE_TAP 6
-
 /** A hardware device */
 struct device {
 	/** Name */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/dhcp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/dhcp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/dhcp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/dhcp.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,7 +10,6 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <stdarg.h>
 #include <ipxe/in.h>
 #include <ipxe/list.h>
 #include <ipxe/refcnt.h>
@@ -352,21 +351,6 @@
  */
 #define DHCP_EB_SCRIPTLET DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x51 )
 
-/** Encrypted syslog server */
-#define DHCP_EB_SYSLOGS_SERVER DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x55 )
-
-/** Trusted root certficate fingerprints */
-#define DHCP_EB_TRUST DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5a )
-
-/** Client certficate */
-#define DHCP_EB_CERT DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5b )
-
-/** Client private key */
-#define DHCP_EB_KEY DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5c )
-
-/** Cross-signed certificate source */
-#define DHCP_EB_CROSS_CERT DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0x5d )
-
 /** Skip PXE DHCP protocol extensions such as ProxyDHCP
  *
  * If set to a non-zero value, iPXE will not wait for ProxyDHCP offers
@@ -397,7 +381,14 @@
 	uint16_t device;
 } __attribute__ (( packed ));
 
-/** Use cached network settings (obsolete; do not reuse this value) */
+/** Use cached network settings
+ *
+ * Cached network settings may be available from a prior DHCP request
+ * (if running as a PXE NBP), non-volatile storage on the NIC, or
+ * settings set via the command line or an embedded image. If this
+ * flag is not set, it will be assumed that those sources are
+ * insufficient and that DHCP should still be run when autobooting.
+ */
 #define DHCP_EB_USE_CACHED DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xb2 )
 
 /** BIOS drive number
@@ -443,18 +434,6 @@
  */
 #define DHCP_EB_REVERSE_PASSWORD DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc1 )
 
-/** User ID
- *
- * This will be used as the user id for AUTH_SYS based authentication in NFS.
- */
-#define DHCP_EB_UID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc2 )
-
-/** Group ID
- *
- * This will be used as the group id for AUTH_SYS based authentication in NFS.
- */
-#define DHCP_EB_GID DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xc3 )
-
 /** iPXE version number */
 #define DHCP_EB_VERSION DHCP_ENCAP_OPT ( DHCP_EB_ENCAP, 0xeb )
 
@@ -479,6 +458,32 @@
 
 /** @} */
 
+/**
+ * Count number of arguments to a variadic macro
+ *
+ * This rather neat, non-iterative solution is courtesy of Laurent
+ * Deniau.
+ *
+ */
+#define _VA_ARG_COUNT(  _1,  _2,  _3,  _4,  _5,  _6,  _7,  _8,		\
+		        _9, _10, _11, _12, _13, _14, _15, _16,		\
+		       _17, _18, _19, _20, _21, _22, _23, _24,		\
+		       _25, _26, _27, _28, _29, _30, _31, _32,		\
+		       _33, _34, _35, _36, _37, _38, _39, _40,		\
+		       _41, _42, _43, _44, _45, _46, _47, _48,		\
+		       _49, _50, _51, _52, _53, _54, _55, _56,		\
+		       _57, _58, _59, _60, _61, _62, _63,   N, ... ) N
+#define VA_ARG_COUNT( ... )						\
+	_VA_ARG_COUNT ( __VA_ARGS__, 					\
+			63, 62, 61, 60, 59, 58, 57, 56,			\
+			55, 54, 53, 52, 51, 50, 49, 48,			\
+			47, 46, 45, 44, 43, 42, 41, 40,			\
+			39, 38, 37, 36, 35, 34, 33, 32,			\
+			31, 30, 29, 28, 27, 26, 25, 24,			\
+			23, 22, 21, 20, 19, 18, 17, 16,			\
+			15, 14, 13, 12, 11, 10,  9,  8,			\
+			 7,  6,  5,  4,  3,  2,  1,  0 )
+
 /** Construct a DHCP option from a list of bytes */
 #define DHCP_OPTION( ... ) VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__
 
@@ -656,6 +661,8 @@
 #define PXEBS_SETTINGS_NAME "pxebs"
 
 extern uint32_t dhcp_last_xid;
+extern unsigned int dhcp_chaddr ( struct net_device *netdev, void *chaddr,
+				  uint16_t *flags );
 extern int dhcp_create_packet ( struct dhcp_packet *dhcppkt,
 				struct net_device *netdev, uint8_t msgtype,
 				uint32_t xid, const void *options,
@@ -670,4 +677,12 @@
 extern int start_pxebs ( struct interface *job, struct net_device *netdev,
 			 unsigned int pxe_type );
 
+/* In environments that can provide cached DHCP packets, this function
+ * should look for such a packet and call store_cached_dhcpack() with
+ * it if it exists.
+ */
+extern void get_cached_dhcpack ( void );
+
+extern void store_cached_dhcpack ( userptr_t data, size_t len );
+
 #endif /* _IPXE_DHCP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/drbg.h ipxe-1.0.1~lliurex1505/src/include/ipxe/drbg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/drbg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/drbg.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,135 +0,0 @@
-#ifndef _IPXE_DRBG_H
-#define _IPXE_DRBG_H
-
-/** @file
- *
- * DRBG mechanism
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/sha256.h>
-#include <ipxe/hmac_drbg.h>
-
-/** Choose HMAC_DRBG using SHA-256
- *
- * HMAC_DRBG using SHA-256 is an Approved algorithm in ANS X9.82.
- */
-#define HMAC_DRBG_ALGORITHM HMAC_DRBG_SHA256
-
-/** Maximum security strength */
-#define DRBG_MAX_SECURITY_STRENGTH \
-	HMAC_DRBG_MAX_SECURITY_STRENGTH ( HMAC_DRBG_ALGORITHM )
-
-/** Security strength
- *
- * We choose to operate at a strength of 128 bits.
- */
-#define DRBG_SECURITY_STRENGTH 128
-
-/** Minimum entropy input length */
-#define DRBG_MIN_ENTROPY_LEN_BYTES \
-	HMAC_DRBG_MIN_ENTROPY_LEN_BYTES ( DRBG_SECURITY_STRENGTH )
-
-/** Maximum entropy input length */
-#define DRBG_MAX_ENTROPY_LEN_BYTES HMAC_DRBG_MAX_ENTROPY_LEN_BYTES
-
-/** Maximum personalisation string length */
-#define DRBG_MAX_PERSONAL_LEN_BYTES HMAC_DRBG_MAX_PERSONAL_LEN_BYTES
-
-/** Maximum additional input length */
-#define DRBG_MAX_ADDITIONAL_LEN_BYTES HMAC_DRBG_MAX_ADDITIONAL_LEN_BYTES
-
-/** Maximum length of generated pseudorandom data per request */
-#define DRBG_MAX_GENERATED_LEN_BYTES HMAC_DRBG_MAX_GENERATED_LEN_BYTES
-
-/** A Deterministic Random Bit Generator */
-struct drbg_state {
-	/** Algorithm internal state */
-	struct hmac_drbg_state internal;
-	/** Reseed required flag */
-	int reseed_required;
-	/** State is valid */
-	int valid;
-};
-
-/**
- * Instantiate DRBG algorithm
- *
- * @v state		Algorithm state
- * @v entropy		Entropy input
- * @v entropy_len	Length of entropy input
- * @v personal		Personalisation string
- * @v personal_len	Length of personalisation string
- *
- * This is the Instantiate_algorithm function defined in ANS X9.82
- * Part 3-2007 Section 9.2 (NIST SP 800-90 Section 9.1).
- */
-static inline void drbg_instantiate_algorithm ( struct drbg_state *state,
-						const void *entropy,
-						size_t entropy_len,
-						const void *personal,
-						size_t personal_len ) {
-	hmac_drbg_instantiate ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ),
-				&state->internal, entropy, entropy_len,
-				personal, personal_len );
-}
-
-/**
- * Reseed DRBG algorithm
- *
- * @v state		Algorithm state
- * @v entropy		Entropy input
- * @v entropy_len	Length of entropy input
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- *
- * This is the Reseed_algorithm function defined in ANS X9.82
- * Part 3-2007 Section 9.3 (NIST SP 800-90 Section 9.2).
- */
-static inline void drbg_reseed_algorithm ( struct drbg_state *state,
-					   const void *entropy,
-					   size_t entropy_len,
-					   const void *additional,
-					   size_t additional_len ) {
-	hmac_drbg_reseed ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ),
-			   &state->internal, entropy, entropy_len,
-			   additional, additional_len );
-}
-
-/**
- * Generate pseudorandom bits using DRBG algorithm
- *
- * @v state		Algorithm state
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- * @v data		Output buffer
- * @v len		Length of output buffer
- * @ret rc		Return status code
- *
- * This is the Generate_algorithm function defined in ANS X9.82
- * Part 3-2007 Section 9.4 (NIST SP 800-90 Section 9.3).
- *
- * Note that the only permitted error is "reseed required".
- */
-static inline int drbg_generate_algorithm ( struct drbg_state *state,
-					    const void *additional,
-					    size_t additional_len,
-					    void *data, size_t len ) {
-	return hmac_drbg_generate ( HMAC_DRBG_HASH ( HMAC_DRBG_ALGORITHM ),
-				    &state->internal, additional,
-				    additional_len, data, len );
-}
-
-extern int drbg_instantiate ( struct drbg_state *state, const void *personal,
-			      size_t personal_len );
-extern int drbg_reseed ( struct drbg_state *state, const void *additional,
-			 size_t additional_len );
-extern int drbg_generate ( struct drbg_state *state, const void *additional,
-			   size_t additional_len, int prediction_resist,
-			   void *data, size_t len );
-extern void drbg_uninstantiate ( struct drbg_state *state );
-
-#endif /* _IPXE_DRBG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/eapol.h ipxe-1.0.1~lliurex1505/src/include/ipxe/eapol.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/eapol.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/eapol.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef _IPXE_EAPOL_H
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Base.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Base.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Base.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Base.h	2012-01-06 23:49:04.000000000 +0000
@@ -6,7 +6,7 @@
   environment. There are a set of base libraries in the Mde Package that can
   be used to implement base modules.
 
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
 This program and the accompanying materials
 are licensed and made available under the terms and conditions of the BSD License
@@ -395,7 +395,6 @@
 //  VA_END (VA_LIST Marker) - Clear Marker
 //  VA_ARG (VA_LIST Marker, var arg size) - Use Marker to get an argument from
 //    the ... list. You must know the size and pass it in this macro.
-//  VA_COPY (VA_LIST Dest, VA_LIST Start) - Initialize Dest as a copy of Start.
 //
 //  example:
 //
@@ -457,13 +456,6 @@
 
 #define VA_END(Marker)                ((void)0)
 
-// For some ARM RVCT compilers, __va_copy is not defined
-#ifndef __va_copy
-  #define __va_copy(dest, src) ((void)((dest) = (src)))
-#endif
-
-#define VA_COPY(Dest, Start)          __va_copy (Dest, Start)
-
 #elif defined(__GNUC__) && !defined(NO_BUILTIN_VA_FUNCS)
 //
 // Use GCC built-in macros for variable argument lists.
@@ -481,8 +473,6 @@
 
 #define VA_END(Marker)               __builtin_va_end (Marker)
 
-#define VA_COPY(Dest, Start)         __builtin_va_copy (Dest, Start)
-
 #else
 ///
 /// Variable used to traverse the list of arguments. This type can vary by
@@ -538,19 +528,6 @@
 **/
 #define VA_END(Marker)      (Marker = (VA_LIST) 0)
 
-/**
-  Initializes a VA_LIST as a copy of an existing VA_LIST.
-
-  This macro initializes Dest as a copy of Start, as if the VA_START macro had been applied to Dest
-  followed by the same sequence of uses of the VA_ARG macro as had previously been used to reach
-  the present state of Start.
-
-  @param   Dest   VA_LIST used to traverse the list of arguments.
-  @param   Start  VA_LIST used to traverse the list of arguments.
-
-**/
-#define VA_COPY(Dest, Start)  ((void)((Dest) = (Start)))
-
 #endif
 
 ///
@@ -701,22 +678,10 @@
   @return  Minimum of two operands.
 
 **/
+
 #define MIN(a, b)                       \
   (((a) < (b)) ? (a) : (b))
 
-/**
-  Return the absolute value of a signed operand.
-
-  This macro returns the absolute value of the signed operand specified by a.
-
-  @param   a        The signed operand.
-
-  @return  The absolute value of the signed operand.
-
-**/
-#define ABS(a)                          \
-  (((a) < 0) ? (-(a)) : (a))
-
 //
 // Status codes common to all execution phases
 //
@@ -919,12 +884,6 @@
 ///
 #define RETURN_INVALID_LANGUAGE      ENCODE_ERROR (32)
 
-///
-/// The security status of the data is unknown or compromised
-/// and the data must be updated or replaced to restore a valid
-/// security status.
-///
-#define RETURN_COMPROMISED_DATA      ENCODE_ERROR (33)
 
 ///
 /// The string contained one or more characters that
@@ -949,12 +908,6 @@
 ///
 #define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4)
 
-///
-/// The data has not been updated within the timeframe set by
-/// local policy for this type of data.
-///
-#define RETURN_WARN_STALE_DATA       ENCODE_WARNING (5)
-
 /**
   Returns a 16-bit signature built from 2 ASCII characters.
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_download.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_download.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_download.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_download.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,157 +0,0 @@
-#ifndef _IPXE_DOWNLOAD_H
-#define _IPXE_DOWNLOAD_H
-
-/*
- * Copyright (C) 2010 VMware, Inc.  All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * iPXE Download Protocol
- *
- * EFI applications started by iPXE may use this interface to download files.
- */
-
-typedef struct _IPXE_DOWNLOAD_PROTOCOL IPXE_DOWNLOAD_PROTOCOL;
-
-/** Token to represent a currently downloading file */
-typedef VOID *IPXE_DOWNLOAD_FILE;
-
-/**
- * Callback function that is invoked when data arrives for a particular file.
- *
- * Not all protocols will deliver data in order. Clients should not rely on the
- * order of data delivery matching the order in the file.
- *
- * Some protocols are capable of determining the file size near the beginning
- * of data transfer. To allow the client to allocate memory more efficiently,
- * iPXE may give a hint about the file size by calling the Data callback with
- * a zero BufferLength and the file size in FileOffset. Clients should be
- * prepared to deal with more or less data than the hint actually arriving.
- *
- * @v Context		Context provided to the Start function
- * @v Buffer		New data
- * @v BufferLength	Length of new data in bytes
- * @v FileOffset	Offset of new data in the file
- * @ret Status		EFI_SUCCESS to continue the download,
- *			or any error code to abort.
- */
-typedef
-EFI_STATUS
-(EFIAPI *IPXE_DOWNLOAD_DATA_CALLBACK)(
-  IN VOID *Context,
-  IN VOID *Buffer,
-  IN UINTN BufferLength,
-  IN UINTN FileOffset
-  );
-
-/**
- * Callback function that is invoked when the file is finished downloading, or
- * when a connection unexpectedly closes or times out.
- *
- * The finish callback is also called when a download is aborted by the Abort
- * function (below).
- *
- * @v Context		Context provided to the Start function
- * @v Status		Reason for termination: EFI_SUCCESS when the entire
- * 			file was transferred successfully, or an error
- * 			otherwise
- */
-typedef
-void
-(EFIAPI *IPXE_DOWNLOAD_FINISH_CALLBACK)(
-  IN VOID *Context,
-  IN EFI_STATUS Status
-  );
-
-/**
- * Start downloading a file, and register callback functions to handle the
- * download.
- *
- * @v This		iPXE Download Protocol instance
- * @v Url		URL to download from
- * @v DataCallback	Callback that will be invoked when data arrives
- * @v FinishCallback	Callback that will be invoked when the download ends
- * @v Context		Context passed to the Data and Finish callbacks
- * @v File		Token that can be used to abort the download
- * @ret Status		EFI status code
- */
-typedef
-EFI_STATUS
-(EFIAPI *IPXE_DOWNLOAD_START)(
-  IN IPXE_DOWNLOAD_PROTOCOL *This,
-  IN CHAR8 *Url,
-  IN IPXE_DOWNLOAD_DATA_CALLBACK DataCallback,
-  IN IPXE_DOWNLOAD_FINISH_CALLBACK FinishCallback,
-  IN VOID *Context,
-  OUT IPXE_DOWNLOAD_FILE *File
-  );
-
-/**
- * Forcibly abort downloading a file that is currently in progress.
- *
- * It is not safe to call this function after the Finish callback has executed.
- *
- * @v This		iPXE Download Protocol instance
- * @v File		Token obtained from Start
- * @v Status		Reason for aborting the download
- * @ret Status		EFI status code
- */
-typedef
-EFI_STATUS
-(EFIAPI *IPXE_DOWNLOAD_ABORT)(
-  IN IPXE_DOWNLOAD_PROTOCOL *This,
-  IN IPXE_DOWNLOAD_FILE File,
-  IN EFI_STATUS Status
-  );
-
-/**
- * Poll for more data from iPXE. This function will invoke the registered
- * callbacks if data is available or if downloads complete.
- *
- * @v This		iPXE Download Protocol instance
- * @ret Status		EFI status code
- */
-typedef
-EFI_STATUS
-(EFIAPI *IPXE_DOWNLOAD_POLL)(
-  IN IPXE_DOWNLOAD_PROTOCOL *This
-  );
-
-/**
- * The iPXE Download Protocol.
- *
- * iPXE will attach a iPXE Download Protocol to the DeviceHandle in the Loaded
- * Image Protocol of all child EFI applications.
- */
-struct _IPXE_DOWNLOAD_PROTOCOL {
-   IPXE_DOWNLOAD_START Start;
-   IPXE_DOWNLOAD_ABORT Abort;
-   IPXE_DOWNLOAD_POLL Poll;
-};
-
-#define IPXE_DOWNLOAD_PROTOCOL_GUID \
-  { \
-    0x3eaeaebd, 0xdecf, 0x493b, { 0x9b, 0xd1, 0xcd, 0xb2, 0xde, 0xca, 0xe7, 0x19 } \
-  }
-
-extern int efi_download_install ( EFI_HANDLE *device );
-extern void efi_download_uninstall ( EFI_HANDLE device );
-
-#endif /* _IPXE_DOWNLOAD_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_driver.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_driver.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_driver.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_driver.h	2012-01-06 23:49:04.000000000 +0000
@@ -44,6 +44,6 @@
 extern EFI_DEVICE_PATH_PROTOCOL *
 efi_devpath_end ( EFI_DEVICE_PATH_PROTOCOL *path );
 
-extern int efi_driver_install ( struct efi_driver *efidrv );
+extern EFI_STATUS efi_driver_install ( struct efi_driver *efidrv );
 
 #endif /* _IPXE_EFI_DRIVER_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_file.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_file.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_file.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_file.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,13 +0,0 @@
-#ifndef _IPXE_EFI_FILE_H
-#define _IPXE_EFI_FILE_H
-
-/** @file
- *
- * EFI file protocols
- *
- */
-
-extern int efi_file_install ( EFI_HANDLE *handle );
-extern void efi_file_uninstall ( EFI_HANDLE handle );
-
-#endif /* _IPXE_EFI_FILE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi.h	2012-01-06 23:49:04.000000000 +0000
@@ -21,8 +21,6 @@
  * trailing whitespace.
  */
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
 /* EFI headers rudely redefine NULL */
 #undef NULL
 
@@ -56,7 +54,12 @@
 /** An EFI protocol used by iPXE */
 struct efi_protocol {
 	/** GUID */
-	EFI_GUID guid;
+	union {
+		/** EFI protocol GUID */
+		EFI_GUID guid;
+		/** UUID structure understood by iPXE */
+		union uuid uuid;
+	} u;
 	/** Variable containing pointer to protocol structure */
 	void **protocol;
 };
@@ -74,7 +77,7 @@
  */
 #define EFI_REQUIRE_PROTOCOL( _protocol, _ptr )				     \
 	struct efi_protocol __ ## _protocol __efi_protocol = {		     \
-		.guid = _protocol ## _GUID,				     \
+		.u.guid = _protocol ## _GUID,				     \
 		.protocol = ( ( void ** ) ( void * )			     \
 			      ( ( (_ptr) == ( ( _protocol ** ) (_ptr) ) ) ?  \
 				(_ptr) : (_ptr) ) ),			     \
@@ -83,7 +86,12 @@
 /** An EFI configuration table used by iPXE */
 struct efi_config_table {
 	/** GUID */
-	EFI_GUID guid;
+	union {
+		/** EFI configuration table GUID */
+		EFI_GUID guid;
+		/** UUID structure understood by iPXE */
+		union uuid uuid;
+	} u;
 	/** Variable containing pointer to configuration table */
 	void **table;
 	/** Table is required for operation */
@@ -105,67 +113,33 @@
  */
 #define EFI_USE_TABLE( _table, _ptr, _required )			     \
 	struct efi_config_table __ ## _table __efi_config_table = {	     \
-		.guid = _table ## _GUID,				     \
+		.u.guid = _table ## _GUID,				     \
 		.table = ( ( void ** ) ( void * ) (_ptr) ),		     \
 		.required = (_required),				     \
 	}
 
-/**
- * Convert an iPXE status code to an EFI status code
+/** Convert a iPXE status code to an EFI status code
  *
- * @v rc		iPXE status code
- * @ret efirc		EFI status code
+ * FIXME: actually perform some kind of conversion.  iPXE error codes
+ * will be detected as EFI error codes; both have the top bit set, and
+ * the success return code is zero for both.  Anything that just
+ * reports a numerical error will be OK, anything attempting to
+ * interpret the value or to display a text equivalent will be
+ * screwed.
  */
-#define EFIRC( rc ) ERRNO_TO_PLATFORM ( -(rc) )
+#define RC_TO_EFIRC( rc ) (rc)
 
-/**
- * Convert an EFI status code to an iPXE status code
+/** Convert an EFI status code to a iPXE status code
  *
- * @v efirc		EFI status code
- * @ret rc		iPXE status code (before negation)
+ * FIXME: as above
  */
-#define EEFI( efirc ) EPLATFORM ( EINFO_EPLATFORM, efirc )
+#define EFIRC_TO_RC( efirc ) (efirc)
 
 extern EFI_HANDLE efi_image_handle;
 extern EFI_LOADED_IMAGE_PROTOCOL *efi_loaded_image;
-extern EFI_DEVICE_PATH_PROTOCOL *efi_loaded_image_path;
 extern EFI_SYSTEM_TABLE *efi_systab;
 
-extern const char * efi_guid_ntoa ( EFI_GUID *guid );
-
-extern void dbg_efi_protocols ( EFI_HANDLE handle );
-extern void dbg_efi_devpath ( EFI_DEVICE_PATH_PROTOCOL *path );
-
-#define DBG_EFI_PROTOCOLS_IF( level, handle ) do {		\
-		if ( DBG_ ## level ) {				\
-			dbg_efi_protocols ( handle );		\
-		}						\
-	} while ( 0 )
-
-#define DBG_EFI_DEVPATH_IF( level, path ) do {			\
-		if ( DBG_ ## level ) {				\
-			dbg_efi_devpath ( path );		\
-		}						\
-	} while ( 0 )
-
-#define DBGC_EFI_PROTOCOLS_IF( level, id, ... ) do {		\
-		DBG_AC_IF ( level, id );			\
-		DBG_EFI_PROTOCOLS_IF ( level, __VA_ARGS__ );	\
-		DBG_DC_IF ( level );				\
-	} while ( 0 )
-
-#define DBGC_EFI_DEVPATH_IF( level, id, ... ) do {		\
-		DBG_AC_IF ( level, id );			\
-		DBG_EFI_DEVPATH_IF ( level, __VA_ARGS__ );	\
-		DBG_DC_IF ( level );				\
-	} while ( 0 )
-
-#define DBGC_EFI_PROTOCOLS( ... )				\
-	DBGC_EFI_PROTOCOLS_IF( LOG, ##__VA_ARGS__ )
-
-#define DBGC_EFI_DEVPATH( ... )					\
-	DBGC_EFI_DEVPATH_IF( LOG, ##__VA_ARGS__ )
-
+extern const char * efi_strerror ( EFI_STATUS efirc );
 extern EFI_STATUS efi_init ( EFI_HANDLE image_handle,
 			     EFI_SYSTEM_TABLE *systab );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_hii.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_hii.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_hii.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_hii.h	2012-01-06 23:49:04.000000000 +0000
@@ -8,89 +8,133 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
 #include <ipxe/efi/Uefi/UefiInternalFormRepresentation.h>
 #include <ipxe/efi/Guid/MdeModuleHii.h>
 
-/** GUID indicating formset compliance for IBM Unified Configuration Manager */
-#define EFI_HII_IBM_UCM_COMPLIANT_FORMSET_GUID				   \
-	{ 0x5c8e9746, 0xa5f7, 0x4593,					   \
-	  { 0xaf, 0x1f, 0x66, 0xa8, 0x2a, 0xa1, 0x9c, 0xb1 } }
-
-/** An EFI IFR builder */
-struct efi_ifr_builder {
-	/** IFR opcodes */
-	EFI_IFR_OP_HEADER *ops;
-	/** Length of IFR opcodes */
-	size_t ops_len;
-	/** Strings */
-	EFI_HII_STRING_BLOCK *strings;
-	/** Length of strings */
-	size_t strings_len;
-	/** Current string identifier */
-	unsigned int string_id;
-	/** Current variable store identifier */
-	unsigned int varstore_id;
-	/** Current form identifier */
-	unsigned int form_id;
-	/** An allocation has failed */
-	int failed;
-};
-
-/**
- * Initialise IFR builder
- *
- * @v ifr		IFR builder
- *
- * The caller must eventually call efi_ifr_free() to free the dynamic
- * storage associated with the IFR builder.
- */
-static inline void efi_ifr_init ( struct efi_ifr_builder *ifr ) {
-	memset ( ifr, 0, sizeof ( *ifr ) );
-}
-
-extern unsigned int efi_ifr_string ( struct efi_ifr_builder *ifr,
-				     const char *fmt, ... );
-extern void efi_ifr_end_op ( struct efi_ifr_builder *ifr );
-extern void efi_ifr_false_op ( struct efi_ifr_builder *ifr );
-extern unsigned int efi_ifr_form_op ( struct efi_ifr_builder *ifr,
-				      unsigned int title_id );
-extern void efi_ifr_form_set_op ( struct efi_ifr_builder *ifr,
-				  const EFI_GUID *guid,
-				  unsigned int title_id, unsigned int help_id,
-				  ... );
-void efi_ifr_get_op ( struct efi_ifr_builder *ifr, unsigned int varstore_id,
-		      unsigned int varstore_info, unsigned int varstore_type );
-extern void efi_ifr_guid_class_op ( struct efi_ifr_builder *ifr,
-				    unsigned int class );
-extern void efi_ifr_guid_subclass_op ( struct efi_ifr_builder *ifr,
-				       unsigned int subclass );
-extern void efi_ifr_numeric_op ( struct efi_ifr_builder *ifr,
-				 unsigned int prompt_id,
-				 unsigned int help_id, unsigned int question_id,
-				 unsigned int varstore_id,
-				 unsigned int varstore_info,
-				 unsigned int vflags, unsigned long min_value,
-				 unsigned long max_value, unsigned int step,
-				 unsigned int flags );
-extern void efi_ifr_string_op ( struct efi_ifr_builder *ifr,
-				unsigned int prompt_id, unsigned int help_id,
-				unsigned int question_id,
-				unsigned int varstore_id,
-				unsigned int varstore_info, unsigned int vflags,
-				unsigned int min_size, unsigned int max_size,
-				unsigned int flags );
-extern void efi_ifr_suppress_if_op ( struct efi_ifr_builder *ifr );
-extern void efi_ifr_text_op ( struct efi_ifr_builder *ifr,
-			      unsigned int prompt_id, unsigned int help_id,
-			      unsigned int text_id );
-extern void efi_ifr_true_op ( struct efi_ifr_builder *ifr );
-extern unsigned int
-efi_ifr_varstore_name_value_op ( struct efi_ifr_builder *ifr,
-				 const EFI_GUID *guid );
-extern void efi_ifr_free ( struct efi_ifr_builder *ifr );
-extern EFI_HII_PACKAGE_LIST_HEADER *
-efi_ifr_package ( struct efi_ifr_builder *ifr, const EFI_GUID *guid,
-		  const char *language, unsigned int language_id );
+/**
+ * Define an EFI IFR form set type
+ *
+ * @v num_class_guids	Number of class GUIDs
+ * @ret type		Form set type
+ */
+#define EFI_IFR_FORM_SET_TYPE( num_class_guids )			   \
+	struct {							   \
+		EFI_IFR_FORM_SET FormSet;				   \
+		EFI_GUID ClassGuid[num_class_guids];			   \
+	} __attribute__ (( packed ))
+
+/**
+ * Define an EFI IFR form set
+ *
+ * @v guid		GUID
+ * @v title		Title string
+ * @v help		Help string
+ * @v type		Form set type (as returned by EFI_IFR_FORM_SET_TYPE())
+ * @ret ifr		Form set
+ *
+ * This definition opens a new scope, which must be closed by an
+ * EFI_IFR_END().
+ */
+#define EFI_IFR_FORM_SET( guid, title, help, type, ... ) {		   \
+	.FormSet = {							   \
+		.Header = {						   \
+			.OpCode = EFI_IFR_FORM_SET_OP,			   \
+			.Length = sizeof ( type ),			   \
+			.Scope = 1,					   \
+		},							   \
+		.Guid = guid,						   \
+		.FormSetTitle = title,					   \
+		.Help = help,						   \
+		.Flags = ( sizeof ( ( ( type * ) NULL )->ClassGuid ) /	   \
+			   sizeof ( ( ( type * ) NULL )->ClassGuid[0] ) ), \
+	},								   \
+	.ClassGuid = {							   \
+		__VA_ARGS__						   \
+	},								   \
+	}
+
+/**
+ * Define an EFI IFR GUID class
+ *
+ * @v class		Class
+ * @ret ifr		GUID class
+ */
+#define EFI_IFR_GUID_CLASS( class ) {					   \
+	.Header = {							   \
+		.OpCode = EFI_IFR_GUID_OP,				   \
+		.Length = sizeof ( EFI_IFR_GUID_CLASS ),		   \
+	},								   \
+	.Guid = EFI_IFR_TIANO_GUID,					   \
+	.ExtendOpCode = EFI_IFR_EXTEND_OP_CLASS,			   \
+	.Class = class,							   \
+	}
+
+/**
+ * Define an EFI IFR GUID subclass
+ *
+ * @v subclass		Subclass
+ * @ret ifr		GUID subclass
+ */
+#define EFI_IFR_GUID_SUBCLASS( subclass ) {				   \
+	.Header = {							   \
+		.OpCode = EFI_IFR_GUID_OP,				   \
+		.Length = sizeof ( EFI_IFR_GUID_SUBCLASS ),		   \
+	},								   \
+	.Guid = EFI_IFR_TIANO_GUID,					   \
+	.ExtendOpCode = EFI_IFR_EXTEND_OP_SUBCLASS,			   \
+	.SubClass = subclass,						   \
+	}
+
+/**
+ * Define an EFI IFR form
+ *
+ * @v formid		Form ID
+ * @v title		Title string
+ * @ret ifr		Form
+ *
+ * This definition opens a new scope, which must be closed by an
+ * EFI_IFR_END().
+ */
+#define EFI_IFR_FORM( formid, title ) {					   \
+	.Header = {							   \
+		.OpCode = EFI_IFR_FORM_OP,				   \
+		.Length = sizeof ( EFI_IFR_FORM ),			   \
+		.Scope = 1,						   \
+	},								   \
+	.FormId = formid,						   \
+	.FormTitle = title,						   \
+	}
+
+/**
+ * Define an EFI IFR text widget
+ *
+ * @v prompt		Prompt string
+ * @v help		Help string
+ * @v text		Text string
+ * @ret ifr		Text widget
+ */
+#define EFI_IFR_TEXT( prompt, help, text ) {				   \
+	.Header = {							   \
+		.OpCode = EFI_IFR_TEXT_OP,				   \
+		.Length = sizeof ( EFI_IFR_TEXT ),			   \
+	},								   \
+	.Statement = {							   \
+		.Prompt = prompt,					   \
+		.Help = help,						   \
+	},								   \
+	.TextTwo = text,						   \
+	}
+
+/**
+ * Define an EFI IFR end marker
+ *
+ * @ret ifr		End marker
+ */
+#define EFI_IFR_END() {							   \
+	.Header = {							   \
+		.OpCode = EFI_IFR_END_OP,				   \
+		.Length = sizeof ( EFI_IFR_END ),			   \
+	},								   \
+	}
 
 #endif /* _IPXE_EFI_HII_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_io.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_io.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_io.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,180 @@
+#ifndef _IPXE_EFI_IO_H
+#define _IPXE_EFI_IO_H
+
+/** @file
+ *
+ * iPXE I/O API for EFI
+ *
+ * EFI runs with flat physical addressing, so the various mappings
+ * between virtual addresses, I/O addresses and bus addresses are all
+ * no-ops.  I/O is handled using the EFI_CPU_IO_PROTOCOL.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#ifdef IOAPI_EFI
+#define IOAPI_PREFIX_efi
+#else
+#define IOAPI_PREFIX_efi __efi_
+#endif
+
+extern unsigned long long efi_ioread ( volatile void *io_addr,
+				       size_t size );
+extern void efi_iowrite ( unsigned long long data, volatile void *io_addr,
+			  size_t size );
+extern void efi_ioreads ( volatile void *io_addr, void *data,
+			  size_t size, unsigned int count );
+extern void efi_iowrites ( volatile void *io_addr, const void *data,
+			  size_t size, unsigned int count );
+
+/*
+ * Physical<->Bus and Bus<->I/O address mappings
+ *
+ * EFI runs with flat physical addressing, so these are all no-ops.
+ *
+ */
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( efi, phys_to_bus ) ( unsigned long phys_addr ) {
+	return phys_addr;
+}
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( efi, bus_to_phys ) ( unsigned long bus_addr ) {
+	return bus_addr;
+}
+
+static inline __always_inline void *
+IOAPI_INLINE ( efi, ioremap ) ( unsigned long bus_addr, size_t len __unused ) {
+	return ( ( void * ) bus_addr );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, iounmap ) ( volatile const void *io_addr __unused ) {
+	/* Nothing to do */
+}
+
+static inline __always_inline unsigned long
+IOAPI_INLINE ( efi, io_to_bus ) ( volatile const void *io_addr ) {
+	return ( ( unsigned long ) io_addr );
+}
+
+/*
+ * I/O functions
+ *
+ */
+
+static inline __always_inline uint8_t
+IOAPI_INLINE ( efi, readb ) ( volatile uint8_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint16_t
+IOAPI_INLINE ( efi, readw ) ( volatile uint16_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint32_t
+IOAPI_INLINE ( efi, readl ) ( volatile uint32_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint64_t
+IOAPI_INLINE ( efi, readq ) ( volatile uint64_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, writeb ) ( uint8_t data, volatile uint8_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, writew ) ( uint16_t data, volatile uint16_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, writel ) ( uint32_t data, volatile uint32_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, writeq ) ( uint64_t data, volatile uint64_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint8_t
+IOAPI_INLINE ( efi, inb ) ( volatile uint8_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint16_t
+IOAPI_INLINE ( efi, inw ) ( volatile uint16_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline uint32_t
+IOAPI_INLINE ( efi, inl ) ( volatile uint32_t *io_addr ) {
+	return efi_ioread ( io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outb ) ( uint8_t data, volatile uint8_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outw ) ( uint16_t data, volatile uint16_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outl ) ( uint32_t data, volatile uint32_t *io_addr ) {
+	efi_iowrite ( data, io_addr, sizeof ( *io_addr ) );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, insb ) ( volatile uint8_t *io_addr, uint8_t *data,
+			     unsigned int count ) {
+	efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, insw ) ( volatile uint16_t *io_addr, uint16_t *data,
+			     unsigned int count ) {
+	efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, insl ) ( volatile uint32_t *io_addr, uint32_t *data,
+			     unsigned int count ) {
+	efi_ioreads ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outsb ) ( volatile uint8_t *io_addr, const uint8_t *data,
+			      unsigned int count ) {
+	efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outsw ) ( volatile uint16_t *io_addr, const uint16_t *data,
+			      unsigned int count ) {
+	efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, outsl ) ( volatile uint32_t *io_addr, const uint32_t *data,
+			      unsigned int count ) {
+	efi_iowrites ( io_addr, data, sizeof ( *io_addr ), count );
+}
+
+static inline __always_inline void
+IOAPI_INLINE ( efi, mb ) ( void ) {
+	/* Do nothing; EFI readl()/writel() calls already act as
+	 * memory barriers.
+	 */
+}
+
+#endif /* _IPXE_EFI_IO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_pci.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_pci.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_pci.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_pci.h	2012-01-06 23:49:04.000000000 +0000
@@ -12,11 +12,6 @@
 #include <ipxe/efi/Protocol/PciIo.h>
 #include <ipxe/efi/Protocol/DevicePath.h>
 
-/* PciRootBridgeIo.h uses LShiftU64(), which isn't defined anywhere else */
-static inline EFIAPI uint64_t LShiftU64 ( UINT64 value, UINTN shift ) {
-	return ( value << shift );
-}
-
 struct efi_driver;
 struct device;
 
@@ -38,11 +33,11 @@
 
 extern struct efi_pci_device * efipci_create ( struct efi_driver *efidrv,
 					       EFI_HANDLE device );
-extern int efipci_enable ( struct efi_pci_device *efipci );
+extern EFI_STATUS efipci_enable ( struct efi_pci_device *efipci );
 extern struct efi_pci_device * efipci_find_efi ( EFI_HANDLE device );
 extern struct efi_pci_device * efipci_find ( struct device *dev );
-extern int efipci_child_add ( struct efi_pci_device *efipci,
-			      EFI_HANDLE device );
+extern EFI_STATUS efipci_child_add ( struct efi_pci_device *efipci,
+				     EFI_HANDLE device );
 extern void efipci_child_del ( struct efi_pci_device *efipci,
 			       EFI_HANDLE device );
 extern void efipci_destroy ( struct efi_driver *efidrv,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_reboot.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_EFI_REBOOT_H
-#define _IPXE_EFI_REBOOT_H
-
-/** @file
- *
- * iPXE reboot API for EFI
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef REBOOT_EFI
-#define REBOOT_PREFIX_efi
-#else
-#define REBOOT_PREFIX_efi __efi_
-#endif
-
-#endif /* _IPXE_EFI_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_snp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_snp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_snp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_snp.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,79 +0,0 @@
-#ifndef _IPXE_EFI_SNP_H
-#define _IPXE_EFI_SNP_H
-
-/** @file
- *
- * iPXE EFI SNP interface
- *
- */
-
-#include <ipxe/list.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/Protocol/SimpleNetwork.h>
-#include <ipxe/efi/Protocol/NetworkInterfaceIdentifier.h>
-#include <ipxe/efi/Protocol/ComponentName2.h>
-#include <ipxe/efi/Protocol/DevicePath.h>
-#include <ipxe/efi/Protocol/HiiConfigAccess.h>
-#include <ipxe/efi/Protocol/HiiDatabase.h>
-#include <ipxe/efi/Protocol/LoadFile.h>
-
-/** An SNP device */
-struct efi_snp_device {
-	/** List of SNP devices */
-	struct list_head list;
-	/** The underlying iPXE network device */
-	struct net_device *netdev;
-	/** The underlying EFI PCI device */
-	struct efi_pci_device *efipci;
-	/** EFI device handle */
-	EFI_HANDLE handle;
-	/** The SNP structure itself */
-	EFI_SIMPLE_NETWORK_PROTOCOL snp;
-	/** The SNP "mode" (parameters) */
-	EFI_SIMPLE_NETWORK_MODE mode;
-	/** Outstanding TX packet count (via "interrupt status")
-	 *
-	 * Used in order to generate TX completions.
-	 */
-	unsigned int tx_count_interrupts;
-	/** Outstanding TX packet count (via "recycled tx buffers")
-	 *
-	 * Used in order to generate TX completions.
-	 */
-	unsigned int tx_count_txbufs;
-	/** Outstanding RX packet count (via "interrupt status") */
-	unsigned int rx_count_interrupts;
-	/** Outstanding RX packet count (via WaitForPacket event) */
-	unsigned int rx_count_events;
-	/** The network interface identifier */
-	EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL nii;
-	/** Component name protocol */
-	EFI_COMPONENT_NAME2_PROTOCOL name2;
-	/** Load file protocol handle */
-	EFI_LOAD_FILE_PROTOCOL load_file;
-	/** HII configuration access protocol */
-	EFI_HII_CONFIG_ACCESS_PROTOCOL hii;
-	/** HII package list */
-	EFI_HII_PACKAGE_LIST_HEADER *package_list;
-	/** HII handle */
-	EFI_HII_HANDLE hii_handle;
-	/** Device name */
-	wchar_t name[ sizeof ( ( ( struct net_device * ) NULL )->name ) ];
-	/** Driver name */
-	wchar_t driver_name[16];
-	/** Controller name */
-	wchar_t controller_name[32];
-	/** The device path
-	 *
-	 * This field is variable in size and must appear at the end
-	 * of the structure.
-	 */
-	EFI_DEVICE_PATH_PROTOCOL path;
-};
-
-extern int efi_snp_hii_install ( struct efi_snp_device *snpdev );
-extern void efi_snp_hii_uninstall ( struct efi_snp_device *snpdev );
-extern struct efi_snp_device * last_opened_snpdev ( void );
-
-#endif /* _IPXE_EFI_SNP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_uaccess.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_uaccess.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/efi_uaccess.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/efi_uaccess.h	2012-01-06 23:49:04.000000000 +0000
@@ -56,12 +56,6 @@
 	return trivial_userptr_add ( userptr, offset );
 }
 
-static inline __always_inline off_t
-UACCESS_INLINE ( efi, userptr_sub ) ( userptr_t userptr,
-				      userptr_t subtrahend ) {
-	return trivial_userptr_sub ( userptr, subtrahend );
-}
-
 static inline __always_inline void
 UACCESS_INLINE ( efi, memcpy_user ) ( userptr_t dest, off_t dest_off,
 					userptr_t src, off_t src_off,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/FileInfo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/FileInfo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/FileInfo.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/FileInfo.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,73 +0,0 @@
-/** @file
-  Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.SetInfo()
-  and EFI_FILE_PROTOCOL.GetInfo() to set or get generic file information.
-  This GUID is defined in UEFI specification.
-
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __FILE_INFO_H__
-#define __FILE_INFO_H__
-
-FILE_LICENCE ( BSD3 );
-
-#define EFI_FILE_INFO_ID \
-  { \
-    0x9576e92, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
-  }
-
-typedef struct {
-  ///
-  /// The size of the EFI_FILE_INFO structure, including the Null-terminated FileName string.
-  ///
-  UINT64    Size;
-  ///
-  /// The size of the file in bytes.
-  ///
-  UINT64    FileSize;
-  ///
-  /// PhysicalSize The amount of physical space the file consumes on the file system volume.
-  ///
-  UINT64    PhysicalSize;
-  ///
-  /// The time the file was created.
-  ///
-  EFI_TIME  CreateTime;
-  ///
-  /// The time when the file was last accessed.
-  ///
-  EFI_TIME  LastAccessTime;
-  ///
-  /// The time when the file's contents were last modified.
-  ///
-  EFI_TIME  ModificationTime;
-  ///
-  /// The attribute bits for the file.
-  ///
-  UINT64    Attribute;
-  ///
-  /// The Null-terminated name of the file.
-  ///
-  CHAR16    FileName[1];
-} EFI_FILE_INFO;
-
-///
-/// The FileName field of the EFI_FILE_INFO data structure is variable length.
-/// Whenever code needs to know the size of the EFI_FILE_INFO data structure, it needs to
-/// be the size of the data structure without the FileName field.  The following macro
-/// computes this size correctly no matter how big the FileName array is declared.
-/// This is required to make the EFI_FILE_INFO data structure ANSI compilant.
-///
-#define SIZE_OF_EFI_FILE_INFO OFFSET_OF (EFI_FILE_INFO, FileName)
-
-extern EFI_GUID gEfiFileInfoGuid;
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/FileSystemInfo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/FileSystemInfo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/FileSystemInfo.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/FileSystemInfo.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,65 +0,0 @@
-/** @file
-  Provides a GUID and a data structure that can be used with EFI_FILE_PROTOCOL.GetInfo()
-  or EFI_FILE_PROTOCOL.SetInfo() to get or set information about the system's volume.
-  This GUID is defined in UEFI specification.
-
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __FILE_SYSTEM_INFO_H__
-#define __FILE_SYSTEM_INFO_H__
-
-FILE_LICENCE ( BSD3 );
-
-#define EFI_FILE_SYSTEM_INFO_ID \
-  { \
-    0x9576e93, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
-  }
-
-typedef struct {
-  ///
-  /// The size of the EFI_FILE_SYSTEM_INFO structure, including the Null-terminated VolumeLabel string.
-  ///
-  UINT64  Size;
-  ///
-  /// TRUE if the volume only supports read access.
-  ///
-  BOOLEAN ReadOnly;
-  ///
-  /// The number of bytes managed by the file system.
-  ///
-  UINT64  VolumeSize;
-  ///
-  /// The number of available bytes for use by the file system.
-  ///
-  UINT64  FreeSpace;
-  ///
-  /// The nominal block size by which files are typically grown.
-  ///
-  UINT32  BlockSize;
-  ///
-  /// The Null-terminated string that is the volume's label.
-  ///
-  CHAR16  VolumeLabel[1];
-} EFI_FILE_SYSTEM_INFO;
-
-///
-/// The VolumeLabel field of the EFI_FILE_SYSTEM_INFO data structure is variable length.
-/// Whenever code needs to know the size of the EFI_FILE_SYSTEM_INFO data structure, it needs
-/// to be the size of the data structure without the VolumeLable field.  The following macro
-/// computes this size correctly no matter how big the VolumeLable array is declared.
-/// This is required to make the EFI_FILE_SYSTEM_INFO data structure ANSI compilant.
-///
-#define SIZE_OF_EFI_FILE_SYSTEM_INFO  OFFSET_OF (EFI_FILE_SYSTEM_INFO, VolumeLabel)
-
-extern EFI_GUID gEfiFileSystemInfoGuid;
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/WinCertificate.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/WinCertificate.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Guid/WinCertificate.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Guid/WinCertificate.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   GUID for UEFI WIN_CERTIFICATE structure.
 
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -76,7 +76,7 @@
 typedef struct {
   ///
   /// This is the standard WIN_CERTIFICATE header, where
-  /// wCertificateType is set to WIN_CERT_TYPE_EFI_GUID.
+  /// wCertificateType is set to WIN_CERT_TYPE_UEFI_GUID.
   ///
   WIN_CERTIFICATE   Hdr;
   ///
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Ia32/ProcessorBind.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Ia32/ProcessorBind.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Ia32/ProcessorBind.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Ia32/ProcessorBind.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   Processor or Compiler specific defines and types for IA-32 architecture.
 
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -149,7 +149,7 @@
   ///
   /// 1-byte signed value.
   ///
-  typedef signed char         INT8;
+  typedef char                INT8;
 #else
   ///
   /// 8-byte unsigned value.
@@ -196,7 +196,7 @@
   ///
   /// 1-byte signed value
   ///
-  typedef signed char         INT8;
+  typedef char                INT8;
 #endif
 
 ///
@@ -247,17 +247,13 @@
   /// Microsoft* compiler specific method for EFIAPI calling convention.
   ///
   #define EFIAPI __cdecl
-#elif defined(__GNUC__)
-  ///
-  /// GCC specific method for EFIAPI calling convention.
-  ///
-  #define EFIAPI __attribute__((cdecl))
 #else
-  ///
-  /// The default for a non Microsoft* or GCC compiler is to assume the EFI ABI
-  /// is the standard.
-  ///
-  #define EFIAPI
+  #if defined(__GNUC__)
+    ///
+    /// GCC specific method for EFIAPI calling convention.
+    ///
+    #define EFIAPI __attribute__((cdecl))
+  #endif
 #endif
 
 #if defined(__GNUC__)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/import.pl ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/import.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/import.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/import.pl	2012-01-06 23:49:04.000000000 +0000
@@ -59,7 +59,6 @@
       open my $outfh, ">$outfile" or die "Could not open $outfile: $!\n";
       my @dependencies = ();
       my $licence;
-      my $maybe_guard;
       my $guard;
       while ( <$infh> ) {
 	# Strip CR and trailing whitespace
@@ -78,16 +77,10 @@
 	# Write out line
 	print $outfh "$_\n";
 	# Apply FILE_LICENCE() immediately after include guard
-	if ( defined $maybe_guard ) {
-	  if ( /^\#define\s+_?_${maybe_guard}_?_$/ ) {
-	    die "Duplicate header guard detected in $infile\n" if $guard;
-	    $guard = $maybe_guard;
-	    print $outfh "\nFILE_LICENCE ( $licence );\n" if $licence;
-	  }
-	  undef $maybe_guard;
-	}
-	if ( /^#ifndef\s+_?_(\S+)_?_/ ) {
-	  $maybe_guard = $1;
+	if ( /^\#define\s+_?_\S+_H_?_$/ ) {
+	  die "Duplicate header guard detected in $infile\n" if $guard;
+	  $guard = 1;
+	  print $outfh "\nFILE_LICENCE ( $licence );\n" if $licence;
 	}
       }
       close $outfh;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/IndustryStandard/Pci22.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/IndustryStandard/Pci22.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/IndustryStandard/Pci22.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/IndustryStandard/Pci22.h	2012-01-06 23:49:04.000000000 +0000
@@ -6,7 +6,7 @@
     PCI-to-PCI Bridge Architecture Specification, Revision 1.2
     PC Card Standard, 8.0
 
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -221,7 +221,7 @@
 #define     PCI_IF_16550_MODEM            0x02
 #define     PCI_IF_16650_MODEM            0x03
 #define     PCI_IF_16750_MODEM            0x04
-#define   PCI_SUBCLASS_SCC_OTHER        0x80
+#define   PCI_SUBCLASS_SCC_OTHER          0x80
 
 #define PCI_CLASS_SYSTEM_PERIPHERAL   0x08
 #define   PCI_SUBCLASS_PIC              0x00
@@ -240,7 +240,7 @@
 #define     PCI_IF_EISA_TIMER             0x02
 #define   PCI_SUBCLASS_RTC              0x03
 #define     PCI_IF_GENERIC_RTC            0x00
-#define     PCI_IF_ISA_RTC                0x01
+#define     PCI_IF_ISA_RTC                0x00
 #define   PCI_SUBCLASS_PNP_CONTROLLER   0x04    ///< HotPlug Controller
 #define   PCI_SUBCLASS_PERIPHERAL_OTHER 0x80
 
@@ -251,12 +251,10 @@
 #define   PCI_SUBCLASS_SCAN_CONTROLLER  0x03
 #define   PCI_SUBCLASS_GAMEPORT         0x04
 #define     PCI_IF_GAMEPORT               0x00
-#define     PCI_IF_GAMEPORT1              0x10
+#define     PCI_IF_GAMEPORT1              0x01
 #define   PCI_SUBCLASS_INPUT_OTHER      0x80
 
 #define PCI_CLASS_DOCKING_STATION     0x0A
-#define   PCI_SUBCLASS_DOCKING_GENERIC  0x00
-#define   PCI_SUBCLASS_DOCKING_OTHER    0x80
 
 #define PCI_CLASS_PROCESSOR           0x0B
 #define   PCI_SUBCLASS_PROC_386         0x00
@@ -284,7 +282,7 @@
 #define PCI_CLASS_WIRELESS            0x0D
 #define   PCI_SUBCLASS_IRDA             0x00
 #define   PCI_SUBCLASS_IR               0x01
-#define   PCI_SUBCLASS_RF               0x10
+#define   PCI_SUBCLASS_RF               0x02
 #define   PCI_SUBCLASS_WIRELESS_OTHER   0x80
 
 #define PCI_CLASS_INTELLIGENT_IO      0x0E
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Library/BaseLib.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Library/BaseLib.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Library/BaseLib.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Library/BaseLib.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,7250 +0,0 @@
-/** @file
-  Provides string functions, linked list functions, math functions, synchronization
-  functions, and CPU architecture-specific functions.
-
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-This program and the accompanying materials
-are licensed and made available under the terms and conditions of the BSD License
-which accompanies this distribution.  The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __BASE_LIB__
-#define __BASE_LIB__
-
-FILE_LICENCE ( BSD3 );
-
-//
-// Definitions for architecture-specific types
-//
-#if   defined (MDE_CPU_IA32)
-///
-/// The IA-32 architecture context buffer used by SetJump() and LongJump().
-///
-typedef struct {
-  UINT32                            Ebx;
-  UINT32                            Esi;
-  UINT32                            Edi;
-  UINT32                            Ebp;
-  UINT32                            Esp;
-  UINT32                            Eip;
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
-
-#endif // defined (MDE_CPU_IA32)
-
-#if defined (MDE_CPU_IPF)
-
-///
-/// The Itanium architecture context buffer used by SetJump() and LongJump().
-///
-typedef struct {
-  UINT64                            F2[2];
-  UINT64                            F3[2];
-  UINT64                            F4[2];
-  UINT64                            F5[2];
-  UINT64                            F16[2];
-  UINT64                            F17[2];
-  UINT64                            F18[2];
-  UINT64                            F19[2];
-  UINT64                            F20[2];
-  UINT64                            F21[2];
-  UINT64                            F22[2];
-  UINT64                            F23[2];
-  UINT64                            F24[2];
-  UINT64                            F25[2];
-  UINT64                            F26[2];
-  UINT64                            F27[2];
-  UINT64                            F28[2];
-  UINT64                            F29[2];
-  UINT64                            F30[2];
-  UINT64                            F31[2];
-  UINT64                            R4;
-  UINT64                            R5;
-  UINT64                            R6;
-  UINT64                            R7;
-  UINT64                            SP;
-  UINT64                            BR0;
-  UINT64                            BR1;
-  UINT64                            BR2;
-  UINT64                            BR3;
-  UINT64                            BR4;
-  UINT64                            BR5;
-  UINT64                            InitialUNAT;
-  UINT64                            AfterSpillUNAT;
-  UINT64                            PFS;
-  UINT64                            BSP;
-  UINT64                            Predicates;
-  UINT64                            LoopCount;
-  UINT64                            FPSR;
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10
-
-#endif // defined (MDE_CPU_IPF)
-
-#if defined (MDE_CPU_X64)
-///
-/// The x64 architecture context buffer used by SetJump() and LongJump().
-///
-typedef struct {
-  UINT64                            Rbx;
-  UINT64                            Rsp;
-  UINT64                            Rbp;
-  UINT64                            Rdi;
-  UINT64                            Rsi;
-  UINT64                            R12;
-  UINT64                            R13;
-  UINT64                            R14;
-  UINT64                            R15;
-  UINT64                            Rip;
-  UINT64                            MxCsr;
-  UINT8                             XmmBuffer[160]; ///< XMM6-XMM15.
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
-
-#endif // defined (MDE_CPU_X64)
-
-#if defined (MDE_CPU_EBC)
-///
-/// The EBC context buffer used by SetJump() and LongJump().
-///
-typedef struct {
-  UINT64                            R0;
-  UINT64                            R1;
-  UINT64                            R2;
-  UINT64                            R3;
-  UINT64                            IP;
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8
-
-#endif // defined (MDE_CPU_EBC)
-
-#if defined (MDE_CPU_ARM)
-
-typedef struct {
-  UINT32    R3;  ///< A copy of R13.
-  UINT32    R4;
-  UINT32    R5;
-  UINT32    R6;
-  UINT32    R7;
-  UINT32    R8;
-  UINT32    R9;
-  UINT32    R10;
-  UINT32    R11;
-  UINT32    R12;
-  UINT32    R14;
-} BASE_LIBRARY_JUMP_BUFFER;
-
-#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4
-
-#endif  // defined (MDE_CPU_ARM)
-
-//
-// String Services
-//
-
-/**
-  Copies one Null-terminated Unicode string to another Null-terminated Unicode
-  string and returns the new Unicode string.
-
-  This function copies the contents of the Unicode string Source to the Unicode
-  string Destination, and returns Destination. If Source and Destination
-  overlap, then the results are undefined.
-
-  If Destination is NULL, then ASSERT().
-  If Destination is not aligned on a 16-bit boundary, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source is not aligned on a 16-bit boundary, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
-  PcdMaximumUnicodeStringLength Unicode characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated Unicode string.
-  @param  Source      The pointer to a Null-terminated Unicode string.
-
-  @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrCpy (
-  OUT     CHAR16                    *Destination,
-  IN      CONST CHAR16              *Source
-  );
-
-
-/**
-  Copies up to a specified length from one Null-terminated Unicode string to
-  another Null-terminated Unicode string and returns the new Unicode string.
-
-  This function copies the contents of the Unicode string Source to the Unicode
-  string Destination, and returns Destination. At most, Length Unicode
-  characters are copied from Source to Destination. If Length is 0, then
-  Destination is returned unmodified. If Length is greater that the number of
-  Unicode characters in Source, then Destination is padded with Null Unicode
-  characters. If Source and Destination overlap, then the results are
-  undefined.
-
-  If Length > 0 and Destination is NULL, then ASSERT().
-  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
-  If Length > 0 and Source is NULL, then ASSERT().
-  If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
-  PcdMaximumUnicodeStringLength, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
-  then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated Unicode string.
-  @param  Source      The pointer to a Null-terminated Unicode string.
-  @param  Length      The maximum number of Unicode characters to copy.
-
-  @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrnCpy (
-  OUT     CHAR16                    *Destination,
-  IN      CONST CHAR16              *Source,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the length of a Null-terminated Unicode string.
-
-  This function returns the number of Unicode characters in the Null-terminated
-  Unicode string specified by String.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned on a 16-bit boundary, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and String contains more than
-  PcdMaximumUnicodeStringLength Unicode characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  String  Pointer to a Null-terminated Unicode string.
-
-  @return The length of String.
-
-**/
-UINTN
-EFIAPI
-StrLen (
-  IN      CONST CHAR16              *String
-  );
-
-
-/**
-  Returns the size of a Null-terminated Unicode string in bytes, including the
-  Null terminator.
-
-  This function returns the size, in bytes, of the Null-terminated Unicode string
-  specified by String.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned on a 16-bit boundary, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and String contains more than
-  PcdMaximumUnicodeStringLength Unicode characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  String  The pointer to a Null-terminated Unicode string.
-
-  @return The size of String.
-
-**/
-UINTN
-EFIAPI
-StrSize (
-  IN      CONST CHAR16              *String
-  );
-
-
-/**
-  Compares two Null-terminated Unicode strings, and returns the difference
-  between the first mismatched Unicode characters.
-
-  This function compares the Null-terminated Unicode string FirstString to the
-  Null-terminated Unicode string SecondString. If FirstString is identical to
-  SecondString, then 0 is returned. Otherwise, the value returned is the first
-  mismatched Unicode character in SecondString subtracted from the first
-  mismatched Unicode character in FirstString.
-
-  If FirstString is NULL, then ASSERT().
-  If FirstString is not aligned on a 16-bit boundary, then ASSERT().
-  If SecondString is NULL, then ASSERT().
-  If SecondString is not aligned on a 16-bit boundary, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
-  than PcdMaximumUnicodeStringLength Unicode characters not including the
-  Null-terminator, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
-  than PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-
-  @param  FirstString   The pointer to a Null-terminated Unicode string.
-  @param  SecondString  The pointer to a Null-terminated Unicode string.
-
-  @retval 0      FirstString is identical to SecondString.
-  @return others FirstString is not identical to SecondString.
-
-**/
-INTN
-EFIAPI
-StrCmp (
-  IN      CONST CHAR16              *FirstString,
-  IN      CONST CHAR16              *SecondString
-  );
-
-
-/**
-  Compares up to a specified length the contents of two Null-terminated Unicode strings,
-  and returns the difference between the first mismatched Unicode characters.
-
-  This function compares the Null-terminated Unicode string FirstString to the
-  Null-terminated Unicode string SecondString. At most, Length Unicode
-  characters will be compared. If Length is 0, then 0 is returned. If
-  FirstString is identical to SecondString, then 0 is returned. Otherwise, the
-  value returned is the first mismatched Unicode character in SecondString
-  subtracted from the first mismatched Unicode character in FirstString.
-
-  If Length > 0 and FirstString is NULL, then ASSERT().
-  If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().
-  If Length > 0 and SecondString is NULL, then ASSERT().
-  If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
-  PcdMaximumUnicodeStringLength, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,
-  then ASSERT().
-
-  @param  FirstString   The pointer to a Null-terminated Unicode string.
-  @param  SecondString  The pointer to a Null-terminated Unicode string.
-  @param  Length        The maximum number of Unicode characters to compare.
-
-  @retval 0      FirstString is identical to SecondString.
-  @return others FirstString is not identical to SecondString.
-
-**/
-INTN
-EFIAPI
-StrnCmp (
-  IN      CONST CHAR16              *FirstString,
-  IN      CONST CHAR16              *SecondString,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Concatenates one Null-terminated Unicode string to another Null-terminated
-  Unicode string, and returns the concatenated Unicode string.
-
-  This function concatenates two Null-terminated Unicode strings. The contents
-  of Null-terminated Unicode string Source are concatenated to the end of
-  Null-terminated Unicode string Destination. The Null-terminated concatenated
-  Unicode String is returned. If Source and Destination overlap, then the
-  results are undefined.
-
-  If Destination is NULL, then ASSERT().
-  If Destination is not aligned on a 16-bit boundary, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source is not aligned on a 16-bit boundary, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
-  than PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
-  and Source results in a Unicode string with more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated Unicode string.
-  @param  Source      The pointer to a Null-terminated Unicode string.
-
-  @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrCat (
-  IN OUT  CHAR16                    *Destination,
-  IN      CONST CHAR16              *Source
-  );
-
-
-/**
-  Concatenates up to a specified length one Null-terminated Unicode to the end
-  of another Null-terminated Unicode string, and returns the concatenated
-  Unicode string.
-
-  This function concatenates two Null-terminated Unicode strings. The contents
-  of Null-terminated Unicode string Source are concatenated to the end of
-  Null-terminated Unicode string Destination, and Destination is returned. At
-  most, Length Unicode characters are concatenated from Source to the end of
-  Destination, and Destination is always Null-terminated. If Length is 0, then
-  Destination is returned unmodified. If Source and Destination overlap, then
-  the results are undefined.
-
-  If Destination is NULL, then ASSERT().
-  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().
-  If Length > 0 and Source is NULL, then ASSERT().
-  If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than
-  PcdMaximumUnicodeStringLength, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
-  than PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
-  PcdMaximumUnicodeStringLength Unicode characters, not including the
-  Null-terminator, then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
-  and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength
-  Unicode characters, not including the Null-terminator, then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated Unicode string.
-  @param  Source      The pointer to a Null-terminated Unicode string.
-  @param  Length      The maximum number of Unicode characters to concatenate from
-                      Source.
-
-  @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-StrnCat (
-  IN OUT  CHAR16                    *Destination,
-  IN      CONST CHAR16              *Source,
-  IN      UINTN                     Length
-  );
-
-/**
-  Returns the first occurrence of a Null-terminated Unicode sub-string
-  in a Null-terminated Unicode string.
-
-  This function scans the contents of the Null-terminated Unicode string
-  specified by String and returns the first occurrence of SearchString.
-  If SearchString is not found in String, then NULL is returned.  If
-  the length of SearchString is zero, then String is returned.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned on a 16-bit boundary, then ASSERT().
-  If SearchString is NULL, then ASSERT().
-  If SearchString is not aligned on a 16-bit boundary, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and SearchString
-  or String contains more than PcdMaximumUnicodeStringLength Unicode
-  characters, not including the Null-terminator, then ASSERT().
-
-  @param  String          The pointer to a Null-terminated Unicode string.
-  @param  SearchString    The pointer to a Null-terminated Unicode string to search for.
-
-  @retval NULL            If the SearchString does not appear in String.
-  @return others          If there is a match.
-
-**/
-CHAR16 *
-EFIAPI
-StrStr (
-  IN      CONST CHAR16              *String,
-  IN      CONST CHAR16              *SearchString
-  );
-
-/**
-  Convert a Null-terminated Unicode decimal string to a value of
-  type UINTN.
-
-  This function returns a value of type UINTN by interpreting the contents
-  of the Unicode string specified by String as a decimal number. The format
-  of the input Unicode string String is:
-
-                  [spaces] [decimal digits].
-
-  The valid decimal digit character is in the range [0-9]. The
-  function will ignore the pad space, which includes spaces or
-  tab characters, before [decimal digits]. The running zero in the
-  beginning of [decimal digits] will be ignored. Then, the function
-  stops at the first character that is a not a valid decimal character
-  or a Null-terminator, whichever one comes first.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned in a 16-bit boundary, then ASSERT().
-  If String has only pad spaces, then 0 is returned.
-  If String has no pad spaces or valid decimal digits,
-  then 0 is returned.
-  If the number represented by String overflows according
-  to the range defined by UINTN, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and String contains
-  more than PcdMaximumUnicodeStringLength Unicode characters not including
-  the Null-terminator, then ASSERT().
-
-  @param  String      The pointer to a Null-terminated Unicode string.
-
-  @retval Value translated from String.
-
-**/
-UINTN
-EFIAPI
-StrDecimalToUintn (
-  IN      CONST CHAR16              *String
-  );
-
-/**
-  Convert a Null-terminated Unicode decimal string to a value of
-  type UINT64.
-
-  This function returns a value of type UINT64 by interpreting the contents
-  of the Unicode string specified by String as a decimal number. The format
-  of the input Unicode string String is:
-
-                  [spaces] [decimal digits].
-
-  The valid decimal digit character is in the range [0-9]. The
-  function will ignore the pad space, which includes spaces or
-  tab characters, before [decimal digits]. The running zero in the
-  beginning of [decimal digits] will be ignored. Then, the function
-  stops at the first character that is a not a valid decimal character
-  or a Null-terminator, whichever one comes first.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned in a 16-bit boundary, then ASSERT().
-  If String has only pad spaces, then 0 is returned.
-  If String has no pad spaces or valid decimal digits,
-  then 0 is returned.
-  If the number represented by String overflows according
-  to the range defined by UINT64, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and String contains
-  more than PcdMaximumUnicodeStringLength Unicode characters not including
-  the Null-terminator, then ASSERT().
-
-  @param  String          The pointer to a Null-terminated Unicode string.
-
-  @retval Value translated from String.
-
-**/
-UINT64
-EFIAPI
-StrDecimalToUint64 (
-  IN      CONST CHAR16              *String
-  );
-
-
-/**
-  Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.
-
-  This function returns a value of type UINTN by interpreting the contents
-  of the Unicode string specified by String as a hexadecimal number.
-  The format of the input Unicode string String is:
-
-                  [spaces][zeros][x][hexadecimal digits].
-
-  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
-  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
-  If "x" appears in the input string, it must be prefixed with at least one 0.
-  The function will ignore the pad space, which includes spaces or tab characters,
-  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
-  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
-  first valid hexadecimal digit. Then, the function stops at the first character
-  that is a not a valid hexadecimal character or NULL, whichever one comes first.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned in a 16-bit boundary, then ASSERT().
-  If String has only pad spaces, then zero is returned.
-  If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
-  then zero is returned.
-  If the number represented by String overflows according to the range defined by
-  UINTN, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and String contains more than
-  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String          The pointer to a Null-terminated Unicode string.
-
-  @retval Value translated from String.
-
-**/
-UINTN
-EFIAPI
-StrHexToUintn (
-  IN      CONST CHAR16              *String
-  );
-
-
-/**
-  Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.
-
-  This function returns a value of type UINT64 by interpreting the contents
-  of the Unicode string specified by String as a hexadecimal number.
-  The format of the input Unicode string String is
-
-                  [spaces][zeros][x][hexadecimal digits].
-
-  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
-  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.
-  If "x" appears in the input string, it must be prefixed with at least one 0.
-  The function will ignore the pad space, which includes spaces or tab characters,
-  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or
-  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the
-  first valid hexadecimal digit. Then, the function stops at the first character that is
-  a not a valid hexadecimal character or NULL, whichever one comes first.
-
-  If String is NULL, then ASSERT().
-  If String is not aligned in a 16-bit boundary, then ASSERT().
-  If String has only pad spaces, then zero is returned.
-  If String has no leading pad spaces, leading zeros or valid hexadecimal digits,
-  then zero is returned.
-  If the number represented by String overflows according to the range defined by
-  UINT64, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and String contains more than
-  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String          The pointer to a Null-terminated Unicode string.
-
-  @retval Value translated from String.
-
-**/
-UINT64
-EFIAPI
-StrHexToUint64 (
-  IN      CONST CHAR16             *String
-  );
-
-/**
-  Convert a Null-terminated Unicode string to a Null-terminated
-  ASCII string and returns the ASCII string.
-
-  This function converts the content of the Unicode string Source
-  to the ASCII string Destination by copying the lower 8 bits of
-  each Unicode character. It returns Destination.
-
-  The caller is responsible to make sure Destination points to a buffer with size
-  equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.
-
-  If any Unicode characters in Source contain non-zero value in
-  the upper 8 bits, then ASSERT().
-
-  If Destination is NULL, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source is not aligned on a 16-bit boundary, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains
-  more than PcdMaximumUnicodeStringLength Unicode characters not including
-  the Null-terminator, then ASSERT().
-
-  If PcdMaximumAsciiStringLength is not zero, and Source contains more
-  than PcdMaximumAsciiStringLength Unicode characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  Source        The pointer to a Null-terminated Unicode string.
-  @param  Destination   The pointer to a Null-terminated ASCII string.
-
-  @return Destination.
-
-**/
-CHAR8 *
-EFIAPI
-UnicodeStrToAsciiStr (
-  IN      CONST CHAR16              *Source,
-  OUT     CHAR8                     *Destination
-  );
-
-
-/**
-  Copies one Null-terminated ASCII string to another Null-terminated ASCII
-  string and returns the new ASCII string.
-
-  This function copies the contents of the ASCII string Source to the ASCII
-  string Destination, and returns Destination. If Source and Destination
-  overlap, then the results are undefined.
-
-  If Destination is NULL, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and Source contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated ASCII string.
-  @param  Source      The pointer to a Null-terminated ASCII string.
-
-  @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrCpy (
-  OUT     CHAR8                     *Destination,
-  IN      CONST CHAR8               *Source
-  );
-
-
-/**
-  Copies up to a specified length one Null-terminated ASCII string to another
-  Null-terminated ASCII string and returns the new ASCII string.
-
-  This function copies the contents of the ASCII string Source to the ASCII
-  string Destination, and returns Destination. At most, Length ASCII characters
-  are copied from Source to Destination. If Length is 0, then Destination is
-  returned unmodified. If Length is greater that the number of ASCII characters
-  in Source, then Destination is padded with Null ASCII characters. If Source
-  and Destination overlap, then the results are undefined.
-
-  If Destination is NULL, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Length is greater than
-  PcdMaximumAsciiStringLength, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Source contains more than
-  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
-  then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated ASCII string.
-  @param  Source      The pointer to a Null-terminated ASCII string.
-  @param  Length      The maximum number of ASCII characters to copy.
-
-  @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrnCpy (
-  OUT     CHAR8                     *Destination,
-  IN      CONST CHAR8               *Source,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the length of a Null-terminated ASCII string.
-
-  This function returns the number of ASCII characters in the Null-terminated
-  ASCII string specified by String.
-
-  If Length > 0 and Destination is NULL, then ASSERT().
-  If Length > 0 and Source is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and String contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String  The pointer to a Null-terminated ASCII string.
-
-  @return The length of String.
-
-**/
-UINTN
-EFIAPI
-AsciiStrLen (
-  IN      CONST CHAR8               *String
-  );
-
-
-/**
-  Returns the size of a Null-terminated ASCII string in bytes, including the
-  Null terminator.
-
-  This function returns the size, in bytes, of the Null-terminated ASCII string
-  specified by String.
-
-  If String is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and String contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String  The pointer to a Null-terminated ASCII string.
-
-  @return The size of String.
-
-**/
-UINTN
-EFIAPI
-AsciiStrSize (
-  IN      CONST CHAR8               *String
-  );
-
-
-/**
-  Compares two Null-terminated ASCII strings, and returns the difference
-  between the first mismatched ASCII characters.
-
-  This function compares the Null-terminated ASCII string FirstString to the
-  Null-terminated ASCII string SecondString. If FirstString is identical to
-  SecondString, then 0 is returned. Otherwise, the value returned is the first
-  mismatched ASCII character in SecondString subtracted from the first
-  mismatched ASCII character in FirstString.
-
-  If FirstString is NULL, then ASSERT().
-  If SecondString is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and SecondString contains more
-  than PcdMaximumAsciiStringLength ASCII characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  FirstString   The pointer to a Null-terminated ASCII string.
-  @param  SecondString  The pointer to a Null-terminated ASCII string.
-
-  @retval ==0      FirstString is identical to SecondString.
-  @retval !=0      FirstString is not identical to SecondString.
-
-**/
-INTN
-EFIAPI
-AsciiStrCmp (
-  IN      CONST CHAR8               *FirstString,
-  IN      CONST CHAR8               *SecondString
-  );
-
-
-/**
-  Performs a case insensitive comparison of two Null-terminated ASCII strings,
-  and returns the difference between the first mismatched ASCII characters.
-
-  This function performs a case insensitive comparison of the Null-terminated
-  ASCII string FirstString to the Null-terminated ASCII string SecondString. If
-  FirstString is identical to SecondString, then 0 is returned. Otherwise, the
-  value returned is the first mismatched lower case ASCII character in
-  SecondString subtracted from the first mismatched lower case ASCII character
-  in FirstString.
-
-  If FirstString is NULL, then ASSERT().
-  If SecondString is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and SecondString contains more
-  than PcdMaximumAsciiStringLength ASCII characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  FirstString   The pointer to a Null-terminated ASCII string.
-  @param  SecondString  The pointer to a Null-terminated ASCII string.
-
-  @retval ==0    FirstString is identical to SecondString using case insensitive
-                 comparisons.
-  @retval !=0    FirstString is not identical to SecondString using case
-                 insensitive comparisons.
-
-**/
-INTN
-EFIAPI
-AsciiStriCmp (
-  IN      CONST CHAR8               *FirstString,
-  IN      CONST CHAR8               *SecondString
-  );
-
-
-/**
-  Compares two Null-terminated ASCII strings with maximum lengths, and returns
-  the difference between the first mismatched ASCII characters.
-
-  This function compares the Null-terminated ASCII string FirstString to the
-  Null-terminated ASCII  string SecondString. At most, Length ASCII characters
-  will be compared. If Length is 0, then 0 is returned. If FirstString is
-  identical to SecondString, then 0 is returned. Otherwise, the value returned
-  is the first mismatched ASCII character in SecondString subtracted from the
-  first mismatched ASCII character in FirstString.
-
-  If Length > 0 and FirstString is NULL, then ASSERT().
-  If Length > 0 and SecondString is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Length is greater than
-  PcdMaximumAsciiStringLength, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than
-  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than
-  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
-  then ASSERT().
-
-  @param  FirstString   The pointer to a Null-terminated ASCII string.
-  @param  SecondString  The pointer to a Null-terminated ASCII string.
-  @param  Length        The maximum number of ASCII characters for compare.
-
-  @retval ==0       FirstString is identical to SecondString.
-  @retval !=0       FirstString is not identical to SecondString.
-
-**/
-INTN
-EFIAPI
-AsciiStrnCmp (
-  IN      CONST CHAR8               *FirstString,
-  IN      CONST CHAR8               *SecondString,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Concatenates one Null-terminated ASCII string to another Null-terminated
-  ASCII string, and returns the concatenated ASCII string.
-
-  This function concatenates two Null-terminated ASCII strings. The contents of
-  Null-terminated ASCII string Source are concatenated to the end of Null-
-  terminated ASCII string Destination. The Null-terminated concatenated ASCII
-  String is returned.
-
-  If Destination is NULL, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and Destination contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and Source contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
-  Source results in a ASCII string with more than PcdMaximumAsciiStringLength
-  ASCII characters, then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated ASCII string.
-  @param  Source      The pointer to a Null-terminated ASCII string.
-
-  @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrCat (
-  IN OUT CHAR8    *Destination,
-  IN CONST CHAR8  *Source
-  );
-
-
-/**
-  Concatenates up to a specified length one Null-terminated ASCII string to
-  the end of another Null-terminated ASCII string, and returns the
-  concatenated ASCII string.
-
-  This function concatenates two Null-terminated ASCII strings. The contents
-  of Null-terminated ASCII string Source are concatenated to the end of Null-
-  terminated ASCII string Destination, and Destination is returned. At most,
-  Length ASCII characters are concatenated from Source to the end of
-  Destination, and Destination is always Null-terminated. If Length is 0, then
-  Destination is returned unmodified. If Source and Destination overlap, then
-  the results are undefined.
-
-  If Length > 0 and Destination is NULL, then ASSERT().
-  If Length > 0 and Source is NULL, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Length is greater than
-  PcdMaximumAsciiStringLength, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Destination contains more than
-  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Source contains more than
-  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
-  Source results in a ASCII string with more than PcdMaximumAsciiStringLength
-  ASCII characters, not including the Null-terminator, then ASSERT().
-
-  @param  Destination The pointer to a Null-terminated ASCII string.
-  @param  Source      The pointer to a Null-terminated ASCII string.
-  @param  Length      The maximum number of ASCII characters to concatenate from
-                      Source.
-
-  @return Destination
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrnCat (
-  IN OUT  CHAR8                     *Destination,
-  IN      CONST CHAR8               *Source,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the first occurrence of a Null-terminated ASCII sub-string
-  in a Null-terminated ASCII string.
-
-  This function scans the contents of the ASCII string specified by String
-  and returns the first occurrence of SearchString. If SearchString is not
-  found in String, then NULL is returned. If the length of SearchString is zero,
-  then String is returned.
-
-  If String is NULL, then ASSERT().
-  If SearchString is NULL, then ASSERT().
-
-  If PcdMaximumAsciiStringLength is not zero, and SearchString or
-  String contains more than PcdMaximumAsciiStringLength Unicode characters
-  not including the Null-terminator, then ASSERT().
-
-  @param  String          The pointer to a Null-terminated ASCII string.
-  @param  SearchString    The pointer to a Null-terminated ASCII string to search for.
-
-  @retval NULL            If the SearchString does not appear in String.
-  @retval others          If there is a match return the first occurrence of SearchingString.
-                          If the length of SearchString is zero,return String.
-
-**/
-CHAR8 *
-EFIAPI
-AsciiStrStr (
-  IN      CONST CHAR8               *String,
-  IN      CONST CHAR8               *SearchString
-  );
-
-
-/**
-  Convert a Null-terminated ASCII decimal string to a value of type
-  UINTN.
-
-  This function returns a value of type UINTN by interpreting the contents
-  of the ASCII string String as a decimal number. The format of the input
-  ASCII string String is:
-
-                    [spaces] [decimal digits].
-
-  The valid decimal digit character is in the range [0-9]. The function will
-  ignore the pad space, which includes spaces or tab characters, before the digits.
-  The running zero in the beginning of [decimal digits] will be ignored. Then, the
-  function stops at the first character that is a not a valid decimal character or
-  Null-terminator, whichever on comes first.
-
-  If String has only pad spaces, then 0 is returned.
-  If String has no pad spaces or valid decimal digits, then 0 is returned.
-  If the number represented by String overflows according to the range defined by
-  UINTN, then ASSERT().
-  If String is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and String contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String          The pointer to a Null-terminated ASCII string.
-
-  @retval The value translated from String.
-
-**/
-UINTN
-EFIAPI
-AsciiStrDecimalToUintn (
-  IN      CONST CHAR8               *String
-  );
-
-
-/**
-  Convert a Null-terminated ASCII decimal string to a value of type
-  UINT64.
-
-  This function returns a value of type UINT64 by interpreting the contents
-  of the ASCII string String as a decimal number. The format of the input
-  ASCII string String is:
-
-                    [spaces] [decimal digits].
-
-  The valid decimal digit character is in the range [0-9]. The function will
-  ignore the pad space, which includes spaces or tab characters, before the digits.
-  The running zero in the beginning of [decimal digits] will be ignored. Then, the
-  function stops at the first character that is a not a valid decimal character or
-  Null-terminator, whichever on comes first.
-
-  If String has only pad spaces, then 0 is returned.
-  If String has no pad spaces or valid decimal digits, then 0 is returned.
-  If the number represented by String overflows according to the range defined by
-  UINT64, then ASSERT().
-  If String is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and String contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-
-  @param  String          The pointer to a Null-terminated ASCII string.
-
-  @retval Value translated from String.
-
-**/
-UINT64
-EFIAPI
-AsciiStrDecimalToUint64 (
-  IN      CONST CHAR8               *String
-  );
-
-
-/**
-  Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.
-
-  This function returns a value of type UINTN by interpreting the contents of
-  the ASCII string String as a hexadecimal number. The format of the input ASCII
-  string String is:
-
-                  [spaces][zeros][x][hexadecimal digits].
-
-  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
-  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
-  appears in the input string, it must be prefixed with at least one 0. The function
-  will ignore the pad space, which includes spaces or tab characters, before [zeros],
-  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
-  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
-  digit. Then, the function stops at the first character that is a not a valid
-  hexadecimal character or Null-terminator, whichever on comes first.
-
-  If String has only pad spaces, then 0 is returned.
-  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
-  0 is returned.
-
-  If the number represented by String overflows according to the range defined by UINTN,
-  then ASSERT().
-  If String is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero,
-  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
-  the Null-terminator, then ASSERT().
-
-  @param  String          The pointer to a Null-terminated ASCII string.
-
-  @retval Value translated from String.
-
-**/
-UINTN
-EFIAPI
-AsciiStrHexToUintn (
-  IN      CONST CHAR8               *String
-  );
-
-
-/**
-  Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.
-
-  This function returns a value of type UINT64 by interpreting the contents of
-  the ASCII string String as a hexadecimal number. The format of the input ASCII
-  string String is:
-
-                  [spaces][zeros][x][hexadecimal digits].
-
-  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].
-  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"
-  appears in the input string, it must be prefixed with at least one 0. The function
-  will ignore the pad space, which includes spaces or tab characters, before [zeros],
-  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]
-  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal
-  digit. Then, the function stops at the first character that is a not a valid
-  hexadecimal character or Null-terminator, whichever on comes first.
-
-  If String has only pad spaces, then 0 is returned.
-  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then
-  0 is returned.
-
-  If the number represented by String overflows according to the range defined by UINT64,
-  then ASSERT().
-  If String is NULL, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero,
-  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including
-  the Null-terminator, then ASSERT().
-
-  @param  String          The pointer to a Null-terminated ASCII string.
-
-  @retval Value translated from String.
-
-**/
-UINT64
-EFIAPI
-AsciiStrHexToUint64 (
-  IN      CONST CHAR8                *String
-  );
-
-
-/**
-  Convert one Null-terminated ASCII string to a Null-terminated
-  Unicode string and returns the Unicode string.
-
-  This function converts the contents of the ASCII string Source to the Unicode
-  string Destination, and returns Destination.  The function terminates the
-  Unicode string Destination by appending a Null-terminator character at the end.
-  The caller is responsible to make sure Destination points to a buffer with size
-  equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.
-
-  If Destination is NULL, then ASSERT().
-  If Destination is not aligned on a 16-bit boundary, then ASSERT().
-  If Source is NULL, then ASSERT().
-  If Source and Destination overlap, then ASSERT().
-  If PcdMaximumAsciiStringLength is not zero, and Source contains more than
-  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,
-  then ASSERT().
-  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
-  PcdMaximumUnicodeStringLength ASCII characters not including the
-  Null-terminator, then ASSERT().
-
-  @param  Source        The pointer to a Null-terminated ASCII string.
-  @param  Destination   The pointer to a Null-terminated Unicode string.
-
-  @return Destination.
-
-**/
-CHAR16 *
-EFIAPI
-AsciiStrToUnicodeStr (
-  IN      CONST CHAR8               *Source,
-  OUT     CHAR16                    *Destination
-  );
-
-
-/**
-  Converts an 8-bit value to an 8-bit BCD value.
-
-  Converts the 8-bit value specified by Value to BCD. The BCD value is
-  returned.
-
-  If Value >= 100, then ASSERT().
-
-  @param  Value The 8-bit value to convert to BCD. Range 0..99.
-
-  @return The BCD value.
-
-**/
-UINT8
-EFIAPI
-DecimalToBcd8 (
-  IN      UINT8                     Value
-  );
-
-
-/**
-  Converts an 8-bit BCD value to an 8-bit value.
-
-  Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit
-  value is returned.
-
-  If Value >= 0xA0, then ASSERT().
-  If (Value & 0x0F) >= 0x0A, then ASSERT().
-
-  @param  Value The 8-bit BCD value to convert to an 8-bit value.
-
-  @return The 8-bit value is returned.
-
-**/
-UINT8
-EFIAPI
-BcdToDecimal8 (
-  IN      UINT8                     Value
-  );
-
-
-//
-// Linked List Functions and Macros
-//
-
-/**
-  Initializes the head node of a doubly linked list that is declared as a
-  global variable in a module.
-
-  Initializes the forward and backward links of a new linked list. After
-  initializing a linked list with this macro, the other linked list functions
-  may be used to add and remove nodes from the linked list. This macro results
-  in smaller executables by initializing the linked list in the data section,
-  instead if calling the InitializeListHead() function to perform the
-  equivalent operation.
-
-  @param  ListHead  The head note of a list to initialize.
-
-**/
-#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead)  {&(ListHead), &(ListHead)}
-
-
-/**
-  Initializes the head node of a doubly linked list, and returns the pointer to
-  the head node of the doubly linked list.
-
-  Initializes the forward and backward links of a new linked list. After
-  initializing a linked list with this function, the other linked list
-  functions may be used to add and remove nodes from the linked list. It is up
-  to the caller of this function to allocate the memory for ListHead.
-
-  If ListHead is NULL, then ASSERT().
-
-  @param  ListHead  A pointer to the head node of a new doubly linked list.
-
-  @return ListHead
-
-**/
-LIST_ENTRY *
-EFIAPI
-InitializeListHead (
-  IN OUT  LIST_ENTRY                *ListHead
-  );
-
-
-/**
-  Adds a node to the beginning of a doubly linked list, and returns the pointer
-  to the head node of the doubly linked list.
-
-  Adds the node Entry at the beginning of the doubly linked list denoted by
-  ListHead, and returns ListHead.
-
-  If ListHead is NULL, then ASSERT().
-  If Entry is NULL, then ASSERT().
-  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
-  of nodes in ListHead, including the ListHead node, is greater than or
-  equal to PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  ListHead  A pointer to the head node of a doubly linked list.
-  @param  Entry     A pointer to a node that is to be inserted at the beginning
-                    of a doubly linked list.
-
-  @return ListHead
-
-**/
-LIST_ENTRY *
-EFIAPI
-InsertHeadList (
-  IN OUT  LIST_ENTRY                *ListHead,
-  IN OUT  LIST_ENTRY                *Entry
-  );
-
-
-/**
-  Adds a node to the end of a doubly linked list, and returns the pointer to
-  the head node of the doubly linked list.
-
-  Adds the node Entry to the end of the doubly linked list denoted by ListHead,
-  and returns ListHead.
-
-  If ListHead is NULL, then ASSERT().
-  If Entry is NULL, then ASSERT().
-  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and prior to insertion the number
-  of nodes in ListHead, including the ListHead node, is greater than or
-  equal to PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  ListHead  A pointer to the head node of a doubly linked list.
-  @param  Entry     A pointer to a node that is to be added at the end of the
-                    doubly linked list.
-
-  @return ListHead
-
-**/
-LIST_ENTRY *
-EFIAPI
-InsertTailList (
-  IN OUT  LIST_ENTRY                *ListHead,
-  IN OUT  LIST_ENTRY                *Entry
-  );
-
-
-/**
-  Retrieves the first node of a doubly linked list.
-
-  Returns the first node of a doubly linked list.  List must have been
-  initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
-  If List is empty, then List is returned.
-
-  If List is NULL, then ASSERT().
-  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes
-  in List, including the List node, is greater than or equal to
-  PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  List  A pointer to the head node of a doubly linked list.
-
-  @return The first node of a doubly linked list.
-  @retval NULL  The list is empty.
-
-**/
-LIST_ENTRY *
-EFIAPI
-GetFirstNode (
-  IN      CONST LIST_ENTRY          *List
-  );
-
-
-/**
-  Retrieves the next node of a doubly linked list.
-
-  Returns the node of a doubly linked list that follows Node.
-  List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
-  or InitializeListHead().  If List is empty, then List is returned.
-
-  If List is NULL, then ASSERT().
-  If Node is NULL, then ASSERT().
-  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and List contains more than
-  PcdMaximumLinkedListLength nodes, then ASSERT().
-  If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
-
-  @param  List  A pointer to the head node of a doubly linked list.
-  @param  Node  A pointer to a node in the doubly linked list.
-
-  @return The pointer to the next node if one exists. Otherwise List is returned.
-
-**/
-LIST_ENTRY *
-EFIAPI
-GetNextNode (
-  IN      CONST LIST_ENTRY          *List,
-  IN      CONST LIST_ENTRY          *Node
-  );
-
-
-/**
-  Retrieves the previous node of a doubly linked list.
-
-  Returns the node of a doubly linked list that precedes Node.
-  List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()
-  or InitializeListHead().  If List is empty, then List is returned.
-
-  If List is NULL, then ASSERT().
-  If Node is NULL, then ASSERT().
-  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and List contains more than
-  PcdMaximumLinkedListLength nodes, then ASSERT().
-  If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
-
-  @param  List  A pointer to the head node of a doubly linked list.
-  @param  Node  A pointer to a node in the doubly linked list.
-
-  @return The pointer to the previous node if one exists. Otherwise List is returned.
-
-**/
-LIST_ENTRY *
-EFIAPI
-GetPreviousNode (
-  IN      CONST LIST_ENTRY          *List,
-  IN      CONST LIST_ENTRY          *Node
-  );
-
-
-/**
-  Checks to see if a doubly linked list is empty or not.
-
-  Checks to see if the doubly linked list is empty. If the linked list contains
-  zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
-
-  If ListHead is NULL, then ASSERT().
-  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes
-  in List, including the List node, is greater than or equal to
-  PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  ListHead  A pointer to the head node of a doubly linked list.
-
-  @retval TRUE  The linked list is empty.
-  @retval FALSE The linked list is not empty.
-
-**/
-BOOLEAN
-EFIAPI
-IsListEmpty (
-  IN      CONST LIST_ENTRY          *ListHead
-  );
-
-
-/**
-  Determines if a node in a doubly linked list is the head node of a the same
-  doubly linked list.  This function is typically used to terminate a loop that
-  traverses all the nodes in a doubly linked list starting with the head node.
-
-  Returns TRUE if Node is equal to List.  Returns FALSE if Node is one of the
-  nodes in the doubly linked list specified by List.  List must have been
-  initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
-
-  If List is NULL, then ASSERT().
-  If Node is NULL, then ASSERT().
-  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(),
-  then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes
-  in List, including the List node, is greater than or equal to
-  PcdMaximumLinkedListLength, then ASSERT().
-  If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal
-  to List, then ASSERT().
-
-  @param  List  A pointer to the head node of a doubly linked list.
-  @param  Node  A pointer to a node in the doubly linked list.
-
-  @retval TRUE  Node is the head of the doubly-linked list pointed by List.
-  @retval FALSE Node is not the head of the doubly-linked list pointed by List.
-
-**/
-BOOLEAN
-EFIAPI
-IsNull (
-  IN      CONST LIST_ENTRY          *List,
-  IN      CONST LIST_ENTRY          *Node
-  );
-
-
-/**
-  Determines if a node the last node in a doubly linked list.
-
-  Returns TRUE if Node is the last node in the doubly linked list specified by
-  List. Otherwise, FALSE is returned. List must have been initialized with
-  INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
-
-  If List is NULL, then ASSERT().
-  If Node is NULL, then ASSERT().
-  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or
-  InitializeListHead(), then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes
-  in List, including the List node, is greater than or equal to
-  PcdMaximumLinkedListLength, then ASSERT().
-  If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().
-
-  @param  List  A pointer to the head node of a doubly linked list.
-  @param  Node  A pointer to a node in the doubly linked list.
-
-  @retval TRUE  Node is the last node in the linked list.
-  @retval FALSE Node is not the last node in the linked list.
-
-**/
-BOOLEAN
-EFIAPI
-IsNodeAtEnd (
-  IN      CONST LIST_ENTRY          *List,
-  IN      CONST LIST_ENTRY          *Node
-  );
-
-
-/**
-  Swaps the location of two nodes in a doubly linked list, and returns the
-  first node after the swap.
-
-  If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
-  Otherwise, the location of the FirstEntry node is swapped with the location
-  of the SecondEntry node in a doubly linked list. SecondEntry must be in the
-  same double linked list as FirstEntry and that double linked list must have
-  been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().
-  SecondEntry is returned after the nodes are swapped.
-
-  If FirstEntry is NULL, then ASSERT().
-  If SecondEntry is NULL, then ASSERT().
-  If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the
-  same linked list, then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
-  linked list containing the FirstEntry and SecondEntry nodes, including
-  the FirstEntry and SecondEntry nodes, is greater than or equal to
-  PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  FirstEntry  A pointer to a node in a linked list.
-  @param  SecondEntry A pointer to another node in the same linked list.
-
-  @return SecondEntry.
-
-**/
-LIST_ENTRY *
-EFIAPI
-SwapListEntries (
-  IN OUT  LIST_ENTRY                *FirstEntry,
-  IN OUT  LIST_ENTRY                *SecondEntry
-  );
-
-
-/**
-  Removes a node from a doubly linked list, and returns the node that follows
-  the removed node.
-
-  Removes the node Entry from a doubly linked list. It is up to the caller of
-  this function to release the memory used by this node if that is required. On
-  exit, the node following Entry in the doubly linked list is returned. If
-  Entry is the only node in the linked list, then the head node of the linked
-  list is returned.
-
-  If Entry is NULL, then ASSERT().
-  If Entry is the head node of an empty list, then ASSERT().
-  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the
-  linked list containing Entry, including the Entry node, is greater than
-  or equal to PcdMaximumLinkedListLength, then ASSERT().
-
-  @param  Entry A pointer to a node in a linked list.
-
-  @return Entry.
-
-**/
-LIST_ENTRY *
-EFIAPI
-RemoveEntryList (
-  IN      CONST LIST_ENTRY          *Entry
-  );
-
-//
-// Math Services
-//
-
-/**
-  Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
-  with zeros. The shifted value is returned.
-
-  This function shifts the 64-bit value Operand to the left by Count bits. The
-  low Count bits are set to zero. The shifted value is returned.
-
-  If Count is greater than 63, then ASSERT().
-
-  @param  Operand The 64-bit operand to shift left.
-  @param  Count   The number of bits to shift left.
-
-  @return Operand << Count.
-
-**/
-UINT64
-EFIAPI
-LShiftU64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
-  filled with zeros. The shifted value is returned.
-
-  This function shifts the 64-bit value Operand to the right by Count bits. The
-  high Count bits are set to zero. The shifted value is returned.
-
-  If Count is greater than 63, then ASSERT().
-
-  @param  Operand The 64-bit operand to shift right.
-  @param  Count   The number of bits to shift right.
-
-  @return Operand >> Count
-
-**/
-UINT64
-EFIAPI
-RShiftU64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
-  with original integer's bit 63. The shifted value is returned.
-
-  This function shifts the 64-bit value Operand to the right by Count bits. The
-  high Count bits are set to bit 63 of Operand.  The shifted value is returned.
-
-  If Count is greater than 63, then ASSERT().
-
-  @param  Operand The 64-bit operand to shift right.
-  @param  Count   The number of bits to shift right.
-
-  @return Operand >> Count
-
-**/
-UINT64
-EFIAPI
-ARShiftU64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
-  with the high bits that were rotated.
-
-  This function rotates the 32-bit value Operand to the left by Count bits. The
-  low Count bits are fill with the high Count bits of Operand. The rotated
-  value is returned.
-
-  If Count is greater than 31, then ASSERT().
-
-  @param  Operand The 32-bit operand to rotate left.
-  @param  Count   The number of bits to rotate left.
-
-  @return Operand << Count
-
-**/
-UINT32
-EFIAPI
-LRotU32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
-  with the low bits that were rotated.
-
-  This function rotates the 32-bit value Operand to the right by Count bits.
-  The high Count bits are fill with the low Count bits of Operand. The rotated
-  value is returned.
-
-  If Count is greater than 31, then ASSERT().
-
-  @param  Operand The 32-bit operand to rotate right.
-  @param  Count   The number of bits to rotate right.
-
-  @return Operand >> Count
-
-**/
-UINT32
-EFIAPI
-RRotU32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
-  with the high bits that were rotated.
-
-  This function rotates the 64-bit value Operand to the left by Count bits. The
-  low Count bits are fill with the high Count bits of Operand. The rotated
-  value is returned.
-
-  If Count is greater than 63, then ASSERT().
-
-  @param  Operand The 64-bit operand to rotate left.
-  @param  Count   The number of bits to rotate left.
-
-  @return Operand << Count
-
-**/
-UINT64
-EFIAPI
-LRotU64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
-  with the high low bits that were rotated.
-
-  This function rotates the 64-bit value Operand to the right by Count bits.
-  The high Count bits are fill with the low Count bits of Operand. The rotated
-  value is returned.
-
-  If Count is greater than 63, then ASSERT().
-
-  @param  Operand The 64-bit operand to rotate right.
-  @param  Count   The number of bits to rotate right.
-
-  @return Operand >> Count
-
-**/
-UINT64
-EFIAPI
-RRotU64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     Count
-  );
-
-
-/**
-  Returns the bit position of the lowest bit set in a 32-bit value.
-
-  This function computes the bit position of the lowest bit set in the 32-bit
-  value specified by Operand. If Operand is zero, then -1 is returned.
-  Otherwise, a value between 0 and 31 is returned.
-
-  @param  Operand The 32-bit operand to evaluate.
-
-  @retval 0..31  The lowest bit set in Operand was found.
-  @retval -1    Operand is zero.
-
-**/
-INTN
-EFIAPI
-LowBitSet32 (
-  IN      UINT32                    Operand
-  );
-
-
-/**
-  Returns the bit position of the lowest bit set in a 64-bit value.
-
-  This function computes the bit position of the lowest bit set in the 64-bit
-  value specified by Operand. If Operand is zero, then -1 is returned.
-  Otherwise, a value between 0 and 63 is returned.
-
-  @param  Operand The 64-bit operand to evaluate.
-
-  @retval 0..63  The lowest bit set in Operand was found.
-  @retval -1    Operand is zero.
-
-
-**/
-INTN
-EFIAPI
-LowBitSet64 (
-  IN      UINT64                    Operand
-  );
-
-
-/**
-  Returns the bit position of the highest bit set in a 32-bit value. Equivalent
-  to log2(x).
-
-  This function computes the bit position of the highest bit set in the 32-bit
-  value specified by Operand. If Operand is zero, then -1 is returned.
-  Otherwise, a value between 0 and 31 is returned.
-
-  @param  Operand The 32-bit operand to evaluate.
-
-  @retval 0..31  Position of the highest bit set in Operand if found.
-  @retval -1    Operand is zero.
-
-**/
-INTN
-EFIAPI
-HighBitSet32 (
-  IN      UINT32                    Operand
-  );
-
-
-/**
-  Returns the bit position of the highest bit set in a 64-bit value. Equivalent
-  to log2(x).
-
-  This function computes the bit position of the highest bit set in the 64-bit
-  value specified by Operand. If Operand is zero, then -1 is returned.
-  Otherwise, a value between 0 and 63 is returned.
-
-  @param  Operand The 64-bit operand to evaluate.
-
-  @retval 0..63   Position of the highest bit set in Operand if found.
-  @retval -1     Operand is zero.
-
-**/
-INTN
-EFIAPI
-HighBitSet64 (
-  IN      UINT64                    Operand
-  );
-
-
-/**
-  Returns the value of the highest bit set in a 32-bit value. Equivalent to
-  1 << log2(x).
-
-  This function computes the value of the highest bit set in the 32-bit value
-  specified by Operand. If Operand is zero, then zero is returned.
-
-  @param  Operand The 32-bit operand to evaluate.
-
-  @return 1 << HighBitSet32(Operand)
-  @retval 0 Operand is zero.
-
-**/
-UINT32
-EFIAPI
-GetPowerOfTwo32 (
-  IN      UINT32                    Operand
-  );
-
-
-/**
-  Returns the value of the highest bit set in a 64-bit value. Equivalent to
-  1 << log2(x).
-
-  This function computes the value of the highest bit set in the 64-bit value
-  specified by Operand. If Operand is zero, then zero is returned.
-
-  @param  Operand The 64-bit operand to evaluate.
-
-  @return 1 << HighBitSet64(Operand)
-  @retval 0 Operand is zero.
-
-**/
-UINT64
-EFIAPI
-GetPowerOfTwo64 (
-  IN      UINT64                    Operand
-  );
-
-
-/**
-  Switches the endianness of a 16-bit integer.
-
-  This function swaps the bytes in a 16-bit unsigned value to switch the value
-  from little endian to big endian or vice versa. The byte swapped value is
-  returned.
-
-  @param  Value A 16-bit unsigned value.
-
-  @return The byte swapped Value.
-
-**/
-UINT16
-EFIAPI
-SwapBytes16 (
-  IN      UINT16                    Value
-  );
-
-
-/**
-  Switches the endianness of a 32-bit integer.
-
-  This function swaps the bytes in a 32-bit unsigned value to switch the value
-  from little endian to big endian or vice versa. The byte swapped value is
-  returned.
-
-  @param  Value A 32-bit unsigned value.
-
-  @return The byte swapped Value.
-
-**/
-UINT32
-EFIAPI
-SwapBytes32 (
-  IN      UINT32                    Value
-  );
-
-
-/**
-  Switches the endianness of a 64-bit integer.
-
-  This function swaps the bytes in a 64-bit unsigned value to switch the value
-  from little endian to big endian or vice versa. The byte swapped value is
-  returned.
-
-  @param  Value A 64-bit unsigned value.
-
-  @return The byte swapped Value.
-
-**/
-UINT64
-EFIAPI
-SwapBytes64 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
-  generates a 64-bit unsigned result.
-
-  This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
-  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
-  bit unsigned result is returned.
-
-  @param  Multiplicand  A 64-bit unsigned value.
-  @param  Multiplier    A 32-bit unsigned value.
-
-  @return Multiplicand * Multiplier
-
-**/
-UINT64
-EFIAPI
-MultU64x32 (
-  IN      UINT64                    Multiplicand,
-  IN      UINT32                    Multiplier
-  );
-
-
-/**
-  Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
-  generates a 64-bit unsigned result.
-
-  This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
-  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
-  bit unsigned result is returned.
-
-  @param  Multiplicand  A 64-bit unsigned value.
-  @param  Multiplier    A 64-bit unsigned value.
-
-  @return Multiplicand * Multiplier.
-
-**/
-UINT64
-EFIAPI
-MultU64x64 (
-  IN      UINT64                    Multiplicand,
-  IN      UINT64                    Multiplier
-  );
-
-
-/**
-  Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
-  64-bit signed result.
-
-  This function multiples the 64-bit signed value Multiplicand by the 64-bit
-  signed value Multiplier and generates a 64-bit signed result. This 64-bit
-  signed result is returned.
-
-  @param  Multiplicand  A 64-bit signed value.
-  @param  Multiplier    A 64-bit signed value.
-
-  @return Multiplicand * Multiplier
-
-**/
-INT64
-EFIAPI
-MultS64x64 (
-  IN      INT64                     Multiplicand,
-  IN      INT64                     Multiplier
-  );
-
-
-/**
-  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
-  a 64-bit unsigned result.
-
-  This function divides the 64-bit unsigned value Dividend by the 32-bit
-  unsigned value Divisor and generates a 64-bit unsigned quotient. This
-  function returns the 64-bit unsigned quotient.
-
-  If Divisor is 0, then ASSERT().
-
-  @param  Dividend  A 64-bit unsigned value.
-  @param  Divisor   A 32-bit unsigned value.
-
-  @return Dividend / Divisor.
-
-**/
-UINT64
-EFIAPI
-DivU64x32 (
-  IN      UINT64                    Dividend,
-  IN      UINT32                    Divisor
-  );
-
-
-/**
-  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
-  a 32-bit unsigned remainder.
-
-  This function divides the 64-bit unsigned value Dividend by the 32-bit
-  unsigned value Divisor and generates a 32-bit remainder. This function
-  returns the 32-bit unsigned remainder.
-
-  If Divisor is 0, then ASSERT().
-
-  @param  Dividend  A 64-bit unsigned value.
-  @param  Divisor   A 32-bit unsigned value.
-
-  @return Dividend % Divisor.
-
-**/
-UINT32
-EFIAPI
-ModU64x32 (
-  IN      UINT64                    Dividend,
-  IN      UINT32                    Divisor
-  );
-
-
-/**
-  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
-  a 64-bit unsigned result and an optional 32-bit unsigned remainder.
-
-  This function divides the 64-bit unsigned value Dividend by the 32-bit
-  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
-  is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
-  This function returns the 64-bit unsigned quotient.
-
-  If Divisor is 0, then ASSERT().
-
-  @param  Dividend  A 64-bit unsigned value.
-  @param  Divisor   A 32-bit unsigned value.
-  @param  Remainder A pointer to a 32-bit unsigned value. This parameter is
-                    optional and may be NULL.
-
-  @return Dividend / Divisor.
-
-**/
-UINT64
-EFIAPI
-DivU64x32Remainder (
-  IN      UINT64                    Dividend,
-  IN      UINT32                    Divisor,
-  OUT     UINT32                    *Remainder  OPTIONAL
-  );
-
-
-/**
-  Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
-  a 64-bit unsigned result and an optional 64-bit unsigned remainder.
-
-  This function divides the 64-bit unsigned value Dividend by the 64-bit
-  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
-  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
-  This function returns the 64-bit unsigned quotient.
-
-  If Divisor is 0, then ASSERT().
-
-  @param  Dividend  A 64-bit unsigned value.
-  @param  Divisor   A 64-bit unsigned value.
-  @param  Remainder A pointer to a 64-bit unsigned value. This parameter is
-                    optional and may be NULL.
-
-  @return Dividend / Divisor.
-
-**/
-UINT64
-EFIAPI
-DivU64x64Remainder (
-  IN      UINT64                    Dividend,
-  IN      UINT64                    Divisor,
-  OUT     UINT64                    *Remainder  OPTIONAL
-  );
-
-
-/**
-  Divides a 64-bit signed integer by a 64-bit signed integer and generates a
-  64-bit signed result and a optional 64-bit signed remainder.
-
-  This function divides the 64-bit signed value Dividend by the 64-bit signed
-  value Divisor and generates a 64-bit signed quotient. If Remainder is not
-  NULL, then the 64-bit signed remainder is returned in Remainder. This
-  function returns the 64-bit signed quotient.
-
-  It is the caller's responsibility to not call this function with a Divisor of 0.
-  If Divisor is 0, then the quotient and remainder should be assumed to be
-  the largest negative integer.
-
-  If Divisor is 0, then ASSERT().
-
-  @param  Dividend  A 64-bit signed value.
-  @param  Divisor   A 64-bit signed value.
-  @param  Remainder A pointer to a 64-bit signed value. This parameter is
-                    optional and may be NULL.
-
-  @return Dividend / Divisor.
-
-**/
-INT64
-EFIAPI
-DivS64x64Remainder (
-  IN      INT64                     Dividend,
-  IN      INT64                     Divisor,
-  OUT     INT64                     *Remainder  OPTIONAL
-  );
-
-
-/**
-  Reads a 16-bit value from memory that may be unaligned.
-
-  This function returns the 16-bit value pointed to by Buffer. The function
-  guarantees that the read operation does not produce an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 16-bit value that may be unaligned.
-
-  @return The 16-bit value read from Buffer.
-
-**/
-UINT16
-EFIAPI
-ReadUnaligned16 (
-  IN CONST UINT16              *Buffer
-  );
-
-
-/**
-  Writes a 16-bit value to memory that may be unaligned.
-
-  This function writes the 16-bit value specified by Value to Buffer. Value is
-  returned. The function guarantees that the write operation does not produce
-  an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 16-bit value that may be unaligned.
-  @param  Value   16-bit value to write to Buffer.
-
-  @return The 16-bit value to write to Buffer.
-
-**/
-UINT16
-EFIAPI
-WriteUnaligned16 (
-  OUT UINT16                    *Buffer,
-  IN  UINT16                    Value
-  );
-
-
-/**
-  Reads a 24-bit value from memory that may be unaligned.
-
-  This function returns the 24-bit value pointed to by Buffer. The function
-  guarantees that the read operation does not produce an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 24-bit value that may be unaligned.
-
-  @return The 24-bit value read from Buffer.
-
-**/
-UINT32
-EFIAPI
-ReadUnaligned24 (
-  IN CONST UINT32              *Buffer
-  );
-
-
-/**
-  Writes a 24-bit value to memory that may be unaligned.
-
-  This function writes the 24-bit value specified by Value to Buffer. Value is
-  returned. The function guarantees that the write operation does not produce
-  an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 24-bit value that may be unaligned.
-  @param  Value   24-bit value to write to Buffer.
-
-  @return The 24-bit value to write to Buffer.
-
-**/
-UINT32
-EFIAPI
-WriteUnaligned24 (
-  OUT UINT32                    *Buffer,
-  IN  UINT32                    Value
-  );
-
-
-/**
-  Reads a 32-bit value from memory that may be unaligned.
-
-  This function returns the 32-bit value pointed to by Buffer. The function
-  guarantees that the read operation does not produce an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 32-bit value that may be unaligned.
-
-  @return The 32-bit value read from Buffer.
-
-**/
-UINT32
-EFIAPI
-ReadUnaligned32 (
-  IN CONST UINT32              *Buffer
-  );
-
-
-/**
-  Writes a 32-bit value to memory that may be unaligned.
-
-  This function writes the 32-bit value specified by Value to Buffer. Value is
-  returned. The function guarantees that the write operation does not produce
-  an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 32-bit value that may be unaligned.
-  @param  Value   32-bit value to write to Buffer.
-
-  @return The 32-bit value to write to Buffer.
-
-**/
-UINT32
-EFIAPI
-WriteUnaligned32 (
-  OUT UINT32                    *Buffer,
-  IN  UINT32                    Value
-  );
-
-
-/**
-  Reads a 64-bit value from memory that may be unaligned.
-
-  This function returns the 64-bit value pointed to by Buffer. The function
-  guarantees that the read operation does not produce an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 64-bit value that may be unaligned.
-
-  @return The 64-bit value read from Buffer.
-
-**/
-UINT64
-EFIAPI
-ReadUnaligned64 (
-  IN CONST UINT64              *Buffer
-  );
-
-
-/**
-  Writes a 64-bit value to memory that may be unaligned.
-
-  This function writes the 64-bit value specified by Value to Buffer. Value is
-  returned. The function guarantees that the write operation does not produce
-  an alignment fault.
-
-  If the Buffer is NULL, then ASSERT().
-
-  @param  Buffer  The pointer to a 64-bit value that may be unaligned.
-  @param  Value   64-bit value to write to Buffer.
-
-  @return The 64-bit value to write to Buffer.
-
-**/
-UINT64
-EFIAPI
-WriteUnaligned64 (
-  OUT UINT64                    *Buffer,
-  IN  UINT64                    Value
-  );
-
-
-//
-// Bit Field Functions
-//
-
-/**
-  Returns a bit field from an 8-bit value.
-
-  Returns the bitfield specified by the StartBit and the EndBit from Operand.
-
-  If 8-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 7, then ASSERT().
-  If EndBit is greater than 7, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..7.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..7.
-
-  @return The bit field read.
-
-**/
-UINT8
-EFIAPI
-BitFieldRead8 (
-  IN      UINT8                     Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to an 8-bit value, and returns the result.
-
-  Writes Value to the bit field specified by the StartBit and the EndBit in
-  Operand. All other bits in Operand are preserved. The new 8-bit value is
-  returned.
-
-  If 8-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 7, then ASSERT().
-  If EndBit is greater than 7, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..7.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..7.
-  @param  Value     New value of the bit field.
-
-  @return The new 8-bit value.
-
-**/
-UINT8
-EFIAPI
-BitFieldWrite8 (
-  IN      UINT8                     Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT8                     Value
-  );
-
-
-/**
-  Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
-  result.
-
-  Performs a bitwise OR between the bit field specified by StartBit
-  and EndBit in Operand and the value specified by OrData. All other bits in
-  Operand are preserved. The new 8-bit value is returned.
-
-  If 8-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 7, then ASSERT().
-  If EndBit is greater than 7, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..7.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..7.
-  @param  OrData    The value to OR with the read value from the value
-
-  @return The new 8-bit value.
-
-**/
-UINT8
-EFIAPI
-BitFieldOr8 (
-  IN      UINT8                     Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT8                     OrData
-  );
-
-
-/**
-  Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
-  the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData. All other bits in Operand are
-  preserved. The new 8-bit value is returned.
-
-  If 8-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 7, then ASSERT().
-  If EndBit is greater than 7, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..7.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..7.
-  @param  AndData   The value to AND with the read value from the value.
-
-  @return The new 8-bit value.
-
-**/
-UINT8
-EFIAPI
-BitFieldAnd8 (
-  IN      UINT8                     Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT8                     AndData
-  );
-
-
-/**
-  Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
-  bitwise OR, and returns the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData, followed by a bitwise
-  OR with value specified by OrData. All other bits in Operand are
-  preserved. The new 8-bit value is returned.
-
-  If 8-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 7, then ASSERT().
-  If EndBit is greater than 7, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..7.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..7.
-  @param  AndData   The value to AND with the read value from the value.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The new 8-bit value.
-
-**/
-UINT8
-EFIAPI
-BitFieldAndThenOr8 (
-  IN      UINT8                     Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT8                     AndData,
-  IN      UINT8                     OrData
-  );
-
-
-/**
-  Returns a bit field from a 16-bit value.
-
-  Returns the bitfield specified by the StartBit and the EndBit from Operand.
-
-  If 16-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 15, then ASSERT().
-  If EndBit is greater than 15, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..15.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..15.
-
-  @return The bit field read.
-
-**/
-UINT16
-EFIAPI
-BitFieldRead16 (
-  IN      UINT16                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to a 16-bit value, and returns the result.
-
-  Writes Value to the bit field specified by the StartBit and the EndBit in
-  Operand. All other bits in Operand are preserved. The new 16-bit value is
-  returned.
-
-  If 16-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 15, then ASSERT().
-  If EndBit is greater than 15, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..15.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..15.
-  @param  Value     New value of the bit field.
-
-  @return The new 16-bit value.
-
-**/
-UINT16
-EFIAPI
-BitFieldWrite16 (
-  IN      UINT16                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT16                    Value
-  );
-
-
-/**
-  Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
-  result.
-
-  Performs a bitwise OR between the bit field specified by StartBit
-  and EndBit in Operand and the value specified by OrData. All other bits in
-  Operand are preserved. The new 16-bit value is returned.
-
-  If 16-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 15, then ASSERT().
-  If EndBit is greater than 15, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..15.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..15.
-  @param  OrData    The value to OR with the read value from the value
-
-  @return The new 16-bit value.
-
-**/
-UINT16
-EFIAPI
-BitFieldOr16 (
-  IN      UINT16                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT16                    OrData
-  );
-
-
-/**
-  Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
-  the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData. All other bits in Operand are
-  preserved. The new 16-bit value is returned.
-
-  If 16-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 15, then ASSERT().
-  If EndBit is greater than 15, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..15.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..15.
-  @param  AndData   The value to AND with the read value from the value
-
-  @return The new 16-bit value.
-
-**/
-UINT16
-EFIAPI
-BitFieldAnd16 (
-  IN      UINT16                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT16                    AndData
-  );
-
-
-/**
-  Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
-  bitwise OR, and returns the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData, followed by a bitwise
-  OR with value specified by OrData. All other bits in Operand are
-  preserved. The new 16-bit value is returned.
-
-  If 16-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 15, then ASSERT().
-  If EndBit is greater than 15, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..15.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..15.
-  @param  AndData   The value to AND with the read value from the value.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The new 16-bit value.
-
-**/
-UINT16
-EFIAPI
-BitFieldAndThenOr16 (
-  IN      UINT16                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT16                    AndData,
-  IN      UINT16                    OrData
-  );
-
-
-/**
-  Returns a bit field from a 32-bit value.
-
-  Returns the bitfield specified by the StartBit and the EndBit from Operand.
-
-  If 32-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-
-  @return The bit field read.
-
-**/
-UINT32
-EFIAPI
-BitFieldRead32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to a 32-bit value, and returns the result.
-
-  Writes Value to the bit field specified by the StartBit and the EndBit in
-  Operand. All other bits in Operand are preserved. The new 32-bit value is
-  returned.
-
-  If 32-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  Value     New value of the bit field.
-
-  @return The new 32-bit value.
-
-**/
-UINT32
-EFIAPI
-BitFieldWrite32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    Value
-  );
-
-
-/**
-  Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
-  result.
-
-  Performs a bitwise OR between the bit field specified by StartBit
-  and EndBit in Operand and the value specified by OrData. All other bits in
-  Operand are preserved. The new 32-bit value is returned.
-
-  If 32-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  OrData    The value to OR with the read value from the value.
-
-  @return The new 32-bit value.
-
-**/
-UINT32
-EFIAPI
-BitFieldOr32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
-  the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData. All other bits in Operand are
-  preserved. The new 32-bit value is returned.
-
-  If 32-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  AndData   The value to AND with the read value from the value
-
-  @return The new 32-bit value.
-
-**/
-UINT32
-EFIAPI
-BitFieldAnd32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    AndData
-  );
-
-
-/**
-  Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
-  bitwise OR, and returns the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData, followed by a bitwise
-  OR with value specified by OrData. All other bits in Operand are
-  preserved. The new 32-bit value is returned.
-
-  If 32-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  AndData   The value to AND with the read value from the value.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The new 32-bit value.
-
-**/
-UINT32
-EFIAPI
-BitFieldAndThenOr32 (
-  IN      UINT32                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    AndData,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Returns a bit field from a 64-bit value.
-
-  Returns the bitfield specified by the StartBit and the EndBit from Operand.
-
-  If 64-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-
-  @return The bit field read.
-
-**/
-UINT64
-EFIAPI
-BitFieldRead64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to a 64-bit value, and returns the result.
-
-  Writes Value to the bit field specified by the StartBit and the EndBit in
-  Operand. All other bits in Operand are preserved. The new 64-bit value is
-  returned.
-
-  If 64-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  Value     New value of the bit field.
-
-  @return The new 64-bit value.
-
-**/
-UINT64
-EFIAPI
-BitFieldWrite64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
-  result.
-
-  Performs a bitwise OR between the bit field specified by StartBit
-  and EndBit in Operand and the value specified by OrData. All other bits in
-  Operand are preserved. The new 64-bit value is returned.
-
-  If 64-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  OrData    The value to OR with the read value from the value
-
-  @return The new 64-bit value.
-
-**/
-UINT64
-EFIAPI
-BitFieldOr64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    OrData
-  );
-
-
-/**
-  Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
-  the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData. All other bits in Operand are
-  preserved. The new 64-bit value is returned.
-
-  If 64-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  AndData   The value to AND with the read value from the value
-
-  @return The new 64-bit value.
-
-**/
-UINT64
-EFIAPI
-BitFieldAnd64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    AndData
-  );
-
-
-/**
-  Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
-  bitwise OR, and returns the result.
-
-  Performs a bitwise AND between the bit field specified by StartBit and EndBit
-  in Operand and the value specified by AndData, followed by a bitwise
-  OR with value specified by OrData. All other bits in Operand are
-  preserved. The new 64-bit value is returned.
-
-  If 64-bit operations are not supported, then ASSERT().
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Operand   Operand on which to perform the bitfield operation.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  AndData   The value to AND with the read value from the value.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The new 64-bit value.
-
-**/
-UINT64
-EFIAPI
-BitFieldAndThenOr64 (
-  IN      UINT64                    Operand,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    AndData,
-  IN      UINT64                    OrData
-  );
-
-//
-// Base Library Checksum Functions
-//
-
-/**
-  Returns the sum of all elements in a buffer in unit of UINT8.
-  During calculation, the carry bits are dropped.
-
-  This function calculates the sum of all elements in a buffer
-  in unit of UINT8. The carry bits in result of addition are dropped.
-  The result is returned as UINT8. If Length is Zero, then Zero is
-  returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the sum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Sum         The sum of Buffer with carry bits dropped during additions.
-
-**/
-UINT8
-EFIAPI
-CalculateSum8 (
-  IN      CONST UINT8              *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the two's complement checksum of all elements in a buffer
-  of 8-bit values.
-
-  This function first calculates the sum of the 8-bit values in the
-  buffer specified by Buffer and Length.  The carry bits in the result
-  of addition are dropped. Then, the two's complement of the sum is
-  returned.  If Length is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the checksum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Checksum    The two's complement checksum of Buffer.
-
-**/
-UINT8
-EFIAPI
-CalculateCheckSum8 (
-  IN      CONST UINT8              *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the sum of all elements in a buffer of 16-bit values.  During
-  calculation, the carry bits are dropped.
-
-  This function calculates the sum of the 16-bit values in the buffer
-  specified by Buffer and Length. The carry bits in result of addition are dropped.
-  The 16-bit result is returned.  If Length is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 16-bit boundary, then ASSERT().
-  If Length is not aligned on a 16-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the sum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Sum         The sum of Buffer with carry bits dropped during additions.
-
-**/
-UINT16
-EFIAPI
-CalculateSum16 (
-  IN      CONST UINT16             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the two's complement checksum of all elements in a buffer of
-  16-bit values.
-
-  This function first calculates the sum of the 16-bit values in the buffer
-  specified by Buffer and Length.  The carry bits in the result of addition
-  are dropped. Then, the two's complement of the sum is returned.  If Length
-  is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 16-bit boundary, then ASSERT().
-  If Length is not aligned on a 16-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the checksum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Checksum    The two's complement checksum of Buffer.
-
-**/
-UINT16
-EFIAPI
-CalculateCheckSum16 (
-  IN      CONST UINT16             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the sum of all elements in a buffer of 32-bit values. During
-  calculation, the carry bits are dropped.
-
-  This function calculates the sum of the 32-bit values in the buffer
-  specified by Buffer and Length. The carry bits in result of addition are dropped.
-  The 32-bit result is returned. If Length is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 32-bit boundary, then ASSERT().
-  If Length is not aligned on a 32-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the sum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Sum         The sum of Buffer with carry bits dropped during additions.
-
-**/
-UINT32
-EFIAPI
-CalculateSum32 (
-  IN      CONST UINT32             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the two's complement checksum of all elements in a buffer of
-  32-bit values.
-
-  This function first calculates the sum of the 32-bit values in the buffer
-  specified by Buffer and Length.  The carry bits in the result of addition
-  are dropped. Then, the two's complement of the sum is returned.  If Length
-  is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 32-bit boundary, then ASSERT().
-  If Length is not aligned on a 32-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the checksum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Checksum    The two's complement checksum of Buffer.
-
-**/
-UINT32
-EFIAPI
-CalculateCheckSum32 (
-  IN      CONST UINT32             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the sum of all elements in a buffer of 64-bit values.  During
-  calculation, the carry bits are dropped.
-
-  This function calculates the sum of the 64-bit values in the buffer
-  specified by Buffer and Length. The carry bits in result of addition are dropped.
-  The 64-bit result is returned.  If Length is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 64-bit boundary, then ASSERT().
-  If Length is not aligned on a 64-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the sum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Sum         The sum of Buffer with carry bits dropped during additions.
-
-**/
-UINT64
-EFIAPI
-CalculateSum64 (
-  IN      CONST UINT64             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Returns the two's complement checksum of all elements in a buffer of
-  64-bit values.
-
-  This function first calculates the sum of the 64-bit values in the buffer
-  specified by Buffer and Length.  The carry bits in the result of addition
-  are dropped. Then, the two's complement of the sum is returned.  If Length
-  is 0, then 0 is returned.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 64-bit boundary, then ASSERT().
-  If Length is not aligned on a 64-bit boundary, then ASSERT().
-  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
-
-  @param  Buffer      The pointer to the buffer to carry out the checksum operation.
-  @param  Length      The size, in bytes, of Buffer.
-
-  @return Checksum    The two's complement checksum of Buffer.
-
-**/
-UINT64
-EFIAPI
-CalculateCheckSum64 (
-  IN      CONST UINT64             *Buffer,
-  IN      UINTN                     Length
-  );
-
-
-//
-// Base Library CPU Functions
-//
-
-/**
-  Function entry point used when a stack switch is requested with SwitchStack()
-
-  @param  Context1        Context1 parameter passed into SwitchStack().
-  @param  Context2        Context2 parameter passed into SwitchStack().
-
-**/
-typedef
-VOID
-(EFIAPI *SWITCH_STACK_ENTRY_POINT)(
-  IN      VOID                      *Context1,  OPTIONAL
-  IN      VOID                      *Context2   OPTIONAL
-  );
-
-
-/**
-  Used to serialize load and store operations.
-
-  All loads and stores that proceed calls to this function are guaranteed to be
-  globally visible when this function returns.
-
-**/
-VOID
-EFIAPI
-MemoryFence (
-  VOID
-  );
-
-
-/**
-  Saves the current CPU context that can be restored with a call to LongJump()
-  and returns 0.
-
-  Saves the current CPU context in the buffer specified by JumpBuffer and
-  returns 0. The initial call to SetJump() must always return 0. Subsequent
-  calls to LongJump() cause a non-zero value to be returned by SetJump().
-
-  If JumpBuffer is NULL, then ASSERT().
-  For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
-
-  NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.
-  The same structure must never be used for more than one CPU architecture context.
-  For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module.
-  SetJump()/LongJump() is not currently supported for the EBC processor type.
-
-  @param  JumpBuffer  A pointer to CPU context buffer.
-
-  @retval 0 Indicates a return from SetJump().
-
-**/
-UINTN
-EFIAPI
-SetJump (
-  OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer
-  );
-
-
-/**
-  Restores the CPU context that was saved with SetJump().
-
-  Restores the CPU context from the buffer specified by JumpBuffer. This
-  function never returns to the caller. Instead is resumes execution based on
-  the state of JumpBuffer.
-
-  If JumpBuffer is NULL, then ASSERT().
-  For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
-  If Value is 0, then ASSERT().
-
-  @param  JumpBuffer  A pointer to CPU context buffer.
-  @param  Value       The value to return when the SetJump() context is
-                      restored and must be non-zero.
-
-**/
-VOID
-EFIAPI
-LongJump (
-  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,
-  IN      UINTN                     Value
-  );
-
-
-/**
-  Enables CPU interrupts.
-
-**/
-VOID
-EFIAPI
-EnableInterrupts (
-  VOID
-  );
-
-
-/**
-  Disables CPU interrupts.
-
-**/
-VOID
-EFIAPI
-DisableInterrupts (
-  VOID
-  );
-
-
-/**
-  Disables CPU interrupts and returns the interrupt state prior to the disable
-  operation.
-
-  @retval TRUE  CPU interrupts were enabled on entry to this call.
-  @retval FALSE CPU interrupts were disabled on entry to this call.
-
-**/
-BOOLEAN
-EFIAPI
-SaveAndDisableInterrupts (
-  VOID
-  );
-
-
-/**
-  Enables CPU interrupts for the smallest window required to capture any
-  pending interrupts.
-
-**/
-VOID
-EFIAPI
-EnableDisableInterrupts (
-  VOID
-  );
-
-
-/**
-  Retrieves the current CPU interrupt state.
-
-  Returns TRUE if interrupts are currently enabled. Otherwise
-  returns FALSE.
-
-  @retval TRUE  CPU interrupts are enabled.
-  @retval FALSE CPU interrupts are disabled.
-
-**/
-BOOLEAN
-EFIAPI
-GetInterruptState (
-  VOID
-  );
-
-
-/**
-  Set the current CPU interrupt state.
-
-  Sets the current CPU interrupt state to the state specified by
-  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
-  InterruptState is FALSE, then interrupts are disabled. InterruptState is
-  returned.
-
-  @param  InterruptState  TRUE if interrupts should enabled. FALSE if
-                          interrupts should be disabled.
-
-  @return InterruptState
-
-**/
-BOOLEAN
-EFIAPI
-SetInterruptState (
-  IN      BOOLEAN                   InterruptState
-  );
-
-
-/**
-  Requests CPU to pause for a short period of time.
-
-  Requests CPU to pause for a short period of time. Typically used in MP
-  systems to prevent memory starvation while waiting for a spin lock.
-
-**/
-VOID
-EFIAPI
-CpuPause (
-  VOID
-  );
-
-
-/**
-  Transfers control to a function starting with a new stack.
-
-  Transfers control to the function specified by EntryPoint using the
-  new stack specified by NewStack and passing in the parameters specified
-  by Context1 and Context2.  Context1 and Context2 are optional and may
-  be NULL.  The function EntryPoint must never return.  This function
-  supports a variable number of arguments following the NewStack parameter.
-  These additional arguments are ignored on IA-32, x64, and EBC architectures.
-  Itanium processors expect one additional parameter of type VOID * that specifies
-  the new backing store pointer.
-
-  If EntryPoint is NULL, then ASSERT().
-  If NewStack is NULL, then ASSERT().
-
-  @param  EntryPoint  A pointer to function to call with the new stack.
-  @param  Context1    A pointer to the context to pass into the EntryPoint
-                      function.
-  @param  Context2    A pointer to the context to pass into the EntryPoint
-                      function.
-  @param  NewStack    A pointer to the new stack to use for the EntryPoint
-                      function.
-  @param  ...         This variable argument list is ignored for IA-32, x64, and
-                      EBC architectures.  For Itanium processors, this variable
-                      argument list is expected to contain a single parameter of
-                      type VOID * that specifies the new backing store pointer.
-
-
-**/
-VOID
-EFIAPI
-SwitchStack (
-  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-  IN      VOID                      *Context1,  OPTIONAL
-  IN      VOID                      *Context2,  OPTIONAL
-  IN      VOID                      *NewStack,
-  ...
-  );
-
-
-/**
-  Generates a breakpoint on the CPU.
-
-  Generates a breakpoint on the CPU. The breakpoint must be implemented such
-  that code can resume normal execution after the breakpoint.
-
-**/
-VOID
-EFIAPI
-CpuBreakpoint (
-  VOID
-  );
-
-
-/**
-  Executes an infinite loop.
-
-  Forces the CPU to execute an infinite loop. A debugger may be used to skip
-  past the loop and the code that follows the loop must execute properly. This
-  implies that the infinite loop must not cause the code that follow it to be
-  optimized away.
-
-**/
-VOID
-EFIAPI
-CpuDeadLoop (
-  VOID
-  );
-
-#if defined (MDE_CPU_IPF)
-
-/**
-  Flush a range of  cache lines in the cache coherency domain of the calling
-  CPU.
-
-  Flushes the cache lines specified by Address and Length.  If Address is not aligned
-  on a cache line boundary, then entire cache line containing Address is flushed.
-  If Address + Length is not aligned on a cache line boundary, then the entire cache
-  line containing Address + Length - 1 is flushed.  This function may choose to flush
-  the entire cache if that is more efficient than flushing the specified range.  If
-  Length is 0, the no cache lines are flushed.  Address is returned.
-  This function is only available on Itanium processors.
-
-  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
-  @param  Address The base address of the instruction lines to invalidate. If
-                  the CPU is in a physical addressing mode, then Address is a
-                  physical address. If the CPU is in a virtual addressing mode,
-                  then Address is a virtual address.
-
-  @param  Length  The number of bytes to invalidate from the instruction cache.
-
-  @return Address.
-
-**/
-VOID *
-EFIAPI
-AsmFlushCacheRange (
-  IN      VOID                      *Address,
-  IN      UINTN                     Length
-  );
-
-
-/**
-  Executes an FC instruction.
-  Executes an FC instruction on the cache line specified by Address.
-  The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
-  An implementation may flush a larger region.  This function is only available on Itanium processors.
-
-  @param Address    The Address of cache line to be flushed.
-
-  @return The address of FC instruction executed.
-
-**/
-UINT64
-EFIAPI
-AsmFc (
-  IN  UINT64  Address
-  );
-
-
-/**
-  Executes an FC.I instruction.
-  Executes an FC.I instruction on the cache line specified by Address.
-  The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).
-  An implementation may flush a larger region.  This function is only available on Itanium processors.
-
-  @param Address    The Address of cache line to be flushed.
-
-  @return The address of the FC.I instruction executed.
-
-**/
-UINT64
-EFIAPI
-AsmFci (
-  IN  UINT64  Address
-  );
-
-
-/**
-  Reads the current value of a Processor Identifier Register (CPUID).
-
-  Reads and returns the current value of Processor Identifier Register specified by Index.
-  The Index of largest implemented CPUID (One less than the number of implemented CPUID
-  registers) is determined by CPUID [3] bits {7:0}.
-  No parameter checking is performed on Index.  If the Index value is beyond the
-  implemented CPUID register range, a Reserved Register/Field fault may occur.  The caller
-  must either guarantee that Index is valid, or the caller must set up fault handlers to
-  catch the faults.  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Processor Identifier Register index to read.
-
-  @return The current value of Processor Identifier Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadCpuid (
-  IN  UINT8   Index
-  );
-
-
-/**
-  Reads the current value of 64-bit Processor Status Register (PSR).
-  This function is only available on Itanium processors.
-
-  @return The current value of PSR.
-
-**/
-UINT64
-EFIAPI
-AsmReadPsr (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit Processor Status Register (PSR).
-
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults. This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to PSR.
-
-  @return The 64-bit value written to the PSR.
-
-**/
-UINT64
-EFIAPI
-AsmWritePsr (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #0 (KR0).
-
-  Reads and returns the current value of KR0.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #1 (KR1).
-
-  Reads and returns the current value of KR1.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr1 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #2 (KR2).
-
-  Reads and returns the current value of KR2.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR2.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr2 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #3 (KR3).
-
-  Reads and returns the current value of KR3.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR3.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr3 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #4 (KR4).
-
-  Reads and returns the current value of KR4.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR4.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr4 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #5 (KR5).
-
-  Reads and returns the current value of KR5.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR5.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr5 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #6 (KR6).
-
-  Reads and returns the current value of KR6.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR6.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr6 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit Kernel Register #7 (KR7).
-
-  Reads and returns the current value of KR7.
-  This function is only available on Itanium processors.
-
-  @return The current value of KR7.
-
-**/
-UINT64
-EFIAPI
-AsmReadKr7 (
-  VOID
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #0 (KR0).
-
-  Writes the current value of KR0.  The 64-bit value written to
-  the KR0 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR0.
-
-  @return The 64-bit value written to the KR0.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr0 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #1 (KR1).
-
-  Writes the current value of KR1.  The 64-bit value written to
-  the KR1 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR1.
-
-  @return The 64-bit value written to the KR1.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr1 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #2 (KR2).
-
-  Writes the current value of KR2.  The 64-bit value written to
-  the KR2 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR2.
-
-  @return The 64-bit value written to the KR2.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr2 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #3 (KR3).
-
-  Writes the current value of KR3.  The 64-bit value written to
-  the KR3 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR3.
-
-  @return The 64-bit value written to the KR3.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr3 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #4 (KR4).
-
-  Writes the current value of KR4.  The 64-bit value written to
-  the KR4 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR4.
-
-  @return The 64-bit value written to the KR4.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr4 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #5 (KR5).
-
-  Writes the current value of KR5.  The 64-bit value written to
-  the KR5 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR5.
-
-  @return The 64-bit value written to the KR5.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr5 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #6 (KR6).
-
-  Writes the current value of KR6.  The 64-bit value written to
-  the KR6 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR6.
-
-  @return The 64-bit value written to the KR6.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr6 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Write the current value of 64-bit Kernel Register #7 (KR7).
-
-  Writes the current value of KR7.  The 64-bit value written to
-  the KR7 is returned. This function is only available on Itanium processors.
-
-  @param  Value   The 64-bit value to write to KR7.
-
-  @return The 64-bit value written to the KR7.
-
-**/
-UINT64
-EFIAPI
-AsmWriteKr7 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of Interval Timer Counter Register (ITC).
-
-  Reads and returns the current value of ITC.
-  This function is only available on Itanium processors.
-
-  @return The current value of ITC.
-
-**/
-UINT64
-EFIAPI
-AsmReadItc (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Interval Timer Vector Register (ITV).
-
-  Reads and returns the current value of ITV.
-  This function is only available on Itanium processors.
-
-  @return The current value of ITV.
-
-**/
-UINT64
-EFIAPI
-AsmReadItv (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Interval Timer Match Register (ITM).
-
-  Reads and returns the current value of ITM.
-  This function is only available on Itanium processors.
-
-  @return The current value of ITM.
-**/
-UINT64
-EFIAPI
-AsmReadItm (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit Interval Timer Counter Register (ITC).
-
-  Writes the current value of ITC.  The 64-bit value written to the ITC is returned.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to ITC.
-
-  @return The 64-bit value written to the ITC.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItc (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Interval Timer Match Register (ITM).
-
-  Writes the current value of ITM.  The 64-bit value written to the ITM is returned.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to ITM.
-
-  @return The 64-bit value written to the ITM.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItm (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Interval Timer Vector Register (ITV).
-
-  Writes the current value of ITV.  The 64-bit value written to the ITV is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to ITV.
-
-  @return The 64-bit value written to the ITV.
-
-**/
-UINT64
-EFIAPI
-AsmWriteItv (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of Default Control Register (DCR).
-
-  Reads and returns the current value of DCR.  This function is only available on Itanium processors.
-
-  @return The current value of DCR.
-
-**/
-UINT64
-EFIAPI
-AsmReadDcr (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Interruption Vector Address Register (IVA).
-
-  Reads and returns the current value of IVA.  This function is only available on Itanium processors.
-
-  @return The current value of IVA.
-**/
-UINT64
-EFIAPI
-AsmReadIva (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Page Table Address Register (PTA).
-
-  Reads and returns the current value of PTA.  This function is only available on Itanium processors.
-
-  @return The current value of PTA.
-
-**/
-UINT64
-EFIAPI
-AsmReadPta (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit Default Control Register (DCR).
-
-  Writes the current value of DCR.  The 64-bit value written to the DCR is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to DCR.
-
-  @return The 64-bit value written to the DCR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteDcr (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Interruption Vector Address Register (IVA).
-
-  Writes the current value of IVA.  The 64-bit value written to the IVA is returned.
-  The size of vector table is 32 K bytes and is 32 K bytes aligned
-  the low 15 bits of Value is ignored when written.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to IVA.
-
-  @return The 64-bit value written to the IVA.
-
-**/
-UINT64
-EFIAPI
-AsmWriteIva (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Page Table Address Register (PTA).
-
-  Writes the current value of PTA.  The 64-bit value written to the PTA is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to PTA.
-
-  @return The 64-bit value written to the PTA.
-**/
-UINT64
-EFIAPI
-AsmWritePta (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of Local Interrupt ID Register (LID).
-
-  Reads and returns the current value of LID.  This function is only available on Itanium processors.
-
-  @return The current value of LID.
-
-**/
-UINT64
-EFIAPI
-AsmReadLid (
-  VOID
-  );
-
-
-/**
-  Reads the current value of External Interrupt Vector Register (IVR).
-
-  Reads and returns the current value of IVR.  This function is only available on Itanium processors.
-
-  @return The current value of IVR.
-
-**/
-UINT64
-EFIAPI
-AsmReadIvr (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Task Priority Register (TPR).
-
-  Reads and returns the current value of TPR.  This function is only available on Itanium processors.
-
-  @return The current value of TPR.
-
-**/
-UINT64
-EFIAPI
-AsmReadTpr (
-  VOID
-  );
-
-
-/**
-  Reads the current value of External Interrupt Request Register #0 (IRR0).
-
-  Reads and returns the current value of IRR0.  This function is only available on Itanium processors.
-
-  @return The current value of IRR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of External Interrupt Request Register #1 (IRR1).
-
-  Reads and returns the current value of IRR1.  This function is only available on Itanium processors.
-
-  @return The current value of IRR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr1 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of External Interrupt Request Register #2 (IRR2).
-
-  Reads and returns the current value of IRR2.  This function is only available on Itanium processors.
-
-  @return The current value of IRR2.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr2 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of External Interrupt Request Register #3 (IRR3).
-
-  Reads and returns the current value of IRR3.  This function is only available on Itanium processors.
-
-  @return The current value of IRR3.
-
-**/
-UINT64
-EFIAPI
-AsmReadIrr3 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Performance Monitor Vector Register (PMV).
-
-  Reads and returns the current value of PMV.  This function is only available on Itanium processors.
-
-  @return The current value of PMV.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmv (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Corrected Machine Check Vector Register (CMCV).
-
-  Reads and returns the current value of CMCV.  This function is only available on Itanium processors.
-
-  @return The current value of CMCV.
-
-**/
-UINT64
-EFIAPI
-AsmReadCmcv (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Local Redirection Register #0 (LRR0).
-
-  Reads and returns the current value of LRR0.  This function is only available on Itanium processors.
-
-  @return The current value of LRR0.
-
-**/
-UINT64
-EFIAPI
-AsmReadLrr0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Local Redirection Register #1 (LRR1).
-
-  Reads and returns the current value of LRR1.  This function is only available on Itanium processors.
-
-  @return The current value of LRR1.
-
-**/
-UINT64
-EFIAPI
-AsmReadLrr1 (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit Page Local Interrupt ID Register (LID).
-
-  Writes the current value of LID.  The 64-bit value written to the LID is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to LID.
-
-  @return The 64-bit value written to the LID.
-
-**/
-UINT64
-EFIAPI
-AsmWriteLid (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Task Priority Register (TPR).
-
-  Writes the current value of TPR.  The 64-bit value written to the TPR is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding to
-  reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to TPR.
-
-  @return The 64-bit value written to the TPR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteTpr (
-  IN UINT64  Value
-  );
-
-
-/**
-  Performs a write operation on End OF External Interrupt Register (EOI).
-
-  Writes a value of 0 to the EOI Register.  This function is only available on Itanium processors.
-
-**/
-VOID
-EFIAPI
-AsmWriteEoi (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit Performance Monitor Vector Register (PMV).
-
-  Writes the current value of PMV.  The 64-bit value written to the PMV is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding
-  to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to PMV.
-
-  @return The 64-bit value written to the PMV.
-
-**/
-UINT64
-EFIAPI
-AsmWritePmv (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).
-
-  Writes the current value of CMCV.  The 64-bit value written to the CMCV is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding
-  to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to CMCV.
-
-  @return The 64-bit value written to the CMCV.
-
-**/
-UINT64
-EFIAPI
-AsmWriteCmcv (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Local Redirection Register #0 (LRR0).
-
-  Writes the current value of LRR0.  The 64-bit value written to the LRR0 is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding
-  to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to LRR0.
-
-  @return The 64-bit value written to the LRR0.
-
-**/
-UINT64
-EFIAPI
-AsmWriteLrr0 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Local Redirection Register #1 (LRR1).
-
-  Writes the current value of LRR1.  The 64-bit value written to the LRR1 is returned.
-  No parameter checking is performed on Value.  All bits of Value corresponding
-  to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Value is valid, or the caller must
-  set up fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Value    The 64-bit value to write to LRR1.
-
-  @return The 64-bit value written to the LRR1.
-
-**/
-UINT64
-EFIAPI
-AsmWriteLrr1 (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of Instruction Breakpoint Register (IBR).
-
-  The Instruction Breakpoint Registers are used in pairs.  The even numbered
-  registers contain breakpoint addresses, and the odd numbered registers contain
-  breakpoint mask conditions.  At least four instruction registers pairs are implemented
-  on all processor models.   Implemented registers are contiguous starting with
-  register 0.  No parameter checking is performed on Index, and if the Index value
-  is beyond the implemented IBR register range, a Reserved Register/Field fault may
-  occur.  The caller must either guarantee that Index is valid, or the caller must
-  set up fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Instruction Breakpoint Register index to read.
-
-  @return The current value of Instruction Breakpoint Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadIbr (
-  IN  UINT8   Index
-  );
-
-
-/**
-  Reads the current value of Data Breakpoint Register (DBR).
-
-  The Data Breakpoint Registers are used in pairs.  The even numbered registers
-  contain breakpoint addresses, and odd numbered registers contain breakpoint
-  mask conditions.  At least four data registers pairs are implemented on all processor
-  models.  Implemented registers are contiguous starting with register 0.
-  No parameter checking is performed on Index.  If the Index value is beyond
-  the implemented DBR register range, a Reserved Register/Field fault may occur.
-  The caller must either guarantee that Index is valid, or the caller must set up
-  fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Data Breakpoint Register index to read.
-
-  @return The current value of Data Breakpoint Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadDbr (
-  IN  UINT8   Index
-  );
-
-
-/**
-  Reads the current value of Performance Monitor Configuration Register (PMC).
-
-  All processor implementations provide at least four performance counters
-  (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
-  status registers (PMC [0]... PMC [3]).  Processor implementations may provide
-  additional implementation-dependent PMC and PMD to increase the number of
-  'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD
-  register set is implementation dependent.  No parameter checking is performed
-  on Index.  If the Index value is beyond the implemented PMC register range,
-  zero value will be returned.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Performance Monitor Configuration Register index to read.
-
-  @return   The current value of Performance Monitor Configuration Register
-            specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmc (
-  IN  UINT8   Index
-  );
-
-
-/**
-  Reads the current value of Performance Monitor Data Register (PMD).
-
-  All processor implementations provide at least 4 performance counters
-  (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter
-  overflow status registers (PMC [0]... PMC [3]).  Processor implementations may
-  provide additional implementation-dependent PMC and PMD to increase the number
-  of 'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD
-  register set is implementation dependent.  No parameter checking is performed
-  on Index.  If the Index value is beyond the implemented PMD register range,
-  zero value will be returned.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Performance Monitor Data Register index to read.
-
-  @return The current value of Performance Monitor Data Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmd (
-  IN  UINT8   Index
-  );
-
-
-/**
-  Writes the current value of 64-bit Instruction Breakpoint Register (IBR).
-
-  Writes current value of Instruction Breakpoint Register specified by Index.
-  The Instruction Breakpoint Registers are used in pairs.  The even numbered
-  registers contain breakpoint addresses, and odd numbered registers contain
-  breakpoint mask conditions.  At least four instruction registers pairs are implemented
-  on all processor models.  Implemented registers are contiguous starting with
-  register 0.  No parameter checking is performed on Index.  If the Index value
-  is beyond the implemented IBR register range, a Reserved Register/Field fault may
-  occur.  The caller must either guarantee that Index is valid, or the caller must
-  set up fault handlers to catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Instruction Breakpoint Register index to write.
-  @param Value    The 64-bit value to write to IBR.
-
-  @return The 64-bit value written to the IBR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteIbr (
-  IN UINT8   Index,
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Data Breakpoint Register (DBR).
-
-  Writes current value of Data Breakpoint Register specified by Index.
-  The Data Breakpoint Registers are used in pairs.  The even numbered registers
-  contain breakpoint addresses, and odd numbered registers contain breakpoint
-  mask conditions.  At least four data registers pairs are implemented on all processor
-  models.  Implemented registers are contiguous starting with register 0.  No parameter
-  checking is performed on Index.  If the Index value is beyond the implemented
-  DBR register range, a Reserved Register/Field fault may occur.  The caller must
-  either guarantee that Index is valid, or the caller must set up fault handlers to
-  catch the faults.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Data Breakpoint Register index to write.
-  @param Value    The 64-bit value to write to DBR.
-
-  @return The 64-bit value written to the DBR.
-
-**/
-UINT64
-EFIAPI
-AsmWriteDbr (
-  IN UINT8   Index,
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).
-
-  Writes current value of Performance Monitor Configuration Register specified by Index.
-  All processor implementations provide at least four performance counters
-  (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status
-  registers (PMC [0]... PMC [3]).  Processor implementations may provide additional
-  implementation-dependent PMC and PMD to increase the number of 'generic' performance
-  counters (PMC/PMD pairs).  The remainder of PMC and PMD register set is implementation
-  dependent.  No parameter checking is performed on Index.  If the Index value is
-  beyond the implemented PMC register range, the write is ignored.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Performance Monitor Configuration Register index to write.
-  @param Value    The 64-bit value to write to PMC.
-
-  @return The 64-bit value written to the PMC.
-
-**/
-UINT64
-EFIAPI
-AsmWritePmc (
-  IN UINT8   Index,
-  IN UINT64  Value
-  );
-
-
-/**
-  Writes the current value of 64-bit Performance Monitor Data Register (PMD).
-
-  Writes current value of Performance Monitor Data Register specified by Index.
-  All processor implementations provide at least four performance counters
-  (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow
-  status registers (PMC [0]... PMC [3]).  Processor implementations may provide
-  additional implementation-dependent PMC and PMD to increase the number of 'generic'
-  performance counters (PMC/PMD pairs).  The remainder of PMC and PMD register set
-  is implementation dependent.  No parameter checking is performed on Index.  If the
-  Index value is beyond the implemented PMD register range, the write is ignored.
-  This function is only available on Itanium processors.
-
-  @param Index    The 8-bit Performance Monitor Data Register index to write.
-  @param Value    The 64-bit value to write to PMD.
-
-  @return The 64-bit value written to the PMD.
-
-**/
-UINT64
-EFIAPI
-AsmWritePmd (
-  IN UINT8   Index,
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of 64-bit Global Pointer (GP).
-
-  Reads and returns the current value of GP.
-  This function is only available on Itanium processors.
-
-  @return The current value of GP.
-
-**/
-UINT64
-EFIAPI
-AsmReadGp (
-  VOID
-  );
-
-
-/**
-  Write the current value of 64-bit Global Pointer (GP).
-
-  Writes the current value of GP. The 64-bit value written to the GP is returned.
-  No parameter checking is performed on Value.
-  This function is only available on Itanium processors.
-
-  @param Value  The 64-bit value to write to GP.
-
-  @return The 64-bit value written to the GP.
-
-**/
-UINT64
-EFIAPI
-AsmWriteGp (
-  IN UINT64  Value
-  );
-
-
-/**
-  Reads the current value of 64-bit Stack Pointer (SP).
-
-  Reads and returns the current value of SP.
-  This function is only available on Itanium processors.
-
-  @return The current value of SP.
-
-**/
-UINT64
-EFIAPI
-AsmReadSp (
-  VOID
-  );
-
-
-///
-/// Valid Index value for AsmReadControlRegister().
-///
-#define IPF_CONTROL_REGISTER_DCR   0
-#define IPF_CONTROL_REGISTER_ITM   1
-#define IPF_CONTROL_REGISTER_IVA   2
-#define IPF_CONTROL_REGISTER_PTA   8
-#define IPF_CONTROL_REGISTER_IPSR  16
-#define IPF_CONTROL_REGISTER_ISR   17
-#define IPF_CONTROL_REGISTER_IIP   19
-#define IPF_CONTROL_REGISTER_IFA   20
-#define IPF_CONTROL_REGISTER_ITIR  21
-#define IPF_CONTROL_REGISTER_IIPA  22
-#define IPF_CONTROL_REGISTER_IFS   23
-#define IPF_CONTROL_REGISTER_IIM   24
-#define IPF_CONTROL_REGISTER_IHA   25
-#define IPF_CONTROL_REGISTER_LID   64
-#define IPF_CONTROL_REGISTER_IVR   65
-#define IPF_CONTROL_REGISTER_TPR   66
-#define IPF_CONTROL_REGISTER_EOI   67
-#define IPF_CONTROL_REGISTER_IRR0  68
-#define IPF_CONTROL_REGISTER_IRR1  69
-#define IPF_CONTROL_REGISTER_IRR2  70
-#define IPF_CONTROL_REGISTER_IRR3  71
-#define IPF_CONTROL_REGISTER_ITV   72
-#define IPF_CONTROL_REGISTER_PMV   73
-#define IPF_CONTROL_REGISTER_CMCV  74
-#define IPF_CONTROL_REGISTER_LRR0  80
-#define IPF_CONTROL_REGISTER_LRR1  81
-
-/**
-  Reads a 64-bit control register.
-
-  Reads and returns the control register specified by Index. The valid Index valued
-  are defined above in "Related Definitions".
-  If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only
-  available on Itanium processors.
-
-  @param  Index                     The index of the control register to read.
-
-  @return The control register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadControlRegister (
-  IN UINT64  Index
-  );
-
-
-///
-/// Valid Index value for AsmReadApplicationRegister().
-///
-#define IPF_APPLICATION_REGISTER_K0        0
-#define IPF_APPLICATION_REGISTER_K1        1
-#define IPF_APPLICATION_REGISTER_K2        2
-#define IPF_APPLICATION_REGISTER_K3        3
-#define IPF_APPLICATION_REGISTER_K4        4
-#define IPF_APPLICATION_REGISTER_K5        5
-#define IPF_APPLICATION_REGISTER_K6        6
-#define IPF_APPLICATION_REGISTER_K7        7
-#define IPF_APPLICATION_REGISTER_RSC       16
-#define IPF_APPLICATION_REGISTER_BSP       17
-#define IPF_APPLICATION_REGISTER_BSPSTORE  18
-#define IPF_APPLICATION_REGISTER_RNAT      19
-#define IPF_APPLICATION_REGISTER_FCR       21
-#define IPF_APPLICATION_REGISTER_EFLAG     24
-#define IPF_APPLICATION_REGISTER_CSD       25
-#define IPF_APPLICATION_REGISTER_SSD       26
-#define IPF_APPLICATION_REGISTER_CFLG      27
-#define IPF_APPLICATION_REGISTER_FSR       28
-#define IPF_APPLICATION_REGISTER_FIR       29
-#define IPF_APPLICATION_REGISTER_FDR       30
-#define IPF_APPLICATION_REGISTER_CCV       32
-#define IPF_APPLICATION_REGISTER_UNAT      36
-#define IPF_APPLICATION_REGISTER_FPSR      40
-#define IPF_APPLICATION_REGISTER_ITC       44
-#define IPF_APPLICATION_REGISTER_PFS       64
-#define IPF_APPLICATION_REGISTER_LC        65
-#define IPF_APPLICATION_REGISTER_EC        66
-
-/**
-  Reads a 64-bit application register.
-
-  Reads and returns the application register specified by Index. The valid Index
-  valued are defined above in "Related Definitions".
-  If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only
-  available on Itanium processors.
-
-  @param  Index                     The index of the application register to read.
-
-  @return The application register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadApplicationRegister (
-  IN UINT64  Index
-  );
-
-
-/**
-  Reads the current value of a Machine Specific Register (MSR).
-
-  Reads and returns the current value of the Machine Specific Register specified by Index.  No
-  parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
-  register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that
-  Index is valid, or the caller must set up fault handlers to catch the faults.  This function is
-  only available on Itanium processors.
-
-  @param  Index                     The 8-bit Machine Specific Register index to read.
-
-  @return The current value of the Machine Specific Register specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadMsr (
-  IN UINT8   Index
-  );
-
-
-/**
-  Writes the current value of a Machine Specific Register (MSR).
-
-  Writes Value to the Machine Specific Register specified by Index.  Value is returned.  No
-  parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
-  register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that
-  Index is valid, or the caller must set up fault handlers to catch the faults.  This function is
-  only available on Itanium processors.
-
-  @param  Index                     The 8-bit Machine Specific Register index to write.
-  @param  Value                     The 64-bit value to write to the Machine Specific Register.
-
-  @return The 64-bit value to write to the Machine Specific Register.
-
-**/
-UINT64
-EFIAPI
-AsmWriteMsr (
-  IN UINT8   Index,
-  IN UINT64  Value
-  );
-
-
-/**
-  Determines if the CPU is currently executing in virtual, physical, or mixed mode.
-
-  Determines the current execution mode of the CPU.
-  If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.
-  If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.
-  If the CPU is not in physical mode or virtual mode, then it is in mixed mode,
-  and -1 is returned.
-  This function is only available on Itanium processors.
-
-  @retval  1  The CPU is in virtual mode.
-  @retval  0  The CPU is in physical mode.
-  @retval -1  The CPU is in mixed mode.
-
-**/
-INT64
-EFIAPI
-AsmCpuVirtual (
-  VOID
-  );
-
-
-/**
-  Makes a PAL procedure call.
-
-  This is a wrapper function to make a PAL procedure call.  Based on the Index
-  value this API will make static or stacked PAL call.  The following table
-  describes the usage of PAL Procedure Index Assignment. Architected procedures
-  may be designated as required or optional.  If a PAL procedure is specified
-  as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the
-  Status field of the PAL_CALL_RETURN structure.
-  This indicates that the procedure is not present in this PAL implementation.
-  It is the caller's responsibility to check for this return code after calling
-  any optional PAL procedure.
-  No parameter checking is performed on the 5 input parameters, but there are
-  some common rules that the caller should follow when making a PAL call.  Any
-  address passed to PAL as buffers for return parameters must be 8-byte aligned.
-  Unaligned addresses may cause undefined results.  For those parameters defined
-  as reserved or some fields defined as reserved must be zero filled or the invalid
-  argument return value may be returned or undefined result may occur during the
-  execution of the procedure.  If the PalEntryPoint  does not point to a valid
-  PAL entry point then the system behavior is undefined.  This function is only
-  available on Itanium processors.
-
-  @param PalEntryPoint  The PAL procedure calls entry point.
-  @param Index          The PAL procedure Index number.
-  @param Arg2           The 2nd parameter for PAL procedure calls.
-  @param Arg3           The 3rd parameter for PAL procedure calls.
-  @param Arg4           The 4th parameter for PAL procedure calls.
-
-  @return structure returned from the PAL Call procedure, including the status and return value.
-
-**/
-PAL_CALL_RETURN
-EFIAPI
-AsmPalCall (
-  IN UINT64  PalEntryPoint,
-  IN UINT64  Index,
-  IN UINT64  Arg2,
-  IN UINT64  Arg3,
-  IN UINT64  Arg4
-  );
-#endif
-
-#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
-///
-/// IA32 and x64 Specific Functions.
-/// Byte packed structure for 16-bit Real Mode EFLAGS.
-///
-typedef union {
-  struct {
-    UINT32  CF:1;           ///< Carry Flag.
-    UINT32  Reserved_0:1;   ///< Reserved.
-    UINT32  PF:1;           ///< Parity Flag.
-    UINT32  Reserved_1:1;   ///< Reserved.
-    UINT32  AF:1;           ///< Auxiliary Carry Flag.
-    UINT32  Reserved_2:1;   ///< Reserved.
-    UINT32  ZF:1;           ///< Zero Flag.
-    UINT32  SF:1;           ///< Sign Flag.
-    UINT32  TF:1;           ///< Trap Flag.
-    UINT32  IF:1;           ///< Interrupt Enable Flag.
-    UINT32  DF:1;           ///< Direction Flag.
-    UINT32  OF:1;           ///< Overflow Flag.
-    UINT32  IOPL:2;         ///< I/O Privilege Level.
-    UINT32  NT:1;           ///< Nested Task.
-    UINT32  Reserved_3:1;   ///< Reserved.
-  } Bits;
-  UINT16    Uint16;
-} IA32_FLAGS16;
-
-///
-/// Byte packed structure for EFLAGS/RFLAGS.
-/// 32-bits on IA-32.
-/// 64-bits on x64.  The upper 32-bits on x64 are reserved.
-///
-typedef union {
-  struct {
-    UINT32  CF:1;           ///< Carry Flag.
-    UINT32  Reserved_0:1;   ///< Reserved.
-    UINT32  PF:1;           ///< Parity Flag.
-    UINT32  Reserved_1:1;   ///< Reserved.
-    UINT32  AF:1;           ///< Auxiliary Carry Flag.
-    UINT32  Reserved_2:1;   ///< Reserved.
-    UINT32  ZF:1;           ///< Zero Flag.
-    UINT32  SF:1;           ///< Sign Flag.
-    UINT32  TF:1;           ///< Trap Flag.
-    UINT32  IF:1;           ///< Interrupt Enable Flag.
-    UINT32  DF:1;           ///< Direction Flag.
-    UINT32  OF:1;           ///< Overflow Flag.
-    UINT32  IOPL:2;         ///< I/O Privilege Level.
-    UINT32  NT:1;           ///< Nested Task.
-    UINT32  Reserved_3:1;   ///< Reserved.
-    UINT32  RF:1;           ///< Resume Flag.
-    UINT32  VM:1;           ///< Virtual 8086 Mode.
-    UINT32  AC:1;           ///< Alignment Check.
-    UINT32  VIF:1;          ///< Virtual Interrupt Flag.
-    UINT32  VIP:1;          ///< Virtual Interrupt Pending.
-    UINT32  ID:1;           ///< ID Flag.
-    UINT32  Reserved_4:10;  ///< Reserved.
-  } Bits;
-  UINTN     UintN;
-} IA32_EFLAGS32;
-
-///
-/// Byte packed structure for Control Register 0 (CR0).
-/// 32-bits on IA-32.
-/// 64-bits on x64.  The upper 32-bits on x64 are reserved.
-///
-typedef union {
-  struct {
-    UINT32  PE:1;           ///< Protection Enable.
-    UINT32  MP:1;           ///< Monitor Coprocessor.
-    UINT32  EM:1;           ///< Emulation.
-    UINT32  TS:1;           ///< Task Switched.
-    UINT32  ET:1;           ///< Extension Type.
-    UINT32  NE:1;           ///< Numeric Error.
-    UINT32  Reserved_0:10;  ///< Reserved.
-    UINT32  WP:1;           ///< Write Protect.
-    UINT32  Reserved_1:1;   ///< Reserved.
-    UINT32  AM:1;           ///< Alignment Mask.
-    UINT32  Reserved_2:10;  ///< Reserved.
-    UINT32  NW:1;           ///< Mot Write-through.
-    UINT32  CD:1;           ///< Cache Disable.
-    UINT32  PG:1;           ///< Paging.
-  } Bits;
-  UINTN     UintN;
-} IA32_CR0;
-
-///
-/// Byte packed structure for Control Register 4 (CR4).
-/// 32-bits on IA-32.
-/// 64-bits on x64.  The upper 32-bits on x64 are reserved.
-///
-typedef union {
-  struct {
-    UINT32  VME:1;          ///< Virtual-8086 Mode Extensions.
-    UINT32  PVI:1;          ///< Protected-Mode Virtual Interrupts.
-    UINT32  TSD:1;          ///< Time Stamp Disable.
-    UINT32  DE:1;           ///< Debugging Extensions.
-    UINT32  PSE:1;          ///< Page Size Extensions.
-    UINT32  PAE:1;          ///< Physical Address Extension.
-    UINT32  MCE:1;          ///< Machine Check Enable.
-    UINT32  PGE:1;          ///< Page Global Enable.
-    UINT32  PCE:1;          ///< Performance Monitoring Counter
-                            ///< Enable.
-    UINT32  OSFXSR:1;       ///< Operating System Support for
-                            ///< FXSAVE and FXRSTOR instructions
-    UINT32  OSXMMEXCPT:1;   ///< Operating System Support for
-                            ///< Unmasked SIMD Floating Point
-                            ///< Exceptions.
-    UINT32  Reserved_0:2;   ///< Reserved.
-    UINT32  VMXE:1;         ///< VMX Enable
-    UINT32  Reserved_1:18;  ///< Reserved.
-  } Bits;
-  UINTN     UintN;
-} IA32_CR4;
-
-///
-/// Byte packed structure for a segment descriptor in a GDT/LDT.
-///
-typedef union {
-  struct {
-    UINT32  LimitLow:16;
-    UINT32  BaseLow:16;
-    UINT32  BaseMid:8;
-    UINT32  Type:4;
-    UINT32  S:1;
-    UINT32  DPL:2;
-    UINT32  P:1;
-    UINT32  LimitHigh:4;
-    UINT32  AVL:1;
-    UINT32  L:1;
-    UINT32  DB:1;
-    UINT32  G:1;
-    UINT32  BaseHigh:8;
-  } Bits;
-  UINT64  Uint64;
-} IA32_SEGMENT_DESCRIPTOR;
-
-///
-/// Byte packed structure for an IDTR, GDTR, LDTR descriptor.
-///
-#pragma pack (1)
-typedef struct {
-  UINT16  Limit;
-  UINTN   Base;
-} IA32_DESCRIPTOR;
-#pragma pack ()
-
-#define IA32_IDT_GATE_TYPE_TASK          0x85
-#define IA32_IDT_GATE_TYPE_INTERRUPT_16  0x86
-#define IA32_IDT_GATE_TYPE_TRAP_16       0x87
-#define IA32_IDT_GATE_TYPE_INTERRUPT_32  0x8E
-#define IA32_IDT_GATE_TYPE_TRAP_32       0x8F
-
-
-#if defined (MDE_CPU_IA32)
-///
-/// Byte packed structure for an IA-32 Interrupt Gate Descriptor.
-///
-typedef union {
-  struct {
-    UINT32  OffsetLow:16;   ///< Offset bits 15..0.
-    UINT32  Selector:16;    ///< Selector.
-    UINT32  Reserved_0:8;   ///< Reserved.
-    UINT32  GateType:8;     ///< Gate Type.  See #defines above.
-    UINT32  OffsetHigh:16;  ///< Offset bits 31..16.
-  } Bits;
-  UINT64  Uint64;
-} IA32_IDT_GATE_DESCRIPTOR;
-
-#endif
-
-#if defined (MDE_CPU_X64)
-///
-/// Byte packed structure for an x64 Interrupt Gate Descriptor.
-///
-typedef union {
-  struct {
-    UINT32  OffsetLow:16;   ///< Offset bits 15..0.
-    UINT32  Selector:16;    ///< Selector.
-    UINT32  Reserved_0:8;   ///< Reserved.
-    UINT32  GateType:8;     ///< Gate Type.  See #defines above.
-    UINT32  OffsetHigh:16;  ///< Offset bits 31..16.
-    UINT32  OffsetUpper:32; ///< Offset bits 63..32.
-    UINT32  Reserved_1:32;  ///< Reserved.
-  } Bits;
-  struct {
-    UINT64  Uint64;
-    UINT64  Uint64_1;
-  } Uint128;
-} IA32_IDT_GATE_DESCRIPTOR;
-
-#endif
-
-///
-/// Byte packed structure for an FP/SSE/SSE2 context.
-///
-typedef struct {
-  UINT8  Buffer[512];
-} IA32_FX_BUFFER;
-
-///
-/// Structures for the 16-bit real mode thunks.
-///
-typedef struct {
-  UINT32                            Reserved1;
-  UINT32                            Reserved2;
-  UINT32                            Reserved3;
-  UINT32                            Reserved4;
-  UINT8                             BL;
-  UINT8                             BH;
-  UINT16                            Reserved5;
-  UINT8                             DL;
-  UINT8                             DH;
-  UINT16                            Reserved6;
-  UINT8                             CL;
-  UINT8                             CH;
-  UINT16                            Reserved7;
-  UINT8                             AL;
-  UINT8                             AH;
-  UINT16                            Reserved8;
-} IA32_BYTE_REGS;
-
-typedef struct {
-  UINT16                            DI;
-  UINT16                            Reserved1;
-  UINT16                            SI;
-  UINT16                            Reserved2;
-  UINT16                            BP;
-  UINT16                            Reserved3;
-  UINT16                            SP;
-  UINT16                            Reserved4;
-  UINT16                            BX;
-  UINT16                            Reserved5;
-  UINT16                            DX;
-  UINT16                            Reserved6;
-  UINT16                            CX;
-  UINT16                            Reserved7;
-  UINT16                            AX;
-  UINT16                            Reserved8;
-} IA32_WORD_REGS;
-
-typedef struct {
-  UINT32                            EDI;
-  UINT32                            ESI;
-  UINT32                            EBP;
-  UINT32                            ESP;
-  UINT32                            EBX;
-  UINT32                            EDX;
-  UINT32                            ECX;
-  UINT32                            EAX;
-  UINT16                            DS;
-  UINT16                            ES;
-  UINT16                            FS;
-  UINT16                            GS;
-  IA32_EFLAGS32                     EFLAGS;
-  UINT32                            Eip;
-  UINT16                            CS;
-  UINT16                            SS;
-} IA32_DWORD_REGS;
-
-typedef union {
-  IA32_DWORD_REGS                   E;
-  IA32_WORD_REGS                    X;
-  IA32_BYTE_REGS                    H;
-} IA32_REGISTER_SET;
-
-///
-/// Byte packed structure for an 16-bit real mode thunks.
-///
-typedef struct {
-  IA32_REGISTER_SET                 *RealModeState;
-  VOID                              *RealModeBuffer;
-  UINT32                            RealModeBufferSize;
-  UINT32                            ThunkAttributes;
-} THUNK_CONTEXT;
-
-#define THUNK_ATTRIBUTE_BIG_REAL_MODE             0x00000001
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15   0x00000002
-#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004
-
-/**
-  Retrieves CPUID information.
-
-  Executes the CPUID instruction with EAX set to the value specified by Index.
-  This function always returns Index.
-  If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
-  If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
-  If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
-  If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
-  This function is only available on IA-32 and x64.
-
-  @param  Index The 32-bit value to load into EAX prior to invoking the CPUID
-                instruction.
-  @param  Eax   The pointer to the 32-bit EAX value returned by the CPUID
-                instruction. This is an optional parameter that may be NULL.
-  @param  Ebx   The pointer to the 32-bit EBX value returned by the CPUID
-                instruction. This is an optional parameter that may be NULL.
-  @param  Ecx   The pointer to the 32-bit ECX value returned by the CPUID
-                instruction. This is an optional parameter that may be NULL.
-  @param  Edx   The pointer to the 32-bit EDX value returned by the CPUID
-                instruction. This is an optional parameter that may be NULL.
-
-  @return Index.
-
-**/
-UINT32
-EFIAPI
-AsmCpuid (
-  IN      UINT32                    Index,
-  OUT     UINT32                    *Eax,  OPTIONAL
-  OUT     UINT32                    *Ebx,  OPTIONAL
-  OUT     UINT32                    *Ecx,  OPTIONAL
-  OUT     UINT32                    *Edx   OPTIONAL
-  );
-
-
-/**
-  Retrieves CPUID information using an extended leaf identifier.
-
-  Executes the CPUID instruction with EAX set to the value specified by Index
-  and ECX set to the value specified by SubIndex. This function always returns
-  Index. This function is only available on IA-32 and x64.
-
-  If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
-  If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
-  If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
-  If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
-
-  @param  Index     The 32-bit value to load into EAX prior to invoking the
-                    CPUID instruction.
-  @param  SubIndex  The 32-bit value to load into ECX prior to invoking the
-                    CPUID instruction.
-  @param  Eax       The pointer to the 32-bit EAX value returned by the CPUID
-                    instruction. This is an optional parameter that may be
-                    NULL.
-  @param  Ebx       The pointer to the 32-bit EBX value returned by the CPUID
-                    instruction. This is an optional parameter that may be
-                    NULL.
-  @param  Ecx       The pointer to the 32-bit ECX value returned by the CPUID
-                    instruction. This is an optional parameter that may be
-                    NULL.
-  @param  Edx       The pointer to the 32-bit EDX value returned by the CPUID
-                    instruction. This is an optional parameter that may be
-                    NULL.
-
-  @return Index.
-
-**/
-UINT32
-EFIAPI
-AsmCpuidEx (
-  IN      UINT32                    Index,
-  IN      UINT32                    SubIndex,
-  OUT     UINT32                    *Eax,  OPTIONAL
-  OUT     UINT32                    *Ebx,  OPTIONAL
-  OUT     UINT32                    *Ecx,  OPTIONAL
-  OUT     UINT32                    *Edx   OPTIONAL
-  );
-
-
-/**
-  Set CD bit and clear NW bit of CR0 followed by a WBINVD.
-
-  Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,
-  and executing a WBINVD instruction.  This function is only available on IA-32 and x64.
-
-**/
-VOID
-EFIAPI
-AsmDisableCache (
-  VOID
-  );
-
-
-/**
-  Perform a WBINVD and clear both the CD and NW bits of CR0.
-
-  Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
-  bits of CR0 to 0.  This function is only available on IA-32 and x64.
-
-**/
-VOID
-EFIAPI
-AsmEnableCache (
-  VOID
-  );
-
-
-/**
-  Returns the lower 32-bits of a Machine Specific Register(MSR).
-
-  Reads and returns the lower 32-bits of the MSR specified by Index.
-  No parameter checking is performed on Index, and some Index values may cause
-  CPU exceptions. The caller must either guarantee that Index is valid, or the
-  caller must set up exception handlers to catch the exceptions. This function
-  is only available on IA-32 and x64.
-
-  @param  Index The 32-bit MSR index to read.
-
-  @return The lower 32 bits of the MSR identified by Index.
-
-**/
-UINT32
-EFIAPI
-AsmReadMsr32 (
-  IN      UINT32                    Index
-  );
-
-
-/**
-  Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.
-  The upper 32-bits of the MSR are set to zero.
-
-  Writes the 32-bit value specified by Value to the MSR specified by Index. The
-  upper 32-bits of the MSR write are set to zero. The 32-bit value written to
-  the MSR is returned. No parameter checking is performed on Index or Value,
-  and some of these may cause CPU exceptions. The caller must either guarantee
-  that Index and Value are valid, or the caller must establish proper exception
-  handlers. This function is only available on IA-32 and x64.
-
-  @param  Index The 32-bit MSR index to write.
-  @param  Value The 32-bit value to write to the MSR.
-
-  @return Value
-
-**/
-UINT32
-EFIAPI
-AsmWriteMsr32 (
-  IN      UINT32                    Index,
-  IN      UINT32                    Value
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and
-  writes the result back to the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise OR
-  between the lower 32-bits of the read result and the value specified by
-  OrData, and writes the result to the 64-bit MSR specified by Index. The lower
-  32-bits of the value written to the MSR is returned. No parameter checking is
-  performed on Index or OrData, and some of these may cause CPU exceptions. The
-  caller must either guarantee that Index and OrData are valid, or the caller
-  must establish proper exception handlers. This function is only available on
-  IA-32 and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  OrData  The value to OR with the read value from the MSR.
-
-  @return The lower 32-bit value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrOr32 (
-  IN      UINT32                    Index,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
-  the result back to the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
-  lower 32-bits of the read result and the value specified by AndData, and
-  writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
-  the value written to the MSR is returned. No parameter checking is performed
-  on Index or AndData, and some of these may cause CPU exceptions. The caller
-  must either guarantee that Index and AndData are valid, or the caller must
-  establish proper exception handlers. This function is only available on IA-32
-  and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  AndData The value to AND with the read value from the MSR.
-
-  @return The lower 32-bit value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrAnd32 (
-  IN      UINT32                    Index,
-  IN      UINT32                    AndData
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR
-  on the lower 32-bits, and writes the result back to the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
-  lower 32-bits of the read result and the value specified by AndData
-  preserving the upper 32-bits, performs a bitwise OR between the
-  result of the AND operation and the value specified by OrData, and writes the
-  result to the 64-bit MSR specified by Address. The lower 32-bits of the value
-  written to the MSR is returned. No parameter checking is performed on Index,
-  AndData, or OrData, and some of these may cause CPU exceptions. The caller
-  must either guarantee that Index, AndData, and OrData are valid, or the
-  caller must establish proper exception handlers. This function is only
-  available on IA-32 and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  AndData The value to AND with the read value from the MSR.
-  @param  OrData  The value to OR with the result of the AND operation.
-
-  @return The lower 32-bit value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrAndThenOr32 (
-  IN      UINT32                    Index,
-  IN      UINT32                    AndData,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Reads a bit field of an MSR.
-
-  Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
-  specified by the StartBit and the EndBit. The value of the bit field is
-  returned. The caller must either guarantee that Index is valid, or the caller
-  must set up exception handlers to catch the exceptions. This function is only
-  available on IA-32 and x64.
-
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to read.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-
-  @return The bit field read from the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrBitFieldRead32 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to an MSR.
-
-  Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
-  field is specified by the StartBit and the EndBit. All other bits in the
-  destination MSR are preserved. The lower 32-bits of the MSR written is
-  returned. The caller must either guarantee that Index and the data written
-  is valid, or the caller must set up exception handlers to catch the exceptions.
-  This function is only available on IA-32 and x64.
-
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  Value     New value of the bit field.
-
-  @return The lower 32-bit of the value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrBitFieldWrite32 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    Value
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
-  result back to the bit field in the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise OR
-  between the read result and the value specified by OrData, and writes the
-  result to the 64-bit MSR specified by Index. The lower 32-bits of the value
-  written to the MSR are returned. Extra left bits in OrData are stripped. The
-  caller must either guarantee that Index and the data written is valid, or
-  the caller must set up exception handlers to catch the exceptions. This
-  function is only available on IA-32 and x64.
-
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  OrData    The value to OR with the read value from the MSR.
-
-  @return The lower 32-bit of the value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrBitFieldOr32 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
-  result back to the bit field in the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
-  read result and the value specified by AndData, and writes the result to the
-  64-bit MSR specified by Index. The lower 32-bits of the value written to the
-  MSR are returned. Extra left bits in AndData are stripped. The caller must
-  either guarantee that Index and the data written is valid, or the caller must
-  set up exception handlers to catch the exceptions. This function is only
-  available on IA-32 and x64.
-
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  AndData   The value to AND with the read value from the MSR.
-
-  @return The lower 32-bit of the value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrBitFieldAnd32 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    AndData
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
-  bitwise OR, and writes the result back to the bit field in the
-  64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
-  bitwise OR between the read result and the value specified by
-  AndData, and writes the result to the 64-bit MSR specified by Index. The
-  lower 32-bits of the value written to the MSR are returned. Extra left bits
-  in both AndData and OrData are stripped. The caller must either guarantee
-  that Index and the data written is valid, or the caller must set up exception
-  handlers to catch the exceptions. This function is only available on IA-32
-  and x64.
-
-  If StartBit is greater than 31, then ASSERT().
-  If EndBit is greater than 31, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..31.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..31.
-  @param  AndData   The value to AND with the read value from the MSR.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The lower 32-bit of the value written to the MSR.
-
-**/
-UINT32
-EFIAPI
-AsmMsrBitFieldAndThenOr32 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT32                    AndData,
-  IN      UINT32                    OrData
-  );
-
-
-/**
-  Returns a 64-bit Machine Specific Register(MSR).
-
-  Reads and returns the 64-bit MSR specified by Index. No parameter checking is
-  performed on Index, and some Index values may cause CPU exceptions. The
-  caller must either guarantee that Index is valid, or the caller must set up
-  exception handlers to catch the exceptions. This function is only available
-  on IA-32 and x64.
-
-  @param  Index The 32-bit MSR index to read.
-
-  @return The value of the MSR identified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadMsr64 (
-  IN      UINT32                    Index
-  );
-
-
-/**
-  Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
-  value.
-
-  Writes the 64-bit value specified by Value to the MSR specified by Index. The
-  64-bit value written to the MSR is returned. No parameter checking is
-  performed on Index or Value, and some of these may cause CPU exceptions. The
-  caller must either guarantee that Index and Value are valid, or the caller
-  must establish proper exception handlers. This function is only available on
-  IA-32 and x64.
-
-  @param  Index The 32-bit MSR index to write.
-  @param  Value The 64-bit value to write to the MSR.
-
-  @return Value
-
-**/
-UINT64
-EFIAPI
-AsmWriteMsr64 (
-  IN      UINT32                    Index,
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise OR, and writes the result
-  back to the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise OR
-  between the read result and the value specified by OrData, and writes the
-  result to the 64-bit MSR specified by Index. The value written to the MSR is
-  returned. No parameter checking is performed on Index or OrData, and some of
-  these may cause CPU exceptions. The caller must either guarantee that Index
-  and OrData are valid, or the caller must establish proper exception handlers.
-  This function is only available on IA-32 and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  OrData  The value to OR with the read value from the MSR.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrOr64 (
-  IN      UINT32                    Index,
-  IN      UINT64                    OrData
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
-  64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
-  read result and the value specified by OrData, and writes the result to the
-  64-bit MSR specified by Index. The value written to the MSR is returned. No
-  parameter checking is performed on Index or OrData, and some of these may
-  cause CPU exceptions. The caller must either guarantee that Index and OrData
-  are valid, or the caller must establish proper exception handlers. This
-  function is only available on IA-32 and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  AndData The value to AND with the read value from the MSR.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrAnd64 (
-  IN      UINT32                    Index,
-  IN      UINT64                    AndData
-  );
-
-
-/**
-  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise
-  OR, and writes the result back to the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
-  result and the value specified by AndData, performs a bitwise OR
-  between the result of the AND operation and the value specified by OrData,
-  and writes the result to the 64-bit MSR specified by Index. The value written
-  to the MSR is returned. No parameter checking is performed on Index, AndData,
-  or OrData, and some of these may cause CPU exceptions. The caller must either
-  guarantee that Index, AndData, and OrData are valid, or the caller must
-  establish proper exception handlers. This function is only available on IA-32
-  and x64.
-
-  @param  Index   The 32-bit MSR index to write.
-  @param  AndData The value to AND with the read value from the MSR.
-  @param  OrData  The value to OR with the result of the AND operation.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrAndThenOr64 (
-  IN      UINT32                    Index,
-  IN      UINT64                    AndData,
-  IN      UINT64                    OrData
-  );
-
-
-/**
-  Reads a bit field of an MSR.
-
-  Reads the bit field in the 64-bit MSR. The bit field is specified by the
-  StartBit and the EndBit. The value of the bit field is returned. The caller
-  must either guarantee that Index is valid, or the caller must set up
-  exception handlers to catch the exceptions. This function is only available
-  on IA-32 and x64.
-
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to read.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-
-  @return The value read from the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrBitFieldRead64 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit
-  );
-
-
-/**
-  Writes a bit field to an MSR.
-
-  Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
-  the StartBit and the EndBit. All other bits in the destination MSR are
-  preserved. The MSR written is returned. The caller must either guarantee
-  that Index and the data written is valid, or the caller must set up exception
-  handlers to catch the exceptions. This function is only available on IA-32 and x64.
-
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  Value     New value of the bit field.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrBitFieldWrite64 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and
-  writes the result back to the bit field in the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise OR
-  between the read result and the value specified by OrData, and writes the
-  result to the 64-bit MSR specified by Index. The value written to the MSR is
-  returned. Extra left bits in OrData are stripped. The caller must either
-  guarantee that Index and the data written is valid, or the caller must set up
-  exception handlers to catch the exceptions. This function is only available
-  on IA-32 and x64.
-
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  OrData    The value to OR with the read value from the bit field.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrBitFieldOr64 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    OrData
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
-  result back to the bit field in the 64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
-  read result and the value specified by AndData, and writes the result to the
-  64-bit MSR specified by Index. The value written to the MSR is returned.
-  Extra left bits in AndData are stripped. The caller must either guarantee
-  that Index and the data written is valid, or the caller must set up exception
-  handlers to catch the exceptions. This function is only available on IA-32
-  and x64.
-
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  AndData   The value to AND with the read value from the bit field.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrBitFieldAnd64 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    AndData
-  );
-
-
-/**
-  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
-  bitwise OR, and writes the result back to the bit field in the
-  64-bit MSR.
-
-  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
-  a bitwise OR between the read result and the value specified by
-  AndData, and writes the result to the 64-bit MSR specified by Index. The
-  value written to the MSR is returned. Extra left bits in both AndData and
-  OrData are stripped. The caller must either guarantee that Index and the data
-  written is valid, or the caller must set up exception handlers to catch the
-  exceptions. This function is only available on IA-32 and x64.
-
-  If StartBit is greater than 63, then ASSERT().
-  If EndBit is greater than 63, then ASSERT().
-  If EndBit is less than StartBit, then ASSERT().
-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
-
-  @param  Index     The 32-bit MSR index to write.
-  @param  StartBit  The ordinal of the least significant bit in the bit field.
-                    Range 0..63.
-  @param  EndBit    The ordinal of the most significant bit in the bit field.
-                    Range 0..63.
-  @param  AndData   The value to AND with the read value from the bit field.
-  @param  OrData    The value to OR with the result of the AND operation.
-
-  @return The value written back to the MSR.
-
-**/
-UINT64
-EFIAPI
-AsmMsrBitFieldAndThenOr64 (
-  IN      UINT32                    Index,
-  IN      UINTN                     StartBit,
-  IN      UINTN                     EndBit,
-  IN      UINT64                    AndData,
-  IN      UINT64                    OrData
-  );
-
-
-/**
-  Reads the current value of the EFLAGS register.
-
-  Reads and returns the current value of the EFLAGS register. This function is
-  only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a
-  64-bit value on x64.
-
-  @return EFLAGS on IA-32 or RFLAGS on x64.
-
-**/
-UINTN
-EFIAPI
-AsmReadEflags (
-  VOID
-  );
-
-
-/**
-  Reads the current value of the Control Register 0 (CR0).
-
-  Reads and returns the current value of CR0. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of the Control Register 0 (CR0).
-
-**/
-UINTN
-EFIAPI
-AsmReadCr0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of the Control Register 2 (CR2).
-
-  Reads and returns the current value of CR2. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of the Control Register 2 (CR2).
-
-**/
-UINTN
-EFIAPI
-AsmReadCr2 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of the Control Register 3 (CR3).
-
-  Reads and returns the current value of CR3. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of the Control Register 3 (CR3).
-
-**/
-UINTN
-EFIAPI
-AsmReadCr3 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of the Control Register 4 (CR4).
-
-  Reads and returns the current value of CR4. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of the Control Register 4 (CR4).
-
-**/
-UINTN
-EFIAPI
-AsmReadCr4 (
-  VOID
-  );
-
-
-/**
-  Writes a value to Control Register 0 (CR0).
-
-  Writes and returns a new value to CR0. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Cr0 The value to write to CR0.
-
-  @return The value written to CR0.
-
-**/
-UINTN
-EFIAPI
-AsmWriteCr0 (
-  UINTN  Cr0
-  );
-
-
-/**
-  Writes a value to Control Register 2 (CR2).
-
-  Writes and returns a new value to CR2. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Cr2 The value to write to CR2.
-
-  @return The value written to CR2.
-
-**/
-UINTN
-EFIAPI
-AsmWriteCr2 (
-  UINTN  Cr2
-  );
-
-
-/**
-  Writes a value to Control Register 3 (CR3).
-
-  Writes and returns a new value to CR3. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Cr3 The value to write to CR3.
-
-  @return The value written to CR3.
-
-**/
-UINTN
-EFIAPI
-AsmWriteCr3 (
-  UINTN  Cr3
-  );
-
-
-/**
-  Writes a value to Control Register 4 (CR4).
-
-  Writes and returns a new value to CR4. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Cr4 The value to write to CR4.
-
-  @return The value written to CR4.
-
-**/
-UINTN
-EFIAPI
-AsmWriteCr4 (
-  UINTN  Cr4
-  );
-
-
-/**
-  Reads the current value of Debug Register 0 (DR0).
-
-  Reads and returns the current value of DR0. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 0 (DR0).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 1 (DR1).
-
-  Reads and returns the current value of DR1. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 1 (DR1).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr1 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 2 (DR2).
-
-  Reads and returns the current value of DR2. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 2 (DR2).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr2 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 3 (DR3).
-
-  Reads and returns the current value of DR3. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 3 (DR3).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr3 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 4 (DR4).
-
-  Reads and returns the current value of DR4. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 4 (DR4).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr4 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 5 (DR5).
-
-  Reads and returns the current value of DR5. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 5 (DR5).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr5 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 6 (DR6).
-
-  Reads and returns the current value of DR6. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 6 (DR6).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr6 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Debug Register 7 (DR7).
-
-  Reads and returns the current value of DR7. This function is only available
-  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on
-  x64.
-
-  @return The value of Debug Register 7 (DR7).
-
-**/
-UINTN
-EFIAPI
-AsmReadDr7 (
-  VOID
-  );
-
-
-/**
-  Writes a value to Debug Register 0 (DR0).
-
-  Writes and returns a new value to DR0. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr0 The value to write to Dr0.
-
-  @return The value written to Debug Register 0 (DR0).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr0 (
-  UINTN  Dr0
-  );
-
-
-/**
-  Writes a value to Debug Register 1 (DR1).
-
-  Writes and returns a new value to DR1. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr1 The value to write to Dr1.
-
-  @return The value written to Debug Register 1 (DR1).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr1 (
-  UINTN  Dr1
-  );
-
-
-/**
-  Writes a value to Debug Register 2 (DR2).
-
-  Writes and returns a new value to DR2. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr2 The value to write to Dr2.
-
-  @return The value written to Debug Register 2 (DR2).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr2 (
-  UINTN  Dr2
-  );
-
-
-/**
-  Writes a value to Debug Register 3 (DR3).
-
-  Writes and returns a new value to DR3. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr3 The value to write to Dr3.
-
-  @return The value written to Debug Register 3 (DR3).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr3 (
-  UINTN  Dr3
-  );
-
-
-/**
-  Writes a value to Debug Register 4 (DR4).
-
-  Writes and returns a new value to DR4. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr4 The value to write to Dr4.
-
-  @return The value written to Debug Register 4 (DR4).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr4 (
-  UINTN  Dr4
-  );
-
-
-/**
-  Writes a value to Debug Register 5 (DR5).
-
-  Writes and returns a new value to DR5. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr5 The value to write to Dr5.
-
-  @return The value written to Debug Register 5 (DR5).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr5 (
-  UINTN  Dr5
-  );
-
-
-/**
-  Writes a value to Debug Register 6 (DR6).
-
-  Writes and returns a new value to DR6. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr6 The value to write to Dr6.
-
-  @return The value written to Debug Register 6 (DR6).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr6 (
-  UINTN  Dr6
-  );
-
-
-/**
-  Writes a value to Debug Register 7 (DR7).
-
-  Writes and returns a new value to DR7. This function is only available on
-  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.
-
-  @param  Dr7 The value to write to Dr7.
-
-  @return The value written to Debug Register 7 (DR7).
-
-**/
-UINTN
-EFIAPI
-AsmWriteDr7 (
-  UINTN  Dr7
-  );
-
-
-/**
-  Reads the current value of Code Segment Register (CS).
-
-  Reads and returns the current value of CS. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of CS.
-
-**/
-UINT16
-EFIAPI
-AsmReadCs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Data Segment Register (DS).
-
-  Reads and returns the current value of DS. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of DS.
-
-**/
-UINT16
-EFIAPI
-AsmReadDs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Extra Segment Register (ES).
-
-  Reads and returns the current value of ES. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of ES.
-
-**/
-UINT16
-EFIAPI
-AsmReadEs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of FS Data Segment Register (FS).
-
-  Reads and returns the current value of FS. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of FS.
-
-**/
-UINT16
-EFIAPI
-AsmReadFs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of GS Data Segment Register (GS).
-
-  Reads and returns the current value of GS. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of GS.
-
-**/
-UINT16
-EFIAPI
-AsmReadGs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Stack Segment Register (SS).
-
-  Reads and returns the current value of SS. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of SS.
-
-**/
-UINT16
-EFIAPI
-AsmReadSs (
-  VOID
-  );
-
-
-/**
-  Reads the current value of Task Register (TR).
-
-  Reads and returns the current value of TR. This function is only available on
-  IA-32 and x64.
-
-  @return The current value of TR.
-
-**/
-UINT16
-EFIAPI
-AsmReadTr (
-  VOID
-  );
-
-
-/**
-  Reads the current Global Descriptor Table Register(GDTR) descriptor.
-
-  Reads and returns the current GDTR descriptor and returns it in Gdtr. This
-  function is only available on IA-32 and x64.
-
-  If Gdtr is NULL, then ASSERT().
-
-  @param  Gdtr  The pointer to a GDTR descriptor.
-
-**/
-VOID
-EFIAPI
-AsmReadGdtr (
-  OUT     IA32_DESCRIPTOR           *Gdtr
-  );
-
-
-/**
-  Writes the current Global Descriptor Table Register (GDTR) descriptor.
-
-  Writes and the current GDTR descriptor specified by Gdtr. This function is
-  only available on IA-32 and x64.
-
-  If Gdtr is NULL, then ASSERT().
-
-  @param  Gdtr  The pointer to a GDTR descriptor.
-
-**/
-VOID
-EFIAPI
-AsmWriteGdtr (
-  IN      CONST IA32_DESCRIPTOR     *Gdtr
-  );
-
-
-/**
-  Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.
-
-  Reads and returns the current IDTR descriptor and returns it in Idtr. This
-  function is only available on IA-32 and x64.
-
-  If Idtr is NULL, then ASSERT().
-
-  @param  Idtr  The pointer to a IDTR descriptor.
-
-**/
-VOID
-EFIAPI
-AsmReadIdtr (
-  OUT     IA32_DESCRIPTOR           *Idtr
-  );
-
-
-/**
-  Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.
-
-  Writes the current IDTR descriptor and returns it in Idtr. This function is
-  only available on IA-32 and x64.
-
-  If Idtr is NULL, then ASSERT().
-
-  @param  Idtr  The pointer to a IDTR descriptor.
-
-**/
-VOID
-EFIAPI
-AsmWriteIdtr (
-  IN      CONST IA32_DESCRIPTOR     *Idtr
-  );
-
-
-/**
-  Reads the current Local Descriptor Table Register(LDTR) selector.
-
-  Reads and returns the current 16-bit LDTR descriptor value. This function is
-  only available on IA-32 and x64.
-
-  @return The current selector of LDT.
-
-**/
-UINT16
-EFIAPI
-AsmReadLdtr (
-  VOID
-  );
-
-
-/**
-  Writes the current Local Descriptor Table Register (LDTR) selector.
-
-  Writes and the current LDTR descriptor specified by Ldtr. This function is
-  only available on IA-32 and x64.
-
-  @param  Ldtr  16-bit LDTR selector value.
-
-**/
-VOID
-EFIAPI
-AsmWriteLdtr (
-  IN      UINT16                    Ldtr
-  );
-
-
-/**
-  Save the current floating point/SSE/SSE2 context to a buffer.
-
-  Saves the current floating point/SSE/SSE2 state to the buffer specified by
-  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
-  available on IA-32 and x64.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 16-byte boundary, then ASSERT().
-
-  @param  Buffer  The pointer to a buffer to save the floating point/SSE/SSE2 context.
-
-**/
-VOID
-EFIAPI
-AsmFxSave (
-  OUT     IA32_FX_BUFFER            *Buffer
-  );
-
-
-/**
-  Restores the current floating point/SSE/SSE2 context from a buffer.
-
-  Restores the current floating point/SSE/SSE2 state from the buffer specified
-  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
-  only available on IA-32 and x64.
-
-  If Buffer is NULL, then ASSERT().
-  If Buffer is not aligned on a 16-byte boundary, then ASSERT().
-  If Buffer was not saved with AsmFxSave(), then ASSERT().
-
-  @param  Buffer  The pointer to a buffer to save the floating point/SSE/SSE2 context.
-
-**/
-VOID
-EFIAPI
-AsmFxRestore (
-  IN      CONST IA32_FX_BUFFER      *Buffer
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #0 (MM0).
-
-  Reads and returns the current value of MM0. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM0.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm0 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #1 (MM1).
-
-  Reads and returns the current value of MM1. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM1.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm1 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #2 (MM2).
-
-  Reads and returns the current value of MM2. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM2.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm2 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #3 (MM3).
-
-  Reads and returns the current value of MM3. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM3.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm3 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #4 (MM4).
-
-  Reads and returns the current value of MM4. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM4.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm4 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #5 (MM5).
-
-  Reads and returns the current value of MM5. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM5.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm5 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #6 (MM6).
-
-  Reads and returns the current value of MM6. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM6.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm6 (
-  VOID
-  );
-
-
-/**
-  Reads the current value of 64-bit MMX Register #7 (MM7).
-
-  Reads and returns the current value of MM7. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of MM7.
-
-**/
-UINT64
-EFIAPI
-AsmReadMm7 (
-  VOID
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #0 (MM0).
-
-  Writes the current value of MM0. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM0.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm0 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #1 (MM1).
-
-  Writes the current value of MM1. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM1.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm1 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #2 (MM2).
-
-  Writes the current value of MM2. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM2.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm2 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #3 (MM3).
-
-  Writes the current value of MM3. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM3.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm3 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #4 (MM4).
-
-  Writes the current value of MM4. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM4.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm4 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #5 (MM5).
-
-  Writes the current value of MM5. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM5.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm5 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #6 (MM6).
-
-  Writes the current value of MM6. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM6.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm6 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Writes the current value of 64-bit MMX Register #7 (MM7).
-
-  Writes the current value of MM7. This function is only available on IA32 and
-  x64.
-
-  @param  Value The 64-bit value to write to MM7.
-
-**/
-VOID
-EFIAPI
-AsmWriteMm7 (
-  IN      UINT64                    Value
-  );
-
-
-/**
-  Reads the current value of Time Stamp Counter (TSC).
-
-  Reads and returns the current value of TSC. This function is only available
-  on IA-32 and x64.
-
-  @return The current value of TSC
-
-**/
-UINT64
-EFIAPI
-AsmReadTsc (
-  VOID
-  );
-
-
-/**
-  Reads the current value of a Performance Counter (PMC).
-
-  Reads and returns the current value of performance counter specified by
-  Index. This function is only available on IA-32 and x64.
-
-  @param  Index The 32-bit Performance Counter index to read.
-
-  @return The value of the PMC specified by Index.
-
-**/
-UINT64
-EFIAPI
-AsmReadPmc (
-  IN      UINT32                    Index
-  );
-
-
-/**
-  Sets up a monitor buffer that is used by AsmMwait().
-
-  Executes a MONITOR instruction with the register state specified by Eax, Ecx
-  and Edx. Returns Eax. This function is only available on IA-32 and x64.
-
-  @param  Eax The value to load into EAX or RAX before executing the MONITOR
-              instruction.
-  @param  Ecx The value to load into ECX or RCX before executing the MONITOR
-              instruction.
-  @param  Edx The value to load into EDX or RDX before executing the MONITOR
-              instruction.
-
-  @return Eax
-
-**/
-UINTN
-EFIAPI
-AsmMonitor (
-  IN      UINTN                     Eax,
-  IN      UINTN                     Ecx,
-  IN      UINTN                     Edx
-  );
-
-
-/**
-  Executes an MWAIT instruction.
-
-  Executes an MWAIT instruction with the register state specified by Eax and
-  Ecx. Returns Eax. This function is only available on IA-32 and x64.
-
-  @param  Eax The value to load into EAX or RAX before executing the MONITOR
-              instruction.
-  @param  Ecx The value to load into ECX or RCX before executing the MONITOR
-              instruction.
-
-  @return Eax
-
-**/
-UINTN
-EFIAPI
-AsmMwait (
-  IN      UINTN                     Eax,
-  IN      UINTN                     Ecx
-  );
-
-
-/**
-  Executes a WBINVD instruction.
-
-  Executes a WBINVD instruction. This function is only available on IA-32 and
-  x64.
-
-**/
-VOID
-EFIAPI
-AsmWbinvd (
-  VOID
-  );
-
-
-/**
-  Executes a INVD instruction.
-
-  Executes a INVD instruction. This function is only available on IA-32 and
-  x64.
-
-**/
-VOID
-EFIAPI
-AsmInvd (
-  VOID
-  );
-
-
-/**
-  Flushes a cache line from all the instruction and data caches within the
-  coherency domain of the CPU.
-
-  Flushed the cache line specified by LinearAddress, and returns LinearAddress.
-  This function is only available on IA-32 and x64.
-
-  @param  LinearAddress The address of the cache line to flush. If the CPU is
-                        in a physical addressing mode, then LinearAddress is a
-                        physical address. If the CPU is in a virtual
-                        addressing mode, then LinearAddress is a virtual
-                        address.
-
-  @return LinearAddress.
-**/
-VOID *
-EFIAPI
-AsmFlushCacheLine (
-  IN      VOID                      *LinearAddress
-  );
-
-
-/**
-  Enables the 32-bit paging mode on the CPU.
-
-  Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
-  must be properly initialized prior to calling this service. This function
-  assumes the current execution mode is 32-bit protected mode. This function is
-  only available on IA-32. After the 32-bit paging mode is enabled, control is
-  transferred to the function specified by EntryPoint using the new stack
-  specified by NewStack and passing in the parameters specified by Context1 and
-  Context2. Context1 and Context2 are optional and may be NULL. The function
-  EntryPoint must never return.
-
-  If the current execution mode is not 32-bit protected mode, then ASSERT().
-  If EntryPoint is NULL, then ASSERT().
-  If NewStack is NULL, then ASSERT().
-
-  There are a number of constraints that must be followed before calling this
-  function:
-  1)  Interrupts must be disabled.
-  2)  The caller must be in 32-bit protected mode with flat descriptors. This
-      means all descriptors must have a base of 0 and a limit of 4GB.
-  3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat
-      descriptors.
-  4)  CR3 must point to valid page tables that will be used once the transition
-      is complete, and those page tables must guarantee that the pages for this
-      function and the stack are identity mapped.
-
-  @param  EntryPoint  A pointer to function to call with the new stack after
-                      paging is enabled.
-  @param  Context1    A pointer to the context to pass into the EntryPoint
-                      function as the first parameter after paging is enabled.
-  @param  Context2    A pointer to the context to pass into the EntryPoint
-                      function as the second parameter after paging is enabled.
-  @param  NewStack    A pointer to the new stack to use for the EntryPoint
-                      function after paging is enabled.
-
-**/
-VOID
-EFIAPI
-AsmEnablePaging32 (
-  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-  IN      VOID                      *Context1,  OPTIONAL
-  IN      VOID                      *Context2,  OPTIONAL
-  IN      VOID                      *NewStack
-  );
-
-
-/**
-  Disables the 32-bit paging mode on the CPU.
-
-  Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
-  mode. This function assumes the current execution mode is 32-paged protected
-  mode. This function is only available on IA-32. After the 32-bit paging mode
-  is disabled, control is transferred to the function specified by EntryPoint
-  using the new stack specified by NewStack and passing in the parameters
-  specified by Context1 and Context2. Context1 and Context2 are optional and
-  may be NULL. The function EntryPoint must never return.
-
-  If the current execution mode is not 32-bit paged mode, then ASSERT().
-  If EntryPoint is NULL, then ASSERT().
-  If NewStack is NULL, then ASSERT().
-
-  There are a number of constraints that must be followed before calling this
-  function:
-  1)  Interrupts must be disabled.
-  2)  The caller must be in 32-bit paged mode.
-  3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
-  4)  CR3 must point to valid page tables that guarantee that the pages for
-      this function and the stack are identity mapped.
-
-  @param  EntryPoint  A pointer to function to call with the new stack after
-                      paging is disabled.
-  @param  Context1    A pointer to the context to pass into the EntryPoint
-                      function as the first parameter after paging is disabled.
-  @param  Context2    A pointer to the context to pass into the EntryPoint
-                      function as the second parameter after paging is
-                      disabled.
-  @param  NewStack    A pointer to the new stack to use for the EntryPoint
-                      function after paging is disabled.
-
-**/
-VOID
-EFIAPI
-AsmDisablePaging32 (
-  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
-  IN      VOID                      *Context1,  OPTIONAL
-  IN      VOID                      *Context2,  OPTIONAL
-  IN      VOID                      *NewStack
-  );
-
-
-/**
-  Enables the 64-bit paging mode on the CPU.
-
-  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
-  must be properly initialized prior to calling this service. This function
-  assumes the current execution mode is 32-bit protected mode with flat
-  descriptors. This function is only available on IA-32. After the 64-bit
-  paging mode is enabled, control is transferred to the function specified by
-  EntryPoint using the new stack specified by NewStack and passing in the
-  parameters specified by Context1 and Context2. Context1 and Context2 are
-  optional and may be 0. The function EntryPoint must never return.
-
-  If the current execution mode is not 32-bit protected mode with flat
-  descriptors, then ASSERT().
-  If EntryPoint is 0, then ASSERT().
-  If NewStack is 0, then ASSERT().
-
-  @param  Cs          The 16-bit selector to load in the CS before EntryPoint
-                      is called. The descriptor in the GDT that this selector
-                      references must be setup for long mode.
-  @param  EntryPoint  The 64-bit virtual address of the function to call with
-                      the new stack after paging is enabled.
-  @param  Context1    The 64-bit virtual address of the context to pass into
-                      the EntryPoint function as the first parameter after
-                      paging is enabled.
-  @param  Context2    The 64-bit virtual address of the context to pass into
-                      the EntryPoint function as the second parameter after
-                      paging is enabled.
-  @param  NewStack    The 64-bit virtual address of the new stack to use for
-                      the EntryPoint function after paging is enabled.
-
-**/
-VOID
-EFIAPI
-AsmEnablePaging64 (
-  IN      UINT16                    Cs,
-  IN      UINT64                    EntryPoint,
-  IN      UINT64                    Context1,  OPTIONAL
-  IN      UINT64                    Context2,  OPTIONAL
-  IN      UINT64                    NewStack
-  );
-
-
-/**
-  Disables the 64-bit paging mode on the CPU.
-
-  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
-  mode. This function assumes the current execution mode is 64-paging mode.
-  This function is only available on x64. After the 64-bit paging mode is
-  disabled, control is transferred to the function specified by EntryPoint
-  using the new stack specified by NewStack and passing in the parameters
-  specified by Context1 and Context2. Context1 and Context2 are optional and
-  may be 0. The function EntryPoint must never return.
-
-  If the current execution mode is not 64-bit paged mode, then ASSERT().
-  If EntryPoint is 0, then ASSERT().
-  If NewStack is 0, then ASSERT().
-
-  @param  Cs          The 16-bit selector to load in the CS before EntryPoint
-                      is called. The descriptor in the GDT that this selector
-                      references must be setup for 32-bit protected mode.
-  @param  EntryPoint  The 64-bit virtual address of the function to call with
-                      the new stack after paging is disabled.
-  @param  Context1    The 64-bit virtual address of the context to pass into
-                      the EntryPoint function as the first parameter after
-                      paging is disabled.
-  @param  Context2    The 64-bit virtual address of the context to pass into
-                      the EntryPoint function as the second parameter after
-                      paging is disabled.
-  @param  NewStack    The 64-bit virtual address of the new stack to use for
-                      the EntryPoint function after paging is disabled.
-
-**/
-VOID
-EFIAPI
-AsmDisablePaging64 (
-  IN      UINT16                    Cs,
-  IN      UINT32                    EntryPoint,
-  IN      UINT32                    Context1,  OPTIONAL
-  IN      UINT32                    Context2,  OPTIONAL
-  IN      UINT32                    NewStack
-  );
-
-
-//
-// 16-bit thunking services
-//
-
-/**
-  Retrieves the properties for 16-bit thunk functions.
-
-  Computes the size of the buffer and stack below 1MB required to use the
-  AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This
-  buffer size is returned in RealModeBufferSize, and the stack size is returned
-  in ExtraStackSize. If parameters are passed to the 16-bit real mode code,
-  then the actual minimum stack size is ExtraStackSize plus the maximum number
-  of bytes that need to be passed to the 16-bit real mode code.
-
-  If RealModeBufferSize is NULL, then ASSERT().
-  If ExtraStackSize is NULL, then ASSERT().
-
-  @param  RealModeBufferSize  A pointer to the size of the buffer below 1MB
-                              required to use the 16-bit thunk functions.
-  @param  ExtraStackSize      A pointer to the extra size of stack below 1MB
-                              that the 16-bit thunk functions require for
-                              temporary storage in the transition to and from
-                              16-bit real mode.
-
-**/
-VOID
-EFIAPI
-AsmGetThunk16Properties (
-  OUT     UINT32                    *RealModeBufferSize,
-  OUT     UINT32                    *ExtraStackSize
-  );
-
-
-/**
-  Prepares all structures a code required to use AsmThunk16().
-
-  Prepares all structures and code required to use AsmThunk16().
-
-  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
-  virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
-
-  If ThunkContext is NULL, then ASSERT().
-
-  @param  ThunkContext  A pointer to the context structure that describes the
-                        16-bit real mode code to call.
-
-**/
-VOID
-EFIAPI
-AsmPrepareThunk16 (
-  IN OUT  THUNK_CONTEXT             *ThunkContext
-  );
-
-
-/**
-  Transfers control to a 16-bit real mode entry point and returns the results.
-
-  Transfers control to a 16-bit real mode entry point and returns the results.
-  AsmPrepareThunk16() must be called with ThunkContext before this function is used.
-  This function must be called with interrupts disabled.
-
-  The register state from the RealModeState field of ThunkContext is restored just prior
-  to calling the 16-bit real mode entry point.  This includes the EFLAGS field of RealModeState,
-  which is used to set the interrupt state when a 16-bit real mode entry point is called.
-  Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.
-  The stack is initialized to the SS and ESP fields of RealModeState.  Any parameters passed to
-  the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.
-  The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,
-  so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment
-  and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry
-  point must exit with a RETF instruction. The register state is captured into RealModeState immediately
-  after the RETF instruction is executed.
-
-  If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
-  or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure
-  the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode.
-
-  If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts,
-  then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.
-  This includes the base vectors, the interrupt masks, and the edge/level trigger mode.
-
-  If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code
-  is invoked in big real mode.  Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.
-
-  If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
-  ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to
-  disable the A20 mask.
-
-  If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in
-  ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask.  If this INT 15 call fails,
-  then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
-
-  If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in
-  ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.
-
-  If ThunkContext is NULL, then ASSERT().
-  If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
-  If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in
-  ThunkAttributes, then ASSERT().
-
-  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
-  virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.
-
-  @param  ThunkContext  A pointer to the context structure that describes the
-                        16-bit real mode code to call.
-
-**/
-VOID
-EFIAPI
-AsmThunk16 (
-  IN OUT  THUNK_CONTEXT             *ThunkContext
-  );
-
-
-/**
-  Prepares all structures and code for a 16-bit real mode thunk, transfers
-  control to a 16-bit real mode entry point, and returns the results.
-
-  Prepares all structures and code for a 16-bit real mode thunk, transfers
-  control to a 16-bit real mode entry point, and returns the results. If the
-  caller only need to perform a single 16-bit real mode thunk, then this
-  service should be used. If the caller intends to make more than one 16-bit
-  real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
-  once and AsmThunk16() can be called for each 16-bit real mode thunk.
-
-  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the
-  virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.
-
-  See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.
-
-  @param  ThunkContext  A pointer to the context structure that describes the
-                        16-bit real mode code to call.
-
-**/
-VOID
-EFIAPI
-AsmPrepareAndThunk16 (
-  IN OUT  THUNK_CONTEXT             *ThunkContext
-  );
-
-#endif
-#endif
-
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiBootMode.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiBootMode.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiBootMode.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiBootMode.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   Present the boot mode values in PI.
 
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -11,7 +11,7 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
   @par Revision Reference:
-  PI Version 1.2.1A
+  PI Version 1.0
 
 **/
 
@@ -35,7 +35,6 @@
 #define BOOT_WITH_DEFAULT_SETTINGS                    0x04
 #define BOOT_ON_S4_RESUME                             0x05
 #define BOOT_ON_S5_RESUME                             0x06
-#define BOOT_WITH_MFG_MODE_SETTINGS                   0x07
 #define BOOT_ON_S2_RESUME                             0x10
 #define BOOT_ON_S3_RESUME                             0x11
 #define BOOT_ON_FLASH_UPDATE                          0x12
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiDxeCis.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiDxeCis.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiDxeCis.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiDxeCis.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   Include file matches things in PI.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -11,7 +11,7 @@
 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
   @par Revision Reference:
-  PI Version 1.2
+  PI Version 1.0
 
 **/
 
@@ -371,8 +371,7 @@
                                 BaseAddress and Length cannot be modified.
   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
                                 the memory resource range.
-  @retval EFI_NOT_AVAILABLE_YET The attributes cannot be set because CPU architectural protocol is
-                                not available yet.
+
 **/
 typedef
 EFI_STATUS
@@ -657,10 +656,8 @@
 //
 // DXE Services Table
 //
-#define DXE_SERVICES_SIGNATURE            0x565245535f455844ULL
-#define DXE_SPECIFICATION_MAJOR_REVISION  1
-#define DXE_SPECIFICATION_MINOR_REVISION  20
-#define DXE_SERVICES_REVISION             ((DXE_SPECIFICATION_MAJOR_REVISION<<16) | (DXE_SPECIFICATION_MINOR_REVISION))
+#define DXE_SERVICES_SIGNATURE  0x565245535f455844ULL
+#define DXE_SERVICES_REVISION   ((1<<16) | (00))
 
 typedef struct {
   ///
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiFirmwareFile.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiFirmwareFile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiFirmwareFile.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiFirmwareFile.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   The firmware file related definitions in PI.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -36,7 +36,8 @@
     ///
     /// If the FFS_ATTRIB_CHECKSUM (see definition below) bit of the Attributes
     /// field is set to one, the IntegrityCheck.Checksum.File field is an 8-bit
-    /// checksum of the file data.
+    /// checksum of the entire file The State field and the file tail are assumed to be zero
+    /// and the checksum is calculated such that the entire file sums to zero.
     /// If the FFS_ATTRIB_CHECKSUM bit of the Attributes field is cleared to zero,
     /// the IntegrityCheck.Checksum.File field must be initialized with a value of
     /// 0xAA. The IntegrityCheck.Checksum.File field is valid any time the
@@ -175,18 +176,9 @@
   /// If FFS_ATTRIB_LARGE_FILE is set in Attributes, then ExtendedSize exists and Size must be set to zero.
   /// If FFS_ATTRIB_LARGE_FILE is not set then EFI_FFS_FILE_HEADER is used.
   ///
-  UINT32                    ExtendedSize;
+  EFI_FFS_FILE_STATE        ExtendedSize;
 } EFI_FFS_FILE_HEADER2;
 
-#define IS_FFS_FILE2(FfsFileHeaderPtr) \
-    (((((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Attributes) & FFS_ATTRIB_LARGE_FILE) == FFS_ATTRIB_LARGE_FILE)
-
-#define FFS_FILE_SIZE(FfsFileHeaderPtr) \
-    ((UINT32) (*((UINT32 *) ((EFI_FFS_FILE_HEADER *) (UINTN) FfsFileHeaderPtr)->Size) & 0x00ffffff))
-
-#define FFS_FILE2_SIZE(FfsFileHeaderPtr) \
-    (((EFI_FFS_FILE_HEADER2 *) (UINTN) FfsFileHeaderPtr)->ExtendedSize)
-
 typedef UINT8 EFI_SECTION_TYPE;
 
 ///
@@ -481,14 +473,8 @@
   CHAR16                        VersionString[1];
 } EFI_VERSION_SECTION2;
 
-#define IS_SECTION2(SectionHeaderPtr) \
-    ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff) == 0x00ffffff)
-
 #define SECTION_SIZE(SectionHeaderPtr) \
-    ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) (UINTN) SectionHeaderPtr)->Size) & 0x00ffffff))
-
-#define SECTION2_SIZE(SectionHeaderPtr) \
-    (((EFI_COMMON_SECTION_HEADER2 *) (UINTN) SectionHeaderPtr)->ExtendedSize)
+    ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) SectionHeaderPtr)->Size) & 0x00ffffff))
 
 #pragma pack()
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiFirmwareVolume.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiFirmwareVolume.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiFirmwareVolume.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiFirmwareVolume.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,7 +11,7 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 
   @par Revision Reference:
-  PI Version 1.2C
+  PI Version 1.2B
 
 **/
 
@@ -75,7 +75,7 @@
 #define EFI_FVB2_ALIGNMENT_64K      0x00100000
 #define EFI_FVB2_ALIGNMENT_128K     0x00110000
 #define EFI_FVB2_ALIGNMENT_256K     0x00120000
-#define EFI_FVB2_ALIGNMENT_512K     0x00130000
+#define EFI_FVB2_ALIGNMNET_512K     0x00130000
 #define EFI_FVB2_ALIGNMENT_1M       0x00140000
 #define EFI_FVB2_ALIGNMENT_2M       0x00150000
 #define EFI_FVB2_ALIGNMENT_4M       0x00160000
@@ -207,15 +207,13 @@
   ///
   /// An array of GUIDs, each GUID representing an OEM file type.
   ///
-  /// EFI_GUID  Types[1];
-  ///
+  EFI_GUID  Types[1];
 } EFI_FIRMWARE_VOLUME_EXT_ENTRY_OEM_TYPE;
 
 #define EFI_FV_EXT_TYPE_GUID_TYPE 0x0002
 
 ///
-/// This extension header EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE provides a vendor specific
-/// GUID FormatType type which includes a length and a successive series of data bytes.
+/// This extension header provides a mapping between a GUID and an OEM file type.
 ///
 typedef struct {
   ///
@@ -229,8 +227,7 @@
   ///
   /// An arry of bytes of length Length.
   ///
-  /// UINT8                             Data[1];
-  ///
+  UINT8                             Data[1];
 } EFI_FIRMWARE_VOLUME_EXT_ENTRY_GUID_TYPE;
 
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiHob.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiHob.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiHob.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiHob.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   HOB related definitions in PI.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -251,21 +251,21 @@
 //
 // These types can be ORed together as needed.
 //
-// The following attributes are used to describe settings
+// The first three enumerations describe settings
 //
-#define EFI_RESOURCE_ATTRIBUTE_PRESENT                  0x00000001
-#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED              0x00000002
-#define EFI_RESOURCE_ATTRIBUTE_TESTED                   0x00000004
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED           0x00000080
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED          0x00000100
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED      0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT              0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED          0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED               0x00000004
 //
-// The rest of the attributes are used to describe capabilities
+// The rest of the settings describe capabilities
 //
 #define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC           0x00000008
 #define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC         0x00000010
 #define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1           0x00000020
 #define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2           0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED           0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED          0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED      0x00000200
 #define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE              0x00000400
 #define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE        0x00000800
 #define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE  0x00001000
@@ -274,9 +274,6 @@
 #define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO                0x00008000
 #define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO                0x00010000
 #define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED        0x00020000
-#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTABLE         0x00100000
-#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE        0x00200000
-#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE    0x00400000
 
 ///
 /// Describes the resource properties of all fixed,
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiStatusCode.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiStatusCode.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Pi/PiStatusCode.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Pi/PiStatusCode.h	2012-01-06 23:49:04.000000000 +0000
@@ -22,7 +22,7 @@
 FILE_LICENCE ( BSD3 );
 
 //
-// Required for IA32, X64, IPF, ARM and EBC defines for CPU exception types
+// Required for IA32 and IPF defines for CPU exception types
 //
 #include <ipxe/efi/Protocol/DebugSupport.h>
 
@@ -713,9 +713,6 @@
 #define EFI_SOFTWARE_EFI_BOOT_SERVICE     (EFI_SOFTWARE | 0x00100000)
 #define EFI_SOFTWARE_EFI_RUNTIME_SERVICE  (EFI_SOFTWARE | 0x00110000)
 #define EFI_SOFTWARE_EFI_DXE_SERVICE      (EFI_SOFTWARE | 0x00120000)
-#define EFI_SOFTWARE_X64_EXCEPTION        (EFI_SOFTWARE | 0x00130000)
-#define EFI_SOFTWARE_ARM_EXCEPTION        (EFI_SOFTWARE | 0x00140000)
-
 ///@}
 
 ///
@@ -756,6 +753,7 @@
 
 ///
 /// Software Class PEI Module Subclass Progress Code definitions.
+/// Note: EFI_SW_PEI_PC_RECOVERY_BEGIN is different from PI 1.2 Specification.
 ///
 ///@{
 #define EFI_SW_PEI_PC_RECOVERY_BEGIN  (EFI_SUBCLASS_SPECIFIC | 0x00000000)
@@ -811,14 +809,6 @@
 ///@}
 
 //
-// Software Class X64 Exception Subclass Progress Code definitions.
-//
-
-//
-// Software Class ARM Exception Subclass Progress Code definitions.
-//
-
-//
 // Software Class EBC Exception Subclass Progress Code definitions.
 //
 
@@ -997,6 +987,7 @@
 
 ///
 /// Software Class PEI Module Subclass Error Code definitions.
+/// Note: EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR is different from PI 1.2 Specification.
 ///
 ///@{
 #define EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE          (EFI_SUBCLASS_SPECIFIC | 0x00000000)
@@ -1132,65 +1123,8 @@
 // Software Class EFI Runtime Service Subclass Error Code definitions.
 //
 
-///
-/// Software Class EFI DXE Service Subclass Error Code definitions.
-///
-///@{
-#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS   (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD         (EFI_SUBCLASS_SPECIFIC | 0x00000006)
-///@}
-
-///
-/// Software Class DXE RT Driver Subclass Progress Code definitions.
-///
-///@{
-#define EFI_SW_DXE_RT_PC_S0                         (EFI_SUBCLASS_SPECIFIC | 0x00000000)
-#define EFI_SW_DXE_RT_PC_S1                         (EFI_SUBCLASS_SPECIFIC | 0x00000001)
-#define EFI_SW_DXE_RT_PC_S2                         (EFI_SUBCLASS_SPECIFIC | 0x00000002)
-#define EFI_SW_DXE_RT_PC_S3                         (EFI_SUBCLASS_SPECIFIC | 0x00000003)
-#define EFI_SW_DXE_RT_PC_S4                         (EFI_SUBCLASS_SPECIFIC | 0x00000004)
-#define EFI_SW_DXE_RT_PC_S5                         (EFI_SUBCLASS_SPECIFIC | 0x00000005)
-///@}
-
-///
-/// Software Class X64 Exception Subclass Error Code definitions.
-/// These exceptions are derived from the debug protocol
-/// definitions in the EFI specification.
-///
-///@{
-#define EFI_SW_EC_X64_DIVIDE_ERROR                   EXCEPT_X64_DIVIDE_ERROR
-#define EFI_SW_EC_X64_DEBUG                          EXCEPT_X64_DEBUG
-#define EFI_SW_EC_X64_NMI                            EXCEPT_X64_NMI
-#define EFI_SW_EC_X64_BREAKPOINT                     EXCEPT_X64_BREAKPOINT
-#define EFI_SW_EC_X64_OVERFLOW                       EXCEPT_X64_OVERFLOW
-#define EFI_SW_EC_X64_BOUND                          EXCEPT_X64_BOUND
-#define EFI_SW_EC_X64_INVALID_OPCODE                 EXCEPT_X64_INVALID_OPCODE
-#define EFI_SW_EC_X64_DOUBLE_FAULT                   EXCEPT_X64_DOUBLE_FAULT
-#define EFI_SW_EC_X64_INVALID_TSS                    EXCEPT_X64_INVALID_TSS
-#define EFI_SW_EC_X64_SEG_NOT_PRESENT                EXCEPT_X64_SEG_NOT_PRESENT
-#define EFI_SW_EC_X64_STACK_FAULT                    EXCEPT_X64_STACK_FAULT
-#define EFI_SW_EC_X64_GP_FAULT                       EXCEPT_X64_GP_FAULT
-#define EFI_SW_EC_X64_PAGE_FAULT                     EXCEPT_X64_PAGE_FAULT
-#define EFI_SW_EC_X64_FP_ERROR                       EXCEPT_X64_FP_ERROR
-#define EFI_SW_EC_X64_ALIGNMENT_CHECK                EXCEPT_X64_ALIGNMENT_CHECK
-#define EFI_SW_EC_X64_MACHINE_CHECK                  EXCEPT_X64_MACHINE_CHECK
-#define EFI_SW_EC_X64_SIMD                           EXCEPT_X64_SIMD
-///@}
-
-///
-/// Software Class ARM Exception Subclass Error Code definitions.
-/// These exceptions are derived from the debug protocol
-/// definitions in the EFI specification.
-///
-///@{
-#define EFI_SW_EC_ARM_RESET                          EXCEPT_ARM_RESET
-#define EFI_SW_EC_ARM_UNDEFINED_INSTRUCTION          EXCEPT_ARM_UNDEFINED_INSTRUCTION
-#define EFI_SW_EC_ARM_SOFTWARE_INTERRUPT             EXCEPT_ARM_SOFTWARE_INTERRUPT
-#define EFI_SW_EC_ARM_PREFETCH_ABORT                 EXCEPT_ARM_PREFETCH_ABORT
-#define EFI_SW_EC_ARM_DATA_ABORT                     EXCEPT_ARM_DATA_ABORT
-#define EFI_SW_EC_ARM_RESERVED                       EXCEPT_ARM_RESERVED
-#define EFI_SW_EC_ARM_IRQ                            EXCEPT_ARM_IRQ
-#define EFI_SW_EC_ARM_FIQ                            EXCEPT_ARM_FIQ
-///@}
+//
+// Software Class EFI DXE Service Subclass Error Code definitions.
+//
 
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/ProcessorBind.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/ProcessorBind.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/ProcessorBind.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/ProcessorBind.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,8 +1,6 @@
 #ifndef _IPXE_EFI_PROCESSOR_BIND_H
 #define _IPXE_EFI_PROCESSOR_BIND_H
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
 /*
  * EFI header files rely on having the CPU architecture directory
  * present in the search path in order to pick up ProcessorBind.h.  We
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/BlockIo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/BlockIo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/BlockIo.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/BlockIo.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,243 +0,0 @@
-/** @file
-  Block IO protocol as defined in the UEFI 2.0 specification.
-
-  The Block IO protocol is used to abstract block devices like hard drives,
-  DVD-ROMs and floppy drives.
-
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __BLOCK_IO_H__
-#define __BLOCK_IO_H__
-
-FILE_LICENCE ( BSD3 );
-
-#define EFI_BLOCK_IO_PROTOCOL_GUID \
-  { \
-    0x964e5b21, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
-  }
-
-typedef struct _EFI_BLOCK_IO_PROTOCOL  EFI_BLOCK_IO_PROTOCOL;
-
-///
-/// Protocol GUID name defined in EFI1.1.
-///
-#define BLOCK_IO_PROTOCOL       EFI_BLOCK_IO_PROTOCOL_GUID
-
-///
-/// Protocol defined in EFI1.1.
-///
-typedef EFI_BLOCK_IO_PROTOCOL   EFI_BLOCK_IO;
-
-/**
-  Reset the Block Device.
-
-  @param  This                 Indicates a pointer to the calling context.
-  @param  ExtendedVerification Driver may perform diagnostics on reset.
-
-  @retval EFI_SUCCESS          The device was reset.
-  @retval EFI_DEVICE_ERROR     The device is not functioning properly and could
-                               not be reset.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_BLOCK_RESET)(
-  IN EFI_BLOCK_IO_PROTOCOL          *This,
-  IN BOOLEAN                        ExtendedVerification
-  );
-
-/**
-  Read BufferSize bytes from Lba into Buffer.
-
-  @param  This       Indicates a pointer to the calling context.
-  @param  MediaId    Id of the media, changes every time the media is replaced.
-  @param  Lba        The starting Logical Block Address to read from
-  @param  BufferSize Size of Buffer, must be a multiple of device block size.
-  @param  Buffer     A pointer to the destination buffer for the data. The caller is
-                     responsible for either having implicit or explicit ownership of the buffer.
-
-  @retval EFI_SUCCESS           The data was read correctly from the device.
-  @retval EFI_DEVICE_ERROR      The device reported an error while performing the read.
-  @retval EFI_NO_MEDIA          There is no media in the device.
-  @retval EFI_MEDIA_CHANGED     The MediaId does not matched the current device.
-  @retval EFI_BAD_BUFFER_SIZE   The Buffer was not a multiple of the block size of the device.
-  @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
-                                or the buffer is not on proper alignment.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_BLOCK_READ)(
-  IN EFI_BLOCK_IO_PROTOCOL          *This,
-  IN UINT32                         MediaId,
-  IN EFI_LBA                        Lba,
-  IN UINTN                          BufferSize,
-  OUT VOID                          *Buffer
-  );
-
-/**
-  Write BufferSize bytes from Lba into Buffer.
-
-  @param  This       Indicates a pointer to the calling context.
-  @param  MediaId    The media ID that the write request is for.
-  @param  Lba        The starting logical block address to be written. The caller is
-                     responsible for writing to only legitimate locations.
-  @param  BufferSize Size of Buffer, must be a multiple of device block size.
-  @param  Buffer     A pointer to the source buffer for the data.
-
-  @retval EFI_SUCCESS           The data was written correctly to the device.
-  @retval EFI_WRITE_PROTECTED   The device can not be written to.
-  @retval EFI_DEVICE_ERROR      The device reported an error while performing the write.
-  @retval EFI_NO_MEDIA          There is no media in the device.
-  @retval EFI_MEDIA_CHNAGED     The MediaId does not matched the current device.
-  @retval EFI_BAD_BUFFER_SIZE   The Buffer was not a multiple of the block size of the device.
-  @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid,
-                                or the buffer is not on proper alignment.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_BLOCK_WRITE)(
-  IN EFI_BLOCK_IO_PROTOCOL          *This,
-  IN UINT32                         MediaId,
-  IN EFI_LBA                        Lba,
-  IN UINTN                          BufferSize,
-  IN VOID                           *Buffer
-  );
-
-/**
-  Flush the Block Device.
-
-  @param  This              Indicates a pointer to the calling context.
-
-  @retval EFI_SUCCESS       All outstanding data was written to the device
-  @retval EFI_DEVICE_ERROR  The device reported an error while writting back the data
-  @retval EFI_NO_MEDIA      There is no media in the device.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_BLOCK_FLUSH)(
-  IN EFI_BLOCK_IO_PROTOCOL  *This
-  );
-
-/**
-  Block IO read only mode data and updated only via members of BlockIO
-**/
-typedef struct {
-  ///
-  /// The curent media Id. If the media changes, this value is changed.
-  ///
-  UINT32  MediaId;
-
-  ///
-  /// TRUE if the media is removable; otherwise, FALSE.
-  ///
-  BOOLEAN RemovableMedia;
-
-  ///
-  /// TRUE if there is a media currently present in the device;
-  /// othersise, FALSE. THis field shows the media present status
-  /// as of the most recent ReadBlocks() or WriteBlocks() call.
-  ///
-  BOOLEAN MediaPresent;
-
-  ///
-  /// TRUE if LBA 0 is the first block of a partition; otherwise
-  /// FALSE. For media with only one partition this would be TRUE.
-  ///
-  BOOLEAN LogicalPartition;
-
-  ///
-  /// TRUE if the media is marked read-only otherwise, FALSE.
-  /// This field shows the read-only status as of the most recent WriteBlocks () call.
-  ///
-  BOOLEAN ReadOnly;
-
-  ///
-  /// TRUE if the WriteBlock () function caches write data.
-  ///
-  BOOLEAN WriteCaching;
-
-  ///
-  /// The intrinsic block size of the device. If the media changes, then
-  /// this field is updated.
-  ///
-  UINT32  BlockSize;
-
-  ///
-  /// Supplies the alignment requirement for any buffer to read or write block(s).
-  ///
-  UINT32  IoAlign;
-
-  ///
-  /// The last logical block address on the device.
-  /// If the media changes, then this field is updated.
-  ///
-  EFI_LBA LastBlock;
-
-  ///
-  /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
-  /// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the first LBA is aligned to
-  /// a physical block boundary.
-  ///
-  EFI_LBA LowestAlignedLba;
-
-  ///
-  /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
-  /// EFI_BLOCK_IO_PROTOCOL_REVISION2. Returns the number of logical blocks
-  /// per physical block.
-  ///
-  UINT32 LogicalBlocksPerPhysicalBlock;
-
-  ///
-  /// Only present if EFI_BLOCK_IO_PROTOCOL.Revision is greater than or equal to
-  /// EFI_BLOCK_IO_PROTOCOL_REVISION3. Returns the optimal transfer length
-  /// granularity as a number of logical blocks.
-  ///
-  UINT32 OptimalTransferLengthGranularity;
-} EFI_BLOCK_IO_MEDIA;
-
-#define EFI_BLOCK_IO_PROTOCOL_REVISION  0x00010000
-#define EFI_BLOCK_IO_PROTOCOL_REVISION2 0x00020001
-#define EFI_BLOCK_IO_PROTOCOL_REVISION3 0x00020031
-
-///
-/// Revision defined in EFI1.1.
-///
-#define EFI_BLOCK_IO_INTERFACE_REVISION   EFI_BLOCK_IO_PROTOCOL_REVISION
-
-///
-///  This protocol provides control over block devices.
-///
-struct _EFI_BLOCK_IO_PROTOCOL {
-  ///
-  /// The revision to which the block IO interface adheres. All future
-  /// revisions must be backwards compatible. If a future version is not
-  /// back wards compatible, it is not the same GUID.
-  ///
-  UINT64              Revision;
-  ///
-  /// Pointer to the EFI_BLOCK_IO_MEDIA data for this device.
-  ///
-  EFI_BLOCK_IO_MEDIA  *Media;
-
-  EFI_BLOCK_RESET     Reset;
-  EFI_BLOCK_READ      ReadBlocks;
-  EFI_BLOCK_WRITE     WriteBlocks;
-  EFI_BLOCK_FLUSH     FlushBlocks;
-
-};
-
-extern EFI_GUID gEfiBlockIoProtocolGuid;
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/ComponentName2.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/ComponentName2.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/ComponentName2.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/ComponentName2.h	2012-01-06 23:49:04.000000000 +0000
@@ -3,7 +3,7 @@
   This protocol is used to retrieve user readable names of drivers
   and controllers managed by UEFI Drivers.
 
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -121,7 +121,8 @@
                                 driver specified by This was
                                 returned in DriverName.
 
-  @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.
+  @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid
+                                EFI_HANDLE.
 
   @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it
                                 is not a valid EFI_HANDLE.
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/Cpu.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/Cpu.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/Cpu.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/Cpu.h	2012-01-06 23:49:04.000000000 +0000
@@ -3,7 +3,7 @@
 
   This code abstracts the DXE core from processor implementation details.
 
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -246,8 +246,6 @@
   @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by
                                 BaseAddress and Length cannot be modified.
   @retval EFI_INVALID_PARAMETER Length is zero.
-                                Attributes specified an illegal combination of attributes that
-                                cannot be set together.
   @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of
                                 the memory resource range.
   @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/CpuIo2.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/CpuIo2.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/CpuIo2.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/CpuIo2.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,144 @@
+/** @file
+  This files describes the CPU I/O 2 Protocol.
+
+  This protocol provides an I/O abstraction for a system processor. This protocol
+  is used by a PCI root bridge I/O driver to perform memory-mapped I/O and I/O transactions.
+  The I/O or memory primitives can be used by the consumer of the protocol to materialize
+  bus-specific configuration cycles, such as the transitional configuration address and data
+  ports for PCI. Only drivers that require direct access to the entire system should use this
+  protocol.
+
+  Note: This is a boot-services only protocol and it may not be used by runtime drivers after
+  ExitBootServices(). It is different from the Framework CPU I/O Protocol, which is a runtime
+  protocol and can be used by runtime drivers after ExitBootServices().
+
+  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+  @par Revision Reference:
+  This Protocol is defined in UEFI Platform Initialization Specification 1.2
+  Volume 5: Standards
+
+**/
+
+#ifndef __CPU_IO2_H__
+#define __CPU_IO2_H__
+
+FILE_LICENCE ( BSD3 );
+
+#define EFI_CPU_IO2_PROTOCOL_GUID \
+  { \
+    0xad61f191, 0xae5f, 0x4c0e, {0xb9, 0xfa, 0xe8, 0x69, 0xd2, 0x88, 0xc6, 0x4f} \
+  }
+
+typedef struct _EFI_CPU_IO2_PROTOCOL EFI_CPU_IO2_PROTOCOL;
+
+///
+/// Enumeration that defines the width of the I/O operation.
+///
+typedef enum {
+  EfiCpuIoWidthUint8,
+  EfiCpuIoWidthUint16,
+  EfiCpuIoWidthUint32,
+  EfiCpuIoWidthUint64,
+  EfiCpuIoWidthFifoUint8,
+  EfiCpuIoWidthFifoUint16,
+  EfiCpuIoWidthFifoUint32,
+  EfiCpuIoWidthFifoUint64,
+  EfiCpuIoWidthFillUint8,
+  EfiCpuIoWidthFillUint16,
+  EfiCpuIoWidthFillUint32,
+  EfiCpuIoWidthFillUint64,
+  EfiCpuIoWidthMaximum
+} EFI_CPU_IO_PROTOCOL_WIDTH;
+
+/**
+  Enables a driver to access registers in the PI CPU I/O space.
+
+  The Io.Read() and Io.Write() functions enable a driver to access PCI controller
+  registers in the PI CPU I/O space.
+
+  The I/O operations are carried out exactly as requested. The caller is responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32,
+  or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for
+  each of the Count operations that is performed.
+
+  If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16,
+  EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is
+  incremented for each of the Count operations that is performed. The read or
+  write operation is performed Count times on the same Address.
+
+  If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16,
+  EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is
+  incremented for each of the Count operations that is performed. The read or
+  write operation is performed Count times from the first element of Buffer.
+
+  @param[in]       This     A pointer to the EFI_CPU_IO2_PROTOCOL instance.
+  @param[in]       Width    Signifies the width of the I/O or Memory operation.
+  @param[in]       Address  The base address of the I/O operation.
+  @param[in]       Count    The number of I/O operations to perform. The number
+                            of bytes moved is Width size * Count, starting at Address.
+  @param[in, out]  Buffer   For read operations, the destination buffer to store the results.
+                            For write operations, the source buffer from which to write data.
+
+  @retval EFI_SUCCESS            The data was read from or written to the PI system.
+  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
+  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
+  @retval EFI_UNSUPPORTED        The Buffer is not aligned for the given Width.
+  @retval EFI_UNSUPPORTED        The address range specified by Address, Width,
+                                 and Count is not valid for this PI system.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM)(
+  IN     EFI_CPU_IO2_PROTOCOL              *This,
+  IN     EFI_CPU_IO_PROTOCOL_WIDTH         Width,
+  IN     UINT64                            Address,
+  IN     UINTN                             Count,
+  IN OUT VOID                              *Buffer
+  );
+
+///
+/// Service for read and write accesses.
+///
+typedef struct {
+  ///
+  /// This service provides the various modalities of memory and I/O read.
+  ///
+  EFI_CPU_IO_PROTOCOL_IO_MEM  Read;
+  ///
+  /// This service provides the various modalities of memory and I/O write.
+  ///
+  EFI_CPU_IO_PROTOCOL_IO_MEM  Write;
+} EFI_CPU_IO_PROTOCOL_ACCESS;
+
+///
+/// Provides the basic memory and I/O interfaces that are used to abstract
+/// accesses to devices in a system.
+///
+struct _EFI_CPU_IO2_PROTOCOL {
+  ///
+  /// Enables a driver to access memory-mapped registers in the EFI system memory space.
+  ///
+  EFI_CPU_IO_PROTOCOL_ACCESS  Mem;
+  ///
+  /// Enables a driver to access registers in the EFI CPU I/O space.
+  ///
+  EFI_CPU_IO_PROTOCOL_ACCESS  Io;
+};
+
+extern EFI_GUID gEfiCpuIo2ProtocolGuid;
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/CpuIo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/CpuIo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/CpuIo.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/CpuIo.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,48 @@
+/** @file
+  This code abstracts the CPU IO Protocol which installed by some platform or chipset-specific
+  PEIM that abstracts the processor-visible I/O operations.
+
+  Note: This is a runtime protocol and can be used by runtime drivers after ExitBootServices().
+  It is different from the PI 1.2 CPU I/O 2 Protocol, which is a boot services only protocol
+  and may not be used by runtime drivers after ExitBootServices().
+
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials are licensed and made available under
+the terms and conditions of the BSD License that accompanies this distribution.
+The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php.
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+  @par Revision Reference:
+  CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
+  Version 0.9.
+
+**/
+
+#ifndef _CPUIO_H_
+#define _CPUIO_H_
+
+FILE_LICENCE ( BSD3 );
+
+#include <ipxe/efi/Protocol/CpuIo2.h>
+
+#define EFI_CPU_IO_PROTOCOL_GUID \
+  { \
+    0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
+  }
+
+//
+// Framework CPU IO protocol structure is the same as CPU IO 2 protocol defined in PI 1.2 spec.
+// However, there is a significant different between the Framework CPU I/O
+// Protocol and the PI 1.2 CPU I/O 2 Protocol.  The Framework one is a runtime
+// protocol, which means it can be used by runtime drivers after ExitBootServices().
+// The PI one is not runtime safe, so it is a boot services only protocol and may
+// not be used by runtime drivers after ExitBootServices().
+//
+typedef EFI_CPU_IO2_PROTOCOL EFI_CPU_IO_PROTOCOL;
+
+extern EFI_GUID gEfiCpuIoProtocolGuid;
+
+#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/DevicePath.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/DevicePath.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/DevicePath.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/DevicePath.h	2012-01-06 23:49:04.000000000 +0000
@@ -5,7 +5,7 @@
   from a software point of view. The path must persist from boot to boot, so
   it can not contain things like PCI bus numbers that change from boot to boot.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -349,26 +349,6 @@
 } FIBRECHANNEL_DEVICE_PATH;
 
 ///
-/// Fibre Channel Ex SubType.
-///
-#define MSG_FIBRECHANNELEX_DP     0x15
-typedef struct {
-  EFI_DEVICE_PATH_PROTOCOL        Header;
-  ///
-  /// Reserved for the future.
-  ///
-  UINT32                          Reserved;
-  ///
-  /// 8 byte array containing Fibre Channel End Device Port Name.
-  ///
-  UINT8                           WWN[8];
-  ///
-  /// 8 byte array containing Fibre Channel Logical Unit Number.
-  ///
-  UINT8                           Lun[8];
-} FIBRECHANNELEX_DEVICE_PATH;
-
-///
 /// 1394 Device Path SubType
 ///
 #define MSG_1394_DP               0x04
@@ -563,14 +543,6 @@
   /// 0x01 - The Source IP Address is statically bound.
   ///
   BOOLEAN                         StaticIpAddress;
-  ///
-  /// The gateway IP address
-  ///
-  EFI_IPv4_ADDRESS                GatewayIpAddress;
-  ///
-  /// The subnet mask
-  ///
-  EFI_IPv4_ADDRESS                SubnetMask;
 } IPv4_DEVICE_PATH;
 
 ///
@@ -600,21 +572,10 @@
   ///
   UINT16                          Protocol;
   ///
-  /// 0x00 - The Local IP Address was manually configured.
-  /// 0x01 - The Local IP Address is assigned through IPv6
-  /// stateless auto-configuration.
-  /// 0x02 - The Local IP Address is assigned through IPv6
-  /// stateful configuration.
-  ///
-  UINT8                           IpAddressOrigin;
-  ///
-  /// The prefix length
-  ///
-  UINT8                           PrefixLength;
-  ///
-  /// The gateway IP address
+  /// 0x00 - The Source IP Address was assigned though DHCP.
+  /// 0x01 - The Source IP Address is statically bound.
   ///
-  EFI_IPv6_ADDRESS                GatewayIpAddress;
+  BOOLEAN                         StaticIpAddress;
 } IPv6_DEVICE_PATH;
 
 ///
@@ -731,9 +692,9 @@
 #define UART_FLOW_CONTROL_HARDWARE         0x00000001
 #define UART_FLOW_CONTROL_XON_XOFF         0x00000010
 
-#define DEVICE_PATH_MESSAGING_SAS          EFI_SAS_DEVICE_PATH_GUID
+#define DEVICE_PATH_MESSAGING_SAS                 EFI_SAS_DEVICE_PATH_GUID
 ///
-/// Serial Attached SCSI (SAS) Device Path.
+/// Serial Attached SCSI (SAS) devices.
 ///
 typedef struct {
   EFI_DEVICE_PATH_PROTOCOL        Header;
@@ -764,30 +725,6 @@
 } SAS_DEVICE_PATH;
 
 ///
-/// Serial Attached SCSI (SAS) Ex Device Path SubType
-///
-#define MSG_SASEX_DP              0x16
-typedef struct {
-  EFI_DEVICE_PATH_PROTOCOL        Header;
-  ///
-  /// 8-byte array of the SAS Address for Serial Attached SCSI Target Port.
-  ///
-  UINT8                           SasAddress[8];
-  ///
-  /// 8-byte array of the SAS Logical Unit Number.
-  ///
-  UINT8                           Lun[8];
-  ///
-  /// More Information about the device and its interconnect.
-  ///
-  UINT16                          DeviceTopology;
-  ///
-  /// Relative Target Port (RTP).
-  ///
-  UINT16                          RelativeTargetPort;
-} SASEX_DEVICE_PATH;
-
-///
 /// iSCSI Device Path SubType
 ///
 #define MSG_ISCSI_DP              0x13
@@ -960,7 +897,7 @@
 } MEDIA_PROTOCOL_DEVICE_PATH;
 
 ///
-/// PIWG Firmware File SubType.
+/// PIWG Firmware Volume Device Path SubType.
 ///
 #define MEDIA_PIWG_FW_FILE_DP     0x06
 
@@ -1030,7 +967,7 @@
   ///
   UINT16                          StatusFlag;
   ///
-  /// Null-terminated ASCII string that describes the boot device to a user.
+  /// ASCIIZ string that describes the boot device to a user.
   ///
   CHAR8                           String[1];
 } BBS_BBS_DEVICE_PATH;
@@ -1052,100 +989,78 @@
 /// Union of all possible Device Paths and pointers to Device Paths.
 ///
 typedef union {
-  EFI_DEVICE_PATH_PROTOCOL                   DevPath;
-  PCI_DEVICE_PATH                            Pci;
-  PCCARD_DEVICE_PATH                         PcCard;
-  MEMMAP_DEVICE_PATH                         MemMap;
-  VENDOR_DEVICE_PATH                         Vendor;
-
-  CONTROLLER_DEVICE_PATH                     Controller;
-  ACPI_HID_DEVICE_PATH                       Acpi;
-  ACPI_EXTENDED_HID_DEVICE_PATH              ExtendedAcpi;
-  ACPI_ADR_DEVICE_PATH                       AcpiAdr;
-
-  ATAPI_DEVICE_PATH                          Atapi;
-  SCSI_DEVICE_PATH                           Scsi;
-  ISCSI_DEVICE_PATH                          Iscsi;
-  FIBRECHANNEL_DEVICE_PATH                   FibreChannel;
-  FIBRECHANNELEX_DEVICE_PATH                 FibreChannelEx;
-
-  F1394_DEVICE_PATH                          F1394;
-  USB_DEVICE_PATH                            Usb;
-  SATA_DEVICE_PATH                           Sata;
-  USB_CLASS_DEVICE_PATH                      UsbClass;
-  USB_WWID_DEVICE_PATH                       UsbWwid;
-  DEVICE_LOGICAL_UNIT_DEVICE_PATH            LogicUnit;
-  I2O_DEVICE_PATH                            I2O;
-  MAC_ADDR_DEVICE_PATH                       MacAddr;
-  IPv4_DEVICE_PATH                           Ipv4;
-  IPv6_DEVICE_PATH                           Ipv6;
-  VLAN_DEVICE_PATH                           Vlan;
-  INFINIBAND_DEVICE_PATH                     InfiniBand;
-  UART_DEVICE_PATH                           Uart;
-  UART_FLOW_CONTROL_DEVICE_PATH              UartFlowControl;
-  SAS_DEVICE_PATH                            Sas;
-  SASEX_DEVICE_PATH                          SasEx;
-  HARDDRIVE_DEVICE_PATH                      HardDrive;
-  CDROM_DEVICE_PATH                          CD;
-
-  FILEPATH_DEVICE_PATH                       FilePath;
-  MEDIA_PROTOCOL_DEVICE_PATH                 MediaProtocol;
-
-  MEDIA_FW_VOL_DEVICE_PATH                   FirmwareVolume;
-  MEDIA_FW_VOL_FILEPATH_DEVICE_PATH          FirmwareFile;
-  MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH    Offset;
+  EFI_DEVICE_PATH_PROTOCOL             DevPath;
+  PCI_DEVICE_PATH                      Pci;
+  PCCARD_DEVICE_PATH                   PcCard;
+  MEMMAP_DEVICE_PATH                   MemMap;
+  VENDOR_DEVICE_PATH                   Vendor;
+
+  CONTROLLER_DEVICE_PATH               Controller;
+  ACPI_HID_DEVICE_PATH                 Acpi;
+
+  ATAPI_DEVICE_PATH                    Atapi;
+  SCSI_DEVICE_PATH                     Scsi;
+  ISCSI_DEVICE_PATH                    Iscsi;
+  FIBRECHANNEL_DEVICE_PATH             FibreChannel;
+
+  F1394_DEVICE_PATH                    F1394;
+  USB_DEVICE_PATH                      Usb;
+  SATA_DEVICE_PATH                     Sata;
+  USB_CLASS_DEVICE_PATH                UsbClass;
+  I2O_DEVICE_PATH                      I2O;
+  MAC_ADDR_DEVICE_PATH                 MacAddr;
+  IPv4_DEVICE_PATH                     Ipv4;
+  IPv6_DEVICE_PATH                     Ipv6;
+  INFINIBAND_DEVICE_PATH               InfiniBand;
+  UART_DEVICE_PATH                     Uart;
+
+  HARDDRIVE_DEVICE_PATH                HardDrive;
+  CDROM_DEVICE_PATH                    CD;
+
+  FILEPATH_DEVICE_PATH                 FilePath;
+  MEDIA_PROTOCOL_DEVICE_PATH           MediaProtocol;
+  MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH Offset;
 
-  BBS_BBS_DEVICE_PATH                        Bbs;
+  BBS_BBS_DEVICE_PATH                  Bbs;
 } EFI_DEV_PATH;
 
 
 
 typedef union {
-  EFI_DEVICE_PATH_PROTOCOL                   *DevPath;
-  PCI_DEVICE_PATH                            *Pci;
-  PCCARD_DEVICE_PATH                         *PcCard;
-  MEMMAP_DEVICE_PATH                         *MemMap;
-  VENDOR_DEVICE_PATH                         *Vendor;
-
-  CONTROLLER_DEVICE_PATH                     *Controller;
-  ACPI_HID_DEVICE_PATH                       *Acpi;
-  ACPI_EXTENDED_HID_DEVICE_PATH              *ExtendedAcpi;
-  ACPI_ADR_DEVICE_PATH                       *AcpiAdr;
-
-  ATAPI_DEVICE_PATH                          *Atapi;
-  SCSI_DEVICE_PATH                           *Scsi;
-  ISCSI_DEVICE_PATH                          *Iscsi;
-  FIBRECHANNEL_DEVICE_PATH                   *FibreChannel;
-  FIBRECHANNELEX_DEVICE_PATH                 *FibreChannelEx;
-
-  F1394_DEVICE_PATH                          *F1394;
-  USB_DEVICE_PATH                            *Usb;
-  SATA_DEVICE_PATH                           *Sata;
-  USB_CLASS_DEVICE_PATH                      *UsbClass;
-  USB_WWID_DEVICE_PATH                       *UsbWwid;
-  DEVICE_LOGICAL_UNIT_DEVICE_PATH            *LogicUnit;
-  I2O_DEVICE_PATH                            *I2O;
-  MAC_ADDR_DEVICE_PATH                       *MacAddr;
-  IPv4_DEVICE_PATH                           *Ipv4;
-  IPv6_DEVICE_PATH                           *Ipv6;
-  VLAN_DEVICE_PATH                           *Vlan;
-  INFINIBAND_DEVICE_PATH                     *InfiniBand;
-  UART_DEVICE_PATH                           *Uart;
-  UART_FLOW_CONTROL_DEVICE_PATH              *UartFlowControl;
-  SAS_DEVICE_PATH                            *Sas;
-  SASEX_DEVICE_PATH                          *SasEx;
-  HARDDRIVE_DEVICE_PATH                      *HardDrive;
-  CDROM_DEVICE_PATH                          *CD;
-
-  FILEPATH_DEVICE_PATH                       *FilePath;
-  MEDIA_PROTOCOL_DEVICE_PATH                 *MediaProtocol;
-
-  MEDIA_FW_VOL_DEVICE_PATH                   *FirmwareVolume;
-  MEDIA_FW_VOL_FILEPATH_DEVICE_PATH          *FirmwareFile;
-  MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH    *Offset;
+  EFI_DEVICE_PATH_PROTOCOL             *DevPath;
+  PCI_DEVICE_PATH                      *Pci;
+  PCCARD_DEVICE_PATH                   *PcCard;
+  MEMMAP_DEVICE_PATH                   *MemMap;
+  VENDOR_DEVICE_PATH                   *Vendor;
+
+  CONTROLLER_DEVICE_PATH               *Controller;
+  ACPI_HID_DEVICE_PATH                 *Acpi;
+  ACPI_EXTENDED_HID_DEVICE_PATH        *ExtendedAcpi;
+
+  ATAPI_DEVICE_PATH                    *Atapi;
+  SCSI_DEVICE_PATH                     *Scsi;
+  FIBRECHANNEL_DEVICE_PATH             *FibreChannel;
+
+  F1394_DEVICE_PATH                    *F1394;
+  USB_DEVICE_PATH                      *Usb;
+  SATA_DEVICE_PATH                     *Sata;
+  USB_CLASS_DEVICE_PATH                *UsbClass;
+  I2O_DEVICE_PATH                      *I2O;
+  MAC_ADDR_DEVICE_PATH                 *MacAddr;
+  IPv4_DEVICE_PATH                     *Ipv4;
+  IPv6_DEVICE_PATH                     *Ipv6;
+  INFINIBAND_DEVICE_PATH               *InfiniBand;
+  UART_DEVICE_PATH                     *Uart;
+
+  HARDDRIVE_DEVICE_PATH                *HardDrive;
+  CDROM_DEVICE_PATH                    *CD;
+
+  FILEPATH_DEVICE_PATH                 *FilePath;
+  MEDIA_PROTOCOL_DEVICE_PATH           *MediaProtocol;
+  MEDIA_RELATIVE_OFFSET_RANGE_DEVICE_PATH *Offset;
 
-  BBS_BBS_DEVICE_PATH                        *Bbs;
-  UINT8                                      *Raw;
+  BBS_BBS_DEVICE_PATH                  *Bbs;
+  UINT8                                *Raw;
 } EFI_DEV_PATH_PTR;
 
 #pragma pack()
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/DevicePathToText.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/DevicePathToText.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/DevicePathToText.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/DevicePathToText.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,87 +0,0 @@
-/** @file
-  EFI_DEVICE_PATH_TO_TEXT_PROTOCOL as defined in UEFI 2.0.
-  This protocol provides service to convert device nodes and paths to text.
-
-  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
-#define __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
-
-FILE_LICENCE ( BSD3 );
-
-///
-/// Device Path To Text protocol
-///
-#define EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID \
-  { \
-    0x8b843e20, 0x8132, 0x4852, {0x90, 0xcc, 0x55, 0x1a, 0x4e, 0x4a, 0x7f, 0x1c } \
-  }
-
-/**
-  Convert a device node to its text representation.
-
-  @param  DeviceNode     Points to the device node to be converted.
-  @param  DisplayOnly    If DisplayOnly is TRUE, then the shorter text representation
-                         of the display node is used, where applicable. If DisplayOnly
-                         is FALSE, then the longer text representation of the display node
-                         is used.
-  @param  AllowShortcuts If AllowShortcuts is TRUE, then the shortcut forms of text
-                         representation for a device node can be used, where applicable.
-
-  @retval a_pointer      a pointer to the allocated text representation of the device node data
-  @retval NULL           if DeviceNode is NULL or there was insufficient memory.
-
-**/
-typedef
-CHAR16*
-(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_NODE)(
-  IN CONST EFI_DEVICE_PATH_PROTOCOL   *DeviceNode,
-  IN BOOLEAN                          DisplayOnly,
-  IN BOOLEAN                          AllowShortcuts
-  );
-
-/**
-  Convert a device path to its text representation.
-
-  @param  DevicePath     Points to the device path to be converted.
-  @param  DisplayOnly    If DisplayOnly is TRUE, then the shorter text representation
-                         of the display node is used, where applicable. If DisplayOnly
-                         is FALSE, then the longer text representation of the display node
-                         is used.
-  @param  AllowShortcuts The AllowShortcuts is FALSE, then the shortcut forms of
-                         text representation for a device node cannot be used.
-
-  @retval a_pointer      a pointer to the allocated text representation of the device node.
-  @retval NULL           if DevicePath is NULL or there was insufficient memory.
-
-**/
-typedef
-CHAR16*
-(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_PATH)(
-  IN CONST EFI_DEVICE_PATH_PROTOCOL   *DevicePath,
-  IN BOOLEAN                          DisplayOnly,
-  IN BOOLEAN                          AllowShortcuts
-  );
-
-///
-/// This protocol converts device paths and device nodes to text.
-///
-typedef struct {
-  EFI_DEVICE_PATH_TO_TEXT_NODE        ConvertDeviceNodeToText;
-  EFI_DEVICE_PATH_TO_TEXT_PATH        ConvertDevicePathToText;
-} EFI_DEVICE_PATH_TO_TEXT_PROTOCOL;
-
-extern EFI_GUID gEfiDevicePathToTextProtocolGuid;
-
-#endif
-
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/FormBrowser2.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/FormBrowser2.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/FormBrowser2.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/FormBrowser2.h	2012-01-06 23:49:04.000000000 +0000
@@ -61,10 +61,6 @@
 #define EFI_BROWSER_ACTION_REQUEST_RESET  1
 #define EFI_BROWSER_ACTION_REQUEST_SUBMIT 2
 #define EFI_BROWSER_ACTION_REQUEST_EXIT   3
-#define EFI_BROWSER_ACTION_REQUEST_FORM_SUBMIT_EXIT  4
-#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD_EXIT 5
-#define EFI_BROWSER_ACTION_REQUEST_FORM_APPLY        6
-#define EFI_BROWSER_ACTION_REQUEST_FORM_DISCARD      7
 
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/HiiConfigAccess.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/HiiConfigAccess.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/HiiConfigAccess.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/HiiConfigAccess.h	2012-01-06 23:49:04.000000000 +0000
@@ -36,12 +36,6 @@
 #define EFI_BROWSER_ACTION_RETRIEVE   2
 #define EFI_BROWSER_ACTION_FORM_OPEN  3
 #define EFI_BROWSER_ACTION_FORM_CLOSE 4
-#define EFI_BROWSER_ACTION_DEFAULT_STANDARD      0x1000
-#define EFI_BROWSER_ACTION_DEFAULT_MANUFACTURING 0x1001
-#define EFI_BROWSER_ACTION_DEFAULT_SAFE          0x1002
-#define EFI_BROWSER_ACTION_DEFAULT_PLATFORM      0x2000
-#define EFI_BROWSER_ACTION_DEFAULT_HARDWARE      0x3000
-#define EFI_BROWSER_ACTION_DEFAULT_FIRMWARE      0x4000
 
 /**
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/LoadFile.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/LoadFile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/LoadFile.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/LoadFile.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,90 +0,0 @@
-/** @file
-  Load File protocol as defined in the UEFI 2.0 specification.
-
-  The load file protocol exists to supports the addition of new boot devices,
-  and to support booting from devices that do not map well to file system.
-  Network boot is done via a LoadFile protocol.
-
-  UEFI 2.0 can boot from any device that produces a LoadFile protocol.
-
-Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __EFI_LOAD_FILE_PROTOCOL_H__
-#define __EFI_LOAD_FILE_PROTOCOL_H__
-
-FILE_LICENCE ( BSD3 );
-
-#define EFI_LOAD_FILE_PROTOCOL_GUID \
-  { \
-    0x56EC3091, 0x954C, 0x11d2, {0x8E, 0x3F, 0x00, 0xA0, 0xC9, 0x69, 0x72, 0x3B } \
-  }
-
-///
-/// Protocol Guid defined by EFI1.1.
-///
-#define LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL_GUID
-
-typedef struct _EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL;
-
-///
-/// Backward-compatible with EFI1.1
-///
-typedef EFI_LOAD_FILE_PROTOCOL  EFI_LOAD_FILE_INTERFACE;
-
-/**
-  Causes the driver to load a specified file.
-
-  @param  This       Protocol instance pointer.
-  @param  FilePath   The device specific path of the file to load.
-  @param  BootPolicy If TRUE, indicates that the request originates from the
-                     boot manager is attempting to load FilePath as a boot
-                     selection. If FALSE, then FilePath must match as exact file
-                     to be loaded.
-  @param  BufferSize On input the size of Buffer in bytes. On output with a return
-                     code of EFI_SUCCESS, the amount of data transferred to
-                     Buffer. On output with a return code of EFI_BUFFER_TOO_SMALL,
-                     the size of Buffer required to retrieve the requested file.
-  @param  Buffer     The memory buffer to transfer the file to. IF Buffer is NULL,
-                     then the size of the requested file is returned in
-                     BufferSize.
-
-  @retval EFI_SUCCESS           The file was loaded.
-  @retval EFI_UNSUPPORTED       The device does not support the provided BootPolicy
-  @retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
-                                BufferSize is NULL.
-  @retval EFI_NO_MEDIA          No medium was present to load the file.
-  @retval EFI_DEVICE_ERROR      The file was not loaded due to a device error.
-  @retval EFI_NO_RESPONSE       The remote system did not respond.
-  @retval EFI_NOT_FOUND         The file was not found.
-  @retval EFI_ABORTED           The file load process was manually cancelled.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_LOAD_FILE)(
-  IN EFI_LOAD_FILE_PROTOCOL           *This,
-  IN EFI_DEVICE_PATH_PROTOCOL         *FilePath,
-  IN BOOLEAN                          BootPolicy,
-  IN OUT UINTN                        *BufferSize,
-  IN VOID                             *Buffer OPTIONAL
-  );
-
-///
-/// The EFI_LOAD_FILE_PROTOCOL is a simple protocol used to obtain files from arbitrary devices.
-///
-struct _EFI_LOAD_FILE_PROTOCOL {
-  EFI_LOAD_FILE LoadFile;
-};
-
-extern EFI_GUID gEfiLoadFileProtocolGuid;
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/NetworkInterfaceIdentifier.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   EFI Network Interface Identifier Protocol.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -87,29 +87,6 @@
   EfiNetworkInterfaceUndi = 1
 } EFI_NETWORK_INTERFACE_TYPE;
 
-///
-/// Forward reference for pure ANSI compatability.
-///
-typedef struct undiconfig_table  UNDI_CONFIG_TABLE;
-
-///
-/// The format of the configuration table for UNDI
-///
-struct undiconfig_table {
-  UINT32             NumberOfInterfaces;    ///< The number of NIC devices
-                                            ///< that this UNDI controls.
-  UINT32             reserved;
-  UNDI_CONFIG_TABLE  *nextlink;             ///< A pointer to the next UNDI
-                                            ///< configuration table.
-  ///
-  /// The length of this array is given in the NumberOfInterfaces field.
-  ///
-  struct {
-    VOID             *NII_InterfacePointer; ///< Pointer to the NII interface structure.
-    VOID             *DevicePathPointer;    ///< Pointer to the device path for this NIC.
-  } NII_entry[1];
-};
-
 extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid;
 extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid_31;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/PciRootBridgeIo.h	2012-01-06 23:49:04.000000000 +0000
@@ -5,7 +5,7 @@
   and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
   defferent types of bus mastering DMA.
 
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -21,8 +21,6 @@
 
 FILE_LICENCE ( BSD3 );
 
-#include <ipxe/efi/Library/BaseLib.h>
-
 #define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
   { \
     0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
@@ -110,11 +108,7 @@
 #define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
 
 #define EFI_PCI_ADDRESS(bus, dev, func, reg) \
-  (UINT64) ( \
-  (((UINTN) bus) << 24) | \
-  (((UINTN) dev) << 16) | \
-  (((UINTN) func) << 8) | \
-  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))
+    ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))
 
 typedef struct {
   UINT8   Register;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleFileSystem.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleFileSystem.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleFileSystem.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleFileSystem.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,403 +0,0 @@
-/** @file
-  SimpleFileSystem protocol as defined in the UEFI 2.0 specification.
-
-  The SimpleFileSystem protocol is the programmatic access to the FAT (12,16,32)
-  file system specified in UEFI 2.0. It can also be used to abstract a file
-  system other than FAT.
-
-  UEFI 2.0 can boot from any valid EFI image contained in a SimpleFileSystem.
-
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __SIMPLE_FILE_SYSTEM_H__
-#define __SIMPLE_FILE_SYSTEM_H__
-
-FILE_LICENCE ( BSD3 );
-
-#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \
-  { \
-    0x964e5b22, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
-  }
-
-typedef struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL  EFI_SIMPLE_FILE_SYSTEM_PROTOCOL;
-
-typedef struct _EFI_FILE_PROTOCOL         EFI_FILE_PROTOCOL;
-typedef struct _EFI_FILE_PROTOCOL         *EFI_FILE_HANDLE;
-
-///
-/// Protocol GUID name defined in EFI1.1.
-///
-#define SIMPLE_FILE_SYSTEM_PROTOCOL       EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID
-
-///
-/// Protocol name defined in EFI1.1.
-///
-typedef EFI_SIMPLE_FILE_SYSTEM_PROTOCOL   EFI_FILE_IO_INTERFACE;
-typedef EFI_FILE_PROTOCOL                 EFI_FILE;
-
-/**
-  Open the root directory on a volume.
-
-  @param  This A pointer to the volume to open the root directory.
-  @param  Root A pointer to the location to return the opened file handle for the
-               root directory.
-
-  @retval EFI_SUCCESS          The device was opened.
-  @retval EFI_UNSUPPORTED      This volume does not support the requested file system type.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_ACCESS_DENIED    The service denied access to the file.
-  @retval EFI_OUT_OF_RESOURCES The volume was not opened due to lack of resources.
-  @retval EFI_MEDIA_CHANGED    The device has a different medium in it or the medium is no
-                               longer supported. Any existing file handles for this volume are
-                               no longer valid. To access the files on the new medium, the
-                               volume must be reopened with OpenVolume().
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME)(
-  IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL    *This,
-  OUT EFI_FILE_PROTOCOL                 **Root
-  );
-
-#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION  0x00010000
-
-///
-/// Revision defined in EFI1.1
-///
-#define EFI_FILE_IO_INTERFACE_REVISION  EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION
-
-struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL {
-  ///
-  /// The version of the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. The version
-  /// specified by this specification is 0x00010000. All future revisions
-  /// must be backwards compatible.
-  ///
-  UINT64                                      Revision;
-  EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME OpenVolume;
-};
-
-/**
-  Opens a new file relative to the source file's location.
-
-  @param  This       A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                     handle to the source location. This would typically be an open
-                     handle to a directory.
-  @param  NewHandle  A pointer to the location to return the opened handle for the new
-                     file.
-  @param  FileName   The Null-terminated string of the name of the file to be opened.
-                     The file name may contain the following path modifiers: "\", ".",
-                     and "..".
-  @param  OpenMode   The mode to open the file. The only valid combinations that the
-                     file may be opened with are: Read, Read/Write, or Create/Read/Write.
-  @param  Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these are the
-                     attribute bits for the newly created file.
-
-  @retval EFI_SUCCESS          The file was opened.
-  @retval EFI_NOT_FOUND        The specified file could not be found on the device.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_MEDIA_CHANGED    The device has a different medium in it or the medium is no
-                               longer supported.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_WRITE_PROTECTED  An attempt was made to create a file, or open a file for write
-                               when the media is write-protected.
-  @retval EFI_ACCESS_DENIED    The service denied access to the file.
-  @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file.
-  @retval EFI_VOLUME_FULL      The volume is full.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_OPEN)(
-  IN EFI_FILE_PROTOCOL        *This,
-  OUT EFI_FILE_PROTOCOL       **NewHandle,
-  IN CHAR16                   *FileName,
-  IN UINT64                   OpenMode,
-  IN UINT64                   Attributes
-  );
-
-//
-// Open modes
-//
-#define EFI_FILE_MODE_READ    0x0000000000000001ULL
-#define EFI_FILE_MODE_WRITE   0x0000000000000002ULL
-#define EFI_FILE_MODE_CREATE  0x8000000000000000ULL
-
-//
-// File attributes
-//
-#define EFI_FILE_READ_ONLY  0x0000000000000001ULL
-#define EFI_FILE_HIDDEN     0x0000000000000002ULL
-#define EFI_FILE_SYSTEM     0x0000000000000004ULL
-#define EFI_FILE_RESERVED   0x0000000000000008ULL
-#define EFI_FILE_DIRECTORY  0x0000000000000010ULL
-#define EFI_FILE_ARCHIVE    0x0000000000000020ULL
-#define EFI_FILE_VALID_ATTR 0x0000000000000037ULL
-
-/**
-  Closes a specified file handle.
-
-  @param  This          A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                        handle to close.
-
-  @retval EFI_SUCCESS   The file was closed.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_CLOSE)(
-  IN EFI_FILE_PROTOCOL  *This
-  );
-
-/**
-  Close and delete the file handle.
-
-  @param  This                     A pointer to the EFI_FILE_PROTOCOL instance that is the
-                                   handle to the file to delete.
-
-  @retval EFI_SUCCESS              The file was closed and deleted, and the handle was closed.
-  @retval EFI_WARN_DELETE_FAILURE  The handle was closed, but the file was not deleted.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_DELETE)(
-  IN EFI_FILE_PROTOCOL  *This
-  );
-
-/**
-  Reads data from a file.
-
-  @param  This       A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                     handle to read data from.
-  @param  BufferSize On input, the size of the Buffer. On output, the amount of data
-                     returned in Buffer. In both cases, the size is measured in bytes.
-  @param  Buffer     The buffer into which the data is read.
-
-  @retval EFI_SUCCESS          Data was read.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_DEVICE_ERROR     An attempt was made to read from a deleted file.
-  @retval EFI_DEVICE_ERROR     On entry, the current file position is beyond the end of the file.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_BUFFER_TO_SMALL  The BufferSize is too small to read the current directory
-                               entry. BufferSize has been updated with the size
-                               needed to complete the request.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_READ)(
-  IN EFI_FILE_PROTOCOL        *This,
-  IN OUT UINTN                *BufferSize,
-  OUT VOID                    *Buffer
-  );
-
-/**
-  Writes data to a file.
-
-  @param  This       A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                     handle to write data to.
-  @param  BufferSize On input, the size of the Buffer. On output, the amount of data
-                     actually written. In both cases, the size is measured in bytes.
-  @param  Buffer     The buffer of data to write.
-
-  @retval EFI_SUCCESS          Data was written.
-  @retval EFI_UNSUPPORTED      Writes to open directory files are not supported.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_DEVICE_ERROR     An attempt was made to write to a deleted file.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_WRITE_PROTECTED  The file or medium is write-protected.
-  @retval EFI_ACCESS_DENIED    The file was opened read only.
-  @retval EFI_VOLUME_FULL      The volume is full.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_WRITE)(
-  IN EFI_FILE_PROTOCOL        *This,
-  IN OUT UINTN                *BufferSize,
-  IN VOID                     *Buffer
-  );
-
-/**
-  Sets a file's current position.
-
-  @param  This            A pointer to the EFI_FILE_PROTOCOL instance that is the
-                          file handle to set the requested position on.
-  @param  Position        The byte position from the start of the file to set.
-
-  @retval EFI_SUCCESS      The position was set.
-  @retval EFI_UNSUPPORTED  The seek request for nonzero is not valid on open
-                           directories.
-  @retval EFI_DEVICE_ERROR An attempt was made to set the position of a deleted file.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_SET_POSITION)(
-  IN EFI_FILE_PROTOCOL        *This,
-  IN UINT64                   Position
-  );
-
-/**
-  Returns a file's current position.
-
-  @param  This            A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                          handle to get the current position on.
-  @param  Position        The address to return the file's current position value.
-
-  @retval EFI_SUCCESS      The position was returned.
-  @retval EFI_UNSUPPORTED  The request is not valid on open directories.
-  @retval EFI_DEVICE_ERROR An attempt was made to get the position from a deleted file.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_GET_POSITION)(
-  IN EFI_FILE_PROTOCOL        *This,
-  OUT UINT64                  *Position
-  );
-
-/**
-  Returns information about a file.
-
-  @param  This            A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                          handle the requested information is for.
-  @param  InformationType The type identifier for the information being requested.
-  @param  BufferSize      On input, the size of Buffer. On output, the amount of data
-                          returned in Buffer. In both cases, the size is measured in bytes.
-  @param  Buffer          A pointer to the data buffer to return. The buffer's type is
-                          indicated by InformationType.
-
-  @retval EFI_SUCCESS          The information was returned.
-  @retval EFI_UNSUPPORTED      The InformationType is not known.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to read the current directory entry.
-                               BufferSize has been updated with the size needed to complete
-                               the request.
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_GET_INFO)(
-  IN EFI_FILE_PROTOCOL        *This,
-  IN EFI_GUID                 *InformationType,
-  IN OUT UINTN                *BufferSize,
-  OUT VOID                    *Buffer
-  );
-
-/**
-  Sets information about a file.
-
-  @param  File            A pointer to the EFI_FILE_PROTOCOL instance that is the file
-                          handle the information is for.
-  @param  InformationType The type identifier for the information being set.
-  @param  BufferSize      The size, in bytes, of Buffer.
-  @param  Buffer          A pointer to the data buffer to write. The buffer's type is
-                          indicated by InformationType.
-
-  @retval EFI_SUCCESS          The information was set.
-  @retval EFI_UNSUPPORTED      The InformationType is not known.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_WRITE_PROTECTED  InformationType is EFI_FILE_INFO_ID and the media is
-                               read-only.
-  @retval EFI_WRITE_PROTECTED  InformationType is EFI_FILE_PROTOCOL_SYSTEM_INFO_ID
-                               and the media is read only.
-  @retval EFI_WRITE_PROTECTED  InformationType is EFI_FILE_SYSTEM_VOLUME_LABEL_ID
-                               and the media is read-only.
-  @retval EFI_ACCESS_DENIED    An attempt is made to change the name of a file to a
-                               file that is already present.
-  @retval EFI_ACCESS_DENIED    An attempt is being made to change the EFI_FILE_DIRECTORY
-                               Attribute.
-  @retval EFI_ACCESS_DENIED    An attempt is being made to change the size of a directory.
-  @retval EFI_ACCESS_DENIED    InformationType is EFI_FILE_INFO_ID and the file was opened
-                               read-only and an attempt is being made to modify a field
-                               other than Attribute.
-  @retval EFI_VOLUME_FULL      The volume is full.
-  @retval EFI_BAD_BUFFER_SIZE  BufferSize is smaller than the size of the type indicated
-                               by InformationType.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_SET_INFO)(
-  IN EFI_FILE_PROTOCOL        *This,
-  IN EFI_GUID                 *InformationType,
-  IN UINTN                    BufferSize,
-  IN VOID                     *Buffer
-  );
-
-/**
-  Flushes all modified data associated with a file to a device.
-
-  @param  This A pointer to the EFI_FILE_PROTOCOL instance that is the file
-               handle to flush.
-
-  @retval EFI_SUCCESS          The data was flushed.
-  @retval EFI_NO_MEDIA         The device has no medium.
-  @retval EFI_DEVICE_ERROR     The device reported an error.
-  @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted.
-  @retval EFI_WRITE_PROTECTED  The file or medium is write-protected.
-  @retval EFI_ACCESS_DENIED    The file was opened read-only.
-  @retval EFI_VOLUME_FULL      The volume is full.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_FILE_FLUSH)(
-  IN EFI_FILE_PROTOCOL  *This
-  );
-
-#define EFI_FILE_PROTOCOL_REVISION   0x00010000
-//
-// Revision defined in EFI1.1.
-//
-#define EFI_FILE_REVISION   EFI_FILE_PROTOCOL_REVISION
-
-///
-/// The EFI_FILE_PROTOCOL provides file IO access to supported file systems.
-/// An EFI_FILE_PROTOCOL provides access to a file's or directory's contents,
-/// and is also a reference to a location in the directory tree of the file system
-/// in which the file resides. With any given file handle, other files may be opened
-/// relative to this file's location, yielding new file handles.
-///
-struct _EFI_FILE_PROTOCOL {
-  ///
-  /// The version of the EFI_FILE_PROTOCOL interface. The version specified
-  /// by this specification is 0x00010000. Future versions are required
-  /// to be backward compatible to version 1.0.
-  ///
-  UINT64                Revision;
-  EFI_FILE_OPEN         Open;
-  EFI_FILE_CLOSE        Close;
-  EFI_FILE_DELETE       Delete;
-  EFI_FILE_READ         Read;
-  EFI_FILE_WRITE        Write;
-  EFI_FILE_GET_POSITION GetPosition;
-  EFI_FILE_SET_POSITION SetPosition;
-  EFI_FILE_GET_INFO     GetInfo;
-  EFI_FILE_SET_INFO     SetInfo;
-  EFI_FILE_FLUSH        Flush;
-};
-
-
-extern EFI_GUID gEfiSimpleFileSystemProtocolGuid;
-
-#endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleTextInEx.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleTextInEx.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleTextInEx.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleTextInEx.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,327 +0,0 @@
-/** @file
-  Simple Text Input Ex protocol from the UEFI 2.0 specification.
-
-  This protocol defines an extension to the EFI_SIMPLE_TEXT_INPUT_PROTOCOL
-  which exposes much more state and modifier information from the input device,
-  also allows one to register a notification for a particular keystroke.
-
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
-  This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __SIMPLE_TEXT_IN_EX_H__
-#define __SIMPLE_TEXT_IN_EX_H__
-
-FILE_LICENCE ( BSD3 );
-
-#include <ipxe/efi/Protocol/SimpleTextIn.h>
-
-#define EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL_GUID \
-  {0xdd9e7534, 0x7762, 0x4698, { 0x8c, 0x14, 0xf5, 0x85, 0x17, 0xa6, 0x25, 0xaa } }
-
-
-typedef struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL;
-
-/**
-  The Reset() function resets the input device hardware. As part
-  of initialization process, the firmware/device will make a quick
-  but reasonable attempt to verify that the device is functioning.
-  If the ExtendedVerification flag is TRUE the firmware may take
-  an extended amount of time to verify the device is operating on
-  reset. Otherwise the reset operation is to occur as quickly as
-  possible. The hardware verification process is not defined by
-  this specification and is left up to the platform firmware or
-  driver to implement.
-
-  @param This                 A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance.
-
-  @param ExtendedVerification Indicates that the driver may
-                              perform a more exhaustive
-                              verification operation of the
-                              device during reset.
-
-
-  @retval EFI_SUCCESS       The device was reset.
-
-  @retval EFI_DEVICE_ERROR  The device is not functioning
-                            correctly and could not be reset.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_INPUT_RESET_EX)(
-  IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
-  IN BOOLEAN                           ExtendedVerification
-);
-
-
-///
-/// EFI_KEY_TOGGLE_STATE. The toggle states are defined.
-/// They are: EFI_TOGGLE_STATE_VALID, EFI_SCROLL_LOCK_ACTIVE
-/// EFI_NUM_LOCK_ACTIVE, EFI_CAPS_LOCK_ACTIVE
-///
-typedef UINT8 EFI_KEY_TOGGLE_STATE;
-
-typedef struct _EFI_KEY_STATE {
-  ///
-  /// Reflects the currently pressed shift
-  /// modifiers for the input device. The
-  /// returned value is valid only if the high
-  /// order bit has been set.
-  ///
-  UINT32                KeyShiftState;
-  ///
-  /// Reflects the current internal state of
-  /// various toggled attributes. The returned
-  /// value is valid only if the high order
-  /// bit has been set.
-  ///
-  EFI_KEY_TOGGLE_STATE  KeyToggleState;
-} EFI_KEY_STATE;
-
-typedef struct {
-  ///
-  /// The EFI scan code and Unicode value returned from the input device.
-  ///
-  EFI_INPUT_KEY   Key;
-  ///
-  /// The current state of various toggled attributes as well as input modifier values.
-  ///
-  EFI_KEY_STATE   KeyState;
-} EFI_KEY_DATA;
-
-//
-// Any Shift or Toggle State that is valid should have
-// high order bit set.
-//
-// Shift state
-//
-#define EFI_SHIFT_STATE_VALID     0x80000000
-#define EFI_RIGHT_SHIFT_PRESSED   0x00000001
-#define EFI_LEFT_SHIFT_PRESSED    0x00000002
-#define EFI_RIGHT_CONTROL_PRESSED 0x00000004
-#define EFI_LEFT_CONTROL_PRESSED  0x00000008
-#define EFI_RIGHT_ALT_PRESSED     0x00000010
-#define EFI_LEFT_ALT_PRESSED      0x00000020
-#define EFI_RIGHT_LOGO_PRESSED    0x00000040
-#define EFI_LEFT_LOGO_PRESSED     0x00000080
-#define EFI_MENU_KEY_PRESSED      0x00000100
-#define EFI_SYS_REQ_PRESSED       0x00000200
-
-//
-// Toggle state
-//
-#define EFI_TOGGLE_STATE_VALID    0x80
-#define EFI_KEY_STATE_EXPOSED     0x40
-#define EFI_SCROLL_LOCK_ACTIVE    0x01
-#define EFI_NUM_LOCK_ACTIVE       0x02
-#define EFI_CAPS_LOCK_ACTIVE      0x04
-
-//
-// EFI Scan codes
-//
-#define SCAN_F11                  0x0015
-#define SCAN_F12                  0x0016
-#define SCAN_PAUSE                0x0048
-#define SCAN_F13                  0x0068
-#define SCAN_F14                  0x0069
-#define SCAN_F15                  0x006A
-#define SCAN_F16                  0x006B
-#define SCAN_F17                  0x006C
-#define SCAN_F18                  0x006D
-#define SCAN_F19                  0x006E
-#define SCAN_F20                  0x006F
-#define SCAN_F21                  0x0070
-#define SCAN_F22                  0x0071
-#define SCAN_F23                  0x0072
-#define SCAN_F24                  0x0073
-#define SCAN_MUTE                 0x007F
-#define SCAN_VOLUME_UP            0x0080
-#define SCAN_VOLUME_DOWN          0x0081
-#define SCAN_BRIGHTNESS_UP        0x0100
-#define SCAN_BRIGHTNESS_DOWN      0x0101
-#define SCAN_SUSPEND              0x0102
-#define SCAN_HIBERNATE            0x0103
-#define SCAN_TOGGLE_DISPLAY       0x0104
-#define SCAN_RECOVERY             0x0105
-#define SCAN_EJECT                0x0106
-
-/**
-  The function reads the next keystroke from the input device. If
-  there is no pending keystroke the function returns
-  EFI_NOT_READY. If there is a pending keystroke, then
-  KeyData.Key.ScanCode is the EFI scan code defined in Error!
-  Reference source not found. The KeyData.Key.UnicodeChar is the
-  actual printable character or is zero if the key does not
-  represent a printable character (control key, function key,
-  etc.). The KeyData.KeyState is shift state for the character
-  reflected in KeyData.Key.UnicodeChar or KeyData.Key.ScanCode .
-  When interpreting the data from this function, it should be
-  noted that if a class of printable characters that are
-  normally adjusted by shift modifiers (e.g. Shift Key + "f"
-  key) would be presented solely as a KeyData.Key.UnicodeChar
-  without the associated shift state. So in the previous example
-  of a Shift Key + "f" key being pressed, the only pertinent
-  data returned would be KeyData.Key.UnicodeChar with the value
-  of "F". This of course would not typically be the case for
-  non-printable characters such as the pressing of the Right
-  Shift Key + F10 key since the corresponding returned data
-  would be reflected both in the KeyData.KeyState.KeyShiftState
-  and KeyData.Key.ScanCode values. UEFI drivers which implement
-  the EFI_SIMPLE_TEXT_INPUT_EX protocol are required to return
-  KeyData.Key and KeyData.KeyState values. These drivers must
-  always return the most current state of
-  KeyData.KeyState.KeyShiftState and
-  KeyData.KeyState.KeyToggleState. It should also be noted that
-  certain input devices may not be able to produce shift or toggle
-  state information, and in those cases the high order bit in the
-  respective Toggle and Shift state fields should not be active.
-
-
-  @param This     A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance.
-
-  @param KeyData  A pointer to a buffer that is filled in with
-                  the keystroke state data for the key that was
-                  pressed.
-
-
-  @retval EFI_SUCCESS     The keystroke information was
-                          returned.
-
-  @retval EFI_NOT_READY   There was no keystroke data available.
-                          EFI_DEVICE_ERROR The keystroke
-                          information was not returned due to
-                          hardware errors.
-
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_INPUT_READ_KEY_EX)(
-  IN  EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
-  OUT EFI_KEY_DATA                      *KeyData
-);
-
-/**
-  The SetState() function allows the input device hardware to
-  have state settings adjusted.
-
-  @param This           A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance.
-
-  @param KeyToggleState Pointer to the EFI_KEY_TOGGLE_STATE to
-                        set the state for the input device.
-
-
-  @retval EFI_SUCCESS       The device state was set appropriately.
-
-  @retval EFI_DEVICE_ERROR  The device is not functioning
-                            correctly and could not have the
-                            setting adjusted.
-
-  @retval EFI_UNSUPPORTED   The device does not support the
-                            ability to have its state set.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_SET_STATE)(
-  IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
-  IN EFI_KEY_TOGGLE_STATE              *KeyToggleState
-);
-
-///
-/// The function will be called when the key sequence is typed specified by KeyData.
-///
-typedef
-EFI_STATUS
-(EFIAPI *EFI_KEY_NOTIFY_FUNCTION)(
-  IN EFI_KEY_DATA *KeyData
-);
-
-/**
-  The RegisterKeystrokeNotify() function registers a function
-  which will be called when a specified keystroke will occur.
-
-  @param This                     A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance.
-
-  @param KeyData                  A pointer to a buffer that is filled in with
-                                  the keystroke information for the key that was
-                                  pressed.
-
-  @param KeyNotificationFunction  Points to the function to be
-                                  called when the key sequence
-                                  is typed specified by KeyData.
-
-
-  @param NotifyHandle             Points to the unique handle assigned to
-                                  the registered notification.
-
-  @retval EFI_SUCCESS           The device state was set
-                                appropriately.
-
-  @retval EFI_OUT_OF_RESOURCES  Unable to allocate necessary
-                                data structures.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_REGISTER_KEYSTROKE_NOTIFY)(
-  IN  EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL *This,
-  IN  EFI_KEY_DATA                      *KeyData,
-  IN  EFI_KEY_NOTIFY_FUNCTION           KeyNotificationFunction,
-  OUT VOID                              **NotifyHandle
-);
-
-/**
-  The UnregisterKeystrokeNotify() function removes the
-  notification which was previously registered.
-
-  @param This               A pointer to the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL instance.
-
-  @param NotificationHandle The handle of the notification
-                            function being unregistered.
-
-  @retval EFI_SUCCESS The device state was set appropriately.
-
-  @retval EFI_INVALID_PARAMETER The NotificationHandle is
-                                invalid.
-
-**/
-typedef
-EFI_STATUS
-(EFIAPI *EFI_UNREGISTER_KEYSTROKE_NOTIFY)(
-  IN EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL  *This,
-  IN VOID                               *NotificationHandle
-);
-
-
-///
-/// The EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL is used on the ConsoleIn
-/// device. It is an extension to the Simple Text Input protocol
-/// which allows a variety of extended shift state information to be
-/// returned.
-///
-struct _EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL{
-  EFI_INPUT_RESET_EX              Reset;
-  EFI_INPUT_READ_KEY_EX           ReadKeyStrokeEx;
-  ///
-  /// Event to use with WaitForEvent() to wait for a key to be available.
-  ///
-  EFI_EVENT                       WaitForKeyEx;
-  EFI_SET_STATE                   SetState;
-  EFI_REGISTER_KEYSTROKE_NOTIFY   RegisterKeyNotify;
-  EFI_UNREGISTER_KEYSTROKE_NOTIFY UnregisterKeyNotify;
-};
-
-
-extern EFI_GUID gEfiSimpleTextInputExProtocolGuid;
-
-#endif
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleTextIn.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleTextIn.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Protocol/SimpleTextIn.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Protocol/SimpleTextIn.h	2012-01-06 23:49:04.000000000 +0000
@@ -4,7 +4,7 @@
   Abstraction of a very simple input device like a keyboard or serial
   terminal.
 
-  Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -78,6 +78,8 @@
 #define SCAN_F8         0x0012
 #define SCAN_F9         0x0013
 #define SCAN_F10        0x0014
+#define SCAN_F11        0x0015
+#define SCAN_F12        0x0016
 #define SCAN_ESC        0x0017
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiBaseType.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiBaseType.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiBaseType.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiBaseType.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   Defines data types and constants introduced in UEFI.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -150,13 +150,11 @@
 #define EFI_END_OF_MEDIA          RETURN_END_OF_MEDIA
 #define EFI_END_OF_FILE           RETURN_END_OF_FILE
 #define EFI_INVALID_LANGUAGE      RETURN_INVALID_LANGUAGE
-#define EFI_COMPROMISED_DATA      RETURN_COMPROMISED_DATA
 
 #define EFI_WARN_UNKNOWN_GLYPH    RETURN_WARN_UNKNOWN_GLYPH
 #define EFI_WARN_DELETE_FAILURE   RETURN_WARN_DELETE_FAILURE
 #define EFI_WARN_WRITE_FAILURE    RETURN_WARN_WRITE_FAILURE
 #define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL
-#define EFI_WARN_STALE_DATA       RETURN_WARN_STALE_DATA
 ///@}
 
 ///
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiGpt.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiGpt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiGpt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiGpt.h	2012-01-06 23:49:04.000000000 +0000
@@ -71,8 +71,7 @@
   ///
   /// The size, in bytes, of each the GUID Partition
   /// Entry structures in the GUID Partition Entry
-  /// array. This field shall be set to a value of 128 x 2^n where n is
-  /// an integer greater than or equal to zero (e.g., 128, 256, 512, etc.).
+  /// array. Must be a multiple of 8.
   ///
   UINT32            SizeOfPartitionEntry;
   ///
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiInternalFormRepresentation.h	2012-01-06 23:49:04.000000000 +0000
@@ -3,7 +3,7 @@
   IFR is primarily consumed by the EFI presentation engine, and produced by EFI
   internal application and drivers as well as all add-in card option-ROM drivers
 
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -660,13 +660,6 @@
   UINT8  Day;
 } EFI_HII_DATE;
 
-typedef struct {
-  EFI_QUESTION_ID QuestionId;
-  EFI_FORM_ID     FormId;
-  EFI_GUID        FormSetGuid;
-  EFI_STRING_ID   DevicePath;
-} EFI_HII_REF;
-
 typedef union {
   UINT8           u8;
   UINT16          u16;
@@ -676,8 +669,7 @@
   EFI_HII_TIME    time;
   EFI_HII_DATE    date;
   EFI_STRING_ID   string; ///< EFI_IFR_TYPE_STRING, EFI_IFR_TYPE_ACTION
-  EFI_HII_REF     ref;    ///< EFI_IFR_TYPE_REF
-  // UINT8 buffer[];      ///< EFI_IFR_TYPE_BUFFER
+  // UINT8 buffer[];      ///< EFI_IFR_TYPE_ORDERED_LIST
 } EFI_IFR_TYPE_VALUE;
 
 //
@@ -702,7 +694,7 @@
 #define EFI_IFR_INCONSISTENT_IF_OP     0x11
 #define EFI_IFR_EQ_ID_VAL_OP           0x12
 #define EFI_IFR_EQ_ID_ID_OP            0x13
-#define EFI_IFR_EQ_ID_VAL_LIST_OP      0x14
+#define EFI_IFR_EQ_ID_LIST_OP          0x14
 #define EFI_IFR_AND_OP                 0x15
 #define EFI_IFR_OR_OP                  0x16
 #define EFI_IFR_NOT_OP                 0x17
@@ -779,8 +771,6 @@
 #define EFI_IFR_CATENATE_OP            0x5E
 #define EFI_IFR_GUID_OP                0x5F
 #define EFI_IFR_SECURITY_OP            0x60
-#define EFI_IFR_MODAL_TAG_OP           0x61
-#define EFI_IFR_REFRESH_ID_OP          0x62
 
 //
 // Definitions of IFR Standard Headers
@@ -853,8 +843,6 @@
   EFI_VARSTORE_ID          VarStoreId;
   EFI_GUID                 Guid;
   UINT32                   Attributes;
-  UINT16                   Size;
-  UINT8                    Name[1];
 } EFI_IFR_VARSTORE_EFI;
 
 typedef struct _EFI_IFR_VARSTORE_NAME_VALUE {
@@ -887,10 +875,6 @@
   EFI_IMAGE_ID             Id;
 } EFI_IFR_IMAGE;
 
-typedef struct _EFI_IFR_MODAL_TAG {
-  EFI_IFR_OP_HEADER        Header;
-} EFI_IFR_MODAL_TAG;
-
 typedef struct _EFI_IFR_LOCKED {
   EFI_IFR_OP_HEADER        Header;
 } EFI_IFR_LOCKED;
@@ -907,12 +891,6 @@
   EFI_IFR_TYPE_VALUE       Value;
 } EFI_IFR_DEFAULT;
 
-typedef struct _EFI_IFR_DEFAULT_2 {
-  EFI_IFR_OP_HEADER        Header;
-  UINT16                   DefaultId;
-  UINT8                    Type;
-} EFI_IFR_DEFAULT_2;
-
 typedef struct _EFI_IFR_VALUE {
   EFI_IFR_OP_HEADER        Header;
 } EFI_IFR_VALUE;
@@ -970,11 +948,6 @@
   EFI_STRING_ID            DevicePath;
 } EFI_IFR_REF4;
 
-typedef struct _EFI_IFR_REF5 {
-  EFI_IFR_OP_HEADER Header;
-  EFI_IFR_QUESTION_HEADER Question;
-} EFI_IFR_REF5;
-
 typedef struct _EFI_IFR_RESET_BUTTON {
   EFI_IFR_OP_HEADER        Header;
   EFI_IFR_STATEMENT_HEADER Statement;
@@ -1161,7 +1134,6 @@
 #define EFI_IFR_TYPE_UNDEFINED         0x09
 #define EFI_IFR_TYPE_ACTION            0x0A
 #define EFI_IFR_TYPE_BUFFER            0x0B
-#define EFI_IFR_TYPE_REF               0x0C
 
 #define EFI_IFR_OPTION_DEFAULT         0x10
 #define EFI_IFR_OPTION_DEFAULT_MFG     0x20
@@ -1172,11 +1144,6 @@
   //Optional Data Follows
 } EFI_IFR_GUID;
 
-typedef struct _EFI_IFR_REFRESH_ID {
-  EFI_IFR_OP_HEADER Header;
-  EFI_GUID          RefreshEventGroupId;
-} EFI_IFR_REFRESH_ID;
-
 typedef struct _EFI_IFR_DUP {
   EFI_IFR_OP_HEADER        Header;
 } EFI_IFR_DUP;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiMultiPhase.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiMultiPhase.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiMultiPhase.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiMultiPhase.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   This includes some definitions introduced in UEFI that will be used in both PEI and DXE phases.
 
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -122,26 +122,21 @@
 ///
 /// Attributes of variable.
 ///
-#define EFI_VARIABLE_NON_VOLATILE                            0x00000001
-#define EFI_VARIABLE_BOOTSERVICE_ACCESS                      0x00000002
-#define EFI_VARIABLE_RUNTIME_ACCESS                          0x00000004
+#define EFI_VARIABLE_NON_VOLATILE                 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS           0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS               0x00000004
+#define EFI_VARIABLE_HARDWARE_ERROR_RECORD        0x00000008
+
 ///
 /// This attribute is identified by the mnemonic 'HR'
 /// elsewhere in this specification.
 ///
-#define EFI_VARIABLE_HARDWARE_ERROR_RECORD                   0x00000008
-///
-/// Attributes of Authenticated Variable
-///
-#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS              0x00000010
-#define EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS   0x00000020
-#define EFI_VARIABLE_APPEND_WRITE                            0x00000040
-
+#define EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS   0x00000010
 
 ///
 /// AuthInfo is a WIN_CERTIFICATE using the wCertificateType
 /// WIN_CERTIFICATE_UEFI_GUID and the CertType
-/// EFI_CERT_TYPE_RSA2048_SHA256_GUID. If the attribute specifies
+/// EFI_CERT_TYPE_RSA2048_SHA256. If the attribute specifies
 /// authenticated access, then the Data buffer should begin with an
 /// authentication descriptor prior to the data payload and DataSize
 /// should reflect the the data.and descriptor size. The caller
@@ -172,24 +167,5 @@
   WIN_CERTIFICATE_UEFI_GUID   AuthInfo;
 } EFI_VARIABLE_AUTHENTICATION;
 
-///
-/// When the attribute EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS is
-/// set, then the Data buffer shall begin with an instance of a complete (and serialized)
-/// EFI_VARIABLE_AUTHENTICATION_2 descriptor. The descriptor shall be followed by the new
-/// variable value and DataSize shall reflect the combined size of the descriptor and the new
-/// variable value. The authentication descriptor is not part of the variable data and is not
-/// returned by subsequent calls to GetVariable().
-///
-typedef struct {
-  ///
-  /// For the TimeStamp value, components Pad1, Nanosecond, TimeZone, Daylight and
-  /// Pad2 shall be set to 0. This means that the time shall always be expressed in GMT.
-  ///
-  EFI_TIME                    TimeStamp;
-  ///
-  /// Only a CertType of  EFI_CERT_TYPE_PKCS7_GUID is accepted.
-  ///
-  WIN_CERTIFICATE_UEFI_GUID   AuthInfo;
- } EFI_VARIABLE_AUTHENTICATION_2;
-
 #endif
+
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiSpec.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiSpec.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/Uefi/UefiSpec.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/Uefi/UefiSpec.h	2012-01-06 23:49:04.000000000 +0000
@@ -5,7 +5,7 @@
   If a code construct is defined in the UEFI 2.3 specification it must be included
   by this include file.
 
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
 This program and the accompanying materials are licensed and made available under
 the terms and conditions of the BSD License that accompanies this distribution.
 The full text of the license may be found at
@@ -25,7 +25,6 @@
 
 #include <ipxe/efi/Protocol/DevicePath.h>
 #include <ipxe/efi/Protocol/SimpleTextIn.h>
-#include <ipxe/efi/Protocol/SimpleTextInEx.h>
 #include <ipxe/efi/Protocol/SimpleTextOut.h>
 
 ///
@@ -129,7 +128,6 @@
   @retval EFI_INVALID_PARAMETER 1) Type is not AllocateAnyPages or
                                 AllocateMaxAddress or AllocateAddress.
                                 2) MemoryType is in the range
-                                3) Memory is NULL.
                                 EfiMaxMemoryType..0x7FFFFFFF.
   @retval EFI_OUT_OF_RESOURCES  The pages could not be allocated.
   @retval EFI_NOT_FOUND         The requested pages could not be found.
@@ -208,7 +206,7 @@
 
   @retval EFI_SUCCESS           The requested number of bytes was allocated.
   @retval EFI_OUT_OF_RESOURCES  The pool requested could not be allocated.
-  @retval EFI_INVALID_PARAMETER PoolType was invalid or Buffer is NULL.
+  @retval EFI_INVALID_PARAMETER PoolType was invalid.
 
 **/
 typedef
@@ -279,13 +277,11 @@
                                 2) No drivers were connected to ControllerHandle, but
                                 RemainingDevicePath is not NULL, and it is an End Device
                                 Path Node.
-  @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.
+  @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
   @retval EFI_NOT_FOUND         1) There are no EFI_DRIVER_BINDING_PROTOCOL instances
                                 present in the system.
                                 2) No drivers were connected to ControllerHandle.
-  @retval EFI_SECURITY_VIOLATION
-                                The user has no permission to start UEFI device drivers on the device path
-                                associated with the ControllerHandle or specified by the RemainingDevicePath.
+
 **/
 typedef
 EFI_STATUS
@@ -311,7 +307,7 @@
                                 2) On entry, no drivers are managing ControllerHandle.
                                 3) DriverImageHandle is not NULL, and on entry
                                    DriverImageHandle is not managing ControllerHandle.
-  @retval EFI_INVALID_PARAMETER 1) ControllerHandle is NULL.
+  @retval EFI_INVALID_PARAMETER 1) ControllerHandle is not a valid EFI_HANDLE.
                                 2) DriverImageHandle is not NULL, and it is not a valid EFI_HANDLE.
                                 3) ChildHandle is not NULL, and it is not a valid EFI_HANDLE.
                                 4) DriverImageHandle does not support the EFI_DRIVER_BINDING_PROTOCOL.
@@ -852,9 +848,8 @@
   @param  ExitData              The pointer to a pointer to a data buffer that includes a Null-terminated
                                 string, optionally followed by additional binary data.
 
-  @retval EFI_INVALID_PARAMETER  ImageHandle is either an invalid image handle or the image
-                                 has already been initialized with StartImage.
-  @retval EFI_SECURITY_VIOLATION The current platform policy specifies that the image should not be started.
+  @retval EFI_INVALID_PARAMETER ImageHandle is either an invalid image handle or the image
+                                has already been initialized with StartImage.
   @return Exit code from image
 
 **/
@@ -1141,8 +1136,8 @@
 /**
   Installs one or more protocol interfaces into the boot services environment.
 
-  @param  Handle                The pointer to a handle to install the new protocol interfaces on,
-                                or a pointer to NULL if a new handle is to be allocated.
+  @param  Handle                The handle to install the new protocol interfaces on, or NULL if a new
+                                handle is to be allocated.
   @param  ...                   A variable argument list containing pairs of protocol GUIDs and protocol
                                 interfaces.
 
@@ -1173,7 +1168,7 @@
   @retval EFI_ACCESS_DENIED     The protocol interface could not be reinstalled,
                                 because OldInterface is still being used by a
                                 driver that will not release it.
-  @retval EFI_INVALID_PARAMETER Handle is NULL.
+  @retval EFI_INVALID_PARAMETER Handle is not a valid EFI_HANDLE.
   @retval EFI_INVALID_PARAMETER Protocol is NULL.
 
 **/
@@ -1199,7 +1194,7 @@
   @retval EFI_NOT_FOUND         The interface was not found.
   @retval EFI_ACCESS_DENIED     The interface was not removed because the interface
                                 is still being used by a driver.
-  @retval EFI_INVALID_PARAMETER Handle is NULL.
+  @retval EFI_INVALID_PARAMETER Handle is not a valid EFI_HANDLE.
   @retval EFI_INVALID_PARAMETER Protocol is NULL.
 
 **/
@@ -1239,7 +1234,7 @@
 
   @retval EFI_SUCCESS           The interface information for the specified protocol was returned.
   @retval EFI_UNSUPPORTED       The device does not support the specified protocol.
-  @retval EFI_INVALID_PARAMETER Handle is NULL.
+  @retval EFI_INVALID_PARAMETER Handle is not a valid EFI_HANDLE.
   @retval EFI_INVALID_PARAMETER Protocol is NULL.
   @retval EFI_INVALID_PARAMETER Interface is NULL.
 
@@ -1310,8 +1305,8 @@
                                 that required the protocol interface.
 
   @retval EFI_SUCCESS           The protocol instance was closed.
-  @retval EFI_INVALID_PARAMETER 1) Handle is NULL.
-                                2) AgentHandle is NULL.
+  @retval EFI_INVALID_PARAMETER 1) Handle is not a valid EFI_HANDLE.
+                                2) AgentHandle is not a valid EFI_HANDLE.
                                 3) ControllerHandle is not NULL and ControllerHandle is not a valid EFI_HANDLE.
                                 4) Protocol is NULL.
   @retval EFI_NOT_FOUND         1) Handle does not support the protocol specified by Protocol.
@@ -1498,7 +1493,7 @@
 
   @retval EFI_SUCCESS           The (Guid, Table) pair was added, updated, or removed.
   @retval EFI_NOT_FOUND         An attempt was made to delete a nonexistent entry.
-  @retval EFI_INVALID_PARAMETER Guid is NULL.
+  @retval EFI_INVALID_PARAMETER Guid is not valid.
   @retval EFI_OUT_OF_RESOURCES  There is not enough memory available to complete the operation.
 
 **/
@@ -1725,26 +1720,21 @@
   OUT UINT64            *MaximumVariableSize
   );
 
-//
-// Firmware should stop at a firmware user interface on next boot
-//
-#define EFI_OS_INDICATIONS_BOOT_TO_FW_UI    0x0000000000000001
 
 //
 // EFI Runtime Services Table
 //
 #define EFI_SYSTEM_TABLE_SIGNATURE      SIGNATURE_64 ('I','B','I',' ','S','Y','S','T')
-#define EFI_2_31_SYSTEM_TABLE_REVISION  ((2 << 16) | (31))
 #define EFI_2_30_SYSTEM_TABLE_REVISION  ((2 << 16) | (30))
 #define EFI_2_20_SYSTEM_TABLE_REVISION  ((2 << 16) | (20))
 #define EFI_2_10_SYSTEM_TABLE_REVISION  ((2 << 16) | (10))
 #define EFI_2_00_SYSTEM_TABLE_REVISION  ((2 << 16) | (00))
 #define EFI_1_10_SYSTEM_TABLE_REVISION  ((1 << 16) | (10))
 #define EFI_1_02_SYSTEM_TABLE_REVISION  ((1 << 16) | (02))
-#define EFI_SYSTEM_TABLE_REVISION       EFI_2_31_SYSTEM_TABLE_REVISION
+#define EFI_SYSTEM_TABLE_REVISION       EFI_2_30_SYSTEM_TABLE_REVISION
 
 #define EFI_RUNTIME_SERVICES_SIGNATURE  SIGNATURE_64 ('R','U','N','T','S','E','R','V')
-#define EFI_RUNTIME_SERVICES_REVISION   EFI_2_31_SYSTEM_TABLE_REVISION
+#define EFI_RUNTIME_SERVICES_REVISION   EFI_2_30_SYSTEM_TABLE_REVISION
 
 ///
 /// EFI Runtime Services Table.
@@ -1796,7 +1786,7 @@
 
 
 #define EFI_BOOT_SERVICES_SIGNATURE   SIGNATURE_64 ('B','O','O','T','S','E','R','V')
-#define EFI_BOOT_SERVICES_REVISION    EFI_2_31_SYSTEM_TABLE_REVISION
+#define EFI_BOOT_SERVICES_REVISION    EFI_2_30_SYSTEM_TABLE_REVISION
 
 ///
 /// EFI Boot Services Table.
@@ -2013,46 +2003,50 @@
 ///
 /// EFI Boot Key Data
 ///
-typedef UINT32 EFI_BOOT_KEY_DATA;
-///
-/// Indicates the revision of the EFI_KEY_OPTION structure. This revision level should be 0.
-///
-#define EFI_KEY_OPTION_REVISION_MASK        0x000000FF
-///
-/// Either the left or right Shift keys must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_SHIFT_PRESSED_MASK   BIT8
-///
-/// Either the left or right Control keys must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_CONTROL_PRESSED_MASK BIT9
-///
-/// Either the left or right Alt keys must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_ALT_PRESSED_MASK     BIT10
-///
-/// Either the left or right Logo keys must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_LOGO_PRESSED_MASK    BIT11
-///
-/// The Menu key must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_MENU_PRESSED_MASK    BIT12
-///
-/// The SysReq key must be pressed (1) or must not be pressed (0).
-///
-#define EFI_KEY_OPTION_SYS_REQ_PRESSED_MASK BIT13
-///
-/// Specifies the actual number of entries in EFI_KEY_OPTION.Keys, from 0-3. If
-/// zero, then only the shift state is considered. If more than one, then the boot option will
-/// only be launched if all of the specified keys are pressed with the same shift state.
-///
-#define EFI_KEY_OPTION_INPUT_KEY_COUNT_MASK (BIT30 | BIT31)
+typedef union {
+  struct {
+    ///
+    /// Indicates the revision of the EFI_KEY_OPTION structure. This revision level should be 0.
+    ///
+    UINT32  Revision        : 8;
+    ///
+    /// Either the left or right Shift keys must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  ShiftPressed    : 1;
+    ///
+    /// Either the left or right Control keys must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  ControlPressed  : 1;
+    ///
+    /// Either the left or right Alt keys must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  AltPressed      : 1;
+    ///
+    /// Either the left or right Logo keys must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  LogoPressed     : 1;
+    ///
+    /// The Menu key must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  MenuPressed     : 1;
+    ///
+    /// The SysReq key must be pressed (1) or must not be pressed (0).
+    ///
+    UINT32  SysReqPressed    : 1;
+    UINT32  Reserved        : 16;
+    ///
+    /// Specifies the actual number of entries in EFI_KEY_OPTION.Keys, from 0-3. If
+    /// zero, then only the shift state is considered. If more than one, then the boot option will
+    /// only be launched if all of the specified keys are pressed with the same shift state.
+    ///
+    UINT32  InputKeyCount   : 2;
+  } Options;
+  UINT32  PackedValue;
+} EFI_BOOT_KEY_DATA;
 
 ///
 /// EFI Key Option.
 ///
-#pragma pack(1)
 typedef struct {
   ///
   /// Specifies options about how the key will be processed.
@@ -2076,7 +2070,6 @@
   ///
   //EFI_INPUT_KEY      Keys[];
 } EFI_KEY_OPTION;
-#pragma pack()
 
 //
 // EFI File location to boot from on removable media devices
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/X64/ProcessorBind.h ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/X64/ProcessorBind.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/efi/X64/ProcessorBind.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/efi/X64/ProcessorBind.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,7 +1,7 @@
 /** @file
   Processor or Compiler specific defines and types x64 (Intel 64, AMD64).
 
-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
   which accompanies this distribution.  The full text of the license may be found at
@@ -149,7 +149,7 @@
   ///
   /// 1-byte signed value
   ///
-  typedef signed char         INT8;
+  typedef char                INT8;
 #else
   ///
   /// 8-byte unsigned value
@@ -196,7 +196,7 @@
   ///
   /// 1-byte signed value
   ///
-  typedef signed char         INT8;
+  typedef char                INT8;
 #endif
 
 ///
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/elf.h ipxe-1.0.1~lliurex1505/src/include/ipxe/elf.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/elf.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/elf.h	2012-01-06 23:49:04.000000000 +0000
@@ -12,6 +12,6 @@
 
 #include <elf.h>
 
-extern int elf_load ( struct image *image, physaddr_t *entry, physaddr_t *max );
+extern int elf_load ( struct image *image, physaddr_t *entry );
 
 #endif /* _IPXE_ELF_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/eltorito.h ipxe-1.0.1~lliurex1505/src/include/ipxe/eltorito.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/eltorito.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/eltorito.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,103 +0,0 @@
-#ifndef _IPXE_ELTORITO_H
-#define _IPXE_ELTORITO_H
-
-/**
- * @file
- *
- * El Torito bootable CD-ROM specification
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/iso9660.h>
-
-/** An El Torito Boot Record Volume Descriptor (fixed portion) */
-struct eltorito_descriptor_fixed {
-	/** Descriptor type */
-	uint8_t type;
-	/** Identifier ("CD001") */
-	uint8_t id[5];
-	/** Version, must be 1 */
-	uint8_t version;
-	/** Boot system indicator; must be "EL TORITO SPECIFICATION" */
-	uint8_t system_id[32];
-} __attribute__ (( packed ));
-
-/** An El Torito Boot Record Volume Descriptor */
-struct eltorito_descriptor {
-	/** Fixed portion */
-	struct eltorito_descriptor_fixed fixed;
-	/** Unused */
-	uint8_t unused[32];
-	/** Boot catalog sector */
-	uint32_t sector;
-} __attribute__ (( packed ));
-
-/** El Torito Boot Record Volume Descriptor block address */
-#define ELTORITO_LBA 17
-
-/** An El Torito Boot Catalog Validation Entry */
-struct eltorito_validation_entry {
-	/** Header ID; must be 1 */
-	uint8_t header_id;
-	/** Platform ID
-	 *
-	 * 0 = 80x86
-	 * 1 = PowerPC
-	 * 2 = Mac
-	 */
-	uint8_t platform_id;
-	/** Reserved */
-	uint16_t reserved;
-	/** ID string */
-	uint8_t id_string[24];
-	/** Checksum word */
-	uint16_t checksum;
-	/** Signature; must be 0xaa55 */
-	uint16_t signature;
-} __attribute__ (( packed ));
-
-/** El Torito platform IDs */
-enum eltorito_platform_id {
-	ELTORITO_PLATFORM_X86 = 0x00,
-	ELTORITO_PLATFORM_POWERPC = 0x01,
-	ELTORITO_PLATFORM_MAC = 0x02,
-};
-
-/** A bootable entry in the El Torito Boot Catalog */
-struct eltorito_boot_entry {
-	/** Boot indicator
-	 *
-	 * Must be @c ELTORITO_BOOTABLE for a bootable ISO image
-	 */
-	uint8_t indicator;
-	/** Media type
-	 *
-	 */
-	uint8_t media_type;
-	/** Load segment */
-	uint16_t load_segment;
-	/** System type */
-	uint8_t filesystem;
-	/** Unused */
-	uint8_t reserved_a;
-	/** Sector count */
-	uint16_t length;
-	/** Starting sector */
-	uint32_t start;
-	/** Unused */
-	uint8_t reserved_b[20];
-} __attribute__ (( packed ));
-
-/** Boot indicator for a bootable ISO image */
-#define ELTORITO_BOOTABLE 0x88
-
-/** El Torito media types */
-enum eltorito_media_type {
-	/** No emulation */
-	ELTORITO_NO_EMULATION = 0,
-};
-
-#endif /* _IPXE_ELTORITO_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/entropy.h ipxe-1.0.1~lliurex1505/src/include/ipxe/entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,224 +0,0 @@
-#ifndef _IPXE_ENTROPY_H
-#define _IPXE_ENTROPY_H
-
-/** @file
- *
- * Entropy source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <assert.h>
-#include <ipxe/api.h>
-#include <ipxe/hash_df.h>
-#include <ipxe/sha256.h>
-#include <config/entropy.h>
-
-/**
- * Calculate static inline entropy API function name
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @ret _subsys_func	Subsystem API function
- */
-#define ENTROPY_INLINE( _subsys, _api_func ) \
-	SINGLE_API_INLINE ( ENTROPY_PREFIX_ ## _subsys, _api_func )
-
-/**
- * Provide a entropy API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @v _func		Implementing function
- */
-#define PROVIDE_ENTROPY( _subsys, _api_func, _func ) \
-	PROVIDE_SINGLE_API ( ENTROPY_PREFIX_ ## _subsys, _api_func, _func )
-
-/**
- * Provide a static inline entropy API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- */
-#define PROVIDE_ENTROPY_INLINE( _subsys, _api_func ) \
-	PROVIDE_SINGLE_API_INLINE ( ENTROPY_PREFIX_ ## _subsys, _api_func )
-
-/** A noise sample */
-typedef uint8_t noise_sample_t;
-
-/** An entropy sample */
-typedef uint8_t entropy_sample_t;
-
-/* Include all architecture-independent entropy API headers */
-#include <ipxe/null_entropy.h>
-#include <ipxe/linux/linux_entropy.h>
-
-/* Include all architecture-dependent entropy API headers */
-#include <bits/entropy.h>
-
-/**
- * Enable entropy gathering
- *
- * @ret rc		Return status code
- */
-int entropy_enable ( void );
-
-/**
- * Disable entropy gathering
- *
- */
-void entropy_disable ( void );
-
-/**
- * min-entropy per sample
- *
- * @ret min_entropy	min-entropy of each sample
- *
- * min-entropy is defined in ANS X9.82 Part 1-2006 Section 8.3 and in
- * NIST SP 800-90 Appendix C.3 as
- *
- *    H_min = -log2 ( p_max )
- *
- * where p_max is the probability of the most likely sample value.
- *
- * This must be a compile-time constant.
- */
-double min_entropy_per_sample ( void );
-
-/**
- * Get noise sample
- *
- * @ret noise		Noise sample
- * @ret rc		Return status code
- *
- * This is the GetNoise function defined in ANS X9.82 Part 2
- * (October 2011 Draft) Section 6.5.2.
- */
-int get_noise ( noise_sample_t *noise );
-
-extern int get_entropy_input_tmp ( unsigned int num_samples,
-				   uint8_t *tmp, size_t tmp_len );
-
-/** Use SHA-256 as the underlying hash algorithm for Hash_df
- *
- * Hash_df using SHA-256 is an Approved algorithm in ANS X9.82.
- */
-#define entropy_hash_df_algorithm sha256_algorithm
-
-/** Underlying hash algorithm output length (in bytes) */
-#define ENTROPY_HASH_DF_OUTLEN_BYTES SHA256_DIGEST_SIZE
-
-/**
- * Obtain entropy input
- *
- * @v min_entropy_bits	Minimum amount of entropy, in bits
- * @v data		Data buffer
- * @v min_len		Minimum length of entropy input, in bytes
- * @v max_len		Maximum length of entropy input, in bytes
- * @ret len		Length of entropy input, in bytes, or negative error
- *
- * This is the implementation of the Get_entropy_input function (using
- * an entropy source as the source of entropy input and condensing
- * each entropy source output after each GetEntropy call) as defined
- * in ANS X9.82 Part 4 (April 2011 Draft) Section 13.3.4.2.
- *
- * To minimise code size, the number of samples required is calculated
- * at compilation time.
- */
-static inline __attribute__ (( always_inline )) int
-get_entropy_input ( unsigned int min_entropy_bits, void *data, size_t min_len,
-		    size_t max_len ) {
-	size_t tmp_len = ( ( ( min_entropy_bits * 2 ) + 7 ) / 8 );
-	uint8_t tmp_buf[ tmp_len ];
-	uint8_t *tmp = ( ( tmp_len > max_len ) ? tmp_buf : data );
-	double min_samples;
-	unsigned int num_samples;
-	unsigned int n;
-	int rc;
-
-	/* Sanity checks */
-	linker_assert ( ( min_entropy_per_sample() <=
-			  ( 8 * sizeof ( noise_sample_t ) ) ),
-			min_entropy_per_sample_is_impossibly_high );
-	linker_assert ( ( min_entropy_bits <= ( 8 * max_len ) ),
-			entropy_buffer_too_small );
-
-	/* Round up minimum entropy to an integral number of bytes */
-	min_entropy_bits = ( ( min_entropy_bits + 7 ) & ~7 );
-
-	/* Calculate number of samples required to contain sufficient entropy */
-	min_samples = ( ( min_entropy_bits * 1.0 ) / min_entropy_per_sample() );
-
-	/* Round up to a whole number of samples.  We don't have the
-	 * ceil() function available, so do the rounding by hand.
-	 */
-	num_samples = min_samples;
-	if ( num_samples < min_samples )
-		num_samples++;
-	linker_assert ( ( num_samples >= min_samples ), rounding_error );
-
-	/* Floating-point operations are not allowed in iPXE since we
-	 * never set up a suitable environment.  Abort the build
-	 * unless the calculated number of samples is a compile-time
-	 * constant.
-	 */
-	linker_assert ( __builtin_constant_p ( num_samples ),
-			num_samples_not_constant );
-
-	/* (Unnumbered).  The output length of the hash function shall
-	 * meet or exceed the security strength indicated by the
-	 * min_entropy parameter.
-	 */
-	linker_assert ( ( ( 8 * ENTROPY_HASH_DF_OUTLEN_BYTES ) >=
-			  min_entropy_bits ), hash_df_algorithm_too_weak );
-
-	/* 1.  If ( min_length > max_length ), then return ( FAILURE, Null ) */
-	linker_assert ( ( min_len <= max_len ), min_len_greater_than_max_len );
-
-	/* 2.  n = 2 * min_entropy */
-	n = ( 2 * min_entropy_bits );
-
-	/* 3.  entropy_total = 0
-	 * 4.  tmp = a fixed n-bit value, such as 0^n
-	 * 5.  While ( entropy_total < min_entropy )
-	 *     5.1.  ( status, entropy_bitstring, assessed_entropy )
-	 *           = GetEntropy()
-	 *     5.2.  If status indicates an error, return ( status, Null )
-	 *     5.3.  nonce = MakeNextNonce()
-	 *     5.4.  tmp = tmp XOR df ( ( nonce || entropy_bitstring ), n )
-	 *     5.5.  entropy_total = entropy_total + assessed_entropy
-	 *
-	 * (The implementation of these steps is inside the function
-	 * get_entropy_input_tmp().)
-	 */
-	linker_assert ( __builtin_constant_p ( tmp_len ),
-			tmp_len_not_constant );
-	linker_assert ( ( n == ( 8 * tmp_len ) ), tmp_len_mismatch );
-	if ( ( rc = get_entropy_input_tmp ( num_samples, tmp, tmp_len ) ) != 0 )
-		return rc;
-
-	/* 6.  If ( n < min_length ), then tmp = tmp || 0^(min_length-n)
-	 * 7.  If ( n > max_length ), then tmp = df ( tmp, max_length )
-	 * 8.  Return ( SUCCESS, tmp )
-	 */
-	if ( tmp_len < min_len ) {
-		/* (Data is already in-place.) */
-		linker_assert ( ( data == tmp ), data_not_inplace );
-		memset ( ( data + tmp_len ), 0, ( min_len - tmp_len ) );
-		return min_len;
-	} else if ( tmp_len > max_len ) {
-		linker_assert ( ( tmp == tmp_buf ), data_inplace );
-		hash_df ( &entropy_hash_df_algorithm, tmp, tmp_len,
-			  data, max_len );
-		return max_len;
-	} else {
-		/* (Data is already in-place.) */
-		linker_assert ( ( data == tmp ), data_not_inplace );
-		return tmp_len;
-	}
-}
-
-#endif /* _IPXE_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errfile.h ipxe-1.0.1~lliurex1505/src/include/ipxe/errfile.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errfile.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/errfile.h	2012-01-06 23:49:04.000000000 +0000
@@ -60,11 +60,6 @@
 #define ERRFILE_null_sanboot	       ( ERRFILE_CORE | 0x00140000 )
 #define ERRFILE_edd		       ( ERRFILE_CORE | 0x00150000 )
 #define ERRFILE_parseopt	       ( ERRFILE_CORE | 0x00160000 )
-#define ERRFILE_test		       ( ERRFILE_CORE | 0x00170000 )
-#define ERRFILE_xferbuf		       ( ERRFILE_CORE | 0x00180000 )
-#define ERRFILE_pending		       ( ERRFILE_CORE | 0x00190000 )
-#define ERRFILE_null_reboot	       ( ERRFILE_CORE | 0x001a0000 )
-#define ERRFILE_pinger		       ( ERRFILE_CORE | 0x001b0000 )
 
 #define ERRFILE_eisa		     ( ERRFILE_DRIVER | 0x00000000 )
 #define ERRFILE_isa		     ( ERRFILE_DRIVER | 0x00010000 )
@@ -115,8 +110,8 @@
 #define ERRFILE_sundance	     ( ERRFILE_DRIVER | 0x00410000 )
 #define ERRFILE_tlan		     ( ERRFILE_DRIVER | 0x00420000 )
 #define ERRFILE_tulip		     ( ERRFILE_DRIVER | 0x00430000 )
-#define ERRFILE_rhine		     ( ERRFILE_DRIVER | 0x00440000 )
-#define ERRFILE_velocity	     ( ERRFILE_DRIVER | 0x00450000 )
+#define ERRFILE_via_rhine	     ( ERRFILE_DRIVER | 0x00440000 )
+#define ERRFILE_via_velocity	     ( ERRFILE_DRIVER | 0x00450000 )
 #define ERRFILE_w89c840		     ( ERRFILE_DRIVER | 0x00460000 )
 #define ERRFILE_ipoib		     ( ERRFILE_DRIVER | 0x00470000 )
 #define ERRFILE_e1000_main	     ( ERRFILE_DRIVER | 0x00480000 )
@@ -145,12 +140,6 @@
 #define ERRFILE_ath9k		     ( ERRFILE_DRIVER | 0x005f0000 )
 #define ERRFILE_ath		     ( ERRFILE_DRIVER | 0x00600000 )
 #define ERRFILE_vmxnet3		     ( ERRFILE_DRIVER | 0x00610000 )
-#define ERRFILE_mii		     ( ERRFILE_DRIVER | 0x00620000 )
-#define ERRFILE_realtek		     ( ERRFILE_DRIVER | 0x00630000 )
-#define ERRFILE_skeleton	     ( ERRFILE_DRIVER | 0x00640000 )
-#define ERRFILE_intel		     ( ERRFILE_DRIVER | 0x00650000 )
-#define ERRFILE_myson		     ( ERRFILE_DRIVER | 0x00660000 )
-#define ERRFILE_intelx		     ( ERRFILE_DRIVER | 0x00670000 )
 
 #define ERRFILE_scsi		     ( ERRFILE_DRIVER | 0x00700000 )
 #define ERRFILE_arbel		     ( ERRFILE_DRIVER | 0x00710000 )
@@ -172,7 +161,7 @@
 #define ERRFILE_nullnet			( ERRFILE_NET | 0x00090000 )
 #define ERRFILE_tcp			( ERRFILE_NET | 0x000a0000 )
 #define ERRFILE_ftp			( ERRFILE_NET | 0x000b0000 )
-#define ERRFILE_httpcore		( ERRFILE_NET | 0x000c0000 )
+#define ERRFILE_http			( ERRFILE_NET | 0x000c0000 )
 #define ERRFILE_iscsi			( ERRFILE_NET | 0x000d0000 )
 #define ERRFILE_tcpip			( ERRFILE_NET | 0x000e0000 )
 #define ERRFILE_udp			( ERRFILE_NET | 0x000f0000 )
@@ -185,7 +174,7 @@
 #define ERRFILE_slam			( ERRFILE_NET | 0x00160000 )
 #define ERRFILE_ib_sma			( ERRFILE_NET | 0x00170000 )
 #define ERRFILE_ib_packet		( ERRFILE_NET | 0x00180000 )
-#define ERRFILE_icmpv4			( ERRFILE_NET | 0x00190000 )
+#define ERRFILE_icmp			( ERRFILE_NET | 0x00190000 )
 #define ERRFILE_ib_qset			( ERRFILE_NET | 0x001a0000 )
 #define ERRFILE_ib_gma			( ERRFILE_NET | 0x001b0000 )
 #define ERRFILE_ib_pathrec		( ERRFILE_NET | 0x001c0000 )
@@ -209,16 +198,6 @@
 #define ERRFILE_fcoe			( ERRFILE_NET | 0x002e0000 )
 #define ERRFILE_fcns			( ERRFILE_NET | 0x002f0000 )
 #define ERRFILE_vlan			( ERRFILE_NET | 0x00300000 )
-#define ERRFILE_oncrpc			( ERRFILE_NET | 0x00310000 )
-#define ERRFILE_portmap			( ERRFILE_NET | 0x00320000 )
-#define ERRFILE_nfs			( ERRFILE_NET | 0x00330000 )
-#define ERRFILE_nfs_open		( ERRFILE_NET | 0x00340000 )
-#define ERRFILE_mount			( ERRFILE_NET | 0x00350000 )
-#define ERRFILE_oncrpc_iob		( ERRFILE_NET | 0x00360000 )
-#define ERRFILE_neighbour		( ERRFILE_NET | 0x00370000 )
-#define ERRFILE_socket			( ERRFILE_NET | 0x00380000 )
-#define ERRFILE_icmp			( ERRFILE_NET | 0x00390000 )
-#define ERRFILE_ping			( ERRFILE_NET | 0x003a0000 )
 
 #define ERRFILE_image		      ( ERRFILE_IMAGE | 0x00000000 )
 #define ERRFILE_elf		      ( ERRFILE_IMAGE | 0x00010000 )
@@ -263,35 +242,6 @@
 #define ERRFILE_bofm		      ( ERRFILE_OTHER | 0x00210000 )
 #define ERRFILE_prompt		      ( ERRFILE_OTHER | 0x00220000 )
 #define ERRFILE_nvo_cmd		      ( ERRFILE_OTHER | 0x00230000 )
-#define ERRFILE_hmac_drbg	      ( ERRFILE_OTHER | 0x00240000 )
-#define ERRFILE_drbg		      ( ERRFILE_OTHER | 0x00250000 )
-#define ERRFILE_entropy		      ( ERRFILE_OTHER | 0x00260000 )
-#define ERRFILE_rsa		      ( ERRFILE_OTHER | 0x00270000 )
-#define ERRFILE_linux_entropy	      ( ERRFILE_OTHER | 0x00280000 )
-#define ERRFILE_x509_test	      ( ERRFILE_OTHER | 0x00290000 )
-#define ERRFILE_cms		      ( ERRFILE_OTHER | 0x002a0000 )
-#define ERRFILE_imgtrust	      ( ERRFILE_OTHER | 0x002b0000 )
-#define ERRFILE_menu_ui		      ( ERRFILE_OTHER | 0x002c0000 )
-#define ERRFILE_menu_cmd	      ( ERRFILE_OTHER | 0x002d0000 )
-#define ERRFILE_validator	      ( ERRFILE_OTHER | 0x002e0000 )
-#define ERRFILE_ocsp		      ( ERRFILE_OTHER | 0x002f0000 )
-#define ERRFILE_nslookup	      ( ERRFILE_OTHER | 0x00300000 )
-#define ERRFILE_efi_snp_hii	      ( ERRFILE_OTHER | 0x00310000 )
-#define ERRFILE_readline	      ( ERRFILE_OTHER | 0x00320000 )
-#define ERRFILE_efi_bofm	      ( ERRFILE_OTHER | 0x00330000 )
-#define ERRFILE_efi_console	      ( ERRFILE_OTHER | 0x00340000 )
-#define ERRFILE_efi_debug	      ( ERRFILE_OTHER | 0x00350000 )
-#define ERRFILE_efi_download	      ( ERRFILE_OTHER | 0x00360000 )
-#define ERRFILE_efi_driver	      ( ERRFILE_OTHER | 0x00370000 )
-#define ERRFILE_efi_file	      ( ERRFILE_OTHER | 0x00380000 )
-#define ERRFILE_efi_init	      ( ERRFILE_OTHER | 0x00390000 )
-#define ERRFILE_efi_timer	      ( ERRFILE_OTHER | 0x003a0000 )
-#define ERRFILE_efi_umalloc	      ( ERRFILE_OTHER | 0x003b0000 )
-#define ERRFILE_linux_pci	      ( ERRFILE_OTHER | 0x003c0000 )
-#define ERRFILE_pci_settings	      ( ERRFILE_OTHER | 0x003d0000 )
-#define ERRFILE_efi_reboot	      ( ERRFILE_OTHER | 0x003e0000 )
-#define ERRFILE_memmap_settings	      ( ERRFILE_OTHER | 0x003f0000 )
-#define ERRFILE_param_cmd	      ( ERRFILE_OTHER | 0x00400000 )
 
 /** @} */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errno/efi.h ipxe-1.0.1~lliurex1505/src/include/ipxe/errno/efi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errno/efi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/errno/efi.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,129 +0,0 @@
-#ifndef _IPXE_ERRNO_EFI_H
-#define _IPXE_ERRNO_EFI_H
-
-/**
- * @file
- *
- * EFI platform error codes
- *
- * We derive our platform error codes from the possible values for
- * EFI_STATUS defined in the UEFI specification.
- *
- * EFI_STATUS codes are 32-bit values consisting of a top bit which is
- * set for errors and clear for warnings, and a mildly undefined
- * code of low bits indicating the precise error/warning code.
- * Errors and warnings have completely separate namespaces.
- *
- * We assume that no EFI_STATUS code will ever be defined which uses
- * more than bits 0-6 of the low bits.  We then choose to encode our
- * platform-specific error by mapping bit 31 of the EFI_STATUS to bit
- * 7 of the platform-specific error code, and preserving bits 0-6
- * as-is.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/Uefi/UefiBaseType.h>
-
-/**
- * Convert platform error code to platform component of iPXE error code
- *
- * @v platform		Platform error code
- * @ret errno		Platform component of iPXE error code
- */
-#define PLATFORM_TO_ERRNO( platform ) \
-	( ( (platform) | ( (platform) >> 24 ) ) & 0xff )
-
-/**
- * Convert iPXE error code to platform error code
- *
- * @v errno		iPXE error code
- * @ret platform	Platform error code
- */
-#define ERRNO_TO_PLATFORM( errno ) \
-	( ( ( (errno) << 24 ) | (errno) ) & 0x8000007f )
-
-/* Platform-specific error codes */
-#define PLATFORM_ENOERR		EFI_SUCCESS
-#define PLATFORM_E2BIG		EFI_BUFFER_TOO_SMALL
-#define PLATFORM_EACCES		EFI_ACCESS_DENIED
-#define PLATFORM_EADDRINUSE	EFI_ALREADY_STARTED
-#define PLATFORM_EADDRNOTAVAIL	EFI_NOT_READY
-#define PLATFORM_EAFNOSUPPORT	EFI_UNSUPPORTED
-#define PLATFORM_EAGAIN		EFI_NOT_READY
-#define PLATFORM_EALREADY	EFI_ALREADY_STARTED
-#define PLATFORM_EBADF		EFI_INVALID_PARAMETER
-#define PLATFORM_EBADMSG	EFI_PROTOCOL_ERROR
-#define PLATFORM_EBUSY		EFI_NO_RESPONSE
-#define PLATFORM_ECANCELED	EFI_ABORTED
-#define PLATFORM_ECHILD		EFI_NOT_FOUND
-#define PLATFORM_ECONNABORTED	EFI_ABORTED
-#define PLATFORM_ECONNREFUSED	EFI_NO_RESPONSE
-#define PLATFORM_ECONNRESET	EFI_ABORTED
-#define PLATFORM_EDEADLK	EFI_NOT_READY
-#define PLATFORM_EDESTADDRREQ	EFI_PROTOCOL_ERROR
-#define PLATFORM_EDOM		EFI_INVALID_PARAMETER
-#define PLATFORM_EDQUOT		EFI_VOLUME_FULL
-#define PLATFORM_EEXIST		EFI_WRITE_PROTECTED
-#define PLATFORM_EFAULT		EFI_INVALID_PARAMETER
-#define PLATFORM_EFBIG		EFI_END_OF_MEDIA
-#define PLATFORM_EHOSTUNREACH	EFI_NO_RESPONSE
-#define PLATFORM_EIDRM		EFI_INVALID_PARAMETER
-#define PLATFORM_EILSEQ		EFI_INVALID_PARAMETER
-#define PLATFORM_EINPROGRESS	EFI_ALREADY_STARTED
-#define PLATFORM_EINTR		EFI_NOT_READY
-#define PLATFORM_EINVAL		EFI_INVALID_PARAMETER
-#define PLATFORM_EIO		EFI_PROTOCOL_ERROR
-#define PLATFORM_EISCONN	EFI_ALREADY_STARTED
-#define PLATFORM_EISDIR		EFI_PROTOCOL_ERROR
-#define PLATFORM_ELOOP		EFI_VOLUME_CORRUPTED
-#define PLATFORM_EMFILE		EFI_OUT_OF_RESOURCES
-#define PLATFORM_EMLINK		EFI_OUT_OF_RESOURCES
-#define PLATFORM_EMSGSIZE	EFI_BAD_BUFFER_SIZE
-#define PLATFORM_EMULTIHOP	EFI_INVALID_PARAMETER
-#define PLATFORM_ENAMETOOLONG	EFI_INVALID_PARAMETER
-#define PLATFORM_ENETDOWN	EFI_NO_RESPONSE
-#define PLATFORM_ENETRESET	EFI_ABORTED
-#define PLATFORM_ENETUNREACH	EFI_NO_RESPONSE
-#define PLATFORM_ENFILE		EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENOBUFS	EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENODATA	EFI_NO_RESPONSE
-#define PLATFORM_ENODEV		EFI_DEVICE_ERROR
-#define PLATFORM_ENOENT		EFI_NOT_FOUND
-#define PLATFORM_ENOEXEC	EFI_LOAD_ERROR
-#define PLATFORM_ENOLCK		EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENOLINK	EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENOMEM		EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENOMSG		EFI_PROTOCOL_ERROR
-#define PLATFORM_ENOPROTOOPT	EFI_UNSUPPORTED
-#define PLATFORM_ENOSPC		EFI_VOLUME_FULL
-#define PLATFORM_ENOSR		EFI_OUT_OF_RESOURCES
-#define PLATFORM_ENOSTR		EFI_PROTOCOL_ERROR
-#define PLATFORM_ENOSYS		EFI_UNSUPPORTED
-#define PLATFORM_ENOTCONN	EFI_NOT_STARTED
-#define PLATFORM_ENOTDIR	EFI_VOLUME_CORRUPTED
-#define PLATFORM_ENOTEMPTY	EFI_VOLUME_CORRUPTED
-#define PLATFORM_ENOTSOCK	EFI_INVALID_PARAMETER
-#define PLATFORM_ENOTSUP	EFI_UNSUPPORTED
-#define PLATFORM_ENOTTY		EFI_UNSUPPORTED
-#define PLATFORM_ENXIO		EFI_NOT_FOUND
-#define PLATFORM_EOPNOTSUPP	EFI_UNSUPPORTED
-#define PLATFORM_EOVERFLOW	EFI_BUFFER_TOO_SMALL
-#define PLATFORM_EPERM		EFI_ACCESS_DENIED
-#define PLATFORM_EPIPE		EFI_ABORTED
-#define PLATFORM_EPROTO		EFI_PROTOCOL_ERROR
-#define PLATFORM_EPROTONOSUPPORT EFI_UNSUPPORTED
-#define PLATFORM_EPROTOTYPE	EFI_INVALID_PARAMETER
-#define PLATFORM_ERANGE		EFI_BUFFER_TOO_SMALL
-#define PLATFORM_EROFS		EFI_WRITE_PROTECTED
-#define PLATFORM_ESPIPE		EFI_END_OF_FILE
-#define PLATFORM_ESRCH		EFI_NOT_STARTED
-#define PLATFORM_ESTALE		EFI_PROTOCOL_ERROR
-#define PLATFORM_ETIME		EFI_TIMEOUT
-#define PLATFORM_ETIMEDOUT	EFI_TIMEOUT
-#define PLATFORM_ETXTBSY	EFI_MEDIA_CHANGED
-#define PLATFORM_EWOULDBLOCK	EFI_NOT_READY
-#define PLATFORM_EXDEV		EFI_VOLUME_CORRUPTED
-
-#endif /* _IPXE_ERRNO_EFI_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errno/linux.h ipxe-1.0.1~lliurex1505/src/include/ipxe/errno/linux.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/errno/linux.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/errno/linux.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,113 +0,0 @@
-#ifndef _IPXE_ERRNO_LINUX_H
-#define _IPXE_ERRNO_LINUX_H
-
-/**
- * @file
- *
- * Linux platform error codes
- *
- * Linux error codes all fit inside 8 bits, so we just use them
- * directly as our platform error codes.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * Convert platform error code to platform component of iPXE error code
- *
- * @v platform		Platform error code
- * @ret errno		Platform component of iPXE error code
- */
-#define PLATFORM_TO_ERRNO( platform ) ( (platform) & 0xff )
-
-/**
- * Convert iPXE error code to platform error code
- *
- * @v errno		iPXE error code
- * @ret platform	Platform error code
- */
-#define ERRNO_TO_PLATFORM( errno ) ( (errno) & 0xff )
-
-/* Platform-specific error codes */
-#define PLATFORM_ENOERR 0
-#define PLATFORM_E2BIG 7
-#define PLATFORM_EACCES 13
-#define PLATFORM_EADDRINUSE 98
-#define PLATFORM_EADDRNOTAVAIL 99
-#define PLATFORM_EAFNOSUPPORT 97
-#define PLATFORM_EAGAIN 11
-#define PLATFORM_EALREADY 114
-#define PLATFORM_EBADF 9
-#define PLATFORM_EBADMSG 74
-#define PLATFORM_EBUSY 16
-#define PLATFORM_ECANCELED 125
-#define PLATFORM_ECHILD 10
-#define PLATFORM_ECONNABORTED 103
-#define PLATFORM_ECONNREFUSED 111
-#define PLATFORM_ECONNRESET 104
-#define PLATFORM_EDEADLK 35
-#define PLATFORM_EDESTADDRREQ 89
-#define PLATFORM_EDOM 33
-#define PLATFORM_EDQUOT 122
-#define PLATFORM_EEXIST 17
-#define PLATFORM_EFAULT 14
-#define PLATFORM_EFBIG 27
-#define PLATFORM_EHOSTUNREACH 113
-#define PLATFORM_EIDRM 43
-#define PLATFORM_EILSEQ 84
-#define PLATFORM_EINPROGRESS 115
-#define PLATFORM_EINTR 4
-#define PLATFORM_EINVAL 22
-#define PLATFORM_EIO 5
-#define PLATFORM_EISCONN 106
-#define PLATFORM_EISDIR 21
-#define PLATFORM_ELOOP 40
-#define PLATFORM_EMFILE 24
-#define PLATFORM_EMLINK 31
-#define PLATFORM_EMSGSIZE 90
-#define PLATFORM_EMULTIHOP 72
-#define PLATFORM_ENAMETOOLONG 36
-#define PLATFORM_ENETDOWN 100
-#define PLATFORM_ENETRESET 102
-#define PLATFORM_ENETUNREACH 101
-#define PLATFORM_ENFILE 23
-#define PLATFORM_ENOBUFS 105
-#define PLATFORM_ENODATA 61
-#define PLATFORM_ENODEV 19
-#define PLATFORM_ENOENT 2
-#define PLATFORM_ENOEXEC 8
-#define PLATFORM_ENOLCK 37
-#define PLATFORM_ENOLINK 67
-#define PLATFORM_ENOMEM 12
-#define PLATFORM_ENOMSG 42
-#define PLATFORM_ENOPROTOOPT 92
-#define PLATFORM_ENOSPC 28
-#define PLATFORM_ENOSR 63
-#define PLATFORM_ENOSTR 60
-#define PLATFORM_ENOSYS 38
-#define PLATFORM_ENOTCONN 107
-#define PLATFORM_ENOTDIR 20
-#define PLATFORM_ENOTEMPTY 39
-#define PLATFORM_ENOTSOCK 88
-#define PLATFORM_ENOTSUP PLATFORM_EOPNOTSUPP
-#define PLATFORM_ENOTTY 25
-#define PLATFORM_ENXIO 6
-#define PLATFORM_EOPNOTSUPP 95
-#define PLATFORM_EOVERFLOW 75
-#define PLATFORM_EPERM 1
-#define PLATFORM_EPIPE 32
-#define PLATFORM_EPROTO 71
-#define PLATFORM_EPROTONOSUPPORT 93
-#define PLATFORM_EPROTOTYPE 91
-#define PLATFORM_ERANGE 34
-#define PLATFORM_EROFS 30
-#define PLATFORM_ESPIPE 29
-#define PLATFORM_ESRCH 3
-#define PLATFORM_ESTALE 116
-#define PLATFORM_ETIME 62
-#define PLATFORM_ETIMEDOUT 110
-#define PLATFORM_ETXTBSY 26
-#define PLATFORM_EWOULDBLOCK PLATFORM_EAGAIN
-#define PLATFORM_EXDEV 18
-
-#endif /* _IPXE_ERRNO_LINUX_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ethernet.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ethernet.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ethernet.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ethernet.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,8 +10,6 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/iobuf.h>
 
 /**
  * Check if Ethernet address is all zeroes
@@ -79,19 +77,11 @@
 		 ( ! is_zero_ether_addr ( addr ) ) );
 }
 
-extern uint8_t eth_broadcast[];
-extern int eth_push ( struct net_device *netdev, struct io_buffer *iobuf,
-		      const void *ll_dest, const void *ll_source,
-		      uint16_t net_proto );
-extern int eth_pull ( struct net_device *netdev, struct io_buffer *iobuf,
-		      const void **ll_dest, const void **ll_source,
-		      uint16_t *net_proto, unsigned int *flags );
 extern void eth_init_addr ( const void *hw_addr, void *ll_addr );
 extern const char * eth_ntoa ( const void *ll_addr );
 extern int eth_mc_hash ( unsigned int af, const void *net_addr,
 			 void *ll_addr );
 extern int eth_eth_addr ( const void *ll_addr, void *eth_addr );
-extern int eth_eui64 ( const void *ll_addr, void *eui64 );
 extern struct net_device * alloc_etherdev ( size_t priv_size );
 
 #endif /* _IPXE_ETHERNET_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/features.h ipxe-1.0.1~lliurex1505/src/include/ipxe/features.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/features.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/features.h	2012-01-06 23:49:04.000000000 +0000
@@ -52,9 +52,6 @@
 #define DHCP_EB_FEATURE_EFI		0x24 /**< EFI format */
 #define DHCP_EB_FEATURE_FCOE		0x25 /**< FCoE protocol */
 #define DHCP_EB_FEATURE_VLAN		0x26 /**< VLAN support */
-#define DHCP_EB_FEATURE_MENU		0x27 /**< Menu support */
-#define DHCP_EB_FEATURE_SDI		0x28 /**< SDI image support */
-#define DHCP_EB_FEATURE_NFS		0x29 /**< NFS protocol */
 
 /** @} */
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/fip.h ipxe-1.0.1~lliurex1505/src/include/ipxe/fip.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/fip.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/fip.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stdint.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/fragment.h ipxe-1.0.1~lliurex1505/src/include/ipxe/fragment.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/fragment.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/fragment.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,68 +0,0 @@
-#ifndef _IPXE_FRAGMENT_H
-#define _IPXE_FRAGMENT_H
-
-/** @file
- *
- * Fragment reassembly
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/list.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/retry.h>
-
-/** Fragment reassembly timeout */
-#define FRAGMENT_TIMEOUT ( TICKS_PER_SEC / 2 )
-
-/** A fragment reassembly buffer */
-struct fragment {
-	/* List of fragment reassembly buffers */
-	struct list_head list;
-	/** Reassembled packet */
-	struct io_buffer *iobuf;
-	/** Length of non-fragmentable portion of reassembled packet */
-	size_t hdrlen;
-	/** Reassembly timer */
-	struct retry_timer timer;
-};
-
-/** A fragment reassembler */
-struct fragment_reassembler {
-	/** List of fragment reassembly buffers */
-	struct list_head list;
-	/**
-	 * Check if fragment matches fragment reassembly buffer
-	 *
-	 * @v fragment		Fragment reassembly buffer
-	 * @v iobuf		I/O buffer
-	 * @v hdrlen		Length of non-fragmentable potion of I/O buffer
-	 * @ret is_fragment	Fragment matches this reassembly buffer
-	 */
-	int ( * is_fragment ) ( struct fragment *fragment,
-				struct io_buffer *iobuf, size_t hdrlen );
-	/**
-	 * Get fragment offset
-	 *
-	 * @v iobuf		I/O buffer
-	 * @v hdrlen		Length of non-fragmentable potion of I/O buffer
-	 * @ret offset		Offset
-	 */
-	size_t ( * fragment_offset ) ( struct io_buffer *iobuf, size_t hdrlen );
-	/**
-	 * Check if more fragments exist
-	 *
-	 * @v iobuf		I/O buffer
-	 * @v hdrlen		Length of non-fragmentable potion of I/O buffer
-	 * @ret more_frags	More fragments exist
-	 */
-	int ( * more_fragments ) ( struct io_buffer *iobuf, size_t hdrlen );
-};
-
-extern struct io_buffer *
-fragment_reassemble ( struct fragment_reassembler *fragments,
-		      struct io_buffer *iobuf, size_t *hdrlen );
-
-#endif /* _IPXE_FRAGMENT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/hash_df.h ipxe-1.0.1~lliurex1505/src/include/ipxe/hash_df.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/hash_df.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/hash_df.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_HASH_DF_H
-#define _IPXE_HASH_DF_H
-
-/** @file
- *
- * Hash-based derivation function (Hash_df)
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-
-extern void hash_df ( struct digest_algorithm *hash, const void *input,
-		      size_t input_len, void *output, size_t output_len );
-
-#endif /* _IPXE_HASH_DF_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/hmac_drbg.h ipxe-1.0.1~lliurex1505/src/include/ipxe/hmac_drbg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/hmac_drbg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/hmac_drbg.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,253 +0,0 @@
-#ifndef _IPXE_HMAC_DRBG_H
-#define _IPXE_HMAC_DRBG_H
-
-/** @file
- *
- * HMAC_DRBG algorithm
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-
-/** Declare an HMAC_DRBG algorithm
- *
- * @v hash			Underlying hash algorithm
- * @v max_security_strength	Maxmimum security strength
- * @v out_len_bits		Output block length, in bits
- * @ret hmac_drbg		HMAC_DRBG algorithm
- */
-#define HMAC_DRBG( hash, max_security_strength, out_len_bits ) \
-	( hash, max_security_strength, out_len_bits )
-
-/** HMAC_DRBG using SHA-1
- *
- * The maximum security strength of HMAC_DRBG using SHA-1 is 128 bits
- * according to the list of maximum security strengths documented in
- * NIST SP 800-57 Part 1 Section 5.6.1 Table 3.
- *
- * The output block length of HMAC_DRBG using SHA-1 is 160 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_SHA1 HMAC_DRBG ( &sha1_algorithm, 128, 160 )
-
-/** HMAC_DRBG using SHA-224
- *
- * The maximum security strength of HMAC_DRBG using SHA-224 is 192
- * bits according to the list of maximum security strengths documented
- * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3.
- *
- * The output block length of HMAC_DRBG using SHA-224 is 224 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_SHA224 HMAC_DRBG ( &sha224_algorithm, 192, 224 )
-
-/** HMAC_DRBG using SHA-256
- *
- * The maximum security strength of HMAC_DRBG using SHA-256 is 256
- * bits according to the list of maximum security strengths documented
- * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3.
- *
- * The output block length of HMAC_DRBG using SHA-256 is 256 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_SHA256 HMAC_DRBG ( &sha256_algorithm, 256, 256 )
-
-/** HMAC_DRBG using SHA-384
- *
- * The maximum security strength of HMAC_DRBG using SHA-384 is 256
- * bits according to the list of maximum security strengths documented
- * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3.
- *
- * The output block length of HMAC_DRBG using SHA-384 is 384 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_SHA384 HMAC_DRBG ( &sha384_algorithm, 256, 384 )
-
-/** HMAC_DRBG using SHA-512
- *
- * The maximum security strength of HMAC_DRBG using SHA-512 is 256
- * bits according to the list of maximum security strengths documented
- * in NIST SP 800-57 Part 1 Section 5.6.1 Table 3.
- *
- * The output block length of HMAC_DRBG using SHA-512 is 512 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_SHA512 HMAC_DRBG ( &sha512_algorithm, 256, 512 )
-
-/** Underlying hash algorithm
- *
- * @v hmac_drbg			HMAC_DRBG algorithm
- * @ret hash			Underlying hash algorithm
- */
-#define HMAC_DRBG_HASH( hmac_drbg ) \
-	HMAC_DRBG_EXTRACT_HASH hmac_drbg
-#define HMAC_DRBG_EXTRACT_HASH( hash, max_security_strength, out_len_bits ) \
-	hash
-
-/** Maximum security strength
- *
- * @v hmac_drbg			HMAC_DRBG algorithm
- * @ret max_security_strength	Maxmimum security strength
- */
-#define HMAC_DRBG_MAX_SECURITY_STRENGTH( hmac_drbg ) \
-	HMAC_DRBG_EXTRACT_MAX_SECURITY_STRENGTH hmac_drbg
-#define HMAC_DRBG_EXTRACT_MAX_SECURITY_STRENGTH( hash, max_security_strength, \
-						 out_len_bits ) \
-	max_security_strength
-
-/** Output block length, in bits
- *
- * @v hmac_drbg			HMAC_DRBG algorithm
- * @ret out_len_bits		Output block length, in bits
- */
-#define HMAC_DRBG_OUTLEN_BITS( hmac_drbg ) \
-	HMAC_DRBG_EXTRACT_OUTLEN_BITS hmac_drbg
-#define HMAC_DRBG_EXTRACT_OUTLEN_BITS( hash, max_security_strength, \
-				       out_len_bits ) \
-	out_len_bits
-
-/** Output block length, in bytes
- *
- * @v hmac_drbg			HMAC_DRBG algorithm
- * @ret out_len_bytes		Output block length, in bytes
- */
-#define HMAC_DRBG_OUTLEN_BYTES( hmac_drbg ) \
-	( HMAC_DRBG_OUTLEN_BITS ( hmac_drbg ) / 8 )
-
-/** Maximum output block length, in bytes
- *
- * The maximum output block length for HMAC_DRBG is 512 bits for
- * SHA-512 according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2
- * (NIST SP 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_MAX_OUTLEN_BYTES HMAC_DRBG_OUTLEN_BYTES ( HMAC_DRBG_SHA512 )
-
-/** Required minimum entropy for instantiate and reseed
- *
- * @v security_strength		Security strength
- * @ret min_entropy		Required minimum entropy
- *
- * The minimum required entropy for HMAC_DRBG is equal to the security
- * strength according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2
- * (NIST SP 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_MIN_ENTROPY( security_strength ) (security_strength)
-
-/** Minimum entropy input length
- *
- * @v security_strength		Security strength
- * @ret min_entropy_len_bytes	Required minimum entropy length (in bytes)
- *
- * The minimum entropy input length for HMAC_DRBG is equal to the
- * security strength according to ANS X9.82 Part 3-2007 Section 10.2.1
- * Table 2 (NIST SP 800-90 Section 10.1 Table 2).
- */
-#define HMAC_DRBG_MIN_ENTROPY_LEN_BYTES( security_strength ) \
-	( (security_strength) / 8 )
-
-/** Maximum entropy input length
- *
- * The maximum entropy input length for HMAC_DRBG is 2^35 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).
- *
- * We choose to allow up to 32 bytes.
- */
-#define HMAC_DRBG_MAX_ENTROPY_LEN_BYTES 32
-
-/** Maximum personalisation string length
- *
- * The maximum permitted personalisation string length for HMAC_DRBG
- * is 2^35 bits according to ANS X9.82 Part 3-2007 Section 10.2.1
- * Table 1 (NIST SP 800-90 Section 10.1 Table 2).
- *
- * We choose to allow up to 2^32-1 bytes (i.e. 2^35-8 bits).
- */
-#define HMAC_DRBG_MAX_PERSONAL_LEN_BYTES 0xffffffffUL
-
-/** Maximum additional input length
- *
- * The maximum permitted additional input length for HMAC_DRBG is 2^35
- * bits according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 1
- * (NIST SP 800-90 Section 10.1 Table 2).
- *
- * We choose to allow up to 2^32-1 bytes (i.e. 2^35-8 bits).
- */
-#define HMAC_DRBG_MAX_ADDITIONAL_LEN_BYTES 0xffffffffUL
-
-/** Maximum length of generated pseudorandom data per request
- *
- * The maximum number of bits per request for HMAC_DRBG is 2^19 bits
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 1 (NIST SP
- * 800-90 Section 10.1 Table 2).
- *
- * We choose to allow up to 2^16-1 bytes (i.e. 2^19-8 bits).
- */
-#define HMAC_DRBG_MAX_GENERATED_LEN_BYTES 0x0000ffffUL
-
-/** Reseed interval
- *
- * The maximum permitted reseed interval for HMAC_DRBG is 2^48
- * according to ANS X9.82 Part 3-2007 Section 10.2.1 Table 2 (NIST SP
- * 800-90 Section 10.1 Table 2).  However, the sample implementation
- * given in ANS X9.82 Part 3-2007 Annex E.2.1 (NIST SP 800-90 Appendix
- * F.2) shows a reseed interval of 10000.
- *
- * We choose a very conservative reseed interval.
- */
-#define HMAC_DRBG_RESEED_INTERVAL 1024
-
-/**
- * HMAC_DRBG internal state
- *
- * This structure is defined by ANS X9.82 Part 3-2007 Section
- * 10.2.2.2.1 (NIST SP 800-90 Section 10.1.2.1).
- *
- * The "administrative information" portions (security_strength and
- * prediction_resistance) are design-time constants and so are not
- * present as fields in this structure.
- */
-struct hmac_drbg_state {
-	/** Current value
-	 *
-	 * "The value V of outlen bits, which is updated each time
-	 * another outlen bits of output are produced"
-	 */
-	uint8_t value[HMAC_DRBG_MAX_OUTLEN_BYTES];
-	/** Current key
-	 *
-	 * "The outlen-bit Key, which is updated at least once each
-	 * time that the DRBG mechanism generates pseudorandom bits."
-	 */
-	uint8_t key[HMAC_DRBG_MAX_OUTLEN_BYTES];
-	/** Reseed counter
-	 *
-	 * "A counter (reseed_counter) that indicates the number of
-	 * requests for pseudorandom bits since instantiation or
-	 * reseeding"
-	 */
-	unsigned int reseed_counter;
-};
-
-extern void hmac_drbg_instantiate ( struct digest_algorithm *hash,
-				    struct hmac_drbg_state *state,
-				    const void *entropy, size_t entropy_len,
-				    const void *personal, size_t personal_len );
-extern void hmac_drbg_reseed ( struct digest_algorithm *hash,
-			       struct hmac_drbg_state *state,
-			       const void *entropy, size_t entropy_len,
-			       const void *additional, size_t additional_len );
-extern int hmac_drbg_generate ( struct digest_algorithm *hash,
-				struct hmac_drbg_state *state,
-				const void *additional, size_t additional_len,
-				void *data, size_t len );
-
-#endif /* _IPXE_HMAC_DRBG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/http.h ipxe-1.0.1~lliurex1505/src/include/ipxe/http.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/http.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/http.h	2012-01-06 23:49:04.000000000 +0000
@@ -18,7 +18,6 @@
 extern int http_open_filter ( struct interface *xfer, struct uri *uri,
 			      unsigned int default_port,
 			      int ( * filter ) ( struct interface *,
-						 const char *,
 						 struct interface ** ) );
 
 #endif /* _IPXE_HTTP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ib_packet.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ib_packet.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ib_packet.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ib_packet.h	2012-01-06 23:49:04.000000000 +0000
@@ -152,10 +152,9 @@
 
 extern int ib_push ( struct ib_device *ibdev, struct io_buffer *iobuf,
 		     struct ib_queue_pair *qp, size_t payload_len,
-		     const struct ib_address_vector *dest );
+		     const struct ib_address_vector *av );
 extern int ib_pull ( struct ib_device *ibdev, struct io_buffer *iobuf,
 		     struct ib_queue_pair **qp, size_t *payload_len,
-		     struct ib_address_vector *dest,
-		     struct ib_address_vector *source );
+		     struct ib_address_vector *av );
 
 #endif /* _IPXE_IB_PACKET_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmp6.h ipxe-1.0.1~lliurex1505/src/include/ipxe/icmp6.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmp6.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/icmp6.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,59 @@
+#ifndef _IPXE_ICMP6_H
+#define _IPXE_ICMP6_H
+
+/** @file
+ *
+ * ICMP6 protocol
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <ipxe/ip6.h>
+#include <ipxe/ndp.h>
+
+#define ICMP6_NSOLICIT 135
+#define ICMP6_NADVERT 136
+
+extern struct tcpip_protocol icmp6_protocol __tcpip_protocol;
+
+struct icmp6_header {
+	uint8_t type;
+	uint8_t code;
+	uint16_t csum;
+	/* Message body */
+};
+
+struct neighbour_solicit {
+	uint8_t type;
+	uint8_t code;
+	uint16_t csum;
+	uint32_t reserved;
+	struct in6_addr target;
+	/* "Compulsory" options */
+	uint8_t opt_type;
+	uint8_t opt_len;
+  /* FIXME:  hack alert */
+	uint8_t opt_ll_addr[6];
+};
+
+struct neighbour_advert {
+	uint8_t type;
+	uint8_t code;
+	uint16_t csum;
+	uint8_t flags;
+	uint8_t reserved;
+	struct in6_addr target;
+	uint8_t opt_type;
+	uint8_t opt_len;
+  /* FIXME:  hack alert */
+	uint8_t opt_ll_addr[6];
+};
+
+#define ICMP6_FLAGS_ROUTER 0x80
+#define ICMP6_FLAGS_SOLICITED 0x40
+#define ICMP6_FLAGS_OVERRIDE 0x20
+
+int icmp6_send_solicit ( struct net_device *netdev, struct in6_addr *src, struct in6_addr *dest );
+
+#endif /* _IPXE_ICMP6_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/icmp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/icmp.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,12 +9,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <stdint.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/tables.h>
-
 /** An ICMP header */
 struct icmp_header {
 	/** Type */
@@ -25,49 +19,7 @@
 	uint16_t chksum;
 } __attribute__ (( packed ));
 
-/** An ICMP echo request/reply */
-struct icmp_echo {
-	/** ICMPv6 header */
-	struct icmp_header icmp;
-	/** Identifier */
-	uint16_t ident;
-	/** Sequence number */
-	uint16_t sequence;
-	/** Data */
-	uint8_t data[0];
-} __attribute__ (( packed ));
-
-/** An ICMP echo protocol */
-struct icmp_echo_protocol {
-	/** Address family */
-	sa_family_t family;
-	/** Request type */
-	uint8_t request;
-	/** Reply type */
-	uint8_t reply;
-	/** TCP/IP protocol */
-	struct tcpip_protocol *tcpip_protocol;
-	/** Include network-layer checksum within packet */
-	int net_checksum;
-};
-
-/** ICMP echo protocol table */
-#define ICMP_ECHO_PROTOCOLS \
-	__table ( struct icmp_echo_protocol, "icmp_echo_protocols" )
-
-/** Declare an ICMP echo protocol */
-#define __icmp_echo_protocol __table_entry ( ICMP_ECHO_PROTOCOLS, 01 )
-
-#define ICMP_ECHO_REPLY 0
+#define ICMP_ECHO_RESPONSE 0
 #define ICMP_ECHO_REQUEST 8
 
-extern int icmp_tx_echo_request ( struct io_buffer *iobuf,
-				  struct sockaddr_tcpip *st_dest );
-
-extern int icmp_rx_echo_request ( struct io_buffer *iobuf,
-				  struct sockaddr_tcpip *st_src,
-				  struct icmp_echo_protocol *echo_protocol );
-extern int icmp_rx_echo_reply ( struct io_buffer *iobuf,
-				struct sockaddr_tcpip *st_src );
-
 #endif /* _IPXE_ICMP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmpv6.h ipxe-1.0.1~lliurex1505/src/include/ipxe/icmpv6.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/icmpv6.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/icmpv6.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,63 +0,0 @@
-#ifndef _IPXE_ICMP6_H
-#define _IPXE_ICMP6_H
-
-/** @file
- *
- * ICMPv6 protocol
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/tables.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/icmp.h>
-
-/** An ICMPv6 handler */
-struct icmpv6_handler {
-	/** Type */
-	unsigned int type;
-	/** Process received packet
-	 *
-	 * @v iobuf		I/O buffer
-	 * @v netdev		Network device
-	 * @v sin6_src		Source socket address
-	 * @v sin6_dest		Destination socket address
-	 * @ret rc		Return status code
-	 *
-	 * This function takes ownership of the I/O buffer.
-	 */
-	int ( * rx ) ( struct io_buffer *iobuf, struct net_device *netdev,
-		       struct sockaddr_in6 *sin6_src,
-		       struct sockaddr_in6 *sin6_dest );
-};
-
-/** ICMPv6 handler table */
-#define ICMPV6_HANDLERS __table ( struct icmpv6_handler, "icmpv6_handlers" )
-
-/** Declare an ICMPv6 handler */
-#define __icmpv6_handler __table_entry ( ICMPV6_HANDLERS, 01 )
-
-/** ICMPv6 echo request */
-#define ICMPV6_ECHO_REQUEST 128
-
-/** ICMPv6 echo reply */
-#define ICMPV6_ECHO_REPLY 129
-
-/** ICMPv6 router solicitation */
-#define ICMPV6_ROUTER_SOLICITATION 133
-
-/** ICMPv6 router advertisement */
-#define ICMPV6_ROUTER_ADVERTISEMENT 134
-
-/** ICMPv6 neighbour solicitation */
-#define ICMPV6_NEIGHBOUR_SOLICITATION 135
-
-/** ICMPv6 neighbour advertisement */
-#define ICMPV6_NEIGHBOUR_ADVERTISEMENT 136
-
-extern struct tcpip_protocol icmpv6_protocol __tcpip_protocol;
-
-#endif /* _IPXE_ICMP6_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/image.h ipxe-1.0.1~lliurex1505/src/include/ipxe/image.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/image.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/image.h	2012-01-06 23:49:04.000000000 +0000
@@ -29,7 +29,7 @@
 	/** URI of image */
 	struct uri *uri;
 	/** Name */
-	char *name;
+	char name[16];
 	/** Flags */
 	unsigned int flags;
 
@@ -64,12 +64,6 @@
 /** Image is selected for execution */
 #define IMAGE_SELECTED 0x0002
 
-/** Image is trusted */
-#define IMAGE_TRUSTED 0x0004
-
-/** Image will be automatically unregistered after execution */
-#define IMAGE_AUTO_UNREGISTER 0x0008
-
 /** An executable image type */
 struct image_type {
 	/** Name of this image type */
@@ -125,10 +119,6 @@
 #define for_each_image( image ) \
 	list_for_each_entry ( (image), &images, list )
 
-/** Iterate over all registered images, safe against deletion */
-#define for_each_image_safe( image, tmp ) \
-	list_for_each_entry_safe ( (image), (tmp), &images, list )
-
 /**
  * Test for existence of images
  *
@@ -147,8 +137,8 @@
 	return list_first_entry ( &images, struct image, list );
 }
 
-extern struct image * alloc_image ( struct uri *uri );
-extern int image_set_name ( struct image *image, const char *name );
+extern struct image * alloc_image ( void );
+extern void image_set_uri ( struct image *image, struct uri *uri );
 extern int image_set_cmdline ( struct image *image, const char *cmdline );
 extern int register_image ( struct image *image );
 extern void unregister_image ( struct image *image );
@@ -158,7 +148,6 @@
 extern int image_replace ( struct image *replacement );
 extern int image_select ( struct image *image );
 extern struct image * image_find_selected ( void );
-extern int image_set_trust ( int require_trusted, int permanent );
 
 /**
  * Increment reference count on an image
@@ -181,30 +170,15 @@
 }
 
 /**
- * Clear image command line
- *
- * @v image		Image
- */
-static inline void image_clear_cmdline ( struct image *image ) {
-	image_set_cmdline ( image, NULL );
-}
-
-/**
- * Set image as trusted
- *
- * @v image		Image
- */
-static inline void image_trust ( struct image *image ) {
-	image->flags |= IMAGE_TRUSTED;
-}
-
-/**
- * Set image as untrusted
+ * Set image name
  *
  * @v image		Image
+ * @v name		New image name
+ * @ret rc		Return status code
  */
-static inline void image_untrust ( struct image *image ) {
-	image->flags &= ~IMAGE_TRUSTED;
+static inline int image_set_name ( struct image *image, const char *name ) {
+	strncpy ( image->name, name, ( sizeof ( image->name ) - 1 ) );
+	return 0;
 }
 
 #endif /* _IPXE_IMAGE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/infiniband.h ipxe-1.0.1~lliurex1505/src/include/ipxe/infiniband.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/infiniband.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/infiniband.h	2012-01-06 23:49:04.000000000 +0000
@@ -142,16 +142,6 @@
 	IB_QPT_ETH,
 };
 
-/** Infiniband queue pair operations */
-struct ib_queue_pair_operations {
-	/** Allocate receive I/O buffer
-	 *
-	 * @v len		Maximum receive length
-	 * @ret iobuf		I/O buffer (or NULL if out of memory)
-	 */
-	struct io_buffer * ( * alloc_iob ) ( size_t len );
-};
-
 /** An Infiniband Queue Pair */
 struct ib_queue_pair {
 	/** Containing Infiniband device */
@@ -179,8 +169,6 @@
 	struct list_head mgids;
 	/** Address vector */
 	struct ib_address_vector av;
-	/** Queue pair operations */
-	struct ib_queue_pair_operations *op;
 	/** Driver private data */
 	void *drv_priv;
 	/** Queue owner private data */
@@ -205,15 +193,13 @@
 	 *
 	 * @v ibdev		Infiniband device
 	 * @v qp		Queue pair
-	 * @v dest		Destination address vector, or NULL
-	 * @v source		Source address vector, or NULL
+	 * @v av		Address vector, or NULL
 	 * @v iobuf		I/O buffer
 	 * @v rc		Completion status code
 	 */
 	void ( * complete_recv ) ( struct ib_device *ibdev,
 				   struct ib_queue_pair *qp,
-				   struct ib_address_vector *dest,
-				   struct ib_address_vector *source,
+				   struct ib_address_vector *av,
 				   struct io_buffer *iobuf, int rc );
 };
 
@@ -291,7 +277,7 @@
 	 *
 	 * @v ibdev		Infiniband device
 	 * @v qp		Queue pair
-	 * @v dest		Destination address vector
+	 * @v av		Address vector
 	 * @v iobuf		I/O buffer
 	 * @ret rc		Return status code
 	 *
@@ -302,7 +288,7 @@
 	 */
 	int ( * post_send ) ( struct ib_device *ibdev,
 			      struct ib_queue_pair *qp,
-			      struct ib_address_vector *dest,
+			      struct ib_address_vector *av,
 			      struct io_buffer *iobuf );
 	/** Post receive work queue entry
 	 *
@@ -492,8 +478,8 @@
 extern struct ib_queue_pair *
 ib_create_qp ( struct ib_device *ibdev, enum ib_queue_pair_type type,
 	       unsigned int num_send_wqes, struct ib_completion_queue *send_cq,
-	       unsigned int num_recv_wqes, struct ib_completion_queue *recv_cq,
-	       struct ib_queue_pair_operations *op );
+	       unsigned int num_recv_wqes,
+	       struct ib_completion_queue *recv_cq );
 extern int ib_modify_qp ( struct ib_device *ibdev, struct ib_queue_pair *qp );
 extern void ib_destroy_qp ( struct ib_device *ibdev,
 			    struct ib_queue_pair *qp );
@@ -504,7 +490,7 @@
 extern struct ib_work_queue * ib_find_wq ( struct ib_completion_queue *cq,
 					   unsigned long qpn, int is_send );
 extern int ib_post_send ( struct ib_device *ibdev, struct ib_queue_pair *qp,
-			  struct ib_address_vector *dest,
+			  struct ib_address_vector *av,
 			  struct io_buffer *iobuf );
 extern int ib_post_recv ( struct ib_device *ibdev, struct ib_queue_pair *qp,
 			  struct io_buffer *iobuf );
@@ -513,8 +499,7 @@
 			       struct io_buffer *iobuf, int rc );
 extern void ib_complete_recv ( struct ib_device *ibdev,
 			       struct ib_queue_pair *qp,
-			       struct ib_address_vector *dest,
-			       struct ib_address_vector *source,
+			       struct ib_address_vector *av,
 			       struct io_buffer *iobuf, int rc );
 extern void ib_refill_recv ( struct ib_device *ibdev,
 			     struct ib_queue_pair *qp );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/in.h ipxe-1.0.1~lliurex1505/src/include/ipxe/in.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/in.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/in.h	2012-01-06 23:49:04.000000000 +0000
@@ -50,13 +50,6 @@
 #define s6_addr32       in6_u.u6_addr32
 };
 
-#define IN6_IS_ADDR_MULTICAST( addr )					\
-	( *( ( const uint8_t * ) (addr) ) == 0xff )
-
-#define IN6_IS_ADDR_LINKLOCAL( addr )					\
-	( ( *( ( const uint16_t * ) (addr) ) & htons ( 0xffc0 ) ) ==	\
-	  htonl ( 0xfe80 ) )
-
 /**
  * IPv4 socket address
  */
@@ -66,22 +59,19 @@
 	 * Always set to @c AF_INET for IPv4 addresses
 	 */
 	sa_family_t sin_family;
-	/** Flags (part of struct @c sockaddr_tcpip) */
-	uint16_t sin_flags;
 	/** TCP/IP port (part of struct @c sockaddr_tcpip) */
 	uint16_t sin_port;
 	/** IPv4 address */
 	struct in_addr sin_addr;
 	/** Padding
 	 *
-	 * This ensures that a struct @c sockaddr_in is large enough
-	 * to hold a socket address for any TCP/IP address family.
+	 * This ensures that a struct @c sockaddr_tcpip is large
+	 * enough to hold a socket address for any TCP/IP address
+	 * family.
 	 */
-	char pad[ sizeof ( struct sockaddr ) -
-		  ( sizeof ( sa_family_t ) /* sin_family */ +
-		    sizeof ( uint16_t ) /* sin_flags */ +
-		    sizeof ( uint16_t ) /* sin_port */ +
-		    sizeof ( struct in_addr ) /* sin_addr */ ) ];
+	char pad[ sizeof ( struct sockaddr ) - sizeof ( sa_family_t )
+					     - sizeof ( uint16_t )
+					     - sizeof ( struct in_addr ) ];
 } __attribute__ (( may_alias ));
 
 /**
@@ -92,35 +82,23 @@
 	 *
 	 * Always set to @c AF_INET6 for IPv6 addresses
 	 */
-	sa_family_t sin6_family;
-	/** Flags (part of struct @c sockaddr_tcpip) */
-	uint16_t sin6_flags;
+	sa_family_t sin_family;
 	/** TCP/IP port (part of struct @c sockaddr_tcpip) */
-	uint16_t sin6_port;
-	/** Scope ID
-	 *
-	 * For link-local addresses, this is the network device index.
-	 */
-        uint16_t sin6_scope_id;
-	/** IPv6 address */
-        struct in6_addr sin6_addr;
-	/** Padding
-	 *
-	 * This ensures that a struct @c sockaddr_in6 is large
-	 * enough to hold a socket address for any TCP/IP address
-	 * family.
-	 */
-	char pad[ sizeof ( struct sockaddr ) -
-		  ( sizeof ( sa_family_t ) /* sin6_family */ +
-		    sizeof ( uint16_t ) /* sin6_flags */ +
-		    sizeof ( uint16_t ) /* sin6_port */ +
-		    sizeof ( uint16_t ) /* sin6_scope_id */ +
-		    sizeof ( struct in6_addr ) /* sin6_addr */ ) ];
+	uint16_t 	sin_port;
+        uint32_t        sin6_flowinfo;  /* Flow number */
+        struct in6_addr sin6_addr;      /* 128-bit destination address */
+        uint32_t        sin6_scope_id;  /* Scope ID */
 } __attribute__ (( may_alias ));
 
 extern int inet_aton ( const char *cp, struct in_addr *inp );
 extern char * inet_ntoa ( struct in_addr in );
-extern int inet6_aton ( const char *string, struct in6_addr *in );
-extern char * inet6_ntoa ( const struct in6_addr *in );
+
+/* Adding the following for IP6 support
+ *
+
+extern int inet6_aton ( const char *cp, struct in6_addr *inp );
+extern char * inet6_ntoa ( struct in_addr in );
+
+ */
 
 #endif	/* _IPXE_IN_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iobuf.h ipxe-1.0.1~lliurex1505/src/include/ipxe/iobuf.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iobuf.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/iobuf.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,6 +14,17 @@
 #include <ipxe/list.h>
 
 /**
+ * I/O buffer alignment
+ *
+ * I/O buffers allocated via alloc_iob() are guaranteed to be
+ * physically aligned to this boundary.  Some cards cannot DMA across
+ * a 4kB boundary.  With a standard Ethernet MTU, aligning to a 2kB
+ * boundary is sufficient to guarantee no 4kB boundary crossings.  For
+ * a jumbo Ethernet MTU, a packet may be larger than 4kB anyway.
+ */
+#define IOB_ALIGN 2048
+
+/**
  * Minimum I/O buffer length
  *
  * alloc_iob() will round up the allocated length to this size if
@@ -210,12 +221,9 @@
 	(iobuf) = NULL;					\
 	__iobuf; } )
 
-extern struct io_buffer * __malloc alloc_iob_raw ( size_t len, size_t align,
-						   size_t offset );
 extern struct io_buffer * __malloc alloc_iob ( size_t len );
 extern void free_iob ( struct io_buffer *iobuf );
 extern void iob_pad ( struct io_buffer *iobuf, size_t min_len );
 extern int iob_ensure_headroom ( struct io_buffer *iobuf, size_t len );
-extern struct io_buffer * iob_concatenate ( struct list_head *list );
 
 #endif /* _IPXE_IOBUF_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/io.h ipxe-1.0.1~lliurex1505/src/include/ipxe/io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/io.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/io.h	2012-01-06 23:49:04.000000000 +0000
@@ -53,6 +53,7 @@
 	PROVIDE_SINGLE_API_INLINE ( IOAPI_PREFIX_ ## _subsys, _api_func )
 
 /* Include all architecture-independent I/O API headers */
+#include <ipxe/efi/efi_io.h>
 
 /* Include all architecture-dependent I/O API headers */
 #include <bits/io.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ip6.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ip6.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ip6.h	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ip6.h	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,80 @@
+#ifndef _IPXE_IP6_H
+#define _IPXE_IP6_H
+
+/** @file
+ *
+ * IP6 protocol
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <stdint.h>
+#include <ipxe/in.h>
+#include <ipxe/netdevice.h>
+#include <ipxe/tcpip.h>
+
+/* IP6 constants */
+
+#define IP6_VERSION	0x6
+#define IP6_HOP_LIMIT	255
+
+/**
+ * I/O buffer contents
+ * This is duplicated in tcp.h and here. Ideally it should go into iobuf.h
+ */
+#define MAX_HDR_LEN	100
+#define MAX_IOB_LEN	1500
+#define MIN_IOB_LEN	MAX_HDR_LEN + 100 /* To account for padding by LL */
+
+#define IP6_EQUAL( in6_addr1, in6_addr2 ) \
+        ( memcmp ( ( char* ) &( in6_addr1 ), ( char* ) &( in6_addr2 ),\
+	sizeof ( struct in6_addr ) ) == 0 )
+
+#define IS_UNSPECIFIED( addr ) \
+	( ( (addr).in6_u.u6_addr32[0] == 0x00000000 ) && \
+	( (addr).in6_u.u6_addr32[1] == 0x00000000 ) && \
+	( (addr).in6_u.u6_addr32[2] == 0x00000000 ) && \
+	( (addr).in6_u.u6_addr32[3] == 0x00000000 ) )
+/* IP6 header */
+struct ip6_header {
+	uint32_t 	ver_traffic_class_flow_label;
+	uint16_t 	payload_len;
+	uint8_t 	nxt_hdr;
+	uint8_t 	hop_limit;
+	struct in6_addr src;
+	struct in6_addr dest;
+};
+
+/* IP6 pseudo header */
+struct ipv6_pseudo_header {
+	struct in6_addr src;
+	struct in6_addr dest;
+	uint8_t zero_padding;
+	uint8_t nxt_hdr;
+	uint16_t len;
+};
+
+/* Next header numbers */
+#define IP6_HOPBYHOP 		0x00
+#define IP6_ROUTING 		0x43
+#define IP6_FRAGMENT		0x44
+#define IP6_AUTHENTICATION	0x51
+#define IP6_DEST_OPTS		0x60
+#define IP6_ESP			0x50
+#define IP6_ICMP6		0x58
+#define IP6_NO_HEADER		0x59
+
+struct io_buffer;
+
+extern struct net_protocol ipv6_protocol __net_protocol;
+extern struct tcpip_net_protocol ipv6_tcpip_protocol __tcpip_net_protocol;
+extern char * inet6_ntoa ( struct in6_addr in6 );
+
+extern int add_ipv6_address ( struct net_device *netdev,
+			      struct in6_addr prefix, int prefix_len,
+			      struct in6_addr address,
+			      struct in6_addr gateway );
+extern void del_ipv6_address ( struct net_device *netdev );
+
+#endif /* _IPXE_IP6_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ip.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ip.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ip.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ip.h	2012-01-06 23:49:04.000000000 +0000
@@ -70,10 +70,20 @@
 	struct in_addr gateway;
 };
 
+/* IPv4 fragment reassembly buffer */
+struct ipv4_fragment {
+	/* List of fragment reassembly buffers */
+	struct list_head list;
+	/** Reassembled packet */
+	struct io_buffer *iobuf;
+	/** Current offset */
+	size_t offset;
+	/** Reassembly timer */
+	struct retry_timer timer;
+};
+
 extern struct list_head ipv4_miniroutes;
 
 extern struct net_protocol ipv4_protocol __net_protocol;
 
-extern int ipv4_has_any_addr ( struct net_device *netdev );
-
 #endif /* _IPXE_IP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ipoib.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ipoib.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ipoib.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ipoib.h	2012-01-06 23:49:04.000000000 +0000
@@ -8,7 +8,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <ipxe/if_arp.h>
 #include <ipxe/infiniband.h>
 
 /** IPoIB MAC address length */
@@ -34,32 +33,25 @@
 	/** Network-layer protocol */
 	uint16_t proto;
 	/** Reserved, must be zero */
-	uint16_t reserved;
+	union {
+		/** Reserved, must be zero */
+		uint16_t reserved;
+		/** Peer addresses
+		 *
+		 * We use these fields internally to represent the
+		 * peer addresses using a lookup key.  There simply
+		 * isn't enough room in the IPoIB header to store
+		 * literal source or destination MAC addresses.
+		 */
+		struct {
+			/** Destination address key */
+			uint8_t dest;
+			/** Source address key */
+			uint8_t src;
+		} __attribute__ (( packed )) peer;
+	} __attribute__ (( packed )) u;
 } __attribute__ (( packed ));
 
-/** GUID mask used for constructing eIPoIB Local Ethernet MAC address (LEMAC) */
-#define IPOIB_GUID_MASK 0xe7
-
-/** eIPoIB Remote Ethernet MAC address
- *
- * An eIPoIB REMAC address is an Ethernet-like (6 byte) link-layer
- * pseudo-address used to look up a full IPoIB link-layer address.
- */
-struct ipoib_remac {
-	/** Remote QPN
-	 *
-	 * Must be ORed with EIPOIB_QPN_LA so that eIPoIB REMAC
-	 * addresses are considered as locally-assigned Ethernet MAC
-	 * addreses.
-	 */
-	uint32_t qpn;
-	/** Remote LID */
-	uint16_t lid;
-} __attribute__ (( packed ));
-
-/** eIPoIB REMAC locally-assigned address indicator */
-#define EIPOIB_QPN_LA 0x02000000UL
-
 extern const char * ipoib_ntoa ( const void *ll_addr );
 extern struct net_device * alloc_ipoibdev ( size_t priv_size );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ipv6.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ipv6.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ipv6.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ipv6.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,241 +0,0 @@
-#ifndef _IPXE_IPV6_H
-#define _IPXE_IPV6_H
-
-/** @file
- *
- * IPv6 protocol
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <string.h>
-#include <byteswap.h>
-#include <ipxe/in.h>
-#include <ipxe/list.h>
-#include <ipxe/netdevice.h>
-
-/** IPv6 version */
-#define IPV6_VER 0x60000000UL
-
-/** IPv6 version mask */
-#define IPV6_MASK_VER 0xf0000000UL
-
-/** IPv6 maximum hop limit */
-#define IPV6_HOP_LIMIT 0xff
-
-/** IPv6 header */
-struct ipv6_header {
-	/** Version (4 bits), Traffic class (8 bits), Flow label (20 bits) */
-	uint32_t ver_tc_label;
-	/** Payload length, including any extension headers */
-	uint16_t len;
-	/** Next header type */
-	uint8_t next_header;
-	/** Hop limit */
-	uint8_t hop_limit;
-	/** Source address */
-	struct in6_addr src;
-	/** Destination address */
-	struct in6_addr dest;
-} __attribute__ (( packed ));
-
-/** IPv6 extension header common fields */
-struct ipv6_extension_header_common {
-	/** Next header type */
-	uint8_t next_header;
-	/** Header extension length (excluding first 8 bytes) */
-	uint8_t len;
-} __attribute__ (( packed ));
-
-/** IPv6 type-length-value options */
-struct ipv6_option {
-	/** Type */
-	uint8_t type;
-	/** Length */
-	uint8_t len;
-	/** Value */
-	uint8_t value[0];
-} __attribute__ (( packed ));
-
-/** IPv6 option types */
-enum ipv6_option_type {
-	/** Pad1 */
-	IPV6_OPT_PAD1 = 0x00,
-	/** PadN */
-	IPV6_OPT_PADN = 0x01,
-};
-
-/** Test if IPv6 option can be safely ignored */
-#define IPV6_CAN_IGNORE_OPT( type ) ( ( (type) & 0xc0 ) == 0x00 )
-
-/** IPv6 option-based extension header */
-struct ipv6_options_header {
-	/** Extension header common fields */
-	struct ipv6_extension_header_common common;
-	/** Options */
-	struct ipv6_option options[0];
-} __attribute__ (( packed ));
-
-/** IPv6 routing header */
-struct ipv6_routing_header {
-	/** Extension header common fields */
-	struct ipv6_extension_header_common common;
-	/** Routing type */
-	uint8_t type;
-	/** Segments left */
-	uint8_t remaining;
-	/** Type-specific data */
-	uint8_t data[0];
-} __attribute__ (( packed ));
-
-/** IPv6 fragment header */
-struct ipv6_fragment_header {
-	/** Extension header common fields */
-	struct ipv6_extension_header_common common;
-	/** Fragment offset (13 bits), reserved, more fragments (1 bit) */
-	uint16_t offset_more;
-	/** Identification */
-	uint32_t ident;
-} __attribute__ (( packed ));
-
-/** Fragment offset mask */
-#define IPV6_MASK_OFFSET 0xfff8
-
-/** More fragments */
-#define IPV6_MASK_MOREFRAGS 0x0001
-
-/** IPv6 extension header */
-union ipv6_extension_header {
-	/** Extension header common fields */
-	struct ipv6_extension_header_common common;
-	/** Minimum size padding */
-	uint8_t pad[8];
-	/** Generic options header */
-	struct ipv6_options_header options;
-	/** Hop-by-hop options header */
-	struct ipv6_options_header hopbyhop;
-	/** Routing header */
-	struct ipv6_routing_header routing;
-	/** Fragment header */
-	struct ipv6_fragment_header fragment;
-	/** Destination options header */
-	struct ipv6_options_header destination;
-};
-
-/** IPv6 header types */
-enum ipv6_header_type {
-	/** IPv6 hop-by-hop options header type */
-	IPV6_HOPBYHOP = 0,
-	/** IPv6 routing header type */
-	IPV6_ROUTING = 43,
-	/** IPv6 fragment header type */
-	IPV6_FRAGMENT = 44,
-	/** IPv6 no next header type */
-	IPV6_NO_HEADER = 59,
-	/** IPv6 destination options header type */
-	IPV6_DESTINATION = 60,
-};
-
-/** IPv6 pseudo-header */
-struct ipv6_pseudo_header {
-	/** Source address */
-	struct in6_addr src;
-	/** Destination address */
-	struct in6_addr dest;
-	/** Upper-layer packet length */
-	uint32_t len;
-	/** Zero padding */
-	uint8_t zero[3];
-	/** Next header */
-	uint8_t next_header;
-} __attribute__ (( packed ));
-
-/** An IPv6 address/routing table entry */
-struct ipv6_miniroute {
-	/** List of miniroutes */
-	struct list_head list;
-
-	/** Network device */
-	struct net_device *netdev;
-
-	/** IPv6 address */
-	struct in6_addr address;
-	/** Prefix length */
-	unsigned int prefix_len;
-	/** IPv6 prefix mask (derived from prefix length) */
-	struct in6_addr prefix_mask;
-	/** Router address is present */
-	int has_router;
-	/** Router address */
-	struct in6_addr router;
-};
-
-/**
- * Construct local IPv6 address via EUI-64
- *
- * @v addr		Prefix to be completed
- * @v netdev		Network device
- * @ret prefix_len	Prefix length, or negative error
- */
-static inline int ipv6_eui64 ( struct in6_addr *addr,
-			       struct net_device *netdev ) {
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	const void *ll_addr = netdev->ll_addr;
-	int rc;
-
-	if ( ( rc = ll_protocol->eui64 ( ll_addr, &addr->s6_addr[8] ) ) != 0 )
-		return rc;
-	addr->s6_addr[8] ^= 0x02;
-	return 64;
-}
-
-/**
- * Construct link-local address via EUI-64
- *
- * @v addr		Zeroed address to construct
- * @v netdev		Network device
- * @ret prefix_len	Prefix length, or negative error
- */
-static inline int ipv6_link_local ( struct in6_addr *addr,
-				    struct net_device *netdev ) {
-
-	addr->s6_addr16[0] = htons ( 0xfe80 );
-	return ipv6_eui64 ( addr, netdev );
-}
-
-/**
- * Construct solicited-node multicast address
- *
- * @v addr		Zeroed address to construct
- * @v unicast		Unicast address
- */
-static inline void ipv6_solicited_node ( struct in6_addr *addr,
-					 const struct in6_addr *unicast ) {
-
-	addr->s6_addr16[0] = htons ( 0xff02 );
-	addr->s6_addr[11] = 1;
-	addr->s6_addr[12] = 0xff;
-	memcpy ( &addr->s6_addr[13], &unicast->s6_addr[13], 3 );
-}
-
-/**
- * Construct all-routers multicast address
- *
- * @v addr		Zeroed address to construct
- */
-static inline void ipv6_all_routers ( struct in6_addr *addr ) {
-	addr->s6_addr16[0] = htons ( 0xff02 );
-	addr->s6_addr[15] = 2;
-}
-
-extern struct list_head ipv6_miniroutes;
-
-extern struct net_protocol ipv6_protocol __net_protocol;
-
-extern int ipv6_has_addr ( struct net_device *netdev, struct in6_addr *addr );
-extern int ipv6_slaac ( struct net_device *netdev, struct in6_addr *prefix,
-			unsigned int prefix_len, struct in6_addr *router );
-
-#endif /* _IPXE_IPV6_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/isapnp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/isapnp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/isapnp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/isapnp.h	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
-*    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-*    02110-1301, USA.
+*    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 *
 *    Portions of this code:
 *		Copyright (C) 2001  P.J.H.Fox (fox@roestock.demon.co.uk)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iscsi.h ipxe-1.0.1~lliurex1505/src/include/ipxe/iscsi.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iscsi.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/iscsi.h	2012-01-06 23:49:04.000000000 +0000
@@ -36,7 +36,7 @@
 		 */
 		uint8_t data_len[3];
 	} bytes;
-	/** The data length (measured in bytes), in network byte
+	/** Ths data length (measured in bytes), in network byte
 	 * order, with ahs_len as the first byte.
 	 */
 	uint32_t ahs_and_data_len;
@@ -515,6 +515,8 @@
 	ISCSI_TX_AHS,
 	/** Sending the data segment */
 	ISCSI_TX_DATA,
+	/** Sending the data segment padding */
+	ISCSI_TX_DATA_PADDING,
 };
 
 /** State of an iSCSI RX engine */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iso9660.h ipxe-1.0.1~lliurex1505/src/include/ipxe/iso9660.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/iso9660.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/iso9660.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,44 +0,0 @@
-#ifndef _IPXE_ISO9660_H
-#define _IPXE_ISO9660_H
-
-/**
- * @file
- *
- * ISO9660 CD-ROM specification
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-/** ISO9660 block size */
-#define ISO9660_BLKSIZE 2048
-
-/** An ISO9660 Primary Volume Descriptor (fixed portion) */
-struct iso9660_primary_descriptor_fixed {
-	/** Descriptor type */
-	uint8_t type;
-	/** Identifier ("CD001") */
-	uint8_t id[5];
-} __attribute__ (( packed ));
-
-/** An ISO9660 Primary Volume Descriptor */
-struct iso9660_primary_descriptor {
-	/** Fixed portion */
-	struct iso9660_primary_descriptor_fixed fixed;
-} __attribute__ (( packed ));
-
-/** ISO9660 Primary Volume Descriptor type */
-#define ISO9660_TYPE_PRIMARY 0x01
-
-/** ISO9660 Primary Volume Descriptor block address */
-#define ISO9660_PRIMARY_LBA 16
-
-/** ISO9660 Boot Volume Descriptor type */
-#define ISO9660_TYPE_BOOT 0x00
-
-/** ISO9660 identifier */
-#define ISO9660_ID "CD001"
-
-#endif /* _IPXE_ISO9660_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/job.h ipxe-1.0.1~lliurex1505/src/include/ipxe/job.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/job.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/job.h	2012-01-06 23:49:04.000000000 +0000
@@ -30,9 +30,9 @@
 	unsigned long total;
 };
 
-extern int job_progress ( struct interface *intf,
-			  struct job_progress *progress );
+extern void job_progress ( struct interface *intf,
+			   struct job_progress *progress );
 #define job_progress_TYPE( object_type ) \
-	typeof ( int ( object_type, struct job_progress *progress ) )
+	typeof ( void ( object_type, struct job_progress *progress ) )
 
 #endif /* _IPXE_JOB_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/lineconsole.h ipxe-1.0.1~lliurex1505/src/include/ipxe/lineconsole.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/lineconsole.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/lineconsole.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,36 +0,0 @@
-#ifndef _IPXE_LINECONSOLE_H
-#define _IPXE_LINECONSOLE_H
-
-/** @file
- *
- * Line-based console
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/ansiesc.h>
-
-/** A line-based console */
-struct line_console {
-	/** Data buffer
-	 *
-	 * Must initially be filled with NULs
-	 */
-	char *buffer;
-	/** Current index within buffer */
-	size_t index;
-	/** Length of buffer
-	 *
-	 * The final character of the buffer will only ever be used as
-	 * a potential terminating NUL.
-	 */
-	size_t len;
-	/** ANSI escape sequence context */
-	struct ansiesc_context ctx;
-};
-
-extern size_t line_putchar ( struct line_console *line, int character );
-
-#endif /* _IPXE_LINECONSOLE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_entropy.h ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,32 +0,0 @@
-#ifndef _IPXE_LINUX_ENTROPY_H
-#define _IPXE_LINUX_ENTROPY_H
-
-/** @file
- *
- * iPXE entropy API for linux
- *
- */
-
-FILE_LICENCE(GPL2_OR_LATER);
-
-#ifdef ENTROPY_LINUX
-#define ENTROPY_PREFIX_linux
-#else
-#define ENTROPY_PREFIX_linux __linux_
-#endif
-
-/**
- * min-entropy per sample
- *
- * @ret min_entropy	min-entropy of each sample
- */
-static inline __always_inline double
-ENTROPY_INLINE ( linux, min_entropy_per_sample ) ( void ) {
-
-	/* We read single bytes from /dev/random and assume that each
-	 * contains full entropy.
-	 */
-	return 8;
-}
-
-#endif /* _IPXE_LINUX_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_pci.h ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_pci.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_pci.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_pci.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,130 +0,0 @@
-#ifndef _IPXE_LINUX_PCI_H
-#define _IPXE_LINUX_PCI_H
-
-/** @file
- *
- * iPXE PCI API for Linux
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef PCIAPI_LINUX
-#define PCIAPI_PREFIX_linux
-#else
-#define PCIAPI_PREFIX_linux __linux_
-#endif
-
-struct pci_device;
-
-extern int linux_pci_read ( struct pci_device *pci, unsigned long where,
-			    unsigned long *value, size_t len );
-extern int linux_pci_write ( struct pci_device *pci, unsigned long where,
-			     unsigned long value, size_t len );
-
-/**
- * Read byte from PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value read
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_read_config_byte ) ( struct pci_device *pci,
-						unsigned int where,
-						uint8_t *value ) {
-	int rc;
-	unsigned long tmp;
-
-	rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) );
-	*value = tmp;
-	return rc;
-}
-
-/**
- * Read word from PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value read
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_read_config_word ) ( struct pci_device *pci,
-						unsigned int where,
-						uint16_t *value ) {
-	int rc;
-	unsigned long tmp;
-
-	rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) );
-	*value = tmp;
-	return rc;
-}
-
-/**
- * Read dword from PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value read
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_read_config_dword ) ( struct pci_device *pci,
-						 unsigned int where,
-						 uint32_t *value ) {
-	int rc;
-	unsigned long tmp;
-
-	rc = linux_pci_read ( pci, where, &tmp, sizeof ( *value ) );
-	*value = tmp;
-	return rc;
-}
-
-/**
- * Write byte to PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value to be written
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_write_config_byte ) ( struct pci_device *pci,
-						 unsigned int where,
-						 uint8_t value ) {
-	return linux_pci_write ( pci, where, value, sizeof ( value ) );
-}
-
-/**
- * Write word to PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value to be written
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_write_config_word ) ( struct pci_device *pci,
-						 unsigned int where,
-						 uint16_t value ) {
-	return linux_pci_write ( pci, where, value, sizeof ( value ) );
-}
-
-/**
- * Write dword to PCI configuration space
- *
- * @v pci	PCI device
- * @v where	Location within PCI configuration space
- * @v value	Value to be written
- * @ret rc	Return status code
- */
-static inline __always_inline int
-PCIAPI_INLINE ( linux, pci_write_config_dword ) ( struct pci_device *pci,
-						  unsigned int where,
-						  uint32_t value ) {
-	return linux_pci_write ( pci, where, value, sizeof ( value ) );
-}
-
-#endif /* _IPXE_LINUX_PCI_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_time.h ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_LINUX_TIME_H
-#define _IPXE_LINUX_TIME_H
-
-/** @file
- *
- * Linux time source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef TIME_LINUX
-#define TIME_PREFIX_linux
-#else
-#define TIME_PREFIX_linux __linux_
-#endif
-
-#endif /* _IPXE_LINUX_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_uaccess.h ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_uaccess.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux/linux_uaccess.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/linux/linux_uaccess.h	2012-01-06 23:49:04.000000000 +0000
@@ -71,12 +71,6 @@
 	return trivial_userptr_add(userptr, offset);
 }
 
-static inline __always_inline off_t
-UACCESS_INLINE(linux, userptr_sub)(userptr_t userptr, userptr_t subtrahend)
-{
-	return trivial_userptr_sub ( userptr, subtrahend );
-}
-
 static inline __always_inline void
 UACCESS_INLINE(linux, memcpy_user)(userptr_t dest, off_t dest_off, userptr_t src, off_t src_off, size_t len)
 {
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux.h ipxe-1.0.1~lliurex1505/src/include/ipxe/linux.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/linux.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/linux.h	2012-01-06 23:49:04.000000000 +0000
@@ -30,14 +30,6 @@
 #include <ipxe/device.h>
 #include <ipxe/settings.h>
 
-/**
- * Convert a Linux error number to an iPXE status code
- *
- * @v errno		Linux error number
- * @ret rc		iPXE status code (before negation)
- */
-#define ELINUX( errno ) EPLATFORM ( EINFO_EPLATFORM, errno )
-
 /** A linux device */
 struct linux_device {
 	/** Generic device */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/list.h ipxe-1.0.1~lliurex1505/src/include/ipxe/list.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/list.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/list.h	2012-01-06 23:49:04.000000000 +0000
@@ -42,9 +42,9 @@
  *
  * @v list		List head
  */
-#define INIT_LIST_HEAD( list ) do {				\
-	(list)->next = (list);					\
-	(list)->prev = (list);					\
+#define INIT_LIST_HEAD( list ) do {			\
+	(list)->next = (list);				\
+	(list)->prev = (list);				\
 	} while ( 0 )
 
 /**
@@ -52,35 +52,43 @@
  *
  * @v list		List entry or head
  */
-#define list_check( list ) ( {					\
-	assert ( (list) != NULL );				\
-	assert ( (list)->prev != NULL );			\
-	assert ( (list)->next != NULL );			\
-	assert ( (list)->next->prev == (list) );		\
-	assert ( (list)->prev->next == (list) );		\
+#define list_check( list ) ( {				\
+	assert ( (list) != NULL );			\
+	assert ( (list)->prev != NULL );		\
+	assert ( (list)->next != NULL );		\
+	assert ( (list)->next->prev == (list) );	\
+	assert ( (list)->prev->next == (list) );	\
 	} )
 
 /**
+ * Insert a list entry between two known consecutive entries
+ *
+ * @v new		New list entry
+ * @v prev		Previous list entry
+ * @v next		Next list entry
+ */
+static inline void __list_add ( struct list_head *new,
+				struct list_head *prev,
+				struct list_head *next ) {
+	next->prev = new;
+	new->next = next;
+	new->prev = prev;
+	prev->next = new;
+}
+
+/**
  * Add a new entry to the head of a list
  *
  * @v new		New entry to be added
  * @v head		List head, or entry after which to add the new entry
  */
-#define list_add( new, head ) do {				\
-	list_check ( (head) );					\
-	extern_list_add ( (new), (head) );			\
-	} while ( 0 )
-static inline void inline_list_add ( struct list_head *new,
-				     struct list_head *head ) {
-	struct list_head *prev = head;
-	struct list_head *next = head->next;
-	next->prev = (new);
-	(new)->next = next;
-	(new)->prev = prev;
-	prev->next = (new);
+static inline void list_add ( struct list_head *new, struct list_head *head ) {
+	__list_add ( new, head, head->next );
 }
-extern void extern_list_add ( struct list_head *new,
-			      struct list_head *head );
+#define list_add( new, head ) do {			\
+	list_check ( (head) );				\
+	list_add ( (new), (head) );			\
+	} while ( 0 )
 
 /**
  * Add a new entry to the tail of a list
@@ -88,21 +96,26 @@
  * @v new		New entry to be added
  * @v head		List head, or entry before which to add the new entry
  */
-#define list_add_tail( new, head ) do {				\
-	list_check ( (head) );					\
-	extern_list_add_tail ( (new), (head) );			\
+static inline void list_add_tail ( struct list_head *new,
+				   struct list_head *head ) {
+	__list_add ( new, head->prev, head );
+}
+#define list_add_tail( new, head ) do {			\
+	list_check ( (head) );				\
+	list_add_tail ( (new), (head) );		\
 	} while ( 0 )
-static inline void inline_list_add_tail ( struct list_head *new,
-					  struct list_head *head ) {
-	struct list_head *prev = head->prev;
-	struct list_head *next = head;
-	next->prev = (new);
-	(new)->next = next;
-	(new)->prev = prev;
-	prev->next = (new);
+
+/**
+ * Delete a list entry between two known consecutive entries
+ *
+ * @v prev		Previous list entry
+ * @v next		Next list entry
+ */
+static inline void __list_del ( struct list_head *prev,
+				struct list_head *next ) {
+	next->prev = prev;
+	prev->next = next;
 }
-extern void extern_list_add_tail ( struct list_head *new,
-				   struct list_head *head );
 
 /**
  * Delete an entry from a list
@@ -112,43 +125,37 @@
  * Note that list_empty() on entry does not return true after this;
  * the entry is in an undefined state.
  */
-#define list_del( list ) do {					\
-	list_check ( (list) );					\
-	inline_list_del ( (list) );				\
-	} while ( 0 )
-static inline void inline_list_del ( struct list_head *list ) {
-	struct list_head *next = (list)->next;
-	struct list_head *prev = (list)->prev;
-	next->prev = prev;
-	prev->next = next;
+static inline void list_del ( struct list_head *list ) {
+	__list_del ( list->prev, list->next );
 }
-extern void extern_list_del ( struct list_head *list );
+#define list_del( list ) do {				\
+	list_check ( (list) );				\
+	list_del ( (list) );				\
+	} while ( 0 )
 
 /**
  * Test whether a list is empty
  *
  * @v list		List head
  */
-#define list_empty( list ) ( {					\
-	list_check ( (list) );					\
-	inline_list_empty ( (list) ); } )
-static inline int inline_list_empty ( const struct list_head *list ) {
+static inline int list_empty ( const struct list_head *list ) {
 	return ( list->next == list );
 }
-extern int extern_list_empty ( const struct list_head *list );
+#define list_empty( list ) ( {				\
+	list_check ( (list) );				\
+	list_empty ( (list) ); } )
 
 /**
  * Test whether a list has just one entry
  *
  * @v list		List to test
  */
-#define list_is_singular( list ) ( {				\
-	list_check ( (list) );					\
-	inline_list_is_singular ( (list) ); } )
-static inline int inline_list_is_singular ( const struct list_head *list ) {
+static inline int list_is_singular ( const struct list_head *list ) {
 	return ( ( ! list_empty ( list ) ) && ( list->next == list->prev ) );
 }
-extern int extern_list_is_singular ( const struct list_head *list );
+#define list_is_singular( list ) ( {			\
+	list_check ( (list) );				\
+	list_is_singular ( (list) ); } )
 
 /**
  * Test whether an entry is the last entry in list
@@ -156,16 +163,14 @@
  * @v list		List entry to test
  * @v head		List head
  */
-#define list_is_last( list, head ) ( {				\
-	list_check ( (list) );					\
-	list_check ( (head) );					\
-	inline_list_is_last ( (list), (head) ); } )
-static inline int inline_list_is_last ( const struct list_head *list,
-					const struct list_head *head ) {
+static inline int list_is_last ( const struct list_head *list,
+				 const struct list_head *head ) {
 	return ( list->next == head );
 }
-extern int extern_list_is_last ( const struct list_head *list,
-				 const struct list_head *head );
+#define list_is_last( list, head ) ( {			\
+	list_check ( (list) );				\
+	list_check ( (head) );				\
+	list_is_last ( (list), (head) ); } )
 
 /**
  * Cut a list into two
@@ -178,16 +183,9 @@
  * @c new, which should be an empty list.  @c entry may be equal to @c
  * list, in which case no entries are moved.
  */
-#define list_cut_position( new, list, entry ) do {		\
-	list_check ( (new) );					\
-	assert ( list_empty ( (new) ) );			\
-	list_check ( (list) );					\
-	list_check ( (entry) );					\
-	extern_list_cut_position ( (new), (list), (entry) );	\
-	} while ( 0 )
-static inline void inline_list_cut_position ( struct list_head *new,
-					      struct list_head *list,
-					      struct list_head *entry ) {
+static inline void list_cut_position ( struct list_head *new,
+				       struct list_head *list,
+				       struct list_head *entry ) {
 	struct list_head *first = entry->next;
 
 	if ( list != entry ) {
@@ -199,9 +197,13 @@
 		list->next->prev = list;
 	}
 }
-extern void extern_list_cut_position ( struct list_head *new,
-				       struct list_head *list,
-				       struct list_head *entry );
+#define list_cut_position( new, list, entry ) do {	\
+	list_check ( (new) );				\
+	assert ( list_empty ( (new) ) );		\
+	list_check ( (list) );				\
+	list_check ( (entry) );				\
+	list_cut_position ( (new), (list), (entry) );	\
+	} while ( 0 )
 
 /**
  * Move all entries from one list into another list
@@ -213,13 +215,8 @@
  * list is left in an undefined state; use @c list_splice_init() if
  * you want @c list to become an empty list.
  */
-#define list_splice( list, entry ) do {				\
-	list_check ( (list) );					\
-	list_check ( (entry) );					\
-	extern_list_splice ( (list), (entry) );			\
-	} while ( 0 )
-static inline void inline_list_splice ( const struct list_head *list,
-					struct list_head *entry ) {
+static inline void list_splice ( const struct list_head *list,
+				 struct list_head *entry ) {
 	struct list_head *first = list->next;
 	struct list_head *last = list->prev;
 
@@ -230,8 +227,11 @@
 		first->prev->next = first;
 	}
 }
-extern void extern_list_splice ( const struct list_head *list,
-				 struct list_head *entry );
+#define list_splice( list, entry ) do {			\
+	list_check ( (list) );				\
+	list_check ( (entry) );				\
+	list_splice ( (list), (entry) );		\
+	} while ( 0 )
 
 /**
  * Move all entries from one list into another list
@@ -243,13 +243,8 @@
  * list is left in an undefined state; use @c list_splice_tail_init() if
  * you want @c list to become an empty list.
  */
-#define list_splice_tail( list, entry ) do {			\
-	list_check ( (list) );					\
-	list_check ( (entry) );					\
-	extern_list_splice_tail ( (list), (entry) );		\
-	} while ( 0 )
-static inline void inline_list_splice_tail ( const struct list_head *list,
-					     struct list_head *entry ) {
+static inline void list_splice_tail ( const struct list_head *list,
+				      struct list_head *entry ) {
 	struct list_head *first = list->next;
 	struct list_head *last = list->prev;
 
@@ -260,8 +255,11 @@
 		last->next->prev = last;
 	}
 }
-extern void extern_list_splice_tail ( const struct list_head *list,
-				      struct list_head *entry );
+#define list_splice_tail( list, entry ) do {		\
+	list_check ( (list) );				\
+	list_check ( (entry) );				\
+	list_splice_tail ( (list), (entry) );		\
+	} while ( 0 )
 
 /**
  * Move all entries from one list into another list and reinitialise empty list
@@ -271,18 +269,16 @@
  *
  * All entries from @c list are inserted after @c entry.
  */
-#define list_splice_init( list, entry ) do {			\
-	list_check ( (list) );					\
-	list_check ( (entry) );					\
-	extern_list_splice_init ( (list), (entry) );		\
-	} while ( 0 )
-static inline void inline_list_splice_init ( struct list_head *list,
-					     struct list_head *entry ) {
+static inline void list_splice_init ( struct list_head *list,
+				      struct list_head *entry ) {
 	list_splice ( list, entry );
 	INIT_LIST_HEAD ( list );
 }
-extern void extern_list_splice_init ( struct list_head *list,
-				      struct list_head *entry );
+#define list_splice_init( list, entry ) do {			\
+	list_check ( (list) );				\
+	list_check ( (entry) );				\
+	list_splice_init ( (list), (entry) );		\
+	} while ( 0 )
 
 /**
  * Move all entries from one list into another list and reinitialise empty list
@@ -292,19 +288,16 @@
  *
  * All entries from @c list are inserted before @c entry.
  */
-#define list_splice_tail_init( list, entry ) do {		\
-	list_check ( (list) );					\
-	list_check ( (entry) );					\
-	extern_list_splice_tail_init ( (list), (entry) );	\
-	} while ( 0 )
-
-static inline void inline_list_splice_tail_init ( struct list_head *list,
-						  struct list_head *entry ) {
+static inline void list_splice_tail_init ( struct list_head *list,
+					   struct list_head *entry ) {
 	list_splice_tail ( list, entry );
 	INIT_LIST_HEAD ( list );
 }
-extern void extern_list_splice_tail_init ( struct list_head *list,
-					   struct list_head *entry );
+#define list_splice_tail_init( list, entry ) do {	\
+	list_check ( (list) );				\
+	list_check ( (entry) );				\
+	list_splice_tail_init ( (list), (entry) );	\
+	} while ( 0 )
 
 /**
  * Get the container of a list entry
@@ -314,8 +307,8 @@
  * @v member		Name of list field within containing type
  * @ret container	Containing object
  */
-#define list_entry( list, type, member ) ( {			\
-	list_check ( (list) );					\
+#define list_entry( list, type, member ) ( {		\
+	list_check ( (list) );				\
 	container_of ( list, type, member ); } )
 
 /**
@@ -326,25 +319,12 @@
  * @v member		Name of list field within containing type
  * @ret first		First list entry, or NULL
  */
-#define list_first_entry( list, type, member )			\
-	( list_empty ( (list) ) ?				\
-	  ( type * ) NULL :					\
+#define list_first_entry( list, type, member )		\
+	( list_empty ( (list) ) ?			\
+	  ( type * ) NULL :				\
 	  list_entry ( (list)->next, type, member ) )
 
 /**
- * Get the container of the last entry in a list
- *
- * @v list		List head
- * @v type		Containing type
- * @v member		Name of list field within containing type
- * @ret first		First list entry, or NULL
- */
-#define list_last_entry( list, type, member )			\
-	( list_empty ( (list) ) ?				\
-	  ( type * ) NULL :					\
-	  list_entry ( (list)->prev, type, member ) )
-
-/**
  * Iterate over a list
  *
  * @v pos		Iterator
@@ -399,44 +379,14 @@
 	      tmp = list_entry ( tmp->member.next, typeof ( *tmp ), member ) )
 
 /**
- * Iterate over entries in a list, starting after current position
- *
- * @v pos		Iterator
- * @v head		List head
- * @v member		Name of list field within iterator's type
- */
-#define list_for_each_entry_continue( pos, head, member )		      \
-	for ( list_check ( (head) ),					      \
-	      pos = list_entry ( pos->member.next, typeof ( *pos ), member ); \
-	      &pos->member != (head);					      \
-	      pos = list_entry ( pos->member.next, typeof ( *pos ), member ) )
-
-/**
- * Iterate over entries in a list in reverse, starting after current position
- *
- * @v pos		Iterator
- * @v head		List head
- * @v member		Name of list field within iterator's type
- */
-#define list_for_each_entry_continue_reverse( pos, head, member )	      \
-	for ( list_check ( (head) ),					      \
-	      pos = list_entry ( pos->member.prev, typeof ( *pos ), member ); \
-	      &pos->member != (head);					      \
-	      pos = list_entry ( pos->member.prev, typeof ( *pos ), member ) )
-
-/**
  * Test if list contains a specified entry
  *
  * @v entry		Entry
  * @v head		List head
  * @ret present		List contains specified entry
  */
-#define list_contains( entry, head ) ( {			\
-	list_check ( (head) );					\
-	list_check ( (entry) );					\
-	extern_list_contains ( (entry), (head) ); } )
-static inline int inline_list_contains ( struct list_head *entry,
-					 struct list_head *head ) {
+static inline int list_contains ( struct list_head *entry,
+				  struct list_head *head ) {
 	struct list_head *tmp;
 
 	list_for_each ( tmp, head ) {
@@ -445,8 +395,10 @@
 	}
 	return 0;
 }
-extern int extern_list_contains ( struct list_head *entry,
-				  struct list_head *head );
+#define list_contains( entry, head ) ( {		\
+	list_check ( (head) );				\
+	list_check ( (entry) );				\
+	list_contains ( (entry), (head) ); } )
 
 /**
  * Test if list contains a specified entry
@@ -455,7 +407,7 @@
  * @v head		List head
  * @ret present		List contains specified entry
  */
-#define list_contains_entry( entry, head, member )		\
+#define list_contains_entry( entry, head, member )	\
 	list_contains ( &(entry)->member, (head) )
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/malloc.h ipxe-1.0.1~lliurex1505/src/include/ipxe/malloc.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/malloc.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/malloc.h	2012-01-06 23:49:04.000000000 +0000
@@ -23,8 +23,7 @@
 
 extern size_t freemem;
 
-extern void * __malloc alloc_memblock ( size_t size, size_t align,
-					size_t offset );
+extern void * __malloc alloc_memblock ( size_t size, size_t align );
 extern void free_memblock ( void *ptr, size_t size );
 extern void mpopulate ( void *start, size_t len );
 extern void mdumpfree ( void );
@@ -34,38 +33,20 @@
  *
  * @v size		Requested size
  * @v align		Physical alignment
- * @v offset		Offset from physical alignment
  * @ret ptr		Memory, or NULL
  *
  * Allocates physically-aligned memory for DMA.
  *
  * @c align must be a power of two.  @c size may not be zero.
  */
-static inline void * __malloc malloc_dma_offset ( size_t size,
-						  size_t phys_align,
-						  size_t offset ) {
-	void * ptr = alloc_memblock ( size, phys_align, offset );
+static inline void * __malloc malloc_dma ( size_t size, size_t phys_align ) {
+	void * ptr = alloc_memblock ( size, phys_align );
 	if ( ptr && size )
 		VALGRIND_MALLOCLIKE_BLOCK ( ptr, size, 0, 0 );
 	return ptr;
 }
 
 /**
- * Allocate memory for DMA
- *
- * @v size		Requested size
- * @v align		Physical alignment
- * @ret ptr		Memory, or NULL
- *
- * Allocates physically-aligned memory for DMA.
- *
- * @c align must be a power of two.  @c size may not be zero.
- */
-static inline void * __malloc malloc_dma ( size_t size, size_t phys_align ) {
-	return malloc_dma_offset ( size, phys_align, 0 );
-}
-
-/**
  * Free memory allocated with malloc_dma()
  *
  * @v ptr		Memory allocated by malloc_dma(), or NULL
@@ -95,17 +76,6 @@
 #define CACHE_DISCARDERS __table ( struct cache_discarder, "cache_discarders" )
 
 /** Declare a cache discarder */
-#define __cache_discarder( cost ) __table_entry ( CACHE_DISCARDERS, cost )
-
-/** @defgroup cache_cost Cache discarder costs
- *
- * @{
- */
-
-#define CACHE_CHEAP	01	/**< Items with a low replacement cost */
-#define CACHE_NORMAL	02	/**< Items with a normal replacement cost */
-#define CACHE_EXPENSIVE	03	/**< Items with a high replacement cost */
-
-/** @} */
+#define __cache_discarder __table_entry ( CACHE_DISCARDERS, 01 )
 
 #endif /* _IPXE_MALLOC_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/md5.h ipxe-1.0.1~lliurex1505/src/include/ipxe/md5.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/md5.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/md5.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,72 +1,23 @@
 #ifndef _IPXE_MD5_H
 #define _IPXE_MD5_H
 
-/** @file
- *
- * MD5 algorithm
- *
- */
-
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <stdint.h>
-#include <ipxe/crypto.h>
-
-/** An MD5 digest */
-struct md5_digest {
-	/** Hash output */
-	uint32_t h[4];
-};
+struct digest_algorithm;
 
-/** An MD5 data block */
-union md5_block {
-	/** Raw bytes */
-	uint8_t byte[64];
-	/** Raw dwords */
-	uint32_t dword[16];
-	/** Final block structure */
-	struct {
-		/** Padding */
-		uint8_t pad[56];
-		/** Length in bits */
-		uint64_t len;
-	} final;
-};
+#include <stdint.h>
 
-/** MD5 digest and data block
- *
- * The order of fields within this structure is designed to minimise
- * code size.
- */
-struct md5_digest_data {
-	/** Digest of data already processed */
-	struct md5_digest digest;
-	/** Accumulated data */
-	union md5_block data;
-} __attribute__ (( packed ));
-
-/** MD5 digest and data block */
-union md5_digest_data_dwords {
-	/** Digest and data block */
-	struct md5_digest_data dd;
-	/** Raw dwords */
-	uint32_t dword[ sizeof ( struct md5_digest_data ) /
-			sizeof ( uint32_t ) ];
+#define MD5_DIGEST_SIZE		16
+#define MD5_BLOCK_WORDS		16
+#define MD5_HASH_WORDS		4
+
+struct md5_ctx {
+	u32 hash[MD5_HASH_WORDS];
+	u32 block[MD5_BLOCK_WORDS];
+	u64 byte_count;
 };
 
-/** An MD5 context */
-struct md5_context {
-	/** Amount of accumulated data */
-	size_t len;
-	/** Digest and accumulated data */
-	union md5_digest_data_dwords ddd;
-} __attribute__ (( packed ));
-
-/** MD5 context size */
-#define MD5_CTX_SIZE sizeof ( struct md5_context )
-
-/** MD5 digest size */
-#define MD5_DIGEST_SIZE sizeof ( struct md5_digest )
+#define MD5_CTX_SIZE sizeof ( struct md5_ctx )
 
 extern struct digest_algorithm md5_algorithm;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/memblock.h ipxe-1.0.1~lliurex1505/src/include/ipxe/memblock.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/memblock.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/memblock.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,17 +0,0 @@
-#ifndef _IPXE_MEMBLOCK_H
-#define _IPXE_MEMBLOCK_H
-
-/** @file
- *
- * Largest memory block
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/uaccess.h>
-
-extern size_t largest_memblock ( userptr_t *start );
-
-#endif /* _IPXE_MEMBLOCK_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/menu.h ipxe-1.0.1~lliurex1505/src/include/ipxe/menu.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/menu.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/menu.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,49 +0,0 @@
-#ifndef _IPXE_MENU_H
-#define _IPXE_MENU_H
-
-/** @file
- *
- * Menu selection
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/list.h>
-
-/** A menu */
-struct menu {
-	/** List of menus */
-	struct list_head list;
-	/** Name */
-	const char *name;
-	/** Title */
-	const char *title;
-	/** Menu items */
-	struct list_head items;
-};
-
-/** A menu item */
-struct menu_item {
-	/** List of menu items */
-	struct list_head list;
-	/** Label */
-	const char *label;
-	/** Text */
-	const char *text;
-	/** Shortcut key */
-	int shortcut;
-	/** Is default item */
-	int is_default;
-};
-
-extern struct menu * create_menu ( const char *name, const char *title );
-extern struct menu_item * add_menu_item ( struct menu *menu, const char *label,
-					  const char *text, int shortcut,
-					  int is_default );
-extern void destroy_menu ( struct menu *menu );
-extern struct menu * find_menu ( const char *name );
-extern int show_menu ( struct menu *menu, unsigned long timeout,
-		       const char *select, struct menu_item **selected );
-
-#endif /* _IPXE_MENU_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/mii.h ipxe-1.0.1~lliurex1505/src/include/ipxe/mii.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/mii.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/mii.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,87 +0,0 @@
-#ifndef _IPXE_MII_H
-#define _IPXE_MII_H
-
-/** @file
- *
- * Media Independent Interface
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <mii.h>
-#include <ipxe/netdevice.h>
-
-struct mii_interface;
-
-/** MII interface operations */
-struct mii_operations {
-	/**
-	 * Read from MII register
-	 *
-	 * @v mii		MII interface
-	 * @v reg		Register address
-	 * @ret data		Data read, or negative error
-	 */
-	int ( * read ) ( struct mii_interface *mii, unsigned int reg );
-	/**
-	 * Write to MII register
-	 *
-	 * @v mii		MII interface
-	 * @v reg		Register address
-	 * @v data		Data to write
-	 * @ret rc		Return status code
-	 */
-	int ( * write ) ( struct mii_interface *mii, unsigned int reg,
-			  unsigned int data );
-};
-
-/** An MII interface */
-struct mii_interface {
-	/** Interface operations */
-	struct mii_operations *op;
-};
-
-/**
- * Initialise MII interface
- *
- * @v mii		MII interface
- * @v op		MII interface operations
- */
-static inline __attribute__ (( always_inline )) void
-mii_init ( struct mii_interface *mii, struct mii_operations *op ) {
-	mii->op = op;
-}
-
-/**
- * Read from MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @ret data		Data read, or negative error
- */
-static inline __attribute__ (( always_inline )) int
-mii_read ( struct mii_interface *mii, unsigned int reg ) {
-	return mii->op->read ( mii, reg );
-}
-
-/**
- * Write to MII register
- *
- * @v mii		MII interface
- * @v reg		Register address
- * @v data		Data to write
- * @ret rc		Return status code
- */
-static inline __attribute__ (( always_inline )) int
-mii_write ( struct mii_interface *mii, unsigned int reg, unsigned int data ) {
-	return mii->op->write ( mii, reg, data );
-}
-
-/** Maximum time to wait for a reset, in milliseconds */
-#define MII_RESET_MAX_WAIT_MS 500
-
-extern int mii_restart ( struct mii_interface *mii );
-extern int mii_reset ( struct mii_interface *mii );
-
-#endif /* _IPXE_MII_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/monojob.h ipxe-1.0.1~lliurex1505/src/include/ipxe/monojob.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/monojob.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/monojob.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,6 +13,6 @@
 
 extern struct interface monojob;
 
-extern int monojob_wait ( const char *string, unsigned long timeout );
+extern int monojob_wait ( const char *string );
 
 #endif /* _IPXE_MONOJOB_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/mount.h ipxe-1.0.1~lliurex1505/src/include/ipxe/mount.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/mount.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/mount.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,76 +0,0 @@
-#ifndef _IPXE_MOUNT_H
-#define _IPXE_MOUNT_H
-
-#include <ipxe/nfs.h>
-
-/** @file
- *
- * NFS MOUNT protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** NFS MOUNT protocol number */
-#define ONCRPC_MOUNT 100005
-/** NFS MOUNT protocol version */
-#define MOUNT_VERS   3
-
-
-/** No error */
-#define MNT3_OK                 0
-/** Not owner */
-#define MNT3ERR_PERM            1
-/** No such file or directory */
-#define MNT3ERR_NOENT           2
-/** I/O error */
-#define MNT3ERR_IO              5
-/** Permission denied */
-#define MNT3ERR_ACCES           13
-/** Not a directory */
-#define MNT3ERR_NOTDIR          20
-/** Invalid argument */
-#define MNT3ERR_INVAL           22
-/** Filename too long */
-#define MNT3ERR_NAMETOOLONG     63
-/** Operation not supported */
-#define MNT3ERR_NOTSUPP         10004
-/** A failure on the server */
-#define MNT3ERR_SERVERFAULT     10006
-
-
-/**
- * A MOUNT MNT reply
- *
- */
-struct mount_mnt_reply {
-	/** Reply status */
-	uint32_t        status;
-	/** Root file handle */
-	struct nfs_fh   fh;
-};
-
-/**
- * Prepare an ONC RPC session to be used as a MOUNT session
- *
- * @v session           ONC RPC session
- * @v credential        ONC RPC credential
- *
- * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you
- * don't want a particular scheme to be used.
- */
-static inline void mount_init_session ( struct oncrpc_session *session,
-                                        struct oncrpc_cred *credential ) {
-	oncrpc_init_session ( session, credential, &oncrpc_auth_none,
-	                      ONCRPC_MOUNT, MOUNT_VERS );
-}
-
-int mount_mnt ( struct interface *intf, struct oncrpc_session *session,
-                const char *mountpoint );
-int mount_umnt ( struct interface *intf, struct oncrpc_session *session,
-                 const char *mountpoint );
-
-int mount_get_mnt_reply ( struct mount_mnt_reply *mnt_reply,
-                          struct oncrpc_reply *reply );
-
-#endif /* _IPXE_MOUNT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ndp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ndp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ndp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ndp.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,169 +1,21 @@
-#ifndef _IPXE_NDP_H
-#define _IPXE_NDP_H
-
-/** @file
- *
- * Neighbour discovery protocol
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
 #include <stdint.h>
+#include <byteswap.h>
+#include <string.h>
+#include <ipxe/icmp6.h>
+#include <ipxe/ip6.h>
 #include <ipxe/in.h>
-#include <ipxe/ipv6.h>
-#include <ipxe/icmpv6.h>
-#include <ipxe/neighbour.h>
-
-/** An NDP option header */
-struct ndp_option_header {
-	/** Type */
-	uint8_t type;
-	/** Length (in blocks of 8 bytes) */
-	uint8_t blocks;
-} __attribute__ (( packed ));
-
-/** NDP option block size */
-#define NDP_OPTION_BLKSZ 8
-
-/** NDP source link-layer address option */
-#define NDP_OPT_LL_SOURCE 1
-
-/** NDP target link-layer address option */
-#define NDP_OPT_LL_TARGET 2
-
-/** NDP source or target link-layer address option */
-struct ndp_ll_addr_option {
-	/** NDP option header */
-	struct ndp_option_header header;
-	/** Link-layer address */
-	uint8_t ll_addr[0];
-} __attribute__ (( packed ));
-
-/** NDP prefix information option */
-#define NDP_OPT_PREFIX 3
-
-/** NDP prefix information */
-struct ndp_prefix_information_option {
-	/** NDP option header */
-	struct ndp_option_header header;
-	/** Prefix length */
-	uint8_t prefix_len;
-	/** Flags */
-	uint8_t flags;
-	/** Valid lifetime */
-	uint32_t valid;
-	/** Preferred lifetime */
-	uint32_t preferred;
-	/** Reserved */
-	uint32_t reserved;
-	/** Prefix */
-	struct in6_addr prefix;
-} __attribute__ (( packed ));
-
-/** NDP on-link flag */
-#define NDP_PREFIX_ON_LINK 0x80
-
-/** NDP autonomous address configuration flag */
-#define NDP_PREFIX_AUTONOMOUS 0x40
-
-/** An NDP option */
-union ndp_option {
-	/** Option header */
-	struct ndp_option_header header;
-	/** Source or target link-layer address option */
-	struct ndp_ll_addr_option ll_addr;
-	/** Prefix information option */
-	struct ndp_prefix_information_option prefix;
-} __attribute__ (( packed ));
-
-/** An NDP neighbour solicitation or advertisement header */
-struct ndp_neighbour_header {
-	/** ICMPv6 header */
-	struct icmp_header icmp;
-	/** Flags */
-	uint8_t flags;
-	/** Reserved */
-	uint8_t reserved[3];
-	/** Target address */
-	struct in6_addr target;
-	/** Options */
-	union ndp_option option[0];
-} __attribute__ (( packed ));
-
-/** NDP router flag */
-#define NDP_NEIGHBOUR_ROUTER 0x80
-
-/** NDP solicited flag */
-#define NDP_NEIGHBOUR_SOLICITED 0x40
-
-/** NDP override flag */
-#define NDP_NEIGHBOUR_OVERRIDE 0x20
-
-/** An NDP router advertisement header */
-struct ndp_router_advertisement_header {
-	/** ICMPv6 header */
-	struct icmp_header icmp;
-	/** Current hop limit */
-	uint8_t hop_limit;
-	/** Flags */
-	uint8_t flags;
-	/** Router lifetime */
-	uint16_t lifetime;
-	/** Reachable time */
-	uint32_t reachable;
-	/** Retransmission timer */
-	uint32_t retransmit;
-	/** Options */
-	union ndp_option option[0];
-} __attribute__ (( packed ));
-
-/** NDP managed address configuration */
-#define NDP_ROUTER_MANAGED 0x80
-
-/** NDP other configuration */
-#define NDP_ROUTER_OTHER 0x40
-
-/** An NDP router solicitation header */
-struct ndp_router_solicitation_header {
-	/** ICMPv6 header */
-	struct icmp_header icmp;
-	/** Reserved */
-	uint32_t reserved;
-	/** Options */
-	union ndp_option option[0];
-} __attribute__ (( packed ));
-
-/** An NDP header */
-union ndp_header {
-	/** ICMPv6 header */
-	struct icmp_header icmp;
-	/** Neighbour solicitation or advertisement header */
-	struct ndp_neighbour_header neigh;
-	/** Router solicitation header */
-	struct ndp_router_solicitation_header rsol;
-	/** Router advertisement header */
-	struct ndp_router_advertisement_header radv;
-} __attribute__ (( packed ));
-
-extern struct neighbour_discovery ndp_discovery;
-
-/**
- * Transmit packet, determining link-layer address via NDP
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v net_dest		Destination network-layer address
- * @v net_source	Source network-layer address
- * @v ll_source		Source link-layer address
- * @ret rc		Return status code
- */
-static inline int ndp_tx ( struct io_buffer *iobuf, struct net_device *netdev,
-			   const void *net_dest, const void *net_source,
-			   const void *ll_source ) {
-
-	return neighbour_tx ( iobuf, netdev, &ipv6_protocol, net_dest,
-			      &ndp_discovery, net_source, ll_source );
-}
-
-#endif /* _IPXE_NDP_H */
+#include <ipxe/netdevice.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/tcpip.h>
+
+#define NDP_STATE_INVALID 0
+#define NDP_STATE_INCOMPLETE 1
+#define NDP_STATE_REACHABLE 2
+#define NDP_STATE_DELAY 3
+#define NDP_STATE_PROBE 4
+#define NDP_STATE_STALE 5
+
+int ndp_resolve ( struct net_device *netdev, struct in6_addr *src,
+		  struct in6_addr *dest, void *dest_ll_addr );
+int ndp_process_advert ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src,
+			 struct sockaddr_tcpip *st_dest );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/neighbour.h ipxe-1.0.1~lliurex1505/src/include/ipxe/neighbour.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/neighbour.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/neighbour.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,88 +0,0 @@
-#ifndef _IPXE_NEIGHBOUR_H
-#define _IPXE_NEIGHBOUR_H
-
-/** @file
- *
- * Neighbour discovery
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/list.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/retry.h>
-
-/** A neighbour discovery protocol */
-struct neighbour_discovery {
-	/** Name */
-	const char *name;
-	/**
-	 * Transmit neighbour discovery request
-	 *
-	 * @v netdev		Network device
-	 * @v net_protocol	Network-layer protocol
-	 * @v net_dest		Destination network-layer address
-	 * @v net_source	Source network-layer address
-	 * @ret rc		Return status code
-	 */
-	int ( * tx_request ) ( struct net_device *netdev,
-			       struct net_protocol *net_protocol,
-			       const void *net_dest, const void *net_source );
-};
-
-/** A neighbour cache entry */
-struct neighbour {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** List of neighbour cache entries */
-	struct list_head list;
-
-	/** Network device */
-	struct net_device *netdev;
-	/** Network-layer protocol */
-	struct net_protocol *net_protocol;
-	/** Network-layer destination address */
-	uint8_t net_dest[MAX_NET_ADDR_LEN];
-	/** Link-layer destination address */
-	uint8_t ll_dest[MAX_LL_ADDR_LEN];
-
-	/** Neighbour discovery protocol (if any) */
-	struct neighbour_discovery *discovery;
-	/** Network-layer source address (if any) */
-	uint8_t net_source[MAX_NET_ADDR_LEN];
-	/** Retransmission timer */
-	struct retry_timer timer;
-
-	/** Pending I/O buffers */
-	struct list_head tx_queue;
-};
-
-/**
- * Test if neighbour cache entry has a valid link-layer address
- *
- * @v neighbour		Neighbour cache entry
- * @ret has_ll_dest	Neighbour cache entry has a valid link-layer address
- */
-static inline __attribute__ (( always_inline )) int
-neighbour_has_ll_dest ( struct neighbour *neighbour ) {
-	return ( ! timer_running ( &neighbour->timer ) );
-}
-
-extern struct list_head neighbours;
-
-extern int neighbour_tx ( struct io_buffer *iobuf, struct net_device *netdev,
-			  struct net_protocol *net_protocol,
-			  const void *net_dest,
-			  struct neighbour_discovery *discovery,
-			  const void *net_source, const void *ll_source );
-extern int neighbour_update ( struct net_device *netdev,
-			      struct net_protocol *net_protocol,
-			      const void *net_dest, const void *ll_dest );
-extern int neighbour_define ( struct net_device *netdev,
-			      struct net_protocol *net_protocol,
-			      const void *net_dest, const void *ll_dest );
-
-#endif /* _IPXE_NEIGHBOUR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/net80211_err.h ipxe-1.0.1~lliurex1505/src/include/ipxe/net80211_err.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/net80211_err.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/net80211_err.h	2012-01-06 23:49:04.000000000 +0000
@@ -553,83 +553,81 @@
 
 /** Make return status code from 802.11 status code */
 #define E80211_STATUS( stat )						\
-	( ( (stat) & 0x20 ) ?						\
-	  EUNIQ ( EINFO_EHOSTUNREACH, ( (stat) & 0x1f ),		\
-		  EHOSTUNREACH_QOS_FAILURE,				\
-		  EHOSTUNREACH_QOS_NO_ROOM,				\
-		  EHOSTUNREACH_LINK_IS_HORRIBLE,			\
-		  EHOSTUNREACH_ASSOC_NEED_QOS,				\
-		  EHOSTUNREACH_REQUEST_DECLINED,			\
-		  EHOSTUNREACH_REQUEST_INVALID,				\
-		  EHOSTUNREACH_TS_NOT_CREATED_AGAIN,			\
-		  EHOSTUNREACH_INVALID_IE,				\
-		  EHOSTUNREACH_GROUP_CIPHER_INVALID,			\
-		  EHOSTUNREACH_PAIR_CIPHER_INVALID,			\
-		  EHOSTUNREACH_AKMP_INVALID,				\
-		  EHOSTUNREACH_RSN_VERSION_UNSUPP,			\
-		  EHOSTUNREACH_RSN_CAPAB_INVALID,			\
-		  EHOSTUNREACH_CIPHER_REJECTED,				\
-		  EHOSTUNREACH_TS_NOT_CREATED_WAIT,			\
-		  EHOSTUNREACH_DIRECT_LINK_FORBIDDEN,			\
-		  EHOSTUNREACH_DEST_NOT_PRESENT,			\
-		  EHOSTUNREACH_DEST_NOT_QOS,				\
-		  EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH ) :		\
-	  EUNIQ ( EINFO_ECONNREFUSED, ( (stat) & 0x1f ),		\
-		  ECONNREFUSED_FAILURE,					\
-		  ECONNREFUSED_CAPAB_UNSUPP,				\
-		  ECONNREFUSED_REASSOC_INVALID,				\
-		  ECONNREFUSED_ASSOC_DENIED,				\
-		  ECONNREFUSED_AUTH_ALGO_UNSUPP,			\
-		  ECONNREFUSED_AUTH_SEQ_INVALID,			\
-		  ECONNREFUSED_AUTH_CHALL_INVALID,			\
-		  ECONNREFUSED_AUTH_TIMEOUT,				\
-		  ECONNREFUSED_ASSOC_NO_ROOM,				\
-		  ECONNREFUSED_ASSOC_NEED_RATE,				\
-		  ECONNREFUSED_ASSOC_NEED_SHORT_PMBL,			\
-		  ECONNREFUSED_ASSOC_NEED_PBCC,				\
-		  ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY,			\
-		  ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT,		\
-		  ECONNREFUSED_ASSOC_BAD_POWER,				\
-		  ECONNREFUSED_ASSOC_BAD_CHANNELS,			\
-		  ECONNREFUSED_ASSOC_NEED_SHORT_SLOT,			\
-		  ECONNREFUSED_ASSOC_NEED_DSSS_OFDM ) )
+	EUNIQ ( ( ( stat & 0x20 ) ? EHOSTUNREACH : ECONNREFUSED ),	\
+		( stat &0x1f ),						\
+		ECONNREFUSED_FAILURE,					\
+		ECONNREFUSED_CAPAB_UNSUPP,				\
+		ECONNREFUSED_REASSOC_INVALID,				\
+		ECONNREFUSED_ASSOC_DENIED,				\
+		ECONNREFUSED_AUTH_ALGO_UNSUPP,				\
+		ECONNREFUSED_AUTH_SEQ_INVALID,				\
+		ECONNREFUSED_AUTH_CHALL_INVALID,			\
+		ECONNREFUSED_AUTH_TIMEOUT,				\
+		ECONNREFUSED_ASSOC_NO_ROOM,				\
+		ECONNREFUSED_ASSOC_NEED_RATE,				\
+		ECONNREFUSED_ASSOC_NEED_SHORT_PMBL,			\
+		ECONNREFUSED_ASSOC_NEED_PBCC,				\
+		ECONNREFUSED_ASSOC_NEED_CHAN_AGILITY,			\
+		ECONNREFUSED_ASSOC_NEED_SPECTRUM_MGMT,			\
+		ECONNREFUSED_ASSOC_BAD_POWER,				\
+		ECONNREFUSED_ASSOC_BAD_CHANNELS,			\
+		ECONNREFUSED_ASSOC_NEED_SHORT_SLOT,			\
+		ECONNREFUSED_ASSOC_NEED_DSSS_OFDM,			\
+		EHOSTUNREACH_QOS_FAILURE,				\
+		EHOSTUNREACH_QOS_NO_ROOM,				\
+		EHOSTUNREACH_LINK_IS_HORRIBLE,				\
+		EHOSTUNREACH_ASSOC_NEED_QOS,				\
+		EHOSTUNREACH_REQUEST_DECLINED,				\
+		EHOSTUNREACH_REQUEST_INVALID,				\
+		EHOSTUNREACH_TS_NOT_CREATED_AGAIN,			\
+		EHOSTUNREACH_INVALID_IE,				\
+		EHOSTUNREACH_GROUP_CIPHER_INVALID,			\
+		EHOSTUNREACH_PAIR_CIPHER_INVALID,			\
+		EHOSTUNREACH_AKMP_INVALID,				\
+		EHOSTUNREACH_RSN_VERSION_UNSUPP,			\
+		EHOSTUNREACH_RSN_CAPAB_INVALID,				\
+		EHOSTUNREACH_CIPHER_REJECTED,				\
+		EHOSTUNREACH_TS_NOT_CREATED_WAIT,			\
+		EHOSTUNREACH_DIRECT_LINK_FORBIDDEN,			\
+		EHOSTUNREACH_DEST_NOT_PRESENT,				\
+		EHOSTUNREACH_DEST_NOT_QOS,				\
+		EHOSTUNREACH_ASSOC_LISTEN_TOO_HIGH )
 
 /** Make return status code from 802.11 reason code */
 #define E80211_REASON( reas )						\
-	( ( (reas) & 0x20 ) ?						\
-	  EUNIQ ( EINFO_ENETRESET, ( (reas) & 0x1f ),			\
-		  ENETRESET_QOS_UNSPECIFIED,				\
-		  ENETRESET_QOS_OUT_OF_RESOURCES,			\
-		  ENETRESET_LINK_IS_HORRIBLE,				\
-		  ENETRESET_INVALID_TXOP,				\
-		  ENETRESET_REQUESTED_LEAVING,				\
-		  ENETRESET_REQUESTED_NO_USE,				\
-		  ENETRESET_REQUESTED_NEED_SETUP,			\
-		  ENETRESET_REQUESTED_TIMEOUT,				\
-		  ENETRESET_CIPHER_UNSUPPORTED ) :			\
-	  EUNIQ ( EINFO_ECONNRESET, ( (reas) & 0x1f ),			\
-		  ECONNRESET_UNSPECIFIED,				\
-		  ECONNRESET_AUTH_NO_LONGER_VALID,			\
-		  ECONNRESET_LEAVING,					\
-		  ECONNRESET_INACTIVITY,				\
-		  ECONNRESET_OUT_OF_RESOURCES,				\
-		  ECONNRESET_NEED_AUTH,					\
-		  ECONNRESET_NEED_ASSOC,				\
-		  ECONNRESET_LEAVING_TO_ROAM,				\
-		  ECONNRESET_REASSOC_INVALID,				\
-		  ECONNRESET_BAD_POWER,					\
-		  ECONNRESET_BAD_CHANNELS,				\
-		  ECONNRESET_INVALID_IE,				\
-		  ECONNRESET_MIC_FAILURE,				\
-		  ECONNRESET_4WAY_TIMEOUT,				\
-		  ECONNRESET_GROUPKEY_TIMEOUT,				\
-		  ECONNRESET_4WAY_INVALID,				\
-		  ECONNRESET_GROUP_CIPHER_INVALID,			\
-		  ECONNRESET_PAIR_CIPHER_INVALID,			\
-		  ECONNRESET_AKMP_INVALID,				\
-		  ECONNRESET_RSN_VERSION_INVALID,			\
-		  ECONNRESET_RSN_CAPAB_INVALID,				\
-		  ECONNRESET_8021X_FAILURE,				\
-		  ECONNRESET_CIPHER_REJECTED ) )
+	EUNIQ ( ( ( reas & 0x20 ) ? ENETRESET : ECONNRESET ),		\
+		( reas & 0x1f ),					\
+		ECONNRESET_UNSPECIFIED,					\
+		ECONNRESET_AUTH_NO_LONGER_VALID,			\
+		ECONNRESET_LEAVING,					\
+		ECONNRESET_INACTIVITY,					\
+		ECONNRESET_OUT_OF_RESOURCES,				\
+		ECONNRESET_NEED_AUTH,					\
+		ECONNRESET_NEED_ASSOC,					\
+		ECONNRESET_LEAVING_TO_ROAM,				\
+		ECONNRESET_REASSOC_INVALID,				\
+		ECONNRESET_BAD_POWER,					\
+		ECONNRESET_BAD_CHANNELS,				\
+		ECONNRESET_INVALID_IE,					\
+		ECONNRESET_MIC_FAILURE,					\
+		ECONNRESET_4WAY_TIMEOUT,				\
+		ECONNRESET_GROUPKEY_TIMEOUT,				\
+		ECONNRESET_4WAY_INVALID,				\
+		ECONNRESET_GROUP_CIPHER_INVALID,			\
+		ECONNRESET_PAIR_CIPHER_INVALID,				\
+		ECONNRESET_AKMP_INVALID,				\
+		ECONNRESET_RSN_VERSION_INVALID,				\
+		ECONNRESET_RSN_CAPAB_INVALID,				\
+		ECONNRESET_8021X_FAILURE,				\
+		ECONNRESET_CIPHER_REJECTED,				\
+		ENETRESET_QOS_UNSPECIFIED,				\
+		ENETRESET_QOS_OUT_OF_RESOURCES,				\
+		ENETRESET_LINK_IS_HORRIBLE,				\
+		ENETRESET_INVALID_TXOP,					\
+		ENETRESET_REQUESTED_LEAVING,				\
+		ENETRESET_REQUESTED_NO_USE,				\
+		ENETRESET_REQUESTED_NEED_SETUP,				\
+		ENETRESET_REQUESTED_TIMEOUT,				\
+		ENETRESET_CIPHER_UNSUPPORTED )
 
 #endif /* _IPXE_NET80211_ERR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/net80211.h ipxe-1.0.1~lliurex1505/src/include/ipxe/net80211.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/net80211.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/net80211.h	2012-01-06 23:49:04.000000000 +0000
@@ -1183,4 +1183,25 @@
 		 net80211_duration ( dev, size, dev->rates[dev->rate] ) );
 }
 
+/** 802.11 device setting tag magic */
+#define NET80211_SETTING_TAG_MAGIC 0x8211
+
+/**
+ * Construct 802.11 setting tag
+ *
+ * @v id		Unique identifier
+ * @ret tag		Setting tag
+ */
+#define NET80211_SETTING_TAG( id ) \
+	NETDEV_SETTING_TAG ( ( NET80211_SETTING_TAG_MAGIC << 8 ) | (id) )
+
+/** SSID setting tag */
+#define NET80211_SETTING_TAG_SSID NET80211_SETTING_TAG ( 0x01 )
+
+/** Active scanning setting tag */
+#define NET80211_SETTING_TAG_ACTIVE_SCAN NET80211_SETTING_TAG ( 0x02 )
+
+/** Wireless key setting tag */
+#define NET80211_SETTING_TAG_KEY NET80211_SETTING_TAG ( 0x03 )
+
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/netdevice.h ipxe-1.0.1~lliurex1505/src/include/ipxe/netdevice.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/netdevice.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/netdevice.h	2012-01-06 23:49:04.000000000 +0000
@@ -14,7 +14,6 @@
 #include <ipxe/tables.h>
 #include <ipxe/refcnt.h>
 #include <ipxe/settings.h>
-#include <ipxe/interface.h>
 
 struct io_buffer;
 struct net_device;
@@ -45,7 +44,7 @@
 #define MAX_LL_HEADER_LEN 36
 
 /** Maximum length of a network-layer address */
-#define MAX_NET_ADDR_LEN 16
+#define MAX_NET_ADDR_LEN 4
 
 /** Maximum length of a network-layer header
  *
@@ -176,17 +175,8 @@
 	 *
 	 * @v ll_addr		Link-layer address
 	 * @v eth_addr		Ethernet-compatible address to fill in
-	 * @ret rc		Return status code
 	 */
 	int ( * eth_addr ) ( const void *ll_addr, void *eth_addr );
-	/**
-	 * Generate EUI-64 address
-	 *
-	 * @v ll_addr		Link-layer address
-	 * @v eui64		EUI-64 address to fill in
-	 * @ret rc		Return status code
-	 */
-	int ( * eui64 ) ( const void *ll_addr, void *eui64 );
 	/** Link-layer protocol
 	 *
 	 * This is an ARPHRD_XXX constant, in network byte order.
@@ -198,17 +188,8 @@
 	uint8_t ll_addr_len;
 	/** Link-layer header length */
 	uint8_t ll_header_len;
-	/** Flags */
-	unsigned int flags;
 };
 
-/** Local link-layer address functions only as a name
- *
- * This flag indicates that the local link-layer address cannot
- * directly be used as a destination address by a remote node.
- */
-#define LL_NAME_ONLY 0x0001
-
 /** Network device operations */
 struct net_device_operations {
 	/** Open network device
@@ -293,48 +274,6 @@
 	struct net_device_error errors[NETDEV_MAX_UNIQUE_ERRORS];
 };
 
-/** A network device configuration */
-struct net_device_configuration {
-	/** Network device */
-	struct net_device *netdev;
-	/** Network device configurator */
-	struct net_device_configurator *configurator;
-	/** Configuration status */
-	int rc;
-	/** Job control interface */
-	struct interface job;
-};
-
-/** A network device configurator */
-struct net_device_configurator {
-	/** Name */
-	const char *name;
-	/** Check applicability of configurator
-	 *
-	 * @v netdev		Network device
-	 * @ret applies		Configurator applies to this network device
-	 */
-	int ( * applies ) ( struct net_device *netdev );
-	/** Start configuring network device
-	 *
-	 * @v job		Job control interface
-	 * @v netdev		Network device
-	 * @ret rc		Return status code
-	 */
-	int ( * start ) ( struct interface *job, struct net_device *netdev );
-};
-
-/** Network device configurator table */
-#define NET_DEVICE_CONFIGURATORS \
-	__table ( struct net_device_configurator, "net_device_configurators" )
-
-/** Declare a network device configurator */
-#define __net_device_configurator \
-	__table_entry ( NET_DEVICE_CONFIGURATORS, 01 )
-
-/** Maximum length of a network device name */
-#define NETDEV_NAME_LEN 12
-
 /**
  * A network device
  *
@@ -352,10 +291,8 @@
 	struct list_head list;
 	/** List of open network devices */
 	struct list_head open_list;
-	/** Index of this network device */
-	unsigned int index;
 	/** Name of this network device */
-	char name[NETDEV_NAME_LEN];
+	char name[12];
 	/** Underlying hardware device */
 	struct device *dev;
 
@@ -400,8 +337,6 @@
 	size_t max_pkt_len;
 	/** TX packet queue */
 	struct list_head tx_queue;
-	/** Deferred TX packet queue */
-	struct list_head tx_deferred;
 	/** RX packet queue */
 	struct list_head rx_queue;
 	/** TX statistics */
@@ -414,9 +349,6 @@
 
 	/** Driver private data */
 	void *priv;
-
-	/** Network device configurations (variable length) */
-	struct net_device_configuration configs[0];
 };
 
 /** Network device is open */
@@ -468,6 +400,38 @@
 /** Declare a network driver */
 #define __net_driver __table_entry ( NET_DRIVERS, 01 )
 
+/** Network device setting tag magic
+ *
+ * All DHCP option settings are deemed to be valid as network device
+ * settings.  There are also some extra non-DHCP settings (such as
+ * "mac"), which are marked as being valid network device settings by
+ * using a magic tag value.
+ */
+#define NETDEV_SETTING_TAG_MAGIC 0xeb
+
+/**
+ * Construct network device setting tag
+ *
+ * @v id		Unique identifier
+ * @ret tag		Setting tag
+ */
+#define NETDEV_SETTING_TAG( id ) ( ( NETDEV_SETTING_TAG_MAGIC << 24 ) | (id) )
+
+/**
+ * Check if tag is a network device setting tag
+ *
+ * @v tag		Setting tag
+ * @ret is_ours		Tag is a network device setting tag
+ */
+#define IS_NETDEV_SETTING_TAG( tag ) \
+	( ( (tag) >> 24 ) == NETDEV_SETTING_TAG_MAGIC )
+
+/** MAC address setting tag */
+#define NETDEV_SETTING_TAG_MAC NETDEV_SETTING_TAG ( 0x01 )
+
+/** Bus ID setting tag */
+#define NETDEV_SETTING_TAG_BUS_ID NETDEV_SETTING_TAG ( 0x02 )
+
 extern struct list_head net_devices;
 extern struct net_device_operations null_netdev_operations;
 extern struct settings_operations netdev_settings_operations;
@@ -575,35 +539,6 @@
 }
 
 /**
- * Get network device configuration
- *
- * @v netdev		Network device
- * @v configurator	Network device configurator
- * @ret config		Network device configuration
- */
-static inline struct net_device_configuration *
-netdev_configuration ( struct net_device *netdev,
-		       struct net_device_configurator *configurator ) {
-
-	return &netdev->configs[ table_index ( NET_DEVICE_CONFIGURATORS,
-					       configurator ) ];
-}
-
-/**
- * Check if configurator applies to network device
- *
- * @v netdev		Network device
- * @v configurator	Network device configurator
- * @ret applies		Configurator applies to network device
- */
-static inline int
-netdev_configurator_applies ( struct net_device *netdev,
-			      struct net_device_configurator *configurator ) {
-	return ( ( configurator->applies == NULL ) ||
-		 configurator->applies ( netdev ) );
-}
-
-/**
  * Check link state of network device
  *
  * @v netdev		Network device
@@ -661,8 +596,6 @@
 extern void netdev_link_err ( struct net_device *netdev, int rc );
 extern void netdev_link_down ( struct net_device *netdev );
 extern int netdev_tx ( struct net_device *netdev, struct io_buffer *iobuf );
-extern void netdev_tx_defer ( struct net_device *netdev,
-			      struct io_buffer *iobuf );
 extern void netdev_tx_err ( struct net_device *netdev,
 			    struct io_buffer *iobuf, int rc );
 extern void netdev_tx_complete_err ( struct net_device *netdev,
@@ -680,7 +613,6 @@
 extern void unregister_netdev ( struct net_device *netdev );
 extern void netdev_irq ( struct net_device *netdev, int enable );
 extern struct net_device * find_netdev ( const char *name );
-extern struct net_device * find_netdev_by_index ( unsigned int index );
 extern struct net_device * find_netdev_by_location ( unsigned int bus_type,
 						     unsigned int location );
 extern struct net_device * last_opened_netdev ( void );
@@ -691,13 +623,6 @@
 		    uint16_t net_proto, const void *ll_dest,
 		    const void *ll_source, unsigned int flags );
 extern void net_poll ( void );
-extern struct net_device_configurator *
-find_netdev_configurator ( const char *name );
-extern int netdev_configure ( struct net_device *netdev,
-			      struct net_device_configurator *configurator );
-extern int netdev_configure_all ( struct net_device *netdev );
-extern int netdev_configuration_in_progress ( struct net_device *netdev );
-extern int netdev_configuration_ok ( struct net_device *netdev );
 
 /**
  * Complete network transmission
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nfs.h ipxe-1.0.1~lliurex1505/src/include/ipxe/nfs.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nfs.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/nfs.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,157 +0,0 @@
-#ifndef _IPXE_NFS_H
-#define _IPXE_NFS_H
-
-#include <stdint.h>
-#include <ipxe/oncrpc.h>
-
-/** @file
- *
- * Network File System protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** NFS protocol number */
-#define ONCRPC_NFS 100003
-
-/** NFS protocol version */
-#define NFS_VERS   3
-
-/** No error*/
-#define NFS3_OK             0
-/** Not owner */
-#define NFS3ERR_PERM        1
-/** No such file or directory */
-#define NFS3ERR_NOENT       2
-/** I/O error */
-#define NFS3ERR_IO          5
-/** No such device or address */
-#define NFS3ERR_NXIO        6
-/** Permission denied */
-#define NFS3ERR_ACCES       13
-/** The file specified already exists */
-#define NFS3ERR_EXIST       17
-/**  Attempt to do a cross-device hard link */
-#define NFS3ERR_XDEV        18
-/** No such device */
-#define NFS3ERR_NODEV       19
-/** Not a directory */
-#define NFS3ERR_NOTDIR      20
- /**Is a directory */
-#define NFS3ERR_ISDIR       21
-/** Invalid argument */
-#define NFS3ERR_INVAL       22
-/** Filename too long */
-#define NFS3ERR_NAMETOOLONG 63
-/** Invalid file handle */
-#define NFS3ERR_STALE       70
-/** Too many levels of remote in path */
-#define NFS3ERR_REMOTE      71
-/** Illegal NFS file handle */
-#define NFS3ERR_BADHANDLE   10001
-/**  READDIR or READDIRPLUS cookie is stale */
-#define NFS3ERR_BAD_COOKIE  10003
-/** Operation not supported */
-#define NFS3ERR_NOTSUPP     10004
-/** Buffer or request is too small */
-#define NFS3ERR_TOOSMALL    10005
-/** An error occurred on the server which does not map to any  of the legal NFS
- * version 3 protocol error values */
-#define NFS3ERR_SERVERFAULT 10006
-/** The server initiated the request, but was not able to complete it in a
- * timely fashion */
-#define NFS3ERR_JUKEBOX     10008
-
-enum nfs_attr_type {
-	NFS_ATTR_SYMLINK = 5,
-};
-
-/**
- * A NFS file handle
- *
- */
-struct nfs_fh {
-	uint8_t               fh[64];
-	size_t                size;
-};
-
-/**
- * A NFS LOOKUP reply
- *
- */
-struct nfs_lookup_reply {
-	/** Reply status */
-	uint32_t             status;
-	/** Entity type */
-	enum nfs_attr_type   ent_type;
-	/** File handle */
-	struct nfs_fh        fh;
-};
-
-/**
- * A NFS READLINK reply
- *
- */
-struct nfs_readlink_reply {
-	/** Reply status */
-	uint32_t             status;
-	/** File path length */
-	uint32_t             path_len;
-	/** File path */
-	char                 *path;
-};
-
-
-/**
- * A NFS READ reply
- *
- */
-struct nfs_read_reply {
-	/** Reply status */
-	uint32_t             status;
-	/** File size */
-	uint64_t             filesize;
-	/** Bytes read */
-	uint32_t             count;
-	/** End-of-File indicator */
-	uint32_t             eof;
-	/** Data length */
-	uint32_t             data_len;
-	/** Data read */
-	void                 *data;
-};
-
-size_t nfs_iob_get_fh ( struct io_buffer *io_buf, struct nfs_fh *fh );
-size_t nfs_iob_add_fh ( struct io_buffer *io_buf, const struct nfs_fh *fh );
-
-/**
- * Prepare an ONC RPC session to be used as a NFS session
- *
- * @v session           ONC RPC session
- * @v credential        ONC RPC credential
- *
- * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you
- * don't want a particular scheme to be used.
- */
-static inline void nfs_init_session ( struct oncrpc_session *session,
-                                      struct oncrpc_cred *credential ) {
-	oncrpc_init_session ( session, credential, &oncrpc_auth_none,
-	                      ONCRPC_NFS, NFS_VERS );
-}
-
-int nfs_lookup ( struct interface *intf, struct oncrpc_session *session,
-                 const struct nfs_fh *fh, const char *filename );
-int nfs_readlink ( struct interface *intf, struct oncrpc_session *session,
-                   const struct nfs_fh *fh );
-int nfs_read ( struct interface *intf, struct oncrpc_session *session,
-               const struct nfs_fh *fh, uint64_t offset, uint32_t count );
-
-int nfs_get_lookup_reply ( struct nfs_lookup_reply *lookup_reply,
-                           struct oncrpc_reply *reply );
-int nfs_get_readlink_reply ( struct nfs_readlink_reply *readlink_reply,
-                             struct oncrpc_reply *reply );
-int nfs_get_read_reply ( struct nfs_read_reply *read_reply,
-                         struct oncrpc_reply *reply );
-
-#endif /* _IPXE_NFS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nfs_open.h ipxe-1.0.1~lliurex1505/src/include/ipxe/nfs_open.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nfs_open.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/nfs_open.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,12 +0,0 @@
-#ifndef _IPXE_NFS_OPEN_H
-#define _IPXE_NFS_OPEN_H
-
-/** @file
- *
- * Network File System protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#endif /* _IPXE_NFS_OPEN_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_entropy.h ipxe-1.0.1~lliurex1505/src/include/ipxe/null_entropy.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_entropy.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/null_entropy.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,52 +0,0 @@
-#ifndef _IPXE_NULL_ENTROPY_H
-#define _IPXE_NULL_ENTROPY_H
-
-/** @file
- *
- * Nonexistent entropy source
- *
- * This source provides no entropy and must NOT be used in a
- * security-sensitive environment.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-#ifdef ENTROPY_NULL
-#define ENTROPY_PREFIX_null
-#else
-#define ENTROPY_PREFIX_null __null_
-#endif
-
-static inline __always_inline int
-ENTROPY_INLINE ( null, entropy_enable ) ( void ) {
-	/* Do nothing */
-	return 0;
-}
-
-static inline __always_inline void
-ENTROPY_INLINE ( null, entropy_disable ) ( void ) {
-	/* Do nothing */
-}
-
-static inline __always_inline double
-ENTROPY_INLINE ( null, min_entropy_per_sample ) ( void ) {
-	/* Actual amount of min-entropy is zero.  To avoid
-	 * division-by-zero errors and to allow compilation of
-	 * entropy-consuming code, pretend to have 1 bit of entropy in
-	 * each sample.
-	 */
-	return 1.0;
-}
-
-static inline __always_inline int
-ENTROPY_INLINE ( null, get_noise ) ( noise_sample_t *noise ) {
-
-	/* All sample values are constant */
-	*noise = 0x01;
-
-	return 0;
-}
-
-#endif /* _IPXE_NULL_ENTROPY_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_reboot.h ipxe-1.0.1~lliurex1505/src/include/ipxe/null_reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/null_reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_NULL_REBOOT_H
-#define _IPXE_NULL_REBOOT_H
-
-/** @file
- *
- * iPXE do-nothing reboot API
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef REBOOT_NULL
-#define REBOOT_PREFIX_null
-#else
-#define REBOOT_PREFIX_null __null_
-#endif
-
-#endif /* _IPXE_NULL_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_time.h ipxe-1.0.1~lliurex1505/src/include/ipxe/null_time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/null_time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/null_time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,23 +0,0 @@
-#ifndef _IPXE_NULL_TIME_H
-#define _IPXE_NULL_TIME_H
-
-/** @file
- *
- * Nonexistent time source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#ifdef TIME_NULL
-#define TIME_PREFIX_null
-#else
-#define TIME_PREFIX_null __null_
-#endif
-
-static inline __always_inline time_t
-TIME_INLINE ( null, time_now ) ( void ) {
-	return 0;
-}
-
-#endif /* _IPXE_NULL_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nvo.h ipxe-1.0.1~lliurex1505/src/include/ipxe/nvo.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/nvo.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/nvo.h	2012-01-06 23:49:04.000000000 +0000
@@ -42,10 +42,6 @@
 	struct dhcp_options dhcpopts;
 };
 
-/** Name of non-volatile options settings block */
-#define NVO_SETTINGS_NAME "nvo"
-
-extern int nvo_applies ( struct settings *settings, struct setting *setting );
 extern void nvo_init ( struct nvo_block *nvo, struct nvs_device *nvs,
 		       size_t address, size_t len,
 		       int ( * resize ) ( struct nvo_block *nvo, size_t len ),
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ocsp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ocsp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ocsp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ocsp.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,121 +0,0 @@
-#ifndef _IPXE_OCSP_H
-#define _IPXE_OCSP_H
-
-/** @file
- *
- * Online Certificate Status Protocol
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdarg.h>
-#include <time.h>
-#include <ipxe/asn1.h>
-#include <ipxe/x509.h>
-#include <ipxe/refcnt.h>
-
-/** OCSP algorithm identifier */
-#define OCSP_ALGORITHM_IDENTIFIER( ... )				\
-	ASN1_OID, VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__,		\
-	ASN1_NULL, 0x00
-
-/* OCSP response statuses */
-#define OCSP_STATUS_SUCCESSFUL		0x00
-#define OCSP_STATUS_MALFORMED_REQUEST	0x01
-#define OCSP_STATUS_INTERNAL_ERROR	0x02
-#define OCSP_STATUS_TRY_LATER		0x03
-#define OCSP_STATUS_SIG_REQUIRED	0x05
-#define OCSP_STATUS_UNAUTHORIZED	0x06
-
-struct ocsp_check;
-
-/** An OCSP request */
-struct ocsp_request {
-	/** Request builder */
-	struct asn1_builder builder;
-	/** Certificate ID */
-	struct asn1_cursor cert_id;
-};
-
-/** An OCSP responder */
-struct ocsp_responder {
-	/**
-	 * Check if certificate is the responder's certificate
-	 *
-	 * @v ocsp		OCSP check
-	 * @v cert		Certificate
-	 * @ret difference	Difference as returned by memcmp()
-	 */
-	int ( * compare ) ( struct ocsp_check *ocsp,
-			    struct x509_certificate *cert );
-	/** Responder ID */
-	struct asn1_cursor id;
-};
-
-/** An OCSP response */
-struct ocsp_response {
-	/** Raw response */
-	void *data;
-	/** Raw tbsResponseData */
-	struct asn1_cursor tbs;
-	/** Responder */
-	struct ocsp_responder responder;
-	/** Time at which status is known to be correct */
-	time_t this_update;
-	/** Time at which newer status information will be available */
-	time_t next_update;
-	/** Signature algorithm */
-	struct asn1_algorithm *algorithm;
-	/** Signature value */
-	struct asn1_bit_string signature;
-	/** Signing certificate */
-	struct x509_certificate *signer;
-};
-
-/** An OCSP check */
-struct ocsp_check {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** Certificate being checked */
-	struct x509_certificate *cert;
-	/** Issuing certificate */
-	struct x509_certificate *issuer;
-	/** URI string */
-	char *uri_string;
-	/** Request */
-	struct ocsp_request request;
-	/** Response */
-	struct ocsp_response response;
-};
-
-/**
- * Get reference to OCSP check
- *
- * @v ocsp		OCSP check
- * @ret ocsp		OCSP check
- */
-static inline __attribute__ (( always_inline )) struct ocsp_check *
-ocsp_get ( struct ocsp_check *ocsp ) {
-	ref_get ( &ocsp->refcnt );
-	return ocsp;
-}
-
-/**
- * Drop reference to OCSP check
- *
- * @v ocsp		OCSP check
- */
-static inline __attribute__ (( always_inline )) void
-ocsp_put ( struct ocsp_check *ocsp ) {
-	ref_put ( &ocsp->refcnt );
-}
-
-extern int ocsp_check ( struct x509_certificate *cert,
-			struct x509_certificate *issuer,
-			struct ocsp_check **ocsp );
-extern int ocsp_response ( struct ocsp_check *ocsp, const void *data,
-			   size_t len );
-extern int ocsp_validate ( struct ocsp_check *check, time_t time );
-
-#endif /* _IPXE_OCSP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/oncrpc.h ipxe-1.0.1~lliurex1505/src/include/ipxe/oncrpc.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/oncrpc.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/oncrpc.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,128 +0,0 @@
-#ifndef _IPXE_ONCRPC_H
-#define _IPXE_ONCRPC_H
-
-#include <stdint.h>
-#include <ipxe/interface.h>
-#include <ipxe/iobuf.h>
-
-/** @file
- *
- * SUN ONC RPC protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** ONC RCP Version */
-#define ONCRPC_VERS 2
-
-/** ONC RPC Null Authentication */
-#define ONCRPC_AUTH_NONE 0
-
-/** ONC RPC System Authentication (also called UNIX Authentication) */
-#define ONCRPC_AUTH_SYS  1
-
-/** Size of an ONC RPC header */
-#define ONCRPC_HEADER_SIZE ( 11 * sizeof ( uint32_t ) )
-
-#define ONCRPC_FIELD( type, value ) { oncrpc_ ## type, { .type = value } }
-#define ONCRPC_SUBFIELD( type, args... ) \
-	{ oncrpc_ ## type, { .type = { args } } }
-
-#define ONCRPC_FIELD_END { oncrpc_none, { } }
-
-/** Enusure that size is a multiple of four */
-#define oncrpc_align( size ) ( ( (size) + 3 ) & ~3 )
-
-/**
- * Calculate the length of a string, including padding bytes.
- *
- * @v str               String
- * @ret size            Length of the padded string
- */
-#define oncrpc_strlen( str ) ( oncrpc_align ( strlen ( str ) ) + \
-                               sizeof ( uint32_t ) )
-
-struct oncrpc_cred {
-	uint32_t               flavor;
-	uint32_t               length;
-};
-
-struct oncrpc_cred_sys {
-	struct oncrpc_cred     credential;
-	uint32_t               stamp;
-	char                   *hostname;
-	uint32_t               uid;
-	uint32_t               gid;
-	uint32_t               aux_gid_len;
-	uint32_t               aux_gid[16];
-};
-
-struct oncrpc_reply
-{
-	struct oncrpc_cred      *verifier;
-	uint32_t                rpc_id;
-	uint32_t                reply_state;
-	uint32_t                accept_state;
-	uint32_t                frame_size;
-	struct io_buffer        *data;
-};
-
-struct oncrpc_session {
-	struct oncrpc_reply     pending_reply;
-	struct oncrpc_cred      *credential;
-	struct oncrpc_cred      *verifier;
-	uint32_t                rpc_id;
-	uint32_t                prog_name;
-	uint32_t                prog_vers;
-};
-
-enum oncrpc_field_type {
-	oncrpc_none = 0,
-	oncrpc_int32,
-	oncrpc_int64,
-	oncrpc_str,
-	oncrpc_array,
-	oncrpc_intarray,
-	oncrpc_cred,
-};
-
-union oncrpc_field_value {
-	struct {
-		size_t           length;
-		const void       *ptr;
-	}                        array;
-
-	struct {
-		size_t           length;
-		const uint32_t   *ptr;
-	}                        intarray;
-
-	int64_t                  int64;
-	int32_t                  int32;
-	const char               *str;
-	const struct oncrpc_cred *cred;
-};
-
-struct oncrpc_field {
-	enum oncrpc_field_type       type;
-	union oncrpc_field_value     value;
-};
-
-extern struct oncrpc_cred oncrpc_auth_none;
-
-int oncrpc_init_cred_sys ( struct oncrpc_cred_sys *auth_sys );
-void oncrpc_init_session ( struct oncrpc_session *session,
-                           struct oncrpc_cred *credential,
-                           struct oncrpc_cred *verifier, uint32_t prog_name,
-                           uint32_t prog_vers );
-
-int oncrpc_call ( struct interface *intf, struct oncrpc_session *session,
-                  uint32_t proc_name, const struct oncrpc_field fields[] );
-
-size_t oncrpc_compute_size ( const struct oncrpc_field fields[] );
-
-int oncrpc_get_reply ( struct oncrpc_session *session,
-                       struct oncrpc_reply *reply, struct io_buffer *io_buf );
-
-#endif /* _IPXE_ONCRPC_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/oncrpc_iob.h ipxe-1.0.1~lliurex1505/src/include/ipxe/oncrpc_iob.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/oncrpc_iob.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/oncrpc_iob.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,102 +0,0 @@
-#ifndef _IPXE_ONCRPC_IOB_H
-#define _IPXE_ONCRPC_IOB_H
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/oncrpc.h>
-
-/** @file
- *
- * SUN ONC RPC protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * Add a string to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v val               String
- * @ret size            Size of the data written
- */
-#define oncrpc_iob_add_string( buf, str ) \
-( { \
-	const char * _str = (str); \
-	oncrpc_iob_add_array ( (buf), strlen ( _str ), _str ); \
-} )
-
-/**
- * Get a 32 bits integer from the beginning of an I/O buffer
- *
- * @v buf               I/O buffer
- * @ret int             Integer
- */
-
-#define oncrpc_iob_get_int( buf ) \
-( { \
-	uint32_t *_val; \
-	_val = (buf)->data; \
-	iob_pull ( (buf), sizeof ( uint32_t ) ); \
-	ntohl ( *_val ); \
-} )
-
-/**
- * Get a 64 bits integer from the beginning of an I/O buffer
- *
- * @v buf               I/O buffer
- * @ret int             Integer
- */
-#define oncrpc_iob_get_int64( buf ) \
-( { \
-	uint64_t *_val; \
-	_val = (buf)->data; \
-	iob_pull ( (buf), sizeof ( uint64_t ) ); \
-	ntohll ( *_val ); \
-} )
-
-
-size_t oncrpc_iob_add_fields ( struct io_buffer *io_buf,
-                               const struct oncrpc_field fields[] );
-
-size_t oncrpc_iob_add_array ( struct io_buffer *io_buf, size_t length,
-                              const void *data );
-
-size_t oncrpc_iob_add_intarray ( struct io_buffer *io_buf, size_t length,
-                                 const uint32_t *array );
-
-size_t oncrpc_iob_add_cred ( struct io_buffer *io_buf,
-                             const struct oncrpc_cred *cred );
-
-size_t oncrpc_iob_get_cred ( struct io_buffer *io_buf,
-                             struct oncrpc_cred *cred );
-
-/**
- * Add a 32 bits integer to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v val               Integer
- * @ret size            Size of the data written
- */
-static inline size_t oncrpc_iob_add_int ( struct io_buffer *io_buf,
-                                          uint32_t val ) {
-	* ( uint32_t * ) iob_put ( io_buf, sizeof ( val ) ) = htonl ( val );
-	return ( sizeof ( val) );
-}
-
-/**
- * Add a 64 bits integer to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v val               Integer
- * @ret size            Size of the data written
- */
-static inline size_t oncrpc_iob_add_int64 ( struct io_buffer *io_buf,
-                                            uint64_t val ) {
-	* ( uint64_t * ) iob_put ( io_buf, sizeof ( val ) ) = htonll ( val );
-	return ( sizeof ( val) );
-}
-
-#endif /* _IPXE_ONCRPC_IOB_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/params.h ipxe-1.0.1~lliurex1505/src/include/ipxe/params.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/params.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/params.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,46 +0,0 @@
-#ifndef _IPXE_PARAMS_H
-#define _IPXE_PARAMS_H
-
-/** @file
- *
- * Form parameters
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/list.h>
-#include <ipxe/refcnt.h>
-
-/** A form parameter list */
-struct parameters {
-	/** List of all parameter lists */
-	struct list_head list;
-	/** Name */
-	const char *name;
-	/** Parameters */
-	struct list_head entries;
-};
-
-/** A form parameter */
-struct parameter {
-	/** List of form parameters */
-	struct list_head list;
-	/** Key */
-	const char *key;
-	/** Value */
-	const char *value;
-};
-
-/** Iterate over all form parameters in a list */
-#define for_each_param( param, params )				\
-	list_for_each_entry ( (param), &(params)->entries, list )
-
-extern struct parameters * find_parameters ( const char *name );
-extern struct parameters * create_parameters ( const char *name );
-extern struct parameter * add_parameter ( struct parameters *params,
-					  const char *key, const char *value );
-extern void destroy_parameters ( struct parameters *params );
-extern void claim_parameters ( struct parameters *params );
-
-#endif /* _IPXE_PARAMS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/parseopt.h ipxe-1.0.1~lliurex1505/src/include/ipxe/parseopt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/parseopt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/parseopt.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,12 +11,9 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include <ipxe/settings.h>
 
 struct net_device;
-struct net_device_configurator;
-struct menu;
-struct parameters;
+struct image;
 
 /** A command-line option descriptor */
 struct option_descriptor {
@@ -34,7 +31,7 @@
 	 * @v value		Option value to fill in
 	 * @ret rc		Return status code
 	 */
-	int ( * parse ) ( char *text, void *value );
+	int ( * parse ) ( const char *text, void *value );
 };
 
 /**
@@ -46,9 +43,9 @@
  * @ret _parse		Generic option parser
  */
 #define OPTION_PARSER( _struct, _field, _parse )			      \
-	( ( int ( * ) ( char *text, void *value ) )			      \
+	( ( int ( * ) ( const char *text, void *value ) )		      \
 	  ( ( ( ( typeof ( _parse ) * ) NULL ) ==			      \
-	      ( ( int ( * ) ( char *text,				      \
+	      ( ( int ( * ) ( const char *text,				      \
 			      typeof ( ( ( _struct * ) NULL )->_field ) * ) ) \
 		NULL ) ) ? _parse : _parse ) )
 
@@ -117,31 +114,11 @@
 		.usage = _usage,					      \
 	 }
 
-/** A parsed named setting */
-struct named_setting {
-	/** Settings block */
-	struct settings *settings;
-	/** Setting */
-	struct setting setting;
-};
-
-extern int parse_string ( char *text, char **value );
-extern int parse_integer ( char *text, unsigned int *value );
-extern int parse_timeout ( char *text, unsigned long *value );
-extern int parse_netdev ( char *text, struct net_device **netdev );
-extern int
-parse_netdev_configurator ( char *text,
-			    struct net_device_configurator **configurator );
-extern int parse_menu ( char *text, struct menu **menu );
-extern int parse_flag ( char *text __unused, int *flag );
-extern int parse_key ( char *text, unsigned int *key );
-extern int parse_settings ( char *text, struct settings **settings );
-extern int parse_setting ( char *text, struct named_setting *setting,
-			   get_child_settings_t get_child );
-extern int parse_existing_setting ( char *text, struct named_setting *setting );
-extern int parse_autovivified_setting ( char *text,
-					struct named_setting *setting );
-extern int parse_parameters ( char *text, struct parameters **params );
+extern int parse_string ( const char *text, const char **value );
+extern int parse_integer ( const char *text, unsigned int *value );
+extern int parse_netdev ( const char *text, struct net_device **netdev );
+extern int parse_image ( const char *text, struct image **image );
+extern int parse_flag ( const char *text __unused, int *flag );
 extern void print_usage ( struct command_descriptor *cmd, char **argv );
 extern int reparse_options ( int argc, char **argv,
 			     struct command_descriptor *cmd, void *opts );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pci.h ipxe-1.0.1~lliurex1505/src/include/ipxe/pci.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pci.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/pci.h	2012-01-06 23:49:04.000000000 +0000
@@ -172,7 +172,7 @@
 #define  PCI_PM_CAP_PME_CLOCK	0x0008	/* PME clock required */
 #define  PCI_PM_CAP_RESERVED    0x0010  /* Reserved field */
 #define  PCI_PM_CAP_DSI		0x0020	/* Device specific initialization */
-#define  PCI_PM_CAP_AUX_POWER	0x01C0	/* Auxiliary power support mask */
+#define  PCI_PM_CAP_AUX_POWER	0x01C0	/* Auxilliary power support mask */
 #define  PCI_PM_CAP_D1		0x0200	/* D1 power state support */
 #define  PCI_PM_CAP_D2		0x0400	/* D2 power state support */
 #define  PCI_PM_CAP_PME		0x0800	/* PME pin supported */
@@ -351,7 +351,6 @@
 #define PCI_FUNC( busdevfn )		( ( (busdevfn) >> 0 ) & 0x07 )
 #define PCI_BUSDEVFN( bus, slot, func )	\
 	( ( (bus) << 8 ) | ( (slot) << 3 ) | ( (func) << 0 ) )
-#define PCI_FIRST_FUNC( busdevfn )	( (busdevfn) & ~0x07 )
 
 #define PCI_BASE_CLASS( class )		( (class) >> 16 )
 #define PCI_SUB_CLASS( class )		( ( (class) >> 8 ) & 0xff )
@@ -386,7 +385,6 @@
 extern unsigned long pci_bar_start ( struct pci_device *pci,
 				     unsigned int reg );
 extern int pci_read_config ( struct pci_device *pci );
-extern int pci_find_next ( struct pci_device *pci, unsigned int busdevfn );
 extern int pci_find_driver ( struct pci_device *pci );
 extern int pci_probe ( struct pci_device *pci );
 extern void pci_remove ( struct pci_device *pci );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pci_io.h ipxe-1.0.1~lliurex1505/src/include/ipxe/pci_io.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pci_io.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/pci_io.h	2012-01-06 23:49:04.000000000 +0000
@@ -44,7 +44,6 @@
 
 /* Include all architecture-independent I/O API headers */
 #include <ipxe/efi/efi_pci_api.h>
-#include <ipxe/linux/linux_pci.h>
 
 /* Include all architecture-dependent I/O API headers */
 #include <bits/pci_io.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pending.h ipxe-1.0.1~lliurex1505/src/include/ipxe/pending.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pending.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/pending.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,42 +0,0 @@
-#ifndef _IPXE_PENDING_H
-#define _IPXE_PENDING_H
-
-/** @file
- *
- * Pending operations
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** A pending operation */
-struct pending_operation {
-	/** Pending count */
-	unsigned int count;
-};
-
-/**
- * Check if an operation is pending
- *
- * @v pending		Pending operation
- * @ret is_pending	Operation is pending
- */
-static inline int is_pending ( struct pending_operation *pending ) {
-	return ( pending->count != 0 );
-}
-
-extern int pending_total;
-
-/**
- * Check if any operations are pending
- *
- * @ret have_pending	Some operations are pending
- */
-static inline int have_pending ( void ) {
-	return ( pending_total != 0 );
-}
-
-extern void pending_get ( struct pending_operation *pending );
-extern void pending_put ( struct pending_operation *pending );
-
-#endif /* _IPXE_PENDING_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pinger.h ipxe-1.0.1~lliurex1505/src/include/ipxe/pinger.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/pinger.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/pinger.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,23 +0,0 @@
-#ifndef _IPXE_PINGER_H
-#define _IPXE_PINGER_H
-
-/** @file
- *
- * ICMP ping sender
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/interface.h>
-#include <ipxe/socket.h>
-
-extern int create_pinger ( struct interface *job, const char *hostname,
-			   unsigned long timeout, size_t len,
-			   void ( * callback ) ( struct sockaddr *peer,
-						 unsigned int sequence,
-						 size_t len,
-						 int rc ) );
-
-#endif /* _IPXE_PINGER_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ping.h ipxe-1.0.1~lliurex1505/src/include/ipxe/ping.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/ping.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/ping.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,18 +0,0 @@
-#ifndef _IPXE_PING_H
-#define _IPXE_PING_H
-
-/** @file
- *
- * ICMP ping protocol
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/iobuf.h>
-#include <ipxe/tcpip.h>
-
-extern int ping_rx ( struct io_buffer *iobuf,
-		     struct sockaddr_tcpip *st_src );
-
-#endif /* _IPXE_PING_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/portmap.h ipxe-1.0.1~lliurex1505/src/include/ipxe/portmap.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/portmap.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/portmap.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,63 +0,0 @@
-#ifndef _IPXE_PORTMAP_H
-#define _IPXE_PORTMAP_H
-
-#include <stdint.h>
-#include <ipxe/oncrpc.h>
-
-/** @file
- *
- * SUN ONC RPC protocol.
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** PORTMAP default port */
-#define PORTMAP_PORT   111
-
-/** PORTMAP protocol number */
-#define ONCRPC_PORTMAP 100000
-
-/** PORTMAP version */
-#define PORTMAP_VERS   2
-
-
-/** TCP protocol number */
-#define PORTMAP_PROTO_TCP 6
-/** UDB protocol number */
-#define PORTMAP_PROTO_UDP 17
-
-
-/**
- * A PORTMAP GETPORT reply
- *
- */
-struct portmap_getport_reply {
-	/** Port returned */
-	uint32_t        port;
-};
-
-
-/**
- * Prepare an ONC RPC session to be used as a PORTMAP session
- *
- * @v session           ONC RPC session
- * @v credential        ONC RPC credential
- *
- * The credential parameter must not be NULL, use 'oncrpc_auth_none' if you
- * don't want a particular scheme to be used.
- */
-static inline void portmap_init_session ( struct oncrpc_session *session,
-                                          struct oncrpc_cred *credential) {
-	oncrpc_init_session ( session, credential, &oncrpc_auth_none,
-	                      ONCRPC_PORTMAP, PORTMAP_VERS );
-}
-
-
-int portmap_getport ( struct interface *intf, struct oncrpc_session *session,
-                      uint32_t prog, uint32_t vers, uint32_t proto );
-int portmap_get_getport_reply ( struct portmap_getport_reply *getport_reply,
-                                struct oncrpc_reply *reply );
-
-
-#endif /* _IPXE_PORTMAP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/process.h ipxe-1.0.1~lliurex1505/src/include/ipxe/process.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/process.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/process.h	2012-01-06 23:49:04.000000000 +0000
@@ -174,7 +174,7 @@
  *
  */
 #define PERMANENT_PROCESS( name, step )					      \
-static struct process_descriptor name ## _desc = PROC_DESC_PURE ( step );     \
+struct process_descriptor name ## _desc = PROC_DESC_PURE ( step );	      \
 struct process name __permanent_process = {				      \
 	.list = LIST_HEAD_INIT ( name.list ),				      \
 	.desc = & name ## _desc,					      \
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/random_nz.h ipxe-1.0.1~lliurex1505/src/include/ipxe/random_nz.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/random_nz.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/random_nz.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef _IPXE_RANDOM_NZ_H
-#define _IPXE_RANDOM_NZ_H
-
-/** @file
- *
- * HMAC_DRBG algorithm
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-extern int get_random_nz ( void *data, size_t len );
-
-#endif /* _IPXE_RANDOM_NZ_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rbg.h ipxe-1.0.1~lliurex1505/src/include/ipxe/rbg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rbg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/rbg.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,43 +0,0 @@
-#ifndef _IPXE_RBG_H
-#define _IPXE_RBG_H
-
-/** @file
- *
- * RBG mechanism
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/drbg.h>
-
-/** An RBG */
-struct random_bit_generator {
-	/** DRBG state */
-	struct drbg_state state;
-};
-
-extern struct random_bit_generator rbg;
-
-/**
- * Generate bits using RBG
- *
- * @v additional	Additional input
- * @v additional_len	Length of additional input
- * @v prediction_resist	Prediction resistance is required
- * @v data		Output buffer
- * @v len		Length of output buffer
- * @ret rc		Return status code
- *
- * This is the RBG_Generate function defined in ANS X9.82 Part 4
- * (April 2011 Draft) Section 9.1.2.2.
- */
-static inline int rbg_generate ( const void *additional, size_t additional_len,
-				 int prediction_resist, void *data,
-				 size_t len ) {
-	return drbg_generate ( &rbg.state, additional, additional_len,
-			       prediction_resist, data, len );
-}
-
-#endif /* _IPXE_RBG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/reboot.h ipxe-1.0.1~lliurex1505/src/include/ipxe/reboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/reboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/reboot.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,68 +0,0 @@
-#ifndef _IPXE_REBOOT_H
-#define _IPXE_REBOOT_H
-
-/** @file
- *
- * iPXE reboot API
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/api.h>
-#include <config/reboot.h>
-
-/**
- * Calculate static inline reboot API function name
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @ret _subsys_func	Subsystem API function
- */
-#define REBOOT_INLINE( _subsys, _api_func ) \
-	SINGLE_API_INLINE ( REBOOT_PREFIX_ ## _subsys, _api_func )
-
-/**
- * Provide an reboot API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @v _func		Implementing function
- */
-#define PROVIDE_REBOOT( _subsys, _api_func, _func ) \
-	PROVIDE_SINGLE_API ( REBOOT_PREFIX_ ## _subsys, _api_func, _func )
-
-/**
- * Provide a static inline reboot API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- */
-#define PROVIDE_REBOOT_INLINE( _subsys, _api_func ) \
-	PROVIDE_SINGLE_API_INLINE ( REBOOT_PREFIX_ ## _subsys, _api_func )
-
-/* Include all architecture-independent reboot API headers */
-#include <ipxe/null_reboot.h>
-#include <ipxe/efi/efi_reboot.h>
-
-/* Include all architecture-dependent reboot API headers */
-#include <bits/reboot.h>
-
-/**
- * Reboot system
- *
- * @v warm		Perform a warm reboot
- */
-void reboot ( int warm );
-
-/**
- * Power off system
- *
- * @ret rc		Return status code
- *
- * This function may fail, since not all systems support being powered
- * off by software.
- */
-int poweroff ( void );
-
-#endif /* _IPXE_REBOOT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/retry.h ipxe-1.0.1~lliurex1505/src/include/ipxe/retry.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/retry.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/retry.h	2012-01-06 23:49:04.000000000 +0000
@@ -85,7 +85,6 @@
 extern void start_timer_fixed ( struct retry_timer *timer,
 				unsigned long timeout );
 extern void stop_timer ( struct retry_timer *timer );
-extern void retry_poll ( void );
 
 /**
  * Start timer with no delay
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rootcert.h ipxe-1.0.1~lliurex1505/src/include/ipxe/rootcert.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rootcert.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/rootcert.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef _IPXE_ROOTCERT_H
-#define _IPXE_ROOTCERT_H
-
-/** @file
- *
- * Root certificate store
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/x509.h>
-
-extern struct x509_root root_certificates;
-
-#endif /* _IPXE_ROOTCERT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rotate.h ipxe-1.0.1~lliurex1505/src/include/ipxe/rotate.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rotate.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/rotate.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,23 +10,19 @@
 
 #include <stdint.h>
 
-static inline __attribute__ (( always_inline )) uint32_t
-rol32 ( uint32_t data, unsigned int rotation ) {
+static inline uint32_t rol32 ( uint32_t data, unsigned int rotation ) {
         return ( ( data << rotation ) | ( data >> ( 32 - rotation ) ) );
 }
 
-static inline __attribute__ (( always_inline )) uint32_t
-ror32 ( uint32_t data, unsigned int rotation ) {
+static inline uint32_t ror32 ( uint32_t data, unsigned int rotation ) {
         return ( ( data >> rotation ) | ( data << ( 32 - rotation ) ) );
 }
 
-static inline __attribute__ (( always_inline )) uint64_t
-rol64 ( uint64_t data, unsigned int rotation ) {
+static inline uint64_t rol64 ( uint64_t data, unsigned int rotation ) {
         return ( ( data << rotation ) | ( data >> ( 64 - rotation ) ) );
 }
 
-static inline __attribute__ (( always_inline )) uint64_t
-ror64 ( uint64_t data, unsigned int rotation ) {
+static inline uint64_t ror64 ( uint64_t data, unsigned int rotation ) {
         return ( ( data >> rotation ) | ( data << ( 64 - rotation ) ) );
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rsa.h ipxe-1.0.1~lliurex1505/src/include/ipxe/rsa.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/rsa.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/rsa.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,81 +1,12 @@
 #ifndef _IPXE_RSA_H
 #define _IPXE_RSA_H
 
-/** @file
- *
- * RSA public-key cryptography
- */
-
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <ipxe/crypto.h>
-#include <ipxe/bigint.h>
-#include <ipxe/asn1.h>
-#include <ipxe/tables.h>
-
-/** RSA digestAlgorithm sequence contents */
-#define RSA_DIGESTALGORITHM_CONTENTS( ... )				\
-	ASN1_OID, VA_ARG_COUNT ( __VA_ARGS__ ), __VA_ARGS__,		\
-	ASN1_NULL, 0x00
-
-/** RSA digestAlgorithm sequence */
-#define RSA_DIGESTALGORITHM( ... )					\
-	ASN1_SEQUENCE,							\
-	VA_ARG_COUNT ( RSA_DIGESTALGORITHM_CONTENTS ( __VA_ARGS__ ) ),	\
-	RSA_DIGESTALGORITHM_CONTENTS ( __VA_ARGS__ )
-
-/** RSA digest prefix */
-#define RSA_DIGEST_PREFIX( digest_size )				\
-	ASN1_OCTET_STRING, digest_size
-
-/** RSA digestInfo prefix */
-#define RSA_DIGESTINFO_PREFIX( digest_size, ... )			\
-	ASN1_SEQUENCE,							\
-	( VA_ARG_COUNT ( RSA_DIGESTALGORITHM ( __VA_ARGS__ ) ) +	\
-	  VA_ARG_COUNT ( RSA_DIGEST_PREFIX ( digest_size ) ) +		\
-	  digest_size ),						\
-	RSA_DIGESTALGORITHM ( __VA_ARGS__ ),				\
-	RSA_DIGEST_PREFIX ( digest_size )
-
-/** An RSA digestInfo prefix */
-struct rsa_digestinfo_prefix {
-	/** Digest algorithm */
-	struct digest_algorithm *digest;
-	/** Prefix */
-	const void *data;
-	/** Length of prefix */
-	size_t len;
-};
-
-/** RSA digestInfo prefix table */
-#define RSA_DIGESTINFO_PREFIXES \
-	__table ( struct rsa_digestinfo_prefix, "rsa_digestinfo_prefixes" )
-
-/** Declare an RSA digestInfo prefix */
-#define __rsa_digestinfo_prefix __table_entry ( RSA_DIGESTINFO_PREFIXES, 01 )
-
-/** An RSA context */
-struct rsa_context {
-	/** Allocated memory */
-	void *dynamic;
-	/** Modulus */
-	bigint_element_t *modulus0;
-	/** Modulus size */
-	unsigned int size;
-	/** Modulus length */
-	size_t max_len;
-	/** Exponent */
-	bigint_element_t *exponent0;
-	/** Exponent size */
-	unsigned int exponent_size;
-	/** Input buffer */
-	bigint_element_t *input0;
-	/** Output buffer */
-	bigint_element_t *output0;
-	/** Temporary working space for modular exponentiation */
-	void *tmp;
-};
+struct pubkey_algorithm;
 
 extern struct pubkey_algorithm rsa_algorithm;
 
+#include "crypto/axtls/crypto.h"
+
 #endif /* _IPXE_RSA_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sec80211.h ipxe-1.0.1~lliurex1505/src/include/ipxe/sec80211.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sec80211.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/sec80211.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef _IPXE_SEC80211_H
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/serial.h ipxe-1.0.1~lliurex1505/src/include/ipxe/serial.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/serial.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/serial.h	2012-01-06 23:49:04.000000000 +0000
@@ -12,6 +12,5 @@
 extern void serial_putc ( int ch );
 extern int serial_getc ( void );
 extern int serial_ischar ( void );
-extern int serial_initialized;
 
 #endif /* _IPXE_SERIAL_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/settings.h ipxe-1.0.1~lliurex1505/src/include/ipxe/settings.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/settings.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/settings.h	2012-01-06 23:49:04.000000000 +0000
@@ -38,14 +38,27 @@
 	 * The setting tag is a numerical description of the setting
 	 * (such as a DHCP option number, or an SMBIOS structure and
 	 * field number).
-	 */
-	unsigned int tag;
-	/** Setting scope (or NULL)
 	 *
-	 * For historic reasons, a NULL scope with a non-zero tag
-	 * indicates a DHCPv4 option setting.
+	 * Users can construct tags for settings that are not
+	 * explicitly known to iPXE using the generic syntax for
+	 * numerical settings.  For example, the setting name "60"
+	 * will be interpreted as referring to DHCP option 60 (the
+	 * vendor class identifier).
+	 *
+	 * This creates a potential for namespace collisions, since
+	 * the interpretation of the numerical description will vary
+	 * according to the settings block.  When a user attempts to
+	 * fetch a generic numerical setting, we need to ensure that
+	 * only the intended settings block interprets the numerical
+	 * description.  (For example, we do not want to attempt to
+	 * retrieve the subnet mask from SMBIOS, or the system UUID
+	 * from DHCP.)
+	 *
+	 * This potential problem is resolved by allowing the setting
+	 * tag to include a "magic" value indicating the
+	 * interpretation to be placed upon the numerical description.
 	 */
-	struct settings_scope *scope;
+	unsigned int tag;
 };
 
 /** Configuration setting table */
@@ -70,19 +83,12 @@
 #define SETTING_HOST_EXTRA	10 /**< Host identity additional settings */
 #define SETTING_AUTH		11 /**< Authentication settings */
 #define SETTING_AUTH_EXTRA	12 /**< Authentication additional settings */
-#define SETTING_CRYPTO		13 /**< Cryptography settings */
-#define SETTING_MISC		14 /**< Miscellaneous settings */
+#define SETTING_MISC		13 /**< Miscellaneous settings */
 
 /** @} */
 
 /** Settings block operations */
 struct settings_operations {
-	/** Redirect to underlying settings block (if applicable)
-	 *
-	 * @v settings		Settings block
-	 * @ret settings	Underlying settings block
-	 */
-	struct settings * ( * redirect ) ( struct settings *settings );
 	/** Check applicability of setting
 	 *
 	 * @v settings		Settings block
@@ -127,6 +133,12 @@
 	struct refcnt *refcnt;
 	/** Name */
 	const char *name;
+	/** Tag magic
+	 *
+	 * This value will be ORed in to any numerical tags
+	 * constructed by parse_setting_name().
+	 */
+	unsigned int tag_magic;
 	/** Parent settings block */
 	struct settings *parent;
 	/** Sibling settings blocks */
@@ -135,45 +147,9 @@
 	struct list_head children;
 	/** Settings block operations */
 	struct settings_operations *op;
-	/** Default scope for numerical settings constructed for this block */
-	struct settings_scope *default_scope;
 };
 
 /**
- * A setting scope
- *
- * Users can construct tags for settings that are not explicitly known
- * to iPXE using the generic syntax for numerical settings.  For
- * example, the setting name "60" will be interpreted as referring to
- * DHCP option 60 (the vendor class identifier).
- *
- * This creates a potential for namespace collisions, since the
- * interpretation of the numerical description will vary according to
- * the settings block.  When a user attempts to fetch a generic
- * numerical setting, we need to ensure that only the intended
- * settings blocks interpret this numerical description.  (For
- * example, we do not want to attempt to retrieve the subnet mask from
- * SMBIOS, or the system UUID from DHCP.)
- *
- * This potential problem is resolved by including a user-invisible
- * "scope" within the definition of each setting.  Settings blocks may
- * use this to determine whether or not the setting is applicable.
- * Any settings constructed from a numerical description
- * (e.g. "smbios/1.4.0") will be assigned the default scope of the
- * settings block specified in the description (e.g. "smbios"); this
- * provides behaviour matching the user's expectations in most
- * circumstances.
- */
-struct settings_scope {
-	/** Dummy field
-	 *
-	 * This is included only to ensure that pointers to different
-	 * scopes always compare differently.
-	 */
-	uint8_t dummy;
-} __attribute__ (( packed ));
-
-/**
  * A setting type
  *
  * This represents a type of setting (e.g. string, IPv4 address,
@@ -185,47 +161,25 @@
 	 * This is the name exposed to the user (e.g. "string").
 	 */
 	const char *name;
-	/** Parse formatted string to setting value
+	/** Parse and set value of setting
 	 *
-	 * @v type		Setting type
-	 * @v value		Formatted setting value
-	 * @v buf		Buffer to contain raw value
-	 * @v len		Length of buffer
-	 * @ret len		Length of raw value, or negative error
+	 * @v settings		Settings block
+	 * @v setting		Setting to store
+	 * @v value		Formatted setting data
+	 * @ret rc		Return status code
 	 */
-	int ( * parse ) ( struct setting_type *type, const char *value,
-			  void *buf, size_t len );
-	/** Format setting value as a string
-	 *
-	 * @v type		Setting type
-	 * @v raw		Raw setting value
-	 * @v raw_len		Length of raw setting value
+	int ( * storef ) ( struct settings *settings, struct setting *setting,
+			   const char *value );
+	/** Fetch and format value of setting
+	 *
+	 * @v settings		Settings block
+	 * @v setting		Setting to fetch
 	 * @v buf		Buffer to contain formatted value
 	 * @v len		Length of buffer
 	 * @ret len		Length of formatted value, or negative error
 	 */
-	int ( * format ) ( struct setting_type *type, const void *raw,
-			   size_t raw_len, char *buf, size_t len );
-	/** Convert number to setting value
-	 *
-	 * @v type		Setting type
-	 * @v value		Numeric value
-	 * @v buf		Buffer to contain raw value
-	 * @v len		Length of buffer
-	 * @ret len		Length of raw value, or negative error
-	 */
-	int ( * denumerate ) ( struct setting_type *type, unsigned long value,
-			       void *buf, size_t len );
-	/** Convert setting value to number
-	 *
-	 * @v type		Setting type
-	 * @v raw		Raw setting value
-	 * @v raw_len		Length of raw setting value
-	 * @v value		Numeric value to fill in
-	 * @ret rc		Return status code
-	 */
-	int ( * numerate ) ( struct setting_type *type, const void *raw,
-			     size_t raw_len, unsigned long *value );
+	int ( * fetchf ) ( struct settings *settings, struct setting *setting,
+			   char *buf, size_t len );
 };
 
 /** Configuration setting type table */
@@ -253,28 +207,6 @@
 /** Declare a settings applicator */
 #define __settings_applicator __table_entry ( SETTINGS_APPLICATORS, 01 )
 
-/** A built-in setting */
-struct builtin_setting {
-	/** Setting */
-	struct setting *setting;
-	/** Fetch setting value
-	 *
-	 * @v data		Buffer to fill with setting data
-	 * @v len		Length of buffer
-	 * @ret len		Length of setting data, or negative error
-	 */
-	int ( * fetch ) ( void *data, size_t len );
-};
-
-/** Built-in settings table */
-#define BUILTIN_SETTINGS __table ( struct builtin_setting, "builtin_settings" )
-
-/** Declare a built-in setting */
-#define __builtin_setting __table_entry ( BUILTIN_SETTINGS, 01 )
-
-/** Built-in setting scope */
-extern struct settings_scope builtin_scope;
-
 /**
  * A generic settings block
  *
@@ -286,9 +218,6 @@
 	struct list_head list;
 };
 
-/** A child settings block locator function */
-typedef struct settings * ( *get_child_settings_t ) ( struct settings *settings,
-						      const char *name );
 extern struct settings_operations generic_settings_operations;
 extern int generic_settings_store ( struct settings *settings,
 				    struct setting *setting,
@@ -302,7 +231,6 @@
 			       struct settings *parent, const char *name );
 extern void unregister_settings ( struct settings *settings );
 
-extern struct settings * settings_target ( struct settings *settings );
 extern int setting_applies ( struct settings *settings,
 			     struct setting *setting );
 extern int store_setting ( struct settings *settings, struct setting *setting,
@@ -313,8 +241,6 @@
 						struct setting *setting );
 extern int fetch_setting_len ( struct settings *settings,
 			       struct setting *setting );
-extern int fetch_setting_copy ( struct settings *settings,
-				struct setting *setting, void **data );
 extern int fetch_string_setting ( struct settings *settings,
 				  struct setting *setting,
 				  char *data, size_t len );
@@ -341,41 +267,22 @@
 extern void clear_settings ( struct settings *settings );
 extern int setting_cmp ( struct setting *a, struct setting *b );
 
-extern struct settings * find_child_settings ( struct settings *parent,
-					       const char *name );
-extern struct settings * autovivify_child_settings ( struct settings *parent,
-						     const char *name );
 extern const char * settings_name ( struct settings *settings );
 extern struct settings * find_settings ( const char *name );
 extern struct setting * find_setting ( const char *name );
-extern int parse_setting_name ( char *name, get_child_settings_t get_child,
-				struct settings **settings,
-				struct setting *setting );
+
 extern int setting_name ( struct settings *settings, struct setting *setting,
 			  char *buf, size_t len );
-extern int setting_format ( struct setting_type *type, const void *raw,
-			    size_t raw_len, char *buf, size_t len );
-extern int setting_parse ( struct setting_type *type, const char *value,
-			   void *buf, size_t len );
-extern int setting_numerate ( struct setting_type *type, const void *raw,
-			      size_t raw_len, unsigned long *value );
-extern int setting_denumerate ( struct setting_type *type, unsigned long value,
-				void *buf, size_t len );
-extern int fetchf_setting ( struct settings *settings, struct setting *setting,
-			    char *buf, size_t len );
-extern int fetchf_setting_copy ( struct settings *settings,
-				 struct setting *setting, char **value );
 extern int storef_setting ( struct settings *settings,
 			    struct setting *setting,
 			    const char *value );
-extern int fetchn_setting ( struct settings *settings, struct setting *setting,
-			    unsigned long *value );
-extern int storen_setting ( struct settings *settings, struct setting *setting,
-			    unsigned long value );
+extern int storef_named_setting ( const char *name, const char *value );
+extern int fetchf_named_setting ( const char *name, char *name_buf,
+				  size_t name_len, char *value_buf,
+				  size_t value_len );
 extern char * expand_settings ( const char *string );
 
 extern struct setting_type setting_type_string __setting_type;
-extern struct setting_type setting_type_uristring __setting_type;
 extern struct setting_type setting_type_ipv4 __setting_type;
 extern struct setting_type setting_type_int8 __setting_type;
 extern struct setting_type setting_type_int16 __setting_type;
@@ -384,17 +291,13 @@
 extern struct setting_type setting_type_uint16 __setting_type;
 extern struct setting_type setting_type_uint32 __setting_type;
 extern struct setting_type setting_type_hex __setting_type;
-extern struct setting_type setting_type_hexhyp __setting_type;
-extern struct setting_type setting_type_hexraw __setting_type;
 extern struct setting_type setting_type_uuid __setting_type;
-extern struct setting_type setting_type_busdevfn __setting_type;
 
 extern struct setting ip_setting __setting ( SETTING_IPv4 );
 extern struct setting netmask_setting __setting ( SETTING_IPv4 );
 extern struct setting gateway_setting __setting ( SETTING_IPv4 );
 extern struct setting dns_setting __setting ( SETTING_IPv4_EXTRA );
 extern struct setting hostname_setting __setting ( SETTING_HOST );
-extern struct setting domain_setting __setting ( SETTING_IPv4_EXTRA );
 extern struct setting filename_setting __setting ( SETTING_BOOT );
 extern struct setting root_path_setting __setting ( SETTING_SANBOOT );
 extern struct setting username_setting __setting ( SETTING_AUTH );
@@ -411,17 +314,17 @@
  * @v settings		Settings block
  * @v op		Settings block operations
  * @v refcnt		Containing object reference counter, or NULL
- * @v default_scope	Default scope
+ * @v tag_magic		Tag magic
  */
 static inline void settings_init ( struct settings *settings,
 				   struct settings_operations *op,
 				   struct refcnt *refcnt,
-				   struct settings_scope *default_scope ) {
+				   unsigned int tag_magic ) {
 	INIT_LIST_HEAD ( &settings->siblings );
 	INIT_LIST_HEAD ( &settings->children );
 	settings->op = op;
 	settings->refcnt = refcnt;
-	settings->default_scope = default_scope;
+	settings->tag_magic = tag_magic;
 }
 
 /**
@@ -433,7 +336,7 @@
 static inline void generic_settings_init ( struct generic_settings *generics,
 					   struct refcnt *refcnt ) {
 	settings_init ( &generics->settings, &generic_settings_operations,
-			refcnt, NULL );
+			refcnt, 0 );
 	INIT_LIST_HEAD ( &generics->list );
 }
 
@@ -450,6 +353,32 @@
 }
 
 /**
+ * Fetch and format value of setting
+ *
+ * @v settings		Settings block, or NULL to search all blocks
+ * @v setting		Setting to fetch
+ * @v type		Settings type
+ * @v buf		Buffer to contain formatted value
+ * @v len		Length of buffer
+ * @ret len		Length of formatted value, or negative error
+ */
+static inline int fetchf_setting ( struct settings *settings,
+				   struct setting *setting,
+				   char *buf, size_t len ) {
+	return setting->type->fetchf ( settings, setting, buf, len );
+}
+
+/**
+ * Delete named setting
+ *
+ * @v name		Name of setting
+ * @ret rc		Return status code
+ */
+static inline int delete_named_setting ( const char *name ) {
+	return storef_named_setting ( name, NULL );
+}
+
+/**
  * Check existence of setting
  *
  * @v settings		Settings block, or NULL to search all blocks
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sha1.h ipxe-1.0.1~lliurex1505/src/include/ipxe/sha1.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sha1.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/sha1.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,80 +1,24 @@
 #ifndef _IPXE_SHA1_H
 #define _IPXE_SHA1_H
 
-/** @file
- *
- * SHA-1 algorithm
- *
- */
-
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <stdint.h>
-#include <ipxe/crypto.h>
-
-/** An SHA-1 digest */
-struct sha1_digest {
-	/** Hash output */
-	uint32_t h[5];
-};
-
-/** An SHA-1 data block */
-union sha1_block {
-	/** Raw bytes */
-	uint8_t byte[64];
-	/** Raw dwords */
-	uint32_t dword[16];
-	/** Final block structure */
-	struct {
-		/** Padding */
-		uint8_t pad[56];
-		/** Length in bits */
-		uint64_t len;
-	} final;
-};
-
-/** SHA-1 digest and data block
- *
- * The order of fields within this structure is designed to minimise
- * code size.
- */
-struct sha1_digest_data {
-	/** Digest of data already processed */
-	struct sha1_digest digest;
-	/** Accumulated data */
-	union sha1_block data;
-} __attribute__ (( packed ));
-
-/** SHA-1 digest and data block */
-union sha1_digest_data_dwords {
-	/** Digest and data block */
-	struct sha1_digest_data dd;
-	/** Raw dwords */
-	uint32_t dword[ sizeof ( struct sha1_digest_data ) /
-			sizeof ( uint32_t ) ];
-};
-
-/** An SHA-1 context */
-struct sha1_context {
-	/** Amount of accumulated data */
-	size_t len;
-	/** Digest and accumulated data */
-	union sha1_digest_data_dwords ddd;
-} __attribute__ (( packed ));
+#include "crypto/axtls/crypto.h"
 
-/** SHA-1 context size */
-#define SHA1_CTX_SIZE sizeof ( struct sha1_context )
+struct digest_algorithm;
 
-/** SHA-1 digest size */
-#define SHA1_DIGEST_SIZE sizeof ( struct sha1_digest )
+#define SHA1_CTX_SIZE sizeof ( SHA1_CTX )
+#define SHA1_DIGEST_SIZE SHA1_SIZE
 
 extern struct digest_algorithm sha1_algorithm;
 
-extern void prf_sha1 ( const void *key, size_t key_len, const char *label,
-		       const void *data, size_t data_len, void *prf,
-		       size_t prf_len );
-extern void pbkdf2_sha1 ( const void *passphrase, size_t pass_len,
-			  const void *salt, size_t salt_len,
-			  int iterations, void *key, size_t key_len );
+/* SHA1-wrapping functions defined in sha1extra.c: */
+
+void prf_sha1 ( const void *key, size_t key_len, const char *label,
+		const void *data, size_t data_len, void *prf, size_t prf_len );
+
+void pbkdf2_sha1 ( const void *passphrase, size_t pass_len,
+		   const void *salt, size_t salt_len,
+		   int iterations, void *key, size_t key_len );
 
 #endif /* _IPXE_SHA1_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sha256.h ipxe-1.0.1~lliurex1505/src/include/ipxe/sha256.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/sha256.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/sha256.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,73 +0,0 @@
-#ifndef _IPXE_SHA256_H
-#define _IPXE_SHA256_H
-
-/** @file
- *
- * SHA-256 algorithm
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-
-/** An SHA-256 digest */
-struct sha256_digest {
-	/** Hash output */
-	uint32_t h[8];
-};
-
-/** An SHA-256 data block */
-union sha256_block {
-	/** Raw bytes */
-	uint8_t byte[64];
-	/** Raw dwords */
-	uint32_t dword[16];
-	/** Final block structure */
-	struct {
-		/** Padding */
-		uint8_t pad[56];
-		/** Length in bits */
-		uint64_t len;
-	} final;
-};
-
-/** SHA-256 digest and data block
- *
- * The order of fields within this structure is designed to minimise
- * code size.
- */
-struct sha256_digest_data {
-	/** Digest of data already processed */
-	struct sha256_digest digest;
-	/** Accumulated data */
-	union sha256_block data;
-} __attribute__ (( packed ));
-
-/** SHA-256 digest and data block */
-union sha256_digest_data_dwords {
-	/** Digest and data block */
-	struct sha256_digest_data dd;
-	/** Raw dwords */
-	uint32_t dword[ sizeof ( struct sha256_digest_data ) /
-			sizeof ( uint32_t ) ];
-};
-
-/** An SHA-256 context */
-struct sha256_context {
-	/** Amount of accumulated data */
-	size_t len;
-	/** Digest and accumulated data */
-	union sha256_digest_data_dwords ddd;
-} __attribute__ (( packed ));
-
-/** SHA-256 context size */
-#define SHA256_CTX_SIZE sizeof ( struct sha256_context )
-
-/** SHA-256 digest size */
-#define SHA256_DIGEST_SIZE sizeof ( struct sha256_digest )
-
-extern struct digest_algorithm sha256_algorithm;
-
-#endif /* _IPXE_SHA256_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/smbios.h ipxe-1.0.1~lliurex1505/src/include/ipxe/smbios.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/smbios.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/smbios.h	2012-01-06 23:49:04.000000000 +0000
@@ -148,27 +148,15 @@
 	size_t len;
 	/** Number of SMBIOS structures */
 	unsigned int count;
-	/** SMBIOS version */
-	uint16_t version;
 };
 
-/**
- * Calculate SMBIOS version
- *
- * @v major		Major version
- * @v minor		Minor version
- * @ret version		SMBIOS version
- */
-#define SMBIOS_VERSION( major, minor ) ( ( (major) << 8 ) | (minor) )
-
 extern int find_smbios ( struct smbios *smbios );
-extern int find_smbios_structure ( unsigned int type, unsigned int instance,
+extern int find_smbios_structure ( unsigned int type,
 				   struct smbios_structure *structure );
 extern int read_smbios_structure ( struct smbios_structure *structure,
 				   void *data, size_t len );
 extern int read_smbios_string ( struct smbios_structure *structure,
 				unsigned int index,
 				void *data, size_t len );
-extern int smbios_version ( void );
 
 #endif /* _IPXE_SMBIOS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/socket.h ipxe-1.0.1~lliurex1505/src/include/ipxe/socket.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/socket.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/socket.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,7 +10,6 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <ipxe/tables.h>
 
 /**
  * @defgroup commtypes Communication semantics
@@ -28,11 +27,6 @@
 #define UDP_SOCK_DGRAM 0x2
 #define SOCK_DGRAM udp_sock_dgram
 
-/** Echo testing streams */
-extern int ping_sock_echo;
-#define PING_SOCK_ECHO 0x3
-#define SOCK_ECHO ping_sock_echo
-
 /** @} */
 
 /**
@@ -48,8 +42,6 @@
 		return "SOCK_STREAM";
 	} else if ( semantics == SOCK_DGRAM ) {
 		return "SOCK_DGRAM";
-	} else if ( semantics == SOCK_ECHO ) {
-		return "SOCK_ECHO";
 	} else {
 		return "SOCK_UNKNOWN";
 	}
@@ -76,7 +68,6 @@
 	switch ( family ) {
 	case AF_INET:		return "AF_INET";
 	case AF_INET6:		return "AF_INET6";
-	case AF_FC:		return "AF_FC";
 	default:		return "AF_UNKNOWN";
 	}
 }
@@ -108,39 +99,4 @@
 	char pad[ SA_LEN - sizeof ( sa_family_t ) ];
 } __attribute__ (( may_alias ));
 
-/**
- * Socket address converter
- *
- */
-struct sockaddr_converter {
-	/** Socket address family
-	 *
-	 * This is an AF_XXX constant.
-	 */
-        sa_family_t family;
-	/** Transcribe socket address
-	 *
-	 * @v sa		Socket address
-	 * @ret string		Socket address string
-	 */
-	const char * ( * ntoa ) ( struct sockaddr *sa );
-	/** Parse socket address
-	 *
-	 * @v string		Socket address stringh
-	 * @v sa		Socket address to fill in
-	 * @ret rc		Return status code
-	 */
-	int ( * aton ) ( const char *string, struct sockaddr *sa );
-};
-
-/** Socket address converter table */
-#define SOCKADDR_CONVERTERS \
-	__table ( struct sockaddr_converter, "sockaddr_converters" )
-
-/** Declare a socket address converter */
-#define __sockaddr_converter __table_entry ( SOCKADDR_CONVERTERS, 01 )
-
-extern const char * sock_ntoa ( struct sockaddr *sa );
-extern int sock_aton ( const char *string, struct sockaddr *sa );
-
 #endif /* _IPXE_SOCKET_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/syslog.h ipxe-1.0.1~lliurex1505/src/include/ipxe/syslog.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/syslog.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/syslog.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,8 +9,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <syslog.h>
-
 /** Syslog server port */
 #define SYSLOG_PORT 514
 
@@ -20,22 +18,19 @@
  */
 #define SYSLOG_BUFSIZE 128
 
-/** Syslog default facility
+/** Syslog facility
  *
  * This is a policy decision
  */
-#define SYSLOG_DEFAULT_FACILITY 0 /* kernel */
+#define SYSLOG_FACILITY 0 /* kernel */
 
-/** Syslog default severity
+/** Syslog severity
  *
  * This is a policy decision
  */
-#define SYSLOG_DEFAULT_SEVERITY LOG_INFO
+#define SYSLOG_SEVERITY 6 /* informational */
 
 /** Syslog priority */
 #define SYSLOG_PRIORITY( facility, severity ) ( 8 * (facility) + (severity) )
 
-extern int syslog_send ( struct interface *xfer, unsigned int severity,
-			 const char *message, const char *terminator );
-
 #endif /* _IPXE_SYSLOG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tcp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/tcp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tcp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/tcp.h	2012-01-06 23:49:04.000000000 +0000
@@ -54,31 +54,6 @@
 /** Code for the TCP MSS option */
 #define TCP_OPTION_MSS 2
 
-/** TCP window scale option */
-struct tcp_window_scale_option {
-	uint8_t kind;
-	uint8_t length;
-	uint8_t scale;
-} __attribute__ (( packed ));
-
-/** Padded TCP window scale option (used for sending) */
-struct tcp_window_scale_padded_option {
-	uint8_t nop;
-	struct tcp_window_scale_option wsopt;
-} __attribute (( packed ));
-
-/** Code for the TCP window scale option */
-#define TCP_OPTION_WS 3
-
-/** Advertised TCP window scale
- *
- * Using a scale factor of 2**9 provides for a maximum window of 32MB,
- * which is sufficient to allow Gigabit-speed transfers with a 200ms
- * RTT.  The minimum advertised window is 512 bytes, which is still
- * less than a single packet.
- */
-#define TCP_RX_WINDOW_SCALE 9
-
 /** TCP timestamp option */
 struct tcp_timestamp_option {
 	uint8_t kind;
@@ -100,9 +75,7 @@
 struct tcp_options {
 	/** MSS option, if present */
 	const struct tcp_mss_option *mssopt;
-	/** Window scale option, if present */
-	const struct tcp_window_scale_option *wsopt;
-	/** Timestamp option, if present */
+	/** Timestampe option, if present */
 	const struct tcp_timestamp_option *tsopt;
 };
 
@@ -287,48 +260,37 @@
 /**
  * Maxmimum advertised TCP window size
  *
- * The maximum bandwidth on any link is limited by
- *
- *    max_bandwidth * round_trip_time = tcp_window
- *
- * Some rough expectations for achievable bandwidths over various
- * links are:
- *
- *    a) Gigabit LAN: expected bandwidth 125MB/s, typical RTT 0.5ms,
- *       minimum required window 64kB
- *
- *    b) Home Internet connection: expected bandwidth 10MB/s, typical
- *       RTT 25ms, minimum required window 256kB
- *
- *    c) WAN: expected bandwidth 2MB/s, typical RTT 100ms, minimum
- *       required window 200kB.
- *
- * The maximum possible value for the TCP window size is 1GB (using
- * the maximum window scale of 2**14).  However, it is advisable to
- * keep the window size as small as possible (without limiting
- * bandwidth), since in the event of a lost packet the window size
- * represents the maximum amount that will need to be retransmitted.
- *
- * We therefore choose a maximum window size of 256kB.
+ * We estimate the TCP window size as the amount of free memory we
+ * have.  This is not strictly accurate (since it ignores any space
+ * already allocated as RX buffers), but it will do for now.
+ *
+ * Since we don't store out-of-order received packets, the
+ * retransmission penalty is that the whole window contents must be
+ * resent.  This suggests keeping the window size small, but bear in
+ * mind that the maximum bandwidth on any link is limited to
+ *
+ *    max_bandwidth = ( tcp_window / round_trip_time )
+ *
+ * With a 48kB window, which probably accurately reflects our amount
+ * of free memory, and a WAN RTT of say 200ms, this gives a maximum
+ * bandwidth of 240kB/s.  This is sufficiently close to realistic that
+ * we will need to be careful that our advertised window doesn't end
+ * up limiting WAN download speeds.
+ *
+ * Finally, since the window goes into a 16-bit field and we cannot
+ * actually use 65536, we use a window size of (65536-4) to ensure
+ * that payloads remain dword-aligned.
  */
-#define TCP_MAX_WINDOW_SIZE	( 256 * 1024 )
+//#define TCP_MAX_WINDOW_SIZE	( 65536 - 4 )
+#define TCP_MAX_WINDOW_SIZE	8192
 
 /**
  * Path MTU
  *
- * IPv6 requires all data link layers to support a datagram size of
- * 1280 bytes.  We choose to use this as our maximum transmitted
- * datagram size, on the assumption that any practical link layer we
- * encounter will allow this size.  This is a very conservative
- * assumption in practice, but the impact of making such a
- * conservative assumption is insignificant since the amount of data
- * that we transmit (rather than receive) is negligible.
- *
- * We allow space within this 1280 bytes for an IPv6 header, a TCP
- * header, and a (padded) TCP timestamp option.
+ * We really ought to implement Path MTU discovery.  Until we do,
+ * anything with a path MTU greater than this may fail.
  */
-#define TCP_PATH_MTU							\
-	( 1280 - 40 /* IPv6 */ - 20 /* TCP */ - 12 /* TCP timestamp */ )
+#define TCP_PATH_MTU 1460
 
 /**
  * Advertised TCP MSS
@@ -354,7 +316,6 @@
 	( MAX_LL_NET_HEADER_LEN +				\
 	  sizeof ( struct tcp_header ) +			\
 	  sizeof ( struct tcp_mss_option ) +			\
-	  sizeof ( struct tcp_window_scale_padded_option ) +	\
 	  sizeof ( struct tcp_timestamp_padded_option ) )
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tcpip.h ipxe-1.0.1~lliurex1505/src/include/ipxe/tcpip.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tcpip.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/tcpip.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,7 +13,6 @@
 #include <ipxe/socket.h>
 #include <ipxe/in.h>
 #include <ipxe/tables.h>
-#include <bits/tcpip.h>
 
 struct io_buffer;
 struct net_device;
@@ -24,16 +23,6 @@
  */
 #define TCPIP_EMPTY_CSUM 0xffff
 
-/** TCP/IP address flags */
-enum tcpip_st_flags {
-	/** Bind to a privileged port (less than 1024)
-	 *
-	 * This value is chosen as 1024 to optimise the calculations
-	 * in tcpip_bind().
-	 */
-	TCPIP_BIND_PRIVILEGED = 0x0400,
-};
-
 /**
  * TCP/IP socket address
  *
@@ -43,8 +32,6 @@
 struct sockaddr_tcpip {
 	/** Socket address family (part of struct @c sockaddr) */
 	sa_family_t st_family;
-	/** Flags */
-	uint16_t st_flags;
 	/** TCP/IP port */
 	uint16_t st_port;
 	/** Padding
@@ -54,9 +41,7 @@
 	 * family.
 	 */
 	char pad[ sizeof ( struct sockaddr ) -
-		  ( sizeof ( sa_family_t ) /* st_family */ +
-		    sizeof ( uint16_t ) /* st_flags */ +
-		    sizeof ( uint16_t ) /* st_port */ ) ];
+		  ( sizeof ( sa_family_t ) + sizeof ( uint16_t ) ) ];
 } __attribute__ (( may_alias ));
 
 /** 
@@ -69,7 +54,6 @@
          * Process received packet
          *
          * @v iobuf		I/O buffer
-	 * @v netdev		Network device
 	 * @v st_src		Partially-filled source address
 	 * @v st_dest		Partially-filled destination address
 	 * @v pshdr_csum	Pseudo-header checksum
@@ -77,8 +61,7 @@
          *
          * This method takes ownership of the I/O buffer.
          */
-        int ( * rx ) ( struct io_buffer *iobuf, struct net_device *netdev,
-		       struct sockaddr_tcpip *st_src,
+        int ( * rx ) ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src,
 		       struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum );
         /** 
 	 * Transport-layer protocol number
@@ -130,25 +113,16 @@
 /** Declare a TCP/IP network-layer protocol */
 #define __tcpip_net_protocol __table_entry ( TCPIP_NET_PROTOCOLS, 01 )
 
-extern int tcpip_rx ( struct io_buffer *iobuf, struct net_device *netdev,
-		      uint8_t tcpip_proto, struct sockaddr_tcpip *st_src,
+extern int tcpip_rx ( struct io_buffer *iobuf, uint8_t tcpip_proto,
+		      struct sockaddr_tcpip *st_src,
 		      struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum );
 extern int tcpip_tx ( struct io_buffer *iobuf, struct tcpip_protocol *tcpip,
 		      struct sockaddr_tcpip *st_src,
 		      struct sockaddr_tcpip *st_dest,
 		      struct net_device *netdev,
 		      uint16_t *trans_csum );
-extern uint16_t generic_tcpip_continue_chksum ( uint16_t partial,
-						const void *data, size_t len );
+extern uint16_t tcpip_continue_chksum ( uint16_t partial,
+					const void *data, size_t len );
 extern uint16_t tcpip_chksum ( const void *data, size_t len );
-extern int tcpip_bind ( struct sockaddr_tcpip *st_local,
-			int ( * available ) ( int port ) );
-
-/* Use generic_tcpip_continue_chksum() if no architecture-specific
- * version is available
- */
-#ifndef tcpip_continue_chksum
-#define tcpip_continue_chksum generic_tcpip_continue_chksum
-#endif
 
 #endif /* _IPXE_TCPIP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tftp.h ipxe-1.0.1~lliurex1505/src/include/ipxe/tftp.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tftp.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/tftp.h	2012-01-06 23:49:04.000000000 +0000
@@ -80,4 +80,6 @@
 	struct tftp_oack	oack;
 };
 
+extern void tftp_set_request_blksize ( unsigned int blksize );
+
 #endif /* _IPXE_TFTP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/threewire.h ipxe-1.0.1~lliurex1505/src/include/ipxe/threewire.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/threewire.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/threewire.h	2012-01-06 23:49:04.000000000 +0000
@@ -62,19 +62,6 @@
 }
 
 /**
- * Initialise Atmel AT93C06 serial EEPROM
- *
- * @v device		SPI device
- * @v organisation	Word organisation (8 or 16)
- */
-static inline __attribute__ (( always_inline )) void
-init_at93c06 ( struct spi_device *device, unsigned int organisation ) {
-	device->nvs.size = ( 256 / organisation );
-	device->address_len = ( ( organisation == 8 ) ? 7 : 6 );
-	init_at93cx6 ( device, organisation );
-}
-
-/**
  * Initialise Atmel AT93C46 serial EEPROM
  *
  * @v device		SPI device
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/time.h ipxe-1.0.1~lliurex1505/src/include/ipxe/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/time.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,59 +0,0 @@
-#ifndef _IPXE_TIME_H
-#define _IPXE_TIME_H
-
-/** @file
- *
- * Time source
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <sys/time.h>
-#include <ipxe/api.h>
-#include <config/time.h>
-
-/**
- * Calculate static inline time API function name
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @ret _subsys_func	Subsystem API function
- */
-#define TIME_INLINE( _subsys, _api_func ) \
-	SINGLE_API_INLINE ( TIME_PREFIX_ ## _subsys, _api_func )
-
-/**
- * Provide a time API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- * @v _func		Implementing function
- */
-#define PROVIDE_TIME( _subsys, _api_func, _func ) \
-	PROVIDE_SINGLE_API ( TIME_PREFIX_ ## _subsys, _api_func, _func )
-
-/**
- * Provide a static inline time API implementation
- *
- * @v _prefix		Subsystem prefix
- * @v _api_func		API function
- */
-#define PROVIDE_TIME_INLINE( _subsys, _api_func ) \
-	PROVIDE_SINGLE_API_INLINE ( TIME_PREFIX_ ## _subsys, _api_func )
-
-/* Include all architecture-independent time API headers */
-#include <ipxe/null_time.h>
-#include <ipxe/linux/linux_time.h>
-
-/* Include all architecture-dependent time API headers */
-#include <bits/time.h>
-
-/**
- * Get current time in seconds
- *
- * @ret time		Time, in seconds
- */
-time_t time_now ( void );
-
-#endif /* _IPXE_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tls.h ipxe-1.0.1~lliurex1505/src/include/ipxe/tls.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/tls.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/tls.h	2012-01-06 23:49:04.000000000 +0000
@@ -16,10 +16,7 @@
 #include <ipxe/crypto.h>
 #include <ipxe/md5.h>
 #include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
 #include <ipxe/x509.h>
-#include <ipxe/pending.h>
-#include <ipxe/iobuf.h>
 
 /** A TLS header */
 struct tls_header {
@@ -43,9 +40,6 @@
 /** TLS version 1.1 */
 #define TLS_VERSION_TLS_1_1 0x0302
 
-/** TLS version 1.2 */
-#define TLS_VERSION_TLS_1_2 0x0303
-
 /** Change cipher content type */
 #define TLS_TYPE_CHANGE_CIPHER 20
 
@@ -79,27 +73,6 @@
 #define TLS_RSA_WITH_NULL_SHA 0x0002
 #define TLS_RSA_WITH_AES_128_CBC_SHA 0x002f
 #define TLS_RSA_WITH_AES_256_CBC_SHA 0x0035
-#define TLS_RSA_WITH_AES_128_CBC_SHA256 0x003c
-#define TLS_RSA_WITH_AES_256_CBC_SHA256 0x003d
-
-/* TLS hash algorithm identifiers */
-#define TLS_MD5_ALGORITHM 1
-#define TLS_SHA1_ALGORITHM 2
-#define TLS_SHA256_ALGORITHM 4
-
-/* TLS signature algorithm identifiers */
-#define TLS_RSA_ALGORITHM 1
-
-/* TLS server name extension */
-#define TLS_SERVER_NAME 0
-#define TLS_SERVER_NAME_HOST_NAME 0
-
-/* TLS maximum fragment length extension */
-#define TLS_MAX_FRAGMENT_LENGTH 1
-#define TLS_MAX_FRAGMENT_LENGTH_512 1
-#define TLS_MAX_FRAGMENT_LENGTH_1024 2
-#define TLS_MAX_FRAGMENT_LENGTH_2048 3
-#define TLS_MAX_FRAGMENT_LENGTH_4096 4
 
 /** TLS RX state machine state */
 enum tls_rx_state {
@@ -107,18 +80,18 @@
 	TLS_RX_DATA,
 };
 
-/** TLS TX pending flags */
-enum tls_tx_pending {
-	TLS_TX_CLIENT_HELLO = 0x0001,
-	TLS_TX_CERTIFICATE = 0x0002,
-	TLS_TX_CLIENT_KEY_EXCHANGE = 0x0004,
-	TLS_TX_CERTIFICATE_VERIFY = 0x0008,
-	TLS_TX_CHANGE_CIPHER = 0x0010,
-	TLS_TX_FINISHED = 0x0020,
+/** TLS TX state machine state */
+enum tls_tx_state {
+	TLS_TX_NONE = 0,
+	TLS_TX_CLIENT_HELLO,
+	TLS_TX_CLIENT_KEY_EXCHANGE,
+	TLS_TX_CHANGE_CIPHER,
+	TLS_TX_FINISHED,
+	TLS_TX_DATA
 };
 
-/** A TLS cipher suite */
-struct tls_cipher_suite {
+/** A TLS cipher specification */
+struct tls_cipherspec {
 	/** Public-key encryption algorithm */
 	struct pubkey_algorithm *pubkey;
 	/** Bulk encryption cipher algorithm */
@@ -126,15 +99,7 @@
 	/** MAC digest algorithm */
 	struct digest_algorithm *digest;
 	/** Key length */
-	uint16_t key_len;
-	/** Numeric code (in network-endian order) */
-	uint16_t code;
-};
-
-/** A TLS cipher specification */
-struct tls_cipherspec {
-	/** Cipher suite */
-	struct tls_cipher_suite *suite;
+	size_t key_len;
 	/** Dynamically-allocated storage */
 	void *dynamic;
 	/** Public key encryption context */
@@ -147,24 +112,6 @@
 	void *mac_secret;
 };
 
-/** A TLS signature and hash algorithm identifier */
-struct tls_signature_hash_id {
-	/** Hash algorithm */
-	uint8_t hash;
-	/** Signature algorithm */
-	uint8_t signature;
-} __attribute__ (( packed ));
-
-/** A TLS signature algorithm */
-struct tls_signature_hash_algorithm {
-	/** Digest algorithm */
-	struct digest_algorithm *digest;
-	/** Public-key algorithm */
-	struct pubkey_algorithm *pubkey;
-	/** Numeric code */
-	struct tls_signature_hash_id code;
-};
-
 /** TLS pre-master secret */
 struct tls_pre_master_secret {
 	/** TLS version */
@@ -181,42 +128,16 @@
 	uint8_t random[28];
 } __attribute__ (( packed ));
 
-/** An MD5+SHA1 context */
-struct md5_sha1_context {
-	/** MD5 context */
-	uint8_t md5[MD5_CTX_SIZE];
-	/** SHA-1 context */
-	uint8_t sha1[SHA1_CTX_SIZE];
-} __attribute__ (( packed ));
-
-/** MD5+SHA1 context size */
-#define MD5_SHA1_CTX_SIZE sizeof ( struct md5_sha1_context )
-
-/** An MD5+SHA1 digest */
-struct md5_sha1_digest {
-	/** MD5 digest */
-	uint8_t md5[MD5_DIGEST_SIZE];
-	/** SHA-1 digest */
-	uint8_t sha1[SHA1_DIGEST_SIZE];
-} __attribute__ (( packed ));
-
-/** MD5+SHA1 digest size */
-#define MD5_SHA1_DIGEST_SIZE sizeof ( struct md5_sha1_digest )
-
 /** A TLS session */
 struct tls_session {
 	/** Reference counter */
 	struct refcnt refcnt;
 
-	/** Server name */
-	const char *name;
 	/** Plaintext stream */
 	struct interface plainstream;
 	/** Ciphertext stream */
 	struct interface cipherstream;
 
-	/** Protocol version */
-	uint16_t version;
 	/** Current TX cipher specification */
 	struct tls_cipherspec tx_cipherspec;
 	/** Next TX cipher specification */
@@ -233,31 +154,18 @@
 	uint8_t server_random[32];
 	/** Client random bytes */
 	struct tls_client_random client_random;
-	/** MD5+SHA1 context for handshake verification */
-	uint8_t handshake_md5_sha1_ctx[MD5_SHA1_CTX_SIZE];
-	/** SHA256 context for handshake verification */
-	uint8_t handshake_sha256_ctx[SHA256_CTX_SIZE];
-	/** Digest algorithm used for handshake verification */
-	struct digest_algorithm *handshake_digest;
-	/** Digest algorithm context used for handshake verification */
-	uint8_t *handshake_ctx;
-	/** Public-key algorithm used for Certificate Verify (if sent) */
-	struct pubkey_algorithm *verify_pubkey;
-
-	/** Server certificate chain */
-	struct x509_chain *chain;
-	/** Certificate validator */
-	struct interface validator;
-
-	/** Client security negotiation pending operation */
-	struct pending_operation client_negotiation;
-	/** Server security negotiation pending operation */
-	struct pending_operation server_negotiation;
+	/** MD5 context for handshake verification */
+	uint8_t handshake_md5_ctx[MD5_CTX_SIZE];
+	/** SHA1 context for handshake verification */
+	uint8_t handshake_sha1_ctx[SHA1_CTX_SIZE];
+
+	/** Hack: server RSA public key */
+	struct x509_rsa_public_key rsa;
 
 	/** TX sequence number */
 	uint64_t tx_seq;
-	/** TX pending transmissions */
-	unsigned int tx_pending;
+	/** TX state */
+	enum tls_tx_state tx_state;
 	/** TX process */
 	struct process process;
 
@@ -265,36 +173,15 @@
 	uint64_t rx_seq;
 	/** RX state */
 	enum tls_rx_state rx_state;
+	/** Offset within current RX state */
+	size_t rx_rcvd;
 	/** Current received record header */
 	struct tls_header rx_header;
-	/** Current received record header (static I/O buffer) */
-	struct io_buffer rx_header_iobuf;
-	/** List of received data buffers */
-	struct list_head rx_data;
+	/** Current received raw data buffer */
+	void *rx_data;
 };
 
-/** RX I/O buffer size
- *
- * The maximum fragment length extension is optional, and many common
- * implementations (including OpenSSL) do not support it.  We must
- * therefore be prepared to receive records of up to 16kB in length.
- * The chance of an allocation of this size failing is non-negligible,
- * so we must split received data into smaller allocations.
- */
-#define TLS_RX_BUFSIZE 4096
-
-/** Minimum RX I/O buffer size
- *
- * To simplify manipulations, we ensure that no RX I/O buffer is
- * smaller than this size.  This allows us to assume that the MAC and
- * padding are entirely contained within the final I/O buffer.
- */
-#define TLS_RX_MIN_BUFSIZE 512
-
-/** RX I/O buffer alignment */
-#define TLS_RX_ALIGN 16
-
-extern int add_tls ( struct interface *xfer, const char *name,
+extern int add_tls ( struct interface *xfer,
 		     struct interface **next );
 
 #endif /* _IPXE_TLS_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uaccess.h ipxe-1.0.1~lliurex1505/src/include/ipxe/uaccess.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uaccess.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/uaccess.h	2012-01-06 23:49:04.000000000 +0000
@@ -83,18 +83,6 @@
 }
 
 /**
- * Subtract user pointers
- *
- * @v userptr		User pointer
- * @v subtrahend	User pointer to be subtracted
- * @ret offset		Offset
- */
-static inline __always_inline off_t
-trivial_userptr_sub ( userptr_t userptr, userptr_t subtrahend ) {
-	return ( userptr - subtrahend );
-}
-
-/**
  * Copy data between user buffers
  *
  * @v dest		Destination
@@ -252,15 +240,6 @@
 userptr_t userptr_add ( userptr_t userptr, off_t offset );
 
 /**
- * Subtract user pointers
- *
- * @v userptr		User pointer
- * @v subtrahend	User pointer to be subtracted
- * @ret offset		Offset
- */
-off_t userptr_sub ( userptr_t userptr, userptr_t subtrahend );
-
-/**
  * Convert virtual address to a physical address
  *
  * @v addr		Virtual address
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uri.h ipxe-1.0.1~lliurex1505/src/include/ipxe/uri.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uri.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/uri.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,6 @@
 #include <stdlib.h>
 #include <ipxe/refcnt.h>
 
-struct parameters;
-
 /** A Uniform Resource Identifier
  *
  * Terminology for this data structure is as per uri(7), except that
@@ -67,8 +65,6 @@
 	const char *query;
 	/** Fragment */
 	const char *fragment;
-	/** Form parameters */
-	struct parameters *params;
 } __attribute__ (( packed ));
 
 /** A field in a URI
@@ -113,27 +109,17 @@
  * Note that this is a separate concept from a URI with an absolute
  * path.
  */
-static inline int uri_is_absolute ( const struct uri *uri ) {
+static inline int uri_is_absolute ( struct uri *uri ) {
 	return ( uri->scheme != NULL );
 }
 
 /**
- * URI has an opaque part
- *
- * @v uri			URI
- * @ret has_opaque		URI has an opaque part
- */
-static inline int uri_has_opaque ( const struct uri *uri ) {
-	return ( uri->opaque && ( uri->opaque[0] != '\0' ) );
-
-}
-/**
  * URI has a path
  *
  * @v uri			URI
  * @ret has_path		URI has a path
  */
-static inline int uri_has_path ( const struct uri *uri ) {
+static inline int uri_has_path ( struct uri *uri ) {
 	return ( uri->path && ( uri->path[0] != '\0' ) );
 }
 
@@ -147,7 +133,7 @@
  * concept from an absolute URI.  Note also that a URI may not have a
  * path at all.
  */
-static inline int uri_has_absolute_path ( const struct uri *uri ) {
+static inline int uri_has_absolute_path ( struct uri *uri ) {
 	return ( uri->path && ( uri->path[0] == '/' ) );
 }
 
@@ -161,7 +147,7 @@
  * this is a separate concept from a relative URI.  Note also that a
  * URI may not have a path at all.
  */
-static inline int uri_has_relative_path ( const struct uri *uri ) {
+static inline int uri_has_relative_path ( struct uri *uri ) {
 	return ( uri->path && ( uri->path[0] != '/' ) );
 }
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uuid.h ipxe-1.0.1~lliurex1505/src/include/ipxe/uuid.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/uuid.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/uuid.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,7 +9,6 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <byteswap.h>
 
 /** A universally unique ID */
 union uuid {
@@ -29,24 +28,6 @@
 	uint8_t raw[16];
 };
 
-/**
- * Change UUID endianness
- *
- * @v uuid		UUID
- *
- * RFC4122 defines UUIDs as being encoded in network byte order, but
- * leaves some wriggle room for "explicit application or presentation
- * protocol specification to the contrary".  PXE, EFI and SMBIOS
- * (versions 2.6 and above) treat the first three fields as being
- * little-endian.
- */
-static inline void uuid_mangle ( union uuid *uuid ) {
-
-	__bswap_32s ( &uuid->canonical.a );
-	__bswap_16s ( &uuid->canonical.b );
-	__bswap_16s ( &uuid->canonical.c );
-}
-
-extern char * uuid_ntoa ( const union uuid *uuid );
+extern char * uuid_ntoa ( union uuid *uuid );
 
 #endif /* _IPXE_UUID_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/validator.h ipxe-1.0.1~lliurex1505/src/include/ipxe/validator.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/validator.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/validator.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,17 +0,0 @@
-#ifndef _IPXE_VALIDATOR_H
-#define _IPXE_VALIDATOR_H
-
-/** @file
- *
- * Certificate validator
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/interface.h>
-#include <ipxe/x509.h>
-
-extern int create_validator ( struct interface *job, struct x509_chain *chain );
-
-#endif /* _IPXE_VALIDATOR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/version.h ipxe-1.0.1~lliurex1505/src/include/ipxe/version.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/version.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/version.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef _IPXE_VERSION_H
-#define _IPXE_VERSION_H
-
-/** @file
- *
- * Version number
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-extern const int product_major_version;
-extern const int product_minor_version;
-extern const char *product_version;
-
-#endif /* _IPXE_VERSION_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/vlan.h ipxe-1.0.1~lliurex1505/src/include/ipxe/vlan.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/vlan.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/vlan.h	2012-01-06 23:49:04.000000000 +0000
@@ -61,7 +61,6 @@
 
 extern struct net_device * vlan_find ( struct net_device *trunk,
 				       unsigned int tag );
-extern unsigned int vlan_tag ( struct net_device *netdev );
 extern int vlan_can_be_trunk ( struct net_device *trunk );
 extern int vlan_create ( struct net_device *trunk, unsigned int tag,
 			 unsigned int priority );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/wpa.h ipxe-1.0.1~lliurex1505/src/include/ipxe/wpa.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/wpa.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/wpa.h	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #ifndef _IPXE_WPA_H
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/x509.h ipxe-1.0.1~lliurex1505/src/include/ipxe/x509.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/x509.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/x509.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,372 +10,32 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <stddef.h>
-#include <time.h>
-#include <ipxe/asn1.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/list.h>
 
-/** An X.509 serial number */
-struct x509_serial {
-	/** Raw serial number */
-	struct asn1_cursor raw;
-};
-
-/** An X.509 issuer */
-struct x509_issuer {
-	/** Raw issuer */
-	struct asn1_cursor raw;
-};
-
-/** An X.509 time */
-struct x509_time {
-	/** Seconds since the Epoch */
-	time_t time;
-};
-
-/** An X.509 certificate validity period */
-struct x509_validity {
-	/** Not valid before */
-	struct x509_time not_before;
-	/** Not valid after */
-	struct x509_time not_after;
-};
-
-/** Margin of error allowed in X.509 response times
- *
- * We allow a generous margin of error: 12 hours to allow for the
- * local time zone being non-GMT, plus 30 minutes to allow for general
- * clock drift.
- */
-#define X509_ERROR_MARGIN_TIME ( ( 12 * 60 + 30 ) * 60 )
-
-/** An X.509 certificate public key */
-struct x509_public_key {
-	/** Raw public key information */
-	struct asn1_cursor raw;
-	/** Public key algorithm */
-	struct asn1_algorithm *algorithm;
-	/** Raw public key bit string */
-	struct asn1_bit_string raw_bits;
-};
-
-/** An X.509 certificate subject */
-struct x509_subject {
-	/** Raw subject */
-	struct asn1_cursor raw;
-	/** Common name */
-	char *name;
-	/** Public key information */
-	struct x509_public_key public_key;
-};
-
-/** An X.509 certificate signature */
-struct x509_signature {
-	/** Signature algorithm */
-	struct asn1_algorithm *algorithm;
-	/** Signature value */
-	struct asn1_bit_string value;
-};
-
-/** An X.509 certificate basic constraints set */
-struct x509_basic_constraints {
-	/** Subject is a CA */
-	int ca;
-	/** Path length */
-	unsigned int path_len;
-};
-
-/** Unlimited path length
- *
- * We use -2U, since this quantity represents one *fewer* than the
- * maximum number of remaining certificates in a chain.
- */
-#define X509_PATH_LEN_UNLIMITED -2U
-
-/** An X.509 certificate key usage */
-struct x509_key_usage {
-	/** Key usage extension is present */
-	int present;
-	/** Usage bits */
-	unsigned int bits;
-};
+struct asn1_cursor;
 
-/** X.509 certificate key usage bits */
-enum x509_key_usage_bits {
-	X509_DIGITAL_SIGNATURE = 0x0080,
-	X509_NON_REPUDIATION = 0x0040,
-	X509_KEY_ENCIPHERMENT = 0x0020,
-	X509_DATA_ENCIPHERMENT = 0x0010,
-	X509_KEY_AGREEMENT = 0x0008,
-	X509_KEY_CERT_SIGN = 0x0004,
-	X509_CRL_SIGN = 0x0002,
-	X509_ENCIPHER_ONLY = 0x0001,
-	X509_DECIPHER_ONLY = 0x8000,
-};
-
-/** An X.509 certificate extended key usage */
-struct x509_extended_key_usage {
-	/** Usage bits */
-	unsigned int bits;
-};
-
-/** X.509 certificate extended key usage bits
- *
- * Extended key usages are identified by OID; these bits are purely an
- * internal definition.
- */
-enum x509_extended_key_usage_bits {
-	X509_CODE_SIGNING = 0x0001,
-	X509_OCSP_SIGNING = 0x0002,
-};
-
-/** X.509 certificate OCSP responder */
-struct x509_ocsp_responder {
-	/** URI */
-	char *uri;
-	/** OCSP status is good */
-	int good;
-};
-
-/** X.509 certificate authority information access */
-struct x509_authority_info_access {
-	/** OCSP responder */
-	struct x509_ocsp_responder ocsp;
-};
-
-/** An X.509 certificate extensions set */
-struct x509_extensions {
-	/** Basic constraints */
-	struct x509_basic_constraints basic;
-	/** Key usage */
-	struct x509_key_usage usage;
-	/** Extended key usage */
-	struct x509_extended_key_usage ext_usage;
-	/** Authority information access */
-	struct x509_authority_info_access auth_info;
-};
-
-/** An X.509 certificate */
-struct x509_certificate {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** List of certificates in cache */
-	struct list_head list;
-
-	/** Certificate has been validated */
-	int valid;
-	/** Maximum number of subsequent certificates in chain */
-	unsigned int path_remaining;
-
-	/** Raw certificate */
-	struct asn1_cursor raw;
-	/** Version */
-	unsigned int version;
-	/** Serial number */
-	struct x509_serial serial;
-	/** Raw tbsCertificate */
-	struct asn1_cursor tbs;
-	/** Signature algorithm */
-	struct asn1_algorithm *signature_algorithm;
-	/** Issuer */
-	struct x509_issuer issuer;
-	/** Validity */
-	struct x509_validity validity;
-	/** Subject */
-	struct x509_subject subject;
-	/** Signature */
-	struct x509_signature signature;
-	/** Extensions */
-	struct x509_extensions extensions;
+/** An X.509 RSA public key */
+struct x509_rsa_public_key {
+	/** Modulus */
+	uint8_t *modulus;
+	/** Modulus length */
+	size_t modulus_len;
+	/** Exponent */
+	uint8_t *exponent;
+	/** Exponent length */
+	size_t exponent_len;
 };
 
 /**
- * Get reference to X.509 certificate
+ * Free X.509 RSA public key
  *
- * @v cert		X.509 certificate
- * @ret cert		X.509 certificate
+ * @v rsa_pubkey	RSA public key
  */
-static inline __attribute__ (( always_inline )) struct x509_certificate *
-x509_get ( struct x509_certificate *cert ) {
-	ref_get ( &cert->refcnt );
-	return cert;
+static inline void
+x509_free_rsa_public_key ( struct x509_rsa_public_key *rsa_pubkey ) {
+	free ( rsa_pubkey->modulus );
 }
 
-/**
- * Drop reference to X.509 certificate
- *
- * @v cert		X.509 certificate
- */
-static inline __attribute__ (( always_inline )) void
-x509_put ( struct x509_certificate *cert ) {
-	ref_put ( &cert->refcnt );
-}
-
-/** A link in an X.509 certificate chain */
-struct x509_link {
-	/** List of links */
-	struct list_head list;
-	/** Certificate */
-	struct x509_certificate *cert;
-};
-
-/** An X.509 certificate chain */
-struct x509_chain {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** List of links */
-	struct list_head links;
-};
-
-/**
- * Get reference to X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @ret chain		X.509 certificate chain
- */
-static inline __attribute__ (( always_inline )) struct x509_chain *
-x509_chain_get ( struct x509_chain *chain ) {
-	ref_get ( &chain->refcnt );
-	return chain;
-}
-
-/**
- * Drop reference to X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- */
-static inline __attribute__ (( always_inline )) void
-x509_chain_put ( struct x509_chain *chain ) {
-	ref_put ( &chain->refcnt );
-}
-
-/**
- * Get first certificate in X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @ret cert		X.509 certificate, or NULL
- */
-static inline __attribute__ (( always_inline )) struct x509_certificate *
-x509_first ( struct x509_chain *chain ) {
-	struct x509_link *link;
-
-	link = list_first_entry ( &chain->links, struct x509_link, list );
-	return ( link ? link->cert : NULL );
-}
-
-/**
- * Get last certificate in X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- * @ret cert		X.509 certificate, or NULL
- */
-static inline __attribute__ (( always_inline )) struct x509_certificate *
-x509_last ( struct x509_chain *chain ) {
-	struct x509_link *link;
-
-	link = list_last_entry ( &chain->links, struct x509_link, list );
-	return ( link ? link->cert : NULL );
-}
-
-/** An X.509 extension */
-struct x509_extension {
-	/** Name */
-	const char *name;
-	/** Object identifier */
-	struct asn1_cursor oid;
-	/** Parse extension
-	 *
-	 * @v cert		X.509 certificate
-	 * @v raw		ASN.1 cursor
-	 * @ret rc		Return status code
-	 */
-	int ( * parse ) ( struct x509_certificate *cert,
-			  const struct asn1_cursor *raw );
-};
-
-/** An X.509 key purpose */
-struct x509_key_purpose {
-	/** Name */
-	const char *name;
-	/** Object identifier */
-	struct asn1_cursor oid;
-	/** Extended key usage bits */
-	unsigned int bits;
-};
-
-/** An X.509 access method */
-struct x509_access_method {
-	/** Name */
-	const char *name;
-	/** Object identifier */
-	struct asn1_cursor oid;
-	/** Parse access method
-	 *
-	 * @v cert		X.509 certificate
-	 * @v raw		ASN.1 cursor
-	 * @ret rc		Return status code
-	 */
-	int ( * parse ) ( struct x509_certificate *cert,
-			  const struct asn1_cursor *raw );
-};
-
-/** An X.509 root certificate store */
-struct x509_root {
-	/** Fingerprint digest algorithm */
-	struct digest_algorithm *digest;
-	/** Number of certificates */
-	unsigned int count;
-	/** Certificate fingerprints */
-	const void *fingerprints;
-};
-
-extern int x509_certificate ( const void *data, size_t len,
-			      struct x509_certificate **cert );
-extern int x509_validate ( struct x509_certificate *cert,
-			   struct x509_certificate *issuer,
-			   time_t time, struct x509_root *root );
-
-extern struct x509_chain * x509_alloc_chain ( void );
-extern int x509_append ( struct x509_chain *chain,
-			 struct x509_certificate *cert );
-extern int x509_append_raw ( struct x509_chain *chain, const void *data,
-			     size_t len );
-extern int x509_auto_append ( struct x509_chain *chain,
-			      struct x509_chain *certs );
-extern int x509_validate_chain ( struct x509_chain *chain, time_t time,
-				 struct x509_root *root );
-
-/* Functions exposed only for unit testing */
-extern int x509_check_issuer ( struct x509_certificate *cert,
-			       struct x509_certificate *issuer );
-extern void x509_fingerprint ( struct x509_certificate *cert,
-			       struct digest_algorithm *digest,
-			       void *fingerprint );
-extern int x509_check_root ( struct x509_certificate *cert,
-			     struct x509_root *root );
-extern int x509_check_time ( struct x509_certificate *cert, time_t time );
-
-/**
- * Invalidate X.509 certificate
- *
- * @v cert		X.509 certificate
- */
-static inline void x509_invalidate ( struct x509_certificate *cert ) {
-	cert->valid = 0;
-	cert->path_remaining = 0;
-}
-
-/**
- * Invalidate X.509 certificate chain
- *
- * @v chain		X.509 certificate chain
- */
-static inline void x509_invalidate_chain ( struct x509_chain *chain ) {
-	struct x509_link *link;
-
-	list_for_each_entry ( link, &chain->links, list )
-		x509_invalidate ( link->cert );
-}
+extern int x509_rsa_public_key ( const struct asn1_cursor *certificate,
+				 struct x509_rsa_public_key *rsa_pubkey );
 
 #endif /* _IPXE_X509_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/xferbuf.h ipxe-1.0.1~lliurex1505/src/include/ipxe/xferbuf.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/ipxe/xferbuf.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/ipxe/xferbuf.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,31 +0,0 @@
-#ifndef _IPXE_XFERBUF_H
-#define _IPXE_XFERBUF_H
-
-/** @file
- *
- * Data transfer buffer
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-
-/** A data transfer buffer */
-struct xfer_buffer {
-	/** Data */
-	void *data;
-	/** Size of data */
-	size_t len;
-	/** Current offset within data */
-	size_t pos;
-};
-
-extern void xferbuf_done ( struct xfer_buffer *xferbuf );
-extern int xferbuf_deliver ( struct xfer_buffer *xferbuf,
-			     struct io_buffer *iobuf,
-			     struct xfer_metadata *meta );
-
-#endif /* _IPXE_XFERBUF_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/linux_api.h ipxe-1.0.1~lliurex1505/src/include/linux_api.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/linux_api.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/linux_api.h	2012-01-06 23:49:04.000000000 +0000
@@ -37,6 +37,7 @@
 #include <linux/types.h>
 #include <linux/posix_types.h>
 typedef __kernel_pid_t pid_t;
+typedef __kernel_time_t time_t;
 typedef __kernel_suseconds_t suseconds_t;
 typedef __kernel_loff_t loff_t;
 #include <linux/time.h>
@@ -47,13 +48,11 @@
 typedef unsigned long nfds_t;
 typedef uint32_t useconds_t;
 #define MAP_FAILED ( ( void * ) -1 )
-#define SEEK_SET 0
 
 extern long linux_syscall ( int number, ... );
 
 extern int linux_open ( const char *pathname, int flags );
 extern int linux_close ( int fd );
-extern off_t linux_lseek ( int fd, off_t offset, int whence );
 extern __kernel_ssize_t linux_read ( int fd, void *buf, __kernel_size_t count );
 extern __kernel_ssize_t linux_write ( int fd, const void *buf,
 				      __kernel_size_t count );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/little_bswap.h ipxe-1.0.1~lliurex1505/src/include/little_bswap.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/little_bswap.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/little_bswap.h	2012-01-06 23:49:04.000000000 +0000
@@ -3,8 +3,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#define htonll(x)	__bswap_64(x)
-#define ntohll(x)	__bswap_64(x)
 #define ntohl(x)	__bswap_32(x)
 #define htonl(x) 	__bswap_32(x)
 #define ntohs(x) 	__bswap_16(x)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/mii.h ipxe-1.0.1~lliurex1505/src/include/mii.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/mii.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/mii.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,141 +1,144 @@
-#ifndef _MII_H_
-#define _MII_H_
-
-/** @file
- *
- * Media Independent Interface constants
- *
- * Extracted from Linux's include/linux/mii.h
+/*
+ * linux/mii.h: definitions for MII-compatible transceivers
+ * Originally drivers/net/sunhme.h.
  *
  * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
  *
+ * Copied Form Linux 2.4.25 an unneeded items removed by:
+ * Timothy Legge (timlegge at etherboot dot org)
+ *
+ * 03/26/2004
  */
 
 FILE_LICENCE ( GPL2_ONLY );
 
+#ifndef _MII_H_
+#define _MII_H_
+
 /* Generic MII registers. */
-#define MII_BMCR	    0x00	/* Basic mode control register */
-#define MII_BMSR	    0x01	/* Basic mode status register  */
-#define MII_PHYSID1	    0x02	/* PHYS ID 1		       */
-#define MII_PHYSID2	    0x03	/* PHYS ID 2		       */
-#define MII_ADVERTISE	    0x04	/* Advertisement control reg   */
-#define MII_LPA		    0x05	/* Link partner ability reg    */
-#define MII_EXPANSION	    0x06	/* Expansion register	       */
-#define MII_CTRL1000	    0x09	/* 1000BASE-T control	       */
-#define MII_STAT1000	    0x0a	/* 1000BASE-T status	       */
-#define MII_ESTATUS	    0x0f	/* Extended Status */
-#define MII_DCOUNTER	    0x12	/* Disconnect counter	       */
-#define MII_FCSCOUNTER	    0x13	/* False carrier counter       */
-#define MII_NWAYTEST	    0x14	/* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER	    0x15	/* Receive error counter       */
-#define MII_SREVISION	    0x16	/* Silicon revision	       */
-#define MII_RESV1	    0x17	/* Reserved...		       */
-#define MII_LBRERROR	    0x18	/* Lpback, rx, bypass error    */
-#define MII_PHYADDR	    0x19	/* PHY address		       */
-#define MII_RESV2	    0x1a	/* Reserved...		       */
-#define MII_TPISTATUS	    0x1b	/* TPI status for 10mbps       */
-#define MII_NCONFIG	    0x1c	/* Network interface config    */
+
+#define MII_BMCR            0x00	/* Basic mode control register */
+#define MII_BMSR            0x01	/* Basic mode status register  */
+#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
+#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
+#define MII_ADVERTISE       0x04	/* Advertisement control reg   */
+#define MII_LPA             0x05	/* Link partner ability reg    */
+#define MII_EXPANSION       0x06        /* Expansion register          */
+#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
+#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
+#define MII_ESTATUS         0x0f        /* Extended Status */
+#define MII_DCOUNTER        0x12        /* Disconnect counter          */
+#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
+#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
+#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
+#define MII_SREVISION       0x16        /* Silicon revision            */
+#define MII_RESV1           0x17        /* Reserved...                 */
+#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
+#define MII_PHYADDR         0x19        /* PHY address                 */
+#define MII_RESV2           0x1a        /* Reserved...                 */
+#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
+#define MII_NCONFIG         0x1c        /* Network interface config    */
 
 /* Basic mode control register. */
-#define BMCR_RESV		0x003f	/* Unused...		       */
-#define BMCR_SPEED1000		0x0040	/* MSB of Speed (1000)	       */
-#define BMCR_CTST		0x0080	/* Collision test	       */
-#define BMCR_FULLDPLX		0x0100	/* Full duplex		       */
-#define BMCR_ANRESTART		0x0200	/* Auto negotiation restart    */
-#define BMCR_ISOLATE		0x0400	/* Disconnect DP83840 from MII */
-#define BMCR_PDOWN		0x0800	/* Powerdown the DP83840       */
-#define BMCR_ANENABLE		0x1000	/* Enable auto negotiation     */
-#define BMCR_SPEED100		0x2000	/* Select 100Mbps	       */
-#define BMCR_LOOPBACK		0x4000	/* TXD loopback bits	       */
-#define BMCR_RESET		0x8000	/* Reset the DP83840	       */
+#define BMCR_RESV               0x003f  /* Unused...                   */
+#define BMCR_SPEED1000          0x0040  /* MSB of Speed (1000)         */
+#define BMCR_CTST               0x0080  /* Collision test              */
+#define BMCR_FULLDPLX           0x0100	/* Full duplex                 */
+#define BMCR_ANRESTART          0x0200	/* Auto negotiation restart    */
+#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
+#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
+#define BMCR_ANENABLE           0x1000	/* Enable auto negotiation     */
+#define BMCR_SPEED100           0x2000	/* Select 100Mbps              */
+#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
+#define BMCR_RESET              0x8000	/* Reset the DP83840           */
 
 /* Basic mode status register. */
-#define BMSR_ERCAP		0x0001	/* Ext-reg capability	       */
-#define BMSR_JCD		0x0002	/* Jabber detected	       */
-#define BMSR_LSTATUS		0x0004	/* Link status		       */
-#define BMSR_ANEGCAPABLE	0x0008	/* Able to do auto-negotiation */
-#define BMSR_RFAULT		0x0010	/* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE	0x0020	/* Auto-negotiation complete   */
-#define BMSR_RESV		0x00c0	/* Unused...		       */
-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
-#define BMSR_100HALF2		0x0200	/* Can do 100BASE-T2 HDX */
-#define BMSR_100FULL2		0x0400	/* Can do 100BASE-T2 FDX */
-#define BMSR_10HALF		0x0800	/* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL		0x1000	/* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF		0x2000	/* Can do 100mbps, half-duplex */
-#define BMSR_100FULL		0x4000	/* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4		0x8000	/* Can do 100mbps, 4k packets  */
+#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
+#define BMSR_JCD                0x0002  /* Jabber detected             */
+#define BMSR_LSTATUS            0x0004  /* Link status                 */
+#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
+#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
+#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
+#define BMSR_RESV               0x00c0  /* Unused...                   */
+#define BMSR_ESTATEN            0x0100  /* Extended Status in R15 */
+#define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX */
+#define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX */
+#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
+#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
+#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
+#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
+#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
 
 /* Advertisement control register. */
-#define ADVERTISE_SLCT		0x001f	/* Selector bits	       */
-#define ADVERTISE_CSMA		0x0001	/* Only selector supported     */
-#define ADVERTISE_10HALF	0x0020	/* Try for 10mbps half-duplex  */
-#define ADVERTISE_1000XFULL	0x0020	/* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL	0x0040	/* Try for 10mbps full-duplex  */
-#define ADVERTISE_1000XHALF	0x0040	/* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_100HALF	0x0080	/* Try for 100mbps half-duplex */
-#define ADVERTISE_1000XPAUSE	0x0080	/* Try for 1000BASE-X pause    */
-#define ADVERTISE_100FULL	0x0100	/* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100	/* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4	0x0200	/* Try for 100mbps 4k packets  */
-#define ADVERTISE_PAUSE_CAP	0x0400	/* Try for pause	       */
-#define ADVERTISE_PAUSE_ASYM	0x0800	/* Try for asymetric pause     */
-#define ADVERTISE_RESV		0x1000	/* Unused...		       */
-#define ADVERTISE_RFAULT	0x2000	/* Say we can detect faults    */
-#define ADVERTISE_LPACK		0x4000	/* Ack link partners response  */
-#define ADVERTISE_NPAGE		0x8000	/* Next page bit	       */
-
-#define ADVERTISE_FULL ( ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			 ADVERTISE_CSMA)
-#define ADVERTISE_ALL ( ADVERTISE_10HALF | ADVERTISE_10FULL |	\
-			ADVERTISE_100HALF | ADVERTISE_100FULL )
+#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
+#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
+#define ADVERTISE_10HALF        0x0020	/* Try for 10mbps half-duplex  */
+#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
+#define ADVERTISE_10FULL        0x0040	/* Try for 10mbps full-duplex  */
+#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
+#define ADVERTISE_100HALF       0x0080	/* Try for 100mbps half-duplex */
+#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
+#define ADVERTISE_100FULL       0x0100	/* Try for 100mbps full-duplex */
+#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
+#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
+#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
+#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
+#define ADVERTISE_RESV          0x1000  /* Unused...                   */
+#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
+#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
+#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
+
+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
+			ADVERTISE_CSMA)
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
+                      ADVERTISE_100HALF | ADVERTISE_100FULL)
 
 /* Link partner ability register. */
-#define LPA_SLCT		0x001f	/* Same as advertise selector  */
-#define LPA_10HALF		0x0020	/* Can do 10mbps half-duplex   */
-#define LPA_1000XFULL		0x0020	/* Can do 1000BASE-X full-duplex */
-#define LPA_10FULL		0x0040	/* Can do 10mbps full-duplex   */
-#define LPA_1000XHALF		0x0040	/* Can do 1000BASE-X half-duplex */
-#define LPA_100HALF		0x0080	/* Can do 100mbps half-duplex  */
-#define LPA_1000XPAUSE		0x0080	/* Can do 1000BASE-X pause     */
-#define LPA_100FULL		0x0100	/* Can do 100mbps full-duplex  */
-#define LPA_1000XPAUSE_ASYM	0x0100	/* Can do 1000BASE-X pause asym*/
-#define LPA_100BASE4		0x0200	/* Can do 100mbps 4k packets   */
-#define LPA_PAUSE_CAP		0x0400	/* Can pause		       */
-#define LPA_PAUSE_ASYM		0x0800	/* Can pause asymetrically     */
-#define LPA_RESV		0x1000	/* Unused...		       */
-#define LPA_RFAULT		0x2000	/* Link partner faulted	       */
-#define LPA_LPACK		0x4000	/* Link partner acked us       */
-#define LPA_NPAGE		0x8000	/* Next page bit	       */
+#define LPA_SLCT                0x001f  /* Same as advertise selector  */
+#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
+#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
+#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
+#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
+#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
+#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
+#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
+#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
+#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
+#define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
+#define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
+#define LPA_RESV                0x1000  /* Unused...                   */
+#define LPA_RFAULT              0x2000  /* Link partner faulted        */
+#define LPA_LPACK               0x4000  /* Link partner acked us       */
+#define LPA_NPAGE               0x8000  /* Next page bit               */
 
-#define LPA_DUPLEX		( LPA_10FULL | LPA_100FULL )
-#define LPA_100			( LPA_100FULL | LPA_100HALF | LPA_100BASE4 )
+#define LPA_DUPLEX            (LPA_10FULL | LPA_100FULL)
+#define LPA_100                       (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
 
 /* Expansion register for auto-negotiation. */
-#define EXPANSION_NWAY		0x0001	/* Can do N-way auto-nego      */
-#define EXPANSION_LCWP		0x0002	/* Got new RX page code word   */
-#define EXPANSION_ENABLENPAGE	0x0004	/* This enables npage words    */
-#define EXPANSION_NPCAPABLE	0x0008	/* Link partner supports npage */
-#define EXPANSION_MFAULTS	0x0010	/* Multiple faults detected    */
-#define EXPANSION_RESV		0xffe0	/* Unused...		       */
+#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
+#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
+#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
+#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
+#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
+#define EXPANSION_RESV          0xffe0  /* Unused...                   */
 
-#define ESTATUS_1000_TFULL	0x2000	/* Can do 1000BT Full */
-#define ESTATUS_1000_THALF	0x1000	/* Can do 1000BT Half */
+#define ESTATUS_1000_TFULL      0x2000  /* Can do 1000BT Full */
+#define ESTATUS_1000_THALF      0x1000  /* Can do 1000BT Half */
 
 /* N-way test register. */
-#define NWAYTEST_RESV1		0x00ff	/* Unused...		       */
-#define NWAYTEST_LOOPBACK	0x0100	/* Enable loopback for N-way   */
-#define NWAYTEST_RESV2		0xfe00	/* Unused...		       */
+#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
+#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
+#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
 
 /* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL	0x0200	/* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF	0x0100	/* Advertise 1000BASE-T half duplex */
+#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
+#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
 
 /* 1000BASE-T Status register */
-#define LPA_1000LOCALRXOK	0x2000	/* Partner local receiver status */
-#define LPA_1000REMRXOK		0x1000	/* Partner remote receiver status */
-#define LPA_1000FULL		0x0800	/* Partner 1000BASE-T full duplex */
-#define LPA_1000HALF		0x0400	/* Partner 1000BASE-T half duplex */
+#define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */
+#define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */
+#define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */
+#define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */
 
 #include <ipxe/netdevice.h>
 
@@ -154,4 +157,63 @@
         void (*mdio_write) (struct net_device *dev, int phy_id, int location, int val);
 };
 
+
+extern int mii_link_ok (struct mii_if_info *mii);
+extern void mii_check_link (struct mii_if_info *mii);
+extern unsigned int mii_check_media (struct mii_if_info *mii,
+                                       unsigned int ok_to_print,
+                                       unsigned int init_media);
+
+
+/**
+ * mii_nway_result
+ * @negotiated: value of MII ANAR and'd with ANLPAR
+ *
+ * Given a set of MII abilities, check each bit and returns the
+ * currently supported media, in the priority order defined by
+ * IEEE 802.3u.  We use LPA_xxx constants but note this is not the
+ * value of LPA solely, as described above.
+ *
+ * The one exception to IEEE 802.3u is that 100baseT4 is placed
+ * between 100T-full and 100T-half.  If your phy does not support
+ * 100T4 this is fine.  If your phy places 100T4 elsewhere in the
+ * priority order, you will need to roll your own function.
+ */
+static inline unsigned int mii_nway_result (unsigned int negotiated)
+{
+        unsigned int ret;
+
+        if (negotiated & LPA_100FULL)
+                ret = LPA_100FULL;
+        else if (negotiated & LPA_100BASE4)
+                ret = LPA_100BASE4;
+        else if (negotiated & LPA_100HALF)
+                ret = LPA_100HALF;
+        else if (negotiated & LPA_10FULL)
+                ret = LPA_10FULL;
+        else
+                ret = LPA_10HALF;
+
+        return ret;
+}
+
+/**
+ * mii_duplex
+ * @duplex_lock: Non-zero if duplex is locked at full
+ * @negotiated: value of MII ANAR and'd with ANLPAR
+ *
+ * A small helper function for a common case.  Returns one
+ * if the media is operating or locked at full duplex, and
+ * returns zero otherwise.
+ */
+static inline unsigned int mii_duplex (unsigned int duplex_lock,
+                                       unsigned int negotiated)
+{
+        if (duplex_lock)
+                return 1;
+        if (mii_nway_result(negotiated) & LPA_DUPLEX)
+                return 1;
+        return 0;
+}
+
 #endif
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/readline/readline.h ipxe-1.0.1~lliurex1505/src/include/readline/readline.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/readline/readline.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/readline/readline.h	2012-01-06 23:49:04.000000000 +0000
@@ -50,8 +50,8 @@
 };
 
 extern void history_free ( struct readline_history *history );
-extern int readline_history ( const char *prompt, const char *prefill,
-			      struct readline_history *history, char **line );
+extern char * __malloc readline_history ( const char *prompt,
+					  struct readline_history *history );
 extern char * __malloc readline ( const char *prompt );
 
 #endif /* _READLINE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdarg.h ipxe-1.0.1~lliurex1505/src/include/stdarg.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdarg.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/stdarg.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,30 +9,4 @@
 #define va_end( ap ) __builtin_va_end ( ap )
 #define va_copy( dest, src ) __builtin_va_copy ( dest, src )
 
-/**
- * Count number of arguments to a variadic macro
- *
- * This rather neat, non-iterative solution is courtesy of Laurent
- * Deniau.
- *
- */
-#define _VA_ARG_COUNT(  _1,  _2,  _3,  _4,  _5,  _6,  _7,  _8,		\
-		        _9, _10, _11, _12, _13, _14, _15, _16,		\
-		       _17, _18, _19, _20, _21, _22, _23, _24,		\
-		       _25, _26, _27, _28, _29, _30, _31, _32,		\
-		       _33, _34, _35, _36, _37, _38, _39, _40,		\
-		       _41, _42, _43, _44, _45, _46, _47, _48,		\
-		       _49, _50, _51, _52, _53, _54, _55, _56,		\
-		       _57, _58, _59, _60, _61, _62, _63,   N, ... ) N
-#define VA_ARG_COUNT( ... )						\
-	_VA_ARG_COUNT ( __VA_ARGS__, 					\
-			63, 62, 61, 60, 59, 58, 57, 56,			\
-			55, 54, 53, 52, 51, 50, 49, 48,			\
-			47, 46, 45, 44, 43, 42, 41, 40,			\
-			39, 38, 37, 36, 35, 34, 33, 32,			\
-			31, 30, 29, 28, 27, 26, 25, 24,			\
-			23, 22, 21, 20, 19, 18, 17, 16,			\
-			15, 14, 13, 12, 11, 10,  9,  8,			\
-			 7,  6,  5,  4,  3,  2,  1,  0 )
-
 #endif /* _STDARG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/stddef.h ipxe-1.0.1~lliurex1505/src/include/stddef.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/stddef.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/stddef.h	2012-01-06 23:49:04.000000000 +0000
@@ -23,12 +23,8 @@
 
 /* __WCHAR_TYPE__ is defined by gcc and will change if -fshort-wchar is used */
 #ifndef __WCHAR_TYPE__
-#define __WCHAR_TYPE__ uint16_t
-#endif
-#ifndef __WINT_TYPE__
-#define __WINT_TYPE__ int
+#define __WCHAR_TYPE__ long int
 #endif
 typedef __WCHAR_TYPE__ wchar_t;
-typedef __WINT_TYPE__ wint_t;
 
 #endif /* STDDEF_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdio.h ipxe-1.0.1~lliurex1505/src/include/stdio.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdio.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/stdio.h	2012-01-06 23:49:04.000000000 +0000
@@ -6,10 +6,6 @@
 #include <stdint.h>
 #include <stdarg.h>
 
-extern void putchar ( int character );
-
-extern int getchar ( void );
-
 extern int __attribute__ (( format ( printf, 1, 2 ) ))
 printf ( const char *fmt, ... );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdlib.h ipxe-1.0.1~lliurex1505/src/include/stdlib.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/stdlib.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/stdlib.h	2012-01-06 23:49:04.000000000 +0000
@@ -5,6 +5,7 @@
 
 #include <stdint.h>
 #include <assert.h>
+#include <ctype.h>
 
 /*****************************************************************************
  *
@@ -17,6 +18,9 @@
 {
 	const char *p = *pp;
 
+	while ( isspace ( *p ) )
+		p++;
+
 	if ( base == 0 ) {
 		base = 10;
 		if ( *p == '0' ) {
@@ -34,7 +38,19 @@
 	return base;
 }
 
-extern unsigned int strtoul_charval ( unsigned int charval );
+static inline unsigned int strtoul_charval ( unsigned int charval )
+{
+	if ( charval >= 'a' ) {
+		charval = ( charval - 'a' + 10 );
+	} else if ( charval >= 'A' ) {
+		charval = ( charval - 'A' + 10 );
+	} else if ( charval <= '9' ) {
+		charval = ( charval - '0' );
+	}
+
+	return charval;
+}
+
 extern unsigned long strtoul ( const char *p, char **endp, int base );
 extern unsigned long long strtoull ( const char *p, char **endp, int base );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/string.h ipxe-1.0.1~lliurex1505/src/include/string.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/string.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/string.h	2012-01-06 23:49:04.000000000 +0000
@@ -37,7 +37,6 @@
 char * strtok(char * s,const char * ct) __nonnull;
 char * strsep(char **s, const char *ct) __nonnull;
 void * memset(void * s,int c,size_t count) __nonnull;
-void * memcpy ( void *dest, const void *src, size_t len ) __nonnull;
 void * memmove(void * dest,const void *src,size_t count) __nonnull;
 int __pure memcmp(const void * cs,const void * ct,
 				    size_t count) __nonnull;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/sys/time.h ipxe-1.0.1~lliurex1505/src/include/sys/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/sys/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/sys/time.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,20 +1,20 @@
 #ifndef _SYS_TIME_H
 #define _SYS_TIME_H
 
-/** @file
- *
- * Date and time
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-/** Seconds since the Epoch
- *
- * We use a 64-bit type to avoid Y2K38 issues, since we may have to
- * handle distant future dates (e.g. X.509 certificate expiry dates).
- */
-typedef int64_t time_t;
+#include <time.h>
+
+typedef unsigned long suseconds_t;
+
+struct timeval {
+	time_t tv_sec;		/* seconds */
+	suseconds_t tv_usec;	/* microseconds */
+};
+
+struct timezone {
+	int tz_minuteswest;	/* minutes W of Greenwich */
+	int tz_dsttime;		/* type of dst correction */
+};
+
+extern int gettimeofday ( struct timeval *tv, struct timezone *tz );
 
 #endif /* _SYS_TIME_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/syslog.h ipxe-1.0.1~lliurex1505/src/include/syslog.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/syslog.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/syslog.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,100 +0,0 @@
-#ifndef _SYSLOG_H
-#define _SYSLOG_H
-
-/** @file
- *
- * System logger
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdarg.h>
-#include <ipxe/ansiesc.h>
-#include <config/console.h>
-
-/**
- * @defgroup syslogpri Syslog priorities
- *
- * These values are chosen to match those used in the syslog network
- * protocol (RFC 5424).
- *
- * @{
- */
-
-/** Emergency: system is unusable */
-#define LOG_EMERG 0
-
-/** Alert: action must be taken immediately */
-#define LOG_ALERT 1
-
-/** Critical: critical conditions */
-#define LOG_CRIT 2
-
-/** Error: error conditions */
-#define LOG_ERR 3
-
-/** Warning: warning conditions */
-#define LOG_WARNING 4
-
-/** Notice: normal but significant conditions */
-#define LOG_NOTICE 5
-
-/** Informational: informational messages */
-#define LOG_INFO 6
-
-/** Debug: debug-level messages */
-#define LOG_DEBUG 7
-
-/** @} */
-
-/** Do not log any messages */
-#define LOG_NONE -1
-
-/** Log all messages */
-#define LOG_ALL LOG_DEBUG
-
-extern void log_vprintf ( const char *fmt, va_list args );
-
-extern void __attribute__ (( format ( printf, 1, 2 ) ))
-log_printf ( const char *fmt, ... );
-
-/** ANSI private escape sequence to set syslog priority
- *
- * @v priority		Priority
- */
-#define SYSLOG_SET_PRIORITY( priority ) \
-	"\033[" #priority "p"
-
-/** ANSI private escape sequence to clear syslog priority */
-#define SYSLOG_CLEAR_PRIORITY "\033[p"
-
-/**
- * Write message to system log
- *
- * @v priority		Message priority
- * @v fmt		Format string
- * @v ...		Arguments
- */
-#define vsyslog( priority, fmt, args ) do {				\
-	if ( (priority) <= LOG_LEVEL ) {				\
-		log_vprintf ( SYSLOG_SET_PRIORITY ( priority ) fmt	\
-			      SYSLOG_CLEAR_PRIORITY, (args) );		\
-	}								\
-	} while ( 0 )
-
-/**
- * Write message to system log
- *
- * @v priority		Message priority
- * @v fmt		Format string
- * @v ...		Arguments
- */
-#define syslog( priority, fmt, ... ) do {				\
-	if ( (priority) <= LOG_LEVEL ) {				\
-		log_printf ( SYSLOG_SET_PRIORITY ( priority ) fmt	\
-			     SYSLOG_CLEAR_PRIORITY, ##__VA_ARGS__ );	\
-	}								\
-	} while ( 0 )
-
-#endif /* _SYSLOG_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/time.h ipxe-1.0.1~lliurex1505/src/include/time.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/time.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/time.h	2012-01-06 23:49:04.000000000 +0000
@@ -1,52 +1,21 @@
 #ifndef _TIME_H
 #define _TIME_H
 
-/** @file
- *
- * Date and time
- */
+typedef unsigned long time_t;
 
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <sys/time.h>
-#include <ipxe/time.h>
-
-/** Broken-down time */
 struct tm {
-	/** Seconds [0,60] */
-	int tm_sec;
-	/** Minutes [0,59] */
-	int tm_min;
-	/** Hour [0,23] */
-	int tm_hour;
-	/** Day of month [1,31] */
-	int tm_mday;
-	/** Month of year [0,11] */
-	int tm_mon;
-	/** Years since 1900 */
-	int tm_year;
-	/** Day of week [0,6] (Sunday=0) */
-	int tm_wday;
-	/** Day of year [0,365] */
-	int tm_yday;
-	/** Daylight savings flag */
-	int tm_isdst;
+	int tm_sec;	/* seconds */
+	int tm_min;	/* minutes */
+	int tm_hour;	/* hours */
+	int tm_mday;	/* day of the month */
+	int tm_mon;	/* month */
+	int tm_year;	/* year */
+	int tm_wday;	/* day of the week */
+	int tm_yday;	/* day in the year */
+	int tm_isdst;	/* daylight saving time */
 };
 
-/**
- * Get current time in seconds since the Epoch
- *
- * @v t			Time to fill in, or NULL
- * @ret time		Current time
- */
-static inline time_t time ( time_t *t ) {
-	time_t now;
-
-	now = time_now();
-	if ( t )
-		*t = now;
-	return now;
-}
+extern time_t time ( time_t *t );
 
 extern time_t mktime ( struct tm *tm );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/autoboot.h ipxe-1.0.1~lliurex1505/src/include/usr/autoboot.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/autoboot.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/autoboot.h	2012-01-06 23:49:04.000000000 +0000
@@ -31,7 +31,6 @@
 fetch_next_server_and_filename ( struct settings *settings );
 extern int netboot ( struct net_device *netdev );
 extern int autoboot ( void );
-extern void ipxe ( struct net_device *netdev );
 
 extern int pxe_menu_boot ( struct net_device *netdev );
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/dhcpmgmt.h ipxe-1.0.1~lliurex1505/src/include/usr/dhcpmgmt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/dhcpmgmt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/dhcpmgmt.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,6 +11,7 @@
 
 struct net_device;
 
+extern int dhcp ( struct net_device *netdev );
 extern int pxebs ( struct net_device *netdev, unsigned int pxe_type );
 
 #endif /* _USR_DHCPMGMT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/ifmgmt.h ipxe-1.0.1~lliurex1505/src/include/usr/ifmgmt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/ifmgmt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/ifmgmt.h	2012-01-06 23:49:04.000000000 +0000
@@ -10,13 +10,10 @@
 FILE_LICENCE ( GPL2_OR_LATER );
 
 struct net_device;
-struct net_device_configurator;
 
 extern int ifopen ( struct net_device *netdev );
-extern int ifconf ( struct net_device *netdev,
-		    struct net_device_configurator *configurator );
 extern void ifclose ( struct net_device *netdev );
 extern void ifstat ( struct net_device *netdev );
-extern int iflinkwait ( struct net_device *netdev, unsigned long timeout );
+extern int iflinkwait ( struct net_device *netdev, unsigned int max_wait_ms );
 
 #endif /* _USR_IFMGMT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/imgmgmt.h ipxe-1.0.1~lliurex1505/src/include/usr/imgmgmt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/imgmgmt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/imgmgmt.h	2012-01-06 23:49:04.000000000 +0000
@@ -11,9 +11,41 @@
 
 #include <ipxe/image.h>
 
-extern int imgdownload ( struct uri *uri, struct image **image );
-extern int imgdownload_string ( const char *uri_string, struct image **image );
-extern int imgacquire ( const char *name, struct image **image );
+extern int imgdownload ( struct uri *uri, const char *name, const char *cmdline,
+			 int ( * action ) ( struct image *image ) );
+extern int imgdownload_string ( const char *uri_string, const char *name,
+				const char *cmdline,
+				int ( * action ) ( struct image *image ) );
 extern void imgstat ( struct image *image );
+extern void imgfree ( struct image *image );
+
+/**
+ * Select an image for execution
+ *
+ * @v image		Image
+ * @ret rc		Return status code
+ */
+static inline int imgselect ( struct image *image ) {
+	return image_select ( image );
+}
+
+/**
+ * Find the previously-selected image
+ *
+ * @ret image		Image, or NULL
+ */
+static inline struct image * imgautoselect ( void ) {
+	return image_find_selected();
+}
+
+/**
+ * Execute an image
+ *
+ * @v image		Image
+ * @ret rc		Return status code
+ */
+static inline int imgexec ( struct image *image ) {
+	return image_exec ( image );
+}
 
 #endif /* _USR_IMGMGMT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/imgtrust.h ipxe-1.0.1~lliurex1505/src/include/usr/imgtrust.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/imgtrust.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/imgtrust.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,17 +0,0 @@
-#ifndef _USR_IMGTRUST_H
-#define _USR_IMGTRUST_H
-
-/** @file
- *
- * Image trust management
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <ipxe/image.h>
-
-extern int imgverify ( struct image *image, struct image *signature,
-		       const char *name );
-
-#endif /* _USR_IMGTRUST_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/neighmgmt.h ipxe-1.0.1~lliurex1505/src/include/usr/neighmgmt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/neighmgmt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/neighmgmt.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _USR_NEIGHMGMT_H
-#define _USR_NEIGHMGMT_H
-
-/** @file
- *
- * Neighbour management
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-extern void nstat ( void );
-
-#endif /* _USR_NEIGHMGMT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/nslookup.h ipxe-1.0.1~lliurex1505/src/include/usr/nslookup.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/nslookup.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/nslookup.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _USR_NSLOOKUP_H
-#define _USR_NSLOOKUP_H
-
-/** @file
- *
- * Standalone name resolution
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-extern int nslookup ( const char *name, const char *setting_name );
-
-#endif /* _USR_NSLOOKUP_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/pingmgmt.h ipxe-1.0.1~lliurex1505/src/include/usr/pingmgmt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/pingmgmt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/pingmgmt.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,16 +0,0 @@
-#ifndef _USR_PINGMGMT_H
-#define _USR_PINGMGMT_H
-
-/** @file
- *
- * ICMP ping management
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-
-extern int ping ( const char *hostname, unsigned long timeout, size_t len );
-
-#endif /* _USR_PINGMGMT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/prompt.h ipxe-1.0.1~lliurex1505/src/include/usr/prompt.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/prompt.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/prompt.h	2012-01-06 23:49:04.000000000 +0000
@@ -9,6 +9,6 @@
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-extern int prompt ( const char *text, unsigned long timeout, int key );
+extern int prompt ( const char *text, unsigned int wait_ms, int key );
 
 #endif /* _USR_PROMPT_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/route.h ipxe-1.0.1~lliurex1505/src/include/usr/route.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/route.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/route.h	2012-01-06 23:49:04.000000000 +0000
@@ -3,33 +3,12 @@
 
 /** @file
  *
- * Routing management
+ * Routing table management
  *
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <ipxe/tables.h>
-
-/** A routing family */
-struct routing_family {
-	/**
-	 * Print routes for a network device
-	 *
-	 * @v netdev		Network device
-	 */
-	void ( * print ) ( struct net_device *netdev );
-};
-
-/** Routing family table */
-#define ROUTING_FAMILIES __table ( struct routing_family, "routing_families" )
-
-/** Declare a routing family */
-#define __routing_family( order ) __table_entry ( ROUTING_FAMILIES, order )
-
-#define ROUTING_IPV4 01
-#define ROUTING_IPV6 02
-
 extern void route ( void );
 
 #endif /* _USR_ROUTE_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/sync.h ipxe-1.0.1~lliurex1505/src/include/usr/sync.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/usr/sync.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/usr/sync.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-#ifndef _USR_SYNC_H
-#define _USR_SYNC_H
-
-/** @file
- *
- * Wait for pending operations to complete
- *
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-extern int sync ( unsigned long timeout );
-
-#endif /* _USR_SYNC_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/include/wchar.h ipxe-1.0.1~lliurex1505/src/include/wchar.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/include/wchar.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/include/wchar.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,29 +0,0 @@
-#ifndef WCHAR_H
-#define WCHAR_H
-
-FILE_LICENCE ( GPL2_ONLY );
-
-#include <stddef.h>
-
-typedef void mbstate_t;
-
-/**
- * Convert wide character to multibyte sequence
- *
- * @v buf		Buffer
- * @v wc		Wide character
- * @v ps		Shift state
- * @ret len		Number of characters written
- *
- * This is a stub implementation, sufficient to handle basic ASCII
- * characters.
- */
-static inline __attribute__ (( always_inline ))
-size_t wcrtomb ( char *buf, wchar_t wc, mbstate_t *ps __unused ) {
-	*buf = wc;
-	return 1;
-}
-
-extern size_t wcslen ( const wchar_t *string );
-
-#endif /* WCHAR_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/bofm/bofm.c ipxe-1.0.1~lliurex1505/src/interface/bofm/bofm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/bofm/bofm.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/bofm/bofm.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_bofm.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_bofm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_bofm.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_bofm.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -181,7 +180,7 @@
 	/* Create corresponding PCI device, if any */
 	efipci = efipci_create ( efidrv, device );
 	if ( ! efipci ) {
-		rc = -ENOTSUP;
+		efirc = EFI_UNSUPPORTED;
 		goto err_not_pci;
 	}
 
@@ -189,15 +188,16 @@
 	if ( ( rc = bofm_find_driver ( &efipci->pci ) ) != 0 ) {
 		DBGCP ( efidrv, "EFIBOFM " PCI_FMT " has no driver\n",
 			PCI_ARGS ( &efipci->pci ) );
+		efirc = EFI_UNSUPPORTED;
 		goto err_no_driver;
 	}
 
 	/* Locate BOFM protocol */
 	if ( ( efirc = bs->LocateProtocol ( &bofm1_protocol_guid, NULL,
 					    &bofm1.interface ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( efidrv, "EFIBOFM " PCI_FMT " cannot find BOFM "
 		       "protocol\n", PCI_ARGS ( &efipci->pci ) );
+		efirc = EFI_UNSUPPORTED;
 		goto err_not_bofm;
 	}
 
@@ -206,10 +206,9 @@
 						      0x04 /* Can change MAC */,
 						      0x00 /* No iSCSI */,
 						      0x02 /* Version */ ))!=0){
-		rc = -EEFI ( efirc );
 		DBGC ( efidrv, "EFIBOFM " PCI_FMT " could not register "
 		       "support: %s\n", PCI_ARGS ( &efipci->pci ),
-		       strerror ( rc ) );
+		       efi_strerror ( efirc ) );
 		goto err_cannot_register;
 	}
 
@@ -226,7 +225,7 @@
  err_no_driver:
 	efipci_destroy ( efidrv, efipci );
  err_not_pci:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -254,27 +253,25 @@
 	struct efi_pci_device *efipci;
 	IBM_BOFM_TABLE *bofmtab;
 	IBM_BOFM_TABLE *bofmtab2;
-	int bofmrc;
 	EFI_STATUS efirc;
-	int rc;
+	int bofmrc;
 
 	DBGCP ( efidrv, "EFIBOFM DRIVER_START %p (%p)\n", device, child );
 
 	/* Create corresponding PCI device */
 	efipci = efipci_create ( efidrv, device );
 	if ( ! efipci ) {
-		rc = -ENOMEM;
+		efirc = EFI_OUT_OF_RESOURCES;
 		goto err_create;
 	}
 
 	/* Enable PCI device */
-	if ( ( rc = efipci_enable ( efipci ) ) != 0 )
+	if ( ( efirc = efipci_enable ( efipci ) ) != 0 )
 		goto err_enable;
 
 	/* Locate BOFM protocol */
 	if ( ( efirc = bs->LocateProtocol ( &bofm1_protocol_guid, NULL,
 					    &bofm1.interface ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( efidrv, "EFIBOFM " PCI_FMT " cannot find BOFM "
 		       "protocol\n", PCI_ARGS ( &efipci->pci ) );
 		goto err_locate_bofm;
@@ -326,19 +323,17 @@
 	if ( bofmtab2 ) {
 		if ( ( efirc = bofm2.bofm2->SetStatus ( bofm2.bofm2, device,
 							FALSE, bofmrc ) ) != 0){
-			rc = -EEFI ( efirc );
 			DBGC ( efidrv, "EFIBOFM " PCI_FMT " could not set "
 			       "BOFM2 status: %s\n", PCI_ARGS ( &efipci->pci ),
-			       strerror ( rc ) );
+			       efi_strerror ( efirc ) );
 			goto err_set_status;
 		}
 	} else {
 		if ( ( efirc = bofm1.bofm1->SetStatus ( bofm1.bofm1, device,
 							FALSE, bofmrc ) ) != 0){
-			rc = -EEFI ( efirc );
 			DBGC ( efidrv, "EFIBOFM " PCI_FMT " could not set "
 			       "BOFM status: %s\n", PCI_ARGS ( &efipci->pci ),
-			       strerror ( rc ) );
+			       efi_strerror ( efirc ) );
 			goto err_set_status;
 		}
 	}
@@ -354,7 +349,7 @@
  err_enable:
 	efipci_destroy ( efidrv, efipci );
  err_create:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -389,12 +384,12 @@
  */
 static void efi_bofm_driver_init ( void ) {
 	struct efi_driver *efidrv = &efi_bofm_driver;
-	int rc;
+	EFI_STATUS efirc;
 
 	/* Install driver */
-	if ( ( rc = efi_driver_install ( efidrv ) ) != 0 ) {
+	if ( ( efirc = efi_driver_install ( efidrv ) ) != 0 ) {
 		DBGC ( efidrv, "EFIBOFM could not install driver: %s\n",
-		       strerror ( rc ) );
+		       efi_strerror ( efirc ) );
 		return;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_console.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_console.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_console.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_console.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,20 +13,16 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stddef.h>
-#include <string.h>
-#include <errno.h>
 #include <assert.h>
 #include <ipxe/efi/efi.h>
 #include <ipxe/ansiesc.h>
 #include <ipxe/console.h>
-#include <config/console.h>
 
 #define ATTR_BOLD		0x08
 
@@ -52,12 +48,6 @@
 
 #define ATTR_DEFAULT		ATTR_FCOL_WHITE
 
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_EFI ) && CONSOLE_EXPLICIT ( CONSOLE_EFI ) )
-#undef CONSOLE_EFI
-#define CONSOLE_EFI ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_LOG )
-#endif
-
 /** Current character attribute */
 static unsigned int efi_attr = ATTR_DEFAULT;
 
@@ -229,7 +219,6 @@
 	const char *ansi_seq;
 	EFI_INPUT_KEY key;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* If we are mid-sequence, pass out the next byte */
 	if ( *ansi_input )
@@ -237,8 +226,8 @@
 
 	/* Read key from real EFI console */
 	if ( ( efirc = conin->ReadKeyStroke ( conin, &key ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBG ( "EFI could not read keystroke: %s\n", strerror ( rc ) );
+		DBG ( "EFI could not read keystroke: %s\n",
+		      efi_strerror ( efirc ) );
 		return 0;
 	}
 	DBG2 ( "EFI read key stroke with unicode %04x scancode %04x\n",
@@ -284,5 +273,4 @@
 	.putchar = efi_putchar,
 	.getchar = efi_getchar,
 	.iskey = efi_iskey,
-	.usage = CONSOLE_EFI,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_debug.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_debug.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_debug.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_debug.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,117 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * EFI debugging utilities
- *
- */
-
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/uuid.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/efi_driver.h>
-#include <ipxe/efi/Protocol/DevicePath.h>
-#include <ipxe/efi/Protocol/DevicePathToText.h>
-
-/** Device path to text protocol */
-static EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *efidpt;
-EFI_REQUIRE_PROTOCOL ( EFI_DEVICE_PATH_TO_TEXT_PROTOCOL, &efidpt );
-
-/**
- * Convert GUID to a printable string
- *
- * @v guid		GUID
- * @ret string		Printable string
- */
-const char * efi_guid_ntoa ( EFI_GUID *guid ) {
-	union {
-		union uuid uuid;
-		EFI_GUID guid;
-	} u;
-
-	/* Convert GUID to standard endianness */
-	memcpy ( &u.guid, guid, sizeof ( u.guid ) );
-	uuid_mangle ( &u.uuid );
-	return uuid_ntoa ( &u.uuid );
-}
-
-/**
- * Print list of protocol handlers attached to a handle
- *
- * @v handle		EFI handle
- */
-void dbg_efi_protocols ( EFI_HANDLE handle ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-        EFI_GUID **protocols;
-	UINTN count;
-	unsigned int i;
-	EFI_STATUS efirc;
-	int rc;
-
-	/* Retrieve list of protocols */
-	if ( ( efirc = bs->ProtocolsPerHandle ( handle, &protocols,
-						&count ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		printf ( "EFI could not retrieve protocols for %p: %s\n",
-			 handle, strerror ( rc ) );
-		return;
-	}
-
-	/* Dump list of protocols */
-	for ( i = 0 ; i < count ; i++ )
-		printf ( "%s\n", efi_guid_ntoa ( protocols[i] ) );
-
-	/* Free list */
-	bs->FreePool ( protocols );
-}
-
-/**
- * Print device path
- *
- * @v path		Device path
- */
-void dbg_efi_devpath ( EFI_DEVICE_PATH_PROTOCOL *path ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	EFI_DEVICE_PATH_PROTOCOL *end;
-	CHAR16 *text;
-	size_t len;
-
-	/* Convert path to a textual representation */
-	text = efidpt->ConvertDevicePathToText ( path, TRUE, FALSE );
-	if ( ! text ) {
-		printf ( "<cannot convert>:\n" );
-		end = efi_devpath_end ( path );
-		len = ( ( ( void * ) end ) - ( ( void * ) path ) +
-			sizeof ( *end ) );
-		dbg_hex_dump_da ( 0, path, len );
-		return;
-	}
-
-	/* Print path */
-	printf ( "%ls", text );
-
-	/* Free path */
-	bs->FreePool ( text );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_download.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_download.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_download.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_download.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,236 +0,0 @@
-/*
- * Copyright (C) 2010 VMware, Inc.  All Rights Reserved.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/open.h>
-#include <ipxe/process.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/efi_download.h>
-
-/** iPXE download protocol GUID */
-static EFI_GUID ipxe_download_protocol_guid
-	= IPXE_DOWNLOAD_PROTOCOL_GUID;
-
-/** A single in-progress file */
-struct efi_download_file {
-	/** Data transfer interface that provides downloaded data */
-	struct interface xfer;
-
-	/** Current file position */
-	size_t pos;
-
-	/** Data callback */
-	IPXE_DOWNLOAD_DATA_CALLBACK data_callback;
-
-	/** Finish callback */
-	IPXE_DOWNLOAD_FINISH_CALLBACK finish_callback;
-
-	/** Callback context */
-	void *context;
-};
-
-/* xfer interface */
-
-/**
- * Transfer finished or was aborted
- *
- * @v file		Data transfer file
- * @v rc		Reason for close
- */
-static void efi_download_close ( struct efi_download_file *file, int rc ) {
-
-	file->finish_callback ( file->context, EFIRC ( rc ) );
-
-	intf_shutdown ( &file->xfer, rc );
-}
-
-/**
- * Process received data
- *
- * @v file		Data transfer file
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-static int efi_download_deliver_iob ( struct efi_download_file *file,
-				      struct io_buffer *iobuf,
-				      struct xfer_metadata *meta ) {
-	EFI_STATUS efirc;
-	size_t len = iob_len ( iobuf );
-	int rc;
-
-	/* Calculate new buffer position */
-	if ( meta->flags & XFER_FL_ABS_OFFSET )
-		file->pos = 0;
-	file->pos += meta->offset;
-
-	/* Call out to the data handler */
-	if ( ( efirc = file->data_callback ( file->context, iobuf->data,
-					     len, file->pos ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		goto err_callback;
-	}
-
-	/* Update current buffer position */
-	file->pos += len;
-
-	/* Success */
-	rc = 0;
-
- err_callback:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/** Data transfer interface operations */
-static struct interface_operation efi_xfer_operations[] = {
-	INTF_OP ( xfer_deliver, struct efi_download_file *, efi_download_deliver_iob ),
-	INTF_OP ( intf_close, struct efi_download_file *, efi_download_close ),
-};
-
-/** EFI download data transfer interface descriptor */
-static struct interface_descriptor efi_download_file_xfer_desc =
-	INTF_DESC ( struct efi_download_file, xfer, efi_xfer_operations );
-
-/**
- * Start downloading a file, and register callback functions to handle the
- * download.
- *
- * @v This		iPXE Download Protocol instance
- * @v Url		URL to download from
- * @v DataCallback	Callback that will be invoked when data arrives
- * @v FinishCallback	Callback that will be invoked when the download ends
- * @v Context		Context passed to the Data and Finish callbacks
- * @v File		Token that can be used to abort the download
- * @ret Status		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_download_start ( IPXE_DOWNLOAD_PROTOCOL *This __unused,
-		     CHAR8 *Url,
-		     IPXE_DOWNLOAD_DATA_CALLBACK DataCallback,
-		     IPXE_DOWNLOAD_FINISH_CALLBACK FinishCallback,
-		     VOID *Context,
-		     IPXE_DOWNLOAD_FILE *File ) {
-	struct efi_download_file *file;
-	int rc;
-
-	file = malloc ( sizeof ( struct efi_download_file ) );
-	if ( file == NULL ) {
-		return EFI_OUT_OF_RESOURCES;
-	}
-
-	intf_init ( &file->xfer, &efi_download_file_xfer_desc, NULL );
-	rc = xfer_open ( &file->xfer, LOCATION_URI_STRING, Url );
-	if ( rc ) {
-		free ( file );
-		return EFIRC ( rc );
-	}
-
-	file->pos = 0;
-	file->data_callback = DataCallback;
-	file->finish_callback = FinishCallback;
-	file->context = Context;
-	*File = file;
-	return EFI_SUCCESS;
-}
-
-/**
- * Forcibly abort downloading a file that is currently in progress.
- *
- * It is not safe to call this function after the Finish callback has executed.
- *
- * @v This		iPXE Download Protocol instance
- * @v File		Token obtained from Start
- * @v Status		Reason for aborting the download
- * @ret Status		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_download_abort ( IPXE_DOWNLOAD_PROTOCOL *This __unused,
-		     IPXE_DOWNLOAD_FILE File,
-		     EFI_STATUS Status ) {
-	struct efi_download_file *file = File;
-
-	efi_download_close ( file, -EEFI ( Status ) );
-	return EFI_SUCCESS;
-}
-
-/**
- * Poll for more data from iPXE. This function will invoke the registered
- * callbacks if data is available or if downloads complete.
- *
- * @v This		iPXE Download Protocol instance
- * @ret Status		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_download_poll ( IPXE_DOWNLOAD_PROTOCOL *This __unused ) {
-	step();
-	return EFI_SUCCESS;
-}
-
-/** Publicly exposed iPXE download protocol */
-static IPXE_DOWNLOAD_PROTOCOL ipxe_download_protocol_interface = {
-	.Start = efi_download_start,
-	.Abort = efi_download_abort,
-	.Poll = efi_download_poll
-};
-
-/**
- * Install iPXE download protocol
- *
- * @v handle		EFI handle
- * @ret rc		Return status code
- */
-int efi_download_install ( EFI_HANDLE *handle ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	EFI_STATUS efirc;
-	int rc;
-
-	efirc = bs->InstallMultipleProtocolInterfaces (
-			handle,
-			&ipxe_download_protocol_guid,
-			&ipxe_download_protocol_interface,
-			NULL );
-	if ( efirc ) {
-		rc = -EEFI ( efirc );
-		DBG ( "Could not install download protocol: %s\n",
-		      strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Uninstall iPXE download protocol
- *
- * @v handle		EFI handle
- */
-void efi_download_uninstall ( EFI_HANDLE handle ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-
-	bs->UninstallMultipleProtocolInterfaces (
-			handle,
-			&ipxe_download_protocol_guid,
-			&ipxe_download_protocol_interface, NULL );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_driver.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_driver.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_driver.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_driver.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,16 +13,13 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stddef.h>
 #include <stdio.h>
-#include <string.h>
-#include <errno.h>
 #include <ipxe/efi/efi.h>
 #include <ipxe/efi/Protocol/DriverBinding.h>
 #include <ipxe/efi/Protocol/ComponentName2.h>
@@ -92,29 +89,12 @@
  */
 static EFI_STATUS EFIAPI
 efi_driver_get_controller_name ( EFI_COMPONENT_NAME2_PROTOCOL *wtf __unused,
-				 EFI_HANDLE device, EFI_HANDLE child,
-				 CHAR8 *language, CHAR16 **controller_name ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	union {
-		EFI_COMPONENT_NAME2_PROTOCOL *name2;
-		void *interface;
-	} name2;
-	EFI_STATUS efirc;
-
-	/* Delegate to the EFI_COMPONENT_NAME2_PROTOCOL instance
-	 * installed on child handle, if present.
-	 */
-	if ( ( child != NULL ) &&
-	     ( ( efirc = bs->OpenProtocol (
-			  child, &efi_component_name2_protocol_guid,
-			  &name2.interface, NULL, NULL,
-			  EFI_OPEN_PROTOCOL_GET_PROTOCOL ) ) == 0 ) ) {
-		return name2.name2->GetControllerName ( name2.name2, device,
-							child, language,
-							controller_name );
-	}
+				 EFI_HANDLE device __unused,
+				 EFI_HANDLE child __unused,
+				 CHAR8 *language __unused,
+				 CHAR16 **controller_name __unused ) {
 
-	/* Otherwise, let EFI use the default Device Path Name */
+	/* Just let EFI use the default Device Path Name */
 	return EFI_UNSUPPORTED;
 }
 
@@ -124,12 +104,11 @@
  * @v efidrv		EFI driver
  * @ret efirc		EFI status code
  */
-int efi_driver_install ( struct efi_driver *efidrv ) {
+EFI_STATUS efi_driver_install ( struct efi_driver *efidrv ) {
 	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
 	EFI_DRIVER_BINDING_PROTOCOL *driver = &efidrv->driver;
 	EFI_COMPONENT_NAME2_PROTOCOL *wtf = &efidrv->wtf;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* Configure driver binding protocol */
 	driver->ImageHandle = efi_image_handle;
@@ -151,10 +130,9 @@
 			&efi_driver_binding_protocol_guid, driver,
 			&efi_component_name2_protocol_guid, wtf,
 			NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( efidrv, "EFIDRV %s could not install protocol: %s\n",
-		       efidrv->name, strerror ( rc ) );
-		return rc;
+		       efidrv->name, efi_strerror ( efirc ) );
+		return efirc;
 	}
 
 	DBGC ( efidrv, "EFIDRV %s installed\n", efidrv->name );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_file.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_file.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_file.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_file.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,596 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * EFI file protocols
- *
- */
-
-#include <stddef.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <wchar.h>
-#include <ipxe/image.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/Protocol/SimpleFileSystem.h>
-#include <ipxe/efi/Protocol/BlockIo.h>
-#include <ipxe/efi/Guid/FileInfo.h>
-#include <ipxe/efi/Guid/FileSystemInfo.h>
-#include <ipxe/efi/efi_strings.h>
-#include <ipxe/efi/efi_file.h>
-
-/** EFI simple file system protocol GUID */
-static EFI_GUID efi_simple_file_system_protocol_guid
-	= EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID;
-
-/** EFI file information GUID */
-static EFI_GUID efi_file_info_id = EFI_FILE_INFO_ID;
-
-/** EFI file system information GUID */
-static EFI_GUID efi_file_system_info_id = EFI_FILE_SYSTEM_INFO_ID;
-
-/** EFI block I/O protocol GUID */
-static EFI_GUID efi_block_io_protocol_guid
-	= EFI_BLOCK_IO_PROTOCOL_GUID;
-
-/** EFI media ID */
-#define EFI_MEDIA_ID_MAGIC 0x69505845
-
-/** An image exposed as an EFI file */
-struct efi_file {
-	/** EFI file protocol */
-	EFI_FILE_PROTOCOL file;
-	/** Image */
-	struct image *image;
-	/** Current file position */
-	size_t pos;
-};
-
-static struct efi_file efi_file_root;
-
-/**
- * Get EFI file name (for debugging)
- *
- * @v file		EFI file
- * @ret name		Name
- */
-static const char * efi_file_name ( struct efi_file *file ) {
-
-	return ( file->image ? file->image->name : "<root>" );
-}
-
-/**
- * Open file
- *
- * @v this		EFI file
- * @ret new		New EFI file
- * @v wname		Filename
- * @v mode		File mode
- * @v attributes	File attributes (for newly-created files)
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_file_open ( EFI_FILE_PROTOCOL *this, EFI_FILE_PROTOCOL **new,
-		CHAR16 *wname, UINT64 mode __unused,
-		UINT64 attributes __unused ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-	char name[ wcslen ( wname ) + 1 /* NUL */ ];
-	struct efi_file *new_file;
-	struct image *image;
-
-	/* Initial '\' indicates opening from the root directory */
-	while ( *wname == L'\\' ) {
-		file = &efi_file_root;
-		wname++;
-	}
-
-	/* Allow root directory itself to be opened */
-	if ( ( wname[0] == L'\0' ) || ( wname[0] == L'.' ) ) {
-		*new = &efi_file_root.file;
-		return 0;
-	}
-
-	/* Fail unless opening from the root */
-	if ( file->image ) {
-		DBGC ( file, "EFIFILE %s is not a directory\n",
-		       efi_file_name ( file ) );
-		return EFI_NOT_FOUND;
-	}
-
-	/* Identify image */
-	snprintf ( name, sizeof ( name ), "%ls", wname );
-	image = find_image ( name );
-	if ( ! image ) {
-		DBGC ( file, "EFIFILE \"%s\" does not exist\n", name );
-		return EFI_NOT_FOUND;
-	}
-
-	/* Fail unless opening read-only */
-	if ( mode != EFI_FILE_MODE_READ ) {
-		DBGC ( file, "EFIFILE %s cannot be opened in mode %#08llx\n",
-		       image->name, mode );
-		return EFI_WRITE_PROTECTED;
-	}
-
-	/* Allocate and initialise file */
-	new_file = zalloc ( sizeof ( *new_file ) );
-	memcpy ( &new_file->file, &efi_file_root.file,
-		 sizeof ( new_file->file ) );
-	new_file->image = image_get ( image );
-	*new = &new_file->file;
-	DBGC ( new_file, "EFIFILE %s opened\n", efi_file_name ( new_file ) );
-
-	return 0;
-}
-
-/**
- * Close file
- *
- * @v this		EFI file
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_close ( EFI_FILE_PROTOCOL *this ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	/* Do nothing if this is the root */
-	if ( ! file->image )
-		return 0;
-
-	/* Close file */
-	DBGC ( file, "EFIFILE %s closed\n", efi_file_name ( file ) );
-	image_put ( file->image );
-	free ( file );
-
-	return 0;
-}
-
-/**
- * Close and delete file
- *
- * @v this		EFI file
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_delete ( EFI_FILE_PROTOCOL *this ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	DBGC ( file, "EFIFILE %s cannot be deleted\n", efi_file_name ( file ) );
-
-	/* Close file */
-	efi_file_close ( this );
-
-	/* Warn of failure to delete */
-	return EFI_WARN_DELETE_FAILURE;
-}
-
-/**
- * Return variable-length data structure
- *
- * @v base		Base data structure (starting with UINT64)
- * @v base_len		Length of base data structure
- * @v name		Name to append to base data structure
- * @v len		Length of data buffer
- * @v data		Data buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS efi_file_varlen ( UINT64 *base, size_t base_len,
-				    const char *name, UINTN *len, VOID *data ) {
-	size_t name_len;
-
-	/* Calculate structure length */
-	name_len = strlen ( name );
-	*base = ( base_len + ( name_len + 1 /* NUL */ ) * sizeof ( wchar_t ) );
-	if ( *len < *base ) {
-		*len = *base;
-		return EFI_BUFFER_TOO_SMALL;
-	}
-
-	/* Copy data to buffer */
-	*len = *base;
-	memcpy ( data, base, base_len );
-	efi_snprintf ( ( data + base_len ), ( name_len + 1 /* NUL */ ),
-		       "%s", name );
-
-	return 0;
-}
-
-/**
- * Return file information structure
- *
- * @v image		Image, or NULL for the root directory
- * @v len		Length of data buffer
- * @v data		Data buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS efi_file_info ( struct image *image, UINTN *len,
-				  VOID *data ) {
-	EFI_FILE_INFO info;
-	const char *name;
-
-	/* Populate file information */
-	memset ( &info, 0, sizeof ( info ) );
-	if ( image ) {
-		info.FileSize = image->len;
-		info.PhysicalSize = image->len;
-		info.Attribute = EFI_FILE_READ_ONLY;
-		name = image->name;
-	} else {
-		info.Attribute = ( EFI_FILE_READ_ONLY | EFI_FILE_DIRECTORY );
-		name = "";
-	}
-
-	return efi_file_varlen ( &info.Size, SIZE_OF_EFI_FILE_INFO, name,
-				 len, data );
-}
-
-/**
- * Read directory entry
- *
- * @v file		EFI file
- * @v len		Length to read
- * @v data		Data buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS efi_file_read_dir ( struct efi_file *file, UINTN *len,
-				      VOID *data ) {
-	EFI_STATUS efirc;
-	struct image *image;
-	unsigned int index;
-
-	/* Construct directory entry at current position */
-	index = file->pos;
-	for_each_image ( image ) {
-		if ( index-- == 0 ) {
-			efirc = efi_file_info ( image, len, data );
-			if ( efirc == 0 )
-				file->pos++;
-			return efirc;
-		}
-	}
-
-	/* No more entries */
-	*len = 0;
-	return 0;
-}
-
-/**
- * Read from file
- *
- * @v this		EFI file
- * @v len		Length to read
- * @v data		Data buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_read ( EFI_FILE_PROTOCOL *this,
-					 UINTN *len, VOID *data ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-	size_t remaining;
-
-	/* If this is the root directory, then construct a directory entry */
-	if ( ! file->image )
-		return efi_file_read_dir ( file, len, data );
-
-	/* Read from the file */
-	remaining = ( file->image->len - file->pos );
-	if ( *len > remaining )
-		*len = remaining;
-	DBGC ( file, "EFIFILE %s read [%#08zx,%#08zx)\n",
-	       efi_file_name ( file ), file->pos,
-	       ( ( size_t ) ( file->pos + *len ) ) );
-	copy_from_user ( data, file->image->data, file->pos, *len );
-	file->pos += *len;
-	return 0;
-}
-
-/**
- * Write to file
- *
- * @v this		EFI file
- * @v len		Length to write
- * @v data		Data buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_write ( EFI_FILE_PROTOCOL *this,
-					  UINTN *len, VOID *data __unused ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	DBGC ( file, "EFIFILE %s cannot write [%#08zx, %#08zx)\n",
-	       efi_file_name ( file ), file->pos,
-	       ( ( size_t ) ( file->pos + *len ) ) );
-	return EFI_WRITE_PROTECTED;
-}
-
-/**
- * Set file position
- *
- * @v this		EFI file
- * @v position		New file position
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_set_position ( EFI_FILE_PROTOCOL *this,
-						 UINT64 position ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	/* If this is the root directory, reset to the start */
-	if ( ! file->image ) {
-		DBGC ( file, "EFIFILE root directory rewound\n" );
-		file->pos = 0;
-		return 0;
-	}
-
-	/* Check for the magic end-of-file value */
-	if ( position == 0xffffffffffffffffULL )
-		position = file->image->len;
-
-	/* Fail if we attempt to seek past the end of the file (since
-	 * we do not support writes).
-	 */
-	if ( position > file->image->len ) {
-		DBGC ( file, "EFIFILE %s cannot seek to %#08llx of %#08zx\n",
-		       efi_file_name ( file ), position, file->image->len );
-		return EFI_UNSUPPORTED;
-	}
-
-	/* Set position */
-	file->pos = position;
-	DBGC ( file, "EFIFILE %s position set to %#08zx\n",
-	       efi_file_name ( file ), file->pos );
-
-	return 0;
-}
-
-/**
- * Get file position
- *
- * @v this		EFI file
- * @ret position	New file position
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_get_position ( EFI_FILE_PROTOCOL *this,
-						 UINT64 *position ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	*position = file->pos;
-	return 0;
-}
-
-/**
- * Get file information
- *
- * @v this		EFI file
- * @v type		Type of information
- * @v len		Buffer size
- * @v data		Buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_get_info ( EFI_FILE_PROTOCOL *this,
-					     EFI_GUID *type,
-					     UINTN *len, VOID *data ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-	EFI_FILE_SYSTEM_INFO fsinfo;
-	struct image *image;
-
-	/* Determine information to return */
-	if ( memcmp ( type, &efi_file_info_id, sizeof ( *type ) ) == 0 ) {
-
-		/* Get file information */
-		DBGC ( file, "EFIFILE %s get file information\n",
-		       efi_file_name ( file ) );
-		return efi_file_info ( file->image, len, data );
-
-	} else if ( memcmp ( type, &efi_file_system_info_id,
-			     sizeof ( *type ) ) == 0 ) {
-
-		/* Get file system information */
-		DBGC ( file, "EFIFILE %s get file system information\n",
-		       efi_file_name ( file ) );
-		memset ( &fsinfo, 0, sizeof ( fsinfo ) );
-		fsinfo.ReadOnly = 1;
-		for_each_image ( image )
-			fsinfo.VolumeSize += image->len;
-		return efi_file_varlen ( &fsinfo.Size,
-					 SIZE_OF_EFI_FILE_SYSTEM_INFO, "iPXE",
-					 len, data );
-	} else {
-
-		DBGC ( file, "EFIFILE %s cannot get information of type %s\n",
-		       efi_file_name ( file ), efi_guid_ntoa ( type ) );
-		return EFI_UNSUPPORTED;
-	}
-}
-
-/**
- * Set file information
- *
- * @v this		EFI file
- * @v type		Type of information
- * @v len		Buffer size
- * @v data		Buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_file_set_info ( EFI_FILE_PROTOCOL *this, EFI_GUID *type,
-		    UINTN len __unused, VOID *data __unused ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	DBGC ( file, "EFIFILE %s cannot set information of type %s\n",
-	       efi_file_name ( file ), efi_guid_ntoa ( type ) );
-	return EFI_WRITE_PROTECTED;
-}
-
-/**
- * Flush file modified data
- *
- * @v this		EFI file
- * @v type		Type of information
- * @v len		Buffer size
- * @v data		Buffer
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI efi_file_flush ( EFI_FILE_PROTOCOL *this ) {
-	struct efi_file *file = container_of ( this, struct efi_file, file );
-
-	DBGC ( file, "EFIFILE %s flushed\n", efi_file_name ( file ) );
-	return 0;
-}
-
-/** Root directory */
-static struct efi_file efi_file_root = {
-	.file = {
-		.Revision = EFI_FILE_PROTOCOL_REVISION,
-		.Open = efi_file_open,
-		.Close = efi_file_close,
-		.Delete = efi_file_delete,
-		.Read = efi_file_read,
-		.Write = efi_file_write,
-		.GetPosition = efi_file_get_position,
-		.SetPosition = efi_file_set_position,
-		.GetInfo = efi_file_get_info,
-		.SetInfo = efi_file_set_info,
-		.Flush = efi_file_flush,
-	},
-	.image = NULL,
-};
-
-/**
- * Open root directory
- *
- * @v filesystem	EFI simple file system
- * @ret file		EFI file handle
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_file_open_volume ( EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *filesystem __unused,
-		       EFI_FILE_PROTOCOL **file ) {
-
-	*file = &efi_file_root.file;
-	return 0;
-}
-
-/** EFI simple file system protocol */
-static EFI_SIMPLE_FILE_SYSTEM_PROTOCOL efi_simple_file_system_protocol = {
-	.Revision = EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION,
-	.OpenVolume = efi_file_open_volume,
-};
-
-/** Dummy block I/O reset */
-static EFI_STATUS EFIAPI
-efi_block_io_reset ( EFI_BLOCK_IO_PROTOCOL *this __unused,
-		     BOOLEAN extended __unused ) {
-	return 0;
-}
-
-/** Dummy block I/O read */
-static EFI_STATUS EFIAPI
-efi_block_io_read_blocks ( EFI_BLOCK_IO_PROTOCOL *this __unused,
-			   UINT32 MediaId __unused, EFI_LBA lba __unused,
-			   UINTN len __unused, VOID *data __unused ) {
-	return EFI_DEVICE_ERROR;
-}
-
-/** Dummy block I/O write */
-static EFI_STATUS EFIAPI
-efi_block_io_write_blocks ( EFI_BLOCK_IO_PROTOCOL *this __unused,
-			    UINT32 MediaId __unused, EFI_LBA lba __unused,
-			    UINTN len __unused, VOID *data __unused ) {
-	return EFI_DEVICE_ERROR;
-}
-
-/** Dummy block I/O flush */
-static EFI_STATUS EFIAPI
-efi_block_io_flush_blocks ( EFI_BLOCK_IO_PROTOCOL *this __unused ) {
-	return 0;
-}
-
-/** Dummy block I/O media */
-static EFI_BLOCK_IO_MEDIA efi_block_io_media = {
-	.MediaId = EFI_MEDIA_ID_MAGIC,
-	.MediaPresent = 1,
-	.ReadOnly = 1,
-	.BlockSize = 1,
-};
-
-/** Dummy EFI block I/O protocol */
-static EFI_BLOCK_IO_PROTOCOL efi_block_io_protocol = {
-	.Revision = EFI_BLOCK_IO_PROTOCOL_REVISION,
-	.Media = &efi_block_io_media,
-	.Reset = efi_block_io_reset,
-	.ReadBlocks = efi_block_io_read_blocks,
-	.WriteBlocks = efi_block_io_write_blocks,
-	.FlushBlocks = efi_block_io_flush_blocks,
-};
-
-/**
- * Install EFI simple file system protocol
- *
- * @v handle		EFI handle
- * @ret rc		Return status code
- */
-int efi_file_install ( EFI_HANDLE *handle ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	EFI_STATUS efirc;
-	int rc;
-
-	/* Install the simple file system protocol and the block I/O
-	 * protocol.  We don't have a block device, but large parts of
-	 * the EDK2 codebase make the assumption that file systems are
-	 * normally attached to block devices, and so we create a
-	 * dummy block device on the same handle just to keep things
-	 * looking normal.
-	 */
-	if ( ( efirc = bs->InstallMultipleProtocolInterfaces (
-			handle,
-			&efi_block_io_protocol_guid,
-			&efi_block_io_protocol,
-			&efi_simple_file_system_protocol_guid,
-			&efi_simple_file_system_protocol, NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( handle, "Could not install simple file system protocol: "
-		       "%s\n", strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Uninstall EFI simple file system protocol
- *
- * @v handle		EFI handle
- */
-void efi_file_uninstall ( EFI_HANDLE handle ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-
-	/* We must install the file system protocol first, since
-	 * otherwise the EDK2 code will attempt to helpfully uninstall
-	 * it when the block I/O protocol is uninstalled, leading to a
-	 * system lock-up.
-	 */
-	bs->UninstallMultipleProtocolInterfaces (
-			handle,
-			&efi_simple_file_system_protocol_guid,
-			&efi_simple_file_system_protocol,
-			&efi_block_io_protocol_guid,
-			&efi_block_io_protocol, NULL );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_hii.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_hii.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_hii.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_hii.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,577 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <stddef.h>
-#include <stdarg.h>
-#include <string.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/efi_strings.h>
-#include <ipxe/efi/efi_hii.h>
-
-/** Tiano GUID */
-static const EFI_GUID tiano_guid = EFI_IFR_TIANO_GUID;
-
-/**
- * Add string to IFR builder
- *
- * @v ifr		IFR builder
- * @v fmt		Format string
- * @v ...		Arguments
- * @ret string_id	String identifier, or zero on failure
- */
-unsigned int efi_ifr_string ( struct efi_ifr_builder *ifr, const char *fmt,
-			      ... ) {
-	EFI_HII_STRING_BLOCK *new_strings;
-	EFI_HII_SIBT_STRING_UCS2_BLOCK *ucs2;
-	size_t new_strings_len;
-	va_list args;
-	size_t len;
-	unsigned int string_id;
-
-	/* Do nothing if a previous allocation has failed */
-	if ( ifr->failed )
-		return 0;
-
-	/* Calculate string length */
-	va_start ( args, fmt );
-	len = ( efi_vsnprintf ( NULL, 0, fmt, args ) + 1 /* wNUL */ );
-	va_end ( args );
-
-	/* Reallocate strings */
-	new_strings_len = ( ifr->strings_len +
-			    offsetof ( typeof ( *ucs2 ), StringText ) +
-			    ( len * sizeof ( ucs2->StringText[0] ) ) );
-	new_strings = realloc ( ifr->strings, new_strings_len );
-	if ( ! new_strings ) {
-		ifr->failed = 1;
-		return 0;
-	}
-	ucs2 = ( ( ( void * ) new_strings ) + ifr->strings_len );
-	ifr->strings = new_strings;
-	ifr->strings_len = new_strings_len;
-
-	/* Fill in string */
-	ucs2->Header.BlockType = EFI_HII_SIBT_STRING_UCS2;
-	va_start ( args, fmt );
-	efi_vsnprintf ( ucs2->StringText, len, fmt, args );
-	va_end ( args );
-
-	/* Allocate string ID */
-	string_id = ++(ifr->string_id);
-
-	DBGC ( ifr, "IFR %p string %#04x is \"%ls\"\n",
-	       ifr, string_id, ucs2->StringText );
-	return string_id;
-}
-
-/**
- * Add IFR opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v opcode		Opcode
- * @v len		Opcode length
- * @ret op		Opcode, or NULL
- */
-static void * efi_ifr_op ( struct efi_ifr_builder *ifr, unsigned int opcode,
-			   size_t len ) {
-	EFI_IFR_OP_HEADER *new_ops;
-	EFI_IFR_OP_HEADER *op;
-	size_t new_ops_len;
-
-	/* Do nothing if a previous allocation has failed */
-	if ( ifr->failed )
-		return NULL;
-
-	/* Reallocate opcodes */
-	new_ops_len = ( ifr->ops_len + len );
-	new_ops = realloc ( ifr->ops, new_ops_len );
-	if ( ! new_ops ) {
-		ifr->failed = 1;
-		return NULL;
-	}
-	op = ( ( ( void * ) new_ops ) + ifr->ops_len );
-	ifr->ops = new_ops;
-	ifr->ops_len = new_ops_len;
-
-	/* Fill in opcode header */
-	op->OpCode = opcode;
-	op->Length = len;
-
-	return op;
-}
-
-/**
- * Add end opcode to IFR builder
- *
- * @v ifr		IFR builder
- */
-void efi_ifr_end_op ( struct efi_ifr_builder *ifr ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_END *end;
-
-	/* Add opcode */
-	end = efi_ifr_op ( ifr, EFI_IFR_END_OP, sizeof ( *end ) );
-
-	DBGC ( ifr, "IFR %p end\n", ifr );
-	DBGC2_HDA ( ifr, dispaddr, end, sizeof ( *end ) );
-}
-
-/**
- * Add false opcode to IFR builder
- *
- * @v ifr		IFR builder
- */
-void efi_ifr_false_op ( struct efi_ifr_builder *ifr ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_FALSE *false;
-
-	/* Add opcode */
-	false = efi_ifr_op ( ifr, EFI_IFR_FALSE_OP, sizeof ( *false ) );
-
-	DBGC ( ifr, "IFR %p false\n", ifr );
-	DBGC2_HDA ( ifr, dispaddr, false, sizeof ( *false ) );
-}
-
-/**
- * Add form opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v title_id		Title string identifier
- * @ret form_id		Form identifier
- */
-unsigned int efi_ifr_form_op ( struct efi_ifr_builder *ifr,
-			       unsigned int title_id ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_FORM *form;
-
-	/* Add opcode */
-	form = efi_ifr_op ( ifr, EFI_IFR_FORM_OP, sizeof ( *form ) );
-	if ( ! form )
-		return 0;
-	form->Header.Scope = 1;
-	form->FormId = ++(ifr->form_id);
-	form->FormTitle = title_id;
-
-	DBGC ( ifr, "IFR %p name/value store %#04x title %#04x\n",
-	       ifr, form->FormId, title_id );
-	DBGC2_HDA ( ifr, dispaddr, form, sizeof ( *form ) );
-	return form->FormId;
-}
-
-/**
- * Add formset opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v guid		GUID
- * @v title_id		Title string identifier
- * @v help_id		Help string identifier
- * @v ...		Class GUIDs (terminated by NULL)
- */
-void efi_ifr_form_set_op ( struct efi_ifr_builder *ifr, const EFI_GUID *guid,
-			   unsigned int title_id, unsigned int help_id, ... ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_FORM_SET *formset;
-	EFI_GUID *class_guid;
-	unsigned int num_class_guids = 0;
-	size_t len;
-	va_list args;
-
-	/* Count number of class GUIDs */
-	va_start ( args, help_id );
-	while ( va_arg ( args, const EFI_GUID * ) != NULL )
-		num_class_guids++;
-	va_end ( args );
-
-	/* Add opcode */
-	len = ( sizeof ( *formset ) +
-		( num_class_guids * sizeof ( *class_guid ) ) );
-	formset = efi_ifr_op ( ifr, EFI_IFR_FORM_SET_OP, len );
-	if ( ! formset )
-		return;
-	formset->Header.Scope = 1;
-	memcpy ( &formset->Guid, guid, sizeof ( formset->Guid ) );
-	formset->FormSetTitle = title_id;
-	formset->Help = help_id;
-	formset->Flags = num_class_guids;
-
-	/* Add class GUIDs */
-	class_guid = ( ( ( void * ) formset ) + sizeof ( *formset ) );
-	va_start ( args, help_id );
-	while ( num_class_guids-- ) {
-		memcpy ( class_guid++, va_arg ( args, const EFI_GUID * ),
-			 sizeof ( *class_guid ) );
-	}
-	va_end ( args );
-
-	DBGC ( ifr, "IFR %p formset title %#04x help %#04x\n",
-	       ifr, title_id, help_id );
-	DBGC2_HDA ( ifr, dispaddr, formset, len );
-}
-
-/**
- * Add get opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v varstore_id	Variable store identifier
- * @v varstore_info	Variable string identifier or offset
- * @v varstore_type	Variable type
- */
-void efi_ifr_get_op ( struct efi_ifr_builder *ifr, unsigned int varstore_id,
-		      unsigned int varstore_info, unsigned int varstore_type ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_GET *get;
-
-	/* Add opcode */
-	get = efi_ifr_op ( ifr, EFI_IFR_GET_OP, sizeof ( *get ) );
-	get->VarStoreId = varstore_id;
-	get->VarStoreInfo.VarName = varstore_info;
-	get->VarStoreType = varstore_type;
-
-	DBGC ( ifr, "IFR %p get varstore %#04x:%#04x type %#02x\n",
-	       ifr, varstore_id, varstore_info, varstore_type );
-	DBGC2_HDA ( ifr, dispaddr, get, sizeof ( *get ) );
-}
-
-/**
- * Add GUID class opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v class		Class
- */
-void efi_ifr_guid_class_op ( struct efi_ifr_builder *ifr, unsigned int class ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_GUID_CLASS *guid_class;
-
-	/* Add opcode */
-	guid_class = efi_ifr_op ( ifr, EFI_IFR_GUID_OP,
-				  sizeof ( *guid_class ) );
-	if ( ! guid_class )
-		return;
-	memcpy ( &guid_class->Guid, &tiano_guid, sizeof ( guid_class->Guid ) );
-	guid_class->ExtendOpCode = EFI_IFR_EXTEND_OP_CLASS;
-	guid_class->Class = class;
-
-	DBGC ( ifr, "IFR %p GUID class %#02x\n", ifr, class );
-	DBGC2_HDA ( ifr, dispaddr, guid_class, sizeof ( *guid_class ) );
-}
-
-/**
- * Add GUID subclass opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v subclass		Subclass
- */
-void efi_ifr_guid_subclass_op ( struct efi_ifr_builder *ifr,
-				unsigned int subclass ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_GUID_SUBCLASS *guid_subclass;
-
-	/* Add opcode */
-	guid_subclass = efi_ifr_op ( ifr, EFI_IFR_GUID_OP,
-				     sizeof ( *guid_subclass ) );
-	if ( ! guid_subclass )
-		return;
-	memcpy ( &guid_subclass->Guid, &tiano_guid,
-		 sizeof ( guid_subclass->Guid ) );
-	guid_subclass->ExtendOpCode = EFI_IFR_EXTEND_OP_SUBCLASS;
-	guid_subclass->SubClass = subclass;
-
-	DBGC ( ifr, "IFR %p GUID subclass %#02x\n", ifr, subclass );
-	DBGC2_HDA ( ifr, dispaddr, guid_subclass, sizeof ( *guid_subclass ) );
-}
-
-/**
- * Add numeric opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v prompt_id		Prompt string identifier
- * @v help_id		Help string identifier
- * @v question_id	Question identifier
- * @v varstore_id	Variable store identifier
- * @v varstore_info	Variable string identifier or offset
- * @v vflags		Variable flags
- * @v min_value		Minimum value
- * @v max_value		Maximum value
- * @v step		Step
- * @v flags		Flags
- */
-void efi_ifr_numeric_op ( struct efi_ifr_builder *ifr, unsigned int prompt_id,
-			  unsigned int help_id, unsigned int question_id,
-			  unsigned int varstore_id, unsigned int varstore_info,
-			  unsigned int vflags, unsigned long min_value,
-			  unsigned long max_value, unsigned int step,
-			  unsigned int flags ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_NUMERIC *numeric;
-	unsigned int size;
-
-	/* Add opcode */
-	numeric = efi_ifr_op ( ifr, EFI_IFR_NUMERIC_OP, sizeof ( *numeric ) );
-	if ( ! numeric )
-		return;
-	numeric->Question.Header.Prompt = prompt_id;
-	numeric->Question.Header.Help = help_id;
-	numeric->Question.QuestionId = question_id;
-	numeric->Question.VarStoreId = varstore_id;
-	numeric->Question.VarStoreInfo.VarName = varstore_info;
-	numeric->Question.Flags = vflags;
-	size = ( flags & EFI_IFR_NUMERIC_SIZE );
-	switch ( size ) {
-	case EFI_IFR_NUMERIC_SIZE_1 :
-		numeric->data.u8.MinValue = min_value;
-		numeric->data.u8.MaxValue = max_value;
-		numeric->data.u8.Step = step;
-		break;
-	case EFI_IFR_NUMERIC_SIZE_2 :
-		numeric->data.u16.MinValue = min_value;
-		numeric->data.u16.MaxValue = max_value;
-		numeric->data.u16.Step = step;
-		break;
-	case EFI_IFR_NUMERIC_SIZE_4 :
-		numeric->data.u32.MinValue = min_value;
-		numeric->data.u32.MaxValue = max_value;
-		numeric->data.u32.Step = step;
-		break;
-	case EFI_IFR_NUMERIC_SIZE_8 :
-		numeric->data.u64.MinValue = min_value;
-		numeric->data.u64.MaxValue = max_value;
-		numeric->data.u64.Step = step;
-		break;
-	}
-
-	DBGC ( ifr, "IFR %p numeric prompt %#04x help %#04x question %#04x "
-	       "varstore %#04x:%#04x\n", ifr, prompt_id, help_id, question_id,
-	       varstore_id, varstore_info );
-	DBGC2_HDA ( ifr, dispaddr, numeric, sizeof ( *numeric ) );
-}
-
-/**
- * Add string opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v prompt_id		Prompt string identifier
- * @v help_id		Help string identifier
- * @v question_id	Question identifier
- * @v varstore_id	Variable store identifier
- * @v varstore_info	Variable string identifier or offset
- * @v vflags		Variable flags
- * @v min_size		Minimum size
- * @v max_size		Maximum size
- * @v flags		Flags
- */
-void efi_ifr_string_op ( struct efi_ifr_builder *ifr, unsigned int prompt_id,
-			 unsigned int help_id, unsigned int question_id,
-			 unsigned int varstore_id, unsigned int varstore_info,
-			 unsigned int vflags, unsigned int min_size,
-			 unsigned int max_size, unsigned int flags ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_STRING *string;
-
-	/* Add opcode */
-	string = efi_ifr_op ( ifr, EFI_IFR_STRING_OP, sizeof ( *string ) );
-	if ( ! string )
-		return;
-	string->Question.Header.Prompt = prompt_id;
-	string->Question.Header.Help = help_id;
-	string->Question.QuestionId = question_id;
-	string->Question.VarStoreId = varstore_id;
-	string->Question.VarStoreInfo.VarName = varstore_info;
-	string->Question.Flags = vflags;
-	string->MinSize = min_size;
-	string->MaxSize = max_size;
-	string->Flags = flags;
-
-	DBGC ( ifr, "IFR %p string prompt %#04x help %#04x question %#04x "
-	       "varstore %#04x:%#04x\n", ifr, prompt_id, help_id, question_id,
-	       varstore_id, varstore_info );
-	DBGC2_HDA ( ifr, dispaddr, string, sizeof ( *string ) );
-}
-
-/**
- * Add suppress-if opcode to IFR builder
- *
- * @v ifr		IFR builder
- */
-void efi_ifr_suppress_if_op ( struct efi_ifr_builder *ifr ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_SUPPRESS_IF *suppress_if;
-
-	/* Add opcode */
-	suppress_if = efi_ifr_op ( ifr, EFI_IFR_SUPPRESS_IF_OP,
-				   sizeof ( *suppress_if ) );
-	suppress_if->Header.Scope = 1;
-
-	DBGC ( ifr, "IFR %p suppress-if\n", ifr );
-	DBGC2_HDA ( ifr, dispaddr, suppress_if, sizeof ( *suppress_if ) );
-}
-
-/**
- * Add text opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v prompt_id		Prompt string identifier
- * @v help_id		Help string identifier
- * @v text_id		Text string identifier
- */
-void efi_ifr_text_op ( struct efi_ifr_builder *ifr, unsigned int prompt_id,
-		       unsigned int help_id, unsigned int text_id ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_TEXT *text;
-
-	/* Add opcode */
-	text = efi_ifr_op ( ifr, EFI_IFR_TEXT_OP, sizeof ( *text ) );
-	if ( ! text )
-		return;
-	text->Statement.Prompt = prompt_id;
-	text->Statement.Help = help_id;
-	text->TextTwo = text_id;
-
-	DBGC ( ifr, "IFR %p text prompt %#04x help %#04x text %#04x\n",
-	       ifr, prompt_id, help_id, text_id );
-	DBGC2_HDA ( ifr, dispaddr, text, sizeof ( *text ) );
-}
-
-/**
- * Add true opcode to IFR builder
- *
- * @v ifr		IFR builder
- */
-void efi_ifr_true_op ( struct efi_ifr_builder *ifr ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_TRUE *true;
-
-	/* Add opcode */
-	true = efi_ifr_op ( ifr, EFI_IFR_TRUE_OP, sizeof ( *true ) );
-
-	DBGC ( ifr, "IFR %p true\n", ifr );
-	DBGC2_HDA ( ifr, dispaddr, true, sizeof ( *true ) );
-}
-
-/**
- * Add name/value store opcode to IFR builder
- *
- * @v ifr		IFR builder
- * @v guid		GUID
- * @ret varstore_id	Variable store identifier, or 0 on failure
- */
-unsigned int efi_ifr_varstore_name_value_op ( struct efi_ifr_builder *ifr,
-					      const EFI_GUID *guid ) {
-	size_t dispaddr = ifr->ops_len;
-	EFI_IFR_VARSTORE_NAME_VALUE *varstore;
-
-	/* Add opcode */
-	varstore = efi_ifr_op ( ifr, EFI_IFR_VARSTORE_NAME_VALUE_OP,
-				sizeof ( *varstore ) );
-	if ( ! varstore )
-		return 0;
-	varstore->VarStoreId = ++(ifr->varstore_id);
-	memcpy ( &varstore->Guid, guid, sizeof ( varstore->Guid ) );
-
-	DBGC ( ifr, "IFR %p name/value store %#04x\n",
-	       ifr, varstore->VarStoreId );
-	DBGC2_HDA ( ifr, dispaddr, varstore, sizeof ( *varstore ) );
-	return varstore->VarStoreId;
-}
-
-/**
- * Free memory used by IFR builder
- *
- * @v ifr		IFR builder
- */
-void efi_ifr_free ( struct efi_ifr_builder *ifr ) {
-
-	free ( ifr->ops );
-	free ( ifr->strings );
-	memset ( ifr, 0, sizeof ( *ifr ) );
-}
-
-/**
- * Construct package list from IFR builder
- *
- * @v ifr		IFR builder
- * @v guid		Package GUID
- * @v language		Language
- * @v language_id	Language string ID
- * @ret package		Package list, or NULL
- *
- * The package list is allocated using malloc(), and must eventually
- * be freed by the caller.  (The caller must also call efi_ifr_free()
- * to free the temporary storage used during construction.)
- */
-EFI_HII_PACKAGE_LIST_HEADER * efi_ifr_package ( struct efi_ifr_builder *ifr,
-						const EFI_GUID *guid,
-						const char *language,
-						unsigned int language_id ) {
-	struct {
-		EFI_HII_PACKAGE_LIST_HEADER header;
-		struct {
-			EFI_HII_PACKAGE_HEADER header;
-			uint8_t data[ifr->ops_len];
-		} __attribute__ (( packed )) ops;
-		struct {
-			union {
-				EFI_HII_STRING_PACKAGE_HDR header;
-				uint8_t pad[offsetof(EFI_HII_STRING_PACKAGE_HDR,
-						     Language) +
-					    strlen ( language ) + 1 /* NUL */ ];
-			} __attribute__ (( packed )) header;
-			uint8_t data[ifr->strings_len];
-			EFI_HII_STRING_BLOCK end;
-		} __attribute__ (( packed )) strings;
-		EFI_HII_PACKAGE_HEADER end;
-	} __attribute__ (( packed )) *package;
-
-	/* Fail if any previous allocation failed */
-	if ( ifr->failed )
-		return NULL;
-
-	/* Allocate package list */
-	package = zalloc ( sizeof ( *package ) );
-	if ( ! package )
-		return NULL;
-
-	/* Populate package list */
-	package->header.PackageLength = sizeof ( *package );
-	memcpy ( &package->header.PackageListGuid, guid,
-		 sizeof ( package->header.PackageListGuid ) );
-	package->ops.header.Length = sizeof ( package->ops );
-	package->ops.header.Type = EFI_HII_PACKAGE_FORMS;
-	memcpy ( package->ops.data, ifr->ops, sizeof ( package->ops.data ) );
-	package->strings.header.header.Header.Length =
-		sizeof ( package->strings );
-	package->strings.header.header.Header.Type =
-		EFI_HII_PACKAGE_STRINGS;
-	package->strings.header.header.HdrSize =
-		sizeof ( package->strings.header );
-	package->strings.header.header.StringInfoOffset =
-		sizeof ( package->strings.header );
-	package->strings.header.header.LanguageName = language_id;
-	strcpy ( package->strings.header.header.Language, language );
-	memcpy ( package->strings.data, ifr->strings,
-		 sizeof ( package->strings.data ) );
-	package->strings.end.BlockType = EFI_HII_SIBT_END;
-	package->end.Type = EFI_HII_PACKAGE_END;
-	package->end.Length = sizeof ( package->end );
-
-	return &package->header;
-}
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_init.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_init.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_init.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_init.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,17 +13,14 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <string.h>
-#include <errno.h>
 #include <ipxe/efi/efi.h>
 #include <ipxe/efi/Protocol/LoadedImage.h>
-#include <ipxe/efi/Protocol/DevicePath.h>
 #include <ipxe/uuid.h>
 #include <ipxe/init.h>
 
@@ -33,9 +30,6 @@
 /** Loaded image protocol for this image */
 EFI_LOADED_IMAGE_PROTOCOL *efi_loaded_image;
 
-/** Loaded image protocol device path for this image */
-EFI_DEVICE_PATH_PROTOCOL *efi_loaded_image_path;
-
 /** System table passed to entry point */
 EFI_SYSTEM_TABLE *efi_systab;
 
@@ -43,10 +37,6 @@
 static EFI_GUID efi_loaded_image_protocol_guid
 	= EFI_LOADED_IMAGE_PROTOCOL_GUID;
 
-/** EFI loaded image device path protocol GUID */
-static EFI_GUID efi_loaded_image_device_path_protocol_guid
-	= EFI_LOADED_IMAGE_DEVICE_PATH_PROTOCOL_GUID;
-
 /** Event used to signal shutdown */
 static EFI_EVENT efi_shutdown_event;
 
@@ -92,10 +82,8 @@
 	EFI_BOOT_SERVICES *bs;
 	struct efi_protocol *prot;
 	struct efi_config_table *tab;
-	void *loaded_image;
-	void *loaded_image_path;
 	EFI_STATUS efirc;
-	int rc;
+	void *loaded_image;
 
 	/* Store image handle and system table pointer for future use */
 	efi_image_handle = image_handle;
@@ -116,18 +104,29 @@
 		return EFI_NOT_AVAILABLE_YET;
 	}
 	DBGC ( systab, "EFI handle %p systab %p\n", image_handle, systab );
+
 	bs = systab->BootServices;
+	efirc = bs->OpenProtocol ( image_handle,
+				   &efi_loaded_image_protocol_guid,
+				   &loaded_image, image_handle, NULL,
+				   EFI_OPEN_PROTOCOL_GET_PROTOCOL );
+	if ( efirc ) {
+	   DBGC ( systab, "Could not get loaded image protocol" );
+	   return efirc;
+	}
+
+	efi_loaded_image = loaded_image;
+	DBG ( "Image base address = %p\n", efi_loaded_image->ImageBase );
 
 	/* Look up used protocols */
 	for_each_table_entry ( prot, EFI_PROTOCOLS ) {
-		if ( ( efirc = bs->LocateProtocol ( &prot->guid, NULL,
+		if ( ( efirc = bs->LocateProtocol ( &prot->u.guid, NULL,
 						    prot->protocol ) ) == 0 ) {
 			DBGC ( systab, "EFI protocol %s is at %p\n",
-			       efi_guid_ntoa ( &prot->guid ),
-			       *(prot->protocol) );
+			       uuid_ntoa ( &prot->u.uuid ), *(prot->protocol));
 		} else {
 			DBGC ( systab, "EFI does not provide protocol %s\n",
-			       efi_guid_ntoa ( &prot->guid ) );
+			       uuid_ntoa ( &prot->u.uuid ) );
 			/* All protocols are required */
 			return efirc;
 		}
@@ -135,46 +134,17 @@
 
 	/* Look up used configuration tables */
 	for_each_table_entry ( tab, EFI_CONFIG_TABLES ) {
-		if ( ( *(tab->table) = efi_find_table ( &tab->guid ) ) ) {
+		if ( ( *(tab->table) = efi_find_table ( &tab->u.guid ) ) ) {
 			DBGC ( systab, "EFI configuration table %s is at %p\n",
-			       efi_guid_ntoa ( &tab->guid ), *(tab->table) );
+			       uuid_ntoa ( &tab->u.uuid ), *(tab->table) );
 		} else {
 			DBGC ( systab, "EFI does not provide configuration "
-			       "table %s\n", efi_guid_ntoa ( &tab->guid ) );
+			       "table %s\n", uuid_ntoa ( &tab->u.uuid ) );
 			if ( tab->required )
 				return EFI_NOT_AVAILABLE_YET;
 		}
 	}
 
-	/* Get loaded image protocol */
-	if ( ( efirc = bs->OpenProtocol ( image_handle,
-				&efi_loaded_image_protocol_guid,
-				&loaded_image, image_handle, NULL,
-				EFI_OPEN_PROTOCOL_GET_PROTOCOL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( systab, "EFI could not get loaded image protocol: %s",
-		       strerror ( rc ) );
-		return efirc;
-	}
-	efi_loaded_image = loaded_image;
-	DBGC ( systab, "EFI image base address %p\n",
-	       efi_loaded_image->ImageBase );
-
-	/* Get loaded image device path protocol */
-	if ( ( efirc = bs->OpenProtocol ( image_handle,
-				&efi_loaded_image_device_path_protocol_guid,
-				&loaded_image_path, image_handle, NULL,
-				EFI_OPEN_PROTOCOL_GET_PROTOCOL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( systab, "EFI could not get loaded image device path "
-		       "protocol: %s", strerror ( rc ) );
-		return efirc;
-	}
-	efi_loaded_image_path = loaded_image_path;
-	DBGC ( systab, "EFI image device path " );
-	DBGC_EFI_DEVPATH ( systab, efi_loaded_image_path );
-	DBGC ( systab, "\n" );
-
 	/* EFI is perfectly capable of gracefully shutting down any
 	 * loaded devices if it decides to fall back to a legacy boot.
 	 * For no particularly comprehensible reason, it doesn't
@@ -183,9 +153,8 @@
 	if ( ( efirc = bs->CreateEvent ( EVT_SIGNAL_EXIT_BOOT_SERVICES,
 					 TPL_CALLBACK, efi_shutdown_hook,
 					 NULL, &efi_shutdown_event ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( systab, "EFI could not create ExitBootServices event: "
-		       "%s\n", strerror ( rc ) );
+		       "%s\n", efi_strerror ( efirc ) );
 		return efirc;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_io.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_io.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_io.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_io.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,217 @@
+/*
+ * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <assert.h>
+#include <ipxe/io.h>
+#include <ipxe/efi/efi.h>
+#include <ipxe/efi/Protocol/CpuIo.h>
+#include <ipxe/efi/efi_io.h>
+
+/** @file
+ *
+ * iPXE I/O API for EFI
+ *
+ */
+
+/** CPU I/O protocol */
+static EFI_CPU_IO_PROTOCOL *cpu_io;
+EFI_REQUIRE_PROTOCOL ( EFI_CPU_IO_PROTOCOL, &cpu_io );
+
+/** Maximum address that can be used for port I/O */
+#define MAX_PORT_ADDRESS 0xffff
+
+/**
+ * Determine whether or not address is a port I/O address
+ *
+ * @v io_addr		I/O address
+ * @v is_port		I/O address is a port I/O address
+ */
+#define IS_PORT_ADDRESS(io_addr) \
+	( ( ( intptr_t ) (io_addr) ) <= MAX_PORT_ADDRESS )
+
+/**
+ * Determine EFI CPU I/O width code
+ *
+ * @v size		Size of value
+ * @ret width		EFI width code
+ *
+ * Someone at Intel clearly gets paid by the number of lines of code
+ * they write.  No-one should ever be able to make I/O this
+ * convoluted.  The EFI_CPU_IO_PROTOCOL_WIDTH enum is my favourite
+ * idiocy.
+ */
+static EFI_CPU_IO_PROTOCOL_WIDTH efi_width ( size_t size ) {
+	switch ( size ) {
+	case 1 :	return EfiCpuIoWidthFifoUint8;
+	case 2 :	return EfiCpuIoWidthFifoUint16;
+	case 4 :	return EfiCpuIoWidthFifoUint32;
+	case 8 :	return EfiCpuIoWidthFifoUint64;
+	default :
+		assert ( 0 );
+		/* I wonder what this will actually do... */
+		return EfiCpuIoWidthMaximum;
+	}
+}
+
+/**
+ * Read from device
+ *
+ * @v io_addr		I/O address
+ * @v size		Size of value
+ * @ret data		Value read
+ */
+unsigned long long efi_ioread ( volatile void *io_addr, size_t size ) {
+	EFI_CPU_IO_PROTOCOL_IO_MEM read;
+	unsigned long long data = 0;
+	EFI_STATUS efirc;
+
+	read = ( IS_PORT_ADDRESS ( io_addr ) ?
+		 cpu_io->Io.Read : cpu_io->Mem.Read );
+
+	if ( ( efirc = read ( cpu_io, efi_width ( size ),
+			      ( intptr_t ) io_addr, 1,
+			      ( void * ) &data ) ) != 0 ) {
+		DBG ( "EFI I/O read at %p failed: %s\n",
+		      io_addr, efi_strerror ( efirc ) );
+		return -1ULL;
+	}
+
+	return data;
+}
+
+/**
+ * Write to device
+ *
+ * @v data		Value to write
+ * @v io_addr		I/O address
+ * @v size		Size of value
+ */
+void efi_iowrite ( unsigned long long data, volatile void *io_addr,
+		   size_t size ) {
+	EFI_CPU_IO_PROTOCOL_IO_MEM write;
+	EFI_STATUS efirc;
+
+	write = ( IS_PORT_ADDRESS ( io_addr ) ?
+		  cpu_io->Io.Write : cpu_io->Mem.Write );
+
+	if ( ( efirc = write ( cpu_io, efi_width ( size ),
+			       ( intptr_t ) io_addr, 1,
+			       ( void * ) &data ) ) != 0 ) {
+		DBG ( "EFI I/O write at %p failed: %s\n",
+		      io_addr, efi_strerror ( efirc ) );
+	}
+}
+
+/**
+ * String read from device
+ *
+ * @v io_addr		I/O address
+ * @v data		Data buffer
+ * @v size		Size of values
+ * @v count		Number of values to read
+ */
+void efi_ioreads ( volatile void *io_addr, void *data,
+		   size_t size, unsigned int count ) {
+	EFI_CPU_IO_PROTOCOL_IO_MEM read;
+	EFI_STATUS efirc;
+
+	read = ( IS_PORT_ADDRESS ( io_addr ) ?
+		 cpu_io->Io.Read : cpu_io->Mem.Read );
+
+	if ( ( efirc = read ( cpu_io, efi_width ( size ),
+			      ( intptr_t ) io_addr, count,
+			      ( void * ) data ) ) != 0 ) {
+		DBG ( "EFI I/O string read at %p failed: %s\n",
+		      io_addr, efi_strerror ( efirc ) );
+	}
+}
+
+/**
+ * String write to device
+ *
+ * @v io_addr		I/O address
+ * @v data		Data buffer
+ * @v size		Size of values
+ * @v count		Number of values to write
+ */
+void efi_iowrites ( volatile void *io_addr, const void *data,
+		    size_t size, unsigned int count ) {
+	EFI_CPU_IO_PROTOCOL_IO_MEM write;
+	EFI_STATUS efirc;
+
+	write = ( IS_PORT_ADDRESS ( io_addr ) ?
+		 cpu_io->Io.Write : cpu_io->Mem.Write );
+
+	if ( ( efirc = write ( cpu_io, efi_width ( size ),
+			       ( intptr_t ) io_addr, count,
+			       ( void * ) data ) ) != 0 ) {
+		DBG ( "EFI I/O write at %p failed: %s\n",
+		      io_addr, efi_strerror ( efirc ) );
+	}
+}
+
+/**
+ * Wait for I/O-mapped operation to complete
+ *
+ */
+static void efi_iodelay ( void ) {
+	/* Write to non-existent port.  Probably x86-only. */
+	outb ( 0, 0x80 );
+}
+
+/**
+ * Get memory map
+ *
+ * Can't be done on EFI so return an empty map
+ *
+ * @v memmap		Memory map to fill in
+ */
+static void efi_get_memmap ( struct memory_map *memmap ) {
+	memmap->count = 0;
+}
+
+PROVIDE_IOAPI_INLINE ( efi, phys_to_bus );
+PROVIDE_IOAPI_INLINE ( efi, bus_to_phys );
+PROVIDE_IOAPI_INLINE ( efi, ioremap );
+PROVIDE_IOAPI_INLINE ( efi, iounmap );
+PROVIDE_IOAPI_INLINE ( efi, io_to_bus );
+PROVIDE_IOAPI_INLINE ( efi, readb );
+PROVIDE_IOAPI_INLINE ( efi, readw );
+PROVIDE_IOAPI_INLINE ( efi, readl );
+PROVIDE_IOAPI_INLINE ( efi, readq );
+PROVIDE_IOAPI_INLINE ( efi, writeb );
+PROVIDE_IOAPI_INLINE ( efi, writew );
+PROVIDE_IOAPI_INLINE ( efi, writel );
+PROVIDE_IOAPI_INLINE ( efi, writeq );
+PROVIDE_IOAPI_INLINE ( efi, inb );
+PROVIDE_IOAPI_INLINE ( efi, inw );
+PROVIDE_IOAPI_INLINE ( efi, inl );
+PROVIDE_IOAPI_INLINE ( efi, outb );
+PROVIDE_IOAPI_INLINE ( efi, outw );
+PROVIDE_IOAPI_INLINE ( efi, outl );
+PROVIDE_IOAPI_INLINE ( efi, insb );
+PROVIDE_IOAPI_INLINE ( efi, insw );
+PROVIDE_IOAPI_INLINE ( efi, insl );
+PROVIDE_IOAPI_INLINE ( efi, outsb );
+PROVIDE_IOAPI_INLINE ( efi, outsw );
+PROVIDE_IOAPI_INLINE ( efi, outsl );
+PROVIDE_IOAPI ( efi, iodelay, efi_iodelay );
+PROVIDE_IOAPI_INLINE ( efi, mb );
+PROVIDE_IOAPI ( efi, get_memmap, efi_get_memmap );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_pci.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_pci.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_pci.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_pci.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -57,15 +56,13 @@
 int efipci_read ( struct pci_device *pci, unsigned long location,
 		  void *value ) {
 	EFI_STATUS efirc;
-	int rc;
 
 	if ( ( efirc = efipci->Pci.Read ( efipci, EFIPCI_WIDTH ( location ),
 					  efipci_address ( pci, location ), 1,
 					  value ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBG ( "EFIPCI config read from " PCI_FMT " offset %02lx "
 		      "failed: %s\n", PCI_ARGS ( pci ),
-		      EFIPCI_OFFSET ( location ), strerror ( rc ) );
+		      EFIPCI_OFFSET ( location ), efi_strerror ( efirc ) );
 		return -EIO;
 	}
 
@@ -75,15 +72,13 @@
 int efipci_write ( struct pci_device *pci, unsigned long location,
 		   unsigned long value ) {
 	EFI_STATUS efirc;
-	int rc;
 
 	if ( ( efirc = efipci->Pci.Write ( efipci, EFIPCI_WIDTH ( location ),
 					   efipci_address ( pci, location ), 1,
 					   &value ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBG ( "EFIPCI config write to " PCI_FMT " offset %02lx "
 		      "failed: %s\n", PCI_ARGS ( pci ),
-		      EFIPCI_OFFSET ( location ), strerror ( rc ) );
+		      EFIPCI_OFFSET ( location ), efi_strerror ( efirc ) );
 		return -EIO;
 	}
 
@@ -153,7 +148,6 @@
 					  efidrv->driver.DriverBindingHandle,
 					  device,
 					  EFI_OPEN_PROTOCOL_BY_DRIVER )) !=0 ){
-		rc = -EEFI ( efirc );
 		DBGCP ( efipci, "EFIPCI device %p is not a PCI device\n",
 			device );
 		goto err_open_protocol;
@@ -165,9 +159,8 @@
 						    &pci_segment,
 						    &pci_bus, &pci_dev,
 						    &pci_fn ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( efipci, "EFIPCI device %p could not get PCI "
-		       "location: %s\n", device, strerror ( rc ) );
+		       "location: %s\n", device, efi_strerror ( efirc ) );
 		goto err_get_location;
 	}
 	DBGC2 ( efipci, "EFIPCI device %p is PCI %04lx:%02lx:%02lx.%lx\n",
@@ -191,7 +184,6 @@
 					  efidrv->driver.DriverBindingHandle,
 					  device,
 					  EFI_OPEN_PROTOCOL_BY_DRIVER )) !=0 ){
-		rc = -EEFI ( efirc );
 		DBGC ( efipci, "EFIPCI " PCI_FMT " has no device path\n",
 		       PCI_ARGS ( &efipci->pci ) );
 		goto err_no_device_path;
@@ -220,23 +212,21 @@
  * Enable EFI PCI device
  *
  * @v efipci		EFI PCI device
- * @ret rc		Return status code
+ * @ret efirc		EFI status code
  */
-int efipci_enable ( struct efi_pci_device *efipci ) {
+EFI_STATUS efipci_enable ( struct efi_pci_device *efipci ) {
 	EFI_PCI_IO_PROTOCOL *pci_io = efipci->pci_io;
+	EFI_STATUS efirc;
 
-	/* Try to enable I/O cycles, memory cycles, and bus mastering.
-	 * Some platforms will 'helpfully' report errors if these bits
-	 * can't be enabled (for example, if the card doesn't actually
-	 * support I/O cycles).  Work around any such platforms by
-	 * enabling bits individually and simply ignoring any errors.
-	 */
-	pci_io->Attributes ( pci_io, EfiPciIoAttributeOperationEnable,
-			     EFI_PCI_IO_ATTRIBUTE_IO, NULL );
-	pci_io->Attributes ( pci_io, EfiPciIoAttributeOperationEnable,
-			     EFI_PCI_IO_ATTRIBUTE_MEMORY, NULL );
-	pci_io->Attributes ( pci_io, EfiPciIoAttributeOperationEnable,
-			     EFI_PCI_IO_ATTRIBUTE_BUS_MASTER, NULL );
+	/* Enable device */
+	if ( ( efirc = pci_io->Attributes ( pci_io,
+					    EfiPciIoAttributeOperationSet,
+					    EFI_PCI_DEVICE_ENABLE,
+					    NULL ) ) != 0 ) {
+		DBGC ( efipci, "EFIPCI " PCI_FMT " could not be enabled: %s\n",
+		       PCI_ARGS ( &efipci->pci ), efi_strerror ( efirc ) );
+		return efirc;
+	}
 
 	return 0;
 }
@@ -280,7 +270,8 @@
  * @v device		EFI child device
  * @ret efirc		EFI status code
  */
-int efipci_child_add ( struct efi_pci_device *efipci, EFI_HANDLE device ) {
+EFI_STATUS efipci_child_add ( struct efi_pci_device *efipci,
+			      EFI_HANDLE device ) {
 	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
 	struct efi_driver *efidrv = efipci->efidrv;
 	union {
@@ -288,7 +279,6 @@
 		void *interface;
 	} pci_io;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* Re-open the PCI_IO_PROTOCOL */
 	if ( ( efirc = bs->OpenProtocol ( efipci->device,
@@ -298,10 +288,9 @@
 					  device,
 					  EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER
 					  ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( efipci, "EFIPCI " PCI_FMT " could not add child: %s\n",
-		       PCI_ARGS ( &efipci->pci ), strerror ( rc ) );
-		return rc;
+		       PCI_ARGS ( &efipci->pci ), efi_strerror ( efirc ) );
+		return efirc;
 	}
 
 	return 0;
@@ -363,6 +352,7 @@
 	struct efi_driver *efidrv =
 		container_of ( driver, struct efi_driver, driver );
 	struct efi_pci_device *efipci;
+	EFI_STATUS efirc;
 	int rc;
 
 	DBGCP ( efidrv, "EFIPCI DRIVER_SUPPORTED %p (%p)\n", device, child );
@@ -371,7 +361,7 @@
 	efipci = efipci_create ( efidrv, device );
 	if ( ! efipci ) {
 		/* Non-PCI devices are simply unsupported */
-		rc = -ENOTSUP;
+		efirc = EFI_UNSUPPORTED;
 		goto err_not_pci;
 	}
 
@@ -379,6 +369,7 @@
 	if ( ( rc = pci_find_driver ( &efipci->pci ) ) != 0 ) {
 		DBGCP ( efipci, "EFIPCI " PCI_FMT " has no driver\n",
 			PCI_ARGS ( &efipci->pci ) );
+		efirc = EFI_UNSUPPORTED;
 		goto err_no_driver;
 	}
 
@@ -393,7 +384,7 @@
  err_no_driver:
 	efipci_destroy ( efidrv, efipci );
  err_not_pci:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -410,6 +401,7 @@
 	struct efi_driver *efidrv =
 		container_of ( driver, struct efi_driver, driver );
 	struct efi_pci_device *efipci;
+	EFI_STATUS efirc;
 	int rc;
 
 	DBGC ( efidrv, "EFIPCI DRIVER_START %p (%p)\n", device, child );
@@ -417,7 +409,7 @@
 	/* Create corresponding PCI device */
 	efipci = efipci_create ( efidrv, device );
 	if ( ! efipci ) {
-		rc = -ENOMEM;
+		efirc = EFI_OUT_OF_RESOURCES;
 		goto err_create;
 	}
 
@@ -425,11 +417,12 @@
 	if ( ( rc = pci_find_driver ( &efipci->pci ) ) != 0 ) {
 		DBGC ( efipci, "EFIPCI " PCI_FMT " has no driver\n",
 		       PCI_ARGS ( &efipci->pci ) );
+		efirc = RC_TO_EFIRC ( rc );
 		goto err_find_driver;
 	}
 
 	/* Enable PCI device */
-	if ( ( rc = efipci_enable ( efipci ) ) != 0 )
+	if ( ( efirc = efipci_enable ( efipci ) ) != 0 )
 		goto err_enable;
 
 	/* Probe driver */
@@ -437,6 +430,7 @@
 		DBGC ( efipci, "EFIPCI " PCI_FMT " could not probe driver "
 		       "\"%s\": %s\n", PCI_ARGS ( &efipci->pci ),
 		       efipci->pci.id->name, strerror ( rc ) );
+		efirc = RC_TO_EFIRC ( rc );
 		goto err_probe;
 	}
 
@@ -448,7 +442,7 @@
  err_find_driver:
 	efipci_destroy ( efidrv, efipci );
  err_create:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -497,12 +491,12 @@
  */
 static void efipci_driver_startup ( void ) {
 	struct efi_driver *efidrv = &efipci_driver;
-	int rc;
+	EFI_STATUS efirc;
 
 	/* Install driver */
-	if ( ( rc = efi_driver_install ( efidrv ) ) != 0 ) {
+	if ( ( efirc = efi_driver_install ( efidrv ) ) != 0 ) {
 		DBGC ( efidrv, "EFIPCI could not install driver: %s\n",
-		       strerror ( rc ) );
+		       efi_strerror ( efirc ) );
 		return;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_reboot.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_reboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_reboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_reboot.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,61 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * EFI reboot mechanism
- *
- */
-
-#include <errno.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/reboot.h>
-
-/**
- * Reboot system
- *
- * @v warm		Perform a warm reboot
- */
-static void efi_reboot ( int warm ) {
-	EFI_RUNTIME_SERVICES *rs = efi_systab->RuntimeServices;
-
-	/* Use runtime services to reset system */
-	rs->ResetSystem ( ( warm ? EfiResetWarm : EfiResetCold ), 0, 0, NULL );
-}
-
-/**
- * Power off system
- *
- * @ret rc		Return status code
- */
-static int efi_poweroff ( void ) {
-	EFI_RUNTIME_SERVICES *rs = efi_systab->RuntimeServices;
-
-	/* Use runtime services to power off system */
-	rs->ResetSystem ( EfiResetShutdown, 0, 0, NULL );
-
-	/* Should never happen */
-	return -ECANCELED;
-}
-
-PROVIDE_REBOOT ( efi, reboot, efi_reboot );
-PROVIDE_REBOOT ( efi, poweroff, efi_poweroff );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_smbios.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_smbios.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_smbios.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_smbios.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -55,8 +54,6 @@
 	smbios->address = phys_to_user ( smbios_entry->smbios_address );
 	smbios->len = smbios_entry->smbios_len;
 	smbios->count = smbios_entry->smbios_count;
-	smbios->version =
-		SMBIOS_VERSION ( smbios_entry->major, smbios_entry->minor );
 	DBG ( "Found SMBIOS v%d.%d entry point at %p (%x+%zx)\n",
 	      smbios_entry->major, smbios_entry->minor, smbios_entry,
 	      smbios_entry->smbios_address, smbios->len );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_snp.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_snp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_snp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_snp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -32,9 +31,65 @@
 #include <ipxe/efi/efi_pci.h>
 #include <ipxe/efi/efi_driver.h>
 #include <ipxe/efi/efi_strings.h>
-#include <ipxe/efi/efi_snp.h>
+#include <ipxe/efi/efi_hii.h>
+#include <ipxe/efi/Protocol/SimpleNetwork.h>
+#include <ipxe/efi/Protocol/NetworkInterfaceIdentifier.h>
+#include <ipxe/efi/Protocol/DevicePath.h>
+#include <ipxe/efi/Protocol/HiiConfigAccess.h>
+#include <ipxe/efi/Protocol/HiiDatabase.h>
 #include <config/general.h>
-#include <usr/autoboot.h>
+
+/** @file
+ *
+ * iPXE EFI SNP interface
+ *
+ */
+
+/** An SNP device */
+struct efi_snp_device {
+	/** List of SNP devices */
+	struct list_head list;
+	/** The underlying iPXE network device */
+	struct net_device *netdev;
+	/** The underlying EFI PCI device */
+	struct efi_pci_device *efipci;
+	/** EFI device handle */
+	EFI_HANDLE handle;
+	/** The SNP structure itself */
+	EFI_SIMPLE_NETWORK_PROTOCOL snp;
+	/** The SNP "mode" (parameters) */
+	EFI_SIMPLE_NETWORK_MODE mode;
+	/** Outstanding TX packet count (via "interrupt status")
+	 *
+	 * Used in order to generate TX completions.
+	 */
+	unsigned int tx_count_interrupts;
+	/** Outstanding TX packet count (via "recycled tx buffers")
+	 *
+	 * Used in order to generate TX completions.
+	 */
+	unsigned int tx_count_txbufs;
+	/** Outstanding RX packet count (via "interrupt status") */
+	unsigned int rx_count_interrupts;
+	/** Outstanding RX packet count (via WaitForPacket event) */
+	unsigned int rx_count_events;
+	/** The network interface identifier */
+	EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL nii;
+	/** HII configuration access protocol */
+	EFI_HII_CONFIG_ACCESS_PROTOCOL hii;
+	/** HII package list */
+	EFI_HII_PACKAGE_LIST_HEADER *package_list;
+	/** HII handle */
+	EFI_HII_HANDLE hii_handle;
+	/** Device name */
+	wchar_t name[ sizeof ( ( ( struct net_device * ) NULL )->name ) ];
+	/** The device path
+	 *
+	 * This field is variable in size and must appear at the end
+	 * of the structure.
+	 */
+	EFI_DEVICE_PATH_PROTOCOL path;
+};
 
 /** EFI simple network protocol GUID */
 static EFI_GUID efi_simple_network_protocol_guid
@@ -58,14 +113,6 @@
 	{ 0xBC, 0x81, 0x76, 0x7F, 0x1F, 0x97, 0x7A, 0x89 }
 };
 
-/** EFI component name protocol GUID */
-static EFI_GUID efi_component_name2_protocol_guid
-	= EFI_COMPONENT_NAME2_PROTOCOL_GUID;
-
-/** EFI load file protocol GUID */
-static EFI_GUID efi_load_file_protocol_guid
-	= EFI_LOAD_FILE_PROTOCOL_GUID;
-
 /** List of SNP devices */
 static LIST_HEAD ( efi_snp_devices );
 
@@ -177,7 +224,7 @@
 	if ( ( rc = netdev_open ( snpdev->netdev ) ) != 0 ) {
 		DBGC ( snpdev, "SNPDEV %p could not open %s: %s\n",
 		       snpdev, snpdev->netdev->name, strerror ( rc ) );
-		return EFIRC ( rc );
+		return RC_TO_EFIRC ( rc );
 	}
 
 	snpdev->mode.State = EfiSimpleNetworkInitialized;
@@ -206,7 +253,7 @@
 	if ( ( rc = netdev_open ( snpdev->netdev ) ) != 0 ) {
 		DBGC ( snpdev, "SNPDEV %p could not reopen %s: %s\n",
 		       snpdev, snpdev->netdev->name, strerror ( rc ) );
-		return EFIRC ( rc );
+		return RC_TO_EFIRC ( rc );
 	}
 
 	snpdev->mode.State = EfiSimpleNetworkInitialized;
@@ -366,7 +413,7 @@
 					   ip, mac ) ) != 0 ) {
 		DBGC ( snpdev, "SNPDEV %p could not hash %s: %s\n",
 		       snpdev, ip_str, strerror ( rc ) );
-		return EFIRC ( rc );
+		return RC_TO_EFIRC ( rc );
 	}
 
 	return 0;
@@ -488,8 +535,9 @@
 		container_of ( snp, struct efi_snp_device, snp );
 	struct ll_protocol *ll_protocol = snpdev->netdev->ll_protocol;
 	struct io_buffer *iobuf;
-	size_t payload_len;
+	size_t ll_headroom;
 	int rc;
+	EFI_STATUS efirc;
 
 	DBGC2 ( snpdev, "SNPDEV %p TRANSMIT %p+%lx", snpdev, data,
 		( ( unsigned long ) len ) );
@@ -514,25 +562,25 @@
 			DBGC ( snpdev, "SNPDEV %p TX invalid header length "
 			       "%ld\n", snpdev,
 			       ( ( unsigned long ) ll_header_len ) );
-			rc = -EINVAL;
+			efirc = EFI_INVALID_PARAMETER;
 			goto err_sanity;
 		}
 		if ( len < ll_header_len ) {
 			DBGC ( snpdev, "SNPDEV %p invalid packet length %ld\n",
 			       snpdev, ( ( unsigned long ) len ) );
-			rc = -EINVAL;
+			efirc = EFI_BUFFER_TOO_SMALL;
 			goto err_sanity;
 		}
 		if ( ! ll_dest ) {
 			DBGC ( snpdev, "SNPDEV %p TX missing destination "
 			       "address\n", snpdev );
-			rc = -EINVAL;
+			efirc = EFI_INVALID_PARAMETER;
 			goto err_sanity;
 		}
 		if ( ! net_proto ) {
 			DBGC ( snpdev, "SNPDEV %p TX missing network "
 			       "protocol\n", snpdev );
-			rc = -EINVAL;
+			efirc = EFI_INVALID_PARAMETER;
 			goto err_sanity;
 		}
 		if ( ! ll_src )
@@ -540,27 +588,26 @@
 	}
 
 	/* Allocate buffer */
-	payload_len = ( len - ll_protocol->ll_header_len );
-	iobuf = alloc_iob ( MAX_LL_HEADER_LEN + ( ( payload_len > IOB_ZLEN ) ?
-						  payload_len : IOB_ZLEN ) );
+	ll_headroom = ( MAX_LL_HEADER_LEN - ll_header_len );
+	iobuf = alloc_iob ( ll_headroom + len );
 	if ( ! iobuf ) {
 		DBGC ( snpdev, "SNPDEV %p TX could not allocate %ld-byte "
 		       "buffer\n", snpdev, ( ( unsigned long ) len ) );
-		rc = -ENOMEM;
+		efirc = EFI_DEVICE_ERROR;
 		goto err_alloc_iob;
 	}
-	iob_reserve ( iobuf, ( MAX_LL_HEADER_LEN -
-			       ll_protocol->ll_header_len ) );
+	iob_reserve ( iobuf, ll_headroom );
 	memcpy ( iob_put ( iobuf, len ), data, len );
 
 	/* Create link-layer header, if specified */
 	if ( ll_header_len ) {
-		iob_pull ( iobuf, ll_protocol->ll_header_len );
+		iob_pull ( iobuf, ll_header_len );
 		if ( ( rc = ll_protocol->push ( snpdev->netdev,
 						iobuf, ll_dest, ll_src,
 						htons ( *net_proto ) )) != 0 ){
 			DBGC ( snpdev, "SNPDEV %p TX could not construct "
 			       "header: %s\n", snpdev, strerror ( rc ) );
+			efirc = RC_TO_EFIRC ( rc );
 			goto err_ll_push;
 		}
 	}
@@ -569,6 +616,7 @@
 	if ( ( rc = netdev_tx ( snpdev->netdev, iob_disown ( iobuf ) ) ) != 0){
 		DBGC ( snpdev, "SNPDEV %p TX could not transmit: %s\n",
 		       snpdev, strerror ( rc ) );
+		efirc = RC_TO_EFIRC ( rc );
 		goto err_tx;
 	}
 
@@ -583,7 +631,7 @@
 	free_iob ( iobuf );
  err_alloc_iob:
  err_sanity:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -612,6 +660,7 @@
 	uint16_t iob_net_proto;
 	unsigned int iob_flags;
 	int rc;
+	EFI_STATUS efirc;
 
 	DBGC2 ( snpdev, "SNPDEV %p RECEIVE %p(+%lx)", snpdev, data,
 		( ( unsigned long ) *len ) );
@@ -623,7 +672,7 @@
 	iobuf = netdev_rx_dequeue ( snpdev->netdev );
 	if ( ! iobuf ) {
 		DBGC2 ( snpdev, "\n" );
-		rc = -EAGAIN;
+		efirc = EFI_NOT_READY;
 		goto out_no_packet;
 	}
 	DBGC2 ( snpdev, "+%zx\n", iob_len ( iobuf ) );
@@ -638,6 +687,7 @@
 					&iob_flags ) ) != 0 ) {
 		DBGC ( snpdev, "SNPDEV %p could not parse header: %s\n",
 		       snpdev, strerror ( rc ) );
+		efirc = RC_TO_EFIRC ( rc );
 		goto out_bad_ll_header;
 	}
 
@@ -651,12 +701,12 @@
 	if ( net_proto )
 		*net_proto = ntohs ( iob_net_proto );
 
-	rc = 0;
+	efirc = 0;
 
  out_bad_ll_header:
 	free_iob ( iobuf );
 out_no_packet:
-	return EFIRC ( rc );
+	return efirc;
 }
 
 /**
@@ -708,93 +758,331 @@
 
 /******************************************************************************
  *
- * Component name protocol
+ * Human Interface Infrastructure
  *
  ******************************************************************************
  */
 
+/** EFI configuration access protocol GUID */
+static EFI_GUID efi_hii_config_access_protocol_guid
+	= EFI_HII_CONFIG_ACCESS_PROTOCOL_GUID;
+
+/** EFI HII database protocol */
+static EFI_HII_DATABASE_PROTOCOL *efihii;
+EFI_REQUIRE_PROTOCOL ( EFI_HII_DATABASE_PROTOCOL, &efihii );
+
+/** Local base GUID used for our EFI SNP formset */
+#define EFI_SNP_FORMSET_GUID_BASE					\
+	{ 0xc4f84019, 0x6dfd, 0x4a27,					\
+	  { 0x9b, 0x94, 0xb7, 0x2e, 0x1f, 0xbc, 0xad, 0xca } }
+
+/** Form identifiers used for our EFI SNP HII */
+enum efi_snp_hii_form_id {
+	EFI_SNP_FORM = 0x0001,		/**< The only form */
+};
+
+/** String identifiers used for our EFI SNP HII */
+enum efi_snp_hii_string_id {
+	/* Language name */
+	EFI_SNP_LANGUAGE_NAME = 0x0001,
+	/* Formset */
+	EFI_SNP_FORMSET_TITLE, EFI_SNP_FORMSET_HELP,
+	/* Product name */
+	EFI_SNP_PRODUCT_PROMPT, EFI_SNP_PRODUCT_HELP, EFI_SNP_PRODUCT_TEXT,
+	/* Version */
+	EFI_SNP_VERSION_PROMPT, EFI_SNP_VERSION_HELP, EFI_SNP_VERSION_TEXT,
+	/* Driver */
+	EFI_SNP_DRIVER_PROMPT, EFI_SNP_DRIVER_HELP, EFI_SNP_DRIVER_TEXT,
+	/* Device */
+	EFI_SNP_DEVICE_PROMPT, EFI_SNP_DEVICE_HELP, EFI_SNP_DEVICE_TEXT,
+	/* End of list */
+	EFI_SNP_MAX_STRING_ID
+};
+
+/** EFI SNP formset */
+struct efi_snp_formset {
+	EFI_HII_PACKAGE_HEADER Header;
+	EFI_IFR_FORM_SET_TYPE(1) FormSet;
+	EFI_IFR_GUID_CLASS Class;
+	EFI_IFR_GUID_SUBCLASS SubClass;
+	EFI_IFR_FORM Form;
+	EFI_IFR_TEXT ProductText;
+	EFI_IFR_TEXT VersionText;
+	EFI_IFR_TEXT DriverText;
+	EFI_IFR_TEXT DeviceText;
+	EFI_IFR_END EndForm;
+	EFI_IFR_END EndFormSet;
+} __attribute__ (( packed )) efi_snp_formset = {
+	.Header = {
+		.Length = sizeof ( efi_snp_formset ),
+		.Type = EFI_HII_PACKAGE_FORMS,
+	},
+	.FormSet = EFI_IFR_FORM_SET ( EFI_SNP_FORMSET_GUID_BASE,
+				      EFI_SNP_FORMSET_TITLE,
+				      EFI_SNP_FORMSET_HELP,
+				      typeof ( efi_snp_formset.FormSet ),
+				      EFI_HII_PLATFORM_SETUP_FORMSET_GUID ),
+	.Class = EFI_IFR_GUID_CLASS ( EFI_NETWORK_DEVICE_CLASS ),
+	.SubClass = EFI_IFR_GUID_SUBCLASS ( 0x03 ),
+	.Form = EFI_IFR_FORM ( EFI_SNP_FORM, EFI_SNP_FORMSET_TITLE ),
+	.ProductText = EFI_IFR_TEXT ( EFI_SNP_PRODUCT_PROMPT,
+				      EFI_SNP_PRODUCT_HELP,
+				      EFI_SNP_PRODUCT_TEXT ),
+	.VersionText = EFI_IFR_TEXT ( EFI_SNP_VERSION_PROMPT,
+				      EFI_SNP_VERSION_HELP,
+				      EFI_SNP_VERSION_TEXT ),
+	.DriverText = EFI_IFR_TEXT ( EFI_SNP_DRIVER_PROMPT,
+				     EFI_SNP_DRIVER_HELP,
+				     EFI_SNP_DRIVER_TEXT ),
+	.DeviceText = EFI_IFR_TEXT ( EFI_SNP_DEVICE_PROMPT,
+				     EFI_SNP_DEVICE_HELP,
+				     EFI_SNP_DEVICE_TEXT ),
+	.EndForm = EFI_IFR_END(),
+	.EndFormSet = EFI_IFR_END(),
+};
+
 /**
- * Look up driver name
+ * Generate EFI SNP string
  *
- * @v name2		Component name protocol
- * @v language		Language to use
- * @v driver_name	Driver name to fill in
- * @ret efirc		EFI status code
+ * @v wbuf		Buffer
+ * @v swlen		Size of buffer (in wide characters)
+ * @v snpdev		SNP device
+ * @ret wlen		Length of string (in wide characters)
  */
-static EFI_STATUS EFIAPI
-efi_snp_get_driver_name ( EFI_COMPONENT_NAME2_PROTOCOL *name2,
-			  CHAR8 *language __unused, CHAR16 **driver_name ) {
-	struct efi_snp_device *snpdev =
-		container_of ( name2, struct efi_snp_device, name2 );
+static int efi_snp_string ( wchar_t *wbuf, ssize_t swlen,
+			    enum efi_snp_hii_string_id id,
+			    struct efi_snp_device *snpdev ) {
+	struct net_device *netdev = snpdev->netdev;
+	struct device *dev = netdev->dev;
 
-	*driver_name = snpdev->driver_name;
-	return 0;
+	switch ( id ) {
+	case EFI_SNP_LANGUAGE_NAME:
+		return efi_ssnprintf ( wbuf, swlen, "English" );
+	case EFI_SNP_FORMSET_TITLE:
+		return efi_ssnprintf ( wbuf, swlen, "%s (%s)",
+				       ( PRODUCT_NAME[0] ?
+					 PRODUCT_NAME : PRODUCT_SHORT_NAME ),
+				       netdev_addr ( netdev ) );
+	case EFI_SNP_FORMSET_HELP:
+		return efi_ssnprintf ( wbuf, swlen,
+				       "Configure " PRODUCT_SHORT_NAME );
+	case EFI_SNP_PRODUCT_PROMPT:
+		return efi_ssnprintf ( wbuf, swlen, "Name" );
+	case EFI_SNP_PRODUCT_HELP:
+		return efi_ssnprintf ( wbuf, swlen, "Firmware product name" );
+	case EFI_SNP_PRODUCT_TEXT:
+		return efi_ssnprintf ( wbuf, swlen, "%s",
+				       ( PRODUCT_NAME[0] ?
+					 PRODUCT_NAME : PRODUCT_SHORT_NAME ) );
+	case EFI_SNP_VERSION_PROMPT:
+		return efi_ssnprintf ( wbuf, swlen, "Version" );
+	case EFI_SNP_VERSION_HELP:
+		return efi_ssnprintf ( wbuf, swlen, "Firmware version" );
+	case EFI_SNP_VERSION_TEXT:
+		return efi_ssnprintf ( wbuf, swlen, VERSION );
+	case EFI_SNP_DRIVER_PROMPT:
+		return efi_ssnprintf ( wbuf, swlen, "Driver" );
+	case EFI_SNP_DRIVER_HELP:
+		return efi_ssnprintf ( wbuf, swlen, "Firmware driver" );
+	case EFI_SNP_DRIVER_TEXT:
+		return efi_ssnprintf ( wbuf, swlen, "%s", dev->driver_name );
+	case EFI_SNP_DEVICE_PROMPT:
+		return efi_ssnprintf ( wbuf, swlen, "Device" );
+	case EFI_SNP_DEVICE_HELP:
+		return efi_ssnprintf ( wbuf, swlen, "Hardware device" );
+	case EFI_SNP_DEVICE_TEXT:
+		return efi_ssnprintf ( wbuf, swlen, "%s", dev->name );
+	default:
+		assert ( 0 );
+		return 0;
+	}
 }
 
 /**
- * Look up controller name
+ * Generate EFI SNP string package
  *
- * @v name2     		Component name protocol
- * @v device		Device
- * @v child		Child device, or NULL
- * @v language		Language to use
- * @v driver_name	Device name to fill in
- * @ret efirc		EFI status code
+ * @v strings		String package header buffer
+ * @v max_len		Buffer length
+ * @v snpdev		SNP device
+ * @ret len		Length of string package
  */
-static EFI_STATUS EFIAPI
-efi_snp_get_controller_name ( EFI_COMPONENT_NAME2_PROTOCOL *name2,
-			      EFI_HANDLE device __unused,
-			      EFI_HANDLE child __unused,
-			      CHAR8 *language __unused,
-			      CHAR16 **controller_name ) {
-	struct efi_snp_device *snpdev =
-		container_of ( name2, struct efi_snp_device, name2 );
+static int efi_snp_strings ( EFI_HII_STRING_PACKAGE_HDR *strings,
+			     size_t max_len, struct efi_snp_device *snpdev ) {
+	static const char language[] = "en-us";
+	void *buf = strings;
+	ssize_t remaining = max_len;
+	size_t hdrsize;
+	EFI_HII_SIBT_STRING_UCS2_BLOCK *string;
+	ssize_t wremaining;
+	size_t string_wlen;
+	unsigned int id;
+	EFI_HII_STRING_BLOCK *end;
+	size_t len;
+
+	/* Calculate header size */
+	hdrsize = ( offsetof ( typeof ( *strings ), Language ) +
+		    sizeof ( language ) );
+	buf += hdrsize;
+	remaining -= hdrsize;
+
+	/* Fill in strings */
+	for ( id = 1 ; id < EFI_SNP_MAX_STRING_ID ; id++ ) {
+		string = buf;
+		if ( remaining >= ( ( ssize_t ) sizeof ( string->Header ) ) )
+			string->Header.BlockType = EFI_HII_SIBT_STRING_UCS2;
+		buf += offsetof ( typeof ( *string ), StringText );
+		remaining -= offsetof ( typeof ( *string ), StringText );
+		wremaining = ( remaining /
+			       ( ( ssize_t ) sizeof ( string->StringText[0] )));
+		assert ( ! ( ( remaining <= 0 ) && ( wremaining > 0 ) ) );
+		string_wlen = efi_snp_string ( string->StringText, wremaining,
+					       id, snpdev );
+		buf += ( ( string_wlen + 1 /* wNUL */ ) *
+			 sizeof ( string->StringText[0] ) );
+		remaining -= ( ( string_wlen + 1 /* wNUL */ ) *
+			       sizeof ( string->StringText[0] ) );
+	}
+
+	/* Fill in end marker */
+	end = buf;
+	if ( remaining >= ( ( ssize_t ) sizeof ( *end ) ) )
+		end->BlockType = EFI_HII_SIBT_END;
+	buf += sizeof ( *end );
+	remaining -= sizeof ( *end );
+
+	/* Calculate overall length */
+	len = ( max_len - remaining );
+
+	/* Fill in string package header */
+	if ( strings ) {
+		memset ( strings, 0, sizeof ( *strings ) );
+		strings->Header.Length = len;
+		strings->Header.Type = EFI_HII_PACKAGE_STRINGS;
+		strings->HdrSize = hdrsize;
+		strings->StringInfoOffset = hdrsize;
+		strings->LanguageName = EFI_SNP_LANGUAGE_NAME;
+		memcpy ( strings->Language, language, sizeof ( language ) );
+	}
 
-	*controller_name = snpdev->controller_name;
-	return 0;
+	return len;
 }
 
-/******************************************************************************
+/**
+ * Generate EFI SNP package list
  *
- * Load file protocol
+ * @v snpdev		SNP device
+ * @ret package_list	Package list, or NULL on error
  *
- ******************************************************************************
+ * The package list is allocated using malloc(), and must eventually
+ * be freed by the caller.
+ */
+static EFI_HII_PACKAGE_LIST_HEADER *
+efi_snp_package_list ( struct efi_snp_device *snpdev ) {
+	size_t strings_len = efi_snp_strings ( NULL, 0, snpdev );
+	struct {
+		EFI_HII_PACKAGE_LIST_HEADER header;
+		struct efi_snp_formset formset;
+		union {
+			EFI_HII_STRING_PACKAGE_HDR strings;
+			uint8_t pad[strings_len];
+		} __attribute__ (( packed )) strings;
+		EFI_HII_PACKAGE_HEADER end;
+	} __attribute__ (( packed )) *package_list;
+
+	/* Allocate package list */
+	package_list = zalloc ( sizeof ( *package_list ) );
+	if ( ! package_list )
+		return NULL;
+
+	/* Create a unique GUID for this package list and formset */
+	efi_snp_formset.FormSet.FormSet.Guid.Data1++;
+
+	/* Populate package list */
+	memcpy ( &package_list->header.PackageListGuid,
+		 &efi_snp_formset.FormSet.FormSet.Guid,
+		 sizeof ( package_list->header.PackageListGuid ) );
+	package_list->header.PackageLength = sizeof ( *package_list );
+	memcpy ( &package_list->formset, &efi_snp_formset,
+		 sizeof ( package_list->formset ) );
+	efi_snp_strings ( &package_list->strings.strings,
+			  sizeof ( package_list->strings ), snpdev );
+	package_list->end.Length = sizeof ( package_list->end );
+	package_list->end.Type = EFI_HII_PACKAGE_END;
+
+	return &package_list->header;
+}
+
+/**
+ * Fetch configuration
+ *
+ * @v hii		HII configuration access protocol
+ * @v request		Configuration to fetch
+ * @ret progress	Progress made through configuration to fetch
+ * @ret results		Query results
+ * @ret efirc		EFI status code
  */
+static EFI_STATUS EFIAPI
+efi_snp_hii_extract_config ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
+			     EFI_STRING request, EFI_STRING *progress,
+			     EFI_STRING *results __unused ) {
+	struct efi_snp_device *snpdev =
+		container_of ( hii, struct efi_snp_device, hii );
+
+	DBGC ( snpdev, "SNPDEV %p ExtractConfig\n", snpdev );
+
+	*progress = request;
+	return EFI_INVALID_PARAMETER;
+}
 
 /**
- * Load file
+ * Store configuration
  *
- * @v loadfile		Load file protocol
- * @v path		File path
- * @v booting		Loading as part of a boot attempt
+ * @v hii		HII configuration access protocol
+ * @v config		Configuration to store
+ * @ret progress	Progress made through configuration to store
  * @ret efirc		EFI status code
  */
 static EFI_STATUS EFIAPI
-efi_snp_load_file ( EFI_LOAD_FILE_PROTOCOL *load_file,
-		    EFI_DEVICE_PATH_PROTOCOL *path __unused,
-		    BOOLEAN booting, UINTN *len __unused,
-		    VOID *data __unused ) {
+efi_snp_hii_route_config ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
+			   EFI_STRING config, EFI_STRING *progress ) {
 	struct efi_snp_device *snpdev =
-		container_of ( load_file, struct efi_snp_device, load_file );
-	struct net_device *netdev = snpdev->netdev;
+		container_of ( hii, struct efi_snp_device, hii );
 
-	/* Fail unless this is a boot attempt */
-	if ( ! booting ) {
-		DBGC ( snpdev, "SNPDEV %p cannot load non-boot file\n",
-		       snpdev );
-		return EFI_UNSUPPORTED;
-	}
+	DBGC ( snpdev, "SNPDEV %p RouteConfig\n", snpdev );
 
-	/* Boot from network device */
-	ipxe ( netdev );
+	*progress = config;
+	return EFI_INVALID_PARAMETER;
+}
 
-	/* Assume boot process was aborted */
-	return EFI_ABORTED;
+/**
+ * Handle form actions
+ *
+ * @v hii		HII configuration access protocol
+ * @v action		Form browser action
+ * @v question_id	Question ID
+ * @v type		Type of value
+ * @v value		Value
+ * @ret action_request	Action requested by driver
+ * @ret efirc		EFI status code
+ */
+static EFI_STATUS EFIAPI
+efi_snp_hii_callback ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
+		       EFI_BROWSER_ACTION action __unused,
+		       EFI_QUESTION_ID question_id __unused,
+		       UINT8 type __unused, EFI_IFR_TYPE_VALUE *value __unused,
+		       EFI_BROWSER_ACTION_REQUEST *action_request __unused ) {
+	struct efi_snp_device *snpdev =
+		container_of ( hii, struct efi_snp_device, hii );
+
+	DBGC ( snpdev, "SNPDEV %p Callback\n", snpdev );
+	return EFI_UNSUPPORTED;
 }
 
-/** Load file protocol */
-static EFI_LOAD_FILE_PROTOCOL efi_snp_load_file_protocol = {
-	.LoadFile	= efi_snp_load_file,
+/** HII configuration access protocol */
+static EFI_HII_CONFIG_ACCESS_PROTOCOL efi_snp_device_hii = {
+	.ExtractConfig	= efi_snp_hii_extract_config,
+	.RouteConfig	= efi_snp_hii_route_config,
+	.Callback	= efi_snp_hii_callback,
 };
 
 /******************************************************************************
@@ -874,9 +1162,9 @@
 	if ( ( efirc = bs->CreateEvent ( EVT_NOTIFY_WAIT, TPL_NOTIFY,
 					 efi_snp_wait_for_packet, snpdev,
 					 &snpdev->snp.WaitForPacket ) ) != 0 ){
-		rc = -EEFI ( efirc );
 		DBGC ( snpdev, "SNPDEV %p could not create event: %s\n",
-		       snpdev, strerror ( rc ) );
+		       snpdev, efi_strerror ( efirc ) );
+		rc = EFIRC_TO_RC ( efirc );
 		goto err_create_event;
 	}
 
@@ -890,23 +1178,8 @@
 	strncpy ( snpdev->nii.StringId, "iPXE",
 		  sizeof ( snpdev->nii.StringId ) );
 
-	/* Populate the component name structure */
-	efi_snprintf ( snpdev->driver_name,
-		       ( sizeof ( snpdev->driver_name ) /
-			 sizeof ( snpdev->driver_name[0] ) ),
-		       PRODUCT_SHORT_NAME " %s", netdev->dev->driver_name );
-	efi_snprintf ( snpdev->controller_name,
-		       ( sizeof ( snpdev->controller_name ) /
-			 sizeof ( snpdev->controller_name[0] ) ),
-		       PRODUCT_SHORT_NAME " %s (%s)",
-		       netdev->name, netdev_addr ( netdev ) );
-	snpdev->name2.GetDriverName = efi_snp_get_driver_name;
-	snpdev->name2.GetControllerName = efi_snp_get_controller_name;
-	snpdev->name2.SupportedLanguages = "en";
-
-	/* Populate the load file protocol structure */
-	memcpy ( &snpdev->load_file, &efi_snp_load_file_protocol,
-		 sizeof ( snpdev->load_file ) );
+	/* Populate the HII configuration access structure */
+	memcpy ( &snpdev->hii, &efi_snp_device_hii, sizeof ( snpdev->hii ) );
 
 	/* Populate the device name */
 	efi_snprintf ( snpdev->name, ( sizeof ( snpdev->name ) /
@@ -936,28 +1209,40 @@
 			&efi_device_path_protocol_guid, &snpdev->path,
 			&efi_nii_protocol_guid, &snpdev->nii,
 			&efi_nii31_protocol_guid, &snpdev->nii,
-			&efi_component_name2_protocol_guid, &snpdev->name2,
-			&efi_load_file_protocol_guid, &snpdev->load_file,
+			&efi_hii_config_access_protocol_guid, &snpdev->hii,
 			NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBGC ( snpdev, "SNPDEV %p could not install protocols: "
-		       "%s\n", snpdev, strerror ( rc ) );
+		       "%s\n", snpdev, efi_strerror ( efirc ) );
+		rc = EFIRC_TO_RC ( efirc );
 		goto err_install_protocol_interface;
 	}
 
 	/* Add as child of PCI device */
-	if ( ( rc = efipci_child_add ( efipci, snpdev->handle ) ) != 0 ) {
+	if ( ( efirc = efipci_child_add ( efipci, snpdev->handle ) ) != 0 ) {
 		DBGC ( snpdev, "SNPDEV %p could not become child of " PCI_FMT
 		       ": %s\n", snpdev, PCI_ARGS ( &efipci->pci ),
-		       strerror ( rc ) );
+		       efi_strerror ( efirc ) );
+		rc = EFIRC_TO_RC ( efirc );
 		goto err_efipci_child_add;
 	}
 
-	/* Install HII */
-	if ( ( rc = efi_snp_hii_install ( snpdev ) ) != 0 ) {
-		DBGC ( snpdev, "SNPDEV %p could not install HII: %s\n",
-		       snpdev, strerror ( rc ) );
-		goto err_hii_install;
+	/* Create HII package list */
+	snpdev->package_list = efi_snp_package_list ( snpdev );
+	if ( ! snpdev->package_list ) {
+		DBGC ( snpdev, "SNPDEV %p could not create HII package list\n",
+		       snpdev );
+		rc = -ENOMEM;
+		goto err_create_hii;
+	}
+
+	/* Add HII packages */
+	if ( ( efirc = efihii->NewPackageList ( efihii, snpdev->package_list,
+						snpdev->handle,
+						&snpdev->hii_handle ) ) != 0 ) {
+		DBGC ( snpdev, "SNPDEV %p could not add HII packages: %s\n",
+		       snpdev, efi_strerror ( efirc ) );
+		rc = EFIRC_TO_RC ( efirc );
+		goto err_register_hii;
 	}
 
 	/* Add to list of SNP devices */
@@ -967,8 +1252,10 @@
 	       snpdev, netdev->name, snpdev->handle );
 	return 0;
 
-	efi_snp_hii_uninstall ( snpdev );
- err_hii_install:
+	efihii->RemovePackageList ( efihii, snpdev->hii_handle );
+ err_register_hii:
+	free ( snpdev->package_list );
+ err_create_hii:
 	efipci_child_del ( efipci, snpdev->handle );
  err_efipci_child_add:
 	bs->UninstallMultipleProtocolInterfaces (
@@ -977,8 +1264,7 @@
 			&efi_device_path_protocol_guid, &snpdev->path,
 			&efi_nii_protocol_guid, &snpdev->nii,
 			&efi_nii31_protocol_guid, &snpdev->nii,
-			&efi_component_name2_protocol_guid, &snpdev->name2,
-			&efi_load_file_protocol_guid, &snpdev->load_file,
+			&efi_hii_config_access_protocol_guid, &snpdev->hii,
 			NULL );
  err_install_protocol_interface:
 	bs->CloseEvent ( snpdev->snp.WaitForPacket );
@@ -996,21 +1282,8 @@
  *
  * @v netdev		Network device
  */
-static void efi_snp_notify ( struct net_device *netdev ) {
-	struct efi_snp_device *snpdev;
-
-	/* Locate SNP device */
-	snpdev = efi_snp_demux ( netdev );
-	if ( ! snpdev ) {
-		DBG ( "SNP skipping non-SNP device %s\n", netdev->name );
-		return;
-	}
-
-	/* Update link state */
-	snpdev->mode.MediaPresent =
-		( netdev_link_ok ( netdev ) ? TRUE : FALSE );
-	DBGC ( snpdev, "SNPDEV %p link is %s\n", snpdev,
-	       ( snpdev->mode.MediaPresent ? "up" : "down" ) );
+static void efi_snp_notify ( struct net_device *netdev __unused ) {
+	/* Nothing to do */
 }
 
 /**
@@ -1030,7 +1303,8 @@
 	}
 
 	/* Uninstall the SNP */
-	efi_snp_hii_uninstall ( snpdev );
+	efihii->RemovePackageList ( efihii, snpdev->hii_handle );
+	free ( snpdev->package_list );
 	efipci_child_del ( snpdev->efipci, snpdev->handle );
 	list_del ( &snpdev->list );
 	bs->UninstallMultipleProtocolInterfaces (
@@ -1039,8 +1313,7 @@
 			&efi_device_path_protocol_guid, &snpdev->path,
 			&efi_nii_protocol_guid, &snpdev->nii,
 			&efi_nii31_protocol_guid, &snpdev->nii,
-			&efi_component_name2_protocol_guid, &snpdev->name2,
-			&efi_load_file_protocol_guid, &snpdev->load_file,
+			&efi_hii_config_access_protocol_guid, &snpdev->hii,
 			NULL );
 	bs->CloseEvent ( snpdev->snp.WaitForPacket );
 	netdev_put ( snpdev->netdev );
@@ -1054,18 +1327,3 @@
 	.notify = efi_snp_notify,
 	.remove = efi_snp_remove,
 };
-
-/**
- * Get most recently opened SNP device
- *
- * @ret snpdev		Most recently opened SNP device, or NULL
- */
-struct efi_snp_device * last_opened_snpdev ( void ) {
-	struct net_device *netdev;
-
-	netdev = last_opened_netdev();
-	if ( ! netdev )
-		return NULL;
-
-	return efi_snp_demux ( netdev );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_snp_hii.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_snp_hii.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_snp_hii.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_snp_hii.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,707 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * EFI SNP HII protocol
- *
- * The HII protocols are some of the less-well designed parts of the
- * entire EFI specification.  This is a significant accomplishment.
- *
- * The face-slappingly ludicrous query string syntax seems to be
- * motivated by the desire to allow a caller to query multiple drivers
- * simultaneously via the single-instance HII_CONFIG_ROUTING_PROTOCOL,
- * which is supposed to pass relevant subsets of the query string to
- * the relevant drivers.
- *
- * Nobody uses the HII_CONFIG_ROUTING_PROTOCOL.  Not even the EFI
- * setup browser uses the HII_CONFIG_ROUTING_PROTOCOL.  To the best of
- * my knowledge, there has only ever been one implementation of the
- * HII_CONFIG_ROUTING_PROTOCOL (as part of EDK2), and it just doesn't
- * work.  It's so badly broken that I can't even figure out what the
- * code is _trying_ to do.
- *
- * Fundamentally, the problem seems to be that Javascript programmers
- * should not be allowed to design APIs for C code.
- */
-
-#include <string.h>
-#include <strings.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <wchar.h>
-#include <errno.h>
-#include <ipxe/settings.h>
-#include <ipxe/nvo.h>
-#include <ipxe/device.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/version.h>
-#include <ipxe/efi/efi.h>
-#include <ipxe/efi/efi_hii.h>
-#include <ipxe/efi/efi_snp.h>
-#include <ipxe/efi/efi_strings.h>
-#include <config/general.h>
-
-/** EFI configuration access protocol GUID */
-static EFI_GUID efi_hii_config_access_protocol_guid
-	= EFI_HII_CONFIG_ACCESS_PROTOCOL_GUID;
-
-/** EFI platform setup formset GUID */
-static EFI_GUID efi_hii_platform_setup_formset_guid
-	= EFI_HII_PLATFORM_SETUP_FORMSET_GUID;
-
-/** EFI IBM UCM compliant formset GUID */
-static EFI_GUID efi_hii_ibm_ucm_compliant_formset_guid
-	= EFI_HII_IBM_UCM_COMPLIANT_FORMSET_GUID;
-
-/** EFI HII database protocol */
-static EFI_HII_DATABASE_PROTOCOL *efihii;
-EFI_REQUIRE_PROTOCOL ( EFI_HII_DATABASE_PROTOCOL, &efihii );
-
-/**
- * Identify settings to be exposed via HII
- *
- * @v snpdev		SNP device
- * @ret settings	Settings, or NULL
- */
-static struct settings * efi_snp_hii_settings ( struct efi_snp_device *snpdev ){
-
-	return find_child_settings ( netdev_settings ( snpdev->netdev ),
-				     NVO_SETTINGS_NAME );
-}
-
-/**
- * Check whether or not setting is applicable
- *
- * @v snpdev		SNP device
- * @v setting		Setting
- * @ret applies		Setting applies
- */
-static int efi_snp_hii_setting_applies ( struct efi_snp_device *snpdev,
-					 struct setting *setting ) {
-
-	return nvo_applies ( efi_snp_hii_settings ( snpdev ), setting );
-}
-
-/**
- * Generate a random GUID
- *
- * @v guid		GUID to fill in
- */
-static void efi_snp_hii_random_guid ( EFI_GUID *guid ) {
-	uint8_t *byte = ( ( uint8_t * ) guid );
-	unsigned int i;
-
-	for ( i = 0 ; i < sizeof ( *guid ) ; i++ )
-		*(byte++) = random();
-}
-
-/**
- * Generate EFI SNP questions
- *
- * @v snpdev		SNP device
- * @v ifr		IFR builder
- * @v varstore_id	Variable store identifier
- */
-static void efi_snp_hii_questions ( struct efi_snp_device *snpdev,
-				    struct efi_ifr_builder *ifr,
-				    unsigned int varstore_id ) {
-	struct setting *setting;
-	unsigned int name_id;
-	unsigned int prompt_id;
-	unsigned int help_id;
-	unsigned int question_id;
-
-	/* Add all applicable settings */
-	for_each_table_entry ( setting, SETTINGS ) {
-		if ( ! efi_snp_hii_setting_applies ( snpdev, setting ) )
-			continue;
-		name_id = efi_ifr_string ( ifr, "%s", setting->name );
-		prompt_id = efi_ifr_string ( ifr, "%s", setting->description );
-		help_id = efi_ifr_string ( ifr, "http://ipxe.org/cfg/%s",
-					   setting->name );
-		question_id = setting->tag;
-		efi_ifr_string_op ( ifr, prompt_id, help_id,
-				    question_id, varstore_id, name_id,
-				    0, 0x00, 0xff, 0 );
-	}
-}
-
-/**
- * Build HII package list for SNP device
- *
- * @v snpdev		SNP device
- * @ret package		Package list, or NULL on error
- */
-static EFI_HII_PACKAGE_LIST_HEADER *
-efi_snp_hii_package_list ( struct efi_snp_device *snpdev ) {
-	struct net_device *netdev = snpdev->netdev;
-	struct device *dev = netdev->dev;
-	struct efi_ifr_builder ifr;
-	EFI_HII_PACKAGE_LIST_HEADER *package;
-	const char *product_name;
-	EFI_GUID package_guid;
-	EFI_GUID formset_guid;
-	EFI_GUID varstore_guid;
-	unsigned int title_id;
-	unsigned int varstore_id;
-
-	/* Initialise IFR builder */
-	efi_ifr_init ( &ifr );
-
-	/* Determine product name */
-	product_name = ( PRODUCT_NAME[0] ? PRODUCT_NAME : PRODUCT_SHORT_NAME );
-
-	/* Generate GUIDs */
-	efi_snp_hii_random_guid ( &package_guid );
-	efi_snp_hii_random_guid ( &formset_guid );
-	efi_snp_hii_random_guid ( &varstore_guid );
-
-	/* Generate title string (used more than once) */
-	title_id = efi_ifr_string ( &ifr, "%s (%s)", product_name,
-				    netdev_addr ( netdev ) );
-
-	/* Generate opcodes */
-	efi_ifr_form_set_op ( &ifr, &formset_guid, title_id,
-			      efi_ifr_string ( &ifr,
-					       "Configure " PRODUCT_SHORT_NAME),
-			      &efi_hii_platform_setup_formset_guid,
-			      &efi_hii_ibm_ucm_compliant_formset_guid, NULL );
-	efi_ifr_guid_class_op ( &ifr, EFI_NETWORK_DEVICE_CLASS );
-	efi_ifr_guid_subclass_op ( &ifr, 0x03 );
-	varstore_id = efi_ifr_varstore_name_value_op ( &ifr, &varstore_guid );
-	efi_ifr_form_op ( &ifr, title_id );
-	efi_ifr_text_op ( &ifr,
-			  efi_ifr_string ( &ifr, "Name" ),
-			  efi_ifr_string ( &ifr, "Firmware product name" ),
-			  efi_ifr_string ( &ifr, "%s", product_name ) );
-	efi_ifr_text_op ( &ifr,
-			  efi_ifr_string ( &ifr, "Version" ),
-			  efi_ifr_string ( &ifr, "Firmware version" ),
-			  efi_ifr_string ( &ifr, "%s", product_version ) );
-	efi_ifr_text_op ( &ifr,
-			  efi_ifr_string ( &ifr, "Driver" ),
-			  efi_ifr_string ( &ifr, "Firmware driver" ),
-			  efi_ifr_string ( &ifr, "%s", dev->driver_name ) );
-	efi_ifr_text_op ( &ifr,
-			  efi_ifr_string ( &ifr, "Device" ),
-			  efi_ifr_string ( &ifr, "Hardware device" ),
-			  efi_ifr_string ( &ifr, "%s", dev->name ) );
-	efi_snp_hii_questions ( snpdev, &ifr, varstore_id );
-	efi_ifr_end_op ( &ifr );
-	efi_ifr_end_op ( &ifr );
-
-	/* Build package */
-	package = efi_ifr_package ( &ifr, &package_guid, "en-us",
-				    efi_ifr_string ( &ifr, "English" ) );
-	if ( ! package ) {
-		DBGC ( snpdev, "SNPDEV %p could not build IFR package\n",
-		       snpdev );
-		efi_ifr_free ( &ifr );
-		return NULL;
-	}
-
-	/* Free temporary storage */
-	efi_ifr_free ( &ifr );
-	return package;
-}
-
-/**
- * Append response to result string
- *
- * @v snpdev		SNP device
- * @v key		Key
- * @v value		Value
- * @v results		Result string
- * @ret rc		Return status code
- *
- * The result string is allocated dynamically using
- * BootServices::AllocatePool(), and the caller is responsible for
- * eventually calling BootServices::FreePool().
- */
-static int efi_snp_hii_append ( struct efi_snp_device *snpdev __unused,
-				const char *key, const char *value,
-				wchar_t **results ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	size_t len;
-	void *new;
-
-	/* Allocate new string */
-	len = ( ( *results ? ( wcslen ( *results ) + 1 /* "&" */ ) : 0 ) +
-		strlen ( key ) + 1 /* "=" */ + strlen ( value ) + 1 /* NUL */ );
-	bs->AllocatePool ( EfiBootServicesData, ( len * sizeof ( wchar_t ) ),
-			   &new );
-	if ( ! new )
-		return -ENOMEM;
-
-	/* Populate string */
-	efi_snprintf ( new, len, "%ls%s%s=%s", ( *results ? *results : L"" ),
-		       ( *results ? L"&" : L"" ), key, value );
-	bs->FreePool ( *results );
-	*results = new;
-
-	return 0;
-}
-
-/**
- * Fetch HII setting
- *
- * @v snpdev		SNP device
- * @v key		Key
- * @v value		Value
- * @v results		Result string
- * @v have_setting	Flag indicating detection of a setting
- * @ret rc		Return status code
- */
-static int efi_snp_hii_fetch ( struct efi_snp_device *snpdev,
-			       const char *key, const char *value,
-			       wchar_t **results, int *have_setting ) {
-	struct settings *settings = efi_snp_hii_settings ( snpdev );
-	struct setting *setting;
-	int len;
-	char *buf;
-	char *encoded;
-	int i;
-	int rc;
-
-	/* Handle ConfigHdr components */
-	if ( ( strcasecmp ( key, "GUID" ) == 0 ) ||
-	     ( strcasecmp ( key, "NAME" ) == 0 ) ||
-	     ( strcasecmp ( key, "PATH" ) == 0 ) ) {
-		return efi_snp_hii_append ( snpdev, key, value, results );
-	}
-	if ( have_setting )
-		*have_setting = 1;
-
-	/* Do nothing more unless we have a settings block */
-	if ( ! settings ) {
-		rc = -ENOTSUP;
-		goto err_no_settings;
-	}
-
-	/* Identify setting */
-	setting = find_setting ( key );
-	if ( ! setting ) {
-		DBGC ( snpdev, "SNPDEV %p no such setting \"%s\"\n",
-		       snpdev, key );
-		rc = -ENODEV;
-		goto err_find_setting;
-	}
-
-	/* Encode value */
-	if ( setting_exists ( settings, setting ) ) {
-
-		/* Calculate formatted length */
-		len = fetchf_setting ( settings, setting, NULL, 0 );
-		if ( len < 0 ) {
-			rc = len;
-			DBGC ( snpdev, "SNPDEV %p could not fetch %s: %s\n",
-			       snpdev, setting->name, strerror ( rc ) );
-			goto err_fetchf_len;
-		}
-
-		/* Allocate buffer for formatted value and HII-encoded value */
-		buf = zalloc ( len + 1 /* NUL */ + ( len * 4 ) + 1 /* NUL */ );
-		if ( ! buf ) {
-			rc = -ENOMEM;
-			goto err_alloc;
-		}
-		encoded = ( buf + len + 1 /* NUL */ );
-
-		/* Format value */
-		fetchf_setting ( settings, setting, buf, ( len + 1 /* NUL */ ));
-		for ( i = 0 ; i < len ; i++ ) {
-			sprintf ( ( encoded + ( 4 * i ) ), "%04x",
-				  *( ( uint8_t * ) buf + i ) );
-		}
-
-	} else {
-
-		/* Non-existent or inapplicable setting */
-		buf = NULL;
-		encoded = "";
-	}
-
-	/* Append results */
-	if ( ( rc = efi_snp_hii_append ( snpdev, key, encoded,
-					 results ) ) != 0 ) {
-		goto err_append;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_append:
-	free ( buf );
- err_alloc:
- err_fetchf_len:
- err_find_setting:
- err_no_settings:
-	return rc;
-}
-
-/**
- * Fetch HII setting
- *
- * @v snpdev		SNP device
- * @v key		Key
- * @v value		Value
- * @v results		Result string (unused)
- * @v have_setting	Flag indicating detection of a setting (unused)
- * @ret rc		Return status code
- */
-static int efi_snp_hii_store ( struct efi_snp_device *snpdev,
-			       const char *key, const char *value,
-			       wchar_t **results __unused,
-			       int *have_setting __unused ) {
-	struct settings *settings = efi_snp_hii_settings ( snpdev );
-	struct setting *setting;
-	char *buf;
-	char tmp[5];
-	char *endp;
-	int len;
-	int i;
-	int rc;
-
-	/* Handle ConfigHdr components */
-	if ( ( strcasecmp ( key, "GUID" ) == 0 ) ||
-	     ( strcasecmp ( key, "NAME" ) == 0 ) ||
-	     ( strcasecmp ( key, "PATH" ) == 0 ) ) {
-		/* Nothing to do */
-		return 0;
-	}
-
-	/* Do nothing more unless we have a settings block */
-	if ( ! settings ) {
-		rc = -ENOTSUP;
-		goto err_no_settings;
-	}
-
-	/* Identify setting */
-	setting = find_setting ( key );
-	if ( ! setting ) {
-		DBGC ( snpdev, "SNPDEV %p no such setting \"%s\"\n",
-		       snpdev, key );
-		rc = -ENODEV;
-		goto err_find_setting;
-	}
-
-	/* Allocate buffer */
-	len = ( strlen ( value ) / 4 );
-	buf = zalloc ( len + 1 /* NUL */ );
-	if ( ! buf ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-
-	/* Decode value */
-	tmp[4] = '\0';
-	for ( i = 0 ; i < len ; i++ ) {
-		memcpy ( tmp, ( value + ( i * 4 ) ), 4 );
-		buf[i] = strtoul ( tmp, &endp, 16 );
-		if ( endp != &tmp[4] ) {
-			DBGC ( snpdev, "SNPDEV %p invalid character %s\n",
-			       snpdev, tmp );
-			rc = -EINVAL;
-			goto err_inval;
-		}
-	}
-
-	/* Store value */
-	if ( ( rc = storef_setting ( settings, setting, buf ) ) != 0 ) {
-		DBGC ( snpdev, "SNPDEV %p could not store \"%s\" into %s: %s\n",
-		       snpdev, buf, setting->name, strerror ( rc ) );
-		goto err_storef;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_storef:
- err_inval:
-	free ( buf );
- err_alloc:
- err_find_setting:
- err_no_settings:
-	return rc;
-}
-
-/**
- * Process portion of HII configuration string
- *
- * @v snpdev		SNP device
- * @v string		HII configuration string
- * @v progress		Progress through HII configuration string
- * @v results		Results string
- * @v have_setting	Flag indicating detection of a setting (unused)
- * @v process		Function used to process key=value pairs
- * @ret rc		Return status code
- */
-static int efi_snp_hii_process ( struct efi_snp_device *snpdev,
-				 wchar_t *string, wchar_t **progress,
-				 wchar_t **results, int *have_setting,
-				 int ( * process ) ( struct efi_snp_device *,
-						     const char *key,
-						     const char *value,
-						     wchar_t **results,
-						     int *have_setting ) ) {
-	wchar_t *wkey = string;
-	wchar_t *wend = string;
-	wchar_t *wvalue = NULL;
-	size_t key_len;
-	size_t value_len;
-	void *temp;
-	char *key;
-	char *value;
-	int rc;
-
-	/* Locate key, value (if any), and end */
-	while ( *wend ) {
-		if ( *wend == L'&' )
-			break;
-		if ( *(wend++) == L'=' )
-			wvalue = wend;
-	}
-
-	/* Allocate memory for key and value */
-	key_len = ( ( wvalue ? ( wvalue - 1 ) : wend ) - wkey );
-	value_len = ( wvalue ? ( wend - wvalue ) : 0 );
-	temp = zalloc ( key_len + 1 /* NUL */ + value_len + 1 /* NUL */ );
-	if ( ! temp )
-		return -ENOMEM;
-	key = temp;
-	value = ( temp + key_len + 1 /* NUL */ );
-
-	/* Copy key and value */
-	while ( key_len-- )
-		key[key_len] = wkey[key_len];
-	while ( value_len-- )
-		value[value_len] = wvalue[value_len];
-
-	/* Process key and value */
-	if ( ( rc = process ( snpdev, key, value, results,
-			      have_setting ) ) != 0 ) {
-		goto err;
-	}
-
-	/* Update progress marker */
-	*progress = wend;
-
- err:
-	/* Free temporary storage */
-	free ( temp );
-
-	return rc;
-}
-
-/**
- * Fetch configuration
- *
- * @v hii		HII configuration access protocol
- * @v request		Configuration to fetch
- * @ret progress	Progress made through configuration to fetch
- * @ret results		Query results
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_snp_hii_extract_config ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
-			     EFI_STRING request, EFI_STRING *progress,
-			     EFI_STRING *results ) {
-	struct efi_snp_device *snpdev =
-		container_of ( hii, struct efi_snp_device, hii );
-	int have_setting = 0;
-	wchar_t *pos;
-	int rc;
-
-	DBGC ( snpdev, "SNPDEV %p ExtractConfig request \"%ls\"\n",
-	       snpdev, request );
-
-	/* Initialise results */
-	*results = NULL;
-
-	/* Process all request fragments */
-	for ( pos = *progress = request ; *progress && **progress ;
-	      pos = *progress + 1 ) {
-		if ( ( rc = efi_snp_hii_process ( snpdev, pos, progress,
-						  results, &have_setting,
-						  efi_snp_hii_fetch ) ) != 0 ) {
-			return EFIRC ( rc );
-		}
-	}
-
-	/* If we have no explicit request, return all settings */
-	if ( ! have_setting ) {
-		struct setting *setting;
-
-		for_each_table_entry ( setting, SETTINGS ) {
-			if ( ! efi_snp_hii_setting_applies ( snpdev, setting ) )
-				continue;
-			if ( ( rc = efi_snp_hii_fetch ( snpdev, setting->name,
-							NULL, results,
-							NULL ) ) != 0 ) {
-				return EFIRC ( rc );
-			}
-		}
-	}
-
-	DBGC ( snpdev, "SNPDEV %p ExtractConfig results \"%ls\"\n",
-	       snpdev, *results );
-	return 0;
-}
-
-/**
- * Store configuration
- *
- * @v hii		HII configuration access protocol
- * @v config		Configuration to store
- * @ret progress	Progress made through configuration to store
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_snp_hii_route_config ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
-			   EFI_STRING config, EFI_STRING *progress ) {
-	struct efi_snp_device *snpdev =
-		container_of ( hii, struct efi_snp_device, hii );
-	wchar_t *pos;
-	int rc;
-
-	DBGC ( snpdev, "SNPDEV %p RouteConfig \"%ls\"\n", snpdev, config );
-
-	/* Process all request fragments */
-	for ( pos = *progress = config ; *progress && **progress ;
-	      pos = *progress + 1 ) {
-		if ( ( rc = efi_snp_hii_process ( snpdev, pos, progress,
-						  NULL, NULL,
-						  efi_snp_hii_store ) ) != 0 ) {
-			return EFIRC ( rc );
-		}
-	}
-
-	return 0;
-}
-
-/**
- * Handle form actions
- *
- * @v hii		HII configuration access protocol
- * @v action		Form browser action
- * @v question_id	Question ID
- * @v type		Type of value
- * @v value		Value
- * @ret action_request	Action requested by driver
- * @ret efirc		EFI status code
- */
-static EFI_STATUS EFIAPI
-efi_snp_hii_callback ( const EFI_HII_CONFIG_ACCESS_PROTOCOL *hii,
-		       EFI_BROWSER_ACTION action __unused,
-		       EFI_QUESTION_ID question_id __unused,
-		       UINT8 type __unused, EFI_IFR_TYPE_VALUE *value __unused,
-		       EFI_BROWSER_ACTION_REQUEST *action_request __unused ) {
-	struct efi_snp_device *snpdev =
-		container_of ( hii, struct efi_snp_device, hii );
-
-	DBGC ( snpdev, "SNPDEV %p Callback\n", snpdev );
-	return EFI_UNSUPPORTED;
-}
-
-/** HII configuration access protocol */
-static EFI_HII_CONFIG_ACCESS_PROTOCOL efi_snp_device_hii = {
-	.ExtractConfig	= efi_snp_hii_extract_config,
-	.RouteConfig	= efi_snp_hii_route_config,
-	.Callback	= efi_snp_hii_callback,
-};
-
-/**
- * Install HII protocol and packages for SNP device
- *
- * @v snpdev		SNP device
- * @ret rc		Return status code
- */
-int efi_snp_hii_install ( struct efi_snp_device *snpdev ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-	int efirc;
-	int rc;
-
-	/* Initialise HII protocol */
-	memcpy ( &snpdev->hii, &efi_snp_device_hii, sizeof ( snpdev->hii ) );
-
-	/* Create HII package list */
-	snpdev->package_list = efi_snp_hii_package_list ( snpdev );
-	if ( ! snpdev->package_list ) {
-		DBGC ( snpdev, "SNPDEV %p could not create HII package list\n",
-		       snpdev );
-		rc = -ENOMEM;
-		goto err_build_package_list;
-	}
-
-	/* Add HII packages */
-	if ( ( efirc = efihii->NewPackageList ( efihii, snpdev->package_list,
-						snpdev->handle,
-						&snpdev->hii_handle ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( snpdev, "SNPDEV %p could not add HII packages: %s\n",
-		       snpdev, strerror ( rc ) );
-		goto err_new_package_list;
-	}
-
-	/* Install HII protocol */
-	if ( ( efirc = bs->InstallMultipleProtocolInterfaces (
-			 &snpdev->handle,
-			 &efi_hii_config_access_protocol_guid, &snpdev->hii,
-			 NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBGC ( snpdev, "SNPDEV %p could not install HII protocol: %s\n",
-		       snpdev, strerror ( rc ) );
-		goto err_install_protocol;
-	}
-
-	return 0;
-
-	bs->UninstallMultipleProtocolInterfaces (
-			snpdev->handle,
-			&efi_hii_config_access_protocol_guid, &snpdev->hii,
-			NULL );
- err_install_protocol:
-	efihii->RemovePackageList ( efihii, snpdev->hii_handle );
- err_new_package_list:
-	free ( snpdev->package_list );
-	snpdev->package_list = NULL;
- err_build_package_list:
-	return rc;
-}
-
-/**
- * Uninstall HII protocol and package for SNP device
- *
- * @v snpdev		SNP device
- */
-void efi_snp_hii_uninstall ( struct efi_snp_device *snpdev ) {
-	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
-
-	bs->UninstallMultipleProtocolInterfaces (
-			snpdev->handle,
-			&efi_hii_config_access_protocol_guid, &snpdev->hii,
-			NULL );
-	efihii->RemovePackageList ( efihii, snpdev->hii_handle );
-	free ( snpdev->package_list );
-	snpdev->package_list = NULL;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_strerror.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_strerror.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_strerror.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_strerror.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2008 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <stdio.h>
+#include <ipxe/efi/efi.h>
+
+/** @file
+ *
+ * iPXE error message formatting for EFI
+ *
+ */
+
+/**
+ * Format EFI status code
+ *
+ * @v efirc		EFI status code
+ * @v efi_strerror	EFI status code string
+ */
+const char * efi_strerror ( EFI_STATUS efirc ) {
+	static char errbuf[32];
+
+	if ( ! efirc )
+		return "No error";
+
+	snprintf ( errbuf, sizeof ( errbuf ), "Error %lld",
+		   ( unsigned long long ) ( efirc ^ MAX_BIT ) );
+	return errbuf;
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_strings.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_strings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_strings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_strings.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_timer.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_timer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_timer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_timer.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
-#include <errno.h>
 #include <limits.h>
 #include <assert.h>
 #include <unistd.h>
@@ -56,12 +53,10 @@
 static void efi_udelay ( unsigned long usecs ) {
 	EFI_BOOT_SERVICES *bs = efi_systab->BootServices;
 	EFI_STATUS efirc;
-	int rc;
 
 	if ( ( efirc = bs->Stall ( usecs ) ) != 0 ) {
-		rc = -EEFI ( efirc );
 		DBG ( "EFI could not delay for %ldus: %s\n",
-		      usecs, strerror ( rc ) );
+		      usecs, efi_strerror ( efirc ) );
 		/* Probably screwed */
 	}
 }
@@ -74,13 +69,12 @@
 static unsigned long efi_currticks ( void ) {
 	UINT64 time;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* Read CPU timer 0 (TSC) */
 	if ( ( efirc = cpu_arch->GetTimerValue ( cpu_arch, 0, &time,
 						 NULL ) ) != 0 ) {
-		rc = -EEFI ( efirc );
-		DBG ( "EFI could not read CPU timer: %s\n", strerror ( rc ) );
+		DBG ( "EFI could not read CPU timer: %s\n",
+		      efi_strerror ( efirc ) );
 		/* Probably screwed */
 		return -1UL;
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_uaccess.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_uaccess.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_uaccess.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_uaccess.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_umalloc.c ipxe-1.0.1~lliurex1505/src/interface/efi/efi_umalloc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/efi/efi_umalloc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/efi/efi_umalloc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
-#include <errno.h>
 #include <assert.h>
 #include <ipxe/umalloc.h>
 #include <ipxe/efi/efi.h>
@@ -51,7 +48,6 @@
 	userptr_t new_ptr = UNOWHERE;
 	size_t old_size;
 	EFI_STATUS efirc;
-	int rc;
 
 	/* Allocate new memory if necessary.  If allocation fails,
 	 * return without touching the old block.
@@ -62,9 +58,8 @@
 						   EfiBootServicesData,
 						   new_pages,
 						   &phys_addr ) ) != 0 ) {
-			rc = -EEFI ( efirc );
 			DBG ( "EFI could not allocate %d pages: %s\n",
-			      new_pages, strerror ( rc ) );
+			      new_pages, efi_strerror ( efirc ) );
 			return UNULL;
 		}
 		assert ( phys_addr != 0 );
@@ -88,9 +83,8 @@
 		old_pages = ( EFI_SIZE_TO_PAGES ( old_size ) + 1 );
 		phys_addr = user_to_phys ( old_ptr, -EFI_PAGE_SIZE );
 		if ( ( efirc = bs->FreePages ( phys_addr, old_pages ) ) != 0 ){
-			rc = -EEFI ( efirc );
 			DBG ( "EFI could not free %d pages at %llx: %s\n",
-			      old_pages, phys_addr, strerror ( rc ) );
+			      old_pages, phys_addr, efi_strerror ( efirc ) );
 			/* Not fatal; we have leaked memory but successfully
 			 * allocated (if asked to do so).
 			 */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_console.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_console.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_console.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_console.c	2012-01-06 23:49:04.000000000 +0000
@@ -33,14 +33,6 @@
 #include <linux/termios.h>
 #include <asm/errno.h>
 
-#include <config/console.h>
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_LINUX ) && CONSOLE_EXPLICIT ( CONSOLE_LINUX ) )
-#undef CONSOLE_LINUX
-#define CONSOLE_LINUX ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_LOG )
-#endif
-
 static void linux_console_putchar(int c)
 {
 	/* write to stdout */
@@ -87,7 +79,6 @@
 	.putchar = linux_console_putchar,
 	.getchar = linux_console_getchar,
 	.iskey = linux_console_iskey,
-	.usage = CONSOLE_LINUX,
 };
 
 static int linux_tcgetattr(int fd, struct termios *termios_p)
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_entropy.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_entropy.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_entropy.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_entropy.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,97 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Linux entropy source
- *
- */
-
-#include <stdint.h>
-#include <errno.h>
-#include <linux_api.h>
-#include <ipxe/entropy.h>
-
-/** Entropy source filename */
-static const char entropy_filename[] = "/dev/random";
-
-/** Entropy source file handle */
-static int entropy_fd;
-
-/**
- * Enable entropy gathering
- *
- * @ret rc		Return status code
- */
-static int linux_entropy_enable ( void ) {
-
-	/* Open entropy source */
-	entropy_fd = linux_open ( entropy_filename, O_RDONLY );
-	if ( entropy_fd < 0 ) {
-		DBGC ( &entropy_fd, "ENTROPY could not open %s: %s\n",
-		       entropy_filename, linux_strerror ( linux_errno ) );
-		return entropy_fd;
-	}
-
-	return 0;
-}
-
-/**
- * Disable entropy gathering
- *
- */
-static void linux_entropy_disable ( void ) {
-
-	/* Close entropy source */
-	linux_close ( entropy_fd );
-}
-
-/**
- * Get noise sample
- *
- * @ret noise		Noise sample
- * @ret rc		Return status code
- */
-static int linux_get_noise ( noise_sample_t *noise ) {
-	uint8_t byte;
-	ssize_t len;
-
-	/* Read a single byte from entropy source */
-	len = linux_read ( entropy_fd, &byte, sizeof ( byte ) );
-	if ( len < 0 ) {
-		DBGC ( &entropy_fd, "ENTROPY could not read from %s: %s\n",
-		       entropy_filename, linux_strerror ( linux_errno ) );
-		return len;
-	}
-	if ( len == 0 ) {
-		DBGC ( &entropy_fd, "ENTROPY EOF on reading from %s: %s\n",
-		       entropy_filename, linux_strerror ( linux_errno ) );
-		return -EPIPE;
-	}
-	*noise = byte;
-
-	return 0;
-}
-
-PROVIDE_ENTROPY_INLINE ( linux, min_entropy_per_sample );
-PROVIDE_ENTROPY ( linux, entropy_enable, linux_entropy_enable );
-PROVIDE_ENTROPY ( linux, entropy_disable, linux_entropy_disable );
-PROVIDE_ENTROPY ( linux, get_noise, linux_get_noise );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_nap.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_nap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_nap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_nap.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE(GPL2_OR_LATER);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_pci.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_pci.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_pci.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_pci.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,185 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <linux_api.h>
-#include <ipxe/linux.h>
-#include <ipxe/pci.h>
-
-/** @file
- *
- * iPXE PCI API for Linux
- *
- */
-
-/**
- * Open PCI configuration space
- *
- * @v pci		PCI device
- * @v flags		Access mode flags
- * @v where		Address within configuration space
- * @ret fd		File handle, or negative error
- */
-static int linux_pci_open ( struct pci_device *pci, int flags,
-			    unsigned long where ) {
-	char filename[ 22 /* "/proc/bus/pci/xx/xx.x" + NUL */ ];
-	int fd;
-	int rc;
-
-	/* Construct filename */
-	snprintf ( filename, sizeof ( filename ), "/proc/bus/pci/%02x/%02x.%x",
-		   PCI_BUS ( pci->busdevfn ), PCI_SLOT ( pci->busdevfn ),
-		   PCI_FUNC ( pci->busdevfn ) );
-
-	/* Open file */
-	fd = linux_open ( filename, flags );
-	if ( fd < 0 ) {
-		DBGC ( pci, "PCI could not open %s: %s\n", filename,
-		       linux_strerror ( linux_errno ) );
-		rc = -ELINUX ( linux_errno );
-		goto err_open;
-	}
-
-	/* Seek to location */
-	if ( linux_lseek ( fd, where, SEEK_SET ) < 0 ) {
-		DBGC ( pci, "PCI could not seek to %s offset %#02lx: %s\n",
-		       filename, where, linux_strerror ( linux_errno ) );
-		rc = -ELINUX ( linux_errno );
-		goto err_seek;
-	}
-
-	return fd;
-
- err_seek:
-	linux_close ( fd );
- err_open:
-	return rc;
-}
-
-/**
- * Read from PCI configuration space
- *
- * @v pci		PCI device
- * @v where		Address within configuration space
- * @v value		Data buffer
- * @v len		Length to read
- * @ret rc		Return status code
- */
-int linux_pci_read ( struct pci_device *pci, unsigned long where,
-		     unsigned long *value, size_t len ) {
-	uint32_t tmp = 0;
-	int fd;
-	int check_len;
-	int rc;
-
-	/* Return "missing device" in case of error */
-	*value = -1UL;
-
-	/* Open configuration space */
-	fd = linux_pci_open ( pci, O_RDONLY, where );
-	if ( fd < 0 ) {
-		rc = fd;
-		goto err_open;
-	}
-
-	/* Read value */
-	check_len = linux_read ( fd, &tmp, len );
-	if ( check_len < 0 ) {
-		DBGC ( pci, "PCI could not read from " PCI_FMT " %#02lx+%#zx: "
-		       "%s\n", PCI_ARGS ( pci ), where, len,
-		       linux_strerror ( linux_errno ) );
-		rc = -ELINUX ( linux_errno );
-		goto err_read;
-	}
-	if ( ( size_t ) check_len != len ) {
-		DBGC ( pci, "PCI read only %#x bytes from " PCI_FMT
-		       " %#02lx+%#zx\n", check_len, PCI_ARGS ( pci ),
-		       where, len );
-		rc = -EIO;
-		goto err_read;
-	}
-
-	/* Return value */
-	*value = le32_to_cpu ( tmp );
-
-	/* Success */
-	rc = 0;
-
- err_read:
-	linux_close ( fd );
- err_open:
-	return rc;
-}
-
-/**
- * Write to PCI configuration space
- *
- * @v pci		PCI device
- * @v where		Address within configuration space
- * @v value		Value to write
- * @v len		Length of value
- * @ret rc		Return status code
- */
-int linux_pci_write ( struct pci_device *pci, unsigned long where,
-		      unsigned long value, size_t len ) {
-	uint32_t tmp;
-	int fd;
-	int check_len;
-	int rc;
-
-	/* Open configuration space */
-	fd = linux_pci_open ( pci, O_WRONLY, where );
-	if ( fd < 0 ) {
-		rc = fd;
-		goto err_open;
-	}
-
-	/* Prepare value for writing */
-	tmp = cpu_to_le32 ( value );
-	assert ( len <= sizeof ( tmp ) );
-
-	/* Write value */
-	check_len = linux_write ( fd, &tmp, len );
-	if ( check_len < 0 ) {
-		DBGC ( pci, "PCI could not write to " PCI_FMT " %#02lx+%#zx: "
-		       "%s\n", PCI_ARGS ( pci ), where, len,
-		       linux_strerror ( linux_errno ) );
-		rc = -ELINUX ( linux_errno );
-		goto err_write;
-	}
-	if ( ( size_t ) check_len != len ) {
-		DBGC ( pci, "PCI wrote only %#x bytes to " PCI_FMT
-		       " %#02lx+%#zx\n", check_len, PCI_ARGS ( pci ),
-		       where, len );
-		rc = -EIO;
-		goto err_write;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_write:
-	linux_close ( fd );
- err_open:
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_time.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_time.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_time.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_time.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,46 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Linux time source
- *
- */
-
-#include <stdint.h>
-#include <stddef.h>
-#include <errno.h>
-#include <linux_api.h>
-#include <ipxe/time.h>
-
-/**
- * Get current time in seconds
- *
- * @ret time		Time, in seconds
- */
-static time_t linux_now ( void ) {
-	struct timeval now;
-
-	linux_gettimeofday ( &now, NULL );
-	return now.tv_sec;
-}
-
-PROVIDE_TIME ( linux, time_now, linux_now );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_timer.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_timer.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_timer.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_timer.c	2012-01-06 23:49:04.000000000 +0000
@@ -18,7 +18,6 @@
 
 FILE_LICENCE(GPL2_OR_LATER);
 
-#include <stddef.h>
 #include <ipxe/timer.h>
 
 #include <linux_api.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_uaccess.c ipxe-1.0.1~lliurex1505/src/interface/linux/linux_uaccess.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/linux/linux_uaccess.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/linux/linux_uaccess.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE(GPL2_OR_LATER);
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/smbios/smbios.c ipxe-1.0.1~lliurex1505/src/interface/smbios/smbios.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/smbios/smbios.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/smbios/smbios.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -59,11 +58,10 @@
  * Find specific structure type within SMBIOS
  *
  * @v type		Structure type to search for
- * @v instance		Instance of this type of structure
  * @v structure		SMBIOS structure descriptor to fill in
  * @ret rc		Return status code
  */
-int find_smbios_structure ( unsigned int type, unsigned int instance,
+int find_smbios_structure ( unsigned int type,
 			    struct smbios_structure *structure ) {
 	unsigned int count = 0;
 	size_t offset = 0;
@@ -106,8 +104,7 @@
 		      structure->header.len, structure->strings_len );
 
 		/* If this is the structure we want, return */
-		if ( ( structure->header.type == type ) &&
-		     ( instance-- == 0 ) ) {
+		if ( structure->header.type == type ) {
 			structure->offset = offset;
 			return 0;
 		}
@@ -181,20 +178,3 @@
 	DBG ( "SMBIOS string index %d not found\n", index );
 	return -ENOENT;
 }
-
-/**
- * Get SMBIOS version
- *
- * @ret version		Version, or negative error
- */
-int smbios_version ( void ) {
-	int rc;
-
-	/* Find SMBIOS */
-	if ( ( smbios.address == UNULL ) &&
-	     ( ( rc = find_smbios ( &smbios ) ) != 0 ) )
-		return rc;
-	assert ( smbios.address != UNULL );
-
-	return smbios.version;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/interface/smbios/smbios_settings.c ipxe-1.0.1~lliurex1505/src/interface/smbios/smbios_settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/interface/smbios/smbios_settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/interface/smbios/smbios_settings.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -27,8 +26,15 @@
 #include <ipxe/uuid.h>
 #include <ipxe/smbios.h>
 
-/** SMBIOS settings scope */
-static struct settings_scope smbios_settings_scope;
+/** SMBIOS settings tag magic number */
+#define SMBIOS_TAG_MAGIC 0x5B /* "SmBios" */
+
+/**
+ * Construct SMBIOS empty tag
+ *
+ * @ret tag		SMBIOS setting tag
+ */
+#define SMBIOS_EMPTY_TAG ( SMBIOS_TAG_MAGIC << 24 )
 
 /**
  * Construct SMBIOS raw-data tag
@@ -39,7 +45,8 @@
  * @ret tag		SMBIOS setting tag
  */
 #define SMBIOS_RAW_TAG( _type, _structure, _field )		\
-	( ( (_type) << 16 ) |					\
+	( ( SMBIOS_TAG_MAGIC << 24 ) |				\
+	  ( (_type) << 16 ) |					\
 	  ( offsetof ( _structure, _field ) << 8 ) |		\
 	  ( sizeof ( ( ( _structure * ) 0 )->_field ) ) )
 
@@ -52,7 +59,8 @@
  * @ret tag		SMBIOS setting tag
  */
 #define SMBIOS_STRING_TAG( _type, _structure, _field )		\
-	( ( (_type) << 16 ) |					\
+	( ( SMBIOS_TAG_MAGIC << 24 ) |				\
+	  ( (_type) << 16 ) |					\
 	  ( offsetof ( _structure, _field ) << 8 ) )
 
 /**
@@ -64,8 +72,11 @@
  */
 static int smbios_applies ( struct settings *settings __unused,
 			    struct setting *setting ) {
+	unsigned int tag_magic;
 
-	return ( setting->scope == &smbios_settings_scope );
+	/* Check tag magic */
+	tag_magic = ( setting->tag >> 24 );
+	return ( tag_magic == SMBIOS_TAG_MAGIC );
 }
 
 /**
@@ -81,77 +92,43 @@
 			  struct setting *setting,
 			  void *data, size_t len ) {
 	struct smbios_structure structure;
-	unsigned int tag_instance;
+	unsigned int tag_magic;
 	unsigned int tag_type;
 	unsigned int tag_offset;
 	unsigned int tag_len;
 	int rc;
 
-	/* Split tag into instance, type, offset and length */
-	tag_instance = ( ( setting->tag >> 24 ) & 0xff );
+	/* Split tag into type, offset and length */
+	tag_magic = ( setting->tag >> 24 );
 	tag_type = ( ( setting->tag >> 16 ) & 0xff );
 	tag_offset = ( ( setting->tag >> 8 ) & 0xff );
 	tag_len = ( setting->tag & 0xff );
+	assert ( tag_magic == SMBIOS_TAG_MAGIC );
 
 	/* Find SMBIOS structure */
-	if ( ( rc = find_smbios_structure ( tag_type, tag_instance,
-					    &structure ) ) != 0 )
+	if ( ( rc = find_smbios_structure ( tag_type, &structure ) ) != 0 )
 		return rc;
 
 	{
 		uint8_t buf[structure.header.len];
-		const void *raw;
-		union uuid uuid;
-		unsigned int index;
 
 		/* Read SMBIOS structure */
 		if ( ( rc = read_smbios_structure ( &structure, buf,
 						    sizeof ( buf ) ) ) != 0 )
 			return rc;
 
-		/* A <length> of zero indicates that the byte at
-		 * <offset> contains a string index.  An <offset> of
-		 * zero indicates that the <length> contains a literal
-		 * string index.
-		 */
-		if ( ( tag_len == 0 ) || ( tag_offset == 0 ) ) {
-			index = ( ( tag_offset == 0 ) ?
-				  tag_len : buf[tag_offset] );
-			if ( ( rc = read_smbios_string ( &structure, index,
-							 data, len ) ) < 0 ) {
-				return rc;
-			}
-			if ( ! setting->type )
-				setting->type = &setting_type_string;
-			return rc;
-		}
-
-		/* Mangle UUIDs if necessary.  iPXE treats UUIDs as
-		 * being in network byte order (big-endian).  SMBIOS
-		 * specification version 2.6 states that UUIDs are
-		 * stored with little-endian values in the first three
-		 * fields; earlier versions did not specify an
-		 * endianness.  dmidecode assumes that the byte order
-		 * is little-endian if and only if the SMBIOS version
-		 * is 2.6 or higher; we match this behaviour.
-		 */
-		raw = &buf[tag_offset];
-		if ( ( setting->type == &setting_type_uuid ) &&
-		     ( tag_len == sizeof ( uuid ) ) &&
-		     ( smbios_version() >= SMBIOS_VERSION ( 2, 6 ) ) ) {
-			DBG ( "SMBIOS detected mangled UUID\n" );
-			memcpy ( &uuid, &buf[tag_offset], sizeof ( uuid ) );
-			uuid_mangle ( &uuid );
-			raw = &uuid;
+		if ( tag_len == 0 ) {
+			/* String */
+			return read_smbios_string ( &structure,
+						    buf[tag_offset],
+						    data, len );
+		} else {
+			/* Raw data */
+			if ( len > tag_len )
+				len = tag_len;
+			memcpy ( data, &buf[tag_offset], len );
+			return tag_len;
 		}
-
-		/* Return data */
-		if ( len > tag_len )
-			len = tag_len;
-		memcpy ( data, raw, len );
-		if ( ! setting->type )
-			setting->type = &setting_type_hex;
-		return tag_len;
 	}
 }
 
@@ -164,10 +141,10 @@
 /** SMBIOS settings */
 static struct settings smbios_settings = {
 	.refcnt = NULL,
+	.tag_magic = SMBIOS_EMPTY_TAG,
 	.siblings = LIST_HEAD_INIT ( smbios_settings.siblings ),
 	.children = LIST_HEAD_INIT ( smbios_settings.children ),
 	.op = &smbios_settings_operations,
-	.default_scope = &smbios_settings_scope,
 };
 
 /** Initialise SMBIOS settings */
@@ -194,11 +171,10 @@
 	.tag = SMBIOS_RAW_TAG ( SMBIOS_TYPE_SYSTEM_INFORMATION,
 				struct smbios_system_information, uuid ),
 	.type = &setting_type_uuid,
-	.scope = &smbios_settings_scope,
 };
 
-/** Other SMBIOS predefined settings */
-struct setting smbios_predefined_settings[] __setting ( SETTING_HOST_EXTRA ) = {
+/** Other SMBIOS named settings */
+struct setting smbios_named_settings[] __setting ( SETTING_HOST_EXTRA ) = {
 	{
 		.name = "manufacturer",
 		.description = "Manufacturer",
@@ -206,7 +182,6 @@
 					   struct smbios_system_information,
 					   manufacturer ),
 		.type = &setting_type_string,
-		.scope = &smbios_settings_scope,
 	},
 	{
 		.name = "product",
@@ -215,7 +190,6 @@
 					   struct smbios_system_information,
 					   product ),
 		.type = &setting_type_string,
-		.scope = &smbios_settings_scope,
 	},
 	{
 		.name = "serial",
@@ -224,7 +198,6 @@
 					   struct smbios_system_information,
 					   serial ),
 		.type = &setting_type_string,
-		.scope = &smbios_settings_scope,
 	},
 	{
 		.name = "asset",
@@ -233,6 +206,5 @@
 					   struct smbios_enclosure_information,
 					   asset_tag ),
 		.type = &setting_type_string,
-		.scope = &smbios_settings_scope,
 	},
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/Makefile ipxe-1.0.1~lliurex1505/src/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/src/Makefile	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/Makefile	2015-04-14 12:54:27.000000000 +0000
@@ -7,7 +7,6 @@
 CFLAGS		:=
 ASFLAGS		:=
 LDFLAGS		:=
-HOST_CFLAGS	:=
 MAKEDEPS	:= Makefile
 
 ###############################################################################
@@ -33,7 +32,6 @@
 OBJCOPY		:= $(CROSS_COMPILE)objcopy
 NM		:= $(CROSS_COMPILE)nm
 OBJDUMP		:= $(CROSS_COMPILE)objdump
-OPENSSL		:= openssl
 PARSEROM	:= ./util/parserom.pl
 FIXROM		:= ./util/fixrom.pl
 SYMCHECK	:= ./util/symcheck.pl
@@ -49,7 +47,6 @@
 EINFO		:= ./util/einfo
 GENKEYMAP	:= ./util/genkeymap.pl
 DOXYGEN		:= doxygen
-LCAB		:= lcab
 BINUTILS_DIR	:= /usr
 BFD_DIR		:= $(BINUTILS_DIR)
 ZLIB_DIR	:= /usr
@@ -61,7 +58,7 @@
 SRCDIRS		:=
 SRCDIRS		+= libgcc
 SRCDIRS		+= core
-SRCDIRS		+= net net/oncrpc net/tcp net/udp net/infiniband net/80211
+SRCDIRS		+= net net/tcp net/udp net/infiniband net/80211
 SRCDIRS		+= image
 SRCDIRS		+= drivers/bus
 SRCDIRS		+= drivers/net
@@ -76,7 +73,6 @@
 SRCDIRS		+= drivers/net/ath/ath9k
 SRCDIRS		+= drivers/net/vxge
 SRCDIRS		+= drivers/net/efi
-SRCDIRS		+= drivers/net/tg3
 SRCDIRS		+= drivers/block
 SRCDIRS		+= drivers/nvs
 SRCDIRS		+= drivers/bitbash
@@ -96,6 +92,31 @@
 #
 NON_AUTO_SRCS	:=
 NON_AUTO_SRCS	+= drivers/net/prism2.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ani.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar5008_phy.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_calib.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_hw.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_mac.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9002_phy.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_calib.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_eeprom.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_hw.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_mac.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_ar9003_phy.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_calib.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_common.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_4k.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_9287.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_eeprom_def.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_hw.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_init.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_mac.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_main.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_recv.c
+NON_AUTO_SRCS	+= drivers/net/ath/ath9k/ath9k_xmit.c
+
 
 # INCDIRS lists the include path
 #
@@ -108,7 +129,7 @@
 # helpfully suggestive message
 #
 ALL		:= bin/blib.a bin/ipxe.dsk bin/ipxe.lkrn bin/ipxe.iso \
-		   bin/ipxe.usb bin/ipxe.pxe bin/undionly.kpxe bin/rtl8139.rom
+		   bin/ipxe.usb bin/undionly.kpxe bin/rtl8139.rom
 all : $(ALL)
 	@$(ECHO) '==========================================================='
 	@$(ECHO)
@@ -144,25 +165,7 @@
 		bin-i386-efi/ipxe.efirom \
 		bin-x86_64-efi/ipxe.efi bin-x86_64-efi/ipxe.efidrv \
 		bin-x86_64-efi/ipxe.efirom \
-		bin-i386-linux/tap.linux bin-x86_64-linux/tap.linux \
-		bin-i386-linux/tests.linux bin-x86_64-linux/tests.linux
-
-###############################################################################
-#
-# VMware build target: all ROMs used with VMware
-#
-vmware : bin/8086100f.mrom bin/808610d3.mrom bin/10222000.rom bin/15ad07b0.rom
-	@$(ECHO) '==========================================================='
-	@$(ECHO) 
-	@$(ECHO) 'Available ROMs:'
-	@$(ECHO) '    bin/8086100f.mrom -- intel/e1000'
-	@$(ECHO) '    bin/808610d3.mrom -- intel/e1000e'
-	@$(ECHO) '    bin/10222000.rom  -- vlance/pcnet32'
-	@$(ECHO) '    bin/15ad07b0.rom  -- vmxnet3'
-	@$(ECHO) 
-	@$(ECHO) 'For more information, see http://ipxe.org/howto/vmware'
-	@$(ECHO)
-	@$(ECHO) '==========================================================='
+		bin-i386-linux/tap.linux bin-x86_64-linux/tap.linux
 
 ###############################################################################
 #
@@ -184,12 +187,13 @@
 EXTRAVERSION	= +
 MM_VERSION	= $(VERSION_MAJOR).$(VERSION_MINOR)
 VERSION		= $(MM_VERSION).$(VERSION_PATCH)$(EXTRAVERSION)
-GITVERSION := $(shell git describe --always --abbrev=1 --match "" 2>/dev/null)
-ifneq ($(GITVERSION),)
-VERSION		+= ($(GITVERSION))
-endif
+CFLAGS		+= -DVERSION_MAJOR=$(VERSION_MAJOR) \
+		   -DVERSION_MINOR=$(VERSION_MINOR) \
+		   -DVERSION_PATCH=$(VERSION_PATCH) \
+		   -DVERSION=\"$(VERSION)\"
+IDENT		= '$(@F) $(VERSION) (GPL) ipxe.org'
 version :
-	@$(ECHO) "$(VERSION)"
+	@$(ECHO) $(VERSION)
 
 ###############################################################################
 #
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/Makefile.housekeeping ipxe-1.0.1~lliurex1505/src/Makefile.housekeeping
--- ipxe-1.0.0+git-20131111.c3d1e78/src/Makefile.housekeeping	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/Makefile.housekeeping	2015-04-14 12:54:27.000000000 +0000
@@ -115,18 +115,6 @@
 
 ###############################################################################
 #
-# Check if $(eval ...) is available to use
-#
-
-HAVE_EVAL :=
-ifndef NO_EVAL
-$(eval HAVE_EVAL := yes)
-endif
-eval :
-	@$(ECHO) $(HAVE_EVAL)
-
-###############################################################################
-#
 # Check for various tool workarounds
 #
 
@@ -140,11 +128,6 @@
 COMMA	:= ,
 EMPTY	:=
 SPACE	:= $(EMPTY) $(EMPTY)
-HASH	:= \#
-define NEWLINE
-
-
-endef
 
 # Check for an old version of gas (binutils 2.9.1)
 #
@@ -179,12 +162,9 @@
 # output of "size".  Inhibit this.
 #
 ifeq ($(CCTYPE),gcc)
-CFI_TEST = $(CC) -fno-dwarf2-cfi-asm -fno-exceptions -fno-unwind-tables \
-		 -fno-asynchronous-unwind-tables -x c -c /dev/null \
+CFI_TEST = $(CC) -fno-dwarf2-cfi-asm -x c -c /dev/null \
 		 -o /dev/null >/dev/null 2>&1
-CFI_FLAGS := $(shell $(CFI_TEST) && \
-	       $(ECHO) '-fno-dwarf2-cfi-asm -fno-exceptions ' \
-		       '-fno-unwind-tables -fno-asynchronous-unwind-tables')
+CFI_FLAGS := $(shell $(CFI_TEST) && $(ECHO) '-fno-dwarf2-cfi-asm')
 WORKAROUND_CFLAGS += $(CFI_FLAGS)
 endif
 
@@ -219,16 +199,6 @@
 
 ###############################################################################
 #
-# Checker
-#
-ifeq ($(C),1)
-export REAL_CC := $(CC)
-CC := cgcc
-CFLAGS += -Wno-decl
-endif
-
-###############################################################################
-#
 # Set BIN according to whatever was specified on the command line as
 # the build target.
 #
@@ -411,7 +381,6 @@
 ifeq ($(CCTYPE),gcc)
 CFLAGS		+= -ffreestanding
 CFLAGS		+= -Wall -W -Wformat-nonliteral
-HOST_CFLAGS	+= -Wall -W -Wformat-nonliteral
 endif
 ifeq ($(CCTYPE),icc)
 CFLAGS		+= -fno-builtin
@@ -442,14 +411,12 @@
 CFLAGS		+= $(WORKAROUND_CFLAGS) $(EXTRA_CFLAGS)
 ASFLAGS		+= $(WORKAROUND_ASFLAGS) $(EXTRA_ASFLAGS)
 LDFLAGS		+= $(WORKAROUND_LDFLAGS) $(EXTRA_LDFLAGS)
-HOST_CFLAGS	+= -O2 -g
 
 # Inhibit -Werror if NO_WERROR is specified on make command line
 #
 ifneq ($(NO_WERROR),1)
 CFLAGS		+= -Werror
 ASFLAGS		+= --fatal-warnings
-HOST_CFLAGS	+= -Werror
 endif
 
 # Function trace recorder state in the last build.  This is needed
@@ -502,7 +469,7 @@
 
 # compiler.h is needed for our linking and debugging system
 #
-CFLAGS		+= -include include/compiler.h
+CFLAGS		+= -include compiler.h
 
 # CFLAGS for specific object types
 #
@@ -547,263 +514,84 @@
 
 DEBUG_TARGETS	+= dbg%.o c s
 
-# List of embedded images included in the last build of embedded.o.
-# This is needed in order to correctly rebuild embedded.o whenever the
-# list of objects changes.
-#
-EMBED		:= $(EMBEDDED_IMAGE) # Maintain backwards compatibility
-EMBEDDED_LIST	:= $(BIN)/.embedded.list
-ifeq ($(wildcard $(EMBEDDED_LIST)),)
-EMBED_OLD := <invalid>
-else
-EMBED_OLD := $(shell cat $(EMBEDDED_LIST))
-endif
-ifneq ($(EMBED_OLD),$(EMBED))
-$(shell $(ECHO) "$(EMBED)" > $(EMBEDDED_LIST))
-endif
-
-$(EMBEDDED_LIST) :
-
-VERYCLEANUP	+= $(EMBEDDED_LIST)
-
-EMBEDDED_FILES	:= $(subst $(COMMA), ,$(EMBED))
-EMBED_ALL	:= $(foreach i,$(call seq,1,$(words $(EMBEDDED_FILES))),\
-		     EMBED ( $(i), \"$(word $(i), $(EMBEDDED_FILES))\",\
-			     \"$(notdir $(word $(i),$(EMBEDDED_FILES)))\" ))
-
-embedded_DEPS += $(EMBEDDED_FILES) $(EMBEDDED_LIST)
-
-CFLAGS_embedded = -DEMBED_ALL="$(EMBED_ALL)"
-
-# List of trusted root certificates
-#
-TRUSTED_LIST	:= $(BIN)/.trusted.list
-ifeq ($(wildcard $(TRUSTED_LIST)),)
-TRUST_OLD := <invalid>
-else
-TRUST_OLD := $(shell cat $(TRUSTED_LIST))
-endif
-ifneq ($(TRUST_OLD),$(TRUST))
-$(shell $(ECHO) "$(TRUST)" > $(TRUSTED_LIST))
-endif
-
-$(TRUSTED_LIST) :
-
-VERYCLEANUP	+= $(TRUSTED_LIST)
-
-# Trusted root certificate fingerprints
-#
-TRUSTED_CERTS	:= $(subst $(COMMA), ,$(TRUST))
-TRUSTED_FPS	:= $(foreach CERT,$(TRUSTED_CERTS),\
-		     0x$(subst :,$(COMMA) 0x,$(lastword $(subst =, ,\
-			 $(shell $(OPENSSL) x509 -in $(CERT) -noout -sha256 \
-				 -fingerprint))))$(COMMA))
-
-rootcert_DEPS += $(TRUSTED_FILES) $(TRUSTED_LIST)
-
-CFLAGS_rootcert = $(if $(TRUSTED_FPS),-DTRUSTED="$(TRUSTED_FPS)")
-
-# (Single-element) list of client certificates
-#
-CERT_LIST := $(BIN)/.certificate.list
-ifeq ($(wildcard $(CERT_LIST)),)
-CERT_OLD := <invalid>
-else
-CERT_OLD := $(shell cat $(CERT_LIST))
-endif
-ifneq ($(CERT_OLD),$(CERT))
-$(shell $(ECHO) "$(CERT)" > $(CERT_LIST))
-endif
-
-$(CERT_LIST) :
-
-VERYCLEANUP += $(CERT_LIST)
-
-# Embedded client certificate
-#
-CERT_INC := $(BIN)/.certificate.der
-
-ifdef CERT
-$(CERT_INC) : $(CERT) $(CERT_LIST)
-	$(Q)$(OPENSSL) x509 -in $< -outform DER -out $@
-
-clientcert_DEPS += $(CERT_INC)
-endif
-
-CLEANUP += $(CERT_INC)
-
-clientcert_DEPS += $(CERT_LIST)
-
-CFLAGS_clientcert += $(if $(CERT),-DCERTIFICATE="\"$(CERT_INC)\"")
-
-# (Single-element) list of client private keys
-#
-ifdef KEY
-PRIVKEY	:= $(KEY) # Maintain backwards compatibility
-endif
-PRIVKEY_LIST := $(BIN)/.private_key.list
-ifeq ($(wildcard $(PRIVKEY_LIST)),)
-PRIVKEY_OLD := <invalid>
-else
-PRIVKEY_OLD := $(shell cat $(PRIVKEY_LIST))
-endif
-ifneq ($(PRIVKEY_OLD),$(PRIVKEY))
-$(shell $(ECHO) "$(PRIVKEY)" > $(PRIVKEY_LIST))
-endif
-
-$(PRIVKEY_LIST) :
-
-VERYCLEANUP += $(PRIVKEY_LIST)
-
-# Embedded client private key
-#
-PRIVKEY_INC := $(BIN)/.private_key.der
-
-ifdef PRIVKEY
-$(PRIVKEY_INC) : $(PRIVKEY) $(PRIVKEY_LIST)
-	$(Q)$(OPENSSL) rsa -in $< -outform DER -out $@
-
-clientcert_DEPS += $(PRIVKEY_INC)
-endif
-
-CLEANUP += $(PRIVKEY_INC)
-
-clientcert_DEPS += $(PRIVKEY_LIST)
-
-CFLAGS_clientcert += $(if $(PRIVKEY),-DPRIVATE_KEY="\"$(PRIVKEY_INC)\"")
-
-# These files use .incbin inline assembly to include a binary file.
-# Unfortunately ccache does not detect this dependency and caches
-# builds even when the binary file has changed.
-#
-$(BIN)/embedded.o : override CC := env CCACHE_DISABLE=1 $(CC)
-
-$(BIN)/clientcert.o : override CC := env CCACHE_DISABLE=1 $(CC)
-
-# Version number
-#
-CFLAGS_version += -DVERSION_MAJOR=$(VERSION_MAJOR) \
-		  -DVERSION_MINOR=$(VERSION_MINOR) \
-		  -DVERSION_PATCH=$(VERSION_PATCH) \
-		  -DVERSION="\"$(VERSION)\""
-# Make sure the version number gets updated on every git checkout
-ifneq ($(GITVERSION),)
-$(BIN)/version.o : ../.git/index
-endif
-
 # We automatically generate rules for any file mentioned in AUTO_SRCS
-# using the following set of templates.  We use $(eval ...) if
-# available, otherwise we generate separate Makefile fragments and
-# include them.
+# using the following set of templates.  It would be cleaner to use
+# $(eval ...), but this function exists only in GNU make >= 3.80.
 
 # deps_template : generate dependency list for a given source file
 #
 # $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
-#
-define deps_template_file
-$(call deps_template_parts,$(1),$(subst .,,$(suffix $(1))),$(basename $(notdir $(1))))
-endef
-#
-# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
 # $(2) is the source type (e.g. "c")
 # $(3) is the source base name (e.g. "rtl8139")
 #
-define deps_template_parts
+define deps_template
 	@$(ECHO) "  [DEPS] $(1)"
 	@$(MKDIR) -p $(BIN)/deps/$(dir $(1))
-	$(Q)$(CPP) $(CFLAGS) $(CFLAGS_$(2)) $(CFLAGS_$(3)) -DOBJECT=$(3) \
+	@$(CPP) $(CFLAGS) $(CFLAGS_$(2)) $(CFLAGS_$(3)) -DOBJECT=$(3) \
 		-Wno-error -M $(1) -MG -MP | \
-		sed 's/\.o\s*:/_DEPS +=/' > $(BIN)/deps/$(1).d
-	$(Q)$(if $(findstring drivers/,$(1)),\
-	   $(PERL) $(PARSEROM) $(1) >> $(BIN)/deps/$(1).d)
+		sed 's/\.o\s*:/_DEPS =/' > $(BIN)/deps/$(1).d
 endef
 
 # rules_template : generate rules for a given source file
 #
 # $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
-#
-define rules_template
-$(call rules_template_parts,$(1),$(subst .,,$(suffix $(1))),$(basename $(notdir $(1))))
-endef
-#
-# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
 # $(2) is the source type (e.g. "c")
 # $(3) is the source base name (e.g. "rtl8139")
 #
-define rules_template_parts
-$$(BIN)/$(3).o : $(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)
-	$$(QM)$(ECHO) "  [BUILD] $$@"
-	$$(RULE_$(2))
-BOBJS += $$(BIN)/$(3).o
-$(foreach TGT,$(DEBUG_TARGETS),$(if $(RULE_$(2)_to_$(TGT)),$(NEWLINE)$(call rules_template_target,$(1),$(2),$(3),$(TGT))))
-$$(BIN)/deps/$(1).d : $$($(3)_DEPS)
-TAGS : $$($(3)_DEPS)
-endef
-#
-# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
-# $(2) is the source type (e.g. "c")
-# $(3) is the source base name (e.g. "rtl8139")
-# $(4) is the destination type (e.g. "dbg%.o")
-#
-define rules_template_target
-$$(BIN)/$(3).$(4) : $(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)
-	$$(QM)$(ECHO) "  [BUILD] $$@"
-	$$(RULE_$(2)_to_$(4))
-$(TGT)_OBJS += $$(BIN)/$(3).$(4)
-endef
-#
-# $(1) is the full path to the source file (e.g. "drivers/net/rtl8139.c")
-#
-define rules_template_file
+define rules_template
 	@$(ECHO) "  [RULES] $(1)"
 	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
-	@$(ECHO_E) '$(subst $(NEWLINE),\n,$(call rules_template,$(1)))' \
-		 > $(BIN)/rules/$(1).r
+	@$(ECHO_E) '\n$$(BIN)/$(3).o :' \
+		 '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		 '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		 '\n\t$$(RULE_$(2))\n' \
+		 '\nBOBJS += $$(BIN)/$(3).o\n' \
+		 $(foreach TGT,$(DEBUG_TARGETS), \
+		    $(if $(RULE_$(2)_to_$(TGT)), \
+		    '\n$$(BIN)/$(3).$(TGT) :' \
+		    '$(1) $$(MAKEDEPS) $$(POST_O_DEPS) $$($(3)_DEPS)' \
+		    '\n\t$$(QM)$(ECHO) "  [BUILD] $$@"' \
+		    '\n\t$$(RULE_$(2)_to_$(TGT))\n' \
+		    '\n$(TGT)_OBJS += $$(BIN)/$(3).$(TGT)\n' ) ) \
+		 '\n$(BIN)/deps/$(1).d : $$($(3)_DEPS)\n' \
+		 '\nTAGS : $$($(3)_DEPS)\n' > $(BIN)/rules/$(1).r
+	@$(if $(findstring drivers/,$(1)),\
+	   $(PERL) $(PARSEROM) $(1) >> $(BIN)/rules/$(1).r)
 endef
 
-# Generate the dependency files
+# Rule to generate the dependency list file
 #
-$(BIN)/deps/%.d : % $(MAKEDEPS) $(PARSEROM)
-	$(call deps_template_file,$<)
+$(BIN)/deps/%.d : % $(MAKEDEPS)
+	$(call deps_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
 
-# Calculate list of dependency files
+# Calculate and include the list of dependency list files
 #
 AUTO_DEPS	= $(patsubst %,$(BIN)/deps/%.d,$(AUTO_SRCS))
-autodeps :
-	@$(ECHO) $(AUTO_DEPS)
-VERYCLEANUP	+= $(BIN)/deps
-
-# Include dependency files
-#
 ifdef NEED_DEPS
 ifneq ($(AUTO_DEPS),)
 -include $(AUTO_DEPS)
 endif
 endif
+autodeps :
+	@$(ECHO) $(AUTO_DEPS)
+VERYCLEANUP	+= $(BIN)/deps
 
-# Generate the rules files
+# Rule to generate the rules file
 #
-$(BIN)/rules/%.r : % $(MAKEDEPS)
-	$(call rules_template_file,$<)
+$(BIN)/rules/%.r : % $(MAKEDEPS) $(PARSEROM)
+	$(call rules_template,$<,$(subst .,,$(suffix $<)),$(basename $(notdir $<)))
 
-# Calculate list of rules files
+# Calculate and include the list of rules files
 #
 AUTO_RULES	= $(patsubst %,$(BIN)/rules/%.r,$(AUTO_SRCS))
-autorules :
-	@$(ECHO) $(AUTO_RULES)
-VERYCLEANUP	+= $(BIN)/rules
-
-# Evaluate rules (or include rules files)
-#
 ifdef NEED_DEPS
 ifneq ($(AUTO_RULES),)
-ifneq ($(HAVE_EVAL),)
-$(foreach SRC,$(AUTO_SRCS),$(eval $(call rules_template,$(SRC))))
-else
 -include $(AUTO_RULES)
 endif
 endif
-endif
+autorules :
+	@$(ECHO) $(AUTO_RULES)
+VERYCLEANUP	+= $(BIN)/rules
 
 # The following variables are created by the rules files
 #
@@ -815,6 +603,40 @@
 roms :
 	@$(ECHO) $(ROMS)
 
+# List of embedded images included in the last build of embedded.o.
+# This is needed in order to correctly rebuild embedded.o whenever the
+# list of objects changes.
+#
+EMBED		:= $(EMBEDDED_IMAGE) # Maintain backwards compatibility
+EMBEDDED_LIST	:= $(BIN)/.embedded.list
+ifeq ($(wildcard $(EMBEDDED_LIST)),)
+EMBED_OLD := <invalid>
+else
+EMBED_OLD := $(shell cat $(EMBEDDED_LIST))
+endif
+ifneq ($(EMBED_OLD),$(EMBED))
+$(shell $(ECHO) "$(EMBED)" > $(EMBEDDED_LIST))
+endif
+
+$(EMBEDDED_LIST) :
+
+VERYCLEANUP	+= $(EMBEDDED_LIST)
+
+EMBEDDED_FILES	:= $(subst $(COMMA), ,$(EMBED))
+EMBED_ALL	:= $(foreach i,$(call seq,1,$(words $(EMBEDDED_FILES))),\
+		     EMBED ( $(i), \"$(word $(i), $(EMBEDDED_FILES))\",\
+			     \"$(notdir $(word $(i),$(EMBEDDED_FILES)))\" ))
+
+$(BIN)/embedded.o : $(EMBEDDED_FILES) $(EMBEDDED_LIST)
+
+# This file uses .incbin inline assembly to include a binary file.
+# Unfortunately ccache does not detect this dependency and caches builds even
+# when the binary file has changed.
+#
+$(BIN)/embedded.o : override CC := env CCACHE_DISABLE=1 $(CC)
+
+CFLAGS_embedded = -DEMBED_ALL="$(EMBED_ALL)"
+
 # Generate error usage information
 #
 $(BIN)/%.einfo : $(BIN)/%.o
@@ -1011,20 +833,15 @@
 # Get licensing verdict for the specified target
 #
 define licensable_deps_list
-	$(filter-out config/local/%.h,\
-	  $(filter-out $(BIN)/.%.list,\
-	    $(call deps_list,$(1))))
+	$(filter-out config/local/%.h,$(call deps_list,$(1)))
 endef
 define unlicensed_deps_list
 	$(shell grep -L FILE_LICENCE $(call licensable_deps_list,$(1)))
 endef
 define licence_list
-	$(sort $(foreach LICENCE,\
-		 $(filter __licence__%,$(shell $(NM) $(1) | cut -d" " -f3)),\
-		 $(word 2,$(subst __, ,$(LICENCE)))))
+	$(patsubst __licence_%,%,\
+	  $(filter __licence_%,$(shell $(NM) $(1) | cut -d" " -f3)))
 endef
-$(BIN)/%.licence_list : $(BIN)/%.tmp
-	$(Q)$(ECHO) $(call licence_list,$<)
 $(BIN)/%.licence : $(BIN)/%.tmp
 	$(QM)$(ECHO) "  [LICENCE] $@"
 	$(Q)$(if $(strip $(call unlicensed_deps_list,$<)),\
@@ -1085,61 +902,36 @@
 automedia :
 	@$(ECHO) $(AUTO_MEDIA)
 
-# media_template : create media rules
+# media_template : create Makefile rules for specified media
 #
 # $(1) is the media name (e.g. "rom")
 #
 define media_template
-$(if $(filter $(1),$(AUTO_MEDIA)),$(call auto_media_template,$(1)))
-LIST_$(1) := $$(if $$(LIST_NAME_$(1)),$$($$(LIST_NAME_$(1))),$$(DRIVERS))
-ALL_$(1) = $$(foreach ITEM,$$(LIST_$(1)),$$(BIN)/$$(ITEM).$(1))
-$$(BIN)/all$(1)s : $$(ALL_$(1))
-$$(BIN)/allall : $$(BIN)/all$(1)s
-all$(1)s : $$(BIN)/all$(1)s
-allall : $$(BIN)/allall
-endef
-#
-# $(1) is the media name (e.g. "rom")
-#
-define auto_media_template
-$$(BIN)/%.$(1) : $$(BIN)/%.$(1).zbin
-	$$(QM)echo "  [FINISH] $$@"
-	$$(Q)$$(CP) $$< $$@
-	$$(Q)$$(if $$(PAD_$(1)),$$(PAD_$(1)) $$@)
-	$$(Q)$$(if $$(FINALISE_$(1)),$$(FINALISE_$(1)) $$@)
-endef
-#
-# $(1) is the media name (e.g. "rom")
-#
-define media_template_file
 	@$(ECHO) "  [MEDIARULES] $(1)"
 	@$(MKDIR) -p $(BIN)/rules/$(dir $(1))
-	@$(ECHO_E) '$(subst $(NEWLINE),\n,$(call media_template,$(1)))' \
+	@$(ECHO_E) '$$(BIN)/%.$(1) : $$(BIN)/%.$(1).zbin' \
+		  '\n\t$$(QM)$(ECHO) "  [FINISH] $$@"' \
+		  '\n\t$$(Q)$$(CP) $$< $$@' \
+		  '\n\t$$(Q)$$(PAD_$(1))' \
+		  '\n\t$$(Q)$$(FINALISE_$(1))' \
 		> $(BIN)/rules/$(1).media.r
 endef
 
-# Generate media rules files
+# Rule to generate the Makefile rules to be included
 #
 $(BIN)/rules/%.media.r : $(MAKEDEPS)
-	$(call media_template_file,$*)
+	$(call media_template,$*)
 
-# Calculate list of media rules files
+# Calculate and include the list of Makefile rules files
 #
-MEDIA_RULES		= $(patsubst %,$(BIN)/rules/%.media.r,$(MEDIA))
+MEDIA_RULES		= $(patsubst %,$(BIN)/rules/%.media.r,$(AUTO_MEDIA))
 mediarules :
 	@$(ECHO) $(MEDIA_RULES)
-
-# Evaluate media rules (or include media rules files)
-#
 ifdef NEED_DEPS
 ifneq ($(MEDIA_RULES),)
-ifneq ($(HAVE_EVAL),)
-$(foreach MEDIUM,$(MEDIA),$(eval $(call media_template,$(MEDIUM))))
-else
 -include $(MEDIA_RULES)
 endif
 endif
-endif
 
 # Wrap up binary blobs (for embedded images)
 #
@@ -1150,6 +942,18 @@
 
 BOBJS += $(patsubst payload/%.img,$(BIN)/%.o,$(wildcard payload/*.img))
 
+# The "allXXXs" targets for each suffix
+#
+allall: allroms allmroms allpxes allisos alldsks
+allroms allmroms : all%s : $(foreach ROM,$(ROMS),$(BIN)/$(ROM).%)
+allbaseroms allbasemroms : allbase%s : $(foreach ROM,$(DRIVERS),$(BIN)/$(ROM).%)
+allpxes allisos alldsks : all%s : $(foreach DRIVER,$(DRIVERS),$(BIN)/$(DRIVER).%)
+
+# Create qemu target for qemu package
+#
+QEMUS = e1000_82540 ne2k_isa pcnet32 rtl8139 virtio-net
+allqemu : $(foreach ROM,$(QEMUS),$(BIN)/$(ROM).rom)
+
 # Alias for ipxe.%
 #
 $(BIN)/etherboot.% : $(BIN)/ipxe.%
@@ -1163,13 +967,13 @@
 #
 $(NRV2B) : util/nrv2b.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) -DENCODE -DDECODE -DMAIN -DVERBOSE \
-		       -DNDEBUG -DBITSIZE=32 -DENDIAN=0 -o $@ $<
+	$(Q)$(HOST_CC) -O2 -DENCODE -DDECODE -DMAIN -DVERBOSE -DNDEBUG \
+		       -DBITSIZE=32 -DENDIAN=0 -o $@ $<
 CLEANUP	+= $(NRV2B)
 
 $(ZBIN) : util/zbin.c util/nrv2b.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) -o $@ $<
+	$(Q)$(HOST_CC) -O2 -o $@ $<
 CLEANUP += $(ZBIN)
 
 ###############################################################################
@@ -1177,25 +981,23 @@
 # The EFI image converter
 #
 ELF2EFI_CFLAGS	:= -I$(BINUTILS_DIR)/include -I$(BFD_DIR)/include \
-		   -I$(ZLIB_DIR)/include -idirafter include
-ELF2EFI_LDFLAGS	:= -L$(BINUTILS_DIR)/lib -L$(BFD_DIR)/lib -L$(ZLIB_DIR)/lib \
+		   -I$(ZLIB_DIR)/include -idirafter include \
+		   -L$(BINUTILS_DIR)/lib -L$(BFD_DIR)/lib -L$(ZLIB_DIR)/lib \
 		   -lbfd -ldl -liberty -lz -Wl,--no-warn-search-mismatch
 
 $(ELF2EFI32) : util/elf2efi.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) $(ELF2EFI_CFLAGS) -DEFI_TARGET_IA32 $< \
-		$(ELF2EFI_LDFLAGS) -o $@
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_IA32 -O2 -o $@
 CLEANUP += $(ELF2EFI32)
 
 $(ELF2EFI64) : util/elf2efi.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) $(ELF2EFI_CFLAGS) -DEFI_TARGET_X64 $< \
-		$(ELF2EFI_LDFLAGS) -o $@
+	$(Q)$(HOST_CC) $< $(ELF2EFI_CFLAGS) -DEFI_TARGET_X64 -O2 -o $@
 CLEANUP += $(ELF2EFI64)
 
 $(EFIROM) : util/efirom.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) -idirafter include -o $@ $<
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
 CLEANUP += $(EFIROM)
 
 ###############################################################################
@@ -1204,7 +1006,7 @@
 #
 $(ICCFIX) : util/iccfix.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) -idirafter include -o $@ $<
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
 CLEANUP += $(ICCFIX)
 
 ###############################################################################
@@ -1213,7 +1015,7 @@
 #
 $(EINFO) : util/einfo.c $(MAKEDEPS)
 	$(QM)$(ECHO) "  [HOSTCC] $@"
-	$(Q)$(HOST_CC) $(HOST_CFLAGS) -idirafter include -o $@ $<
+	$(Q)$(HOST_CC) -idirafter include -O2 -o $@ $<
 CLEANUP += $(EINFO)
 
 ###############################################################################
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/net80211.c ipxe-1.0.1~lliurex1505/src/net/80211/net80211.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/net80211.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/net80211.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -208,6 +207,7 @@
 	.name = "ssid",
 	.description = "Wireless SSID",
 	.type = &setting_type_string,
+	.tag = NET80211_SETTING_TAG_SSID,
 };
 
 /** Whether to use active scanning
@@ -220,6 +220,7 @@
 	.name = "active-scan",
 	.description = "Actively scan for wireless networks",
 	.type = &setting_type_int8,
+	.tag = NET80211_SETTING_TAG_ACTIVE_SCAN,
 };
 
 /** The cryptographic key to use
@@ -232,6 +233,7 @@
 	.name = "key",
 	.description = "Wireless encryption key",
 	.type = &setting_type_string,
+	.tag = NET80211_SETTING_TAG_KEY,
 };
 
 /** @} */
@@ -384,6 +386,9 @@
 
 /* ---------- 802.11 link-layer protocol ---------- */
 
+/** 802.11 broadcast MAC address */
+static u8 net80211_ll_broadcast[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
 /**
  * Determine whether a transmission rate uses ERP/OFDM
  *
@@ -599,7 +604,6 @@
 	.ntoa = eth_ntoa,
 	.mc_hash = eth_mc_hash,
 	.eth_addr = eth_eth_addr,
-	.eui64 = eth_eui64,
 	.ll_proto = htons ( ARPHRD_ETHER ),	/* "encapsulated Ethernet" */
 	.hw_addr_len = ETH_ALEN,
 	.ll_addr_len = ETH_ALEN,
@@ -758,7 +762,7 @@
 		return NULL;
 
 	netdev->ll_protocol = &net80211_ll_protocol;
-	netdev->ll_broadcast = eth_broadcast;
+	netdev->ll_broadcast = net80211_ll_broadcast;
 	netdev->max_pkt_len = IEEE80211_MAX_DATA_LEN;
 	netdev_init ( netdev, &net80211_netdev_ops );
 
@@ -1394,7 +1398,7 @@
 
 			ctx->probe = iob;
 			rc = net80211_tx_mgmt ( dev, IEEE80211_STYPE_PROBE_REQ,
-						eth_broadcast,
+						net80211_ll_broadcast,
 						iob_disown ( siob ) );
 			if ( rc ) {
 				DBGC ( dev, "802.11 %p send probe failed: "
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/rc80211.c ipxe-1.0.1~lliurex1505/src/net/80211/rc80211.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/rc80211.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/rc80211.c	2012-01-06 23:49:04.000000000 +0000
@@ -15,8 +15,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/sec80211.c ipxe-1.0.1~lliurex1505/src/net/80211/sec80211.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/sec80211.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/sec80211.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -45,8 +44,8 @@
 #define ENOTSUP_CCMP __einfo_error ( EINFO_ENOTSUP_CCMP )
 #define EINFO_ENOTSUP_CCMP __einfo_uniqify ( EINFO_ENOTSUP, \
 	( 0x10 | NET80211_CRYPT_CCMP ), "CCMP not supported" )
-#define ENOTSUP_CRYPT( crypt )			   \
-	EUNIQ ( EINFO_ENOTSUP, ( 0x10 | (crypt) ), \
+#define ENOTSUP_CRYPT( crypt )		     \
+	EUNIQ ( ENOTSUP, ( 0x10 | (crypt) ), \
 		ENOTSUP_WEP, ENOTSUP_TKIP, ENOTSUP_CCMP )
 
 /** Mapping from net80211 crypto/secprot types to RSN OUI descriptors */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wep.c ipxe-1.0.1~lliurex1505/src/net/80211/wep.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wep.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/wep.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa.c ipxe-1.0.1~lliurex1505/src/net/80211/wpa.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/wpa.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -30,11 +29,9 @@
 #include <ipxe/hmac.h>
 #include <ipxe/list.h>
 #include <ipxe/ethernet.h>
-#include <ipxe/rbg.h>
 #include <stdlib.h>
 #include <string.h>
 #include <errno.h>
-#include <byteswap.h>
 
 /** @file
  *
@@ -517,8 +514,7 @@
 	ctx->state = WPA_WORKING;
 	memcpy ( ctx->Anonce, pkt->nonce, sizeof ( ctx->Anonce ) );
 	if ( ! ctx->have_Snonce ) {
-		rbg_generate ( NULL, 0, 0, ctx->Snonce,
-			       sizeof ( ctx->Snonce ) );
+		get_random_bytes ( ctx->Snonce, sizeof ( ctx->Snonce ) );
 		ctx->have_Snonce = 1;
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_ccmp.c ipxe-1.0.1~lliurex1505/src/net/80211/wpa_ccmp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_ccmp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/wpa_ccmp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
 #include <ipxe/net80211.h>
 #include <ipxe/crypto.h>
 #include <ipxe/hmac.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_psk.c ipxe-1.0.1~lliurex1505/src/net/80211/wpa_psk.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_psk.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/wpa_psk.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
 #include <ipxe/net80211.h>
 #include <ipxe/sha1.h>
 #include <ipxe/wpa.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_tkip.c ipxe-1.0.1~lliurex1505/src/net/80211/wpa_tkip.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/80211/wpa_tkip.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/80211/wpa_tkip.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,11 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
-#include <string.h>
 #include <ipxe/net80211.h>
 #include <ipxe/crypto.h>
 #include <ipxe/hmac.h>
@@ -545,15 +543,15 @@
 static void tkip_kie_mic ( const void *kck, const void *msg, size_t len,
 			   void *mic )
 {
-	uint8_t ctx[MD5_CTX_SIZE];
+	struct md5_ctx md5;
 	u8 kckb[16];
 	size_t kck_len = 16;
 
 	memcpy ( kckb, kck, kck_len );
 
-	hmac_init ( &md5_algorithm, ctx, kckb, &kck_len );
-	hmac_update ( &md5_algorithm, ctx, msg, len );
-	hmac_final ( &md5_algorithm, ctx, kckb, &kck_len, mic );
+	hmac_init ( &md5_algorithm, &md5, kckb, &kck_len );
+	hmac_update ( &md5_algorithm, &md5, msg, len );
+	hmac_final ( &md5_algorithm, &md5, kckb, &kck_len, mic );
 }
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/aoe.c ipxe-1.0.1~lliurex1505/src/net/aoe.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/aoe.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/aoe.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/arp.c ipxe-1.0.1~lliurex1505/src/net/arp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/arp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/arp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,14 +13,12 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdint.h>
-#include <stdlib.h>
 #include <string.h>
 #include <byteswap.h>
 #include <errno.h>
@@ -28,7 +26,6 @@
 #include <ipxe/if_arp.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/netdevice.h>
-#include <ipxe/neighbour.h>
 #include <ipxe/arp.h>
 
 /** @file
@@ -41,28 +38,102 @@
  *
  */
 
+/** An ARP cache entry */
+struct arp_entry {
+	/** Network-layer protocol */
+	struct net_protocol *net_protocol;
+	/** Link-layer protocol */
+	struct ll_protocol *ll_protocol;
+	/** Network-layer address */
+	uint8_t net_addr[MAX_NET_ADDR_LEN];
+	/** Link-layer address */
+	uint8_t ll_addr[MAX_LL_ADDR_LEN];
+};
+
+/** Number of entries in the ARP cache
+ *
+ * This is a global cache, covering all network interfaces,
+ * network-layer protocols and link-layer protocols.
+ */
+#define NUM_ARP_ENTRIES 4
+
+/** The ARP cache */
+static struct arp_entry arp_table[NUM_ARP_ENTRIES];
+#define arp_table_end &arp_table[NUM_ARP_ENTRIES]
+
+static unsigned int next_new_arp_entry = 0;
+
 struct net_protocol arp_protocol __net_protocol;
 
 /**
- * Transmit ARP request
+ * Find entry in the ARP cache
+ *
+ * @v ll_protocol	Link-layer protocol
+ * @v net_protocol	Network-layer protocol
+ * @v net_addr		Network-layer address
+ * @ret arp		ARP cache entry, or NULL if not found
+ *
+ */
+static struct arp_entry *
+arp_find_entry ( struct ll_protocol *ll_protocol,
+		 struct net_protocol *net_protocol,
+		 const void *net_addr ) {
+	struct arp_entry *arp;
+
+	for ( arp = arp_table ; arp < arp_table_end ; arp++ ) {
+		if ( ( arp->ll_protocol == ll_protocol ) &&
+		     ( arp->net_protocol == net_protocol ) &&
+		     ( memcmp ( arp->net_addr, net_addr,
+				net_protocol->net_addr_len ) == 0 ) )
+			return arp;
+	}
+	return NULL;
+}
+
+/**
+ * Look up media-specific link-layer address in the ARP cache
  *
  * @v netdev		Network device
  * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v net_source	Source network-layer address
+ * @v dest_net_addr	Destination network-layer address
+ * @v source_net_addr	Source network-layer address
+ * @ret dest_ll_addr	Destination link layer address
  * @ret rc		Return status code
+ *
+ * This function will use the ARP cache to look up the link-layer
+ * address for the link-layer protocol associated with the network
+ * device and the given network-layer protocol and addresses.  If
+ * found, the destination link-layer address will be filled in in @c
+ * dest_ll_addr.
+ *
+ * If no address is found in the ARP cache, an ARP request will be
+ * transmitted on the specified network device and -ENOENT will be
+ * returned.
  */
-static int arp_tx_request ( struct net_device *netdev,
-			    struct net_protocol *net_protocol,
-			    const void *net_dest, const void *net_source ) {
+int arp_resolve ( struct net_device *netdev, struct net_protocol *net_protocol,
+		  const void *dest_net_addr, const void *source_net_addr,
+		  void *dest_ll_addr ) {
 	struct ll_protocol *ll_protocol = netdev->ll_protocol;
+	const struct arp_entry *arp;
 	struct io_buffer *iobuf;
 	struct arphdr *arphdr;
 	int rc;
 
+	/* Look for existing entry in ARP table */
+	arp = arp_find_entry ( ll_protocol, net_protocol, dest_net_addr );
+	if ( arp ) {
+		DBG ( "ARP cache hit: %s %s => %s %s\n",
+		      net_protocol->name, net_protocol->ntoa ( arp->net_addr ),
+		      ll_protocol->name, ll_protocol->ntoa ( arp->ll_addr ) );
+		memcpy ( dest_ll_addr, arp->ll_addr, ll_protocol->ll_addr_len);
+		return 0;
+	}
+	DBG ( "ARP cache miss: %s %s\n", net_protocol->name,
+	      net_protocol->ntoa ( dest_net_addr ) );
+
 	/* Allocate ARP packet */
 	iobuf = alloc_iob ( MAX_LL_HEADER_LEN + sizeof ( *arphdr ) +
-			    ( 2 * ( MAX_LL_ADDR_LEN + MAX_NET_ADDR_LEN ) ) );
+			  2 * ( MAX_LL_ADDR_LEN + MAX_NET_ADDR_LEN ) );
 	if ( ! iobuf )
 		return -ENOMEM;
 	iob_reserve ( iobuf, MAX_LL_HEADER_LEN );
@@ -77,30 +148,20 @@
 	memcpy ( iob_put ( iobuf, ll_protocol->ll_addr_len ),
 		 netdev->ll_addr, ll_protocol->ll_addr_len );
 	memcpy ( iob_put ( iobuf, net_protocol->net_addr_len ),
-		 net_source, net_protocol->net_addr_len );
+		 source_net_addr, net_protocol->net_addr_len );
 	memset ( iob_put ( iobuf, ll_protocol->ll_addr_len ),
 		 0, ll_protocol->ll_addr_len );
 	memcpy ( iob_put ( iobuf, net_protocol->net_addr_len ),
-		 net_dest, net_protocol->net_addr_len );
+		 dest_net_addr, net_protocol->net_addr_len );
 
 	/* Transmit ARP request */
 	if ( ( rc = net_tx ( iobuf, netdev, &arp_protocol,
-			     netdev->ll_broadcast, netdev->ll_addr ) ) != 0 ) {
-		DBGC ( netdev, "ARP %s %s %s could not transmit request: %s\n",
-		       netdev->name, net_protocol->name,
-		       net_protocol->ntoa ( net_dest ), strerror ( rc ) );
+			     netdev->ll_broadcast, netdev->ll_addr ) ) != 0 )
 		return rc;
-	}
 
-	return 0;
+	return -ENOENT;
 }
 
-/** ARP neighbour discovery protocol */
-struct neighbour_discovery arp_discovery = {
-	.name = "ARP",
-	.tx_request = arp_tx_request,
-};
-
 /**
  * Identify ARP protocol
  *
@@ -112,8 +173,9 @@
 	struct arp_net_protocol *arp_net_protocol;
 
 	for_each_table_entry ( arp_net_protocol, ARP_NET_PROTOCOLS ) {
-		if ( arp_net_protocol->net_protocol->net_proto == net_proto )
+		if ( arp_net_protocol->net_protocol->net_proto == net_proto ) {
 			return arp_net_protocol;
+		}
 	}
 	return NULL;
 }
@@ -126,6 +188,12 @@
  * @v ll_source		Link-layer source address
  * @v flags		Packet flags
  * @ret rc		Return status code
+ *
+ * This handles ARP requests and responses as detailed in RFC826.  The
+ * method detailed within the RFC is pretty optimised, handling
+ * requests and responses with basically a single code path and
+ * avoiding the need for extraneous ARP requests; read the RFC for
+ * details.
  */
 static int arp_rx ( struct io_buffer *iobuf, struct net_device *netdev,
 		    const void *ll_dest __unused,
@@ -135,68 +203,72 @@
 	struct arp_net_protocol *arp_net_protocol;
 	struct net_protocol *net_protocol;
 	struct ll_protocol *ll_protocol;
-	int rc;
+	struct arp_entry *arp;
+	int merge = 0;
 
 	/* Identify network-layer and link-layer protocols */
 	arp_net_protocol = arp_find_protocol ( arphdr->ar_pro );
-	if ( ! arp_net_protocol ) {
-		rc = -EPROTONOSUPPORT;
+	if ( ! arp_net_protocol )
 		goto done;
-	}
 	net_protocol = arp_net_protocol->net_protocol;
 	ll_protocol = netdev->ll_protocol;
 
 	/* Sanity checks */
 	if ( ( arphdr->ar_hrd != ll_protocol->ll_proto ) ||
 	     ( arphdr->ar_hln != ll_protocol->ll_addr_len ) ||
-	     ( arphdr->ar_pln != net_protocol->net_addr_len ) ) {
-		rc = -EINVAL;
+	     ( arphdr->ar_pln != net_protocol->net_addr_len ) )
 		goto done;
-	}
 
-	/* Update neighbour cache entry for this sender, if any */
-	neighbour_update ( netdev, net_protocol, arp_sender_pa ( arphdr ),
-			   arp_sender_ha ( arphdr ) );
-
-	/* If it's not a request, there's nothing more to do */
-	if ( arphdr->ar_op != htons ( ARPOP_REQUEST ) ) {
-		rc = 0;
-		goto done;
+	/* See if we have an entry for this sender, and update it if so */
+	arp = arp_find_entry ( ll_protocol, net_protocol,
+			       arp_sender_pa ( arphdr ) );
+	if ( arp ) {
+		memcpy ( arp->ll_addr, arp_sender_ha ( arphdr ),
+			 arphdr->ar_hln );
+		merge = 1;
+		DBG ( "ARP cache update: %s %s => %s %s\n",
+		      net_protocol->name, net_protocol->ntoa ( arp->net_addr ),
+		      ll_protocol->name, ll_protocol->ntoa ( arp->ll_addr ) );
 	}
 
 	/* See if we own the target protocol address */
-	if ( arp_net_protocol->check ( netdev, arp_target_pa ( arphdr ) ) != 0){
-		rc = 0;
+	if ( arp_net_protocol->check ( netdev, arp_target_pa ( arphdr ) ) != 0)
 		goto done;
+	
+	/* Create new ARP table entry if necessary */
+	if ( ! merge ) {
+		arp = &arp_table[next_new_arp_entry++ % NUM_ARP_ENTRIES];
+		arp->ll_protocol = ll_protocol;
+		arp->net_protocol = net_protocol;
+		memcpy ( arp->ll_addr, arp_sender_ha ( arphdr ),
+			 arphdr->ar_hln );
+		memcpy ( arp->net_addr, arp_sender_pa ( arphdr ),
+			 arphdr->ar_pln);
+		DBG ( "ARP cache add: %s %s => %s %s\n",
+		      net_protocol->name, net_protocol->ntoa ( arp->net_addr ),
+		      ll_protocol->name, ll_protocol->ntoa ( arp->ll_addr ) );
 	}
 
+	/* If it's not a request, there's nothing more to do */
+	if ( arphdr->ar_op != htons ( ARPOP_REQUEST ) )
+		goto done;
+
 	/* Change request to a reply */
-	DBGC2 ( netdev, "ARP %s %s %s reply => %s %s\n",
-		netdev->name, net_protocol->name,
-		net_protocol->ntoa ( arp_target_pa ( arphdr ) ),
-		ll_protocol->name, ll_protocol->ntoa ( netdev->ll_addr ) );
+	DBG ( "ARP reply: %s %s => %s %s\n", net_protocol->name,
+	      net_protocol->ntoa ( arp_target_pa ( arphdr ) ),
+	      ll_protocol->name, ll_protocol->ntoa ( netdev->ll_addr ) );
 	arphdr->ar_op = htons ( ARPOP_REPLY );
 	memswap ( arp_sender_ha ( arphdr ), arp_target_ha ( arphdr ),
 		 arphdr->ar_hln + arphdr->ar_pln );
 	memcpy ( arp_sender_ha ( arphdr ), netdev->ll_addr, arphdr->ar_hln );
 
 	/* Send reply */
-	if ( ( rc = net_tx ( iob_disown ( iobuf ), netdev, &arp_protocol,
-			     arp_target_ha ( arphdr ),
-			     netdev->ll_addr ) ) != 0 ) {
-		DBGC ( netdev, "ARP %s %s %s could not transmit reply: %s\n",
-		       netdev->name, net_protocol->name,
-		       net_protocol->ntoa ( arp_target_pa ( arphdr ) ),
-		       strerror ( rc ) );
-		goto done;
-	}
-
-	/* Success */
-	rc = 0;
+	net_tx ( iob_disown ( iobuf ), netdev, &arp_protocol,
+		 arp_target_ha ( arphdr ), netdev->ll_addr );
 
  done:
 	free_iob ( iobuf );
-	return rc;
+	return 0;
 }
 
 /**
@@ -211,7 +283,7 @@
 	return "<ARP>";
 }
 
-/** ARP network protocol */
+/** ARP protocol */
 struct net_protocol arp_protocol __net_protocol = {
 	.name = "ARP",
 	.net_proto = htons ( ETH_P_ARP ),
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/cachedhcp.c ipxe-1.0.1~lliurex1505/src/net/cachedhcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/cachedhcp.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/cachedhcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,77 @@
+/*
+ * Copyright (C) 2009 Joshua Oreman <oremanj@rwcr.net>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER );
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ipxe/dhcp.h>
+#include <ipxe/dhcppkt.h>
+#include <ipxe/netdevice.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/uaccess.h>
+
+/** @file
+ *
+ * Cached DHCP packet handling
+ *
+ */
+
+/**
+ * Store cached DHCPACK packet
+ *
+ * @v data		User pointer to cached DHCP packet data
+ * @v len		Length of cached DHCP packet data
+ * @ret rc		Return status code
+ *
+ * This function should be called by the architecture-specific
+ * get_cached_dhcpack() handler.
+ */
+void store_cached_dhcpack ( userptr_t data, size_t len ) {
+	struct dhcp_packet *dhcppkt;
+	struct dhcphdr *dhcphdr;
+	struct settings *parent;
+	int rc;
+
+	/* Create DHCP packet */
+	dhcppkt = zalloc ( sizeof ( *dhcppkt ) + len );
+	if ( ! dhcppkt )
+		return;
+
+	/* Fill in data for DHCP packet */
+	dhcphdr = ( ( ( void * ) dhcppkt ) + sizeof ( * dhcppkt ) );
+	copy_from_user ( dhcphdr, data, 0, len );
+	dhcppkt_init ( dhcppkt, dhcphdr, len );
+	DBG_HD ( dhcppkt->options.data, dhcppkt->options.used_len );
+
+	/* Register settings on the last opened network device.
+	 * This will have the effect of registering cached settings
+	 * with a network device when "dhcp netX" is performed for that
+	 * device, which is usually what we want.
+	 */
+	parent = netdev_settings ( last_opened_netdev() );
+	if ( ( rc = register_settings ( &dhcppkt->settings, parent,
+					DHCP_SETTINGS_NAME ) ) != 0 )
+		DBG ( "DHCP could not register cached settings: %s\n",
+		      strerror ( rc ) );
+
+	dhcppkt_put ( dhcppkt );
+
+	DBG ( "DHCP registered cached settings\n" );
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/dhcpopts.c ipxe-1.0.1~lliurex1505/src/net/dhcpopts.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/dhcpopts.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/dhcpopts.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/dhcppkt.c ipxe-1.0.1~lliurex1505/src/net/dhcppkt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/dhcppkt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/dhcppkt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -230,8 +229,7 @@
 	struct dhcp_packet *dhcppkt =
 		container_of ( settings, struct dhcp_packet, settings );
 
-	return ( ( setting->scope == NULL ) &&
-		 dhcppkt_applies ( dhcppkt, setting->tag ) );
+	return dhcppkt_applies ( dhcppkt, setting->tag );
 }
 
 /**
@@ -300,6 +298,6 @@
 	dhcpopt_init ( &dhcppkt->options, &dhcppkt->dhcphdr->options,
 		       ( len - offsetof ( struct dhcphdr, options ) ),
 		       dhcpopt_no_realloc );
-	settings_init ( &dhcppkt->settings, &dhcppkt_settings_operations,
-			&dhcppkt->refcnt, NULL );
+	settings_init ( &dhcppkt->settings,
+			&dhcppkt_settings_operations, &dhcppkt->refcnt, 0 );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/eapol.c ipxe-1.0.1~lliurex1505/src/net/eapol.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/eapol.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/eapol.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/ethernet.c ipxe-1.0.1~lliurex1505/src/net/ethernet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/ethernet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/ethernet.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -39,7 +38,7 @@
  */
 
 /** Ethernet broadcast MAC address */
-uint8_t eth_broadcast[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+static uint8_t eth_broadcast[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
 
 /**
  * Add Ethernet link-layer header
@@ -51,9 +50,9 @@
  * @v net_proto		Network-layer protocol, in network-byte order
  * @ret rc		Return status code
  */
-int eth_push ( struct net_device *netdev __unused, struct io_buffer *iobuf,
-	       const void *ll_dest, const void *ll_source,
-	       uint16_t net_proto ) {
+static int eth_push ( struct net_device *netdev __unused,
+		      struct io_buffer *iobuf, const void *ll_dest,
+		      const void *ll_source, uint16_t net_proto ) {
 	struct ethhdr *ethhdr = iob_push ( iobuf, sizeof ( *ethhdr ) );
 
 	/* Build Ethernet header */
@@ -75,9 +74,10 @@
  * @ret flags		Packet flags
  * @ret rc		Return status code
  */
-int eth_pull ( struct net_device *netdev __unused, struct io_buffer *iobuf,
-	       const void **ll_dest, const void **ll_source,
-	       uint16_t *net_proto, unsigned int *flags ) {
+static int eth_pull ( struct net_device *netdev __unused, 
+		      struct io_buffer *iobuf, const void **ll_dest,
+		      const void **ll_source, uint16_t *net_proto,
+		      unsigned int *flags ) {
 	struct ethhdr *ethhdr = iobuf->data;
 
 	/* Sanity check */
@@ -149,11 +149,6 @@
 		ll_addr_bytes[4] = net_addr_bytes[2];
 		ll_addr_bytes[5] = net_addr_bytes[3];
 		return 0;
-	case AF_INET6:
-		ll_addr_bytes[0] = 0x33;
-		ll_addr_bytes[1] = 0x33;
-		memcpy ( &ll_addr_bytes[2], &net_addr_bytes[12], 4 );
-		return 0;
 	default:
 		return -ENOTSUP;
 	}
@@ -170,21 +165,6 @@
 	return 0;
 }
 
-/**
- * Generate EUI-64 address
- *
- * @v ll_addr		Link-layer address
- * @v eui64		EUI-64 address to fill in
- * @ret rc		Return status code
- */
-int eth_eui64 ( const void *ll_addr, void *eui64 ) {
-
-	memcpy ( ( eui64 + 0 ), ( ll_addr + 0 ), 3 );
-	memcpy ( ( eui64 + 5 ), ( ll_addr + 3 ), 3 );
-	*( ( uint16_t * ) ( eui64 + 3 ) ) = htons ( 0xfffe );
-	return 0;
-}
-
 /** Ethernet protocol */
 struct ll_protocol ethernet_protocol __ll_protocol = {
 	.name		= "Ethernet",
@@ -198,7 +178,6 @@
 	.ntoa		= eth_ntoa,
 	.mc_hash	= eth_mc_hash,
 	.eth_addr	= eth_eth_addr,
-	.eui64		= eth_eui64,
 };
 
 /**
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/eth_slow.c ipxe-1.0.1~lliurex1505/src/net/eth_slow.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/eth_slow.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/eth_slow.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fakedhcp.c ipxe-1.0.1~lliurex1505/src/net/fakedhcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fakedhcp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fakedhcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fc.c ipxe-1.0.1~lliurex1505/src/net/fc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcels.c ipxe-1.0.1~lliurex1505/src/net/fcels.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcels.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fcels.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcns.c ipxe-1.0.1~lliurex1505/src/net/fcns.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcns.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fcns.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcoe.c ipxe-1.0.1~lliurex1505/src/net/fcoe.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcoe.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fcoe.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -1011,7 +1010,7 @@
 	/* Increment the timeout counter */
 	fcoe->timeouts++;
 
-	if ( vlan_can_be_trunk ( fcoe->netdev ) &&
+	if ( vlan_can_be_trunk ( fcoe->netdev ) &
 	     ! ( fcoe->flags & FCOE_VLAN_TIMED_OUT ) ) {
 
 		/* If we have already found a VLAN, send infrequent
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcp.c ipxe-1.0.1~lliurex1505/src/net/fcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fcp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/fragment.c ipxe-1.0.1~lliurex1505/src/net/fragment.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/fragment.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/fragment.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,172 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/retry.h>
-#include <ipxe/timer.h>
-#include <ipxe/fragment.h>
-
-/** @file
- *
- * Fragment reassembly
- *
- */
-
-/**
- * Expire fragment reassembly buffer
- *
- * @v timer		Retry timer
- * @v fail		Failure indicator
- */
-static void fragment_expired ( struct retry_timer *timer, int fail __unused ) {
-	struct fragment *fragment =
-		container_of ( timer, struct fragment, timer );
-
-	DBGC ( fragment, "FRAG %p expired\n", fragment );
-	free_iob ( fragment->iobuf );
-	list_del ( &fragment->list );
-	free ( fragment );
-}
-
-/**
- * Find fragment reassembly buffer
- *
- * @v fragments		Fragment reassembler
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret fragment	Fragment reassembly buffer, or NULL if not found
- */
-static struct fragment * fragment_find ( struct fragment_reassembler *fragments,
-					 struct io_buffer *iobuf,
-					 size_t hdrlen ) {
-	struct fragment *fragment;
-
-	list_for_each_entry ( fragment, &fragments->list, list ) {
-		if ( fragments->is_fragment ( fragment, iobuf, hdrlen ) )
-			return fragment;
-	}
-	return NULL;
-}
-
-/**
- * Reassemble packet
- *
- * @v fragments		Fragment reassembler
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret iobuf		Reassembled packet, or NULL
- *
- * This function takes ownership of the I/O buffer.  Note that the
- * length of the non-fragmentable portion may be modified.
- */
-struct io_buffer * fragment_reassemble ( struct fragment_reassembler *fragments,
-					 struct io_buffer *iobuf,
-					 size_t *hdrlen ) {
-	struct fragment *fragment;
-	struct io_buffer *new_iobuf;
-	size_t new_len;
-	size_t offset;
-	size_t expected_offset;
-	int more_frags;
-
-	/* Find matching fragment reassembly buffer, if any */
-	fragment = fragment_find ( fragments, iobuf, *hdrlen );
-
-	/* Drop out-of-order fragments */
-	offset = fragments->fragment_offset ( iobuf, *hdrlen );
-	expected_offset = ( fragment ? ( iob_len ( fragment->iobuf ) -
-					 fragment->hdrlen ) : 0 );
-	if ( offset != expected_offset ) {
-		DBGC ( fragment, "FRAG %p dropping out-of-sequence fragment "
-		       "[%zd,%zd), expected [%zd,...)\n", fragment, offset,
-		       ( offset + iob_len ( iobuf ) - *hdrlen ),
-		       expected_offset );
-		goto drop;
-	}
-
-	/* Create or extend fragment reassembly buffer as applicable */
-	if ( ! fragment ) {
-
-		/* Create new fragment reassembly buffer */
-		fragment = zalloc ( sizeof ( *fragment ) );
-		if ( ! fragment )
-			goto drop;
-		list_add ( &fragment->list, &fragments->list );
-		fragment->iobuf = iobuf;
-		fragment->hdrlen = *hdrlen;
-		timer_init ( &fragment->timer, fragment_expired, NULL );
-		DBGC ( fragment, "FRAG %p [0,%zd)\n", fragment,
-		       ( iob_len ( iobuf ) - *hdrlen ) );
-
-	} else {
-
-		/* Check if this is the final fragment */
-		more_frags = fragments->more_fragments ( iobuf, *hdrlen );
-		DBGC ( fragment, "FRAG %p [%zd,%zd)%s\n", fragment,
-		       offset, ( offset + iob_len ( iobuf ) - *hdrlen ),
-		       ( more_frags ? "" : " complete" ) );
-
-		/* Extend fragment reassembly buffer.  Preserve I/O
-		 * buffer headroom to allow for code which modifies
-		 * and resends the buffer (e.g. ICMP echo responses).
-		 */
-		iob_pull ( iobuf, *hdrlen );
-		new_len = ( iob_headroom ( fragment->iobuf ) +
-			    iob_len ( fragment->iobuf ) + iob_len ( iobuf ) );
-		new_iobuf = alloc_iob ( new_len );
-		if ( ! new_iobuf ) {
-			DBGC ( fragment, "FRAG %p could not extend reassembly "
-			       "buffer to %zd bytes\n", fragment, new_len );
-			goto drop;
-		}
-		iob_reserve ( new_iobuf, iob_headroom ( fragment->iobuf ) );
-		memcpy ( iob_put ( new_iobuf, iob_len ( fragment->iobuf ) ),
-			 fragment->iobuf->data, iob_len ( fragment->iobuf ) );
-		memcpy ( iob_put ( new_iobuf, iob_len ( iobuf ) ),
-			 iobuf->data, iob_len ( iobuf ) );
-		free_iob ( fragment->iobuf );
-		fragment->iobuf = new_iobuf;
-		free_iob ( iobuf );
-
-		/* Stop fragment reassembly timer */
-		stop_timer ( &fragment->timer );
-
-		/* If this is the final fragment, return it */
-		if ( ! more_frags ) {
-			iobuf = fragment->iobuf;
-			*hdrlen = fragment->hdrlen;
-			list_del ( &fragment->list );
-			free ( fragment );
-			return iobuf;
-		}
-	}
-
-	/* (Re)start fragment reassembly timer */
-	start_timer_fixed ( &fragment->timer, FRAGMENT_TIMEOUT );
-
-	return NULL;
-
- drop:
-	free_iob ( iobuf );
-	return NULL;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmp.c ipxe-1.0.1~lliurex1505/src/net/icmp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/icmp.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
+ * Copyright (C) 2009 Michael Brown <mbrown@fensystems.co.uk>.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -13,20 +13,16 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <string.h>
-#include <byteswap.h>
 #include <errno.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/in.h>
 #include <ipxe/tcpip.h>
-#include <ipxe/ping.h>
-#include <ipxe/crc32.h>
 #include <ipxe/icmp.h>
 
 /** @file
@@ -35,192 +31,73 @@
  *
  */
 
-/**
- * Identify ICMP echo protocol
- *
- * @v st_family		Address family
- * @ret echo_protocol	ICMP echo protocol, or NULL
- */
-static struct icmp_echo_protocol * icmp_echo_protocol ( sa_family_t family ) {
-	struct icmp_echo_protocol *echo_protocol;
-
-	for_each_table_entry ( echo_protocol, ICMP_ECHO_PROTOCOLS ) {
-		if ( echo_protocol->family == family )
-			return echo_protocol;
-	}
-	return NULL;
-}
-
-/**
- *
- * Determine debugging colour for ICMP debug messages
- *
- * @v st_peer		Peer address
- * @ret col		Debugging colour (for DBGC())
- */
-static uint32_t icmpcol ( struct sockaddr_tcpip *st_peer ) {
-
-	return crc32_le ( 0, st_peer, sizeof ( *st_peer ) );
-}
-
-/**
- * Transmit ICMP echo packet
- *
- * @v iobuf		I/O buffer
- * @v st_dest		Destination socket address
- * @v echo_protocol	ICMP echo protocol
- * @ret rc		Return status code
- */
-static int icmp_tx_echo ( struct io_buffer *iobuf,
-			  struct sockaddr_tcpip *st_dest,
-			  struct icmp_echo_protocol *echo_protocol ) {
-	struct icmp_echo *echo = iobuf->data;
-	int rc;
-
-	/* Set ICMP type and (re)calculate checksum */
-	echo->icmp.chksum = 0;
-	echo->icmp.chksum = tcpip_chksum ( echo, iob_len ( iobuf ) );
-
-	/* Transmit packet */
-	if ( ( rc = tcpip_tx ( iobuf, echo_protocol->tcpip_protocol, NULL,
-			       st_dest, NULL,
-			       ( echo_protocol->net_checksum ?
-				 &echo->icmp.chksum : NULL ) ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Transmit ICMP echo request
- *
- * @v iobuf		I/O buffer
- * @v st_dest		Destination socket address
- * @ret rc		Return status code
- */
-int icmp_tx_echo_request ( struct io_buffer *iobuf,
-			   struct sockaddr_tcpip *st_dest ) {
-	struct icmp_echo *echo = iobuf->data;
-	struct icmp_echo_protocol *echo_protocol;
-	int rc;
-
-	/* Identify ICMP echo protocol */
-	echo_protocol = icmp_echo_protocol ( st_dest->st_family );
-	if ( ! echo_protocol ) {
-		DBGC ( icmpcol ( st_dest ), "ICMP TX echo request unknown "
-		       "address family %d\n", st_dest->st_family );
-		free_iob ( iobuf );
-		return -ENOTSUP;
-	}
-
-	/* Set type */
-	echo->icmp.type = echo_protocol->request;
-
-	/* Transmit request */
-	DBGC ( icmpcol ( st_dest ), "ICMP TX echo request id %04x seq %04x\n",
-	       ntohs ( echo->ident ), ntohs ( echo->sequence ) );
-	if ( ( rc = icmp_tx_echo ( iobuf, st_dest, echo_protocol ) ) != 0 )
-		return rc;
-
-	return 0;
-}
+struct tcpip_protocol icmp_protocol __tcpip_protocol;
 
 /**
- * Transmit ICMP echo reply
+ * Process a received packet
  *
  * @v iobuf		I/O buffer
- * @v st_dest		Destination socket address
+ * @v st_src		Partially-filled source address
+ * @v st_dest		Partially-filled destination address
+ * @v pshdr_csum	Pseudo-header checksum
  * @ret rc		Return status code
  */
-static int icmp_tx_echo_reply ( struct io_buffer *iobuf,
-				struct sockaddr_tcpip *st_dest,
-				struct icmp_echo_protocol *echo_protocol ) {
-	struct icmp_echo *echo = iobuf->data;
-	int rc;
-
-	/* Set type */
-	echo->icmp.type = echo_protocol->reply;
-
-	/* Transmit reply */
-	DBGC ( icmpcol ( st_dest ), "ICMP TX echo reply id %04x seq %04x\n",
-	       ntohs ( echo->ident ), ntohs ( echo->sequence ) );
-	if ( ( rc = icmp_tx_echo ( iobuf, st_dest, echo_protocol ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Process a received ICMP echo request
- *
- * @v iobuf		I/O buffer
- * @v st_src		Source socket address
- * @v echo_protocol	ICMP echo protocol
- * @ret rc		Return status code
- */
-int icmp_rx_echo_request ( struct io_buffer *iobuf,
-			   struct sockaddr_tcpip *st_src,
-			   struct icmp_echo_protocol *echo_protocol ) {
-	struct icmp_echo *echo = iobuf->data;
+static int icmp_rx ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src,
+		     struct sockaddr_tcpip *st_dest,
+		     uint16_t pshdr_csum __unused ) {
+	struct icmp_header *icmp = iobuf->data;
+	size_t len = iob_len ( iobuf );
+	unsigned int csum;
 	int rc;
 
 	/* Sanity check */
-	if ( iob_len ( iobuf ) < sizeof ( *echo ) ) {
-		DBGC ( icmpcol ( st_src ), "ICMP RX echo request too short at "
-		       "%zd bytes (min %zd bytes)\n",
-		       iob_len ( iobuf ), sizeof ( *echo ) );
-		free_iob ( iobuf );
-		return -EINVAL;
+	if ( len < sizeof ( *icmp ) ) {
+		DBG ( "ICMP packet too short at %zd bytes (min %zd bytes)\n",
+		      len, sizeof ( *icmp ) );
+		rc = -EINVAL;
+		goto done;
 	}
-	DBGC ( icmpcol ( st_src ), "ICMP RX echo request id %04x seq %04x\n",
-	       ntohs ( echo->ident ), ntohs ( echo->sequence ) );
-
-	/* Transmit echo reply */
-	if ( ( rc = icmp_tx_echo_reply ( iobuf, st_src, echo_protocol ) ) != 0 )
-		return rc;
-
-	return 0;
-}
 
-/**
- * Process a received ICMP echo request
- *
- * @v iobuf		I/O buffer
- * @v st_src		Source socket address
- * @ret rc		Return status code
- */
-int icmp_rx_echo_reply ( struct io_buffer *iobuf,
-			 struct sockaddr_tcpip *st_src ) {
-	struct icmp_echo *echo = iobuf->data;
-	int rc;
+	/* Verify checksum */
+	csum = tcpip_chksum ( icmp, len );
+	if ( csum != 0 ) {
+		DBG ( "ICMP checksum incorrect (is %04x, should be 0000)\n",
+		      csum );
+		DBG_HD ( icmp, len );
+		rc = -EINVAL;
+		goto done;
+	}
 
-	/* Sanity check */
-	if ( iob_len ( iobuf ) < sizeof ( *echo ) ) {
-		DBGC ( icmpcol ( st_src ), "ICMP RX echo reply too short at "
-		       "%zd bytes (min %zd bytes)\n",
-		       iob_len ( iobuf ), sizeof ( *echo ) );
-		free_iob ( iobuf );
-		return -EINVAL;
+	/* We respond only to pings */
+	if ( icmp->type != ICMP_ECHO_REQUEST ) {
+		DBG ( "ICMP ignoring type %d\n", icmp->type );
+		rc = 0;
+		goto done;
 	}
-	DBGC ( icmpcol ( st_src ), "ICMP RX echo reply id %04x seq %04x\n",
-	       ntohs ( echo->ident ), ntohs ( echo->sequence ) );
 
-	/* Deliver to ping protocol */
-	if ( ( rc = ping_rx ( iobuf, st_src ) ) != 0 )
-		return rc;
+	DBG ( "ICMP responding to ping\n" );
 
-	return 0;
-}
+	/* Change type to response and recalculate checksum */
+	icmp->type = ICMP_ECHO_RESPONSE;
+	icmp->chksum = 0;
+	icmp->chksum = tcpip_chksum ( icmp, len );
+
+	/* Transmit the response */
+	if ( ( rc = tcpip_tx ( iob_disown ( iobuf ), &icmp_protocol, st_dest,
+			       st_src, NULL, NULL ) ) != 0 ) {
+		DBG ( "ICMP could not transmit ping response: %s\n",
+		      strerror ( rc ) );
+		goto done;
+	}
 
-/**
- * Receive ping reply (when no ping protocol is present)
- *
- * @v iobuf		I/O buffer
- * @v st_src		Source socket address
- * @ret rc		Return status code
- */
-__weak int ping_rx ( struct io_buffer *iobuf,
-		     struct sockaddr_tcpip *st_src __unused ) {
+ done:
 	free_iob ( iobuf );
-	return 0;
+	return rc;
 }
+
+/** ICMP TCP/IP protocol */
+struct tcpip_protocol icmp_protocol __tcpip_protocol = {
+	.name = "ICMP",
+	.rx = icmp_rx,
+	.tcpip_proto = IP_ICMP,
+};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmpv4.c ipxe-1.0.1~lliurex1505/src/net/icmpv4.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmpv4.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/icmpv4.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,109 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <errno.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/in.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/icmp.h>
-
-/** @file
- *
- * ICMPv4 protocol
- *
- */
-
-struct icmp_echo_protocol icmpv4_echo_protocol __icmp_echo_protocol;
-
-/**
- * Process a received packet
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v st_src		Partially-filled source address
- * @v st_dest		Partially-filled destination address
- * @v pshdr_csum	Pseudo-header checksum
- * @ret rc		Return status code
- */
-static int icmpv4_rx ( struct io_buffer *iobuf,
-		       struct net_device *netdev __unused,
-		       struct sockaddr_tcpip *st_src,
-		       struct sockaddr_tcpip *st_dest __unused,
-		       uint16_t pshdr_csum __unused ) {
-	struct icmp_header *icmp = iobuf->data;
-	size_t len = iob_len ( iobuf );
-	unsigned int csum;
-	unsigned int type;
-	int rc;
-
-	/* Sanity check */
-	if ( len < sizeof ( *icmp ) ) {
-		DBG ( "ICMP packet too short at %zd bytes (min %zd bytes)\n",
-		      len, sizeof ( *icmp ) );
-		rc = -EINVAL;
-		goto discard;
-	}
-
-	/* Verify checksum */
-	csum = tcpip_chksum ( icmp, len );
-	if ( csum != 0 ) {
-		DBG ( "ICMP checksum incorrect (is %04x, should be 0000)\n",
-		      csum );
-		DBG_HD ( icmp, len );
-		rc = -EINVAL;
-		goto discard;
-	}
-
-	/* Handle ICMP packet */
-	type = icmp->type;
-	switch ( type ) {
-	case ICMP_ECHO_REQUEST:
-		return icmp_rx_echo_request ( iobuf, st_src,
-					      &icmpv4_echo_protocol );
-	case ICMP_ECHO_REPLY:
-		return icmp_rx_echo_reply ( iobuf, st_src );
-	default:
-		DBG ( "ICMP ignoring type %d\n", type );
-		rc = 0;
-		break;
-	}
-
- discard:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/** ICMPv4 TCP/IP protocol */
-struct tcpip_protocol icmpv4_protocol __tcpip_protocol = {
-	.name = "ICMPv4",
-	.rx = icmpv4_rx,
-	.tcpip_proto = IP_ICMP,
-};
-
-/** ICMPv4 echo protocol */
-struct icmp_echo_protocol icmpv4_echo_protocol __icmp_echo_protocol = {
-	.family = AF_INET,
-	.request = ICMP_ECHO_REQUEST,
-	.reply = ICMP_ECHO_REPLY,
-	.tcpip_protocol = &icmpv4_protocol,
-	.net_checksum = 0,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmpv6.c ipxe-1.0.1~lliurex1505/src/net/icmpv6.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/icmpv6.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/icmpv6.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,179 +1,126 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
+#include <stdint.h>
 #include <string.h>
-#include <errno.h>
 #include <byteswap.h>
+#include <errno.h>
 #include <ipxe/in.h>
+#include <ipxe/ip6.h>
+#include <ipxe/if_ether.h>
 #include <ipxe/iobuf.h>
+#include <ipxe/ndp.h>
+#include <ipxe/icmp6.h>
 #include <ipxe/tcpip.h>
-#include <ipxe/ping.h>
-#include <ipxe/icmpv6.h>
-
-/** @file
- *
- * ICMPv6 protocol
- *
- */
-
-struct icmp_echo_protocol icmpv6_echo_protocol __icmp_echo_protocol;
-
-/**
- * Process received ICMPv6 echo request packet
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v sin6_dest		Destination socket address
- * @ret rc		Return status code
- */
-static int icmpv6_rx_echo_request ( struct io_buffer *iobuf,
-				    struct net_device *netdev __unused,
-				    struct sockaddr_in6 *sin6_src,
-				    struct sockaddr_in6 *sin6_dest __unused ) {
-	struct sockaddr_tcpip *st_src =
-		( ( struct sockaddr_tcpip * ) sin6_src );
-
-	return icmp_rx_echo_request ( iobuf, st_src, &icmpv6_echo_protocol );
-}
-
-/** ICMPv6 echo request handler */
-struct icmpv6_handler icmpv6_echo_request_handler __icmpv6_handler = {
-	.type = ICMPV6_ECHO_REQUEST,
-	.rx = icmpv6_rx_echo_request,
-};
+#include <ipxe/netdevice.h>
 
 /**
- * Process received ICMPv6 echo reply packet
+ * Send neighbour solicitation packet
  *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v sin6_dest		Destination socket address
- * @ret rc		Return status code
- */
-static int icmpv6_rx_echo_reply ( struct io_buffer *iobuf,
-				  struct net_device *netdev __unused,
-				  struct sockaddr_in6 *sin6_src,
-				  struct sockaddr_in6 *sin6_dest __unused ) {
-	struct sockaddr_tcpip *st_src =
-		( ( struct sockaddr_tcpip * ) sin6_src );
-
-	return icmp_rx_echo_reply ( iobuf, st_src );
+ * @v netdev	Network device
+ * @v src	Source address
+ * @v dest	Destination address
+ *
+ * This function prepares a neighbour solicitation packet and sends it to the
+ * network layer.
+ */
+int icmp6_send_solicit ( struct net_device *netdev, struct in6_addr *src __unused,
+			 struct in6_addr *dest ) {
+	union {
+		struct sockaddr_in6 sin6;
+		struct sockaddr_tcpip st;
+	} st_dest;
+	struct ll_protocol *ll_protocol = netdev->ll_protocol;
+	struct neighbour_solicit *nsolicit;
+	struct io_buffer *iobuf = alloc_iob ( sizeof ( *nsolicit ) + MIN_IOB_LEN );
+	iob_reserve ( iobuf, MAX_HDR_LEN );
+	nsolicit = iob_put ( iobuf, sizeof ( *nsolicit ) );
+
+	/* Fill up the headers */
+	memset ( nsolicit, 0, sizeof ( *nsolicit ) );
+	nsolicit->type = ICMP6_NSOLICIT;
+	nsolicit->code = 0;
+	nsolicit->target = *dest;
+	nsolicit->opt_type = 1;
+	nsolicit->opt_len = ( 2 + ll_protocol->ll_addr_len ) / 8;
+	memcpy ( nsolicit->opt_ll_addr, netdev->ll_addr,
+				netdev->ll_protocol->ll_addr_len );
+	/* Partial checksum */
+	nsolicit->csum = 0;
+	nsolicit->csum = tcpip_chksum ( nsolicit, sizeof ( *nsolicit ) );
+
+	/* Solicited multicast address */
+	st_dest.sin6.sin_family = AF_INET6;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr8[0] = 0xff;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr8[2] = 0x02;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr16[1] = 0x0000;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr32[1] = 0x00000000;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr16[4] = 0x0000;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr16[5] = 0x0001;
+	st_dest.sin6.sin6_addr.in6_u.u6_addr32[3] = dest->in6_u.u6_addr32[3];
+	st_dest.sin6.sin6_addr.in6_u.u6_addr8[13] = 0xff;
+	
+	/* Send packet over IP6 */
+	return tcpip_tx ( iobuf, &icmp6_protocol, NULL, &st_dest.st,
+			  NULL, &nsolicit->csum );
 }
 
-/** ICMPv6 echo reply handler */
-struct icmpv6_handler icmpv6_echo_reply_handler __icmpv6_handler = {
-	.type = ICMPV6_ECHO_REPLY,
-	.rx = icmpv6_rx_echo_reply,
-};
-
 /**
- * Identify ICMPv6 handler
+ * Process ICMP6 headers
  *
- * @v type		ICMPv6 type
- * @ret handler		ICMPv6 handler, or NULL if not found
- */
-static struct icmpv6_handler * icmpv6_handler ( unsigned int type ) {
-	struct icmpv6_handler *handler;
-
-	for_each_table_entry ( handler, ICMPV6_HANDLERS ) {
-		if ( handler->type == type )
-			return handler;
-	}
-	return NULL;
-}
-
-/**
- * Process a received packet
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v st_src		Partially-filled source address
- * @v st_dest		Partially-filled destination address
- * @v pshdr_csum	Pseudo-header checksum
- * @ret rc		Return status code
- */
-static int icmpv6_rx ( struct io_buffer *iobuf, struct net_device *netdev,
-		       struct sockaddr_tcpip *st_src,
-		       struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum ) {
-	struct sockaddr_in6 *sin6_src = ( ( struct sockaddr_in6 * ) st_src );
-	struct sockaddr_in6 *sin6_dest = ( ( struct sockaddr_in6 * ) st_dest );
-	struct icmp_header *icmp = iobuf->data;
-	size_t len = iob_len ( iobuf );
-	struct icmpv6_handler *handler;
-	unsigned int csum;
-	int rc;
+ * @v iobuf	I/O buffer
+ * @v st_src	Source address
+ * @v st_dest	Destination address
+ */
+static int icmp6_rx ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src,
+		      struct sockaddr_tcpip *st_dest, __unused uint16_t pshdr_csum ) {
+	struct icmp6_header *icmp6hdr = iobuf->data;
 
 	/* Sanity check */
-	if ( len < sizeof ( *icmp ) ) {
-		DBGC ( netdev, "ICMPv6 packet too short at %zd bytes (min %zd "
-		       "bytes)\n", len, sizeof ( *icmp ) );
-		rc = -EINVAL;
-		goto done;
+	if ( iob_len ( iobuf ) < sizeof ( *icmp6hdr ) ) {
+		DBG ( "Packet too short (%zd bytes)\n", iob_len ( iobuf ) );
+		free_iob ( iobuf );
+		return -EINVAL;
 	}
 
-	/* Verify checksum */
-	csum = tcpip_continue_chksum ( pshdr_csum, icmp, len );
-	if ( csum != 0 ) {
-		DBGC ( netdev, "ICMPv6 checksum incorrect (is %04x, should be "
-		       "0000)\n", csum );
-		DBGC_HDA ( netdev, 0, icmp, len );
-		rc = -EINVAL;
-		goto done;
-	}
+	/* TODO: Verify checksum */
 
-	/* Identify handler */
-	handler = icmpv6_handler ( icmp->type );
-	if ( ! handler ) {
-		DBGC ( netdev, "ICMPv6 unrecognised type %d\n", icmp->type );
-		rc = -ENOTSUP;
-		goto done;
+	/* Process the ICMP header */
+	switch ( icmp6hdr->type ) {
+	case ICMP6_NADVERT:
+		return ndp_process_advert ( iobuf, st_src, st_dest );
 	}
+	return -ENOSYS;
+}
 
-	/* Pass to handler */
-	if ( ( rc = handler->rx ( iob_disown ( iobuf ), netdev, sin6_src,
-				  sin6_dest ) ) != 0 ) {
-		DBGC ( netdev, "ICMPv6 could not handle type %d: %s\n",
-		       icmp->type, strerror ( rc ) );
-		goto done;
-	}
+#if 0
+void icmp6_test_nadvert (struct net_device *netdev, struct sockaddr_in6 *server_p, char *ll_addr) {
 
- done:
-	free_iob ( iobuf );
-	return rc;
+		struct sockaddr_in6 server;
+		memcpy ( &server, server_p, sizeof ( server ) );
+                struct io_buffer *rxiobuf = alloc_iob ( 500 );
+                iob_reserve ( rxiobuf, MAX_HDR_LEN );
+                struct neighbour_advert *nadvert = iob_put ( rxiobuf, sizeof ( *nadvert ) );
+                nadvert->type = 136;
+                nadvert->code = 0;
+                nadvert->flags = ICMP6_FLAGS_SOLICITED;
+		nadvert->csum = 0xffff;
+		nadvert->target = server.sin6_addr;
+                nadvert->opt_type = 2;
+                nadvert->opt_len = 1;
+                memcpy ( nadvert->opt_ll_addr, ll_addr, 6 );
+                struct ip6_header *ip6hdr = iob_push ( rxiobuf, sizeof ( *ip6hdr ) );
+                ip6hdr->ver_traffic_class_flow_label = htonl ( 0x60000000 );
+		ip6hdr->hop_limit = 255;
+		ip6hdr->nxt_hdr = 58;
+		ip6hdr->payload_len = htons ( sizeof ( *nadvert ) );
+                ip6hdr->src = server.sin6_addr;
+                ip6hdr->dest = server.sin6_addr;
+		hex_dump ( rxiobuf->data, iob_len ( rxiobuf ) );
+                net_rx ( rxiobuf, netdev, htons ( ETH_P_IPV6 ), ll_addr );
 }
+#endif
 
-/** ICMPv6 TCP/IP protocol */
-struct tcpip_protocol icmpv6_protocol __tcpip_protocol = {
-	.name = "ICMPv6",
-	.rx = icmpv6_rx,
-	.tcpip_proto = IP_ICMP6,
-};
-
-/** ICMPv6 echo protocol */
-struct icmp_echo_protocol icmpv6_echo_protocol __icmp_echo_protocol = {
-	.family = AF_INET6,
-	.request = ICMPV6_ECHO_REQUEST,
-	.reply = ICMPV6_ECHO_REPLY,
-	.tcpip_protocol = &icmpv6_protocol,
-	.net_checksum = 1,
+/** ICMP6 protocol */
+struct tcpip_protocol icmp6_protocol __tcpip_protocol = {
+	.name = "ICMP6",
+	.rx = icmp6_rx,
+	.tcpip_proto = IP_ICMP6, // 58
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_cm.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_cm.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_cm.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_cm.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_cmrc.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_cmrc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_cmrc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_cmrc.c	2012-01-06 23:49:04.000000000 +0000
@@ -220,15 +220,13 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector, or NULL
- * @v source		Source address vector, or NULL
+ * @v av		Address vector, or NULL
  * @v iobuf		I/O buffer
  * @v rc		Completion status code
  */
 static void ib_cmrc_complete_recv ( struct ib_device *ibdev __unused,
 				    struct ib_queue_pair *qp,
-				    struct ib_address_vector *dest __unused,
-				    struct ib_address_vector *source __unused,
+				    struct ib_address_vector *av __unused,
 				    struct io_buffer *iobuf, int rc ) {
 	struct ib_cmrc_connection *cmrc = ib_qp_get_ownerdata ( qp );
 
@@ -259,11 +257,6 @@
 	.complete_recv = ib_cmrc_complete_recv,
 };
 
-/** Infiniband CMRC queue pair operations */
-static struct ib_queue_pair_operations ib_cmrc_queue_pair_ops = {
-	.alloc_iob = alloc_iob,
-};
-
 /**
  * Send data via CMRC
  *
@@ -417,8 +410,7 @@
 
 	/* Create queue pair */
 	cmrc->qp = ib_create_qp ( ibdev, IB_QPT_RC, IB_CMRC_NUM_SEND_WQES,
-				  cmrc->cq, IB_CMRC_NUM_RECV_WQES, cmrc->cq,
-				  &ib_cmrc_queue_pair_ops );
+				  cmrc->cq, IB_CMRC_NUM_RECV_WQES, cmrc->cq );
 	if ( ! cmrc->qp ) {
 		DBGC ( cmrc, "CMRC %p could not create queue pair\n", cmrc );
 		rc = -ENOMEM;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_mcast.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_mcast.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_mcast.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_mcast.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_mi.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_mi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_mi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_mi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -112,15 +111,13 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
- * @v source		Source address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @v rc		Completion status code
  */
 static void ib_mi_complete_recv ( struct ib_device *ibdev,
 				  struct ib_queue_pair *qp,
-				  struct ib_address_vector *dest __unused,
-				  struct ib_address_vector *source,
+				  struct ib_address_vector *av,
 				  struct io_buffer *iobuf, int rc ) {
 	struct ib_mad_interface *mi = ib_qp_get_ownerdata ( qp );
 	union ib_mad *mad;
@@ -154,7 +151,7 @@
 	DBGC2_HDA ( mi, 0, mad, sizeof ( *mad ) );
 
 	/* Handle MAD */
-	if ( ( rc = ib_mi_handle ( ibdev, mi, mad, source ) ) != 0 )
+	if ( ( rc = ib_mi_handle ( ibdev, mi, mad, av ) ) != 0 )
 		goto out;
 
  out:
@@ -166,11 +163,6 @@
 	.complete_recv = ib_mi_complete_recv,
 };
 
-/** Management interface queue pair operations */
-static struct ib_queue_pair_operations ib_mi_queue_pair_ops = {
-	.alloc_iob = alloc_iob,
-};
-
 /**
  * Transmit MAD
  *
@@ -360,8 +352,7 @@
 
 	/* Create queue pair */
 	mi->qp = ib_create_qp ( ibdev, type, IB_MI_NUM_SEND_WQES, mi->cq,
-				IB_MI_NUM_RECV_WQES, mi->cq,
-				&ib_mi_queue_pair_ops );
+				IB_MI_NUM_RECV_WQES, mi->cq );
 	if ( ! mi->qp ) {
 		DBGC ( mi, "MI %p could not allocate queue pair\n", mi );
 		goto err_create_qp;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_packet.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_packet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_packet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_packet.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -42,12 +41,11 @@
  * @v iobuf		I/O buffer to contain headers
  * @v qp		Queue pair
  * @v payload_len	Payload length
- * @v dest		Destination address vector
- * @ret rc		Return status code
+ * @v av		Address vector
  */
 int ib_push ( struct ib_device *ibdev, struct io_buffer *iobuf,
 	      struct ib_queue_pair *qp, size_t payload_len,
-	      const struct ib_address_vector *dest ) {
+	      const struct ib_address_vector *av ) {
 	struct ib_local_route_header *lrh;
 	struct ib_global_route_header *grh;
 	struct ib_base_transport_header *bth;
@@ -60,8 +58,7 @@
 	unsigned int lnh;
 
 	DBGC2 ( ibdev, "IBDEV %p TX %04x:%08lx => %04x:%08lx (key %08lx)\n",
-		ibdev, ibdev->lid, qp->ext_qpn, dest->lid, dest->qpn,
-		dest->qkey );
+		ibdev, ibdev->lid, qp->ext_qpn, av->lid, av->qpn, av->qkey );
 
 	/* Calculate packet length */
 	pad_len = ( (-payload_len) & 0x3 );
@@ -73,7 +70,7 @@
 	deth = iob_push ( iobuf, sizeof ( *deth ) );
 	bth = iob_push ( iobuf, sizeof ( *bth ) );
 	grh_len = ( payload_len + iob_len ( iobuf ) - orig_iob_len );
-	grh = ( dest->gid_present ?
+	grh = ( av->gid_present ?
 		iob_push ( iobuf, sizeof ( *grh ) ) : NULL );
 	lrh = iob_push ( iobuf, sizeof ( *lrh ) );
 	lrh_len = ( payload_len + iob_len ( iobuf ) - orig_iob_len );
@@ -82,8 +79,8 @@
 	vl = ( ( qp->ext_qpn == IB_QPN_SMI ) ? IB_VL_SMP : IB_VL_DEFAULT );
 	lrh->vl__lver = ( vl << 4 );
 	lnh = ( grh ? IB_LNH_GRH : IB_LNH_BTH );
-	lrh->sl__lnh = ( ( dest->sl << 4 ) | lnh );
-	lrh->dlid = htons ( dest->lid );
+	lrh->sl__lnh = ( ( av->sl << 4 ) | lnh );
+	lrh->dlid = htons ( av->lid );
 	lrh->length = htons ( lrh_len >> 2 );
 	lrh->slid = htons ( ibdev->lid );
 
@@ -95,18 +92,18 @@
 		grh->nxthdr = IB_GRH_NXTHDR_IBA;
 		grh->hoplmt = 0;
 		memcpy ( &grh->sgid, &ibdev->gid, sizeof ( grh->sgid ) );
-		memcpy ( &grh->dgid, &dest->gid, sizeof ( grh->dgid ) );
+		memcpy ( &grh->dgid, &av->gid, sizeof ( grh->dgid ) );
 	}
 
 	/* Construct BTH */
 	bth->opcode = BTH_OPCODE_UD_SEND;
 	bth->se__m__padcnt__tver = ( pad_len << 4 );
 	bth->pkey = htons ( ibdev->pkey );
-	bth->dest_qp = htonl ( dest->qpn );
+	bth->dest_qp = htonl ( av->qpn );
 	bth->ack__psn = htonl ( ( qp->send.psn++ ) & 0xffffffUL );
 
 	/* Construct DETH */
-	deth->qkey = htonl ( dest->qkey );
+	deth->qkey = htonl ( av->qkey );
 	deth->src_qp = htonl ( qp->ext_qpn );
 
 	DBGCP_HDA ( ibdev, 0, iobuf->data,
@@ -122,14 +119,11 @@
  * @v iobuf		I/O buffer containing headers
  * @v qp		Queue pair to fill in, or NULL
  * @v payload_len	Payload length to fill in, or NULL
- * @v dest		Destination address vector to fill in
- * @v source		Source address vector to fill in
- * @ret rc		Return status code
+ * @v av		Address vector to fill in
  */
 int ib_pull ( struct ib_device *ibdev, struct io_buffer *iobuf,
 	      struct ib_queue_pair **qp, size_t *payload_len,
-	      struct ib_address_vector *dest,
-	      struct ib_address_vector *source ) {
+	      struct ib_address_vector *av ) {
 	struct ib_local_route_header *lrh;
 	struct ib_global_route_header *grh;
 	struct ib_base_transport_header *bth;
@@ -137,14 +131,15 @@
 	size_t orig_iob_len = iob_len ( iobuf );
 	unsigned int lnh;
 	size_t pad_len;
+	unsigned long qpn;
+	unsigned int lid;
 
 	/* Clear return values */
 	if ( qp )
 		*qp = NULL;
 	if ( payload_len )
 		*payload_len = 0;
-	memset ( dest, 0, sizeof ( *dest ) );
-	memset ( source, 0, sizeof ( *source ) );
+	memset ( av, 0, sizeof ( *av ) );
 
 	/* Extract LRH */
 	if ( iob_len ( iobuf ) < sizeof ( *lrh ) ) {
@@ -154,11 +149,10 @@
 	}
 	lrh = iobuf->data;
 	iob_pull ( iobuf, sizeof ( *lrh ) );
-	dest->lid = ntohs ( lrh->dlid );
-	dest->sl = ( lrh->sl__lnh >> 4 );
-	source->lid = ntohs ( lrh->slid );
-	source->sl = ( lrh->sl__lnh >> 4 );
+	av->lid = ntohs ( lrh->slid );
+	av->sl = ( lrh->sl__lnh >> 4 );
 	lnh = ( lrh->sl__lnh & 0x3 );
+	lid = ntohs ( lrh->dlid );
 
 	/* Reject unsupported packets */
 	if ( ! ( ( lnh == IB_LNH_BTH ) || ( lnh == IB_LNH_GRH ) ) ) {
@@ -176,10 +170,8 @@
 		}
 		grh = iobuf->data;
 		iob_pull ( iobuf, sizeof ( *grh ) );
-		dest->gid_present = 1;
-		memcpy ( &dest->gid, &grh->dgid, sizeof ( dest->gid ) );
-		source->gid_present = 1;
-		memcpy ( &source->gid, &grh->sgid, sizeof ( source->gid ) );
+		av->gid_present = 1;
+		memcpy ( &av->gid, &grh->sgid, sizeof ( av->gid ) );
 	} else {
 		grh = NULL;
 	}
@@ -197,7 +189,7 @@
 		       ibdev, bth->opcode );
 		return -ENOTSUP;
 	}
-	dest->qpn = ntohl ( bth->dest_qp );
+	qpn = ntohl ( bth->dest_qp );
 
 	/* Extract DETH */
 	if ( iob_len ( iobuf ) < sizeof ( *deth ) ) {
@@ -207,8 +199,8 @@
 	}
 	deth = iobuf->data;
 	iob_pull ( iobuf, sizeof ( *deth ) );
-	source->qpn = ntohl ( deth->src_qp );
-	source->qkey = ntohl ( deth->qkey );
+	av->qpn = ntohl ( deth->src_qp );
+	av->qkey = ntohl ( deth->qkey );
 
 	/* Calculate payload length, if applicable */
 	if ( payload_len ) {
@@ -220,7 +212,7 @@
 
 	/* Determine destination QP, if applicable */
 	if ( qp ) {
-		if ( IB_LID_MULTICAST ( dest->lid ) && grh ) {
+		if ( IB_LID_MULTICAST ( lid ) && grh ) {
 			if ( ! ( *qp = ib_find_qp_mgid ( ibdev, &grh->dgid ))){
 				DBGC ( ibdev, "IBDEV %p RX for unknown MGID "
 				       IB_GID_FMT "\n",
@@ -228,9 +220,9 @@
 				return -ENODEV;
 			}
 		} else {
-			if ( ! ( *qp = ib_find_qp_qpn ( ibdev, dest->qpn ) ) ) {
+			if ( ! ( *qp = ib_find_qp_qpn ( ibdev, qpn ) ) ) {
 				DBGC ( ibdev, "IBDEV %p RX for nonexistent "
-				       "QPN %lx\n", ibdev, dest->qpn );
+				       "QPN %lx\n", ibdev, qpn );
 				return -ENODEV;
 			}
 		}
@@ -238,9 +230,9 @@
 	}
 
 	DBGC2 ( ibdev, "IBDEV %p RX %04x:%08lx <= %04x:%08lx (key %08x)\n",
-		ibdev, dest->lid, ( IB_LID_MULTICAST ( dest->lid ) ?
-			      ( qp ? (*qp)->ext_qpn : -1UL ) : dest->qpn ),
-		source->lid, source->qpn, ntohl ( deth->qkey ) );
+		ibdev, lid, ( IB_LID_MULTICAST( lid ) ?
+			      ( qp ? (*qp)->ext_qpn : -1UL ) : qpn ),
+		av->lid, av->qpn, ntohl ( deth->qkey ) );
 	DBGCP_HDA ( ibdev, 0,
 		    ( iobuf->data - ( orig_iob_len - iob_len ( iobuf ) ) ),
 		    ( orig_iob_len - iob_len ( iobuf ) ) );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_pathrec.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_pathrec.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_pathrec.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_pathrec.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_sma.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_sma.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_sma.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_sma.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_smc.c ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_smc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband/ib_smc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband/ib_smc.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband.c ipxe-1.0.1~lliurex1505/src/net/infiniband.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/infiniband.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/infiniband.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -168,7 +167,6 @@
  * @v send_cq		Send completion queue
  * @v num_recv_wqes	Number of receive work queue entries
  * @v recv_cq		Receive completion queue
- * @v op		Queue pair operations
  * @ret qp		Queue pair
  *
  * The queue pair will be left in the INIT state; you must call
@@ -179,8 +177,7 @@
 				      unsigned int num_send_wqes,
 				      struct ib_completion_queue *send_cq,
 				      unsigned int num_recv_wqes,
-				      struct ib_completion_queue *recv_cq,
-				      struct ib_queue_pair_operations *op ) {
+				      struct ib_completion_queue *recv_cq ) {
 	struct ib_queue_pair *qp;
 	size_t total_size;
 	int rc;
@@ -212,7 +209,6 @@
 	qp->recv.iobufs = ( ( ( void * ) qp ) + sizeof ( *qp ) +
 			    ( num_send_wqes * sizeof ( qp->send.iobufs[0] ) ));
 	INIT_LIST_HEAD ( &qp->mgids );
-	qp->op = op;
 
 	/* Perform device-specific initialisation and get QPN */
 	if ( ( rc = ibdev->op->create_qp ( ibdev, qp ) ) != 0 ) {
@@ -263,6 +259,7 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
+ * @v av		New address vector, if applicable
  * @ret rc		Return status code
  */
 int ib_modify_qp ( struct ib_device *ibdev, struct ib_queue_pair *qp ) {
@@ -304,7 +301,7 @@
 	}
 	for ( i = 0 ; i < qp->recv.num_wqes ; i++ ) {
 		if ( ( iobuf = qp->recv.iobufs[i] ) != NULL ) {
-			ib_complete_recv ( ibdev, qp, NULL, NULL, iobuf,
+			ib_complete_recv ( ibdev, qp, NULL, iobuf,
 					   -ECANCELED );
 		}
 	}
@@ -383,14 +380,14 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector
+ * @v av		Address vector
  * @v iobuf		I/O buffer
  * @ret rc		Return status code
  */
 int ib_post_send ( struct ib_device *ibdev, struct ib_queue_pair *qp,
-		   struct ib_address_vector *dest,
+		   struct ib_address_vector *av,
 		   struct io_buffer *iobuf ) {
-	struct ib_address_vector dest_copy;
+	struct ib_address_vector av_copy;
 	int rc;
 
 	/* Check queue fill level */
@@ -401,21 +398,21 @@
 	}
 
 	/* Use default address vector if none specified */
-	if ( ! dest )
-		dest = &qp->av;
+	if ( ! av )
+		av = &qp->av;
 
 	/* Make modifiable copy of address vector */
-	memcpy ( &dest_copy, dest, sizeof ( dest_copy ) );
-	dest = &dest_copy;
+	memcpy ( &av_copy, av, sizeof ( av_copy ) );
+	av = &av_copy;
 
 	/* Fill in optional parameters in address vector */
-	if ( ! dest->qkey )
-		dest->qkey = qp->qkey;
-	if ( ! dest->rate )
-		dest->rate = IB_RATE_2_5;
+	if ( ! av->qkey )
+		av->qkey = qp->qkey;
+	if ( ! av->rate )
+		av->rate = IB_RATE_2_5;
 
 	/* Post to hardware */
-	if ( ( rc = ibdev->op->post_send ( ibdev, qp, dest, iobuf ) ) != 0 ) {
+	if ( ( rc = ibdev->op->post_send ( ibdev, qp, av, iobuf ) ) != 0 ) {
 		DBGC ( ibdev, "IBDEV %p QPN %#lx could not post send WQE: "
 		       "%s\n", ibdev, qp->qpn, strerror ( rc ) );
 		return rc;
@@ -486,19 +483,16 @@
  *
  * @v ibdev		Infiniband device
  * @v qp		Queue pair
- * @v dest		Destination address vector, or NULL
- * @v source		Source address vector, or NULL
+ * @v av		Address vector, or NULL
  * @v iobuf		I/O buffer
  * @v rc		Completion status code
  */
 void ib_complete_recv ( struct ib_device *ibdev, struct ib_queue_pair *qp,
-			struct ib_address_vector *dest,
-			struct ib_address_vector *source,
+			struct ib_address_vector *av,
 			struct io_buffer *iobuf, int rc ) {
 
 	if ( qp->recv.cq->op->complete_recv ) {
-		qp->recv.cq->op->complete_recv ( ibdev, qp, dest, source,
-						 iobuf, rc );
+		qp->recv.cq->op->complete_recv ( ibdev, qp, av, iobuf, rc );
 	} else {
 		free_iob ( iobuf );
 	}
@@ -519,7 +513,7 @@
 	while ( qp->recv.fill < qp->recv.num_wqes ) {
 
 		/* Allocate I/O buffer */
-		iobuf = qp->op->alloc_iob ( IB_MAX_PAYLOAD_SIZE );
+		iobuf = alloc_iob ( IB_MAX_PAYLOAD_SIZE );
 		if ( ! iobuf ) {
 			/* Non-fatal; we will refill on next attempt */
 			return;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/iobpad.c ipxe-1.0.1~lliurex1505/src/net/iobpad.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/iobpad.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/iobpad.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/ipv4.c ipxe-1.0.1~lliurex1505/src/net/ipv4.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/ipv4.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/ipv4.c	2012-01-06 23:49:04.000000000 +0000
@@ -14,7 +14,7 @@
 #include <ipxe/tcpip.h>
 #include <ipxe/dhcp.h>
 #include <ipxe/settings.h>
-#include <ipxe/fragment.h>
+#include <ipxe/timer.h>
 
 /** @file
  *
@@ -30,6 +30,12 @@
 /** List of IPv4 miniroutes */
 struct list_head ipv4_miniroutes = LIST_HEAD_INIT ( ipv4_miniroutes );
 
+/** List of fragment reassembly buffers */
+static LIST_HEAD ( ipv4_fragments );
+
+/** Fragment reassembly timeout */
+#define IP_FRAG_TIMEOUT ( TICKS_PER_SEC / 2 )
+
 /**
  * Add IPv4 minirouting table entry
  *
@@ -127,58 +133,130 @@
 }
 
 /**
- * Check if IPv4 fragment matches fragment reassembly buffer
+ * Expire fragment reassembly buffer
  *
- * @v fragment		Fragment reassembly buffer
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret is_fragment	Fragment matches this reassembly buffer
+ * @v timer		Retry timer
+ * @v fail		Failure indicator
  */
-static int ipv4_is_fragment ( struct fragment *fragment,
-			      struct io_buffer *iobuf,
-			      size_t hdrlen __unused ) {
-	struct iphdr *frag_iphdr = fragment->iobuf->data;
-	struct iphdr *iphdr = iobuf->data;
+static void ipv4_fragment_expired ( struct retry_timer *timer,
+				    int fail __unused ) {
+	struct ipv4_fragment *frag =
+		container_of ( timer, struct ipv4_fragment, timer );
+	struct iphdr *iphdr = frag->iobuf->data;
 
-	return ( ( iphdr->src.s_addr == frag_iphdr->src.s_addr ) &&
-		 ( iphdr->ident == frag_iphdr->ident ) );
+	DBGC ( iphdr->src, "IPv4 fragment %04x expired\n",
+	       ntohs ( iphdr->ident ) );
+	free_iob ( frag->iobuf );
+	list_del ( &frag->list );
+	free ( frag );
 }
 
 /**
- * Get IPv4 fragment offset
+ * Find matching fragment reassembly buffer
  *
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret offset		Offset
+ * @v iphdr		IPv4 header
+ * @ret frag		Fragment reassembly buffer, or NULL
  */
-static size_t ipv4_fragment_offset ( struct io_buffer *iobuf,
-				     size_t hdrlen __unused ) {
-	struct iphdr *iphdr = iobuf->data;
+static struct ipv4_fragment * ipv4_fragment ( struct iphdr *iphdr ) {
+	struct ipv4_fragment *frag;
+	struct iphdr *frag_iphdr;
+
+	list_for_each_entry ( frag, &ipv4_fragments, list ) {
+		frag_iphdr = frag->iobuf->data;
 
-	return ( ( ntohs ( iphdr->frags ) & IP_MASK_OFFSET ) << 3 );
+		if ( ( iphdr->src.s_addr == frag_iphdr->src.s_addr ) &&
+		     ( iphdr->ident == frag_iphdr->ident ) ) {
+			return frag;
+		}
+	}
+
+	return NULL;
 }
 
 /**
- * Check if more fragments exist
+ * Fragment reassembler
  *
  * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret more_frags	More fragments exist
+ * @ret iobuf		Reassembled packet, or NULL
  */
-static int ipv4_more_fragments ( struct io_buffer *iobuf,
-				 size_t hdrlen __unused ) {
+static struct io_buffer * ipv4_reassemble ( struct io_buffer *iobuf ) {
 	struct iphdr *iphdr = iobuf->data;
+	size_t offset = ( ( ntohs ( iphdr->frags ) & IP_MASK_OFFSET ) << 3 );
+	unsigned int more_frags = ( iphdr->frags & htons ( IP_MASK_MOREFRAGS ));
+	size_t hdrlen = ( ( iphdr->verhdrlen & IP_MASK_HLEN ) * 4 );
+	struct ipv4_fragment *frag;
+	size_t expected_offset;
+	struct io_buffer *new_iobuf;
+
+	/* Find matching fragment reassembly buffer, if any */
+	frag = ipv4_fragment ( iphdr );
+
+	/* Drop out-of-order fragments */
+	expected_offset = ( frag ? frag->offset : 0 );
+	if ( offset != expected_offset ) {
+		DBGC ( iphdr->src, "IPv4 dropping out-of-sequence fragment "
+		       "%04x (%zd+%zd, expected %zd)\n",
+		       ntohs ( iphdr->ident ), offset,
+		      ( iob_len ( iobuf ) - hdrlen ), expected_offset );
+		goto drop;
+	}
+
+	/* Create or extend fragment reassembly buffer as applicable */
+	if ( frag == NULL ) {
+
+		/* Create new fragment reassembly buffer */
+		frag = zalloc ( sizeof ( *frag ) );
+		if ( ! frag )
+			goto drop;
+		list_add ( &frag->list, &ipv4_fragments );
+		frag->iobuf = iobuf;
+		frag->offset = ( iob_len ( iobuf ) - hdrlen );
+		timer_init ( &frag->timer, ipv4_fragment_expired, NULL );
 
-	return ( iphdr->frags & htons ( IP_MASK_MOREFRAGS ) );
-}
+	} else {
 
-/** IPv4 fragment reassembler */
-static struct fragment_reassembler ipv4_reassembler = {
-	.list = LIST_HEAD_INIT ( ipv4_reassembler.list ),
-	.is_fragment = ipv4_is_fragment,
-	.fragment_offset = ipv4_fragment_offset,
-	.more_fragments = ipv4_more_fragments,
-};
+		/* Extend reassembly buffer */
+		iob_pull ( iobuf, hdrlen );
+		new_iobuf = alloc_iob ( iob_len ( frag->iobuf ) +
+					iob_len ( iobuf ) );
+		if ( ! new_iobuf ) {
+			DBGC ( iphdr->src, "IPv4 could not extend reassembly "
+			       "buffer to %zd bytes\n",
+			       iob_len ( frag->iobuf ) + iob_len ( iobuf ) );
+			goto drop;
+		}
+		memcpy ( iob_put ( new_iobuf, iob_len ( frag->iobuf ) ),
+			 frag->iobuf->data, iob_len ( frag->iobuf ) );
+		memcpy ( iob_put ( new_iobuf, iob_len ( iobuf ) ),
+			 iobuf->data, iob_len ( iobuf ) );
+		free_iob ( frag->iobuf );
+		frag->iobuf = new_iobuf;
+		frag->offset += iob_len ( iobuf );
+		free_iob ( iobuf );
+		iphdr = frag->iobuf->data;
+		iphdr->len = ntohs ( iob_len ( frag->iobuf ) );
+
+		/* Stop fragment reassembly timer */
+		stop_timer ( &frag->timer );
+
+		/* If this is the final fragment, return it */
+		if ( ! more_frags ) {
+			iobuf = frag->iobuf;
+			list_del ( &frag->list );
+			free ( frag );
+			return iobuf;
+		}
+	}
+
+	/* (Re)start fragment reassembly timer */
+	start_timer_fixed ( &frag->timer, IP_FRAG_TIMEOUT );
+
+	return NULL;
+
+ drop:
+	free_iob ( iobuf );
+	return NULL;
+}
 
 /**
  * Add IPv4 pseudo-header checksum to existing checksum
@@ -204,6 +282,35 @@
 }
 
 /**
+ * Determine link-layer address
+ *
+ * @v dest		IPv4 destination address
+ * @v src		IPv4 source address
+ * @v netmask		IPv4 subnet mask
+ * @v netdev		Network device
+ * @v ll_dest		Link-layer destination address buffer
+ * @ret rc		Return status code
+ */
+static int ipv4_ll_addr ( struct in_addr dest, struct in_addr src,
+			  struct in_addr netmask, struct net_device *netdev,
+			  uint8_t *ll_dest ) {
+	struct ll_protocol *ll_protocol = netdev->ll_protocol;
+
+	if ( ( ( dest.s_addr ^ INADDR_BROADCAST ) & ~netmask.s_addr ) == 0 ) {
+		/* Broadcast address */
+		memcpy ( ll_dest, netdev->ll_broadcast,
+			 ll_protocol->ll_addr_len );
+		return 0;
+	} else if ( IN_MULTICAST ( ntohl ( dest.s_addr ) ) ) {
+		return ll_protocol->mc_hash ( AF_INET, &dest, ll_dest );
+	} else {
+		/* Unicast address: resolve via ARP */
+		return arp_resolve ( netdev, &ipv4_protocol, &dest,
+				     &src, ll_dest );
+	}
+}
+
+/**
  * Transmit IP packet
  *
  * @v iobuf		I/O buffer
@@ -228,8 +335,7 @@
 	struct ipv4_miniroute *miniroute;
 	struct in_addr next_hop;
 	struct in_addr netmask = { .s_addr = 0 };
-	uint8_t ll_dest_buf[MAX_LL_ADDR_LEN];
-	const void *ll_dest;
+	uint8_t ll_dest[MAX_LL_ADDR_LEN];
 	int rc;
 
 	/* Fill up the IP header, except source address */
@@ -267,6 +373,16 @@
 			       ( ( netdev->rx_stats.bad & 0xf ) << 4 ) |
 			       ( ( netdev->rx_stats.good & 0xf ) << 0 ) );
 
+	/* Determine link-layer destination address */
+	if ( ( rc = ipv4_ll_addr ( next_hop, iphdr->src, netmask, netdev,
+				   ll_dest ) ) != 0 ) {
+		DBGC ( sin_dest->sin_addr, "IPv4 has no link-layer address for "
+		       "%s: %s\n", inet_ntoa ( next_hop ), strerror ( rc ) );
+		/* Record error for diagnosis */
+		netdev_tx_err ( netdev, iob_disown ( iobuf ), rc );
+		goto err;
+	}
+
 	/* Fix up checksums */
 	if ( trans_csum )
 		*trans_csum = ipv4_pshdr_chksum ( iobuf, *trans_csum );
@@ -279,42 +395,12 @@
 		iphdr->protocol, ntohs ( iphdr->ident ),
 		ntohs ( iphdr->chksum ) );
 
-	/* Calculate link-layer destination address, if possible */
-	if ( ( ( next_hop.s_addr ^ INADDR_BROADCAST ) & ~netmask.s_addr ) == 0){
-		/* Broadcast address */
-		ll_dest = netdev->ll_broadcast;
-	} else if ( IN_MULTICAST ( ntohl ( next_hop.s_addr ) ) ) {
-		/* Multicast address */
-		if ( ( rc = netdev->ll_protocol->mc_hash ( AF_INET, &next_hop,
-							   ll_dest_buf ) ) !=0){
-			DBGC ( sin_dest->sin_addr, "IPv4 could not hash "
-			       "multicast %s: %s\n",
-			       inet_ntoa ( next_hop ), strerror ( rc ) );
-			goto err;
-		}
-		ll_dest = ll_dest_buf;
-	} else {
-		/* Unicast address */
-		ll_dest = NULL;
-	}
-
-	/* Hand off to link layer (via ARP if applicable) */
-	if ( ll_dest ) {
-		if ( ( rc = net_tx ( iobuf, netdev, &ipv4_protocol, ll_dest,
-				     netdev->ll_addr ) ) != 0 ) {
-			DBGC ( sin_dest->sin_addr, "IPv4 could not transmit "
-			       "packet via %s: %s\n",
-			       netdev->name, strerror ( rc ) );
-			return rc;
-		}
-	} else {
-		if ( ( rc = arp_tx ( iobuf, netdev, &ipv4_protocol, &next_hop,
-				     &iphdr->src, netdev->ll_addr ) ) != 0 ) {
-			DBGC ( sin_dest->sin_addr, "IPv4 could not transmit "
-			       "packet via %s: %s\n",
-			       netdev->name, strerror ( rc ) );
-			return rc;
-		}
+	/* Hand off to link layer */
+	if ( ( rc = net_tx ( iobuf, netdev, &ipv4_protocol, ll_dest,
+			     netdev->ll_addr ) ) != 0 ) {
+		DBGC ( sin_dest->sin_addr, "IPv4 could not transmit packet "
+		       "via %s: %s\n", netdev->name, strerror ( rc ) );
+		return rc;
 	}
 
 	return 0;
@@ -330,7 +416,7 @@
  * @v netdev		Network device
  * @ret has_any_addr	Network device has any IPv4 address
  */
-int ipv4_has_any_addr ( struct net_device *netdev ) {
+static int ipv4_has_any_addr ( struct net_device *netdev ) {
 	struct ipv4_miniroute *miniroute;
 
 	list_for_each_entry ( miniroute, &ipv4_miniroutes, list ) {
@@ -448,14 +534,14 @@
 
 	/* Perform fragment reassembly if applicable */
 	if ( iphdr->frags & htons ( IP_MASK_OFFSET | IP_MASK_MOREFRAGS ) ) {
-		/* Pass the fragment to fragment_reassemble() which returns
+		/* Pass the fragment to ipv4_reassemble() which returns
 		 * either a fully reassembled I/O buffer or NULL.
 		 */
-		iobuf = fragment_reassemble ( &ipv4_reassembler, iobuf,
-					      &hdrlen );
+		iobuf = ipv4_reassemble ( iobuf );
 		if ( ! iobuf )
 			return 0;
 		iphdr = iobuf->data;
+		hdrlen = ( ( iphdr->verhdrlen & IP_MASK_HLEN ) * 4 );
 	}
 
 	/* Construct socket addresses, calculate pseudo-header
@@ -469,7 +555,7 @@
 	dest.sin.sin_addr = iphdr->dest;
 	pshdr_csum = ipv4_pshdr_chksum ( iobuf, TCPIP_EMPTY_CSUM );
 	iob_pull ( iobuf, hdrlen );
-	if ( ( rc = tcpip_rx ( iobuf, netdev, iphdr->protocol, &src.st,
+	if ( ( rc = tcpip_rx ( iobuf, iphdr->protocol, &src.st,
 			       &dest.st, pshdr_csum ) ) != 0 ) {
 		DBGC ( src.sin.sin_addr, "IPv4 received packet rejected by "
 		       "stack: %s\n", strerror ( rc ) );
@@ -524,36 +610,6 @@
 	return inet_ntoa ( * ( ( struct in_addr * ) net_addr ) );
 }
 
-/**
- * Transcribe IPv4 socket address
- *
- * @v sa		Socket address
- * @ret string		Socket address in standard notation
- */
-static const char * ipv4_sock_ntoa ( struct sockaddr *sa ) {
-	struct sockaddr_in *sin = ( ( struct sockaddr_in * ) sa );
-
-	return inet_ntoa ( sin->sin_addr );
-}
-
-/**
- * Parse IPv4 socket address
- *
- * @v string		Socket address string
- * @v sa		Socket address to fill in
- * @ret rc		Return status code
- */
-static int ipv4_sock_aton ( const char *string, struct sockaddr *sa ) {
-	struct sockaddr_in *sin = ( ( struct sockaddr_in * ) sa );
-	struct in_addr in;
-
-	if ( inet_aton ( string, &in ) ) {
-		sin->sin_addr = in;
-		return 0;
-	}
-	return -EINVAL;
-}
-
 /** IPv4 protocol */
 struct net_protocol ipv4_protocol __net_protocol = {
 	.name = "IP",
@@ -576,13 +632,6 @@
 	.check = ipv4_arp_check,
 };
 
-/** IPv4 socket address converter */
-struct sockaddr_converter ipv4_sockaddr_converter __sockaddr_converter = {
-	.family = AF_INET,
-	.ntoa = ipv4_sock_ntoa,
-	.aton = ipv4_sock_aton,
-};
-
 /******************************************************************************
  *
  * Settings
@@ -669,5 +718,5 @@
 	.apply = ipv4_create_routes,
 };
 
-/* Drag in ICMPv4 */
-REQUIRE_OBJECT ( icmpv4 );
+/* Drag in ICMP */
+REQUIRE_OBJECT ( icmp );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/ipv6.c ipxe-1.0.1~lliurex1505/src/net/ipv6.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/ipv6.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/ipv6.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,162 +1,76 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
+#include <errno.h>
 #include <stdint.h>
-#include <stdio.h>
-#include <stdlib.h>
 #include <string.h>
-#include <errno.h>
-#include <assert.h>
+#include <stdlib.h>
+#include <stdio.h>
 #include <byteswap.h>
-#include <ipxe/iobuf.h>
+#include <ipxe/in.h>
+#include <ipxe/ip6.h>
+#include <ipxe/ndp.h>
+#include <ipxe/list.h>
+#include <ipxe/icmp6.h>
 #include <ipxe/tcpip.h>
+#include <ipxe/socket.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/netdevice.h>
 #include <ipxe/if_ether.h>
-#include <ipxe/crc32.h>
-#include <ipxe/fragment.h>
-#include <ipxe/ndp.h>
-#include <ipxe/ipv6.h>
-
-/** @file
- *
- * IPv6 protocol
- *
- */
 
-/* Disambiguate the various error causes */
-#define EINVAL_LEN __einfo_error ( EINFO_EINVAL_LEN )
-#define EINFO_EINVAL_LEN \
-	__einfo_uniqify ( EINFO_EINVAL, 0x01, "Invalid length" )
-#define ENOTSUP_VER __einfo_error ( EINFO_ENOTSUP_VER )
-#define EINFO_ENOTSUP_VER \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01, "Unsupported version" )
-#define ENOTSUP_HDR __einfo_error ( EINFO_ENOTSUP_HDR )
-#define EINFO_ENOTSUP_HDR \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x02, "Unsupported header type" )
-#define ENOTSUP_OPT __einfo_error ( EINFO_ENOTSUP_OPT )
-#define EINFO_ENOTSUP_OPT \
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x03, "Unsupported option" )
-
-/** List of IPv6 miniroutes */
-struct list_head ipv6_miniroutes = LIST_HEAD_INIT ( ipv6_miniroutes );
+/* Unspecified IP6 address */
+static struct in6_addr ip6_none = {
+        .in6_u.u6_addr32 = { 0,0,0,0 }
+};
 
-/**
- * Determine debugging colour for IPv6 debug messages
- *
- * @v in		IPv6 address
- * @ret col		Debugging colour (for DBGC())
- */
-static uint32_t ipv6col ( struct in6_addr *in ) {
-	return crc32_le ( 0, in, sizeof ( *in ) );
-}
+/** An IPv6 routing table entry */
+struct ipv6_miniroute {
+	/* List of miniroutes */
+	struct list_head list;
 
-/**
- * Check if network device has a specific IPv6 address
- *
- * @v netdev		Network device
- * @v addr		IPv6 address
- * @ret has_addr	Network device has this IPv6 address
- */
-int ipv6_has_addr ( struct net_device *netdev, struct in6_addr *addr ) {
-	struct ipv6_miniroute *miniroute;
+	/* Network device */
+	struct net_device *netdev;
 
-	list_for_each_entry ( miniroute, &ipv6_miniroutes, list ) {
-		if ( ( miniroute->netdev == netdev ) &&
-		     ( memcmp ( &miniroute->address, addr,
-				sizeof ( miniroute->address ) ) == 0 ) ) {
-			/* Found matching address */
-			return 1;
-		}
-	}
-	return 0;
-}
+	/* Destination prefix */
+	struct in6_addr prefix;
+	/* Prefix length */
+	int prefix_len;
+	/* IPv6 address of interface */
+	struct in6_addr address;
+	/* Gateway address */
+	struct in6_addr gateway;
+};
 
-/**
- * Check if IPv6 address is within a routing table entry's local network
- *
- * @v miniroute		Routing table entry
- * @v address		IPv6 address
- * @ret is_on_link	Address is within this entry's local network
- */
-static int ipv6_is_on_link ( struct ipv6_miniroute *miniroute,
-			     struct in6_addr *address ) {
-	unsigned int i;
-
-	for ( i = 0 ; i < ( sizeof ( address->s6_addr32 ) /
-			    sizeof ( address->s6_addr32[0] ) ) ; i++ ) {
-		if ( (( address->s6_addr32[i] ^ miniroute->address.s6_addr32[i])
-		      & miniroute->prefix_mask.s6_addr32[i] ) != 0 )
-			return 0;
-	}
-	return 1;
-}
+/** List of IPv6 miniroutes */
+static LIST_HEAD ( miniroutes );
 
 /**
  * Add IPv6 minirouting table entry
  *
  * @v netdev		Network device
- * @v address		IPv6 address
- * @v prefix_len	Prefix length
- * @v router		Router address (or NULL)
- * @ret miniroute	Routing table entry, or NULL on failure
- */
-static struct ipv6_miniroute * __malloc
-add_ipv6_miniroute ( struct net_device *netdev, struct in6_addr *address,
-		     unsigned int prefix_len, struct in6_addr *router ) {
+ * @v prefix		Destination prefix
+ * @v address		Address of the interface
+ * @v gateway		Gateway address (or ::0 for no gateway)
+ * @ret miniroute	Routing table entry, or NULL
+ */
+static struct ipv6_miniroute * __malloc 
+add_ipv6_miniroute ( struct net_device *netdev, struct in6_addr prefix,
+		     int prefix_len, struct in6_addr address,
+		     struct in6_addr gateway ) {
 	struct ipv6_miniroute *miniroute;
-	uint8_t *prefix_mask;
-
-	DBGC ( netdev, "IPv6 add %s/%d ", inet6_ntoa ( address ), prefix_len );
-	if ( router )
-		DBGC ( netdev, "router %s ", inet6_ntoa ( router ) );
-	DBGC ( netdev, "via %s\n", netdev->name );
-
-	/* Allocate and populate miniroute structure */
-	miniroute = zalloc ( sizeof ( *miniroute ) );
-	if ( ! miniroute )
-		return NULL;
-
-	/* Record routing information */
-	miniroute->netdev = netdev_get ( netdev );
-	memcpy ( &miniroute->address, address, sizeof ( miniroute->address ) );
-	miniroute->prefix_len = prefix_len;
-	assert ( prefix_len <= ( 8 * sizeof ( miniroute->prefix_mask ) ) );
-	for ( prefix_mask = miniroute->prefix_mask.s6_addr ; prefix_len >= 8 ;
-	      prefix_mask++, prefix_len -= 8 ) {
-		*prefix_mask = 0xff;
-	}
-	if ( prefix_len )
-		*prefix_mask <<= ( 8 - prefix_len );
-	if ( router ) {
-		miniroute->has_router = 1;
-		memcpy ( &miniroute->router, router,
-			 sizeof ( miniroute->router ) );
-	}
-
-	/* Add to end of list if we have a gateway, otherwise to start
-	 * of list.
-	 */
-	if ( router ) {
-		list_add_tail ( &miniroute->list, &ipv6_miniroutes );
-	} else {
-		list_add ( &miniroute->list, &ipv6_miniroutes );
+	
+	miniroute = malloc ( sizeof ( *miniroute ) );
+	if ( miniroute ) {
+		/* Record routing information */
+		miniroute->netdev = netdev_get ( netdev );
+		miniroute->prefix = prefix;
+		miniroute->prefix_len = prefix_len;
+		miniroute->address = address;
+		miniroute->gateway = gateway;
+		
+		/* Add miniroute to list of miniroutes */
+		if ( !IP6_EQUAL ( gateway, ip6_none ) ) {
+			list_add_tail ( &miniroute->list, &miniroutes );
+		} else {
+			list_add ( &miniroute->list, &miniroutes );
+		}
 	}
 
 	return miniroute;
@@ -168,679 +82,289 @@
  * @v miniroute		Routing table entry
  */
 static void del_ipv6_miniroute ( struct ipv6_miniroute *miniroute ) {
-	struct net_device *netdev = miniroute->netdev;
-
-	DBGC ( netdev, "IPv6 del %s/%d ", inet6_ntoa ( &miniroute->address ),
-	       miniroute->prefix_len );
-	if ( miniroute->has_router )
-		DBGC ( netdev, "router %s ", inet6_ntoa ( &miniroute->router ));
-	DBGC ( netdev, "via %s\n", netdev->name );
-
 	netdev_put ( miniroute->netdev );
 	list_del ( &miniroute->list );
 	free ( miniroute );
 }
 
 /**
- * Perform IPv6 routing
+ * Add IPv6 interface
  *
- * @v scope_id		Destination address scope ID (for link-local addresses)
- * @v dest		Final destination address
- * @ret dest		Next hop destination address
- * @ret miniroute	Routing table entry to use, or NULL if no route
- */
-static struct ipv6_miniroute * ipv6_route ( unsigned int scope_id,
-					    struct in6_addr **dest ) {
+ * @v netdev	Network device
+ * @v prefix	Destination prefix
+ * @v address	Address of the interface
+ * @v gateway	Gateway address (or ::0 for no gateway)
+ */
+int add_ipv6_address ( struct net_device *netdev, struct in6_addr prefix,
+		       int prefix_len, struct in6_addr address,
+		       struct in6_addr gateway ) {
 	struct ipv6_miniroute *miniroute;
 
-	/* Find first usable route in routing table */
-	list_for_each_entry ( miniroute, &ipv6_miniroutes, list ) {
-
-		/* Skip closed network devices */
-		if ( ! netdev_is_open ( miniroute->netdev ) )
-			continue;
-
-		if ( IN6_IS_ADDR_LINKLOCAL ( *dest ) ||
-		     IN6_IS_ADDR_MULTICAST ( *dest ) ) {
-
-			/* If destination is non-global, and the scope ID
-			 * matches this network device, then use this route.
-			 */
-			if ( miniroute->netdev->index == scope_id )
-				return miniroute;
-
-		} else {
+	/* Clear any existing address for this net device */
+	del_ipv6_address ( netdev );
 
-			/* If destination is an on-link global
-			 * address, then use this route.
-			 */
-			if ( ipv6_is_on_link ( miniroute, *dest ) )
-				return miniroute;
-
-			/* If destination is an off-link global
-			 * address, and we have a default gateway,
-			 * then use this route.
-			 */
-			if ( miniroute->has_router ) {
-				*dest = &miniroute->router;
-				return miniroute;
-			}
-		}
-	}
+	/* Add new miniroute */
+	miniroute = add_ipv6_miniroute ( netdev, prefix, prefix_len, address,
+					 gateway );
+	if ( ! miniroute )
+		return -ENOMEM;
 
-	return NULL;
+	return 0;
 }
 
 /**
- * Check that received options can be safely ignored
+ * Remove IPv6 interface
  *
- * @v iphdr		IPv6 header
- * @v options		Options extension header
- * @v len		Maximum length of header
- * @ret rc		Return status code
+ * @v netdev	Network device
  */
-static int ipv6_check_options ( struct ipv6_header *iphdr,
-				struct ipv6_options_header *options,
-				size_t len ) {
-	struct ipv6_option *option = options->options;
-	struct ipv6_option *end = ( ( ( void * ) options ) + len );
-
-	while ( option < end ) {
-		if ( ! IPV6_CAN_IGNORE_OPT ( option->type ) ) {
-			DBGC ( ipv6col ( &iphdr->src ), "IPv6 unrecognised "
-			       "option type %#02x:\n", option->type );
-			DBGC_HDA ( ipv6col ( &iphdr->src ), 0,
-				   options, len );
-			return -ENOTSUP_OPT;
-		}
-		if ( option->type == IPV6_OPT_PAD1 ) {
-			option = ( ( ( void * ) option ) + 1 );
-		} else {
-			option = ( ( ( void * ) option->value ) + option->len );
+void del_ipv6_address ( struct net_device *netdev ) {
+	struct ipv6_miniroute *miniroute;
+
+	list_for_each_entry ( miniroute, &miniroutes, list ) {
+		if ( miniroute->netdev == netdev ) {
+			del_ipv6_miniroute ( miniroute );
+			break;
 		}
 	}
-	return 0;
 }
 
 /**
- * Check if fragment matches fragment reassembly buffer
+ * Calculate TCPIP checksum
  *
- * @v fragment		Fragment reassembly buffer
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret is_fragment	Fragment matches this reassembly buffer
- */
-static int ipv6_is_fragment ( struct fragment *fragment,
-			      struct io_buffer *iobuf, size_t hdrlen ) {
-	struct ipv6_header *frag_iphdr = fragment->iobuf->data;
-	struct ipv6_fragment_header *frag_fhdr =
-		( fragment->iobuf->data + fragment->hdrlen -
-		  sizeof ( *frag_fhdr ) );
-	struct ipv6_header *iphdr = iobuf->data;
-	struct ipv6_fragment_header *fhdr =
-		( iobuf->data + hdrlen - sizeof ( *fhdr ) );
-
-	return ( ( memcmp ( &iphdr->src, &frag_iphdr->src,
-			    sizeof ( iphdr->src ) ) == 0 ) &&
-		 ( fhdr->ident == frag_fhdr->ident ) );
-}
-
-/**
- * Get fragment offset
+ * @v iobuf	I/O buffer
+ * @v tcpip	TCP/IP protocol
  *
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret offset		Offset
+ * This function constructs the pseudo header and completes the checksum in the
+ * upper layer header.
  */
-static size_t ipv6_fragment_offset ( struct io_buffer *iobuf, size_t hdrlen ) {
-	struct ipv6_fragment_header *fhdr =
-		( iobuf->data + hdrlen - sizeof ( *fhdr ) );
+static uint16_t ipv6_tx_csum ( struct io_buffer *iobuf, uint16_t csum ) {
+	struct ip6_header *ip6hdr = iobuf->data;
+	struct ipv6_pseudo_header pshdr;
 
-	return ( ntohs ( fhdr->offset_more ) & IPV6_MASK_OFFSET );
-}
+	/* Calculate pseudo header */
+	memset ( &pshdr, 0, sizeof ( pshdr ) );
+	pshdr.src = ip6hdr->src;
+	pshdr.dest = ip6hdr->dest;
+	pshdr.len = htons ( iob_len ( iobuf ) - sizeof ( *ip6hdr ) );
+	pshdr.nxt_hdr = ip6hdr->nxt_hdr;
 
-/**
- * Check if more fragments exist
- *
- * @v iobuf		I/O buffer
- * @v hdrlen		Length of non-fragmentable potion of I/O buffer
- * @ret more_frags	More fragments exist
- */
-static int ipv6_more_fragments ( struct io_buffer *iobuf, size_t hdrlen ) {
-	struct ipv6_fragment_header *fhdr =
-		( iobuf->data + hdrlen - sizeof ( *fhdr ) );
-
-	return ( fhdr->offset_more & htons ( IPV6_MASK_MOREFRAGS ) );
+	/* Update checksum value */
+	return tcpip_continue_chksum ( csum, &pshdr, sizeof ( pshdr ) );
 }
 
-/** Fragment reassembler */
-static struct fragment_reassembler ipv6_reassembler = {
-	.list = LIST_HEAD_INIT ( ipv6_reassembler.list ),
-	.is_fragment = ipv6_is_fragment,
-	.fragment_offset = ipv6_fragment_offset,
-	.more_fragments = ipv6_more_fragments,
-};
-
 /**
- * Calculate IPv6 pseudo-header checksum
+ * Dump IP6 header for debugging
  *
- * @v iphdr		IPv6 header
- * @v len		Payload length
- * @v next_header	Next header type
- * @v csum		Existing checksum
- * @ret csum		Updated checksum
+ * ip6hdr	IPv6 header
  */
-static uint16_t ipv6_pshdr_chksum ( struct ipv6_header *iphdr, size_t len,
-				    int next_header, uint16_t csum ) {
-	struct ipv6_pseudo_header pshdr;
-
-	/* Build pseudo-header */
-	memcpy ( &pshdr.src, &iphdr->src, sizeof ( pshdr.src ) );
-	memcpy ( &pshdr.dest, &iphdr->dest, sizeof ( pshdr.dest ) );
-	pshdr.len = htonl ( len );
-	memset ( pshdr.zero, 0, sizeof ( pshdr.zero ) );
-	pshdr.next_header = next_header;
-
-	/* Update the checksum value */
-	return tcpip_continue_chksum ( csum, &pshdr, sizeof ( pshdr ) );
+void ipv6_dump ( struct ip6_header *ip6hdr ) {
+	DBG ( "IP6 %p src %s dest %s nxt_hdr %d len %d\n", ip6hdr,
+	      inet6_ntoa ( ip6hdr->src ), inet6_ntoa ( ip6hdr->dest ),
+	      ip6hdr->nxt_hdr, ntohs ( ip6hdr->payload_len ) );
 }
 
 /**
- * Transmit IPv6 packet
+ * Transmit IP6 packet
  *
- * @v iobuf		I/O buffer
- * @v tcpip		Transport-layer protocol
- * @v st_src		Source network-layer address
- * @v st_dest		Destination network-layer address
- * @v netdev		Network device to use if no route found, or NULL
- * @v trans_csum	Transport-layer checksum to complete, or NULL
- * @ret rc		Status
+ * iobuf		I/O buffer
+ * tcpip	TCP/IP protocol
+ * st_dest	Destination socket address
  *
- * This function expects a transport-layer segment and prepends the
- * IPv6 header
+ * This function prepends the IPv6 headers to the payload an transmits it.
  */
 static int ipv6_tx ( struct io_buffer *iobuf,
-		     struct tcpip_protocol *tcpip_protocol,
-		     struct sockaddr_tcpip *st_src,
+		     struct tcpip_protocol *tcpip,
+		     struct sockaddr_tcpip *st_src __unused,
 		     struct sockaddr_tcpip *st_dest,
 		     struct net_device *netdev,
 		     uint16_t *trans_csum ) {
-	struct sockaddr_in6 *sin6_src = ( ( struct sockaddr_in6 * ) st_src );
-	struct sockaddr_in6 *sin6_dest = ( ( struct sockaddr_in6 * ) st_dest );
+	struct sockaddr_in6 *dest = ( struct sockaddr_in6* ) st_dest;
+	struct in6_addr next_hop;
 	struct ipv6_miniroute *miniroute;
-	struct ipv6_header *iphdr;
-	struct in6_addr *src = NULL;
-	struct in6_addr *next_hop;
 	uint8_t ll_dest_buf[MAX_LL_ADDR_LEN];
-	const void *ll_dest;
-	size_t len;
+	const uint8_t *ll_dest = ll_dest_buf;
 	int rc;
 
-	/* Fill up the IPv6 header, except source address */
-	len = iob_len ( iobuf );
-	iphdr = iob_push ( iobuf, sizeof ( *iphdr ) );
-	memset ( iphdr, 0, sizeof ( *iphdr ) );
-	iphdr->ver_tc_label = htonl ( IPV6_VER );
-	iphdr->len = htons ( len );
-	iphdr->next_header = tcpip_protocol->tcpip_proto;
-	iphdr->hop_limit = IPV6_HOP_LIMIT;
-	memcpy ( &iphdr->dest, &sin6_dest->sin6_addr, sizeof ( iphdr->dest ) );
-
-	/* Use routing table to identify next hop and transmitting netdev */
-	next_hop = &iphdr->dest;
-	if ( ( miniroute = ipv6_route ( sin6_dest->sin6_scope_id,
-					&next_hop ) ) != NULL ) {
-		src = &miniroute->address;
-		netdev = miniroute->netdev;
+	/* Construct the IPv6 packet */
+	struct ip6_header *ip6hdr = iob_push ( iobuf, sizeof ( *ip6hdr ) );
+	memset ( ip6hdr, 0, sizeof ( *ip6hdr) );
+	ip6hdr->ver_traffic_class_flow_label = htonl ( 0x60000000 );//IP6_VERSION;
+	ip6hdr->payload_len = htons ( iob_len ( iobuf ) - sizeof ( *ip6hdr ) );
+	ip6hdr->nxt_hdr = tcpip->tcpip_proto;
+	ip6hdr->hop_limit = IP6_HOP_LIMIT; // 255
+
+	/* Determine the next hop address and interface
+	 *
+	 * TODO: Implement the routing table.
+	 */
+	next_hop = dest->sin6_addr;
+	list_for_each_entry ( miniroute, &miniroutes, list ) {
+		if ( ( memcmp ( &ip6hdr->dest, &miniroute->prefix,
+					miniroute->prefix_len ) == 0 ) ||
+		     ( IP6_EQUAL ( miniroute->gateway, ip6_none ) ) ) {
+			netdev = miniroute->netdev;
+			ip6hdr->src = miniroute->address;
+			if ( ! ( IS_UNSPECIFIED ( miniroute->gateway ) ) ) {
+				next_hop = miniroute->gateway;
+			}
+			break;
+		}
 	}
-	if ( ! netdev ) {
-		DBGC ( ipv6col ( &iphdr->dest ), "IPv6 has no route to %s\n",
-		       inet6_ntoa ( &iphdr->dest ) );
+	/* No network interface identified */
+	if ( !netdev ) {
+		DBG ( "No route to host %s\n", inet6_ntoa ( ip6hdr->dest ) );
 		rc = -ENETUNREACH;
 		goto err;
 	}
-	if ( sin6_src )
-		src = &sin6_src->sin6_addr;
-	memcpy ( &iphdr->src, src, sizeof ( iphdr->src ) );
-
-	/* Fix up checksums */
-	if ( trans_csum ) {
-		*trans_csum = ipv6_pshdr_chksum ( iphdr, len,
-						  tcpip_protocol->tcpip_proto,
-						  *trans_csum );
-	}
-
-	/* Print IPv6 header for debugging */
-	DBGC2 ( ipv6col ( &iphdr->dest ), "IPv6 TX %s->",
-		inet6_ntoa ( &iphdr->src ) );
-	DBGC2 ( ipv6col ( &iphdr->dest ), "%s len %zd next %d\n",
-		inet6_ntoa ( &iphdr->dest ), len, iphdr->next_header );
-
-	/* Calculate link-layer destination address, if possible */
-	if ( IN6_IS_ADDR_MULTICAST ( next_hop ) ) {
-		/* Multicast address */
-		if ( ( rc = netdev->ll_protocol->mc_hash ( AF_INET6, next_hop,
-							   ll_dest_buf ) ) !=0){
-			DBGC ( ipv6col ( &iphdr->dest ), "IPv6 could not hash "
-			       "multicast %s: %s\n", inet6_ntoa ( next_hop ),
-			       strerror ( rc ) );
-			goto err;
-		}
-		ll_dest = ll_dest_buf;
-	} else {
-		/* Unicast address */
-		ll_dest = NULL;
-	}
 
-	/* Hand off to link layer (via NDP if applicable) */
-	if ( ll_dest ) {
-		if ( ( rc = net_tx ( iobuf, netdev, &ipv6_protocol, ll_dest,
-				     netdev->ll_addr ) ) != 0 ) {
-			DBGC ( ipv6col ( &iphdr->dest ), "IPv6 could not "
-			       "transmit packet via %s: %s\n",
-			       netdev->name, strerror ( rc ) );
-			return rc;
-		}
+	/* Complete the transport layer checksum */
+	if ( trans_csum )
+		*trans_csum = ipv6_tx_csum ( iobuf, *trans_csum );
+
+	/* Print IPv6 header */
+	ipv6_dump ( ip6hdr );
+	
+	/* Resolve link layer address */
+	if ( next_hop.in6_u.u6_addr8[0] == 0xff ) {
+		ll_dest_buf[0] = 0x33;
+		ll_dest_buf[1] = 0x33;
+		ll_dest_buf[2] = next_hop.in6_u.u6_addr8[12];
+		ll_dest_buf[3] = next_hop.in6_u.u6_addr8[13];
+		ll_dest_buf[4] = next_hop.in6_u.u6_addr8[14];
+		ll_dest_buf[5] = next_hop.in6_u.u6_addr8[15];
 	} else {
-		if ( ( rc = ndp_tx ( iobuf, netdev, next_hop, &iphdr->src,
-				     netdev->ll_addr ) ) != 0 ) {
-			DBGC ( ipv6col ( &iphdr->dest ), "IPv6 could not "
-			       "transmit packet via %s: %s\n",
-			       netdev->name, strerror ( rc ) );
-			return rc;
+		/* Unicast address needs to be resolved by NDP */
+		if ( ( rc = ndp_resolve ( netdev, &next_hop, &ip6hdr->src,
+					  ll_dest_buf ) ) != 0 ) {
+			DBG ( "No entry for %s\n", inet6_ntoa ( next_hop ) );
+			goto err;
 		}
 	}
 
-	return 0;
+	/* Transmit packet */
+	return net_tx ( iobuf, netdev, &ipv6_protocol, ll_dest,
+			netdev->ll_addr );
 
- err:
+  err:
 	free_iob ( iobuf );
 	return rc;
 }
 
 /**
- * Process incoming IPv6 packets
+ * Process next IP6 header
+ *
+ * @v iobuf	I/O buffer
+ * @v nxt_hdr	Next header number
+ * @v src	Source socket address
+ * @v dest	Destination socket address
+ *
+ * Refer http://www.iana.org/assignments/ipv6-parameters for the numbers
+ */
+static int ipv6_process_nxt_hdr ( struct io_buffer *iobuf, uint8_t nxt_hdr,
+		struct sockaddr_tcpip *src, struct sockaddr_tcpip *dest ) {
+	switch ( nxt_hdr ) {
+	case IP6_HOPBYHOP: 
+	case IP6_ROUTING: 
+	case IP6_FRAGMENT: 
+	case IP6_AUTHENTICATION: 
+	case IP6_DEST_OPTS: 
+	case IP6_ESP: 
+		DBG ( "Function not implemented for header %d\n", nxt_hdr );
+		return -ENOSYS;
+	case IP6_ICMP6: 
+		break;
+	case IP6_NO_HEADER: 
+		DBG ( "No next header\n" );
+		return 0;
+	}
+	/* Next header is not a IPv6 extension header */
+	return tcpip_rx ( iobuf, nxt_hdr, src, dest, 0 /* fixme */ );
+}
+
+/**
+ * Process incoming IP6 packets
  *
  * @v iobuf		I/O buffer
  * @v netdev		Network device
  * @v ll_dest		Link-layer destination address
- * @v ll_source		Link-layer destination source
+ * @v ll_source		Link-layer source address
  * @v flags		Packet flags
- * @ret rc		Return status code
  *
- * This function expects an IPv6 network datagram. It processes the
- * headers and sends it to the transport layer.
+ * This function processes a IPv6 packet
  */
-static int ipv6_rx ( struct io_buffer *iobuf, struct net_device *netdev,
-		     const void *ll_dest __unused,
-		     const void *ll_source __unused,
-		     unsigned int flags __unused ) {
-	struct ipv6_header *iphdr = iobuf->data;
-	union ipv6_extension_header *ext;
+static int ipv6_rx ( struct io_buffer *iobuf,
+		     __unused struct net_device *netdev,
+		     __unused const void *ll_dest,
+		     __unused const void *ll_source,
+		     __unused unsigned int flags ) {
+
+	struct ip6_header *ip6hdr = iobuf->data;
 	union {
 		struct sockaddr_in6 sin6;
 		struct sockaddr_tcpip st;
 	} src, dest;
-	uint16_t pshdr_csum;
-	size_t len;
-	size_t hdrlen;
-	size_t extlen;
-	int this_header;
-	int next_header;
-	int rc;
 
-	/* Sanity check the IPv6 header */
-	if ( iob_len ( iobuf ) < sizeof ( *iphdr ) ) {
-		DBGC ( ipv6col ( &iphdr->src ), "IPv6 packet too short at %zd "
-		       "bytes (min %zd bytes)\n", iob_len ( iobuf ),
-		       sizeof ( *iphdr ) );
-		rc = -EINVAL_LEN;
-		goto err;
-	}
-	if ( ( iphdr->ver_tc_label & htonl ( IPV6_MASK_VER ) ) !=
-	     htonl ( IPV6_VER ) ) {
-		DBGC ( ipv6col ( &iphdr->src ), "IPv6 version %#08x not "
-		       "supported\n", ntohl ( iphdr->ver_tc_label ) );
-		rc = -ENOTSUP_VER;
-		goto err;
+	/* Sanity check */
+	if ( iob_len ( iobuf ) < sizeof ( *ip6hdr ) ) {
+		DBG ( "Packet too short (%zd bytes)\n", iob_len ( iobuf ) );
+		goto drop;
 	}
 
-	/* Truncate packet to specified length */
-	len = ntohs ( iphdr->len );
-	if ( len > iob_len ( iobuf ) ) {
-		DBGC ( ipv6col ( &iphdr->src ), "IPv6 length too long at %zd "
-		       "bytes (packet is %zd bytes)\n", len, iob_len ( iobuf ));
-		rc = -EINVAL_LEN;
-		goto err;
-	}
-	iob_unput ( iobuf, ( iob_len ( iobuf ) - len - sizeof ( *iphdr ) ) );
-	hdrlen = sizeof ( *iphdr );
+	/* TODO: Verify checksum */
 
-	/* Print IPv6 header for debugging */
-	DBGC2 ( ipv6col ( &iphdr->src ), "IPv6 RX %s<-",
-		inet6_ntoa ( &iphdr->dest ) );
-	DBGC2 ( ipv6col ( &iphdr->src ), "%s len %zd next %d\n",
-		inet6_ntoa ( &iphdr->src ), len, iphdr->next_header );
-
-	/* Discard unicast packets not destined for us */
-	if ( ( ! ( flags & LL_MULTICAST ) ) &&
-	     ( ! ipv6_has_addr ( netdev, &iphdr->dest ) ) ) {
-		DBGC ( ipv6col ( &iphdr->src ), "IPv6 discarding non-local "
-		       "unicast packet for %s\n", inet6_ntoa ( &iphdr->dest ) );
-		rc = -EPIPE;
-		goto err;
-	}
-
-	/* Process any extension headers */
-	next_header = iphdr->next_header;
-	while ( 1 ) {
-
-		/* Extract extension header */
-		this_header = next_header;
-		ext = ( iobuf->data + hdrlen );
-		extlen = sizeof ( ext->pad );
-		if ( iob_len ( iobuf ) < ( hdrlen + extlen ) ) {
-			DBGC ( ipv6col ( &iphdr->src ), "IPv6 too short for "
-			       "extension header type %d at %zd bytes (min "
-			       "%zd bytes)\n", this_header,
-			       ( iob_len ( iobuf ) - hdrlen ), extlen );
-			rc = -EINVAL_LEN;
-			goto err;
-		}
+	/* Print IP6 header for debugging */
+	ipv6_dump ( ip6hdr );
 
-		/* Determine size of extension header (if applicable) */
-		if ( ( this_header == IPV6_HOPBYHOP ) ||
-		     ( this_header == IPV6_DESTINATION ) ||
-		     ( this_header == IPV6_ROUTING ) ) {
-			/* Length field is present */
-			extlen += ext->common.len;
-		} else if ( this_header == IPV6_FRAGMENT ) {
-			/* Length field is reserved and ignored (RFC2460) */
-		} else {
-			/* Not an extension header; assume rest is payload */
-			break;
-		}
-		if ( iob_len ( iobuf ) < ( hdrlen + extlen ) ) {
-			DBGC ( ipv6col ( &iphdr->src ), "IPv6 too short for "
-			       "extension header type %d at %zd bytes (min "
-			       "%zd bytes)\n", this_header,
-			       ( iob_len ( iobuf ) - hdrlen ), extlen );
-			rc = -EINVAL_LEN;
-			goto err;
-		}
-		hdrlen += extlen;
-		next_header = ext->common.next_header;
-		DBGC2 ( ipv6col ( &iphdr->src ), "IPv6 RX %s<-",
-			inet6_ntoa ( &iphdr->dest ) );
-		DBGC2 ( ipv6col ( &iphdr->src ), "%s ext type %d len %zd next "
-			"%d\n", inet6_ntoa ( &iphdr->src ), this_header,
-			extlen, next_header );
-
-		/* Process this extension header */
-		if ( ( this_header == IPV6_HOPBYHOP ) ||
-		     ( this_header == IPV6_DESTINATION ) ) {
-
-			/* Check that all options can be ignored */
-			if ( ( rc = ipv6_check_options ( iphdr, &ext->options,
-							 extlen ) ) != 0 )
-				goto err;
-
-		} else if ( this_header == IPV6_FRAGMENT ) {
-
-			/* Reassemble fragments */
-			iobuf = fragment_reassemble ( &ipv6_reassembler, iobuf,
-						      &hdrlen );
-			if ( ! iobuf )
-				return 0;
-			iphdr = iobuf->data;
-		}
-	}
-
-	/* Construct socket address, calculate pseudo-header checksum,
-	 * and hand off to transport layer
-	 */
-	memset ( &src, 0, sizeof ( src ) );
-	src.sin6.sin6_family = AF_INET6;
-	memcpy ( &src.sin6.sin6_addr, &iphdr->src,
-		 sizeof ( src.sin6.sin6_addr ) );
-	src.sin6.sin6_scope_id = netdev->index;
-	memset ( &dest, 0, sizeof ( dest ) );
-	dest.sin6.sin6_family = AF_INET6;
-	memcpy ( &dest.sin6.sin6_addr, &iphdr->dest,
-		 sizeof ( dest.sin6.sin6_addr ) );
-	dest.sin6.sin6_scope_id = netdev->index;
-	iob_pull ( iobuf, hdrlen );
-	pshdr_csum = ipv6_pshdr_chksum ( iphdr, iob_len ( iobuf ),
-					 next_header, TCPIP_EMPTY_CSUM );
-	if ( ( rc = tcpip_rx ( iobuf, netdev, next_header, &src.st, &dest.st,
-			       pshdr_csum ) ) != 0 ) {
-		DBGC ( ipv6col ( &src.sin6.sin6_addr ), "IPv6 received packet "
-				"rejected by stack: %s\n", strerror ( rc ) );
-		return rc;
+	/* Check header version */
+	if ( ( ip6hdr->ver_traffic_class_flow_label & 0xf0000000 ) != 0x60000000 ) {
+		DBG ( "Invalid protocol version\n" );
+		goto drop;
 	}
 
-	return 0;
-
- err:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/**
- * Parse IPv6 address
- *
- * @v string		IPv6 address string
- * @ret in		IPv6 address to fill in
- * @ret rc		Return status code
- */
-int inet6_aton ( const char *string, struct in6_addr *in ) {
-	uint16_t *word = in->s6_addr16;
-	uint16_t *end = ( word + ( sizeof ( in->s6_addr16 ) /
-				   sizeof ( in->s6_addr16[0] ) ) );
-	uint16_t *pad = NULL;
-	const char *nptr = string;
-	char *endptr;
-	unsigned long value;
-	size_t pad_len;
-	size_t move_len;
-
-	/* Parse string */
-	while ( 1 ) {
-
-		/* Parse current word */
-		value = strtoul ( nptr, &endptr, 16 );
-		if ( value > 0xffff ) {
-			DBG ( "IPv6 invalid word value %#lx in \"%s\"\n",
-			      value, string );
-			return -EINVAL;
-		}
-		*(word++) = htons ( value );
-
-		/* Parse separator */
-		if ( ! *endptr )
-			break;
-		if ( *endptr != ':' ) {
-			DBG ( "IPv6 invalid separator '%c' in \"%s\"\n",
-			      *endptr, string );
-			return -EINVAL;
-		}
-		if ( ( endptr == nptr ) && ( nptr != string ) ) {
-			if ( pad ) {
-				DBG ( "IPv6 invalid multiple \"::\" in "
-				      "\"%s\"\n", string );
-				return -EINVAL;
-			}
-			pad = word;
-		}
-		nptr = ( endptr + 1 );
-
-		/* Check for overrun */
-		if ( word == end ) {
-			DBG ( "IPv6 too many words in \"%s\"\n", string );
-			return -EINVAL;
-		}
+	/* Check the payload length */
+	if ( ntohs ( ip6hdr->payload_len ) > iob_len ( iobuf ) ) {
+		DBG ( "Inconsistent packet length (%d bytes)\n",
+			ip6hdr->payload_len );
+		goto drop;
 	}
 
-	/* Insert padding if specified */
-	if ( pad ) {
-		move_len = ( ( ( void * ) word ) - ( ( void * ) pad ) );
-		pad_len = ( ( ( void * ) end ) - ( ( void * ) word ) );
-		memmove ( ( ( ( void * ) pad ) + pad_len ), pad, move_len );
-		memset ( pad, 0, pad_len );
-	} else if ( word != end ) {
-		DBG ( "IPv6 underlength address \"%s\"\n", string );
-		return -EINVAL;
-	}
+	/* Ignore the traffic class and flow control values */
 
-	return 0;
-}
+	/* Construct socket address */
+	memset ( &src, 0, sizeof ( src ) );
+	src.sin6.sin_family = AF_INET6;
+	src.sin6.sin6_addr = ip6hdr->src;
+	memset ( &dest, 0, sizeof ( dest ) );
+	dest.sin6.sin_family = AF_INET6;
+	dest.sin6.sin6_addr = ip6hdr->dest;
 
-/**
- * Convert IPv6 address to standard notation
- *
- * @v in		IPv6 address
- * @ret string		IPv6 address string in canonical format
- *
- * RFC5952 defines the canonical format for IPv6 textual representation.
- */
-char * inet6_ntoa ( const struct in6_addr *in ) {
-	static char buf[41]; /* ":xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx" */
-	char *out = buf;
-	char *longest_start = NULL;
-	char *start = NULL;
-	int longest_len = 1;
-	int len = 0;
-	char *dest;
-	unsigned int i;
-	uint16_t value;
-
-	/* Format address, keeping track of longest run of zeros */
-	for ( i = 0 ; i < ( sizeof ( in->s6_addr16 ) /
-			    sizeof ( in->s6_addr16[0] ) ) ; i++ ) {
-		value = ntohs ( in->s6_addr16[i] );
-		if ( value == 0 ) {
-			if ( len++ == 0 )
-				start = out;
-			if ( len > longest_len ) {
-				longest_start = start;
-				longest_len = len;
-			}
-		} else {
-			len = 0;
-		}
-		out += sprintf ( out, ":%x", value );
-	}
+	/* Strip header */
+	iob_unput ( iobuf, iob_len ( iobuf ) - ntohs ( ip6hdr->payload_len ) -
+							sizeof ( *ip6hdr ) );
+	iob_pull ( iobuf, sizeof ( *ip6hdr ) );
 
-	/* Abbreviate longest run of zeros, if applicable */
-	if ( longest_start ) {
-		dest = strcpy ( ( longest_start + 1 ),
-				( longest_start + ( 2 * longest_len ) ) );
-		if ( dest[0] == '\0' )
-			dest[1] = '\0';
-		dest[0] = ':';
-	}
-	return ( ( longest_start == buf ) ? buf : ( buf + 1 ) );
-}
+	/* Send it to the transport layer */
+	return ipv6_process_nxt_hdr ( iobuf, ip6hdr->nxt_hdr, &src.st, &dest.st );
 
-/**
- * Transcribe IPv6 address
- *
- * @v net_addr		IPv6 address
- * @ret string		IPv6 address in standard notation
- *
- */
-static const char * ipv6_ntoa ( const void *net_addr ) {
-	return inet6_ntoa ( net_addr );
+  drop:
+	DBG ( "Packet dropped\n" );
+	free_iob ( iobuf );
+	return -1;
 }
 
 /**
- * Transcribe IPv6 socket address
- *
- * @v sa		Socket address
- * @ret string		Socket address in standard notation
+ * Print a IP6 address as xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx
  */
-static const char * ipv6_sock_ntoa ( struct sockaddr *sa ) {
-	static char buf[ 39 /* "xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx:xxxx" */ +
-			 1 /* "%" */ + NETDEV_NAME_LEN + 1 /* NUL */ ];
-	struct sockaddr_in6 *sin6 = ( ( struct sockaddr_in6 * ) sa );
-	struct in6_addr *in = &sin6->sin6_addr;
-	struct net_device *netdev;
-	const char *netdev_name;
-
-	/* Identify network device, if applicable */
-	if ( IN6_IS_ADDR_LINKLOCAL ( in ) ) {
-		netdev = find_netdev_by_index ( sin6->sin6_scope_id );
-		netdev_name = ( netdev ? netdev->name : "UNKNOWN" );
-	} else {
-		netdev_name = NULL;
-	}
-
-	/* Format socket address */
-	snprintf ( buf, sizeof ( buf ), "%s%s%s", inet6_ntoa ( in ),
-		   ( netdev_name ? "%" : "" ),
-		   ( netdev_name ? netdev_name : "" ) );
+char * inet6_ntoa ( struct in6_addr in6 ) {
+	static char buf[40];
+	uint16_t *bytes = ( uint16_t* ) &in6;
+	sprintf ( buf, "%x:%x:%x:%x:%x:%x:%x:%x", bytes[0], bytes[1], bytes[2],
+			bytes[3], bytes[4], bytes[5], bytes[6], bytes[7] );
 	return buf;
 }
 
-/**
- * Parse IPv6 socket address
- *
- * @v string		Socket address string
- * @v sa		Socket address to fill in
- * @ret rc		Return status code
- */
-static int ipv6_sock_aton ( const char *string, struct sockaddr *sa ) {
-	struct sockaddr_in6 *sin6 = ( ( struct sockaddr_in6 * ) sa );
-	struct in6_addr in;
-	struct net_device *netdev;
-	size_t len;
-	char *tmp;
-	char *in_string;
-	char *netdev_string;
-	int rc;
-
-	/* Create modifiable copy of string */
-	tmp = strdup ( string );
-	if ( ! tmp ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	in_string = tmp;
-
-	/* Strip surrounding "[...]", if present */
-	len = strlen ( in_string );
-	if ( ( in_string[0] == '[' ) && ( in_string[ len - 1 ] == ']' ) ) {
-		in_string[ len - 1 ] = '\0';
-		in_string++;
-	}
-
-	/* Split at network device name, if present */
-	netdev_string = strchr ( in_string, '%' );
-	if ( netdev_string )
-		*(netdev_string++) = '\0';
-
-	/* Parse IPv6 address portion */
-	if ( ( rc = inet6_aton ( in_string, &in ) ) != 0 )
-		goto err_inet6_aton;
-
-	/* Parse network device name, if present */
-	if ( netdev_string ) {
-		netdev = find_netdev ( netdev_string );
-		if ( ! netdev ) {
-			rc = -ENODEV;
-			goto err_find_netdev;
-		}
-		sin6->sin6_scope_id = netdev->index;
-	}
-
-	/* Copy IPv6 address portion to socket address */
-	memcpy ( &sin6->sin6_addr, &in, sizeof ( sin6->sin6_addr ) );
-
- err_find_netdev:
- err_inet6_aton:
-	free ( tmp );
- err_alloc:
-	return rc;
+static const char * ipv6_ntoa ( const void *net_addr ) {
+	return inet6_ntoa ( * ( ( struct in6_addr * ) net_addr ) );
 }
 
 /** IPv6 protocol */
@@ -858,116 +382,3 @@
 	.sa_family = AF_INET6,
 	.tx = ipv6_tx,
 };
-
-/** IPv6 socket address converter */
-struct sockaddr_converter ipv6_sockaddr_converter __sockaddr_converter = {
-	.family = AF_INET6,
-	.ntoa = ipv6_sock_ntoa,
-	.aton = ipv6_sock_aton,
-};
-
-/**
- * Perform IPv6 stateless address autoconfiguration (SLAAC)
- *
- * @v netdev		Network device
- * @v prefix		Prefix
- * @v prefix_len	Prefix length
- * @v router		Router address (or NULL)
- * @ret rc		Return status code
- */
-int ipv6_slaac ( struct net_device *netdev, struct in6_addr *prefix,
-		 unsigned int prefix_len, struct in6_addr *router ) {
-	struct ipv6_miniroute *miniroute;
-	struct ipv6_miniroute *tmp;
-	struct in6_addr address;
-	int check_prefix_len;
-	int rc;
-
-	/* Construct local address */
-	memcpy ( &address, prefix, sizeof ( address ) );
-	check_prefix_len = ipv6_eui64 ( &address, netdev );
-	if ( check_prefix_len < 0 ) {
-		rc = check_prefix_len;
-		DBGC ( netdev, "IPv6 %s could not construct SLAAC address: "
-		       "%s\n", netdev->name, strerror ( rc ) );
-		return rc;
-	}
-	if ( check_prefix_len != ( int ) prefix_len ) {
-		DBGC ( netdev, "IPv6 %s incorrect SLAAC prefix length %d "
-		       "(expected %d)\n", netdev->name, prefix_len,
-		       check_prefix_len );
-		return -EINVAL;
-	}
-
-	/* Delete any existing SLAAC miniroutes for this prefix */
-	list_for_each_entry_safe ( miniroute, tmp, &ipv6_miniroutes, list ) {
-		if ( ipv6_is_on_link ( miniroute, &address ) )
-			del_ipv6_miniroute ( miniroute );
-	}
-
-	/* Add miniroute */
-	miniroute = add_ipv6_miniroute ( netdev, &address, prefix_len, router );
-	if ( ! miniroute )
-		return -ENOMEM;
-
-	return 0;
-}
-
-/**
- * Create IPv6 network device
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int ipv6_probe ( struct net_device *netdev ) {
-	struct ipv6_miniroute *miniroute;
-	struct in6_addr address;
-	int prefix_len;
-	int rc;
-
-	/* Construct link-local address from EUI-64 as per RFC 2464 */
-	memset ( &address, 0, sizeof ( address ) );
-	prefix_len = ipv6_link_local ( &address, netdev );
-	if ( prefix_len < 0 ) {
-		rc = prefix_len;
-		DBGC ( netdev, "IPv6 %s could not construct link-local "
-		       "address: %s\n", netdev->name, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Create link-local address for this network device */
-	miniroute = add_ipv6_miniroute ( netdev, &address, prefix_len, NULL );
-	if ( ! miniroute )
-		return -ENOMEM;
-
-	return 0;
-}
-
-/**
- * Destroy IPv6 network device
- *
- * @v netdev		Network device
- */
-static void ipv6_remove ( struct net_device *netdev ) {
-	struct ipv6_miniroute *miniroute;
-	struct ipv6_miniroute *tmp;
-
-	/* Delete all miniroutes for this network device */
-	list_for_each_entry_safe ( miniroute, tmp, &ipv6_miniroutes, list ) {
-		if ( miniroute->netdev == netdev )
-			del_ipv6_miniroute ( miniroute );
-	}
-}
-
-/** IPv6 network device driver */
-struct net_driver ipv6_driver __net_driver = {
-	.name = "IPv6",
-	.probe = ipv6_probe,
-	.remove = ipv6_remove,
-};
-
-/* Drag in ICMPv6 */
-REQUIRE_OBJECT ( icmpv6 );
-
-/* Drag in NDP */
-REQUIRE_OBJECT ( ndp );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/mii.c ipxe-1.0.1~lliurex1505/src/net/mii.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/mii.c	1970-01-01 00:00:00.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/mii.c	2012-01-06 23:49:04.000000000 +0000
@@ -0,0 +1,147 @@
+/*
+
+	mii.c: MII interface library
+
+	Ported to iPXE by Daniel Verkamp <daniel@drv.nu>
+	from Linux drivers/net/mii.c
+
+	Maintained by Jeff Garzik <jgarzik@pobox.com>
+	Copyright 2001,2002 Jeff Garzik
+
+	Various code came from myson803.c and other files by
+	Donald Becker.  Copyright:
+
+		Written 1998-2002 by Donald Becker.
+
+		This software may be used and distributed according
+		to the terms of the GNU General Public License (GPL),
+		incorporated herein by reference.  Drivers based on
+		or derived from this code fall under the GPL and must
+		retain the authorship, copyright and license notice.
+		This file is not a complete program and may only be
+		used when the entire operating system is licensed
+		under the GPL.
+
+		The author may be reached as becker@scyld.com, or C/O
+		Scyld Computing Corporation
+		410 Severn Ave., Suite 210
+		Annapolis MD 21403
+
+*/
+
+#include <mii.h>
+
+/**
+ * mii_link_ok - is link status up/ok
+ * @mii: the MII interface
+ *
+ * Returns 1 if the MII reports link status up/ok, 0 otherwise.
+ */
+int
+mii_link_ok ( struct mii_if_info *mii )
+{
+	/* first, a dummy read, needed to latch some MII phys */
+	mii->mdio_read ( mii->dev, mii->phy_id, MII_BMSR );
+	if ( mii->mdio_read ( mii->dev, mii->phy_id, MII_BMSR ) & BMSR_LSTATUS )
+		return 1;
+	return 0;
+}
+
+/**
+ * mii_check_link - check MII link status
+ * @mii: MII interface
+ *
+ * If the link status changed (previous != current), call
+ * netif_carrier_on() if current link status is Up or call
+ * netif_carrier_off() if current link status is Down.
+ */
+void
+mii_check_link ( struct mii_if_info *mii )
+{
+	int cur_link = mii_link_ok ( mii );
+	int prev_link = netdev_link_ok ( mii->dev );
+
+	if ( cur_link && !prev_link )
+		netdev_link_up ( mii->dev );
+	else if (prev_link && !cur_link)
+		netdev_link_down ( mii->dev );
+}
+
+
+/**
+ * mii_check_media - check the MII interface for a duplex change
+ * @mii: the MII interface
+ * @ok_to_print: OK to print link up/down messages
+ * @init_media: OK to save duplex mode in @mii
+ *
+ * Returns 1 if the duplex mode changed, 0 if not.
+ * If the media type is forced, always returns 0.
+ */
+unsigned int
+mii_check_media ( struct mii_if_info *mii,
+                  unsigned int ok_to_print,
+                  unsigned int init_media )
+{
+	unsigned int old_carrier, new_carrier;
+	int advertise, lpa, media, duplex;
+	int lpa2 = 0;
+
+	/* if forced media, go no further */
+	if (mii->force_media)
+		return 0; /* duplex did not change */
+
+	/* check current and old link status */
+	old_carrier = netdev_link_ok ( mii->dev ) ? 1 : 0;
+	new_carrier = (unsigned int) mii_link_ok ( mii );
+
+	/* if carrier state did not change, this is a "bounce",
+	 * just exit as everything is already set correctly
+	 */
+	if ( ( ! init_media ) && ( old_carrier == new_carrier ) )
+		return 0; /* duplex did not change */
+
+	/* no carrier, nothing much to do */
+	if ( ! new_carrier ) {
+		netdev_link_down ( mii->dev );
+		if ( ok_to_print )
+			DBG ( "%s: link down\n", mii->dev->name);
+		return 0; /* duplex did not change */
+	}
+
+	/*
+	 * we have carrier, see who's on the other end
+	 */
+	netdev_link_up ( mii->dev );
+
+	/* get MII advertise and LPA values */
+	if ( ( ! init_media ) && ( mii->advertising ) ) {
+		advertise = mii->advertising;
+	} else {
+		advertise = mii->mdio_read ( mii->dev, mii->phy_id, MII_ADVERTISE );
+		mii->advertising = advertise;
+	}
+	lpa = mii->mdio_read ( mii->dev, mii->phy_id, MII_LPA );
+	if ( mii->supports_gmii )
+		lpa2 = mii->mdio_read ( mii->dev, mii->phy_id, MII_STAT1000 );
+
+	/* figure out media and duplex from advertise and LPA values */
+	media = mii_nway_result ( lpa & advertise );
+	duplex = ( media & ADVERTISE_FULL ) ? 1 : 0;
+	if ( lpa2 & LPA_1000FULL )
+		duplex = 1;
+
+	if ( ok_to_print )
+		DBG ( "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n",
+		       mii->dev->name,
+		       lpa2 & ( LPA_1000FULL | LPA_1000HALF ) ? "1000" :
+		       media & ( ADVERTISE_100FULL | ADVERTISE_100HALF ) ? "100" : "10",
+		       duplex ? "full" : "half",
+		       lpa);
+
+	if ( ( init_media ) || ( mii->full_duplex != duplex ) ) {
+		mii->full_duplex = duplex;
+		return 1; /* duplex changed */
+	}
+
+	return 0; /* duplex did not change */
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/ndp.c ipxe-1.0.1~lliurex1505/src/net/ndp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/ndp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/ndp.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,753 +1,180 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
+#include <stdint.h>
 #include <string.h>
-#include <errno.h>
 #include <byteswap.h>
-#include <ipxe/in.h>
+#include <errno.h>
+#include <ipxe/if_ether.h>
 #include <ipxe/iobuf.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/ipv6.h>
-#include <ipxe/icmpv6.h>
-#include <ipxe/neighbour.h>
 #include <ipxe/ndp.h>
+#include <ipxe/icmp6.h>
+#include <ipxe/ip6.h>
+#include <ipxe/netdevice.h>
 
 /** @file
  *
- * IPv6 neighbour discovery protocol
+ * Neighbour Discovery Protocol
  *
+ * This file implements address resolution as specified by the neighbour
+ * discovery protocol in RFC2461. This protocol is part of the IPv6 protocol
+ * family.
  */
 
-static int ipv6conf_rx_router_advertisement ( struct net_device *netdev,
-					      unsigned int flags );
-
-/**
- * Transmit NDP packet with link-layer address option
- *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v sin6_dest		Destination socket address
- * @v data		NDP header
- * @v len		Size of NDP header
- * @v option_type	NDP option type
- * @ret rc		Return status code
- */
-static int ndp_tx_ll_addr ( struct net_device *netdev,
-			    struct sockaddr_in6 *sin6_src,
-			    struct sockaddr_in6 *sin6_dest,
-			    const void *data, size_t len,
-			    unsigned int option_type ) {
-	struct sockaddr_tcpip *st_src =
-		( ( struct sockaddr_tcpip * ) sin6_src );
-	struct sockaddr_tcpip *st_dest =
-		( ( struct sockaddr_tcpip * ) sin6_dest );
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	struct io_buffer *iobuf;
-	struct ndp_ll_addr_option *ll_addr_opt;
-	union ndp_header *ndp;
-	size_t option_len;
-	int rc;
-
-	/* Allocate and populate buffer */
-	option_len = ( ( sizeof ( *ll_addr_opt ) +
-			 ll_protocol->ll_addr_len + NDP_OPTION_BLKSZ - 1 ) &
-		       ~( NDP_OPTION_BLKSZ - 1 ) );
-	iobuf = alloc_iob ( MAX_LL_NET_HEADER_LEN + len + option_len );
-	if ( ! iobuf )
-		return -ENOMEM;
-	iob_reserve ( iobuf, MAX_LL_NET_HEADER_LEN );
-	memcpy ( iob_put ( iobuf, len ), data, len );
-	ll_addr_opt = iob_put ( iobuf, option_len );
-	ll_addr_opt->header.type = option_type;
-	ll_addr_opt->header.blocks = ( option_len / NDP_OPTION_BLKSZ );
-	memcpy ( ll_addr_opt->ll_addr, netdev->ll_addr,
-		 ll_protocol->ll_addr_len );
-	ndp = iobuf->data;
-	ndp->icmp.chksum = tcpip_chksum ( ndp, ( len + option_len ) );
-
-	/* Transmit packet */
-	if ( ( rc = tcpip_tx ( iobuf, &icmpv6_protocol, st_src, st_dest,
-			       netdev, &ndp->icmp.chksum ) ) != 0 ) {
-		DBGC ( netdev, "NDP could not transmit packet: %s\n",
-		       strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Transmit NDP neighbour discovery request
- *
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v net_source	Source network-layer address
- * @ret rc		Return status code
- */
-static int ndp_tx_request ( struct net_device *netdev,
-			    struct net_protocol *net_protocol __unused,
-			    const void *net_dest, const void *net_source ) {
-	struct sockaddr_in6 sin6_src;
-	struct sockaddr_in6 sin6_dest;
-	struct ndp_neighbour_header neigh;
-	int rc;
-
-	/* Construct source address */
-	memset ( &sin6_src, 0, sizeof ( sin6_src ) );
-	sin6_src.sin6_family = AF_INET6;
-	memcpy ( &sin6_src.sin6_addr, net_source,
-		 sizeof ( sin6_src.sin6_addr ) );
-	sin6_src.sin6_scope_id = netdev->index;
-
-	/* Construct multicast destination address */
-	memset ( &sin6_dest, 0, sizeof ( sin6_dest ) );
-	sin6_dest.sin6_family = AF_INET6;
-	sin6_dest.sin6_scope_id = netdev->index;
-	ipv6_solicited_node ( &sin6_dest.sin6_addr, net_dest );
-
-	/* Construct neighbour header */
-	memset ( &neigh, 0, sizeof ( neigh ) );
-	neigh.icmp.type = ICMPV6_NEIGHBOUR_SOLICITATION;
-	memcpy ( &neigh.target, net_dest, sizeof ( neigh.target ) );
-
-	/* Transmit neighbour discovery packet */
-	if ( ( rc = ndp_tx_ll_addr ( netdev, &sin6_src, &sin6_dest, &neigh,
-				     sizeof ( neigh ),
-				     NDP_OPT_LL_SOURCE ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/** NDP neighbour discovery protocol */
-struct neighbour_discovery ndp_discovery = {
-	.name = "NDP",
-	.tx_request = ndp_tx_request,
+/* A neighbour entry */
+struct ndp_entry {
+	/** Target IP6 address */
+	struct in6_addr in6;
+	/** Link layer protocol */
+	struct ll_protocol *ll_protocol;
+	/** Link-layer address */
+	uint8_t ll_addr[MAX_LL_ADDR_LEN];
+	/** State of the neighbour entry */
+	int state;
 };
 
-/**
- * Transmit NDP router solicitation
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-static int ndp_tx_router_solicitation ( struct net_device *netdev ) {
-	struct ndp_router_solicitation_header rsol;
-	struct sockaddr_in6 sin6_dest;
-	int rc;
+/** Number of entries in the neighbour cache table */
+#define NUM_NDP_ENTRIES 4
 
-	/* Construct multicast destination address */
-	memset ( &sin6_dest, 0, sizeof ( sin6_dest ) );
-	sin6_dest.sin6_family = AF_INET6;
-	sin6_dest.sin6_scope_id = netdev->index;
-	ipv6_all_routers ( &sin6_dest.sin6_addr );
-
-	/* Construct router solicitation */
-	memset ( &rsol, 0, sizeof ( rsol ) );
-	rsol.icmp.type = ICMPV6_ROUTER_SOLICITATION;
-
-	/* Transmit packet */
-	if ( ( rc = ndp_tx_ll_addr ( netdev, NULL, &sin6_dest, &rsol,
-				     sizeof ( rsol ), NDP_OPT_LL_SOURCE ) ) !=0)
-		return rc;
+/** The neighbour cache table */
+static struct ndp_entry ndp_table[NUM_NDP_ENTRIES];
+#define ndp_table_end &ndp_table[NUM_NDP_ENTRIES]
 
-	return 0;
-}
+static unsigned int next_new_ndp_entry = 0;
 
 /**
- * Process NDP neighbour solicitation source link-layer address option
+ * Find entry in the neighbour cache
  *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP packet
- * @v option		NDP option
- * @v len		NDP option length
- * @ret rc		Return status code
+ * @v in6	IP6 address
  */
-static int
-ndp_rx_neighbour_solicitation_ll_source ( struct net_device *netdev,
-					  struct sockaddr_in6 *sin6_src,
-					  union ndp_header *ndp,
-					  union ndp_option *option,
-					  size_t len ) {
-	struct ndp_neighbour_header *neigh = &ndp->neigh;
-	struct ndp_ll_addr_option *ll_addr_opt = &option->ll_addr;
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	int rc;
-
-	/* Silently ignore neighbour solicitations for addresses we do
-	 * not own.
-	 */
-	if ( ! ipv6_has_addr ( netdev, &neigh->target ) )
-		return 0;
+static struct ndp_entry *
+ndp_find_entry ( struct in6_addr *in6 ) {
+	struct ndp_entry *ndp;
 
-	/* Sanity check */
-	if ( offsetof ( typeof ( *ll_addr_opt ),
-			ll_addr[ll_protocol->ll_addr_len] ) > len ) {
-		DBGC ( netdev, "NDP neighbour solicitation link-layer address "
-		       "option too short at %zd bytes\n", len );
-		return -EINVAL;
-	}
-
-	/* Create or update neighbour cache entry */
-	if ( ( rc = neighbour_define ( netdev, &ipv6_protocol,
-				       &sin6_src->sin6_addr,
-				       ll_addr_opt->ll_addr ) ) != 0 ) {
-		DBGC ( netdev, "NDP could not define %s => %s: %s\n",
-		       inet6_ntoa ( &sin6_src->sin6_addr ),
-		       ll_protocol->ntoa ( ll_addr_opt->ll_addr ),
-		       strerror ( rc ) );
-		return rc;
+	for ( ndp = ndp_table ; ndp < ndp_table_end ; ndp++ ) {
+		if ( IP6_EQUAL ( ( *in6 ), ndp->in6 ) && 
+		     ( ndp->state != NDP_STATE_INVALID ) ) {
+			return ndp;
+		}
 	}
-
-	/* Convert neighbour header to advertisement */
-	memset ( neigh, 0, offsetof ( typeof ( *neigh ), target ) );
-	neigh->icmp.type = ICMPV6_NEIGHBOUR_ADVERTISEMENT;
-	neigh->flags = ( NDP_NEIGHBOUR_SOLICITED | NDP_NEIGHBOUR_OVERRIDE );
-
-	/* Send neighbour advertisement */
-	if ( ( rc = ndp_tx_ll_addr ( netdev, NULL, sin6_src, neigh,
-				     sizeof ( *neigh ),
-				     NDP_OPT_LL_TARGET ) ) != 0 )
-		return rc;
-
-	return 0;
+	return NULL;
 }
 
 /**
- * Process NDP neighbour advertisement target link-layer address option
- *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP packet
- * @v option		NDP option
- * @v len		NDP option length
- * @ret rc		Return status code
- */
-static int
-ndp_rx_neighbour_advertisement_ll_target ( struct net_device *netdev,
-					   struct sockaddr_in6 *sin6_src
-						   __unused,
-					   union ndp_header *ndp,
-					   union ndp_option *option,
-					   size_t len ) {
-	struct ndp_neighbour_header *neigh = &ndp->neigh;
-	struct ndp_ll_addr_option *ll_addr_opt = &option->ll_addr;
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	int rc;
-
-	/* Sanity check */
-	if ( offsetof ( typeof ( *ll_addr_opt ),
-			ll_addr[ll_protocol->ll_addr_len] ) > len ) {
-		DBGC ( netdev, "NDP neighbour advertisement link-layer address "
-		       "option too short at %zd bytes\n", len );
-		return -EINVAL;
-	}
-
-	/* Update neighbour cache entry, if any */
-	if ( ( rc = neighbour_update ( netdev, &ipv6_protocol, &neigh->target,
-				       ll_addr_opt->ll_addr ) ) != 0 ) {
-		DBGC ( netdev, "NDP could not update %s => %s: %s\n",
-		       inet6_ntoa ( &neigh->target ),
-		       ll_protocol->ntoa ( ll_addr_opt->ll_addr ),
-		       strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
+ * Add NDP entry
+ * 
+ * @v netdev	Network device
+ * @v in6	IP6 address
+ * @v ll_addr	Link-layer address
+ * @v state	State of the entry - one of the NDP_STATE_XXX values
+ */
+static void 
+add_ndp_entry ( struct net_device *netdev, struct in6_addr *in6,
+		void *ll_addr, int state ) {
+	struct ndp_entry *ndp;
+	ndp = &ndp_table[next_new_ndp_entry++ % NUM_NDP_ENTRIES];
+
+	/* Fill up entry */
+	ndp->ll_protocol = netdev->ll_protocol;
+	memcpy ( &ndp->in6, &( *in6 ), sizeof ( *in6 ) );
+	if ( ll_addr ) {
+		memcpy ( ndp->ll_addr, ll_addr, netdev->ll_protocol->ll_addr_len );
+	} else {
+		memset ( ndp->ll_addr, 0, netdev->ll_protocol->ll_addr_len );
+	}
+	ndp->state = state;
+	DBG ( "New neighbour cache entry: IP6 %s => %s %s\n",
+	      inet6_ntoa ( ndp->in6 ), netdev->ll_protocol->name,
+	      netdev->ll_protocol->ntoa ( ndp->ll_addr ) );
 }
 
 /**
- * Process NDP router advertisement source link-layer address option
- *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP packet
- * @v option		NDP option
- * @v len		NDP option length
- * @ret rc		Return status code
+ * Resolve the link-layer address
+ *
+ * @v netdev		Network device
+ * @v dest		Destination address
+ * @v src		Source address
+ * @ret dest_ll_addr	Destination link-layer address or NULL
+ * @ret rc		Status
+ *
+ * This function looks up the neighbour cache for an entry corresponding to the
+ * destination address. If it finds a valid entry, it fills up dest_ll_addr and
+ * returns 0. Otherwise it sends a neighbour solicitation to the solicited
+ * multicast address.
  */
-static int
-ndp_rx_router_advertisement_ll_source ( struct net_device *netdev,
-					struct sockaddr_in6 *sin6_src,
-					union ndp_header *ndp __unused,
-					union ndp_option *option, size_t len ) {
-	struct ndp_ll_addr_option *ll_addr_opt = &option->ll_addr;
+int ndp_resolve ( struct net_device *netdev, struct in6_addr *dest,
+		  struct in6_addr *src, void *dest_ll_addr ) {
 	struct ll_protocol *ll_protocol = netdev->ll_protocol;
+	struct ndp_entry *ndp;
 	int rc;
 
-	/* Sanity check */
-	if ( offsetof ( typeof ( *ll_addr_opt ),
-			ll_addr[ll_protocol->ll_addr_len] ) > len ) {
-		DBGC ( netdev, "NDP router advertisement link-layer address "
-		       "option too short at %zd bytes\n", len );
-		return -EINVAL;
-	}
-
-	/* Define neighbour cache entry */
-	if ( ( rc = neighbour_define ( netdev, &ipv6_protocol,
-				       &sin6_src->sin6_addr,
-				       ll_addr_opt->ll_addr ) ) != 0 ) {
-		DBGC ( netdev, "NDP could not define %s => %s: %s\n",
-		       inet6_ntoa ( &sin6_src->sin6_addr ),
-		       ll_protocol->ntoa ( ll_addr_opt->ll_addr ),
-		       strerror ( rc ) );
-		return rc;
+	ndp = ndp_find_entry ( dest );
+	/* Check if the entry is valid */
+	if ( ndp && ndp->state == NDP_STATE_REACHABLE ) {
+		DBG ( "Neighbour cache hit: IP6 %s => %s %s\n",
+		      inet6_ntoa ( *dest ), ll_protocol->name,
+		      ll_protocol->ntoa ( ndp->ll_addr ) );
+		memcpy ( dest_ll_addr, ndp->ll_addr, ll_protocol->ll_addr_len );
+		return 0;
 	}
 
-	return 0;
-}
-
-/**
- * Process NDP router advertisement prefix information option
- *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP packet
- * @v option		NDP option
- * @v len		NDP option length
- * @ret rc		Return status code
- */
-static int
-ndp_rx_router_advertisement_prefix ( struct net_device *netdev,
-				     struct sockaddr_in6 *sin6_src,
-				     union ndp_header *ndp,
-				     union ndp_option *option, size_t len ) {
-	struct ndp_router_advertisement_header *radv = &ndp->radv;
-	struct ndp_prefix_information_option *prefix_opt = &option->prefix;
-	struct in6_addr *router = &sin6_src->sin6_addr;
-	int rc;
-
-	/* Sanity check */
-	if ( sizeof ( *prefix_opt ) > len ) {
-		DBGC ( netdev, "NDP router advertisement prefix option too "
-		       "short at %zd bytes\n", len );
-		return -EINVAL;
-	}
-	DBGC ( netdev, "NDP found %sdefault router %s ",
-	       ( radv->lifetime ? "" : "non-" ),
-	       inet6_ntoa ( &sin6_src->sin6_addr ) );
-	DBGC ( netdev, "for %s-link %sautonomous prefix %s/%d\n",
-	       ( ( prefix_opt->flags & NDP_PREFIX_ON_LINK ) ? "on" : "off" ),
-	       ( ( prefix_opt->flags & NDP_PREFIX_AUTONOMOUS ) ? "" : "non-" ),
-	       inet6_ntoa ( &prefix_opt->prefix ),
-	       prefix_opt->prefix_len );
-
-	/* Perform stateless address autoconfiguration, if applicable */
-	if ( ( prefix_opt->flags &
-	       ( NDP_PREFIX_ON_LINK | NDP_PREFIX_AUTONOMOUS ) ) ==
-	     ( NDP_PREFIX_ON_LINK | NDP_PREFIX_AUTONOMOUS ) ) {
-		if ( ( rc = ipv6_slaac ( netdev, &prefix_opt->prefix,
-					 prefix_opt->prefix_len,
-					 ( radv->lifetime ?
-					   router : NULL ) ) ) != 0 ) {
-			DBGC ( netdev, "NDP could not autoconfigure prefix %s/"
-			       "%d: %s\n", inet6_ntoa ( &prefix_opt->prefix ),
-			       prefix_opt->prefix_len, strerror ( rc ) );
-			return rc;
-		}
+	/* Check if the entry was already created */
+	if ( ndp ) {
+		DBG ( "Awaiting neighbour advertisement\n" );
+		/* For test */
+//		ndp->state = NDP_STATE_REACHABLE;
+//		memcpy ( ndp->ll_addr, netdev->ll_addr, 6 );
+//		assert ( ndp->ll_protocol->ll_addr_len == 6 );
+//		icmp6_test_nadvert ( netdev, dest, ndp->ll_addr );
+//		assert ( ndp->state == NDP_STATE_REACHABLE );
+		/* Take it out till here */
+		return -ENOENT;
 	}
+	DBG ( "Neighbour cache miss: IP6 %s\n", inet6_ntoa ( *dest ) );
 
-	return 0;
-}
-
-/** An NDP option handler */
-struct ndp_option_handler {
-	/** ICMPv6 type */
-	uint8_t icmp_type;
-	/** Option type */
-	uint8_t option_type;
-	/**
-	 * Handle received option
-	 *
-	 * @v netdev		Network device
-	 * @v sin6_src		Source socket address
-	 * @v ndp		NDP packet
-	 * @v option		NDP option
-	 * @ret rc		Return status code
-	 */
-	int ( * rx ) ( struct net_device *netdev, struct sockaddr_in6 *sin6_src,
-		       union ndp_header *ndp, union ndp_option *option,
-		       size_t len );
-};
-
-/** NDP option handlers */
-static struct ndp_option_handler ndp_option_handlers[] = {
-	{
-		.icmp_type = ICMPV6_NEIGHBOUR_SOLICITATION,
-		.option_type = NDP_OPT_LL_SOURCE,
-		.rx = ndp_rx_neighbour_solicitation_ll_source,
-	},
-	{
-		.icmp_type = ICMPV6_NEIGHBOUR_ADVERTISEMENT,
-		.option_type = NDP_OPT_LL_TARGET,
-		.rx = ndp_rx_neighbour_advertisement_ll_target,
-	},
-	{
-		.icmp_type = ICMPV6_ROUTER_ADVERTISEMENT,
-		.option_type = NDP_OPT_LL_SOURCE,
-		.rx = ndp_rx_router_advertisement_ll_source,
-	},
-	{
-		.icmp_type = ICMPV6_ROUTER_ADVERTISEMENT,
-		.option_type = NDP_OPT_PREFIX,
-		.rx = ndp_rx_router_advertisement_prefix,
-	},
-};
+	/* Add entry in the neighbour cache */
+	add_ndp_entry ( netdev, dest, NULL, NDP_STATE_INCOMPLETE );
 
-/**
- * Process received NDP option
- *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP packet
- * @v option		NDP option
- * @v len		Option length
- * @ret rc		Return status code
- */
-static int ndp_rx_option ( struct net_device *netdev,
-			   struct sockaddr_in6 *sin6_src, union ndp_header *ndp,
-			   union ndp_option *option, size_t len ) {
-	struct ndp_option_handler *handler;
-	unsigned int i;
-
-	/* Locate a suitable option handler, if any */
-	for ( i = 0 ; i < ( sizeof ( ndp_option_handlers ) /
-			    sizeof ( ndp_option_handlers[0] ) ) ; i++ ) {
-		handler = &ndp_option_handlers[i];
-		if ( ( handler->icmp_type == ndp->icmp.type ) &&
-		     ( handler->option_type == option->header.type ) ) {
-			return handler->rx ( netdev, sin6_src, ndp,
-					     option, len );
-		}
+	/* Send neighbour solicitation */
+	if ( ( rc = icmp6_send_solicit ( netdev, src, dest ) ) != 0 ) {
+		return rc;
 	}
-
-	/* Silently ignore unknown options as per RFC 4861 */
-	return 0;
+	return -ENOENT;
 }
 
 /**
- * Process received NDP packet options
+ * Process neighbour advertisement
  *
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v ndp		NDP header
- * @v offset		Offset to NDP options
- * @v len		Length of NDP packet
- * @ret rc		Return status code
+ * @v iobuf	I/O buffer
+ * @v st_src	Source address
+ * @v st_dest	Destination address 
  */
-static int ndp_rx_options ( struct net_device *netdev,
-			    struct sockaddr_in6 *sin6_src,
-			    union ndp_header *ndp, size_t offset, size_t len ) {
-	union ndp_option *option;
-	size_t remaining;
-	size_t option_len;
-	int rc;
+int ndp_process_advert ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src __unused,
+			   struct sockaddr_tcpip *st_dest __unused ) {
+	struct neighbour_advert *nadvert = iobuf->data;
+	struct ndp_entry *ndp;
 
 	/* Sanity check */
-	if ( len < offset ) {
-		DBGC ( netdev, "NDP packet too short at %zd bytes (min %zd "
-		       "bytes)\n", len, offset );
+	if ( iob_len ( iobuf ) < sizeof ( *nadvert ) ) {
+		DBG ( "Packet too short (%zd bytes)\n", iob_len ( iobuf ) );
 		return -EINVAL;
 	}
 
-	/* Search for option */
-	option = ( ( ( void * ) ndp ) + offset );
-	remaining = ( len - offset );
-	while ( remaining ) {
-
-		/* Sanity check */
-		if ( ( remaining < sizeof ( option->header ) ) ||
-		     ( option->header.blocks == 0 ) ||
-		     ( remaining < ( option->header.blocks *
-				     NDP_OPTION_BLKSZ ) ) ) {
-			DBGC ( netdev, "NDP bad option length:\n" );
-			DBGC_HDA ( netdev, 0, option, remaining );
-			return -EINVAL;
+	assert ( nadvert->code == 0 );
+	assert ( nadvert->flags & ICMP6_FLAGS_SOLICITED );
+	assert ( nadvert->opt_type == 2 );
+
+	/* Update the neighbour cache, if entry is present */
+	ndp = ndp_find_entry ( &nadvert->target );
+	if ( ndp ) {
+
+	assert ( nadvert->opt_len ==
+			( ( 2 + ndp->ll_protocol->ll_addr_len ) / 8 ) );
+
+		if ( IP6_EQUAL ( ndp->in6, nadvert->target ) ) {
+			memcpy ( ndp->ll_addr, nadvert->opt_ll_addr,
+				 ndp->ll_protocol->ll_addr_len );
+			ndp->state = NDP_STATE_REACHABLE;
+			return 0;
 		}
-		option_len = ( option->header.blocks * NDP_OPTION_BLKSZ );
-
-		/* Handle option */
-		if ( ( rc = ndp_rx_option ( netdev, sin6_src, ndp, option,
-					    option_len ) ) != 0 )
-			return rc;
-
-		/* Move to next option */
-		option = ( ( ( void * ) option ) + option_len );
-		remaining -= option_len;
 	}
-
+	DBG ( "Unsolicited advertisement (dropping packet)\n" );
 	return 0;
 }
-
-/**
- * Process received NDP neighbour solicitation or advertisement
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v sin6_dest		Destination socket address
- * @ret rc		Return status code
- */
-static int ndp_rx_neighbour ( struct io_buffer *iobuf,
-			      struct net_device *netdev,
-			      struct sockaddr_in6 *sin6_src,
-			      struct sockaddr_in6 *sin6_dest __unused ) {
-	union ndp_header *ndp = iobuf->data;
-	struct ndp_neighbour_header *neigh = &ndp->neigh;
-	size_t len = iob_len ( iobuf );
-	int rc;
-
-	/* Process options */
-	if ( ( rc = ndp_rx_options ( netdev, sin6_src, ndp,
-				     offsetof ( typeof ( *neigh ), option ),
-				     len ) ) != 0 )
-		goto err_options;
-
- err_options:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/**
- * Process received NDP router advertisement
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v sin6_src		Source socket address
- * @v sin6_dest		Destination socket address
- * @ret rc		Return status code
- */
-static int
-ndp_rx_router_advertisement ( struct io_buffer *iobuf,
-			      struct net_device *netdev,
-			      struct sockaddr_in6 *sin6_src,
-			      struct sockaddr_in6 *sin6_dest __unused ) {
-	union ndp_header *ndp = iobuf->data;
-	struct ndp_router_advertisement_header *radv = &ndp->radv;
-	size_t len = iob_len ( iobuf );
-	int rc;
-
-	/* Process options */
-	if ( ( rc = ndp_rx_options ( netdev, sin6_src, ndp,
-				     offsetof ( typeof ( *radv ), option ),
-				     len ) ) != 0 )
-		goto err_options;
-
-	/* Pass to IPv6 autoconfiguration */
-	if ( ( rc = ipv6conf_rx_router_advertisement ( netdev,
-						       radv->flags ) ) != 0 )
-		goto err_ipv6conf;
-
- err_ipv6conf:
- err_options:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/** NDP ICMPv6 handlers */
-struct icmpv6_handler ndp_handlers[] __icmpv6_handler = {
-	{
-		.type = ICMPV6_NEIGHBOUR_SOLICITATION,
-		.rx = ndp_rx_neighbour,
-	},
-	{
-		.type = ICMPV6_NEIGHBOUR_ADVERTISEMENT,
-		.rx = ndp_rx_neighbour,
-	},
-	{
-		.type = ICMPV6_ROUTER_ADVERTISEMENT,
-		.rx = ndp_rx_router_advertisement,
-	},
-};
-
-/****************************************************************************
- *
- * IPv6 autoconfiguration
- *
- */
-
-/** An IPv6 configurator */
-struct ipv6conf {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** List of configurators */
-	struct list_head list;
-
-	/** Job control interface */
-	struct interface job;
-
-	/** Network device being configured */
-	struct net_device *netdev;
-
-	/** Retransmission timer */
-	struct retry_timer timer;
-};
-
-/** List of IPv6 configurators */
-static LIST_HEAD ( ipv6confs );
-
-/**
- * Free IPv6 configurator
- *
- * @v refcnt		Reference count
- */
-static void ipv6conf_free ( struct refcnt *refcnt ) {
-	struct ipv6conf *ipv6conf =
-		container_of ( refcnt, struct ipv6conf, refcnt );
-
-	netdev_put ( ipv6conf->netdev );
-	free ( ipv6conf );
-}
-
-/**
- * Identify IPv6 configurator by network device
- *
- * @v netdev		Network device
- * @ret ipv6		IPv6 configurator, or NULL
- */
-static struct ipv6conf * ipv6conf_demux ( struct net_device *netdev ) {
-	struct ipv6conf *ipv6conf;
-
-	list_for_each_entry ( ipv6conf, &ipv6confs, list ) {
-		if ( ipv6conf->netdev == netdev )
-			return ipv6conf;
-	}
-	return NULL;
-}
-
-/**
- * Finish IPv6 autoconfiguration
- *
- * @v ipv6		IPv6 configurator
- * @v rc		Reason for finishing
- */
-static void ipv6conf_done ( struct ipv6conf *ipv6conf, int rc ) {
-
-	/* Shut down interfaces */
-	intf_shutdown ( &ipv6conf->job, rc );
-
-	/* Stop timer */
-	stop_timer ( &ipv6conf->timer );
-
-	/* Remove from list and drop list's reference */
-	list_del ( &ipv6conf->list );
-	ref_put ( &ipv6conf->refcnt );
-}
-
-/**
- * Handle IPv6 configurator timer expiry
- *
- * @v timer		Retry timer
- * @v fail		Failure indicator
- */
-static void ipv6conf_expired ( struct retry_timer *timer, int fail ) {
-	struct ipv6conf *ipv6conf =
-		container_of ( timer, struct ipv6conf, timer );
-
-	/* If we have failed, terminate autoconfiguration */
-	if ( fail ) {
-		ipv6conf_done ( ipv6conf, -ETIMEDOUT );
-		return;
-	}
-
-	/* Otherwise, transmit router solicitation and restart timer */
-	start_timer ( &ipv6conf->timer );
-	ndp_tx_router_solicitation ( ipv6conf->netdev );
-}
-
-/**
- * Handle router advertisement during IPv6 autoconfiguration
- *
- * @v netdev		Network device
- * @v flags		Router flags
- * @ret rc		Return status code
- */
-static int ipv6conf_rx_router_advertisement ( struct net_device *netdev,
-					      unsigned int flags ) {
-	struct ipv6conf *ipv6conf;
-
-	/* Identify IPv6 configurator, if any */
-	ipv6conf = ipv6conf_demux ( netdev );
-	if ( ! ipv6conf ) {
-		/* Not an error; router advertisements are processed
-		 * as a background activity even when no explicit
-		 * autoconfiguration is taking place.
-		 */
-		return 0;
-	}
-
-	/* Fail if stateful address autoconfiguration is required */
-	if ( flags & NDP_ROUTER_MANAGED ) {
-		ipv6conf_done ( ipv6conf, -ENOTSUP );
-		return -ENOTSUP;
-	}
-
-	/* Mark autoconfiguration as complete */
-	ipv6conf_done ( ipv6conf, 0 );
-
-	return 0;
-}
-
-/** IPv6 configurator job interface operations */
-static struct interface_operation ipv6conf_job_op[] = {
-	INTF_OP ( intf_close, struct ipv6conf *, ipv6conf_done ),
-};
-
-/** IPv6 configurator job interface descriptor */
-static struct interface_descriptor ipv6conf_job_desc =
-	INTF_DESC ( struct ipv6conf, job, ipv6conf_job_op );
-
-/**
- * Start IPv6 autoconfiguration
- *
- * @v job		Job control interface
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-int start_ipv6conf ( struct interface *job, struct net_device *netdev ) {
-	struct ipv6conf *ipv6conf;
-
-	/* Allocate and initialise structure */
-	ipv6conf = zalloc ( sizeof ( *ipv6conf ) );
-	if ( ! ipv6conf )
-		return -ENOMEM;
-	ref_init ( &ipv6conf->refcnt, ipv6conf_free );
-	intf_init ( &ipv6conf->job, &ipv6conf_job_desc, &ipv6conf->refcnt );
-	timer_init ( &ipv6conf->timer, ipv6conf_expired, &ipv6conf->refcnt );
-	ipv6conf->netdev = netdev_get ( netdev );
-
-	/* Start timer to initiate router solicitation */
-	start_timer_nodelay ( &ipv6conf->timer );
-
-	/* Attach parent interface, transfer reference to list, and return */
-	intf_plug_plug ( &ipv6conf->job, job );
-	list_add ( &ipv6conf->list, &ipv6confs );
-	return 0;
-}
-
-/** IPv6 network device configurator */
-struct net_device_configurator ipv6_configurator __net_device_configurator = {
-	.name = "ipv6",
-	.start = start_ipv6conf,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/neighbour.c ipxe-1.0.1~lliurex1505/src/net/neighbour.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/neighbour.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/neighbour.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,428 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/retry.h>
-#include <ipxe/timer.h>
-#include <ipxe/malloc.h>
-#include <ipxe/neighbour.h>
-
-/** @file
- *
- * Neighbour discovery
- *
- * This file implements the abstract functions of neighbour discovery,
- * independent of the underlying network protocol (e.g. ARP or NDP).
- *
- */
-
-/** Neighbour discovery minimum timeout */
-#define NEIGHBOUR_MIN_TIMEOUT ( TICKS_PER_SEC / 8 )
-
-/** Neighbour discovery maximum timeout */
-#define NEIGHBOUR_MAX_TIMEOUT ( TICKS_PER_SEC * 3 )
-
-/** The neighbour cache */
-struct list_head neighbours = LIST_HEAD_INIT ( neighbours );
-
-static void neighbour_expired ( struct retry_timer *timer, int over );
-
-/**
- * Free neighbour cache entry
- *
- * @v refcnt		Reference count
- */
-static void neighbour_free ( struct refcnt *refcnt ) {
-	struct neighbour *neighbour =
-		container_of ( refcnt, struct neighbour, refcnt );
-
-	/* Sanity check */
-	assert ( list_empty ( &neighbour->tx_queue ) );
-
-	/* Drop reference to network device */
-	netdev_put ( neighbour->netdev );
-
-	/* Free neighbour */
-	free ( neighbour );
-}
-
-/**
- * Create neighbour cache entry
- *
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @ret neighbour	Neighbour cache entry, or NULL if allocation failed
- */
-static struct neighbour * neighbour_create ( struct net_device *netdev,
-					     struct net_protocol *net_protocol,
-					     const void *net_dest ) {
-	struct neighbour *neighbour;
-
-	/* Allocate and initialise entry */
-	neighbour = zalloc ( sizeof ( *neighbour ) );
-	if ( ! neighbour )
-		return NULL;
-	ref_init ( &neighbour->refcnt, neighbour_free );
-	neighbour->netdev = netdev_get ( netdev );
-	neighbour->net_protocol = net_protocol;
-	memcpy ( neighbour->net_dest, net_dest,
-		 net_protocol->net_addr_len );
-	timer_init ( &neighbour->timer, neighbour_expired, &neighbour->refcnt );
-	neighbour->timer.min_timeout = NEIGHBOUR_MIN_TIMEOUT;
-	neighbour->timer.max_timeout = NEIGHBOUR_MAX_TIMEOUT;
-	INIT_LIST_HEAD ( &neighbour->tx_queue );
-
-	/* Transfer ownership to cache */
-	list_add ( &neighbour->list, &neighbours );
-
-	DBGC ( neighbour, "NEIGHBOUR %s %s %s created\n", netdev->name,
-	       net_protocol->name, net_protocol->ntoa ( net_dest ) );
-	return neighbour;
-}
-
-/**
- * Find neighbour cache entry
- *
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @ret neighbour	Neighbour cache entry, or NULL if not found
- */
-static struct neighbour * neighbour_find ( struct net_device *netdev,
-					   struct net_protocol *net_protocol,
-					   const void *net_dest ) {
-	struct neighbour *neighbour;
-
-	list_for_each_entry ( neighbour, &neighbours, list ) {
-		if ( ( neighbour->netdev == netdev ) &&
-		     ( neighbour->net_protocol == net_protocol ) &&
-		     ( memcmp ( neighbour->net_dest, net_dest,
-				net_protocol->net_addr_len ) == 0 ) ) {
-
-			/* Move to start of cache */
-			list_del ( &neighbour->list );
-			list_add ( &neighbour->list, &neighbours );
-
-			return neighbour;
-		}
-	}
-	return NULL;
-}
-
-/**
- * Start neighbour discovery
- *
- * @v neighbour		Neighbour cache entry
- * @v discovery		Neighbour discovery protocol
- * @v net_source	Source network-layer address
- */
-static void neighbour_discover ( struct neighbour *neighbour,
-				 struct neighbour_discovery *discovery,
-				 const void *net_source ) {
-	struct net_device *netdev = neighbour->netdev;
-	struct net_protocol *net_protocol = neighbour->net_protocol;
-
-	/* Record discovery protocol and source network-layer address */
-	neighbour->discovery = discovery;
-	memcpy ( neighbour->net_source, net_source,
-		 net_protocol->net_addr_len );
-
-	/* Start timer to trigger neighbour discovery */
-	start_timer_nodelay ( &neighbour->timer );
-
-	DBGC ( neighbour, "NEIGHBOUR %s %s %s discovering via %s\n",
-	       netdev->name, net_protocol->name,
-	       net_protocol->ntoa ( neighbour->net_dest ),
-	       neighbour->discovery->name );
-}
-
-/**
- * Complete neighbour discovery
- *
- * @v neighbour		Neighbour cache entry
- * @v ll_dest		Destination link-layer address
- */
-static void neighbour_discovered ( struct neighbour *neighbour,
-				   const void *ll_dest ) {
-	struct net_device *netdev = neighbour->netdev;
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-	struct net_protocol *net_protocol = neighbour->net_protocol;
-	struct io_buffer *iobuf;
-	int rc;
-
-	/* Fill in link-layer address */
-	memcpy ( neighbour->ll_dest, ll_dest, ll_protocol->ll_addr_len );
-	DBGC ( neighbour, "NEIGHBOUR %s %s %s is %s %s\n", netdev->name,
-	       net_protocol->name, net_protocol->ntoa ( neighbour->net_dest ),
-	       ll_protocol->name, ll_protocol->ntoa ( neighbour->ll_dest ) );
-
-	/* Stop retransmission timer */
-	stop_timer ( &neighbour->timer );
-
-	/* Transmit any packets in queue.  Take out a temporary
-	 * reference on the entry to prevent it from going out of
-	 * scope during the call to net_tx().
-	 */
-	ref_get ( &neighbour->refcnt );
-	while ( ( iobuf = list_first_entry ( &neighbour->tx_queue,
-					     struct io_buffer, list )) != NULL){
-		DBGC2 ( neighbour, "NEIGHBOUR %s %s %s transmitting deferred "
-			"packet\n", netdev->name, net_protocol->name,
-			net_protocol->ntoa ( neighbour->net_dest ) );
-		list_del ( &iobuf->list );
-		if ( ( rc = net_tx ( iobuf, netdev, net_protocol, ll_dest,
-				     netdev->ll_addr ) ) != 0 ) {
-			DBGC ( neighbour, "NEIGHBOUR %s %s %s could not "
-			       "transmit deferred packet: %s\n",
-			       netdev->name, net_protocol->name,
-			       net_protocol->ntoa ( neighbour->net_dest ),
-			       strerror ( rc ) );
-			/* Ignore error and continue */
-		}
-	}
-	ref_put ( &neighbour->refcnt );
-}
-
-/**
- * Destroy neighbour cache entry
- *
- * @v neighbour		Neighbour cache entry
- * @v rc		Reason for destruction
- */
-static void neighbour_destroy ( struct neighbour *neighbour, int rc ) {
-	struct net_device *netdev = neighbour->netdev;
-	struct net_protocol *net_protocol = neighbour->net_protocol;
-	struct io_buffer *iobuf;
-
-	/* Take ownership from cache */
-	list_del ( &neighbour->list );
-
-	/* Stop timer */
-	stop_timer ( &neighbour->timer );
-
-	/* Discard any outstanding I/O buffers */
-	while ( ( iobuf = list_first_entry ( &neighbour->tx_queue,
-					     struct io_buffer, list )) != NULL){
-		DBGC2 ( neighbour, "NEIGHBOUR %s %s %s discarding deferred "
-			"packet: %s\n", netdev->name, net_protocol->name,
-			net_protocol->ntoa ( neighbour->net_dest ),
-			strerror ( rc ) );
-		list_del ( &iobuf->list );
-		netdev_tx_err ( neighbour->netdev, iobuf, rc );
-	}
-
-	DBGC ( neighbour, "NEIGHBOUR %s %s %s destroyed: %s\n", netdev->name,
-	       net_protocol->name, net_protocol->ntoa ( neighbour->net_dest ),
-	       strerror ( rc ) );
-
-	/* Drop remaining reference */
-	ref_put ( &neighbour->refcnt );
-}
-
-/**
- * Handle neighbour timer expiry
- *
- * @v timer		Retry timer
- * @v fail		Failure indicator
- */
-static void neighbour_expired ( struct retry_timer *timer, int fail ) {
-	struct neighbour *neighbour =
-		container_of ( timer, struct neighbour, timer );
-	struct net_device *netdev = neighbour->netdev;
-	struct net_protocol *net_protocol = neighbour->net_protocol;
-	struct neighbour_discovery *discovery =
-		neighbour->discovery;
-	const void *net_dest = neighbour->net_dest;
-	const void *net_source = neighbour->net_source;
-	int rc;
-
-	/* If we have failed, destroy the cache entry */
-	if ( fail ) {
-		neighbour_destroy ( neighbour, -ETIMEDOUT );
-		return;
-	}
-
-	/* Restart the timer */
-	start_timer ( &neighbour->timer );
-
-	/* Transmit neighbour request */
-	if ( ( rc = discovery->tx_request ( netdev, net_protocol, net_dest,
-					    net_source ) ) != 0 ) {
-		DBGC ( neighbour, "NEIGHBOUR %s %s %s could not transmit %s "
-		       "request: %s\n", netdev->name, net_protocol->name,
-		       net_protocol->ntoa ( neighbour->net_dest ),
-		       neighbour->discovery->name, strerror ( rc ) );
-		/* Retransmit when timer expires */
-		return;
-	}
-}
-
-/**
- * Transmit packet, determining link-layer address via neighbour discovery
- *
- * @v iobuf		I/O buffer
- * @v netdev		Network device
- * @v discovery		Neighbour discovery protocol
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v net_source	Source network-layer address
- * @v ll_source		Source link-layer address
- * @ret rc		Return status code
- */
-int neighbour_tx ( struct io_buffer *iobuf, struct net_device *netdev,
-		   struct net_protocol *net_protocol, const void *net_dest,
-		   struct neighbour_discovery *discovery,
-		   const void *net_source, const void *ll_source ) {
-	struct neighbour *neighbour;
-
-	/* Find or create neighbour cache entry */
-	neighbour = neighbour_find ( netdev, net_protocol, net_dest );
-	if ( ! neighbour ) {
-		neighbour = neighbour_create ( netdev, net_protocol, net_dest );
-		if ( ! neighbour )
-			return -ENOMEM;
-		neighbour_discover ( neighbour, discovery, net_source );
-	}
-
-	/* If a link-layer address is available then transmit
-	 * immediately, otherwise queue for later transmission.
-	 */
-	if ( neighbour_has_ll_dest ( neighbour ) ) {
-		return net_tx ( iobuf, netdev, net_protocol, neighbour->ll_dest,
-				ll_source );
-	} else {
-		DBGC2 ( neighbour, "NEIGHBOUR %s %s %s deferring packet\n",
-			netdev->name, net_protocol->name,
-			net_protocol->ntoa ( net_dest ) );
-		list_add_tail ( &iobuf->list, &neighbour->tx_queue );
-		return -EAGAIN;
-	}
-}
-
-/**
- * Update existing neighbour cache entry
- *
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v ll_dest		Destination link-layer address
- * @ret rc		Return status code
- */
-int neighbour_update ( struct net_device *netdev,
-		       struct net_protocol *net_protocol,
-		       const void *net_dest, const void *ll_dest ) {
-	struct neighbour *neighbour;
-
-	/* Find neighbour cache entry */
-	neighbour = neighbour_find ( netdev, net_protocol, net_dest );
-	if ( ! neighbour )
-		return -ENOENT;
-
-	/* Set destination address */
-	neighbour_discovered ( neighbour, ll_dest );
-
-	return 0;
-}
-
-/**
- * Define neighbour cache entry
- *
- * @v netdev		Network device
- * @v net_protocol	Network-layer protocol
- * @v net_dest		Destination network-layer address
- * @v ll_dest		Destination link-layer address, if known
- * @ret rc		Return status code
- */
-int neighbour_define ( struct net_device *netdev,
-		       struct net_protocol *net_protocol,
-		       const void *net_dest, const void *ll_dest ) {
-	struct neighbour *neighbour;
-
-	/* Find or create neighbour cache entry */
-	neighbour = neighbour_find ( netdev, net_protocol, net_dest );
-	if ( ! neighbour ) {
-		neighbour = neighbour_create ( netdev, net_protocol, net_dest );
-		if ( ! neighbour )
-			return -ENOMEM;
-	}
-
-	/* Set destination address */
-	neighbour_discovered ( neighbour, ll_dest );
-
-	return 0;
-}
-
-/**
- * Update neighbour cache on network device state change or removal
- *
- * @v netdev		Network device
- */
-static void neighbour_flush ( struct net_device *netdev ) {
-	struct neighbour *neighbour;
-	struct neighbour *tmp;
-
-	/* Remove all neighbour cache entries when a network device is closed */
-	if ( ! netdev_is_open ( netdev ) ) {
-		list_for_each_entry_safe ( neighbour, tmp, &neighbours, list )
-			neighbour_destroy ( neighbour, -ENODEV );
-	}
-}
-
-/** Neighbour driver (for net device notifications) */
-struct net_driver neighbour_net_driver __net_driver = {
-	.name = "Neighbour",
-	.notify = neighbour_flush,
-	.remove = neighbour_flush,
-};
-
-/**
- * Discard some cached neighbour entries
- *
- * @ret discarded	Number of cached items discarded
- */
-static unsigned int neighbour_discard ( void ) {
-	struct neighbour *neighbour;
-
-	/* Drop oldest cache entry, if any */
-	neighbour = list_last_entry ( &neighbours, struct neighbour, list );
-	if ( neighbour ) {
-		neighbour_destroy ( neighbour, -ENOBUFS );
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-/**
- * Neighbour cache discarder
- *
- * Neighbour cache entries are deemed to have a high replacement cost,
- * since flushing an active neighbour cache entry midway through a TCP
- * transfer will cause substantial disruption.
- */
-struct cache_discarder neighbour_discarder __cache_discarder (CACHE_EXPENSIVE)={
-	.discard = neighbour_discard,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/netdevice.c ipxe-1.0.1~lliurex1505/src/net/netdevice.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/netdevice.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/netdevice.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -31,10 +30,8 @@
 #include <ipxe/tables.h>
 #include <ipxe/process.h>
 #include <ipxe/init.h>
-#include <ipxe/malloc.h>
 #include <ipxe/device.h>
 #include <ipxe/errortab.h>
-#include <ipxe/vlan.h>
 #include <ipxe/netdevice.h>
 
 /** @file
@@ -54,16 +51,6 @@
 #define EINFO_EUNKNOWN_LINK_STATUS \
 	__einfo_uniqify ( EINFO_EINPROGRESS, 0x01, "Unknown" )
 
-/** Default not-yet-attempted-configuration status code */
-#define EUNUSED_CONFIG __einfo_error ( EINFO_EUNUSED_CONFIG )
-#define EINFO_EUNUSED_CONFIG \
-	__einfo_uniqify ( EINFO_EINPROGRESS, 0x02, "Unused" )
-
-/** Default configuration-in-progress status code */
-#define EINPROGRESS_CONFIG __einfo_error ( EINFO_EINPROGRESS_CONFIG )
-#define EINFO_EINPROGRESS_CONFIG \
-	__einfo_uniqify ( EINFO_EINPROGRESS, 0x03, "Incomplete" )
-
 /** Default link-down status code */
 #define ENOTCONN_LINK_DOWN __einfo_error ( EINFO_ENOTCONN_LINK_DOWN )
 #define EINFO_ENOTCONN_LINK_DOWN \
@@ -73,8 +60,6 @@
 struct errortab netdev_errors[] __errortab = {
 	__einfo_errortab ( EINFO_EUNKNOWN_LINK_STATUS ),
 	__einfo_errortab ( EINFO_ENOTCONN_LINK_DOWN ),
-	__einfo_errortab ( EINFO_EUNUSED_CONFIG ),
-	__einfo_errortab ( EINFO_EINPROGRESS_CONFIG ),
 };
 
 /**
@@ -102,10 +87,8 @@
 static void netdev_notify ( struct net_device *netdev ) {
 	struct net_driver *driver;
 
-	for_each_table_entry ( driver, NET_DRIVERS ) {
-		if ( driver->notify )
-			driver->notify ( netdev );
-	}
+	for_each_table_entry ( driver, NET_DRIVERS )
+		driver->notify ( netdev );
 }
 
 /**
@@ -228,43 +211,6 @@
 }
 
 /**
- * Defer transmitted packet
- *
- * @v netdev		Network device
- * @v iobuf		I/O buffer
- *
- * Drivers may call netdev_tx_defer() if there is insufficient space
- * in the transmit descriptor ring.  Any packets deferred in this way
- * will be automatically retransmitted as soon as space becomes
- * available (i.e. as soon as the driver calls netdev_tx_complete()).
- *
- * The packet must currently be in the network device's TX queue.
- *
- * Drivers utilising netdev_tx_defer() must ensure that space in the
- * transmit descriptor ring is freed up @b before calling
- * netdev_tx_complete().  For example, if the ring is modelled using a
- * producer counter and a consumer counter, then the consumer counter
- * must be incremented before the call to netdev_tx_complete().
- * Failure to do this will cause the retransmitted packet to be
- * immediately redeferred (which will result in out-of-order
- * transmissions and other nastiness).
- */
-void netdev_tx_defer ( struct net_device *netdev, struct io_buffer *iobuf ) {
-
-	/* Catch data corruption as early as possible */
-	list_check_contains_entry ( iobuf, &netdev->tx_queue, list );
-
-	/* Remove from transmit queue */
-	list_del ( &iobuf->list );
-
-	/* Add to deferred transmit queue */
-	list_add_tail ( &iobuf->list, &netdev->tx_deferred );
-
-	/* Record "out of space" statistic */
-	netdev_tx_err ( netdev, NULL, -ENOBUFS );
-}
-
-/**
  * Discard transmitted packet
  *
  * @v netdev		Network device
@@ -309,13 +255,6 @@
 	/* Dequeue and free I/O buffer */
 	list_del ( &iobuf->list );
 	netdev_tx_err ( netdev, iobuf, rc );
-
-	/* Transmit first pending packet, if any */
-	if ( ( iobuf = list_first_entry ( &netdev->tx_deferred,
-					  struct io_buffer, list ) ) != NULL ) {
-		list_del ( &iobuf->list );
-		netdev_tx ( netdev, iobuf );
-	}
 }
 
 /**
@@ -329,9 +268,9 @@
 void netdev_tx_complete_next_err ( struct net_device *netdev, int rc ) {
 	struct io_buffer *iobuf;
 
-	if ( ( iobuf = list_first_entry ( &netdev->tx_queue, struct io_buffer,
-					  list ) ) != NULL ) {
+	list_for_each_entry ( iobuf, &netdev->tx_queue, list ) {
 		netdev_tx_complete_err ( netdev, iobuf, rc );
+		return;
 	}
 }
 
@@ -342,15 +281,10 @@
  */
 static void netdev_tx_flush ( struct net_device *netdev ) {
 
-	/* Discard any packets in the TX queue.  This will also cause
-	 * any packets in the deferred TX queue to be discarded
-	 * automatically.
-	 */
+	/* Discard any packets in the TX queue */
 	while ( ! list_empty ( &netdev->tx_queue ) ) {
 		netdev_tx_complete_next_err ( netdev, -ECANCELED );
 	}
-	assert ( list_empty ( &netdev->tx_queue ) );
-	assert ( list_empty ( &netdev->tx_deferred ) );
 }
 
 /**
@@ -456,41 +390,6 @@
 }
 
 /**
- * Finish network device configuration
- *
- * @v config		Network device configuration
- * @v rc		Reason for completion
- */
-static void netdev_config_close ( struct net_device_configuration *config,
-				  int rc ) {
-	struct net_device_configurator *configurator = config->configurator;
-	struct net_device *netdev = config->netdev;
-
-	/* Restart interface */
-	intf_restart ( &config->job, rc );
-
-	/* Record configuration result */
-	config->rc = rc;
-	if ( rc == 0 ) {
-		DBGC ( netdev, "NETDEV %s configured via %s\n",
-		       netdev->name, configurator->name );
-	} else {
-		DBGC ( netdev, "NETDEV %s configuration via %s failed: %s\n",
-		       netdev->name, configurator->name, strerror ( rc ) );
-	}
-}
-
-/** Network device configuration interface operations */
-static struct interface_operation netdev_config_ops[] = {
-	INTF_OP ( intf_close, struct net_device_configuration *,
-		  netdev_config_close ),
-};
-
-/** Network device configuration interface descriptor */
-static struct interface_descriptor netdev_config_desc =
-	INTF_DESC ( struct net_device_configuration, job, netdev_config_ops );
-
-/**
  * Free network device
  *
  * @v refcnt		Network device reference counter
@@ -508,41 +407,24 @@
 /**
  * Allocate network device
  *
- * @v priv_len		Length of private data area (net_device::priv)
+ * @v priv_size		Size of private data area (net_device::priv)
  * @ret netdev		Network device, or NULL
  *
  * Allocates space for a network device and its private data area.
  */
-struct net_device * alloc_netdev ( size_t priv_len ) {
+struct net_device * alloc_netdev ( size_t priv_size ) {
 	struct net_device *netdev;
-	struct net_device_configurator *configurator;
-	struct net_device_configuration *config;
-	unsigned int num_configs;
-	size_t confs_len;
 	size_t total_len;
 
-	num_configs = table_num_entries ( NET_DEVICE_CONFIGURATORS );
-	confs_len = ( num_configs * sizeof ( netdev->configs[0] ) );
-	total_len = ( sizeof ( *netdev ) + confs_len + priv_len );
+	total_len = ( sizeof ( *netdev ) + priv_size );
 	netdev = zalloc ( total_len );
 	if ( netdev ) {
 		ref_init ( &netdev->refcnt, free_netdev );
 		netdev->link_rc = -EUNKNOWN_LINK_STATUS;
 		INIT_LIST_HEAD ( &netdev->tx_queue );
-		INIT_LIST_HEAD ( &netdev->tx_deferred );
 		INIT_LIST_HEAD ( &netdev->rx_queue );
 		netdev_settings_init ( netdev );
-		config = netdev->configs;
-		for_each_table_entry ( configurator, NET_DEVICE_CONFIGURATORS ){
-			config->netdev = netdev;
-			config->configurator = configurator;
-			config->rc = -EUNUSED_CONFIG;
-			intf_init ( &config->job, &netdev_config_desc,
-				    &netdev->refcnt );
-			config++;
-		}
-		netdev->priv = ( ( ( void * ) netdev ) + sizeof ( *netdev ) +
-				 confs_len );
+		netdev->priv = ( ( ( void * ) netdev ) + sizeof ( *netdev ) );
 	}
 	return netdev;
 }
@@ -558,31 +440,21 @@
  */
 int register_netdev ( struct net_device *netdev ) {
 	static unsigned int ifindex = 0;
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
 	struct net_driver *driver;
-	uint32_t seed;
 	int rc;
 
-	/* Record device index and create device name */
-	netdev->index = ifindex++;
+	/* Create device name */
 	if ( netdev->name[0] == '\0' ) {
 		snprintf ( netdev->name, sizeof ( netdev->name ), "net%d",
-			   netdev->index );
+			   ifindex++ );
 	}
 
 	/* Set initial link-layer address, if not already set */
 	if ( ! netdev_has_ll_addr ( netdev ) ) {
-		ll_protocol->init_addr ( netdev->hw_addr, netdev->ll_addr );
+		netdev->ll_protocol->init_addr ( netdev->hw_addr,
+						 netdev->ll_addr );
 	}
 
-	/* Use least significant bits of the link-layer address to
-	 * improve the randomness of the (non-cryptographic) random
-	 * number generator.
-	 */
-	memcpy ( &seed, ( netdev->ll_addr + ll_protocol->ll_addr_len
-			  - sizeof ( seed ) ), sizeof ( seed ) );
-	srand ( rand() ^ seed );
-
 	/* Add to device list */
 	netdev_get ( netdev );
 	list_add_tail ( &netdev->list, &net_devices );
@@ -600,7 +472,7 @@
 
 	/* Probe device */
 	for_each_table_entry ( driver, NET_DRIVERS ) {
-		if ( driver->probe && ( rc = driver->probe ( netdev ) ) != 0 ) {
+		if ( ( rc = driver->probe ( netdev ) ) != 0 ) {
 			DBGC ( netdev, "NETDEV %s could not add %s device: "
 			       "%s\n", netdev->name, driver->name,
 			       strerror ( rc ) );
@@ -611,11 +483,8 @@
 	return 0;
 
  err_probe:
-	for_each_table_entry_continue_reverse ( driver, NET_DRIVERS ) {
-		if ( driver->remove )
-			driver->remove ( netdev );
-	}
-	clear_settings ( netdev_settings ( netdev ) );
+	for_each_table_entry_continue_reverse ( driver, NET_DRIVERS )
+		driver->remove ( netdev );
 	unregister_settings ( netdev_settings ( netdev ) );
  err_register_settings:
 	return rc;
@@ -658,8 +527,6 @@
  * @v netdev		Network device
  */
 void netdev_close ( struct net_device *netdev ) {
-	unsigned int num_configs;
-	unsigned int i;
 
 	/* Do nothing if device is already closed */
 	if ( ! ( netdev->state & NETDEV_OPEN ) )
@@ -667,15 +534,6 @@
 
 	DBGC ( netdev, "NETDEV %s closing\n", netdev->name );
 
-	/* Terminate any ongoing configurations.  Use intf_close()
-	 * rather than intf_restart() to allow the cancellation to be
-	 * reported back to us if a configuration is actually in
-	 * progress.
-	 */
-	num_configs = table_num_entries ( NET_DEVICE_CONFIGURATORS );
-	for ( i = 0 ; i < num_configs ; i++ )
-		intf_close ( &netdev->configs[i].job, -ECANCELED );
-
 	/* Remove from open devices list */
 	list_del ( &netdev->open_list );
 
@@ -707,19 +565,16 @@
 	netdev_close ( netdev );
 
 	/* Remove device */
-	for_each_table_entry_reverse ( driver, NET_DRIVERS ) {
-		if ( driver->remove )
-			driver->remove ( netdev );
-	}
+	for_each_table_entry_reverse ( driver, NET_DRIVERS )
+		driver->remove ( netdev );
 
 	/* Unregister per-netdev configuration settings */
-	clear_settings ( netdev_settings ( netdev ) );
 	unregister_settings ( netdev_settings ( netdev ) );
 
 	/* Remove from device list */
-	DBGC ( netdev, "NETDEV %s unregistered\n", netdev->name );
 	list_del ( &netdev->list );
 	netdev_put ( netdev );
+	DBGC ( netdev, "NETDEV %s unregistered\n", netdev->name );
 }
 
 /** Enable or disable interrupts
@@ -751,11 +606,6 @@
 struct net_device * find_netdev ( const char *name ) {
 	struct net_device *netdev;
 
-	/* Allow "netX" shortcut */
-	if ( strcmp ( name, "netX" ) == 0 )
-		return last_opened_netdev();
-
-	/* Identify network device by name */
 	list_for_each_entry ( netdev, &net_devices, list ) {
 		if ( strcmp ( netdev->name, name ) == 0 )
 			return netdev;
@@ -765,24 +615,6 @@
 }
 
 /**
- * Get network device by index
- *
- * @v index		Network device index
- * @ret netdev		Network device, or NULL
- */
-struct net_device * find_netdev_by_index ( unsigned int index ) {
-	struct net_device *netdev;
-
-	/* Identify network device by index */
-	list_for_each_entry ( netdev, &net_devices, list ) {
-		if ( netdev->index == index )
-			return netdev;
-	}
-
-	return NULL;
-}
-
-/**
  * Get network device by PCI bus:dev.fn address
  *
  * @v bus_type		Bus type
@@ -839,6 +671,13 @@
 	struct ll_protocol *ll_protocol = netdev->ll_protocol;
 	int rc;
 
+	/* Force a poll on the netdevice to (potentially) clear any
+	 * backed-up TX completions.  This is needed on some network
+	 * devices to avoid excessive losses due to small TX ring
+	 * sizes.
+	 */
+	netdev_poll ( netdev );
+
 	/* Add link-layer header */
 	if ( ( rc = ll_protocol->push ( netdev, iobuf, ll_dest, ll_source,
 					net_protocol->net_proto ) ) != 0 ) {
@@ -911,8 +750,13 @@
 		if ( netdev_rx_frozen ( netdev ) )
 			continue;
 
-		/* Process all received packets */
-		while ( ( iobuf = netdev_rx_dequeue ( netdev ) ) ) {
+		/* Process at most one received packet.  Give priority
+		 * to getting packets out of the NIC over processing
+		 * the received packets, because we advertise a window
+		 * that assumes that we can receive packets from the
+		 * NIC faster than they arrive.
+		 */
+		if ( ( iobuf = netdev_rx_dequeue ( netdev ) ) ) {
 
 			DBGC2 ( netdev, "NETDEV %s processing %p (%p+%zx)\n",
 				netdev->name, iobuf, iobuf->data,
@@ -948,184 +792,5 @@
 	net_poll();
 }
 
-/**
- * Get the VLAN tag (when VLAN support is not present)
- *
- * @v netdev		Network device
- * @ret tag		0, indicating that device is not a VLAN device
- */
-__weak unsigned int vlan_tag ( struct net_device *netdev __unused ) {
-	return 0;
-}
-
-/**
- * Identify VLAN device (when VLAN support is not present)
- *
- * @v trunk		Trunk network device
- * @v tag		VLAN tag
- * @ret netdev		VLAN device, if any
- */
-__weak struct net_device * vlan_find ( struct net_device *trunk __unused,
-				       unsigned int tag __unused ) {
-	return NULL;
-}
-
 /** Networking stack process */
 PERMANENT_PROCESS ( net_process, net_step );
-
-/**
- * Discard some cached network device data
- *
- * @ret discarded	Number of cached items discarded
- */
-static unsigned int net_discard ( void ) {
-	struct net_device *netdev;
-	struct io_buffer *iobuf;
-	unsigned int discarded = 0;
-
-	/* Try to drop one deferred TX packet from each network device */
-	for_each_netdev ( netdev ) {
-		if ( ( iobuf = list_first_entry ( &netdev->tx_deferred,
-						  struct io_buffer,
-						  list ) ) != NULL ) {
-
-			/* Discard first deferred packet */
-			list_del ( &iobuf->list );
-			free ( iobuf );
-
-			/* Report discard */
-			discarded++;
-		}
-	}
-
-	return discarded;
-}
-
-/** Network device cache discarder */
-struct cache_discarder net_discarder __cache_discarder ( CACHE_NORMAL ) = {
-	.discard = net_discard,
-};
-
-/**
- * Find network device configurator
- *
- * @v name		Name
- * @ret configurator	Network device configurator, or NULL
- */
-struct net_device_configurator * find_netdev_configurator ( const char *name ) {
-	struct net_device_configurator *configurator;
-
-	for_each_table_entry ( configurator, NET_DEVICE_CONFIGURATORS ) {
-		if ( strcmp ( configurator->name, name ) == 0 )
-			return configurator;
-	}
-	return NULL;
-}
-
-/**
- * Start network device configuration
- *
- * @v netdev		Network device
- * @v configurator	Network device configurator
- * @ret rc		Return status code
- */
-int netdev_configure ( struct net_device *netdev,
-		       struct net_device_configurator *configurator ) {
-	struct net_device_configuration *config =
-		netdev_configuration ( netdev, configurator );
-	int rc;
-
-	/* Check applicability of configurator */
-	if ( ! netdev_configurator_applies ( netdev, configurator ) ) {
-		DBGC ( netdev, "NETDEV %s does not support configuration via "
-		       "%s\n", netdev->name, configurator->name );
-		return -ENOTSUP;
-	}
-
-	/* Terminate any ongoing configuration */
-	intf_restart ( &config->job, -ECANCELED );
-
-	/* Mark configuration as being in progress */
-	config->rc = -EINPROGRESS_CONFIG;
-
-	DBGC ( netdev, "NETDEV %s starting configuration via %s\n",
-	       netdev->name, configurator->name );
-
-	/* Start configuration */
-	if ( ( rc = configurator->start ( &config->job, netdev ) ) != 0 ) {
-		DBGC ( netdev, "NETDEV %s could not start configuration via "
-		       "%s: %s\n", netdev->name, configurator->name,
-		       strerror ( rc ) );
-		config->rc = rc;
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Start network device configuration via all supported configurators
- *
- * @v netdev		Network device
- * @ret rc		Return status code
- */
-int netdev_configure_all ( struct net_device *netdev ) {
-	struct net_device_configurator *configurator;
-	int rc;
-
-	/* Start configuration for each configurator */
-	for_each_table_entry ( configurator, NET_DEVICE_CONFIGURATORS ) {
-
-		/* Skip any inapplicable configurators */
-		if ( ! netdev_configurator_applies ( netdev, configurator ) )
-			continue;
-
-		/* Start configuration */
-		if ( ( rc = netdev_configure ( netdev, configurator ) ) != 0 )
-			return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Check if network device has a configuration with a specified status code
- *
- * @v netdev		Network device
- * @v rc		Status code
- * @ret has_rc		Network device has a configuration with this status code
- */
-static int netdev_has_configuration_rc ( struct net_device *netdev, int rc ) {
-	unsigned int num_configs;
-	unsigned int i;
-
-	num_configs = table_num_entries ( NET_DEVICE_CONFIGURATORS );
-	for ( i = 0 ; i < num_configs ; i++ ) {
-		if ( netdev->configs[i].rc == rc )
-			return 1;
-	}
-	return 0;
-}
-
-/**
- * Check if network device configuration is in progress
- *
- * @v netdev		Network device
- * @ret is_in_progress	Network device configuration is in progress
- */
-int netdev_configuration_in_progress ( struct net_device *netdev ) {
-
-	return netdev_has_configuration_rc ( netdev, -EINPROGRESS_CONFIG );
-}
-
-/**
- * Check if network device has at least one successful configuration
- *
- * @v netdev		Network device
- * @v configurator	Configurator
- * @ret rc		Return status code
- */
-int netdev_configuration_ok ( struct net_device *netdev ) {
-
-	return netdev_has_configuration_rc ( netdev, 0 );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/netdev_settings.c ipxe-1.0.1~lliurex1505/src/net/netdev_settings.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/netdev_settings.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/netdev_settings.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -27,7 +26,6 @@
 #include <ipxe/settings.h>
 #include <ipxe/device.h>
 #include <ipxe/netdevice.h>
-#include <ipxe/init.h>
 
 /** @file
  *
@@ -35,194 +33,34 @@
  *
  */
 
-/** Network device predefined settings */
+/** Network device named settings */
 struct setting mac_setting __setting ( SETTING_NETDEV ) = {
 	.name = "mac",
 	.description = "MAC address",
 	.type = &setting_type_hex,
-};
-struct setting bustype_setting __setting ( SETTING_NETDEV ) = {
-	.name = "bustype",
-	.description = "Bus type",
-	.type = &setting_type_string,
-};
-struct setting busloc_setting __setting ( SETTING_NETDEV ) = {
-	.name = "busloc",
-	.description = "Bus location",
-	.type = &setting_type_uint32,
+	.tag = NETDEV_SETTING_TAG_MAC,
 };
 struct setting busid_setting __setting ( SETTING_NETDEV ) = {
 	.name = "busid",
 	.description = "Bus ID",
 	.type = &setting_type_hex,
+	.tag = NETDEV_SETTING_TAG_BUS_ID,
 };
-struct setting chip_setting __setting ( SETTING_NETDEV ) = {
-	.name = "chip",
-	.description = "Chip",
-	.type = &setting_type_string,
-};
-
-/**
- * Store MAC address setting
- *
- * @v netdev		Network device
- * @v data		Setting data, or NULL to clear setting
- * @v len		Length of setting data
- * @ret rc		Return status code
- */
-static int netdev_store_mac ( struct net_device *netdev,
-			      const void *data, size_t len ) {
-	struct ll_protocol *ll_protocol = netdev->ll_protocol;
-
-	/* Record new MAC address */
-	if ( data ) {
-		if ( len != netdev->ll_protocol->ll_addr_len )
-			return -EINVAL;
-		memcpy ( netdev->ll_addr, data, len );
-	} else {
-		/* Reset MAC address if clearing setting */
-		ll_protocol->init_addr ( netdev->hw_addr, netdev->ll_addr );
-	}
-
-	return 0;
-}
-
-/**
- * Fetch MAC address setting
- *
- * @v netdev		Network device
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int netdev_fetch_mac ( struct net_device *netdev, void *data,
-			      size_t len ) {
-
-	if ( len > netdev->ll_protocol->ll_addr_len )
-		len = netdev->ll_protocol->ll_addr_len;
-	memcpy ( data, netdev->ll_addr, len );
-	return netdev->ll_protocol->ll_addr_len;
-}
-
-/**
- * Fetch bus type setting
- *
- * @v netdev		Network device
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int netdev_fetch_bustype ( struct net_device *netdev, void *data,
-				  size_t len ) {
-	static const char *bustypes[] = {
-		[BUS_TYPE_PCI] = "PCI",
-		[BUS_TYPE_ISAPNP] = "ISAPNP",
-		[BUS_TYPE_EISA] = "EISA",
-		[BUS_TYPE_MCA] = "MCA",
-		[BUS_TYPE_ISA] = "ISA",
-		[BUS_TYPE_TAP] = "TAP",
-	};
-	struct device_description *desc = &netdev->dev->desc;
-	const char *bustype;
-
-	assert ( desc->bus_type < ( sizeof ( bustypes ) /
-				    sizeof ( bustypes[0] ) ) );
-	bustype = bustypes[desc->bus_type];
-	assert ( bustype != NULL );
-	strncpy ( data, bustype, len );
-	return strlen ( bustype );
-}
-
-/**
- * Fetch bus location setting
- *
- * @v netdev		Network device
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int netdev_fetch_busloc ( struct net_device *netdev, void *data,
-				 size_t len ) {
-	struct device_description *desc = &netdev->dev->desc;
-	uint32_t busloc;
-
-	busloc = cpu_to_be32 ( desc->location );
-	if ( len > sizeof ( busloc ) )
-		len = sizeof ( busloc );
-	memcpy ( data, &busloc, len );
-	return sizeof ( busloc );
-}
-
-/**
- * Fetch bus ID setting
- *
- * @v netdev		Network device
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
- */
-static int netdev_fetch_busid ( struct net_device *netdev, void *data,
-				size_t len ) {
-	struct device_description *desc = &netdev->dev->desc;
-	struct dhcp_netdev_desc dhcp_desc;
-
-	dhcp_desc.type = desc->bus_type;
-	dhcp_desc.vendor = htons ( desc->vendor );
-	dhcp_desc.device = htons ( desc->device );
-	if ( len > sizeof ( dhcp_desc ) )
-		len = sizeof ( dhcp_desc );
-	memcpy ( data, &dhcp_desc, len );
-	return sizeof ( dhcp_desc );
-}
 
 /**
- * Fetch chip setting
+ * Check applicability of network device setting
  *
- * @v netdev		Network device
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
+ * @v settings		Settings block
+ * @v setting		Setting
+ * @ret applies		Setting applies within this settings block
  */
-static int netdev_fetch_chip ( struct net_device *netdev, void *data,
-			       size_t len ) {
-	const char *chip = netdev->dev->driver_name;
+static int netdev_applies ( struct settings *settings __unused,
+			    struct setting *setting ) {
 
-	strncpy ( data, chip, len );
-	return strlen ( chip );
+	return ( IS_NETDEV_SETTING_TAG ( setting->tag ) ||
+		 dhcpopt_applies ( setting->tag ) );
 }
 
-/** A network device setting operation */
-struct netdev_setting_operation {
-	/** Setting */
-	struct setting *setting;
-	/** Store setting (or NULL if not supported)
-	 *
-	 * @v netdev		Network device
-	 * @v data		Setting data, or NULL to clear setting
-	 * @v len		Length of setting data
-	 * @ret rc		Return status code
-	 */
-	int ( * store ) ( struct net_device *netdev, const void *data,
-			  size_t len );
-	/** Fetch setting
-	 *
-	 * @v netdev		Network device
-	 * @v data		Buffer to fill with setting data
-	 * @v len		Length of buffer
-	 * @ret len		Length of setting data, or negative error
-	 */
-	int ( * fetch ) ( struct net_device *netdev, void *data, size_t len );
-};
-
-/** Network device settings */
-static struct netdev_setting_operation netdev_setting_operations[] = {
-	{ &mac_setting, netdev_store_mac, netdev_fetch_mac },
-	{ &bustype_setting, NULL, netdev_fetch_bustype },
-	{ &busloc_setting, NULL, netdev_fetch_busloc },
-	{ &busid_setting, NULL, netdev_fetch_busid },
-	{ &chip_setting, NULL, netdev_fetch_chip },
-};
-
 /**
  * Store value of network device setting
  *
@@ -236,21 +74,15 @@
 			  const void *data, size_t len ) {
 	struct net_device *netdev = container_of ( settings, struct net_device,
 						   settings.settings );
-	struct netdev_setting_operation *op;
-	unsigned int i;
 
-	/* Handle network device-specific settings */
-	for ( i = 0 ; i < ( sizeof ( netdev_setting_operations ) /
-			    sizeof ( netdev_setting_operations[0] ) ) ; i++ ) {
-		op = &netdev_setting_operations[i];
-		if ( setting_cmp ( setting, op->setting ) == 0 ) {
-			if ( op->store ) {
-				return op->store ( netdev, data, len );
-			} else {
-				return -ENOTSUP;
-			}
-		}
+	if ( setting_cmp ( setting, &mac_setting ) == 0 ) {
+		if ( len != netdev->ll_protocol->ll_addr_len )
+			return -EINVAL;
+		memcpy ( netdev->ll_addr, data, len );
+		return 0;
 	}
+	if ( setting_cmp ( setting, &busid_setting ) == 0 )
+		return -ENOTSUP;
 
 	return generic_settings_store ( settings, setting, data, len );
 }
@@ -260,23 +92,31 @@
  *
  * @v settings		Settings block
  * @v setting		Setting to fetch
- * @v data		Buffer to fill with setting data
- * @v len		Length of buffer
- * @ret len		Length of setting data, or negative error
+ * @v data		Setting data, or NULL to clear setting
+ * @v len		Length of setting data
+ * @ret rc		Return status code
  */
 static int netdev_fetch ( struct settings *settings, struct setting *setting,
 			  void *data, size_t len ) {
 	struct net_device *netdev = container_of ( settings, struct net_device,
 						   settings.settings );
-	struct netdev_setting_operation *op;
-	unsigned int i;
+	struct device_description *desc = &netdev->dev->desc;
+	struct dhcp_netdev_desc dhcp_desc;
 
-	/* Handle network device-specific settings */
-	for ( i = 0 ; i < ( sizeof ( netdev_setting_operations ) /
-			    sizeof ( netdev_setting_operations[0] ) ) ; i++ ) {
-		op = &netdev_setting_operations[i];
-		if ( setting_cmp ( setting, op->setting ) == 0 )
-			return op->fetch ( netdev, data, len );
+	if ( setting_cmp ( setting, &mac_setting ) == 0 ) {
+		if ( len > netdev->ll_protocol->ll_addr_len )
+			len = netdev->ll_protocol->ll_addr_len;
+		memcpy ( data, netdev->ll_addr, len );
+		return netdev->ll_protocol->ll_addr_len;
+	}
+	if ( setting_cmp ( setting, &busid_setting ) == 0 ) {
+		dhcp_desc.type = desc->bus_type;
+		dhcp_desc.vendor = htons ( desc->vendor );
+		dhcp_desc.device = htons ( desc->device );
+		if ( len > sizeof ( dhcp_desc ) )
+			len = sizeof ( dhcp_desc );
+		memcpy ( data, &dhcp_desc, len );
+		return sizeof ( dhcp_desc );
 	}
 
 	return generic_settings_fetch ( settings, setting, data, len );
@@ -293,55 +133,8 @@
 
 /** Network device configuration settings operations */
 struct settings_operations netdev_settings_operations = {
+	.applies = netdev_applies,
 	.store = netdev_store,
 	.fetch = netdev_fetch,
 	.clear = netdev_clear,
 };
-
-/**
- * Redirect "netX" settings block
- *
- * @v settings		Settings block
- * @ret settings	Underlying settings block
- */
-static struct settings * netdev_redirect ( struct settings *settings ) {
-	struct net_device *netdev;
-
-	/* Redirect to most recently opened network device */
-	netdev = last_opened_netdev();
-	if ( netdev ) {
-		return netdev_settings ( netdev );
-	} else {
-		return settings;
-	}
-}
-
-/** "netX" settings operations */
-static struct settings_operations netdev_redirect_settings_operations = {
-	.redirect = netdev_redirect,
-};
-
-/** "netX" settings */
-static struct settings netdev_redirect_settings = {
-	.refcnt = NULL,
-	.siblings = LIST_HEAD_INIT ( netdev_redirect_settings.siblings ),
-	.children = LIST_HEAD_INIT ( netdev_redirect_settings.children ),
-	.op = &netdev_redirect_settings_operations,
-};
-
-/** Initialise "netX" settings */
-static void netdev_redirect_settings_init ( void ) {
-	int rc;
-
-	if ( ( rc = register_settings ( &netdev_redirect_settings, NULL,
-					"netX" ) ) != 0 ) {
-		DBG ( "Could not register netX settings: %s\n",
-		      strerror ( rc ) );
-		return;
-	}
-}
-
-/** "netX" settings initialiser */
-struct init_fn netdev_redirect_settings_init_fn __init_fn ( INIT_LATE ) = {
-	.initialise = netdev_redirect_settings_init,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/nullnet.c ipxe-1.0.1~lliurex1505/src/net/nullnet.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/nullnet.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/nullnet.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/mount.c ipxe-1.0.1~lliurex1505/src/net/oncrpc/mount.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/mount.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/oncrpc/mount.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,119 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <libgen.h>
-#include <byteswap.h>
-#include <ipxe/time.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/open.h>
-#include <ipxe/features.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-#include <ipxe/nfs.h>
-#include <ipxe/mount.h>
-
-/** @file
- *
- * NFS MOUNT protocol
- *
- */
-
-/** MNT procedure number */
-#define MOUNT_MNT       1
-/** UMNT procedure number */
-#define MOUNT_UMNT      3
-
-/**
- * Send a MNT request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v mountpoinrt       The path of the directory to mount.
- * @ret rc              Return status code
- */
-int mount_mnt ( struct interface *intf, struct oncrpc_session *session,
-                const char *mountpoint ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_FIELD ( str, mountpoint ),
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, MOUNT_MNT, fields );
-}
-
-/**
- * Send a UMNT request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v mountpoinrt       The path of the directory to unmount.
- * @ret rc              Return status code
- */
-int mount_umnt ( struct interface *intf, struct oncrpc_session *session,
-                 const char *mountpoint ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_FIELD ( str, mountpoint ),
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, MOUNT_UMNT, fields );
-}
-
-/**
- * Parse an MNT reply
- *
- * @v mnt_reply         A structure where the data will be saved
- * @v reply             The ONC RPC reply to get data from
- * @ret rc              Return status code
- */
-int mount_get_mnt_reply ( struct mount_mnt_reply *mnt_reply,
-                          struct oncrpc_reply *reply ) {
-	if (  ! mnt_reply || ! reply )
-		return -EINVAL;
-
-	mnt_reply->status = oncrpc_iob_get_int ( reply->data );
-
-	switch ( mnt_reply->status )
-	{
-	case MNT3_OK:
-		break;
-	case MNT3ERR_NOENT:
-		return -ENOENT;
-	case MNT3ERR_IO:
-		return -EIO;
-	case MNT3ERR_ACCES:
-		return -EACCES;
-	case MNT3ERR_NOTDIR:
-		return -ENOTDIR;
-	case MNT3ERR_NAMETOOLONG:
-		return -ENAMETOOLONG;
-	default:
-		return -EPROTO;
-	}
-
-	nfs_iob_get_fh ( reply->data, &mnt_reply->fh );
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/nfs.c ipxe-1.0.1~lliurex1505/src/net/oncrpc/nfs.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/nfs.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/oncrpc/nfs.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,288 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <libgen.h>
-#include <byteswap.h>
-#include <ipxe/time.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/open.h>
-#include <ipxe/features.h>
-#include <ipxe/nfs.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-#include <ipxe/portmap.h>
-#include <ipxe/mount.h>
-#include <ipxe/settings.h>
-
-/** @file
- *
- * Network File System protocol
- *
- */
-
-/** NFS LOOKUP procedure */
-#define NFS_LOOKUP      3
-/** NFS READLINK procedure */
-#define NFS_READLINK    5
-/** NFS READ procedure */
-#define NFS_READ        6
-
-/**
- * Extract a file handle from the beginning of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v fh                File handle
- * @ret size            Size of the data read
- */
-size_t nfs_iob_get_fh ( struct io_buffer *io_buf, struct nfs_fh *fh ) {
-	fh->size = oncrpc_iob_get_int ( io_buf );
-
-	if ( fh->size > 64 )
-		return sizeof ( uint32_t );
-
-	memcpy (fh->fh, io_buf->data, fh->size );
-	iob_pull ( io_buf, fh->size );
-
-	return fh->size + sizeof ( uint32_t );
-}
-
-/**
- * Add a file handle to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v fh                File handle
- * @ret size            Size of the data written
- */
-size_t nfs_iob_add_fh ( struct io_buffer *io_buf, const struct nfs_fh *fh ) {
-	size_t s;
-
-	s = oncrpc_iob_add_int ( io_buf, fh->size );
-	memcpy ( iob_put ( io_buf, fh->size ), &fh->fh, fh->size );
-
-	return s + fh->size;
-}
-
-/**
- * Send a LOOKUP request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v fh                The file handle of the the directory
- * @v filename          The file name
- * @ret rc              Return status code
- */
-int nfs_lookup ( struct interface *intf, struct oncrpc_session *session,
-                 const struct nfs_fh *fh, const char *filename ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_SUBFIELD ( array, fh->size, &fh->fh ),
-		ONCRPC_FIELD ( str, filename ),
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, NFS_LOOKUP, fields );
-}
-
-/**
- * Send a READLINK request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v fh                The symlink file handle
- * @ret rc              Return status code
- */
-int nfs_readlink ( struct interface *intf, struct oncrpc_session *session,
-                   const struct nfs_fh *fh ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_SUBFIELD ( array, fh->size, &fh->fh ),
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, NFS_READLINK, fields );
-}
-
-/**
- * Send a READ request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v fh                The file handle
- * @v offset            Offset
- * @v count             Byte count
- * @ret rc              Return status code
- */
-int nfs_read ( struct interface *intf, struct oncrpc_session *session,
-               const struct nfs_fh *fh, uint64_t offset, uint32_t count ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_SUBFIELD ( array, fh->size, &fh->fh ),
-		ONCRPC_FIELD ( int64, offset ),
-		ONCRPC_FIELD ( int32, count ),
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, NFS_READ, fields );
-}
-
-/**
- * Parse a LOOKUP reply
- *
- * @v lookup_reply      A structure where the data will be saved
- * @v reply             The ONC RPC reply to get data from
- * @ret rc              Return status code
- */
-int nfs_get_lookup_reply ( struct nfs_lookup_reply *lookup_reply,
-                           struct oncrpc_reply *reply ) {
-	if ( ! lookup_reply || ! reply )
-		return -EINVAL;
-
-	lookup_reply->status = oncrpc_iob_get_int ( reply->data );
-	switch ( lookup_reply->status )
-	{
-	case NFS3_OK:
-		break;
-	case NFS3ERR_PERM:
-		return -EPERM;
-	case NFS3ERR_NOENT:
-		return -ENOENT;
-	case NFS3ERR_IO:
-		return -EIO;
-	case NFS3ERR_ACCES:
-		return -EACCES;
-	case NFS3ERR_NOTDIR:
-		return -ENOTDIR;
-	case NFS3ERR_NAMETOOLONG:
-		return -ENAMETOOLONG;
-	case NFS3ERR_STALE:
-		return -ESTALE;
-	case NFS3ERR_BADHANDLE:
-	case NFS3ERR_SERVERFAULT:
-	default:
-		return -EPROTO;
-	}
-
-	nfs_iob_get_fh ( reply->data, &lookup_reply->fh );
-
-	if ( oncrpc_iob_get_int ( reply->data ) == 1 )
-		lookup_reply->ent_type = oncrpc_iob_get_int ( reply->data );
-
-	return 0;
-}
-/**
- * Parse a READLINK reply
- *
- * @v readlink_reply    A structure where the data will be saved
- * @v reply             The ONC RPC reply to get data from
- * @ret rc              Return status code
- */
-int nfs_get_readlink_reply ( struct nfs_readlink_reply *readlink_reply,
-                             struct oncrpc_reply *reply ) {
-	if ( ! readlink_reply || ! reply )
-		return -EINVAL;
-
-	readlink_reply->status = oncrpc_iob_get_int ( reply->data );
-	switch ( readlink_reply->status )
-	{
-	case NFS3_OK:
-		 break;
-	case NFS3ERR_IO:
-		return -EIO;
-	case NFS3ERR_ACCES:
-		return -EACCES;
-	case NFS3ERR_INVAL:
-		return -EINVAL;
-	case NFS3ERR_NOTSUPP:
-		return -ENOTSUP;
-	case NFS3ERR_STALE:
-		return -ESTALE;
-	case NFS3ERR_BADHANDLE:
-	case NFS3ERR_SERVERFAULT:
-	default:
-		return -EPROTO;
-	}
-
-	if ( oncrpc_iob_get_int ( reply->data ) == 1 )
-		iob_pull ( reply->data, 5 * sizeof ( uint32_t ) +
-		                        8 * sizeof ( uint64_t ) );
-
-	readlink_reply->path_len = oncrpc_iob_get_int ( reply->data );
-	readlink_reply->path     = reply->data->data;
-
-	return 0;
-}
-
-/**
- * Parse a READ reply
- *
- * @v read_reply        A structure where the data will be saved
- * @v reply             The ONC RPC reply to get data from
- * @ret rc              Return status code
- */
-int nfs_get_read_reply ( struct nfs_read_reply *read_reply,
-                         struct oncrpc_reply *reply ) {
-	if ( ! read_reply || ! reply )
-		return -EINVAL;
-
-	read_reply->status = oncrpc_iob_get_int ( reply->data );
-	switch ( read_reply->status )
-	{
-	case NFS3_OK:
-		 break;
-	case NFS3ERR_PERM:
-		return -EPERM;
-	case NFS3ERR_NOENT:
-		return -ENOENT;
-	case NFS3ERR_IO:
-		return -EIO;
-	case NFS3ERR_NXIO:
-		return -ENXIO;
-	case NFS3ERR_ACCES:
-		return -EACCES;
-	case NFS3ERR_INVAL:
-		return -EINVAL;
-	case NFS3ERR_STALE:
-		return -ESTALE;
-	case NFS3ERR_BADHANDLE:
-	case NFS3ERR_SERVERFAULT:
-	default:
-		return -EPROTO;
-	}
-
-	if ( oncrpc_iob_get_int ( reply->data ) == 1 )
-	{
-		iob_pull ( reply->data, 5 * sizeof ( uint32_t ) );
-		read_reply->filesize = oncrpc_iob_get_int64 ( reply->data );
-		iob_pull ( reply->data, 7 * sizeof ( uint64_t ) );
-	}
-
-	read_reply->count    = oncrpc_iob_get_int ( reply->data );
-	read_reply->eof      = oncrpc_iob_get_int ( reply->data );
-	read_reply->data_len = oncrpc_iob_get_int ( reply->data );
-	read_reply->data     = reply->data->data;
-
-	if ( read_reply->count != read_reply->data_len )
-		return -EPROTO;
-
-	return 0;
-}
-
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/nfs_open.c ipxe-1.0.1~lliurex1505/src/net/oncrpc/nfs_open.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/nfs_open.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/oncrpc/nfs_open.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,711 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <libgen.h>
-#include <byteswap.h>
-#include <ipxe/time.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/in.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/uri.h>
-#include <ipxe/features.h>
-#include <ipxe/nfs.h>
-#include <ipxe/nfs_open.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-#include <ipxe/portmap.h>
-#include <ipxe/mount.h>
-
-/** @file
- *
- * Network File System protocol
- *
- */
-
-FEATURE ( FEATURE_PROTOCOL, "NFS", DHCP_EB_FEATURE_NFS, 1 );
-
-#define NFS_RSIZE 100000
-
-enum nfs_pm_state {
-	NFS_PORTMAP_NONE = 0,
-	NFS_PORTMAP_MOUNTPORT,
-	NFS_PORTMAP_NFSPORT,
-	MFS_PORTMAP_CLOSED,
-};
-
-enum nfs_mount_state {
-	NFS_MOUNT_NONE = 0,
-	NFS_MOUNT_MNT,
-	NFS_MOUNT_UMNT,
-	NFS_MOUNT_CLOSED,
-};
-
-enum nfs_state {
-	NFS_NONE = 0,
-	NFS_LOOKUP,
-	NFS_LOOKUP_SENT,
-	NFS_READLINK,
-	NFS_READLINK_SENT,
-	NFS_READ,
-	NFS_READ_SENT,
-	NFS_CLOSED,
-};
-
-/**
- * A NFS request
- *
- */
-struct nfs_request {
-	/** Reference counter */
-	struct refcnt           refcnt;
-	/** Data transfer interface */
-	struct interface        xfer;
-
-	struct interface        pm_intf;
-	struct interface        mount_intf;
-	struct interface        nfs_intf;
-
-	enum nfs_pm_state       pm_state;
-	enum nfs_mount_state    mount_state;
-	enum nfs_state          nfs_state;
-
-	struct oncrpc_session   pm_session;
-	struct oncrpc_session   mount_session;
-	struct oncrpc_session   nfs_session;
-
-	struct oncrpc_cred_sys  auth_sys;
-
-	char *                  hostname;
-	char *                  path;
-	char *                  mountpoint;
-	char *                  filename;
-	size_t                  filename_offset;
-
-	struct nfs_fh           readlink_fh;
-	struct nfs_fh           current_fh;
-	uint64_t                file_offset;
-
-	size_t                  remaining;
-	int                     eof;
-};
-
-static void nfs_step ( struct nfs_request *nfs );
-
-/**
- * Free NFS request
- *
- * @v refcnt		Reference counter
- */
-static void nfs_free ( struct refcnt *refcnt ) {
-	struct nfs_request      *nfs;
-
-	nfs = container_of ( refcnt, struct nfs_request, refcnt );
-	DBGC ( nfs, "NFS_OPEN %p freed\n", nfs );
-
-	free ( nfs->hostname );
-	free ( nfs->path );
-	free ( nfs->auth_sys.hostname );
-	free ( nfs );
-}
-
-/**
- * Mark NFS operation as complete
- *
- * @v nfs		NFS request
- * @v rc		Return status code
- */
-static void nfs_done ( struct nfs_request *nfs, int rc ) {
-	if ( rc == 0 && nfs->nfs_state != NFS_CLOSED )
-		rc = -ECONNRESET;
-
-	DBGC ( nfs, "NFS_OPEN %p completed (%s)\n", nfs, strerror ( rc ) );
-
-	intf_shutdown ( &nfs->xfer, rc );
-	intf_shutdown ( &nfs->pm_intf, rc );
-	intf_shutdown ( &nfs->mount_intf, rc );
-	intf_shutdown ( &nfs->nfs_intf, rc );
-}
-
-static int nfs_connect ( struct interface *intf, uint16_t port,
-                         const char *hostname ) {
-	struct sockaddr_tcpip   peer;
-	struct sockaddr_tcpip   local;
-
-	if ( ! intf || ! hostname || ! port )
-		return -EINVAL;
-
-	memset ( &peer, 0, sizeof ( peer ) );
-	memset ( &local, 0, sizeof ( local ) );
-	peer.st_port = htons ( port );
-
-	/* Use a local port < 1024 to avoid using the 'insecure' option in
-	 * /etc/exports file. */
-	local.st_flags = TCPIP_BIND_PRIVILEGED;
-
-	return xfer_open_named_socket ( intf, SOCK_STREAM,
-	                                ( struct sockaddr * ) &peer, hostname,
-                                        ( struct sockaddr * ) &local );
-}
-
-static void nfs_pm_step ( struct nfs_request *nfs ) {
-	int     rc;
-
-	if ( ! xfer_window ( &nfs->pm_intf ) )
-		return;
-
-	if ( nfs->pm_state == NFS_PORTMAP_NONE ) {
-		DBGC ( nfs, "NFS_OPEN %p GETPORT call (mount)\n", nfs );
-
-		rc = portmap_getport ( &nfs->pm_intf, &nfs->pm_session,
-		                       ONCRPC_MOUNT, MOUNT_VERS,
-		                       PORTMAP_PROTO_TCP );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->pm_state++;
-		return;
-	}
-
-	if ( nfs->pm_state == NFS_PORTMAP_NFSPORT ) {
-		DBGC ( nfs, "NFS_OPEN %p GETPORT call (nfs)\n", nfs );
-
-		rc = portmap_getport ( &nfs->pm_intf, &nfs->pm_session,
-		                       ONCRPC_NFS, NFS_VERS,
-		                       PORTMAP_PROTO_TCP );
-		if ( rc != 0 )
-			goto err;
-
-		return;
-	}
-
-	return;
-err:
-	nfs_done ( nfs, rc );
-}
-
-static int nfs_pm_deliver ( struct nfs_request *nfs,
-                            struct io_buffer *io_buf,
-                            struct xfer_metadata *meta __unused ) {
-	int                             rc;
-	struct oncrpc_reply             reply;
-	struct portmap_getport_reply    getport_reply;
-
-	oncrpc_get_reply ( &nfs->pm_session, &reply, io_buf );
-	if ( reply.accept_state != 0 )
-	{
-		rc = -EPROTO;
-		goto err;
-	}
-
-	if ( nfs->pm_state == NFS_PORTMAP_MOUNTPORT ) {
-		DBGC ( nfs, "NFS_OPEN %p got GETPORT reply (mount)\n", nfs );
-
-		rc = portmap_get_getport_reply ( &getport_reply, &reply );
-		if ( rc != 0 )
-			goto err;
-
-		rc = nfs_connect ( &nfs->mount_intf, getport_reply.port,
-	                           nfs->hostname );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->pm_state++;
-		nfs_pm_step ( nfs );
-
-		goto done;
-	}
-
-	if ( nfs->pm_state == NFS_PORTMAP_NFSPORT ) {
-		DBGC ( nfs, "NFS_OPEN %p got GETPORT reply (nfs)\n", nfs );
-
-		rc = portmap_get_getport_reply ( &getport_reply, &reply );
-		if ( rc != 0 )
-			goto err;
-
-		rc = nfs_connect ( &nfs->nfs_intf, getport_reply.port,
-	                           nfs->hostname );
-		if ( rc != 0 )
-			goto err;
-
-		intf_shutdown ( &nfs->pm_intf, 0 );
-		nfs->pm_state++;
-
-		goto done;
-	}
-
-	rc = -EPROTO;
-err:
-	nfs_done ( nfs, rc );
-done:
-	free_iob ( io_buf );
-	return 0;
-}
-
-static void nfs_mount_step ( struct nfs_request *nfs ) {
-	int     rc;
-
-	if ( ! xfer_window ( &nfs->mount_intf ) )
-		return;
-
-	if ( nfs->mount_state == NFS_MOUNT_NONE ) {
-		DBGC ( nfs, "NFS_OPEN %p MNT call (%s)\n", nfs,
-		       nfs->mountpoint );
-
-		rc = mount_mnt ( &nfs->mount_intf, &nfs->mount_session,
-		                 nfs->mountpoint );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->mount_state++;
-		return;
-	}
-
-	if ( nfs->mount_state == NFS_MOUNT_UMNT ) {
-		DBGC ( nfs, "NFS_OPEN %p UMNT call\n", nfs );
-
-		rc = mount_umnt ( &nfs->mount_intf, &nfs->mount_session,
-		                  nfs->mountpoint );
-		if ( rc != 0 )
-			goto err;
-	}
-
-	return;
-err:
-	nfs_done ( nfs, rc );
-}
-
-static int nfs_mount_deliver ( struct nfs_request *nfs,
-                               struct io_buffer *io_buf,
-                               struct xfer_metadata *meta __unused ) {
-	int                     rc;
-	char                    *sep;
-	struct oncrpc_reply     reply;
-	struct mount_mnt_reply  mnt_reply;
-
-	oncrpc_get_reply ( &nfs->mount_session, &reply, io_buf );
-	if ( reply.accept_state != 0 )
-	{
-		rc = -EPROTO;
-		goto err;
-	}
-
-	if ( nfs->mount_state == NFS_MOUNT_MNT ) {
-		DBGC ( nfs, "NFS_OPEN %p got MNT reply\n", nfs );
-		rc = mount_get_mnt_reply ( &mnt_reply, &reply );
-		if ( rc != 0 ) {
-			if ( mnt_reply.status != MNT3ERR_NOTDIR )
-				goto err;
-
-			if ( strcmp ( nfs->mountpoint, "/" ) == 0 )
-				goto err;
-
-			sep = strrchr ( nfs->mountpoint, '/' );
-			nfs->filename[-1] = '/';
-			nfs->filename     = sep + 1;
-			*sep = '\0';
-
-			DBGC ( nfs, "NFS_OPEN %p ENOTDIR received retrying" \
-			       "with %s\n", nfs, nfs->mountpoint );
-			goto done;
-		}
-
-		nfs->current_fh = mnt_reply.fh;
-		nfs->nfs_state = NFS_LOOKUP;
-		nfs_step ( nfs );
-
-		goto done;
-	}
-
-	if ( nfs->mount_state == NFS_MOUNT_UMNT ) {
-		DBGC ( nfs, "NFS_OPEN %p got UMNT reply\n", nfs );
-		nfs_done ( nfs, 0 );
-
-		goto done;
-	}
-
-	rc = -EPROTO;
-err:
-	nfs_done ( nfs, rc );
-done:
-	free_iob ( io_buf );
-	return 0;
-}
-
-static void nfs_step ( struct nfs_request *nfs ) {
-	int     rc;
-	char    *path_component = NULL;
-
-	if ( ! xfer_window ( &nfs->nfs_intf ) )
-		return;
-
-	if ( nfs->nfs_state == NFS_LOOKUP ) {
-		while ( path_component == NULL || path_component[0] == '\0') {
-			path_component = nfs->filename;
-			while ( *nfs->filename != '\0' ) {
-				nfs->filename_offset++;
-				if ( *nfs->filename++ == '/' ) {
-					*(nfs->filename - 1) = '\0';
-					break;
-				}
-			}
-		}
-
-		DBGC ( nfs, "NFS_OPEN %p LOOKUP call (%s)\n", nfs,
-                       path_component );
-
-		rc = nfs_lookup ( &nfs->nfs_intf, &nfs->nfs_session,
-		                  &nfs->current_fh, path_component );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->nfs_state++;
-		return;
-	}
-
-
-	if ( nfs->nfs_state == NFS_READLINK ) {
-		DBGC ( nfs, "NFS_OPEN %p READLINK call\n", nfs );
-
-		rc = nfs_readlink ( &nfs->nfs_intf, &nfs->nfs_session,
-		                    &nfs->readlink_fh );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->nfs_state++;
-		return;
-	}
-
-	if ( nfs->nfs_state == NFS_READ ) {
-		DBGC ( nfs, "NFS_OPEN %p READ call\n", nfs );
-
-		rc = nfs_read ( &nfs->nfs_intf, &nfs->nfs_session,
-		                &nfs->current_fh, nfs->file_offset,
-		                NFS_RSIZE );
-		if ( rc != 0 )
-			goto err;
-
-		nfs->nfs_state++;
-		return;
-	}
-
-	return;
-err:
-	nfs_done ( nfs, rc );
-}
-
-static int nfs_deliver ( struct nfs_request *nfs,
-                         struct io_buffer *io_buf,
-                         struct xfer_metadata *meta __unused ) {
-	int                     rc;
-	struct oncrpc_reply     reply;
-
-	if ( nfs->remaining == 0 ) {
-		oncrpc_get_reply ( &nfs->nfs_session, &reply, io_buf );
-		if ( reply.accept_state != 0 ) {
-			rc = -EPROTO;
-			goto err;
-		}
-	}
-
-	if ( nfs->nfs_state == NFS_LOOKUP_SENT ) {
-		struct nfs_lookup_reply lookup_reply;
-
-		DBGC ( nfs, "NFS_OPEN %p got LOOKUP reply\n", nfs );
-
-		rc = nfs_get_lookup_reply ( &lookup_reply, &reply );
-		if ( rc != 0 )
-			goto err;
-
-		if ( lookup_reply.ent_type == NFS_ATTR_SYMLINK ) {
-			nfs->readlink_fh = lookup_reply.fh;
-			nfs->nfs_state = NFS_READLINK;
-		} else {
-			nfs->current_fh = lookup_reply.fh;
-
-			if ( nfs->filename[0] == '\0' )
-				nfs->nfs_state = NFS_READ;
-			else
-				nfs->nfs_state--;
-		}
-
-		nfs_step ( nfs );
-		goto done;
-	}
-
-	if ( nfs->nfs_state == NFS_READLINK_SENT ) {
-		char                      *new_filename;
-		struct nfs_readlink_reply readlink_reply;
-
-		DBGC ( nfs, "NFS_OPEN %p got READLINK reply\n", nfs );
-
-		rc = nfs_get_readlink_reply ( &readlink_reply, &reply );
-		if ( rc != 0 )
-			goto err;
-
-		if ( readlink_reply.path_len == 0 )
-			return -EINVAL;
-
-		if ( readlink_reply.path[0] == '/' ) {
-			if ( strncmp ( readlink_reply.path, nfs->mountpoint,
-			               strlen ( nfs->mountpoint ) ) != 0 )
-				return -EINVAL;
-
-			/* The mountpoint part of the path is ended by a '/' */
-			if ( strlen ( nfs->mountpoint ) !=
-			     readlink_reply.path_len ) {
-				readlink_reply.path     += 1;
-				readlink_reply.path_len -= 1;
-			}
-
-			/* We are considering the last part of the absolute
-			 * path as a relative path from the mountpoint.
-			 */
-			readlink_reply.path     += strlen ( nfs->mountpoint );
-			readlink_reply.path_len -= strlen ( nfs->mountpoint );
-		}
-
-		new_filename = malloc ( readlink_reply.path_len +
-		                        strlen ( nfs->filename ) + 2 );
-		if ( ! new_filename ) {
-			rc = -ENOMEM;
-			goto err;
-		}
-
-		memcpy ( new_filename, readlink_reply.path,
-		         readlink_reply.path_len );
-		strcpy ( new_filename + readlink_reply.path_len + 1,
-		         nfs->filename );
-		new_filename[readlink_reply.path_len] = '/';
-
-		free ( nfs->filename - nfs->filename_offset );
-		nfs->filename = new_filename;
-		nfs->filename_offset = 0;
-
-		DBGC ( nfs, "NFS_OPEN %p new filename: %s\n", nfs,
-		       nfs->filename );
-
-		nfs->nfs_state = NFS_LOOKUP;
-		nfs_step ( nfs );
-		goto done;
-	}
-
-	if ( nfs->nfs_state == NFS_READ_SENT ) {
-		if ( nfs->remaining == 0 ) {
-			DBGC ( nfs, "NFS_OPEN %p got READ reply\n", nfs );
-
-			struct nfs_read_reply read_reply;
-
-			rc = nfs_get_read_reply ( &read_reply, &reply );
-			if ( rc != 0 )
-				goto err;
-
-			if ( nfs->file_offset == 0 ) {
-				DBGC2 ( nfs, "NFS_OPEN %p size: %llu bytes\n",
-				        nfs, read_reply.filesize );
-
-				xfer_seek ( &nfs->xfer, read_reply.filesize );
-				xfer_seek ( &nfs->xfer, 0 );
-			}
-
-			nfs->file_offset += read_reply.count;
-			nfs->remaining    = read_reply.count;
-			nfs->eof          = read_reply.eof;
-		}
-
-		size_t len = iob_len ( io_buf );
-		if ( len > nfs->remaining )
-			iob_unput ( io_buf, len - nfs->remaining );
-
-		nfs->remaining -= iob_len ( io_buf );
-
-		DBGC ( nfs, "NFS_OPEN %p got %zd bytes\n", nfs,
-		       iob_len ( io_buf ) );
-
-		rc = xfer_deliver_iob ( &nfs->xfer, iob_disown ( io_buf ) );
-		if ( rc != 0 )
-			goto err;
-
-		if ( nfs->remaining == 0 ) {
-			if ( ! nfs->eof ) {
-				nfs->nfs_state--;
-				nfs_step ( nfs );
-			} else {
-				intf_shutdown ( &nfs->nfs_intf, 0 );
-				nfs->nfs_state++;
-				nfs->mount_state++;
-				nfs_mount_step ( nfs );
-			}
-		}
-
-		return 0;
-	}
-
-	rc = -EPROTO;
-err:
-	nfs_done ( nfs, rc );
-done:
-	free_iob ( io_buf );
-	return 0;
-}
-
-/*****************************************************************************
- * Interfaces
- *
- */
-
-static struct interface_operation nfs_xfer_operations[] = {
-	INTF_OP ( intf_close, struct nfs_request *, nfs_done ),
-};
-
-/** NFS data transfer interface descriptor */
-static struct interface_descriptor nfs_xfer_desc =
-	INTF_DESC ( struct nfs_request, xfer, nfs_xfer_operations );
-
-static struct interface_operation nfs_pm_operations[] = {
-	INTF_OP ( intf_close, struct nfs_request *, nfs_done ),
-	INTF_OP ( xfer_deliver, struct nfs_request *, nfs_pm_deliver ),
-	INTF_OP ( xfer_window_changed, struct nfs_request *, nfs_pm_step ),
-};
-
-static struct interface_descriptor nfs_pm_desc =
-	INTF_DESC ( struct nfs_request, pm_intf, nfs_pm_operations );
-
-static struct interface_operation nfs_mount_operations[] = {
-	INTF_OP ( intf_close, struct nfs_request *, nfs_done ),
-	INTF_OP ( xfer_deliver, struct nfs_request *, nfs_mount_deliver ),
-	INTF_OP ( xfer_window_changed, struct nfs_request *, nfs_mount_step ),
-};
-
-static struct interface_descriptor nfs_mount_desc =
-	INTF_DESC ( struct nfs_request, mount_intf, nfs_mount_operations );
-
-static struct interface_operation nfs_operations[] = {
-	INTF_OP ( intf_close, struct nfs_request *, nfs_done ),
-	INTF_OP ( xfer_deliver, struct nfs_request *, nfs_deliver ),
-	INTF_OP ( xfer_window_changed, struct nfs_request *, nfs_step ),
-};
-
-static struct interface_descriptor nfs_desc =
-	INTF_DESC_PASSTHRU ( struct nfs_request, nfs_intf, nfs_operations,
-	                     xfer );
-
-/*****************************************************************************
- *
- * URI opener
- *
- */
-
-static int nfs_parse_uri ( struct nfs_request *nfs, const struct uri *uri ) {
-	int     rc;
-
-	if ( ! uri || ! uri->host || ! uri->path )
-		return -EINVAL;
-
-	if ( ! ( nfs->path = strdup ( uri->path ) ) )
-		return -ENOMEM;
-
-	if ( ! ( nfs->hostname = strdup ( uri->host ) ) ) {
-		rc = -ENOMEM;
-		goto err_hostname;
-	}
-
-	nfs->filename   = basename ( nfs->path );
-	nfs->mountpoint = dirname ( nfs->path );
-
-	if ( nfs->filename[0] == '\0' )
-		goto err_filename;
-
-	DBGC ( nfs, "NFS_OPEN %p URI parsed: (mountpoint=%s, filename=%s)\n",
-	       nfs, nfs->mountpoint, nfs->filename );
-
-	return 0;
-
-err_filename:
-	rc = -EINVAL;
-	free ( nfs->hostname );
-err_hostname:
-	free ( nfs->path );
-	return rc;
-}
-
-/**
- * Initiate a NFS connection
- *
- * @v xfer		Data transfer interface
- * @v uri		Uniform Resource Identifier
- * @ret rc		Return status code
- */
-static int nfs_open ( struct interface *xfer, struct uri *uri ) {
-	int                     rc;
-	struct nfs_request      *nfs;
-
-	nfs = zalloc ( sizeof ( *nfs ) );
-	if ( ! nfs )
-		return -ENOMEM;
-
-	rc = nfs_parse_uri( nfs, uri );
-	if ( rc != 0 )
-		goto err_uri;
-
-	rc = oncrpc_init_cred_sys ( &nfs->auth_sys );
-	if ( rc != 0 )
-		goto err_cred;
-
-	ref_init ( &nfs->refcnt, nfs_free );
-	intf_init ( &nfs->xfer, &nfs_xfer_desc, &nfs->refcnt );
-	intf_init ( &nfs->pm_intf, &nfs_pm_desc, &nfs->refcnt );
-	intf_init ( &nfs->mount_intf, &nfs_mount_desc, &nfs->refcnt );
-	intf_init ( &nfs->nfs_intf, &nfs_desc, &nfs->refcnt );
-
-	portmap_init_session ( &nfs->pm_session, &nfs->auth_sys.credential );
-	mount_init_session ( &nfs->mount_session, &nfs->auth_sys.credential );
-	nfs_init_session ( &nfs->nfs_session, &nfs->auth_sys.credential );
-
-	rc = nfs_connect ( &nfs->pm_intf, PORTMAP_PORT, nfs->hostname );
-	if ( rc != 0 )
-		goto err_connect;
-
-	/* Attach to parent interface, mortalise self, and return */
-	intf_plug_plug ( &nfs->xfer, xfer );
-	ref_put ( &nfs->refcnt );
-
-	return 0;
-
-err_connect:
-	free ( nfs->auth_sys.hostname );
-err_cred:
-err_uri:
-	free ( nfs );
-	return rc;
-}
-
-/** NFS URI opener */
-struct uri_opener nfs_uri_opener __uri_opener = {
-	.scheme	= "nfs",
-	.open	= nfs_open,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/oncrpc_iob.c ipxe-1.0.1~lliurex1505/src/net/oncrpc/oncrpc_iob.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/oncrpc_iob.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/oncrpc/oncrpc_iob.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,200 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/in.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/uri.h>
-#include <ipxe/features.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-
-/** @file
- *
- * SUN ONC RPC protocol
- *
- */
-
-size_t oncrpc_iob_add_fields ( struct io_buffer *io_buf,
-                               const struct oncrpc_field fields[] ) {
-	size_t i;
-	size_t s = 0;
-
-	struct oncrpc_field f;
-
-	if ( ! io_buf )
-		return 0;
-
-	for ( i = 0; fields[i].type != oncrpc_none; i++ ) {
-		f = fields[i];
-		switch ( f.type ) {
-		case oncrpc_int32:
-			s += oncrpc_iob_add_int ( io_buf, f.value.int32 );
-			break;
-
-		case oncrpc_int64:
-			s += oncrpc_iob_add_int64 ( io_buf, f.value.int64 );
-			break;
-
-		case oncrpc_str:
-			s += oncrpc_iob_add_string ( io_buf, f.value.str );
-			break;
-
-		case oncrpc_array:
-			s += oncrpc_iob_add_array ( io_buf,
-			                            f.value.array.length,
-			                            f.value.array.ptr );
-			break;
-
-		case oncrpc_intarray:
-			s += oncrpc_iob_add_intarray ( io_buf,
-			                               f.value.intarray.length,
-			                               f.value.intarray.ptr );
-			break;
-
-		case oncrpc_cred:
-			s += oncrpc_iob_add_cred ( io_buf, f.value.cred);
-			break;
-
-		default:
-			return s;
-		}
-	}
-
-	return s;
-}
-
-/**
- * Add an array of bytes to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v val               String
- * @ret size            Size of the data written
- *
- * In the ONC RPC protocol, every data is four byte paded, we add padding when
- * necessary by using oncrpc_align()
- */
-size_t oncrpc_iob_add_array ( struct io_buffer *io_buf, size_t length,
-                              const void *data ) {
-	size_t padding = oncrpc_align ( length ) - length;
-
-	oncrpc_iob_add_int ( io_buf, length );
-	memcpy ( iob_put ( io_buf, length ), data, length );
-	memset ( iob_put ( io_buf, padding ), 0, padding );
-
-	return length + padding + sizeof ( uint32_t );
-}
-
-/**
- * Add an int array to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v length            Length od the array
- * @v val               Int array
- * @ret size            Size of the data written
- */
-size_t oncrpc_iob_add_intarray ( struct io_buffer *io_buf, size_t length,
-                                 const uint32_t *array ) {
-	size_t                  i;
-
-	oncrpc_iob_add_int ( io_buf, length );
-
-	for ( i = 0; i < length; ++i )
-		oncrpc_iob_add_int ( io_buf, array[i] );
-
-	return ( ( length + 1 ) * sizeof ( uint32_t ) );
-}
-
-/**
- * Add credential information to the end of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v cred              Credential information
- * @ret size            Size of the data written
- */
-size_t oncrpc_iob_add_cred ( struct io_buffer *io_buf,
-                             const struct oncrpc_cred *cred ) {
-	struct oncrpc_cred_sys  *syscred;
-	size_t                  s;
-
-	struct oncrpc_field credfields[] = {
-		ONCRPC_FIELD ( int32, cred->flavor ),
-		ONCRPC_FIELD ( int32, cred->length ),
-		ONCRPC_FIELD_END,
-	};
-
-	if ( ! io_buf || ! cred )
-		return 0;
-
-	s  = oncrpc_iob_add_fields ( io_buf, credfields);
-
-	switch ( cred->flavor ) {
-	case ONCRPC_AUTH_NONE:
-		break;
-
-	case ONCRPC_AUTH_SYS:
-		syscred = container_of ( cred, struct oncrpc_cred_sys,
-		                         credential );
-
-		struct oncrpc_field syscredfields[] = {
-			ONCRPC_FIELD ( int32, syscred->stamp ),
-			ONCRPC_FIELD ( str, syscred->hostname ),
-			ONCRPC_FIELD ( int32, syscred->uid ),
-			ONCRPC_FIELD ( int32, syscred->gid ),
-			ONCRPC_SUBFIELD ( intarray, syscred->aux_gid_len,
-			                  syscred->aux_gid ),
-			ONCRPC_FIELD_END,
-		};
-
-		s += oncrpc_iob_add_fields ( io_buf, syscredfields );
-		break;
-	}
-
-	return s;
-}
-
-/**
- * Get credential information from the beginning of an I/O buffer
- *
- * @v io_buf            I/O buffer
- * @v cred              Struct where the information will be saved
- * @ret size            Size of the data read
- */
-size_t oncrpc_iob_get_cred ( struct io_buffer *io_buf,
-                             struct oncrpc_cred *cred ) {
-	if ( cred == NULL )
-		return * ( uint32_t * ) io_buf->data;
-
-	cred->flavor = oncrpc_iob_get_int ( io_buf );
-	cred->length = oncrpc_iob_get_int ( io_buf );
-
-	iob_pull ( io_buf, cred->length );
-
-	return ( 2 * sizeof ( uint32_t ) + cred->length );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/portmap.c ipxe-1.0.1~lliurex1505/src/net/oncrpc/portmap.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/oncrpc/portmap.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/oncrpc/portmap.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,90 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/in.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/uri.h>
-#include <ipxe/features.h>
-#include <ipxe/timer.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-#include <ipxe/portmap.h>
-
-/** @file
- *
- * PORTMAPPER protocol.
- *
- */
-
-/** PORTMAP GETPORT procedure. */
-#define PORTMAP_GETPORT 3
-
-/**
- * Send a GETPORT request
- *
- * @v intf              Interface to send the request on
- * @v session           ONC RPC session
- * @v prog              ONC RPC program number
- * @v vers              ONC RPC rogram version number
- * @v proto             Protocol (TCP or UDP)
- * @ret rc              Return status code
- */
-int portmap_getport ( struct interface *intf, struct oncrpc_session *session,
-                      uint32_t prog, uint32_t vers, uint32_t proto ) {
-	struct oncrpc_field fields[] = {
-		ONCRPC_FIELD ( int32, prog ),
-		ONCRPC_FIELD ( int32, vers ),
-		ONCRPC_FIELD ( int32, proto ),
-		ONCRPC_FIELD ( int32, 0 ), /* The port field is only meaningful
-		                              in GETPORT reply */
-		ONCRPC_FIELD_END,
-	};
-
-	return oncrpc_call ( intf, session, PORTMAP_GETPORT, fields );
-}
-
-/**
- * Parse a GETPORT reply
- *
- * @v getport_reply     A structure where the data will be saved
- * @v reply             The ONC RPC reply to get data from
- * @ret rc              Return status code
- */
-int portmap_get_getport_reply ( struct portmap_getport_reply *getport_reply,
-                                struct oncrpc_reply *reply ) {
-	if ( ! getport_reply || ! reply )
-		return -EINVAL;
-
-	getport_reply->port = oncrpc_iob_get_int ( reply->data );
-	if ( getport_reply == 0 || getport_reply->port >= 65536 )
-		return -EINVAL;
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/ping.c ipxe-1.0.1~lliurex1505/src/net/ping.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/ping.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/ping.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,273 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <string.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/list.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/icmp.h>
-#include <ipxe/interface.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ping.h>
-
-/** @file
- *
- * ICMP ping protocol
- *
- */
-
-/**
- * A ping connection
- *
- */
-struct ping_connection {
-	/** Reference counter */
-	struct refcnt refcnt;
-	/** List of ping connections */
-	struct list_head list;
-
-	/** Remote socket address */
-	struct sockaddr_tcpip peer;
-	/** Local port number */
-	uint16_t port;
-
-	/** Data transfer interface */
-	struct interface xfer;
-};
-
-/** List of registered ping connections */
-static LIST_HEAD ( ping_conns );
-
-/**
- * Identify ping connection by local port number
- *
- * @v port		Local port number
- * @ret ping		Ping connection, or NULL
- */
-static struct ping_connection * ping_demux ( unsigned int port ) {
-	struct ping_connection *ping;
-
-	list_for_each_entry ( ping, &ping_conns, list ) {
-		if ( ping->port == port )
-			return ping;
-	}
-	return NULL;
-}
-
-/**
- * Check if local port number is available
- *
- * @v port		Local port number
- * @ret port		Local port number, or negative error
- */
-static int ping_port_available ( int port ) {
-
-	return ( ping_demux ( port ) ? -EADDRINUSE : port );
-}
-
-/**
- * Process ICMP ping reply
- *
- * @v iobuf		I/O buffer
- * @v st_src		Source address
- * @ret rc		Return status code
- */
-int ping_rx ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src ) {
-	struct icmp_echo *echo = iobuf->data;
-	struct ping_connection *ping;
-	struct xfer_metadata meta;
-	int rc;
-
-	/* Sanity check: should already have been checked by ICMP layer */
-	assert ( iob_len ( iobuf ) >= sizeof ( *echo ) );
-
-	/* Identify connection */
-	ping = ping_demux ( ntohs ( echo->ident ) );
-	DBGC ( ping, "PING %p reply id %#04x seq %#04x\n",
-	       ping, ntohs ( echo->ident ), ntohs ( echo->sequence ) );
-	if ( ! ping ) {
-		rc = -ENOTCONN;
-		goto discard;
-	}
-
-	/* Strip header, construct metadata, and pass data to upper layer */
-	iob_pull ( iobuf, sizeof ( *echo ) );
-	memset ( &meta, 0, sizeof ( meta ) );
-	meta.src = ( ( struct sockaddr * ) st_src );
-	meta.flags = XFER_FL_ABS_OFFSET;
-	meta.offset = ntohs ( echo->sequence );
-	return xfer_deliver ( &ping->xfer, iob_disown ( iobuf ), &meta );
-
- discard:
-	free_iob ( iobuf );
-	return rc;
-}
-
-/**
- * Allocate I/O buffer for ping
- *
- * @v ping		Ping connection
- * @v len		Payload size
- * @ret iobuf		I/O buffer, or NULL
- */
-static struct io_buffer *
-ping_alloc_iob ( struct ping_connection *ping __unused, size_t len ) {
-	size_t header_len;
-	struct io_buffer *iobuf;
-
-	header_len = ( MAX_LL_NET_HEADER_LEN + sizeof ( struct icmp_echo ) );
-	iobuf = alloc_iob ( header_len + len );
-	if ( iobuf )
-		iob_reserve ( iobuf, header_len );
-	return iobuf;
-}
-
-/**
- * Deliver datagram as I/O buffer
- *
- * @v ping		Ping connection
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-static int ping_deliver ( struct ping_connection *ping, struct io_buffer *iobuf,
-			  struct xfer_metadata *meta ) {
-	struct icmp_echo *echo = iob_push ( iobuf, sizeof ( *echo ) );
-	int rc;
-
-	/* Construct header */
-	memset ( echo, 0, sizeof ( *echo ) );
-	echo->ident = htons ( ping->port );
-	echo->sequence = htons ( meta->offset );
-
-	/* Transmit echo request */
-	if ( ( rc = icmp_tx_echo_request ( iob_disown ( iobuf ),
-					   &ping->peer ) ) != 0 ) {
-		DBGC ( ping, "PING %p could not transmit: %s\n",
-		       ping, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Close ping connection
- *
- * @v ping		Ping connection
- * @v rc		Reason for close
- */
-static void ping_close ( struct ping_connection *ping, int rc ) {
-
-	/* Close data transfer interface */
-	intf_shutdown ( &ping->xfer, rc );
-
-	/* Remove from list of connections and drop list's reference */
-	list_del ( &ping->list );
-	ref_put ( &ping->refcnt );
-
-	DBGC ( ping, "PING %p closed\n", ping );
-}
-
-/** Ping data transfer interface operations */
-static struct interface_operation ping_xfer_operations[] = {
-	INTF_OP ( xfer_deliver, struct ping_connection *, ping_deliver ),
-	INTF_OP ( xfer_alloc_iob, struct ping_connection *, ping_alloc_iob ),
-	INTF_OP ( intf_close, struct ping_connection *, ping_close ),
-};
-
-/** Ping data transfer interface descriptor */
-static struct interface_descriptor ping_xfer_desc =
-	INTF_DESC ( struct ping_connection, xfer, ping_xfer_operations );
-
-/**
- * Open a ping connection
- *
- * @v xfer		Data transfer interface
- * @v peer		Peer socket address
- * @v local		Local socket address, or NULL
- * @ret rc		Return status code
- */
-static int ping_open ( struct interface *xfer, struct sockaddr *peer,
-		       struct sockaddr *local ) {
-	struct sockaddr_tcpip *st_peer = ( struct sockaddr_tcpip * ) peer;
-	struct sockaddr_tcpip *st_local = ( struct sockaddr_tcpip * ) local;
-	struct ping_connection *ping;
-	int port;
-	int rc;
-
-	/* Allocate and initialise structure */
-	ping = zalloc ( sizeof ( *ping ) );
-	if ( ! ping ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	DBGC ( ping, "PING %p allocated\n", ping );
-	ref_init ( &ping->refcnt, NULL );
-	intf_init ( &ping->xfer, &ping_xfer_desc, &ping->refcnt );
-	memcpy ( &ping->peer, st_peer, sizeof ( ping->peer ) );
-
-	/* Bind to local port */
-	port = tcpip_bind ( st_local, ping_port_available );
-	if ( port < 0 ) {
-		rc = port;
-		DBGC ( ping, "PING %p could not bind: %s\n",
-		       ping, strerror ( rc ) );
-		goto err_bind;
-	}
-	ping->port = port;
-	DBGC ( ping, "PING %p bound to id %#04x\n", ping, port );
-
-	/* Attach parent interface, transfer reference to connection
-	 * list, and return
-	 */
-	intf_plug_plug ( &ping->xfer, xfer );
-	list_add ( &ping->list, &ping_conns );
-	return 0;
-
- err_bind:
-	ref_put ( &ping->refcnt );
- err_alloc:
-	return rc;
-}
-
-/** Ping IPv4 socket opener */
-struct socket_opener ping_ipv4_socket_opener __socket_opener = {
-	.semantics	= PING_SOCK_ECHO,
-	.family		= AF_INET,
-	.open		= ping_open,
-};
-
-/** Ping IPv6 socket opener */
-struct socket_opener ping_ipv6_socket_opener __socket_opener = {
-	.semantics	= PING_SOCK_ECHO,
-	.family		= AF_INET6,
-	.open		= ping_open,
-};
-
-/** Linkage hack */
-int ping_sock_echo = PING_SOCK_ECHO;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/rarp.c ipxe-1.0.1~lliurex1505/src/net/rarp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/rarp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/rarp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/retry.c ipxe-1.0.1~lliurex1505/src/net/retry.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/retry.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/retry.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -177,10 +176,11 @@
 }
 
 /**
- * Poll the retry timer list
+ * Single-step the retry timer list
  *
+ * @v process		Retry timer process
  */
-void retry_poll ( void ) {
+static void retry_step ( struct process *process __unused ) {
 	struct retry_timer *timer;
 	unsigned long now = currticks();
 	unsigned long used;
@@ -199,14 +199,5 @@
 	}
 }
 
-/**
- * Single-step the retry timer list
- *
- * @v process		Retry timer process
- */
-static void retry_step ( struct process *process __unused ) {
-	retry_poll();
-}
-
 /** Retry timer process */
 PERMANENT_PROCESS ( retry_process, retry_step );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/socket.c ipxe-1.0.1~lliurex1505/src/net/socket.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/socket.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/socket.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,65 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stddef.h>
-#include <errno.h>
-#include <ipxe/socket.h>
-
-/** @file
- *
- * Sockets
- *
- */
-
-/**
- * Transcribe socket address
- *
- * @v sa		Socket address
- * @ret string		Socket address string
- */
-const char * sock_ntoa ( struct sockaddr *sa ) {
-	struct sockaddr_converter *converter;
-
-	for_each_table_entry ( converter, SOCKADDR_CONVERTERS ) {
-		if ( converter->family == sa->sa_family )
-			return converter->ntoa ( sa );
-	}
-	return NULL;
-}
-
-/**
- * Parse socket address
- *
- * @v string		Socket address string
- * @v sa		Socket address to fill in
- * @ret rc		Return status code
- */
-int sock_aton ( const char *string, struct sockaddr *sa ) {
-	struct sockaddr_converter *converter;
-
-	for_each_table_entry ( converter, SOCKADDR_CONVERTERS ) {
-		if ( converter->aton ( string, sa ) == 0 ) {
-			sa->sa_family = converter->family;
-			return 0;
-		}
-	}
-	return -EINVAL;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/ftp.c ipxe-1.0.1~lliurex1505/src/net/tcp/ftp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/ftp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/ftp.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,22 +1,3 @@
-/*
- * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
 #include <stdint.h>
 #include <stdlib.h>
 #include <stdio.h>
@@ -53,7 +34,6 @@
 	FTP_USER,
 	FTP_PASS,
 	FTP_TYPE,
-	FTP_SIZE,
 	FTP_PASV,
 	FTP_RETR,
 	FTP_WAIT,
@@ -88,8 +68,6 @@
 	char status_text[5];
 	/** Passive-mode parameters, as text */
 	char passive_text[24]; /* "aaa,bbb,ccc,ddd,eee,fff" */
-	/** File size, as text */
-	char filesize[20];
 };
 
 /**
@@ -179,7 +157,6 @@
 	[FTP_USER]	= { "USER ", ftp_user },
 	[FTP_PASS]	= { "PASS ", ftp_password },
 	[FTP_TYPE]	= { "TYPE I", NULL },
-	[FTP_SIZE]	= { "SIZE ", ftp_uri_path },
 	[FTP_PASV]	= { "PASV", NULL },
 	[FTP_RETR]	= { "RETR ", ftp_uri_path },
 	[FTP_WAIT]	= { NULL, NULL },
@@ -257,14 +234,6 @@
 	if ( status_major == '1' )
 		return;
 
-	/* If the SIZE command is not supported by the server, we go to
-	 * the next step.
-	 */
-	if ( ( status_major == '5' ) && ( ftp->state == FTP_SIZE ) ) {
-		ftp_next_state ( ftp );
-		return;
-	}
-
 	/* Anything other than success (2xx) or, in the case of a
 	 * repsonse to a "USER" command, a password prompt (3xx), is a
 	 * fatal error.
@@ -276,26 +245,6 @@
 		return;
 	}
 
-	/* Parse file size */
-	if ( ftp->state == FTP_SIZE ) {
-		size_t filesize;
-		char *endptr;
-
-		/* Parse size */
-		filesize = strtoul ( ftp->filesize, &endptr, 10 );
-		if ( *endptr != '\0' ) {
-			DBGC ( ftp, "FTP %p invalid SIZE \"%s\"\n",
-			       ftp, ftp->filesize );
-			ftp_done ( ftp, -EPROTO );
-			return;
-		}
-
-		/* Use seek() to notify recipient of filesize */
-		DBGC ( ftp, "FTP %p file size is %zd bytes\n", ftp, filesize );
-		xfer_seek ( &ftp->xfer, filesize );
-		xfer_seek ( &ftp->xfer, 0 );
-	}
-
 	/* Open passive connection when we get "PASV" response */
 	if ( ftp->state == FTP_PASV ) {
 		char *ptr = ftp->passive_text;
@@ -346,33 +295,35 @@
 	
 	while ( len-- ) {
 		c = *(data++);
-		if ( ( c == '\r' ) || ( c == '\n' ) ) {
+		switch ( c ) {
+		case '\r' :
+		case '\n' :
 			/* End of line: call ftp_reply() to handle
 			 * completed reply.  Avoid calling ftp_reply()
 			 * twice if we receive both \r and \n.
 			 */
-			if ( recvbuf != ftp->status_text )
+			if ( recvsize == 0 )
 				ftp_reply ( ftp );
 			/* Start filling up the status code buffer */
 			recvbuf = ftp->status_text;
 			recvsize = sizeof ( ftp->status_text ) - 1;
-		} else if ( ( ftp->state == FTP_PASV ) && ( c == '(' ) ) {
+			break;
+		case '(' :
 			/* Start filling up the passive parameter buffer */
 			recvbuf = ftp->passive_text;
 			recvsize = sizeof ( ftp->passive_text ) - 1;
-		} else if ( ( ftp->state == FTP_PASV ) && ( c == ')' ) ) {
+			break;
+		case ')' :
 			/* Stop filling the passive parameter buffer */
 			recvsize = 0;
-		} else if ( ( ftp->state == FTP_SIZE ) && ( c == ' ' ) ) {
-			/* Start filling up the file size buffer */
-			recvbuf = ftp->filesize;
-			recvsize = sizeof ( ftp->filesize ) - 1;
-		} else {
+			break;
+		default :
 			/* Fill up buffer if applicable */
 			if ( recvsize > 0 ) {
 				*(recvbuf++) = c;
 				recvsize--;
 			}
+			break;
 		}
 	}
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/http.c ipxe-1.0.1~lliurex1505/src/net/tcp/http.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/http.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/http.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -26,13 +25,869 @@
  *
  */
 
-#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <strings.h>
+#include <byteswap.h>
+#include <errno.h>
+#include <assert.h>
+#include <ipxe/uri.h>
+#include <ipxe/refcnt.h>
+#include <ipxe/iobuf.h>
+#include <ipxe/xfer.h>
 #include <ipxe/open.h>
-#include <ipxe/http.h>
+#include <ipxe/socket.h>
+#include <ipxe/tcpip.h>
+#include <ipxe/process.h>
+#include <ipxe/linebuf.h>
 #include <ipxe/features.h>
+#include <ipxe/base64.h>
+#include <ipxe/blockdev.h>
+#include <ipxe/acpi.h>
+#include <ipxe/http.h>
 
 FEATURE ( FEATURE_PROTOCOL, "HTTP", DHCP_EB_FEATURE_HTTP, 1 );
 
+/** Block size used for HTTP block device request */
+#define HTTP_BLKSIZE 512
+
+/** HTTP flags */
+enum http_flags {
+	/** Request is waiting to be transmitted */
+	HTTP_TX_PENDING = 0x0001,
+	/** Fetch header only */
+	HTTP_HEAD_ONLY = 0x0002,
+	/** Keep connection alive */
+	HTTP_KEEPALIVE = 0x0004,
+};
+
+/** HTTP receive state */
+enum http_rx_state {
+	HTTP_RX_RESPONSE = 0,
+	HTTP_RX_HEADER,
+	HTTP_RX_CHUNK_LEN,
+	HTTP_RX_DATA,
+	HTTP_RX_TRAILER,
+	HTTP_RX_IDLE,
+	HTTP_RX_DEAD,
+};
+
+/**
+ * An HTTP request
+ *
+ */
+struct http_request {
+	/** Reference count */
+	struct refcnt refcnt;
+	/** Data transfer interface */
+	struct interface xfer;
+	/** Partial transfer interface */
+	struct interface partial;
+
+	/** URI being fetched */
+	struct uri *uri;
+	/** Transport layer interface */
+	struct interface socket;
+
+	/** Flags */
+	unsigned int flags;
+	/** Starting offset of partial transfer (if applicable) */
+	size_t partial_start;
+	/** Length of partial transfer (if applicable) */
+	size_t partial_len;
+
+	/** TX process */
+	struct process process;
+
+	/** RX state */
+	enum http_rx_state rx_state;
+	/** Received length */
+	size_t rx_len;
+	/** Length remaining (or 0 if unknown) */
+	size_t remaining;
+	/** HTTP is using Transfer-Encoding: chunked */
+	int chunked;
+	/** Current chunk length remaining (if applicable) */
+	size_t chunk_remaining;
+	/** Line buffer for received header lines */
+	struct line_buffer linebuf;
+	/** Receive data buffer (if applicable) */
+	userptr_t rx_buffer;
+};
+
+/**
+ * Free HTTP request
+ *
+ * @v refcnt		Reference counter
+ */
+static void http_free ( struct refcnt *refcnt ) {
+	struct http_request *http =
+		container_of ( refcnt, struct http_request, refcnt );
+
+	uri_put ( http->uri );
+	empty_line_buffer ( &http->linebuf );
+	free ( http );
+};
+
+/**
+ * Close HTTP request
+ *
+ * @v http		HTTP request
+ * @v rc		Return status code
+ */
+static void http_close ( struct http_request *http, int rc ) {
+
+	/* Prevent further processing of any current packet */
+	http->rx_state = HTTP_RX_DEAD;
+
+	/* If we had a Content-Length, and the received content length
+	 * isn't correct, flag an error
+	 */
+	if ( http->remaining != 0 ) {
+		DBGC ( http, "HTTP %p incorrect length %zd, should be %zd\n",
+		       http, http->rx_len, ( http->rx_len + http->remaining ) );
+		if ( rc == 0 )
+			rc = -EIO;
+	}
+
+	/* Remove process */
+	process_del ( &http->process );
+
+	/* Close all data transfer interfaces */
+	intf_shutdown ( &http->socket, rc );
+	intf_shutdown ( &http->partial, rc );
+	intf_shutdown ( &http->xfer, rc );
+}
+
+/**
+ * Mark HTTP request as completed successfully
+ *
+ * @v http		HTTP request
+ */
+static void http_done ( struct http_request *http ) {
+
+	/* If we had a Content-Length, and the received content length
+	 * isn't correct, force an error
+	 */
+	if ( http->remaining != 0 ) {
+		http_close ( http, -EIO );
+		return;
+	}
+
+	/* Enter idle state */
+	http->rx_state = HTTP_RX_IDLE;
+	http->rx_len = 0;
+	assert ( http->remaining == 0 );
+	assert ( http->chunked == 0 );
+	assert ( http->chunk_remaining == 0 );
+
+	/* Close partial transfer interface */
+	intf_restart ( &http->partial, 0 );
+
+	/* Close everything unless we are keeping the connection alive */
+	if ( ! ( http->flags & HTTP_KEEPALIVE ) )
+		http_close ( http, 0 );
+}
+
+/**
+ * Convert HTTP response code to return status code
+ *
+ * @v response		HTTP response code
+ * @ret rc		Return status code
+ */
+static int http_response_to_rc ( unsigned int response ) {
+	switch ( response ) {
+	case 200:
+	case 206:
+	case 301:
+	case 302:
+		return 0;
+	case 404:
+		return -ENOENT;
+	case 403:
+		return -EPERM;
+	case 401:
+		return -EACCES;
+	default:
+		return -EIO;
+	}
+}
+
+/**
+ * Handle HTTP response
+ *
+ * @v http		HTTP request
+ * @v response		HTTP response
+ * @ret rc		Return status code
+ */
+static int http_rx_response ( struct http_request *http, char *response ) {
+	char *spc;
+	unsigned int code;
+	int rc;
+
+	DBGC ( http, "HTTP %p response \"%s\"\n", http, response );
+
+	/* Check response starts with "HTTP/" */
+	if ( strncmp ( response, "HTTP/", 5 ) != 0 )
+		return -EIO;
+
+	/* Locate and check response code */
+	spc = strchr ( response, ' ' );
+	if ( ! spc )
+		return -EIO;
+	code = strtoul ( spc, NULL, 10 );
+	if ( ( rc = http_response_to_rc ( code ) ) != 0 )
+		return rc;
+
+	/* Move to received headers */
+	http->rx_state = HTTP_RX_HEADER;
+	return 0;
+}
+
+/**
+ * Handle HTTP Location header
+ *
+ * @v http		HTTP request
+ * @v value		HTTP header value
+ * @ret rc		Return status code
+ */
+static int http_rx_location ( struct http_request *http, const char *value ) {
+	int rc;
+
+	/* Redirect to new location */
+	DBGC ( http, "HTTP %p redirecting to %s\n", http, value );
+	if ( ( rc = xfer_redirect ( &http->xfer, LOCATION_URI_STRING,
+				    value ) ) != 0 ) {
+		DBGC ( http, "HTTP %p could not redirect: %s\n",
+		       http, strerror ( rc ) );
+		return rc;
+	}
+
+	return 0;
+}
+
+/**
+ * Handle HTTP Content-Length header
+ *
+ * @v http		HTTP request
+ * @v value		HTTP header value
+ * @ret rc		Return status code
+ */
+static int http_rx_content_length ( struct http_request *http,
+				    const char *value ) {
+	struct block_device_capacity capacity;
+	size_t content_len;
+	char *endp;
+
+	/* Parse content length */
+	content_len = strtoul ( value, &endp, 10 );
+	if ( *endp != '\0' ) {
+		DBGC ( http, "HTTP %p invalid Content-Length \"%s\"\n",
+		       http, value );
+		return -EIO;
+	}
+
+	/* If we already have an expected content length, and this
+	 * isn't it, then complain
+	 */
+	if ( http->remaining && ( http->remaining != content_len ) ) {
+		DBGC ( http, "HTTP %p incorrect Content-Length %zd (expected "
+		       "%zd)\n", http, content_len, http->remaining );
+		return -EIO;
+	}
+	if ( ! ( http->flags & HTTP_HEAD_ONLY ) )
+		http->remaining = content_len;
+
+	/* Use seek() to notify recipient of filesize */
+	xfer_seek ( &http->xfer, http->remaining );
+	xfer_seek ( &http->xfer, 0 );
+
+	/* Report block device capacity if applicable */
+	if ( http->flags & HTTP_HEAD_ONLY ) {
+		capacity.blocks = ( content_len / HTTP_BLKSIZE );
+		capacity.blksize = HTTP_BLKSIZE;
+		capacity.max_count = -1U;
+		block_capacity ( &http->partial, &capacity );
+	}
+	return 0;
+}
+
+/**
+ * Handle HTTP Transfer-Encoding header
+ *
+ * @v http		HTTP request
+ * @v value		HTTP header value
+ * @ret rc		Return status code
+ */
+static int http_rx_transfer_encoding ( struct http_request *http,
+				       const char *value ) {
+
+	if ( strcmp ( value, "chunked" ) == 0 ) {
+		/* Mark connection as using chunked transfer encoding */
+		http->chunked = 1;
+	}
+
+	return 0;
+}
+
+/** An HTTP header handler */
+struct http_header_handler {
+	/** Name (e.g. "Content-Length") */
+	const char *header;
+	/** Handle received header
+	 *
+	 * @v http	HTTP request
+	 * @v value	HTTP header value
+	 * @ret rc	Return status code
+	 *
+	 * If an error is returned, the download will be aborted.
+	 */
+	int ( * rx ) ( struct http_request *http, const char *value );
+};
+
+/** List of HTTP header handlers */
+static struct http_header_handler http_header_handlers[] = {
+	{
+		.header = "Location",
+		.rx = http_rx_location,
+	},
+	{
+		.header = "Content-Length",
+		.rx = http_rx_content_length,
+	},
+	{
+		.header = "Transfer-Encoding",
+		.rx = http_rx_transfer_encoding,
+	},
+	{ NULL, NULL }
+};
+
+/**
+ * Handle HTTP header
+ *
+ * @v http		HTTP request
+ * @v header		HTTP header
+ * @ret rc		Return status code
+ */
+static int http_rx_header ( struct http_request *http, char *header ) {
+	struct http_header_handler *handler;
+	char *separator;
+	char *value;
+	int rc;
+
+	/* An empty header line marks the end of this phase */
+	if ( ! header[0] ) {
+		empty_line_buffer ( &http->linebuf );
+		if ( ( http->rx_state == HTTP_RX_HEADER ) &&
+		     ( ! ( http->flags & HTTP_HEAD_ONLY ) ) ) {
+			DBGC ( http, "HTTP %p start of data\n", http );
+			http->rx_state = ( http->chunked ?
+					   HTTP_RX_CHUNK_LEN : HTTP_RX_DATA );
+			return 0;
+		} else {
+			DBGC ( http, "HTTP %p end of trailer\n", http );
+			http_done ( http );
+			return 0;
+		}
+	}
+
+	DBGC ( http, "HTTP %p header \"%s\"\n", http, header );
+
+	/* Split header at the ": " */
+	separator = strstr ( header, ": " );
+	if ( ! separator ) {
+		DBGC ( http, "HTTP %p malformed header\n", http );
+		return -EIO;
+	}
+	*separator = '\0';
+	value = ( separator + 2 );
+
+	/* Hand off to header handler, if one exists */
+	for ( handler = http_header_handlers ; handler->header ; handler++ ) {
+		if ( strcasecmp ( header, handler->header ) == 0 ) {
+			if ( ( rc = handler->rx ( http, value ) ) != 0 )
+				return rc;
+			break;
+		}
+	}
+	return 0;
+}
+
+/**
+ * Handle HTTP chunk length
+ *
+ * @v http		HTTP request
+ * @v length		HTTP chunk length
+ * @ret rc		Return status code
+ */
+static int http_rx_chunk_len ( struct http_request *http, char *length ) {
+	char *endp;
+
+	/* Skip blank lines between chunks */
+	if ( length[0] == '\0' )
+		return 0;
+
+	/* Parse chunk length */
+	http->chunk_remaining = strtoul ( length, &endp, 16 );
+	if ( *endp != '\0' ) {
+		DBGC ( http, "HTTP %p invalid chunk length \"%s\"\n",
+		       http, length );
+		return -EIO;
+	}
+
+	/* Terminate chunked encoding if applicable */
+	if ( http->chunk_remaining == 0 ) {
+		DBGC ( http, "HTTP %p end of chunks\n", http );
+		http->chunked = 0;
+		http->rx_state = HTTP_RX_TRAILER;
+		return 0;
+	}
+
+	/* Use seek() to notify recipient of new filesize */
+	DBGC ( http, "HTTP %p start of chunk of length %zd\n",
+	       http, http->chunk_remaining );
+	xfer_seek ( &http->xfer, ( http->rx_len + http->chunk_remaining ) );
+	xfer_seek ( &http->xfer, http->rx_len );
+
+	/* Start receiving data */
+	http->rx_state = HTTP_RX_DATA;
+
+	return 0;
+}
+
+/** An HTTP line-based data handler */
+struct http_line_handler {
+	/** Handle line
+	 *
+	 * @v http	HTTP request
+	 * @v line	Line to handle
+	 * @ret rc	Return status code
+	 */
+	int ( * rx ) ( struct http_request *http, char *line );
+};
+
+/** List of HTTP line-based data handlers */
+static struct http_line_handler http_line_handlers[] = {
+	[HTTP_RX_RESPONSE]	= { .rx = http_rx_response },
+	[HTTP_RX_HEADER]	= { .rx = http_rx_header },
+	[HTTP_RX_CHUNK_LEN]	= { .rx = http_rx_chunk_len },
+	[HTTP_RX_TRAILER]	= { .rx = http_rx_header },
+};
+
+/**
+ * Handle new data arriving via HTTP connection
+ *
+ * @v http		HTTP request
+ * @v iobuf		I/O buffer
+ * @v meta		Data transfer metadata
+ * @ret rc		Return status code
+ */
+static int http_socket_deliver ( struct http_request *http,
+				 struct io_buffer *iobuf,
+				 struct xfer_metadata *meta __unused ) {
+	struct http_line_handler *lh;
+	char *line;
+	size_t data_len;
+	ssize_t line_len;
+	int rc = 0;
+
+	while ( iobuf && iob_len ( iobuf ) ) {
+
+		switch ( http->rx_state ) {
+		case HTTP_RX_IDLE:
+			/* Receiving any data in this state is an error */
+			DBGC ( http, "HTTP %p received %zd bytes while %s\n",
+			       http, iob_len ( iobuf ),
+			       ( ( http->rx_state == HTTP_RX_IDLE ) ?
+				 "idle" : "dead" ) );
+			rc = -EPROTO;
+			goto done;
+		case HTTP_RX_DEAD:
+			/* Do no further processing */
+			goto done;
+		case HTTP_RX_DATA:
+			/* Pass received data to caller */
+			data_len = iob_len ( iobuf );
+			if ( http->chunk_remaining &&
+			     ( http->chunk_remaining < data_len ) ) {
+				data_len = http->chunk_remaining;
+			}
+			if ( http->remaining &&
+			     ( http->remaining < data_len ) ) {
+				data_len = http->remaining;
+			}
+			if ( http->rx_buffer != UNULL ) {
+				/* Copy to partial transfer buffer */
+				copy_to_user ( http->rx_buffer, http->rx_len,
+					       iobuf->data, data_len );
+				iob_pull ( iobuf, data_len );
+			} else if ( data_len < iob_len ( iobuf ) ) {
+				/* Deliver partial buffer as raw data */
+				rc = xfer_deliver_raw ( &http->xfer,
+							iobuf->data, data_len );
+				iob_pull ( iobuf, data_len );
+				if ( rc != 0 )
+					goto done;
+			} else {
+				/* Deliver whole I/O buffer */
+				if ( ( rc = xfer_deliver_iob ( &http->xfer,
+						 iob_disown ( iobuf ) ) ) != 0 )
+					goto done;
+			}
+			http->rx_len += data_len;
+			if ( http->chunk_remaining ) {
+				http->chunk_remaining -= data_len;
+				if ( http->chunk_remaining == 0 )
+					http->rx_state = HTTP_RX_CHUNK_LEN;
+			}
+			if ( http->remaining ) {
+				http->remaining -= data_len;
+				if ( ( http->remaining == 0 ) &&
+				     ( http->rx_state == HTTP_RX_DATA ) ) {
+					http_done ( http );
+				}
+			}
+			break;
+		case HTTP_RX_RESPONSE:
+		case HTTP_RX_HEADER:
+		case HTTP_RX_CHUNK_LEN:
+		case HTTP_RX_TRAILER:
+			/* In the other phases, buffer and process a
+			 * line at a time
+			 */
+			line_len = line_buffer ( &http->linebuf, iobuf->data,
+						 iob_len ( iobuf ) );
+			if ( line_len < 0 ) {
+				rc = line_len;
+				DBGC ( http, "HTTP %p could not buffer line: "
+				       "%s\n", http, strerror ( rc ) );
+				goto done;
+			}
+			iob_pull ( iobuf, line_len );
+			line = buffered_line ( &http->linebuf );
+			if ( line ) {
+				lh = &http_line_handlers[http->rx_state];
+				if ( ( rc = lh->rx ( http, line ) ) != 0 )
+					goto done;
+			}
+			break;
+		default:
+			assert ( 0 );
+			break;
+		}
+	}
+
+ done:
+	if ( rc )
+		http_close ( http, rc );
+	free_iob ( iobuf );
+	return rc;
+}
+
+/**
+ * Check HTTP socket flow control window
+ *
+ * @v http		HTTP request
+ * @ret len		Length of window
+ */
+static size_t http_socket_window ( struct http_request *http __unused ) {
+
+	/* Window is always open.  This is to prevent TCP from
+	 * stalling if our parent window is not currently open.
+	 */
+	return ( ~( ( size_t ) 0 ) );
+}
+
+/**
+ * HTTP process
+ *
+ * @v http		HTTP request
+ */
+static void http_step ( struct http_request *http ) {
+	const char *host = http->uri->host;
+	const char *user = http->uri->user;
+	const char *password =
+		( http->uri->password ? http->uri->password : "" );
+	size_t user_pw_len = ( user ? ( strlen ( user ) + 1 /* ":" */ +
+					strlen ( password ) ) : 0 );
+	size_t user_pw_base64_len = base64_encoded_len ( user_pw_len );
+	uint8_t user_pw[ user_pw_len + 1 /* NUL */ ];
+	char user_pw_base64[ user_pw_base64_len + 1 /* NUL */ ];
+	int rc;
+	int request_len = unparse_uri ( NULL, 0, http->uri,
+					URI_PATH_BIT | URI_QUERY_BIT );
+	char request[ request_len + 1 /* NUL */ ];
+	char range[48]; /* Enough for two 64-bit integers in decimal */
+	int partial;
+
+	/* Do nothing if we have already transmitted the request */
+	if ( ! ( http->flags & HTTP_TX_PENDING ) )
+		return;
+
+	/* Do nothing until socket is ready */
+	if ( ! xfer_window ( &http->socket ) )
+		return;
+
+	/* Construct path?query request */
+	unparse_uri ( request, sizeof ( request ), http->uri,
+		      URI_PATH_BIT | URI_QUERY_BIT );
+
+	/* Construct authorisation, if applicable */
+	if ( user ) {
+		/* Make "user:password" string from decoded fields */
+		snprintf ( ( ( char * ) user_pw ), sizeof ( user_pw ),
+			   "%s:%s", user, password );
+
+		/* Base64-encode the "user:password" string */
+		base64_encode ( user_pw, user_pw_len, user_pw_base64 );
+	}
+
+	/* Force a HEAD request if we have nowhere to send any received data */
+	if ( ( xfer_window ( &http->xfer ) == 0 ) &&
+	     ( http->rx_buffer == UNULL ) ) {
+		http->flags |= ( HTTP_HEAD_ONLY | HTTP_KEEPALIVE );
+	}
+
+	/* Determine type of request */
+	partial = ( http->partial_len != 0 );
+	snprintf ( range, sizeof ( range ), "%zd-%zd", http->partial_start,
+		   ( http->partial_start + http->partial_len - 1 ) );
+
+	/* Mark request as transmitted */
+	http->flags &= ~HTTP_TX_PENDING;
+
+	/* Send GET request */
+	if ( ( rc = xfer_printf ( &http->socket,
+				  "%s %s%s HTTP/1.1\r\n"
+				  "User-Agent: iPXE/" VERSION "\r\n"
+				  "Host: %s%s%s\r\n"
+				  "%s%s%s%s%s%s%s"
+				  "\r\n",
+				  ( ( http->flags & HTTP_HEAD_ONLY ) ?
+				    "HEAD" : "GET" ),
+				  ( http->uri->path ? "" : "/" ),
+				  request, host,
+				  ( http->uri->port ?
+				    ":" : "" ),
+				  ( http->uri->port ?
+				    http->uri->port : "" ),
+				  ( ( http->flags & HTTP_KEEPALIVE ) ?
+				    "Connection: Keep-Alive\r\n" : "" ),
+				  ( partial ? "Range: bytes=" : "" ),
+				  ( partial ? range : "" ),
+				  ( partial ? "\r\n" : "" ),
+				  ( user ?
+				    "Authorization: Basic " : "" ),
+				  ( user ? user_pw_base64 : "" ),
+				  ( user ? "\r\n" : "" ) ) ) != 0 ) {
+		http_close ( http, rc );
+	}
+}
+
+/**
+ * Check HTTP data transfer flow control window
+ *
+ * @v http		HTTP request
+ * @ret len		Length of window
+ */
+static size_t http_xfer_window ( struct http_request *http ) {
+
+	/* New block commands may be issued only when we are idle */
+	return ( ( http->rx_state == HTTP_RX_IDLE ) ? 1 : 0 );
+}
+
+/**
+ * Initiate HTTP partial read
+ *
+ * @v http		HTTP request
+ * @v partial		Partial transfer interface
+ * @v offset		Starting offset
+ * @v buffer		Data buffer
+ * @v len		Length
+ * @ret rc		Return status code
+ */
+static int http_partial_read ( struct http_request *http,
+			       struct interface *partial,
+			       size_t offset, userptr_t buffer, size_t len ) {
+
+	/* Sanity check */
+	if ( http_xfer_window ( http ) == 0 )
+		return -EBUSY;
+
+	/* Initialise partial transfer parameters */
+	http->rx_buffer = buffer;
+	http->partial_start = offset;
+	http->partial_len = len;
+	http->remaining = len;
+
+	/* Schedule request */
+	http->rx_state = HTTP_RX_RESPONSE;
+	http->flags = ( HTTP_TX_PENDING | HTTP_KEEPALIVE );
+	if ( ! len )
+		http->flags |= HTTP_HEAD_ONLY;
+	process_add ( &http->process );
+
+	/* Attach to parent interface and return */
+	intf_plug_plug ( &http->partial, partial );
+
+	return 0;
+}
+
+/**
+ * Issue HTTP block device read
+ *
+ * @v http		HTTP request
+ * @v block		Block data interface
+ * @v lba		Starting logical block address
+ * @v count		Number of blocks to transfer
+ * @v buffer		Data buffer
+ * @v len		Length of data buffer
+ * @ret rc		Return status code
+ */
+static int http_block_read ( struct http_request *http,
+			     struct interface *block,
+			     uint64_t lba, unsigned int count,
+			     userptr_t buffer, size_t len __unused ) {
+
+	return http_partial_read ( http, block, ( lba * HTTP_BLKSIZE ),
+				   buffer, ( count * HTTP_BLKSIZE ) );
+}
+
+/**
+ * Read HTTP block device capacity
+ *
+ * @v http		HTTP request
+ * @v block		Block data interface
+ * @ret rc		Return status code
+ */
+static int http_block_read_capacity ( struct http_request *http,
+				      struct interface *block ) {
+
+	return http_partial_read ( http, block, 0, 0, 0 );
+}
+
+/**
+ * Describe HTTP device in an ACPI table
+ *
+ * @v http		HTTP request
+ * @v acpi		ACPI table
+ * @v len		Length of ACPI table
+ * @ret rc		Return status code
+ */
+static int http_acpi_describe ( struct http_request *http,
+				struct acpi_description_header *acpi,
+				size_t len ) {
+
+	DBGC ( http, "HTTP %p cannot yet describe device in an ACPI table\n",
+	       http );
+	( void ) acpi;
+	( void ) len;
+	return 0;
+}
+
+/** HTTP socket interface operations */
+static struct interface_operation http_socket_operations[] = {
+	INTF_OP ( xfer_window, struct http_request *, http_socket_window ),
+	INTF_OP ( xfer_deliver, struct http_request *, http_socket_deliver ),
+	INTF_OP ( xfer_window_changed, struct http_request *, http_step ),
+	INTF_OP ( intf_close, struct http_request *, http_close ),
+};
+
+/** HTTP socket interface descriptor */
+static struct interface_descriptor http_socket_desc =
+	INTF_DESC_PASSTHRU ( struct http_request, socket,
+			     http_socket_operations, xfer );
+
+/** HTTP partial transfer interface operations */
+static struct interface_operation http_partial_operations[] = {
+	INTF_OP ( intf_close, struct http_request *, http_close ),
+};
+
+/** HTTP partial transfer interface descriptor */
+static struct interface_descriptor http_partial_desc =
+	INTF_DESC ( struct http_request, partial, http_partial_operations );
+
+/** HTTP data transfer interface operations */
+static struct interface_operation http_xfer_operations[] = {
+	INTF_OP ( xfer_window, struct http_request *, http_xfer_window ),
+	INTF_OP ( block_read, struct http_request *, http_block_read ),
+	INTF_OP ( block_read_capacity, struct http_request *,
+		  http_block_read_capacity ),
+	INTF_OP ( intf_close, struct http_request *, http_close ),
+	INTF_OP ( acpi_describe, struct http_request *, http_acpi_describe ),
+};
+
+/** HTTP data transfer interface descriptor */
+static struct interface_descriptor http_xfer_desc =
+	INTF_DESC_PASSTHRU ( struct http_request, xfer,
+			     http_xfer_operations, socket );
+
+/** HTTP process descriptor */
+static struct process_descriptor http_process_desc =
+	PROC_DESC_ONCE ( struct http_request, process, http_step );
+
+/**
+ * Initiate an HTTP connection, with optional filter
+ *
+ * @v xfer		Data transfer interface
+ * @v uri		Uniform Resource Identifier
+ * @v default_port	Default port number
+ * @v filter		Filter to apply to socket, or NULL
+ * @ret rc		Return status code
+ */
+int http_open_filter ( struct interface *xfer, struct uri *uri,
+		       unsigned int default_port,
+		       int ( * filter ) ( struct interface *xfer,
+					  struct interface **next ) ) {
+	struct http_request *http;
+	struct sockaddr_tcpip server;
+	struct interface *socket;
+	int rc;
+
+	/* Sanity checks */
+	if ( ! uri->host )
+		return -EINVAL;
+
+	/* Allocate and populate HTTP structure */
+	http = zalloc ( sizeof ( *http ) );
+	if ( ! http )
+		return -ENOMEM;
+	ref_init ( &http->refcnt, http_free );
+	intf_init ( &http->xfer, &http_xfer_desc, &http->refcnt );
+	intf_init ( &http->partial, &http_partial_desc, &http->refcnt );
+       	http->uri = uri_get ( uri );
+	intf_init ( &http->socket, &http_socket_desc, &http->refcnt );
+	process_init ( &http->process, &http_process_desc, &http->refcnt );
+	http->flags = HTTP_TX_PENDING;
+
+	/* Open socket */
+	memset ( &server, 0, sizeof ( server ) );
+	server.st_port = htons ( uri_port ( http->uri, default_port ) );
+	socket = &http->socket;
+	if ( filter ) {
+		if ( ( rc = filter ( socket, &socket ) ) != 0 )
+			goto err;
+	}
+	if ( ( rc = xfer_open_named_socket ( socket, SOCK_STREAM,
+					     ( struct sockaddr * ) &server,
+					     uri->host, NULL ) ) != 0 )
+		goto err;
+
+	/* Attach to parent interface, mortalise self, and return */
+	intf_plug_plug ( &http->xfer, xfer );
+	ref_put ( &http->refcnt );
+	return 0;
+
+ err:
+	DBGC ( http, "HTTP %p could not create request: %s\n", 
+	       http, strerror ( rc ) );
+	http_close ( http, rc );
+	ref_put ( &http->refcnt );
+	return rc;
+}
+
 /**
  * Initiate an HTTP connection
  *
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/httpcore.c ipxe-1.0.1~lliurex1505/src/net/tcp/httpcore.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/httpcore.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/httpcore.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1481 +0,0 @@
-/*
- * Copyright (C) 2007 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/**
- * @file
- *
- * Hyper Text Transfer Protocol (HTTP) core functionality
- *
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <strings.h>
-#include <byteswap.h>
-#include <errno.h>
-#include <assert.h>
-#include <ipxe/uri.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/process.h>
-#include <ipxe/linebuf.h>
-#include <ipxe/base64.h>
-#include <ipxe/base16.h>
-#include <ipxe/md5.h>
-#include <ipxe/blockdev.h>
-#include <ipxe/acpi.h>
-#include <ipxe/version.h>
-#include <ipxe/params.h>
-#include <ipxe/http.h>
-
-/* Disambiguate the various error causes */
-#define EACCES_401 __einfo_error ( EINFO_EACCES_401 )
-#define EINFO_EACCES_401 \
-	__einfo_uniqify ( EINFO_EACCES, 0x01, "HTTP 401 Unauthorized" )
-#define EIO_OTHER __einfo_error ( EINFO_EIO_OTHER )
-#define EINFO_EIO_OTHER \
-	__einfo_uniqify ( EINFO_EIO, 0x01, "Unrecognised HTTP response code" )
-#define EIO_CONTENT_LENGTH __einfo_error ( EINFO_EIO_CONTENT_LENGTH )
-#define EINFO_EIO_CONTENT_LENGTH \
-	__einfo_uniqify ( EINFO_EIO, 0x02, "Content length mismatch" )
-#define EINVAL_RESPONSE __einfo_error ( EINFO_EINVAL_RESPONSE )
-#define EINFO_EINVAL_RESPONSE \
-	__einfo_uniqify ( EINFO_EINVAL, 0x01, "Invalid content length" )
-#define EINVAL_HEADER __einfo_error ( EINFO_EINVAL_HEADER )
-#define EINFO_EINVAL_HEADER \
-	__einfo_uniqify ( EINFO_EINVAL, 0x02, "Invalid header" )
-#define EINVAL_CONTENT_LENGTH __einfo_error ( EINFO_EINVAL_CONTENT_LENGTH )
-#define EINFO_EINVAL_CONTENT_LENGTH \
-	__einfo_uniqify ( EINFO_EINVAL, 0x03, "Invalid content length" )
-#define EINVAL_CHUNK_LENGTH __einfo_error ( EINFO_EINVAL_CHUNK_LENGTH )
-#define EINFO_EINVAL_CHUNK_LENGTH \
-	__einfo_uniqify ( EINFO_EINVAL, 0x04, "Invalid chunk length" )
-#define ENOENT_404 __einfo_error ( EINFO_ENOENT_404 )
-#define EINFO_ENOENT_404 \
-	__einfo_uniqify ( EINFO_ENOENT, 0x01, "HTTP 404 Not Found" )
-#define EPERM_403 __einfo_error ( EINFO_EPERM_403 )
-#define EINFO_EPERM_403 \
-	__einfo_uniqify ( EINFO_EPERM, 0x01, "HTTP 403 Forbidden" )
-#define EPROTO_UNSOLICITED __einfo_error ( EINFO_EPROTO_UNSOLICITED )
-#define EINFO_EPROTO_UNSOLICITED \
-	__einfo_uniqify ( EINFO_EPROTO, 0x01, "Unsolicited data" )
-
-/** Block size used for HTTP block device request */
-#define HTTP_BLKSIZE 512
-
-/** HTTP flags */
-enum http_flags {
-	/** Request is waiting to be transmitted */
-	HTTP_TX_PENDING = 0x0001,
-	/** Fetch header only */
-	HTTP_HEAD_ONLY = 0x0002,
-	/** Client would like to keep connection alive */
-	HTTP_CLIENT_KEEPALIVE = 0x0004,
-	/** Server will keep connection alive */
-	HTTP_SERVER_KEEPALIVE = 0x0008,
-	/** Discard the current request and try again */
-	HTTP_TRY_AGAIN = 0x0010,
-	/** Provide Basic authentication details */
-	HTTP_BASIC_AUTH = 0x0020,
-	/** Provide Digest authentication details */
-	HTTP_DIGEST_AUTH = 0x0040,
-};
-
-/** HTTP receive state */
-enum http_rx_state {
-	HTTP_RX_RESPONSE = 0,
-	HTTP_RX_HEADER,
-	HTTP_RX_CHUNK_LEN,
-	/* In HTTP_RX_DATA, it is acceptable for the server to close
-	 * the connection (unless we are in the middle of a chunked
-	 * transfer).
-	 */
-	HTTP_RX_DATA,
-	/* In the following states, it is acceptable for the server to
-	 * close the connection.
-	 */
-	HTTP_RX_TRAILER,
-	HTTP_RX_IDLE,
-	HTTP_RX_DEAD,
-};
-
-/**
- * An HTTP request
- *
- */
-struct http_request {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** Data transfer interface */
-	struct interface xfer;
-	/** Partial transfer interface */
-	struct interface partial;
-
-	/** URI being fetched */
-	struct uri *uri;
-	/** Default port */
-	unsigned int default_port;
-	/** Filter (if any) */
-	int ( * filter ) ( struct interface *xfer,
-			   const char *name,
-			   struct interface **next );
-	/** Transport layer interface */
-	struct interface socket;
-
-	/** Flags */
-	unsigned int flags;
-	/** Starting offset of partial transfer (if applicable) */
-	size_t partial_start;
-	/** Length of partial transfer (if applicable) */
-	size_t partial_len;
-
-	/** TX process */
-	struct process process;
-
-	/** RX state */
-	enum http_rx_state rx_state;
-	/** Response code */
-	unsigned int code;
-	/** Received length */
-	size_t rx_len;
-	/** Length remaining (or 0 if unknown) */
-	size_t remaining;
-	/** HTTP is using Transfer-Encoding: chunked */
-	int chunked;
-	/** Current chunk length remaining (if applicable) */
-	size_t chunk_remaining;
-	/** Line buffer for received header lines */
-	struct line_buffer linebuf;
-	/** Receive data buffer (if applicable) */
-	userptr_t rx_buffer;
-
-	/** Authentication realm (if any) */
-	char *auth_realm;
-	/** Authentication nonce (if any) */
-	char *auth_nonce;
-	/** Authentication opaque string (if any) */
-	char *auth_opaque;
-};
-
-/**
- * Free HTTP request
- *
- * @v refcnt		Reference counter
- */
-static void http_free ( struct refcnt *refcnt ) {
-	struct http_request *http =
-		container_of ( refcnt, struct http_request, refcnt );
-
-	uri_put ( http->uri );
-	empty_line_buffer ( &http->linebuf );
-	free ( http->auth_realm );
-	free ( http->auth_nonce );
-	free ( http->auth_opaque );
-	free ( http );
-};
-
-/**
- * Close HTTP request
- *
- * @v http		HTTP request
- * @v rc		Return status code
- */
-static void http_close ( struct http_request *http, int rc ) {
-
-	/* Prevent further processing of any current packet */
-	http->rx_state = HTTP_RX_DEAD;
-
-	/* Prevent reconnection */
-	http->flags &= ~HTTP_CLIENT_KEEPALIVE;
-
-	/* Remove process */
-	process_del ( &http->process );
-
-	/* Close all data transfer interfaces */
-	intf_shutdown ( &http->socket, rc );
-	intf_shutdown ( &http->partial, rc );
-	intf_shutdown ( &http->xfer, rc );
-}
-
-/**
- * Open HTTP socket
- *
- * @v http		HTTP request
- * @ret rc		Return status code
- */
-static int http_socket_open ( struct http_request *http ) {
-	struct uri *uri = http->uri;
-	struct sockaddr_tcpip server;
-	struct interface *socket;
-	int rc;
-
-	/* Open socket */
-	memset ( &server, 0, sizeof ( server ) );
-	server.st_port = htons ( uri_port ( uri, http->default_port ) );
-	socket = &http->socket;
-	if ( http->filter ) {
-		if ( ( rc = http->filter ( socket, uri->host, &socket ) ) != 0 )
-			return rc;
-	}
-	if ( ( rc = xfer_open_named_socket ( socket, SOCK_STREAM,
-					     ( struct sockaddr * ) &server,
-					     uri->host, NULL ) ) != 0 )
-		return rc;
-
-	return 0;
-}
-
-/**
- * Mark HTTP request as completed successfully
- *
- * @v http		HTTP request
- */
-static void http_done ( struct http_request *http ) {
-	int rc;
-
-	/* If we are not at an appropriate stage of the protocol
-	 * (including being in the middle of a chunked transfer),
-	 * force an error.
-	 */
-	if ( ( http->rx_state < HTTP_RX_DATA ) || ( http->chunked != 0 ) ) {
-		DBGC ( http, "HTTP %p connection closed unexpectedly in state "
-		       "%d\n", http, http->rx_state );
-		http_close ( http, -ECONNRESET );
-		return;
-	}
-
-	/* If we had a Content-Length, and the received content length
-	 * isn't correct, force an error
-	 */
-	if ( http->remaining != 0 ) {
-		DBGC ( http, "HTTP %p incorrect length %zd, should be %zd\n",
-		       http, http->rx_len, ( http->rx_len + http->remaining ) );
-		http_close ( http, -EIO_CONTENT_LENGTH );
-		return;
-	}
-
-	/* Enter idle state */
-	http->rx_state = HTTP_RX_IDLE;
-	http->rx_len = 0;
-	assert ( http->remaining == 0 );
-	assert ( http->chunked == 0 );
-	assert ( http->chunk_remaining == 0 );
-
-	/* Close partial transfer interface */
-	if ( ! ( http->flags & HTTP_TRY_AGAIN ) )
-		intf_restart ( &http->partial, 0 );
-
-	/* Close everything unless we want to keep the connection alive */
-	if ( ! ( http->flags & ( HTTP_CLIENT_KEEPALIVE | HTTP_TRY_AGAIN ) ) ) {
-		http_close ( http, 0 );
-		return;
-	}
-
-	/* If the server is not intending to keep the connection
-	 * alive, then reopen the socket.
-	 */
-	if ( ! ( http->flags & HTTP_SERVER_KEEPALIVE ) ) {
-		DBGC ( http, "HTTP %p reopening connection\n", http );
-		intf_restart ( &http->socket, 0 );
-		if ( ( rc = http_socket_open ( http ) ) != 0 ) {
-			http_close ( http, rc );
-			return;
-		}
-	}
-	http->flags &= ~HTTP_SERVER_KEEPALIVE;
-
-	/* Retry the request if applicable */
-	if ( http->flags & HTTP_TRY_AGAIN ) {
-		http->flags &= ~HTTP_TRY_AGAIN;
-		http->flags |= HTTP_TX_PENDING;
-		http->rx_state = HTTP_RX_RESPONSE;
-		process_add ( &http->process );
-	}
-}
-
-/**
- * Convert HTTP response code to return status code
- *
- * @v response		HTTP response code
- * @ret rc		Return status code
- */
-static int http_response_to_rc ( unsigned int response ) {
-	switch ( response ) {
-	case 200:
-	case 206:
-	case 301:
-	case 302:
-	case 303:
-		return 0;
-	case 404:
-		return -ENOENT_404;
-	case 403:
-		return -EPERM_403;
-	case 401:
-		return -EACCES_401;
-	default:
-		return -EIO_OTHER;
-	}
-}
-
-/**
- * Handle HTTP response
- *
- * @v http		HTTP request
- * @v response		HTTP response
- * @ret rc		Return status code
- */
-static int http_rx_response ( struct http_request *http, char *response ) {
-	char *spc;
-
-	DBGC ( http, "HTTP %p response \"%s\"\n", http, response );
-
-	/* Check response starts with "HTTP/" */
-	if ( strncmp ( response, "HTTP/", 5 ) != 0 )
-		return -EINVAL_RESPONSE;
-
-	/* Locate and store response code */
-	spc = strchr ( response, ' ' );
-	if ( ! spc )
-		return -EINVAL_RESPONSE;
-	http->code = strtoul ( spc, NULL, 10 );
-
-	/* Move to receive headers */
-	http->rx_state = ( ( http->flags & HTTP_HEAD_ONLY ) ?
-			   HTTP_RX_TRAILER : HTTP_RX_HEADER );
-	return 0;
-}
-
-/**
- * Handle HTTP Location header
- *
- * @v http		HTTP request
- * @v value		HTTP header value
- * @ret rc		Return status code
- */
-static int http_rx_location ( struct http_request *http, char *value ) {
-	int rc;
-
-	/* Redirect to new location */
-	DBGC ( http, "HTTP %p redirecting to %s\n", http, value );
-	if ( ( rc = xfer_redirect ( &http->xfer, LOCATION_URI_STRING,
-				    value ) ) != 0 ) {
-		DBGC ( http, "HTTP %p could not redirect: %s\n",
-		       http, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/**
- * Handle HTTP Content-Length header
- *
- * @v http		HTTP request
- * @v value		HTTP header value
- * @ret rc		Return status code
- */
-static int http_rx_content_length ( struct http_request *http, char *value ) {
-	struct block_device_capacity capacity;
-	size_t content_len;
-	char *endp;
-
-	/* Parse content length */
-	content_len = strtoul ( value, &endp, 10 );
-	if ( *endp != '\0' ) {
-		DBGC ( http, "HTTP %p invalid Content-Length \"%s\"\n",
-		       http, value );
-		return -EINVAL_CONTENT_LENGTH;
-	}
-
-	/* If we already have an expected content length, and this
-	 * isn't it, then complain
-	 */
-	if ( http->remaining && ( http->remaining != content_len ) ) {
-		DBGC ( http, "HTTP %p incorrect Content-Length %zd (expected "
-		       "%zd)\n", http, content_len, http->remaining );
-		return -EIO_CONTENT_LENGTH;
-	}
-	if ( ! ( http->flags & HTTP_HEAD_ONLY ) )
-		http->remaining = content_len;
-
-	/* Do nothing more if we are retrying the request */
-	if ( http->flags & HTTP_TRY_AGAIN )
-		return 0;
-
-	/* Use seek() to notify recipient of filesize */
-	xfer_seek ( &http->xfer, http->remaining );
-	xfer_seek ( &http->xfer, 0 );
-
-	/* Report block device capacity if applicable */
-	if ( http->flags & HTTP_HEAD_ONLY ) {
-		capacity.blocks = ( content_len / HTTP_BLKSIZE );
-		capacity.blksize = HTTP_BLKSIZE;
-		capacity.max_count = -1U;
-		block_capacity ( &http->partial, &capacity );
-	}
-	return 0;
-}
-
-/**
- * Handle HTTP Transfer-Encoding header
- *
- * @v http		HTTP request
- * @v value		HTTP header value
- * @ret rc		Return status code
- */
-static int http_rx_transfer_encoding ( struct http_request *http, char *value ){
-
-	if ( strcasecmp ( value, "chunked" ) == 0 ) {
-		/* Mark connection as using chunked transfer encoding */
-		http->chunked = 1;
-	}
-
-	return 0;
-}
-
-/**
- * Handle HTTP Connection header
- *
- * @v http		HTTP request
- * @v value		HTTP header value
- * @ret rc		Return status code
- */
-static int http_rx_connection ( struct http_request *http, char *value ) {
-
-	if ( strcasecmp ( value, "keep-alive" ) == 0 ) {
-		/* Mark connection as being kept alive by the server */
-		http->flags |= HTTP_SERVER_KEEPALIVE;
-	}
-
-	return 0;
-}
-
-/**
- * Handle WWW-Authenticate Basic header
- *
- * @v http		HTTP request
- * @v params		Parameters
- * @ret rc		Return status code
- */
-static int http_rx_basic_auth ( struct http_request *http, char *params ) {
-
-	DBGC ( http, "HTTP %p Basic authentication required (%s)\n",
-	       http, params );
-
-	/* If we received a 401 Unauthorized response, then retry
-	 * using Basic authentication
-	 */
-	if ( ( http->code == 401 ) &&
-	     ( ! ( http->flags & HTTP_BASIC_AUTH ) ) &&
-	     ( http->uri->user != NULL ) ) {
-		http->flags |= ( HTTP_TRY_AGAIN | HTTP_BASIC_AUTH );
-	}
-
-	return 0;
-}
-
-/**
- * Parse Digest authentication parameter
- *
- * @v params		Parameters
- * @v name		Parameter name (including trailing "=\"")
- * @ret value		Parameter value, or NULL
- */
-static char * http_digest_param ( char *params, const char *name ) {
-	char *key;
-	char *value;
-	char *terminator;
-
-	/* Locate parameter */
-	key = strstr ( params, name );
-	if ( ! key )
-		return NULL;
-
-	/* Extract value */
-	value = ( key + strlen ( name ) );
-	terminator = strchr ( value, '"' );
-	if ( ! terminator )
-		return NULL;
-	return strndup ( value, ( terminator - value ) );
-}
-
-/**
- * Handle WWW-Authenticate Digest header
- *
- * @v http		HTTP request
- * @v params		Parameters
- * @ret rc		Return status code
- */
-static int http_rx_digest_auth ( struct http_request *http, char *params ) {
-
-	DBGC ( http, "HTTP %p Digest authentication required (%s)\n",
-	       http, params );
-
-	/* If we received a 401 Unauthorized response, then retry
-	 * using Digest authentication
-	 */
-	if ( ( http->code == 401 ) &&
-	     ( ! ( http->flags & HTTP_DIGEST_AUTH ) ) &&
-	     ( http->uri->user != NULL ) ) {
-
-		/* Extract realm */
-		free ( http->auth_realm );
-		http->auth_realm = http_digest_param ( params, "realm=\"" );
-		if ( ! http->auth_realm ) {
-			DBGC ( http, "HTTP %p Digest prompt missing realm\n",
-			       http );
-			return -EINVAL_HEADER;
-		}
-
-		/* Extract nonce */
-		free ( http->auth_nonce );
-		http->auth_nonce = http_digest_param ( params, "nonce=\"" );
-		if ( ! http->auth_nonce ) {
-			DBGC ( http, "HTTP %p Digest prompt missing nonce\n",
-			       http );
-			return -EINVAL_HEADER;
-		}
-
-		/* Extract opaque */
-		free ( http->auth_opaque );
-		http->auth_opaque = http_digest_param ( params, "opaque=\"" );
-		if ( ! http->auth_opaque ) {
-			/* Not an error; "opaque" is optional */
-		}
-
-		http->flags |= ( HTTP_TRY_AGAIN | HTTP_DIGEST_AUTH );
-	}
-
-	return 0;
-}
-
-/** An HTTP WWW-Authenticate header handler */
-struct http_auth_header_handler {
-	/** Scheme (e.g. "Basic") */
-	const char *scheme;
-	/** Handle received parameters
-	 *
-	 * @v http	HTTP request
-	 * @v params	Parameters
-	 * @ret rc	Return status code
-	 */
-	int ( * rx ) ( struct http_request *http, char *params );
-};
-
-/** List of HTTP WWW-Authenticate header handlers */
-static struct http_auth_header_handler http_auth_header_handlers[] = {
-	{
-		.scheme = "Basic",
-		.rx = http_rx_basic_auth,
-	},
-	{
-		.scheme = "Digest",
-		.rx = http_rx_digest_auth,
-	},
-	{ NULL, NULL },
-};
-
-/**
- * Handle HTTP WWW-Authenticate header
- *
- * @v http		HTTP request
- * @v value		HTTP header value
- * @ret rc		Return status code
- */
-static int http_rx_www_authenticate ( struct http_request *http, char *value ) {
-	struct http_auth_header_handler *handler;
-	char *separator;
-	char *scheme;
-	char *params;
-	int rc;
-
-	/* Extract scheme */
-	separator = strchr ( value, ' ' );
-	if ( ! separator ) {
-		DBGC ( http, "HTTP %p malformed WWW-Authenticate header\n",
-		       http );
-		return -EINVAL_HEADER;
-	}
-	*separator = '\0';
-	scheme = value;
-	params = ( separator + 1 );
-
-	/* Hand off to header handler, if one exists */
-	for ( handler = http_auth_header_handlers; handler->scheme; handler++ ){
-		if ( strcasecmp ( scheme, handler->scheme ) == 0 ) {
-			if ( ( rc = handler->rx ( http, params ) ) != 0 )
-				return rc;
-			break;
-		}
-	}
-	return 0;
-}
-
-/** An HTTP header handler */
-struct http_header_handler {
-	/** Name (e.g. "Content-Length") */
-	const char *header;
-	/** Handle received header
-	 *
-	 * @v http	HTTP request
-	 * @v value	HTTP header value
-	 * @ret rc	Return status code
-	 *
-	 * If an error is returned, the download will be aborted.
-	 */
-	int ( * rx ) ( struct http_request *http, char *value );
-};
-
-/** List of HTTP header handlers */
-static struct http_header_handler http_header_handlers[] = {
-	{
-		.header = "Location",
-		.rx = http_rx_location,
-	},
-	{
-		.header = "Content-Length",
-		.rx = http_rx_content_length,
-	},
-	{
-		.header = "Transfer-Encoding",
-		.rx = http_rx_transfer_encoding,
-	},
-	{
-		.header = "Connection",
-		.rx = http_rx_connection,
-	},
-	{
-		.header = "WWW-Authenticate",
-		.rx = http_rx_www_authenticate,
-	},
-	{ NULL, NULL }
-};
-
-/**
- * Handle HTTP header
- *
- * @v http		HTTP request
- * @v header		HTTP header
- * @ret rc		Return status code
- */
-static int http_rx_header ( struct http_request *http, char *header ) {
-	struct http_header_handler *handler;
-	char *separator;
-	char *value;
-	int rc;
-
-	/* An empty header line marks the end of this phase */
-	if ( ! header[0] ) {
-		empty_line_buffer ( &http->linebuf );
-
-		/* Handle response code */
-		if ( ! ( http->flags & HTTP_TRY_AGAIN ) ) {
-			if ( ( rc = http_response_to_rc ( http->code ) ) != 0 )
-				return rc;
-		}
-
-		/* Move to next state */
-		if ( http->rx_state == HTTP_RX_HEADER ) {
-			DBGC ( http, "HTTP %p start of data\n", http );
-			http->rx_state = ( http->chunked ?
-					   HTTP_RX_CHUNK_LEN : HTTP_RX_DATA );
-			if ( ( http->partial_len != 0 ) &&
-			     ( ! ( http->flags & HTTP_TRY_AGAIN ) ) ) {
-				http->remaining = http->partial_len;
-			}
-			return 0;
-		} else {
-			DBGC ( http, "HTTP %p end of trailer\n", http );
-			http_done ( http );
-			return 0;
-		}
-	}
-
-	DBGC ( http, "HTTP %p header \"%s\"\n", http, header );
-
-	/* Split header at the ": " */
-	separator = strstr ( header, ": " );
-	if ( ! separator ) {
-		DBGC ( http, "HTTP %p malformed header\n", http );
-		return -EINVAL_HEADER;
-	}
-	*separator = '\0';
-	value = ( separator + 2 );
-
-	/* Hand off to header handler, if one exists */
-	for ( handler = http_header_handlers ; handler->header ; handler++ ) {
-		if ( strcasecmp ( header, handler->header ) == 0 ) {
-			if ( ( rc = handler->rx ( http, value ) ) != 0 )
-				return rc;
-			break;
-		}
-	}
-	return 0;
-}
-
-/**
- * Handle HTTP chunk length
- *
- * @v http		HTTP request
- * @v length		HTTP chunk length
- * @ret rc		Return status code
- */
-static int http_rx_chunk_len ( struct http_request *http, char *length ) {
-	char *endp;
-
-	/* Skip blank lines between chunks */
-	if ( length[0] == '\0' )
-		return 0;
-
-	/* Parse chunk length */
-	http->chunk_remaining = strtoul ( length, &endp, 16 );
-	if ( *endp != '\0' ) {
-		DBGC ( http, "HTTP %p invalid chunk length \"%s\"\n",
-		       http, length );
-		return -EINVAL_CHUNK_LENGTH;
-	}
-
-	/* Terminate chunked encoding if applicable */
-	if ( http->chunk_remaining == 0 ) {
-		DBGC ( http, "HTTP %p end of chunks\n", http );
-		http->chunked = 0;
-		http->rx_state = HTTP_RX_TRAILER;
-		return 0;
-	}
-
-	/* Use seek() to notify recipient of new filesize */
-	DBGC ( http, "HTTP %p start of chunk of length %zd\n",
-	       http, http->chunk_remaining );
-	if ( ! ( http->flags & HTTP_TRY_AGAIN ) ) {
-		xfer_seek ( &http->xfer,
-			    ( http->rx_len + http->chunk_remaining ) );
-		xfer_seek ( &http->xfer, http->rx_len );
-	}
-
-	/* Start receiving data */
-	http->rx_state = HTTP_RX_DATA;
-
-	return 0;
-}
-
-/** An HTTP line-based data handler */
-struct http_line_handler {
-	/** Handle line
-	 *
-	 * @v http	HTTP request
-	 * @v line	Line to handle
-	 * @ret rc	Return status code
-	 */
-	int ( * rx ) ( struct http_request *http, char *line );
-};
-
-/** List of HTTP line-based data handlers */
-static struct http_line_handler http_line_handlers[] = {
-	[HTTP_RX_RESPONSE]	= { .rx = http_rx_response },
-	[HTTP_RX_HEADER]	= { .rx = http_rx_header },
-	[HTTP_RX_CHUNK_LEN]	= { .rx = http_rx_chunk_len },
-	[HTTP_RX_TRAILER]	= { .rx = http_rx_header },
-};
-
-/**
- * Handle new data arriving via HTTP connection
- *
- * @v http		HTTP request
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-static int http_socket_deliver ( struct http_request *http,
-				 struct io_buffer *iobuf,
-				 struct xfer_metadata *meta __unused ) {
-	struct http_line_handler *lh;
-	char *line;
-	size_t data_len;
-	ssize_t line_len;
-	int rc = 0;
-
-	while ( iobuf && iob_len ( iobuf ) ) {
-
-		switch ( http->rx_state ) {
-		case HTTP_RX_IDLE:
-			/* Receiving any data in this state is an error */
-			DBGC ( http, "HTTP %p received %zd bytes while %s\n",
-			       http, iob_len ( iobuf ),
-			       ( ( http->rx_state == HTTP_RX_IDLE ) ?
-				 "idle" : "dead" ) );
-			rc = -EPROTO_UNSOLICITED;
-			goto done;
-		case HTTP_RX_DEAD:
-			/* Do no further processing */
-			goto done;
-		case HTTP_RX_DATA:
-			/* Pass received data to caller */
-			data_len = iob_len ( iobuf );
-			if ( http->chunk_remaining &&
-			     ( http->chunk_remaining < data_len ) ) {
-				data_len = http->chunk_remaining;
-			}
-			if ( http->remaining &&
-			     ( http->remaining < data_len ) ) {
-				data_len = http->remaining;
-			}
-			if ( http->flags & HTTP_TRY_AGAIN ) {
-				/* Discard all received data */
-				iob_pull ( iobuf, data_len );
-			} else if ( http->rx_buffer != UNULL ) {
-				/* Copy to partial transfer buffer */
-				copy_to_user ( http->rx_buffer, http->rx_len,
-					       iobuf->data, data_len );
-				iob_pull ( iobuf, data_len );
-			} else if ( data_len < iob_len ( iobuf ) ) {
-				/* Deliver partial buffer as raw data */
-				rc = xfer_deliver_raw ( &http->xfer,
-							iobuf->data, data_len );
-				iob_pull ( iobuf, data_len );
-				if ( rc != 0 )
-					goto done;
-			} else {
-				/* Deliver whole I/O buffer */
-				if ( ( rc = xfer_deliver_iob ( &http->xfer,
-						 iob_disown ( iobuf ) ) ) != 0 )
-					goto done;
-			}
-			http->rx_len += data_len;
-			if ( http->chunk_remaining ) {
-				http->chunk_remaining -= data_len;
-				if ( http->chunk_remaining == 0 )
-					http->rx_state = HTTP_RX_CHUNK_LEN;
-			}
-			if ( http->remaining ) {
-				http->remaining -= data_len;
-				if ( ( http->remaining == 0 ) &&
-				     ( http->rx_state == HTTP_RX_DATA ) ) {
-					http_done ( http );
-				}
-			}
-			break;
-		case HTTP_RX_RESPONSE:
-		case HTTP_RX_HEADER:
-		case HTTP_RX_CHUNK_LEN:
-		case HTTP_RX_TRAILER:
-			/* In the other phases, buffer and process a
-			 * line at a time
-			 */
-			line_len = line_buffer ( &http->linebuf, iobuf->data,
-						 iob_len ( iobuf ) );
-			if ( line_len < 0 ) {
-				rc = line_len;
-				DBGC ( http, "HTTP %p could not buffer line: "
-				       "%s\n", http, strerror ( rc ) );
-				goto done;
-			}
-			iob_pull ( iobuf, line_len );
-			line = buffered_line ( &http->linebuf );
-			if ( line ) {
-				lh = &http_line_handlers[http->rx_state];
-				if ( ( rc = lh->rx ( http, line ) ) != 0 )
-					goto done;
-			}
-			break;
-		default:
-			assert ( 0 );
-			break;
-		}
-	}
-
- done:
-	if ( rc )
-		http_close ( http, rc );
-	free_iob ( iobuf );
-	return rc;
-}
-
-/**
- * Check HTTP socket flow control window
- *
- * @v http		HTTP request
- * @ret len		Length of window
- */
-static size_t http_socket_window ( struct http_request *http __unused ) {
-
-	/* Window is always open.  This is to prevent TCP from
-	 * stalling if our parent window is not currently open.
-	 */
-	return ( ~( ( size_t ) 0 ) );
-}
-
-/**
- * Close HTTP socket
- *
- * @v http		HTTP request
- * @v rc		Reason for close
- */
-static void http_socket_close ( struct http_request *http, int rc ) {
-
-	/* If we have an error, terminate */
-	if ( rc != 0 ) {
-		http_close ( http, rc );
-		return;
-	}
-
-	/* Mark HTTP request as complete */
-	http_done ( http );
-}
-
-/**
- * Generate HTTP Basic authorisation string
- *
- * @v http		HTTP request
- * @ret auth		Authorisation string, or NULL on error
- *
- * The authorisation string is dynamically allocated, and must be
- * freed by the caller.
- */
-static char * http_basic_auth ( struct http_request *http ) {
-	const char *user = http->uri->user;
-	const char *password =
-		( http->uri->password ? http->uri->password : "" );
-	size_t user_pw_len =
-		( strlen ( user ) + 1 /* ":" */ + strlen ( password ) );
-	char user_pw[ user_pw_len + 1 /* NUL */ ];
-	size_t user_pw_base64_len = base64_encoded_len ( user_pw_len );
-	char user_pw_base64[ user_pw_base64_len + 1 /* NUL */ ];
-	char *auth;
-	int len;
-
-	/* Sanity check */
-	assert ( user != NULL );
-
-	/* Make "user:password" string from decoded fields */
-	snprintf ( user_pw, sizeof ( user_pw ), "%s:%s", user, password );
-
-	/* Base64-encode the "user:password" string */
-	base64_encode ( ( void * ) user_pw, user_pw_len, user_pw_base64 );
-
-	/* Generate the authorisation string */
-	len = asprintf ( &auth, "Authorization: Basic %s\r\n",
-			 user_pw_base64 );
-	if ( len < 0 )
-		return NULL;
-
-	return auth;
-}
-
-/**
- * Generate HTTP Digest authorisation string
- *
- * @v http		HTTP request
- * @v method		HTTP method (e.g. "GET")
- * @v uri		HTTP request URI (e.g. "/index.html")
- * @ret auth		Authorisation string, or NULL on error
- *
- * The authorisation string is dynamically allocated, and must be
- * freed by the caller.
- */
-static char * http_digest_auth ( struct http_request *http,
-				 const char *method, const char *uri ) {
-	const char *user = http->uri->user;
-	const char *password =
-		( http->uri->password ? http->uri->password : "" );
-	const char *realm = http->auth_realm;
-	const char *nonce = http->auth_nonce;
-	const char *opaque = http->auth_opaque;
-	static const char colon = ':';
-	uint8_t ctx[MD5_CTX_SIZE];
-	uint8_t digest[MD5_DIGEST_SIZE];
-	char ha1[ base16_encoded_len ( sizeof ( digest ) ) + 1 /* NUL */ ];
-	char ha2[ base16_encoded_len ( sizeof ( digest ) ) + 1 /* NUL */ ];
-	char response[ base16_encoded_len ( sizeof ( digest ) ) + 1 /* NUL */ ];
-	char *auth;
-	int len;
-
-	/* Sanity checks */
-	assert ( user != NULL );
-	assert ( realm != NULL );
-	assert ( nonce != NULL );
-
-	/* Generate HA1 */
-	digest_init ( &md5_algorithm, ctx );
-	digest_update ( &md5_algorithm, ctx, user, strlen ( user ) );
-	digest_update ( &md5_algorithm, ctx, &colon, sizeof ( colon ) );
-	digest_update ( &md5_algorithm, ctx, realm, strlen ( realm ) );
-	digest_update ( &md5_algorithm, ctx, &colon, sizeof ( colon ) );
-	digest_update ( &md5_algorithm, ctx, password, strlen ( password ) );
-	digest_final ( &md5_algorithm, ctx, digest );
-	base16_encode ( digest, sizeof ( digest ), ha1 );
-
-	/* Generate HA2 */
-	digest_init ( &md5_algorithm, ctx );
-	digest_update ( &md5_algorithm, ctx, method, strlen ( method ) );
-	digest_update ( &md5_algorithm, ctx, &colon, sizeof ( colon ) );
-	digest_update ( &md5_algorithm, ctx, uri, strlen ( uri ) );
-	digest_final ( &md5_algorithm, ctx, digest );
-	base16_encode ( digest, sizeof ( digest ), ha2 );
-
-	/* Generate response */
-	digest_init ( &md5_algorithm, ctx );
-	digest_update ( &md5_algorithm, ctx, ha1, strlen ( ha1 ) );
-	digest_update ( &md5_algorithm, ctx, &colon, sizeof ( colon ) );
-	digest_update ( &md5_algorithm, ctx, nonce, strlen ( nonce ) );
-	digest_update ( &md5_algorithm, ctx, &colon, sizeof ( colon ) );
-	digest_update ( &md5_algorithm, ctx, ha2, strlen ( ha2 ) );
-	digest_final ( &md5_algorithm, ctx, digest );
-	base16_encode ( digest, sizeof ( digest ), response );
-
-	/* Generate the authorisation string */
-	len = asprintf ( &auth, "Authorization: Digest username=\"%s\", "
-			 "realm=\"%s\", nonce=\"%s\", uri=\"%s\", "
-			 "%s%s%sresponse=\"%s\"\r\n", user, realm, nonce, uri,
-			 ( opaque ? "opaque=\"" : "" ),
-			 ( opaque ? opaque : "" ),
-			 ( opaque ? "\", " : "" ), response );
-	if ( len < 0 )
-		return NULL;
-
-	return auth;
-}
-
-/**
- * Generate HTTP POST parameter list
- *
- * @v http		HTTP request
- * @v buf		Buffer to contain HTTP POST parameters
- * @v len		Length of buffer
- * @ret len		Length of parameter list (excluding terminating NUL)
- */
-static size_t http_post_params ( struct http_request *http,
-				 char *buf, size_t len ) {
-	struct parameter *param;
-	ssize_t remaining = len;
-	size_t frag_len;
-
-	/* Add each parameter in the form "key=value", joined with "&" */
-	len = 0;
-	for_each_param ( param, http->uri->params ) {
-
-		/* Add the "&", if applicable */
-		if ( len ) {
-			if ( remaining > 0 )
-				*buf = '&';
-			buf++;
-			len++;
-			remaining--;
-		}
-
-		/* URI-encode the key */
-		frag_len = uri_encode ( param->key, buf, remaining, 0 );
-		buf += frag_len;
-		len += frag_len;
-		remaining -= frag_len;
-
-		/* Add the "=" */
-		if ( remaining > 0 )
-			*buf = '=';
-		buf++;
-		len++;
-		remaining--;
-
-		/* URI-encode the value */
-		frag_len = uri_encode ( param->value, buf, remaining, 0 );
-		buf += frag_len;
-		len += frag_len;
-		remaining -= frag_len;
-	}
-
-	/* Ensure string is NUL-terminated even if no parameters are present */
-	if ( remaining > 0 )
-		*buf = '\0';
-
-	return len;
-}
-
-/**
- * Generate HTTP POST body
- *
- * @v http		HTTP request
- * @ret post		I/O buffer containing POST body, or NULL on error
- */
-static struct io_buffer * http_post ( struct http_request *http ) {
-	struct io_buffer *post;
-	size_t len;
-	size_t check_len;
-
-	/* Calculate length of parameter list */
-	len = http_post_params ( http, NULL, 0 );
-
-	/* Allocate parameter list */
-	post = alloc_iob ( len + 1 /* NUL */ );
-	if ( ! post )
-		return NULL;
-
-	/* Fill parameter list */
-	check_len = http_post_params ( http, iob_put ( post, len ),
-				       ( len + 1 /* NUL */ ) );
-	assert ( len == check_len );
-	DBGC ( http, "HTTP %p POST %s\n", http, ( ( char * ) post->data ) );
-
-	return post;
-}
-
-/**
- * HTTP process
- *
- * @v http		HTTP request
- */
-static void http_step ( struct http_request *http ) {
-	struct io_buffer *post;
-	size_t uri_len;
-	char *method;
-	char *uri;
-	char *range;
-	char *auth;
-	char *content;
-	int len;
-	int rc;
-
-	/* Do nothing if we have already transmitted the request */
-	if ( ! ( http->flags & HTTP_TX_PENDING ) )
-		return;
-
-	/* Do nothing until socket is ready */
-	if ( ! xfer_window ( &http->socket ) )
-		return;
-
-	/* Force a HEAD request if we have nowhere to send any received data */
-	if ( ( xfer_window ( &http->xfer ) == 0 ) &&
-	     ( http->rx_buffer == UNULL ) ) {
-		http->flags |= ( HTTP_HEAD_ONLY | HTTP_CLIENT_KEEPALIVE );
-	}
-
-	/* Determine method */
-	method = ( ( http->flags & HTTP_HEAD_ONLY ) ? "HEAD" :
-		   ( http->uri->params ? "POST" : "GET" ) );
-
-	/* Construct path?query request */
-	uri_len = ( unparse_uri ( NULL, 0, http->uri,
-				  URI_PATH_BIT | URI_QUERY_BIT )
-		    + 1 /* possible "/" */ + 1 /* NUL */ );
-	uri = malloc ( uri_len );
-	if ( ! uri ) {
-		rc = -ENOMEM;
-		goto err_uri;
-	}
-	unparse_uri ( uri, uri_len, http->uri, URI_PATH_BIT | URI_QUERY_BIT );
-	if ( ! uri[0] ) {
-		uri[0] = '/';
-		uri[1] = '\0';
-	}
-
-	/* Calculate range request parameters if applicable */
-	if ( http->partial_len ) {
-		len = asprintf ( &range, "Range: bytes=%zd-%zd\r\n",
-				 http->partial_start,
-				 ( http->partial_start + http->partial_len
-				   - 1 ) );
-		if ( len < 0 ) {
-			rc = len;
-			goto err_range;
-		}
-	} else {
-		range = NULL;
-	}
-
-	/* Construct authorisation, if applicable */
-	if ( http->flags & HTTP_BASIC_AUTH ) {
-		auth = http_basic_auth ( http );
-		if ( ! auth ) {
-			rc = -ENOMEM;
-			goto err_auth;
-		}
-	} else if ( http->flags & HTTP_DIGEST_AUTH ) {
-		auth = http_digest_auth ( http, method, uri );
-		if ( ! auth ) {
-			rc = -ENOMEM;
-			goto err_auth;
-		}
-	} else {
-		auth = NULL;
-	}
-
-	/* Construct POST content, if applicable */
-	if ( http->uri->params ) {
-		post = http_post ( http );
-		if ( ! post ) {
-			rc = -ENOMEM;
-			goto err_post;
-		}
-		len = asprintf ( &content, "Content-Type: "
-				 "application/x-www-form-urlencoded\r\n"
-				 "Content-Length: %zd\r\n", iob_len ( post ) );
-		if ( len < 0 ) {
-			rc = len;
-			goto err_content;
-		}
-	} else {
-		post = NULL;
-		content = NULL;
-	}
-
-	/* Mark request as transmitted */
-	http->flags &= ~HTTP_TX_PENDING;
-
-	/* Send request */
-	if ( ( rc = xfer_printf ( &http->socket,
-				  "%s %s HTTP/1.1\r\n"
-				  "User-Agent: iPXE/%s\r\n"
-				  "Host: %s%s%s\r\n"
-				  "%s%s%s%s"
-				  "\r\n",
-				  method, uri, product_version, http->uri->host,
-				  ( http->uri->port ?
-				    ":" : "" ),
-				  ( http->uri->port ?
-				    http->uri->port : "" ),
-				  ( ( http->flags & HTTP_CLIENT_KEEPALIVE ) ?
-				    "Connection: keep-alive\r\n" : "" ),
-				  ( range ? range : "" ),
-				  ( auth ? auth : "" ),
-				  ( content ? content : "" ) ) ) != 0 ) {
-		goto err_xfer;
-	}
-
-	/* Send POST content, if applicable */
-	if ( post ) {
-		if ( ( rc = xfer_deliver_iob ( &http->socket,
-					       iob_disown ( post ) ) ) != 0 )
-			goto err_xfer_post;
-	}
-
- err_xfer_post:
- err_xfer:
-	free ( content );
- err_content:
-	free ( post );
- err_post:
-	free ( auth );
- err_auth:
-	free ( range );
- err_range:
-	free ( uri );
- err_uri:
-	if ( rc != 0 )
-		http_close ( http, rc );
-}
-
-/**
- * Check HTTP data transfer flow control window
- *
- * @v http		HTTP request
- * @ret len		Length of window
- */
-static size_t http_xfer_window ( struct http_request *http ) {
-
-	/* New block commands may be issued only when we are idle */
-	return ( ( http->rx_state == HTTP_RX_IDLE ) ? 1 : 0 );
-}
-
-/**
- * Initiate HTTP partial read
- *
- * @v http		HTTP request
- * @v partial		Partial transfer interface
- * @v offset		Starting offset
- * @v buffer		Data buffer
- * @v len		Length
- * @ret rc		Return status code
- */
-static int http_partial_read ( struct http_request *http,
-			       struct interface *partial,
-			       size_t offset, userptr_t buffer, size_t len ) {
-
-	/* Sanity check */
-	if ( http_xfer_window ( http ) == 0 )
-		return -EBUSY;
-
-	/* Initialise partial transfer parameters */
-	http->rx_buffer = buffer;
-	http->partial_start = offset;
-	http->partial_len = len;
-
-	/* Schedule request */
-	http->rx_state = HTTP_RX_RESPONSE;
-	http->flags = ( HTTP_TX_PENDING | HTTP_CLIENT_KEEPALIVE );
-	if ( ! len )
-		http->flags |= HTTP_HEAD_ONLY;
-	process_add ( &http->process );
-
-	/* Attach to parent interface and return */
-	intf_plug_plug ( &http->partial, partial );
-
-	return 0;
-}
-
-/**
- * Issue HTTP block device read
- *
- * @v http		HTTP request
- * @v block		Block data interface
- * @v lba		Starting logical block address
- * @v count		Number of blocks to transfer
- * @v buffer		Data buffer
- * @v len		Length of data buffer
- * @ret rc		Return status code
- */
-static int http_block_read ( struct http_request *http,
-			     struct interface *block,
-			     uint64_t lba, unsigned int count,
-			     userptr_t buffer, size_t len __unused ) {
-
-	return http_partial_read ( http, block, ( lba * HTTP_BLKSIZE ),
-				   buffer, ( count * HTTP_BLKSIZE ) );
-}
-
-/**
- * Read HTTP block device capacity
- *
- * @v http		HTTP request
- * @v block		Block data interface
- * @ret rc		Return status code
- */
-static int http_block_read_capacity ( struct http_request *http,
-				      struct interface *block ) {
-
-	return http_partial_read ( http, block, 0, 0, 0 );
-}
-
-/**
- * Describe HTTP device in an ACPI table
- *
- * @v http		HTTP request
- * @v acpi		ACPI table
- * @v len		Length of ACPI table
- * @ret rc		Return status code
- */
-static int http_acpi_describe ( struct http_request *http,
-				struct acpi_description_header *acpi,
-				size_t len ) {
-
-	DBGC ( http, "HTTP %p cannot yet describe device in an ACPI table\n",
-	       http );
-	( void ) acpi;
-	( void ) len;
-	return 0;
-}
-
-/** HTTP socket interface operations */
-static struct interface_operation http_socket_operations[] = {
-	INTF_OP ( xfer_window, struct http_request *, http_socket_window ),
-	INTF_OP ( xfer_deliver, struct http_request *, http_socket_deliver ),
-	INTF_OP ( xfer_window_changed, struct http_request *, http_step ),
-	INTF_OP ( intf_close, struct http_request *, http_socket_close ),
-};
-
-/** HTTP socket interface descriptor */
-static struct interface_descriptor http_socket_desc =
-	INTF_DESC_PASSTHRU ( struct http_request, socket,
-			     http_socket_operations, xfer );
-
-/** HTTP partial transfer interface operations */
-static struct interface_operation http_partial_operations[] = {
-	INTF_OP ( intf_close, struct http_request *, http_close ),
-};
-
-/** HTTP partial transfer interface descriptor */
-static struct interface_descriptor http_partial_desc =
-	INTF_DESC ( struct http_request, partial, http_partial_operations );
-
-/** HTTP data transfer interface operations */
-static struct interface_operation http_xfer_operations[] = {
-	INTF_OP ( xfer_window, struct http_request *, http_xfer_window ),
-	INTF_OP ( block_read, struct http_request *, http_block_read ),
-	INTF_OP ( block_read_capacity, struct http_request *,
-		  http_block_read_capacity ),
-	INTF_OP ( intf_close, struct http_request *, http_close ),
-	INTF_OP ( acpi_describe, struct http_request *, http_acpi_describe ),
-};
-
-/** HTTP data transfer interface descriptor */
-static struct interface_descriptor http_xfer_desc =
-	INTF_DESC_PASSTHRU ( struct http_request, xfer,
-			     http_xfer_operations, socket );
-
-/** HTTP process descriptor */
-static struct process_descriptor http_process_desc =
-	PROC_DESC_ONCE ( struct http_request, process, http_step );
-
-/**
- * Initiate an HTTP connection, with optional filter
- *
- * @v xfer		Data transfer interface
- * @v uri		Uniform Resource Identifier
- * @v default_port	Default port number
- * @v filter		Filter to apply to socket, or NULL
- * @ret rc		Return status code
- */
-int http_open_filter ( struct interface *xfer, struct uri *uri,
-		       unsigned int default_port,
-		       int ( * filter ) ( struct interface *xfer,
-					  const char *name,
-					  struct interface **next ) ) {
-	struct http_request *http;
-	int rc;
-
-	/* Sanity checks */
-	if ( ! uri->host )
-		return -EINVAL;
-
-	/* Allocate and populate HTTP structure */
-	http = zalloc ( sizeof ( *http ) );
-	if ( ! http )
-		return -ENOMEM;
-	ref_init ( &http->refcnt, http_free );
-	intf_init ( &http->xfer, &http_xfer_desc, &http->refcnt );
-	intf_init ( &http->partial, &http_partial_desc, &http->refcnt );
-	http->uri = uri_get ( uri );
-	http->default_port = default_port;
-	http->filter = filter;
-	intf_init ( &http->socket, &http_socket_desc, &http->refcnt );
-	process_init ( &http->process, &http_process_desc, &http->refcnt );
-	http->flags = HTTP_TX_PENDING;
-
-	/* Open socket */
-	if ( ( rc = http_socket_open ( http ) ) != 0 )
-		goto err;
-
-	/* Attach to parent interface, mortalise self, and return */
-	intf_plug_plug ( &http->xfer, xfer );
-	ref_put ( &http->refcnt );
-	return 0;
-
- err:
-	DBGC ( http, "HTTP %p could not create request: %s\n",
-	       http, strerror ( rc ) );
-	http_close ( http, rc );
-	ref_put ( &http->refcnt );
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/https.c ipxe-1.0.1~lliurex1505/src/net/tcp/https.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/https.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/https.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/iscsi.c ipxe-1.0.1~lliurex1505/src/net/tcp/iscsi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/iscsi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/iscsi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -338,8 +337,7 @@
 	iscsi->command = NULL;
 
 	/* Send SCSI response, if any */
-	if ( rsp )
-		scsi_response ( &iscsi->data, rsp );
+	scsi_response ( &iscsi->data, rsp );
 
 	/* Close SCSI command, if this is still the same command.  (It
 	 * is possible that the command interface has already been
@@ -572,23 +570,20 @@
 	struct io_buffer *iobuf;
 	unsigned long offset;
 	size_t len;
-	size_t pad_len;
 
 	offset = ntohl ( data_out->offset );
 	len = ISCSI_DATA_LEN ( data_out->lengths );
-	pad_len = ISCSI_DATA_PAD_LEN ( data_out->lengths );
 
 	assert ( iscsi->command != NULL );
 	assert ( iscsi->command->data_out );
 	assert ( ( offset + len ) <= iscsi->command->data_out_len );
 
-	iobuf = xfer_alloc_iob ( &iscsi->socket, ( len + pad_len ) );
+	iobuf = xfer_alloc_iob ( &iscsi->socket, len );
 	if ( ! iobuf )
 		return -ENOMEM;
 	
 	copy_from_user ( iob_put ( iobuf, len ),
 			 iscsi->command->data_out, offset, len );
-	memset ( iob_put ( iobuf, pad_len ), 0, pad_len );
 
 	return xfer_deliver_iob ( &iscsi->socket, iobuf );
 }
@@ -806,17 +801,13 @@
 	struct iscsi_bhs_login_request *request = &iscsi->tx_bhs.login_request;
 	struct io_buffer *iobuf;
 	size_t len;
-	size_t pad_len;
 
 	len = ISCSI_DATA_LEN ( request->lengths );
-	pad_len = ISCSI_DATA_PAD_LEN ( request->lengths );
-	iobuf = xfer_alloc_iob ( &iscsi->socket, ( len + pad_len ) );
+	iobuf = xfer_alloc_iob ( &iscsi->socket, len );
 	if ( ! iobuf )
 		return -ENOMEM;
 	iob_put ( iobuf, len );
 	iscsi_build_login_request_strings ( iscsi, iobuf->data, len );
-	memset ( iob_put ( iobuf, pad_len ), 0, pad_len );
-
 	return xfer_deliver_iob ( &iscsi->socket, iobuf );
 }
 
@@ -1425,6 +1416,27 @@
 }
 
 /**
+ * Transmit data padding of an iSCSI PDU
+ *
+ * @v iscsi		iSCSI session
+ * @ret rc		Return status code
+ * 
+ * Handle transmission of any data padding in a PDU data segment.
+ * iscsi::tx_bhs will be valid when this is called.
+ */
+static int iscsi_tx_data_padding ( struct iscsi_session *iscsi ) {
+	static const char pad[] = { '\0', '\0', '\0' };
+	struct iscsi_bhs_common *common = &iscsi->tx_bhs.common;
+	size_t pad_len;
+	
+	pad_len = ISCSI_DATA_PAD_LEN ( common->lengths );
+	if ( ! pad_len )
+		return 0;
+
+	return xfer_deliver_raw ( &iscsi->socket, pad, pad_len );
+}
+
+/**
  * Complete iSCSI PDU transmission
  *
  * @v iscsi		iSCSI session
@@ -1482,6 +1494,11 @@
 		case ISCSI_TX_DATA:
 			tx = iscsi_tx_data;
 			tx_len = ISCSI_DATA_LEN ( common->lengths );
+			next_state = ISCSI_TX_DATA_PADDING;
+			break;
+		case ISCSI_TX_DATA_PADDING:
+			tx = iscsi_tx_data_padding;
+			tx_len = ISCSI_DATA_PAD_LEN ( common->lengths );
 			next_state = ISCSI_TX_IDLE;
 			break;
 		case ISCSI_TX_IDLE:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/oncrpc.c ipxe-1.0.1~lliurex1505/src/net/tcp/oncrpc.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/oncrpc.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/oncrpc.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,250 +0,0 @@
-/*
- * Copyright (C) 2013 Marin Hannache <ipxe@mareo.fr>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <errno.h>
-#include <byteswap.h>
-#include <ipxe/socket.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/in.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/dhcp.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/uri.h>
-#include <ipxe/features.h>
-#include <ipxe/oncrpc.h>
-#include <ipxe/oncrpc_iob.h>
-#include <ipxe/init.h>
-#include <ipxe/settings.h>
-#include <config/general.h>
-
-/** @file
- *
- * SUN ONC RPC protocol
- *
- */
-
-/** Set most significant bit to 1. */
-#define SET_LAST_FRAME( x ) ( (x) | 1 << 31 )
-#define GET_FRAME_SIZE( x ) ( (x) & ~( 1 << 31 ) )
-
-#define ONCRPC_CALL     0
-#define ONCRPC_REPLY    1
-
-/** AUTH NONE authentication flavor */
-struct oncrpc_cred oncrpc_auth_none = {
-	.flavor = ONCRPC_AUTH_NONE,
-	.length = 0
-};
-
-struct setting uid_setting __setting ( SETTING_AUTH ) = {
-	.name        = "uid",
-	.description = "User ID",
-	.tag         = DHCP_EB_UID,
-	.type        = &setting_type_uint32
-};
-
-struct setting gid_setting __setting ( SETTING_AUTH ) = {
-	.name        = "gid",
-	.description = "Group ID",
-	.tag         = DHCP_EB_GID,
-	.type        = &setting_type_uint32
-};
-
-/**
- * Initialize an ONC RPC AUTH SYS credential structure
- *
- * @v auth_sys          The structure to initialize
- *
- * The hostname field is filled with the value of the hostname setting, if the
- * hostname setting is empty, PRODUCT_SHORT_NAME (usually "iPXE") is used
- * instead.
- */
-int oncrpc_init_cred_sys ( struct oncrpc_cred_sys *auth_sys ) {
-	if ( ! auth_sys )
-		return -EINVAL;
-
-	fetch_string_setting_copy ( NULL, &hostname_setting,
-	                            &auth_sys->hostname );
-	if ( ! auth_sys->hostname )
-		if ( ! ( auth_sys->hostname = strdup ( PRODUCT_SHORT_NAME ) ) )
-			return -ENOMEM;
-
-	auth_sys->uid         = fetch_uintz_setting ( NULL, &uid_setting );
-	auth_sys->gid         = fetch_uintz_setting ( NULL, &uid_setting );
-	auth_sys->aux_gid_len = 0;
-	auth_sys->stamp       = 0;
-
-	auth_sys->credential.flavor = ONCRPC_AUTH_SYS;
-	auth_sys->credential.length = 16 +
-	                              oncrpc_strlen ( auth_sys->hostname );
-
-	return 0;
-}
-
-/**
- * Prepare an ONC RPC session structure to be used by the ONC RPC layer
- *
- * @v session           ONC RPC session
- * @v credential        Credential structure pointer
- * @v verifier          Verifier structure pointer
- * @v prog_name         ONC RPC program number
- * @v prog_vers         ONC RPC program version number
- */
-void oncrpc_init_session ( struct oncrpc_session *session,
-                           struct oncrpc_cred *credential,
-                           struct oncrpc_cred *verifier, uint32_t prog_name,
-                           uint32_t prog_vers ) {
-	if ( ! session )
-		return;
-
-	session->rpc_id     = rand();
-	session->credential = credential;
-	session->verifier   = verifier;
-	session->prog_name  = prog_name;
-	session->prog_vers  = prog_vers;
-}
-
-int oncrpc_call ( struct interface *intf, struct oncrpc_session *session,
-                  uint32_t proc_name, const struct oncrpc_field fields[] ) {
-	int              rc;
-	size_t           frame_size;
-	struct io_buffer *io_buf;
-
-	if ( ! session )
-		return -EINVAL;
-
-	struct oncrpc_field header[] = {
-		ONCRPC_FIELD ( int32, 0 ),
-		ONCRPC_FIELD ( int32, ++session->rpc_id ),
-		ONCRPC_FIELD ( int32, ONCRPC_CALL ),
-		ONCRPC_FIELD ( int32, ONCRPC_VERS ),
-		ONCRPC_FIELD ( int32, session->prog_name ),
-		ONCRPC_FIELD ( int32, session->prog_vers ),
-		ONCRPC_FIELD ( int32, proc_name ),
-		ONCRPC_FIELD ( cred, session->credential ),
-		ONCRPC_FIELD ( cred, session->verifier ),
-		ONCRPC_FIELD_END,
-	};
-
-	frame_size  = oncrpc_compute_size ( header );
-	frame_size += oncrpc_compute_size ( fields );
-
-	io_buf = alloc_iob ( frame_size );
-	if ( ! io_buf )
-		return -ENOBUFS;
-
-	header[0].value.int32 = SET_LAST_FRAME ( frame_size -
-	                                         sizeof ( uint32_t ) );
-
-	oncrpc_iob_add_fields ( io_buf, header );
-	oncrpc_iob_add_fields ( io_buf, fields );
-
-	rc = xfer_deliver_iob ( intf, io_buf );
-	if ( rc != 0 )
-		free_iob ( io_buf );
-
-	return rc;
-}
-
-size_t oncrpc_compute_size ( const struct oncrpc_field fields[] ) {
-
-	size_t i;
-	size_t size = 0;
-
-	for ( i = 0; fields[i].type != oncrpc_none; i++ ) {
-		switch ( fields[i].type ) {
-		case oncrpc_int32:
-			size += sizeof ( uint32_t );
-			break;
-
-		case oncrpc_int64:
-			size += sizeof ( uint64_t );
-			break;
-
-		case oncrpc_str:
-			size += oncrpc_strlen ( fields[i].value.str );
-			break;
-
-		case oncrpc_array:
-			size += oncrpc_align ( fields[i].value.array.length );
-			size += sizeof ( uint32_t );
-			break;
-
-		case oncrpc_intarray:
-			size += sizeof ( uint32_t ) *
-				fields[i].value.intarray.length;
-			size += sizeof ( uint32_t );
-			break;
-
-		case oncrpc_cred:
-			size += fields[i].value.cred->length;
-			size += 2 * sizeof ( uint32_t );
-			break;
-
-		default:
-			return size;
-		}
-	}
-
-	return size;
-}
-
-/**
- * Parse an I/O buffer to extract a ONC RPC REPLY
- * @v session	        ONC RPC session
- * @v reply             Reply structure where data will be saved
- * @v io_buf            I/O buffer
- */
-int oncrpc_get_reply ( struct oncrpc_session *session __unused,
-                       struct oncrpc_reply *reply, struct io_buffer *io_buf ) {
-	if ( ! reply || ! io_buf )
-		return -EINVAL;
-
-	reply->frame_size = GET_FRAME_SIZE ( oncrpc_iob_get_int ( io_buf ) );
-	reply->rpc_id     = oncrpc_iob_get_int ( io_buf );
-
-	/* iPXE has no support for handling ONC RPC call */
-	if ( oncrpc_iob_get_int ( io_buf ) != ONCRPC_REPLY )
-		return -ENOSYS;
-
-	reply->reply_state = oncrpc_iob_get_int ( io_buf );
-
-	if ( reply->reply_state == 0 )
-	{
-		/* verifier.flavor */
-		oncrpc_iob_get_int ( io_buf );
-		/* verifier.length */
-		iob_pull ( io_buf, oncrpc_iob_get_int ( io_buf ));
-
-		/* We don't use the verifier in iPXE, let it be an empty
-		   verifier. */
-		reply->verifier = &oncrpc_auth_none;
-	}
-
-	reply->accept_state = oncrpc_iob_get_int ( io_buf );
-	reply->data         = io_buf;
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/syslogs.c ipxe-1.0.1~lliurex1505/src/net/tcp/syslogs.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp/syslogs.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp/syslogs.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,274 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Encrypted syslog protocol
- *
- */
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <byteswap.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/dhcp.h>
-#include <ipxe/settings.h>
-#include <ipxe/console.h>
-#include <ipxe/lineconsole.h>
-#include <ipxe/tls.h>
-#include <ipxe/syslog.h>
-#include <config/console.h>
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_SYSLOGS ) && CONSOLE_EXPLICIT ( CONSOLE_SYSLOGS ) )
-#undef CONSOLE_SYSLOGS
-#define CONSOLE_SYSLOGS ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_TUI )
-#endif
-
-struct console_driver syslogs_console __console_driver;
-
-/** The encrypted syslog server */
-static struct sockaddr_tcpip logserver = {
-	.st_family = AF_INET,
-	.st_port = htons ( SYSLOG_PORT ),
-};
-
-/**
- * Handle encrypted syslog TLS interface close
- *
- * @v intf		Interface
- * @v rc		Reason for close
- */
-static void syslogs_close ( struct interface *intf __unused, int rc ) {
-
-	DBG ( "SYSLOGS console disconnected: %s\n", strerror ( rc ) );
-}
-
-/**
- * Handle encrypted syslog TLS interface window change
- *
- * @v intf		Interface
- */
-static void syslogs_window_changed ( struct interface *intf ) {
-
-	/* Mark console as enabled when window first opens, indicating
-	 * that TLS negotiation is complete.  (Do not disable console
-	 * when window closes again, since TCP will close the window
-	 * whenever there is unACKed data.)
-	 */
-	if ( xfer_window ( intf ) ) {
-		if ( syslogs_console.disabled )
-			DBG ( "SYSLOGS console connected\n" );
-		syslogs_console.disabled = 0;
-	}
-}
-
-/** Encrypted syslog TLS interface operations */
-static struct interface_operation syslogs_operations[] = {
-	INTF_OP ( xfer_window_changed, struct interface *,
-		  syslogs_window_changed ),
-	INTF_OP ( intf_close, struct interface *, syslogs_close ),
-};
-
-/** Encrypted syslog TLS interface descriptor */
-static struct interface_descriptor syslogs_desc =
-	INTF_DESC_PURE ( syslogs_operations );
-
-/** The encrypted syslog TLS interface */
-static struct interface syslogs = INTF_INIT ( syslogs_desc );
-
-/******************************************************************************
- *
- * Console driver
- *
- ******************************************************************************
- */
-
-/** Encrypted syslog line buffer */
-static char syslogs_buffer[SYSLOG_BUFSIZE];
-
-/** Encrypted syslog severity */
-static unsigned int syslogs_severity = SYSLOG_DEFAULT_SEVERITY;
-
-/**
- * Handle ANSI set encrypted syslog priority (private sequence)
- *
- * @v count		Parameter count
- * @v params		List of graphic rendition aspects
- */
-static void syslogs_handle_priority ( unsigned int count __unused,
-				      int params[] ) {
-	if ( params[0] >= 0 ) {
-		syslogs_severity = params[0];
-	} else {
-		syslogs_severity = SYSLOG_DEFAULT_SEVERITY;
-	}
-}
-
-/** Encrypted syslog ANSI escape sequence handlers */
-static struct ansiesc_handler syslogs_handlers[] = {
-	{ ANSIESC_LOG_PRIORITY, syslogs_handle_priority },
-	{ 0, NULL }
-};
-
-/** Encrypted syslog line console */
-static struct line_console syslogs_line = {
-	.buffer = syslogs_buffer,
-	.len = sizeof ( syslogs_buffer ),
-	.ctx = {
-		.handlers = syslogs_handlers,
-	},
-};
-
-/** Encrypted syslog recursion marker */
-static int syslogs_entered;
-
-/**
- * Print a character to encrypted syslog console
- *
- * @v character		Character to be printed
- */
-static void syslogs_putchar ( int character ) {
-	int rc;
-
-	/* Ignore if we are already mid-logging */
-	if ( syslogs_entered )
-		return;
-
-	/* Fill line buffer */
-	if ( line_putchar ( &syslogs_line, character ) == 0 )
-		return;
-
-	/* Guard against re-entry */
-	syslogs_entered = 1;
-
-	/* Send log message */
-	if ( ( rc = syslog_send ( &syslogs, syslogs_severity,
-				  syslogs_buffer, "\n" ) ) != 0 ) {
-		DBG ( "SYSLOGS could not send log message: %s\n",
-		      strerror ( rc ) );
-	}
-
-	/* Clear re-entry flag */
-	syslogs_entered = 0;
-}
-
-/** Encrypted syslog console driver */
-struct console_driver syslogs_console __console_driver = {
-	.putchar = syslogs_putchar,
-	.disabled = 1,
-	.usage = CONSOLE_SYSLOGS,
-};
-
-/******************************************************************************
- *
- * Settings
- *
- ******************************************************************************
- */
-
-/** Encrypted syslog server setting */
-struct setting syslogs_setting __setting ( SETTING_MISC ) = {
-	.name = "syslogs",
-	.description = "Encrypted syslog server",
-	.tag = DHCP_EB_SYSLOGS_SERVER,
-	.type = &setting_type_string,
-};
-
-/**
- * Apply encrypted syslog settings
- *
- * @ret rc		Return status code
- */
-static int apply_syslogs_settings ( void ) {
-	static char *old_server;
-	char *server;
-	struct interface *socket;
-	int len;
-	int rc;
-
-	/* Fetch log server */
-	len = fetch_string_setting_copy ( NULL, &syslogs_setting, &server );
-	if ( len < 0 ) {
-		rc = len;
-		goto err_fetch_server;
-	}
-
-	/* Do nothing unless log server has changed */
-	if ( ( ( server == NULL ) && ( old_server == NULL ) ) ||
-	     ( ( server != NULL ) && ( old_server != NULL ) &&
-	       ( strcmp ( server, old_server ) == 0 ) ) ) {
-		rc = 0;
-		goto out_no_change;
-	}
-	free ( old_server );
-	old_server = NULL;
-
-	/* Reset encrypted syslog connection */
-	syslogs_console.disabled = 1;
-	intf_restart ( &syslogs, 0 );
-
-	/* Do nothing unless we have a log server */
-	if ( ! server ) {
-		DBG ( "SYSLOGS has no log server\n" );
-		rc = 0;
-		goto out_no_server;
-	}
-
-	/* Add TLS filter */
-	if ( ( rc = add_tls ( &syslogs, server, &socket ) ) != 0 ) {
-		DBG ( "SYSLOGS cannot create TLS filter: %s\n",
-		      strerror ( rc ) );
-		goto err_add_tls;
-	}
-
-	/* Connect to log server */
-	if ( ( rc = xfer_open_named_socket ( socket, SOCK_STREAM,
-					     (( struct sockaddr *) &logserver ),
-					     server, NULL ) ) != 0 ) {
-		DBG ( "SYSLOGS cannot connect to log server: %s\n",
-		      strerror ( rc ) );
-		goto err_open_named_socket;
-	}
-	DBG ( "SYSLOGS using log server %s\n", server );
-
-	/* Record log server */
-	old_server = server;
-	server = NULL;
-
-	/* Success */
-	rc = 0;
-
- err_open_named_socket:
- err_add_tls:
- out_no_server:
- out_no_change:
-	free ( server );
- err_fetch_server:
-	return rc;
-}
-
-/** Encrypted syslog settings applicator */
-struct settings_applicator syslogs_applicator __settings_applicator = {
-	.apply = apply_syslogs_settings,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp.c ipxe-1.0.1~lliurex1505/src/net/tcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -7,10 +7,8 @@
 #include <ipxe/timer.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/malloc.h>
-#include <ipxe/init.h>
 #include <ipxe/retry.h>
 #include <ipxe/refcnt.h>
-#include <ipxe/pending.h>
 #include <ipxe/xfer.h>
 #include <ipxe/open.h>
 #include <ipxe/uri.h>
@@ -87,18 +85,6 @@
 	 * Equivalent to TS.Recent in RFC 1323 terminology.
 	 */
 	uint32_t ts_recent;
-	/** Send window scale
-	 *
-	 * Equivalent to Snd.Wind.Scale in RFC 1323 terminology
-	 */
-	uint8_t snd_win_scale;
-	/** Receive window scale
-	 *
-	 * Equivalent to Rcv.Wind.Scale in RFC 1323 terminology
-	 */
-	uint8_t rcv_win_scale;
-	/** Maximum receive window */
-	uint32_t max_rcv_win;
 
 	/** Transmit queue */
 	struct list_head tx_queue;
@@ -108,11 +94,6 @@
 	struct retry_timer timer;
 	/** Shutdown (TIME_WAIT) timer */
 	struct retry_timer wait;
-
-	/** Pending operations for SYN and FIN */
-	struct pending_operation pending_flags;
-	/** Pending operations for transmit queue */
-	struct pending_operation pending_data;
 };
 
 /** TCP flags */
@@ -157,7 +138,6 @@
 static struct interface_descriptor tcp_xfer_desc;
 static void tcp_expired ( struct retry_timer *timer, int over );
 static void tcp_wait_expired ( struct retry_timer *timer, int over );
-static struct tcp_connection * tcp_demux ( unsigned int local_port );
 static int tcp_rx_ack ( struct tcp_connection *tcp, uint32_t ack,
 			uint32_t win );
 
@@ -227,14 +207,46 @@
  */
 
 /**
- * Check if local TCP port is available
+ * Bind TCP connection to local port
  *
+ * @v tcp		TCP connection
  * @v port		Local port number
- * @ret port		Local port number, or negative error
+ * @ret rc		Return status code
+ *
+ * If the port is 0, the connection is assigned an available port
+ * between 1024 and 65535.
  */
-static int tcp_port_available ( int port ) {
+static int tcp_bind ( struct tcp_connection *tcp, unsigned int port ) {
+	struct tcp_connection *existing;
+	uint16_t try_port;
+	unsigned int i;
+
+	/* If no port is specified, find an available port */
+	if ( ! port ) {
+		try_port = random();
+		for ( i = 0 ; i < 65536 ; i++ ) {
+			try_port++;
+			if ( try_port < 1024 )
+				continue;
+			if ( tcp_bind ( tcp, try_port ) == 0 )
+				return 0;
+		}
+		DBGC ( tcp, "TCP %p could not bind: no free ports\n", tcp );
+		return -EADDRINUSE;
+	}
 
-	return ( tcp_demux ( port ) ? -EADDRINUSE : port );
+	/* Attempt bind to local port */
+	list_for_each_entry ( existing, &tcp_conns, list ) {
+		if ( existing->local_port == port ) {
+			DBGC ( tcp, "TCP %p could not bind: port %d in use\n",
+			       tcp, port );
+			return -EADDRINUSE;
+		}
+	}
+	tcp->local_port = port;
+
+	DBGC ( tcp, "TCP %p bound to port %d\n", tcp, port );
+	return 0;
 }
 
 /**
@@ -250,7 +262,7 @@
 	struct sockaddr_tcpip *st_peer = ( struct sockaddr_tcpip * ) peer;
 	struct sockaddr_tcpip *st_local = ( struct sockaddr_tcpip * ) local;
 	struct tcp_connection *tcp;
-	int port;
+	unsigned int bind_port;
 	int rc;
 
 	/* Allocate and initialise structure */
@@ -266,28 +278,18 @@
 	tcp->tcp_state = TCP_STATE_SENT ( TCP_SYN );
 	tcp_dump_state ( tcp );
 	tcp->snd_seq = random();
-	tcp->max_rcv_win = TCP_MAX_WINDOW_SIZE;
 	INIT_LIST_HEAD ( &tcp->tx_queue );
 	INIT_LIST_HEAD ( &tcp->rx_queue );
 	memcpy ( &tcp->peer, st_peer, sizeof ( tcp->peer ) );
 
 	/* Bind to local port */
-	port = tcpip_bind ( st_local, tcp_port_available );
-	if ( port < 0 ) {
-		rc = port;
-		DBGC ( tcp, "TCP %p could not bind: %s\n",
-		       tcp, strerror ( rc ) );
+	bind_port = ( st_local ? ntohs ( st_local->st_port ) : 0 );
+	if ( ( rc = tcp_bind ( tcp, bind_port ) ) != 0 )
 		goto err;
-	}
-	tcp->local_port = port;
-	DBGC ( tcp, "TCP %p bound to port %d\n", tcp, tcp->local_port );
 
 	/* Start timer to initiate SYN */
 	start_timer_nodelay ( &tcp->timer );
 
-	/* Add a pending operation for the SYN */
-	pending_get ( &tcp->pending_flags );
-
 	/* Attach parent interface, transfer reference to connection
 	 * list and return
 	 */
@@ -337,17 +339,10 @@
 		list_for_each_entry_safe ( iobuf, tmp, &tcp->tx_queue, list ) {
 			list_del ( &iobuf->list );
 			free_iob ( iobuf );
-			pending_put ( &tcp->pending_data );
 		}
-		assert ( ! is_pending ( &tcp->pending_data ) );
-
-		/* Remove pending operations for SYN and FIN, if applicable */
-		pending_put ( &tcp->pending_flags );
-		pending_put ( &tcp->pending_flags );
 
 		/* Remove from list and drop reference */
 		stop_timer ( &tcp->timer );
-		stop_timer ( &tcp->wait );
 		list_del ( &tcp->list );
 		ref_put ( &tcp->refcnt );
 		DBGC ( tcp, "TCP %p connection deleted\n", tcp );
@@ -362,14 +357,9 @@
 		tcp_rx_ack ( tcp, ( tcp->snd_seq + 1 ), 0 );
 
 	/* If we have no data remaining to send, start sending FIN */
-	if ( list_empty ( &tcp->tx_queue ) &&
-	     ! ( tcp->tcp_state & TCP_STATE_SENT ( TCP_FIN ) ) ) {
-
+	if ( list_empty ( &tcp->tx_queue ) ) {
 		tcp->tcp_state |= TCP_STATE_SENT ( TCP_FIN );
 		tcp_dump_state ( tcp );
-
-		/* Add a pending operation for the FIN */
-		pending_get ( &tcp->pending_flags );
 	}
 }
 
@@ -454,7 +444,6 @@
 			if ( ! iob_len ( iobuf ) ) {
 				list_del ( &iobuf->list );
 				free_iob ( iobuf );
-				pending_put ( &tcp->pending_data );
 			}
 		}
 		len += frag_len;
@@ -478,7 +467,6 @@
 	struct io_buffer *iobuf;
 	struct tcp_header *tcphdr;
 	struct tcp_mss_option *mssopt;
-	struct tcp_window_scale_padded_option *wsopt;
 	struct tcp_timestamp_padded_option *tsopt;
 	void *payload;
 	unsigned int flags;
@@ -486,7 +474,6 @@
 	uint32_t seq_len;
 	uint32_t app_win;
 	uint32_t max_rcv_win;
-	uint32_t max_representable_win;
 	int rc;
 
 	/* If retransmission timer is already running, do nothing */
@@ -535,13 +522,12 @@
 	tcp_process_tx_queue ( tcp, len, iobuf, 0 );
 
 	/* Expand receive window if possible */
-	max_rcv_win = tcp->max_rcv_win;
+	max_rcv_win = ( ( freemem * 3 ) / 4 );
+	if ( max_rcv_win > TCP_MAX_WINDOW_SIZE )
+		max_rcv_win = TCP_MAX_WINDOW_SIZE;
 	app_win = xfer_window ( &tcp->xfer );
 	if ( max_rcv_win > app_win )
 		max_rcv_win = app_win;
-	max_representable_win = ( 0xffff << tcp->rcv_win_scale );
-	if ( max_rcv_win > max_representable_win )
-		max_rcv_win = max_representable_win;
 	max_rcv_win &= ~0x03; /* Keep everything dword-aligned */
 	if ( tcp->rcv_win < max_rcv_win )
 		tcp->rcv_win = max_rcv_win;
@@ -553,11 +539,6 @@
 		mssopt->kind = TCP_OPTION_MSS;
 		mssopt->length = sizeof ( *mssopt );
 		mssopt->mss = htons ( TCP_MSS );
-		wsopt = iob_push ( iobuf, sizeof ( *wsopt ) );
-		wsopt->nop = TCP_OPTION_NOP;
-		wsopt->wsopt.kind = TCP_OPTION_WS;
-		wsopt->wsopt.length = sizeof ( wsopt->wsopt );
-		wsopt->wsopt.scale = TCP_RX_WINDOW_SCALE;
 	}
 	if ( ( flags & TCP_SYN ) || ( tcp->flags & TCP_TS_ENABLED ) ) {
 		tsopt = iob_push ( iobuf, sizeof ( *tsopt ) );
@@ -577,7 +558,7 @@
 	tcphdr->ack = htonl ( tcp->rcv_ack );
 	tcphdr->hlen = ( ( payload - iobuf->data ) << 2 );
 	tcphdr->flags = flags;
-	tcphdr->win = htons ( tcp->rcv_win >> tcp->rcv_win_scale );
+	tcphdr->win = htons ( tcp->rcv_win );
 	tcphdr->csum = tcpip_chksum ( iobuf->data, iob_len ( iobuf ) );
 
 	/* Dump header */
@@ -690,7 +671,7 @@
 	tcphdr->ack = in_tcphdr->seq;
 	tcphdr->hlen = ( ( sizeof ( *tcphdr ) / 4 ) << 4 );
 	tcphdr->flags = ( TCP_RST | TCP_ACK );
-	tcphdr->win = htons ( 0 );
+	tcphdr->win = htons ( TCP_MAX_WINDOW_SIZE );
 	tcphdr->csum = tcpip_chksum ( iobuf->data, iob_len ( iobuf ) );
 
 	/* Dump header */
@@ -765,9 +746,6 @@
 		case TCP_OPTION_MSS:
 			options->mssopt = data;
 			break;
-		case TCP_OPTION_WS:
-			options->wsopt = data;
-			break;
 		case TCP_OPTION_TS:
 			options->tsopt = data;
 			break;
@@ -824,10 +802,6 @@
 		tcp->rcv_ack = seq;
 		if ( options->tsopt )
 			tcp->flags |= TCP_TS_ENABLED;
-		if ( options->wsopt ) {
-			tcp->snd_win_scale = options->wsopt->scale;
-			tcp->rcv_win_scale = TCP_RX_WINDOW_SCALE;
-		}
 	}
 
 	/* Ignore duplicate SYN */
@@ -893,10 +867,8 @@
 	len = ack_len;
 	acked_flags = ( TCP_FLAGS_SENDING ( tcp->tcp_state ) &
 			( TCP_SYN | TCP_FIN ) );
-	if ( acked_flags ) {
+	if ( acked_flags )
 		len--;
-		pending_put ( &tcp->pending_flags );
-	}
 
 	/* Update SEQ and sent counters, and window size */
 	tcp->snd_seq = ack;
@@ -911,12 +883,8 @@
 		tcp->tcp_state |= TCP_STATE_ACKED ( acked_flags );
 
 	/* Start sending FIN if we've had all possible data ACKed */
-	if ( list_empty ( &tcp->tx_queue ) &&
-	     ( tcp->flags & TCP_XFER_CLOSED ) &&
-	     ! ( tcp->tcp_state & TCP_STATE_SENT ( TCP_FIN ) ) ) {
+	if ( list_empty ( &tcp->tx_queue ) && ( tcp->flags & TCP_XFER_CLOSED ) )
 		tcp->tcp_state |= TCP_STATE_SENT ( TCP_FIN );
-		pending_get ( &tcp->pending_flags );
-	}
 
 	return 0;
 }
@@ -1115,14 +1083,12 @@
  * Process received packet
  *
  * @v iobuf		I/O buffer
- * @v netdev		Network device
  * @v st_src		Partially-filled source address
  * @v st_dest		Partially-filled destination address
  * @v pshdr_csum	Pseudo-header checksum
  * @ret rc		Return status code
   */
 static int tcp_rx ( struct io_buffer *iobuf,
-		    struct net_device *netdev __unused,
 		    struct sockaddr_tcpip *st_src,
 		    struct sockaddr_tcpip *st_dest __unused,
 		    uint16_t pshdr_csum ) {
@@ -1133,7 +1099,6 @@
 	uint16_t csum;
 	uint32_t seq;
 	uint32_t ack;
-	uint16_t raw_win;
 	uint32_t win;
 	unsigned int flags;
 	size_t len;
@@ -1174,11 +1139,11 @@
 	tcp = tcp_demux ( ntohs ( tcphdr->dest ) );
 	seq = ntohl ( tcphdr->seq );
 	ack = ntohl ( tcphdr->ack );
-	raw_win = ntohs ( tcphdr->win );
+	win = ntohs ( tcphdr->win );
 	flags = tcphdr->flags;
 	tcp_rx_opts ( tcp, ( ( ( void * ) tcphdr ) + sizeof ( *tcphdr ) ),
 		      ( hlen - sizeof ( *tcphdr ) ), &options );
-	if ( tcp && options.tsopt )
+	if ( options.tsopt )
 		tcp->ts_val = ntohl ( options.tsopt->tsval );
 	iob_pull ( iobuf, hlen );
 	len = iob_len ( iobuf );
@@ -1193,8 +1158,9 @@
 	tcp_dump_flags ( tcp, tcphdr->flags );
 	DBGC2 ( tcp, "\n" );
 
-	/* If no connection was found, silently drop packet */
+	/* If no connection was found, send RST */
 	if ( ! tcp ) {
+		tcp_xmit_reset ( tcp, st_src, tcphdr );
 		rc = -ENOTCONN;
 		goto discard;
 	}
@@ -1204,7 +1170,6 @@
 
 	/* Handle ACK, if present */
 	if ( flags & TCP_ACK ) {
-		win = ( raw_win << tcp->snd_win_scale );
 		if ( ( rc = tcp_rx_ack ( tcp, ack, win ) ) != 0 ) {
 			tcp_xmit_reset ( tcp, st_src, tcphdr );
 			goto discard;
@@ -1276,29 +1241,13 @@
 static unsigned int tcp_discard ( void ) {
 	struct tcp_connection *tcp;
 	struct io_buffer *iobuf;
-	struct tcp_rx_queued_header *tcpqhdr;
-	uint32_t max_win;
 	unsigned int discarded = 0;
 
 	/* Try to drop one queued RX packet from each connection */
 	list_for_each_entry ( tcp, &tcp_conns, list ) {
 		list_for_each_entry_reverse ( iobuf, &tcp->rx_queue, list ) {
-
-			/* Limit window to prevent future discards */
-			tcpqhdr = iobuf->data;
-			max_win = ( tcpqhdr->seq - tcp->rcv_ack );
-			if ( max_win < tcp->max_rcv_win ) {
-				DBGC ( tcp, "TCP %p reducing maximum window "
-				       "from %d to %d\n",
-				       tcp, tcp->max_rcv_win, max_win );
-				tcp->max_rcv_win = max_win;
-			}
-
-			/* Remove packet from queue */
 			list_del ( &iobuf->list );
 			free_iob ( iobuf );
-
-			/* Report discard */
 			discarded++;
 			break;
 		}
@@ -1308,30 +1257,10 @@
 }
 
 /** TCP cache discarder */
-struct cache_discarder tcp_discarder __cache_discarder ( CACHE_NORMAL ) = {
+struct cache_discarder tcp_cache_discarder __cache_discarder = {
 	.discard = tcp_discard,
 };
 
-/**
- * Shut down all TCP connections
- *
- */
-static void tcp_shutdown ( int booting __unused ) {
-	struct tcp_connection *tcp;
-
-	while ( ( tcp = list_first_entry ( &tcp_conns, struct tcp_connection,
-					   list ) ) != NULL ) {
-		tcp->tcp_state = TCP_CLOSED;
-		tcp_dump_state ( tcp );
-		tcp_close ( tcp, -ECANCELED );
-	}
-}
-
-/** TCP shutdown function */
-struct startup_fn tcp_startup_fn __startup_fn ( STARTUP_EARLY ) = {
-	.shutdown = tcp_shutdown,
-};
-
 /***************************************************************************
  *
  * Data transfer interface
@@ -1369,9 +1298,6 @@
 	/* Enqueue packet */
 	list_add_tail ( &iobuf->list, &tcp->tx_queue );
 
-	/* Each enqueued packet is a pending operation */
-	pending_get ( &tcp->pending_data );
-
 	/* Transmit data, if possible */
 	tcp_xmit ( tcp );
 
@@ -1396,20 +1322,13 @@
  ***************************************************************************
  */
 
-/** TCP IPv4 socket opener */
-struct socket_opener tcp_ipv4_socket_opener __socket_opener = {
+/** TCP socket opener */
+struct socket_opener tcp_socket_opener __socket_opener = {
 	.semantics	= TCP_SOCK_STREAM,
 	.family		= AF_INET,
 	.open		= tcp_open,
 };
 
-/** TCP IPv6 socket opener */
-struct socket_opener tcp_ipv6_socket_opener __socket_opener = {
-	.semantics	= TCP_SOCK_STREAM,
-	.family		= AF_INET6,
-	.open		= tcp_open,
-};
-
 /** Linkage hack */
 int tcp_sock_stream = TCP_SOCK_STREAM;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcpip.c ipxe-1.0.1~lliurex1505/src/net/tcpip.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tcpip.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tcpip.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,5 +1,4 @@
 #include <stdint.h>
-#include <stdlib.h>
 #include <string.h>
 #include <errno.h>
 #include <byteswap.h>
@@ -20,7 +19,6 @@
 /** Process a received TCP/IP packet
  *
  * @v iobuf		I/O buffer
- * @v netdev		Network device
  * @v tcpip_proto	Transport-layer protocol number
  * @v st_src		Partially-filled source address
  * @v st_dest		Partially-filled destination address
@@ -33,8 +31,8 @@
  * address family and the network-layer addresses, but leave the ports
  * and the rest of the structures as zero).
  */
-int tcpip_rx ( struct io_buffer *iobuf, struct net_device *netdev,
-	       uint8_t tcpip_proto, struct sockaddr_tcpip *st_src,
+int tcpip_rx ( struct io_buffer *iobuf, uint8_t tcpip_proto, 
+	       struct sockaddr_tcpip *st_src,
 	       struct sockaddr_tcpip *st_dest,
 	       uint16_t pshdr_csum ) {
 	struct tcpip_protocol *tcpip;
@@ -43,8 +41,7 @@
 	for_each_table_entry ( tcpip, TCPIP_PROTOCOLS ) {
 		if ( tcpip->tcpip_proto == tcpip_proto ) {
 			DBG ( "TCP/IP received %s packet\n", tcpip->name );
-			return tcpip->rx ( iobuf, netdev, st_src, st_dest,
-					   pshdr_csum );
+			return tcpip->rx ( iobuf, st_src, st_dest, pshdr_csum );
 		}
 	}
 
@@ -100,8 +97,8 @@
  * or both.  Deciding which to swap is left as an exercise for the
  * interested reader.
  */
-uint16_t generic_tcpip_continue_chksum ( uint16_t partial,
-					 const void *data, size_t len ) {
+uint16_t tcpip_continue_chksum ( uint16_t partial, const void *data,
+				 size_t len ) {
 	unsigned int cksum = ( ( ~partial ) & 0xffff );
 	unsigned int value;
 	unsigned int i;
@@ -136,46 +133,3 @@
 uint16_t tcpip_chksum ( const void *data, size_t len ) {
 	return tcpip_continue_chksum ( TCPIP_EMPTY_CSUM, data, len );
 }
-
-/**
- * Bind to local TCP/IP port
- *
- * @v st_local		Local TCP/IP socket address, or NULL
- * @v available		Function to check port availability
- * @ret port		Local port number, or negative error
- */
-int tcpip_bind ( struct sockaddr_tcpip *st_local,
-		 int ( * available ) ( int port ) ) {
-	uint16_t flags = 0;
-	uint16_t try_port = 0;
-	uint16_t min_port;
-	uint16_t max_port;
-	unsigned int offset;
-	unsigned int i;
-
-	/* Extract parameters from local socket address */
-	if ( st_local ) {
-		flags = st_local->st_flags;
-		try_port = ntohs ( st_local->st_port );
-	}
-
-	/* If an explicit port is specified, check its availability */
-	if ( try_port )
-		return available ( try_port );
-
-	/* Otherwise, find an available port in the range [1,1023] or
-	 * [1025,65535] as appropriate.
-	 */
-	min_port = ( ( ( ! flags ) & TCPIP_BIND_PRIVILEGED ) + 1 );
-	max_port = ( ( flags & TCPIP_BIND_PRIVILEGED ) - 1 );
-	offset = random();
-	for ( i = 0 ; i <= max_port ; i++ ) {
-		try_port = ( ( i + offset ) & max_port );
-		if ( try_port < min_port )
-			continue;
-		if ( available ( try_port ) < 0 )
-			continue;
-		return try_port;
-	}
-	return -EADDRINUSE;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/tls.c ipxe-1.0.1~lliurex1505/src/net/tls.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/tls.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/tls.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -29,143 +28,20 @@
 #include <stdlib.h>
 #include <stdarg.h>
 #include <string.h>
-#include <time.h>
 #include <errno.h>
 #include <byteswap.h>
-#include <ipxe/pending.h>
 #include <ipxe/hmac.h>
 #include <ipxe/md5.h>
 #include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
 #include <ipxe/aes.h>
 #include <ipxe/rsa.h>
 #include <ipxe/iobuf.h>
 #include <ipxe/xfer.h>
 #include <ipxe/open.h>
+#include <ipxe/asn1.h>
 #include <ipxe/x509.h>
-#include <ipxe/clientcert.h>
-#include <ipxe/rbg.h>
-#include <ipxe/validator.h>
 #include <ipxe/tls.h>
 
-/* Disambiguate the various error causes */
-#define EACCES_WRONG_NAME __einfo_error ( EINFO_EACCES_WRONG_NAME )
-#define EINFO_EACCES_WRONG_NAME						\
-	__einfo_uniqify ( EINFO_EACCES, 0x02,				\
-			  "Incorrect server name" )
-#define EINVAL_CHANGE_CIPHER __einfo_error ( EINFO_EINVAL_CHANGE_CIPHER )
-#define EINFO_EINVAL_CHANGE_CIPHER					\
-	__einfo_uniqify ( EINFO_EINVAL, 0x01,				\
-			  "Invalid Change Cipher record" )
-#define EINVAL_ALERT __einfo_error ( EINFO_EINVAL_ALERT )
-#define EINFO_EINVAL_ALERT						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x02,				\
-			  "Invalid Alert record" )
-#define EINVAL_HELLO __einfo_error ( EINFO_EINVAL_HELLO )
-#define EINFO_EINVAL_HELLO						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x03,				\
-			  "Invalid Server Hello record" )
-#define EINVAL_CERTIFICATE __einfo_error ( EINFO_EINVAL_CERTIFICATE )
-#define EINFO_EINVAL_CERTIFICATE					\
-	__einfo_uniqify ( EINFO_EINVAL, 0x04,				\
-			  "Invalid Certificate" )
-#define EINVAL_CERTIFICATES __einfo_error ( EINFO_EINVAL_CERTIFICATES )
-#define EINFO_EINVAL_CERTIFICATES					\
-	__einfo_uniqify ( EINFO_EINVAL, 0x05,				\
-			  "Invalid Server Certificate record" )
-#define EINVAL_HELLO_DONE __einfo_error ( EINFO_EINVAL_HELLO_DONE )
-#define EINFO_EINVAL_HELLO_DONE						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x06,				\
-			  "Invalid Server Hello Done record" )
-#define EINVAL_FINISHED __einfo_error ( EINFO_EINVAL_FINISHED )
-#define EINFO_EINVAL_FINISHED						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x07,				\
-			  "Invalid Server Finished record" )
-#define EINVAL_HANDSHAKE __einfo_error ( EINFO_EINVAL_HANDSHAKE )
-#define EINFO_EINVAL_HANDSHAKE						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x08,				\
-			  "Invalid Handshake record" )
-#define EINVAL_STREAM __einfo_error ( EINFO_EINVAL_STREAM )
-#define EINFO_EINVAL_STREAM						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x09,				\
-			  "Invalid stream-ciphered record" )
-#define EINVAL_BLOCK __einfo_error ( EINFO_EINVAL_BLOCK )
-#define EINFO_EINVAL_BLOCK						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x0a,				\
-			  "Invalid block-ciphered record" )
-#define EINVAL_PADDING __einfo_error ( EINFO_EINVAL_PADDING )
-#define EINFO_EINVAL_PADDING						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x0b,				\
-			  "Invalid block padding" )
-#define EINVAL_RX_STATE __einfo_error ( EINFO_EINVAL_RX_STATE )
-#define EINFO_EINVAL_RX_STATE						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x0c,				\
-			  "Invalid receive state" )
-#define EINVAL_MAC __einfo_error ( EINFO_EINVAL_MAC )
-#define EINFO_EINVAL_MAC						\
-	__einfo_uniqify ( EINFO_EINVAL, 0x0d,				\
-			  "Invalid MAC" )
-#define EIO_ALERT __einfo_error ( EINFO_EIO_ALERT )
-#define EINFO_EIO_ALERT							\
-	__einfo_uniqify ( EINFO_EINVAL, 0x01,				\
-			  "Unknown alert level" )
-#define ENOMEM_CONTEXT __einfo_error ( EINFO_ENOMEM_CONTEXT )
-#define EINFO_ENOMEM_CONTEXT						\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x01,				\
-			  "Not enough space for crypto context" )
-#define ENOMEM_CERTIFICATE __einfo_error ( EINFO_ENOMEM_CERTIFICATE )
-#define EINFO_ENOMEM_CERTIFICATE					\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x02,				\
-			  "Not enough space for certificate" )
-#define ENOMEM_CHAIN __einfo_error ( EINFO_ENOMEM_CHAIN )
-#define EINFO_ENOMEM_CHAIN						\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x03,				\
-			  "Not enough space for certificate chain" )
-#define ENOMEM_TX_PLAINTEXT __einfo_error ( EINFO_ENOMEM_TX_PLAINTEXT )
-#define EINFO_ENOMEM_TX_PLAINTEXT					\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x04,				\
-			  "Not enough space for transmitted plaintext" )
-#define ENOMEM_TX_CIPHERTEXT __einfo_error ( EINFO_ENOMEM_TX_CIPHERTEXT )
-#define EINFO_ENOMEM_TX_CIPHERTEXT					\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x05,				\
-			  "Not enough space for transmitted ciphertext" )
-#define ENOMEM_RX_DATA __einfo_error ( EINFO_ENOMEM_RX_DATA )
-#define EINFO_ENOMEM_RX_DATA						\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x07,				\
-			  "Not enough space for received data" )
-#define ENOMEM_RX_CONCAT __einfo_error ( EINFO_ENOMEM_RX_CONCAT )
-#define EINFO_ENOMEM_RX_CONCAT						\
-	__einfo_uniqify ( EINFO_ENOMEM, 0x08,				\
-			  "Not enough space to concatenate received data" )
-#define ENOTSUP_CIPHER __einfo_error ( EINFO_ENOTSUP_CIPHER )
-#define EINFO_ENOTSUP_CIPHER						\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x01,				\
-			  "Unsupported cipher" )
-#define ENOTSUP_NULL __einfo_error ( EINFO_ENOTSUP_NULL )
-#define EINFO_ENOTSUP_NULL						\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x02,				\
-			  "Refusing to use null cipher" )
-#define ENOTSUP_SIG_HASH __einfo_error ( EINFO_ENOTSUP_SIG_HASH )
-#define EINFO_ENOTSUP_SIG_HASH						\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x03,				\
-			  "Unsupported signature and hash algorithm" )
-#define ENOTSUP_VERSION __einfo_error ( EINFO_ENOTSUP_VERSION )
-#define EINFO_ENOTSUP_VERSION						\
-	__einfo_uniqify ( EINFO_ENOTSUP, 0x04,				\
-			  "Unsupported protocol version" )
-#define EPERM_ALERT __einfo_error ( EINFO_EPERM_ALERT )
-#define EINFO_EPERM_ALERT						\
-	__einfo_uniqify ( EINFO_EPERM, 0x01,				\
-			  "Received fatal alert" )
-#define EPERM_VERIFY __einfo_error ( EINFO_EPERM_VERIFY )
-#define EINFO_EPERM_VERIFY						\
-	__einfo_uniqify ( EINFO_EPERM, 0x02,				\
-			  "Handshake verification failed" )
-#define EPROTO_VERSION __einfo_error ( EINFO_EPROTO_VERSION )
-#define EINFO_EPROTO_VERSION						\
-	__einfo_uniqify ( EINFO_EPROTO, 0x01,				\
-			  "Illegal protocol version upgrade" )
-
 static int tls_send_plaintext ( struct tls_session *tls, unsigned int type,
 				const void *data, size_t len );
 static void tls_clear_cipher ( struct tls_session *tls,
@@ -187,103 +63,10 @@
  * TLS uses 24-bit integers in several places, which are awkward to
  * parse in C.
  */
-static inline __attribute__ (( always_inline )) unsigned long
-tls_uint24 ( const uint8_t field24[3] ) {
-	const uint32_t *field32 __attribute__ (( may_alias )) =
-		( ( const void * ) field24 );
-	return ( be32_to_cpu ( *field32 ) >> 8 );
-}
-
-/**
- * Set 24-bit field value
- *
- * @v field24		24-bit field
- * @v value		Field value
- *
- * The field must be pre-zeroed.
- */
-static void tls_set_uint24 ( uint8_t field24[3], unsigned long value ) {
-	uint32_t *field32 __attribute__ (( may_alias )) =
-		( ( void * ) field24 );
-	*field32 |= cpu_to_be32 ( value << 8 );
-}
-
-/**
- * Determine if TLS session is ready for application data
- *
- * @v tls		TLS session
- * @ret is_ready	TLS session is ready
- */
-static int tls_ready ( struct tls_session *tls ) {
-	return ( ( ! is_pending ( &tls->client_negotiation ) ) &&
-		 ( ! is_pending ( &tls->server_negotiation ) ) );
-}
-
-/******************************************************************************
- *
- * Hybrid MD5+SHA1 hash as used by TLSv1.1 and earlier
- *
- ******************************************************************************
- */
-
-/**
- * Initialise MD5+SHA1 algorithm
- *
- * @v ctx		MD5+SHA1 context
- */
-static void md5_sha1_init ( void *ctx ) {
-	struct md5_sha1_context *context = ctx;
-
-	digest_init ( &md5_algorithm, context->md5 );
-	digest_init ( &sha1_algorithm, context->sha1 );
-}
-
-/**
- * Accumulate data with MD5+SHA1 algorithm
- *
- * @v ctx		MD5+SHA1 context
- * @v data		Data
- * @v len		Length of data
- */
-static void md5_sha1_update ( void *ctx, const void *data, size_t len ) {
-	struct md5_sha1_context *context = ctx;
-
-	digest_update ( &md5_algorithm, context->md5, data, len );
-	digest_update ( &sha1_algorithm, context->sha1, data, len );
+static unsigned long tls_uint24 ( uint8_t field24[3] ) {
+	return ( ( field24[0] << 16 ) + ( field24[1] << 8 ) + field24[2] );
 }
 
-/**
- * Generate MD5+SHA1 digest
- *
- * @v ctx		MD5+SHA1 context
- * @v out		Output buffer
- */
-static void md5_sha1_final ( void *ctx, void *out ) {
-	struct md5_sha1_context *context = ctx;
-	struct md5_sha1_digest *digest = out;
-
-	digest_final ( &md5_algorithm, context->md5, digest->md5 );
-	digest_final ( &sha1_algorithm, context->sha1, digest->sha1 );
-}
-
-/** Hybrid MD5+SHA1 digest algorithm */
-static struct digest_algorithm md5_sha1_algorithm = {
-	.name		= "md5+sha1",
-	.ctxsize	= sizeof ( struct md5_sha1_context ),
-	.blocksize	= 0, /* Not applicable */
-	.digestsize	= sizeof ( struct md5_sha1_digest ),
-	.init		= md5_sha1_init,
-	.update		= md5_sha1_update,
-	.final		= md5_sha1_final,
-};
-
-/** RSA digestInfo prefix for MD5+SHA1 algorithm */
-struct rsa_digestinfo_prefix rsa_md5_sha1_prefix __rsa_digestinfo_prefix = {
-	.digest = &md5_sha1_algorithm,
-	.data = NULL, /* MD5+SHA1 signatures have no digestInfo */
-	.len = 0,
-};
-
 /******************************************************************************
  *
  * Cleanup functions
@@ -299,19 +82,14 @@
 static void free_tls ( struct refcnt *refcnt ) {
 	struct tls_session *tls =
 		container_of ( refcnt, struct tls_session, refcnt );
-	struct io_buffer *iobuf;
-	struct io_buffer *tmp;
 
 	/* Free dynamically-allocated resources */
 	tls_clear_cipher ( tls, &tls->tx_cipherspec );
 	tls_clear_cipher ( tls, &tls->tx_cipherspec_pending );
 	tls_clear_cipher ( tls, &tls->rx_cipherspec );
 	tls_clear_cipher ( tls, &tls->rx_cipherspec_pending );
-	list_for_each_entry_safe ( iobuf, tmp, &tls->rx_data, list ) {
-		list_del ( &iobuf->list );
-		free_iob ( iobuf );
-	}
-	x509_chain_put ( tls->chain );
+	x509_free_rsa_public_key ( &tls->rsa );
+	free ( tls->rx_data );
 
 	/* Free TLS structure itself */
 	free ( tls );	
@@ -325,17 +103,12 @@
  */
 static void tls_close ( struct tls_session *tls, int rc ) {
 
-	/* Remove pending operations, if applicable */
-	pending_put ( &tls->client_negotiation );
-	pending_put ( &tls->server_negotiation );
-
 	/* Remove process */
 	process_del ( &tls->process );
-
-	/* Close all interfaces */
+	
+	/* Close ciphertext and plaintext streams */
 	intf_shutdown ( &tls->cipherstream, rc );
 	intf_shutdown ( &tls->plainstream, rc );
-	intf_shutdown ( &tls->validator, rc );
 }
 
 /******************************************************************************
@@ -348,25 +121,12 @@
 /**
  * Generate random data
  *
- * @v tls		TLS session
  * @v data		Buffer to fill
  * @v len		Length of buffer
- * @ret rc		Return status code
  */
-static int tls_generate_random ( struct tls_session *tls,
-				 void *data, size_t len ) {
-	int rc;
-
-	/* Generate random bits with no additional input and without
-	 * prediction resistance
-	 */
-	if ( ( rc = rbg_generate ( NULL, 0, 0, data, len ) ) != 0 ) {
-		DBGC ( tls, "TLS %p could not generate random data: %s\n",
-		       tls, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
+static void tls_generate_random ( void *data, size_t len ) {
+	/* FIXME: Some real random data source would be nice... */
+	memset ( data, 0x01, len );
 }
 
 /**
@@ -473,40 +233,32 @@
 	size_t subsecret_len;
 	void *md5_secret;
 	void *sha1_secret;
-	uint8_t buf[out_len];
+	uint8_t out_md5[out_len];
+	uint8_t out_sha1[out_len];
 	unsigned int i;
 
 	va_start ( seeds, out_len );
 
-	if ( tls->version >= TLS_VERSION_TLS_1_2 ) {
-		/* Use P_SHA256 for TLSv1.2 and later */
-		tls_p_hash_va ( tls, &sha256_algorithm, secret, secret_len,
-				out, out_len, seeds );
-	} else {
-		/* Use combination of P_MD5 and P_SHA-1 for TLSv1.1
-		 * and earlier
-		 */
+	/* Split secret into two, with an overlap of up to one byte */
+	subsecret_len = ( ( secret_len + 1 ) / 2 );
+	md5_secret = secret;
+	sha1_secret = ( secret + secret_len - subsecret_len );
 
-		/* Split secret into two, with an overlap of up to one byte */
-		subsecret_len = ( ( secret_len + 1 ) / 2 );
-		md5_secret = secret;
-		sha1_secret = ( secret + secret_len - subsecret_len );
-
-		/* Calculate MD5 portion */
-		va_copy ( tmp, seeds );
-		tls_p_hash_va ( tls, &md5_algorithm, md5_secret,
-				subsecret_len, out, out_len, seeds );
-		va_end ( tmp );
+	/* Calculate MD5 portion */
+	va_copy ( tmp, seeds );
+	tls_p_hash_va ( tls, &md5_algorithm, md5_secret, subsecret_len,
+			out_md5, out_len, seeds );
+	va_end ( tmp );
 
-		/* Calculate SHA1 portion */
-		va_copy ( tmp, seeds );
-		tls_p_hash_va ( tls, &sha1_algorithm, sha1_secret,
-				subsecret_len, buf, out_len, seeds );
-		va_end ( tmp );
+	/* Calculate SHA1 portion */
+	va_copy ( tmp, seeds );
+	tls_p_hash_va ( tls, &sha1_algorithm, sha1_secret, subsecret_len,
+			out_sha1, out_len, seeds );
+	va_end ( tmp );
 
-		/* XOR the two portions together into the final output buffer */
-		for ( i = 0 ; i < out_len ; i++ )
-			*( ( uint8_t * ) out + i ) ^= buf[i];
+	/* XOR the two portions together into the final output buffer */
+	for ( i = 0 ; i < out_len ; i++ ) {
+		*( ( uint8_t * ) out + i ) = ( out_md5[i] ^ out_sha1[i] );
 	}
 
 	va_end ( seeds );
@@ -571,9 +323,9 @@
 static int tls_generate_keys ( struct tls_session *tls ) {
 	struct tls_cipherspec *tx_cipherspec = &tls->tx_cipherspec_pending;
 	struct tls_cipherspec *rx_cipherspec = &tls->rx_cipherspec_pending;
-	size_t hash_size = tx_cipherspec->suite->digest->digestsize;
-	size_t key_size = tx_cipherspec->suite->key_len;
-	size_t iv_size = tx_cipherspec->suite->cipher->blocksize;
+	size_t hash_size = tx_cipherspec->digest->digestsize;
+	size_t key_size = tx_cipherspec->key_len;
+	size_t iv_size = tx_cipherspec->cipher->blocksize;
 	size_t total = ( 2 * ( hash_size + key_size + iv_size ) );
 	uint8_t key_block[total];
 	uint8_t *key;
@@ -601,7 +353,7 @@
 	key += hash_size;
 
 	/* TX key */
-	if ( ( rc = cipher_setkey ( tx_cipherspec->suite->cipher,
+	if ( ( rc = cipher_setkey ( tx_cipherspec->cipher,
 				    tx_cipherspec->cipher_ctx,
 				    key, key_size ) ) != 0 ) {
 		DBGC ( tls, "TLS %p could not set TX key: %s\n",
@@ -613,7 +365,7 @@
 	key += key_size;
 
 	/* RX key */
-	if ( ( rc = cipher_setkey ( rx_cipherspec->suite->cipher,
+	if ( ( rc = cipher_setkey ( rx_cipherspec->cipher,
 				    rx_cipherspec->cipher_ctx,
 				    key, key_size ) ) != 0 ) {
 		DBGC ( tls, "TLS %p could not set TX key: %s\n",
@@ -625,15 +377,13 @@
 	key += key_size;
 
 	/* TX initialisation vector */
-	cipher_setiv ( tx_cipherspec->suite->cipher,
-		       tx_cipherspec->cipher_ctx, key );
+	cipher_setiv ( tx_cipherspec->cipher, tx_cipherspec->cipher_ctx, key );
 	DBGC ( tls, "TLS %p TX IV:\n", tls );
 	DBGC_HD ( tls, key, iv_size );
 	key += iv_size;
 
 	/* RX initialisation vector */
-	cipher_setiv ( rx_cipherspec->suite->cipher,
-		       rx_cipherspec->cipher_ctx, key );
+	cipher_setiv ( rx_cipherspec->cipher, rx_cipherspec->cipher_ctx, key );
 	DBGC ( tls, "TLS %p RX IV:\n", tls );
 	DBGC_HD ( tls, key, iv_size );
 	key += iv_size;
@@ -650,70 +400,6 @@
  ******************************************************************************
  */
 
-/** Null cipher suite */
-struct tls_cipher_suite tls_cipher_suite_null = {
-	.pubkey = &pubkey_null,
-	.cipher = &cipher_null,
-	.digest = &digest_null,
-};
-
-/** Supported cipher suites, in order of preference */
-struct tls_cipher_suite tls_cipher_suites[] = {
-	{
-		.code = htons ( TLS_RSA_WITH_AES_256_CBC_SHA256 ),
-		.key_len = ( 256 / 8 ),
-		.pubkey = &rsa_algorithm,
-		.cipher = &aes_cbc_algorithm,
-		.digest = &sha256_algorithm,
-	},
-	{
-		.code = htons ( TLS_RSA_WITH_AES_128_CBC_SHA256 ),
-		.key_len = ( 128 / 8 ),
-		.pubkey = &rsa_algorithm,
-		.cipher = &aes_cbc_algorithm,
-		.digest = &sha256_algorithm,
-	},
-	{
-		.code = htons ( TLS_RSA_WITH_AES_256_CBC_SHA ),
-		.key_len = ( 256 / 8 ),
-		.pubkey = &rsa_algorithm,
-		.cipher = &aes_cbc_algorithm,
-		.digest = &sha1_algorithm,
-	},
-	{
-		.code = htons ( TLS_RSA_WITH_AES_128_CBC_SHA ),
-		.key_len = ( 128 / 8 ),
-		.pubkey = &rsa_algorithm,
-		.cipher = &aes_cbc_algorithm,
-		.digest = &sha1_algorithm,
-	},
-};
-
-/** Number of supported cipher suites */
-#define TLS_NUM_CIPHER_SUITES \
-	( sizeof ( tls_cipher_suites ) / sizeof ( tls_cipher_suites[0] ) )
-
-/**
- * Identify cipher suite
- *
- * @v cipher_suite	Cipher suite specification
- * @ret suite		Cipher suite, or NULL
- */
-static struct tls_cipher_suite *
-tls_find_cipher_suite ( unsigned int cipher_suite ) {
-	struct tls_cipher_suite *suite;
-	unsigned int i;
-
-	/* Identify cipher suite */
-	for ( i = 0 ; i < TLS_NUM_CIPHER_SUITES ; i++ ) {
-		suite = &tls_cipher_suites[i];
-		if ( suite->code == cipher_suite )
-			return suite;
-	}
-
-	return NULL;
-}
-
 /**
  * Clear cipher suite
  *
@@ -721,14 +407,11 @@
  */
 static void tls_clear_cipher ( struct tls_session *tls __unused,
 			       struct tls_cipherspec *cipherspec ) {
-
-	if ( cipherspec->suite ) {
-		pubkey_final ( cipherspec->suite->pubkey,
-			       cipherspec->pubkey_ctx );
-	}
 	free ( cipherspec->dynamic );
-	memset ( cipherspec, 0, sizeof ( *cipherspec ) );
-	cipherspec->suite = &tls_cipher_suite_null;
+	memset ( cipherspec, 0, sizeof ( cipherspec ) );
+	cipherspec->pubkey = &pubkey_null;
+	cipherspec->cipher = &cipher_null;
+	cipherspec->digest = &digest_null;
 }
 
 /**
@@ -736,15 +419,18 @@
  *
  * @v tls		TLS session
  * @v cipherspec	TLS cipher specification
- * @v suite		Cipher suite
+ * @v pubkey		Public-key encryption elgorithm
+ * @v cipher		Bulk encryption cipher algorithm
+ * @v digest		MAC digest algorithm
+ * @v key_len		Key length
  * @ret rc		Return status code
  */
 static int tls_set_cipher ( struct tls_session *tls,
 			    struct tls_cipherspec *cipherspec,
-			    struct tls_cipher_suite *suite ) {
-	struct pubkey_algorithm *pubkey = suite->pubkey;
-	struct cipher_algorithm *cipher = suite->cipher;
-	struct digest_algorithm *digest = suite->digest;
+			    struct pubkey_algorithm *pubkey,
+			    struct cipher_algorithm *cipher,
+			    struct digest_algorithm *digest,
+			    size_t key_len ) {
 	size_t total;
 	void *dynamic;
 
@@ -753,12 +439,13 @@
 	
 	/* Allocate dynamic storage */
 	total = ( pubkey->ctxsize + 2 * cipher->ctxsize + digest->digestsize );
-	dynamic = zalloc ( total );
+	dynamic = malloc ( total );
 	if ( ! dynamic ) {
 		DBGC ( tls, "TLS %p could not allocate %zd bytes for crypto "
 		       "context\n", tls, total );
-		return -ENOMEM_CONTEXT;
+		return -ENOMEM;
 	}
+	memset ( dynamic, 0, total );
 
 	/* Assign storage */
 	cipherspec->dynamic = dynamic;
@@ -769,7 +456,10 @@
 	assert ( ( cipherspec->dynamic + total ) == dynamic );
 
 	/* Store parameters */
-	cipherspec->suite = suite;
+	cipherspec->pubkey = pubkey;
+	cipherspec->cipher = cipher;
+	cipherspec->digest = digest;
+	cipherspec->key_len = key_len;
 
 	return 0;
 }
@@ -783,28 +473,39 @@
  */
 static int tls_select_cipher ( struct tls_session *tls,
 			       unsigned int cipher_suite ) {
-	struct tls_cipher_suite *suite;
+	struct pubkey_algorithm *pubkey = &pubkey_null;
+	struct cipher_algorithm *cipher = &cipher_null;
+	struct digest_algorithm *digest = &digest_null;
+	unsigned int key_len = 0;
 	int rc;
 
-	/* Identify cipher suite */
-	suite = tls_find_cipher_suite ( cipher_suite );
-	if ( ! suite ) {
+	switch ( cipher_suite ) {
+	case htons ( TLS_RSA_WITH_AES_128_CBC_SHA ):
+		key_len = ( 128 / 8 );
+		cipher = &aes_cbc_algorithm;
+		digest = &sha1_algorithm;
+		break;
+	case htons ( TLS_RSA_WITH_AES_256_CBC_SHA ):
+		key_len = ( 256 / 8 );
+		cipher = &aes_cbc_algorithm;
+		digest = &sha1_algorithm;
+		break;
+	default:
 		DBGC ( tls, "TLS %p does not support cipher %04x\n",
 		       tls, ntohs ( cipher_suite ) );
-		return -ENOTSUP_CIPHER;
+		return -ENOTSUP;
 	}
 
 	/* Set ciphers */
-	if ( ( rc = tls_set_cipher ( tls, &tls->tx_cipherspec_pending,
-				     suite ) ) != 0 )
+	if ( ( rc = tls_set_cipher ( tls, &tls->tx_cipherspec_pending, pubkey,
+				     cipher, digest, key_len ) ) != 0 )
 		return rc;
-	if ( ( rc = tls_set_cipher ( tls, &tls->rx_cipherspec_pending,
-				     suite ) ) != 0 )
+	if ( ( rc = tls_set_cipher ( tls, &tls->rx_cipherspec_pending, pubkey,
+				     cipher, digest, key_len ) ) != 0 )
 		return rc;
 
-	DBGC ( tls, "TLS %p selected %s-%s-%d-%s\n", tls, suite->pubkey->name,
-	       suite->cipher->name, ( suite->key_len * 8 ),
-	       suite->digest->name );
+	DBGC ( tls, "TLS %p selected %s-%s-%d-%s\n", tls,
+	       pubkey->name, cipher->name, ( key_len * 8 ), digest->name );
 
 	return 0;
 }
@@ -822,9 +523,12 @@
 			       struct tls_cipherspec *active ) {
 
 	/* Sanity check */
-	if ( pending->suite == &tls_cipher_suite_null ) {
+	if ( /* FIXME (when pubkey is not hard-coded to RSA):
+	      * ( pending->pubkey == &pubkey_null ) || */
+	     ( pending->cipher == &cipher_null ) ||
+	     ( pending->digest == &digest_null ) ) {
 		DBGC ( tls, "TLS %p refusing to use null cipher\n", tls );
-		return -ENOTSUP_NULL;
+		return -ENOTSUP;
 	}
 
 	tls_clear_cipher ( tls, active );
@@ -834,59 +538,6 @@
 
 /******************************************************************************
  *
- * Signature and hash algorithms
- *
- ******************************************************************************
- */
-
-/** Supported signature and hash algorithms
- *
- * Note that the default (TLSv1.1 and earlier) algorithm using
- * MD5+SHA1 is never explicitly specified.
- */
-struct tls_signature_hash_algorithm tls_signature_hash_algorithms[] = {
-	{
-		.code = {
-			.signature = TLS_RSA_ALGORITHM,
-			.hash = TLS_SHA256_ALGORITHM,
-		},
-		.pubkey = &rsa_algorithm,
-		.digest = &sha256_algorithm,
-	},
-};
-
-/** Number of supported signature and hash algorithms */
-#define TLS_NUM_SIG_HASH_ALGORITHMS			\
-	( sizeof ( tls_signature_hash_algorithms ) /	\
-	  sizeof ( tls_signature_hash_algorithms[0] ) )
-
-/**
- * Find TLS signature and hash algorithm
- *
- * @v pubkey		Public-key algorithm
- * @v digest		Digest algorithm
- * @ret sig_hash	Signature and hash algorithm, or NULL
- */
-static struct tls_signature_hash_algorithm *
-tls_signature_hash_algorithm ( struct pubkey_algorithm *pubkey,
-			       struct digest_algorithm *digest ) {
-	struct tls_signature_hash_algorithm *sig_hash;
-	unsigned int i;
-
-	/* Identify signature and hash algorithm */
-	for ( i = 0 ; i < TLS_NUM_SIG_HASH_ALGORITHMS ; i++ ) {
-		sig_hash = &tls_signature_hash_algorithms[i];
-		if ( ( sig_hash->pubkey == pubkey ) &&
-		     ( sig_hash->digest == digest ) ) {
-			return sig_hash;
-		}
-	}
-
-	return NULL;
-}
-
-/******************************************************************************
- *
  * Handshake verification
  *
  ******************************************************************************
@@ -902,10 +553,8 @@
 static void tls_add_handshake ( struct tls_session *tls,
 				const void *data, size_t len ) {
 
-	digest_update ( &md5_sha1_algorithm, tls->handshake_md5_sha1_ctx,
-			data, len );
-	digest_update ( &sha256_algorithm, tls->handshake_sha256_ctx,
-			data, len );
+	digest_update ( &md5_algorithm, tls->handshake_md5_ctx, data, len );
+	digest_update ( &sha1_algorithm, tls->handshake_sha1_ctx, data, len );
 }
 
 /**
@@ -914,20 +563,26 @@
  * @v tls		TLS session
  * @v out		Output buffer
  *
- * Calculates the MD5+SHA1 or SHA256 digest over all handshake
- * messages seen so far.
+ * Calculates the MD5+SHA1 digest over all handshake messages seen so
+ * far.
  */
 static void tls_verify_handshake ( struct tls_session *tls, void *out ) {
-	struct digest_algorithm *digest = tls->handshake_digest;
-	uint8_t ctx[ digest->ctxsize ];
-
-	memcpy ( ctx, tls->handshake_ctx, sizeof ( ctx ) );
-	digest_final ( digest, ctx, out );
+	struct digest_algorithm *md5 = &md5_algorithm;
+	struct digest_algorithm *sha1 = &sha1_algorithm;
+	uint8_t md5_ctx[md5->ctxsize];
+	uint8_t sha1_ctx[sha1->ctxsize];
+	void *md5_digest = out;
+	void *sha1_digest = ( out + md5->digestsize );
+
+	memcpy ( md5_ctx, tls->handshake_md5_ctx, sizeof ( md5_ctx ) );
+	memcpy ( sha1_ctx, tls->handshake_sha1_ctx, sizeof ( sha1_ctx ) );
+	digest_final ( md5, md5_ctx, md5_digest );
+	digest_final ( sha1, sha1_ctx, sha1_digest );
 }
 
 /******************************************************************************
  *
- * Record handling
+ * TX state machine transitions
  *
  ******************************************************************************
  */
@@ -942,6 +597,53 @@
 }
 
 /**
+ * Enter TX state machine active state
+ *
+ * @v tls		TLS session
+ * @v state		TX state
+ */
+static void tls_tx_start ( struct tls_session *tls, enum tls_tx_state state ) {
+
+	/* Enter specified state */
+	tls->tx_state = state;
+
+	/* Resume state machine */
+	tls_tx_resume ( tls );
+}
+
+/**
+ * Enter TX state machine idle state
+ *
+ * @v tls		TLS session
+ */
+static void tls_tx_none ( struct tls_session *tls ) {
+
+	/* Enter idle state */
+	tls->tx_state = TLS_TX_NONE;
+}
+
+/**
+ * Enter TX state machine data state
+ *
+ * @v tls		TLS session
+ */
+static void tls_tx_data ( struct tls_session *tls ) {
+
+	/* Enter data state */
+	tls->tx_state = TLS_TX_DATA;
+
+	/* Send notification of a window change */
+	xfer_window_changed ( &tls->plainstream );
+}
+
+/******************************************************************************
+ *
+ * Record handling
+ *
+ ******************************************************************************
+ */
+
+/**
  * Transmit Handshake record
  *
  * @v tls		TLS session
@@ -972,265 +674,65 @@
 		uint8_t random[32];
 		uint8_t session_id_len;
 		uint16_t cipher_suite_len;
-		uint16_t cipher_suites[TLS_NUM_CIPHER_SUITES];
+		uint16_t cipher_suites[2];
 		uint8_t compression_methods_len;
 		uint8_t compression_methods[1];
-		uint16_t extensions_len;
-		struct {
-			uint16_t server_name_type;
-			uint16_t server_name_len;
-			struct {
-				uint16_t len;
-				struct {
-					uint8_t type;
-					uint16_t len;
-					uint8_t name[ strlen ( tls->name ) ];
-				} __attribute__ (( packed )) list[1];
-			} __attribute__ (( packed )) server_name;
-			uint16_t max_fragment_length_type;
-			uint16_t max_fragment_length_len;
-			struct {
-				uint8_t max;
-			} __attribute__ (( packed )) max_fragment_length;
-		} __attribute__ (( packed )) extensions;
 	} __attribute__ (( packed )) hello;
-	unsigned int i;
 
 	memset ( &hello, 0, sizeof ( hello ) );
 	hello.type_length = ( cpu_to_le32 ( TLS_CLIENT_HELLO ) |
 			      htonl ( sizeof ( hello ) -
 				      sizeof ( hello.type_length ) ) );
-	hello.version = htons ( tls->version );
+	hello.version = htons ( TLS_VERSION_TLS_1_0 );
 	memcpy ( &hello.random, &tls->client_random, sizeof ( hello.random ) );
 	hello.cipher_suite_len = htons ( sizeof ( hello.cipher_suites ) );
-	for ( i = 0 ; i < TLS_NUM_CIPHER_SUITES ; i++ )
-		hello.cipher_suites[i] = tls_cipher_suites[i].code;
+	hello.cipher_suites[0] = htons ( TLS_RSA_WITH_AES_128_CBC_SHA );
+	hello.cipher_suites[1] = htons ( TLS_RSA_WITH_AES_256_CBC_SHA );
 	hello.compression_methods_len = sizeof ( hello.compression_methods );
-	hello.extensions_len = htons ( sizeof ( hello.extensions ) );
-	hello.extensions.server_name_type = htons ( TLS_SERVER_NAME );
-	hello.extensions.server_name_len
-		= htons ( sizeof ( hello.extensions.server_name ) );
-	hello.extensions.server_name.len
-		= htons ( sizeof ( hello.extensions.server_name.list ) );
-	hello.extensions.server_name.list[0].type = TLS_SERVER_NAME_HOST_NAME;
-	hello.extensions.server_name.list[0].len
-		= htons ( sizeof ( hello.extensions.server_name.list[0].name ));
-	memcpy ( hello.extensions.server_name.list[0].name, tls->name,
-		 sizeof ( hello.extensions.server_name.list[0].name ) );
-	hello.extensions.max_fragment_length_type
-		= htons ( TLS_MAX_FRAGMENT_LENGTH );
-	hello.extensions.max_fragment_length_len
-		= htons ( sizeof ( hello.extensions.max_fragment_length ) );
-	hello.extensions.max_fragment_length.max
-		= TLS_MAX_FRAGMENT_LENGTH_4096;
 
 	return tls_send_handshake ( tls, &hello, sizeof ( hello ) );
 }
 
 /**
- * Transmit Certificate record
- *
- * @v tls		TLS session
- * @ret rc		Return status code
- */
-static int tls_send_certificate ( struct tls_session *tls ) {
-	int num_certificates = ( have_client_certificate() ? 1 : 0 );
-	struct {
-		uint32_t type_length;
-		uint8_t length[3];
-		struct {
-			uint8_t length[3];
-			uint8_t data[ client_certificate.len ];
-		} __attribute__ (( packed )) certificates[num_certificates];
-	} __attribute__ (( packed )) *certificate;
-	struct x509_certificate *cert;
-	int rc;
-
-	/* If we have a certificate to send, determine the applicable
-	 * public-key algorithm and schedule transmission of
-	 * CertificateVerify.
-	 */
-	if ( num_certificates ) {
-
-		/* Parse certificate to determine public-key algorithm */
-		if ( ( rc = x509_certificate ( client_certificate.data,
-					       client_certificate.len,
-					       &cert ) ) != 0 ) {
-			DBGC ( tls, "TLS %p could not parse client "
-			       "certificate: %s\n", tls, strerror ( rc ) );
-			return rc;
-		}
-		tls->verify_pubkey = cert->signature_algorithm->pubkey;
-		x509_put ( cert );
-		cert = NULL;
-
-		/* Schedule CertificateVerify transmission */
-		tls->tx_pending |= TLS_TX_CERTIFICATE_VERIFY;
-		tls_tx_resume ( tls );
-	}
-
-	/* Allocate storage for Certificate record (which may be too
-	 * large for the stack).
-	 */
-	certificate = zalloc ( sizeof ( *certificate ) );
-	if ( ! certificate )
-		return -ENOMEM_CERTIFICATE;
-
-	/* Populate record */
-	certificate->type_length =
-		( cpu_to_le32 ( TLS_CERTIFICATE ) |
-		  htonl ( sizeof ( *certificate ) -
-			  sizeof ( certificate->type_length ) ) );
-	tls_set_uint24 ( certificate->length,
-			 sizeof ( certificate->certificates ) );
-	if ( num_certificates ) {
-		tls_set_uint24 ( certificate->certificates[0].length,
-				 sizeof ( certificate->certificates[0].data ) );
-		memcpy ( certificate->certificates[0].data,
-			 client_certificate.data,
-			 sizeof ( certificate->certificates[0].data ) );
-	}
-
-	/* Transmit record */
-	rc = tls_send_handshake ( tls, certificate, sizeof ( *certificate ) );
-
-	/* Free record */
-	free ( certificate );
-
-	return rc;
-}
-
-/**
  * Transmit Client Key Exchange record
  *
  * @v tls		TLS session
  * @ret rc		Return status code
  */
 static int tls_send_client_key_exchange ( struct tls_session *tls ) {
-	struct tls_cipherspec *cipherspec = &tls->tx_cipherspec_pending;
-	struct pubkey_algorithm *pubkey = cipherspec->suite->pubkey;
-	size_t max_len = pubkey_max_len ( pubkey, cipherspec->pubkey_ctx );
+	/* FIXME: Hack alert */
+	RSA_CTX *rsa_ctx;
+	RSA_pub_key_new ( &rsa_ctx, tls->rsa.modulus, tls->rsa.modulus_len,
+			  tls->rsa.exponent, tls->rsa.exponent_len );
 	struct {
 		uint32_t type_length;
 		uint16_t encrypted_pre_master_secret_len;
-		uint8_t encrypted_pre_master_secret[max_len];
+		uint8_t encrypted_pre_master_secret[rsa_ctx->num_octets];
 	} __attribute__ (( packed )) key_xchg;
-	size_t unused;
-	int len;
-	int rc;
 
-	/* Encrypt pre-master secret using server's public key */
 	memset ( &key_xchg, 0, sizeof ( key_xchg ) );
-	len = pubkey_encrypt ( pubkey, cipherspec->pubkey_ctx,
-			       &tls->pre_master_secret,
-			       sizeof ( tls->pre_master_secret ),
-			       key_xchg.encrypted_pre_master_secret );
-	if ( len < 0 ) {
-		rc = len;
-		DBGC ( tls, "TLS %p could not encrypt pre-master secret: %s\n",
-		       tls, strerror ( rc ) );
-		return rc;
-	}
-	unused = ( max_len - len );
-	key_xchg.type_length =
-		( cpu_to_le32 ( TLS_CLIENT_KEY_EXCHANGE ) |
-		  htonl ( sizeof ( key_xchg ) -
-			  sizeof ( key_xchg.type_length ) - unused ) );
-	key_xchg.encrypted_pre_master_secret_len =
-		htons ( sizeof ( key_xchg.encrypted_pre_master_secret ) -
-			unused );
-
-	return tls_send_handshake ( tls, &key_xchg,
-				    ( sizeof ( key_xchg ) - unused ) );
-}
-
-/**
- * Transmit Certificate Verify record
- *
- * @v tls		TLS session
- * @ret rc		Return status code
- */
-static int tls_send_certificate_verify ( struct tls_session *tls ) {
-	struct digest_algorithm *digest = tls->handshake_digest;
-	struct pubkey_algorithm *pubkey = tls->verify_pubkey;
-	uint8_t digest_out[ digest->digestsize ];
-	uint8_t ctx[ pubkey->ctxsize ];
-	struct tls_signature_hash_algorithm *sig_hash = NULL;
-	int rc;
+	key_xchg.type_length = ( cpu_to_le32 ( TLS_CLIENT_KEY_EXCHANGE ) |
+				 htonl ( sizeof ( key_xchg ) -
+					 sizeof ( key_xchg.type_length ) ) );
+	key_xchg.encrypted_pre_master_secret_len
+		= htons ( sizeof ( key_xchg.encrypted_pre_master_secret ) );
 
-	/* Generate digest to be signed */
-	tls_verify_handshake ( tls, digest_out );
-
-	/* Initialise public-key algorithm */
-	if ( ( rc = pubkey_init ( pubkey, ctx, client_private_key.data,
-				  client_private_key.len ) ) != 0 ) {
-		DBGC ( tls, "TLS %p could not initialise %s client private "
-		       "key: %s\n", tls, pubkey->name, strerror ( rc ) );
-		goto err_pubkey_init;
-	}
-
-	/* TLSv1.2 and later use explicit algorithm identifiers */
-	if ( tls->version >= TLS_VERSION_TLS_1_2 ) {
-		sig_hash = tls_signature_hash_algorithm ( pubkey, digest );
-		if ( ! sig_hash ) {
-			DBGC ( tls, "TLS %p could not identify (%s,%s) "
-			       "signature and hash algorithm\n", tls,
-			       pubkey->name, digest->name );
-			rc = -ENOTSUP_SIG_HASH;
-			goto err_sig_hash;
-		}
-	}
-
-	/* Generate and transmit record */
-	{
-		size_t max_len = pubkey_max_len ( pubkey, ctx );
-		int use_sig_hash = ( ( sig_hash == NULL ) ? 0 : 1 );
-		struct {
-			uint32_t type_length;
-			struct tls_signature_hash_id sig_hash[use_sig_hash];
-			uint16_t signature_len;
-			uint8_t signature[max_len];
-		} __attribute__ (( packed )) certificate_verify;
-		size_t unused;
-		int len;
-
-		/* Sign digest */
-		len = pubkey_sign ( pubkey, ctx, digest, digest_out,
-				    certificate_verify.signature );
-		if ( len < 0 ) {
-			rc = len;
-			DBGC ( tls, "TLS %p could not sign %s digest using %s "
-			       "client private key: %s\n", tls, digest->name,
-			       pubkey->name, strerror ( rc ) );
-			goto err_pubkey_sign;
-		}
-		unused = ( max_len - len );
+	/* FIXME: Hack alert */
+	DBGC ( tls, "RSA encrypting plaintext, modulus, exponent:\n" );
+	DBGC_HD ( tls, &tls->pre_master_secret,
+		  sizeof ( tls->pre_master_secret ) );
+	DBGC_HD ( tls, tls->rsa.modulus, tls->rsa.modulus_len );
+	DBGC_HD ( tls, tls->rsa.exponent, tls->rsa.exponent_len );
+	RSA_encrypt ( rsa_ctx, ( const uint8_t * ) &tls->pre_master_secret,
+		      sizeof ( tls->pre_master_secret ),
+		      key_xchg.encrypted_pre_master_secret, 0 );
+	DBGC ( tls, "RSA encrypt done.  Ciphertext:\n" );
+	DBGC_HD ( tls, &key_xchg.encrypted_pre_master_secret,
+		  sizeof ( key_xchg.encrypted_pre_master_secret ) );
+	RSA_free ( rsa_ctx );
 
-		/* Construct Certificate Verify record */
-		certificate_verify.type_length =
-			( cpu_to_le32 ( TLS_CERTIFICATE_VERIFY ) |
-			  htonl ( sizeof ( certificate_verify ) -
-				  sizeof ( certificate_verify.type_length ) -
-				  unused ) );
-		if ( use_sig_hash ) {
-			memcpy ( &certificate_verify.sig_hash[0],
-				 &sig_hash->code,
-				 sizeof ( certificate_verify.sig_hash[0] ) );
-		}
-		certificate_verify.signature_len =
-			htons ( sizeof ( certificate_verify.signature ) -
-				unused );
-
-		/* Transmit record */
-		rc = tls_send_handshake ( tls, &certificate_verify,
-				   ( sizeof ( certificate_verify ) - unused ) );
-	}
 
- err_pubkey_sign:
- err_sig_hash:
-	pubkey_final ( pubkey, ctx );
- err_pubkey_init:
-	return rc;
+	return tls_send_handshake ( tls, &key_xchg, sizeof ( key_xchg ) );
 }
 
 /**
@@ -1252,33 +754,22 @@
  * @ret rc		Return status code
  */
 static int tls_send_finished ( struct tls_session *tls ) {
-	struct digest_algorithm *digest = tls->handshake_digest;
 	struct {
 		uint32_t type_length;
 		uint8_t verify_data[12];
 	} __attribute__ (( packed )) finished;
-	uint8_t digest_out[ digest->digestsize ];
-	int rc;
+	uint8_t digest[MD5_DIGEST_SIZE + SHA1_DIGEST_SIZE];
 
-	/* Construct record */
 	memset ( &finished, 0, sizeof ( finished ) );
 	finished.type_length = ( cpu_to_le32 ( TLS_FINISHED ) |
 				 htonl ( sizeof ( finished ) -
 					 sizeof ( finished.type_length ) ) );
-	tls_verify_handshake ( tls, digest_out );
+	tls_verify_handshake ( tls, digest );
 	tls_prf_label ( tls, &tls->master_secret, sizeof ( tls->master_secret ),
 			finished.verify_data, sizeof ( finished.verify_data ),
-			"client finished", digest_out, sizeof ( digest_out ) );
-
-	/* Transmit record */
-	if ( ( rc = tls_send_handshake ( tls, &finished,
-					 sizeof ( finished ) ) ) != 0 )
-		return rc;
-
-	/* Mark client as finished */
-	pending_put ( &tls->client_negotiation );
+			"client finished", digest, sizeof ( digest ) );
 
-	return 0;
+	return tls_send_handshake ( tls, &finished, sizeof ( finished ) );
 }
 
 /**
@@ -1290,13 +781,13 @@
  * @ret rc		Return status code
  */
 static int tls_new_change_cipher ( struct tls_session *tls,
-				   const void *data, size_t len ) {
+				   void *data, size_t len ) {
 	int rc;
 
 	if ( ( len != 1 ) || ( *( ( uint8_t * ) data ) != 1 ) ) {
 		DBGC ( tls, "TLS %p received invalid Change Cipher\n", tls );
 		DBGC_HD ( tls, data, len );
-		return -EINVAL_CHANGE_CIPHER;
+		return -EINVAL;
 	}
 
 	if ( ( rc = tls_change_cipher ( tls, &tls->rx_cipherspec_pending,
@@ -1318,20 +809,19 @@
  * @v len		Length of plaintext record
  * @ret rc		Return status code
  */
-static int tls_new_alert ( struct tls_session *tls, const void *data,
-			   size_t len ) {
-	const struct {
+static int tls_new_alert ( struct tls_session *tls, void *data, size_t len ) {
+	struct {
 		uint8_t level;
 		uint8_t description;
 		char next[0];
 	} __attribute__ (( packed )) *alert = data;
-	const void *end = alert->next;
+	void *end = alert->next;
 
 	/* Sanity check */
 	if ( end != ( data + len ) ) {
 		DBGC ( tls, "TLS %p received overlength Alert\n", tls );
 		DBGC_HD ( tls, data, len );
-		return -EINVAL_ALERT;
+		return -EINVAL;
 	}
 
 	switch ( alert->level ) {
@@ -1342,11 +832,11 @@
 	case TLS_ALERT_FATAL:
 		DBGC ( tls, "TLS %p received fatal alert %d\n",
 		       tls, alert->description );
-		return -EPERM_ALERT;
+		return -EPERM;
 	default:
 		DBGC ( tls, "TLS %p received unknown alert level %d"
 		       "(alert %d)\n", tls, alert->level, alert->description );
-		return -EIO_ALERT;
+		return -EIO;
 	}
 }
 
@@ -1359,53 +849,35 @@
  * @ret rc		Return status code
  */
 static int tls_new_server_hello ( struct tls_session *tls,
-				  const void *data, size_t len ) {
-	const struct {
+				  void *data, size_t len ) {
+	struct {
 		uint16_t version;
 		uint8_t random[32];
 		uint8_t session_id_len;
 		char next[0];
 	} __attribute__ (( packed )) *hello_a = data;
-	const struct {
+	struct {
 		uint8_t session_id[hello_a->session_id_len];
 		uint16_t cipher_suite;
 		uint8_t compression_method;
 		char next[0];
 	} __attribute__ (( packed )) *hello_b = ( void * ) &hello_a->next;
-	const void *end = hello_b->next;
-	uint16_t version;
+	void *end = hello_b->next;
 	int rc;
 
 	/* Sanity check */
-	if ( end > ( data + len ) ) {
-		DBGC ( tls, "TLS %p received underlength Server Hello\n", tls );
+	if ( end != ( data + len ) ) {
+		DBGC ( tls, "TLS %p received overlength Server Hello\n", tls );
 		DBGC_HD ( tls, data, len );
-		return -EINVAL_HELLO;
+		return -EINVAL;
 	}
 
-	/* Check and store protocol version */
-	version = ntohs ( hello_a->version );
-	if ( version < TLS_VERSION_TLS_1_0 ) {
+	/* Check protocol version */
+	if ( ntohs ( hello_a->version ) < TLS_VERSION_TLS_1_0 ) {
 		DBGC ( tls, "TLS %p does not support protocol version %d.%d\n",
-		       tls, ( version >> 8 ), ( version & 0xff ) );
-		return -ENOTSUP_VERSION;
-	}
-	if ( version > tls->version ) {
-		DBGC ( tls, "TLS %p server attempted to illegally upgrade to "
-		       "protocol version %d.%d\n",
-		       tls, ( version >> 8 ), ( version & 0xff ) );
-		return -EPROTO_VERSION;
-	}
-	tls->version = version;
-	DBGC ( tls, "TLS %p using protocol version %d.%d\n",
-	       tls, ( version >> 8 ), ( version & 0xff ) );
-
-	/* Use MD5+SHA1 digest algorithm for handshake verification
-	 * for versions earlier than TLSv1.2.
-	 */
-	if ( tls->version < TLS_VERSION_TLS_1_2 ) {
-		tls->handshake_digest = &md5_sha1_algorithm;
-		tls->handshake_ctx = tls->handshake_md5_sha1_ctx;
+		       tls, ( ntohs ( hello_a->version ) >> 8 ),
+		       ( ntohs ( hello_a->version ) & 0xff ) );
+		return -ENOTSUP;
 	}
 
 	/* Copy out server random bytes */
@@ -1425,77 +897,6 @@
 }
 
 /**
- * Parse certificate chain
- *
- * @v tls		TLS session
- * @v data		Certificate chain
- * @v len		Length of certificate chain
- * @ret rc		Return status code
- */
-static int tls_parse_chain ( struct tls_session *tls,
-			     const void *data, size_t len ) {
-	const void *end = ( data + len );
-	const struct {
-		uint8_t length[3];
-		uint8_t data[0];
-	} __attribute__ (( packed )) *certificate;
-	size_t certificate_len;
-	struct x509_certificate *cert;
-	const void *next;
-	int rc;
-
-	/* Free any existing certificate chain */
-	x509_chain_put ( tls->chain );
-	tls->chain = NULL;
-
-	/* Create certificate chain */
-	tls->chain = x509_alloc_chain();
-	if ( ! tls->chain ) {
-		rc = -ENOMEM_CHAIN;
-		goto err_alloc_chain;
-	}
-
-	/* Add certificates to chain */
-	while ( data < end ) {
-
-		/* Extract raw certificate data */
-		certificate = data;
-		certificate_len = tls_uint24 ( certificate->length );
-		next = ( certificate->data + certificate_len );
-		if ( next > end ) {
-			DBGC ( tls, "TLS %p overlength certificate:\n", tls );
-			DBGC_HDA ( tls, 0, data, ( end - data ) );
-			rc = -EINVAL_CERTIFICATE;
-			goto err_overlength;
-		}
-
-		/* Add certificate to chain */
-		if ( ( rc = x509_append_raw ( tls->chain, certificate->data,
-					      certificate_len ) ) != 0 ) {
-			DBGC ( tls, "TLS %p could not append certificate: %s\n",
-			       tls, strerror ( rc ) );
-			DBGC_HDA ( tls, 0, data, ( end - data ) );
-			goto err_parse;
-		}
-		cert = x509_last ( tls->chain );
-		DBGC ( tls, "TLS %p found certificate %s\n",
-		       tls, cert->subject.name );
-
-		/* Move to next certificate in list */
-		data = next;
-	}
-
-	return 0;
-
- err_parse:
- err_overlength:
-	x509_chain_put ( tls->chain );
-	tls->chain = NULL;
- err_alloc_chain:
-	return rc;
-}
-
-/**
  * Receive new Certificate handshake record
  *
  * @v tls		TLS session
@@ -1504,13 +905,19 @@
  * @ret rc		Return status code
  */
 static int tls_new_certificate ( struct tls_session *tls,
-				 const void *data, size_t len ) {
-	const struct {
+				 void *data, size_t len ) {
+	struct {
 		uint8_t length[3];
 		uint8_t certificates[0];
 	} __attribute__ (( packed )) *certificate = data;
-	size_t certificates_len = tls_uint24 ( certificate->length );
-	const void *end = ( certificate->certificates + certificates_len );
+	struct {
+		uint8_t length[3];
+		uint8_t certificate[0];
+	} __attribute__ (( packed )) *element =
+		  ( ( void * ) certificate->certificates );
+	size_t elements_len = tls_uint24 ( certificate->length );
+	void *end = ( certificate->certificates + elements_len );
+	struct asn1_cursor cursor;
 	int rc;
 
 	/* Sanity check */
@@ -1518,38 +925,33 @@
 		DBGC ( tls, "TLS %p received overlength Server Certificate\n",
 		       tls );
 		DBGC_HD ( tls, data, len );
-		return -EINVAL_CERTIFICATES;
+		return -EINVAL;
 	}
 
-	/* Parse certificate chain */
-	if ( ( rc = tls_parse_chain ( tls, certificate->certificates,
-				      certificates_len ) ) != 0 )
-		return rc;
-
-	return 0;
-}
+	/* Traverse certificate chain */
+	do {
+		cursor.data = element->certificate;
+		cursor.len = tls_uint24 ( element->length );
+		if ( ( cursor.data + cursor.len ) > end ) {
+			DBGC ( tls, "TLS %p received corrupt Server "
+			       "Certificate\n", tls );
+			DBGC_HD ( tls, data, len );
+			return -EINVAL;
+		}
 
-/**
- * Receive new Certificate Request handshake record
- *
- * @v tls		TLS session
- * @v data		Plaintext handshake record
- * @v len		Length of plaintext handshake record
- * @ret rc		Return status code
- */
-static int tls_new_certificate_request ( struct tls_session *tls,
-					 const void *data __unused,
-					 size_t len __unused ) {
-
-	/* We can only send a single certificate, so there is no point
-	 * in parsing the Certificate Request.
-	 */
+		// HACK
+		if ( ( rc = x509_rsa_public_key ( &cursor,
+						  &tls->rsa ) ) != 0 ) {
+			DBGC ( tls, "TLS %p cannot determine RSA public key: "
+			       "%s\n", tls, strerror ( rc ) );
+			return rc;
+		}
+		return 0;
 
-	/* Schedule Certificate transmission */
-	tls->tx_pending |= TLS_TX_CERTIFICATE;
-	tls_tx_resume ( tls );
+		element = ( cursor.data + cursor.len );
+	} while ( element != end );
 
-	return 0;
+	return -EINVAL;
 }
 
 /**
@@ -1561,28 +963,30 @@
  * @ret rc		Return status code
  */
 static int tls_new_server_hello_done ( struct tls_session *tls,
-				       const void *data, size_t len ) {
-	const struct {
+				       void *data, size_t len ) {
+	struct {
 		char next[0];
 	} __attribute__ (( packed )) *hello_done = data;
-	const void *end = hello_done->next;
-	int rc;
+	void *end = hello_done->next;
 
 	/* Sanity check */
 	if ( end != ( data + len ) ) {
 		DBGC ( tls, "TLS %p received overlength Server Hello Done\n",
 		       tls );
 		DBGC_HD ( tls, data, len );
-		return -EINVAL_HELLO_DONE;
+		return -EINVAL;
 	}
 
-	/* Begin certificate validation */
-	if ( ( rc = create_validator ( &tls->validator, tls->chain ) ) != 0 ) {
-		DBGC ( tls, "TLS %p could not start certificate validation: "
-		       "%s\n", tls, strerror ( rc ) );
-		return rc;
+	/* Check that we are ready to send the Client Key Exchange */
+	if ( tls->tx_state != TLS_TX_NONE ) {
+		DBGC ( tls, "TLS %p received Server Hello Done while in "
+		       "TX state %d\n", tls, tls->tx_state );
+		return -EIO;
 	}
 
+	/* Start sending the Client Key Exchange */
+	tls_tx_start ( tls, TLS_TX_CLIENT_KEY_EXCHANGE );
+
 	return 0;
 }
 
@@ -1595,39 +999,12 @@
  * @ret rc		Return status code
  */
 static int tls_new_finished ( struct tls_session *tls,
-			      const void *data, size_t len ) {
-	struct digest_algorithm *digest = tls->handshake_digest;
-	const struct {
-		uint8_t verify_data[12];
-		char next[0];
-	} __attribute__ (( packed )) *finished = data;
-	const void *end = finished->next;
-	uint8_t digest_out[ digest->digestsize ];
-	uint8_t verify_data[ sizeof ( finished->verify_data ) ];
-
-	/* Sanity check */
-	if ( end != ( data + len ) ) {
-		DBGC ( tls, "TLS %p received overlength Finished\n", tls );
-		DBGC_HD ( tls, data, len );
-		return -EINVAL_FINISHED;
-	}
+			      void *data, size_t len ) {
 
-	/* Verify data */
-	tls_verify_handshake ( tls, digest_out );
-	tls_prf_label ( tls, &tls->master_secret, sizeof ( tls->master_secret ),
-			verify_data, sizeof ( verify_data ), "server finished",
-			digest_out, sizeof ( digest_out ) );
-	if ( memcmp ( verify_data, finished->verify_data,
-		      sizeof ( verify_data ) ) != 0 ) {
-		DBGC ( tls, "TLS %p verification failed\n", tls );
-		return -EPERM_VERIFY;
-	}
-
-	/* Mark server as finished */
-	pending_put ( &tls->server_negotiation );
-
-	/* Send notification of a window change */
-	xfer_window_changed ( &tls->plainstream );
+	/* FIXME: Handle this properly */
+	tls_tx_data ( tls );
+	( void ) data;
+	( void ) len;
 
 	return 0;
 }
@@ -1641,12 +1018,12 @@
  * @ret rc		Return status code
  */
 static int tls_new_handshake ( struct tls_session *tls,
-			       const void *data, size_t len ) {
-	const void *end = ( data + len );
+			       void *data, size_t len ) {
+	void *end = ( data + len );
 	int rc;
 
 	while ( data != end ) {
-		const struct {
+		struct {
 			uint8_t type;
 			uint8_t length[3];
 			uint8_t payload[0];
@@ -1660,7 +1037,7 @@
 			DBGC ( tls, "TLS %p received overlength Handshake\n",
 			       tls );
 			DBGC_HD ( tls, data, len );
-			return -EINVAL_HANDSHAKE;
+			return -EINVAL;
 		}
 
 		switch ( handshake->type ) {
@@ -1670,10 +1047,6 @@
 		case TLS_CERTIFICATE:
 			rc = tls_new_certificate ( tls, payload, payload_len );
 			break;
-		case TLS_CERTIFICATE_REQUEST:
-			rc = tls_new_certificate_request ( tls, payload,
-							   payload_len );
-			break;
 		case TLS_SERVER_HELLO_DONE:
 			rc = tls_new_server_hello_done ( tls, payload,
 							 payload_len );
@@ -1712,69 +1085,29 @@
  *
  * @v tls		TLS session
  * @v type		Record type
- * @v rx_data		List of received data buffers
+ * @v data		Plaintext record
+ * @v len		Length of plaintext record
  * @ret rc		Return status code
  */
-static int tls_new_record ( struct tls_session *tls, unsigned int type,
-			    struct list_head *rx_data ) {
-	struct io_buffer *iobuf;
-	int ( * handler ) ( struct tls_session *tls, const void *data,
-			    size_t len );
-	int rc;
-
-	/* Deliver data records to the plainstream interface */
-	if ( type == TLS_TYPE_DATA ) {
-
-		/* Fail unless we are ready to receive data */
-		if ( ! tls_ready ( tls ) )
-			return -ENOTCONN;
-
-		/* Deliver each I/O buffer in turn */
-		while ( ( iobuf = list_first_entry ( rx_data, struct io_buffer,
-						     list ) ) ) {
-			list_del ( &iobuf->list );
-			if ( ( rc = xfer_deliver_iob ( &tls->plainstream,
-						       iobuf ) ) != 0 ) {
-				DBGC ( tls, "TLS %p could not deliver data: "
-				       "%s\n", tls, strerror ( rc ) );
-				return rc;
-			}
-		}
-		return 0;
-	}
+static int tls_new_record ( struct tls_session *tls,
+			    unsigned int type, void *data, size_t len ) {
 
-	/* For all other records, merge into a single I/O buffer */
-	iobuf = iob_concatenate ( rx_data );
-	if ( ! iobuf ) {
-		DBGC ( tls, "TLS %p could not concatenate non-data record "
-		       "type %d\n", tls, type );
-		return -ENOMEM_RX_CONCAT;
-	}
-
-	/* Determine handler */
 	switch ( type ) {
 	case TLS_TYPE_CHANGE_CIPHER:
-		handler = tls_new_change_cipher;
-		break;
+		return tls_new_change_cipher ( tls, data, len );
 	case TLS_TYPE_ALERT:
-		handler = tls_new_alert;
-		break;
+		return tls_new_alert ( tls, data, len );
 	case TLS_TYPE_HANDSHAKE:
-		handler = tls_new_handshake;
-		break;
+		return tls_new_handshake ( tls, data, len );
+	case TLS_TYPE_DATA:
+		return xfer_deliver_raw ( &tls->plainstream, data, len );
 	default:
 		/* RFC4346 says that we should just ignore unknown
 		 * record types.
 		 */
-		handler = NULL;
 		DBGC ( tls, "TLS %p ignoring record type %d\n", tls, type );
-		break;
+		return 0;
 	}
-
-	/* Handle record and free I/O buffer */
-	rc = ( handler ? handler ( tls, iobuf->data, iob_len ( iobuf ) ) : 0 );
-	free_iob ( iobuf );
-	return rc;
 }
 
 /******************************************************************************
@@ -1785,56 +1118,9 @@
  */
 
 /**
- * Initialise HMAC
- *
- * @v cipherspec	Cipher specification
- * @v ctx		Context
- * @v seq		Sequence number
- * @v tlshdr		TLS header
- */
-static void tls_hmac_init ( struct tls_cipherspec *cipherspec, void *ctx,
-			    uint64_t seq, struct tls_header *tlshdr ) {
-	struct digest_algorithm *digest = cipherspec->suite->digest;
-
-	hmac_init ( digest, ctx, cipherspec->mac_secret, &digest->digestsize );
-	seq = cpu_to_be64 ( seq );
-	hmac_update ( digest, ctx, &seq, sizeof ( seq ) );
-	hmac_update ( digest, ctx, tlshdr, sizeof ( *tlshdr ) );
-}
-
-/**
- * Update HMAC
- *
- * @v cipherspec	Cipher specification
- * @v ctx		Context
- * @v data		Data
- * @v len		Length of data
- */
-static void tls_hmac_update ( struct tls_cipherspec *cipherspec, void *ctx,
-			      const void *data, size_t len ) {
-	struct digest_algorithm *digest = cipherspec->suite->digest;
-
-	hmac_update ( digest, ctx, data, len );
-}
-
-/**
- * Finalise HMAC
- *
- * @v cipherspec	Cipher specification
- * @v ctx		Context
- * @v mac		HMAC to fill in
- */
-static void tls_hmac_final ( struct tls_cipherspec *cipherspec, void *ctx,
-			     void *hmac ) {
-	struct digest_algorithm *digest = cipherspec->suite->digest;
-
-	hmac_final ( digest, ctx, cipherspec->mac_secret,
-		     &digest->digestsize, hmac );
-}
-
-/**
  * Calculate HMAC
  *
+ * @v tls		TLS session
  * @v cipherspec	Cipher specification
  * @v seq		Sequence number
  * @v tlshdr		TLS header
@@ -1842,15 +1128,21 @@
  * @v len		Length of data
  * @v mac		HMAC to fill in
  */
-static void tls_hmac ( struct tls_cipherspec *cipherspec,
+static void tls_hmac ( struct tls_session *tls __unused,
+		       struct tls_cipherspec *cipherspec,
 		       uint64_t seq, struct tls_header *tlshdr,
 		       const void *data, size_t len, void *hmac ) {
-	struct digest_algorithm *digest = cipherspec->suite->digest;
-	uint8_t ctx[digest->ctxsize];
+	struct digest_algorithm *digest = cipherspec->digest;
+	uint8_t digest_ctx[digest->ctxsize];
 
-	tls_hmac_init ( cipherspec, ctx, seq, tlshdr );
-	tls_hmac_update ( cipherspec, ctx, data, len );
-	tls_hmac_final ( cipherspec, ctx, hmac );
+	hmac_init ( digest, digest_ctx, cipherspec->mac_secret,
+		    &digest->digestsize );
+	seq = cpu_to_be64 ( seq );
+	hmac_update ( digest, digest_ctx, &seq, sizeof ( seq ) );
+	hmac_update ( digest, digest_ctx, tlshdr, sizeof ( *tlshdr ) );
+	hmac_update ( digest, digest_ctx, data, len );
+	hmac_final ( digest, digest_ctx, cipherspec->mac_secret,
+		     &digest->digestsize, hmac );
 }
 
 /**
@@ -1866,7 +1158,7 @@
 static void * __malloc tls_assemble_stream ( struct tls_session *tls,
 				    const void *data, size_t len,
 				    void *digest, size_t *plaintext_len ) {
-	size_t mac_len = tls->tx_cipherspec.suite->digest->digestsize;
+	size_t mac_len = tls->tx_cipherspec.digest->digestsize;
 	void *plaintext;
 	void *content;
 	void *mac;
@@ -1901,9 +1193,9 @@
 static void * tls_assemble_block ( struct tls_session *tls,
 				   const void *data, size_t len,
 				   void *digest, size_t *plaintext_len ) {
-	size_t blocksize = tls->tx_cipherspec.suite->cipher->blocksize;
-	size_t mac_len = tls->tx_cipherspec.suite->digest->digestsize;
-	size_t iv_len;
+	size_t blocksize = tls->tx_cipherspec.cipher->blocksize;
+	size_t iv_len = blocksize;
+	size_t mac_len = tls->tx_cipherspec.digest->digestsize;
 	size_t padding_len;
 	void *plaintext;
 	void *iv;
@@ -1911,8 +1203,8 @@
 	void *mac;
 	void *padding;
 
-	/* TLSv1.1 and later use an explicit IV */
-	iv_len = ( ( tls->version >= TLS_VERSION_TLS_1_1 ) ? blocksize : 0 );
+	/* FIXME: TLSv1.1 has an explicit IV */
+	iv_len = 0;
 
 	/* Calculate block-ciphered struct length */
 	padding_len = ( ( blocksize - 1 ) & -( iv_len + len + mac_len + 1 ) );
@@ -1928,7 +1220,7 @@
 	padding = ( mac + mac_len );
 
 	/* Fill in block-ciphered struct */
-	tls_generate_random ( tls, iv, iv_len );
+	memset ( iv, 0, iv_len );
 	memcpy ( content, data, len );
 	memcpy ( mac, digest, mac_len );
 	memset ( padding, padding_len, ( padding_len + 1 ) );
@@ -1950,25 +1242,25 @@
 	struct tls_header plaintext_tlshdr;
 	struct tls_header *tlshdr;
 	struct tls_cipherspec *cipherspec = &tls->tx_cipherspec;
-	struct cipher_algorithm *cipher = cipherspec->suite->cipher;
 	void *plaintext = NULL;
 	size_t plaintext_len;
 	struct io_buffer *ciphertext = NULL;
 	size_t ciphertext_len;
-	size_t mac_len = cipherspec->suite->digest->digestsize;
+	size_t mac_len = cipherspec->digest->digestsize;
 	uint8_t mac[mac_len];
 	int rc;
 
 	/* Construct header */
 	plaintext_tlshdr.type = type;
-	plaintext_tlshdr.version = htons ( tls->version );
+	plaintext_tlshdr.version = htons ( TLS_VERSION_TLS_1_0 );
 	plaintext_tlshdr.length = htons ( len );
 
 	/* Calculate MAC */
-	tls_hmac ( cipherspec, tls->tx_seq, &plaintext_tlshdr, data, len, mac );
+	tls_hmac ( tls, cipherspec, tls->tx_seq, &plaintext_tlshdr,
+		   data, len, mac );
 
 	/* Allocate and assemble plaintext struct */
-	if ( is_stream_cipher ( cipher ) ) {
+	if ( is_stream_cipher ( cipherspec->cipher ) ) {
 		plaintext = tls_assemble_stream ( tls, data, len, mac,
 						  &plaintext_len );
 	} else {
@@ -1978,7 +1270,7 @@
 	if ( ! plaintext ) {
 		DBGC ( tls, "TLS %p could not allocate %zd bytes for "
 		       "plaintext\n", tls, plaintext_len );
-		rc = -ENOMEM_TX_PLAINTEXT;
+		rc = -ENOMEM;
 		goto done;
 	}
 
@@ -1991,19 +1283,20 @@
 	if ( ! ciphertext ) {
 		DBGC ( tls, "TLS %p could not allocate %zd bytes for "
 		       "ciphertext\n", tls, ciphertext_len );
-		rc = -ENOMEM_TX_CIPHERTEXT;
+		rc = -ENOMEM;
 		goto done;
 	}
 
 	/* Assemble ciphertext */
 	tlshdr = iob_put ( ciphertext, sizeof ( *tlshdr ) );
 	tlshdr->type = type;
-	tlshdr->version = htons ( tls->version );
+	tlshdr->version = htons ( TLS_VERSION_TLS_1_0 );
 	tlshdr->length = htons ( plaintext_len );
 	memcpy ( cipherspec->cipher_next_ctx, cipherspec->cipher_ctx,
-		 cipher->ctxsize );
-	cipher_encrypt ( cipher, cipherspec->cipher_next_ctx, plaintext,
-			 iob_put ( ciphertext, plaintext_len ), plaintext_len );
+		 cipherspec->cipher->ctxsize );
+	cipher_encrypt ( cipherspec->cipher, cipherspec->cipher_next_ctx,
+			 plaintext, iob_put ( ciphertext, plaintext_len ),
+			 plaintext_len );
 
 	/* Free plaintext as soon as possible to conserve memory */
 	free ( plaintext );
@@ -2020,7 +1313,8 @@
 	/* Update TX state machine to next record */
 	tls->tx_seq += 1;
 	memcpy ( tls->tx_cipherspec.cipher_ctx,
-		 tls->tx_cipherspec.cipher_next_ctx, cipher->ctxsize );
+		 tls->tx_cipherspec.cipher_next_ctx,
+		 tls->tx_cipherspec.cipher->ctxsize );
 
  done:
 	free ( plaintext );
@@ -2032,25 +1326,36 @@
  * Split stream-ciphered record into data and MAC portions
  *
  * @v tls		TLS session
- * @v rx_data		List of received data buffers
- * @v mac		MAC to fill in
+ * @v plaintext		Plaintext record
+ * @v plaintext_len	Length of record
+ * @ret data		Data
+ * @ret len		Length of data
+ * @ret digest		MAC digest
  * @ret rc		Return status code
  */
 static int tls_split_stream ( struct tls_session *tls,
-			      struct list_head *rx_data, void **mac ) {
-	size_t mac_len = tls->rx_cipherspec.suite->digest->digestsize;
-	struct io_buffer *iobuf;
-
-	/* Extract MAC */
-	iobuf = list_last_entry ( rx_data, struct io_buffer, list );
-	assert ( iobuf != NULL );
-	if ( iob_len ( iobuf ) < mac_len ) {
-		DBGC ( tls, "TLS %p received underlength MAC\n", tls );
-		DBGC_HD ( tls, iobuf->data, iob_len ( iobuf ) );
-		return -EINVAL_STREAM;
+			      void *plaintext, size_t plaintext_len,
+			      void **data, size_t *len, void **digest ) {
+	void *content;
+	size_t content_len;
+	void *mac;
+	size_t mac_len;
+
+	/* Decompose stream-ciphered data */
+	mac_len = tls->rx_cipherspec.digest->digestsize;
+	if ( plaintext_len < mac_len ) {
+		DBGC ( tls, "TLS %p received underlength record\n", tls );
+		DBGC_HD ( tls, plaintext, plaintext_len );
+		return -EINVAL;
 	}
-	iob_unput ( iobuf, mac_len );
-	*mac = iobuf->tail;
+	content_len = ( plaintext_len - mac_len );
+	content = plaintext;
+	mac = ( content + content_len );
+
+	/* Fill in return values */
+	*data = content;
+	*len = content_len;
+	*digest = mac;
 
 	return 0;
 }
@@ -2059,56 +1364,64 @@
  * Split block-ciphered record into data and MAC portions
  *
  * @v tls		TLS session
- * @v rx_data		List of received data buffers
- * @v mac		MAC to fill in
+ * @v plaintext		Plaintext record
+ * @v plaintext_len	Length of record
+ * @ret data		Data
+ * @ret len		Length of data
+ * @ret digest		MAC digest
  * @ret rc		Return status code
  */
 static int tls_split_block ( struct tls_session *tls,
-			     struct list_head *rx_data, void **mac ) {
-	size_t mac_len = tls->rx_cipherspec.suite->digest->digestsize;
-	struct io_buffer *iobuf;
+			     void *plaintext, size_t plaintext_len,
+			     void **data, size_t *len,
+			     void **digest ) {
+	void *iv;
 	size_t iv_len;
-	uint8_t *padding_final;
-	uint8_t *padding;
+	void *content;
+	size_t content_len;
+	void *mac;
+	size_t mac_len;
+	void *padding;
 	size_t padding_len;
+	unsigned int i;
 
-	/* TLSv1.1 and later use an explicit IV */
-	iobuf = list_first_entry ( rx_data, struct io_buffer, list );
-	iv_len = ( ( tls->version >= TLS_VERSION_TLS_1_1 ) ?
-		   tls->rx_cipherspec.suite->cipher->blocksize : 0 );
-	if ( iob_len ( iobuf ) < iv_len ) {
-		DBGC ( tls, "TLS %p received underlength IV\n", tls );
-		DBGC_HD ( tls, iobuf->data, iob_len ( iobuf ) );
-		return -EINVAL_BLOCK;
-	}
-	iob_pull ( iobuf, iv_len );
-
-	/* Extract and verify padding */
-	iobuf = list_last_entry ( rx_data, struct io_buffer, list );
-	padding_final = ( iobuf->tail - 1 );
-	padding_len = *padding_final;
-	if ( ( padding_len + 1 ) > iob_len ( iobuf ) ) {
-		DBGC ( tls, "TLS %p received underlength padding\n", tls );
-		DBGC_HD ( tls, iobuf->data, iob_len ( iobuf ) );
-		return -EINVAL_BLOCK;
-	}
-	iob_unput ( iobuf, ( padding_len + 1 ) );
-	for ( padding = iobuf->tail ; padding < padding_final ; padding++ ) {
-		if ( *padding != padding_len ) {
+	/* Decompose block-ciphered data */
+	if ( plaintext_len < 1 ) {
+		DBGC ( tls, "TLS %p received underlength record\n", tls );
+		DBGC_HD ( tls, plaintext, plaintext_len );
+		return -EINVAL;
+	}
+	iv_len = tls->rx_cipherspec.cipher->blocksize;
+
+	/* FIXME: TLSv1.1 uses an explicit IV */
+	iv_len = 0;
+
+	mac_len = tls->rx_cipherspec.digest->digestsize;
+	padding_len = *( ( uint8_t * ) ( plaintext + plaintext_len - 1 ) );
+	if ( plaintext_len < ( iv_len + mac_len + padding_len + 1 ) ) {
+		DBGC ( tls, "TLS %p received underlength record\n", tls );
+		DBGC_HD ( tls, plaintext, plaintext_len );
+		return -EINVAL;
+	}
+	content_len = ( plaintext_len - iv_len - mac_len - padding_len - 1 );
+	iv = plaintext;
+	content = ( iv + iv_len );
+	mac = ( content + content_len );
+	padding = ( mac + mac_len );
+
+	/* Verify padding bytes */
+	for ( i = 0 ; i < padding_len ; i++ ) {
+		if ( *( ( uint8_t * ) ( padding + i ) ) != padding_len ) {
 			DBGC ( tls, "TLS %p received bad padding\n", tls );
-			DBGC_HD ( tls, padding, padding_len );
-			return -EINVAL_PADDING;
+			DBGC_HD ( tls, plaintext, plaintext_len );
+			return -EINVAL;
 		}
 	}
 
-	/* Extract MAC */
-	if ( iob_len ( iobuf ) < mac_len ) {
-		DBGC ( tls, "TLS %p received underlength MAC\n", tls );
-		DBGC_HD ( tls, iobuf->data, iob_len ( iobuf ) );
-		return -EINVAL_BLOCK;
-	}
-	iob_unput ( iobuf, mac_len );
-	*mac = iobuf->tail;
+	/* Fill in return values */
+	*data = content;
+	*len = content_len;
+	*digest = mac;
 
 	return 0;
 }
@@ -2118,65 +1431,69 @@
  *
  * @v tls		TLS session
  * @v tlshdr		Record header
- * @v rx_data		List of received data buffers
+ * @v ciphertext	Ciphertext record
  * @ret rc		Return status code
  */
 static int tls_new_ciphertext ( struct tls_session *tls,
-				struct tls_header *tlshdr,
-				struct list_head *rx_data ) {
+				struct tls_header *tlshdr, void *ciphertext ) {
 	struct tls_header plaintext_tlshdr;
 	struct tls_cipherspec *cipherspec = &tls->rx_cipherspec;
-	struct cipher_algorithm *cipher = cipherspec->suite->cipher;
-	struct digest_algorithm *digest = cipherspec->suite->digest;
-	uint8_t ctx[digest->ctxsize];
-	uint8_t verify_mac[digest->digestsize];
-	struct io_buffer *iobuf;
+	size_t record_len = ntohs ( tlshdr->length );
+	void *plaintext = NULL;
+	void *data;
+	size_t len;
 	void *mac;
-	size_t len = 0;
+	size_t mac_len = cipherspec->digest->digestsize;
+	uint8_t verify_mac[mac_len];
 	int rc;
 
-	/* Decrypt the received data */
-	list_for_each_entry ( iobuf, &tls->rx_data, list ) {
-		cipher_decrypt ( cipher, cipherspec->cipher_ctx,
-				 iobuf->data, iobuf->data, iob_len ( iobuf ) );
+	/* Allocate buffer for plaintext */
+	plaintext = malloc ( record_len );
+	if ( ! plaintext ) {
+		DBGC ( tls, "TLS %p could not allocate %zd bytes for "
+		       "decryption buffer\n", tls, record_len );
+		rc = -ENOMEM;
+		goto done;
 	}
 
+	/* Decrypt the record */
+	cipher_decrypt ( cipherspec->cipher, cipherspec->cipher_ctx,
+			 ciphertext, plaintext, record_len );
+
 	/* Split record into content and MAC */
-	if ( is_stream_cipher ( cipher ) ) {
-		if ( ( rc = tls_split_stream ( tls, rx_data, &mac ) ) != 0 )
-			return rc;
+	if ( is_stream_cipher ( cipherspec->cipher ) ) {
+		if ( ( rc = tls_split_stream ( tls, plaintext, record_len,
+					       &data, &len, &mac ) ) != 0 )
+			goto done;
 	} else {
-		if ( ( rc = tls_split_block ( tls, rx_data, &mac ) ) != 0 )
-			return rc;
-	}
-
-	/* Calculate total length */
-	DBGC2 ( tls, "Received plaintext data:\n" );
-	list_for_each_entry ( iobuf, rx_data, list ) {
-		DBGC2_HD ( tls, iobuf->data, iob_len ( iobuf ) );
-		len += iob_len ( iobuf );
+		if ( ( rc = tls_split_block ( tls, plaintext, record_len,
+					      &data, &len, &mac ) ) != 0 )
+			goto done;
 	}
 
 	/* Verify MAC */
 	plaintext_tlshdr.type = tlshdr->type;
 	plaintext_tlshdr.version = tlshdr->version;
 	plaintext_tlshdr.length = htons ( len );
-	tls_hmac_init ( cipherspec, ctx, tls->rx_seq, &plaintext_tlshdr );
-	list_for_each_entry ( iobuf, rx_data, list ) {
-		tls_hmac_update ( cipherspec, ctx, iobuf->data,
-				  iob_len ( iobuf ) );
-	}
-	tls_hmac_final ( cipherspec, ctx, verify_mac );
-	if ( memcmp ( mac, verify_mac, sizeof ( verify_mac ) ) != 0 ) {
+	tls_hmac ( tls, cipherspec, tls->rx_seq, &plaintext_tlshdr,
+		   data, len, verify_mac);
+	if ( memcmp ( mac, verify_mac, mac_len ) != 0 ) {
 		DBGC ( tls, "TLS %p failed MAC verification\n", tls );
-		return -EINVAL_MAC;
+		DBGC_HD ( tls, plaintext, record_len );
+		goto done;
 	}
 
+	DBGC2 ( tls, "Received plaintext data:\n" );
+	DBGC2_HD ( tls, data, len );
+
 	/* Process plaintext record */
-	if ( ( rc = tls_new_record ( tls, tlshdr->type, rx_data ) ) != 0 )
-		return rc;
+	if ( ( rc = tls_new_record ( tls, tlshdr->type, data, len ) ) != 0 )
+		goto done;
 
-	return 0;
+	rc = 0;
+ done:
+	free ( plaintext );
+	return rc;
 }
 
 /******************************************************************************
@@ -2195,7 +1512,7 @@
 static size_t tls_plainstream_window ( struct tls_session *tls ) {
 
 	/* Block window unless we are ready to accept data */
-	if ( ! tls_ready ( tls ) )
+	if ( tls->tx_state != TLS_TX_DATA )
 		return 0;
 
 	return xfer_window ( &tls->cipherstream );
@@ -2215,7 +1532,7 @@
 	int rc;
 	
 	/* Refuse unless we are ready to accept data */
-	if ( ! tls_ready ( tls ) ) {
+	if ( tls->tx_state != TLS_TX_DATA ) {
 		rc = -ENOTCONN;
 		goto done;
 	}
@@ -2256,61 +1573,20 @@
  */
 static int tls_newdata_process_header ( struct tls_session *tls ) {
 	size_t data_len = ntohs ( tls->rx_header.length );
-	size_t remaining = data_len;
-	size_t frag_len;
-	struct io_buffer *iobuf;
-	struct io_buffer *tmp;
-	int rc;
 
-	/* Allocate data buffers now that we know the length */
-	assert ( list_empty ( &tls->rx_data ) );
-	while ( remaining ) {
-
-		/* Calculate fragment length.  Ensure that no block is
-		 * smaller than TLS_RX_MIN_BUFSIZE (by increasing the
-		 * allocation length if necessary).
-		 */
-		frag_len = remaining;
-		if ( frag_len > TLS_RX_BUFSIZE )
-			frag_len = TLS_RX_BUFSIZE;
-		remaining -= frag_len;
-		if ( remaining < TLS_RX_MIN_BUFSIZE ) {
-			frag_len += remaining;
-			remaining = 0;
-		}
-
-		/* Allocate buffer */
-		iobuf = alloc_iob_raw ( frag_len, TLS_RX_ALIGN, 0 );
-		if ( ! iobuf ) {
-			DBGC ( tls, "TLS %p could not allocate %zd of %zd "
-			       "bytes for receive buffer\n", tls,
-			       remaining, data_len );
-			rc = -ENOMEM_RX_DATA;
-			goto err;
-		}
-
-		/* Ensure tailroom is exactly what we asked for.  This
-		 * will result in unaligned I/O buffers when the
-		 * fragment length is unaligned, which can happen only
-		 * before we switch to using a block cipher.
-		 */
-		iob_reserve ( iobuf, ( iob_tailroom ( iobuf ) - frag_len ) );
-
-		/* Add I/O buffer to list */
-		list_add_tail ( &iobuf->list, &tls->rx_data );
+	/* Allocate data buffer now that we know the length */
+	assert ( tls->rx_data == NULL );
+	tls->rx_data = malloc ( data_len );
+	if ( ! tls->rx_data ) {
+		DBGC ( tls, "TLS %p could not allocate %zd bytes "
+		       "for receive buffer\n", tls, data_len );
+		return -ENOMEM;
 	}
 
 	/* Move to data state */
 	tls->rx_state = TLS_RX_DATA;
 
 	return 0;
-
- err:
-	list_for_each_entry_safe ( iobuf, tmp, &tls->rx_data, list ) {
-		list_del ( &iobuf->list );
-		free_iob ( iobuf );
-	}
-	return rc;
 }
 
 /**
@@ -2320,31 +1596,22 @@
  * @ret rc		Returned status code
  */
 static int tls_newdata_process_data ( struct tls_session *tls ) {
-	struct io_buffer *iobuf;
 	int rc;
 
-	/* Move current buffer to end of list */
-	iobuf = list_first_entry ( &tls->rx_data, struct io_buffer, list );
-	list_del ( &iobuf->list );
-	list_add_tail ( &iobuf->list, &tls->rx_data );
-
-	/* Continue receiving data if any space remains */
-	iobuf = list_first_entry ( &tls->rx_data, struct io_buffer, list );
-	if ( iob_tailroom ( iobuf ) )
-		return 0;
-
 	/* Process record */
 	if ( ( rc = tls_new_ciphertext ( tls, &tls->rx_header,
-					 &tls->rx_data ) ) != 0 )
+					 tls->rx_data ) ) != 0 )
 		return rc;
 
 	/* Increment RX sequence number */
 	tls->rx_seq += 1;
 
+	/* Free data buffer */
+	free ( tls->rx_data );
+	tls->rx_data = NULL;
+
 	/* Return to header state */
-	assert ( list_empty ( &tls->rx_data ) );
 	tls->rx_state = TLS_RX_HEADER;
-	iob_unput ( &tls->rx_header_iobuf, sizeof ( tls->rx_header ) );
 
 	return 0;
 }
@@ -2361,43 +1628,45 @@
 				      struct io_buffer *iobuf,
 				      struct xfer_metadata *xfer __unused ) {
 	size_t frag_len;
+	void *buf;
+	size_t buf_len;
 	int ( * process ) ( struct tls_session *tls );
-	struct io_buffer *dest;
 	int rc;
 
 	while ( iob_len ( iobuf ) ) {
-
 		/* Select buffer according to current state */
 		switch ( tls->rx_state ) {
 		case TLS_RX_HEADER:
-			dest = &tls->rx_header_iobuf;
+			buf = &tls->rx_header;
+			buf_len = sizeof ( tls->rx_header );
 			process = tls_newdata_process_header;
 			break;
 		case TLS_RX_DATA:
-			dest = list_first_entry ( &tls->rx_data,
-						  struct io_buffer, list );
-			assert ( dest != NULL );
+			buf = tls->rx_data;
+			buf_len = ntohs ( tls->rx_header.length );
 			process = tls_newdata_process_data;
 			break;
 		default:
 			assert ( 0 );
-			rc = -EINVAL_RX_STATE;
+			rc = -EINVAL;
 			goto done;
 		}
 
 		/* Copy data portion to buffer */
-		frag_len = iob_len ( iobuf );
-		if ( frag_len > iob_tailroom ( dest ) )
-			frag_len = iob_tailroom ( dest );
-		memcpy ( iob_put ( dest, frag_len ), iobuf->data, frag_len );
+		frag_len = ( buf_len - tls->rx_rcvd );
+		if ( frag_len > iob_len  ( iobuf ) )
+			frag_len = iob_len ( iobuf );
+		memcpy ( ( buf + tls->rx_rcvd ), iobuf->data, frag_len );
+		tls->rx_rcvd += frag_len;
 		iob_pull ( iobuf, frag_len );
 
 		/* Process data if buffer is now full */
-		if ( iob_tailroom ( dest ) == 0 ) {
+		if ( tls->rx_rcvd == buf_len ) {
 			if ( ( rc = process ( tls ) ) != 0 ) {
 				tls_close ( tls, rc );
 				goto done;
 			}
+			tls->rx_rcvd = 0;
 		}
 	}
 	rc = 0;
@@ -2422,79 +1691,6 @@
 
 /******************************************************************************
  *
- * Certificate validator
- *
- ******************************************************************************
- */
-
-/**
- * Handle certificate validation completion
- *
- * @v tls		TLS session
- * @v rc		Reason for completion
- */
-static void tls_validator_done ( struct tls_session *tls, int rc ) {
-	struct tls_cipherspec *cipherspec = &tls->tx_cipherspec_pending;
-	struct pubkey_algorithm *pubkey = cipherspec->suite->pubkey;
-	struct x509_certificate *cert;
-
-	/* Close validator interface */
-	intf_restart ( &tls->validator, rc );
-
-	/* Check for validation failure */
-	if ( rc != 0 ) {
-		DBGC ( tls, "TLS %p certificate validation failed: %s\n",
-		       tls, strerror ( rc ) );
-		goto err;
-	}
-	DBGC ( tls, "TLS %p certificate validation succeeded\n", tls );
-
-	/* Extract first certificate */
-	cert = x509_first ( tls->chain );
-	assert ( cert != NULL );
-
-	/* Verify server name */
-	if ( ( cert->subject.name == NULL ) ||
-	     ( strcmp ( cert->subject.name, tls->name ) != 0 ) ) {
-		DBGC ( tls, "TLS %p server name incorrect (expected %s, got "
-		       "%s)\n", tls, tls->name, cert->subject.name );
-		rc = -EACCES_WRONG_NAME;
-		goto err;
-	}
-
-	/* Initialise public key algorithm */
-	if ( ( rc = pubkey_init ( pubkey, cipherspec->pubkey_ctx,
-				  cert->subject.public_key.raw.data,
-				  cert->subject.public_key.raw.len ) ) != 0 ) {
-		DBGC ( tls, "TLS %p cannot initialise public key: %s\n",
-		       tls, strerror ( rc ) );
-		goto err;
-	}
-
-	/* Schedule Client Key Exchange, Change Cipher, and Finished */
-	tls->tx_pending |= ( TLS_TX_CLIENT_KEY_EXCHANGE |
-			     TLS_TX_CHANGE_CIPHER |
-			     TLS_TX_FINISHED );
-	tls_tx_resume ( tls );
-
-	return;
-
- err:
-	tls_close ( tls, rc );
-	return;
-}
-
-/** TLS certificate validator interface operations */
-static struct interface_operation tls_validator_ops[] = {
-	INTF_OP ( intf_close, struct tls_session *, tls_validator_done ),
-};
-
-/** TLS certificate validator interface descriptor */
-static struct interface_descriptor tls_validator_desc =
-	INTF_DESC ( struct tls_session, validator, tls_validator_ops );
-
-/******************************************************************************
- *
  * Controlling process
  *
  ******************************************************************************
@@ -2512,40 +1708,29 @@
 	if ( ! xfer_window ( &tls->cipherstream ) )
 		return;
 
-	/* Send first pending transmission */
-	if ( tls->tx_pending & TLS_TX_CLIENT_HELLO ) {
+	switch ( tls->tx_state ) {
+	case TLS_TX_NONE:
+		/* Nothing to do */
+		break;
+	case TLS_TX_CLIENT_HELLO:
 		/* Send Client Hello */
 		if ( ( rc = tls_send_client_hello ( tls ) ) != 0 ) {
 			DBGC ( tls, "TLS %p could not send Client Hello: %s\n",
 			       tls, strerror ( rc ) );
 			goto err;
 		}
-		tls->tx_pending &= ~TLS_TX_CLIENT_HELLO;
-	} else if ( tls->tx_pending & TLS_TX_CERTIFICATE ) {
-		/* Send Certificate */
-		if ( ( rc = tls_send_certificate ( tls ) ) != 0 ) {
-			DBGC ( tls, "TLS %p cold not send Certificate: %s\n",
-			       tls, strerror ( rc ) );
-			goto err;
-		}
-		tls->tx_pending &= ~TLS_TX_CERTIFICATE;
-	} else if ( tls->tx_pending & TLS_TX_CLIENT_KEY_EXCHANGE ) {
+		tls_tx_none ( tls );
+		break;
+	case TLS_TX_CLIENT_KEY_EXCHANGE:
 		/* Send Client Key Exchange */
 		if ( ( rc = tls_send_client_key_exchange ( tls ) ) != 0 ) {
-			DBGC ( tls, "TLS %p could not send Client Key "
-			       "Exchange: %s\n", tls, strerror ( rc ) );
-			goto err;
-		}
-		tls->tx_pending &= ~TLS_TX_CLIENT_KEY_EXCHANGE;
-	} else if ( tls->tx_pending & TLS_TX_CERTIFICATE_VERIFY ) {
-		/* Send Certificate Verify */
-		if ( ( rc = tls_send_certificate_verify ( tls ) ) != 0 ) {
-			DBGC ( tls, "TLS %p could not send Certificate "
-			       "Verify: %s\n", tls, strerror ( rc ) );
+			DBGC ( tls, "TLS %p could send Client Key Exchange: "
+			       "%s\n", tls, strerror ( rc ) );
 			goto err;
 		}
-		tls->tx_pending &= ~TLS_TX_CERTIFICATE_VERIFY;
-	} else if ( tls->tx_pending & TLS_TX_CHANGE_CIPHER ) {
+		tls_tx_start ( tls, TLS_TX_CHANGE_CIPHER );
+		break;
+	case TLS_TX_CHANGE_CIPHER:
 		/* Send Change Cipher, and then change the cipher in use */
 		if ( ( rc = tls_send_change_cipher ( tls ) ) != 0 ) {
 			DBGC ( tls, "TLS %p could not send Change Cipher: "
@@ -2560,21 +1745,24 @@
 			goto err;
 		}
 		tls->tx_seq = 0;
-		tls->tx_pending &= ~TLS_TX_CHANGE_CIPHER;
-	} else if ( tls->tx_pending & TLS_TX_FINISHED ) {
+		tls_tx_start ( tls, TLS_TX_FINISHED );
+		break;
+	case TLS_TX_FINISHED:
 		/* Send Finished */
 		if ( ( rc = tls_send_finished ( tls ) ) != 0 ) {
 			DBGC ( tls, "TLS %p could not send Finished: %s\n",
 			       tls, strerror ( rc ) );
 			goto err;
 		}
-		tls->tx_pending &= ~TLS_TX_FINISHED;
+		tls_tx_none ( tls );
+		break;
+	case TLS_TX_DATA:
+		/* Nothing to do */
+		break;
+	default:
+		assert ( 0 );
 	}
 
-	/* Reschedule process if pending transmissions remain */
-	if ( tls->tx_pending )
-		tls_tx_resume ( tls );
-
 	return;
 
  err:
@@ -2592,60 +1780,35 @@
  ******************************************************************************
  */
 
-int add_tls ( struct interface *xfer, const char *name,
-	      struct interface **next ) {
+int add_tls ( struct interface *xfer, struct interface **next ) {
 	struct tls_session *tls;
-	int rc;
 
 	/* Allocate and initialise TLS structure */
 	tls = malloc ( sizeof ( *tls ) );
-	if ( ! tls ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
+	if ( ! tls )
+		return -ENOMEM;
 	memset ( tls, 0, sizeof ( *tls ) );
 	ref_init ( &tls->refcnt, free_tls );
-	tls->name = name;
 	intf_init ( &tls->plainstream, &tls_plainstream_desc, &tls->refcnt );
 	intf_init ( &tls->cipherstream, &tls_cipherstream_desc, &tls->refcnt );
-	intf_init ( &tls->validator, &tls_validator_desc, &tls->refcnt );
-	process_init ( &tls->process, &tls_process_desc, &tls->refcnt );
-	tls->version = TLS_VERSION_TLS_1_2;
 	tls_clear_cipher ( tls, &tls->tx_cipherspec );
 	tls_clear_cipher ( tls, &tls->tx_cipherspec_pending );
 	tls_clear_cipher ( tls, &tls->rx_cipherspec );
 	tls_clear_cipher ( tls, &tls->rx_cipherspec_pending );
-	tls->client_random.gmt_unix_time = time ( NULL );
-	if ( ( rc = tls_generate_random ( tls, &tls->client_random.random,
-			  ( sizeof ( tls->client_random.random ) ) ) ) != 0 ) {
-		goto err_random;
-	}
-	tls->pre_master_secret.version = htons ( tls->version );
-	if ( ( rc = tls_generate_random ( tls, &tls->pre_master_secret.random,
-		      ( sizeof ( tls->pre_master_secret.random ) ) ) ) != 0 ) {
-		goto err_random;
-	}
-	digest_init ( &md5_sha1_algorithm, tls->handshake_md5_sha1_ctx );
-	digest_init ( &sha256_algorithm, tls->handshake_sha256_ctx );
-	tls->handshake_digest = &sha256_algorithm;
-	tls->handshake_ctx = tls->handshake_sha256_ctx;
-	tls->tx_pending = TLS_TX_CLIENT_HELLO;
-	iob_populate ( &tls->rx_header_iobuf, &tls->rx_header, 0,
-		       sizeof ( tls->rx_header ) );
-	INIT_LIST_HEAD ( &tls->rx_data );
-
-	/* Add pending operations for server and client Finished messages */
-	pending_get ( &tls->client_negotiation );
-	pending_get ( &tls->server_negotiation );
+	tls->client_random.gmt_unix_time = 0;
+	tls_generate_random ( &tls->client_random.random,
+			      ( sizeof ( tls->client_random.random ) ) );
+	tls->pre_master_secret.version = htons ( TLS_VERSION_TLS_1_0 );
+	tls_generate_random ( &tls->pre_master_secret.random,
+			      ( sizeof ( tls->pre_master_secret.random ) ) );
+	digest_init ( &md5_algorithm, tls->handshake_md5_ctx );
+	digest_init ( &sha1_algorithm, tls->handshake_sha1_ctx );
+	process_init_stopped ( &tls->process, &tls_process_desc, &tls->refcnt );
+	tls_tx_start ( tls, TLS_TX_CLIENT_HELLO );
 
 	/* Attach to parent interface, mortalise self, and return */
 	intf_plug_plug ( &tls->plainstream, xfer );
 	*next = &tls->cipherstream;
 	ref_put ( &tls->refcnt );
 	return 0;
-
- err_random:
-	ref_put ( &tls->refcnt );
- err_alloc:
-	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/dhcp.c ipxe-1.0.1~lliurex1505/src/net/udp/dhcp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/dhcp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp/dhcp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -91,6 +90,9 @@
 	DHCP_END
 };
 
+/** Version number feature */
+FEATURE_VERSION ( VERSION_MAJOR, VERSION_MINOR, VERSION_PATCH );
+
 /** DHCP server address setting */
 struct setting dhcp_server_setting __setting ( SETTING_MISC ) = {
 	.name = "dhcp-server",
@@ -107,6 +109,14 @@
 	.type = &setting_type_string,
 };
 
+/** Use cached network settings */
+struct setting use_cached_setting __setting ( SETTING_MISC ) = {
+	.name = "use-cached",
+	.description = "Use cached settings",
+	.tag = DHCP_EB_USE_CACHED,
+	.type = &setting_type_uint8,
+};
+
 /**
  * Most recent DHCP transaction ID
  *
@@ -927,25 +937,10 @@
 	dhcphdr->magic = htonl ( DHCP_MAGIC_COOKIE );
 	dhcphdr->htype = ntohs ( netdev->ll_protocol->ll_proto );
 	dhcphdr->op = dhcp_op[msgtype];
-	dhcphdr->hlen = netdev->ll_protocol->ll_addr_len;
-	memcpy ( dhcphdr->chaddr, netdev->ll_addr,
-		 netdev->ll_protocol->ll_addr_len );
+	dhcphdr->hlen = dhcp_chaddr ( netdev, dhcphdr->chaddr,
+				      &dhcphdr->flags );
 	memcpy ( dhcphdr->options, options, options_len );
 
-	/* If the local link-layer address functions only as a name
-	 * (i.e. cannot be used as a destination address), then
-	 * request broadcast responses.
-	 */
-	if ( netdev->ll_protocol->flags & LL_NAME_ONLY )
-		dhcphdr->flags |= htons ( BOOTP_FL_BROADCAST );
-
-	/* If the network device already has an IPv4 address then
-	 * unicast responses from the DHCP server may be rejected, so
-	 * request broadcast responses.
-	 */
-	if ( ipv4_has_any_addr ( netdev ) )
-		dhcphdr->flags |= htons ( BOOTP_FL_BROADCAST );
-
 	/* Initialise DHCP packet structure */
 	memset ( dhcppkt, 0, sizeof ( *dhcppkt ) );
 	dhcppkt_init ( dhcppkt, data, max_len );
@@ -1033,15 +1028,10 @@
 		return rc;
 	}
 
-	/* Add client UUID, if we have one.  Required for PXE.  The
-	 * PXE spec does not specify a byte ordering for UUIDs, but
-	 * RFC4578 suggests that it follows the EFI spec, in which the
-	 * first three fields are little-endian.
-	 */
+	/* Add client UUID, if we have one.  Required for PXE. */
 	client_uuid.type = DHCP_CLIENT_UUID_TYPE;
 	if ( ( len = fetch_uuid_setting ( NULL, &uuid_setting,
 					  &client_uuid.uuid ) ) >= 0 ) {
-		uuid_mangle ( &client_uuid.uuid );
 		if ( ( rc = dhcppkt_store ( dhcppkt, DHCP_CLIENT_UUID,
 					    &client_uuid,
 					    sizeof ( client_uuid ) ) ) != 0 ) {
@@ -1277,20 +1267,37 @@
 };
 
 /**
+ * Get cached DHCPACK where none exists
+ */
+__weak void get_cached_dhcpack ( void ) { __keepme }
+
+/**
  * Start DHCP state machine on a network device
  *
  * @v job		Job control interface
  * @v netdev		Network device
- * @ret rc		Return status code
+ * @ret rc		Return status code, or positive if cached
  *
  * Starts DHCP on the specified network device.  If successful, the
  * DHCPACK (and ProxyDHCPACK, if applicable) will be registered as
  * option sources.
+ *
+ * On a return of 0, a background job has been started to perform the
+ * DHCP request. Any nonzero return means the job has not been
+ * started; a positive return value indicates the success condition of
+ * having fetched the appropriate data from cached information.
  */
 int start_dhcp ( struct interface *job, struct net_device *netdev ) {
 	struct dhcp_session *dhcp;
 	int rc;
 
+	/* Check for cached DHCP information */
+	get_cached_dhcpack();
+	if ( fetch_uintz_setting ( NULL, &use_cached_setting ) ) {
+		DBG ( "DHCP using cached network settings\n" );
+		return 1;
+	}
+
 	/* Allocate and initialise structure */
 	dhcp = zalloc ( sizeof ( *dhcp ) );
 	if ( ! dhcp )
@@ -1471,9 +1478,3 @@
 	ref_put ( &dhcp->refcnt );
 	return rc;
 }
-
-/** DHCP network device configurator */
-struct net_device_configurator dhcp_configurator __net_device_configurator = {
-	.name = "dhcp",
-	.start = start_dhcp,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/dns.c ipxe-1.0.1~lliurex1505/src/net/udp/dns.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/dns.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp/dns.c	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -205,7 +204,7 @@
 	char *fqdn;
 
 	/* Leave unchanged if already fully-qualified or no local domain */
-	if ( ( ! localdomain ) || ( strchr ( string, '.' ) != NULL ) )
+	if ( ( ! localdomain ) || ( strchr ( string, '.' ) != 0 ) )
 		return strdup ( string );
 
 	/* Append local domain to name */
@@ -223,24 +222,18 @@
  * DNS names consist of "<length>element" pairs.
  */
 static char * dns_make_name ( const char *string, char *buf ) {
-	char *length_byte;
+	char *length_byte = buf++;
 	char c;
 
-	length_byte = buf++;
-	*length_byte = 0;
-	do {
-		c = *(string++);
-		if ( ( c == '.' ) || ( c == '\0' ) ) {
-			if ( *length_byte ) {
-				length_byte = buf++;
-				*length_byte = 0;
-			}
-		} else {
-			*(buf++) = c;
-			(*length_byte)++;
+	while ( ( c = *(string++) ) ) {
+		if ( c == '.' ) {
+			*length_byte = buf - length_byte - 1;
+			length_byte = buf;
 		}
-	} while ( c );
-
+		*(buf++) = c;
+	}
+	*length_byte = buf - length_byte - 1;
+	*(buf++) = '\0';
 	return buf;
 }
 
@@ -428,7 +421,7 @@
 	}
 	
 	/* Determine what to do next based on the type of query we
-	 * issued and the response we received
+	 * issued and the reponse we received
 	 */
 	switch ( qtype ) {
 
@@ -601,6 +594,14 @@
 	.type = &setting_type_ipv4,
 };
 
+/** Domain name setting */
+struct setting domain_setting __setting ( SETTING_IPv4_EXTRA ) = {
+	.name = "domain",
+	.description = "DNS domain",
+	.tag = DHCP_DOMAIN_NAME,
+	.type = &setting_type_string,
+};
+
 /**
  * Apply DNS settings
  *
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/slam.c ipxe-1.0.1~lliurex1505/src/net/udp/slam.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/slam.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp/slam.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/syslog.c ipxe-1.0.1~lliurex1505/src/net/udp/syslog.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/syslog.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp/syslog.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -26,7 +25,6 @@
  */
 
 #include <stdint.h>
-#include <stdlib.h>
 #include <byteswap.h>
 #include <ipxe/xfer.h>
 #include <ipxe/open.h>
@@ -34,19 +32,11 @@
 #include <ipxe/dhcp.h>
 #include <ipxe/settings.h>
 #include <ipxe/console.h>
-#include <ipxe/lineconsole.h>
+#include <ipxe/ansiesc.h>
 #include <ipxe/syslog.h>
-#include <config/console.h>
-
-/* Set default console usage if applicable */
-#if ! ( defined ( CONSOLE_SYSLOG ) && CONSOLE_EXPLICIT ( CONSOLE_SYSLOG ) )
-#undef CONSOLE_SYSLOG
-#define CONSOLE_SYSLOG ( CONSOLE_USAGE_ALL & ~CONSOLE_USAGE_TUI )
-#endif
 
 /** The syslog server */
 static struct sockaddr_tcpip logserver = {
-	.st_family = AF_INET,
 	.st_port = htons ( SYSLOG_PORT ),
 };
 
@@ -67,80 +57,25 @@
  ******************************************************************************
  */
 
-/** Host name (for log messages) */
-static char *syslog_hostname;
-
-/** Domain name (for log messages) */
-static char *syslog_domain;
-
-/**
- * Transmit formatted syslog message
- *
- * @v xfer		Data transfer interface
- * @v severity		Severity
- * @v message		Message
- * @v terminator	Message terminator
- * @ret rc		Return status code
- */
-int syslog_send ( struct interface *xfer, unsigned int severity,
-		  const char *message, const char *terminator ) {
-
-	return xfer_printf ( xfer, "<%d>%s%s%s%sipxe: %s%s",
-			     SYSLOG_PRIORITY ( SYSLOG_DEFAULT_FACILITY,
-					       severity ),
-			     ( syslog_hostname ? syslog_hostname : "" ),
-			     ( syslog_domain ? "." : "" ),
-			     ( syslog_domain ? syslog_domain : "" ),
-			     ( ( syslog_hostname || syslog_domain ) ? " " : ""),
-			     message, terminator );
-}
-
-/******************************************************************************
- *
- * Console driver
- *
- ******************************************************************************
- */
-
 /** Syslog line buffer */
 static char syslog_buffer[SYSLOG_BUFSIZE];
 
-/** Syslog severity */
-static unsigned int syslog_severity = SYSLOG_DEFAULT_SEVERITY;
+/** Index into syslog line buffer */
+static unsigned int syslog_idx;
 
-/**
- * Handle ANSI set syslog priority (private sequence)
- *
- * @v count		Parameter count
- * @v params		List of graphic rendition aspects
- */
-static void syslog_handle_priority ( unsigned int count __unused,
-				     int params[] ) {
-	if ( params[0] >= 0 ) {
-		syslog_severity = params[0];
-	} else {
-		syslog_severity = SYSLOG_DEFAULT_SEVERITY;
-	}
-}
+/** Syslog recursion marker */
+static int syslog_entered;
 
 /** Syslog ANSI escape sequence handlers */
-static struct ansiesc_handler syslog_handlers[] = {
-	{ ANSIESC_LOG_PRIORITY, syslog_handle_priority },
+static struct ansiesc_handler syslog_ansiesc_handlers[] = {
 	{ 0, NULL }
 };
 
-/** Syslog line console */
-static struct line_console syslog_line = {
-	.buffer = syslog_buffer,
-	.len = sizeof ( syslog_buffer ),
-	.ctx = {
-		.handlers = syslog_handlers,
-	},
+/** Syslog ANSI escape sequence context */
+static struct ansiesc_context syslog_ansiesc_ctx = {
+	.handlers = syslog_ansiesc_handlers,
 };
 
-/** Syslog recursion marker */
-static int syslog_entered;
-
 /**
  * Print a character to syslog console
  *
@@ -149,20 +84,47 @@
 static void syslog_putchar ( int character ) {
 	int rc;
 
+	/* Do nothing if we have no log server */
+	if ( ! logserver.st_family )
+		return;
+
 	/* Ignore if we are already mid-logging */
 	if ( syslog_entered )
 		return;
 
-	/* Fill line buffer */
-	if ( line_putchar ( &syslog_line, character ) == 0 )
+	/* Strip ANSI escape sequences */
+	character = ansiesc_process ( &syslog_ansiesc_ctx, character );
+	if ( character < 0 )
 		return;
 
+	/* Ignore carriage return */
+	if ( character == '\r' )
+		return;
+
+	/* Treat newline as a terminator */
+	if ( character == '\n' )
+		character = 0;
+
+	/* Add character to buffer */
+	syslog_buffer[syslog_idx++] = character;
+
+	/* Do nothing more unless we reach end-of-line (or end-of-buffer) */
+	if ( ( character != 0 ) &&
+	     ( syslog_idx < ( sizeof ( syslog_buffer ) - 1 /* NUL */ ) ) ) {
+		return;
+	}
+
+	/* Reset to start of buffer */
+	syslog_idx = 0;
+
 	/* Guard against re-entry */
 	syslog_entered = 1;
 
 	/* Send log message */
-	if ( ( rc = syslog_send ( &syslogger, syslog_severity,
-				  syslog_buffer, "" ) ) != 0 ) {
+	if ( ( rc = xfer_printf ( &syslogger, "<%d>ipxe: %s",
+				  SYSLOG_PRIORITY ( SYSLOG_FACILITY,
+						    SYSLOG_SEVERITY ),
+				  syslog_buffer ) ) != 0 ) {
 		DBG ( "SYSLOG could not send log message: %s\n",
 		      strerror ( rc ) );
 	}
@@ -174,8 +136,6 @@
 /** Syslog console driver */
 struct console_driver syslog_console __console_driver = {
 	.putchar = syslog_putchar,
-	.disabled = 1,
-	.usage = CONSOLE_SYSLOG,
 };
 
 /******************************************************************************
@@ -205,26 +165,12 @@
 	int len;
 	int rc;
 
-	/* Fetch hostname and domain name */
-	free ( syslog_hostname );
-	if ( ( len = fetch_string_setting_copy ( NULL, &hostname_setting,
-						 &syslog_hostname ) ) < 0 ) {
-		rc = len;
-		DBG ( "SYSLOG could not fetch hostname: %s\n", strerror ( rc ));
-	}
-	free ( syslog_domain );
-	if ( ( len = fetch_string_setting_copy ( NULL, &domain_setting,
-						 &syslog_domain ) ) < 0 ) {
-		rc = len;
-		DBG ( "SYSLOG could not fetch domain: %s\n", strerror ( rc ) );
-	}
-
 	/* Fetch log server */
-	syslog_console.disabled = 1;
 	old_addr.s_addr = sin_logserver->sin_addr.s_addr;
+	logserver.st_family = 0;
 	if ( ( len = fetch_ipv4_setting ( NULL, &syslog_setting,
 					  &sin_logserver->sin_addr ) ) >= 0 ) {
-		syslog_console.disabled = 0;
+		sin_logserver->sin_family = AF_INET;
 	}
 
 	/* Do nothing unless log server has changed */
@@ -235,7 +181,7 @@
 	intf_restart ( &syslogger, 0 );
 
 	/* Do nothing unless we have a log server */
-	if ( syslog_console.disabled ) {
+	if ( ! logserver.st_family ) {
 		DBG ( "SYSLOG has no log server\n" );
 		return 0;
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/tftp.c ipxe-1.0.1~lliurex1505/src/net/udp/tftp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp/tftp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp/tftp.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -288,6 +287,24 @@
 }
 
 /**
+ * TFTP requested blocksize
+ *
+ * This is treated as a global configuration parameter.
+ */
+static unsigned int tftp_request_blksize = TFTP_MAX_BLKSIZE;
+
+/**
+ * Set TFTP request blocksize
+ *
+ * @v blksize		Requested block size
+ */
+void tftp_set_request_blksize ( unsigned int blksize ) {
+	if ( blksize < TFTP_DEFAULT_BLKSIZE )
+		blksize = TFTP_DEFAULT_BLKSIZE;
+	tftp_request_blksize = blksize;
+}
+
+/**
  * MTFTP multicast receive address
  *
  * This is treated as a global configuration parameter.
@@ -327,7 +344,6 @@
 	const char *path;
 	size_t len;
 	struct io_buffer *iobuf;
-	size_t blksize;
 
 	/* Strip initial '/' if present.  If we were opened via the
 	 * URI interface, then there will be an initial '/', since a
@@ -353,11 +369,6 @@
 	if ( ! iobuf )
 		return -ENOMEM;
 
-	/* Determine block size */
-	blksize = xfer_window ( &tftp->xfer );
-	if ( blksize > TFTP_MAX_BLKSIZE )
-		blksize = TFTP_MAX_BLKSIZE;
-
 	/* Build request */
 	rrq = iob_put ( iobuf, sizeof ( *rrq ) );
 	rrq->opcode = htons ( TFTP_RRQ );
@@ -366,8 +377,8 @@
 	if ( tftp->flags & TFTP_FL_RRQ_SIZES ) {
 		iob_put ( iobuf, snprintf ( iobuf->tail,
 					    iob_tailroom ( iobuf ),
-					    "blksize%c%zd%ctsize%c0",
-					    0, blksize, 0, 0 ) + 1 );
+					    "blksize%c%d%ctsize%c0", 0,
+					    tftp_request_blksize, 0, 0 ) + 1 );
 	}
 	if ( tftp->flags & TFTP_FL_RRQ_MULTICAST ) {
 		iob_put ( iobuf, snprintf ( iobuf->tail,
@@ -1203,6 +1214,14 @@
  ******************************************************************************
  */
 
+/** TFTP server setting */
+struct setting next_server_setting __setting ( SETTING_BOOT ) = {
+	.name = "next-server",
+	.description = "TFTP server",
+	.tag = DHCP_EB_SIADDR,
+	.type = &setting_type_ipv4,
+};
+
 /**
  * Apply TFTP configuration settings
  *
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp.c ipxe-1.0.1~lliurex1505/src/net/udp.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/udp.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/udp.c	2012-01-06 23:49:04.000000000 +0000
@@ -48,19 +48,45 @@
 struct tcpip_protocol udp_protocol __tcpip_protocol;
 
 /**
- * Check if local UDP port is available
+ * Bind UDP connection to local port
  *
- * @v port		Local port number
- * @ret port		Local port number, or negative error
+ * @v udp		UDP connection
+ * @ret rc		Return status code
+ *
+ * Opens the UDP connection and binds to the specified local port.  If
+ * no local port is specified, the first available port will be used.
  */
-static int udp_port_available ( int port ) {
-	struct udp_connection *udp;
+static int udp_bind ( struct udp_connection *udp ) {
+	struct udp_connection *existing;
+	static uint16_t try_port = 1023;
+
+	/* If no port specified, find the first available port */
+	if ( ! udp->local.st_port ) {
+		while ( try_port ) {
+			try_port++;
+			if ( try_port < 1024 )
+				continue;
+			udp->local.st_port = htons ( try_port );
+			if ( udp_bind ( udp ) == 0 )
+				return 0;
+		}
+		return -EADDRINUSE;
+	}
 
-	list_for_each_entry ( udp, &udp_conns, list ) {
-		if ( udp->local.st_port == htons ( port ) )
+	/* Attempt bind to local port */
+	list_for_each_entry ( existing, &udp_conns, list ) {
+		if ( existing->local.st_port == udp->local.st_port ) {
+			DBGC ( udp, "UDP %p could not bind: port %d in use\n",
+			       udp, ntohs ( udp->local.st_port ) );
 			return -EADDRINUSE;
+		}
 	}
-	return port;
+
+	/* Add to UDP connection list */
+	DBGC ( udp, "UDP %p bound to port %d\n",
+	       udp, ntohs ( udp->local.st_port ) );
+
+	return 0;
 }
 
 /**
@@ -78,7 +104,6 @@
 	struct sockaddr_tcpip *st_peer = ( struct sockaddr_tcpip * ) peer;
 	struct sockaddr_tcpip *st_local = ( struct sockaddr_tcpip * ) local;
 	struct udp_connection *udp;
-	int port;
 	int rc;
 
 	/* Allocate and initialise structure */
@@ -95,16 +120,8 @@
 
 	/* Bind to local port */
 	if ( ! promisc ) {
-		port = tcpip_bind ( st_local, udp_port_available );
-		if ( port < 0 ) {
-			rc = port;
-			DBGC ( udp, "UDP %p could not bind: %s\n",
-			       udp, strerror ( rc ) );
+		if ( ( rc = udp_bind ( udp ) ) != 0 )
 			goto err;
-		}
-		udp->local.st_port = htons ( port );
-		DBGC ( udp, "UDP %p bound to port %d\n",
-		       udp, ntohs ( udp->local.st_port ) );
 	}
 
 	/* Attach parent interface, transfer reference to connection
@@ -203,9 +220,9 @@
 	udphdr->chksum = tcpip_chksum ( udphdr, len );
 
 	/* Dump debugging information */
-	DBGC2 ( udp, "UDP %p TX %d->%d len %d\n", udp,
-		ntohs ( udphdr->src ), ntohs ( udphdr->dest ),
-		ntohs ( udphdr->len ) );
+	DBGC ( udp, "UDP %p TX %d->%d len %d\n", udp,
+	       ntohs ( udphdr->src ), ntohs ( udphdr->dest ),
+	       ntohs ( udphdr->len ) );
 
 	/* Send it to the next layer for processing */
 	if ( ( rc = tcpip_tx ( iobuf, &udp_protocol, src, dest, netdev,
@@ -247,15 +264,12 @@
  * Process a received packet
  *
  * @v iobuf		I/O buffer
- * @v netdev		Network device
  * @v st_src		Partially-filled source address
  * @v st_dest		Partially-filled destination address
  * @v pshdr_csum	Pseudo-header checksum
  * @ret rc		Return status code
  */
-static int udp_rx ( struct io_buffer *iobuf,
-		    struct net_device *netdev __unused,
-		    struct sockaddr_tcpip *st_src,
+static int udp_rx ( struct io_buffer *iobuf, struct sockaddr_tcpip *st_src,
 		    struct sockaddr_tcpip *st_dest, uint16_t pshdr_csum ) {
 	struct udp_header *udphdr = iobuf->data;
 	struct udp_connection *udp;
@@ -303,8 +317,8 @@
 	iob_pull ( iobuf, sizeof ( *udphdr ) );
 
 	/* Dump debugging information */
-	DBGC2 ( udp, "UDP %p RX %d<-%d len %zd\n", udp,
-		ntohs ( udphdr->dest ), ntohs ( udphdr->src ), ulen );
+	DBGC ( udp, "UDP %p RX %d<-%d len %zd\n", udp,
+	       ntohs ( udphdr->dest ), ntohs ( udphdr->src ), ulen );
 
 	/* Ignore if no matching connection found */
 	if ( ! udp ) {
@@ -372,9 +386,10 @@
 			      struct xfer_metadata *meta ) {
 
 	/* Transmit data, if possible */
-	return udp_tx ( udp, iobuf, ( ( struct sockaddr_tcpip * ) meta->src ),
-			( ( struct sockaddr_tcpip * ) meta->dest ),
-			meta->netdev );
+	udp_tx ( udp, iobuf, ( ( struct sockaddr_tcpip * ) meta->src ),
+		 ( ( struct sockaddr_tcpip * ) meta->dest ), meta->netdev );
+
+	return 0;
 }
 
 /** UDP data transfer interface operations */
@@ -395,20 +410,13 @@
  ***************************************************************************
  */
 
-/** UDP IPv4 socket opener */
-struct socket_opener udp_ipv4_socket_opener __socket_opener = {
+/** UDP socket opener */
+struct socket_opener udp_socket_opener __socket_opener = {
 	.semantics	= UDP_SOCK_DGRAM,
 	.family		= AF_INET,
 	.open		= udp_open,
 };
 
-/** UDP IPv6 socket opener */
-struct socket_opener udp_ipv6_socket_opener __socket_opener = {
-	.semantics	= UDP_SOCK_DGRAM,
-	.family		= AF_INET6,
-	.open		= udp_open,
-};
-
 /** Linkage hack */
 int udp_sock_dgram = UDP_SOCK_DGRAM;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/validator.c ipxe-1.0.1~lliurex1505/src/net/validator.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/validator.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/validator.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,576 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <string.h>
-#include <stdio.h>
-#include <errno.h>
-#include <ipxe/refcnt.h>
-#include <ipxe/malloc.h>
-#include <ipxe/interface.h>
-#include <ipxe/xfer.h>
-#include <ipxe/open.h>
-#include <ipxe/iobuf.h>
-#include <ipxe/xferbuf.h>
-#include <ipxe/process.h>
-#include <ipxe/x509.h>
-#include <ipxe/settings.h>
-#include <ipxe/dhcp.h>
-#include <ipxe/base64.h>
-#include <ipxe/crc32.h>
-#include <ipxe/ocsp.h>
-#include <ipxe/validator.h>
-
-/** @file
- *
- * Certificate validator
- *
- */
-
-/** A certificate validator */
-struct validator {
-	/** Reference count */
-	struct refcnt refcnt;
-	/** Job control interface */
-	struct interface job;
-	/** Data transfer interface */
-	struct interface xfer;
-
-	/** Process */
-	struct process process;
-
-	/** X.509 certificate chain */
-	struct x509_chain *chain;
-	/** OCSP check */
-	struct ocsp_check *ocsp;
-	/** Data buffer */
-	struct xfer_buffer buffer;
-	/** Action to take upon completed transfer */
-	int ( * done ) ( struct validator *validator, const void *data,
-			 size_t len );
-};
-
-/**
- * Free certificate validator
- *
- * @v refcnt		Reference count
- */
-static void validator_free ( struct refcnt *refcnt ) {
-	struct validator *validator =
-		container_of ( refcnt, struct validator, refcnt );
-
-	DBGC2 ( validator, "VALIDATOR %p freed\n", validator );
-	x509_chain_put ( validator->chain );
-	ocsp_put ( validator->ocsp );
-	xferbuf_done ( &validator->buffer );
-	free ( validator );
-}
-
-/**
- * Mark certificate validation as finished
- *
- * @v validator		Certificate validator
- * @v rc		Reason for finishing
- */
-static void validator_finished ( struct validator *validator, int rc ) {
-
-	/* Remove process */
-	process_del ( &validator->process );
-
-	/* Close all interfaces */
-	intf_shutdown ( &validator->xfer, rc );
-	intf_shutdown ( &validator->job, rc );
-}
-
-/****************************************************************************
- *
- * Job control interface
- *
- */
-
-/** Certificate validator job control interface operations */
-static struct interface_operation validator_job_operations[] = {
-	INTF_OP ( intf_close, struct validator *, validator_finished ),
-};
-
-/** Certificate validator job control interface descriptor */
-static struct interface_descriptor validator_job_desc =
-	INTF_DESC ( struct validator, job, validator_job_operations );
-
-/****************************************************************************
- *
- * Cross-signing certificates
- *
- */
-
-/** Cross-signed certificate source setting */
-struct setting crosscert_setting __setting ( SETTING_CRYPTO ) = {
-	.name = "crosscert",
-	.description = "Cross-signed certificate source",
-	.tag = DHCP_EB_CROSS_CERT,
-	.type = &setting_type_string,
-};
-
-/** Default cross-signed certificate source */
-static const char crosscert_default[] = "http://ca.ipxe.org/auto";
-
-/**
- * Append cross-signing certificates to certificate chain
- *
- * @v validator		Certificate validator
- * @v data		Raw cross-signing certificate data
- * @v len		Length of raw data
- * @ret rc		Return status code
- */
-static int validator_append ( struct validator *validator,
-			      const void *data, size_t len ) {
-	struct asn1_cursor cursor;
-	struct x509_chain *certs;
-	struct x509_certificate *cert;
-	struct x509_certificate *last;
-	int rc;
-
-	/* Allocate certificate list */
-	certs = x509_alloc_chain();
-	if ( ! certs ) {
-		rc = -ENOMEM;
-		goto err_alloc_certs;
-	}
-
-	/* Initialise cursor */
-	cursor.data = data;
-	cursor.len = len;
-
-	/* Enter certificateSet */
-	if ( ( rc = asn1_enter ( &cursor, ASN1_SET ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not enter "
-		       "certificateSet: %s\n", validator, strerror ( rc ) );
-		goto err_certificateset;
-	}
-
-	/* Add each certificate to list */
-	while ( cursor.len ) {
-
-		/* Add certificate to chain */
-		if ( ( rc = x509_append_raw ( certs, cursor.data,
-					      cursor.len ) ) != 0 ) {
-			DBGC ( validator, "VALIDATOR %p could not append "
-			       "certificate: %s\n",
-			       validator, strerror ( rc) );
-			DBGC_HDA ( validator, 0, cursor.data, cursor.len );
-			return rc;
-		}
-		cert = x509_last ( certs );
-		DBGC ( validator, "VALIDATOR %p found certificate %s\n",
-		       validator, cert->subject.name );
-
-		/* Move to next certificate */
-		asn1_skip_any ( &cursor );
-	}
-
-	/* Append certificates to chain */
-	last = x509_last ( validator->chain );
-	if ( ( rc = x509_auto_append ( validator->chain, certs ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not append "
-		       "certificates: %s\n", validator, strerror ( rc ) );
-		goto err_auto_append;
-	}
-
-	/* Check that at least one certificate has been added */
-	if ( last == x509_last ( validator->chain ) ) {
-		DBGC ( validator, "VALIDATOR %p failed to append any "
-		       "applicable certificates\n", validator );
-		rc = -EACCES;
-		goto err_no_progress;
-	}
-
-	/* Drop reference to certificate list */
-	x509_chain_put ( certs );
-
-	return 0;
-
- err_no_progress:
- err_auto_append:
- err_certificateset:
-	x509_chain_put ( certs );
- err_alloc_certs:
-	return rc;
-}
-
-/**
- * Start download of cross-signing certificate
- *
- * @v validator		Certificate validator
- * @v issuer		Required issuer
- * @ret rc		Return status code
- */
-static int validator_start_download ( struct validator *validator,
-				      const struct asn1_cursor *issuer ) {
-	const char *crosscert;
-	char *crosscert_copy;
-	char *uri_string;
-	size_t uri_string_len;
-	uint32_t crc;
-	int len;
-	int rc;
-
-	/* Determine cross-signed certificate source */
-	len = fetch_string_setting_copy ( NULL, &crosscert_setting,
-					  &crosscert_copy );
-	if ( len < 0 ) {
-		rc = len;
-		DBGC ( validator, "VALIDATOR %p could not fetch crosscert "
-		       "setting: %s\n", validator, strerror ( rc ) );
-		goto err_fetch_crosscert;
-	}
-	crosscert = ( crosscert_copy ? crosscert_copy : crosscert_default );
-
-	/* Allocate URI string */
-	uri_string_len = ( strlen ( crosscert ) + 22 /* "/%08x.der?subject=" */
-			   + base64_encoded_len ( issuer->len ) + 1 /* NUL */ );
-	uri_string = zalloc ( uri_string_len );
-	if ( ! uri_string ) {
-		rc = -ENOMEM;
-		goto err_alloc_uri_string;
-	}
-
-	/* Generate CRC32 */
-	crc = crc32_le ( 0xffffffffUL, issuer->data, issuer->len );
-
-	/* Generate URI string */
-	len = snprintf ( uri_string, uri_string_len, "%s/%08x.der?subject=",
-			 crosscert, crc );
-	base64_encode ( issuer->data, issuer->len, ( uri_string + len ) );
-	DBGC ( validator, "VALIDATOR %p downloading cross-signed certificate "
-	       "from %s\n", validator, uri_string );
-
-	/* Set completion handler */
-	validator->done = validator_append;
-
-	/* Open URI */
-	if ( ( rc = xfer_open_uri_string ( &validator->xfer,
-					   uri_string ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not open %s: %s\n",
-		       validator, uri_string, strerror ( rc ) );
-		goto err_open_uri_string;
-	}
-
-	/* Success */
-	rc = 0;
-
- err_open_uri_string:
-	free ( uri_string );
- err_alloc_uri_string:
-	free ( crosscert_copy );
- err_fetch_crosscert:
-	return rc;
-}
-
-/****************************************************************************
- *
- * OCSP checks
- *
- */
-
-/**
- * Validate OCSP response
- *
- * @v validator		Certificate validator
- * @v data		Raw OCSP response
- * @v len		Length of raw data
- * @ret rc		Return status code
- */
-static int validator_ocsp_validate ( struct validator *validator,
-				     const void *data, size_t len ) {
-	time_t now;
-	int rc;
-
-	/* Record OCSP response */
-	if ( ( rc = ocsp_response ( validator->ocsp, data, len ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not record OCSP "
-		       "response: %s\n", validator, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Validate OCSP response */
-	now = time ( NULL );
-	if ( ( rc = ocsp_validate ( validator->ocsp, now ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not validate OCSP "
-		       "response: %s\n", validator, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Drop reference to OCSP check */
-	ocsp_put ( validator->ocsp );
-	validator->ocsp = NULL;
-
-	return 0;
-}
-
-/**
- * Start OCSP check
- *
- * @v validator		Certificate validator
- * @v cert		Certificate to check
- * @v issuer		Issuing certificate
- * @ret rc		Return status code
- */
-static int validator_start_ocsp ( struct validator *validator,
-				  struct x509_certificate *cert,
-				  struct x509_certificate *issuer ) {
-	const char *uri_string;
-	int rc;
-
-	/* Create OCSP check */
-	assert ( validator->ocsp == NULL );
-	if ( ( rc = ocsp_check ( cert, issuer, &validator->ocsp ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not create OCSP check: "
-		       "%s\n", validator, strerror ( rc ) );
-		return rc;
-	}
-
-	/* Set completion handler */
-	validator->done = validator_ocsp_validate;
-
-	/* Open URI */
-	uri_string = validator->ocsp->uri_string;
-	DBGC ( validator, "VALIDATOR %p performing OCSP check at %s\n",
-	       validator, uri_string );
-	if ( ( rc = xfer_open_uri_string ( &validator->xfer,
-					   uri_string ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not open %s: %s\n",
-		       validator, uri_string, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
-
-/****************************************************************************
- *
- * Data transfer interface
- *
- */
-
-/**
- * Close data transfer interface
- *
- * @v validator		Certificate validator
- * @v rc		Reason for close
- */
-static void validator_xfer_close ( struct validator *validator, int rc ) {
-
-	/* Close data transfer interface */
-	intf_restart ( &validator->xfer, rc );
-
-	/* Check for errors */
-	if ( rc != 0 ) {
-		DBGC ( validator, "VALIDATOR %p transfer failed: %s\n",
-		       validator, strerror ( rc ) );
-		goto err_transfer;
-	}
-	DBGC2 ( validator, "VALIDATOR %p transfer complete\n", validator );
-
-	/* Process completed download */
-	assert ( validator->done != NULL );
-	if ( ( rc = validator->done ( validator, validator->buffer.data,
-				       validator->buffer.len ) ) != 0 )
-		goto err_append;
-
-	/* Free downloaded data */
-	xferbuf_done ( &validator->buffer );
-
-	/* Resume validation process */
-	process_add ( &validator->process );
-
-	return;
-
- err_append:
- err_transfer:
-	validator_finished ( validator, rc );
-}
-
-/**
- * Receive data
- *
- * @v validator		Certificate validator
- * @v iobuf		I/O buffer
- * @v meta		Data transfer metadata
- * @ret rc		Return status code
- */
-static int validator_xfer_deliver ( struct validator *validator,
-				    struct io_buffer *iobuf,
-				    struct xfer_metadata *meta ) {
-	int rc;
-
-	/* Add data to buffer */
-	if ( ( rc = xferbuf_deliver ( &validator->buffer, iob_disown ( iobuf ),
-				      meta ) ) != 0 ) {
-		DBGC ( validator, "VALIDATOR %p could not receive data: %s\n",
-		       validator, strerror ( rc ) );
-		validator_finished ( validator, rc );
-		return rc;
-	}
-
-	return 0;
-}
-
-/** Certificate validator data transfer interface operations */
-static struct interface_operation validator_xfer_operations[] = {
-	INTF_OP ( xfer_deliver, struct validator *, validator_xfer_deliver ),
-	INTF_OP ( intf_close, struct validator *, validator_xfer_close ),
-};
-
-/** Certificate validator data transfer interface descriptor */
-static struct interface_descriptor validator_xfer_desc =
-	INTF_DESC ( struct validator, xfer, validator_xfer_operations );
-
-/****************************************************************************
- *
- * Validation process
- *
- */
-
-/**
- * Certificate validation process
- *
- * @v validator		Certificate validator
- */
-static void validator_step ( struct validator *validator ) {
-	struct x509_link *link;
-	struct x509_certificate *cert;
-	struct x509_certificate *issuer = NULL;
-	struct x509_certificate *last;
-	time_t now;
-	int rc;
-
-	/* Try validating chain.  Try even if the chain is incomplete,
-	 * since certificates may already have been validated
-	 * previously.
-	 */
-	now = time ( NULL );
-	if ( ( rc = x509_validate_chain ( validator->chain, now,
-					  NULL ) ) == 0 ) {
-		validator_finished ( validator, 0 );
-		return;
-	}
-
-	/* If there is a certificate that could be validated using
-	 * OCSP, try it.
-	 */
-	list_for_each_entry ( link, &validator->chain->links, list ) {
-		cert = issuer;
-		issuer = link->cert;
-		if ( ! cert )
-			continue;
-		if ( ! issuer->valid )
-			continue;
-		/* The issuer is valid, but this certificate is not
-		 * yet valid.  If OCSP is applicable, start it.
-		 */
-		if ( cert->extensions.auth_info.ocsp.uri &&
-		     ( ! cert->extensions.auth_info.ocsp.good ) ) {
-			/* Start OCSP */
-			if ( ( rc = validator_start_ocsp ( validator, cert,
-							   issuer ) ) != 0 ) {
-				validator_finished ( validator, rc );
-				return;
-			}
-			return;
-		}
-		/* Otherwise, this is a permanent failure */
-		validator_finished ( validator, rc );
-		return;
-	}
-
-	/* If chain ends with a self-issued certificate, then there is
-	 * nothing more to do.
-	 */
-	last = x509_last ( validator->chain );
-	if ( asn1_compare ( &last->issuer.raw, &last->subject.raw ) == 0 ) {
-		validator_finished ( validator, rc );
-		return;
-	}
-
-	/* Otherwise, try to download a suitable cross-signing
-	 * certificate.
-	 */
-	if ( ( rc = validator_start_download ( validator,
-					       &last->issuer.raw ) ) != 0 ) {
-		validator_finished ( validator, rc );
-		return;
-	}
-}
-
-/** Certificate validator process descriptor */
-static struct process_descriptor validator_process_desc =
-	PROC_DESC_ONCE ( struct validator, process, validator_step );
-
-/****************************************************************************
- *
- * Instantiator
- *
- */
-
-/**
- * Instantiate a certificate validator
- *
- * @v job		Job control interface
- * @v chain		X.509 certificate chain
- * @ret rc		Return status code
- */
-int create_validator ( struct interface *job, struct x509_chain *chain ) {
-	struct validator *validator;
-	int rc;
-
-	/* Sanity check */
-	if ( ! chain ) {
-		rc = -EINVAL;
-		goto err_sanity;
-	}
-
-	/* Allocate and initialise structure */
-	validator = zalloc ( sizeof ( *validator ) );
-	if ( ! validator ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	ref_init ( &validator->refcnt, validator_free );
-	intf_init ( &validator->job, &validator_job_desc,
-		    &validator->refcnt );
-	intf_init ( &validator->xfer, &validator_xfer_desc,
-		    &validator->refcnt );
-	process_init ( &validator->process, &validator_process_desc,
-		       &validator->refcnt );
-	validator->chain = x509_chain_get ( chain );
-
-	/* Attach parent interface, mortalise self, and return */
-	intf_plug_plug ( &validator->job, job );
-	ref_put ( &validator->refcnt );
-	DBGC2 ( validator, "VALIDATOR %p validating X509 chain %p\n",
-		validator, validator->chain );
-	return 0;
-
-	validator_finished ( validator, rc );
-	ref_put ( &validator->refcnt );
- err_alloc:
- err_sanity:
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/net/vlan.c ipxe-1.0.1~lliurex1505/src/net/vlan.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/net/vlan.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/net/vlan.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -283,23 +282,6 @@
 };
 
 /**
- * Get the VLAN tag
- *
- * @v netdev		Network device
- * @ret tag		VLAN tag, or 0 if device is not a VLAN device
- */
-unsigned int vlan_tag ( struct net_device *netdev ) {
-	struct vlan_device *vlan;
-
-	if ( netdev->op == &vlan_operations ) {
-		vlan = netdev->priv;
-		return vlan->tag;
-	} else {
-		return 0;
-	}
-}
-
-/**
  * Check if network device can be used as a VLAN trunk device
  *
  * @v trunk		Trunk network device
@@ -440,6 +422,16 @@
 }
 
 /**
+ * Do nothing
+ *
+ * @v trunk		Trunk network device
+ * @ret rc		Return status code
+ */
+static int vlan_probe ( struct net_device *trunk __unused ) {
+	return 0;
+}
+
+/**
  * Handle trunk network device link state change
  *
  * @v trunk		Trunk network device
@@ -495,6 +487,7 @@
 /** VLAN driver */
 struct net_driver vlan_driver __net_driver = {
 	.name = "VLAN",
+	.probe = vlan_probe,
 	.notify = vlan_notify,
 	.remove = vlan_remove,
 };
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/aes_cbc_test.c ipxe-1.0.1~lliurex1505/src/tests/aes_cbc_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/aes_cbc_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/aes_cbc_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,193 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * AES-in-CBC-mode tests
- *
- * These test vectors are provided by NIST as part of the
- * Cryptographic Toolkit Examples, downloadable from:
- *
- *    http://csrc.nist.gov/groups/ST/toolkit/documents/Examples/AES_CBC.pdf
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <assert.h>
-#include <string.h>
-#include <ipxe/aes.h>
-#include <ipxe/test.h>
-#include "cbc_test.h"
-
-/** Define inline key */
-#define KEY(...) { __VA_ARGS__ }
-
-/** Define inline initialisation vector */
-#define IV(...) { __VA_ARGS__ }
-
-/** Define inline plaintext data */
-#define PLAINTEXT(...) { __VA_ARGS__ }
-
-/** Define inline ciphertext data */
-#define CIPHERTEXT(...) { __VA_ARGS__ }
-
-/** An AES-in-CBC-mode test */
-struct aes_cbc_test {
-	/** Key */
-	const void *key;
-	/** Length of key */
-	size_t key_len;
-	/** Initialisation vector */
-	const void *iv;
-	/** Length of initialisation vector */
-	size_t iv_len;
-	/** Plaintext */
-	const void *plaintext;
-	/** Length of plaintext */
-	size_t plaintext_len;
-	/** Ciphertext */
-	const void *ciphertext;
-	/** Length of ciphertext */
-	size_t ciphertext_len;
-};
-
-/**
- * Define an AES-in-CBC-mode test
- *
- * @v name		Test name
- * @v key_array		Key
- * @v iv_array		Initialisation vector
- * @v plaintext_array	Plaintext
- * @v ciphertext_array	Ciphertext
- * @ret test		AES-in-CBC-mode test
- */
-#define AES_CBC_TEST( name, key_array, iv_array, plaintext_array,	\
-		      ciphertext_array )				\
-	static const uint8_t name ## _key [] = key_array;		\
-	static const uint8_t name ## _iv [] = iv_array;			\
-	static const uint8_t name ## _plaintext [] = plaintext_array;	\
-	static const uint8_t name ## _ciphertext [] = ciphertext_array;	\
-	static struct aes_cbc_test name = {				\
-		.key = name ## _key,					\
-		.key_len = sizeof ( name ## _key ),			\
-		.iv = name ## _iv,					\
-		.iv_len = sizeof ( name ## _iv ),			\
-		.plaintext = name ## _plaintext,			\
-		.plaintext_len = sizeof ( name ## _plaintext ),		\
-		.ciphertext = name ## _ciphertext,			\
-		.ciphertext_len = sizeof ( name ## _ciphertext ),	\
-	}
-
-/**
- * Report AES-in-CBC-mode
- *
- * @v state		HMAC_DRBG internal state
- * @v test		Instantiation test
- */
-#define aes_cbc_ok( test ) do {						\
-	struct cipher_algorithm *cipher = &aes_cbc_algorithm;		\
-									\
-	assert ( (test)->iv_len == cipher->blocksize );			\
-	assert ( (test)->plaintext_len == (test)->ciphertext_len );	\
-	cbc_encrypt_ok ( cipher, (test)->key, (test)->key_len,		\
-			 (test)->iv, (test)->plaintext,			\
-			 (test)->ciphertext, (test)->plaintext_len );	\
-	cbc_decrypt_ok ( cipher, (test)->key, (test)->key_len,		\
-			 (test)->iv, (test)->ciphertext,		\
-			 (test)->plaintext, (test)->ciphertext_len );	\
-	} while ( 0 )
-
-/** CBC_AES128 */
-AES_CBC_TEST ( test_128,
-	KEY ( 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15,
-	      0x88, 0x09, 0xcf, 0x4f, 0x3c ),
-	IV ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
-	     0x0b, 0x0c, 0x0d, 0x0e, 0x0f ),
-	PLAINTEXT ( 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
-		    0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
-		    0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
-		    0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
-		    0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
-		    0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
-		    0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
-		    0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10 ),
-	CIPHERTEXT ( 0x76, 0x49, 0xab, 0xac, 0x81, 0x19, 0xb2, 0x46,
-		     0xce, 0xe9, 0x8e, 0x9b, 0x12, 0xe9, 0x19, 0x7d,
-		     0x50, 0x86, 0xcb, 0x9b, 0x50, 0x72, 0x19, 0xee,
-		     0x95, 0xdb, 0x11, 0x3a, 0x91, 0x76, 0x78, 0xb2,
-		     0x73, 0xbe, 0xd6, 0xb8, 0xe3, 0xc1, 0x74, 0x3b,
-		     0x71, 0x16, 0xe6, 0x9e, 0x22, 0x22, 0x95, 0x16,
-		     0x3f, 0xf1, 0xca, 0xa1, 0x68, 0x1f, 0xac, 0x09,
-		     0x12, 0x0e, 0xca, 0x30, 0x75, 0x86, 0xe1, 0xa7 ) );
-
-/** CBC_AES256 */
-AES_CBC_TEST ( test_256,
-	KEY ( 0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe, 0x2b, 0x73, 0xae,
-	      0xf0, 0x85, 0x7d, 0x77, 0x81, 0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61,
-	      0x08, 0xd7, 0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4 ),
-	IV ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
-	     0x0b, 0x0c, 0x0d, 0x0e, 0x0f ),
-	PLAINTEXT ( 0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
-		    0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
-		    0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
-		    0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
-		    0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
-		    0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
-		    0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
-		    0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10 ),
-	CIPHERTEXT ( 0xf5, 0x8c, 0x4c, 0x04, 0xd6, 0xe5, 0xf1, 0xba,
-		     0x77, 0x9e, 0xab, 0xfb, 0x5f, 0x7b, 0xfb, 0xd6,
-		     0x9c, 0xfc, 0x4e, 0x96, 0x7e, 0xdb, 0x80, 0x8d,
-		     0x67, 0x9f, 0x77, 0x7b, 0xc6, 0x70, 0x2c, 0x7d,
-		     0x39, 0xf2, 0x33, 0x69, 0xa9, 0xd9, 0xba, 0xcf,
-		     0xa5, 0x30, 0xe2, 0x63, 0x04, 0x23, 0x14, 0x61,
-		     0xb2, 0xeb, 0x05, 0xe2, 0xc3, 0x9b, 0xe9, 0xfc,
-		     0xda, 0x6c, 0x19, 0x07, 0x8c, 0x6a, 0x9d, 0x1b ) );
-
-/**
- * Perform AES-in-CBC-mode self-test
- *
- */
-static void aes_cbc_test_exec ( void ) {
-	struct cipher_algorithm *cipher = &aes_cbc_algorithm;
-
-	/* Correctness tests */
-	aes_cbc_ok ( &test_128 );
-	aes_cbc_ok ( &test_256 );
-
-	/* Speed tests */
-	DBG ( "AES128 encryption required %ld cycles per byte\n",
-	      cbc_cost_encrypt ( cipher, test_128.key_len ) );
-	DBG ( "AES128 decryption required %ld cycles per byte\n",
-	      cbc_cost_decrypt ( cipher, test_128.key_len ) );
-	DBG ( "AES256 encryption required %ld cycles per byte\n",
-	      cbc_cost_encrypt ( cipher, test_256.key_len ) );
-	DBG ( "AES256 decryption required %ld cycles per byte\n",
-	      cbc_cost_decrypt ( cipher, test_256.key_len ) );
-}
-
-/** AES-in-CBC-mode self-test */
-struct self_test aes_cbc_test __self_test = {
-	.name = "aes_cbc",
-	.exec = aes_cbc_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/base16_test.c ipxe-1.0.1~lliurex1505/src/tests/base16_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/base16_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/base16_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,121 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Base16 tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/base16.h>
-#include <ipxe/test.h>
-
-/** A Base16 test */
-struct base16_test {
-	/** Raw data */
-	const void *data;
-	/** Length of raw data */
-	size_t len;
-	/** Base16-encoded data */
-	const char *encoded;
-};
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define a base16 test */
-#define BASE16( name, DATA, ENCODED )					\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct base16_test name = {				\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-		.encoded = ENCODED,					\
-	}
-
-/** Empty data test */
-BASE16 ( empty_test, DATA(), "" );
-
-/** "Hello world" test */
-BASE16 ( hw_test,
-	 DATA ( 'H', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l', 'd' ),
-	 "48656c6c6f20776f726c64" );
-
-/** Random data test */
-BASE16 ( random_test,
-	 DATA ( 0x8b, 0x1a, 0xa2, 0x6c, 0xa9, 0x38, 0x43, 0xb8, 0x81, 0xf8,
-		0x30, 0x44, 0xb2, 0x32, 0x6e, 0x82, 0xfe, 0x0f, 0x84, 0x91 ),
-	 "8b1aa26ca93843b881f83044b2326e82fe0f8491" );
-
-/**
- * Report a base16 encoding test result
- *
- * @v test		Base16 test
- */
-#define base16_encode_ok( test ) do {					\
-	size_t len = base16_encoded_len ( (test)->len );		\
-	char buf[ len + 1 /* NUL */ ];					\
-	ok ( len == strlen ( (test)->encoded ) );			\
-	base16_encode ( (test)->data, (test)->len, buf );		\
-	ok ( strcmp ( (test)->encoded, buf ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report a base16 decoding test result
- *
- * @v test		Base16 test
- */
-#define base16_decode_ok( test ) do {					\
-	size_t max_len = base16_decoded_max_len ( (test)->encoded );	\
-	uint8_t buf[max_len];						\
-	int len;							\
-	len = base16_decode ( (test)->encoded, buf );			\
-	ok ( len >= 0 );						\
-	ok ( ( size_t ) len <= max_len );				\
-	ok ( ( size_t ) len == (test)->len );				\
-	ok ( memcmp ( (test)->data, buf, len ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Perform Base16 self-tests
- *
- */
-static void base16_test_exec ( void ) {
-
-	base16_encode_ok ( &empty_test );
-	base16_decode_ok ( &empty_test );
-
-	base16_encode_ok ( &hw_test );
-	base16_decode_ok ( &hw_test );
-
-	base16_encode_ok ( &random_test );
-	base16_decode_ok ( &random_test );
-}
-
-/** Base16 self-test */
-struct self_test base16_test __self_test = {
-	.name = "base16",
-	.exec = base16_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/base64_test.c ipxe-1.0.1~lliurex1505/src/tests/base64_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/base64_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/base64_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,124 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Base64 tests
- *
- * Test vectors generated using "base64 -w 0"
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/base64.h>
-#include <ipxe/test.h>
-
-/** A Base64 test */
-struct base64_test {
-	/** Raw data */
-	const void *data;
-	/** Length of raw data */
-	size_t len;
-	/** Base64-encoded data */
-	const char *encoded;
-};
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define a base64 test */
-#define BASE64( name, DATA, ENCODED )					\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct base64_test name = {				\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-		.encoded = ENCODED,					\
-	}
-
-/** Empty data test */
-BASE64 ( empty_test, DATA(), "" );
-
-/** "Hello world" test */
-BASE64 ( hw_test,
-	 DATA ( 'H', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l', 'd' ),
-	 "SGVsbG8gd29ybGQ=" );
-
-/** Random data test */
-BASE64 ( random_test,
-	 DATA ( 0x36, 0x03, 0x84, 0xdc, 0x4e, 0x03, 0x46, 0xa0, 0xb5, 0x2d,
-		0x03, 0x6e, 0xd0, 0x56, 0xed, 0xa0, 0x37, 0x02, 0xac, 0xc6,
-		0x65, 0xd1 ),
-	 "NgOE3E4DRqC1LQNu0FbtoDcCrMZl0Q==" );
-
-/**
- * Report a base64 encoding test result
- *
- * @v test		Base64 test
- */
-#define base64_encode_ok( test ) do {					\
-	size_t len = base64_encoded_len ( (test)->len );		\
-	char buf[ len + 1 /* NUL */ ];					\
-	ok ( len == strlen ( (test)->encoded ) );			\
-	base64_encode ( (test)->data, (test)->len, buf );		\
-	ok ( strcmp ( (test)->encoded, buf ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report a base64 decoding test result
- *
- * @v test		Base64 test
- */
-#define base64_decode_ok( test ) do {					\
-	size_t max_len = base64_decoded_max_len ( (test)->encoded );	\
-	uint8_t buf[max_len];						\
-	int len;							\
-	len = base64_decode ( (test)->encoded, buf );			\
-	ok ( len >= 0 );						\
-	ok ( ( size_t ) len <= max_len );				\
-	ok ( ( size_t ) len == (test)->len );				\
-	ok ( memcmp ( (test)->data, buf, len ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Perform Base64 self-tests
- *
- */
-static void base64_test_exec ( void ) {
-
-	base64_encode_ok ( &empty_test );
-	base64_decode_ok ( &empty_test );
-
-	base64_encode_ok ( &hw_test );
-	base64_decode_ok ( &hw_test );
-
-	base64_encode_ok ( &random_test );
-	base64_decode_ok ( &random_test );
-}
-
-/** Base64 self-test */
-struct self_test base64_test __self_test = {
-	.name = "base64",
-	.exec = base64_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/bigint_test.c ipxe-1.0.1~lliurex1505/src/tests/bigint_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/bigint_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/bigint_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,2437 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Big integer self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <assert.h>
-#include <string.h>
-#include <ipxe/bigint.h>
-#include <ipxe/test.h>
-
-/** Define inline big integer */
-#define BIGINT(...) { __VA_ARGS__ }
-
-/* Provide global functions to allow inspection of generated assembly code */
-
-void bigint_init_sample ( bigint_element_t *value0, unsigned int size,
-			  const void *data, size_t len ) {
-	bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( void * ) value0 );
-
-	bigint_init ( value, data, len );
-}
-
-void bigint_done_sample ( const bigint_element_t *value0, unsigned int size,
-			  void *out, size_t len ) {
-	const bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( const void * ) value0 );
-
-	bigint_done ( value, out, len );
-}
-
-void bigint_add_sample ( const bigint_element_t *addend0,
-			 bigint_element_t *value0, unsigned int size ) {
-	const bigint_t ( size ) *addend __attribute__ (( may_alias ))
-		= ( ( const void * ) addend0 );
-	bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( void * ) value0 );
-
-	bigint_add ( addend, value );
-}
-
-void bigint_subtract_sample ( const bigint_element_t *subtrahend0,
-			      bigint_element_t *value0, unsigned int size ) {
-	const bigint_t ( size ) *subtrahend __attribute__ (( may_alias ))
-		= ( ( const void * ) subtrahend0 );
-	bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( void * ) value0 );
-
-	bigint_subtract ( subtrahend, value );
-}
-
-void bigint_rol_sample ( bigint_element_t *value0, unsigned int size ) {
-	bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( void * ) value0 );
-
-	bigint_rol ( value );
-}
-
-void bigint_ror_sample ( bigint_element_t *value0, unsigned int size ) {
-	bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( void * ) value0 );
-
-	bigint_ror ( value );
-}
-
-int bigint_is_zero_sample ( const bigint_element_t *value0,
-			    unsigned int size ) {
-	const bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( const void * ) value0 );
-
-	return bigint_is_zero ( value );
-}
-
-int bigint_is_geq_sample ( const bigint_element_t *value0,
-			   const bigint_element_t *reference0,
-			   unsigned int size ) {
-	const bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( const void * ) value0 );
-	const bigint_t ( size ) *reference __attribute__ (( may_alias ))
-		= ( ( const void * ) reference0 );
-
-	return bigint_is_geq ( value, reference );
-}
-
-int bigint_bit_is_set_sample ( const bigint_element_t *value0,
-			       unsigned int size, unsigned int bit ) {
-	const bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( const void * ) value0 );
-
-	return bigint_bit_is_set ( value, bit );
-}
-
-int bigint_max_set_bit_sample ( const bigint_element_t *value0,
-				unsigned int size ) {
-	const bigint_t ( size ) *value __attribute__ (( may_alias ))
-		= ( ( const void * ) value0 );
-
-	return bigint_max_set_bit ( value );
-}
-
-void bigint_grow_sample ( const bigint_element_t *source0,
-			  unsigned int source_size, bigint_element_t *dest0,
-			  unsigned int dest_size ) {
-	const bigint_t ( source_size ) *source __attribute__ (( may_alias ))
-		= ( ( const void * ) source0 );
-	bigint_t ( dest_size ) *dest __attribute__ (( may_alias ))
-		= ( ( void * ) dest0 );
-
-	bigint_grow ( source, dest );
-}
-
-void bigint_shrink_sample ( const bigint_element_t *source0,
-			    unsigned int source_size, bigint_element_t *dest0,
-			    unsigned int dest_size ) {
-	const bigint_t ( source_size ) *source __attribute__ (( may_alias ))
-		= ( ( const void * ) source0 );
-	bigint_t ( dest_size ) *dest __attribute__ (( may_alias ))
-		= ( ( void * ) dest0 );
-
-	bigint_shrink ( source, dest );
-}
-
-void bigint_multiply_sample ( const bigint_element_t *multiplicand0,
-			      const bigint_element_t *multiplier0,
-			      bigint_element_t *result0,
-			      unsigned int size ) {
-	const bigint_t ( size ) *multiplicand __attribute__ (( may_alias ))
-		= ( ( const void * ) multiplicand0 );
-	const bigint_t ( size ) *multiplier __attribute__ (( may_alias ))
-		= ( ( const void * ) multiplier0 );
-	bigint_t ( size * 2 ) *result __attribute__ (( may_alias ))
-		= ( ( void * ) result0 );
-
-	bigint_multiply ( multiplicand, multiplier, result );
-}
-
-void bigint_mod_multiply_sample ( const bigint_element_t *multiplicand0,
-				  const bigint_element_t *multiplier0,
-				  const bigint_element_t *modulus0,
-				  bigint_element_t *result0,
-				  unsigned int size,
-				  void *tmp ) {
-	const bigint_t ( size ) *multiplicand __attribute__ (( may_alias ))
-		= ( ( const void * ) multiplicand0 );
-	const bigint_t ( size ) *multiplier __attribute__ (( may_alias ))
-		= ( ( const void * ) multiplier0 );
-	const bigint_t ( size ) *modulus __attribute__ (( may_alias ))
-		= ( ( const void * ) modulus0 );
-	bigint_t ( size ) *result __attribute__ (( may_alias ))
-		= ( ( void * ) result0 );
-
-	bigint_mod_multiply ( multiplicand, multiplier, modulus, result, tmp );
-}
-
-void bigint_mod_exp_sample ( const bigint_element_t *base0,
-			     const bigint_element_t *modulus0,
-			     const bigint_element_t *exponent0,
-			     bigint_element_t *result0,
-			     unsigned int size, unsigned int exponent_size,
-			     void *tmp ) {
-	const bigint_t ( size ) *base __attribute__ (( may_alias ))
-		= ( ( const void * ) base0 );
-	const bigint_t ( size ) *modulus __attribute__ (( may_alias ))
-		= ( ( const void * ) modulus0 );
-	const bigint_t ( exponent_size ) *exponent __attribute__ (( may_alias ))
-		= ( ( const void * ) exponent0 );
-	bigint_t ( size ) *result __attribute__ (( may_alias ))
-		= ( ( void * ) result0 );
-
-	bigint_mod_exp ( base, modulus, exponent, result, tmp );
-}
-
-/**
- * Report result of big integer addition test
- *
- * @v addend		Big integer to add
- * @v value		Big integer to be added to
- * @v expected		Big integer expected result
- */
-#define bigint_add_ok( addend, value, expected ) do {			\
-	static const uint8_t addend_raw[] = addend;			\
-	static const uint8_t value_raw[] = value;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) addend_temp;					\
-	bigint_t ( size ) value_temp;					\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &addend_temp ) ==			\
-		 bigint_size ( &value_temp ) );				\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	bigint_init ( &addend_temp, addend_raw,				\
-		      sizeof ( addend_raw ) );				\
-	DBG ( "Add:\n" );						\
-	DBG_HDA ( 0, &addend_temp, sizeof ( addend_temp ) );		\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_add ( &addend_temp, &value_temp );			\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_done ( &value_temp, result_raw, sizeof ( result_raw ) );	\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer subtraction test
- *
- * @v subtrahend	Big integer to subtract
- * @v value		Big integer to be subtracted from
- * @v expected		Big integer expected result
- */
-#define bigint_subtract_ok( subtrahend, value, expected ) do {		\
-	static const uint8_t subtrahend_raw[] = subtrahend;		\
-	static const uint8_t value_raw[] = value;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) subtrahend_temp;				\
-	bigint_t ( size ) value_temp;					\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &subtrahend_temp ) ==			\
-		 bigint_size ( &value_temp ) );				\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	bigint_init ( &subtrahend_temp, subtrahend_raw,			\
-		      sizeof ( subtrahend_raw ) );			\
-	DBG ( "Subtract:\n" );						\
-	DBG_HDA ( 0, &subtrahend_temp, sizeof ( subtrahend_temp ) );	\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_subtract ( &subtrahend_temp, &value_temp );		\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_done ( &value_temp, result_raw, sizeof ( result_raw ) );	\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer left rotation test
- *
- * @v value		Big integer
- * @v expected		Big integer expected result
- */
-#define bigint_rol_ok( value, expected ) do {				\
-	static const uint8_t value_raw[] = value;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	{} /* Fix emacs alignment */					\
-									\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	DBG ( "Rotate left:\n" );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_rol ( &value_temp );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_done ( &value_temp, result_raw, sizeof ( result_raw ) );	\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer right rotation test
- *
- * @v value		Big integer
- * @v expected		Big integer expected result
- */
-#define bigint_ror_ok( value, expected ) do {				\
-	static const uint8_t value_raw[] = value;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	{} /* Fix emacs alignment */					\
-									\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	DBG ( "Rotate right:\n" );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_ror ( &value_temp );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bigint_done ( &value_temp, result_raw, sizeof ( result_raw ) );	\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer zero comparison test
- *
- * @v value		Big integer
- * @v expected		Expected result
- */
-#define bigint_is_zero_ok( value, expected ) do {			\
-	static const uint8_t value_raw[] = value;			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	int is_zero;							\
-	{} /* Fix emacs alignment */					\
-									\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	DBG ( "Zero comparison:\n" );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	is_zero = bigint_is_zero ( &value_temp );			\
-	DBG ( "...is %szero\n", ( is_zero ? "" : "not " ) );		\
-	ok ( ( !! is_zero ) == ( !! (expected) ) );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer greater-than-or-equal comparison test
- *
- * @v value		Big integer
- * @v reference		Reference big integer
- * @v expected		Expected result
- */
-#define bigint_is_geq_ok( value, reference, expected ) do {		\
-	static const uint8_t value_raw[] = value;			\
-	static const uint8_t reference_raw[] = reference;		\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	bigint_t ( size ) reference_temp;				\
-	int is_geq;							\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &reference_temp ) ==			\
-		 bigint_size ( &value_temp ) );				\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	bigint_init ( &reference_temp, reference_raw,			\
-		      sizeof ( reference_raw ) );			\
-	DBG ( "Greater-than-or-equal comparison:\n" );			\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	DBG_HDA ( 0, &reference_temp, sizeof ( reference_temp ) );	\
-	is_geq = bigint_is_geq ( &value_temp, &reference_temp );	\
-	DBG ( "...is %sgreater than or equal\n",			\
-	      ( is_geq ? "" : "not " ) );				\
-	ok ( ( !! is_geq ) == ( !! (expected) ) );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer bit-set test
- *
- * @v value		Big integer
- * @v bit		Bit to test
- * @v expected		Expected result
- */
-#define bigint_bit_is_set_ok( value, bit, expected ) do {		\
-	static const uint8_t value_raw[] = value;			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	int bit_is_set;							\
-	{} /* Fix emacs alignment */					\
-									\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	DBG ( "Bit set:\n" );						\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	bit_is_set = bigint_bit_is_set ( &value_temp, bit );		\
-	DBG ( "...bit %d is %sset\n", bit,				\
-	      ( bit_is_set ? "" : "not " ) );				\
-	ok ( ( !! bit_is_set ) == ( !! (expected) ) );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer maximum set bit test
- *
- * @v value		Big integer
- * @v expected		Expected result
- */
-#define bigint_max_set_bit_ok( value, expected ) do {			\
-	static const uint8_t value_raw[] = value;			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( value_raw ) );		\
-	bigint_t ( size ) value_temp;					\
-	int max_set_bit;						\
-	{} /* Fix emacs alignment */					\
-									\
-	bigint_init ( &value_temp, value_raw, sizeof ( value_raw ) );	\
-	DBG ( "Maximum set bit:\n" );					\
-	DBG_HDA ( 0, &value_temp, sizeof ( value_temp ) );		\
-	max_set_bit = bigint_max_set_bit ( &value_temp );		\
-	DBG ( "...maximum set bit is bit %d\n", ( max_set_bit - 1 ) );	\
-	ok ( max_set_bit == (expected) );				\
-	} while ( 0 )
-
-/**
- * Report result of big integer multiplication test
- *
- * @v multiplicand	Big integer to be multiplied
- * @v multiplier	Big integer to be multiplied
- * @v expected		Big integer expected result
- */
-#define bigint_multiply_ok( multiplicand, multiplier, expected ) do {	\
-	static const uint8_t multiplicand_raw[] = multiplicand;		\
-	static const uint8_t multiplier_raw[] = multiplier;		\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( multiplicand_raw ) );	\
-	bigint_t ( size ) multiplicand_temp;				\
-	bigint_t ( size ) multiplier_temp;				\
-	bigint_t ( size * 2 ) result_temp;				\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &multiplier_temp ) ==			\
-		 bigint_size ( &multiplicand_temp ) );			\
-	assert ( bigint_size ( &result_temp ) ==			\
-		 ( 2 * bigint_size ( &multiplicand_temp ) ) );		\
-	bigint_init ( &multiplicand_temp, multiplicand_raw,		\
-		      sizeof ( multiplicand_raw ) );			\
-	bigint_init ( &multiplier_temp, multiplier_raw,			\
-		      sizeof ( multiplier_raw ) );			\
-	DBG ( "Multiply:\n" );						\
-	DBG_HDA ( 0, &multiplicand_temp, sizeof ( multiplicand_temp ) );\
-	DBG_HDA ( 0, &multiplier_temp, sizeof ( multiplier_temp ) );	\
-	bigint_multiply ( &multiplicand_temp, &multiplier_temp,		\
-			  &result_temp );				\
-	DBG_HDA ( 0, &result_temp, sizeof ( result_temp ) );		\
-	bigint_done ( &result_temp, result_raw, sizeof ( result_raw ) );\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer modular multiplication test
- *
- * @v multiplicand	Big integer to be multiplied
- * @v multiplier	Big integer to be multiplied
- * @v modulus		Big integer modulus
- * @v expected		Big integer expected result
- */
-#define bigint_mod_multiply_ok( multiplicand, multiplier, modulus,	\
-				expected ) do {				\
-	static const uint8_t multiplicand_raw[] = multiplicand;		\
-	static const uint8_t multiplier_raw[] = multiplier;		\
-	static const uint8_t modulus_raw[] = modulus;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( multiplicand_raw ) );	\
-	bigint_t ( size ) multiplicand_temp;				\
-	bigint_t ( size ) multiplier_temp;				\
-	bigint_t ( size ) modulus_temp;					\
-	bigint_t ( size ) result_temp;					\
-	size_t tmp_len = bigint_mod_multiply_tmp_len ( &modulus_temp ); \
-	uint8_t tmp[tmp_len];						\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &multiplier_temp ) ==			\
-		 bigint_size ( &multiplicand_temp ) );			\
-	assert ( bigint_size ( &multiplier_temp ) ==			\
-		 bigint_size ( &modulus_temp ) );			\
-	assert ( bigint_size ( &multiplier_temp ) ==			\
-		 bigint_size ( &result_temp ) );			\
-	bigint_init ( &multiplicand_temp, multiplicand_raw,		\
-		      sizeof ( multiplicand_raw ) );			\
-	bigint_init ( &multiplier_temp, multiplier_raw,			\
-		      sizeof ( multiplier_raw ) );			\
-	bigint_init ( &modulus_temp, modulus_raw,			\
-		      sizeof ( modulus_raw ) );				\
-	DBG ( "Modular multiply:\n" );					\
-	DBG_HDA ( 0, &multiplicand_temp, sizeof ( multiplicand_temp ) );\
-	DBG_HDA ( 0, &multiplier_temp, sizeof ( multiplier_temp ) );	\
-	DBG_HDA ( 0, &modulus_temp, sizeof ( modulus_temp ) );		\
-	bigint_mod_multiply ( &multiplicand_temp, &multiplier_temp,	\
-			      &modulus_temp, &result_temp, tmp );	\
-	DBG_HDA ( 0, &result_temp, sizeof ( result_temp ) );		\
-	bigint_done ( &result_temp, result_raw, sizeof ( result_raw ) );\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report result of big integer modular exponentiation test
- *
- * @v base		Big integer base
- * @v modulus		Big integer modulus
- * @v exponent		Big integer exponent
- * @v expected		Big integer expected result
- */
-#define bigint_mod_exp_ok( base, modulus, exponent, expected ) do {	\
-	static const uint8_t base_raw[] = base;				\
-	static const uint8_t modulus_raw[] = modulus;			\
-	static const uint8_t exponent_raw[] = exponent;			\
-	static const uint8_t expected_raw[] = expected;			\
-	uint8_t result_raw[ sizeof ( expected_raw ) ];			\
-	unsigned int size =						\
-		bigint_required_size ( sizeof ( base_raw ) );		\
-	unsigned int exponent_size =					\
-		bigint_required_size ( sizeof ( exponent_raw ) );	\
-	bigint_t ( size ) base_temp;					\
-	bigint_t ( size ) modulus_temp;					\
-	bigint_t ( exponent_size ) exponent_temp;			\
-	bigint_t ( size ) result_temp;					\
-	size_t tmp_len = bigint_mod_exp_tmp_len ( &modulus_temp,	\
-						  &exponent_temp );	\
-	uint8_t tmp[tmp_len];						\
-	{} /* Fix emacs alignment */					\
-									\
-	assert ( bigint_size ( &modulus_temp ) ==			\
-		 bigint_size ( &base_temp ) );				\
-	assert ( bigint_size ( &modulus_temp ) ==			\
-		 bigint_size ( &result_temp ) );			\
-	bigint_init ( &base_temp, base_raw, sizeof ( base_raw ) );	\
-	bigint_init ( &modulus_temp, modulus_raw,			\
-		      sizeof ( modulus_raw ) );				\
-	bigint_init ( &exponent_temp, exponent_raw,			\
-		      sizeof ( exponent_raw ) );			\
-	DBG ( "Modular exponentiation:\n" );				\
-	DBG_HDA ( 0, &base_temp, sizeof ( base_temp ) );		\
-	DBG_HDA ( 0, &modulus_temp, sizeof ( modulus_temp ) );		\
-	DBG_HDA ( 0, &exponent_temp, sizeof ( exponent_temp ) );	\
-	bigint_mod_exp ( &base_temp, &modulus_temp, &exponent_temp,	\
-			 &result_temp, tmp );				\
-	DBG_HDA ( 0, &result_temp, sizeof ( result_temp ) );		\
-	bigint_done ( &result_temp, result_raw, sizeof ( result_raw ) );\
-									\
-	ok ( memcmp ( result_raw, expected_raw,				\
-		      sizeof ( result_raw ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Perform big integer self-tests
- *
- */
-static void bigint_test_exec ( void ) {
-
-	bigint_add_ok ( BIGINT ( 0x8a ),
-			BIGINT ( 0x43 ),
-			BIGINT ( 0xcd ) );
-	bigint_add_ok ( BIGINT ( 0xc5, 0x7b ),
-			BIGINT ( 0xd6, 0xb1 ),
-			BIGINT ( 0x9c, 0x2c ) );
-	bigint_add_ok ( BIGINT ( 0xf9, 0xd9, 0xdc ),
-			BIGINT ( 0x6d, 0x4b, 0xca ),
-			BIGINT ( 0x67, 0x25, 0xa6 ) );
-	bigint_add_ok ( BIGINT ( 0xdd, 0xc2, 0x20, 0x5f ),
-			BIGINT ( 0x80, 0x32, 0xc4, 0xb0 ),
-			BIGINT ( 0x5d, 0xf4, 0xe5, 0x0f ) );
-	bigint_add_ok ( BIGINT ( 0x01, 0xed, 0x45, 0x4b, 0x41, 0xeb, 0x4c,
-				 0x2e, 0x53, 0x07, 0x15, 0x51, 0x56, 0x47,
-				 0x29, 0xfc, 0x9c, 0xbd, 0xbd, 0xfb, 0x1b,
-				 0xd1, 0x1d ),
-			BIGINT ( 0x73, 0xed, 0xfc, 0x35, 0x31, 0x22, 0xd7,
-				 0xb1, 0xea, 0x91, 0x5a, 0xe4, 0xba, 0xbc,
-				 0xa1, 0x38, 0x72, 0xae, 0x4b, 0x1c, 0xc1,
-				 0x05, 0xb3 ),
-			BIGINT ( 0x75, 0xdb, 0x41, 0x80, 0x73, 0x0e, 0x23,
-				 0xe0, 0x3d, 0x98, 0x70, 0x36, 0x11, 0x03,
-				 0xcb, 0x35, 0x0f, 0x6c, 0x09, 0x17, 0xdc,
-				 0xd6, 0xd0 ) );
-	bigint_add_ok ( BIGINT ( 0x06, 0x8e, 0xd6, 0x18, 0xbb, 0x4b, 0x0c,
-				 0xc5, 0x85, 0xde, 0xee, 0x9b, 0x3f, 0x65,
-				 0x63, 0x86, 0xf5, 0x5a, 0x9f, 0xa2, 0xd7,
-				 0xb2, 0xc7, 0xb6, 0x1d, 0x28, 0x6c, 0x50,
-				 0x47, 0x10, 0x0a, 0x0e, 0x86, 0xcd, 0x2a,
-				 0x64, 0xdc, 0xe6, 0x9d, 0x96, 0xd8, 0xf4,
-				 0x56, 0x46, 0x6f, 0xbb, 0x7b, 0x64, 0x6f,
-				 0xdc, 0x2a, 0xd1, 0x3b, 0xcc, 0x03, 0x85,
-				 0x95, 0xf4, 0xe9, 0x68, 0x1f, 0x5c, 0xc5,
-				 0xbf, 0x97, 0x19, 0x12, 0x88, 0x2e, 0x88,
-				 0xb9, 0x34, 0xac, 0x74, 0x83, 0x2d, 0x8f,
-				 0xb3, 0x97, 0x53, 0x99, 0xf3, 0xb4, 0x8b,
-				 0x2d, 0x98, 0x69, 0x8d, 0x19, 0xf0, 0x40,
-				 0x66, 0x3f, 0x60, 0x78, 0x34, 0x7f, 0x9b,
-				 0xf7, 0x01, 0x74, 0x55, 0xca, 0x63, 0x25,
-				 0x7b, 0x86, 0xe9, 0x73, 0xfd, 0x5d, 0x77,
-				 0x32, 0x5e, 0x9e, 0x42, 0x53, 0xb6, 0x35,
-				 0x92, 0xb9, 0xd7, 0x1b, 0xf7, 0x16, 0x55,
-				 0xf6, 0xe2 ),
-			BIGINT ( 0x3f, 0x8f, 0x62, 0x21, 0x4a, 0x7a, 0xa2,
-				 0xef, 0xa8, 0x79, 0x9b, 0x73, 0xac, 0xde,
-				 0x72, 0xe4, 0xfc, 0x3c, 0xd3, 0xa9, 0x44,
-				 0x1a, 0x6a, 0x02, 0x76, 0xe3, 0x78, 0x4d,
-				 0x2e, 0x07, 0x9b, 0xb6, 0x3d, 0x5d, 0xc5,
-				 0xcd, 0x68, 0x23, 0x4b, 0x5f, 0x89, 0x0e,
-				 0xd7, 0xa7, 0xff, 0x18, 0x80, 0xdc, 0xfb,
-				 0x34, 0x45, 0xca, 0x4b, 0xdb, 0x8a, 0x19,
-				 0xcb, 0xc9, 0xe5, 0xa1, 0x63, 0xa2, 0x0d,
-				 0x56, 0xc4, 0xf9, 0x51, 0x1b, 0x88, 0x4e,
-				 0x36, 0xab, 0x15, 0x4d, 0x8f, 0xdc, 0x08,
-				 0xc4, 0x4d, 0x43, 0xc7, 0x2b, 0xc9, 0x5c,
-				 0x05, 0x26, 0xe3, 0x46, 0xf0, 0x64, 0xaa,
-				 0x02, 0xa4, 0xbe, 0x3a, 0xd1, 0xca, 0x07,
-				 0x6a, 0x6e, 0x62, 0xf4, 0x57, 0x71, 0x96,
-				 0xec, 0xf0, 0x0b, 0xac, 0xa4, 0x4a, 0xa3,
-				 0x6d, 0x01, 0xba, 0xbd, 0x62, 0xc0, 0x10,
-				 0x54, 0x33, 0x8a, 0x71, 0xef, 0xaa, 0x1c,
-				 0x25, 0x25 ),
-			BIGINT ( 0x46, 0x1e, 0x38, 0x3a, 0x05, 0xc5, 0xaf,
-				 0xb5, 0x2e, 0x58, 0x8a, 0x0e, 0xec, 0x43,
-				 0xd6, 0x6b, 0xf1, 0x97, 0x73, 0x4c, 0x1b,
-				 0xcd, 0x31, 0xb8, 0x94, 0x0b, 0xe4, 0x9d,
-				 0x75, 0x17, 0xa5, 0xc4, 0xc4, 0x2a, 0xf0,
-				 0x32, 0x45, 0x09, 0xe8, 0xf6, 0x62, 0x03,
-				 0x2d, 0xee, 0x6e, 0xd3, 0xfc, 0x41, 0x6b,
-				 0x10, 0x70, 0x9b, 0x87, 0xa7, 0x8d, 0x9f,
-				 0x61, 0xbe, 0xcf, 0x09, 0x82, 0xfe, 0xd3,
-				 0x16, 0x5c, 0x12, 0x63, 0xa3, 0xb6, 0xd6,
-				 0xef, 0xdf, 0xc1, 0xc2, 0x13, 0x09, 0x98,
-				 0x77, 0xe4, 0x97, 0x61, 0x1f, 0x7d, 0xe7,
-				 0x32, 0xbf, 0x4c, 0xd4, 0x0a, 0x54, 0xea,
-				 0x68, 0xe4, 0x1e, 0xb3, 0x06, 0x49, 0xa3,
-				 0x61, 0x6f, 0xd7, 0x4a, 0x21, 0xd4, 0xbc,
-				 0x68, 0x76, 0xf5, 0x20, 0xa1, 0xa8, 0x1a,
-				 0x9f, 0x60, 0x58, 0xff, 0xb6, 0x76, 0x45,
-				 0xe6, 0xed, 0x61, 0x8d, 0xe6, 0xc0, 0x72,
-				 0x1c, 0x07 ) );
-	bigint_subtract_ok ( BIGINT ( 0x83 ),
-			     BIGINT ( 0x50 ),
-			     BIGINT ( 0xcd ) );
-	bigint_subtract_ok ( BIGINT ( 0x2c, 0x7c ),
-			     BIGINT ( 0x49, 0x0e ),
-			     BIGINT ( 0x1c, 0x92 ) );
-	bigint_subtract_ok ( BIGINT ( 0x9c, 0x30, 0xbf ),
-			     BIGINT ( 0xde, 0x4e, 0x07 ),
-			     BIGINT ( 0x42, 0x1d, 0x48 ) );
-	bigint_subtract_ok ( BIGINT ( 0xbb, 0x77, 0x32, 0x5a ),
-			     BIGINT ( 0x5a, 0xd5, 0xfe, 0x28 ),
-			     BIGINT ( 0x9f, 0x5e, 0xcb, 0xce ) );
-	bigint_subtract_ok ( BIGINT ( 0x7b, 0xaa, 0x16, 0xcf, 0x15, 0x87,
-				      0xe0, 0x4f, 0x2c, 0xa3, 0xec, 0x2f,
-				      0x46, 0xfb, 0x83, 0xc6, 0xe0, 0xee,
-				      0x57, 0xfa, 0x04, 0xce, 0xa6 ),
-			     BIGINT ( 0x46, 0x55, 0xb6, 0x23, 0x63, 0xd0,
-				      0x55, 0xdb, 0x8f, 0xcc, 0x55, 0xa8,
-				      0x2f, 0x85, 0xc1, 0x9f, 0x2c, 0x13,
-				      0x10, 0x9e, 0x76, 0x3c, 0x11 ),
-			     BIGINT ( 0xca, 0xab, 0x9f, 0x54, 0x4e, 0x48,
-				      0x75, 0x8c, 0x63, 0x28, 0x69, 0x78,
-				      0xe8, 0x8a, 0x3d, 0xd8, 0x4b, 0x24,
-				      0xb8, 0xa4, 0x71, 0x6d, 0x6b ) );
-	bigint_subtract_ok ( BIGINT ( 0x5b, 0x06, 0x77, 0x7b, 0xfd, 0x34,
-				      0x5f, 0x0f, 0xd9, 0xbd, 0x8e, 0x5d,
-				      0xc8, 0x4a, 0x70, 0x95, 0x1b, 0xb6,
-				      0x48, 0xfb, 0x0e, 0x40, 0xce, 0x06,
-				      0x66, 0xcc, 0x29, 0xe9, 0x51, 0x59,
-				      0x59, 0xc9, 0x65, 0x07, 0x75, 0xb8,
-				      0xd4, 0xcb, 0x07, 0x68, 0x14, 0x48,
-				      0xc7, 0x1e, 0xfe, 0xb3, 0x4c, 0xf1,
-				      0x10, 0xf0, 0xc7, 0x82, 0x38, 0x4c,
-				      0xaf, 0x05, 0x6d, 0x91, 0xc5, 0x18,
-				      0xfd, 0x1e, 0x26, 0x1b, 0xef, 0x71,
-				      0x70, 0x2e, 0x06, 0x70, 0x8e, 0x54,
-				      0xfa, 0x2b, 0x4d, 0x96, 0x85, 0x10,
-				      0x03, 0x76, 0xe7, 0x17, 0x59, 0x86,
-				      0x6c, 0x8b, 0x24, 0x6e, 0xd9, 0x30,
-				      0xf3, 0xd2, 0x9b, 0x62, 0xdc, 0x23,
-				      0x54, 0x06, 0x51, 0xb1, 0x95, 0x58,
-				      0xec, 0x27, 0xf6, 0x19, 0xae, 0xf4,
-				      0x31, 0xec, 0x72, 0x53, 0xcd, 0x32,
-				      0xed, 0xf4, 0x25, 0x4a, 0x5b, 0x36,
-				      0xa2, 0xb4, 0xa0, 0x29, 0x0c, 0x6b,
-				      0x3f, 0xc2 ),
-			     BIGINT ( 0x7a, 0xd4, 0x25, 0xf1, 0xb5, 0xf5,
-				      0x00, 0x96, 0x47, 0x5b, 0x4f, 0x9f,
-				      0x1f, 0x61, 0x69, 0xd9, 0x72, 0x47,
-				      0xde, 0xbd, 0x87, 0x5d, 0x50, 0x91,
-				      0x69, 0xd8, 0x35, 0xe0, 0x43, 0xd8,
-				      0xd5, 0x15, 0xf2, 0xcd, 0x01, 0x73,
-				      0x0d, 0x34, 0xf0, 0x34, 0x46, 0x76,
-				      0xc0, 0x55, 0x7b, 0x27, 0xf5, 0x7b,
-				      0x55, 0xe9, 0xd0, 0x29, 0x0b, 0x4b,
-				      0x9f, 0x07, 0xbf, 0x2c, 0x3f, 0xef,
-				      0x36, 0x34, 0xde, 0x29, 0x1d, 0x5d,
-				      0x84, 0x5a, 0x5d, 0xc1, 0x02, 0x4d,
-				      0x56, 0xf1, 0x47, 0x39, 0x37, 0xc9,
-				      0xb5, 0x5f, 0x73, 0xec, 0x7c, 0x3d,
-				      0xbd, 0xc0, 0xfd, 0x38, 0x6c, 0x91,
-				      0x88, 0x4a, 0x0f, 0xee, 0xa1, 0x80,
-				      0xf5, 0x6a, 0x7c, 0x8c, 0x02, 0xc3,
-				      0x5a, 0xb2, 0x15, 0xa6, 0x2f, 0x6b,
-				      0x5b, 0x78, 0xb5, 0xf3, 0xbd, 0xd0,
-				      0xc8, 0xbc, 0xb1, 0xbb, 0xe1, 0xce,
-				      0x22, 0x80, 0x34, 0x5a, 0x2a, 0x27,
-				      0x83, 0xdc ),
-			     BIGINT ( 0x1f, 0xcd, 0xae, 0x75, 0xb8, 0xc0,
-				      0xa1, 0x86, 0x6d, 0x9d, 0xc1, 0x41,
-				      0x57, 0x16, 0xf9, 0x44, 0x56, 0x91,
-				      0x95, 0xc2, 0x79, 0x1c, 0x82, 0x8b,
-				      0x03, 0x0c, 0x0b, 0xf6, 0xf2, 0x7f,
-				      0x7b, 0x4c, 0x8d, 0xc5, 0x8b, 0xba,
-				      0x38, 0x69, 0xe8, 0xcc, 0x32, 0x2d,
-				      0xf9, 0x36, 0x7c, 0x74, 0xa8, 0x8a,
-				      0x44, 0xf9, 0x08, 0xa6, 0xd2, 0xfe,
-				      0xf0, 0x02, 0x51, 0x9a, 0x7a, 0xd6,
-				      0x39, 0x16, 0xb8, 0x0d, 0x2d, 0xec,
-				      0x14, 0x2c, 0x57, 0x50, 0x73, 0xf8,
-				      0x5c, 0xc5, 0xf9, 0xa2, 0xb2, 0xb9,
-				      0xb1, 0xe8, 0x8c, 0xd5, 0x22, 0xb7,
-				      0x51, 0x35, 0xd8, 0xc9, 0x93, 0x60,
-				      0x94, 0x77, 0x74, 0x8b, 0xc5, 0x5d,
-				      0xa1, 0x64, 0x2a, 0xda, 0x6d, 0x6a,
-				      0x6e, 0x8a, 0x1f, 0x8c, 0x80, 0x77,
-				      0x29, 0x8c, 0x43, 0x9f, 0xf0, 0x9d,
-				      0xda, 0xc8, 0x8c, 0x71, 0x86, 0x97,
-				      0x7f, 0xcb, 0x94, 0x31, 0x1d, 0xbc,
-				      0x44, 0x1a ) );
-	bigint_rol_ok ( BIGINT ( 0xe0 ),
-			BIGINT ( 0xc0 ) );
-	bigint_rol_ok ( BIGINT ( 0x43, 0x1d ),
-			BIGINT ( 0x86, 0x3a ) );
-	bigint_rol_ok ( BIGINT ( 0xac, 0xed, 0x9b ),
-			BIGINT ( 0x59, 0xdb, 0x36 ) );
-	bigint_rol_ok ( BIGINT ( 0x2c, 0xe8, 0x3a, 0x22 ),
-			BIGINT ( 0x59, 0xd0, 0x74, 0x44 ) );
-	bigint_rol_ok ( BIGINT ( 0x4e, 0x88, 0x4a, 0x05, 0x5e, 0x10, 0xee,
-				 0x5b, 0xc6, 0x40, 0x0e, 0x03, 0xd7, 0x0d,
-				 0x28, 0xa5, 0x55, 0xb2, 0x50, 0xef, 0x69,
-				 0xd1, 0x1d ),
-			BIGINT ( 0x9d, 0x10, 0x94, 0x0a, 0xbc, 0x21, 0xdc,
-				 0xb7, 0x8c, 0x80, 0x1c, 0x07, 0xae, 0x1a,
-				 0x51, 0x4a, 0xab, 0x64, 0xa1, 0xde, 0xd3,
-				 0xa2, 0x3a ) );
-	bigint_rol_ok ( BIGINT ( 0x07, 0x62, 0x78, 0x70, 0x2e, 0xd4, 0x41,
-				 0xaa, 0x9b, 0x50, 0xb1, 0x9a, 0x71, 0xf5,
-				 0x1c, 0x2f, 0xe7, 0x0d, 0xf1, 0x46, 0x57,
-				 0x04, 0x99, 0x78, 0x4e, 0x84, 0x78, 0xba,
-				 0x57, 0xea, 0xa5, 0x43, 0xf7, 0x02, 0xf0,
-				 0x7a, 0x22, 0x60, 0x65, 0x42, 0xf2, 0x33,
-				 0x7d, 0xe3, 0xa8, 0x1b, 0xc4, 0x14, 0xdb,
-				 0xee, 0x4a, 0xf1, 0xe1, 0x52, 0xd4, 0xda,
-				 0x23, 0xed, 0x13, 0x5d, 0xea, 0xcf, 0xf6,
-				 0x5e, 0x39, 0x84, 0xe2, 0xb3, 0xa2, 0x05,
-				 0xba, 0xd9, 0x49, 0x8e, 0x75, 0x1d, 0xdb,
-				 0xe6, 0xb1, 0x6e, 0xda, 0x0a, 0x83, 0xd0,
-				 0x6e, 0xcf, 0x7a, 0x66, 0xb7, 0x64, 0x84,
-				 0xf5, 0x09, 0x5a, 0xa8, 0x11, 0x93, 0xf3,
-				 0x4f, 0x02, 0x28, 0x00, 0x3a, 0xf0, 0xa9,
-				 0x08, 0x77, 0x04, 0xf5, 0x04, 0xcd, 0x6b,
-				 0x24, 0xbe, 0x0f, 0x6d, 0xe3, 0xb2, 0xd3,
-				 0x07, 0x68, 0xe9, 0x00, 0x59, 0xa0, 0xe4,
-				 0x9e, 0x5e ),
-			BIGINT ( 0x0e, 0xc4, 0xf0, 0xe0, 0x5d, 0xa8, 0x83,
-				 0x55, 0x36, 0xa1, 0x63, 0x34, 0xe3, 0xea,
-				 0x38, 0x5f, 0xce, 0x1b, 0xe2, 0x8c, 0xae,
-				 0x09, 0x32, 0xf0, 0x9d, 0x08, 0xf1, 0x74,
-				 0xaf, 0xd5, 0x4a, 0x87, 0xee, 0x05, 0xe0,
-				 0xf4, 0x44, 0xc0, 0xca, 0x85, 0xe4, 0x66,
-				 0xfb, 0xc7, 0x50, 0x37, 0x88, 0x29, 0xb7,
-				 0xdc, 0x95, 0xe3, 0xc2, 0xa5, 0xa9, 0xb4,
-				 0x47, 0xda, 0x26, 0xbb, 0xd5, 0x9f, 0xec,
-				 0xbc, 0x73, 0x09, 0xc5, 0x67, 0x44, 0x0b,
-				 0x75, 0xb2, 0x93, 0x1c, 0xea, 0x3b, 0xb7,
-				 0xcd, 0x62, 0xdd, 0xb4, 0x15, 0x07, 0xa0,
-				 0xdd, 0x9e, 0xf4, 0xcd, 0x6e, 0xc9, 0x09,
-				 0xea, 0x12, 0xb5, 0x50, 0x23, 0x27, 0xe6,
-				 0x9e, 0x04, 0x50, 0x00, 0x75, 0xe1, 0x52,
-				 0x10, 0xee, 0x09, 0xea, 0x09, 0x9a, 0xd6,
-				 0x49, 0x7c, 0x1e, 0xdb, 0xc7, 0x65, 0xa6,
-				 0x0e, 0xd1, 0xd2, 0x00, 0xb3, 0x41, 0xc9,
-				 0x3c, 0xbc ) );
-	bigint_ror_ok ( BIGINT ( 0x8f ),
-			BIGINT ( 0x47 ) );
-	bigint_ror_ok ( BIGINT ( 0xaa, 0x1d ),
-			BIGINT ( 0x55, 0x0e ) );
-	bigint_ror_ok ( BIGINT ( 0xf0, 0xbd, 0x68 ),
-			BIGINT ( 0x78, 0x5e, 0xb4 ) );
-	bigint_ror_ok ( BIGINT ( 0x33, 0xa0, 0x3d, 0x95 ),
-			BIGINT ( 0x19, 0xd0, 0x1e, 0xca ) );
-	bigint_ror_ok ( BIGINT ( 0xa1, 0xf4, 0xb9, 0x64, 0x91, 0x99, 0xa1,
-				 0xf4, 0xae, 0xeb, 0x71, 0x97, 0x1b, 0x71,
-				 0x09, 0x38, 0x3f, 0x8f, 0xc5, 0x3a, 0xb9,
-				 0x75, 0x94 ),
-			BIGINT ( 0x50, 0xfa, 0x5c, 0xb2, 0x48, 0xcc, 0xd0,
-				 0xfa, 0x57, 0x75, 0xb8, 0xcb, 0x8d, 0xb8,
-				 0x84, 0x9c, 0x1f, 0xc7, 0xe2, 0x9d, 0x5c,
-				 0xba, 0xca ) );
-	bigint_ror_ok ( BIGINT ( 0xc0, 0xb3, 0x78, 0x46, 0x69, 0x6e, 0x35,
-				 0x94, 0xed, 0x28, 0xdc, 0xfd, 0xf6, 0xdb,
-				 0x2d, 0x24, 0xcb, 0xa4, 0x6f, 0x0e, 0x58,
-				 0x89, 0x04, 0xec, 0xc8, 0x0c, 0x2d, 0xb3,
-				 0x58, 0xa7, 0x22, 0x6d, 0x93, 0xe0, 0xb8,
-				 0x48, 0x6a, 0x3f, 0x04, 0x7e, 0xbe, 0xb8,
-				 0xa7, 0x84, 0xf5, 0xc9, 0x2f, 0x60, 0x9e,
-				 0x7c, 0xbc, 0xaf, 0x28, 0x89, 0x2f, 0xaa,
-				 0xd1, 0x82, 0x77, 0xa4, 0xdf, 0xf3, 0x4a,
-				 0xc6, 0xed, 0xa3, 0x07, 0xb4, 0xa9, 0xfd,
-				 0xef, 0xf8, 0x20, 0xb9, 0xb3, 0xff, 0x35,
-				 0x27, 0xed, 0x02, 0xea, 0xec, 0x63, 0xc0,
-				 0x46, 0x97, 0xc0, 0x4c, 0xca, 0x89, 0xca,
-				 0x14, 0xe8, 0xe0, 0x02, 0x14, 0x44, 0x46,
-				 0xf3, 0x2f, 0xbc, 0x6a, 0x28, 0xa2, 0xbe,
-				 0x20, 0xc8, 0xaa, 0x0f, 0xd9, 0x51, 0x8e,
-				 0x8d, 0x51, 0x29, 0x61, 0xef, 0x48, 0xae,
-				 0x3e, 0xe5, 0x10, 0xbf, 0xda, 0x9b, 0x92,
-				 0xb3, 0x77 ),
-			BIGINT ( 0x60, 0x59, 0xbc, 0x23, 0x34, 0xb7, 0x1a,
-				 0xca, 0x76, 0x94, 0x6e, 0x7e, 0xfb, 0x6d,
-				 0x96, 0x92, 0x65, 0xd2, 0x37, 0x87, 0x2c,
-				 0x44, 0x82, 0x76, 0x64, 0x06, 0x16, 0xd9,
-				 0xac, 0x53, 0x91, 0x36, 0xc9, 0xf0, 0x5c,
-				 0x24, 0x35, 0x1f, 0x82, 0x3f, 0x5f, 0x5c,
-				 0x53, 0xc2, 0x7a, 0xe4, 0x97, 0xb0, 0x4f,
-				 0x3e, 0x5e, 0x57, 0x94, 0x44, 0x97, 0xd5,
-				 0x68, 0xc1, 0x3b, 0xd2, 0x6f, 0xf9, 0xa5,
-				 0x63, 0x76, 0xd1, 0x83, 0xda, 0x54, 0xfe,
-				 0xf7, 0xfc, 0x10, 0x5c, 0xd9, 0xff, 0x9a,
-				 0x93, 0xf6, 0x81, 0x75, 0x76, 0x31, 0xe0,
-				 0x23, 0x4b, 0xe0, 0x26, 0x65, 0x44, 0xe5,
-				 0x0a, 0x74, 0x70, 0x01, 0x0a, 0x22, 0x23,
-				 0x79, 0x97, 0xde, 0x35, 0x14, 0x51, 0x5f,
-				 0x10, 0x64, 0x55, 0x07, 0xec, 0xa8, 0xc7,
-				 0x46, 0xa8, 0x94, 0xb0, 0xf7, 0xa4, 0x57,
-				 0x1f, 0x72, 0x88, 0x5f, 0xed, 0x4d, 0xc9,
-				 0x59, 0xbb ) );
-	bigint_is_zero_ok ( BIGINT ( 0x9b ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0x5a, 0x9d ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0x5f, 0x80, 0x78 ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xa0, 0x52, 0x47, 0x2e ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0x18, 0x08, 0x49, 0xdb, 0x7b, 0x5c,
-				     0xe7, 0x41, 0x07, 0xdf, 0xed, 0xf9,
-				     0xd3, 0x92, 0x0d, 0x75, 0xa6, 0xb0,
-				     0x14, 0xfa, 0xdd, 0xfd, 0x82 ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0x04, 0x04, 0xb5, 0xf5, 0x01, 0xae,
-				     0x2b, 0x91, 0xa7, 0xc1, 0x49, 0x97,
-				     0x3f, 0x45, 0x53, 0x52, 0xb8, 0x52,
-				     0xf1, 0x62, 0xa5, 0x21, 0x18, 0xd4,
-				     0xb0, 0xb4, 0x8a, 0x17, 0x0e, 0xe8,
-				     0xeb, 0xaa, 0x28, 0xae, 0x3d, 0x8e,
-				     0xe3, 0x6c, 0xd0, 0x01, 0x0c, 0x54,
-				     0xca, 0x23, 0xbb, 0x06, 0xcd, 0x7a,
-				     0x61, 0x89, 0x38, 0x34, 0x6e, 0xc7,
-				     0xc2, 0xee, 0xb1, 0x80, 0x61, 0x0e,
-				     0xc6, 0x8d, 0x65, 0xa0, 0xeb, 0x34,
-				     0xe9, 0x63, 0x09, 0x4c, 0x20, 0xac,
-				     0x42, 0xe3, 0x35, 0xa2, 0x3e, 0x3b,
-				     0x2e, 0x18, 0x70, 0x45, 0x7c, 0xab,
-				     0x42, 0xcc, 0xe0, 0x9e, 0x7c, 0x42,
-				     0xd1, 0xda, 0x6c, 0x51, 0x10, 0x1e,
-				     0x0e, 0x3f, 0xe5, 0xd6, 0xd8, 0x56,
-				     0x08, 0xb2, 0x3b, 0x15, 0xc4, 0x7c,
-				     0x0c, 0x7e, 0xaf, 0x7b, 0x9d, 0xd6,
-				     0x2b, 0xc0, 0x2f, 0xa2, 0xa3, 0xa3,
-				     0x77, 0x58, 0x1b, 0xe9, 0xa8, 0x9a,
-				     0x23, 0x7f ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0x00, 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0x00, 0x00, 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				     0x00, 0x00 ),
-			    1 );
-	bigint_is_zero_ok ( BIGINT ( 0xff ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xff, 0xff ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xff, 0xff, 0xff ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff ),
-			    0 );
-	bigint_is_zero_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				     0xff, 0xff ),
-			    0 );
-	bigint_is_geq_ok ( BIGINT ( 0xa2 ),
-			   BIGINT ( 0x58 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x58 ),
-			   BIGINT ( 0xa2 ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0xa2 ),
-			   BIGINT ( 0xa2 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x61, 0x29 ),
-			   BIGINT ( 0x87, 0xac ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0x87, 0xac ),
-			   BIGINT ( 0x61, 0x29 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x61, 0x29 ),
-			   BIGINT ( 0x61, 0x29 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0xe6, 0x63, 0x14 ),
-			   BIGINT ( 0xb7, 0x2b, 0x76 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0xb7, 0x2b, 0x76 ),
-			   BIGINT ( 0xe6, 0x63, 0x14 ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0xe6, 0x63, 0x14 ),
-			   BIGINT ( 0xe6, 0x63, 0x14 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0xe7, 0x4f, 0xd4, 0x80 ),
-			   BIGINT ( 0xb5, 0xf9, 0x9b, 0x90 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0xb5, 0xf9, 0x9b, 0x90 ),
-			   BIGINT ( 0xe7, 0x4f, 0xd4, 0x80 ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0xe7, 0x4f, 0xd4, 0x80 ),
-			   BIGINT ( 0xe7, 0x4f, 0xd4, 0x80 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0xe6, 0x2c, 0x7c, 0x24, 0x78, 0x8f, 0x12,
-				    0x20, 0xde, 0xd3, 0x6b, 0xc9, 0x97, 0x2d,
-				    0x66, 0x74, 0xe5, 0xb6, 0xf7, 0x8f, 0x2b,
-				    0x60, 0x98 ),
-			   BIGINT ( 0x77, 0xbc, 0x3b, 0x1b, 0x57, 0x43, 0x3b,
-				    0x8c, 0x82, 0xda, 0xb5, 0xc7, 0x18, 0x09,
-				    0xb3, 0x59, 0x0e, 0x53, 0x2a, 0xb9, 0xd8,
-				    0xa2, 0xb4 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x77, 0xbc, 0x3b, 0x1b, 0x57, 0x43, 0x3b,
-				    0x8c, 0x82, 0xda, 0xb5, 0xc7, 0x18, 0x09,
-				    0xb3, 0x59, 0x0e, 0x53, 0x2a, 0xb9, 0xd8,
-				    0xa2, 0xb4 ),
-			   BIGINT ( 0xe6, 0x2c, 0x7c, 0x24, 0x78, 0x8f, 0x12,
-				    0x20, 0xde, 0xd3, 0x6b, 0xc9, 0x97, 0x2d,
-				    0x66, 0x74, 0xe5, 0xb6, 0xf7, 0x8f, 0x2b,
-				    0x60, 0x98 ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0xe6, 0x2c, 0x7c, 0x24, 0x78, 0x8f, 0x12,
-				    0x20, 0xde, 0xd3, 0x6b, 0xc9, 0x97, 0x2d,
-				    0x66, 0x74, 0xe5, 0xb6, 0xf7, 0x8f, 0x2b,
-				    0x60, 0x98 ),
-			   BIGINT ( 0xe6, 0x2c, 0x7c, 0x24, 0x78, 0x8f, 0x12,
-				    0x20, 0xde, 0xd3, 0x6b, 0xc9, 0x97, 0x2d,
-				    0x66, 0x74, 0xe5, 0xb6, 0xf7, 0x8f, 0x2b,
-				    0x60, 0x98 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x2a, 0x98, 0xfd, 0x87, 0x5d, 0x9f, 0xb4,
-				    0x8b, 0x5c, 0xcd, 0x5f, 0xcd, 0x53, 0xb3,
-				    0xd1, 0x81, 0x6a, 0x9c, 0x93, 0x66, 0x40,
-				    0xa7, 0x64, 0xe0, 0x8c, 0xec, 0x96, 0x63,
-				    0x4d, 0x29, 0xfa, 0xb1, 0x5d, 0x93, 0x2f,
-				    0xf9, 0x36, 0xea, 0x3b, 0xc1, 0xaf, 0x85,
-				    0xcb, 0xde, 0x2d, 0xc8, 0x48, 0x33, 0xce,
-				    0x7b, 0xa4, 0xa4, 0xda, 0x0f, 0xaa, 0x1b,
-				    0xcb, 0xed, 0xbe, 0x3a, 0xa5, 0xbb, 0x73,
-				    0x28, 0x04, 0xc6, 0x2a, 0xfb, 0x3a, 0xc3,
-				    0xae, 0x42, 0x1f, 0x53, 0x6c, 0xb2, 0x76,
-				    0xb7, 0xe2, 0x88, 0xcb, 0x88, 0xcf, 0xf0,
-				    0x52, 0x81, 0xd3, 0xb2, 0x1f, 0x56, 0xe1,
-				    0xe1, 0x47, 0x93, 0x6f, 0x2b, 0x49, 0xaa,
-				    0x50, 0x99, 0x7a, 0xc4, 0x56, 0xb7, 0x13,
-				    0x80, 0xf4, 0x73, 0x88, 0xc7, 0x39, 0x83,
-				    0x67, 0xc7, 0xcc, 0xb2, 0x28, 0x7a, 0xd3,
-				    0xdc, 0x48, 0xea, 0x62, 0x0d, 0xf5, 0x5a,
-				    0x27, 0x96 ),
-			   BIGINT ( 0xd4, 0x6b, 0x0a, 0x2e, 0x9f, 0xde, 0x4b,
-				    0x64, 0xfa, 0x6b, 0x37, 0x73, 0x66, 0x06,
-				    0xee, 0x04, 0xef, 0xe6, 0x3c, 0x7d, 0x57,
-				    0x22, 0x7f, 0x1f, 0x62, 0x1c, 0x7e, 0x20,
-				    0xda, 0x97, 0xd0, 0x27, 0x23, 0xf6, 0x77,
-				    0x5b, 0x49, 0x97, 0xe1, 0x65, 0x91, 0x13,
-				    0x93, 0xd6, 0x12, 0xc3, 0x66, 0x91, 0x76,
-				    0xe8, 0x47, 0x4c, 0x6a, 0x1b, 0xa2, 0x02,
-				    0xf8, 0x94, 0xaa, 0xe0, 0x1b, 0x0b, 0x17,
-				    0x86, 0x5e, 0xf5, 0x17, 0x23, 0xf5, 0x17,
-				    0x91, 0x6b, 0xd7, 0x2f, 0x5a, 0xfe, 0x8a,
-				    0x63, 0x28, 0x31, 0x1e, 0x09, 0x60, 0x29,
-				    0x5d, 0x55, 0xd8, 0x79, 0xeb, 0x78, 0x36,
-				    0x44, 0x69, 0xa4, 0x76, 0xa5, 0x35, 0x30,
-				    0xca, 0xc9, 0xf9, 0x62, 0xd7, 0x82, 0x13,
-				    0x56, 0xd0, 0x58, 0xfe, 0x16, 0x4b, 0xfb,
-				    0xa8, 0x4c, 0xb3, 0xd7, 0xcf, 0x5f, 0x93,
-				    0x9d, 0xc4, 0x11, 0xb4, 0xdd, 0xf8, 0x8f,
-				    0xe1, 0x11 ),
-			   0 );
-	bigint_is_geq_ok ( BIGINT ( 0xd4, 0x6b, 0x0a, 0x2e, 0x9f, 0xde, 0x4b,
-				    0x64, 0xfa, 0x6b, 0x37, 0x73, 0x66, 0x06,
-				    0xee, 0x04, 0xef, 0xe6, 0x3c, 0x7d, 0x57,
-				    0x22, 0x7f, 0x1f, 0x62, 0x1c, 0x7e, 0x20,
-				    0xda, 0x97, 0xd0, 0x27, 0x23, 0xf6, 0x77,
-				    0x5b, 0x49, 0x97, 0xe1, 0x65, 0x91, 0x13,
-				    0x93, 0xd6, 0x12, 0xc3, 0x66, 0x91, 0x76,
-				    0xe8, 0x47, 0x4c, 0x6a, 0x1b, 0xa2, 0x02,
-				    0xf8, 0x94, 0xaa, 0xe0, 0x1b, 0x0b, 0x17,
-				    0x86, 0x5e, 0xf5, 0x17, 0x23, 0xf5, 0x17,
-				    0x91, 0x6b, 0xd7, 0x2f, 0x5a, 0xfe, 0x8a,
-				    0x63, 0x28, 0x31, 0x1e, 0x09, 0x60, 0x29,
-				    0x5d, 0x55, 0xd8, 0x79, 0xeb, 0x78, 0x36,
-				    0x44, 0x69, 0xa4, 0x76, 0xa5, 0x35, 0x30,
-				    0xca, 0xc9, 0xf9, 0x62, 0xd7, 0x82, 0x13,
-				    0x56, 0xd0, 0x58, 0xfe, 0x16, 0x4b, 0xfb,
-				    0xa8, 0x4c, 0xb3, 0xd7, 0xcf, 0x5f, 0x93,
-				    0x9d, 0xc4, 0x11, 0xb4, 0xdd, 0xf8, 0x8f,
-				    0xe1, 0x11 ),
-			   BIGINT ( 0x2a, 0x98, 0xfd, 0x87, 0x5d, 0x9f, 0xb4,
-				    0x8b, 0x5c, 0xcd, 0x5f, 0xcd, 0x53, 0xb3,
-				    0xd1, 0x81, 0x6a, 0x9c, 0x93, 0x66, 0x40,
-				    0xa7, 0x64, 0xe0, 0x8c, 0xec, 0x96, 0x63,
-				    0x4d, 0x29, 0xfa, 0xb1, 0x5d, 0x93, 0x2f,
-				    0xf9, 0x36, 0xea, 0x3b, 0xc1, 0xaf, 0x85,
-				    0xcb, 0xde, 0x2d, 0xc8, 0x48, 0x33, 0xce,
-				    0x7b, 0xa4, 0xa4, 0xda, 0x0f, 0xaa, 0x1b,
-				    0xcb, 0xed, 0xbe, 0x3a, 0xa5, 0xbb, 0x73,
-				    0x28, 0x04, 0xc6, 0x2a, 0xfb, 0x3a, 0xc3,
-				    0xae, 0x42, 0x1f, 0x53, 0x6c, 0xb2, 0x76,
-				    0xb7, 0xe2, 0x88, 0xcb, 0x88, 0xcf, 0xf0,
-				    0x52, 0x81, 0xd3, 0xb2, 0x1f, 0x56, 0xe1,
-				    0xe1, 0x47, 0x93, 0x6f, 0x2b, 0x49, 0xaa,
-				    0x50, 0x99, 0x7a, 0xc4, 0x56, 0xb7, 0x13,
-				    0x80, 0xf4, 0x73, 0x88, 0xc7, 0x39, 0x83,
-				    0x67, 0xc7, 0xcc, 0xb2, 0x28, 0x7a, 0xd3,
-				    0xdc, 0x48, 0xea, 0x62, 0x0d, 0xf5, 0x5a,
-				    0x27, 0x96 ),
-			   1 );
-	bigint_is_geq_ok ( BIGINT ( 0x2a, 0x98, 0xfd, 0x87, 0x5d, 0x9f, 0xb4,
-				    0x8b, 0x5c, 0xcd, 0x5f, 0xcd, 0x53, 0xb3,
-				    0xd1, 0x81, 0x6a, 0x9c, 0x93, 0x66, 0x40,
-				    0xa7, 0x64, 0xe0, 0x8c, 0xec, 0x96, 0x63,
-				    0x4d, 0x29, 0xfa, 0xb1, 0x5d, 0x93, 0x2f,
-				    0xf9, 0x36, 0xea, 0x3b, 0xc1, 0xaf, 0x85,
-				    0xcb, 0xde, 0x2d, 0xc8, 0x48, 0x33, 0xce,
-				    0x7b, 0xa4, 0xa4, 0xda, 0x0f, 0xaa, 0x1b,
-				    0xcb, 0xed, 0xbe, 0x3a, 0xa5, 0xbb, 0x73,
-				    0x28, 0x04, 0xc6, 0x2a, 0xfb, 0x3a, 0xc3,
-				    0xae, 0x42, 0x1f, 0x53, 0x6c, 0xb2, 0x76,
-				    0xb7, 0xe2, 0x88, 0xcb, 0x88, 0xcf, 0xf0,
-				    0x52, 0x81, 0xd3, 0xb2, 0x1f, 0x56, 0xe1,
-				    0xe1, 0x47, 0x93, 0x6f, 0x2b, 0x49, 0xaa,
-				    0x50, 0x99, 0x7a, 0xc4, 0x56, 0xb7, 0x13,
-				    0x80, 0xf4, 0x73, 0x88, 0xc7, 0x39, 0x83,
-				    0x67, 0xc7, 0xcc, 0xb2, 0x28, 0x7a, 0xd3,
-				    0xdc, 0x48, 0xea, 0x62, 0x0d, 0xf5, 0x5a,
-				    0x27, 0x96 ),
-			   BIGINT ( 0x2a, 0x98, 0xfd, 0x87, 0x5d, 0x9f, 0xb4,
-				    0x8b, 0x5c, 0xcd, 0x5f, 0xcd, 0x53, 0xb3,
-				    0xd1, 0x81, 0x6a, 0x9c, 0x93, 0x66, 0x40,
-				    0xa7, 0x64, 0xe0, 0x8c, 0xec, 0x96, 0x63,
-				    0x4d, 0x29, 0xfa, 0xb1, 0x5d, 0x93, 0x2f,
-				    0xf9, 0x36, 0xea, 0x3b, 0xc1, 0xaf, 0x85,
-				    0xcb, 0xde, 0x2d, 0xc8, 0x48, 0x33, 0xce,
-				    0x7b, 0xa4, 0xa4, 0xda, 0x0f, 0xaa, 0x1b,
-				    0xcb, 0xed, 0xbe, 0x3a, 0xa5, 0xbb, 0x73,
-				    0x28, 0x04, 0xc6, 0x2a, 0xfb, 0x3a, 0xc3,
-				    0xae, 0x42, 0x1f, 0x53, 0x6c, 0xb2, 0x76,
-				    0xb7, 0xe2, 0x88, 0xcb, 0x88, 0xcf, 0xf0,
-				    0x52, 0x81, 0xd3, 0xb2, 0x1f, 0x56, 0xe1,
-				    0xe1, 0x47, 0x93, 0x6f, 0x2b, 0x49, 0xaa,
-				    0x50, 0x99, 0x7a, 0xc4, 0x56, 0xb7, 0x13,
-				    0x80, 0xf4, 0x73, 0x88, 0xc7, 0x39, 0x83,
-				    0x67, 0xc7, 0xcc, 0xb2, 0x28, 0x7a, 0xd3,
-				    0xdc, 0x48, 0xea, 0x62, 0x0d, 0xf5, 0x5a,
-				    0x27, 0x96 ),
-			   1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x37 ),
-			       0, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0xe6, 0xcb ),
-			       0, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0xd9, 0x0c, 0x5b ),
-			       0, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x8b, 0x56, 0x89, 0xaf ),
-			       0, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x25, 0xfc, 0xaf, 0xeb, 0x81, 0xc3,
-					0xb8, 0x2f, 0xbb, 0xe3, 0x07, 0xb2,
-					0xe2, 0x2a, 0xe2, 0x2d, 0xb4, 0x4d,
-					0x6d, 0xec, 0x51, 0xa0, 0x2f ),
-			       0, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x25, 0xfc, 0xaf, 0xeb, 0x81, 0xc3,
-					0xb8, 0x2f, 0xbb, 0xe3, 0x07, 0xb2,
-					0xe2, 0x2a, 0xe2, 0x2d, 0xb4, 0x4d,
-					0x6d, 0xec, 0x51, 0xa0, 0x2f ),
-			       45, 0 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x88, 0x04, 0xec, 0xe6, 0xfb, 0x31,
-					0x87, 0x43, 0xb2, 0x04, 0x9e, 0x09,
-					0xba, 0x3e, 0x6d, 0x64, 0x1a, 0x85,
-					0xb6, 0x46, 0x7d, 0x71, 0x3c, 0x06,
-					0xd6, 0x40, 0x52, 0x39, 0x95, 0xa1,
-					0x06, 0xff, 0x6a, 0x5c, 0xa3, 0x6d,
-					0x4a, 0xc9, 0x77, 0x87, 0x75, 0x25,
-					0x57, 0x65, 0x72, 0x73, 0x64, 0x7e,
-					0xe9, 0x16, 0x17, 0xf3, 0x65, 0x3f,
-					0xd5, 0xcc, 0xd7, 0xa2, 0xee, 0xe7,
-					0x8d, 0x48, 0xd5, 0x7e, 0xdd, 0x59,
-					0x4b, 0xf0, 0x96, 0x8b, 0x21, 0x65,
-					0x04, 0x66, 0xc5, 0xff, 0x3e, 0x60,
-					0xba, 0x28, 0x38, 0x7d, 0x9c, 0x09,
-					0xd1, 0x8e, 0xac, 0x73, 0x8e, 0xf2,
-					0x1e, 0xdf, 0x83, 0x6e, 0x54, 0xd5,
-					0x34, 0xc1, 0xc6, 0xf9, 0x62, 0x2a,
-					0x7d, 0xec, 0x47, 0xf2, 0xfc, 0xa2,
-					0x10, 0x0a, 0x67, 0x1b, 0xc6, 0x11,
-					0x9d, 0x68, 0x25, 0x8b, 0xb5, 0x9b,
-					0x83, 0xf8, 0xa2, 0x11, 0xf5, 0xd4,
-					0xcb, 0xe0 ),
-			       0, 0 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x88, 0x04, 0xec, 0xe6, 0xfb, 0x31,
-					0x87, 0x43, 0xb2, 0x04, 0x9e, 0x09,
-					0xba, 0x3e, 0x6d, 0x64, 0x1a, 0x85,
-					0xb6, 0x46, 0x7d, 0x71, 0x3c, 0x06,
-					0xd6, 0x40, 0x52, 0x39, 0x95, 0xa1,
-					0x06, 0xff, 0x6a, 0x5c, 0xa3, 0x6d,
-					0x4a, 0xc9, 0x77, 0x87, 0x75, 0x25,
-					0x57, 0x65, 0x72, 0x73, 0x64, 0x7e,
-					0xe9, 0x16, 0x17, 0xf3, 0x65, 0x3f,
-					0xd5, 0xcc, 0xd7, 0xa2, 0xee, 0xe7,
-					0x8d, 0x48, 0xd5, 0x7e, 0xdd, 0x59,
-					0x4b, 0xf0, 0x96, 0x8b, 0x21, 0x65,
-					0x04, 0x66, 0xc5, 0xff, 0x3e, 0x60,
-					0xba, 0x28, 0x38, 0x7d, 0x9c, 0x09,
-					0xd1, 0x8e, 0xac, 0x73, 0x8e, 0xf2,
-					0x1e, 0xdf, 0x83, 0x6e, 0x54, 0xd5,
-					0x34, 0xc1, 0xc6, 0xf9, 0x62, 0x2a,
-					0x7d, 0xec, 0x47, 0xf2, 0xfc, 0xa2,
-					0x10, 0x0a, 0x67, 0x1b, 0xc6, 0x11,
-					0x9d, 0x68, 0x25, 0x8b, 0xb5, 0x9b,
-					0x83, 0xf8, 0xa2, 0x11, 0xf5, 0xd4,
-					0xcb, 0xe0 ),
-			       45, 1 );
-	bigint_bit_is_set_ok ( BIGINT ( 0x88, 0x04, 0xec, 0xe6, 0xfb, 0x31,
-					0x87, 0x43, 0xb2, 0x04, 0x9e, 0x09,
-					0xba, 0x3e, 0x6d, 0x64, 0x1a, 0x85,
-					0xb6, 0x46, 0x7d, 0x71, 0x3c, 0x06,
-					0xd6, 0x40, 0x52, 0x39, 0x95, 0xa1,
-					0x06, 0xff, 0x6a, 0x5c, 0xa3, 0x6d,
-					0x4a, 0xc9, 0x77, 0x87, 0x75, 0x25,
-					0x57, 0x65, 0x72, 0x73, 0x64, 0x7e,
-					0xe9, 0x16, 0x17, 0xf3, 0x65, 0x3f,
-					0xd5, 0xcc, 0xd7, 0xa2, 0xee, 0xe7,
-					0x8d, 0x48, 0xd5, 0x7e, 0xdd, 0x59,
-					0x4b, 0xf0, 0x96, 0x8b, 0x21, 0x65,
-					0x04, 0x66, 0xc5, 0xff, 0x3e, 0x60,
-					0xba, 0x28, 0x38, 0x7d, 0x9c, 0x09,
-					0xd1, 0x8e, 0xac, 0x73, 0x8e, 0xf2,
-					0x1e, 0xdf, 0x83, 0x6e, 0x54, 0xd5,
-					0x34, 0xc1, 0xc6, 0xf9, 0x62, 0x2a,
-					0x7d, 0xec, 0x47, 0xf2, 0xfc, 0xa2,
-					0x10, 0x0a, 0x67, 0x1b, 0xc6, 0x11,
-					0x9d, 0x68, 0x25, 0x8b, 0xb5, 0x9b,
-					0x83, 0xf8, 0xa2, 0x11, 0xf5, 0xd4,
-					0xcb, 0xe0 ),
-			       1013, 0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x3a ),
-				6 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x03 ),
-				2 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff ),
-				8 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x20, 0x30 ),
-				14 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x10 ),
-				5 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff, 0xff ),
-				16 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x06, 0xdb, 0x7a ),
-				19 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff, 0xff, 0xff ),
-				24 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xee, 0xcb, 0x7b, 0xfd ),
-				32 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x01, 0xdd ),
-				9 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff ),
-				32 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x32, 0x39, 0x96, 0x52, 0x10, 0x67,
-					 0x7e, 0x32, 0xfc, 0x4e, 0x56, 0xc3,
-					 0x68, 0x18, 0x76, 0x1a, 0xac, 0x0e,
-					 0x93, 0xee, 0x55, 0xc5, 0x6e ),
-				182 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0xc8, 0xe6, 0x59 ),
-				24 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff ),
-				184 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xcd, 0xb3, 0x22, 0x30, 0xdd, 0xa7,
-					 0xff, 0x37, 0xbf, 0xe3, 0x38, 0xf7,
-					 0xe1, 0x41, 0x73, 0xea, 0x3a, 0xfc,
-					 0x78, 0x9e, 0xfb, 0x4f, 0x85, 0xdc,
-					 0x1c, 0x40, 0x89, 0x6e, 0xda, 0xf9,
-					 0x9d, 0x6d, 0x12, 0x97, 0xb1, 0x80,
-					 0x2a, 0xeb, 0x91, 0xce, 0x3b, 0x83,
-					 0xb8, 0xa5, 0x3d, 0xce, 0x46, 0x56,
-					 0xb7, 0xd1, 0x28, 0xbc, 0x93, 0x4e,
-					 0x8c, 0x29, 0x6d, 0x2c, 0xcc, 0x58,
-					 0x49, 0x2f, 0x37, 0xa0, 0x08, 0x37,
-					 0x86, 0xdd, 0x38, 0x21, 0xa7, 0x57,
-					 0x37, 0xe3, 0xc5, 0xcc, 0x50, 0x11,
-					 0x1a, 0xe4, 0xea, 0xe7, 0x4d, 0x3c,
-					 0x37, 0x65, 0x78, 0xd1, 0xf6, 0xc3,
-					 0x94, 0x46, 0xd4, 0x0e, 0xd3, 0x9a,
-					 0x21, 0x8b, 0xa6, 0x54, 0xc0, 0xd2,
-					 0x88, 0x07, 0x24, 0xbf, 0x7d, 0x31,
-					 0xfd, 0x15, 0xa8, 0x92, 0x65, 0xe1,
-					 0x8d, 0xed, 0x70, 0x7b, 0x68, 0x0f,
-					 0xcc, 0x13, 0xb9, 0xb2, 0xdd, 0x3c,
-					 0x6a, 0x52 ),
-				1024 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x66, 0xd9,
-					 0x91, 0x18, 0x6e, 0xd3, 0xff, 0x9b,
-					 0xdf, 0xf1, 0x9c, 0x7b, 0xf0, 0xa0,
-					 0xb9, 0xf5 ),
-				127 );
-	bigint_max_set_bit_ok ( BIGINT ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-					 0x00, 0x00 ),
-				0 );
-	bigint_max_set_bit_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-					 0xff, 0xff ),
-				1024 );
-	bigint_multiply_ok ( BIGINT ( 0xf0 ),
-			     BIGINT ( 0xeb ),
-			     BIGINT ( 0xdc, 0x50 ) );
-	bigint_multiply_ok ( BIGINT ( 0xd7, 0x16 ),
-			     BIGINT ( 0x88, 0xfb ),
-			     BIGINT ( 0x73, 0x16, 0x92, 0x92 ) );
-	bigint_multiply_ok ( BIGINT ( 0xfe, 0xed, 0x1d ),
-			     BIGINT ( 0x69, 0x9c, 0x03 ),
-			     BIGINT ( 0x69, 0x2a, 0x9c, 0x5f, 0x73, 0x57 ) );
-	bigint_multiply_ok ( BIGINT ( 0x96, 0xe9, 0x6f, 0x81 ),
-			     BIGINT ( 0x67, 0x3c, 0x5a, 0x16 ),
-			     BIGINT ( 0x3c, 0xdb, 0x7f, 0xae, 0x12, 0x7e,
-				      0xef, 0x16 ) );
-	bigint_multiply_ok ( BIGINT ( 0xe8, 0x08, 0x0b, 0xe9, 0x29, 0x36,
-				      0xea, 0x51, 0x1d, 0x75, 0x1a, 0xd5,
-				      0xba, 0xc6, 0xa0, 0xf3, 0x48, 0x5c,
-				      0xdf, 0x42, 0xdf, 0x28, 0x38 ),
-			     BIGINT ( 0x22, 0x07, 0x41, 0x54, 0x4e, 0xf9,
-				      0x90, 0xa8, 0xaf, 0xba, 0xf6, 0xb0,
-				      0x35, 0x7e, 0x98, 0xef, 0x2c, 0x31,
-				      0xc9, 0xa7, 0x25, 0x74, 0x8d ),
-			     BIGINT ( 0x1e, 0xd7, 0xa5, 0x03, 0xc0, 0x18,
-				      0x2e, 0x29, 0xb1, 0x3e, 0x96, 0x71,
-				      0x90, 0xa5, 0x6d, 0x43, 0x58, 0xf7,
-				      0x22, 0x80, 0x0b, 0x21, 0xc6, 0x70,
-				      0x90, 0x1c, 0xa8, 0x85, 0x87, 0xaf,
-				      0xd7, 0xdd, 0x27, 0x69, 0xaf, 0x20,
-				      0xa0, 0x2d, 0x43, 0x5d, 0xda, 0xba,
-				      0x4b, 0x3a, 0x86, 0xd8 ) );
-	bigint_multiply_ok ( BIGINT ( 0xa2, 0x0f, 0xc6, 0x08, 0x0a, 0x01,
-				      0x19, 0x42, 0x0e, 0xaa, 0x5c, 0xae,
-				      0x4f, 0x4e, 0xb0, 0xad, 0xb2, 0xe8,
-				      0xee, 0xd5, 0x65, 0xec, 0x5a, 0xda,
-				      0xc0, 0xba, 0x78, 0xa8, 0x0f, 0x15,
-				      0x39, 0xd7, 0x7a, 0x10, 0xc2, 0xa7,
-				      0xec, 0x44, 0xac, 0xad, 0x39, 0x04,
-				      0x2e, 0x66, 0x54, 0x70, 0x57, 0xee,
-				      0xf6, 0x97, 0x19, 0x71, 0x16, 0xf9,
-				      0xbb, 0x2e, 0x84, 0x09, 0x6e, 0x9a,
-				      0x3b, 0x16, 0xb2, 0x65, 0x74, 0x50,
-				      0x19, 0xd1, 0xe9, 0x95, 0xa0, 0x7b,
-				      0x33, 0xb5, 0xac, 0x7c, 0x9e, 0xd4,
-				      0x68, 0x0d, 0xc9, 0xe4, 0x03, 0x86,
-				      0x1a, 0xa3, 0x42, 0x33, 0x28, 0x14,
-				      0x12, 0x7d, 0x5a, 0xd9, 0x30, 0x18,
-				      0x0a, 0xf4, 0x0c, 0x96, 0x58, 0xc9,
-				      0xb5, 0x37, 0xdb, 0x49, 0xdc, 0x01,
-				      0x4a, 0xcb, 0x6d, 0x87, 0x52, 0xf6,
-				      0xae, 0xa7, 0x71, 0x31, 0x9a, 0x1a,
-				      0xe2, 0x1c, 0x87, 0x51, 0xc9, 0xeb,
-				      0x70, 0x71 ),
-			     BIGINT ( 0x7c, 0xdd, 0x2f, 0x5d, 0x27, 0xfe,
-				      0xca, 0x70, 0x96, 0xc3, 0xb1, 0x1f,
-				      0xac, 0xa9, 0x3a, 0xdc, 0xcd, 0xbc,
-				      0x58, 0xb4, 0xde, 0xe7, 0xe5, 0x34,
-				      0x1a, 0xc0, 0xb9, 0x46, 0xf7, 0x52,
-				      0x76, 0x23, 0xe8, 0xe9, 0x92, 0xa1,
-				      0x86, 0x3c, 0x6f, 0xf1, 0x22, 0xf4,
-				      0x72, 0xb1, 0xde, 0xd3, 0x8f, 0x11,
-				      0x9e, 0x52, 0xe5, 0x81, 0x54, 0xe9,
-				      0xa7, 0x72, 0x3f, 0x3e, 0xa0, 0x80,
-				      0xbb, 0xae, 0x0e, 0x30, 0x6a, 0x11,
-				      0x91, 0x11, 0x3b, 0x3f, 0x44, 0x1f,
-				      0x8d, 0x4d, 0xea, 0xdd, 0x09, 0x95,
-				      0x9d, 0x02, 0xa6, 0x6d, 0x3b, 0x08,
-				      0x40, 0x8d, 0xb4, 0x4b, 0x05, 0x74,
-				      0x8c, 0x1f, 0xaa, 0x61, 0x6f, 0x0e,
-				      0xcc, 0xcf, 0xe0, 0x81, 0x03, 0xe4,
-				      0x9b, 0x11, 0xd9, 0xab, 0xf3, 0x24,
-				      0xe2, 0x3b, 0xe0, 0x05, 0x60, 0x65,
-				      0x16, 0xc6, 0x2e, 0x83, 0xa0, 0x98,
-				      0x8e, 0x11, 0x05, 0x00, 0xe4, 0x3f,
-				      0x7e, 0x65 ),
-			     BIGINT ( 0x4f, 0x0b, 0xa9, 0x85, 0xb8, 0x31,
-				      0x48, 0xea, 0x11, 0x44, 0xaf, 0x2d,
-				      0xed, 0x1a, 0x76, 0x45, 0xac, 0x87,
-				      0x0c, 0xf3, 0xd7, 0xc4, 0x8e, 0x5c,
-				      0xd7, 0xdf, 0x28, 0x74, 0xa6, 0x40,
-				      0xe4, 0x6b, 0x5b, 0x19, 0x36, 0x37,
-				      0x9c, 0xcd, 0x43, 0x76, 0x15, 0x00,
-				      0x5d, 0x23, 0xa2, 0x8a, 0x53, 0x25,
-				      0xbf, 0x18, 0xda, 0xe6, 0x09, 0xdf,
-				      0xaa, 0xeb, 0x9a, 0x82, 0x01, 0x14,
-				      0x2b, 0x20, 0x2b, 0xb6, 0x22, 0x62,
-				      0x6b, 0xcc, 0xd4, 0xc9, 0x02, 0x67,
-				      0x95, 0x43, 0x75, 0x4e, 0x97, 0x4e,
-				      0xec, 0x04, 0xde, 0x29, 0x0a, 0xef,
-				      0xf7, 0xc1, 0x72, 0x8c, 0x64, 0x38,
-				      0x16, 0x47, 0x9f, 0x16, 0x0c, 0xa5,
-				      0x79, 0x6b, 0xea, 0x2e, 0x4c, 0x3d,
-				      0x0c, 0xe6, 0x57, 0x51, 0x65, 0xa5,
-				      0x3b, 0xca, 0xae, 0x54, 0x0c, 0x67,
-				      0xf8, 0x23, 0x00, 0xc9, 0x8d, 0xe6,
-				      0x16, 0x91, 0x19, 0xb3, 0x5b, 0x68,
-				      0x7b, 0xf2, 0xe2, 0x5d, 0x69, 0x48,
-				      0x3f, 0x2b, 0xa0, 0x4f, 0x7c, 0x3c,
-				      0x26, 0xf9, 0xd9, 0xfd, 0x3d, 0x5d,
-				      0xd6, 0x05, 0x00, 0xd8, 0xdf, 0x5a,
-				      0x56, 0x8f, 0x16, 0x68, 0x4f, 0x15,
-				      0x19, 0x9d, 0xd7, 0x11, 0x51, 0x7d,
-				      0x73, 0x5c, 0xd4, 0xd5, 0xb4, 0xc7,
-				      0x42, 0xe3, 0xee, 0xf1, 0x67, 0xd6,
-				      0x69, 0x72, 0x04, 0x4b, 0x88, 0x3d,
-				      0x05, 0xd8, 0x1e, 0x50, 0xcb, 0xce,
-				      0x39, 0x19, 0x42, 0xb6, 0xa7, 0xf3,
-				      0xba, 0x78, 0x90, 0xd2, 0x09, 0x05,
-				      0x87, 0xf8, 0xc0, 0x9c, 0x47, 0xff,
-				      0xbf, 0xaa, 0x21, 0x8d, 0x81, 0x86,
-				      0xcd, 0x58, 0xdf, 0x30, 0xf1, 0xd1,
-				      0x60, 0x53, 0x85, 0x40, 0xbf, 0x14,
-				      0x3e, 0xdc, 0x9e, 0x9e, 0xc4, 0xc7,
-				      0x48, 0xa0, 0x83, 0xe0, 0x99, 0x8b,
-				      0x43, 0xf8, 0x52, 0x8a, 0x15, 0x88,
-				      0x89, 0x83, 0x7d, 0x71, 0xbb, 0x62,
-				      0x12, 0x7a, 0x23, 0x85, 0x3a, 0xbb,
-				      0xdb, 0x09, 0xfa, 0x95 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff ),
-			     BIGINT ( 0xff ),
-			     BIGINT ( 0xfe, 0x01 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xfe, 0x00, 0x01 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xfe, 0x00, 0x00, 0x01 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xfe, 0x00, 0x00,
-				      0x00, 0x01 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xfe, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x01 ) );
-	bigint_multiply_ok ( BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff ),
-			     BIGINT ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-				      0xff, 0xfe, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-				      0x00, 0x00, 0x00, 0x01 ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0x37 ),
-				 BIGINT ( 0x67 ),
-				 BIGINT ( 0x3f ),
-				 BIGINT ( 0x3a ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0x45, 0x94 ),
-				 BIGINT ( 0xbd, 0xd2 ),
-				 BIGINT ( 0xca, 0xc7 ),
-				 BIGINT ( 0xac, 0xc1 ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0x8e, 0xcd, 0x74 ),
-				 BIGINT ( 0xe2, 0xf1, 0xea ),
-				 BIGINT ( 0x59, 0x51, 0x53 ),
-				 BIGINT ( 0x22, 0xdd, 0x1c ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0xc2, 0xa8, 0x40, 0x6f ),
-				 BIGINT ( 0x29, 0xd7, 0xf4, 0x77 ),
-				 BIGINT ( 0xbb, 0xbd, 0xdb, 0x3d ),
-				 BIGINT ( 0x8f, 0x39, 0xd0, 0x47 ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0x2e, 0xcb, 0x74, 0x7c, 0x64, 0x60,
-					  0xb3, 0x44, 0xf3, 0x23, 0x49, 0x4a,
-					  0xc6, 0xb6, 0xbf, 0xea, 0x80, 0xd8,
-					  0x34, 0xc5, 0x54, 0x22, 0x09 ),
-				 BIGINT ( 0x61, 0x2c, 0x5a, 0xc5, 0xde, 0x07,
-					  0x65, 0x8e, 0xab, 0x88, 0x1a, 0x2e,
-					  0x7a, 0x95, 0x17, 0xe3, 0x3b, 0x17,
-					  0xe4, 0x21, 0xb0, 0xb4, 0x57 ),
-				 BIGINT ( 0x8e, 0x46, 0xa5, 0x87, 0x7b, 0x7f,
-					  0xc4, 0xd7, 0x31, 0xb1, 0x94, 0xe7,
-					  0xe7, 0x1c, 0x7e, 0x7a, 0xc2, 0x6c,
-					  0xce, 0xcb, 0xc8, 0x5d, 0x70 ),
-				 BIGINT ( 0x1e, 0xd1, 0x5b, 0x3d, 0x1d, 0x17,
-					  0x7c, 0x31, 0x95, 0x13, 0x1b, 0xd8,
-					  0xee, 0x0a, 0xb0, 0xe1, 0x5b, 0x13,
-					  0xad, 0x83, 0xe9, 0xf8, 0x7f ) );
-	bigint_mod_multiply_ok ( BIGINT ( 0x56, 0x37, 0xab, 0x07, 0x8b, 0x25,
-					  0xa7, 0xc2, 0x50, 0x30, 0x43, 0xfc,
-					  0x63, 0x8b, 0xdf, 0x84, 0x68, 0x85,
-					  0xca, 0xce, 0x44, 0x5c, 0xb1, 0x14,
-					  0xa4, 0xb5, 0xba, 0x43, 0xe0, 0x31,
-					  0x45, 0x6b, 0x82, 0xa9, 0x0b, 0x9e,
-					  0x3a, 0xb0, 0x39, 0x09, 0x2a, 0x68,
-					  0x2e, 0x0f, 0x09, 0x54, 0x47, 0x04,
-					  0xdb, 0xcf, 0x4a, 0x3a, 0x2d, 0x7b,
-					  0x7d, 0x50, 0xa4, 0xc5, 0xeb, 0x13,
-					  0xdd, 0x49, 0x61, 0x7d, 0x18, 0xa1,
-					  0x0d, 0x6b, 0x58, 0xba, 0x9f, 0x7c,
-					  0x81, 0x34, 0x9e, 0xf9, 0x9c, 0x9e,
-					  0x28, 0xa8, 0x1c, 0x15, 0x16, 0x20,
-					  0x3c, 0x0a, 0xb1, 0x11, 0x06, 0x93,
-					  0xbc, 0xd8, 0x4e, 0x49, 0xae, 0x7b,
-					  0xb4, 0x02, 0x8b, 0x1c, 0x5b, 0x18,
-					  0xb4, 0xac, 0x7f, 0xdd, 0x70, 0xef,
-					  0x87, 0xac, 0x1b, 0xac, 0x25, 0xa3,
-					  0xc9, 0xa7, 0x3a, 0xc5, 0x76, 0x68,
-					  0x09, 0x1f, 0xa1, 0x48, 0x53, 0xb6,
-					  0x13, 0xac ),
-				 BIGINT ( 0xef, 0x5c, 0x1f, 0x1a, 0x44, 0x64,
-					  0x66, 0xcf, 0xdd, 0x3f, 0x0b, 0x27,
-					  0x81, 0xa7, 0x91, 0x7a, 0x35, 0x7b,
-					  0x0f, 0x46, 0x5e, 0xca, 0xbf, 0xf8,
-					  0x50, 0x5e, 0x99, 0x7c, 0xc6, 0x64,
-					  0x43, 0x00, 0x9f, 0xb2, 0xda, 0xfa,
-					  0x42, 0x15, 0x9c, 0xa3, 0xd6, 0xc8,
-					  0x64, 0xa7, 0x65, 0x4a, 0x98, 0xf7,
-					  0xb3, 0x96, 0x5f, 0x42, 0xf9, 0x73,
-					  0xe1, 0x75, 0xc3, 0xc4, 0x0b, 0x5d,
-					  0x5f, 0xf3, 0x04, 0x8a, 0xee, 0x59,
-					  0xa6, 0x1b, 0x06, 0x38, 0x0b, 0xa2,
-					  0x9f, 0xb4, 0x4f, 0x6d, 0x50, 0x5e,
-					  0x37, 0x37, 0x21, 0x83, 0x9d, 0xa3,
-					  0x12, 0x16, 0x4d, 0xab, 0x36, 0x51,
-					  0x21, 0xb1, 0x74, 0x66, 0x40, 0x9a,
-					  0xd3, 0x72, 0xcc, 0x18, 0x40, 0x53,
-					  0x89, 0xff, 0xd7, 0x00, 0x8d, 0x7e,
-					  0x93, 0x81, 0xdb, 0x29, 0xb6, 0xd7,
-					  0x23, 0x2b, 0x67, 0x2f, 0x11, 0x98,
-					  0x49, 0x87, 0x2f, 0x46, 0xb7, 0x33,
-					  0x6d, 0x12 ),
-				 BIGINT ( 0x67, 0x7a, 0x17, 0x6a, 0xd2, 0xf8,
-					  0x49, 0xfb, 0x7c, 0x95, 0x25, 0x54,
-					  0xf0, 0xab, 0x5b, 0xb3, 0x0e, 0x01,
-					  0xab, 0xd3, 0x65, 0x6f, 0x7e, 0x18,
-					  0x05, 0xed, 0x9b, 0xc4, 0x90, 0x6c,
-					  0xd0, 0x6d, 0x94, 0x79, 0x28, 0xd6,
-					  0x24, 0x77, 0x9a, 0x08, 0xd2, 0x2f,
-					  0x7c, 0x2d, 0xa0, 0x0c, 0x14, 0xbe,
-					  0x7b, 0xee, 0x9e, 0x48, 0x88, 0x3c,
-					  0x8f, 0x9f, 0xb9, 0x7a, 0xcb, 0x98,
-					  0x76, 0x61, 0x0d, 0xee, 0xa2, 0x42,
-					  0x67, 0x1b, 0x2c, 0x42, 0x8f, 0x41,
-					  0xcc, 0x78, 0xba, 0xba, 0xaa, 0xa2,
-					  0x92, 0xb0, 0x6e, 0x0c, 0x4e, 0xe1,
-					  0xa5, 0x13, 0x7d, 0x8a, 0x8f, 0x81,
-					  0x95, 0x8a, 0xdf, 0x57, 0x93, 0x88,
-					  0x27, 0x4f, 0x1a, 0x59, 0xa4, 0x74,
-					  0x22, 0xa9, 0x78, 0xe5, 0xed, 0xb1,
-					  0x09, 0x26, 0x59, 0xde, 0x88, 0x21,
-					  0x8d, 0xa2, 0xa8, 0x58, 0x10, 0x7b,
-					  0x65, 0x96, 0xbf, 0x69, 0x3b, 0xc5,
-					  0x55, 0xf8 ),
-				 BIGINT ( 0x15, 0xf7, 0x00, 0xeb, 0xc7, 0x5a,
-					  0x6f, 0xf0, 0x50, 0xf3, 0x21, 0x8a,
-					  0x8e, 0xa6, 0xf6, 0x67, 0x56, 0x7d,
-					  0x07, 0x45, 0x89, 0xdb, 0xd7, 0x7e,
-					  0x9e, 0x28, 0x7f, 0xfb, 0xed, 0xca,
-					  0x2c, 0xbf, 0x47, 0x77, 0x99, 0x95,
-					  0xf3, 0xd6, 0x9d, 0xc5, 0x57, 0x81,
-					  0x7f, 0x97, 0xf2, 0x6b, 0x24, 0xee,
-					  0xce, 0xc5, 0x9b, 0xe6, 0x42, 0x2d,
-					  0x37, 0xb7, 0xeb, 0x3d, 0xb5, 0xf7,
-					  0x1e, 0x86, 0xc2, 0x40, 0x44, 0xc9,
-					  0x85, 0x5a, 0x1a, 0xc0, 0xac, 0x9e,
-					  0x78, 0x69, 0x00, 0x7b, 0x93, 0x65,
-					  0xd7, 0x7f, 0x0c, 0xd6, 0xba, 0x4f,
-					  0x06, 0x00, 0x61, 0x05, 0xb2, 0x44,
-					  0xb4, 0xe7, 0xbb, 0x3b, 0x96, 0xb0,
-					  0x6d, 0xe8, 0x43, 0xd2, 0x03, 0xb7,
-					  0x0a, 0xc4, 0x6d, 0x30, 0xd8, 0xd5,
-					  0xe6, 0x54, 0x65, 0xdd, 0xa9, 0x1b,
-					  0x50, 0xc0, 0xb9, 0x95, 0xb0, 0x7d,
-					  0x7c, 0xca, 0x63, 0xf8, 0x72, 0xbe,
-					  0x3b, 0x00 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xcd ),
-			    BIGINT ( 0xbb ),
-			    BIGINT ( 0x25 ),
-			    BIGINT ( 0xab ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xc4 ),
-			    BIGINT ( 0xe9 ),
-			    BIGINT ( 0x02, 0x4c ),
-			    BIGINT ( 0x7e ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xcb ),
-			    BIGINT ( 0xde ),
-			    BIGINT ( 0xbd, 0x73, 0xbf ),
-			    BIGINT ( 0x17 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x17 ),
-			    BIGINT ( 0xb9 ),
-			    BIGINT ( 0x39, 0x68, 0xba, 0x7d ),
-			    BIGINT ( 0x17 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x2e ),
-			    BIGINT ( 0xb7 ),
-			    BIGINT ( 0x39, 0x07, 0x1b, 0x49, 0x5b, 0xea,
-				     0xf2, 0x61, 0x75, 0x94, 0x60, 0x86,
-				     0x73, 0xd0, 0xeb, 0x11, 0x08, 0x19,
-				     0x90, 0x19, 0xe0, 0xed, 0x2a ),
-			    BIGINT ( 0x19 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x59 ),
-			    BIGINT ( 0xce ),
-			    BIGINT ( 0xdf, 0xbc, 0x0d, 0x0c, 0x09, 0xeb,
-				     0xf8, 0xcf, 0xdb, 0xb6, 0x00, 0xa3,
-				     0x9e, 0xc3, 0x6c, 0x8d, 0xf1, 0xc3,
-				     0x03, 0x36, 0xaa, 0xd4, 0x22, 0x7c,
-				     0x20, 0x7b, 0xa9, 0x9a, 0x01, 0xe4,
-				     0xf2, 0x50, 0x42, 0x29, 0x68, 0x7a,
-				     0xa6, 0x2c, 0xdf, 0xb6, 0x51, 0xa9,
-				     0x73, 0x10, 0x98, 0x37, 0x69, 0xb3,
-				     0x21, 0x49, 0x6d, 0xcc, 0x80, 0xfa,
-				     0x7e, 0x12, 0xe4, 0x9c, 0xc2, 0xbb,
-				     0xe3, 0xa3, 0x10, 0x3f, 0xba, 0x99,
-				     0x22, 0x79, 0x71, 0x39, 0x96, 0x7b,
-				     0x1a, 0x89, 0xdc, 0xda, 0x43, 0x52,
-				     0x50, 0x7b, 0xe3, 0x8c, 0xd3, 0xc0,
-				     0xf5, 0x7d, 0xfc, 0x80, 0x71, 0x6e,
-				     0xaf, 0x5c, 0xd0, 0x14, 0xc0, 0x60,
-				     0x24, 0xa8, 0x9a, 0x8a, 0x54, 0x4a,
-				     0x6f, 0x42, 0x7a, 0x14, 0x14, 0x25,
-				     0xd5, 0x22, 0x08, 0x8f, 0xd9, 0xdb,
-				     0xd4, 0x0f, 0x14, 0xf4, 0x3b, 0x26,
-				     0x0e, 0xb6, 0x72, 0xd7, 0x03, 0xd5,
-				     0xf0, 0x0e ),
-			    BIGINT ( 0xa9 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x7f, 0x30 ),
-			    BIGINT ( 0x73, 0x74 ),
-			    BIGINT ( 0x75 ),
-			    BIGINT ( 0x4b, 0xe8 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x04, 0x6c ),
-			    BIGINT ( 0x99, 0x04 ),
-			    BIGINT ( 0x33, 0xd2 ),
-			    BIGINT ( 0x86, 0x74 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xca, 0x88 ),
-			    BIGINT ( 0xdc, 0x60 ),
-			    BIGINT ( 0x7e, 0x76, 0x79 ),
-			    BIGINT ( 0x42, 0x40 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x68, 0x97 ),
-			    BIGINT ( 0x52, 0x8b ),
-			    BIGINT ( 0x4f, 0x7f, 0xe7, 0xda ),
-			    BIGINT ( 0x22, 0x77 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xbd, 0x14 ),
-			    BIGINT ( 0x9e, 0xfc ),
-			    BIGINT ( 0x23, 0xf7, 0xd0, 0xa1, 0x9e, 0x9b,
-				     0x05, 0xd2, 0x44, 0x24, 0x4f, 0x3f,
-				     0x83, 0xcc, 0x49, 0x70, 0xa5, 0x0d,
-				     0xfc, 0xa7, 0x43, 0xf3, 0x3e ),
-			    BIGINT ( 0x1a, 0xc8 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x46, 0x3e ),
-			    BIGINT ( 0xb8, 0xde ),
-			    BIGINT ( 0xa9, 0xc0, 0xdc, 0x45, 0x65, 0x0d,
-				     0xa5, 0x56, 0x70, 0x4c, 0xf1, 0xda,
-				     0xab, 0x64, 0xc2, 0x04, 0xf6, 0x32,
-				     0x20, 0x68, 0x31, 0x5f, 0x9a, 0x00,
-				     0x0f, 0x7b, 0x24, 0x33, 0xdf, 0xaf,
-				     0xfe, 0x03, 0x1e, 0x4a, 0xa1, 0xf8,
-				     0x45, 0x8d, 0x5a, 0x7d, 0x12, 0x58,
-				     0x00, 0x6d, 0xba, 0x79, 0x9f, 0xe1,
-				     0xa1, 0xfc, 0x1f, 0xb9, 0xf3, 0xa7,
-				     0x07, 0xf5, 0xfe, 0xd6, 0xa1, 0xba,
-				     0xda, 0x63, 0xef, 0x39, 0x8e, 0xb7,
-				     0x48, 0xa8, 0x81, 0x86, 0xb1, 0x22,
-				     0x14, 0x9f, 0x9e, 0xac, 0x69, 0xf7,
-				     0xae, 0x1f, 0xf2, 0x99, 0x41, 0xb7,
-				     0x37, 0xa7, 0xbc, 0x42, 0xf2, 0x45,
-				     0x43, 0xf2, 0x2a, 0xef, 0xc2, 0x83,
-				     0xd5, 0x32, 0x6e, 0xfa, 0x49, 0x1c,
-				     0x94, 0x9c, 0xc2, 0xc5, 0xad, 0x28,
-				     0x53, 0x1c, 0x11, 0xc4, 0x1c, 0x78,
-				     0x8f, 0x13, 0xdc, 0xb3, 0x2a, 0x63,
-				     0xfd, 0x1f, 0x89, 0x9b, 0x0c, 0x31,
-				     0x92, 0x73 ),
-			    BIGINT ( 0x7b, 0x8a ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xf3, 0xc3, 0xab ),
-			    BIGINT ( 0xd0, 0x7e, 0xd0 ),
-			    BIGINT ( 0xf6 ),
-			    BIGINT ( 0x1f, 0xb3, 0x09 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x13, 0xec, 0xf6 ),
-			    BIGINT ( 0x87, 0x1a, 0x9a ),
-			    BIGINT ( 0x03, 0xf3 ),
-			    BIGINT ( 0x15, 0xe9, 0x8e ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x5a, 0x96, 0xe5 ),
-			    BIGINT ( 0x56, 0x4a, 0xd1 ),
-			    BIGINT ( 0x89, 0x62, 0x8e ),
-			    BIGINT ( 0x34, 0xb8, 0xaa ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x84, 0x7c, 0xbd ),
-			    BIGINT ( 0x3c, 0x80, 0x0a ),
-			    BIGINT ( 0x5e, 0x52, 0x9d, 0xba ),
-			    BIGINT ( 0x04, 0xcb, 0x4f ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x50, 0x01, 0x51 ),
-			    BIGINT ( 0x02, 0xe6, 0x96 ),
-			    BIGINT ( 0x34, 0x0c, 0x7e, 0xbf, 0x27, 0x23,
-				     0x46, 0x92, 0x1c, 0xca, 0x91, 0xab,
-				     0x50, 0x2c, 0x3a, 0x64, 0xc8, 0x4a,
-				     0x75, 0xd6, 0xe2, 0xde, 0x31 ),
-			    BIGINT ( 0x02, 0x16, 0x05 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x5e, 0x47, 0xd8 ),
-			    BIGINT ( 0x26, 0xd1, 0xb6 ),
-			    BIGINT ( 0x49, 0x61, 0x84, 0x7a, 0xa9, 0xfb,
-				     0x93, 0x45, 0xe4, 0xfa, 0x53, 0x60,
-				     0x73, 0x98, 0x5a, 0x17, 0xe7, 0x77,
-				     0x2d, 0xcd, 0x97, 0xf4, 0xc0, 0x34,
-				     0x46, 0xfa, 0xbd, 0x21, 0xdf, 0xa5,
-				     0xa0, 0x12, 0x38, 0x7c, 0xbd, 0xd9,
-				     0xcd, 0xbc, 0xde, 0x29, 0xa5, 0x13,
-				     0xa8, 0xf0, 0xf6, 0x88, 0xc6, 0x31,
-				     0xed, 0x90, 0x19, 0x11, 0x7d, 0xe1,
-				     0x0e, 0x81, 0x98, 0x8e, 0x98, 0x86,
-				     0xde, 0x2a, 0x4c, 0xad, 0xff, 0x57,
-				     0x12, 0xbc, 0x4b, 0xaf, 0x21, 0xde,
-				     0xca, 0x3a, 0x25, 0xd7, 0x98, 0xe3,
-				     0x25, 0xbc, 0x17, 0x74, 0x0b, 0x9c,
-				     0x53, 0xe1, 0x1a, 0xec, 0x9a, 0x5a,
-				     0xdc, 0x68, 0xdf, 0xad, 0xd6, 0x71,
-				     0x6b, 0x5b, 0x8b, 0x85, 0xbb, 0xe5,
-				     0xd5, 0x14, 0x4c, 0x30, 0x27, 0x68,
-				     0xd1, 0xf7, 0x58, 0x34, 0x4c, 0xe1,
-				     0x71, 0xde, 0x7b, 0x8d, 0xa2, 0xe6,
-				     0x0a, 0x44, 0x22, 0x26, 0x5a, 0x70,
-				     0xbb, 0x68 ),
-			    BIGINT ( 0x18, 0x36, 0x96 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xc7, 0x4a, 0xf0, 0x48 ),
-			    BIGINT ( 0x5d, 0x27, 0x07, 0x54 ),
-			    BIGINT ( 0x4a ),
-			    BIGINT ( 0x48, 0x68, 0x7b, 0xe0 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xb4, 0x89, 0xc9, 0x5b ),
-			    BIGINT ( 0x7c, 0xd7, 0xc7, 0xff ),
-			    BIGINT ( 0xc6, 0x9c ),
-			    BIGINT ( 0x0b, 0x2d, 0xf8, 0xf7 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xea, 0x72, 0x43, 0xfe ),
-			    BIGINT ( 0xfc, 0x57, 0x2d, 0x47 ),
-			    BIGINT ( 0x60, 0x01, 0x2c ),
-			    BIGINT ( 0x12, 0x01, 0xe3, 0xf5 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x81, 0x7f, 0x27, 0x94 ),
-			    BIGINT ( 0x17, 0x21, 0x67, 0xab ),
-			    BIGINT ( 0x50, 0x19, 0x12, 0x52 ),
-			    BIGINT ( 0x05, 0x17, 0x6b, 0x13 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x38, 0xab, 0xd4, 0xec ),
-			    BIGINT ( 0x0c, 0x2a, 0x56, 0x38 ),
-			    BIGINT ( 0x2f, 0x85, 0x85, 0x57, 0xf6, 0xde,
-				     0x24, 0xb4, 0x28, 0x3c, 0x5a, 0x3c,
-				     0x0b, 0x12, 0x85, 0x85, 0x85, 0x98,
-				     0x46, 0x5b, 0x9c, 0x52, 0x3a ),
-			    BIGINT ( 0x02, 0xe6, 0x6a, 0x70 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xa6, 0x35, 0xc0, 0x6f ),
-			    BIGINT ( 0x23, 0xac, 0x78, 0x72 ),
-			    BIGINT ( 0x6a, 0x07, 0x80, 0xbf, 0x1b, 0xa5,
-				     0xf8, 0x0b, 0x90, 0x06, 0xa4, 0xa5,
-				     0x44, 0x13, 0xba, 0x4b, 0xb3, 0xce,
-				     0x9f, 0x55, 0x42, 0x56, 0xc3, 0x30,
-				     0x82, 0x85, 0x5a, 0x3b, 0xae, 0x88,
-				     0x92, 0x4e, 0x3c, 0x37, 0xf6, 0x80,
-				     0x4c, 0x03, 0x3c, 0x1e, 0x2c, 0x17,
-				     0xef, 0x9d, 0xd7, 0x6f, 0xdc, 0xbb,
-				     0x42, 0x42, 0xa1, 0x7f, 0x97, 0x66,
-				     0xcd, 0xc8, 0x8a, 0x7c, 0xc6, 0x70,
-				     0x61, 0x54, 0x82, 0xd0, 0xd0, 0x8b,
-				     0xd5, 0x4f, 0x57, 0x7b, 0x8e, 0xab,
-				     0xdc, 0xbf, 0x8e, 0x85, 0x94, 0x83,
-				     0x8a, 0xb3, 0x72, 0x69, 0x2d, 0x51,
-				     0xdd, 0x86, 0x1e, 0x58, 0xb8, 0x00,
-				     0xe2, 0x5e, 0xa7, 0xef, 0x6a, 0x6a,
-				     0xb0, 0x10, 0x3d, 0x53, 0xfe, 0x23,
-				     0x51, 0xc0, 0x51, 0xed, 0x1f, 0x02,
-				     0x4b, 0x73, 0x17, 0x59, 0xfa, 0xb9,
-				     0xa8, 0x05, 0xa7, 0x79, 0xc3, 0xc9,
-				     0x4c, 0x2d, 0x58, 0x59, 0x10, 0x99,
-				     0x71, 0xe6 ),
-			    BIGINT ( 0x01, 0x63, 0xd0, 0x07 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xff, 0x2a, 0x37, 0x04, 0xd4, 0x08,
-				     0x9f, 0xf5, 0xac, 0x29, 0x7f, 0x4b,
-				     0x93, 0x86, 0x02, 0x26, 0xac, 0x29,
-				     0xa8, 0xf9, 0x77, 0x91, 0x20 ),
-			    BIGINT ( 0x2c, 0xb2, 0xe2, 0x1f, 0x4b, 0x97,
-				     0xaa, 0x3b, 0xd1, 0x36, 0xb0, 0x40,
-				     0x8b, 0x1c, 0x19, 0xa2, 0xea, 0xc8,
-				     0xc6, 0x4e, 0x2a, 0x66, 0x50 ),
-			    BIGINT ( 0x97 ),
-			    BIGINT ( 0x04, 0x22, 0x44, 0xe2, 0x14, 0x54,
-				     0x6c, 0x5a, 0xba, 0x1b, 0x39, 0xb7,
-				     0xaa, 0x06, 0xcf, 0x2b, 0xc8, 0x7e,
-				     0xc0, 0xe0, 0x70, 0xf2, 0x90 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xcd, 0xf3, 0xf7, 0x50, 0x13, 0x39,
-				     0x13, 0x4a, 0x56, 0xc5, 0xb8, 0xa6,
-				     0x42, 0x2d, 0x40, 0x5e, 0x07, 0xf2,
-				     0x92, 0x2a, 0x51, 0x87, 0x20 ),
-			    BIGINT ( 0x93, 0x1a, 0x28, 0xbb, 0x69, 0x4f,
-				     0x31, 0x01, 0xe0, 0x88, 0x8a, 0x4c,
-				     0x4f, 0x9b, 0xda, 0xf6, 0x4e, 0xf3,
-				     0x11, 0xe7, 0x35, 0xa1, 0xfb ),
-			    BIGINT ( 0x66, 0x69 ),
-			    BIGINT ( 0x7a, 0x5a, 0x9b, 0x84, 0x72, 0x8f,
-				     0x57, 0x31, 0xb4, 0x34, 0x70, 0x18,
-				     0x77, 0xa6, 0x43, 0xa9, 0x51, 0x69,
-				     0x07, 0x3e, 0xf6, 0x68, 0x82 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xdd, 0x4c, 0x85, 0xcb, 0x3f, 0x45,
-				     0x61, 0xe0, 0x58, 0x1e, 0xad, 0xd3,
-				     0x6b, 0xef, 0x82, 0x53, 0x4a, 0x16,
-				     0x1a, 0xf0, 0x09, 0x82, 0x74 ),
-			    BIGINT ( 0xd2, 0xa2, 0x73, 0x89, 0x0c, 0x56,
-				     0xe4, 0x31, 0xdf, 0x70, 0x3c, 0x40,
-				     0x0d, 0x36, 0xfc, 0x4a, 0xf3, 0xa2,
-				     0x8f, 0x9a, 0x9d, 0xaa, 0xb0 ),
-			    BIGINT ( 0xbc, 0xca, 0x45 ),
-			    BIGINT ( 0x9f, 0x5f, 0x7c, 0xac, 0x5e, 0xc7,
-				     0xf2, 0xc5, 0x72, 0x3d, 0xff, 0x29,
-				     0xd2, 0x25, 0xa9, 0x64, 0x5b, 0xbe,
-				     0x63, 0x63, 0xc6, 0x84, 0x20 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xf8, 0xc9, 0xb9, 0x3d, 0xe1, 0xff,
-				     0xa6, 0x8e, 0xb0, 0xd2, 0xa9, 0xa9,
-				     0xc1, 0x5c, 0xc5, 0x94, 0x90, 0xb9,
-				     0xca, 0x2f, 0x1a, 0xbd, 0x21 ),
-			    BIGINT ( 0xa7, 0xf4, 0xb0, 0x3c, 0xf4, 0x2b,
-				     0x9d, 0x40, 0x5f, 0xfd, 0x2e, 0x28,
-				     0xa9, 0x23, 0x01, 0xaf, 0x0b, 0x73,
-				     0xaa, 0xcf, 0x14, 0xdc, 0xd8 ),
-			    BIGINT ( 0x31, 0xe2, 0xe8, 0xf0 ),
-			    BIGINT ( 0x53, 0x30, 0xc6, 0x10, 0x12, 0x7c,
-				     0xb3, 0x91, 0x15, 0x5f, 0x01, 0x62,
-				     0xec, 0x1f, 0x15, 0x61, 0x3b, 0x9a,
-				     0x76, 0x22, 0xf8, 0x31, 0xb1 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xff, 0x8c, 0x04, 0x74, 0x3e, 0x93,
-				     0xfd, 0xce, 0xd5, 0x7f, 0xc5, 0x58,
-				     0xce, 0x00, 0x53, 0x44, 0x02, 0xf4,
-				     0xfd, 0x01, 0xc3, 0xb0, 0x3c ),
-			    BIGINT ( 0x2f, 0xbe, 0xb3, 0x2d, 0xd6, 0x59,
-				     0x69, 0x44, 0xc0, 0xd4, 0x27, 0x9c,
-				     0xff, 0x53, 0x9e, 0x66, 0x2c, 0x01,
-				     0x3a, 0x96, 0x5d, 0x75, 0xc1 ),
-			    BIGINT ( 0x47, 0x3e, 0xb2, 0x81, 0x51, 0x9a,
-				     0xdf, 0x75, 0xba, 0xa5, 0x19, 0xc1,
-				     0xc7, 0xcc, 0xae, 0x82, 0x9c, 0x3e,
-				     0xfd, 0x7f, 0xb0, 0xd7, 0x00 ),
-			    BIGINT ( 0x09, 0x9c, 0xd0, 0x49, 0x1d, 0x88,
-				     0xd8, 0x08, 0x45, 0x61, 0x71, 0xa1,
-				     0xb5, 0xab, 0xa9, 0x5b, 0xa8, 0xf1,
-				     0xc6, 0x53, 0x68, 0x8f, 0x3e ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xd8, 0x78, 0xad, 0x80, 0x81, 0xf1,
-				     0x84, 0x23, 0x82, 0x5d, 0x49, 0x46,
-				     0x75, 0xfd, 0xd1, 0x49, 0x53, 0x10,
-				     0x4d, 0x10, 0xab, 0x0f, 0xf0 ),
-			    BIGINT ( 0x78, 0x3d, 0x09, 0x1b, 0xea, 0xa4,
-				     0xb9, 0x13, 0xf8, 0xb5, 0xb5, 0x5e,
-				     0x69, 0xa4, 0xe1, 0xfd, 0x88, 0x58,
-				     0x26, 0xb3, 0x76, 0xa2, 0x38 ),
-			    BIGINT ( 0x3b, 0x12, 0xe0, 0x8e, 0xa2, 0x2f,
-				     0x2a, 0x2b, 0xb1, 0x78, 0xf9, 0xf6,
-				     0x93, 0x4d, 0x52, 0x82, 0x29, 0x2d,
-				     0xe4, 0x36, 0x92, 0x49, 0xc1, 0x25,
-				     0x6e, 0x26, 0xe6, 0x6e, 0xc2, 0x4d,
-				     0xea, 0x13, 0x86, 0x85, 0x71, 0x4d,
-				     0x85, 0x70, 0xf9, 0x2b, 0xa0, 0x0f,
-				     0x96, 0xe5, 0x63, 0x7a, 0xb4, 0x25,
-				     0x53, 0x1a, 0xd8, 0x30, 0x36, 0xba,
-				     0x6e, 0x2e, 0xce, 0x2d, 0x8f, 0x32,
-				     0xe9, 0xdc, 0x91, 0x9e, 0xd4, 0xf1,
-				     0x3b, 0x40, 0xc9, 0xf4, 0x97, 0x74,
-				     0x5e, 0x69, 0xcd, 0x34, 0x4a, 0x18,
-				     0x65, 0xe5, 0x07, 0xb5, 0x9e, 0x2a,
-				     0xc4, 0xeb, 0xb6, 0x96, 0x7b, 0x99,
-				     0x0c, 0xe4, 0xb3, 0x85, 0xff, 0x17,
-				     0x72, 0x5d, 0xf6, 0x30, 0xb4, 0xff,
-				     0x98, 0xe6, 0xf6, 0x31, 0x24, 0x82,
-				     0x91, 0xa6, 0x18, 0x6d, 0x0b, 0x84,
-				     0x6f, 0x5f, 0x64, 0xa3, 0xdf, 0x92,
-				     0x06, 0x16, 0xe3, 0x7c, 0x08, 0x61,
-				     0x77, 0xce ),
-			    BIGINT ( 0x17, 0xc9, 0xc5, 0x38, 0x4c, 0x15,
-				     0x0f, 0x4e, 0xc2, 0x90, 0x3b, 0x46,
-				     0x7b, 0x2f, 0x95, 0x82, 0xfe, 0x51,
-				     0x95, 0x2b, 0xff, 0xd5, 0x28 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x69, 0xa3, 0x7e, 0x24, 0xdf, 0x9e,
-				     0x0b, 0x3e, 0x3f, 0x43, 0x06, 0x0e,
-				     0x1d, 0x57, 0x74, 0xe0, 0xa0, 0x5b,
-				     0x82, 0xca, 0xb0, 0x33, 0x8b, 0xe4,
-				     0x39, 0x27, 0x41, 0xd4, 0x2e, 0x30,
-				     0x3a, 0x0e, 0x62, 0x6f, 0xfa, 0xb4,
-				     0x02, 0x88, 0x70, 0x35, 0xa6, 0xea,
-				     0x7d, 0xb2, 0x87, 0xc3, 0xa5, 0x50,
-				     0x49, 0x38, 0xa4, 0x68, 0xa9, 0xe4,
-				     0xa6, 0xcc, 0xd7, 0x13, 0xb1, 0xd9,
-				     0x1c, 0x6a, 0x9a, 0xb8, 0x6c, 0x9b,
-				     0xff, 0xcd, 0x2c, 0xb3, 0xbd, 0xe2,
-				     0xfd, 0x1f, 0x08, 0xdd, 0xc6, 0xee,
-				     0x18, 0x0c, 0xa5, 0xcd, 0x09, 0x19,
-				     0x51, 0x51, 0xa5, 0x6f, 0x93, 0x1b,
-				     0x34, 0xfd, 0x8f, 0xd9, 0x87, 0xed,
-				     0x15, 0x7e, 0x36, 0x60, 0xdd, 0x1b,
-				     0xf4, 0xcc, 0xc4, 0x4c, 0x19, 0x2b,
-				     0xd6, 0x1e, 0xec, 0x51, 0xe9, 0x27,
-				     0xe9, 0xbd, 0x6a, 0x3f, 0x91, 0x45,
-				     0xc3, 0x6d, 0x40, 0x7e, 0x6c, 0x56,
-				     0x05, 0x5a ),
-			    BIGINT ( 0x5c, 0x96, 0x05, 0x81, 0x94, 0x45,
-				     0xcf, 0x47, 0x5f, 0x1b, 0xb0, 0xf9,
-				     0xef, 0x13, 0x8f, 0xcc, 0x71, 0xfd,
-				     0x50, 0xf1, 0xe7, 0x62, 0x6e, 0xfa,
-				     0x48, 0x66, 0x1c, 0xf7, 0xef, 0x09,
-				     0x12, 0xa2, 0xfd, 0x17, 0xb7, 0x6a,
-				     0x3b, 0xed, 0xf7, 0x86, 0xd2, 0xbe,
-				     0x95, 0x90, 0xc6, 0x00, 0x14, 0x8d,
-				     0xe3, 0x27, 0xbe, 0x03, 0x7c, 0x9e,
-				     0x6b, 0x51, 0x31, 0x8d, 0x18, 0xc4,
-				     0x16, 0xd2, 0x84, 0x63, 0x9b, 0xe9,
-				     0xa4, 0xf8, 0xff, 0x70, 0x4d, 0xeb,
-				     0x6f, 0x4a, 0xb7, 0x5b, 0x54, 0xf1,
-				     0xb5, 0xbe, 0x78, 0xb6, 0xfd, 0x8b,
-				     0xe1, 0x39, 0x62, 0x85, 0x9b, 0xde,
-				     0x30, 0xa8, 0xe4, 0x37, 0x52, 0x57,
-				     0x39, 0x79, 0xdb, 0x0b, 0x19, 0x6b,
-				     0xc9, 0x17, 0xfd, 0x8c, 0x2c, 0xaa,
-				     0xa4, 0xf1, 0x04, 0xd1, 0xd3, 0x2f,
-				     0xbb, 0x3a, 0x36, 0x82, 0x31, 0xa4,
-				     0x40, 0xd4, 0x87, 0x46, 0xe3, 0x6e,
-				     0xd0, 0x17 ),
-			    BIGINT ( 0x93 ),
-			    BIGINT ( 0x0d, 0x39, 0x92, 0x57, 0xaa, 0x6d,
-				     0xfc, 0x3b, 0x10, 0x18, 0x6d, 0x59,
-				     0xbe, 0x31, 0x8f, 0xee, 0xf9, 0x82,
-				     0x84, 0xe0, 0xdf, 0xa5, 0x00, 0x28,
-				     0xd1, 0x64, 0x6b, 0x4b, 0x43, 0x3b,
-				     0x76, 0x3e, 0x6b, 0xc4, 0xe4, 0xf5,
-				     0x0b, 0x59, 0x5a, 0xe4, 0x53, 0x5e,
-				     0x02, 0xd4, 0xde, 0x72, 0xd3, 0xa3,
-				     0x58, 0x66, 0xa7, 0xdd, 0x2b, 0x0b,
-				     0xa4, 0x83, 0xd0, 0xd9, 0xef, 0x29,
-				     0x3d, 0x2f, 0x97, 0xff, 0x9a, 0xc7,
-				     0xf6, 0x8a, 0x8d, 0x59, 0xef, 0x87,
-				     0xd1, 0xe6, 0xba, 0x4d, 0x99, 0xd9,
-				     0x5f, 0x5e, 0x7a, 0x7e, 0x67, 0x22,
-				     0x5b, 0x77, 0x83, 0xa2, 0x02, 0xfd,
-				     0xb2, 0xe4, 0xf6, 0x20, 0x4c, 0x12,
-				     0x20, 0xa7, 0xda, 0x5b, 0x3b, 0x8c,
-				     0xa2, 0xca, 0xda, 0x20, 0xaa, 0x27,
-				     0xe6, 0x54, 0x3e, 0xa8, 0x6f, 0x64,
-				     0x9d, 0xa7, 0x0d, 0x57, 0x1b, 0x21,
-				     0xff, 0xd2, 0xe2, 0xb2, 0x0a, 0x4f,
-				     0xb7, 0x0e ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x06, 0xcf, 0x54, 0xf2, 0x0d, 0x62,
-				     0x33, 0xdd, 0xe7, 0x4d, 0x7f, 0x2f,
-				     0x8e, 0x52, 0x73, 0xf4, 0x73, 0x68,
-				     0x4b, 0x13, 0x6e, 0x58, 0x6b, 0x4a,
-				     0xb8, 0x4c, 0xef, 0x73, 0xfe, 0x5f,
-				     0xf6, 0xd0, 0xbb, 0x82, 0x17, 0x3f,
-				     0x9d, 0x91, 0xf8, 0xa3, 0xb8, 0x79,
-				     0xef, 0x41, 0x38, 0xc1, 0xef, 0xc9,
-				     0xc6, 0xcf, 0x2a, 0xc3, 0xaa, 0x75,
-				     0x17, 0xda, 0xbc, 0x76, 0x29, 0x61,
-				     0x6d, 0x05, 0x79, 0x0b, 0x44, 0xb1,
-				     0x54, 0x75, 0xb7, 0xd9, 0xf6, 0xa8,
-				     0xbd, 0xf7, 0x85, 0xe0, 0xe7, 0x90,
-				     0x62, 0xce, 0x79, 0xfb, 0xc5, 0x23,
-				     0xa5, 0x09, 0xc0, 0xc4, 0x4d, 0xe7,
-				     0x9c, 0x49, 0x8f, 0x82, 0xf1, 0x31,
-				     0x34, 0x85, 0xdd, 0x3b, 0xbe, 0xe9,
-				     0x93, 0x19, 0x03, 0x75, 0x3f, 0xc4,
-				     0xa4, 0x0f, 0x52, 0x53, 0xc1, 0xcd,
-				     0x08, 0xb0, 0x05, 0x0c, 0xa2, 0x0c,
-				     0x3a, 0x72, 0xb2, 0x3c, 0xdb, 0x4f,
-				     0xac, 0xc6 ),
-			    BIGINT ( 0xe4, 0x40, 0xd8, 0x30, 0x00, 0xcf,
-				     0x4c, 0xfd, 0xda, 0xae, 0x90, 0xd3,
-				     0x5b, 0xc7, 0x20, 0xcc, 0x2b, 0xe2,
-				     0x0a, 0x39, 0x1e, 0xde, 0xef, 0x98,
-				     0x16, 0x3b, 0x9d, 0x36, 0x63, 0x0d,
-				     0x46, 0xed, 0x23, 0x6e, 0x38, 0xa8,
-				     0x15, 0xb5, 0xb1, 0xaf, 0x47, 0xb1,
-				     0xec, 0xaa, 0x8b, 0x57, 0xd6, 0xca,
-				     0x39, 0x2f, 0x62, 0xbd, 0xd5, 0xf8,
-				     0x98, 0x98, 0x5d, 0xfe, 0x14, 0xd6,
-				     0xdc, 0xe5, 0x98, 0x60, 0x5b, 0x16,
-				     0x92, 0xcb, 0xed, 0xb6, 0x9c, 0x5c,
-				     0x82, 0x40, 0x6b, 0xaa, 0x48, 0x7a,
-				     0xd4, 0xfe, 0xa3, 0xe7, 0x30, 0xf1,
-				     0x7c, 0xfb, 0x94, 0x2e, 0xeb, 0xb6,
-				     0x71, 0xe4, 0x33, 0x63, 0xc3, 0xb0,
-				     0x94, 0x6d, 0xee, 0xa5, 0x15, 0x3f,
-				     0x28, 0xf1, 0xfa, 0xdc, 0xf2, 0x13,
-				     0x0f, 0xc7, 0xd9, 0xe0, 0xbf, 0x1b,
-				     0x49, 0xee, 0x21, 0x8e, 0x26, 0xc9,
-				     0x28, 0x21, 0x86, 0x1d, 0x46, 0x33,
-				     0xd4, 0x69 ),
-			    BIGINT ( 0xd9, 0x87 ),
-			    BIGINT ( 0xdf, 0xff, 0xcc, 0xb7, 0xfe, 0x19,
-				     0x02, 0x92, 0x9d, 0xab, 0x33, 0xd2,
-				     0x21, 0xbc, 0xd3, 0xc4, 0x31, 0xad,
-				     0x4b, 0xb3, 0x16, 0x50, 0x96, 0xd9,
-				     0xdc, 0x88, 0x74, 0x60, 0xde, 0xdf,
-				     0xb7, 0x83, 0xdb, 0x22, 0xef, 0xcb,
-				     0xcb, 0xdb, 0x4c, 0xfb, 0x94, 0x4c,
-				     0x3f, 0xf5, 0xf5, 0x99, 0x85, 0x21,
-				     0x1a, 0x2b, 0xec, 0x90, 0x2d, 0xb4,
-				     0x20, 0x3c, 0x27, 0x9f, 0xe5, 0xb1,
-				     0x5c, 0x92, 0xfa, 0xb0, 0xa9, 0x8e,
-				     0x2c, 0x21, 0x8e, 0x8d, 0xe5, 0x55,
-				     0x84, 0x02, 0xa5, 0x15, 0x5c, 0x53,
-				     0x1f, 0x40, 0x81, 0x0a, 0x10, 0xde,
-				     0x21, 0x41, 0xa9, 0x97, 0xf8, 0x6f,
-				     0xbf, 0x42, 0x58, 0x9e, 0xc6, 0xdd,
-				     0x10, 0x33, 0x3f, 0xad, 0xe6, 0x8e,
-				     0x57, 0x27, 0x37, 0x20, 0xa4, 0x86,
-				     0xef, 0x39, 0x7b, 0x6f, 0x78, 0x77,
-				     0xab, 0xa0, 0x62, 0xe1, 0xfd, 0x9c,
-				     0xbe, 0xfa, 0x98, 0x2e, 0x29, 0xe3,
-				     0xeb, 0x52 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x00, 0x91, 0xb3, 0x87, 0xe6, 0x01,
-				     0x57, 0xe9, 0x68, 0xa4, 0xf4, 0x9b,
-				     0xea, 0x6a, 0x8a, 0x9e, 0x1a, 0x8b,
-				     0xd3, 0x85, 0x9d, 0xba, 0x85, 0xab,
-				     0xd8, 0xcd, 0x25, 0x56, 0x8e, 0x85,
-				     0x8a, 0x8e, 0x48, 0x9e, 0xb4, 0x90,
-				     0xc8, 0x2e, 0x07, 0x78, 0x80, 0x49,
-				     0xa0, 0xb7, 0x95, 0x6a, 0xd8, 0xad,
-				     0xb5, 0xda, 0x5d, 0xe6, 0x11, 0x87,
-				     0xb8, 0x33, 0x8f, 0xa8, 0x6f, 0x4e,
-				     0xc6, 0xc3, 0x0d, 0xf5, 0xa9, 0x4e,
-				     0xb2, 0x42, 0x53, 0x81, 0xcd, 0x33,
-				     0x83, 0x49, 0xab, 0x0d, 0x0e, 0xf5,
-				     0x2c, 0xcd, 0x84, 0x58, 0xf3, 0x30,
-				     0xa3, 0x6e, 0x3c, 0x3a, 0xc6, 0x77,
-				     0x43, 0xb0, 0xe7, 0x4b, 0x66, 0x30,
-				     0xe9, 0x48, 0x0b, 0x0d, 0x86, 0x3f,
-				     0xd8, 0xe2, 0xb5, 0x88, 0xc1, 0x44,
-				     0xb2, 0x6b, 0xb0, 0x7a, 0x35, 0x3b,
-				     0x56, 0x83, 0xb1, 0xac, 0x9e, 0xeb,
-				     0x9b, 0x08, 0x43, 0xac, 0x0a, 0x3a,
-				     0x31, 0x69 ),
-			    BIGINT ( 0x96, 0x6f, 0xb0, 0xa7, 0x02, 0xb5,
-				     0xd9, 0x19, 0xbe, 0x4b, 0x27, 0x65,
-				     0x5b, 0x96, 0xd4, 0x0b, 0x49, 0x70,
-				     0xf0, 0x09, 0x8e, 0xf2, 0x04, 0x85,
-				     0x93, 0xe9, 0x2e, 0x09, 0x31, 0x76,
-				     0x8b, 0xbb, 0xe9, 0xe1, 0x2b, 0x4f,
-				     0xed, 0x83, 0xa6, 0x87, 0xa3, 0x07,
-				     0x0a, 0x3d, 0x1c, 0x65, 0x14, 0x5a,
-				     0xd5, 0xc0, 0x5d, 0x3c, 0x31, 0x9a,
-				     0x83, 0xad, 0xca, 0x6a, 0x93, 0x0d,
-				     0x1a, 0x67, 0x4e, 0x68, 0x06, 0x64,
-				     0x53, 0x2e, 0x15, 0xd9, 0xdd, 0x5e,
-				     0xcb, 0xb7, 0x2e, 0xef, 0xd3, 0xbb,
-				     0x5f, 0xaf, 0xef, 0x9e, 0xf2, 0x7b,
-				     0x69, 0x15, 0xb0, 0x18, 0x6c, 0x67,
-				     0x10, 0xda, 0x33, 0x07, 0x48, 0x97,
-				     0x31, 0xb3, 0x3d, 0x3d, 0xc9, 0x2e,
-				     0x0b, 0x68, 0x91, 0x3f, 0x6a, 0x3b,
-				     0x1a, 0xdf, 0xa8, 0x69, 0x46, 0x1c,
-				     0xb2, 0x69, 0x08, 0x0b, 0x02, 0x1b,
-				     0x03, 0x64, 0xae, 0xb6, 0x2d, 0xc6,
-				     0xc4, 0x0a ),
-			    BIGINT ( 0x6d, 0x3f, 0xdd ),
-			    BIGINT ( 0x40, 0x6e, 0x9d, 0x3e, 0xeb, 0xa4,
-				     0xb1, 0x8d, 0xb7, 0xb4, 0x0f, 0x5b,
-				     0x12, 0xad, 0x27, 0x9e, 0xbd, 0xe7,
-				     0xe5, 0x9d, 0xec, 0xb4, 0xac, 0x23,
-				     0x5f, 0xa9, 0xec, 0x9c, 0xd1, 0x6a,
-				     0xbe, 0x99, 0xba, 0xb3, 0x66, 0x0e,
-				     0x17, 0xaa, 0x13, 0xa2, 0x2e, 0x01,
-				     0x28, 0xb1, 0x6c, 0xba, 0xad, 0x68,
-				     0x48, 0xf0, 0xf3, 0x4c, 0x08, 0x9f,
-				     0xd1, 0x9c, 0xb7, 0x75, 0xc5, 0xb6,
-				     0x5a, 0x05, 0xb0, 0x14, 0xd4, 0x61,
-				     0xea, 0x18, 0x9f, 0xe6, 0xe5, 0xe3,
-				     0xd4, 0xff, 0x35, 0x43, 0x0b, 0xb8,
-				     0xf6, 0xe9, 0x19, 0x7a, 0x88, 0xa7,
-				     0x4d, 0x01, 0x92, 0x05, 0xd2, 0x6e,
-				     0xa3, 0xc1, 0xb6, 0x66, 0x75, 0xb1,
-				     0x00, 0x0d, 0x42, 0x37, 0xcc, 0xca,
-				     0xc0, 0x8d, 0xc8, 0x7e, 0x5c, 0xc9,
-				     0x53, 0x81, 0x2f, 0xc4, 0x61, 0xb6,
-				     0x96, 0x3b, 0xa5, 0x04, 0x14, 0x1b,
-				     0xa7, 0x77, 0xa1, 0xbc, 0x73, 0x1d,
-				     0xad, 0xed ) );
-	bigint_mod_exp_ok ( BIGINT ( 0x45, 0xfb, 0xf3, 0xdc, 0x31, 0xe5,
-				     0x56, 0x7a, 0xee, 0x15, 0xfb, 0x16,
-				     0xee, 0x6e, 0x90, 0x3e, 0xa3, 0x89,
-				     0xc2, 0x6d, 0x9b, 0x06, 0x65, 0xd0,
-				     0xcd, 0xa2, 0xcc, 0x01, 0x60, 0x0d,
-				     0xd1, 0xdd, 0x68, 0x14, 0xc2, 0xcd,
-				     0xd8, 0x79, 0x75, 0xad, 0x0a, 0x9f,
-				     0x39, 0x5f, 0x52, 0x4b, 0x58, 0x31,
-				     0x48, 0xbb, 0x2a, 0xcc, 0xe0, 0x42,
-				     0x18, 0x32, 0xdc, 0x63, 0x14, 0x11,
-				     0x4e, 0xab, 0x96, 0x29, 0xc5, 0x06,
-				     0x79, 0xe5, 0x06, 0xf7, 0x59, 0xdb,
-				     0x1e, 0x51, 0xfd, 0xc4, 0x48, 0x3a,
-				     0x4c, 0x7f, 0xd0, 0xe2, 0x36, 0x86,
-				     0xc1, 0x8b, 0xc5, 0x86, 0x52, 0xe0,
-				     0xdb, 0x92, 0x5f, 0x0e, 0x19, 0xb1,
-				     0xa3, 0x23, 0xdd, 0xf0, 0x78, 0xcc,
-				     0x81, 0x3f, 0x4a, 0xe6, 0xb0, 0x32,
-				     0xd1, 0x5c, 0x5e, 0x3a, 0xb0, 0xd8,
-				     0xe2, 0x04, 0xc0, 0x30, 0x85, 0x1d,
-				     0x5e, 0x28, 0xee, 0xd9, 0xb3, 0x83,
-				     0x9f, 0xe2 ),
-			    BIGINT ( 0xb3, 0x2c, 0x2e, 0xc5, 0xba, 0xf8,
-				     0x41, 0x98, 0x79, 0x7e, 0xaa, 0x0c,
-				     0x2a, 0x8f, 0xd9, 0x56, 0x55, 0xaa,
-				     0x74, 0x60, 0x74, 0xd1, 0x49, 0x2c,
-				     0x6f, 0x0a, 0x4e, 0xf8, 0x3f, 0x1b,
-				     0x73, 0x4c, 0xe0, 0x17, 0x37, 0x06,
-				     0x76, 0x73, 0xd5, 0x2d, 0x4d, 0x3f,
-				     0xb0, 0x15, 0x7e, 0x98, 0xd0, 0xdf,
-				     0xf0, 0x33, 0x78, 0xe2, 0xe6, 0xec,
-				     0x21, 0x22, 0xad, 0xd5, 0xab, 0x2d,
-				     0x0d, 0x59, 0x95, 0x05, 0x34, 0x1f,
-				     0x51, 0xf5, 0xec, 0x93, 0x05, 0x15,
-				     0x37, 0xcf, 0x93, 0x03, 0xd7, 0xf6,
-				     0x35, 0x23, 0x8f, 0x33, 0xf6, 0xba,
-				     0x42, 0xc8, 0x52, 0x94, 0xd3, 0x33,
-				     0x3e, 0x39, 0x01, 0xd1, 0x55, 0x3f,
-				     0x48, 0x84, 0xe9, 0xbc, 0x0b, 0x0f,
-				     0xc9, 0x69, 0x41, 0x2c, 0x5f, 0x34,
-				     0xd0, 0xe6, 0x15, 0x50, 0x06, 0x64,
-				     0x5b, 0x8b, 0x71, 0x22, 0xb3, 0x3e,
-				     0x09, 0x9c, 0x76, 0x13, 0x9b, 0x29,
-				     0x57, 0x94 ),
-			    BIGINT ( 0xca, 0x94, 0xf7, 0xca ),
-			    BIGINT ( 0x83, 0x68, 0xb9, 0xe7, 0x91, 0xf3,
-				     0x3b, 0x5a, 0x0b, 0xb6, 0x1e, 0x2f,
-				     0x3f, 0x5f, 0xdc, 0x96, 0x5b, 0x7f,
-				     0x8d, 0xc5, 0x8e, 0xda, 0x6e, 0x21,
-				     0xe3, 0x20, 0xea, 0x37, 0x39, 0x3b,
-				     0xb4, 0xd7, 0xf6, 0xba, 0x61, 0xfe,
-				     0xdc, 0x7e, 0x82, 0x9a, 0x38, 0x7b,
-				     0xd5, 0xb1, 0x11, 0x98, 0xc4, 0x88,
-				     0x0b, 0x01, 0x7d, 0x81, 0xc9, 0x64,
-				     0x23, 0xc3, 0x3e, 0xf3, 0x67, 0x95,
-				     0x78, 0xca, 0xda, 0x52, 0xaf, 0x72,
-				     0x25, 0xd9, 0xf0, 0x27, 0xd3, 0x1c,
-				     0xfb, 0xad, 0xa1, 0xa7, 0x06, 0x2f,
-				     0xaa, 0x2f, 0x86, 0x5c, 0x8b, 0x30,
-				     0xe1, 0xda, 0x5a, 0x36, 0xf9, 0xfd,
-				     0xbf, 0xfe, 0x0d, 0x03, 0xf8, 0x9c,
-				     0x6b, 0x9b, 0xe5, 0x70, 0x6d, 0x75,
-				     0xd7, 0x54, 0x28, 0x43, 0x34, 0x69,
-				     0x98, 0x11, 0x29, 0xee, 0x50, 0x06,
-				     0xa4, 0xc4, 0x11, 0x6d, 0x60, 0x8c,
-				     0xcd, 0xd1, 0x88, 0xe9, 0x6b, 0xbb,
-				     0xc1, 0xd4 ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xa1, 0x01, 0x7e, 0xb4, 0x0e, 0x66,
-				     0xa5, 0x07, 0x8b, 0x10, 0x84, 0x0d,
-				     0x30, 0x0a, 0xa4, 0x2d, 0x10, 0x2c,
-				     0xd4, 0x9a, 0x27, 0xf1, 0x02, 0x8c,
-				     0x38, 0x18, 0x7f, 0x7f, 0x95, 0x65,
-				     0xf1, 0xa9, 0x3b, 0x7d, 0x1f, 0x4f,
-				     0x88, 0xb0, 0x65, 0x62, 0x63, 0x63,
-				     0xaa, 0x82, 0xfc, 0x83, 0x3a, 0x3a,
-				     0x46, 0x59, 0x6a, 0x89, 0xec, 0xa9,
-				     0xb0, 0x4c, 0x5e, 0xbe, 0x46, 0x98,
-				     0xd0, 0xd4, 0xb7, 0xe3, 0x1b, 0x30,
-				     0x0b, 0xfb, 0xbb, 0x4f, 0x0b, 0xd3,
-				     0xe4, 0xa0, 0x80, 0x54, 0xcb, 0x52,
-				     0x0a, 0xe8, 0x03, 0x75, 0x8e, 0x96,
-				     0xa4, 0x21, 0xaa, 0xbd, 0x7a, 0xfd,
-				     0xfa, 0xf8, 0xaf, 0x42, 0xf6, 0x61,
-				     0xd2, 0x93, 0xce, 0x66, 0x67, 0xe9,
-				     0x02, 0xda, 0x81, 0x0b, 0xb0, 0x1e,
-				     0x9e, 0x27, 0x57, 0x98, 0x18, 0x88,
-				     0x35, 0x49, 0xc0, 0x88, 0x88, 0x59,
-				     0xae, 0x2f, 0x66, 0x59, 0x31, 0x87,
-				     0x88, 0xda ),
-			    BIGINT ( 0xfe, 0x21, 0x7c, 0xf4, 0xbe, 0xae,
-				     0x65, 0xda, 0x89, 0xd2, 0x26, 0xd6,
-				     0x9c, 0x65, 0xc6, 0xb6, 0xb4, 0x0a,
-				     0x84, 0x11, 0xe1, 0xe8, 0xba, 0xd8,
-				     0x16, 0xcf, 0x60, 0x6c, 0x83, 0xa5,
-				     0x4a, 0xbf, 0xa2, 0x24, 0x0b, 0x66,
-				     0xda, 0xe2, 0x4e, 0x2d, 0xe5, 0x9e,
-				     0xbf, 0xad, 0x5c, 0xa3, 0x1e, 0x5c,
-				     0xbd, 0xe2, 0x5b, 0x46, 0xcf, 0xcc,
-				     0xd5, 0xc9, 0x13, 0x95, 0xc3, 0xdb,
-				     0x64, 0xbf, 0xeb, 0x31, 0xa9, 0x8a,
-				     0x3b, 0xd2, 0x5d, 0x3b, 0x2e, 0xdc,
-				     0x0c, 0xca, 0xab, 0xde, 0x92, 0xae,
-				     0x45, 0x35, 0x96, 0xb0, 0xb7, 0xb9,
-				     0xe6, 0xfe, 0x28, 0x0d, 0x10, 0x72,
-				     0x53, 0x8e, 0x21, 0xc0, 0x33, 0x79,
-				     0x01, 0x43, 0x8d, 0x77, 0xc4, 0xaa,
-				     0xcf, 0x7f, 0xc3, 0xd1, 0xf5, 0xfd,
-				     0x79, 0x81, 0xf6, 0x2e, 0xb7, 0xeb,
-				     0x55, 0x5f, 0x74, 0xf0, 0x3a, 0xb9,
-				     0x57, 0x07, 0x09, 0x97, 0xa5, 0x4c,
-				     0x4a, 0x85 ),
-			    BIGINT ( 0xd9, 0xb7, 0xb2, 0xd6, 0xeb, 0xf3,
-				     0x66, 0xbe, 0x15, 0x64, 0xad, 0x2e,
-				     0x9e, 0xc6, 0xaf, 0x5e, 0xaf, 0x40,
-				     0x1e, 0x90, 0x82, 0x2f, 0x98 ),
-			    BIGINT ( 0x12, 0x48, 0x31, 0x7f, 0x09, 0xbb,
-				     0x8f, 0xd9, 0x02, 0x7e, 0x4a, 0xd0,
-				     0x2f, 0x42, 0x7c, 0x17, 0x6e, 0x83,
-				     0x74, 0x21, 0x95, 0x47, 0x7d, 0x93,
-				     0x4a, 0xce, 0x34, 0x7c, 0xde, 0xc7,
-				     0x8f, 0xf6, 0x28, 0x97, 0xba, 0x81,
-				     0x9b, 0xcc, 0x54, 0x14, 0x7f, 0xd3,
-				     0x93, 0x66, 0x41, 0x8c, 0x0e, 0x47,
-				     0xee, 0xc5, 0x5e, 0xd6, 0x5f, 0x01,
-				     0x62, 0x97, 0xf1, 0x2b, 0xee, 0x60,
-				     0x5e, 0x82, 0x2c, 0x7b, 0x0a, 0xf2,
-				     0xc3, 0x23, 0xbf, 0xb9, 0x83, 0xf7,
-				     0x97, 0xf5, 0xca, 0x58, 0xd7, 0xf0,
-				     0x87, 0x7b, 0xcb, 0x87, 0x69, 0x42,
-				     0xbc, 0x05, 0xc4, 0xad, 0xbd, 0x82,
-				     0xcf, 0x44, 0x16, 0x4f, 0x46, 0xe0,
-				     0xde, 0x2f, 0xfa, 0x77, 0xec, 0xa4,
-				     0x23, 0x7d, 0x47, 0x3e, 0x94, 0x19,
-				     0x8b, 0xb8, 0x84, 0x81, 0x80, 0x6c,
-				     0x1e, 0x31, 0xa3, 0x6d, 0x14, 0x94,
-				     0x57, 0x28, 0x99, 0x08, 0x0a, 0xa7,
-				     0x98, 0x4b ) );
-	bigint_mod_exp_ok ( BIGINT ( 0xda, 0x52, 0xfd, 0x44, 0x5d, 0x11,
-				     0x60, 0x6c, 0xec, 0x87, 0xbf, 0x19,
-				     0xb8, 0x46, 0xaa, 0x41, 0xfc, 0x10,
-				     0xae, 0x47, 0xd6, 0x72, 0x42, 0x57,
-				     0xc3, 0x05, 0xca, 0xe3, 0x59, 0x94,
-				     0x82, 0x7c, 0xa1, 0xe0, 0xd2, 0x6b,
-				     0x77, 0x71, 0x42, 0xa1, 0xf7, 0x84,
-				     0xae, 0xf4, 0x6f, 0x44, 0x0d, 0x88,
-				     0xa2, 0xc5, 0x45, 0x9b, 0x49, 0x36,
-				     0xd4, 0x20, 0x3a, 0x7c, 0x92, 0xdb,
-				     0x65, 0xd9, 0x20, 0xd6, 0x71, 0x22,
-				     0x90, 0x70, 0xbf, 0xf3, 0x17, 0xe8,
-				     0x2c, 0x10, 0xe9, 0x4c, 0x02, 0x69,
-				     0x37, 0xa2, 0x91, 0x04, 0x46, 0x11,
-				     0xdc, 0xab, 0x5b, 0x1e, 0x3e, 0x31,
-				     0xd8, 0x69, 0xf8, 0x48, 0x84, 0x1f,
-				     0x56, 0x46, 0xf1, 0xc0, 0x14, 0x3f,
-				     0xcc, 0x5d, 0xe2, 0xf7, 0x8b, 0xa4,
-				     0x9e, 0x94, 0x32, 0xaa, 0x3c, 0x5e,
-				     0x21, 0x70, 0x00, 0x24, 0x2a, 0x1b,
-				     0xec, 0x25, 0xb1, 0xb6, 0x83, 0x36,
-				     0x5a, 0x95 ),
-			    BIGINT ( 0x5e, 0xdc, 0x71, 0x1f, 0x5b, 0x55,
-				     0xaa, 0xda, 0x56, 0xf5, 0x93, 0x9b,
-				     0xe8, 0xfc, 0x6a, 0x80, 0xe1, 0xe3,
-				     0x93, 0xe4, 0xc0, 0x58, 0x6f, 0x22,
-				     0xce, 0x9d, 0x6f, 0x84, 0x4c, 0xd4,
-				     0x12, 0x44, 0x57, 0x25, 0xca, 0xe5,
-				     0x2b, 0x7c, 0x35, 0x88, 0xc7, 0x38,
-				     0x25, 0x20, 0x9b, 0x57, 0xf2, 0xf2,
-				     0x6c, 0x28, 0x47, 0x9c, 0x3f, 0x91,
-				     0x1e, 0x3f, 0xe9, 0xeb, 0x50, 0xd6,
-				     0xa7, 0x22, 0x88, 0x6c, 0x71, 0xe5,
-				     0x62, 0x2a, 0xb7, 0xce, 0xbe, 0xf7,
-				     0x1a, 0x8c, 0x52, 0xa6, 0xff, 0xb8,
-				     0x34, 0x83, 0x7e, 0x04, 0xa8, 0x9c,
-				     0xa8, 0xa7, 0xd1, 0x05, 0x8e, 0x13,
-				     0x03, 0xe0, 0x49, 0xd8, 0x4a, 0xc4,
-				     0x4d, 0x38, 0x21, 0x5b, 0x62, 0xc2,
-				     0x38, 0x23, 0x7c, 0x9e, 0xf1, 0xe9,
-				     0xb6, 0x9a, 0x75, 0x42, 0x14, 0x99,
-				     0x63, 0x36, 0x13, 0x4c, 0x2d, 0x3a,
-				     0x77, 0xd4, 0x74, 0xb7, 0x30, 0xb2,
-				     0x00, 0x0f ),
-			    BIGINT ( 0xe3, 0xe5, 0x3b, 0xb5, 0x92, 0x5a,
-				     0xc6, 0xfa, 0x8f, 0xe8, 0x00, 0xb9,
-				     0x5c, 0xa0, 0xb6, 0x3e, 0x5e, 0x14,
-				     0x12, 0xa9, 0xdd, 0x2a, 0x3d, 0x4d,
-				     0xa3, 0x91, 0x6a, 0x56, 0x99, 0xc2,
-				     0x6c, 0x8e, 0xda, 0xb0, 0x5a, 0x2a,
-				     0x37, 0x55, 0x8b, 0xd3, 0x9b, 0xb6,
-				     0x1d, 0x49, 0x7d, 0x81, 0x76, 0x1c,
-				     0x2e, 0xb9, 0x92, 0x6d, 0xfa, 0x54,
-				     0x53, 0xfc, 0x74, 0x9b, 0x6b, 0x63,
-				     0x95, 0x1a, 0x89, 0xcc, 0xbd, 0x36,
-				     0xc5, 0x31, 0x7f, 0xf5, 0x31, 0x69,
-				     0x40, 0xd5, 0x7b, 0x94, 0x5d, 0xa9,
-				     0xd1, 0x34, 0x95, 0xa1, 0x8b, 0xa5,
-				     0xb5, 0x83, 0xda, 0xb5, 0x9d, 0x5b,
-				     0x74, 0x41, 0xad, 0x81, 0x45, 0x40,
-				     0x9b, 0xc3, 0xe8, 0xfe, 0x47, 0xdc,
-				     0xb0, 0xc3, 0x34, 0x5d, 0xf6, 0x3c,
-				     0x1d, 0x07, 0x76, 0xd9, 0x25, 0xca,
-				     0xa2, 0x39, 0x6c, 0xa8, 0xae, 0x30,
-				     0x4a, 0xde, 0xfb, 0xeb, 0x19, 0x80,
-				     0x5e, 0x49 ),
-			    BIGINT ( 0x4b, 0x0e, 0x74, 0xb8, 0xa7, 0x92,
-				     0x74, 0xd9, 0x50, 0xf6, 0x1b, 0x67,
-				     0x76, 0x76, 0x56, 0x6c, 0x09, 0x9c,
-				     0x01, 0xda, 0xaf, 0xa3, 0xca, 0xb2,
-				     0x12, 0x85, 0x52, 0x24, 0xe9, 0x7e,
-				     0x2b, 0xf2, 0x6e, 0xe9, 0x1a, 0x10,
-				     0x5d, 0xa0, 0x25, 0x46, 0x8f, 0x2a,
-				     0x95, 0x62, 0x50, 0xb6, 0x66, 0x43,
-				     0x37, 0x8b, 0xcb, 0x05, 0xf8, 0x61,
-				     0x59, 0xf9, 0xdd, 0xd2, 0x68, 0x72,
-				     0xfa, 0x88, 0x13, 0x36, 0xd8, 0x24,
-				     0x73, 0xec, 0x47, 0x44, 0xdd, 0x45,
-				     0x8a, 0x59, 0xd2, 0xbd, 0x43, 0xe3,
-				     0x05, 0x16, 0xd5, 0x9b, 0x1c, 0x8a,
-				     0x4b, 0x07, 0xda, 0x58, 0x0d, 0x4a,
-				     0x4e, 0xe7, 0x15, 0xfc, 0xbd, 0x95,
-				     0xf7, 0x18, 0xa5, 0xa7, 0x93, 0xff,
-				     0xf8, 0x1f, 0xd4, 0x6b, 0x07, 0xc6,
-				     0x5d, 0x90, 0x73, 0x57, 0x57, 0x37,
-				     0xfa, 0x83, 0xd4, 0x7c, 0xe9, 0x77,
-				     0x46, 0x91, 0x3a, 0x50, 0x0d, 0x6a,
-				     0x25, 0xd0 ) );
-}
-
-/** Big integer self-test */
-struct self_test bigint_test __self_test = {
-	.name = "bigint",
-	.exec = bigint_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/bofm_test.c ipxe-1.0.1~lliurex1505/src/tests/bofm_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/bofm_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/bofm_test.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/byteswap_test.c ipxe-1.0.1~lliurex1505/src/tests/byteswap_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/byteswap_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/byteswap_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,92 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Byte-order swapping test functions
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <assert.h>
-#include <byteswap.h>
-#include <ipxe/test.h>
-
-/* Provide global functions to allow inspection of generated assembly code */
-
-uint16_t test_bswap16 ( uint16_t x ) {
-	return __bswap_16 ( x );
-}
-
-uint32_t test_bswap32 ( uint32_t x ) {
-	return __bswap_32 ( x );
-}
-
-uint64_t test_bswap64 ( uint64_t x ) {
-	return __bswap_64 ( x );
-}
-
-void test_bswap16s ( uint16_t *x ) {
-	__bswap_16s ( x );
-}
-
-void test_bswap32s ( uint32_t *x ) {
-	__bswap_32s ( x );
-}
-
-void test_bswap64s ( uint64_t *x ) {
-	__bswap_64s ( x );
-}
-
-/**
- * Perform byte-order swapping
- *
- */
-static void byteswap_test_exec ( void ) {
-	uint16_t test16;
-	uint32_t test32;
-	uint64_t test64;
-
-	ok ( test_bswap16 ( 0x1234 ) == 0x3412 );
-	ok ( test_bswap32 ( 0x12345678UL ) == 0x78563412UL );
-	ok ( test_bswap64 ( 0x123456789abcdef0ULL ) == 0xf0debc9a78563412ULL );
-
-	test16 = 0xabcd;
-	test_bswap16s ( &test16 );
-	ok ( test16 == 0xcdab );
-
-	test32 = 0xabcdef01UL;
-	test_bswap32s ( &test32 );
-	ok ( test32 == 0x01efcdabUL );
-
-	test64 = 0xabcdef0123456789ULL;
-	test_bswap64s ( &test64 );
-	ok ( test64 == 0x8967452301efcdabULL );
-}
-
-/** Byte-order swapping self-test */
-struct self_test byteswap_test __self_test = {
-	.name = "byteswap",
-	.exec = byteswap_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cbc_test.c ipxe-1.0.1~lliurex1505/src/tests/cbc_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cbc_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/cbc_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,171 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * CBC self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <ipxe/crypto.h>
-#include <ipxe/profile.h>
-#include "cbc_test.h"
-
-/**
- * Test CBC encryption
- *
- * @v cipher			Cipher algorithm
- * @v key			Key
- * @v key_len			Length of key
- * @v iv			Initialisation vector
- * @v plaintext			Plaintext data
- * @v expected_ciphertext	Expected ciphertext data
- * @v len			Length of data
- * @ret ok			Ciphertext is as expected
- */
-int cbc_test_encrypt ( struct cipher_algorithm *cipher, const void *key,
-		       size_t key_len, const void *iv, const void *plaintext,
-		       const void *expected_ciphertext, size_t len ) {
-	uint8_t ctx[cipher->ctxsize];
-	uint8_t ciphertext[len];
-	int rc;
-
-	/* Initialise cipher */
-	rc = cipher_setkey ( cipher, ctx, key, key_len );
-	assert ( rc == 0 );
-	cipher_setiv ( cipher, ctx, iv );
-
-	/* Perform encryption */
-	cipher_encrypt ( cipher, ctx, plaintext, ciphertext, len );
-
-	/* Verify result */
-	return ( memcmp ( ciphertext, expected_ciphertext, len ) == 0 );
-}
-
-/**
- * Test CBC decryption
- *
- * @v cipher			Cipher algorithm
- * @v key			Key
- * @v key_len			Length of key
- * @v iv			Initialisation vector
- * @v ciphertext		Ciphertext data
- * @v expected_plaintext	Expected plaintext data
- * @v len			Length of data
- * @ret ok			Plaintext is as expected
- */
-int cbc_test_decrypt ( struct cipher_algorithm *cipher, const void *key,
-		       size_t key_len, const void *iv, const void *ciphertext,
-		       const void *expected_plaintext, size_t len ) {
-	uint8_t ctx[cipher->ctxsize];
-	uint8_t plaintext[len];
-	int rc;
-
-	/* Initialise cipher */
-	rc = cipher_setkey ( cipher, ctx, key, key_len );
-	assert ( rc == 0 );
-	cipher_setiv ( cipher, ctx, iv );
-
-	/* Perform encryption */
-	cipher_decrypt ( cipher, ctx, ciphertext, plaintext, len );
-
-	/* Verify result */
-	return ( memcmp ( plaintext, expected_plaintext, len ) == 0 );
-}
-
-/**
- * Calculate CBC encryption or decryption cost
- *
- * @v cipher			Cipher algorithm
- * @v key_len			Length of key
- * @v op			Encryption or decryption operation
- * @ret cost			Cost (in cycles per byte)
- */
-static unsigned long cbc_cost ( struct cipher_algorithm *cipher,
-				size_t key_len,
-				void ( * op ) ( struct cipher_algorithm *cipher,
-						void *ctx, const void *src,
-						void *dst, size_t len ) ) {
-	static uint8_t random[8192]; /* Too large for stack */
-	uint8_t key[key_len];
-	uint8_t iv[cipher->blocksize];
-	uint8_t ctx[cipher->ctxsize];
-	union profiler profiler;
-	unsigned long long elapsed;
-	unsigned long cost;
-	unsigned int i;
-	int rc;
-
-	/* Fill buffer with pseudo-random data */
-	srand ( 0x1234568 );
-	for ( i = 0 ; i < sizeof ( random ) ; i++ )
-		random[i] = rand();
-	for ( i = 0 ; i < sizeof ( key ) ; i++ )
-		key[i] = rand();
-	for ( i = 0 ; i < sizeof ( iv ) ; i++ )
-		iv[i] = rand();
-
-	/* Initialise cipher */
-	rc = cipher_setkey ( cipher, ctx, key, key_len );
-	assert ( rc == 0 );
-	cipher_setiv ( cipher, ctx, iv );
-
-	/* Time operation */
-	profile ( &profiler );
-	op ( cipher, ctx, random, random, sizeof ( random ) );
-	elapsed = profile ( &profiler );
-
-	/* Round to nearest whole number of cycles per byte */
-	cost = ( ( elapsed + ( sizeof ( random ) / 2 ) ) / sizeof ( random ) );
-
-	return cost;
-}
-
-/**
- * Calculate CBC encryption cost
- *
- * @v cipher			Cipher algorithm
- * @v key_len			Length of key
- * @ret cost			Cost (in cycles per byte)
- */
-unsigned long cbc_cost_encrypt ( struct cipher_algorithm *cipher,
-				 size_t key_len ) {
-	return cbc_cost ( cipher, key_len, cipher_encrypt );
-}
-
-/**
- * Calculate CBC decryption cost
- *
- * @v cipher			Cipher algorithm
- * @v key_len			Length of key
- * @ret cost			Cost (in cycles per byte)
- */
-unsigned long cbc_cost_decrypt ( struct cipher_algorithm *cipher,
-				 size_t key_len ) {
-	return cbc_cost ( cipher, key_len, cipher_decrypt );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cbc_test.h ipxe-1.0.1~lliurex1505/src/tests/cbc_test.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cbc_test.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/cbc_test.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,57 +0,0 @@
-#ifndef _CBC_TEST_H
-#define _CBC_TEST_H
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-#include <ipxe/test.h>
-
-extern int cbc_test_encrypt ( struct cipher_algorithm *cipher, const void *key,
-			      size_t key_len, const void *iv,
-			      const void *plaintext,
-			      const void *expected_ciphertext, size_t len );
-extern int cbc_test_decrypt ( struct cipher_algorithm *cipher, const void *key,
-			      size_t key_len, const void *iv,
-			      const void *ciphertext,
-			      const void *expected_plaintext, size_t len );
-extern unsigned long cbc_cost_encrypt ( struct cipher_algorithm *cipher,
-					size_t key_len );
-extern unsigned long cbc_cost_decrypt ( struct cipher_algorithm *cipher,
-					size_t key_len );
-
-/**
- * Report CBC encryption test result
- *
- * @v cipher			Cipher algorithm
- * @v key			Key
- * @v key_len			Length of key
- * @v iv			Initialisation vector
- * @v plaintext			Plaintext data
- * @v expected_ciphertext	Expected ciphertext data
- * @v len			Length of data
- */
-#define cbc_encrypt_ok( cipher, key, key_len, iv, plaintext,		\
-			expected_ciphertext, len ) do {			\
-	ok ( cbc_test_encrypt ( cipher, key, key_len, iv, plaintext,	\
-				expected_ciphertext, len ) );		\
-	} while ( 0 )
-
-/**
- * Report CBC decryption test result
- *
- * @v cipher			Cipher algorithm
- * @v key			Key
- * @v key_len			Length of key
- * @v iv			Initialisation vector
- * @v ciphertext		Ciphertext data
- * @v expected_plaintext	Expected plaintext data
- * @v len			Length of data
- */
-#define cbc_decrypt_ok( cipher, key, key_len, iv, ciphertext,		\
-			expected_plaintext, len ) do {			\
-	ok ( cbc_test_decrypt ( cipher, key, key_len, iv, ciphertext,	\
-				expected_plaintext, len ) );		\
-	} while ( 0 )
-
-#endif /* _CBC_TEST_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cms_test.c ipxe-1.0.1~lliurex1505/src/tests/cms_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/cms_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/cms_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1438 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * CMS self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <string.h>
-#include <ipxe/sha256.h>
-#include <ipxe/x509.h>
-#include <ipxe/uaccess.h>
-#include <ipxe/cms.h>
-#include <ipxe/test.h>
-
-/** Fingerprint algorithm used for X.509 test certificates */
-#define cms_test_algorithm sha256_algorithm
-
-/** CMS test code blob */
-struct cms_test_code {
-	/** Data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-};
-
-/** CMS test signature */
-struct cms_test_signature {
-	/** Data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-
-	/** Parsed signature */
-	struct cms_signature *sig;
-};
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define inline fingerprint data */
-#define FINGERPRINT(...) { __VA_ARGS__ }
-
-/** Define a test code blob */
-#define SIGNED_CODE( name, DATA )					\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct cms_test_code name = {				\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-	}
-
-/** Define a test signature */
-#define SIGNATURE( name, DATA )						\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct cms_test_signature name = {			\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-	}
-
-/** Code that has been signed */
-SIGNED_CODE ( test_code,
-	DATA ( 0x23, 0x21, 0x69, 0x70, 0x78, 0x65, 0x0a, 0x0a, 0x65, 0x63,
-	       0x68, 0x6f, 0x20, 0x54, 0x68, 0x69, 0x73, 0x20, 0x69, 0x73,
-	       0x20, 0x61, 0x20, 0x73, 0x69, 0x67, 0x6e, 0x65, 0x64, 0x20,
-	       0x61, 0x6e, 0x64, 0x20, 0x74, 0x72, 0x75, 0x73, 0x74, 0x65,
-	       0x64, 0x20, 0x69, 0x50, 0x58, 0x45, 0x20, 0x73, 0x63, 0x72,
-	       0x69, 0x70, 0x74, 0x2e, 0x20, 0x20, 0x44, 0x6f, 0x20, 0x61,
-	       0x6e, 0x79, 0x74, 0x68, 0x69, 0x6e, 0x67, 0x20, 0x79, 0x6f,
-	       0x75, 0x20, 0x77, 0x61, 0x6e, 0x74, 0x21, 0x0a, 0x73, 0x68,
-	       0x65, 0x6c, 0x6c, 0x0a ) );
-
-/** Code that has not been signed */
-SIGNED_CODE ( bad_code,
-	DATA ( 0x23, 0x21, 0x69, 0x70, 0x78, 0x65, 0x0a, 0x0a, 0x65, 0x63,
-	       0x68, 0x6f, 0x20, 0x54, 0x68, 0x69, 0x73, 0x20, 0x69, 0x73,
-	       0x20, 0x61, 0x20, 0x6d, 0x61, 0x6c, 0x69, 0x63, 0x69, 0x6f,
-	       0x75, 0x73, 0x20, 0x69, 0x50, 0x58, 0x45, 0x20, 0x73, 0x63,
-	       0x72, 0x69, 0x70, 0x74, 0x2e, 0x20, 0x20, 0x44, 0x6f, 0x20,
-	       0x61, 0x6e, 0x79, 0x74, 0x68, 0x69, 0x6e, 0x67, 0x20, 0x79,
-	       0x6f, 0x75, 0x20, 0x77, 0x61, 0x6e, 0x74, 0x21, 0x0a, 0x73,
-	       0x68, 0x65, 0x6c, 0x6c, 0x0a ) );
-
-/** Valid signature */
-SIGNATURE ( codesigned_sig,
-	DATA ( 0x30, 0x82, 0x0c, 0x41, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-	       0xf7, 0x0d, 0x01, 0x07, 0x02, 0xa0, 0x82, 0x0c, 0x32, 0x30,
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-	       0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x30, 0x0b, 0x06,
-	       0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x07, 0x01,
-	       0xa0, 0x82, 0x0a, 0xd8, 0x30, 0x82, 0x02, 0xac, 0x30, 0x82,
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-	       0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x81, 0x88, 0x31, 0x0b,
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-
-/** Signature with a broken certificate chain */
-SIGNATURE ( brokenchain_sig,
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-
-/** Signature generated with a non-code-signing certificate */
-SIGNATURE ( genericsigned_sig,
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-
-/** Signature generated with a non-signing certificate */
-SIGNATURE ( nonsigned_sig,
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-	       0x65, 0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73,
-	       0x20, 0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f, 0x06, 0x03,
-	       0x55, 0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78, 0x65, 0x2e,
-	       0x6f, 0x72, 0x67, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x03, 0x55,
-	       0x04, 0x03, 0x0c, 0x16, 0x69, 0x50, 0x58, 0x45, 0x20, 0x73,
-	       0x65, 0x6c, 0x66, 0x2d, 0x74, 0x65, 0x73, 0x74, 0x20, 0x6c,
-	       0x65, 0x61, 0x66, 0x20, 0x43, 0x41, 0x02, 0x01, 0x03, 0x30,
-	       0x07, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x30, 0x0d,
-	       0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01,
-	       0x01, 0x05, 0x00, 0x04, 0x81, 0x80, 0x33, 0x5c, 0xf8, 0xb4,
-	       0xa5, 0x70, 0xb9, 0x0f, 0x05, 0x50, 0x72, 0xdb, 0xa3, 0xba,
-	       0x8e, 0x0d, 0x6d, 0x8a, 0x2a, 0x91, 0x65, 0xb8, 0x76, 0xd0,
-	       0xfc, 0x9e, 0x1a, 0xdb, 0x2b, 0xd2, 0xfc, 0x03, 0xef, 0x8d,
-	       0xef, 0xfe, 0x32, 0x16, 0xad, 0xf8, 0xcb, 0x28, 0xb0, 0x61,
-	       0x15, 0xb8, 0x38, 0x72, 0xfc, 0x5d, 0xa1, 0xd2, 0xae, 0x9d,
-	       0x6a, 0xb0, 0x5e, 0xbb, 0x78, 0xd3, 0x39, 0x24, 0xa3, 0x71,
-	       0xa6, 0x90, 0x64, 0xa5, 0x82, 0xba, 0x3b, 0x85, 0x2d, 0x16,
-	       0x78, 0xf4, 0xcc, 0x9f, 0xfa, 0xc5, 0x68, 0x44, 0x2c, 0x22,
-	       0xb9, 0x4c, 0x07, 0x5c, 0xb4, 0x79, 0x1a, 0x48, 0xc2, 0x66,
-	       0x71, 0x57, 0x6d, 0xdf, 0x33, 0xa2, 0x26, 0x99, 0xdd, 0xe9,
-	       0xb9, 0x1b, 0xe1, 0xa6, 0x4d, 0x53, 0x8e, 0x71, 0x81, 0xa9,
-	       0x5d, 0x70, 0x47, 0x54, 0xbc, 0x15, 0xad, 0x9c, 0xe8, 0x90,
-	       0x52, 0x3e, 0x49, 0x86 ) );
-
-/** iPXE self-test root CA certificate */
-static uint8_t root_crt_fingerprint[] =
-	FINGERPRINT ( 0x71, 0x5d, 0x51, 0x37, 0x5e, 0x18, 0xb3, 0xbc,
-		      0xbb, 0x30, 0x0e, 0x8f, 0x50, 0xc7, 0x55, 0xf5,
-		      0x96, 0xe7, 0xa8, 0x6d, 0x63, 0x2d, 0x32, 0x38,
-		      0xaf, 0x00, 0xc4, 0x1a, 0xfc, 0xd8, 0xac, 0xc3 );
-
-/** Certificate store containing the iPXE self-test root CA */
-static struct x509_root test_root = {
-	.digest = &cms_test_algorithm,
-	.count = 1,
-	.fingerprints = root_crt_fingerprint,
-};
-
-/** Dummy fingerprint (not matching any certificates) */
-static uint8_t dummy_fingerprint[] =
-	FINGERPRINT ( 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
-		      0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
-		      0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
-		      0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff );
-
-/** Certificate store containing a dummy fingerprint */
-static struct x509_root dummy_root = {
-	.digest = &cms_test_algorithm,
-	.count = 1,
-	.fingerprints = dummy_fingerprint,
-};
-
-/** Time at which all test certificates are valid */
-static time_t test_time = 1332374737ULL; /* Thu Mar 22 00:05:37 2012 */
-
-/** Time at which end-entity test certificates are invalid */
-static time_t test_expired = 1375573111ULL; /* Sat Aug  3 23:38:31 2013 */
-
-/**
- * Report signature parsing test result
- *
- * @v sgn		Test signature
- */
-#define cms_signature_ok( sgn ) do {					\
-	ok ( cms_signature ( (sgn)->data, (sgn)->len,			\
-			     &(sgn)->sig ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report signature verification test result
- *
- * @v sgn		Test signature
- * @v code		Test signed code
- * @v name		Test verification name
- * @v time		Test verification time
- * @v root		Test root certificate store
- */
-#define cms_verify_ok( sgn, code, name, time, root ) do {		\
-	x509_invalidate_chain ( (sgn)->sig->certificates );		\
-	ok ( cms_verify ( (sgn)->sig, virt_to_user ( (code)->data ),	\
-			  (code)->len, name, time, root ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Report signature verification failure test result
- *
- * @v sgn		Test signature
- * @v code		Test signed code
- * @v name		Test verification name
- * @v time		Test verification time
- * @v root		Test root certificate store
- */
-#define cms_verify_fail_ok( sgn, code, name, time, root ) do {		\
-	x509_invalidate_chain ( (sgn)->sig->certificates );		\
-	ok ( cms_verify ( (sgn)->sig, virt_to_user ( (code)->data ),	\
-			  (code)->len, name, time, root ) != 0 );	\
-	} while ( 0 )
-
-/**
- * Perform CMS self-tests
- *
- */
-static void cms_test_exec ( void ) {
-
-	/* Check that all signatures can be parsed */
-	cms_signature_ok ( &codesigned_sig );
-	cms_signature_ok ( &brokenchain_sig );
-	cms_signature_ok ( &genericsigned_sig );
-	cms_signature_ok ( &nonsigned_sig );
-
-	/* Check good signature */
-	cms_verify_ok ( &codesigned_sig, &test_code,
-			"codesign.test.ipxe.org", test_time, &test_root );
-	cms_verify_ok ( &codesigned_sig, &test_code,
-			NULL, test_time, &test_root );
-
-	/* Check incorrect signer name */
-	cms_verify_fail_ok ( &codesigned_sig, &test_code,
-			     "wrongname.test.ipxe.org", test_time, &test_root );
-
-	/* Check non-code-signing certificate */
-	cms_verify_fail_ok ( &genericsigned_sig, &test_code,
-			     NULL, test_time, &test_root );
-
-	/* Check non-signing certificate */
-	cms_verify_fail_ok ( &nonsigned_sig, &test_code,
-			     NULL, test_time, &test_root );
-
-	/* Check broken chain */
-	cms_verify_fail_ok ( &brokenchain_sig, &test_code,
-			     NULL, test_time, &test_root );
-
-	/* Check untrusted signature */
-	cms_verify_fail_ok ( &codesigned_sig, &test_code,
-			     NULL, test_time, &dummy_root );
-
-	/* Check incorrect signed content */
-	cms_verify_fail_ok ( &codesigned_sig, &bad_code,
-			     NULL, test_time, &test_root );
-
-	/* Check expired signature */
-	cms_verify_fail_ok ( &codesigned_sig, &test_code,
-			     NULL, test_expired, &test_root );
-
-	/* Drop signature references */
-	cms_put ( nonsigned_sig.sig );
-	cms_put ( genericsigned_sig.sig );
-	cms_put ( brokenchain_sig.sig );
-	cms_put ( codesigned_sig.sig );
-}
-
-/** CMS self-test */
-struct self_test cms_test __self_test = {
-	.name = "cms",
-	.exec = cms_test_exec,
-};
-
-/* Drag in algorithms required for tests */
-REQUIRE_OBJECT ( rsa );
-REQUIRE_OBJECT ( md5 );
-REQUIRE_OBJECT ( sha1 );
-REQUIRE_OBJECT ( sha256 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/crc32_test.c ipxe-1.0.1~lliurex1505/src/tests/crc32_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/crc32_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/crc32_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,116 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * CRC32 tests
- *
- *
- * Test vectors generated using Perl's Digest::CRC:
- *
- *    use Digest::CRC qw ( crc );
- *
- *    printf "%#08x", crc ( $data, 32, $seed, 0, 1, 0x04c11db7, 1 );
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <ipxe/crc32.h>
-#include <ipxe/test.h>
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** A CRC32 test */
-struct crc32_test {
-	/** Test data */
-	const void *data;
-	/** Length of test data */
-	size_t len;
-	/** Seed */
-	uint32_t seed;
-	/** Expected CRC32 */
-	uint32_t crc32;
-};
-
-/**
- * Define a CRC32 test
- *
- * @v name		Test name
- * @v DATA		Test data
- * @v SEED		Seed
- * @v CRC32		Expected CRC32
- * @ret test		CRC32 test
- */
-#define CRC32_TEST( name, DATA, SEED, CRC32 )				\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct crc32_test name = {				\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-		.seed = SEED,						\
-		.crc32 = CRC32,						\
-	};
-
-/**
- * Report a CRC32 test result
- *
- * @v test		CRC32 test
- */
-#define crc32_ok( test ) do {						\
-	uint32_t crc32;							\
-	crc32 = crc32_le ( (test)->seed, (test)->data, (test)->len );	\
-	ok ( crc32 == (test)->crc32 );					\
-	} while ( 0 )
-
-/* CRC32 tests */
-CRC32_TEST ( empty_test,
-	     DATA ( ),
-	     0x12345678UL, 0x12345678UL );
-CRC32_TEST ( hw_test,
-	     DATA ( 'h', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l', 'd' ),
-	     0xffffffffUL, 0xf2b5ee7aUL );
-CRC32_TEST ( hw_split_part1_test,
-	     DATA ( 'h', 'e', 'l', 'l', 'o' ),
-	     0xffffffffUL, 0xc9ef5979UL );
-CRC32_TEST ( hw_split_part2_test,
-	     DATA ( ' ', 'w', 'o', 'r', 'l', 'd' ),
-	     0xc9ef5979UL, 0xf2b5ee7aUL );
-
-/**
- * Perform CRC32 self-tests
- *
- */
-static void crc32_test_exec ( void ) {
-
-	crc32_ok ( &empty_test );
-	crc32_ok ( &hw_test );
-	crc32_ok ( &hw_split_part1_test );
-	crc32_ok ( &hw_split_part2_test );
-}
-
-/** CRC32 self-test */
-struct self_test crc32_test __self_test = {
-	.name = "crc32",
-	.exec = crc32_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/digest_test.c ipxe-1.0.1~lliurex1505/src/tests/digest_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/digest_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/digest_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,105 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Digest self-tests
- *
- */
-
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/crypto.h>
-#include <ipxe/profile.h>
-#include "digest_test.h"
-
-/**
- * Test digest algorithm
- *
- * @v digest		Digest algorithm
- * @v fragments		Digest test fragment list, or NULL
- * @v data		Test data
- * @v len		Length of test data
- * @v expected		Expected digest value
- * @ret ok		Digest value is as expected
- */
-int digest_test ( struct digest_algorithm *digest,
-		  struct digest_test_fragments *fragments,
-		  void *data, size_t len, void *expected ) {
-	uint8_t ctx[digest->ctxsize];
-	uint8_t out[digest->digestsize];
-	size_t frag_len = 0;
-	unsigned int i;
-
-	/* Initialise digest */
-	digest_init ( digest, ctx );
-
-	/* Update digest fragment-by-fragment */
-	for ( i = 0 ; len && ( i < ( sizeof ( fragments->len ) /
-				     sizeof ( fragments->len[0] ) ) ) ; i++ ) {
-		if ( fragments )
-			frag_len = fragments->len[i];
-		if ( ( frag_len == 0 ) || ( frag_len < len ) )
-			frag_len = len;
-		digest_update ( digest, ctx, data, frag_len );
-		data += frag_len;
-		len -= frag_len;
-	}
-
-	/* Finalise digest */
-	digest_final ( digest, ctx, out );
-
-	/* Compare against expected output */
-	return ( memcmp ( expected, out, sizeof ( out ) ) == 0 );
-}
-
-/**
- * Calculate digest algorithm cost
- *
- * @v digest		Digest algorithm
- * @ret cost		Cost (in cycles per byte)
- */
-unsigned long digest_cost ( struct digest_algorithm *digest ) {
-	static uint8_t random[8192]; /* Too large for stack */
-	uint8_t ctx[digest->ctxsize];
-	uint8_t out[digest->digestsize];
-	union profiler profiler;
-	unsigned long long elapsed;
-	unsigned long cost;
-	unsigned int i;
-
-	/* Fill buffer with pseudo-random data */
-	srand ( 0x1234568 );
-	for ( i = 0 ; i < sizeof ( random ) ; i++ )
-		random[i] = rand();
-
-	/* Time digest calculation */
-	profile ( &profiler );
-	digest_init ( digest, ctx );
-	digest_update ( digest, ctx, random, sizeof ( random ) );
-	digest_final ( digest, ctx, out );
-	elapsed = profile ( &profiler );
-
-	/* Round to nearest whole number of cycles per byte */
-	cost = ( ( elapsed + ( sizeof ( random ) / 2 ) ) / sizeof ( random ) );
-
-	return cost;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/digest_test.h ipxe-1.0.1~lliurex1505/src/tests/digest_test.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/digest_test.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/digest_test.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,37 +0,0 @@
-#ifndef _DIGEST_TEST_H
-#define _DIGEST_TEST_H
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-#include <ipxe/test.h>
-
-/** Maximum number of digest test fragments */
-#define NUM_DIGEST_TEST_FRAG 8
-
-/** A digest test fragment list */
-struct digest_test_fragments {
-	/** Fragment lengths */
-	size_t len[NUM_DIGEST_TEST_FRAG];
-};
-
-extern int digest_test ( struct digest_algorithm *digest,
-			 struct digest_test_fragments *fragments,
-			 void *data, size_t len, void *expected );
-extern unsigned long digest_cost ( struct digest_algorithm *digest );
-
-/**
- * Report digest test result
- *
- * @v digest		Digest algorithm
- * @v fragments		Digest test fragment list, or NULL
- * @v data		Test data
- * @v len		Length of test data
- * @v expected		Expected digest value
- */
-#define digest_ok( digest, fragments, data, len, expected ) do {	\
-	ok ( digest_test ( digest, fragments, data, len, expected ) );	\
-	} while ( 0 )
-
-#endif /* _DIGEST_TEST_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/entropy_sample.c ipxe-1.0.1~lliurex1505/src/tests/entropy_sample.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/entropy_sample.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/entropy_sample.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,72 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Entropy sampling
- *
- */
-
-#include <stdio.h>
-#include <ipxe/entropy.h>
-#include <ipxe/test.h>
-
-/** Total number of test samples */
-#define SAMPLE_COUNT 65536
-
-/** Number of samples per block */
-#define SAMPLE_BLOCKSIZE 256
-
-/**
- * Generate entropy samples for external testing
- *
- */
-static void entropy_sample_test_exec ( void ) {
-	static noise_sample_t samples[SAMPLE_BLOCKSIZE];
-	unsigned int i;
-	unsigned int j;
-	int rc;
-
-	/* Collect and print blocks of samples */
-	for ( i = 0 ; i < ( SAMPLE_COUNT / SAMPLE_BLOCKSIZE ) ; i++ ) {
-
-		/* Collect one block of samples */
-		rc = entropy_enable();
-		ok ( rc == 0 );
-		for ( j = 0 ; j < SAMPLE_BLOCKSIZE ; j++ ) {
-			rc = get_noise ( &samples[j] );
-			ok ( rc == 0 );
-		}
-		entropy_disable();
-
-		/* Print out sample values */
-		for ( j = 0 ; j < SAMPLE_BLOCKSIZE ; j++ ) {
-			printf ( "SAMPLE %d %d\n", ( i * SAMPLE_BLOCKSIZE + j ),
-				 samples[j] );
-		}
-	}
-}
-
-/** Entropy sampling self-test */
-struct self_test entropy_sample_test __self_test = {
-	.name = "entropy_sample",
-	.exec = entropy_sample_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/hash_df_test.c ipxe-1.0.1~lliurex1505/src/tests/hash_df_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/hash_df_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/hash_df_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,898 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Hash-based derivation function (Hash_df) tests
- *
- * These test vectors are provided by NIST as part of the
- * Cryptographic Toolkit Examples, downloadable from:
- *
- *    http://csrc.nist.gov/groups/ST/toolkit/documents/Examples/Hash_DRBG.pdf
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <assert.h>
-#include <string.h>
-#include <ipxe/hash_df.h>
-#include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/test.h>
-
-/** Define inline input data */
-#define INPUT(...) { __VA_ARGS__ }
-
-/** Define inline expected data */
-#define EXPECT(...) { __VA_ARGS__ }
-
-/** A Hash_df test */
-struct hash_df_test {
-	/** Underlying hash algorithm */
-	struct digest_algorithm *hash;
-	/** Input data */
-	const void *input;
-	/** Length of input data */
-	size_t input_len;
-	/** Expected output data */
-	const void *expected;
-	/** Length of expected output data */
-	size_t expected_len;
-};
-
-/**
- * Define a Hash_df test
- *
- * @v name		Test name
- * @v hash_algorithm	Underlying hash algorithm
- * @v input_array	Input data
- * @v expected_array	Expected output data
- * @ret test		Hash_df test
- */
-#define HASH_DF_TEST( name, hash_algorithm, input_array, expected_array ) \
-	static const uint8_t name ## _input [] = input_array;		  \
-	static const uint8_t name ## _expected [] = expected_array;	  \
-	static struct hash_df_test name = {				  \
-		.hash = &(hash_algorithm),				  \
-		.input = name ## _input,				  \
-		.input_len = sizeof ( name ## _input ),			  \
-		.expected = name ## _expected,				  \
-		.expected_len = sizeof ( name ## _expected ),		  \
-	}
-
-/** SHA-1 Test 1 */
-HASH_DF_TEST ( test_sha1_1, sha1_algorithm,
-	INPUT ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
-		0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13,
-		0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
-		0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-		0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31,
-		0x32, 0x33, 0x34, 0x35, 0x36, 0x20, 0x21, 0x22, 0x23, 0x24 ),
-	EXPECT ( 0xd0, 0x8f, 0xb4, 0x41, 0xf2, 0xf4, 0xcb, 0x37, 0xcf, 0x6c,
-		 0x24, 0x20, 0xa8, 0x2c, 0x74, 0x27, 0xac, 0xf7, 0xfc, 0xfd,
-		 0x79, 0x90, 0x14, 0x38, 0x34, 0xa5, 0xc2, 0x56, 0xab, 0x28,
-		 0x39, 0x36, 0x6d, 0x96, 0x34, 0x8c, 0xfe, 0x8c, 0x97, 0xab,
-		 0x67, 0x67, 0xb0, 0x5e, 0x83, 0xa9, 0x80, 0x40, 0x6d, 0x94,
-		 0xbe, 0xe3, 0x3c, 0xbb, 0x89 ) );
-
-/** SHA-1 Test 2 */
-HASH_DF_TEST ( test_sha1_2, sha1_algorithm,
-	INPUT ( 0x00, 0xd0, 0x8f, 0xb4, 0x41, 0xf2, 0xf4, 0xcb, 0x37, 0xcf,
-		0x6c, 0x24, 0x20, 0xa8, 0x2c, 0x74, 0x27, 0xac, 0xf7, 0xfc,
-		0xfd, 0x79, 0x90, 0x14, 0x38, 0x34, 0xa5, 0xc2, 0x56, 0xab,
-		0x28, 0x39, 0x36, 0x6d, 0x96, 0x34, 0x8c, 0xfe, 0x8c, 0x97,
-		0xab, 0x67, 0x67, 0xb0, 0x5e, 0x83, 0xa9, 0x80, 0x40, 0x6d,
-		0x94, 0xbe, 0xe3, 0x3c, 0xbb, 0x89 ),
-	EXPECT ( 0x54, 0xc5, 0x21, 0x7b, 0x51, 0x02, 0xd8, 0xda, 0x8b, 0xf1,
-		 0x68, 0x6e, 0xdb, 0xab, 0x2b, 0xbc, 0x0c, 0x11, 0xb0, 0xcc,
-		 0xb0, 0xf0, 0xaf, 0x23, 0x4c, 0x24, 0xcf, 0x15, 0xec, 0xc8,
-		 0xcb, 0x39, 0xc2, 0x33, 0xaa, 0xca, 0x48, 0xfc, 0xce, 0xee,
-		 0x86, 0x3d, 0xa8, 0x81, 0xff, 0xcb, 0xb4, 0x34, 0xa6, 0xcc,
-		 0xb7, 0xda, 0x2f, 0xb2, 0x10 ) );
-
-/** SHA-1 Test 3 */
-HASH_DF_TEST ( test_sha1_3, sha1_algorithm,
-	INPUT ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
-		0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13,
-		0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
-		0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-		0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31,
-		0x32, 0x33, 0x34, 0x35, 0x36, 0x20, 0x21, 0x22, 0x23, 0x24,
-		0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
-		0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53,
-		0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d,
-		0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
-		0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71,
-		0x72, 0x73, 0x74, 0x75, 0x76 ),
-	EXPECT ( 0x99, 0xb9, 0x53, 0x7b, 0x84, 0x27, 0xb8, 0xce, 0x23, 0x21,
-		 0x9a, 0x61, 0x1c, 0xbe, 0x61, 0x06, 0x44, 0xcf, 0x85, 0x03,
-		 0xee, 0xc5, 0xba, 0x22, 0xde, 0x1a, 0xb2, 0x12, 0xc3, 0xd0,
-		 0x85, 0x8e, 0x9e, 0x3b, 0x90, 0x26, 0xd4, 0xe7, 0x7d, 0x58,
-		 0xe0, 0x2e, 0x85, 0xa2, 0x31, 0x4c, 0xe3, 0xd7, 0x4a, 0x93,
-		 0x32, 0x4b, 0x27, 0xbd, 0xe8 ) );
-
-/** SHA-1 Test 4 */
-HASH_DF_TEST ( test_sha1_4, sha1_algorithm,
-	INPUT ( 0x00, 0x99, 0xb9, 0x53, 0x7b, 0x84, 0x27, 0xb8, 0xce, 0x23,
-		0x21, 0x9a, 0x61, 0x1c, 0xbe, 0x61, 0x06, 0x44, 0xcf, 0x85,
-		0x03, 0xee, 0xc5, 0xba, 0x22, 0xde, 0x1a, 0xb2, 0x12, 0xc3,
-		0xd0, 0x85, 0x8e, 0x9e, 0x3b, 0x90, 0x26, 0xd4, 0xe7, 0x7d,
-		0x58, 0xe0, 0x2e, 0x85, 0xa2, 0x31, 0x4c, 0xe3, 0xd7, 0x4a,
-		0x93, 0x32, 0x4b, 0x27, 0xbd, 0xe8 ),
-	EXPECT ( 0xa7, 0x02, 0x66, 0xf7, 0xf9, 0x1e, 0xc4, 0xd2, 0x88, 0x73,
-		 0x14, 0x79, 0x34, 0xce, 0xaf, 0x2a, 0x2c, 0xc3, 0x5a, 0x0f,
-		 0xd5, 0xe0, 0x0a, 0xba, 0xe7, 0x9d, 0xc6, 0x60, 0x5f, 0xab,
-		 0xd6, 0xf5, 0xf9, 0x28, 0xe1, 0x8c, 0x63, 0x26, 0x8e, 0x1a,
-		 0xf4, 0x85, 0xda, 0x6c, 0xbf, 0x04, 0x16, 0xdc, 0xdc, 0x5f,
-		 0xb8, 0xbc, 0x9c, 0x94, 0xb6 ) );
-
-/** SHA-1 Test 5 */
-HASH_DF_TEST ( test_sha1_5, sha1_algorithm,
-	INPUT ( 0x01, 0xd0, 0x8f, 0xb4, 0x41, 0xf2, 0xf4, 0xcb, 0x37, 0xcf,
-		0x6c, 0x24, 0x20, 0xa8, 0x2c, 0x74, 0x27, 0xac, 0xf7, 0xfc,
-		0xfd, 0x79, 0x90, 0x14, 0x38, 0x34, 0xa5, 0xc2, 0x56, 0xab,
-		0x28, 0x39, 0x36, 0x6d, 0x96, 0x34, 0x8c, 0xfe, 0x8c, 0x97,
-		0xab, 0x67, 0x67, 0xb0, 0x5e, 0x83, 0xa9, 0x80, 0x40, 0x6d,
-		0x94, 0xbe, 0xe3, 0x3c, 0xbb, 0x89, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6 ),
-	EXPECT ( 0x0a, 0x04, 0x41, 0xa5, 0x2b, 0xed, 0xf7, 0x94, 0xf5, 0xaa,
-		 0x62, 0x7b, 0xcb, 0xd8, 0x1f, 0x93, 0xe0, 0x11, 0xd5, 0x1f,
-		 0x34, 0x74, 0x80, 0x2c, 0x37, 0x50, 0x76, 0x75, 0x51, 0xb4,
-		 0x5b, 0x69, 0xf3, 0xd3, 0x59, 0x39, 0xc9, 0x32, 0xae, 0x1c,
-		 0xb7, 0xc9, 0x89, 0x4f, 0xb8, 0x84, 0x65, 0xe0, 0xcf, 0xd1,
-		 0xcc, 0x26, 0x1e, 0x22, 0xc5 ) );
-
-/** SHA-1 Test 6 */
-HASH_DF_TEST ( test_sha1_6, sha1_algorithm,
-	INPUT ( 0x00, 0x0a, 0x04, 0x41, 0xa5, 0x2b, 0xed, 0xf7, 0x94, 0xf5,
-		0xaa, 0x62, 0x7b, 0xcb, 0xd8, 0x1f, 0x93, 0xe0, 0x11, 0xd5,
-		0x1f, 0x34, 0x74, 0x80, 0x2c, 0x37, 0x50, 0x76, 0x75, 0x51,
-		0xb4, 0x5b, 0x69, 0xf3, 0xd3, 0x59, 0x39, 0xc9, 0x32, 0xae,
-		0x1c, 0xb7, 0xc9, 0x89, 0x4f, 0xb8, 0x84, 0x65, 0xe0, 0xcf,
-		0xd1, 0xcc, 0x26, 0x1e, 0x22, 0xc5 ),
-	EXPECT ( 0x04, 0x11, 0xc8, 0xb0, 0xdb, 0xa7, 0x56, 0xe8, 0x84, 0x2b,
-		 0x3f, 0xb0, 0x2d, 0x2f, 0xeb, 0x7c, 0xee, 0xa5, 0x67, 0x42,
-		 0xee, 0x93, 0x79, 0xc9, 0x0e, 0x6d, 0x3b, 0x2f, 0x10, 0x10,
-		 0xd4, 0x0f, 0x4f, 0x4d, 0xca, 0xda, 0x61, 0xcf, 0xdf, 0xb4,
-		 0x8a, 0xf8, 0x47, 0xca, 0xcc, 0x4c, 0x92, 0xc6, 0x14, 0x44,
-		 0x85, 0xc2, 0x27, 0xca, 0x05 ) );
-
-/** SHA-1 Test 7 */
-HASH_DF_TEST ( test_sha1_7, sha1_algorithm,
-	INPUT ( 0x01, 0x0e, 0x16, 0x0a, 0x56, 0x07, 0x95, 0x4e, 0x7d, 0x79,
-		0xd5, 0xa2, 0x2b, 0xf9, 0x08, 0x0b, 0x10, 0xce, 0xb7, 0x3c,
-		0x62, 0x23, 0x07, 0xf9, 0xf5, 0x45, 0xbd, 0xb1, 0xa4, 0x61,
-		0xc5, 0x2f, 0x79, 0x43, 0x21, 0x24, 0x3a, 0xac, 0xe2, 0x3f,
-		0x36, 0x3f, 0xef, 0xb3, 0x5d, 0xc5, 0xbe, 0xa7, 0xe7, 0x31,
-		0x44, 0x14, 0xcf, 0x78, 0xb3, 0xf9, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6 ),
-	EXPECT ( 0xdc, 0x24, 0xdf, 0x10, 0x2f, 0xa9, 0xf9, 0x6c, 0xc1, 0xcf,
-		 0xf8, 0xc1, 0x16, 0xc7, 0x9d, 0x14, 0x97, 0xd7, 0xc2, 0x7b,
-		 0xba, 0x5b, 0xa8, 0x01, 0xe1, 0x56, 0x21, 0x93, 0x35, 0x3f,
-		 0x31, 0xe3, 0x22, 0x39, 0x57, 0x84, 0x69, 0xb8, 0x0f, 0x2f,
-		 0x51, 0x64, 0x54, 0x37, 0x28, 0x71, 0x7f, 0x17, 0x1f, 0xdb,
-		 0x02, 0xb2, 0xad, 0x57, 0x95 ) );
-
-/** SHA-1 Test 8 */
-HASH_DF_TEST ( test_sha1_8, sha1_algorithm,
-	INPUT ( 0x00, 0xdc, 0x24, 0xdf, 0x10, 0x2f, 0xa9, 0xf9, 0x6c, 0xc1,
-		0xcf, 0xf8, 0xc1, 0x16, 0xc7, 0x9d, 0x14, 0x97, 0xd7, 0xc2,
-		0x7b, 0xba, 0x5b, 0xa8, 0x01, 0xe1, 0x56, 0x21, 0x93, 0x35,
-		0x3f, 0x31, 0xe3, 0x22, 0x39, 0x57, 0x84, 0x69, 0xb8, 0x0f,
-		0x2f, 0x51, 0x64, 0x54, 0x37, 0x28, 0x71, 0x7f, 0x17, 0x1f,
-		0xdb, 0x02, 0xb2, 0xad, 0x57, 0x95 ),
-	EXPECT ( 0xff, 0xaf, 0x45, 0x66, 0x5b, 0x11, 0x0c, 0xa1, 0x33, 0x5a,
-		 0x3f, 0xce, 0x73, 0xa7, 0x98, 0x1d, 0x0f, 0xd5, 0xc8, 0xd9,
-		 0x03, 0xf6, 0x5f, 0xaa, 0x46, 0xa3, 0xd5, 0x97, 0xbf, 0x34,
-		 0xc4, 0xe0, 0xcc, 0x16, 0x75, 0x60, 0xab, 0x94, 0xec, 0x10,
-		 0xd6, 0x41, 0x5f, 0x37, 0x83, 0xb0, 0x15, 0x67, 0x89, 0x1b,
-		 0x57, 0x66, 0x2a, 0xbb, 0x39 ) );
-
-/** SHA-1 Test 9 */
-HASH_DF_TEST ( test_sha1_9, sha1_algorithm,
-	INPUT ( 0x01, 0xd0, 0x8f, 0xb4, 0x41, 0xf2, 0xf4, 0xcb, 0x37, 0xcf,
-		0x6c, 0x24, 0x20, 0xa8, 0x2c, 0x74, 0x27, 0xac, 0xf7, 0xfc,
-		0xfd, 0x79, 0x90, 0x14, 0x38, 0x34, 0xa5, 0xc2, 0x56, 0xab,
-		0x28, 0x39, 0x36, 0x6d, 0x96, 0x34, 0x8c, 0xfe, 0x8c, 0x97,
-		0xab, 0x67, 0x67, 0xb0, 0x5e, 0x83, 0xa9, 0x80, 0x40, 0x6d,
-		0x94, 0xbe, 0xe3, 0x3c, 0xbb, 0x89, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
-		0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72,
-		0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c,
-		0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86,
-		0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x90,
-		0x91, 0x92, 0x93, 0x94, 0x95, 0x96 ),
-	EXPECT ( 0x8f, 0xde, 0xc9, 0xe6, 0x18, 0x96, 0x36, 0xf0, 0xa5, 0xce,
-		 0x53, 0xe8, 0x1c, 0x13, 0xac, 0x93, 0x84, 0xfa, 0xfb, 0xa0,
-		 0xee, 0x50, 0xc1, 0xe2, 0xc8, 0xa0, 0x99, 0xde, 0x41, 0xd8,
-		 0xcc, 0x7a, 0x31, 0x42, 0x9e, 0x8c, 0x8c, 0x88, 0x80, 0xe3,
-		 0xb4, 0x5d, 0x89, 0xdb, 0x61, 0x2c, 0xd9, 0xd2, 0x8a, 0x55,
-		 0xc0, 0xf0, 0xd1, 0xf8, 0xf9 ) );
-
-/** SHA-1 Test 10 */
-HASH_DF_TEST ( test_sha1_10, sha1_algorithm,
-	INPUT ( 0x00, 0x8f, 0xde, 0xc9, 0xe6, 0x18, 0x96, 0x36, 0xf0, 0xa5,
-		0xce, 0x53, 0xe8, 0x1c, 0x13, 0xac, 0x93, 0x84, 0xfa, 0xfb,
-		0xa0, 0xee, 0x50, 0xc1, 0xe2, 0xc8, 0xa0, 0x99, 0xde, 0x41,
-		0xd8, 0xcc, 0x7a, 0x31, 0x42, 0x9e, 0x8c, 0x8c, 0x88, 0x80,
-		0xe3, 0xb4, 0x5d, 0x89, 0xdb, 0x61, 0x2c, 0xd9, 0xd2, 0x8a,
-		0x55, 0xc0, 0xf0, 0xd1, 0xf8, 0xf9 ),
-	EXPECT ( 0x97, 0xd0, 0x76, 0x31, 0xb2, 0x2f, 0x7c, 0x95, 0x7f, 0x19,
-		 0xf8, 0x44, 0xf4, 0xdc, 0x2a, 0xfa, 0x6f, 0xf9, 0x7c, 0x35,
-		 0x66, 0x18, 0x98, 0x21, 0x69, 0x91, 0xd1, 0x5b, 0xda, 0x75,
-		 0xbb, 0xd0, 0x5e, 0xdf, 0x8a, 0x0f, 0xa8, 0x0c, 0xca, 0xb9,
-		 0x51, 0x95, 0xf4, 0x79, 0xcd, 0x76, 0x20, 0x22, 0x35, 0x10,
-		 0x2e, 0xf6, 0x27, 0x29, 0x19 ) );
-
-/** SHA-1 Test 11 */
-HASH_DF_TEST ( test_sha1_11, sha1_algorithm,
-	INPUT ( 0x01, 0x27, 0xaf, 0x40, 0x17, 0xca, 0xc5, 0xb3, 0x86, 0x24,
-		0xe8, 0x4c, 0x2d, 0x10, 0xef, 0xd7, 0x8d, 0xf4, 0xf4, 0x77,
-		0xd6, 0x54, 0x69, 0x5a, 0x04, 0x32, 0x32, 0x6b, 0x3a, 0x1c,
-		0x4e, 0x88, 0x4a, 0x90, 0x22, 0x28, 0xe8, 0x9e, 0xaa, 0x90,
-		0x36, 0xcd, 0x2a, 0xf7, 0x05, 0x66, 0x81, 0x26, 0x23, 0x72,
-		0xc7, 0x13, 0x71, 0xd4, 0x53, 0x3d, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8,
-		0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2,
-		0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc,
-		0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6,
-		0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0,
-		0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6 ),
-	EXPECT ( 0x2c, 0x9c, 0x0d, 0x80, 0x03, 0xe3, 0x40, 0x23, 0xbe, 0x5b,
-		 0x63, 0xfd, 0xb9, 0xd2, 0x24, 0xb4, 0x25, 0x0c, 0xc8, 0x15,
-		 0x5b, 0xd1, 0xee, 0xd8, 0xe5, 0x5d, 0x91, 0x06, 0x2f, 0xdd,
-		 0x27, 0x64, 0xb8, 0xae, 0xa9, 0xc8, 0x2f, 0x84, 0x7e, 0x09,
-		 0xa3, 0xfe, 0xa1, 0xc7, 0x11, 0x7d, 0x6f, 0x7d, 0xd2, 0xef,
-		 0x77, 0x7d, 0x7c, 0xf3, 0xeb ) );
-
-/** SHA-1 Test 12 */
-HASH_DF_TEST ( test_sha1_12, sha1_algorithm,
-	INPUT ( 0x00, 0x2c, 0x9c, 0x0d, 0x80, 0x03, 0xe3, 0x40, 0x23, 0xbe,
-		0x5b, 0x63, 0xfd, 0xb9, 0xd2, 0x24, 0xb4, 0x25, 0x0c, 0xc8,
-		0x15, 0x5b, 0xd1, 0xee, 0xd8, 0xe5, 0x5d, 0x91, 0x06, 0x2f,
-		0xdd, 0x27, 0x64, 0xb8, 0xae, 0xa9, 0xc8, 0x2f, 0x84, 0x7e,
-		0x09, 0xa3, 0xfe, 0xa1, 0xc7, 0x11, 0x7d, 0x6f, 0x7d, 0xd2,
-		0xef, 0x77, 0x7d, 0x7c, 0xf3, 0xeb ),
-	EXPECT ( 0x7e, 0x8a, 0xa4, 0x93, 0x42, 0x72, 0xf2, 0xa2, 0x8b, 0xbf,
-		 0xd7, 0xaf, 0xcc, 0x88, 0xce, 0x1c, 0x80, 0x6a, 0x38, 0xea,
-		 0x7b, 0x89, 0x45, 0xc8, 0xd1, 0xb6, 0xf1, 0x75, 0x03, 0x78,
-		 0x54, 0x6a, 0xb1, 0xa2, 0x96, 0x00, 0xd6, 0x44, 0xec, 0x52,
-		 0x0e, 0x8b, 0xff, 0xf6, 0x0c, 0xb7, 0x7f, 0xa5, 0x4b, 0xb1,
-		 0x1a, 0x83, 0x31, 0xcb, 0x24 ) );
-
-/** SHA-1 Test 13 */
-HASH_DF_TEST ( test_sha1_13, sha1_algorithm,
-	INPUT ( 0x01, 0x99, 0xb9, 0x53, 0x7b, 0x84, 0x27, 0xb8, 0xce, 0x23,
-		0x21, 0x9a, 0x61, 0x1c, 0xbe, 0x61, 0x06, 0x44, 0xcf, 0x85,
-		0x03, 0xee, 0xc5, 0xba, 0x22, 0xde, 0x1a, 0xb2, 0x12, 0xc3,
-		0xd0, 0x85, 0x8e, 0x9e, 0x3b, 0x90, 0x26, 0xd4, 0xe7, 0x7d,
-		0x58, 0xe0, 0x2e, 0x85, 0xa2, 0x31, 0x4c, 0xe3, 0xd7, 0x4a,
-		0x93, 0x32, 0x4b, 0x27, 0xbd, 0xe8, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6 ),
-	EXPECT ( 0xe5, 0x04, 0x3d, 0x1b, 0x95, 0x4b, 0x34, 0xba, 0x60, 0xd2,
-		 0x48, 0xe8, 0x83, 0xef, 0x49, 0x8c, 0x5c, 0x52, 0x36, 0xb8,
-		 0x26, 0x0e, 0x23, 0x8e, 0x02, 0xc8, 0xd4, 0xfc, 0x5f, 0xfe,
-		 0x90, 0xfa, 0x40, 0x13, 0x44, 0x70, 0x75, 0xbb, 0x54, 0x3e,
-		 0xf0, 0x0c, 0x3b, 0xda, 0x59, 0x6b, 0x10, 0x88, 0x61, 0xf0,
-		 0x6b, 0xf9, 0x1b, 0x45, 0xd6 ) );
-
-/** SHA-1 Test 14 */
-HASH_DF_TEST ( test_sha1_14, sha1_algorithm,
-	INPUT ( 0x00, 0xe5, 0x04, 0x3d, 0x1b, 0x95, 0x4b, 0x34, 0xba, 0x60,
-		0xd2, 0x48, 0xe8, 0x83, 0xef, 0x49, 0x8c, 0x5c, 0x52, 0x36,
-		0xb8, 0x26, 0x0e, 0x23, 0x8e, 0x02, 0xc8, 0xd4, 0xfc, 0x5f,
-		0xfe, 0x90, 0xfa, 0x40, 0x13, 0x44, 0x70, 0x75, 0xbb, 0x54,
-		0x3e, 0xf0, 0x0c, 0x3b, 0xda, 0x59, 0x6b, 0x10, 0x88, 0x61,
-		0xf0, 0x6b, 0xf9, 0x1b, 0x45, 0xd6 ),
-	EXPECT ( 0x1f, 0x3f, 0x63, 0x10, 0xed, 0x10, 0xfc, 0x9f, 0x93, 0x8c,
-		 0x43, 0x22, 0x61, 0xaf, 0x42, 0xe9, 0xe9, 0x17, 0x5f, 0x08,
-		 0x0f, 0x32, 0x22, 0xdc, 0x11, 0x8b, 0xa7, 0xcf, 0x88, 0x8c,
-		 0xdc, 0x3f, 0x36, 0x0d, 0xd2, 0x8f, 0x5e, 0xcb, 0x7c, 0x80,
-		 0xa6, 0xbc, 0xfc, 0xfc, 0x0f, 0x51, 0xfe, 0x2f, 0x77, 0xc1,
-		 0xc9, 0x9d, 0xf0, 0xa2, 0x09 ) );
-
-/** SHA-1 Test 15 */
-HASH_DF_TEST ( test_sha1_15, sha1_algorithm,
-	INPUT ( 0x01, 0x04, 0x43, 0xa0, 0x2c, 0x82, 0x5c, 0x31, 0x59, 0xf4,
-		0x5e, 0x8c, 0x0a, 0xe5, 0x9e, 0x8c, 0x76, 0x45, 0x69, 0x95,
-		0xc0, 0x35, 0x40, 0x46, 0x6a, 0x14, 0x54, 0x7c, 0xcb, 0xe8,
-		0x8b, 0x6d, 0x39, 0x76, 0x21, 0x17, 0x32, 0x84, 0x72, 0xf5,
-		0x2b, 0x84, 0x57, 0x5a, 0xaf, 0xe8, 0x8b, 0x2d, 0x1e, 0x50,
-		0x4f, 0x21, 0xec, 0x4e, 0x31, 0x35, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6 ),
-	EXPECT ( 0x9d, 0xc3, 0x52, 0x08, 0xee, 0x2b, 0x8c, 0x58, 0x1e, 0xa3,
-		 0x0b, 0xaa, 0xcb, 0x5d, 0x74, 0x31, 0x7a, 0x87, 0x94, 0x54,
-		 0x10, 0x71, 0x7e, 0x58, 0xd3, 0x70, 0x5f, 0xbd, 0xc7, 0x60,
-		 0xbe, 0x0c, 0xc9, 0x0e, 0xd1, 0xcc, 0xbb, 0x89, 0x7d, 0x47,
-		 0xd2, 0x7e, 0x2b, 0x2e, 0x42, 0x2b, 0x32, 0xb9, 0x7f, 0x05,
-		 0x0d, 0x1b, 0xd2, 0xb4, 0x90 ) );
-
-/** SHA-1 Test 16 */
-HASH_DF_TEST ( test_sha1_16, sha1_algorithm,
-	INPUT ( 0x00, 0x9d, 0xc3, 0x52, 0x08, 0xee, 0x2b, 0x8c, 0x58, 0x1e,
-		0xa3, 0x0b, 0xaa, 0xcb, 0x5d, 0x74, 0x31, 0x7a, 0x87, 0x94,
-		0x54, 0x10, 0x71, 0x7e, 0x58, 0xd3, 0x70, 0x5f, 0xbd, 0xc7,
-		0x60, 0xbe, 0x0c, 0xc9, 0x0e, 0xd1, 0xcc, 0xbb, 0x89, 0x7d,
-		0x47, 0xd2, 0x7e, 0x2b, 0x2e, 0x42, 0x2b, 0x32, 0xb9, 0x7f,
-		0x05, 0x0d, 0x1b, 0xd2, 0xb4, 0x90 ),
-	EXPECT ( 0x1a, 0x5a, 0xd6, 0xce, 0xa3, 0xd1, 0x5d, 0xa5, 0xfb, 0x47,
-		 0x42, 0x13, 0x13, 0x09, 0xf0, 0xed, 0x88, 0xcf, 0x4c, 0x90,
-		 0xa6, 0xc1, 0xcc, 0xee, 0x35, 0xa8, 0x76, 0xeb, 0xfc, 0xcc,
-		 0x82, 0x67, 0x29, 0xb6, 0x63, 0x9f, 0x81, 0x19, 0x65, 0xb0,
-		 0xef, 0x85, 0x76, 0xe7, 0x5c, 0xb3, 0xcf, 0xe8, 0x22, 0x07,
-		 0x68, 0xb2, 0x6c, 0xe7, 0x7a ) );
-
-/** SHA-1 Test 17 */
-HASH_DF_TEST ( test_sha1_17, sha1_algorithm,
-	INPUT ( 0x01, 0x99, 0xb9, 0x53, 0x7b, 0x84, 0x27, 0xb8, 0xce, 0x23,
-		0x21, 0x9a, 0x61, 0x1c, 0xbe, 0x61, 0x06, 0x44, 0xcf, 0x85,
-		0x03, 0xee, 0xc5, 0xba, 0x22, 0xde, 0x1a, 0xb2, 0x12, 0xc3,
-		0xd0, 0x85, 0x8e, 0x9e, 0x3b, 0x90, 0x26, 0xd4, 0xe7, 0x7d,
-		0x58, 0xe0, 0x2e, 0x85, 0xa2, 0x31, 0x4c, 0xe3, 0xd7, 0x4a,
-		0x93, 0x32, 0x4b, 0x27, 0xbd, 0xe8, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
-		0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72,
-		0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c,
-		0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86,
-		0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x90,
-		0x91, 0x92, 0x93, 0x94, 0x95, 0x96 ),
-	EXPECT ( 0x56, 0x3a, 0x5d, 0x20, 0x7d, 0x37, 0x70, 0x7b, 0xf5, 0xf2,
-		 0x4d, 0x0b, 0xd4, 0x93, 0x5d, 0xc3, 0x8d, 0xbe, 0x04, 0x36,
-		 0x37, 0xb3, 0xff, 0x8a, 0xb6, 0x8c, 0xfc, 0xe2, 0xf2, 0x90,
-		 0xd1, 0x69, 0x95, 0x20, 0x55, 0x24, 0x19, 0x0f, 0xd2, 0x91,
-		 0xaa, 0x8a, 0x6e, 0x6b, 0x8e, 0x6d, 0x56, 0xa4, 0x31, 0x33,
-		 0x3b, 0x40, 0x8e, 0x6f, 0xa8 ) );
-
-/** SHA-1 Test 18 */
-HASH_DF_TEST ( test_sha1_18, sha1_algorithm,
-	INPUT ( 0x00, 0x56, 0x3a, 0x5d, 0x20, 0x7d, 0x37, 0x70, 0x7b, 0xf5,
-		0xf2, 0x4d, 0x0b, 0xd4, 0x93, 0x5d, 0xc3, 0x8d, 0xbe, 0x04,
-		0x36, 0x37, 0xb3, 0xff, 0x8a, 0xb6, 0x8c, 0xfc, 0xe2, 0xf2,
-		0x90, 0xd1, 0x69, 0x95, 0x20, 0x55, 0x24, 0x19, 0x0f, 0xd2,
-		0x91, 0xaa, 0x8a, 0x6e, 0x6b, 0x8e, 0x6d, 0x56, 0xa4, 0x31,
-		0x33, 0x3b, 0x40, 0x8e, 0x6f, 0xa8 ),
-	EXPECT ( 0xc5, 0xd3, 0xe9, 0x55, 0x1e, 0x00, 0xe4, 0xee, 0x32, 0xb2,
-		 0x11, 0x6f, 0xaf, 0x4d, 0xef, 0xf4, 0xd4, 0xcf, 0xad, 0x2b,
-		 0xdc, 0x2d, 0xba, 0xa2, 0xe0, 0xe7, 0xf9, 0xdd, 0xb9, 0xd8,
-		 0x1e, 0xed, 0x45, 0xe0, 0xa5, 0x0d, 0xa5, 0xaf, 0xd5, 0xc1,
-		 0xf6, 0xbc, 0xda, 0xf8, 0x1d, 0x28, 0x9c, 0xf4, 0xbd, 0x3c,
-		 0x91, 0xb7, 0x00, 0x5c, 0x18 ) );
-
-/** SHA-1 Test 19 */
-HASH_DF_TEST ( test_sha1_19, sha1_algorithm,
-	INPUT ( 0x01, 0x1c, 0x0e, 0x46, 0x75, 0x9b, 0x38, 0x55, 0x6a, 0x28,
-		0xa4, 0x5e, 0x7b, 0x83, 0xe1, 0x4d, 0xb8, 0x62, 0x8d, 0xb1,
-		0x62, 0x13, 0xe1, 0xba, 0x2d, 0x97, 0x74, 0xf6, 0xc0, 0xac,
-		0x68, 0xf0, 0x56, 0xdb, 0x00, 0xfb, 0x12, 0xe1, 0x5b, 0xf4,
-		0xde, 0x95, 0x50, 0xb7, 0x33, 0x1e, 0x2d, 0xbd, 0x66, 0x4c,
-		0x3a, 0xb7, 0x76, 0xe8, 0x25, 0x51, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8,
-		0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2,
-		0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc,
-		0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6,
-		0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0,
-		0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6 ),
-	EXPECT ( 0x60, 0x01, 0x93, 0xc8, 0xf6, 0x03, 0x1a, 0x2d, 0x49, 0x37,
-		 0x2a, 0x8b, 0x0f, 0x60, 0xf6, 0x8c, 0x1d, 0xfd, 0xac, 0xd4,
-		 0xf8, 0xea, 0x01, 0x37, 0x47, 0xd7, 0x14, 0x82, 0x33, 0x3d,
-		 0xf5, 0x25, 0x2e, 0x95, 0xb8, 0x22, 0x57, 0x39, 0x1b, 0xf1,
-		 0x0a, 0xb0, 0x7d, 0x12, 0x08, 0xb6, 0xbd, 0x66, 0x5b, 0x30,
-		 0x0a, 0xa4, 0xdb, 0x9c, 0x3e ) );
-
-/** SHA-1 Test 20 */
-HASH_DF_TEST ( test_sha1_20, sha1_algorithm,
-	INPUT ( 0x00, 0x60, 0x01, 0x93, 0xc8, 0xf6, 0x03, 0x1a, 0x2d, 0x49,
-		0x37, 0x2a, 0x8b, 0x0f, 0x60, 0xf6, 0x8c, 0x1d, 0xfd, 0xac,
-		0xd4, 0xf8, 0xea, 0x01, 0x37, 0x47, 0xd7, 0x14, 0x82, 0x33,
-		0x3d, 0xf5, 0x25, 0x2e, 0x95, 0xb8, 0x22, 0x57, 0x39, 0x1b,
-		0xf1, 0x0a, 0xb0, 0x7d, 0x12, 0x08, 0xb6, 0xbd, 0x66, 0x5b,
-		0x30, 0x0a, 0xa4, 0xdb, 0x9c, 0x3e ),
-	EXPECT ( 0x6b, 0x71, 0x82, 0x3b, 0x18, 0x20, 0x07, 0x71, 0xca, 0xae,
-		 0x5d, 0x12, 0x55, 0xc1, 0x40, 0x3e, 0xdf, 0xe3, 0x8b, 0x4d,
-		 0x18, 0xc7, 0x87, 0xbb, 0x44, 0xcd, 0x17, 0x18, 0x61, 0x52,
-		 0xef, 0xea, 0xd6, 0xfd, 0xc4, 0xb8, 0x94, 0xf9, 0x20, 0x02,
-		 0xc0, 0x72, 0x09, 0x55, 0x5d, 0x7e, 0x35, 0x54, 0xf9, 0xd1,
-		 0x2f, 0xc5, 0x59, 0x7f, 0x22 ) );
-
-/** SHA-256 Test 1 */
-HASH_DF_TEST ( test_sha256_1, sha256_algorithm,
-	INPUT ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
-		0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13,
-		0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
-		0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-		0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31,
-		0x32, 0x33, 0x34, 0x35, 0x36, 0x20, 0x21, 0x22, 0x23, 0x24,
-		0x25, 0x26, 0x27 ),
-	EXPECT ( 0xab, 0x41, 0xcd, 0xe4, 0x37, 0xab, 0x8b, 0x09, 0x1c, 0xa7,
-		 0xc5, 0x75, 0x5d, 0x10, 0xf0, 0x11, 0x0c, 0x1d, 0xbd, 0x46,
-		 0x2f, 0x22, 0x6c, 0xfd, 0xab, 0xfb, 0xb0, 0x4a, 0x8b, 0xcd,
-		 0xef, 0x95, 0x16, 0x7d, 0x84, 0xaf, 0x64, 0x12, 0x8c, 0x0d,
-		 0x71, 0xf4, 0xd5, 0xb8, 0xc0, 0xed, 0xfb, 0xbe, 0x3d, 0xf4,
-		 0x04, 0x48, 0xd2, 0xd8, 0xe1 ) );
-
-/** SHA-256 Test 2 */
-HASH_DF_TEST ( test_sha256_2, sha256_algorithm,
-	INPUT ( 0x00, 0xab, 0x41, 0xcd, 0xe4, 0x37, 0xab, 0x8b, 0x09, 0x1c,
-		0xa7, 0xc5, 0x75, 0x5d, 0x10, 0xf0, 0x11, 0x0c, 0x1d, 0xbd,
-		0x46, 0x2f, 0x22, 0x6c, 0xfd, 0xab, 0xfb, 0xb0, 0x4a, 0x8b,
-		0xcd, 0xef, 0x95, 0x16, 0x7d, 0x84, 0xaf, 0x64, 0x12, 0x8c,
-		0x0d, 0x71, 0xf4, 0xd5, 0xb8, 0xc0, 0xed, 0xfb, 0xbe, 0x3d,
-		0xf4, 0x04, 0x48, 0xd2, 0xd8, 0xe1 ),
-	EXPECT ( 0xe1, 0x5d, 0xe4, 0xa8, 0xe3, 0xb1, 0x41, 0x9b, 0x61, 0xd5,
-		 0x34, 0xf1, 0x5d, 0xbd, 0x31, 0xee, 0x19, 0xec, 0x59, 0x5f,
-		 0x8b, 0x98, 0x11, 0x1a, 0x94, 0xf5, 0x22, 0x37, 0xad, 0x5d,
-		 0x66, 0xf0, 0xcf, 0xaa, 0xfd, 0xdc, 0x90, 0x19, 0x59, 0x02,
-		 0xe9, 0x79, 0xf7, 0x9b, 0x65, 0x35, 0x7f, 0xea, 0x85, 0x99,
-		 0x8e, 0x4e, 0x37, 0xd2, 0xc1 ) );
-
-/** SHA-256 Test 3 */
-HASH_DF_TEST ( test_sha256_3, sha256_algorithm,
-	INPUT ( 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09,
-		0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13,
-		0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
-		0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-		0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31,
-		0x32, 0x33, 0x34, 0x35, 0x36, 0x20, 0x21, 0x22, 0x23, 0x24,
-		0x25, 0x26, 0x27, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46,
-		0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f, 0x50,
-		0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5a,
-		0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63, 0x64,
-		0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e,
-		0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76 ),
-	EXPECT ( 0xa3, 0xe9, 0x4e, 0x39, 0x26, 0xfd, 0xa1, 0x69, 0xc3, 0x03,
-		 0xd6, 0x64, 0x38, 0x39, 0x05, 0xe0, 0xd7, 0x99, 0x62, 0xd1,
-		 0x65, 0x44, 0x6d, 0x63, 0xbd, 0xa6, 0x54, 0xd1, 0x32, 0xf7,
-		 0x2d, 0xb4, 0x71, 0x56, 0x4b, 0x45, 0x6f, 0xf2, 0xee, 0xc8,
-		 0x36, 0x42, 0x2a, 0xcc, 0x5a, 0x02, 0x99, 0x35, 0xa7, 0x99,
-		 0x29, 0x90, 0x94, 0xa1, 0xca ) );
-
-/** SHA-256 Test 4 */
-HASH_DF_TEST ( test_sha256_4, sha256_algorithm,
-	INPUT ( 0x00, 0xa3, 0xe9, 0x4e, 0x39, 0x26, 0xfd, 0xa1, 0x69, 0xc3,
-		0x03, 0xd6, 0x64, 0x38, 0x39, 0x05, 0xe0, 0xd7, 0x99, 0x62,
-		0xd1, 0x65, 0x44, 0x6d, 0x63, 0xbd, 0xa6, 0x54, 0xd1, 0x32,
-		0xf7, 0x2d, 0xb4, 0x71, 0x56, 0x4b, 0x45, 0x6f, 0xf2, 0xee,
-		0xc8, 0x36, 0x42, 0x2a, 0xcc, 0x5a, 0x02, 0x99, 0x35, 0xa7,
-		0x99, 0x29, 0x90, 0x94, 0xa1, 0xca ),
-	EXPECT ( 0x44, 0x74, 0x8a, 0x78, 0xb1, 0x6e, 0x75, 0x55, 0x9f, 0x88,
-		 0x1d, 0x51, 0xc1, 0x5d, 0xfe, 0x6c, 0x52, 0xcf, 0xb0, 0xbb,
-		 0x71, 0x62, 0x01, 0x69, 0xc7, 0x93, 0x34, 0x27, 0x67, 0xe7,
-		 0xf8, 0x87, 0x5f, 0x42, 0xcb, 0x6a, 0x20, 0xc8, 0x9d, 0x7c,
-		 0x6e, 0xf3, 0xdc, 0x61, 0x0d, 0x8f, 0xf2, 0x03, 0xd6, 0x76,
-		 0x6c, 0xed, 0x19, 0x19, 0xd0 ) );
-
-/** SHA-256 Test 5 */
-HASH_DF_TEST ( test_sha256_5, sha256_algorithm,
-	INPUT ( 0x01, 0xab, 0x41, 0xcd, 0xe4, 0x37, 0xab, 0x8b, 0x09, 0x1c,
-		0xa7, 0xc5, 0x75, 0x5d, 0x10, 0xf0, 0x11, 0x0c, 0x1d, 0xbd,
-		0x46, 0x2f, 0x22, 0x6c, 0xfd, 0xab, 0xfb, 0xb0, 0x4a, 0x8b,
-		0xcd, 0xef, 0x95, 0x16, 0x7d, 0x84, 0xaf, 0x64, 0x12, 0x8c,
-		0x0d, 0x71, 0xf4, 0xd5, 0xb8, 0xc0, 0xed, 0xfb, 0xbe, 0x3d,
-		0xf4, 0x04, 0x48, 0xd2, 0xd8, 0xe1, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6 ),
-	EXPECT ( 0x3c, 0x40, 0xe8, 0xdc, 0x71, 0x72, 0xfd, 0xa2, 0x32, 0x55,
-		 0x0a, 0x1d, 0x8e, 0x14, 0x47, 0xc1, 0x1f, 0x47, 0x48, 0x88,
-		 0xf9, 0x6c, 0xd8, 0x5c, 0x38, 0x63, 0xd5, 0xe4, 0x84, 0x26,
-		 0x67, 0x56, 0x28, 0xd0, 0x88, 0x85, 0x34, 0x7c, 0x3e, 0xfd,
-		 0x62, 0x92, 0xfd, 0xdc, 0xd1, 0xa1, 0x42, 0x1e, 0xed, 0x51,
-		 0xb7, 0x13, 0xab, 0x09, 0x0f ) );
-
-/** SHA-256 Test 6 */
-HASH_DF_TEST ( test_sha256_6, sha256_algorithm,
-	INPUT ( 0x00, 0x3c, 0x40, 0xe8, 0xdc, 0x71, 0x72, 0xfd, 0xa2, 0x32,
-		0x55, 0x0a, 0x1d, 0x8e, 0x14, 0x47, 0xc1, 0x1f, 0x47, 0x48,
-		0x88, 0xf9, 0x6c, 0xd8, 0x5c, 0x38, 0x63, 0xd5, 0xe4, 0x84,
-		0x26, 0x67, 0x56, 0x28, 0xd0, 0x88, 0x85, 0x34, 0x7c, 0x3e,
-		0xfd, 0x62, 0x92, 0xfd, 0xdc, 0xd1, 0xa1, 0x42, 0x1e, 0xed,
-		0x51, 0xb7, 0x13, 0xab, 0x09, 0x0f ),
-	EXPECT ( 0xe7, 0x56, 0x83, 0x84, 0xf2, 0x64, 0xe4, 0xa7, 0xe7, 0xae,
-		 0x85, 0x0d, 0x9d, 0x50, 0x1f, 0xd6, 0x31, 0x83, 0x56, 0x4f,
-		 0xd7, 0xd3, 0x90, 0x44, 0x6f, 0x5b, 0xe5, 0xf6, 0x7b, 0x50,
-		 0x19, 0x5b, 0x52, 0x84, 0x69, 0x2a, 0xd4, 0xb7, 0x6d, 0xfd,
-		 0x4f, 0x52, 0x4b, 0xcf, 0xcc, 0xab, 0x62, 0xc1, 0x30, 0x9f,
-		 0x25, 0x15, 0x17, 0xdf, 0xfd ) );
-
-/** SHA-256 Test 7 */
-HASH_DF_TEST ( test_sha256_7, sha256_algorithm,
-	INPUT ( 0x01, 0x23, 0x97, 0x6c, 0x61, 0x63, 0xd7, 0xe2, 0x4a, 0x1a,
-		0x03, 0x8f, 0x2b, 0x2b, 0x64, 0x67, 0x97, 0x50, 0xca, 0x9e,
-		0xd8, 0xd1, 0x40, 0x69, 0x8d, 0x64, 0x22, 0x39, 0x7b, 0x02,
-		0x96, 0x9e, 0x6e, 0xcd, 0xd2, 0x9d, 0xac, 0xc5, 0x76, 0x7e,
-		0x2c, 0xc2, 0xd0, 0xa1, 0x56, 0xc8, 0x7a, 0xd0, 0xb3, 0x57,
-		0x89, 0x05, 0x07, 0xe0, 0x37, 0x77, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6 ),
-	EXPECT ( 0xe9, 0x83, 0xb1, 0x66, 0xa9, 0x2a, 0x99, 0x7e, 0xab, 0xcc,
-		 0x96, 0x6c, 0x6a, 0xa3, 0xd3, 0xb3, 0xa1, 0x68, 0x1f, 0xc5,
-		 0x8f, 0x58, 0x29, 0x40, 0x3b, 0x48, 0x60, 0x1e, 0xc1, 0x77,
-		 0x54, 0x94, 0x2e, 0x11, 0xc1, 0xcd, 0x46, 0x5b, 0x7d, 0xbe,
-		 0x2a, 0x78, 0xca, 0x04, 0x2c, 0xf9, 0xb3, 0x05, 0x71, 0xff,
-		 0x12, 0xe3, 0xb9, 0xf6, 0xc9 ) );
-
-/** SHA-256 Test 8 */
-HASH_DF_TEST ( test_sha256_8, sha256_algorithm,
-	INPUT ( 0x00, 0xe9, 0x83, 0xb1, 0x66, 0xa9, 0x2a, 0x99, 0x7e, 0xab,
-		0xcc, 0x96, 0x6c, 0x6a, 0xa3, 0xd3, 0xb3, 0xa1, 0x68, 0x1f,
-		0xc5, 0x8f, 0x58, 0x29, 0x40, 0x3b, 0x48, 0x60, 0x1e, 0xc1,
-		0x77, 0x54, 0x94, 0x2e, 0x11, 0xc1, 0xcd, 0x46, 0x5b, 0x7d,
-		0xbe, 0x2a, 0x78, 0xca, 0x04, 0x2c, 0xf9, 0xb3, 0x05, 0x71,
-		0xff, 0x12, 0xe3, 0xb9, 0xf6, 0xc9 ),
-	EXPECT ( 0xa9, 0x77, 0x5c, 0xe1, 0x65, 0x5b, 0xff, 0x95, 0x1b, 0xe0,
-		 0xaf, 0x5b, 0x79, 0x59, 0x72, 0x5c, 0x76, 0x7d, 0x86, 0xf1,
-		 0xe1, 0x9b, 0x11, 0xb8, 0x90, 0x04, 0xf6, 0x97, 0x4d, 0xbf,
-		 0xa0, 0x46, 0x04, 0x45, 0x8e, 0x5c, 0x52, 0x8e, 0x7e, 0x1d,
-		 0xfa, 0xb3, 0x88, 0x7b, 0xa4, 0xaa, 0xdb, 0xd6, 0xfb, 0xde,
-		 0x0b, 0x31, 0x6f, 0x1d, 0x91 ) );
-
-/** SHA-256 Test 9 */
-HASH_DF_TEST ( test_sha256_9, sha256_algorithm,
-	INPUT ( 0x01, 0xab, 0x41, 0xcd, 0xe4, 0x37, 0xab, 0x8b, 0x09, 0x1c,
-		0xa7, 0xc5, 0x75, 0x5d, 0x10, 0xf0, 0x11, 0x0c, 0x1d, 0xbd,
-		0x46, 0x2f, 0x22, 0x6c, 0xfd, 0xab, 0xfb, 0xb0, 0x4a, 0x8b,
-		0xcd, 0xef, 0x95, 0x16, 0x7d, 0x84, 0xaf, 0x64, 0x12, 0x8c,
-		0x0d, 0x71, 0xf4, 0xd5, 0xb8, 0xc0, 0xed, 0xfb, 0xbe, 0x3d,
-		0xf4, 0x04, 0x48, 0xd2, 0xd8, 0xe1, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
-		0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72,
-		0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c,
-		0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86,
-		0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x90,
-		0x91, 0x92, 0x93, 0x94, 0x95, 0x96 ),
-	EXPECT ( 0x57, 0xb2, 0xcf, 0x00, 0xb5, 0x42, 0x97, 0x46, 0x0b, 0x08,
-		 0x7e, 0x52, 0x75, 0xd7, 0xdd, 0x74, 0x23, 0xb6, 0xe3, 0xb6,
-		 0x5e, 0x35, 0x16, 0xd2, 0x48, 0x11, 0x99, 0xa0, 0x17, 0xb5,
-		 0x3a, 0x22, 0x20, 0x33, 0xfe, 0x68, 0xa6, 0x0b, 0xd0, 0xbd,
-		 0x70, 0x40, 0x26, 0xcd, 0x5a, 0x3e, 0x79, 0x55, 0xdb, 0x01,
-		 0xdc, 0xb2, 0x84, 0x48, 0xd1 ) );
-
-/** SHA-256 Test 10 */
-HASH_DF_TEST ( test_sha256_10, sha256_algorithm,
-	INPUT ( 0x00, 0x57, 0xb2, 0xcf, 0x00, 0xb5, 0x42, 0x97, 0x46, 0x0b,
-		0x08, 0x7e, 0x52, 0x75, 0xd7, 0xdd, 0x74, 0x23, 0xb6, 0xe3,
-		0xb6, 0x5e, 0x35, 0x16, 0xd2, 0x48, 0x11, 0x99, 0xa0, 0x17,
-		0xb5, 0x3a, 0x22, 0x20, 0x33, 0xfe, 0x68, 0xa6, 0x0b, 0xd0,
-		0xbd, 0x70, 0x40, 0x26, 0xcd, 0x5a, 0x3e, 0x79, 0x55, 0xdb,
-		0x01, 0xdc, 0xb2, 0x84, 0x48, 0xd1 ),
-	EXPECT ( 0x5b, 0xc1, 0xc6, 0x45, 0xcc, 0x8d, 0x32, 0x15, 0x82, 0xaf,
-		 0xbb, 0x00, 0x16, 0x99, 0x2b, 0x0f, 0x3a, 0xfe, 0x0f, 0x54,
-		 0x7a, 0xe7, 0xa7, 0x4c, 0x9c, 0x05, 0xa1, 0x44, 0x02, 0xfb,
-		 0xb1, 0xd5, 0x40, 0xe6, 0x80, 0x9d, 0x8b, 0xee, 0xf5, 0x99,
-		 0xed, 0x4c, 0x39, 0x16, 0x47, 0x40, 0xed, 0xa0, 0xd9, 0xc3,
-		 0x79, 0x5d, 0xe5, 0x52, 0xc5 ) );
-
-/** SHA-256 Test 11 */
-HASH_DF_TEST ( test_sha256_11, sha256_algorithm,
-	INPUT ( 0x01, 0xb3, 0x74, 0x95, 0x46, 0x81, 0xcf, 0xc9, 0x5b, 0x8d,
-		0xb8, 0x39, 0x52, 0x8c, 0x71, 0x08, 0x83, 0x5e, 0xb4, 0xf3,
-		0x0a, 0xd9, 0x1c, 0xbe, 0x9e, 0xa0, 0xd5, 0x45, 0xcc, 0xfd,
-		0x18, 0x13, 0x2a, 0xf1, 0xd3, 0x76, 0x8f, 0x47, 0x02, 0x77,
-		0x2b, 0x69, 0x15, 0x9f, 0x2c, 0xc0, 0x7f, 0x48, 0x74, 0x1e,
-		0xb5, 0xb2, 0xb1, 0x22, 0x11, 0x25, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8,
-		0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2,
-		0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc,
-		0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6,
-		0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0,
-		0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6 ),
-	EXPECT ( 0x5d, 0xc1, 0xc5, 0xf4, 0xb4, 0x11, 0x50, 0xce, 0xe0, 0xef,
-		 0xc1, 0x29, 0xb8, 0x37, 0xb3, 0x1c, 0x84, 0xd7, 0x91, 0xff,
-		 0x2e, 0x7e, 0xda, 0xc2, 0x9c, 0x2c, 0x50, 0xcf, 0x8a, 0x40,
-		 0x70, 0x9b, 0x98, 0x64, 0x0f, 0x7b, 0xbd, 0x32, 0xbc, 0xf0,
-		 0xfc, 0xb6, 0x13, 0xf9, 0x6d, 0x55, 0xd1, 0x60, 0x56, 0xbb,
-		 0x3c, 0xa6, 0xa7, 0x74, 0x05 ) );
-
-/** SHA-256 Test 12 */
-HASH_DF_TEST ( test_sha256_12, sha256_algorithm,
-	INPUT ( 0x00, 0x5d, 0xc1, 0xc5, 0xf4, 0xb4, 0x11, 0x50, 0xce, 0xe0,
-		0xef, 0xc1, 0x29, 0xb8, 0x37, 0xb3, 0x1c, 0x84, 0xd7, 0x91,
-		0xff, 0x2e, 0x7e, 0xda, 0xc2, 0x9c, 0x2c, 0x50, 0xcf, 0x8a,
-		0x40, 0x70, 0x9b, 0x98, 0x64, 0x0f, 0x7b, 0xbd, 0x32, 0xbc,
-		0xf0, 0xfc, 0xb6, 0x13, 0xf9, 0x6d, 0x55, 0xd1, 0x60, 0x56,
-		0xbb, 0x3c, 0xa6, 0xa7, 0x74, 0x05 ),
-	EXPECT ( 0x62, 0x22, 0x10, 0x8c, 0xed, 0xfe, 0x6d, 0x6a, 0x22, 0x9f,
-		 0x8c, 0x3c, 0xbf, 0x44, 0x68, 0xc8, 0xf5, 0x17, 0x22, 0x86,
-		 0x4c, 0xc4, 0x16, 0xa4, 0x29, 0x26, 0xd9, 0x9b, 0xa6, 0xf0,
-		 0x45, 0xc1, 0xf6, 0x21, 0x11, 0x56, 0x94, 0x6c, 0x6e, 0x79,
-		 0x37, 0x29, 0x97, 0x4e, 0xb4, 0xc5, 0xa6, 0x07, 0x8f, 0x9a,
-		 0x1d, 0x4d, 0x1c, 0xd7, 0x49 ) );
-
-/** SHA-256 Test 13 */
-HASH_DF_TEST ( test_sha256_13, sha256_algorithm,
-	INPUT ( 0x01, 0xa3, 0xe9, 0x4e, 0x39, 0x26, 0xfd, 0xa1, 0x69, 0xc3,
-		0x03, 0xd6, 0x64, 0x38, 0x39, 0x05, 0xe0, 0xd7, 0x99, 0x62,
-		0xd1, 0x65, 0x44, 0x6d, 0x63, 0xbd, 0xa6, 0x54, 0xd1, 0x32,
-		0xf7, 0x2d, 0xb4, 0x71, 0x56, 0x4b, 0x45, 0x6f, 0xf2, 0xee,
-		0xc8, 0x36, 0x42, 0x2a, 0xcc, 0x5a, 0x02, 0x99, 0x35, 0xa7,
-		0x99, 0x29, 0x90, 0x94, 0xa1, 0xca, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6 ),
-	EXPECT ( 0xe0, 0x26, 0xa5, 0xc2, 0xe7, 0x62, 0x3e, 0x62, 0xb7, 0x1a,
-		 0x2e, 0x04, 0xc2, 0x5f, 0x0b, 0x08, 0x58, 0x2b, 0xe2, 0x16,
-		 0x36, 0x34, 0xc0, 0x49, 0x6d, 0x2b, 0x65, 0xda, 0x7e, 0xaa,
-		 0x03, 0xb5, 0xc3, 0xb6, 0xb5, 0x10, 0xbb, 0x3f, 0xe4, 0x74,
-		 0x34, 0x07, 0x1f, 0x70, 0x7a, 0xc7, 0xfe, 0x4c, 0x39, 0x6a,
-		 0xaa, 0xee, 0x76, 0x4c, 0x90 ) );
-
-/** SHA-256 Test 14 */
-HASH_DF_TEST ( test_sha256_14, sha256_algorithm,
-	INPUT ( 0x00, 0xe0, 0x26, 0xa5, 0xc2, 0xe7, 0x62, 0x3e, 0x62, 0xb7,
-		0x1a, 0x2e, 0x04, 0xc2, 0x5f, 0x0b, 0x08, 0x58, 0x2b, 0xe2,
-		0x16, 0x36, 0x34, 0xc0, 0x49, 0x6d, 0x2b, 0x65, 0xda, 0x7e,
-		0xaa, 0x03, 0xb5, 0xc3, 0xb6, 0xb5, 0x10, 0xbb, 0x3f, 0xe4,
-		0x74, 0x34, 0x07, 0x1f, 0x70, 0x7a, 0xc7, 0xfe, 0x4c, 0x39,
-		0x6a, 0xaa, 0xee, 0x76, 0x4c, 0x90 ),
-	EXPECT ( 0xc9, 0xea, 0x75, 0x4b, 0xee, 0x0a, 0xb6, 0x44, 0x15, 0xca,
-		 0x7f, 0xe3, 0x2e, 0xbb, 0xfb, 0x07, 0xed, 0x93, 0x2e, 0x7c,
-		 0x95, 0x7e, 0xce, 0xae, 0xf0, 0xcd, 0x2f, 0xa7, 0x7a, 0x46,
-		 0xf9, 0xe8, 0x59, 0x62, 0x78, 0x97, 0x54, 0xc6, 0xd2, 0x98,
-		 0xf9, 0xb5, 0xe4, 0x59, 0x6b, 0x4e, 0x0e, 0x6d, 0xf4, 0xf4,
-		 0xb8, 0x23, 0x60, 0xda, 0x33 ) );
-
-/** SHA-256 Test 15 */
-HASH_DF_TEST ( test_sha256_15, sha256_algorithm,
-	INPUT ( 0x01, 0xaa, 0x11, 0x1b, 0x0e, 0xd5, 0x6c, 0xf4, 0xa6, 0xcc,
-		0xe4, 0xad, 0xe7, 0xf1, 0x1b, 0x06, 0x10, 0x45, 0xbf, 0x10,
-		0x92, 0xcb, 0xb3, 0x8f, 0xf3, 0x23, 0x95, 0xea, 0x62, 0xd2,
-		0x6b, 0x27, 0xc8, 0x86, 0x89, 0x45, 0xc5, 0x93, 0xba, 0x70,
-		0xc3, 0x84, 0xad, 0xad, 0x45, 0x77, 0x1c, 0x93, 0xb0, 0x9c,
-		0x27, 0x69, 0x07, 0x52, 0xd1, 0xd8, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6 ),
-	EXPECT ( 0xfc, 0x5f, 0x56, 0x48, 0xed, 0xc4, 0xfc, 0x30, 0x7b, 0x5c,
-		 0x5a, 0x53, 0xd5, 0x12, 0x89, 0xb5, 0x0e, 0x73, 0xdc, 0xec,
-		 0x4a, 0xa1, 0xcb, 0x47, 0xa3, 0xba, 0xd8, 0x46, 0xbb, 0x57,
-		 0xc3, 0xc4, 0x80, 0x49, 0x1d, 0xf5, 0x21, 0xc4, 0x66, 0x9b,
-		 0xff, 0xf3, 0x7a, 0x41, 0x8b, 0xaf, 0x6e, 0x9b, 0xea, 0xec,
-		 0x34, 0x96, 0xd0, 0xf1, 0xa6 ) );
-
-/** SHA-256 Test 16 */
-HASH_DF_TEST ( test_sha256_16, sha256_algorithm,
-	INPUT ( 0x00, 0xfc, 0x5f, 0x56, 0x48, 0xed, 0xc4, 0xfc, 0x30, 0x7b,
-		0x5c, 0x5a, 0x53, 0xd5, 0x12, 0x89, 0xb5, 0x0e, 0x73, 0xdc,
-		0xec, 0x4a, 0xa1, 0xcb, 0x47, 0xa3, 0xba, 0xd8, 0x46, 0xbb,
-		0x57, 0xc3, 0xc4, 0x80, 0x49, 0x1d, 0xf5, 0x21, 0xc4, 0x66,
-		0x9b, 0xff, 0xf3, 0x7a, 0x41, 0x8b, 0xaf, 0x6e, 0x9b, 0xea,
-		0xec, 0x34, 0x96, 0xd0, 0xf1, 0xa6 ),
-	EXPECT ( 0x62, 0xb0, 0x7d, 0xc3, 0x9e, 0xbd, 0xf3, 0x10, 0x87, 0xb8,
-		 0x5d, 0xdc, 0xec, 0xfd, 0x43, 0x35, 0x62, 0xe5, 0x3b, 0xae,
-		 0x9f, 0x72, 0x1c, 0x5a, 0xfa, 0xb8, 0xf1, 0xcf, 0x01, 0x61,
-		 0xc8, 0x8e, 0x45, 0x50, 0x3e, 0x15, 0xb2, 0x6e, 0x7b, 0x80,
-		 0xd5, 0x1d, 0xb0, 0xb9, 0x24, 0x52, 0x36, 0x2d, 0xc3, 0xdc,
-		 0x57, 0x0d, 0xfe, 0x6e, 0x17 ) );
-
-/** SHA-256 Test 17 */
-HASH_DF_TEST ( test_sha256_17, sha256_algorithm,
-	INPUT ( 0x01, 0xa3, 0xe9, 0x4e, 0x39, 0x26, 0xfd, 0xa1, 0x69, 0xc3,
-		0x03, 0xd6, 0x64, 0x38, 0x39, 0x05, 0xe0, 0xd7, 0x99, 0x62,
-		0xd1, 0x65, 0x44, 0x6d, 0x63, 0xbd, 0xa6, 0x54, 0xd1, 0x32,
-		0xf7, 0x2d, 0xb4, 0x71, 0x56, 0x4b, 0x45, 0x6f, 0xf2, 0xee,
-		0xc8, 0x36, 0x42, 0x2a, 0xcc, 0x5a, 0x02, 0x99, 0x35, 0xa7,
-		0x99, 0x29, 0x90, 0x94, 0xa1, 0xca, 0x80, 0x81, 0x82, 0x83,
-		0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
-		0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-		0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1,
-		0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-		0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5,
-		0xb6, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
-		0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72,
-		0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c,
-		0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86,
-		0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f, 0x90,
-		0x91, 0x92, 0x93, 0x94, 0x95, 0x96 ),
-	EXPECT ( 0x98, 0x75, 0xbb, 0x7c, 0x7a, 0x0b, 0x23, 0x6b, 0xf4, 0x6f,
-		 0x4e, 0xa6, 0x6f, 0x67, 0xc7, 0xb4, 0x4f, 0x80, 0xef, 0x70,
-		 0x61, 0x4b, 0xef, 0xe8, 0xb0, 0x85, 0xcc, 0xaf, 0x55, 0x89,
-		 0xa7, 0x6f, 0x85, 0xfd, 0x96, 0x69, 0x53, 0xe2, 0x0a, 0x55,
-		 0xd2, 0xf3, 0x5b, 0xa5, 0x81, 0xef, 0x51, 0x11, 0xbf, 0xbf,
-		 0x05, 0x65, 0x3a, 0xf7, 0xe7 ) );
-
-/** SHA-256 Test 18 */
-HASH_DF_TEST ( test_sha256_18, sha256_algorithm,
-	INPUT ( 0x00, 0x98, 0x75, 0xbb, 0x7c, 0x7a, 0x0b, 0x23, 0x6b, 0xf4,
-		0x6f, 0x4e, 0xa6, 0x6f, 0x67, 0xc7, 0xb4, 0x4f, 0x80, 0xef,
-		0x70, 0x61, 0x4b, 0xef, 0xe8, 0xb0, 0x85, 0xcc, 0xaf, 0x55,
-		0x89, 0xa7, 0x6f, 0x85, 0xfd, 0x96, 0x69, 0x53, 0xe2, 0x0a,
-		0x55, 0xd2, 0xf3, 0x5b, 0xa5, 0x81, 0xef, 0x51, 0x11, 0xbf,
-		0xbf, 0x05, 0x65, 0x3a, 0xf7, 0xe7 ),
-	EXPECT ( 0x12, 0x80, 0xfe, 0x1f, 0x05, 0x79, 0x8c, 0xca, 0xed, 0x5d,
-		 0x6d, 0xf6, 0xe7, 0xd2, 0x6f, 0x04, 0x6e, 0x53, 0x8c, 0xc5,
-		 0x2a, 0x6a, 0x03, 0x0d, 0xa8, 0x26, 0xb2, 0xb4, 0x79, 0x82,
-		 0xd6, 0xee, 0x8a, 0x68, 0x67, 0x58, 0x07, 0x06, 0x93, 0x9e,
-		 0xcc, 0x03, 0xfc, 0x11, 0xb0, 0x05, 0x9f, 0xe2, 0xae, 0xad,
-		 0xea, 0x0a, 0x46, 0x98, 0x5c ) );
-
-/** SHA-256 Test 19 */
-HASH_DF_TEST ( test_sha256_19, sha256_algorithm,
-	INPUT ( 0x01, 0xaa, 0xf6, 0xb9, 0x9b, 0x7f, 0x84, 0xb0, 0x36, 0xe1,
-		0xcc, 0xbc, 0x9d, 0x57, 0x3a, 0x36, 0xb8, 0xbd, 0xd4, 0x7c,
-		0x35, 0x8b, 0xb5, 0xf3, 0xc1, 0xd6, 0xe7, 0x90, 0x3a, 0xaa,
-		0x29, 0xf1, 0xc8, 0x7a, 0xe6, 0x66, 0xb8, 0x86, 0x93, 0xbe,
-		0xf4, 0x6c, 0x51, 0xc2, 0x4c, 0x47, 0xbe, 0xfe, 0x4b, 0x35,
-		0x75, 0x4d, 0xcb, 0xfa, 0x1e, 0x7d, 0xc0, 0xc1, 0xc2, 0xc3,
-		0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd,
-		0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-		0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1,
-		0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb,
-		0xec, 0xed, 0xee, 0xef, 0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5,
-		0xf6, 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8,
-		0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2,
-		0xb3, 0xb4, 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc,
-		0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6,
-		0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf, 0xd0,
-		0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6 ),
-	EXPECT ( 0xb0, 0x6d, 0xbf, 0xb1, 0x4e, 0x7f, 0x4e, 0x01, 0x25, 0x62,
-		 0x94, 0x2f, 0xe4, 0xf2, 0xa9, 0x60, 0x17, 0x07, 0x55, 0x9d,
-		 0x7d, 0xd1, 0x90, 0x89, 0x8b, 0xc8, 0x06, 0x24, 0xe5, 0xc8,
-		 0xc1, 0xbb, 0x9b, 0x90, 0xfb, 0x2e, 0xef, 0x12, 0xed, 0x24,
-		 0xbe, 0xbd, 0x8d, 0xf7, 0x1e, 0xf6, 0x5c, 0x70, 0xfa, 0x4e,
-		 0x91, 0x86, 0x3a, 0x31, 0xbe ) );
-
-/** SHA-256 Test 20 */
-HASH_DF_TEST ( test_sha256_20, sha256_algorithm,
-	INPUT ( 0x00, 0xb0, 0x6d, 0xbf, 0xb1, 0x4e, 0x7f, 0x4e, 0x01, 0x25,
-		0x62, 0x94, 0x2f, 0xe4, 0xf2, 0xa9, 0x60, 0x17, 0x07, 0x55,
-		0x9d, 0x7d, 0xd1, 0x90, 0x89, 0x8b, 0xc8, 0x06, 0x24, 0xe5,
-		0xc8, 0xc1, 0xbb, 0x9b, 0x90, 0xfb, 0x2e, 0xef, 0x12, 0xed,
-		0x24, 0xbe, 0xbd, 0x8d, 0xf7, 0x1e, 0xf6, 0x5c, 0x70, 0xfa,
-		0x4e, 0x91, 0x86, 0x3a, 0x31, 0xbe ),
-	EXPECT ( 0x5c, 0x07, 0xb7, 0x9c, 0x12, 0x83, 0x1b, 0xac, 0x36, 0x52,
-		 0x17, 0x8b, 0x2f, 0x90, 0x7a, 0x69, 0x61, 0x98, 0x39, 0xd8,
-		 0xa7, 0xfa, 0xa2, 0xb6, 0x95, 0xef, 0xb3, 0x10, 0x82, 0x38,
-		 0x01, 0x35, 0x85, 0x19, 0x1f, 0x59, 0x9c, 0x99, 0x07, 0xc7,
-		 0x21, 0x92, 0xed, 0x25, 0x7e, 0x9f, 0x6c, 0xd3, 0x77, 0xdd,
-		 0x6b, 0xac, 0x33, 0x7c, 0x19 ) );
-
-/**
- * Report Hash_df test result
- *
- * @v test		Hash_df test
- */
-#define hash_df_ok( test ) do {						\
-	uint8_t output[ (test)->expected_len ];				\
-	hash_df ( (test)->hash, (test)->input, (test)->input_len,	\
-		  output, sizeof ( output ) );				\
-	ok ( memcmp ( (test)->expected, output,				\
-		      sizeof ( output ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Perform Hash_df self-test
- *
- */
-static void hash_df_test_exec ( void ) {
-
-	hash_df_ok ( &test_sha1_1 );
-	hash_df_ok ( &test_sha1_2 );
-	hash_df_ok ( &test_sha1_3 );
-	hash_df_ok ( &test_sha1_4 );
-	hash_df_ok ( &test_sha1_5 );
-	hash_df_ok ( &test_sha1_6 );
-	hash_df_ok ( &test_sha1_7 );
-	hash_df_ok ( &test_sha1_8 );
-	hash_df_ok ( &test_sha1_9 );
-	hash_df_ok ( &test_sha1_10 );
-	hash_df_ok ( &test_sha1_11 );
-	hash_df_ok ( &test_sha1_12 );
-	hash_df_ok ( &test_sha1_13 );
-	hash_df_ok ( &test_sha1_14 );
-	hash_df_ok ( &test_sha1_15 );
-	hash_df_ok ( &test_sha1_16 );
-	hash_df_ok ( &test_sha1_17 );
-	hash_df_ok ( &test_sha1_18 );
-	hash_df_ok ( &test_sha1_19 );
-	hash_df_ok ( &test_sha1_20 );
-
-	hash_df_ok ( &test_sha256_1 );
-	hash_df_ok ( &test_sha256_2 );
-	hash_df_ok ( &test_sha256_3 );
-	hash_df_ok ( &test_sha256_4 );
-	hash_df_ok ( &test_sha256_5 );
-	hash_df_ok ( &test_sha256_6 );
-	hash_df_ok ( &test_sha256_7 );
-	hash_df_ok ( &test_sha256_8 );
-	hash_df_ok ( &test_sha256_9 );
-	hash_df_ok ( &test_sha256_10 );
-	hash_df_ok ( &test_sha256_11 );
-	hash_df_ok ( &test_sha256_12 );
-	hash_df_ok ( &test_sha256_13 );
-	hash_df_ok ( &test_sha256_14 );
-	hash_df_ok ( &test_sha256_15 );
-	hash_df_ok ( &test_sha256_16 );
-	hash_df_ok ( &test_sha256_17 );
-	hash_df_ok ( &test_sha256_18 );
-	hash_df_ok ( &test_sha256_19 );
-	hash_df_ok ( &test_sha256_20 );
-}
-
-/** Hash_df self-test */
-struct self_test hash_df_test __self_test = {
-	.name = "hash_df",
-	.exec = hash_df_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/hmac_drbg_test.c ipxe-1.0.1~lliurex1505/src/tests/hmac_drbg_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/hmac_drbg_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/hmac_drbg_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1386 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * HMAC_DRBG tests
- *
- * These test vectors are provided by NIST as part of the
- * Cryptographic Toolkit Examples, downloadable from:
- *
- *    http://csrc.nist.gov/groups/ST/toolkit/documents/Examples/HMAC_DRBG.pdf
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <assert.h>
-#include <string.h>
-#include <ipxe/hmac_drbg.h>
-#include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/test.h>
-
-/** Define inline expected data */
-#define EXPECT(...) { __VA_ARGS__ }
-
-/** An HMAC_DRBG instantiation test */
-struct hmac_drbg_test_instantiate {
-	/** Underlying hash algorithm */
-	struct digest_algorithm *hash;
-	/** Output block length */
-	size_t out_len;
-	/** Entropy */
-	const void *entropy;
-	/** Length of entropy */
-	size_t entropy_len;
-	/** Nonce */
-	const void *nonce;
-	/** Length of nonce */
-	size_t nonce_len;
-	/** Personalisation string */
-	const void *personal;
-	/** Length of personalisation string */
-	size_t personal_len;
-	/** Expected key */
-	const void *expected_key;
-	/** Length of expected key */
-	size_t expected_key_len;
-	/** Expected value */
-	const void *expected_value;
-	/** Length of expected value */
-	size_t expected_value_len;
-};
-
-/**
- * Define an HMAC_DRBG instantiation test
- *
- * @v name		Test name
- * @v hmac_drbg		HMAC_DRBG algorithm
- * @v entropy_array	Entropy input
- * @v nonce_array	Nonce
- * @v personal_array	Personalisation string
- * @v key		Expected key
- * @v value		Expected value
- * @ret test		Instantiation test
- */
-#define HMAC_DRBG_TEST_INSTANTIATE( name, hmac_drbg, entropy_array,	\
-				    nonce_array, personal_array,	\
-				    key, value )			\
-	static const uint8_t name ## _key [] = key;			\
-	static const uint8_t name ## _value [] = value;			\
-	static struct hmac_drbg_test_instantiate name = {		\
-		.hash = HMAC_DRBG_HASH ( hmac_drbg ),			\
-		.out_len = HMAC_DRBG_OUTLEN_BYTES ( hmac_drbg ),	\
-		.entropy = entropy_array,				\
-		.entropy_len = sizeof ( entropy_array ),		\
-		.nonce = nonce_array,					\
-		.nonce_len = sizeof ( nonce_array ),			\
-		.personal = personal_array,				\
-		.personal_len = sizeof ( personal_array ),		\
-		.expected_key = name ## _key,				\
-		.expected_key_len = sizeof ( name ## _key ),		\
-		.expected_value = name ## _value,			\
-		.expected_value_len = sizeof ( name ## _value ),	\
-	}
-
-/**
- * Report instantiation test result
- *
- * @v state		HMAC_DRBG internal state
- * @v test		Instantiation test
- */
-#define instantiate_ok( state, test ) do {				\
-	struct {							\
-		uint8_t entropy[(test)->entropy_len];			\
-		uint8_t nonce[(test)->nonce_len];			\
-	} __attribute__ (( packed )) entropy_nonce;			\
-									\
-	assert ( (test)->expected_key_len == (test)->out_len );		\
-	assert ( (test)->expected_value_len == (test)->out_len );	\
-	memcpy ( entropy_nonce.entropy, (test)->entropy,		\
-		 sizeof ( entropy_nonce.entropy ) );			\
-	memcpy ( entropy_nonce.nonce, (test)->nonce,			\
-		 sizeof ( entropy_nonce.nonce ) );			\
-	hmac_drbg_instantiate ( (test)->hash, (state), &entropy_nonce,	\
-				sizeof ( entropy_nonce ),		\
-				(test)->personal,			\
-				(test)->personal_len );			\
-	ok ( memcmp ( (state)->key, (test)->expected_key,		\
-		      (test)->expected_key_len ) == 0 );		\
-	ok ( memcmp ( (state)->value, (test)->expected_value,		\
-		      (test)->expected_value_len ) == 0 );		\
-	} while ( 0 )
-
-/** An HMAC_DRBG reseed test */
-struct hmac_drbg_test_reseed {
-	/** Underlying hash algorithm */
-	struct digest_algorithm *hash;
-	/** Output block length */
-	size_t out_len;
-	/** Entropy */
-	const void *entropy;
-	/** Length of entropy */
-	size_t entropy_len;
-	/** Additional input */
-	const void *additional;
-	/** Length of additional_input */
-	size_t additional_len;
-	/** Expected key */
-	const void *expected_key;
-	/** Length of expected key */
-	size_t expected_key_len;
-	/** Expected value */
-	const void *expected_value;
-	/** Length of expected value */
-	size_t expected_value_len;
-};
-
-/**
- * Define an HMAC_DRBG reseed test
- *
- * @v name		Test name
- * @v hmac_drbg		HMAC_DRBG algorithm
- * @v entropy_array	Entropy input
- * @v additional_array	Additional input
- * @v key		Expected key
- * @v value		Expected value
- * @ret test		Reseed test
- */
-#define HMAC_DRBG_TEST_RESEED( name, hmac_drbg, entropy_array,		\
-			       additional_array, key, value )		\
-	static const uint8_t name ## _key [] = key;			\
-	static const uint8_t name ## _value [] = value;			\
-	static struct hmac_drbg_test_reseed name = {			\
-		.hash = HMAC_DRBG_HASH ( hmac_drbg ),			\
-		.out_len = HMAC_DRBG_OUTLEN_BYTES ( hmac_drbg ),	\
-		.entropy = entropy_array,				\
-		.entropy_len = sizeof ( entropy_array ),		\
-		.additional = additional_array,				\
-		.additional_len = sizeof ( additional_array ),		\
-		.expected_key = name ## _key,				\
-		.expected_key_len = sizeof ( name ## _key ),		\
-		.expected_value = name ## _value,			\
-		.expected_value_len = sizeof ( name ## _value ),	\
-	}
-
-/**
- * Report reseed test result
- *
- * @v state		HMAC_DRBG internal state
- * @v test		Reseed test
- */
-#define reseed_ok( state, test ) do {					\
-	assert ( (test)->expected_key_len == (test)->out_len );		\
-	assert ( (test)->expected_value_len == (test)->out_len );	\
-	hmac_drbg_reseed ( (test)->hash, (state), (test)->entropy,	\
-			   (test)->entropy_len, (test)->additional,	\
-			   (test)->additional_len );			\
-	ok ( memcmp ( (state)->key, (test)->expected_key,		\
-		      (test)->expected_key_len ) == 0 );		\
-	ok ( memcmp ( (state)->value, (test)->expected_value,		\
-		      (test)->expected_value_len ) == 0 );		\
-	} while ( 0 )
-
-/** An HMAC_DRBG generation test */
-struct hmac_drbg_test_generate {
-	/** Underlying hash algorithm */
-	struct digest_algorithm *hash;
-	/** Output block length */
-	size_t out_len;
-	/** Additional input */
-	const void *additional;
-	/** Length of additional_input */
-	size_t additional_len;
-	/** Expected key */
-	const void *expected_key;
-	/** Length of expected key */
-	size_t expected_key_len;
-	/** Expected value */
-	const void *expected_value;
-	/** Length of expected value */
-	size_t expected_value_len;
-	/** Expected pseudorandom data */
-	const void *expected_data;
-	/** Length of data */
-	size_t expected_data_len;
-};
-
-/**
- * Define an HMAC_DRBG generation test
- *
- * @v name		Test name
- * @v hmac_drbg		HMAC_DRBG algorithm
- * @v additional_array	Additional input
- * @v key		Expected key
- * @v value		Expected value
- * @v data		Expected pseudorandom data
- * @ret test		Generation test
- */
-#define HMAC_DRBG_TEST_GENERATE( name, hmac_drbg, additional_array,	\
-				 key, value, data )			\
-	static const uint8_t name ## _key [] = key;			\
-	static const uint8_t name ## _value [] = value;			\
-	static const uint8_t name ## _data [] = data;			\
-	static struct hmac_drbg_test_generate name = {			\
-		.hash = HMAC_DRBG_HASH ( hmac_drbg ),			\
-		.out_len = HMAC_DRBG_OUTLEN_BYTES ( hmac_drbg ),	\
-		.additional = additional_array,				\
-		.additional_len = sizeof ( additional_array ),		\
-		.expected_key = name ## _key,				\
-		.expected_key_len = sizeof ( name ## _key ),		\
-		.expected_value = name ## _value,			\
-		.expected_value_len = sizeof ( name ## _value ),	\
-		.expected_data = name ## _data,				\
-		.expected_data_len = sizeof ( name ## _data ),		\
-	}
-
-/**
- * Report generation test result
- *
- * @v state		HMAC_DRBG internal state
- * @v test		Generation test
- */
-#define generate_ok( state, test ) do {					\
-	uint8_t data[ (test)->expected_data_len ];			\
-	int rc;								\
-									\
-	assert ( (test)->expected_key_len == (test)->out_len );		\
-	assert ( (test)->expected_value_len == (test)->out_len );	\
-	rc = hmac_drbg_generate ( (test)->hash, (state),		\
-				  (test)->additional,			\
-				  (test)->additional_len,		\
-				  data, sizeof ( data ) );		\
-	ok ( rc == 0 );							\
-	ok ( memcmp ( (state)->key, (test)->expected_key,		\
-		      (test)->expected_key_len ) == 0 );		\
-	ok ( memcmp ( (state)->value, (test)->expected_value,		\
-		      (test)->expected_value_len ) == 0 );		\
-	ok ( memcmp ( data, (test)->expected_data,			\
-		      (test)->expected_data_len ) == 0 );		\
-	} while ( 0 )
-
-/** An HMAC_DRBG generation failure test */
-struct hmac_drbg_test_generate_fail {
-	/** Underlying hash algorithm */
-	struct digest_algorithm *hash;
-	/** Additional input */
-	const void *additional;
-	/** Length of additional_input */
-	size_t additional_len;
-	/** Length of requested data */
-	size_t requested_len;
-};
-
-/**
- * Define an HMAC_DRBG generation failure test
- *
- * @v name		Test name
- * @v hmac_drbg		HMAC_DRBG algorithm
- * @v additional_array	Additional input
- * @ret test		Generation failure test
- */
-#define HMAC_DRBG_TEST_GENERATE_FAIL( name, hmac_drbg,			\
-				      additional_array, len )		\
-	static struct hmac_drbg_test_generate_fail name = {		\
-		.hash = HMAC_DRBG_HASH ( hmac_drbg ),			\
-		.additional = additional_array,				\
-		.additional_len = sizeof ( additional_array ),		\
-		.requested_len = len,					\
-	}
-
-/**
- * Report generation failure test result
- *
- * @v state		HMAC_DRBG internal state
- * @v test		Generation failure test
- */
-#define generate_fail_ok( state, test ) do {				\
-	uint8_t data[ (test)->requested_len ];				\
-	int rc;								\
-									\
-	rc = hmac_drbg_generate ( (test)->hash, (state),		\
-				  (test)->additional,			\
-				  (test)->additional_len, data,		\
-				  sizeof ( data ) );			\
-	ok ( rc != 0 );							\
-	} while ( 0 )
-
-/** "EntropyInput" */
-static const uint8_t entropy_input[] = {
-	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
-	0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23,
-	0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-	0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36
-};
-
-/** "Nonce" for SHA-1 */
-static const uint8_t nonce_sha1[] = {
-	0x20, 0x21, 0x22, 0x23, 0x24
-};
-
-/** "Nonce" for SHA-256 */
-static const uint8_t nonce_sha256[] = {
-	0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27
-};
-
-/** "EntropyInput1 (for Reseed1) */
-static const uint8_t entropy_input_1[] = {
-	0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b,
-	0x8c, 0x8d, 0x8e, 0x8f, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-	0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f, 0xa0, 0xa1, 0xa2, 0xa3,
-	0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
-	0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6
-};
-
-/** "EntropyInput2 (for Reseed2) */
-static const uint8_t entropy_input_2[] = {
-	0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb,
-	0xcc, 0xcd, 0xce, 0xcf, 0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6, 0xd7,
-	0xd8, 0xd9, 0xda, 0xdb, 0xdc, 0xdd, 0xde, 0xdf, 0xe0, 0xe1, 0xe2, 0xe3,
-	0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea, 0xeb, 0xec, 0xed, 0xee, 0xef,
-	0xf0, 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6
-};
-
-/** "PersonalizationString = <empty>" */
-static const uint8_t personalisation_string_empty[] = {};
-
-/** "PersonalizationString" */
-static const uint8_t personalisation_string[] = {
-	0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b,
-	0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
-	0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f, 0x60, 0x61, 0x62, 0x63,
-	0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
-	0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76
-};
-
-/** "AdditionalInput = <empty>" */
-static const uint8_t additional_input_empty[] = {};
-
-/** "AdditionalInput1" */
-static const uint8_t additional_input_1[] = {
-	0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6a, 0x6b,
-	0x6c, 0x6d, 0x6e, 0x6f, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
-	0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f, 0x80, 0x81, 0x82, 0x83,
-	0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
-	0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96
-};
-
-/** "AdditionalInput2" */
-static const uint8_t additional_input_2[] = {
-	0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab,
-	0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
-	0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf, 0xc0, 0xc1, 0xc2, 0xc3,
-	0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
-	0xd0, 0xd1, 0xd2, 0xd3, 0xd4, 0xd5, 0xd6
-};
-
-/** SHA-1 Test 1 : Instantiation */
-HMAC_DRBG_TEST_INSTANTIATE ( sha1_instantiate_1, HMAC_DRBG_SHA1,
-	entropy_input, nonce_sha1, personalisation_string_empty,
-	EXPECT ( 0xab, 0x16, 0x0d, 0xd2, 0x1c, 0x30, 0x98, 0x0c, 0xa3, 0xca,
-		 0x5a, 0x9c, 0x77, 0xb7, 0xbd, 0xf0, 0x50, 0xe6, 0x4e, 0xe9 ),
-	EXPECT ( 0x61, 0x44, 0x99, 0xea, 0x98, 0x0c, 0xfb, 0x3d, 0xaa, 0x2c,
-		 0xa8, 0x6d, 0x65, 0xa4, 0x6b, 0xf4, 0x48, 0x8d, 0x8c, 0xc5 ) );
-
-/** SHA-1 Test 1.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_1_1, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x7b, 0xb1, 0x80, 0x28, 0xe0, 0x1d, 0x03, 0x42, 0xdf, 0x4f,
-		 0x54, 0xda, 0x51, 0x22, 0xfa, 0x5f, 0x2c, 0x3a, 0x05, 0xe4 ),
-	EXPECT ( 0x2f, 0x89, 0x4f, 0x28, 0xcc, 0x2f, 0x53, 0x82, 0x96, 0x40,
-		 0x64, 0x3a, 0xd1, 0x7b, 0x84, 0xb0, 0xcd, 0x3c, 0x79, 0x79 ),
-	EXPECT ( 0x5a, 0x7d, 0x3b, 0x44, 0x9f, 0x48, 0x1c, 0xb3, 0x8d, 0xf7,
-		 0x9a, 0xd2, 0xb1, 0xfc, 0xc0, 0x1e, 0x57, 0xf8, 0x13, 0x5e,
-		 0x8c, 0x0b, 0x22, 0xcd, 0x06, 0x30, 0xbf, 0xb0, 0x12, 0x7f,
-		 0xb5, 0x40, 0x8c, 0x8e, 0xfc, 0x17, 0xa9, 0x29, 0x89, 0x6e ) );
-
-/** SHA-1 Test 1.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_1_2, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x3d, 0x4d, 0x73, 0x77, 0xe9, 0x17, 0x2a, 0xaf, 0xa7, 0x76,
-		 0xb0, 0xdd, 0xcb, 0x89, 0x42, 0x00, 0x4a, 0x44, 0xb7, 0xfd ),
-	EXPECT ( 0x1a, 0x26, 0xbd, 0x9b, 0xfc, 0x97, 0x44, 0xbd, 0x29, 0xf6,
-		 0xae, 0xbe, 0x24, 0x37, 0xe2, 0x09, 0xf1, 0xf7, 0x16, 0x25 ),
-	EXPECT ( 0x82, 0xcf, 0x77, 0x2e, 0xc3, 0xe8, 0x4b, 0x00, 0xfc, 0x74,
-		 0xf5, 0xdf, 0x10, 0x4e, 0xfb, 0xfb, 0x24, 0x28, 0x55, 0x4e,
-		 0x9c, 0xe3, 0x67, 0xd0, 0x3a, 0xea, 0xde, 0x37, 0x82, 0x7f,
-		 0xa8, 0xe9, 0xcb, 0x6a, 0x08, 0x19, 0x61, 0x15, 0xd9, 0x48 ) );
-
-/** SHA-1 Test 2 : Instantiation */
-#define sha1_instantiate_2 sha1_instantiate_1
-
-/** SHA-1 Test 2.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_2_1, HMAC_DRBG_SHA1,
-	additional_input_1,
-	EXPECT ( 0x3a, 0x06, 0x2e, 0x6b, 0x79, 0xfe, 0x70, 0xdb, 0xff, 0xeb,
-		 0x3a, 0x2b, 0x6b, 0xe8, 0x03, 0x23, 0xf7, 0xd6, 0x74, 0xc5 ),
-	EXPECT ( 0xbd, 0x36, 0x31, 0x28, 0xbf, 0x58, 0x0d, 0x7a, 0x54, 0x42,
-		 0x9d, 0xdd, 0x58, 0xe8, 0x19, 0x3b, 0x98, 0x43, 0xbd, 0x2b ),
-	EXPECT ( 0xc7, 0xaa, 0xac, 0x58, 0x3c, 0x6e, 0xf6, 0x30, 0x07, 0x14,
-		 0xc2, 0xcc, 0x5d, 0x06, 0xc1, 0x48, 0xcf, 0xfb, 0x40, 0x44,
-		 0x9a, 0xd0, 0xbb, 0x26, 0xfa, 0xc0, 0x49, 0x7b, 0x5c, 0x57,
-		 0xe1, 0x61, 0xe3, 0x66, 0x81, 0xbc, 0xc9, 0x30, 0xce, 0x80 ) );
-
-/** SHA-1 Test 2.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_2_2, HMAC_DRBG_SHA1,
-	additional_input_2,
-	EXPECT ( 0x8a, 0xd7, 0xe3, 0x47, 0x72, 0xb5, 0xfc, 0x7c, 0x3b, 0x3b,
-		 0x27, 0x62, 0x4f, 0x0b, 0x91, 0x77, 0x6a, 0x8a, 0x71, 0x12 ),
-	EXPECT ( 0xd7, 0x13, 0x76, 0xa4, 0x6d, 0x76, 0x4b, 0x17, 0xc3, 0xb7,
-		 0x39, 0x34, 0x7b, 0x38, 0x4e, 0x51, 0x51, 0xe8, 0x7e, 0x88 ),
-	EXPECT ( 0x6e, 0xbd, 0x2b, 0x7b, 0x5e, 0x0a, 0x2a, 0xd7, 0xa2, 0x4b,
-		 0x1b, 0xf9, 0xa1, 0xdb, 0xa4, 0x7d, 0x43, 0x27, 0x17, 0x19,
-		 0xb9, 0xc3, 0x7b, 0x7f, 0xe8, 0x1b, 0xa9, 0x40, 0x45, 0xa1,
-		 0x4a, 0x7c, 0xb5, 0x14, 0xb4, 0x46, 0x66, 0x6e, 0xa5, 0xa7 ) );
-
-/** SHA-1 Test 3 : Instantiation */
-HMAC_DRBG_TEST_INSTANTIATE ( sha1_instantiate_3, HMAC_DRBG_SHA1,
-	entropy_input, nonce_sha1, personalisation_string,
-	EXPECT ( 0xb7, 0xd9, 0x66, 0xd7, 0x0d, 0x4e, 0x27, 0xa7, 0xfa, 0x83,
-		 0x8f, 0x7d, 0x61, 0x12, 0x6c, 0x0e, 0xdc, 0x84, 0x76, 0x1c ),
-	EXPECT ( 0xda, 0xb2, 0xa7, 0x18, 0x83, 0xf1, 0x00, 0x5c, 0x5d, 0xd0,
-		 0x39, 0x32, 0x4d, 0x3c, 0x36, 0x4d, 0x6e, 0x18, 0xf9, 0x54 ) );
-
-/** SHA-1 Test 3.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_3_1, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x87, 0xd3, 0x82, 0x8b, 0xe0, 0x3a, 0x80, 0x7d, 0xd3, 0x40,
-		 0x29, 0x41, 0xbe, 0xd6, 0xde, 0x98, 0x6e, 0xe7, 0xa2, 0x86 ),
-	EXPECT ( 0x6a, 0xe1, 0xd0, 0x08, 0x6f, 0x53, 0xb1, 0xb7, 0x63, 0xa4,
-		 0x51, 0x5b, 0x19, 0x06, 0xfe, 0xe4, 0x76, 0x61, 0xfd, 0x47 ),
-	EXPECT ( 0xb3, 0xbd, 0x05, 0x24, 0x6c, 0xba, 0x12, 0xa6, 0x47, 0x35,
-		 0xa4, 0xe3, 0xfd, 0xe5, 0x99, 0xbc, 0x1b, 0xe3, 0x0f, 0x43,
-		 0x9b, 0xd0, 0x60, 0x20, 0x8e, 0xea, 0x7d, 0x71, 0xf9, 0xd1,
-		 0x23, 0xdf, 0x47, 0xb3, 0xce, 0x06, 0x9d, 0x98, 0xed, 0xe6 ) );
-
-/** SHA-1 Test 3.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_3_2, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x26, 0xab, 0xbf, 0x54, 0xb2, 0x8b, 0x93, 0xff, 0x90, 0x08,
-		 0x67, 0x0e, 0xbf, 0xee, 0x86, 0xcd, 0xd7, 0x22, 0x8e, 0xd5 ),
-	EXPECT ( 0xe9, 0x25, 0x47, 0x29, 0xe0, 0x02, 0x04, 0xa1, 0xb6, 0xc0,
-		 0x21, 0x58, 0xa6, 0xc7, 0x27, 0x86, 0x47, 0x14, 0xf1, 0xf7 ),
-	EXPECT ( 0xb5, 0xda, 0xda, 0x38, 0x0e, 0x28, 0x72, 0xdf, 0x93, 0x5b,
-		 0xca, 0x55, 0xb8, 0x82, 0xc8, 0xc9, 0x37, 0x69, 0x02, 0xab,
-		 0x63, 0x97, 0x65, 0x47, 0x2b, 0x71, 0xac, 0xeb, 0xe2, 0xea,
-		 0x8b, 0x1b, 0x6b, 0x49, 0x62, 0x9c, 0xb6, 0x73, 0x17, 0xe0 ) );
-
-/** SHA-1 Test 4 : Instantiation */
-#define sha1_instantiate_4 sha1_instantiate_3
-
-/** SHA-1 Test 4.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_4_1, HMAC_DRBG_SHA1,
-	additional_input_1,
-	EXPECT ( 0x17, 0xa5, 0xd7, 0x9f, 0x07, 0x67, 0x87, 0x6f, 0x3a, 0x45,
-		 0xe0, 0xc9, 0xc3, 0x3e, 0xc8, 0x8b, 0x03, 0xce, 0xea, 0x13 ),
-	EXPECT ( 0x4d, 0x2f, 0x3b, 0xc7, 0x77, 0x50, 0x5c, 0x45, 0xf7, 0xe1,
-		 0x7d, 0xcd, 0x3d, 0x86, 0xbf, 0x37, 0x9c, 0xb6, 0x02, 0x5e ),
-	EXPECT ( 0x1f, 0x8f, 0xec, 0x7b, 0xc7, 0xcf, 0xa9, 0xa8, 0x80, 0x34,
-		 0x5d, 0x28, 0x0b, 0x13, 0xc6, 0x32, 0xb8, 0x52, 0x77, 0x0a,
-		 0x6d, 0xfc, 0x30, 0x2e, 0xad, 0x4c, 0xe3, 0xf5, 0x54, 0xc7,
-		 0x9b, 0x0d, 0x44, 0x23, 0x9e, 0xba, 0x56, 0xa7, 0xea, 0x2d ) );
-
-/** SHA-1 Test 4.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_4_2, HMAC_DRBG_SHA1,
-	additional_input_2,
-	EXPECT ( 0x07, 0x9b, 0x57, 0xd9, 0x40, 0x6e, 0x11, 0xc2, 0xf8, 0x7c,
-		 0x8c, 0x82, 0x8c, 0x8c, 0x6f, 0xa7, 0x6e, 0x40, 0xea, 0x01 ),
-	EXPECT ( 0xa6, 0x54, 0xfe, 0x72, 0xf8, 0xa7, 0x7b, 0xb8, 0xf0, 0x3d,
-		 0xff, 0x07, 0xc7, 0x9a, 0x51, 0x53, 0x00, 0x9e, 0xdd, 0xda ),
-	EXPECT ( 0xaf, 0x97, 0xcd, 0xe1, 0xe8, 0xab, 0x32, 0x2a, 0x2e, 0xac,
-		 0xa8, 0xe6, 0xf4, 0xe5, 0xbf, 0x78, 0xa1, 0x1b, 0xde, 0xf7,
-		 0xdc, 0x91, 0x21, 0x5d, 0x44, 0xb1, 0x07, 0xb4, 0xd5, 0xa7,
-		 0x79, 0x01, 0x59, 0x25, 0x09, 0x76, 0x52, 0x80, 0xf9, 0x69 ) );
-
-/** SHA-1 Test 5 : Instantiation */
-#define sha1_instantiate_5 sha1_instantiate_1
-
-/** SHA-1 Test 5.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_5_1, HMAC_DRBG_SHA1,
-	additional_input_empty, ( 320 / 8 ) );
-
-/** SHA-1 Test 5.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_5_2, HMAC_DRBG_SHA1,
-	entropy_input_1, additional_input_empty,
-	EXPECT ( 0xcd, 0x4c, 0xab, 0x38, 0xc8, 0xad, 0x65, 0x71, 0x22, 0xbf,
-		 0x5d, 0x3d, 0x00, 0xd0, 0xac, 0x9b, 0x13, 0xd6, 0x29, 0xbb ),
-	EXPECT ( 0xf6, 0x60, 0xe2, 0x3e, 0x91, 0x00, 0x6b, 0x62, 0xc6, 0x54,
-		 0x3a, 0xb1, 0x34, 0x4d, 0x23, 0xa3, 0x1a, 0xb4, 0xcf, 0x2c ) );
-
-/** SHA-1 Test 5.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_5_3, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x58, 0x7f, 0xd8, 0x21, 0xef, 0x6c, 0x9d, 0xa4, 0xa8, 0x3c,
-		 0x19, 0x21, 0x1f, 0x10, 0x56, 0xca, 0xcd, 0x23, 0xfc, 0x1a ),
-	EXPECT ( 0x84, 0x8f, 0xd1, 0x4c, 0x13, 0xb7, 0xea, 0x93, 0x72, 0x0c,
-		 0xcf, 0xde, 0x71, 0xf2, 0xf6, 0x44, 0x39, 0xdb, 0x79, 0x5d ),
-	EXPECT ( 0xfe, 0xc4, 0x59, 0x7f, 0x06, 0xa3, 0xa8, 0xcc, 0x85, 0x29,
-		 0xd5, 0x95, 0x57, 0xb9, 0xe6, 0x61, 0x05, 0x38, 0x09, 0xc0,
-		 0xbc, 0x0e, 0xfc, 0x28, 0x2a, 0xbd, 0x87, 0x60, 0x5c, 0xc9,
-		 0x0c, 0xba, 0x9b, 0x86, 0x33, 0xdc, 0xb1, 0xda, 0xe0, 0x2e ) );
-
-/** SHA-1 Test 5.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_5_4, HMAC_DRBG_SHA1,
-	additional_input_empty, ( 320 / 8 ) );
-
-/** SHA-1 Test 5.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_5_5, HMAC_DRBG_SHA1,
-	entropy_input_2, additional_input_empty,
-	EXPECT ( 0xdb, 0xa1, 0xcf, 0xf4, 0x87, 0x95, 0x46, 0xa0, 0x38, 0xa5,
-		 0x59, 0xb2, 0xa2, 0x4d, 0xf2, 0xc0, 0x30, 0x08, 0x9a, 0x41 ),
-	EXPECT ( 0x2f, 0x88, 0x3c, 0x46, 0x48, 0xe1, 0x31, 0xe8, 0x6d, 0xdf,
-		 0x9d, 0xca, 0x0d, 0x74, 0xf3, 0x0c, 0xa1, 0xce, 0x6e, 0xfb ) );
-
-/** SHA-1 Test 5.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_5_6, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0xf9, 0x39, 0xa5, 0xab, 0x08, 0xa3, 0x9f, 0x23, 0x10, 0x70,
-		 0xb0, 0xd4, 0xc9, 0x6d, 0xc2, 0x37, 0x90, 0xba, 0x01, 0x53 ),
-	EXPECT ( 0xce, 0x6d, 0x08, 0xb4, 0xae, 0x2c, 0xe3, 0x83, 0xfd, 0xab,
-		 0xb0, 0x1e, 0xaa, 0xfc, 0x9c, 0x8e, 0x76, 0xa0, 0xd4, 0x72 ),
-	EXPECT ( 0x84, 0xad, 0xd5, 0xe2, 0xd2, 0x04, 0x1c, 0x01, 0x72, 0x3a,
-		 0x4d, 0xe4, 0x33, 0x5b, 0x13, 0xef, 0xdf, 0x16, 0xb0, 0xe5,
-		 0x1a, 0x0a, 0xd3, 0x9b, 0xd1, 0x5e, 0x86, 0x2e, 0x64, 0x4f,
-		 0x31, 0xe4, 0xa2, 0xd7, 0xd8, 0x43, 0xe5, 0x7c, 0x59, 0x68 ) );
-
-/** SHA-1 Test 6 : Instantiate */
-#define sha1_instantiate_6 sha1_instantiate_1
-
-/** SHA-1 Test 6.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_6_1, HMAC_DRBG_SHA1,
-	additional_input_1, ( 320 / 8 ) );
-
-/** SHA-1 Test 6.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_6_2, HMAC_DRBG_SHA1,
-	entropy_input_1, additional_input_1,
-	EXPECT ( 0x52, 0x28, 0xa4, 0xb6, 0xa4, 0x46, 0x92, 0x90, 0x5e, 0xc0,
-		 0x44, 0xbf, 0xf0, 0xbb, 0x4e, 0x25, 0xa3, 0x87, 0xca, 0xc1 ),
-	EXPECT ( 0x24, 0x77, 0x32, 0xd0, 0x4c, 0xb8, 0x4e, 0xd4, 0x1a, 0xdd,
-		 0x95, 0xa4, 0xb7, 0x8b, 0x50, 0xcd, 0x9b, 0x3d, 0x3f, 0x32 ) );
-
-/** SHA-1 Test 6.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_6_3, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0xab, 0x3d, 0xd4, 0x89, 0x5b, 0xc8, 0xcd, 0x22, 0x71, 0xde,
-		 0xba, 0x5f, 0x3c, 0x13, 0x63, 0x52, 0x6b, 0x8b, 0x74, 0x52 ),
-	EXPECT ( 0xa8, 0x66, 0xc5, 0xef, 0xf2, 0xaf, 0x04, 0x2b, 0x11, 0x86,
-		 0x44, 0x94, 0x45, 0x23, 0x7f, 0x9c, 0x02, 0x44, 0x98, 0x64 ),
-	EXPECT ( 0xa1, 0xba, 0x8f, 0xa5, 0x8b, 0xb5, 0x01, 0x3f, 0x43, 0xf7,
-		 0xb6, 0xed, 0x52, 0xb4, 0x53, 0x9f, 0xa1, 0x6d, 0xc7, 0x79,
-		 0x57, 0xae, 0xe8, 0x15, 0xb9, 0xc0, 0x70, 0x04, 0xc7, 0xe9,
-		 0x92, 0xeb, 0x8c, 0x7e, 0x59, 0x19, 0x64, 0xaf, 0xee, 0xa2 ) );
-
-/** SHA-1 Test 6.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_6_4, HMAC_DRBG_SHA1,
-	additional_input_2, ( 320 / 8 ) );
-
-/** SHA-1 Test 6.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_6_5, HMAC_DRBG_SHA1,
-	entropy_input_2, additional_input_2,
-	EXPECT ( 0xe5, 0x73, 0x9f, 0x9c, 0xf7, 0xff, 0x43, 0x84, 0xd1, 0x27,
-		 0x3e, 0x02, 0x6b, 0x45, 0x31, 0x21, 0x36, 0x49, 0x4f, 0x41 ),
-	EXPECT ( 0x30, 0xc3, 0x43, 0x05, 0xc2, 0xc6, 0x48, 0xb0, 0x57, 0xa6,
-		 0x40, 0x22, 0x1b, 0x5c, 0x56, 0x57, 0x26, 0xcd, 0x32, 0xb2 ) );
-
-/** SHA-1 Test 6.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_6_6, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x61, 0x91, 0xca, 0x9b, 0xf0, 0x00, 0xd1, 0x0a, 0x71, 0x69,
-		 0x0a, 0xc1, 0x0e, 0x09, 0xff, 0xc8, 0x92, 0xab, 0xde, 0x9a ),
-	EXPECT ( 0x1e, 0xc0, 0x49, 0x0f, 0xa0, 0xb7, 0x65, 0x52, 0x7e, 0x5e,
-		 0xa1, 0x8b, 0x53, 0x22, 0xb2, 0x8b, 0xdd, 0x0e, 0x7b, 0xc0 ),
-	EXPECT ( 0x84, 0x26, 0x4a, 0x73, 0xa8, 0x18, 0xc9, 0x5c, 0x2f, 0x42,
-		 0x4b, 0x37, 0xd3, 0xcc, 0x99, 0x0b, 0x04, 0x6f, 0xb5, 0x0c,
-		 0x2d, 0xc6, 0x4a, 0x16, 0x42, 0x11, 0x88, 0x9a, 0x01, 0x0f,
-		 0x24, 0x71, 0xa0, 0x91, 0x2f, 0xfe, 0xa1, 0xbf, 0x01, 0x95 ) );
-
-/** SHA-1 Test 7 : Instantiation */
-#define sha1_instantiate_7 sha1_instantiate_3
-
-/** SHA-1 Test 7.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_7_1, HMAC_DRBG_SHA1,
-	additional_input_empty, ( 320 / 8 ) );
-
-/** SHA-1 Test 7.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_7_2, HMAC_DRBG_SHA1,
-	entropy_input_1, additional_input_empty,
-	EXPECT ( 0xb9, 0x25, 0x4d, 0x8a, 0xac, 0xba, 0x43, 0xfb, 0xda, 0xe6,
-		 0x39, 0x4f, 0x2b, 0x3a, 0xfc, 0x5d, 0x58, 0x08, 0x00, 0xbf ),
-	EXPECT ( 0x28, 0x40, 0x3b, 0x60, 0x36, 0x38, 0xd0, 0x7d, 0x79, 0x66,
-		 0x66, 0x1e, 0xf6, 0x7b, 0x9d, 0x39, 0x05, 0xf4, 0x6d, 0xb9 ) );
-
-/** SHA-1 Test 7.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_7_3, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x64, 0xfe, 0x07, 0x4a, 0x6e, 0x77, 0x97, 0xd1, 0xa4, 0x35,
-		 0xda, 0x89, 0x64, 0x48, 0x4d, 0x6c, 0xf8, 0xbd, 0xc0, 0x1b ),
-	EXPECT ( 0x43, 0xe0, 0xc0, 0x52, 0x15, 0x86, 0xe9, 0x47, 0x3b, 0x06,
-		 0x0d, 0x87, 0xd0, 0x8a, 0x23, 0x25, 0xfa, 0xe1, 0x49, 0xd1 ),
-	EXPECT ( 0x6c, 0x37, 0xfd, 0xd7, 0x29, 0xaa, 0x40, 0xf8, 0x0b, 0xc6,
-		 0xab, 0x08, 0xca, 0x7c, 0xc6, 0x49, 0x79, 0x4f, 0x69, 0x98,
-		 0xb5, 0x70, 0x81, 0xe4, 0x22, 0x0f, 0x22, 0xc5, 0xc2, 0x83,
-		 0xe2, 0xc9, 0x1b, 0x8e, 0x30, 0x5a, 0xb8, 0x69, 0xc6, 0x25 ) );
-
-/** SHA-1 Test 7.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_7_4, HMAC_DRBG_SHA1,
-	additional_input_empty, ( 320 / 8 ) );
-
-/** SHA-1 Test 7.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_7_5, HMAC_DRBG_SHA1,
-	entropy_input_2, additional_input_empty,
-	EXPECT ( 0x02, 0xbc, 0x57, 0x7f, 0xd1, 0x0e, 0xf7, 0x19, 0x3c, 0x1d,
-		 0xb0, 0x98, 0xbd, 0x5b, 0x75, 0xc7, 0xc4, 0xb6, 0x79, 0x59 ),
-	EXPECT ( 0xbc, 0xbd, 0xf0, 0x52, 0xe0, 0xe0, 0x2a, 0xe8, 0x9a, 0x77,
-		 0x67, 0x94, 0x3f, 0x98, 0x65, 0xb8, 0xb7, 0x22, 0x90, 0x2d ) );
-
-/** SHA-1 Test 7.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_7_6, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x1a, 0xa4, 0x24, 0x1c, 0x69, 0x5e, 0x29, 0xc0, 0xa5, 0x9a,
-		 0xd1, 0x8a, 0x60, 0x70, 0xe3, 0x38, 0xa5, 0x48, 0xbe, 0x92 ),
-	EXPECT ( 0x03, 0x47, 0x35, 0x9b, 0xc9, 0xc7, 0xf8, 0x8c, 0xc8, 0x33,
-		 0x0d, 0x4f, 0x59, 0xfb, 0xc7, 0x70, 0xb0, 0xb7, 0x7b, 0x03 ),
-	EXPECT ( 0xca, 0xf5, 0x7d, 0xcf, 0xea, 0x39, 0x3b, 0x92, 0x36, 0xbf,
-		 0x69, 0x1f, 0xa4, 0x56, 0xfe, 0xa7, 0xfd, 0xf1, 0xdf, 0x83,
-		 0x61, 0x48, 0x2c, 0xa5, 0x4d, 0x5f, 0xa7, 0x23, 0xf4, 0xc8,
-		 0x8b, 0x4f, 0xa5, 0x04, 0xbf, 0x03, 0x27, 0x7f, 0xa7, 0x83 ) );
-
-/** SHA-1 Test 8 : Instantiate */
-#define sha1_instantiate_8 sha1_instantiate_3
-
-/** SHA-1 Test 8.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_8_1, HMAC_DRBG_SHA1,
-	additional_input_1, ( 320 / 8 ) );
-
-/** SHA-1 Test 8.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_8_2, HMAC_DRBG_SHA1,
-	entropy_input_1, additional_input_1,
-	EXPECT ( 0xc0, 0x95, 0x48, 0xc0, 0xd3, 0xc8, 0x61, 0xd7, 0x40, 0xf2,
-		 0x83, 0x7d, 0x72, 0xb5, 0x07, 0x23, 0x5c, 0x26, 0xdb, 0x82 ),
-	EXPECT ( 0x17, 0x4b, 0x3f, 0x84, 0xc3, 0x53, 0x1f, 0x7c, 0x0a, 0x2e,
-		 0x54, 0x21, 0x23, 0x4e, 0xa1, 0x6b, 0x70, 0x8d, 0xdf, 0x0d ) );
-
-/** SHA-1 Test 8.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_8_3, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0x60, 0x3f, 0x09, 0x49, 0x27, 0x9c, 0x70, 0xe8, 0xc6, 0x6c,
-		 0x0f, 0x56, 0x37, 0xc0, 0xf3, 0x75, 0x60, 0x07, 0xe5, 0xac ),
-	EXPECT ( 0xf2, 0xb3, 0x3b, 0x21, 0x15, 0x1f, 0xaf, 0x61, 0x20, 0x01,
-		 0x83, 0x10, 0xf4, 0x4e, 0x4c, 0xd0, 0xbf, 0xe3, 0x68, 0xea ),
-	EXPECT ( 0xbd, 0x07, 0xc2, 0x5c, 0xfd, 0x7c, 0x5e, 0x3a, 0x4e, 0xaa,
-		 0x6e, 0x2e, 0xdc, 0x5a, 0xb7, 0xea, 0x49, 0x42, 0xa0, 0x91,
-		 0x34, 0x71, 0xfd, 0xa5, 0x5c, 0x6d, 0xdd, 0x2c, 0x03, 0xef,
-		 0xa3, 0xb9, 0x64, 0x3a, 0xb3, 0xbb, 0x22, 0xf6, 0xc9, 0xf2 ) );
-
-/** SHA-1 Test 8.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha1_generate_fail_8_4, HMAC_DRBG_SHA1,
-	additional_input_2, ( 320 / 8 ) );
-
-/** SHA-1 Test 8.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha1_reseed_8_5, HMAC_DRBG_SHA1,
-	entropy_input_2, additional_input_2,
-	EXPECT ( 0x89, 0x42, 0xa5, 0x4f, 0x34, 0x9e, 0x28, 0x1b, 0x84, 0xaa,
-		 0x46, 0x95, 0x87, 0xfb, 0xdd, 0xaf, 0x9d, 0x11, 0x40, 0x82 ),
-	EXPECT ( 0x07, 0x73, 0x0e, 0x3c, 0xbf, 0xfd, 0x3c, 0xaf, 0xd7, 0xa8,
-		 0xaa, 0xe2, 0xbf, 0x01, 0xd6, 0x01, 0x43, 0x01, 0xe2, 0x4d ) );
-
-/** SHA-1 Test 8.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha1_generate_8_6, HMAC_DRBG_SHA1,
-	additional_input_empty,
-	EXPECT ( 0xbd, 0xe1, 0xb4, 0x6c, 0xdc, 0x54, 0x13, 0xb3, 0xd9, 0xf7,
-		 0x35, 0xac, 0xdb, 0x80, 0xb1, 0x3c, 0x57, 0xbf, 0xe4, 0x73 ),
-	EXPECT ( 0x72, 0x5a, 0x3c, 0x78, 0x20, 0xde, 0x1a, 0x06, 0xd0, 0x95,
-		 0x81, 0x9c, 0xcf, 0x6f, 0x2c, 0x9b, 0x3a, 0x67, 0xf2, 0xce ),
-	EXPECT ( 0xd1, 0xa9, 0xc1, 0xa2, 0x2c, 0x84, 0xfc, 0x23, 0xff, 0x22,
-		 0x27, 0xef, 0x98, 0xec, 0x8b, 0xa9, 0xdf, 0x2a, 0x20, 0x9b,
-		 0xa1, 0xdb, 0x09, 0x80, 0x9f, 0x57, 0xbf, 0xea, 0xe5, 0xb3,
-		 0xe5, 0xf1, 0x46, 0xc7, 0x5f, 0x2d, 0x8d, 0xbb, 0x5e, 0x4a ) );
-
-/** SHA-256 Test 1 : Instantiation */
-HMAC_DRBG_TEST_INSTANTIATE ( sha256_instantiate_1, HMAC_DRBG_SHA256,
-	entropy_input, nonce_sha256, personalisation_string_empty,
-	EXPECT ( 0x3d, 0xda, 0x54, 0x3e, 0x7e, 0xef, 0x14, 0xf9, 0x36, 0x23,
-		 0x7b, 0xe6, 0x5d, 0x09, 0x4b, 0x4d, 0xdc, 0x96, 0x9c, 0x0b,
-		 0x2b, 0x5e, 0xaf, 0xb5, 0xd8, 0x05, 0xe8, 0x6c, 0xfa, 0x64,
-		 0xd7, 0x41 ),
-	EXPECT ( 0x2d, 0x02, 0xc2, 0xf8, 0x22, 0x51, 0x7d, 0x54, 0xb8, 0x17,
-		 0x27, 0x9a, 0x59, 0x49, 0x1c, 0x41, 0xa1, 0x98, 0x9b, 0x3e,
-		 0x38, 0x2d, 0xeb, 0xe8, 0x0d, 0x2c, 0x7f, 0x66, 0x0f, 0x44,
-		 0x76, 0xc4 ) );
-
-/** SHA-256 Test 1.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_1_1, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0xdd, 0x30, 0x95, 0x79, 0x35, 0x38, 0x02, 0xcc, 0xdd, 0x43,
-		 0x99, 0xc3, 0x69, 0x1c, 0x9d, 0xd9, 0x09, 0xdd, 0x3b, 0x2d,
-		 0xd0, 0x03, 0xcc, 0xd5, 0x9d, 0x6f, 0x08, 0xd8, 0x5f, 0x2e,
-		 0x35, 0x09 ),
-	EXPECT ( 0xa1, 0xc2, 0x0f, 0xf2, 0x70, 0xa3, 0x9d, 0x2b, 0x8d, 0x03,
-		 0xd6, 0x59, 0xb9, 0xdd, 0xd0, 0x11, 0xc2, 0xcc, 0xdf, 0x24,
-		 0x48, 0x55, 0x7e, 0xf6, 0xa1, 0xa9, 0x15, 0xd1, 0x89, 0x40,
-		 0xa6, 0x88 ),
-	EXPECT ( 0xd6, 0x7b, 0x8c, 0x17, 0x34, 0xf4, 0x6f, 0xa3, 0xf7, 0x63,
-		 0xcf, 0x57, 0xc6, 0xf9, 0xf4, 0xf2, 0xdc, 0x10, 0x89, 0xbd,
-		 0x8b, 0xc1, 0xf6, 0xf0, 0x23, 0x95, 0x0b, 0xfc, 0x56, 0x17,
-		 0x63, 0x52, 0x08, 0xc8, 0x50, 0x12, 0x38, 0xad, 0x7a, 0x44,
-		 0x00, 0xde, 0xfe, 0xe4, 0x6c, 0x64, 0x0b, 0x61, 0xaf, 0x77,
-		 0xc2, 0xd1, 0xa3, 0xbf, 0xaa, 0x90, 0xed, 0xe5, 0xd2, 0x07,
-		 0x40, 0x6e, 0x54, 0x03 ) );
-
-/** SHA-256 Test 1.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_1_2, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x5c, 0xd5, 0xe5, 0x0a, 0x3e, 0x44, 0x8a, 0x07, 0xc3, 0xd2,
-		 0xf2, 0xa3, 0xf9, 0xde, 0xbc, 0xc0, 0x46, 0x5f, 0x9c, 0xf1,
-		 0x1c, 0xa1, 0x36, 0xe9, 0xb5, 0x04, 0xb4, 0xd3, 0x1c, 0x7f,
-		 0xf1, 0xb8 ),
-	EXPECT ( 0x33, 0xb3, 0x09, 0xf2, 0xff, 0x01, 0xce, 0x10, 0x4b, 0x44,
-		 0x29, 0xb6, 0x75, 0xfa, 0xfa, 0x19, 0x01, 0x1e, 0x34, 0x8b,
-		 0x28, 0x12, 0x71, 0x5a, 0x76, 0x37, 0xf6, 0xa6, 0xe6, 0x3b,
-		 0x5d, 0x57 ),
-	EXPECT ( 0x8f, 0xda, 0xec, 0x20, 0xf8, 0xb4, 0x21, 0x40, 0x70, 0x59,
-		 0xe3, 0x58, 0x89, 0x20, 0xda, 0x7e, 0xda, 0x9d, 0xce, 0x3c,
-		 0xf8, 0x27, 0x4d, 0xfa, 0x1c, 0x59, 0xc1, 0x08, 0xc1, 0xd0,
-		 0xaa, 0x9b, 0x0f, 0xa3, 0x8d, 0xa5, 0xc7, 0x92, 0x03, 0x7c,
-		 0x4d, 0x33, 0xcd, 0x07, 0x0c, 0xa7, 0xcd, 0x0c, 0x56, 0x08,
-		 0xdb, 0xa8, 0xb8, 0x85, 0x65, 0x46, 0x39, 0xde, 0x21, 0x87,
-		 0xb7, 0x4c, 0xb2, 0x63 ) );
-
-/** SHA-256 Test 2 : Instantiation */
-#define sha256_instantiate_2 sha256_instantiate_1
-
-/** SHA-256 Test 2.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_2_1, HMAC_DRBG_SHA256,
-	additional_input_1,
-	EXPECT ( 0x79, 0x1d, 0x31, 0x44, 0xb3, 0x02, 0xad, 0x6c, 0xe4, 0x32,
-		 0x41, 0x34, 0x42, 0x10, 0xaa, 0xd0, 0xd3, 0x99, 0xed, 0xb7,
-		 0xb5, 0x90, 0x6f, 0xb2, 0x51, 0xdb, 0x1c, 0xb6, 0x00, 0x04,
-		 0xea, 0x51 ),
-	EXPECT ( 0x58, 0xfd, 0x96, 0x5f, 0x4f, 0x99, 0x89, 0x3c, 0x17, 0xe6,
-		 0xa3, 0x3c, 0xb8, 0xe9, 0x04, 0x15, 0xb5, 0x16, 0xd0, 0x06,
-		 0x14, 0xa4, 0x49, 0xd4, 0x06, 0xe0, 0x3c, 0x68, 0x5b, 0xd8,
-		 0x59, 0xbd ),
-	EXPECT ( 0x41, 0x87, 0x87, 0x35, 0x81, 0x35, 0x41, 0x9b, 0x93, 0x81,
-		 0x33, 0x53, 0x53, 0x06, 0x17, 0x6a, 0xfb, 0x25, 0x1c, 0xdd,
-		 0x2b, 0xa3, 0x79, 0x88, 0x59, 0xb5, 0x66, 0xa0, 0x5c, 0xfb,
-		 0x1d, 0x68, 0x0e, 0xa9, 0x25, 0x85, 0x6d, 0x5b, 0x84, 0xd5,
-		 0x6a, 0xda, 0xe8, 0x70, 0x45, 0xa6, 0xba, 0x28, 0xd2, 0xc9,
-		 0x08, 0xab, 0x75, 0xb7, 0xcc, 0x41, 0x43, 0x1f, 0xac, 0x59,
-		 0xf3, 0x89, 0x18, 0xa3 ) );
-
-/** SHA-256 Test 2.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_2_2, HMAC_DRBG_SHA256,
-	additional_input_2,
-	EXPECT ( 0xe7, 0x45, 0x8f, 0xb4, 0x4a, 0x36, 0x9a, 0x65, 0x3f, 0x2f,
-		 0x8f, 0x57, 0x7b, 0xf9, 0x75, 0xc4, 0xb3, 0x62, 0xc4, 0xfe,
-		 0x61, 0x8b, 0x2f, 0x1f, 0xf6, 0x76, 0x9b, 0x13, 0xc9, 0x4d,
-		 0xec, 0xf4 ),
-	EXPECT ( 0x19, 0x33, 0x4b, 0x8c, 0x31, 0xb7, 0x49, 0x32, 0xdd, 0xd7,
-		 0xb2, 0xa4, 0x68, 0xf6, 0x43, 0x6d, 0xf9, 0x2e, 0x10, 0x0d,
-		 0x39, 0xd3, 0xac, 0xb3, 0x68, 0xc7, 0x02, 0x9c, 0xb8, 0x83,
-		 0xec, 0x89 ),
-	EXPECT ( 0x7c, 0x06, 0x7b, 0xdd, 0xca, 0x81, 0x72, 0x48, 0x23, 0xd6,
-		 0x4c, 0x69, 0x82, 0x92, 0x85, 0xbd, 0xbf, 0xf5, 0x37, 0x71,
-		 0x61, 0x02, 0xc1, 0x88, 0x2e, 0x20, 0x22, 0x50, 0xe0, 0xfa,
-		 0x5e, 0xf3, 0xa3, 0x84, 0xcd, 0x34, 0xa2, 0x0f, 0xfd, 0x1f,
-		 0xbc, 0x91, 0xe0, 0xc5, 0x32, 0xa8, 0xa4, 0x21, 0xbc, 0x4a,
-		 0xfe, 0x3c, 0xd4, 0x7f, 0x22, 0x32, 0x3e, 0xb4, 0xba, 0xe1,
-		 0xa0, 0x07, 0x89, 0x81 ) );
-
-/** SHA-256 Test 3 : Instantiation */
-HMAC_DRBG_TEST_INSTANTIATE ( sha256_instantiate_3, HMAC_DRBG_SHA256,
-	entropy_input, nonce_sha256, personalisation_string,
-	EXPECT ( 0x65, 0x67, 0x3c, 0x34, 0x8e, 0x51, 0xcf, 0xac, 0xc4, 0x10,
-		 0xbd, 0x20, 0x02, 0x49, 0xa5, 0x9a, 0x9d, 0x6b, 0xae, 0x77,
-		 0x69, 0x04, 0x27, 0x1b, 0xb1, 0xf7, 0x18, 0xda, 0x1d, 0x18,
-		 0x20, 0x42 ),
-	EXPECT ( 0xe0, 0xf9, 0x1a, 0xc9, 0x96, 0x30, 0xee, 0xe6, 0x7c, 0xf8,
-		 0x30, 0xcf, 0xd5, 0x04, 0x4f, 0xeb, 0xf5, 0x5c, 0x0c, 0x11,
-		 0x50, 0x07, 0x99, 0x7a, 0xda, 0x11, 0x29, 0x6f, 0xc4, 0x16,
-		 0x4a, 0x9a ) );
-
-/** SHA-256 Test 3.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_3_1, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0xf0, 0xb2, 0xf2, 0x42, 0xca, 0xd9, 0x92, 0xa7, 0x24, 0xf7,
-		 0xe5, 0x59, 0x1d, 0x2f, 0x3b, 0x0c, 0x21, 0x57, 0xae, 0x70,
-		 0xd5, 0x32, 0x78, 0x99, 0x40, 0xf1, 0x64, 0x45, 0x9b, 0x00,
-		 0xc7, 0x49 ),
-	EXPECT ( 0x1a, 0x03, 0xf9, 0x1c, 0x51, 0x20, 0xba, 0xca, 0x2b, 0xf6,
-		 0xc6, 0x4d, 0xd7, 0x3a, 0xb1, 0x1d, 0xf6, 0xfd, 0x3f, 0xf1,
-		 0xac, 0x3b, 0x57, 0x20, 0xa3, 0xf7, 0xfb, 0xe3, 0x9e, 0x7e,
-		 0x7f, 0xe9 ),
-	EXPECT ( 0x0d, 0xd9, 0xc8, 0x55, 0x89, 0xf3, 0x57, 0xc3, 0x89, 0xd6,
-		 0xaf, 0x8d, 0xe9, 0xd7, 0x34, 0xa9, 0x17, 0xc7, 0x71, 0xef,
-		 0x2d, 0x88, 0x16, 0xb9, 0x82, 0x59, 0x6e, 0xd1, 0x2d, 0xb4,
-		 0x5d, 0x73, 0x4a, 0x62, 0x68, 0x08, 0x35, 0xc0, 0x2f, 0xda,
-		 0x66, 0xb0, 0x8e, 0x1a, 0x36, 0x9a, 0xe2, 0x18, 0xf2, 0x6d,
-		 0x52, 0x10, 0xad, 0x56, 0x42, 0x48, 0x87, 0x2d, 0x7a, 0x28,
-		 0x78, 0x41, 0x59, 0xc3 ) );
-
-/** SHA-256 Test 3.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_3_2, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x5c, 0x0d, 0xec, 0x09, 0x37, 0x08, 0xc1, 0x7c, 0xa7, 0x6b,
-		 0x57, 0xc0, 0xcb, 0x60, 0xcf, 0x88, 0x9d, 0xcc, 0x47, 0xad,
-		 0x10, 0xbd, 0x64, 0xbc, 0x6a, 0x14, 0xb2, 0x3f, 0x20, 0x26,
-		 0x07, 0x8a ),
-	EXPECT ( 0x45, 0x67, 0x52, 0xa5, 0x11, 0xb8, 0x48, 0xbd, 0x05, 0xf1,
-		 0x81, 0x9b, 0x9f, 0x6b, 0x15, 0x42, 0xc7, 0xd5, 0xec, 0xf9,
-		 0x32, 0x73, 0x39, 0x26, 0x7a, 0x0c, 0x77, 0x23, 0x5b, 0x87,
-		 0xdc, 0x5a ),
-	EXPECT ( 0x46, 0xb4, 0xf4, 0x75, 0x6a, 0xe7, 0x15, 0xe0, 0xe5, 0x16,
-		 0x81, 0xab, 0x29, 0x32, 0xde, 0x15, 0x23, 0xbe, 0x5d, 0x13,
-		 0xba, 0xf0, 0xf4, 0x58, 0x8b, 0x11, 0xfe, 0x37, 0x2f, 0xda,
-		 0x37, 0xab, 0xe3, 0x68, 0x31, 0x73, 0x41, 0xbc, 0x8b, 0xa9,
-		 0x1f, 0xc5, 0xd8, 0x5b, 0x7f, 0xb8, 0xca, 0x8f, 0xbc, 0x30,
-		 0x9a, 0x75, 0x8f, 0xd6, 0xfc, 0xa9, 0xdf, 0x43, 0xc7, 0x66,
-		 0x0b, 0x22, 0x13, 0x22 ) );
-
-/** SHA-256 Test 4 : Instantiation */
-#define sha256_instantiate_4 sha256_instantiate_3
-
-/** SHA-256 Test 4.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_4_1, HMAC_DRBG_SHA256,
-	additional_input_1,
-	EXPECT ( 0x57, 0x2c, 0x03, 0x74, 0xc1, 0xa1, 0x01, 0x25, 0xbf, 0xa6,
-		 0xae, 0xcd, 0x7c, 0xeb, 0xfe, 0x32, 0xf7, 0x52, 0xc3, 0xfb,
-		 0x31, 0x67, 0x31, 0xb7, 0xcf, 0xdb, 0xde, 0xc2, 0x63, 0x56,
-		 0x93, 0x2b ),
-	EXPECT ( 0xd6, 0x8b, 0xf0, 0x41, 0xf3, 0xeb, 0x50, 0x88, 0x08, 0x8d,
-		 0x8b, 0x8e, 0x71, 0x2c, 0x36, 0xae, 0x95, 0x83, 0xbb, 0x08,
-		 0xfd, 0x1f, 0x90, 0x34, 0xa4, 0xe9, 0x42, 0xe9, 0xa6, 0x74,
-		 0x7c, 0xe7 ),
-	EXPECT ( 0x14, 0x78, 0xf2, 0x9e, 0x94, 0xb0, 0x2c, 0xb4, 0x0d, 0x3a,
-		 0xab, 0x86, 0x24, 0x55, 0x57, 0xce, 0x13, 0xa8, 0xca, 0x2f,
-		 0xdb, 0x65, 0x7d, 0x98, 0xef, 0xc1, 0x92, 0x34, 0x6b, 0x9f,
-		 0xac, 0x33, 0xea, 0x58, 0xad, 0xa2, 0xcc, 0xa4, 0x32, 0xcc,
-		 0xde, 0xfb, 0xcd, 0xaa, 0x8b, 0x82, 0xf5, 0x53, 0xef, 0x96,
-		 0x61, 0x34, 0xe2, 0xcd, 0x13, 0x9f, 0x15, 0xf0, 0x1c, 0xad,
-		 0x56, 0x85, 0x65, 0xa8 ) );
-
-/** SHA-256 Test 4.2 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_4_2, HMAC_DRBG_SHA256,
-	additional_input_2,
-	EXPECT ( 0x28, 0x2e, 0x07, 0x34, 0x80, 0x80, 0x93, 0x75, 0x58, 0xb1,
-		 0x39, 0x2e, 0x95, 0xab, 0x91, 0xe7, 0xc1, 0xf6, 0x22, 0xb2,
-		 0x4f, 0xfb, 0x87, 0x20, 0xa5, 0xf0, 0xa5, 0xe0, 0x75, 0x50,
-		 0xc7, 0xc2 ),
-	EXPECT ( 0xdf, 0xc3, 0xbd, 0xb5, 0xf3, 0xbc, 0xf1, 0xaa, 0x68, 0x29,
-		 0x8e, 0x79, 0x0d, 0x72, 0x0a, 0x67, 0xa7, 0x6e, 0x31, 0xb9,
-		 0x2b, 0x9b, 0x35, 0xa8, 0xe5, 0x47, 0x1b, 0xb1, 0x7e, 0x30,
-		 0x3c, 0x6b ),
-	EXPECT ( 0x49, 0x7c, 0x7a, 0x16, 0xe8, 0x8a, 0x64, 0x11, 0xf8, 0xfc,
-		 0xe1, 0x0e, 0xf5, 0x67, 0x63, 0xc6, 0x10, 0x25, 0x80, 0x1d,
-		 0x8f, 0x51, 0xa7, 0x43, 0x52, 0xd6, 0x82, 0xcc, 0x23, 0xa0,
-		 0xa8, 0xe6, 0x73, 0xca, 0xe0, 0x32, 0x28, 0x93, 0x90, 0x64,
-		 0x7d, 0xc6, 0x83, 0xb7, 0x34, 0x28, 0x85, 0xd6, 0xb7, 0x6a,
-		 0xb1, 0xda, 0x69, 0x6d, 0x3e, 0x97, 0xe2, 0x2d, 0xff, 0xdd,
-		 0xff, 0xfd, 0x8d, 0xf0 ) );
-
-/** SHA-256 Test 5 : Instantiation */
-#define sha256_instantiate_5 sha256_instantiate_1
-
-/** SHA-256 Test 5.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_5_1, HMAC_DRBG_SHA256,
-	additional_input_empty, ( 512 / 8 ) );
-
-/** SHA-256 Test 5.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_5_2, HMAC_DRBG_SHA256,
-	entropy_input_1, additional_input_empty,
-	EXPECT ( 0xb8, 0x40, 0x07, 0xe3, 0xe2, 0x7f, 0x34, 0xf9, 0xa7, 0x82,
-		 0x0b, 0x7a, 0xb5, 0x9b, 0xbe, 0xfc, 0xd0, 0xc4, 0xac, 0xae,
-		 0xde, 0x4b, 0x0b, 0x36, 0xb1, 0x47, 0xb8, 0x97, 0x79, 0xfd,
-		 0x74, 0x9d ),
-	EXPECT ( 0xa7, 0x2b, 0x8f, 0xee, 0x92, 0x39, 0x2f, 0x0a, 0x9d, 0x2d,
-		 0x61, 0xbf, 0x09, 0xa4, 0xdf, 0xcc, 0x9d, 0xe6, 0x9a, 0x16,
-		 0xa5, 0xf1, 0x50, 0x22, 0x4c, 0x3e, 0xf6, 0x04, 0x2d, 0x15,
-		 0x21, 0xfc ) );
-
-/** SHA-256 Test 5.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_5_3, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x43, 0x48, 0xaf, 0x84, 0x20, 0x84, 0x2f, 0xa0, 0x77, 0xb9,
-		 0xd3, 0xdb, 0xa8, 0xdc, 0xe9, 0xb3, 0xe1, 0xdf, 0x73, 0x4f,
-		 0xfc, 0xe1, 0xbe, 0xa5, 0xb9, 0xe2, 0xb1, 0x54, 0xdc, 0x5e,
-		 0xc6, 0x15 ),
-	EXPECT ( 0xd2, 0xc1, 0xac, 0x27, 0x88, 0x5d, 0x43, 0x32, 0x76, 0x71,
-		 0x31, 0x46, 0x32, 0xea, 0x60, 0x43, 0x3c, 0xca, 0x72, 0x73,
-		 0x04, 0x56, 0x9e, 0xa7, 0xd4, 0x71, 0xfe, 0xa7, 0xdb, 0x7d,
-		 0x31, 0x5d ),
-	EXPECT ( 0xfa, 0xbd, 0x0a, 0xe2, 0x5c, 0x69, 0xdc, 0x2e, 0xfd, 0xef,
-		 0xb7, 0xf2, 0x0c, 0x5a, 0x31, 0xb5, 0x7a, 0xc9, 0x38, 0xab,
-		 0x77, 0x1a, 0xa1, 0x9b, 0xf8, 0xf5, 0xf1, 0x46, 0x8f, 0x66,
-		 0x5c, 0x93, 0x8c, 0x9a, 0x1a, 0x5d, 0xf0, 0x62, 0x8a, 0x56,
-		 0x90, 0xf1, 0x5a, 0x1a, 0xd8, 0xa6, 0x13, 0xf3, 0x1b, 0xbd,
-		 0x65, 0xee, 0xad, 0x54, 0x57, 0xd5, 0xd2, 0x69, 0x47, 0xf2,
-		 0x9f, 0xe9, 0x1a, 0xa7 ) );
-
-/** SHA-256 Test 5.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_5_4, HMAC_DRBG_SHA256,
-	additional_input_empty, ( 512 / 8 ) );
-
-/** SHA-256 Test 5.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_5_5, HMAC_DRBG_SHA256,
-	entropy_input_2, additional_input_empty,
-	EXPECT ( 0xbf, 0xa0, 0x2c, 0xe7, 0xe9, 0x2d, 0xe9, 0x2b, 0x18, 0x24,
-		 0x28, 0x86, 0x89, 0x0e, 0x58, 0x6f, 0x83, 0x69, 0x06, 0xac,
-		 0xe9, 0xe5, 0x54, 0xf1, 0xb0, 0xed, 0x63, 0x57, 0x3c, 0xb8,
-		 0xb5, 0x03 ),
-	EXPECT ( 0xd3, 0x24, 0x03, 0xee, 0xa9, 0xdc, 0xe1, 0x61, 0x6e, 0x4e,
-		 0x11, 0x55, 0xb9, 0x23, 0xd8, 0x84, 0x2c, 0xc6, 0xe7, 0x84,
-		 0xc6, 0x7a, 0x93, 0x85, 0xb2, 0xa6, 0x37, 0xf1, 0x02, 0xfa,
-		 0x45, 0xd5 ) );
-
-/** SHA-256 Test 5.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_5_6, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x81, 0x21, 0xf7, 0x76, 0x4c, 0x08, 0x1e, 0xe9, 0xd1, 0x17,
-		 0x1e, 0xd1, 0x87, 0xba, 0xe0, 0x88, 0x95, 0xca, 0xe2, 0x30,
-		 0xd0, 0xa2, 0x5e, 0x37, 0x39, 0xc5, 0x7d, 0x54, 0x16, 0x10,
-		 0x9b, 0x82 ),
-	EXPECT ( 0x37, 0x84, 0x97, 0x7c, 0xc0, 0xe5, 0x9f, 0xbc, 0x9c, 0xda,
-		 0x4e, 0x11, 0x92, 0x47, 0x5c, 0x6e, 0xfa, 0xf8, 0x07, 0x20,
-		 0x19, 0x86, 0x21, 0x22, 0xcb, 0x6b, 0xce, 0xaa, 0xcc, 0x4a,
-		 0x17, 0x5e ),
-	EXPECT ( 0x6b, 0xd9, 0x25, 0xb0, 0xe1, 0xc2, 0x32, 0xef, 0xd6, 0x7c,
-		 0xcd, 0x84, 0xf7, 0x22, 0xe9, 0x27, 0xec, 0xb4, 0x6a, 0xb2,
-		 0xb7, 0x40, 0x01, 0x47, 0x77, 0xaf, 0x14, 0xba, 0x0b, 0xbf,
-		 0x53, 0xa4, 0x5b, 0xdb, 0xb6, 0x2b, 0x3f, 0x7d, 0x0b, 0x9c,
-		 0x8e, 0xea, 0xd0, 0x57, 0xc0, 0xec, 0x75, 0x4e, 0xf8, 0xb5,
-		 0x3e, 0x60, 0xa1, 0xf4, 0x34, 0xf0, 0x59, 0x46, 0xa8, 0xb6,
-		 0x86, 0xaf, 0xbc, 0x7a ) );
-
-/** SHA-256 Test 6 : Instantiate */
-#define sha256_instantiate_6 sha256_instantiate_1
-
-/** SHA-256 Test 6.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_6_1, HMAC_DRBG_SHA256,
-	additional_input_1, ( 512 / 8 ) );
-
-/** SHA-256 Test 6.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_6_2, HMAC_DRBG_SHA256,
-	entropy_input_1, additional_input_1,
-	EXPECT ( 0xc1, 0x25, 0xea, 0x99, 0x75, 0x8e, 0xbb, 0x9a, 0x6f, 0x69,
-		 0xae, 0x31, 0x2a, 0xc2, 0x04, 0xb5, 0x94, 0xc0, 0x0a, 0xb6,
-		 0x8b, 0x81, 0x6e, 0x3a, 0x52, 0x12, 0x8e, 0x02, 0x78, 0xa5,
-		 0x84, 0xac ),
-	EXPECT ( 0xb2, 0xcb, 0x2b, 0x89, 0x12, 0x3f, 0x5b, 0x4a, 0xf5, 0x87,
-		 0xb8, 0xf6, 0xbd, 0xc5, 0x42, 0x7a, 0x99, 0x14, 0x19, 0xd3,
-		 0x53, 0x07, 0x7c, 0x68, 0x5e, 0x70, 0x7a, 0xcd, 0xf8, 0xe9,
-		 0xfd, 0xa9 ) );
-
-/** SHA-256 Test 6.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_6_3, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0xc6, 0xed, 0x8f, 0xed, 0x71, 0x57, 0xa4, 0xd0, 0x9e, 0xa1,
-		 0xdd, 0xe8, 0x94, 0x6b, 0x54, 0x43, 0x3e, 0xcc, 0x54, 0x49,
-		 0xa4, 0xa3, 0x52, 0xaf, 0x45, 0x76, 0x4e, 0xe6, 0x73, 0x4b,
-		 0xbb, 0x04 ),
-	EXPECT ( 0xeb, 0xc7, 0x75, 0x25, 0x6b, 0xb7, 0x81, 0x24, 0x1e, 0x9c,
-		 0x70, 0xbb, 0xcf, 0x73, 0x2b, 0xdc, 0x90, 0xad, 0x10, 0xd9,
-		 0xdd, 0x3a, 0x89, 0x6e, 0xcc, 0x12, 0xb9, 0x2f, 0xfb, 0x63,
-		 0x45, 0xab ),
-	EXPECT ( 0x08, 0x5d, 0x57, 0xaf, 0x6b, 0xab, 0xcf, 0x2b, 0x9a, 0xee,
-		 0xf3, 0x87, 0xd5, 0x31, 0x65, 0x0e, 0x6a, 0x50, 0x5c, 0x54,
-		 0x40, 0x6a, 0xb3, 0x7a, 0x52, 0x89, 0x9e, 0x0e, 0xca, 0xb3,
-		 0x63, 0x2b, 0x7a, 0x06, 0x8a, 0x28, 0x14, 0xc6, 0xdf, 0x6a,
-		 0xe5, 0x32, 0xb6, 0x58, 0xd0, 0xd9, 0x74, 0x1c, 0x84, 0x77,
-		 0x5f, 0xee, 0x45, 0xb6, 0x84, 0xcd, 0xbd, 0xc2, 0x5f, 0xbc,
-		 0xb4, 0xd8, 0xf3, 0x10 ) );
-
-/** SHA-256 Test 6.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_6_4, HMAC_DRBG_SHA256,
-	additional_input_2, ( 512 / 8 ) );
-
-/** SHA-256 Test 6.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_6_5, HMAC_DRBG_SHA256,
-	entropy_input_2, additional_input_2,
-	EXPECT ( 0xfc, 0x51, 0xda, 0x84, 0xf9, 0x69, 0x6b, 0xcc, 0x84, 0xc8,
-		 0xf2, 0xac, 0xb9, 0x24, 0xbc, 0xdf, 0x72, 0xf8, 0x2e, 0xa2,
-		 0xca, 0x64, 0x3f, 0x08, 0x3b, 0x0c, 0x16, 0xc3, 0x63, 0x4e,
-		 0xfc, 0x62 ),
-	EXPECT ( 0xb9, 0x74, 0xe4, 0x37, 0x0a, 0xd5, 0x76, 0xbb, 0x99, 0xc4,
-		 0xe4, 0x9e, 0xa6, 0x80, 0xbf, 0xf9, 0x8d, 0xe9, 0xe1, 0x2f,
-		 0xec, 0xd0, 0x13, 0xde, 0xd4, 0x3c, 0x80, 0xf6, 0x9a, 0x7a,
-		 0xde, 0x8a ) );
-
-/** SHA-256 Test 6.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_6_6, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x56, 0xa2, 0xb4, 0x46, 0x32, 0xcb, 0x8f, 0xc3, 0xa6, 0x40,
-		 0x09, 0xbf, 0xd6, 0xec, 0x95, 0xe5, 0x6c, 0xef, 0x8e, 0x7c,
-		 0x91, 0x2a, 0xa8, 0x2b, 0x16, 0xf6, 0x14, 0x91, 0x5d, 0x9c,
-		 0xd6, 0xe3 ),
-	EXPECT ( 0xb5, 0xb3, 0x96, 0xa0, 0x15, 0x76, 0xb0, 0xfe, 0x42, 0xf4,
-		 0x08, 0x44, 0x55, 0x6c, 0x4c, 0xf4, 0xb6, 0x80, 0x4c, 0x94,
-		 0xde, 0x9d, 0x62, 0x38, 0xf1, 0xf7, 0xe7, 0xaf, 0x5c, 0x72,
-		 0x57, 0xf3 ),
-	EXPECT ( 0x9b, 0x21, 0x9f, 0xd9, 0x0d, 0xe2, 0xa0, 0x8e, 0x49, 0x34,
-		 0x05, 0xcf, 0x87, 0x44, 0x17, 0xb5, 0x82, 0x67, 0x70, 0xf3,
-		 0x94, 0x48, 0x15, 0x55, 0xdc, 0x66, 0x8a, 0xcd, 0x96, 0xb9,
-		 0xa3, 0xe5, 0x6f, 0x9d, 0x2c, 0x32, 0x5e, 0x26, 0xd4, 0x7c,
-		 0x1d, 0xfc, 0xfc, 0x8f, 0xbf, 0x86, 0x12, 0x6f, 0x40, 0xa1,
-		 0xe6, 0x39, 0x60, 0xf6, 0x27, 0x49, 0x34, 0x2e, 0xcd, 0xb7,
-		 0x1b, 0x24, 0x0d, 0xc6 ) );
-
-/** SHA-256 Test 7 : Instantiation */
-#define sha256_instantiate_7 sha256_instantiate_3
-
-/** SHA-256 Test 7.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_7_1, HMAC_DRBG_SHA256,
-	additional_input_empty, ( 512 / 8 ) );
-
-/** SHA-256 Test 7.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_7_2, HMAC_DRBG_SHA256,
-	entropy_input_1, additional_input_empty,
-	EXPECT ( 0x44, 0x76, 0xc6, 0xd1, 0x1f, 0xc3, 0x5d, 0x44, 0x09, 0xd9,
-		 0x03, 0x2e, 0x45, 0x3b, 0x0f, 0x0d, 0xc3, 0x31, 0x4d, 0xb8,
-		 0x62, 0xcb, 0xdb, 0x60, 0x9c, 0x56, 0x02, 0x20, 0x8d, 0x4c,
-		 0x88, 0xd8 ),
-	EXPECT ( 0x95, 0xef, 0x78, 0x5a, 0x61, 0xc2, 0xf7, 0xb3, 0x6b, 0xc5,
-		 0x96, 0xba, 0x4b, 0xa2, 0x08, 0xa5, 0x2c, 0x6d, 0xc2, 0x03,
-		 0x63, 0x6d, 0x8f, 0x17, 0x87, 0x45, 0x3b, 0x85, 0x2b, 0x7e,
-		 0x49, 0xec ) );
-
-/** SHA-256 Test 7.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_7_3, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x0d, 0xf9, 0x11, 0x0e, 0x2f, 0x22, 0x58, 0x98, 0x24, 0xa9,
-		 0x47, 0x6c, 0x8e, 0x32, 0x08, 0x8e, 0x51, 0xa0, 0xda, 0x36,
-		 0x63, 0x3f, 0x8c, 0xd1, 0xf7, 0x54, 0x7d, 0xff, 0x69, 0x6e,
-		 0x4b, 0x29 ),
-	EXPECT ( 0xc0, 0xe3, 0xc8, 0xed, 0x5a, 0x8b, 0x57, 0x9e, 0x3f, 0xef,
-		 0x9d, 0xf3, 0xb7, 0xc2, 0xc2, 0x12, 0x98, 0x07, 0x17, 0xcc,
-		 0x91, 0xae, 0x18, 0x66, 0x45, 0xfa, 0xbb, 0x2c, 0xc7, 0x84,
-		 0xd5, 0xd7 ),
-	EXPECT ( 0xd8, 0xb6, 0x71, 0x30, 0x71, 0x41, 0x94, 0xff, 0xe5, 0xb2,
-		 0xa3, 0x5d, 0xbc, 0xd5, 0xe1, 0xa2, 0x99, 0x42, 0xad, 0x5c,
-		 0x68, 0xf3, 0xde, 0xb9, 0x4a, 0xdd, 0x9e, 0x9e, 0xba, 0xd8,
-		 0x60, 0x67, 0xed, 0xf0, 0x49, 0x15, 0xfb, 0x40, 0xc3, 0x91,
-		 0xea, 0xe7, 0x0c, 0x65, 0x9e, 0xaa, 0xe7, 0xef, 0x11, 0xa3,
-		 0xd4, 0x6a, 0x5b, 0x08, 0x5e, 0xdd, 0x90, 0xcc, 0x72, 0xce,
-		 0xa9, 0x89, 0x21, 0x0b ) );
-
-/** SHA-256 Test 7.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_7_4, HMAC_DRBG_SHA256,
-	additional_input_empty, ( 512 / 8 ) );
-
-/** SHA-256 Test 7.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_7_5, HMAC_DRBG_SHA256,
-	entropy_input_2, additional_input_empty,
-	EXPECT ( 0x3d, 0x77, 0x63, 0xe5, 0x30, 0x3d, 0xb5, 0x4b, 0xe2, 0x05,
-		 0x44, 0xa8, 0x1e, 0x9f, 0x00, 0xca, 0xdc, 0xfc, 0x1c, 0xb2,
-		 0x8d, 0xec, 0xb9, 0xcf, 0xc6, 0x99, 0xf6, 0x1d, 0xba, 0xf8,
-		 0x80, 0x21 ),
-	EXPECT ( 0xfe, 0xbc, 0x02, 0x79, 0xb7, 0x71, 0x0d, 0xec, 0x5c, 0x06,
-		 0x7e, 0xbe, 0xfa, 0x06, 0x8e, 0x4b, 0x59, 0x67, 0x49, 0x1b,
-		 0x7e, 0xef, 0x94, 0x75, 0x83, 0x50, 0x6d, 0x04, 0x97, 0xce,
-		 0x67, 0xba ) );
-
-/** SHA-256 Test 7.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_7_6, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0x2d, 0x21, 0xac, 0x94, 0x99, 0x2f, 0xd8, 0x2b, 0x09, 0x80,
-		 0xd3, 0xd5, 0x95, 0x51, 0xb9, 0xd0, 0x7c, 0x8d, 0x54, 0xb2,
-		 0x52, 0xb6, 0x16, 0x28, 0x93, 0x44, 0xf8, 0xac, 0x86, 0x9e,
-		 0xd3, 0x5b ),
-	EXPECT ( 0x61, 0x0c, 0x34, 0xcd, 0xbf, 0x6f, 0x75, 0x33, 0x54, 0x7f,
-		 0x23, 0x32, 0xea, 0xc5, 0x7e, 0xe3, 0x1e, 0x72, 0x4f, 0xb2,
-		 0x92, 0x55, 0x56, 0x6b, 0x59, 0x78, 0x33, 0x16, 0x6c, 0xd0,
-		 0x39, 0x9f ),
-	EXPECT ( 0x8b, 0xba, 0x71, 0xc2, 0x58, 0x3f, 0x25, 0x30, 0xc2, 0x59,
-		 0xc9, 0x07, 0x84, 0xa5, 0x9a, 0xc4, 0x4d, 0x1c, 0x80, 0x56,
-		 0x91, 0x7c, 0xcf, 0x38, 0x87, 0x88, 0x10, 0x2d, 0x73, 0x82,
-		 0x4c, 0x6c, 0x11, 0xd5, 0xd6, 0x3b, 0xe1, 0xf0, 0x10, 0x17,
-		 0xd8, 0x84, 0xcd, 0x69, 0xd9, 0x33, 0x4b, 0x9e, 0xbc, 0x01,
-		 0xe7, 0xbd, 0x8f, 0xdf, 0x2a, 0x8e, 0x52, 0x57, 0x22, 0x93,
-		 0xdc, 0x21, 0xc0, 0xe1 ) );
-
-/** SHA-256 Test 8 : Instantiate */
-#define sha256_instantiate_8 sha256_instantiate_3
-
-/** SHA-256 Test 8.1 : First call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_8_1, HMAC_DRBG_SHA256,
-	additional_input_1, ( 512 / 8 ) );
-
-/** SHA-256 Test 8.2 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_8_2, HMAC_DRBG_SHA256,
-	entropy_input_1, additional_input_1,
-	EXPECT ( 0xb3, 0x81, 0x38, 0x8c, 0x1d, 0x7c, 0xfd, 0x56, 0x59, 0x30,
-		 0x99, 0x3b, 0xd9, 0x26, 0x90, 0x66, 0x50, 0x88, 0xd9, 0xb8,
-		 0x39, 0x96, 0x9b, 0x87, 0xf1, 0x6d, 0xb6, 0xdf, 0x4e, 0x43,
-		 0x00, 0xd7 ),
-	EXPECT ( 0xfa, 0x04, 0x25, 0x64, 0x00, 0xe3, 0x42, 0xe6, 0x55, 0xf4,
-		 0x33, 0x26, 0x94, 0xe3, 0xb2, 0x4c, 0x04, 0xfb, 0x85, 0xbf,
-		 0x87, 0x80, 0x21, 0xe4, 0x52, 0xe7, 0x3b, 0x8f, 0x46, 0xd4,
-		 0xbd, 0xc6 ) );
-
-/** SHA-256 Test 8.3 : Retried first call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_8_3, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0xd4, 0x1f, 0x6f, 0x33, 0x65, 0x82, 0x21, 0x70, 0x50, 0xb1,
-		 0xf6, 0x59, 0x28, 0xfd, 0x6e, 0x94, 0xcb, 0xc9, 0x45, 0x68,
-		 0xfe, 0x3b, 0x6b, 0x53, 0x38, 0x9e, 0x1e, 0x3a, 0x5b, 0x49,
-		 0xe1, 0x01 ),
-	EXPECT ( 0xa6, 0x55, 0xc9, 0xe7, 0xd1, 0x33, 0xf1, 0xcd, 0x8b, 0x11,
-		 0x61, 0xf2, 0x7d, 0x54, 0xe7, 0x5a, 0x7e, 0x7c, 0x80, 0x42,
-		 0xbf, 0x74, 0xd4, 0x7f, 0x9f, 0xfd, 0x60, 0xe2, 0x45, 0xeb,
-		 0xa5, 0x7e ),
-	EXPECT ( 0x44, 0xd7, 0x8b, 0xbc, 0x3e, 0xb6, 0x7c, 0x59, 0xc2, 0x2f,
-		 0x6c, 0x31, 0x00, 0x3d, 0x21, 0x2a, 0x78, 0x37, 0xcc, 0xd8,
-		 0x4c, 0x43, 0x8b, 0x55, 0x15, 0x0f, 0xd0, 0x13, 0xa8, 0xa7,
-		 0x8f, 0xe8, 0xed, 0xea, 0x81, 0xc6, 0x72, 0xe4, 0xb8, 0xdd,
-		 0xc8, 0x18, 0x38, 0x86, 0xe6, 0x9c, 0x2e, 0x17, 0x7d, 0xf5,
-		 0x74, 0xc1, 0xf1, 0x90, 0xdf, 0x27, 0x18, 0x50, 0xf8, 0xce,
-		 0x55, 0xef, 0x20, 0xb8 ) );
-
-/** SHA-256 Test 8.4 : Second call to Generate */
-HMAC_DRBG_TEST_GENERATE_FAIL ( sha256_generate_fail_8_4, HMAC_DRBG_SHA256,
-	additional_input_2, ( 512 / 8 ) );
-
-/** SHA-256 Test 8.5 : Reseed */
-HMAC_DRBG_TEST_RESEED ( sha256_reseed_8_5, HMAC_DRBG_SHA256,
-	entropy_input_2, additional_input_2,
-	EXPECT ( 0xfb, 0xa8, 0x05, 0x45, 0x3e, 0x3c, 0x9a, 0x73, 0x64, 0x58,
-		 0x5c, 0xed, 0xbc, 0xd2, 0x92, 0x30, 0xfb, 0xc9, 0x3d, 0x6f,
-		 0x12, 0x9d, 0x21, 0xed, 0xdd, 0xf6, 0x61, 0x3b, 0x3a, 0x8f,
-		 0xf2, 0x83 ),
-	EXPECT ( 0x83, 0x64, 0x7a, 0x33, 0x8c, 0x15, 0x3c, 0xba, 0xf0, 0xe4,
-		 0x9a, 0x54, 0xa4, 0x4f, 0xea, 0x66, 0x70, 0xcf, 0xd7, 0xc1,
-		 0x71, 0x4d, 0x4a, 0xb3, 0x5f, 0x11, 0x12, 0x3d, 0xf2, 0x7b,
-		 0x69, 0xcf ) );
-
-/** SHA-256 Test 8.6 : Retried second call to Generate */
-HMAC_DRBG_TEST_GENERATE ( sha256_generate_8_6, HMAC_DRBG_SHA256,
-	additional_input_empty,
-	EXPECT ( 0xae, 0x59, 0xc7, 0x0a, 0x7c, 0x60, 0xed, 0x49, 0x83, 0x78,
-		 0xea, 0x84, 0x5b, 0xe9, 0x7d, 0x8f, 0xf8, 0x81, 0xe0, 0xea,
-		 0x37, 0x2e, 0x26, 0x5f, 0xa6, 0x72, 0x84, 0x29, 0x3e, 0x1a,
-		 0x46, 0xac ),
-	EXPECT ( 0xe2, 0xf0, 0x4d, 0xe3, 0xce, 0x21, 0x79, 0x61, 0xae, 0x2b,
-		 0x2d, 0x20, 0xa7, 0xba, 0x7c, 0x6c, 0x82, 0x0b, 0x5b, 0x14,
-		 0x92, 0x6e, 0x59, 0x56, 0xae, 0x6d, 0xfa, 0x2e, 0xd1, 0xd6,
-		 0x39, 0x93 ),
-	EXPECT ( 0x91, 0x77, 0x80, 0xdc, 0x0c, 0xe9, 0x98, 0x9f, 0xee, 0x6c,
-		 0x08, 0x06, 0xd6, 0xda, 0x12, 0x3a, 0x18, 0x25, 0x29, 0x47,
-		 0x58, 0xd4, 0xe1, 0xb5, 0x82, 0x68, 0x72, 0x31, 0x78, 0x0a,
-		 0x2a, 0x9c, 0x33, 0xf1, 0xd1, 0x56, 0xcc, 0xad, 0x32, 0x77,
-		 0x64, 0xb2, 0x9a, 0x4c, 0xb2, 0x69, 0x01, 0x77, 0xae, 0x96,
-		 0xef, 0x9e, 0xe9, 0x2a, 0xd0, 0xc3, 0x40, 0xba, 0x0f, 0xd1,
-		 0x20, 0x3c, 0x02, 0xc6 ) );
-
-/**
- * Force a "reseed required" state
- *
- * @v state		HMAC_DRBG internal state
- */
-static inline void force_reseed_required ( struct hmac_drbg_state *state ) {
-	state->reseed_counter = ( HMAC_DRBG_RESEED_INTERVAL + 1 );
-}
-
-/**
- * Perform HMAC_DRBG self-test
- *
- */
-static void hmac_drbg_test_exec ( void ) {
-	struct hmac_drbg_state state;
-
-	/*
-	 * IMPORTANT NOTE
-	 *
-	 * The NIST test vector set includes several calls to
-	 * HMAC_DRBG_Generate() that are expected to fail with a
-	 * status of "Reseed required".  The pattern seems to be that
-	 * when prediction resistance is requested, any call to
-	 * HMAC_DRBG_Generate() is at first expected to fail.  After
-	 * an explicit reseeding, the call to HMAC_DRBG_Generate() is
-	 * retried, and on this second time it is expected to succeed.
-	 *
-	 * This pattern does not match the specifications for
-	 * HMAC_DRBG_Generate(): neither HMAC_DRBG_Generate_algorithm
-	 * (defined in ANS X9.82 Part 3-2007 Section 10.2.2.2.5 (NIST
-	 * SP 800-90 Section 10.1.2.5)) nor the higher-level wrapper
-	 * Generate_function defined in ANS X9.82 Part 3-2007 Section
-	 * 9.4 (NIST SP 800-90 Section 9.3)) can possibly exhibit this
-	 * behaviour:
-	 *
-	 * a) HMAC_DRBG_Generate_algorithm can return a "reseed
-	 *    required" status only as a result of the test
-	 *
-	 *      "1. If reseed_counter > reseed_interval, then return
-	 *       an indication that a reseed is required."
-	 *
-	 *    Since the reseed interval is independent of any request
-	 *    for prediction resistance, and since the reseed interval
-	 *    is not specified as part of the NIST test vector set,
-	 *    then this cannot be the source of the "Reseed required"
-	 *    failure expected by the NIST test vector set.
-	 *
-	 * b) Generate_function cannot return a "reseed required"
-	 *    status under any circumstances.  If the underlying
-	 *    HMAC_DRBG_Generate_algorithm call returns "reseed
-	 *    required", then Generate_function will automatically
-	 *    reseed and try again.
-	 *
-	 * To produce the behaviour expected by the NIST test vector
-	 * set, we therefore contrive to produce a "reseed required"
-	 * state where necessary by setting the reseed_counter to
-	 * greater than the reseed_interval.
-	 */
-
-	/* SHA-1 Test 1 */
-	instantiate_ok ( &state, &sha1_instantiate_1 );
-	generate_ok ( &state, &sha1_generate_1_1 );
-	generate_ok ( &state, &sha1_generate_1_2 );
-
-	/* SHA-1 Test 2 */
-	instantiate_ok ( &state, &sha1_instantiate_2 );
-	generate_ok ( &state, &sha1_generate_2_1 );
-	generate_ok ( &state, &sha1_generate_2_2 );
-
-	/* SHA-1 Test 3 */
-	instantiate_ok ( &state, &sha1_instantiate_3 );
-	generate_ok ( &state, &sha1_generate_3_1 );
-	generate_ok ( &state, &sha1_generate_3_2 );
-
-	/* SHA-1 Test 4 */
-	instantiate_ok ( &state, &sha1_instantiate_4 );
-	generate_ok ( &state, &sha1_generate_4_1 );
-	generate_ok ( &state, &sha1_generate_4_2 );
-
-	/* SHA-1 Test 5 */
-	instantiate_ok ( &state, &sha1_instantiate_5 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_5_1 );
-	reseed_ok ( &state, &sha1_reseed_5_2 );
-	generate_ok ( &state, &sha1_generate_5_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_5_4 );
-	reseed_ok ( &state, &sha1_reseed_5_5 );
-	generate_ok ( &state, &sha1_generate_5_6 );
-
-	/* SHA-1 Test 6 */
-	instantiate_ok ( &state, &sha1_instantiate_6 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_6_1 );
-	reseed_ok ( &state, &sha1_reseed_6_2 );
-	generate_ok ( &state, &sha1_generate_6_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_6_4 );
-	reseed_ok ( &state, &sha1_reseed_6_5 );
-	generate_ok ( &state, &sha1_generate_6_6 );
-
-	/* SHA-1 Test 7 */
-	instantiate_ok ( &state, &sha1_instantiate_7 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_7_1 );
-	reseed_ok ( &state, &sha1_reseed_7_2 );
-	generate_ok ( &state, &sha1_generate_7_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_7_4 );
-	reseed_ok ( &state, &sha1_reseed_7_5 );
-	generate_ok ( &state, &sha1_generate_7_6 );
-
-	/* SHA-1 Test 8 */
-	instantiate_ok ( &state, &sha1_instantiate_8 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_8_1 );
-	reseed_ok ( &state, &sha1_reseed_8_2 );
-	generate_ok ( &state, &sha1_generate_8_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha1_generate_fail_8_4 );
-	reseed_ok ( &state, &sha1_reseed_8_5 );
-	generate_ok ( &state, &sha1_generate_8_6 );
-
-	/* SHA-256 Test 1 */
-	instantiate_ok ( &state, &sha256_instantiate_1 );
-	generate_ok ( &state, &sha256_generate_1_1 );
-	generate_ok ( &state, &sha256_generate_1_2 );
-
-	/* SHA-256 Test 2 */
-	instantiate_ok ( &state, &sha256_instantiate_2 );
-	generate_ok ( &state, &sha256_generate_2_1 );
-	generate_ok ( &state, &sha256_generate_2_2 );
-
-	/* SHA-256 Test 3 */
-	instantiate_ok ( &state, &sha256_instantiate_3 );
-	generate_ok ( &state, &sha256_generate_3_1 );
-	generate_ok ( &state, &sha256_generate_3_2 );
-
-	/* SHA-256 Test 4 */
-	instantiate_ok ( &state, &sha256_instantiate_4 );
-	generate_ok ( &state, &sha256_generate_4_1 );
-	generate_ok ( &state, &sha256_generate_4_2 );
-
-	/* SHA-256 Test 5 */
-	instantiate_ok ( &state, &sha256_instantiate_5 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_5_1 );
-	reseed_ok ( &state, &sha256_reseed_5_2 );
-	generate_ok ( &state, &sha256_generate_5_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_5_4 );
-	reseed_ok ( &state, &sha256_reseed_5_5 );
-	generate_ok ( &state, &sha256_generate_5_6 );
-
-	/* SHA-256 Test 6 */
-	instantiate_ok ( &state, &sha256_instantiate_6 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_6_1 );
-	reseed_ok ( &state, &sha256_reseed_6_2 );
-	generate_ok ( &state, &sha256_generate_6_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_6_4 );
-	reseed_ok ( &state, &sha256_reseed_6_5 );
-	generate_ok ( &state, &sha256_generate_6_6 );
-
-	/* SHA-256 Test 7 */
-	instantiate_ok ( &state, &sha256_instantiate_7 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_7_1 );
-	reseed_ok ( &state, &sha256_reseed_7_2 );
-	generate_ok ( &state, &sha256_generate_7_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_7_4 );
-	reseed_ok ( &state, &sha256_reseed_7_5 );
-	generate_ok ( &state, &sha256_generate_7_6 );
-
-	/* SHA-256 Test 8 */
-	instantiate_ok ( &state, &sha256_instantiate_8 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_8_1 );
-	reseed_ok ( &state, &sha256_reseed_8_2 );
-	generate_ok ( &state, &sha256_generate_8_3 );
-	force_reseed_required ( &state ); /* See above comments */
-	generate_fail_ok ( &state, &sha256_generate_fail_8_4 );
-	reseed_ok ( &state, &sha256_reseed_8_5 );
-	generate_ok ( &state, &sha256_generate_8_6 );
-}
-
-/** HMAC_DRBG self-test */
-struct self_test hmac_drbg_test __self_test = {
-	.name = "hmac_drbg",
-	.exec = hmac_drbg_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/ipv6_test.c ipxe-1.0.1~lliurex1505/src/tests/ipv6_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/ipv6_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/ipv6_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,181 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * IPv6 tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <string.h>
-#include <byteswap.h>
-#include <ipxe/ipv6.h>
-#include <ipxe/test.h>
-
-/** Define inline IPv6 address */
-#define IPV6(...) { __VA_ARGS__ }
-
-/**
- * Report an inet6_ntoa() test result
- *
- * @v addr		IPv6 address
- * @v text		Expected textual representation
- */
-#define inet6_ntoa_ok( addr, text ) do {				\
-	static const struct in6_addr in = {				\
-		.s6_addr = addr,					\
-	};								\
-	static const char expected[] = text;				\
-	char *actual;							\
-									\
-	actual = inet6_ntoa ( &in );					\
-	DBG ( "inet6_ntoa ( %04x:%04x:%04x:%04x:%04x:%04x:%04x:%04x ) "	\
-	      "= %s\n", ntohs ( in.s6_addr16[0] ),			\
-	      ntohs ( in.s6_addr16[1] ), ntohs ( in.s6_addr16[2] ),	\
-	      ntohs ( in.s6_addr16[3] ), ntohs ( in.s6_addr16[4] ),	\
-	      ntohs ( in.s6_addr16[5] ), ntohs ( in.s6_addr16[6] ),	\
-	      ntohs ( in.s6_addr16[7] ), actual );			\
-	ok ( strcmp ( actual, expected ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report an inet6_aton() test result
- *
- * @v text		Textual representation
- * @v addr		Expected IPv6 address
- */
-#define inet6_aton_ok( text, addr ) do {				\
-	static const char string[] = text;				\
-	static const struct in6_addr expected = {			\
-		.s6_addr = addr,					\
-	};								\
-	struct in6_addr actual;						\
-									\
-	ok ( inet6_aton ( string, &actual ) == 0 );			\
-	DBG ( "inet6_aton ( \"%s\" ) = %s\n", string,			\
-	      inet6_ntoa ( &actual ) );					\
-	ok ( memcmp ( &actual, &expected, sizeof ( actual ) ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Report an inet6_aton() failure test result
- *
- * @v text		Textual representation
- */
-#define inet6_aton_fail_ok( text ) do {					\
-	static const char string[] = text;				\
-	struct in6_addr dummy;						\
-									\
-	ok ( inet6_aton ( string, &dummy ) != 0 );			\
-	} while ( 0 )
-
-/**
- * Perform IPv6 self-tests
- *
- */
-static void ipv6_test_exec ( void ) {
-
-	/* inet6_ntoa() tests */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x0b, 0xa8, 0x00, 0x00, 0x01, 0xd4,
-			       0x00, 0x00, 0x00, 0x00, 0x69, 0x50, 0x58, 0x45 ),
-			"2001:ba8:0:1d4::6950:5845" );
-	/* No zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x0d, 0xb8, 0x00, 0x01, 0x00, 0x01,
-			       0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01 ),
-			"2001:db8:1:1:1:1:1:1" );
-	/* Run of zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x0d, 0xb8, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 ),
-			"2001:db8::1" );
-	/* No "::" for single zero */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x0d, 0xb8, 0x00, 0x00, 0x00, 0x01,
-			       0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01 ),
-			"2001:db8:0:1:1:1:1:1" );
-	/* Use "::" for longest run of zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 ),
-			"2001:0:0:1::1" );
-	/* Use "::" for leftmost equal-length run of zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x20, 0x01, 0x0d, 0xb8, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 ),
-			"2001:db8::1:0:0:1" );
-	/* Trailing run of zeros */
-	inet6_ntoa_ok ( IPV6 ( 0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ),
-			"fe80::" );
-	/* Leading run of zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 ),
-			"::1" );
-	/* All zeros */
-	inet6_ntoa_ok ( IPV6 ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 ),
-			"::" );
-	/* Maximum length */
-	inet6_ntoa_ok ( IPV6 ( 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-			       0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff ),
-			"ffff:ffff:ffff:ffff:ffff:ffff:ffff:ffff" );
-
-	/* inet6_aton() tests */
-	inet6_aton_ok ( "2001:ba8:0:1d4::6950:5845",
-			IPV6 ( 0x20, 0x01, 0x0b, 0xa8, 0x00, 0x00, 0x01, 0xd4,
-			       0x00, 0x00, 0x00, 0x00, 0x69, 0x50, 0x58, 0x45));
-	/* No zeros */
-	inet6_aton_ok ( "2001:db8:1:1:1:1:1:1",
-			IPV6 ( 0x20, 0x01, 0x0d, 0xb8, 0x00, 0x01, 0x00, 0x01,
-			       0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01));
-	/* All intervening zeros */
-	inet6_aton_ok ( "fe80::1",
-			IPV6 ( 0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01));
-	/* Trailing run of zeros */
-	inet6_aton_ok ( "fe80::",
-			IPV6 ( 0xfe, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00));
-	/* Leading run of zeros */
-	inet6_aton_ok ( "::1",
-			IPV6 ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01));
-	/* All zeros */
-	inet6_aton_ok ( "::",
-			IPV6 ( 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-			       0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00));
-
-	/* inet6_aton() failure tests */
-	inet6_aton_fail_ok ( "20012:ba8:0:1d4::6950:5845" );
-	inet6_aton_fail_ok ( "200z:ba8:0:1d4::6950:5845" );
-	inet6_aton_fail_ok ( "2001.ba8:0:1d4::6950:5845" );
-	inet6_aton_fail_ok ( "2001:db8:1:1:1:1:1" );
-	inet6_aton_fail_ok ( "2001:db8:1:1:1:1:1:1:2" );
-	inet6_aton_fail_ok ( "2001:db8::1::2" );
-	inet6_aton_fail_ok ( "2001:ba8:0:1d4:::6950:5845" );
-	inet6_aton_fail_ok ( ":::" );
-}
-
-/** IPv6 self-test */
-struct self_test ipv6_test __self_test = {
-	.name = "ipv6",
-	.exec = ipv6_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/list_test.c ipxe-1.0.1~lliurex1505/src/tests/list_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/list_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/list_test.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -120,41 +119,6 @@
 	} while ( 0 )
 
 /**
- * Report list iteration test result
- *
- * @v macro		Iterator macro
- * @v expected		Expected contents
- * @v pos		Iterator
- * @v ...		Arguments to iterator macro
- */
-#define list_iterate_ok( macro, expected, pos, ... ) do {	\
-	const char *check = expected;				\
-	macro ( pos, __VA_ARGS__ ) {				\
-		struct list_test *entry =			\
-			list_entry ( pos, struct list_test,	\
-				     list );			\
-		ok ( entry->label == *(check++) );		\
-	}							\
-	ok ( *check == '\0' );					\
-	} while ( 0 )
-
-/**
- * Report list entry iteration test result
- *
- * @v macro		Iterator macro
- * @v expected		Expected contents
- * @v pos		Iterator
- * @v ...		Arguments to iterator macro
- */
-#define list_iterate_entry_ok( macro, expected, pos, ... ) do {	\
-	const char *check = expected;				\
-	macro ( pos, __VA_ARGS__ ) {				\
-		ok ( (pos)->label == *(check++) );		\
-	}							\
-	ok ( *check == '\0' );					\
-	} while ( 0 )
-
-/**
  * Perform list self-test
  *
  */
@@ -162,9 +126,6 @@
 	struct list_head *list = &test_list;
 	struct list_head target_list;
 	struct list_head *target = &target_list;
-	struct list_head *raw_pos;
-	struct list_test *pos;
-	struct list_test *tmp;
 
 	/* Test initialiser and list_empty() */
 	ok ( list_empty ( list ) );
@@ -369,46 +330,35 @@
 	ok ( list_entry ( &list_tests[3].list, struct list_test, list )
 	     == &list_tests[3] );
 
-	/* Test list_first_entry() and list_last_entry() */
+	/* Test list_first_entry() */
 	INIT_LIST_HEAD ( list );
 	list_add_tail ( &list_tests[9].list, list );
 	list_add_tail ( &list_tests[5].list, list );
 	list_add_tail ( &list_tests[6].list, list );
 	ok ( list_first_entry ( list, struct list_test, list )
 	     == &list_tests[9] );
-	ok ( list_last_entry ( list, struct list_test, list )
-	     == &list_tests[6] );
 	list_del ( &list_tests[9].list );
 	ok ( list_first_entry ( list, struct list_test, list )
 	     == &list_tests[5] );
-	ok ( list_last_entry ( list, struct list_test, list )
-	     == &list_tests[6] );
-	list_del ( &list_tests[6].list );
-	ok ( list_first_entry ( list, struct list_test, list )
-	     == &list_tests[5] );
-	ok ( list_last_entry ( list, struct list_test, list )
-	     == &list_tests[5] );
-	list_del ( &list_tests[5].list );
-	ok ( list_first_entry ( list, struct list_test, list ) == NULL );
-	ok ( list_last_entry ( list, struct list_test, list ) == NULL );
 
 	/* Test list_for_each() */
 	INIT_LIST_HEAD ( list );
 	list_add_tail ( &list_tests[6].list, list );
 	list_add_tail ( &list_tests[7].list, list );
 	list_add_tail ( &list_tests[3].list, list );
-	list_iterate_ok ( list_for_each, "673", raw_pos, list );
+	{
+		char *expected = "673";
+		struct list_head *pos;
+		struct list_test *entry;
+		list_for_each ( pos, list ) {
+			entry = list_entry ( pos, struct list_test, list );
+			ok ( entry->label == *(expected++) );
+		}
+	}
 
-	/* Test list_for_each_entry() and list_for_each_entry_reverse() */
-	INIT_LIST_HEAD ( list );
-	list_add_tail ( &list_tests[3].list, list );
-	list_add_tail ( &list_tests[2].list, list );
-	list_add_tail ( &list_tests[6].list, list );
-	list_add_tail ( &list_tests[9].list, list );
-	list_iterate_entry_ok ( list_for_each_entry, "3269",
-				pos, list, list );
-	list_iterate_entry_ok ( list_for_each_entry_reverse, "9623",
-				pos, list, list );
+	/* list_for_each_entry() and list_for_each_entry_reverse() are
+	 * already tested as part of list_contents_ok()
+	 */
 
 	/* Test list_for_each_entry_safe() */
 	INIT_LIST_HEAD ( list );
@@ -417,6 +367,8 @@
 	list_add_tail ( &list_tests[1].list, list );
 	{
 		char *expected = "241";
+		struct list_test *pos;
+		struct list_test *tmp;
 		list_for_each_entry_safe ( pos, tmp, list, list ) {
 			list_contents_ok ( list, expected );
 			list_del ( &pos->list );
@@ -426,34 +378,6 @@
 	}
 	ok ( list_empty ( list ) );
 
-	/* Test list_for_each_entry_continue() and
-	 * list_for_each_entry_continue_reverse()
-	 */
-	INIT_LIST_HEAD ( list );
-	list_add_tail ( &list_tests[4].list, list );
-	list_add_tail ( &list_tests[7].list, list );
-	list_add_tail ( &list_tests[2].list, list );
-	list_add_tail ( &list_tests[9].list, list );
-	list_add_tail ( &list_tests[3].list, list );
-	pos = &list_tests[7];
-	list_iterate_entry_ok ( list_for_each_entry_continue, "293",
-				pos, list, list );
-	ok ( pos == list_entry ( list, struct list_test, list ) );
-	list_iterate_entry_ok ( list_for_each_entry_continue, "47293",
-				pos, list, list );
-	pos = &list_tests[3];
-	list_iterate_entry_ok ( list_for_each_entry_continue, "",
-				pos, list, list );
-	pos = &list_tests[2];
-	list_iterate_entry_ok ( list_for_each_entry_continue_reverse, "74",
-				pos, list, list );
-	ok ( pos == list_entry ( list, struct list_test, list ) );
-	list_iterate_entry_ok ( list_for_each_entry_continue_reverse, "39274",
-				pos, list, list );
-	pos = &list_tests[4];
-	list_iterate_entry_ok ( list_for_each_entry_continue_reverse, "",
-				pos, list, list );
-
 	/* Test list_contains() and list_contains_entry() */
 	INIT_LIST_HEAD ( list );
 	INIT_LIST_HEAD ( &list_tests[3].list );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/md5_test.c ipxe-1.0.1~lliurex1505/src/tests/md5_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/md5_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/md5_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,100 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * MD5 tests
- *
- */
-
-#include <stdint.h>
-#include <ipxe/md5.h>
-#include <ipxe/test.h>
-#include "digest_test.h"
-
-/** An MD5 test vector */
-struct md5_test_vector {
-	/** Test data */
-	void *data;
-	/** Test data length */
-	size_t len;
-	/** Expected digest */
-	uint8_t digest[MD5_DIGEST_SIZE];
-};
-
-/** MD5 test vectors */
-static struct md5_test_vector md5_test_vectors[] = {
-	/* Test inputs borrowed from SHA-1 tests, with results
-	 * calculated using md5sum.
-	 */
-	{ NULL, 0,
-	  { 0xd4, 0x1d, 0x8c, 0xd9, 0x8f, 0x00, 0xb2, 0x04,
-	    0xe9, 0x80, 0x09, 0x98, 0xec, 0xf8, 0x42, 0x7e } },
-	{ "abc", 3,
-	  { 0x90, 0x01, 0x50, 0x98, 0x3c, 0xd2, 0x4f, 0xb0,
-	    0xd6, 0x96, 0x3f, 0x7d, 0x28, 0xe1, 0x7f, 0x72 } },
-	{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", 56,
-	  { 0x82, 0x15, 0xef, 0x07, 0x96, 0xa2, 0x0b, 0xca,
-	    0xaa, 0xe1, 0x16, 0xd3, 0x87, 0x6c, 0x66, 0x4a } },
-};
-
-/** MD5 test fragment lists */
-static struct digest_test_fragments md5_test_fragments[] = {
-	{ { 0, -1UL, } },
-	{ { 1, 1, 1, 1, 1, 1, 1, 1 } },
-	{ { 2, 0, 23, 4, 6, 1, 0 } },
-};
-
-/**
- * Perform MD5 self-test
- *
- */
-static void md5_test_exec ( void ) {
-	struct digest_algorithm *digest = &md5_algorithm;
-	struct md5_test_vector *test;
-	unsigned long cost;
-	unsigned int i;
-	unsigned int j;
-
-	/* Correctness test */
-	for ( i = 0 ; i < ( sizeof ( md5_test_vectors ) /
-			    sizeof ( md5_test_vectors[0] ) ) ; i++ ) {
-		test = &md5_test_vectors[i];
-		/* Test with a single pass */
-		digest_ok ( digest, NULL, test->data, test->len, test->digest );
-		/* Test with fragment lists */
-		for ( j = 0 ; j < ( sizeof ( md5_test_fragments ) /
-				    sizeof ( md5_test_fragments[0] ) ) ; j++ ){
-			digest_ok ( digest, &md5_test_fragments[j],
-				    test->data, test->len, test->digest );
-		}
-	}
-
-	/* Speed test */
-	cost = digest_cost ( digest );
-	DBG ( "MD5 required %ld cycles per byte\n", cost );
-}
-
-/** MD5 self-test */
-struct self_test md5_test __self_test = {
-	.name = "md5",
-	.exec = md5_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/memcpy_test.c ipxe-1.0.1~lliurex1505/src/tests/memcpy_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/memcpy_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/memcpy_test.c	2012-01-06 23:49:04.000000000 +0000
@@ -1,261 +1,39 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * memcpy() self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <stdlib.h>
 #include <string.h>
-#include <ipxe/test.h>
-#include <ipxe/profile.h>
 
-/* Provide global functions to allow inspection of generated code */
-
-void memcpy_0 ( void *dest, void *src ) { memcpy ( dest, src, 0 ); }
-void memcpy_1 ( void *dest, void *src ) { memcpy ( dest, src, 1 ); }
-void memcpy_2 ( void *dest, void *src ) { memcpy ( dest, src, 2 ); }
-void memcpy_3 ( void *dest, void *src ) { memcpy ( dest, src, 3 ); }
-void memcpy_4 ( void *dest, void *src ) { memcpy ( dest, src, 4 ); }
-void memcpy_5 ( void *dest, void *src ) { memcpy ( dest, src, 5 ); }
-void memcpy_6 ( void *dest, void *src ) { memcpy ( dest, src, 6 ); }
-void memcpy_7 ( void *dest, void *src ) { memcpy ( dest, src, 7 ); }
-void memcpy_8 ( void *dest, void *src ) { memcpy ( dest, src, 8 ); }
-void memcpy_9 ( void *dest, void *src ) { memcpy ( dest, src, 9 ); }
-void memcpy_10 ( void *dest, void *src ) { memcpy ( dest, src, 10 ); }
-void memcpy_11 ( void *dest, void *src ) { memcpy ( dest, src, 11 ); }
-void memcpy_12 ( void *dest, void *src ) { memcpy ( dest, src, 12 ); }
-void memcpy_13 ( void *dest, void *src ) { memcpy ( dest, src, 13 ); }
-void memcpy_14 ( void *dest, void *src ) { memcpy ( dest, src, 14 ); }
-void memcpy_15 ( void *dest, void *src ) { memcpy ( dest, src, 15 ); }
-void memcpy_16 ( void *dest, void *src ) { memcpy ( dest, src, 16 ); }
-void memcpy_17 ( void *dest, void *src ) { memcpy ( dest, src, 17 ); }
-void memcpy_18 ( void *dest, void *src ) { memcpy ( dest, src, 18 ); }
-void memcpy_19 ( void *dest, void *src ) { memcpy ( dest, src, 19 ); }
-void memcpy_20 ( void *dest, void *src ) { memcpy ( dest, src, 20 ); }
-void memcpy_21 ( void *dest, void *src ) { memcpy ( dest, src, 21 ); }
-void memcpy_22 ( void *dest, void *src ) { memcpy ( dest, src, 22 ); }
-void memcpy_23 ( void *dest, void *src ) { memcpy ( dest, src, 23 ); }
-void memcpy_24 ( void *dest, void *src ) { memcpy ( dest, src, 24 ); }
-void memcpy_25 ( void *dest, void *src ) { memcpy ( dest, src, 25 ); }
-void memcpy_26 ( void *dest, void *src ) { memcpy ( dest, src, 26 ); }
-void memcpy_27 ( void *dest, void *src ) { memcpy ( dest, src, 27 ); }
-void memcpy_28 ( void *dest, void *src ) { memcpy ( dest, src, 28 ); }
-void memcpy_29 ( void *dest, void *src ) { memcpy ( dest, src, 29 ); }
-void memcpy_30 ( void *dest, void *src ) { memcpy ( dest, src, 30 ); }
-void memcpy_31 ( void *dest, void *src ) { memcpy ( dest, src, 31 ); }
-
-/**
- * Force a call to the variable-length implementation of memcpy()
- *
- * @v dest		Destination address
- * @v src		Source address
- * @v len		Length of data
- * @ret dest		Destination address
- */
-__attribute__ (( noinline )) void * memcpy_var ( void *dest, const void *src,
-						 size_t len ) {
-	return memcpy ( dest, src, len );
-}
-
-/**
- * Perform a constant-length memcpy() test
- *
- * ...			Data to copy
- */
-#define MEMCPY_TEST_CONSTANT( ... ) do {				\
-		static const uint8_t src[] = { __VA_ARGS__ };		\
-		uint8_t dest_const[ 1 + sizeof ( src ) + 1 ];		\
-		uint8_t dest_var[ 1 + sizeof ( src ) + 1 ];		\
-									\
-		dest_const[0] = 0x33;					\
-		dest_const[ sizeof ( dest_const ) - 1 ] = 0x44;		\
-		memcpy ( ( dest_const + 1 ), src,			\
-			 ( sizeof ( dest_const ) - 2 ) );		\
-		ok ( dest_const[0] == 0x33 );				\
-		ok ( dest_const[ sizeof ( dest_const ) - 1 ] == 0x44 );	\
-		ok ( memcmp ( ( dest_const + 1 ), src,			\
-			      ( sizeof ( dest_const ) - 2 ) ) == 0 );	\
-									\
-		dest_var[0] = 0x55;					\
-		dest_var[ sizeof ( dest_var ) - 1 ] = 0x66;		\
-		memcpy_var ( ( dest_var + 1 ), src,			\
-			     ( sizeof ( dest_var ) - 2 ) );		\
-		ok ( dest_var[0] == 0x55 );				\
-		ok ( dest_var[ sizeof ( dest_var ) - 1 ] == 0x66 );	\
-		ok ( memcmp ( ( dest_var + 1 ), src,			\
-			      ( sizeof ( dest_var ) - 2 ) ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Test memcpy() speed
- *
- * @v dest_offset	Destination alignment offset
- * @v src_offset	Source alignment offset
- * @v len		Length of data to copy
- */
-static void memcpy_test_speed ( unsigned int dest_offset,
-				unsigned int src_offset, size_t len ) {
-	uint8_t *dest;
-	uint8_t *src;
-	unsigned int i;
-	unsigned long elapsed;
-
-	/* Allocate blocks */
-	dest = malloc ( len + dest_offset );
-	assert ( dest != NULL );
-	src = malloc ( len + src_offset );
-	assert ( src != NULL );
-
-	/* Generate random source data */
-	for ( i = 0 ; i < len ; i++ )
-		src[ src_offset + i ] = random();
-
-	/* Perform memcpy() */
-	simple_profile();
-	memcpy ( ( dest + dest_offset ), ( src + src_offset ), len );
-	elapsed = simple_profile();
-
-	/* Check copied data */
-	ok ( memcmp ( ( dest + dest_offset ), ( src + src_offset ),
-		      len ) == 0 );
-
-	/* Free blocks */
-	free ( dest );
-	free ( src );
-
-	DBG ( "MEMCPY copied %zd bytes (+%d => +%d) in %ld ticks\n",
-	      len, src_offset, dest_offset, elapsed );
-}
-
-/**
- * Perform memcpy() self-tests
+/*
+ * This file exists for testing the compilation of memcpy() with the
+ * various constant-length optimisations.
  *
  */
-static void memcpy_test_exec ( void ) {
-	unsigned int dest_offset;
-	unsigned int src_offset;
-
-	/* Constant-length tests */
-	MEMCPY_TEST_CONSTANT ( );
-	MEMCPY_TEST_CONSTANT ( 0x86 );
-	MEMCPY_TEST_CONSTANT ( 0x8c, 0xd3 );
-	MEMCPY_TEST_CONSTANT ( 0x4e, 0x08, 0xed );
-	MEMCPY_TEST_CONSTANT ( 0xcc, 0x61, 0x8f, 0x70 );
-	MEMCPY_TEST_CONSTANT ( 0x6d, 0x28, 0xe0, 0x9e, 0x6d );
-	MEMCPY_TEST_CONSTANT ( 0x7d, 0x13, 0x4f, 0xef, 0x17, 0xb3 );
-	MEMCPY_TEST_CONSTANT ( 0x38, 0xa7, 0xd4, 0x8d, 0x44, 0x01, 0xfd );
-	MEMCPY_TEST_CONSTANT ( 0x45, 0x9f, 0xf4, 0xf9, 0xf3, 0x0f, 0x99, 0x43 );
-	MEMCPY_TEST_CONSTANT ( 0x69, 0x8c, 0xf6, 0x12, 0x79, 0x70, 0xd8, 0x1e,
-			       0x9d );
-	MEMCPY_TEST_CONSTANT ( 0xbe, 0x53, 0xb4, 0xb7, 0xdd, 0xe6, 0x35, 0x10,
-			       0x3c, 0xe7 );
-	MEMCPY_TEST_CONSTANT ( 0xaf, 0x41, 0x8a, 0x88, 0xb1, 0x4e, 0x52, 0xd4,
-			       0xe6, 0xc3, 0x76 );
-	MEMCPY_TEST_CONSTANT ( 0xdf, 0x43, 0xe4, 0x5d, 0xad, 0x17, 0x35, 0x38,
-			       0x1a, 0x1d, 0x57, 0x58 );
-	MEMCPY_TEST_CONSTANT ( 0x20, 0x52, 0x83, 0x92, 0xb9, 0x85, 0xa4, 0x06,
-			       0x94, 0xe0, 0x3d, 0x57, 0xd4 );
-	MEMCPY_TEST_CONSTANT ( 0xf1, 0x67, 0x31, 0x9e, 0x32, 0x98, 0x27, 0xe9,
-			       0x8e, 0x62, 0xb4, 0x82, 0x7e, 0x02 );
-	MEMCPY_TEST_CONSTANT ( 0x93, 0xc1, 0x55, 0xe3, 0x60, 0xce, 0xac, 0x1e,
-			       0xae, 0x9d, 0xca, 0xec, 0x92, 0xb3, 0x38 );
-	MEMCPY_TEST_CONSTANT ( 0xb3, 0xc1, 0xfa, 0xe7, 0x8a, 0x1c, 0xe4, 0xce,
-			       0x85, 0xe6, 0x3c, 0xab, 0x1c, 0xa2, 0xaf, 0x7a );
-	MEMCPY_TEST_CONSTANT ( 0x9b, 0x6e, 0x1c, 0x48, 0x82, 0xd3, 0x6e, 0x58,
-			       0xa7, 0xb0, 0xe6, 0xea, 0x6d, 0xee, 0xc8, 0xf8,
-			       0xaf );
-	MEMCPY_TEST_CONSTANT ( 0x86, 0x6d, 0xb0, 0xf5, 0xf2, 0xc9, 0xcd, 0xfe,
-			       0xfb, 0x38, 0x67, 0xbc, 0x51, 0x9d, 0x25, 0xbc,
-			       0x09, 0x88 );
-	MEMCPY_TEST_CONSTANT ( 0x58, 0xa4, 0x96, 0x9e, 0x98, 0x36, 0xdb, 0xae,
-			       0x8a, 0x08, 0x7c, 0x64, 0xf9, 0xfb, 0x25, 0xb4,
-			       0x8e, 0xf3, 0xed );
-	MEMCPY_TEST_CONSTANT ( 0xc6, 0x3b, 0x84, 0x3c, 0x76, 0x24, 0x8e, 0x42,
-			       0x11, 0x1f, 0x09, 0x2e, 0x24, 0xbb, 0x67, 0x71,
-			       0x3a, 0xca, 0x60, 0xdd );
-	MEMCPY_TEST_CONSTANT ( 0x8e, 0x2d, 0xa9, 0x58, 0x87, 0xe2, 0xac, 0x4b,
-			       0xc8, 0xbf, 0xa2, 0x4e, 0xee, 0x3a, 0xa6, 0x71,
-			       0x76, 0xee, 0x42, 0x05, 0x6e );
-	MEMCPY_TEST_CONSTANT ( 0x8a, 0xda, 0xdf, 0x7b, 0x55, 0x41, 0x8c, 0xcd,
-			       0x42, 0x40, 0x18, 0xe2, 0x60, 0xc4, 0x7d, 0x64,
-			       0x00, 0xd5, 0xef, 0xa1, 0x7b, 0x31 );
-	MEMCPY_TEST_CONSTANT ( 0xd9, 0x25, 0xcb, 0xbb, 0x9c, 0x1d, 0xdd, 0xcd,
-			       0xde, 0x96, 0xd9, 0x74, 0x13, 0x95, 0xfe, 0x68,
-			       0x0b, 0x3d, 0x30, 0x8d, 0x0c, 0x1e, 0x6d );
-	MEMCPY_TEST_CONSTANT ( 0x2d, 0x0d, 0x02, 0x33, 0xd6, 0xbe, 0x6c, 0xa6,
-			       0x0a, 0xab, 0xe5, 0xda, 0xe2, 0xab, 0x78, 0x3c,
-			       0xd3, 0xdd, 0xea, 0xfa, 0x1a, 0xe4, 0xf4, 0xb3 );
-	MEMCPY_TEST_CONSTANT ( 0x6a, 0x34, 0x39, 0xea, 0x29, 0x5f, 0xa6, 0x18,
-			       0xc1, 0x53, 0x39, 0x78, 0xdb, 0x40, 0xf2, 0x98,
-			       0x78, 0xcf, 0xee, 0xfd, 0xcd, 0xf8, 0x56, 0xf8,
-			       0x30 );
-	MEMCPY_TEST_CONSTANT ( 0xe4, 0xe5, 0x5a, 0x8d, 0xcf, 0x04, 0x29, 0x7c,
-			       0xa7, 0xd8, 0x43, 0xbf, 0x0b, 0xbf, 0xe7, 0x68,
-			       0xf7, 0x8c, 0x81, 0xf9, 0x3f, 0xad, 0xa4, 0x40,
-			       0x38, 0x82 );
-	MEMCPY_TEST_CONSTANT ( 0x71, 0xcd, 0x3d, 0x26, 0xde, 0x11, 0x23, 0xd5,
-			       0x42, 0x6e, 0x63, 0x72, 0x53, 0xfc, 0x28, 0x06,
-			       0x4b, 0xe0, 0x2c, 0x07, 0x6b, 0xe8, 0xd9, 0x5f,
-			       0xf8, 0x74, 0xed );
-	MEMCPY_TEST_CONSTANT ( 0x05, 0xb2, 0xae, 0x81, 0x91, 0xc9, 0xa2, 0x5f,
-			       0xa9, 0x1b, 0x25, 0x7f, 0x32, 0x0c, 0x04, 0x00,
-			       0xf1, 0x46, 0xab, 0x77, 0x1e, 0x12, 0x27, 0xe7,
-			       0xf6, 0x1e, 0x0c, 0x29 );
-	MEMCPY_TEST_CONSTANT ( 0x0e, 0xca, 0xa5, 0x56, 0x3d, 0x99, 0x99, 0xf9,
-			       0x6e, 0xdd, 0x93, 0x98, 0xec, 0x8b, 0x5c, 0x71,
-			       0x0c, 0xb0, 0xe6, 0x12, 0xf2, 0x10, 0x1a, 0xbe,
-			       0x4a, 0xe0, 0xe3, 0x00, 0xf8 );
-	MEMCPY_TEST_CONSTANT ( 0x40, 0xa8, 0x28, 0x5b, 0x12, 0x0d, 0x80, 0x8e,
-			       0x8a, 0xd9, 0x92, 0x7a, 0x6e, 0x48, 0x8d, 0x14,
-			       0x4b, 0xc6, 0xce, 0x21, 0x2f, 0x0e, 0x47, 0xbd,
-			       0xf1, 0xca, 0x0e, 0x1f, 0x65, 0xc4 );
-	MEMCPY_TEST_CONSTANT ( 0x84, 0x83, 0x44, 0xe8, 0x1c, 0xbf, 0x23, 0x05,
-			       0xdf, 0xed, 0x3b, 0xb7, 0x0b, 0x4a, 0x05, 0xec,
-			       0xb7, 0x6f, 0x1c, 0xfe, 0x05, 0x05, 0x4e, 0xd1,
-			       0x50, 0x88, 0x81, 0x87, 0x68, 0xf6, 0x66 );
-	MEMCPY_TEST_CONSTANT ( 0x0d, 0x1d, 0xcf, 0x3e, 0x7c, 0xf8, 0x12, 0x1b,
-			       0x96, 0x7f, 0xff, 0x27, 0xca, 0xfe, 0xd3, 0x8b,
-			       0x10, 0xb9, 0x5d, 0x05, 0xad, 0x50, 0xed, 0x35,
-			       0x32, 0x9c, 0xe6, 0x3b, 0x73, 0xe0, 0x7d );
 
-	/* Speed tests */
-	memcpy_test_speed ( 0, 0, 64 );
-	memcpy_test_speed ( 0, 0, 128 );
-	memcpy_test_speed ( 0, 0, 256 );
-	for ( dest_offset = 0 ; dest_offset < 4 ; dest_offset++ ) {
-		for ( src_offset = 0 ; src_offset < 4 ; src_offset++ ) {
-			memcpy_test_speed ( dest_offset, src_offset, 4096 );
-		}
-	}
-}
+#define __regparm __attribute__ (( regparm(3) ))
 
-/** memcpy() self-test */
-struct self_test memcpy_test __self_test = {
-	.name = "memcpy",
-	.exec = memcpy_test_exec,
-};
+void __regparm memcpy_0 ( void *dest, void *src ) { memcpy ( dest, src, 0 ); }
+void __regparm memcpy_1 ( void *dest, void *src ) { memcpy ( dest, src, 1 ); }
+void __regparm memcpy_2 ( void *dest, void *src ) { memcpy ( dest, src, 2 ); }
+void __regparm memcpy_3 ( void *dest, void *src ) { memcpy ( dest, src, 3 ); }
+void __regparm memcpy_4 ( void *dest, void *src ) { memcpy ( dest, src, 4 ); }
+void __regparm memcpy_5 ( void *dest, void *src ) { memcpy ( dest, src, 5 ); }
+void __regparm memcpy_6 ( void *dest, void *src ) { memcpy ( dest, src, 6 ); }
+void __regparm memcpy_7 ( void *dest, void *src ) { memcpy ( dest, src, 7 ); }
+void __regparm memcpy_8 ( void *dest, void *src ) { memcpy ( dest, src, 8 ); }
+void __regparm memcpy_9 ( void *dest, void *src ) { memcpy ( dest, src, 9 ); }
+void __regparm memcpy_10 ( void *dest, void *src ) { memcpy ( dest, src, 10 ); }
+void __regparm memcpy_11 ( void *dest, void *src ) { memcpy ( dest, src, 11 ); }
+void __regparm memcpy_12 ( void *dest, void *src ) { memcpy ( dest, src, 12 ); }
+void __regparm memcpy_13 ( void *dest, void *src ) { memcpy ( dest, src, 13 ); }
+void __regparm memcpy_14 ( void *dest, void *src ) { memcpy ( dest, src, 14 ); }
+void __regparm memcpy_15 ( void *dest, void *src ) { memcpy ( dest, src, 15 ); }
+void __regparm memcpy_16 ( void *dest, void *src ) { memcpy ( dest, src, 16 ); }
+void __regparm memcpy_17 ( void *dest, void *src ) { memcpy ( dest, src, 17 ); }
+void __regparm memcpy_18 ( void *dest, void *src ) { memcpy ( dest, src, 18 ); }
+void __regparm memcpy_19 ( void *dest, void *src ) { memcpy ( dest, src, 19 ); }
+void __regparm memcpy_20 ( void *dest, void *src ) { memcpy ( dest, src, 20 ); }
+void __regparm memcpy_21 ( void *dest, void *src ) { memcpy ( dest, src, 21 ); }
+void __regparm memcpy_22 ( void *dest, void *src ) { memcpy ( dest, src, 22 ); }
+void __regparm memcpy_23 ( void *dest, void *src ) { memcpy ( dest, src, 23 ); }
+void __regparm memcpy_24 ( void *dest, void *src ) { memcpy ( dest, src, 24 ); }
+void __regparm memcpy_25 ( void *dest, void *src ) { memcpy ( dest, src, 25 ); }
+void __regparm memcpy_26 ( void *dest, void *src ) { memcpy ( dest, src, 26 ); }
+void __regparm memcpy_27 ( void *dest, void *src ) { memcpy ( dest, src, 27 ); }
+void __regparm memcpy_28 ( void *dest, void *src ) { memcpy ( dest, src, 28 ); }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/ocsp_test.c ipxe-1.0.1~lliurex1505/src/tests/ocsp_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/ocsp_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/ocsp_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,1450 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * OCSP tests
- *
- *
- * Test vectors generated using OpenSSL:
- *
- *     openssl ocsp -no_nonce -issuer issuer.crt -cert cert.crt \
- *		    -url http://ocsp.server.address \
- *		    -reqout request.der -respout response.der
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/x509.h>
-#include <ipxe/ocsp.h>
-#include <ipxe/test.h>
-
-/** An OCSP test certificate */
-struct ocsp_test_certificate {
-	/** Data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-	/** Parsed certificate */
-	struct x509_certificate *cert;
-};
-
-/** An OCSP test */
-struct ocsp_test {
-	/** Certificate */
-	struct ocsp_test_certificate *cert;
-	/** Issuing certificate */
-	struct ocsp_test_certificate *issuer;
-	/** Request */
-	const void *request;
-	/** Length of request */
-	size_t request_len;
-	/** Response */
-	const void *response;
-	/** Length of response */
-	size_t response_len;
-	/* OCSP check */
-	struct ocsp_check *ocsp;
-};
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define a test certificate */
-#define CERTIFICATE( name, DATA, FINGERPRINT )				\
-	static const uint8_t name ## _data[] = DATA;			\
-	static struct ocsp_test_certificate name = {			\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-	}
-
-/** Define an OCSP test */
-#define OCSP( name, CERT, ISSUER, REQUEST, RESPONSE )			\
-	static const uint8_t name ## _request[] = REQUEST;		\
-	static const uint8_t name ## _response[] = RESPONSE;		\
-	static struct ocsp_test name = {				\
-		.cert = CERT,						\
-		.issuer = ISSUER,					\
-		.request = name ## _request,				\
-		.request_len = sizeof ( name ## _request ),		\
-		.response = name ## _response,				\
-		.response_len = sizeof ( name ## _response ),		\
-	 }
-
-/**
- * Prepare an OCSP test
- *
- * @v test		OCSP test
- */
-static void ocsp_prepare_test ( struct ocsp_test *test ) {
-	struct x509_certificate *cert = test->cert->cert;
-	struct x509_certificate *issuer = test->issuer->cert;
-
-	/* Invalidate certificate being checked */
-	x509_invalidate ( cert );
-
-	/* Force-validate issuer certificate */
-	issuer->valid = 1;
-	issuer->path_remaining = ( issuer->extensions.basic.path_len + 1 );
-}
-
-/*
- * subject	bank.barclays.co.uk
- * issuer	VeriSign Class 3 International Server CA - G3
- */
-CERTIFICATE ( barclays_crt,
-	DATA ( 0x30, 0x82, 0x05, 0x7b, 0x30, 0x82, 0x04, 0x63, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x10, 0x49, 0x83, 0xfc, 0x05, 0x76,
-	       0xdf, 0x36, 0x91, 0x7c, 0x64, 0x2a, 0x27, 0xc1, 0xf1, 0x48,
-	       0xe3, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x81, 0xbc, 0x31,
-	       0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02,
-	       0x55, 0x53, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04,
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-	       0x00, 0x99, 0x4c, 0x2e, 0x00, 0xa0, 0xaf, 0xe2, 0xbc, 0x52,
-	       0x43, 0x83, 0x34, 0x03, 0x58, 0xdf, 0xd3, 0xea, 0x43, 0xa2,
-	       0xfd, 0x2c, 0x4c, 0x3c, 0x32, 0x9c, 0x60, 0x40, 0xe5, 0xa1,
-	       0x07, 0x8d, 0x32, 0x21, 0xc1, 0xbd, 0xf1, 0x04, 0x2e, 0x90,
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-	       0x8f, 0x50, 0xd1, 0xa9, 0x13, 0x57, 0x3a, 0x05, 0x5a, 0xd7,
-	       0x7f, 0xfc, 0xc5, 0xc6, 0x66, 0xec, 0xa4, 0x03, 0xec, 0x97,
-	       0x1a, 0x4b, 0x28, 0xf9, 0xc9, 0xf4, 0xea, 0xc6, 0x89, 0x68,
-	       0xc1, 0x42, 0xcd, 0x80, 0xfc, 0xeb, 0x86, 0x6d, 0x1c, 0xd6,
-	       0xa1, 0x05, 0x16, 0xa4, 0xcf, 0x82, 0x1d, 0x07, 0x67, 0x7c,
-	       0xeb, 0xa1, 0x69, 0xf3, 0xf2, 0x21, 0xa7, 0x79, 0xf5, 0xf2,
-	       0xdc, 0xb6, 0x0b, 0x6e, 0x19, 0xcc, 0x50, 0x53, 0xf3, 0xbd,
-	       0xb9, 0x71, 0xdc, 0x2b, 0x15, 0x78, 0x6d, 0xd4, 0xd3, 0x82,
-	       0xce, 0x37, 0x0c, 0xb5, 0x5e, 0x24, 0x8d, 0x80, 0x40, 0x71,
-	       0x4e, 0x7b, 0x0a, 0x6e, 0x30, 0x4b, 0xb6, 0x2c, 0x23, 0x9e,
-	       0xd5, 0x08, 0x7d, 0x8a, 0x72, 0x46, 0xf6, 0x52, 0x98, 0xcb,
-	       0x03, 0x79, 0x61, 0xfe, 0xc1, 0x97, 0x15, 0x4b, 0x05, 0x36,
-	       0x0c, 0x11, 0xe9, 0x95, 0x4b, 0xef, 0xf3, 0x2d, 0xf3, 0xef,
-	       0x33, 0x6c, 0xc6, 0x98, 0xb9, 0x65, 0xe3, 0x3c, 0x26, 0x86,
-	       0xb5, 0x87, 0x9e, 0x20, 0x92, 0x7b, 0x8f, 0x13, 0x66, 0x5e,
-	       0x26, 0x09, 0xd6, 0x83, 0xee, 0x56, 0x72, 0x08, 0x6c, 0x2a,
-	       0x4c, 0xf2, 0x5b, 0xf1, 0x08, 0x4b, 0x91, 0x9e, 0x67, 0x37,
-	       0x2f, 0xc5, 0xcf, 0x1a, 0xa8, 0xa1, 0x1c, 0xb6, 0x2d, 0xd0,
-	       0x81, 0xf4, 0xf7, 0x37, 0xb9, 0xa3, 0x37, 0x3f, 0x6b, 0x2f,
-	       0x62, 0x82, 0xa7, 0x17, 0xc1, 0x8c, 0x69, 0x02, 0x03, 0x01,
-	       0x00, 0x01, 0xa3, 0x82, 0x01, 0xb3, 0x30, 0x82, 0x01, 0xaf,
-	       0x30, 0x09, 0x06, 0x03, 0x55, 0x1d, 0x13, 0x04, 0x02, 0x30,
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-	       0x87, 0x75, 0x85, 0xcc, 0x55, 0x7c, 0x62, 0x97, 0x97, 0x04,
-	       0xbd, 0xc2, 0x22, 0xfc, 0xf5, 0x2c, 0x75, 0xdc, 0x25, 0x6d,
-	       0xed, 0xcd, 0x22, 0x2e, 0xa4, 0xcd, 0x88, 0x95, 0xe8, 0x52,
-	       0x45, 0x7a, 0xa0, 0x85, 0xcc, 0x6d, 0x1c, 0xcb, 0xd8, 0xc3,
-	       0x26, 0x2c, 0xee, 0xb5, 0xe1, 0x38, 0x3f, 0xb6, 0x96, 0x10,
-	       0xa3, 0xb3, 0x1e, 0x2d, 0xdc, 0xe8, 0x07, 0x2f, 0xc2, 0xb7,
-	       0x50, 0xd5, 0x60, 0x73, 0x0d, 0x43, 0xb1, 0xaf, 0xd9, 0xcb,
-	       0x39, 0x00, 0xc7, 0x00, 0xb3, 0x1f, 0xa4, 0xaf, 0xf8, 0xed,
-	       0x9b, 0x6a, 0x7a, 0x10, 0xcc, 0x81, 0x92, 0xc2, 0x58, 0x7e,
-	       0x42, 0xe4, 0xbf, 0xcf, 0x8c, 0x91, 0x7f, 0xde, 0xe6, 0xac,
-	       0x37, 0x31, 0x58, 0x90, 0xee, 0x51, 0xf5, 0x0e, 0xe5, 0x84,
-	       0xd8, 0x51, 0x89, 0x50, 0xfe, 0xfa, 0xad, 0xc9, 0xbb, 0x19,
-	       0xb3, 0x4a, 0xc8, 0x6b, 0x26, 0x98, 0x4b, 0x63, 0x41, 0x81,
-	       0xe1, 0x12, 0xab, 0xcc, 0x89, 0xbe, 0xdf, 0xa8, 0x7e, 0xf5,
-	       0x0e, 0x07, 0xf6, 0x92, 0x89, 0x64, 0x3b, 0xc2, 0x64, 0xa2,
-	       0x4b, 0xd1, 0x6b, 0x9b, 0x4e, 0x6a, 0xf2, 0x63, 0xf7, 0xc3,
-	       0xe0, 0x9f, 0xc5, 0x4e, 0xb6, 0x77, 0x0a, 0xad, 0x6d, 0x0f,
-	       0x30, 0x87, 0x6b, 0xfb, 0x66, 0xb3, 0x90, 0x87, 0xa3, 0x48,
-	       0xbe, 0xa4, 0x34, 0x9c, 0x5a, 0x93, 0xa3, 0x74, 0x0e, 0x36,
-	       0x8e, 0xf6, 0x3b, 0x6c, 0xae, 0xa0, 0x6a, 0xa1, 0x1a, 0x12,
-	       0x78, 0x99, 0x75, 0x50, 0xb1, 0x72, 0xed, 0x22, 0x34, 0x0f,
-	       0xe1, 0x89, 0xfe, 0x81, 0x0a, 0xcc, 0x2a, 0xd0, 0xf3, 0x25,
-	       0xe6, 0xd9, 0x19, 0x06, 0x20, 0x2d, 0x29, 0x8b, 0xdd, 0xb5,
-	       0x60, 0xf4, 0x0d, 0x08, 0x97, 0x7b, 0x81, 0x4a, 0xfb, 0x20,
-	       0xfb, 0x83, 0xa3, 0xc8, 0x1d, 0x79, 0xb9 ),
-	FINGERPRINT ( 0x7e, 0x54, 0x41, 0x60, 0x21, 0xca, 0x3e, 0x63,
-		      0xce, 0x5a, 0x41, 0x6c, 0xbe, 0x52, 0x01, 0x88,
-		      0xcf, 0x41, 0x36, 0x48, 0xdb, 0xe3, 0xdf, 0x8e,
-		      0x79, 0x73, 0x5f, 0xcf, 0x8e, 0x8e, 0xac, 0xd8 ) );
-
-/*
- * subject	www.google.com
- * issuer	Thawte SGC CA
- */
-CERTIFICATE ( google_crt,
-	DATA ( 0x30, 0x82, 0x03, 0x21, 0x30, 0x82, 0x02, 0x8a, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x10, 0x4f, 0x9d, 0x96, 0xd9, 0x66,
-	       0xb0, 0x99, 0x2b, 0x54, 0xc2, 0x95, 0x7c, 0xb4, 0x15, 0x7d,
-	       0x4d, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x4c, 0x31, 0x0b,
-	       0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02, 0x5a,
-	       0x41, 0x31, 0x25, 0x30, 0x23, 0x06, 0x03, 0x55, 0x04, 0x0a,
-	       0x13, 0x1c, 0x54, 0x68, 0x61, 0x77, 0x74, 0x65, 0x20, 0x43,
-	       0x6f, 0x6e, 0x73, 0x75, 0x6c, 0x74, 0x69, 0x6e, 0x67, 0x20,
-	       0x28, 0x50, 0x74, 0x79, 0x29, 0x20, 0x4c, 0x74, 0x64, 0x2e,
-	       0x31, 0x16, 0x30, 0x14, 0x06, 0x03, 0x55, 0x04, 0x03, 0x13,
-	       0x0d, 0x54, 0x68, 0x61, 0x77, 0x74, 0x65, 0x20, 0x53, 0x47,
-	       0x43, 0x20, 0x43, 0x41, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x31,
-	       0x31, 0x30, 0x32, 0x36, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
-	       0x5a, 0x17, 0x0d, 0x31, 0x33, 0x30, 0x39, 0x33, 0x30, 0x32,
-	       0x33, 0x35, 0x39, 0x35, 0x39, 0x5a, 0x30, 0x68, 0x31, 0x0b,
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-	FINGERPRINT ( 0xec, 0x6a, 0x6b, 0x15, 0x6b, 0x30, 0x62, 0xfa,
-		      0x99, 0x49, 0x9d, 0x1e, 0x15, 0x15, 0xcf, 0x6c,
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-
-/*
- * subject	VeriSign Class 3 International Server CA - G3
- * issuer	VeriSign Class 3 Public Primary Certification Authority - G5
- */
-CERTIFICATE ( verisign_crt,
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-	       0x04, 0x14, 0xd7, 0x9b, 0x7c, 0xd8, 0x22, 0xa0, 0x15, 0xf7,
-	       0xdd, 0xad, 0x5f, 0xce, 0x29, 0x9b, 0x58, 0xc3, 0xbc, 0x46,
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-	       0x02, 0xaf, 0x33, 0x31, 0x33, 0x30, 0x0d, 0x06, 0x09, 0x2a,
-	       0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00,
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-	       0xa5, 0x49, 0x50, 0x02, 0x4f, 0xf8, 0x2f, 0x17, 0x70, 0xf2,
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-	       0x3c, 0xd4, 0x46, 0x78, 0xae, 0x5d, 0x78, 0x6f, 0xd1, 0xba,
-	       0x5a, 0xbc, 0x10, 0xab, 0x58, 0x36, 0xc5, 0x8c, 0x62, 0x15,
-	       0x45, 0x60, 0x17, 0x21, 0xe2, 0xd5, 0x42, 0xa8, 0x77, 0xa1,
-	       0x55, 0xd8, 0x43, 0x04, 0x51, 0xf6, 0x6e, 0xba, 0x48, 0xe6,
-	       0x5d, 0x4c, 0xb7, 0x44, 0xd3, 0x3e, 0xa4, 0xd5, 0xd6, 0x33,
-	       0x9a, 0x9f, 0x0d, 0xe6, 0xd7, 0x4e, 0x96, 0x44, 0x95, 0x5a,
-	       0x6c, 0xd6, 0xa3, 0x16, 0x53, 0x0e, 0x98, 0x43, 0xce, 0xa4,
-	       0xb8, 0xc3, 0x66, 0x7a, 0x05, 0x5c, 0x62, 0x10, 0xe8, 0x1b,
-	       0x12, 0xdb, 0x7d, 0x2e, 0x76, 0x50, 0xff, 0xdf, 0xd7, 0x6b,
-	       0x1b, 0xcc, 0x8a, 0xcc, 0x71, 0xfa, 0xb3, 0x40, 0x56, 0x7c,
-	       0x33, 0x7a, 0x77, 0x94, 0x5b, 0xf5, 0x0b, 0x53, 0xfb, 0x0e,
-	       0x5f, 0xbc, 0x68, 0xfb, 0xaf, 0x2a, 0xee, 0x30, 0x37, 0x79,
-	       0x16, 0x93, 0x25, 0x7f, 0x4d, 0x10, 0xff, 0x57, 0xfb, 0xbf,
-	       0x6e, 0x3b, 0x33, 0x21, 0xde, 0x79, 0xdc, 0x86, 0x17, 0x59,
-	       0x2d, 0x43, 0x64, 0xb7, 0xa6, 0x66, 0x87, 0xea, 0xbc, 0x96,
-	       0x46, 0x19, 0x1a, 0x86, 0x8b, 0x6f, 0xd7, 0xb7, 0x49, 0x00,
-	       0x5b, 0xdb, 0xa3, 0xbf, 0x29, 0x9a, 0xee, 0xf7, 0xd3, 0x33,
-	       0xae, 0xa3, 0xf4, 0x9e, 0x4c, 0xca, 0x5e, 0x69, 0xd4, 0x1b,
-	       0xad, 0xb7, 0x90, 0x77, 0x6a, 0xd8, 0x59, 0x6f, 0x79, 0xab,
-	       0x01, 0xfa, 0x55, 0xf0, 0x8a, 0x21, 0x66, 0xe5, 0x65, 0x6e,
-	       0xfd, 0x7c, 0xd3, 0xdf, 0x1e, 0xeb, 0x7e, 0x3f, 0x06, 0x90,
-	       0xfb, 0x19, 0x0b, 0xd3, 0x06, 0x02, 0x1b, 0x78, 0x43, 0x99,
-	       0xa8 ),
-	FINGERPRINT ( 0x6e, 0x21, 0x87, 0x6c, 0xf1, 0x63, 0x47, 0x20,
-		      0x1f, 0x63, 0x7a, 0x17, 0x8c, 0xb4, 0x2b, 0x17,
-		      0x1d, 0x52, 0x37, 0x9a, 0xf7, 0xe5, 0xf5, 0xb6,
-		      0xf6, 0x75, 0x5b, 0x3e, 0xe9, 0xbb, 0x2e, 0xd4 ) );
-
-/*
- * subject	Thawte SGC CA
-issuer= /C=US/O=VeriSign, Inc./OU=Class 3 Public Primary Certification Authority
- */
-CERTIFICATE ( thawte_crt,
-	DATA ( 0x30, 0x82, 0x03, 0x23, 0x30, 0x82, 0x02, 0x8c, 0xa0, 0x03,
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-	       0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x55,
-	       0xac, 0x63, 0xea, 0xde, 0xa1, 0xdd, 0xd2, 0x90, 0x5f, 0x9f,
-	       0x0b, 0xce, 0x76, 0xbe, 0x13, 0x51, 0x8f, 0x93, 0xd9, 0x05,
-	       0x2b, 0xc8, 0x1b, 0x77, 0x4b, 0xad, 0x69, 0x50, 0xa1, 0xee,
-	       0xde, 0xdc, 0xfd, 0xdb, 0x07, 0xe9, 0xe8, 0x39, 0x94, 0xdc,
-	       0xab, 0x72, 0x79, 0x2f, 0x06, 0xbf, 0xab, 0x81, 0x70, 0xc4,
-	       0xa8, 0xed, 0xea, 0x53, 0x34, 0xed, 0xef, 0x1e, 0x53, 0xd9,
-	       0x06, 0xc7, 0x56, 0x2b, 0xd1, 0x5c, 0xf4, 0xd1, 0x8a, 0x8e,
-	       0xb4, 0x2b, 0xb1, 0x37, 0x90, 0x48, 0x08, 0x42, 0x25, 0xc5,
-	       0x3e, 0x8a, 0xcb, 0x7f, 0xeb, 0x6f, 0x04, 0xd1, 0x6d, 0xc5,
-	       0x74, 0xa2, 0xf7, 0xa2, 0x7c, 0x7b, 0x60, 0x3c, 0x77, 0xcd,
-	       0x0e, 0xce, 0x48, 0x02, 0x7f, 0x01, 0x2f, 0xb6, 0x9b, 0x37,
-	       0xe0, 0x2a, 0x2a, 0x36, 0xdc, 0xd5, 0x85, 0xd6, 0xac, 0xe5,
-	       0x3f, 0x54, 0x6f, 0x96, 0x1e, 0x05, 0xaf ),
-	FINGERPRINT ( 0x10, 0x85, 0xa6, 0xf4, 0x54, 0xd0, 0xc9, 0x11,
-		      0x98, 0xfd, 0xda, 0xb1, 0x1a, 0x31, 0xc7, 0x16,
-		      0xd5, 0xdc, 0xd6, 0x8d, 0xf9, 0x1c, 0x03, 0x9c,
-		      0xe1, 0x8d, 0xca, 0x9b, 0xeb, 0x3c, 0xde, 0x3d ) );
-
-/*
- * subject	StartCom Class 2 Primary Intermediate Server CA
- * issuer	StartCom Certification Authority
- */
-CERTIFICATE ( startssl_crt,
-	DATA ( 0x30, 0x82, 0x07, 0xe3, 0x30, 0x82, 0x05, 0xcb, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x01, 0x0b, 0x30, 0x0d, 0x06, 0x09,
-	       0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05,
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-	       0xae, 0xf5, 0xa5, 0x96, 0xe7, 0xf6, 0xba, 0x6c, 0x89, 0x9f,
-	       0x0e, 0x72, 0xec, 0xfb, 0x45, 0x00, 0x87, 0x8f, 0x2c, 0xe7,
-	       0x7f, 0xb2, 0xc5, 0xa5, 0x52, 0xbe, 0x03, 0xfa, 0x31, 0x2a,
-	       0x02, 0x6a, 0xf8 ),
-	FINGERPRINT ( 0x9f, 0xd1, 0x93, 0xd3, 0x8f, 0x95, 0x30, 0xab,
-		      0x55, 0xa5, 0xc1, 0xb3, 0x51, 0x4a, 0x1d, 0x64,
-		      0x1c, 0xec, 0xc2, 0x1c, 0xc5, 0xc2, 0xf5, 0x67,
-		      0x48, 0xa7, 0x11, 0x01, 0x69, 0x83, 0xfd, 0x8e ) );
-
-OCSP ( barclays_ocsp, &barclays_crt, &verisign_crt,
-	DATA ( 0x30, 0x51, 0x30, 0x4f, 0x30, 0x4d, 0x30, 0x4b, 0x30, 0x49,
-	       0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05,
-	       0x00, 0x04, 0x14, 0xd4, 0xb4, 0x3b, 0x8e, 0x3d, 0x02, 0x49,
-	       0x1a, 0x65, 0x50, 0x6f, 0x96, 0x73, 0x14, 0xdd, 0xe8, 0x59,
-	       0x44, 0x52, 0xe4, 0x04, 0x14, 0xd7, 0x9b, 0x7c, 0xd8, 0x22,
-	       0xa0, 0x15, 0xf7, 0xdd, 0xad, 0x5f, 0xce, 0x29, 0x9b, 0x58,
-	       0xc3, 0xbc, 0x46, 0x00, 0xb5, 0x02, 0x10, 0x49, 0x83, 0xfc,
-	       0x05, 0x76, 0xdf, 0x36, 0x91, 0x7c, 0x64, 0x2a, 0x27, 0xc1,
-	       0xf1, 0x48, 0xe3 ),
-	DATA ( 0x30, 0x82, 0x06, 0x4d, 0x0a, 0x01, 0x00, 0xa0, 0x82, 0x06,
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-	       0x7f, 0x5e, 0x6d, 0x1e, 0x78, 0xb2, 0xd0, 0x39, 0x3c, 0x41,
-	       0xd7, 0xab, 0x77, 0x2a, 0x0e, 0xbb, 0xc8, 0x69, 0xae, 0xfd,
-	       0x9c, 0x20, 0x11, 0xba, 0x0a, 0x5d, 0x00, 0x58, 0xf8, 0x74,
-	       0xb0, 0x77, 0x36, 0x9b, 0x8e, 0xd5, 0x4d, 0x85, 0xb1, 0xbb,
-	       0xcd, 0xcb, 0x1d, 0xee, 0x08, 0xb9, 0x53, 0x9a, 0x5f, 0xe3,
-	       0x88, 0xb1, 0x1a, 0xc3, 0x41, 0x41, 0x3e, 0x06, 0xf7, 0x70,
-	       0x58, 0xe8, 0x22, 0x22, 0xd7, 0x0e, 0xbb, 0x88, 0xce, 0x73,
-	       0x0e, 0xd0, 0x04, 0x81, 0x50, 0xd2, 0x33 ) );
-
-OCSP ( google_ocsp, &google_crt, &thawte_crt,
-	DATA ( 0x30, 0x51, 0x30, 0x4f, 0x30, 0x4d, 0x30, 0x4b, 0x30, 0x49,
-	       0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05,
-	       0x00, 0x04, 0x14, 0x1e, 0x92, 0x09, 0xaa, 0x71, 0x3c, 0x79,
-	       0x4b, 0xca, 0x1e, 0x93, 0x1a, 0x0a, 0x61, 0xad, 0x3f, 0xd0,
-	       0xba, 0x60, 0x83, 0x04, 0x14, 0x3b, 0x34, 0x9a, 0x70, 0x91,
-	       0x73, 0xb2, 0x8a, 0x1b, 0x0c, 0xf4, 0xe9, 0x37, 0xcd, 0xb3,
-	       0x70, 0x32, 0x9e, 0x18, 0x54, 0x02, 0x10, 0x4f, 0x9d, 0x96,
-	       0xd9, 0x66, 0xb0, 0x99, 0x2b, 0x54, 0xc2, 0x95, 0x7c, 0xb4,
-	       0x15, 0x7d, 0x4d ),
-	DATA ( 0x30, 0x82, 0x04, 0x38, 0x0a, 0x01, 0x00, 0xa0, 0x82, 0x04,
-	       0x31, 0x30, 0x82, 0x04, 0x2d, 0x06, 0x09, 0x2b, 0x06, 0x01,
-	       0x05, 0x05, 0x07, 0x30, 0x01, 0x01, 0x04, 0x82, 0x04, 0x1e,
-	       0x30, 0x82, 0x04, 0x1a, 0x30, 0x81, 0xe7, 0xa0, 0x03, 0x02,
-	       0x01, 0x00, 0xa1, 0x5a, 0x30, 0x58, 0x31, 0x0b, 0x30, 0x09,
-	       0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02, 0x5a, 0x41, 0x31,
-	       0x25, 0x30, 0x23, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x13, 0x1c,
-	       0x54, 0x68, 0x61, 0x77, 0x74, 0x65, 0x20, 0x43, 0x6f, 0x6e,
-	       0x73, 0x75, 0x6c, 0x74, 0x69, 0x6e, 0x67, 0x20, 0x28, 0x50,
-	       0x74, 0x79, 0x29, 0x20, 0x4c, 0x74, 0x64, 0x2e, 0x31, 0x22,
-	       0x30, 0x20, 0x06, 0x03, 0x55, 0x04, 0x03, 0x13, 0x19, 0x54,
-	       0x68, 0x61, 0x77, 0x74, 0x65, 0x20, 0x53, 0x47, 0x43, 0x20,
-	       0x4f, 0x43, 0x53, 0x50, 0x20, 0x52, 0x65, 0x73, 0x70, 0x6f,
-	       0x6e, 0x64, 0x65, 0x72, 0x18, 0x0f, 0x32, 0x30, 0x31, 0x32,
-	       0x30, 0x35, 0x31, 0x32, 0x31, 0x39, 0x33, 0x31, 0x34, 0x33,
-	       0x5a, 0x30, 0x73, 0x30, 0x71, 0x30, 0x49, 0x30, 0x09, 0x06,
-	       0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14,
-	       0x1e, 0x92, 0x09, 0xaa, 0x71, 0x3c, 0x79, 0x4b, 0xca, 0x1e,
-	       0x93, 0x1a, 0x0a, 0x61, 0xad, 0x3f, 0xd0, 0xba, 0x60, 0x83,
-	       0x04, 0x14, 0x3b, 0x34, 0x9a, 0x70, 0x91, 0x73, 0xb2, 0x8a,
-	       0x1b, 0x0c, 0xf4, 0xe9, 0x37, 0xcd, 0xb3, 0x70, 0x32, 0x9e,
-	       0x18, 0x54, 0x02, 0x10, 0x4f, 0x9d, 0x96, 0xd9, 0x66, 0xb0,
-	       0x99, 0x2b, 0x54, 0xc2, 0x95, 0x7c, 0xb4, 0x15, 0x7d, 0x4d,
-	       0x80, 0x00, 0x18, 0x0f, 0x32, 0x30, 0x31, 0x32, 0x30, 0x35,
-	       0x31, 0x32, 0x31, 0x39, 0x33, 0x31, 0x34, 0x33, 0x5a, 0xa0,
-	       0x11, 0x18, 0x0f, 0x32, 0x30, 0x31, 0x32, 0x30, 0x35, 0x31,
-	       0x39, 0x31, 0x39, 0x33, 0x31, 0x34, 0x33, 0x5a, 0x30, 0x0d,
-	       0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01,
-	       0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x57, 0xf9, 0xf8,
-	       0x26, 0x0f, 0xda, 0x0c, 0xc2, 0xf0, 0xe4, 0x80, 0xd0, 0x29,
-	       0xd6, 0x04, 0x77, 0xab, 0x0c, 0xf6, 0x7e, 0x77, 0xc9, 0xac,
-	       0x53, 0xa4, 0x4d, 0x6b, 0x75, 0x58, 0xb9, 0xc7, 0x7a, 0x9a,
-	       0x39, 0x5d, 0x4c, 0xfd, 0x15, 0x1b, 0x47, 0x55, 0x8e, 0x39,
-	       0x05, 0x2b, 0x06, 0x2f, 0x3e, 0x1d, 0x3a, 0x7c, 0x2c, 0xf4,
-	       0x4c, 0x70, 0x6a, 0x58, 0x7a, 0x4b, 0x8f, 0x77, 0xaf, 0x9e,
-	       0xcf, 0xc6, 0xb1, 0x66, 0x8d, 0xed, 0xbf, 0xc1, 0xd9, 0xe1,
-	       0x78, 0x5a, 0x18, 0x61, 0xca, 0xa8, 0xf5, 0x2b, 0xe3, 0x9b,
-	       0x50, 0x25, 0x60, 0x7d, 0x8d, 0xd1, 0xe0, 0x76, 0xbb, 0x5c,
-	       0x7b, 0xc1, 0x5d, 0xe1, 0x27, 0x3f, 0x7f, 0x9b, 0xb3, 0xb0,
-	       0xb2, 0x79, 0x37, 0xd4, 0x53, 0x29, 0x62, 0x46, 0x8f, 0xe6,
-	       0x34, 0x9e, 0xe5, 0x6e, 0x63, 0x5d, 0xcc, 0xb3, 0xb2, 0xe2,
-	       0x73, 0x7e, 0xa6, 0xad, 0xa0, 0xa0, 0x82, 0x02, 0x99, 0x30,
-	       0x82, 0x02, 0x95, 0x30, 0x82, 0x02, 0x91, 0x30, 0x82, 0x01,
-	       0xfa, 0xa0, 0x03, 0x02, 0x01, 0x02, 0x02, 0x10, 0x67, 0x4d,
-	       0x9b, 0x61, 0x8f, 0x57, 0xcd, 0x51, 0xfb, 0x58, 0x07, 0x66,
-	       0x1d, 0x24, 0xf5, 0xa5, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86,
-	       0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30,
-	       0x4c, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06,
-	       0x13, 0x02, 0x5a, 0x41, 0x31, 0x25, 0x30, 0x23, 0x06, 0x03,
-	       0x55, 0x04, 0x0a, 0x13, 0x1c, 0x54, 0x68, 0x61, 0x77, 0x74,
-	       0x65, 0x20, 0x43, 0x6f, 0x6e, 0x73, 0x75, 0x6c, 0x74, 0x69,
-	       0x6e, 0x67, 0x20, 0x28, 0x50, 0x74, 0x79, 0x29, 0x20, 0x4c,
-	       0x74, 0x64, 0x2e, 0x31, 0x16, 0x30, 0x14, 0x06, 0x03, 0x55,
-	       0x04, 0x03, 0x13, 0x0d, 0x54, 0x68, 0x61, 0x77, 0x74, 0x65,
-	       0x20, 0x53, 0x47, 0x43, 0x20, 0x43, 0x41, 0x30, 0x1e, 0x17,
-	       0x0d, 0x31, 0x32, 0x30, 0x33, 0x30, 0x34, 0x30, 0x30, 0x30,
-	       0x30, 0x30, 0x30, 0x5a, 0x17, 0x0d, 0x31, 0x32, 0x30, 0x36,
-	       0x30, 0x32, 0x32, 0x33, 0x35, 0x39, 0x35, 0x39, 0x5a, 0x30,
-	       0x58, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06,
-	       0x13, 0x02, 0x5a, 0x41, 0x31, 0x25, 0x30, 0x23, 0x06, 0x03,
-	       0x55, 0x04, 0x0a, 0x13, 0x1c, 0x54, 0x68, 0x61, 0x77, 0x74,
-	       0x65, 0x20, 0x43, 0x6f, 0x6e, 0x73, 0x75, 0x6c, 0x74, 0x69,
-	       0x6e, 0x67, 0x20, 0x28, 0x50, 0x74, 0x79, 0x29, 0x20, 0x4c,
-	       0x74, 0x64, 0x2e, 0x31, 0x22, 0x30, 0x20, 0x06, 0x03, 0x55,
-	       0x04, 0x03, 0x13, 0x19, 0x54, 0x68, 0x61, 0x77, 0x74, 0x65,
-	       0x20, 0x53, 0x47, 0x43, 0x20, 0x4f, 0x43, 0x53, 0x50, 0x20,
-	       0x52, 0x65, 0x73, 0x70, 0x6f, 0x6e, 0x64, 0x65, 0x72, 0x30,
-	       0x81, 0x9f, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-	       0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x81, 0x8d,
-	       0x00, 0x30, 0x81, 0x89, 0x02, 0x81, 0x81, 0x00, 0xc2, 0x21,
-	       0x52, 0xe2, 0x10, 0x44, 0xe3, 0xc7, 0xe3, 0x72, 0x19, 0x01,
-	       0xa8, 0x0c, 0x5a, 0x8b, 0x63, 0x0b, 0x30, 0x4c, 0x4f, 0xa2,
-	       0xe2, 0xdf, 0x62, 0x2e, 0xdf, 0xe2, 0x77, 0xb9, 0x27, 0x3b,
-	       0x8d, 0x45, 0xe2, 0xa1, 0x21, 0x95, 0x13, 0x5a, 0xf2, 0x7d,
-	       0x58, 0x2c, 0x6d, 0x53, 0xb2, 0x42, 0x52, 0x8f, 0x8e, 0xf4,
-	       0x17, 0xc5, 0xcb, 0xfa, 0x2f, 0x2d, 0x9b, 0x02, 0xd0, 0x1a,
-	       0xf1, 0x32, 0xc5, 0xb9, 0xd3, 0x5a, 0xc0, 0xd6, 0x20, 0xb8,
-	       0x3f, 0xa3, 0x93, 0x8b, 0xe5, 0x22, 0x91, 0x1a, 0x7e, 0x7c,
-	       0x8b, 0x35, 0xeb, 0x94, 0xee, 0xe6, 0xcc, 0x58, 0xe4, 0x3c,
-	       0xcd, 0x00, 0x86, 0xaa, 0xc3, 0x2e, 0x8b, 0xb4, 0x3c, 0x29,
-	       0x11, 0x21, 0x5d, 0x71, 0x4a, 0xb6, 0x7a, 0x22, 0xa9, 0xf2,
-	       0xf8, 0x90, 0xed, 0x5c, 0x73, 0x8c, 0xe0, 0x70, 0x56, 0xde,
-	       0x70, 0xc5, 0x0d, 0x81, 0xb4, 0x5b, 0x02, 0x03, 0x01, 0x00,
-	       0x01, 0xa3, 0x68, 0x30, 0x66, 0x30, 0x09, 0x06, 0x03, 0x55,
-	       0x1d, 0x13, 0x04, 0x02, 0x30, 0x00, 0x30, 0x13, 0x06, 0x03,
-	       0x55, 0x1d, 0x25, 0x04, 0x0c, 0x30, 0x0a, 0x06, 0x08, 0x2b,
-	       0x06, 0x01, 0x05, 0x05, 0x07, 0x03, 0x09, 0x30, 0x0b, 0x06,
-	       0x03, 0x55, 0x1d, 0x0f, 0x04, 0x04, 0x03, 0x02, 0x07, 0x80,
-	       0x30, 0x0f, 0x06, 0x09, 0x2b, 0x06, 0x01, 0x05, 0x05, 0x07,
-	       0x30, 0x01, 0x05, 0x04, 0x02, 0x05, 0x00, 0x30, 0x26, 0x06,
-	       0x03, 0x55, 0x1d, 0x11, 0x04, 0x1f, 0x30, 0x1d, 0xa4, 0x1b,
-	       0x30, 0x19, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04,
-	       0x03, 0x13, 0x0e, 0x4f, 0x43, 0x53, 0x50, 0x38, 0x2d, 0x54,
-	       0x47, 0x56, 0x37, 0x2d, 0x32, 0x37, 0x35, 0x30, 0x0d, 0x06,
-	       0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05,
-	       0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x98, 0x50, 0x14, 0xbe,
-	       0x31, 0x44, 0x01, 0x97, 0xee, 0x21, 0xf9, 0xcf, 0xa4, 0x32,
-	       0xc2, 0x91, 0x6a, 0x4b, 0x02, 0x61, 0x62, 0xa9, 0xe4, 0xad,
-	       0x8a, 0xac, 0xe4, 0x12, 0x12, 0xbe, 0x9b, 0xba, 0x4c, 0xe2,
-	       0x92, 0xdb, 0x8b, 0x92, 0x11, 0xe6, 0x9e, 0x25, 0x2e, 0xd5,
-	       0x4b, 0xe8, 0x5d, 0xc8, 0x63, 0xd2, 0xff, 0xfa, 0x80, 0x89,
-	       0x83, 0x0f, 0xe4, 0xe2, 0x91, 0xcc, 0x0a, 0x85, 0x74, 0x38,
-	       0xb7, 0xdf, 0xb9, 0x1c, 0xf6, 0x35, 0xfe, 0x6f, 0xf3, 0x29,
-	       0xc0, 0xc5, 0x0a, 0x2c, 0x04, 0xd7, 0x69, 0xff, 0x02, 0x45,
-	       0x1c, 0x29, 0x7a, 0x27, 0xf8, 0xb2, 0xe3, 0x58, 0x09, 0x34,
-	       0xc4, 0xd7, 0x77, 0x74, 0xbd, 0xe4, 0x7c, 0xda, 0x99, 0x09,
-	       0x83, 0x03, 0x6c, 0x36, 0x0d, 0xb2, 0x91, 0x71, 0x40, 0xc7,
-	       0x97, 0x85, 0xfb, 0x2a, 0xa3, 0x92, 0x65, 0x0b, 0x02, 0x58,
-	       0x14, 0x89, 0x8f, 0x3b ) );
-
-OCSP ( unauthorized_ocsp, &barclays_crt, &thawte_crt,
-	DATA ( 0x30, 0x51, 0x30, 0x4f, 0x30, 0x4d, 0x30, 0x4b, 0x30, 0x49,
-	       0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05,
-	       0x00, 0x04, 0x14, 0xd4, 0xb4, 0x3b, 0x8e, 0x3d, 0x02, 0x49,
-	       0x1a, 0x65, 0x50, 0x6f, 0x96, 0x73, 0x14, 0xdd, 0xe8, 0x59,
-	       0x44, 0x52, 0xe4, 0x04, 0x14, 0x3b, 0x34, 0x9a, 0x70, 0x91,
-	       0x73, 0xb2, 0x8a, 0x1b, 0x0c, 0xf4, 0xe9, 0x37, 0xcd, 0xb3,
-	       0x70, 0x32, 0x9e, 0x18, 0x54, 0x02, 0x10, 0x49, 0x83, 0xfc,
-	       0x05, 0x76, 0xdf, 0x36, 0x91, 0x7c, 0x64, 0x2a, 0x27, 0xc1,
-	       0xf1, 0x48, 0xe3 ),
-	DATA ( 0x30, 0x03, 0x0a, 0x01, 0x06 ) );
-
-OCSP ( unknown_ocsp, &thawte_crt, &startssl_crt,
-	DATA ( 0x30, 0x45, 0x30, 0x43, 0x30, 0x41, 0x30, 0x3f, 0x30, 0x3d,
-	       0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e, 0x03, 0x02, 0x1a, 0x05,
-	       0x00, 0x04, 0x14, 0x48, 0xb7, 0x64, 0x49, 0xf3, 0xd5, 0xfe,
-	       0xfa, 0x11, 0x33, 0xaa, 0x80, 0x5e, 0x42, 0x0f, 0x0f, 0xca,
-	       0x64, 0x36, 0x51, 0x04, 0x14, 0x11, 0xdb, 0x23, 0x45, 0xfd,
-	       0x54, 0xcc, 0x6a, 0x71, 0x6f, 0x84, 0x8a, 0x03, 0xd7, 0xbe,
-	       0xf7, 0x01, 0x2f, 0x26, 0x86, 0x02, 0x04, 0x30, 0x00, 0x00,
-	       0x02 ),
-	DATA ( 0x30, 0x82, 0x06, 0x46, 0x0a, 0x01, 0x00, 0xa0, 0x82, 0x06,
-	       0x3f, 0x30, 0x82, 0x06, 0x3b, 0x06, 0x09, 0x2b, 0x06, 0x01,
-	       0x05, 0x05, 0x07, 0x30, 0x01, 0x01, 0x04, 0x82, 0x06, 0x2c,
-	       0x30, 0x82, 0x06, 0x28, 0x30, 0x81, 0xec, 0xa1, 0x70, 0x30,
-	       0x6e, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06,
-	       0x13, 0x02, 0x49, 0x4c, 0x31, 0x31, 0x30, 0x2f, 0x06, 0x03,
-	       0x55, 0x04, 0x0a, 0x13, 0x28, 0x53, 0x74, 0x61, 0x72, 0x74,
-	       0x43, 0x6f, 0x6d, 0x20, 0x4c, 0x74, 0x64, 0x2e, 0x20, 0x28,
-	       0x53, 0x74, 0x61, 0x72, 0x74, 0x20, 0x43, 0x6f, 0x6d, 0x6d,
-	       0x65, 0x72, 0x63, 0x69, 0x61, 0x6c, 0x20, 0x4c, 0x69, 0x6d,
-	       0x69, 0x74, 0x65, 0x64, 0x29, 0x31, 0x2c, 0x30, 0x2a, 0x06,
-	       0x03, 0x55, 0x04, 0x03, 0x13, 0x23, 0x53, 0x74, 0x61, 0x72,
-	       0x74, 0x43, 0x6f, 0x6d, 0x20, 0x43, 0x6c, 0x61, 0x73, 0x73,
-	       0x20, 0x32, 0x20, 0x53, 0x65, 0x72, 0x76, 0x65, 0x72, 0x20,
-	       0x4f, 0x43, 0x53, 0x50, 0x20, 0x53, 0x69, 0x67, 0x6e, 0x65,
-	       0x72, 0x18, 0x0f, 0x32, 0x30, 0x31, 0x32, 0x30, 0x35, 0x31,
-	       0x35, 0x31, 0x31, 0x35, 0x34, 0x30, 0x38, 0x5a, 0x30, 0x67,
-	       0x30, 0x65, 0x30, 0x3d, 0x30, 0x09, 0x06, 0x05, 0x2b, 0x0e,
-	       0x03, 0x02, 0x1a, 0x05, 0x00, 0x04, 0x14, 0x48, 0xb7, 0x64,
-	       0x49, 0xf3, 0xd5, 0xfe, 0xfa, 0x11, 0x33, 0xaa, 0x80, 0x5e,
-	       0x42, 0x0f, 0x0f, 0xca, 0x64, 0x36, 0x51, 0x04, 0x14, 0x11,
-	       0xdb, 0x23, 0x45, 0xfd, 0x54, 0xcc, 0x6a, 0x71, 0x6f, 0x84,
-	       0x8a, 0x03, 0xd7, 0xbe, 0xf7, 0x01, 0x2f, 0x26, 0x86, 0x02,
-	       0x04, 0x30, 0x00, 0x00, 0x02, 0x82, 0x00, 0x18, 0x0f, 0x32,
-	       0x30, 0x31, 0x32, 0x30, 0x35, 0x31, 0x35, 0x31, 0x31, 0x35,
-	       0x34, 0x30, 0x38, 0x5a, 0xa0, 0x11, 0x18, 0x0f, 0x32, 0x30,
-	       0x31, 0x32, 0x30, 0x35, 0x31, 0x36, 0x31, 0x31, 0x35, 0x34,
-	       0x30, 0x38, 0x5a, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48,
-	       0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x82,
-	       0x01, 0x01, 0x00, 0xbe, 0x1b, 0xa7, 0xa7, 0xba, 0x17, 0xd9,
-	       0x94, 0x16, 0xdf, 0xd2, 0x86, 0x1e, 0x39, 0x38, 0x2f, 0x0e,
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-	       0xce, 0xb3, 0xc3, 0x14, 0x27, 0xa6, 0x16, 0xff, 0xd0, 0x70,
-	       0x9e, 0xe1, 0x9d, 0x4b, 0xd1, 0x26, 0x6c, 0x61, 0x25, 0xf1,
-	       0x39, 0x9c, 0xbe, 0x69, 0x75, 0x58, 0xcd, 0xbd, 0x8e, 0x36,
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-	       0x3a, 0x86, 0xce, 0x03, 0x76, 0x1f, 0xdb, 0x0b, 0x12, 0xac,
-	       0x99, 0x79, 0x53, 0xf0, 0x3d, 0x70, 0xd3, 0x5a, 0x05, 0xf6,
-	       0xba, 0x6e, 0x35, 0x31, 0x1e, 0x08, 0x30, 0xc1, 0xa4, 0xd4,
-	       0x45, 0x43, 0x5a, 0x01, 0xd9, 0x3d, 0xa5, 0xdb, 0xd2, 0xd7,
-	       0x73, 0x97, 0xe9, 0xab, 0xe4, 0x60, 0xf1, 0xfc, 0xf0, 0x9b,
-	       0xe2, 0x5a, 0x1e, 0x31, 0xe0, 0x1b, 0x47, 0x3f, 0x5a, 0x78,
-	       0xf3, 0x6e, 0xf0, 0x94, 0x6c, 0x2c, 0xfb, 0x67, 0x6e, 0xcb,
-	       0x8c, 0xb6, 0x8d, 0xcc, 0xcf, 0x1e, 0x9f, 0xd2, 0x10, 0x52,
-	       0xc2, 0xe7, 0xc8, 0x05, 0x2c, 0xa0, 0x18, 0xf5, 0x53, 0x4a,
-	       0xd2, 0xb0, 0x57, 0x5e, 0x5f, 0x63, 0xd7, 0x7b, 0x8e, 0xfa,
-	       0x22, 0xa0, 0x69, 0x17, 0xd2, 0xa0, 0xc7, 0x70, 0x01, 0x79,
-	       0x8b, 0x69, 0x1f, 0x0f, 0xdb, 0xe5, 0xf9, 0x83, 0x2b, 0x26,
-	       0x05, 0x05, 0x87, 0x80, 0x0d, 0xf9, 0x20, 0x0e, 0x16, 0x39,
-	       0xc5, 0x9b, 0x14, 0x2e, 0xf2, 0x06, 0x57, 0x46, 0x3d, 0x0b,
-	       0x8c, 0x3e, 0xb4, 0x66, 0x76, 0x67, 0x34, 0x70, 0x00, 0x63,
-	       0xcf, 0x9e, 0xc8, 0xc5, 0x5f, 0x48, 0x06, 0x53, 0x26, 0x55 ) );
-
-/** Time at which OCSP responses are valid */
-static time_t test_time = 1337062083ULL; /* Tue 15 May 2012 06:08:03 */
-
-/** Time at which OCSP responses are not valid */
-static time_t test_stale = 1375573111ULL; /* Sat Aug  3 23:38:31 2013 */
-
-/**
- * Report certificate parsing test result
- *
- * @v crt		Test certificate
- */
-#define ocsp_certificate_ok( crt ) do {					\
-	ok ( x509_certificate ( (crt)->data, (crt)->len,		\
-				&(crt)->cert ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report OCSP check creation test result
- *
- * @v test		OCSP test
- */
-#define ocsp_check_ok( test ) do {					\
-	ocsp_prepare_test ( (test) );					\
-	ok ( ocsp_check ( (test)->cert->cert, (test)->issuer->cert,	\
-			  &(test)->ocsp ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report OCSP request construction test result
- *
- * @v test		OCSP test
- */
-#define ocsp_request_ok( test ) do {					\
-	DBGC ( (test), "OCSPTEST %p expected request:\n", (test) );	\
-	DBGC_HDA ( (test), 0, (test)->request, (test)->request_len );	\
-	ok ( (test)->ocsp->request.builder.len == (test)->request_len );\
-	ok ( memcmp ( (test)->ocsp->request.builder.data,		\
-		      (test)->request, (test)->request_len ) == 0 );	\
-	DBGC ( (test), "OCSPTEST %p generated request:\n", (test) );	\
-	DBGC_HDA ( (test), 0, (test)->ocsp->request.builder.data,	\
-		   (test)->ocsp->request.builder.len );			\
-	} while ( 0 )
-
-/**
- * Report OCSP response test result
- *
- * @v test		OCSP test
- */
-#define ocsp_response_ok( test ) do {					\
-	ok ( ocsp_response ( (test)->ocsp, (test)->response,		\
-			     (test)->response_len ) == 0 );		\
-	} while ( 0 )
-
-/**
- * Report OCSP response failure test result
- *
- * @v test		OCSP test
- */
-#define ocsp_response_fail_ok( test ) do {				\
-	ok ( ocsp_response ( (test)->ocsp, (test)->response,		\
-			     (test)->response_len ) != 0 );		\
-	} while ( 0 )
-
-/**
- * Report OCSP validation test result
- *
- * @v test		OCSP test
- * @v time		Test time
- */
-#define ocsp_validate_ok( test, time ) do {				\
-	ocsp_prepare_test ( (test) );					\
-	ok ( ocsp_validate ( (test)->ocsp, time ) == 0 );		\
-	} while ( 0 )
-
-/**
- * Report OCSP validation failure test result
- *
- * @v test		OCSP test
- * @v time		Test time
- */
-#define ocsp_validate_fail_ok( test, time ) do {			\
-	ocsp_prepare_test ( (test) );					\
-	ok ( ocsp_validate ( (test)->ocsp, time ) != 0 );		\
-	} while ( 0 )
-
-/**
- * Perform OCSP self-tests
- *
- */
-static void ocsp_test_exec ( void ) {
-
-	/* Parse certificates */
-	ocsp_certificate_ok ( &barclays_crt );
-	ocsp_certificate_ok ( &google_crt );
-	ocsp_certificate_ok ( &verisign_crt );
-	ocsp_certificate_ok ( &thawte_crt );
-	ocsp_certificate_ok ( &startssl_crt );
-
-	/* Parse OCSP checks */
-	ocsp_check_ok ( &barclays_ocsp );
-	ocsp_check_ok ( &google_ocsp );
-	ocsp_check_ok ( &unauthorized_ocsp );
-	ocsp_check_ok ( &unknown_ocsp );
-
-	/* "barclays" test */
-	ocsp_request_ok ( &barclays_ocsp );
-	ocsp_response_ok ( &barclays_ocsp );
-	ocsp_validate_ok ( &barclays_ocsp, test_time );
-	ocsp_validate_fail_ok ( &barclays_ocsp, test_stale );
-
-	/* "google" test */
-	ocsp_request_ok ( &google_ocsp );
-	ocsp_response_ok ( &google_ocsp );
-	ocsp_validate_ok ( &google_ocsp, test_time );
-	ocsp_validate_fail_ok ( &google_ocsp, test_stale );
-
-	/* "unauthorized" test */
-	ocsp_request_ok ( &unauthorized_ocsp );
-	ocsp_response_fail_ok ( &unauthorized_ocsp );
-
-	/* "unknown" test */
-	ocsp_request_ok ( &unknown_ocsp );
-	ocsp_response_fail_ok ( &unknown_ocsp );
-
-	/* Drop OCSP check references */
-	ocsp_put ( unknown_ocsp.ocsp );
-	ocsp_put ( unauthorized_ocsp.ocsp );
-	ocsp_put ( google_ocsp.ocsp );
-	ocsp_put ( barclays_ocsp.ocsp );
-
-	/* Drop certificate references */
-	x509_put ( startssl_crt.cert );
-	x509_put ( thawte_crt.cert );
-	x509_put ( verisign_crt.cert );
-	x509_put ( google_crt.cert );
-	x509_put ( barclays_crt.cert );
-}
-
-/** OCSP self-test */
-struct self_test ocsp_test __self_test = {
-	.name = "ocsp",
-	.exec = ocsp_test_exec,
-};
-
-/* Drag in algorithms required for tests */
-REQUIRE_OBJECT ( rsa );
-REQUIRE_OBJECT ( sha1 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/pubkey_test.h ipxe-1.0.1~lliurex1505/src/tests/pubkey_test.h
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/pubkey_test.h	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/pubkey_test.h	1970-01-01 00:00:00.000000000 +0000
@@ -1,175 +0,0 @@
-#ifndef _PUBKEY_TEST_H
-#define _PUBKEY_TEST_H
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <ipxe/crypto.h>
-#include <ipxe/test.h>
-
-/**
- * Report public key decryption test result
- *
- * @v pubkey		Public key algorithm
- * @v key		Key
- * @v key_len		Key length
- * @v ciphertext	Ciphertext
- * @v ciphertext_len	Ciphertext length
- * @v expected		Expected plaintext
- * @v expected_len	Expected plaintext length
- */
-#define pubkey_decrypt_ok( pubkey, key, key_len, ciphertext,		\
-			   ciphertext_len, expected, expected_len ) do {\
-	uint8_t ctx[ (pubkey)->ctxsize ];				\
-									\
-	ok ( pubkey_init ( (pubkey), ctx, (key), (key_len) ) == 0 );	\
-	{								\
-		size_t max_len = pubkey_max_len ( (pubkey), ctx );	\
-		uint8_t decrypted[ max_len ];				\
-		int decrypted_len;					\
-									\
-		decrypted_len = pubkey_decrypt ( (pubkey), ctx,		\
-						 (ciphertext),		\
-						 (ciphertext_len),	\
-						 decrypted );		\
-		ok ( decrypted_len == ( ( int ) (expected_len) ) );	\
-		ok ( memcmp ( decrypted, (expected),			\
-			      (expected_len) ) == 0 );			\
-	}								\
-	pubkey_final ( (pubkey), ctx );					\
-	} while ( 0 )
-
-/**
- * Report public key encryption and decryption test result
- *
- * @v pubkey		Public key algorithm
- * @v encrypt_key	Encryption key
- * @v encrypt_key_len	Encryption key length
- * @v decrypt_key	Decryption key
- * @v decrypt_key_len	Decryption key length
- * @v plaintext		Plaintext
- * @v plaintext_len	Plaintext length
- */
-#define pubkey_encrypt_ok( pubkey, encrypt_key, encrypt_key_len,	\
-			   decrypt_key, decrypt_key_len, plaintext,	\
-			   plaintext_len ) do {				\
-	uint8_t ctx[ (pubkey)->ctxsize ];				\
-									\
-	ok ( pubkey_init ( (pubkey), ctx, (encrypt_key),		\
-			   (encrypt_key_len) ) == 0 );			\
-	{								\
-		size_t max_len = pubkey_max_len ( (pubkey), ctx );	\
-		uint8_t encrypted[ max_len ];				\
-		int encrypted_len;					\
-									\
-		encrypted_len = pubkey_encrypt ( (pubkey), ctx,		\
-						 (plaintext),		\
-						 (plaintext_len),	\
-						 encrypted );		\
-		ok ( encrypted_len >= 0 );				\
-		pubkey_decrypt_ok ( (pubkey), (decrypt_key),		\
-				    (decrypt_key_len), encrypted,	\
-				    encrypted_len, (plaintext),		\
-				    (plaintext_len) );			\
-	}								\
-	pubkey_final ( (pubkey), ctx );					\
-	} while ( 0 )
-
-/**
- * Report public key signature test result
- *
- * @v pubkey		Public key algorithm
- * @v key		Key
- * @v key_len		Key length
- * @v digest		Digest algorithm
- * @v plaintext		Plaintext
- * @v plaintext_len	Plaintext length
- * @v expected		Expected signature
- * @v expected_len	Expected signature length
- */
-#define pubkey_sign_ok( pubkey, key, key_len, digest, plaintext,	\
-			plaintext_len, expected, expected_len ) do {	\
-	uint8_t ctx[ (pubkey)->ctxsize ];				\
-	uint8_t digestctx[ (digest)->ctxsize ];				\
-	uint8_t digestout[ (digest)->digestsize ];			\
-									\
-	digest_init ( (digest), digestctx );				\
-	digest_update ( (digest), digestctx, (plaintext),		\
-			(plaintext_len) );				\
-	digest_final ( (digest), digestctx, digestout );		\
-									\
-	ok ( pubkey_init ( (pubkey), ctx, (key), (key_len) ) == 0 );	\
-	{								\
-		size_t max_len = pubkey_max_len ( (pubkey), ctx );	\
-		uint8_t signature[ max_len ];				\
-		int signature_len;					\
-									\
-		signature_len = pubkey_sign ( (pubkey), ctx, (digest),	\
-					      digestout, signature );	\
-		ok ( signature_len == ( ( int ) (expected_len) ) );	\
-		ok ( memcmp ( signature, (expected),			\
-			      (expected_len) ) == 0 );			\
-	}								\
-	pubkey_final ( (pubkey), ctx );					\
-	} while ( 0 )
-
-/**
- * Report public key verification test result
- *
- * @v pubkey		Public key algorithm
- * @v key		Key
- * @v key_len		Key length
- * @v digest		Digest algorithm
- * @v plaintext		Plaintext
- * @v plaintext_len	Plaintext length
- * @v signature		Signature
- * @v signature_len	Signature length
- */
-#define pubkey_verify_ok( pubkey, key, key_len, digest, plaintext,	\
-			  plaintext_len, signature, signature_len ) do {\
-	uint8_t ctx[ (pubkey)->ctxsize ];				\
-	uint8_t digestctx[ (digest)->ctxsize ];				\
-	uint8_t digestout[ (digest)->digestsize ];			\
-									\
-	digest_init ( (digest), digestctx );				\
-	digest_update ( (digest), digestctx, (plaintext),		\
-			(plaintext_len) );				\
-	digest_final ( (digest), digestctx, digestout );		\
-									\
-	ok ( pubkey_init ( (pubkey), ctx, (key), (key_len) ) == 0 );	\
-	ok ( pubkey_verify ( (pubkey), ctx, (digest), digestout,	\
-			     (signature), (signature_len) ) == 0 );	\
-	pubkey_final ( (pubkey), ctx );					\
-	} while ( 0 )
-
-/**
- * Report public key verification test result
- *
- * @v pubkey		Public key algorithm
- * @v key		Key
- * @v key_len		Key length
- * @v digest		Digest algorithm
- * @v plaintext		Plaintext
- * @v plaintext_len	Plaintext length
- * @v signature		Signature
- * @v signature_len	Signature length
- */
-#define pubkey_verify_fail_ok( pubkey, key, key_len, digest, plaintext,	\
-			       plaintext_len, signature,		\
-			       signature_len ) do {			\
-	uint8_t ctx[ (pubkey)->ctxsize ];				\
-	uint8_t digestctx[ (digest)->ctxsize ];				\
-	uint8_t digestout[ (digest)->digestsize ];			\
-									\
-	digest_init ( (digest), digestctx );				\
-	digest_update ( (digest), digestctx, (plaintext),		\
-			(plaintext_len) );				\
-	digest_final ( (digest), digestctx, digestout );		\
-									\
-	ok ( pubkey_init ( (pubkey), ctx, (key), (key_len) ) == 0 );	\
-	ok ( pubkey_verify ( (pubkey), ctx, (digest), digestout,	\
-			     (signature), (signature_len) ) != 0 );	\
-	pubkey_final ( (pubkey), ctx );					\
-	} while ( 0 )
-
-#endif /* _PUBKEY_TEST_H */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/rsa_test.c ipxe-1.0.1~lliurex1505/src/tests/rsa_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/rsa_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/rsa_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,492 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * RSA self-tests
- *
- * These test vectors are generated using openssl's genrsa, rsa,
- * rsautl, and dgst tools.
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <ipxe/crypto.h>
-#include <ipxe/rsa.h>
-#include <ipxe/md5.h>
-#include <ipxe/sha1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/test.h>
-#include "pubkey_test.h"
-
-/** Define inline private key data */
-#define PRIVATE(...) { __VA_ARGS__ }
-
-/** Define inline public key data */
-#define PUBLIC(...) { __VA_ARGS__ }
-
-/** Define inline plaintext data */
-#define PLAINTEXT(...) { __VA_ARGS__ }
-
-/** Define inline ciphertext data */
-#define CIPHERTEXT(...) { __VA_ARGS__ }
-
-/** Define inline signature data */
-#define SIGNATURE(...) { __VA_ARGS__ }
-
-/** An RSA encryption and decryption self-test */
-struct rsa_encrypt_decrypt_test {
-	/** Private key */
-	const void *private;
-	/** Private key length */
-	size_t private_len;
-	/** Public key */
-	const void *public;
-	/** Public key length */
-	size_t public_len;
-	/** Plaintext */
-	const void *plaintext;
-	/** Plaintext length */
-	size_t plaintext_len;
-	/** Ciphertext
-	 *
-	 * Note that the encryption process includes some random
-	 * padding, so a given plaintext will encrypt to multiple
-	 * different ciphertexts.
-	 */
-	const void *ciphertext;
-	/** Ciphertext length */
-	size_t ciphertext_len;
-};
-
-/**
- * Define an RSA encryption and decryption test
- *
- * @v name		Test name
- * @v PRIVATE		Private key
- * @v PUBLIC		Public key
- * @v PLAINTEXT		Plaintext
- * @v CIPHERTEXT	Ciphertext
- * @ret test		Encryption and decryption test
- */
-#define RSA_ENCRYPT_DECRYPT_TEST( name, PRIVATE, PUBLIC, PLAINTEXT,	\
-				  CIPHERTEXT )				\
-	static const uint8_t name ## _private[] = PRIVATE;		\
-	static const uint8_t name ## _public[] = PUBLIC;		\
-	static const uint8_t name ## _plaintext[] = PLAINTEXT;		\
-	static const uint8_t name ## _ciphertext[] = CIPHERTEXT;	\
-	static struct rsa_encrypt_decrypt_test name = {			\
-		.private = name ## _private,				\
-		.private_len = sizeof ( name ## _private ),		\
-		.public = name ## _public,				\
-		.public_len = sizeof ( name ## _public ),		\
-		.plaintext = name ## _plaintext,			\
-		.plaintext_len = sizeof ( name ## _plaintext ),		\
-		.ciphertext = name ## _ciphertext,			\
-		.ciphertext_len = sizeof ( name ## _ciphertext ),	\
-	}
-
-/** An RSA signature self-test */
-struct rsa_signature_test {
-	/** Private key */
-	const void *private;
-	/** Private key length */
-	size_t private_len;
-	/** Public key */
-	const void *public;
-	/** Public key length */
-	size_t public_len;
-	/** Plaintext */
-	const void *plaintext;
-	/** Plaintext length */
-	size_t plaintext_len;
-	/** Digest algorithm */
-	struct digest_algorithm *digest;
-	/** Signature */
-	const void *signature;
-	/** Signature length */
-	size_t signature_len;
-};
-
-/**
- * Define an RSA signature test
- *
- * @v name		Test name
- * @v PRIVATE		Private key
- * @v PUBLIC		Public key
- * @v PLAINTEXT		Plaintext
- * @v DIGEST		Digest algorithm
- * @v SIGNATURE		Signature
- * @ret test		Signature test
- */
-#define RSA_SIGNATURE_TEST( name, PRIVATE, PUBLIC, PLAINTEXT, DIGEST,	\
-			    SIGNATURE )					\
-	static const uint8_t name ## _private[] = PRIVATE;		\
-	static const uint8_t name ## _public[] = PUBLIC;		\
-	static const uint8_t name ## _plaintext[] = PLAINTEXT;		\
-	static const uint8_t name ## _signature[] = SIGNATURE;		\
-	static struct rsa_signature_test name = {			\
-		.private = name ## _private,				\
-		.private_len = sizeof ( name ## _private ),		\
-		.public = name ## _public,				\
-		.public_len = sizeof ( name ## _public ),		\
-		.plaintext = name ## _plaintext,			\
-		.plaintext_len = sizeof ( name ## _plaintext ),		\
-		.digest = DIGEST,					\
-		.signature = name ## _signature,			\
-		.signature_len = sizeof ( name ## _signature ),		\
-	}
-
-/**
- * Report RSA encryption and decryption test result
- *
- * @v test		RSA encryption and decryption test
- */
-#define rsa_encrypt_decrypt_ok( test ) do {				\
-	pubkey_decrypt_ok ( &rsa_algorithm, (test)->private,		\
-			    (test)->private_len, (test)->ciphertext,	\
-			    (test)->ciphertext_len, (test)->plaintext,	\
-			    (test)->plaintext_len );			\
-	pubkey_encrypt_ok ( &rsa_algorithm, (test)->private,		\
-			    (test)->private_len, (test)->public,	\
-			    (test)->public_len, (test)->plaintext,	\
-			    (test)->plaintext_len );			\
-	pubkey_encrypt_ok ( &rsa_algorithm, (test)->public,		\
-			    (test)->public_len, (test)->private,	\
-			    (test)->private_len, (test)->plaintext,	\
-			    (test)->plaintext_len );			\
-	} while ( 0 )
-
-
-/**
- * Report RSA signature test result
- *
- * @v test		RSA signature test
- */
-#define rsa_signature_ok( test ) do {					\
-	uint8_t bad_signature[ (test)->signature_len ];			\
-	pubkey_sign_ok ( &rsa_algorithm, (test)->private,		\
-			 (test)->private_len, (test)->digest,		\
-			 (test)->plaintext, (test)->plaintext_len,	\
-			 (test)->signature, (test)->signature_len );	\
-	pubkey_verify_ok ( &rsa_algorithm, (test)->public,		\
-			   (test)->public_len, (test)->digest,		\
-			   (test)->plaintext, (test)->plaintext_len,	\
-			   (test)->signature, (test)->signature_len );	\
-	memset ( bad_signature, 0, sizeof ( bad_signature ) );		\
-	pubkey_verify_fail_ok ( &rsa_algorithm, (test)->public,		\
-				(test)->public_len, (test)->digest,	\
-				(test)->plaintext,			\
-				(test)->plaintext_len, bad_signature,	\
-				sizeof ( bad_signature ) );		\
-	} while ( 0 )
-
-/** "Hello world" encryption and decryption test */
-RSA_ENCRYPT_DECRYPT_TEST ( hw_test,
-	PRIVATE ( 0x30, 0x82, 0x01, 0x3b, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00,
-		  0xd2, 0xf1, 0x04, 0x67, 0xf6, 0x2c, 0x96, 0x07, 0xa6, 0xbd,
-		  0x85, 0xac, 0xc1, 0x17, 0x5d, 0xe8, 0xf0, 0x93, 0x94, 0x0c,
-		  0x45, 0x67, 0x26, 0x67, 0xde, 0x7e, 0xfb, 0xa8, 0xda, 0xbd,
-		  0x07, 0xdf, 0xcf, 0x45, 0x04, 0x6d, 0xbd, 0x69, 0x8b, 0xfb,
-		  0xc1, 0x72, 0xc0, 0xfc, 0x03, 0x04, 0xf2, 0x82, 0xc4, 0x7b,
-		  0x6a, 0x3e, 0xec, 0x53, 0x7a, 0xe3, 0x4e, 0xa8, 0xc9, 0xf9,
-		  0x1f, 0x2a, 0x13, 0x0d, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02,
-		  0x40, 0x49, 0xb8, 0x61, 0xc9, 0xd3, 0x87, 0x11, 0x87, 0xeb,
-		  0x06, 0x21, 0x49, 0x96, 0xd2, 0x0b, 0xc7, 0xf5, 0x0c, 0x1e,
-		  0x99, 0x8b, 0x47, 0xd9, 0x6c, 0x43, 0x9e, 0x2d, 0x65, 0x7d,
-		  0xcc, 0xc2, 0x8b, 0x1a, 0x6f, 0x2b, 0x55, 0xbe, 0xb3, 0x9f,
-		  0xd1, 0xe2, 0x9a, 0xde, 0x1d, 0xac, 0xec, 0x67, 0xec, 0xa5,
-		  0xbf, 0x9c, 0x30, 0xd6, 0xf9, 0x0a, 0x1a, 0x48, 0xf3, 0xc2,
-		  0x93, 0x3a, 0x17, 0x27, 0x21, 0x02, 0x21, 0x00, 0xfc, 0x8d,
-		  0xfb, 0xee, 0x8a, 0xaa, 0x45, 0x19, 0x4b, 0xf0, 0x68, 0xb0,
-		  0x02, 0x38, 0x3e, 0x03, 0x6b, 0x24, 0x77, 0x20, 0xbd, 0x5e,
-		  0x6c, 0x76, 0xdb, 0xc9, 0xe1, 0x43, 0xa3, 0x40, 0x62, 0x6f,
-		  0x02, 0x21, 0x00, 0xd5, 0xd1, 0xb4, 0x4d, 0x03, 0x40, 0x69,
-		  0x3f, 0x9a, 0xa7, 0x44, 0x15, 0x28, 0x1e, 0xa5, 0x5f, 0xcf,
-		  0x97, 0x21, 0x12, 0xb3, 0xe6, 0x1c, 0x9a, 0x8d, 0xb7, 0xb4,
-		  0x80, 0x3a, 0x9c, 0xb0, 0x43, 0x02, 0x20, 0x71, 0xf0, 0xa0,
-		  0xab, 0x82, 0xf5, 0xc4, 0x8c, 0xe0, 0x1c, 0xcb, 0x2e, 0x35,
-		  0x22, 0x28, 0xa0, 0x24, 0x33, 0x64, 0x67, 0x69, 0xe7, 0xf2,
-		  0xa9, 0x41, 0x09, 0x78, 0x4e, 0xaa, 0x95, 0x3e, 0x93, 0x02,
-		  0x21, 0x00, 0x85, 0xcc, 0x4d, 0xd9, 0x0b, 0x39, 0xd9, 0x22,
-		  0x75, 0xf2, 0x49, 0x46, 0x3b, 0xee, 0xc1, 0x69, 0x6d, 0x0b,
-		  0x93, 0x24, 0x92, 0xf2, 0x61, 0xdf, 0xcc, 0xe2, 0xb1, 0xce,
-		  0xb3, 0xde, 0xac, 0xe5, 0x02, 0x21, 0x00, 0x9c, 0x23, 0x6a,
-		  0x95, 0xa6, 0xfe, 0x1e, 0xd8, 0x0c, 0x3f, 0x6e, 0xe6, 0x0a,
-		  0xeb, 0x97, 0xd6, 0x36, 0x1c, 0x80, 0xc1, 0x02, 0x87, 0x0d,
-		  0x4d, 0xfe, 0x28, 0x02, 0x1e, 0xde, 0xe1, 0xcc, 0x72 ),
-	PUBLIC ( 0x30, 0x5c, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-		 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x4b, 0x00,
-		 0x30, 0x48, 0x02, 0x41, 0x00, 0xd2, 0xf1, 0x04, 0x67, 0xf6,
-		 0x2c, 0x96, 0x07, 0xa6, 0xbd, 0x85, 0xac, 0xc1, 0x17, 0x5d,
-		 0xe8, 0xf0, 0x93, 0x94, 0x0c, 0x45, 0x67, 0x26, 0x67, 0xde,
-		 0x7e, 0xfb, 0xa8, 0xda, 0xbd, 0x07, 0xdf, 0xcf, 0x45, 0x04,
-		 0x6d, 0xbd, 0x69, 0x8b, 0xfb, 0xc1, 0x72, 0xc0, 0xfc, 0x03,
-		 0x04, 0xf2, 0x82, 0xc4, 0x7b, 0x6a, 0x3e, 0xec, 0x53, 0x7a,
-		 0xe3, 0x4e, 0xa8, 0xc9, 0xf9, 0x1f, 0x2a, 0x13, 0x0d, 0x02,
-		 0x03, 0x01, 0x00, 0x01 ),
-	PLAINTEXT ( 0x48, 0x65, 0x6c, 0x6c, 0x6f, 0x20, 0x77, 0x6f, 0x72, 0x6c,
-		    0x64, 0x0a ),
-	CIPHERTEXT ( 0x39, 0xff, 0x5c, 0x54, 0x65, 0x3e, 0x6a, 0xab, 0xc0, 0x62,
-		     0x91, 0xb2, 0xbf, 0x1d, 0x73, 0x5b, 0xd5, 0x4c, 0xbd, 0x16,
-		     0x0f, 0x24, 0xc9, 0xf5, 0xa7, 0xdd, 0x94, 0xd6, 0xf8, 0xae,
-		     0xd3, 0xa0, 0x9f, 0x4d, 0xff, 0x8d, 0x81, 0x34, 0x47, 0xff,
-		     0x2a, 0x87, 0x96, 0xd3, 0x17, 0x5d, 0x93, 0x4d, 0x7b, 0x27,
-		     0x88, 0x4f, 0xec, 0x43, 0x9c, 0xed, 0xb3, 0xf2, 0x19, 0x89,
-		     0x38, 0x43, 0xf9, 0x41 ) );
-
-/** Random message MD5 signature test */
-RSA_SIGNATURE_TEST ( md5_test,
-	PRIVATE ( 0x30, 0x82, 0x01, 0x3b, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00,
-		  0xf9, 0x3f, 0x78, 0x44, 0xe2, 0x0e, 0x25, 0xf1, 0x0e, 0x94,
-		  0xcd, 0xca, 0x6f, 0x9e, 0xea, 0x6d, 0xdf, 0xcd, 0xa0, 0x7c,
-		  0xe2, 0x21, 0xeb, 0xde, 0xa6, 0x01, 0x4b, 0xb0, 0x76, 0x4b,
-		  0xd8, 0x8b, 0x19, 0x83, 0xb4, 0xbe, 0x45, 0xde, 0x3d, 0x46,
-		  0x61, 0x0f, 0x11, 0xe2, 0x2c, 0xf5, 0xb0, 0x63, 0xa0, 0x84,
-		  0xc0, 0xaf, 0x4e, 0xbe, 0x6a, 0xd3, 0x84, 0x3f, 0xec, 0x42,
-		  0x17, 0xe9, 0x25, 0xe1, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02,
-		  0x40, 0x62, 0x7d, 0x93, 0x1f, 0xdd, 0x17, 0xec, 0x24, 0x42,
-		  0x37, 0xc8, 0xce, 0x0a, 0xa7, 0x88, 0x49, 0x5c, 0x9b, 0x9b,
-		  0xa4, 0x5d, 0x93, 0x3b, 0xea, 0x62, 0x3c, 0xb6, 0xd5, 0x07,
-		  0x19, 0xd7, 0x79, 0xf0, 0x3b, 0xab, 0xa3, 0xa5, 0x43, 0x35,
-		  0x8d, 0x58, 0x40, 0xa0, 0x95, 0xc5, 0x63, 0x28, 0x28, 0xda,
-		  0x13, 0x28, 0xdf, 0xc9, 0x05, 0xdc, 0x69, 0x46, 0xff, 0x2a,
-		  0xfb, 0xe4, 0xd1, 0x23, 0xa5, 0x02, 0x21, 0x00, 0xfc, 0xef,
-		  0x3b, 0x9d, 0x9d, 0x69, 0xf3, 0x66, 0x0a, 0x2b, 0x52, 0xd6,
-		  0x61, 0x14, 0x90, 0x6e, 0x7d, 0x3c, 0x08, 0x4b, 0x98, 0x44,
-		  0x00, 0xf2, 0xa4, 0x16, 0x2d, 0xd1, 0xf9, 0xa0, 0x1e, 0x37,
-		  0x02, 0x21, 0x00, 0xfc, 0x44, 0xcc, 0x7c, 0xc0, 0x26, 0x9a,
-		  0x0a, 0x6e, 0xda, 0x17, 0x05, 0x7d, 0x66, 0x8d, 0x29, 0x1a,
-		  0x44, 0xbf, 0x33, 0x76, 0xae, 0x8d, 0xe8, 0xb5, 0xed, 0xb8,
-		  0x6f, 0xdc, 0xfe, 0x10, 0xa7, 0x02, 0x20, 0x76, 0x48, 0x8a,
-		  0x60, 0x93, 0x14, 0xd1, 0x36, 0x8e, 0xda, 0xe3, 0xca, 0x4d,
-		  0x6c, 0x08, 0x7f, 0x23, 0x21, 0xc7, 0xdf, 0x52, 0x3d, 0xbb,
-		  0x13, 0xbd, 0x98, 0x81, 0xa5, 0x08, 0x4f, 0xd0, 0xd1, 0x02,
-		  0x21, 0x00, 0xd9, 0xa3, 0x11, 0x37, 0xdf, 0x1e, 0x6e, 0x6e,
-		  0xe9, 0xcb, 0xc5, 0x68, 0xbb, 0x13, 0x2a, 0x5d, 0x77, 0x88,
-		  0x2f, 0xdc, 0x5a, 0x5b, 0xa5, 0x9a, 0x4a, 0xba, 0x58, 0x10,
-		  0x49, 0xfb, 0xf6, 0xa9, 0x02, 0x21, 0x00, 0x89, 0xe8, 0x47,
-		  0x5b, 0x20, 0x04, 0x3b, 0x0f, 0xb9, 0xe0, 0x1d, 0xab, 0xcf,
-		  0xe8, 0x72, 0xfd, 0x7d, 0x17, 0x85, 0xc8, 0xd8, 0xbd, 0x1a,
-		  0x92, 0xe0, 0xbc, 0x7a, 0xc7, 0x31, 0xbe, 0xef, 0xf4 ),
-	PUBLIC ( 0x30, 0x5c, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-		 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x4b, 0x00,
-		 0x30, 0x48, 0x02, 0x41, 0x00, 0xf9, 0x3f, 0x78, 0x44, 0xe2,
-		 0x0e, 0x25, 0xf1, 0x0e, 0x94, 0xcd, 0xca, 0x6f, 0x9e, 0xea,
-		 0x6d, 0xdf, 0xcd, 0xa0, 0x7c, 0xe2, 0x21, 0xeb, 0xde, 0xa6,
-		 0x01, 0x4b, 0xb0, 0x76, 0x4b, 0xd8, 0x8b, 0x19, 0x83, 0xb4,
-		 0xbe, 0x45, 0xde, 0x3d, 0x46, 0x61, 0x0f, 0x11, 0xe2, 0x2c,
-		 0xf5, 0xb0, 0x63, 0xa0, 0x84, 0xc0, 0xaf, 0x4e, 0xbe, 0x6a,
-		 0xd3, 0x84, 0x3f, 0xec, 0x42, 0x17, 0xe9, 0x25, 0xe1, 0x02,
-		 0x03, 0x01, 0x00, 0x01 ),
-	PLAINTEXT ( 0x9d, 0x5b, 0x46, 0x42, 0x27, 0xc0, 0xf1, 0x4b, 0xe5, 0x9e,
-		    0xd3, 0x10, 0xa1, 0xeb, 0x16, 0xc3, 0xc6, 0x8f, 0x1a, 0x18,
-		    0x86, 0xc3, 0x92, 0x15, 0x2d, 0x65, 0xa0, 0x40, 0xe1, 0x3e,
-		    0x29, 0x79, 0x7c, 0xd4, 0x08, 0xef, 0x53, 0xeb, 0x08, 0x07,
-		    0x39, 0x21, 0xb3, 0x40, 0xff, 0x4b, 0xc7, 0x76, 0xb9, 0x12,
-		    0x32, 0x41, 0xcc, 0x5a, 0x86, 0x5c, 0x2e, 0x0b, 0x05, 0xd8,
-		    0x56, 0xd4, 0xdf, 0x6f, 0x2c, 0xf0, 0xbf, 0x4b, 0x6f, 0x68,
-		    0xde, 0x39, 0x4a, 0x3e, 0xae, 0x44, 0xb9, 0xc6, 0x24, 0xb3,
-		    0x83, 0x2e, 0x9f, 0xf5, 0x6d, 0x61, 0xc3, 0x8e, 0xe8, 0x8f,
-		    0xa6, 0x87, 0x58, 0x3f, 0x36, 0x13, 0xf4, 0x7e, 0xf0, 0x20,
-		    0x47, 0x87, 0x3f, 0x21, 0x6e, 0x51, 0x3c, 0xf1, 0xef, 0xca,
-		    0x9f, 0x77, 0x9c, 0x91, 0x4f, 0xd4, 0x56, 0xc0, 0x39, 0x11,
-		    0xab, 0x15, 0x2c, 0x5e, 0xad, 0x40, 0x09, 0xe6, 0xde, 0xe5,
-		    0x77, 0x60, 0x19, 0xd4, 0x0d, 0x77, 0x76, 0x24, 0x8b, 0xe6,
-		    0xdd, 0xa5, 0x8d, 0x4a, 0x55, 0x3a, 0xdf, 0xf8, 0x29, 0xfb,
-		    0x47, 0x8a, 0xfe, 0x98, 0x34, 0xf6, 0x30, 0x7f, 0x09, 0x03,
-		    0x26, 0x05, 0xd5, 0x46, 0x18, 0x96, 0xca, 0x96, 0x5b, 0x66,
-		    0xf2, 0x8d, 0xfc, 0xfc, 0x37, 0xf7, 0xc7, 0x6d, 0x6c, 0xd8,
-		    0x24, 0x0c, 0x6a, 0xec, 0x82, 0x5c, 0x72, 0xf1, 0xfc, 0x05,
-		    0xed, 0x8e, 0xe8, 0xd9, 0x8b, 0x8b, 0x67, 0x02, 0x95 ),
-	&md5_algorithm,
-	SIGNATURE ( 0xdb, 0x56, 0x3d, 0xea, 0xae, 0x81, 0x4b, 0x3b, 0x2e, 0x8e,
-		    0xb8, 0xee, 0x13, 0x61, 0xc6, 0xe7, 0xd7, 0x50, 0xcd, 0x0d,
-		    0x34, 0x3a, 0xfe, 0x9a, 0x8d, 0xf8, 0xfb, 0xd6, 0x7e, 0xbd,
-		    0xdd, 0xb3, 0xf9, 0xfb, 0xe0, 0xf8, 0xe7, 0x71, 0x03, 0xe6,
-		    0x55, 0xd5, 0xf4, 0x02, 0x3c, 0xb5, 0xbc, 0x95, 0x2b, 0x66,
-		    0x56, 0xec, 0x2f, 0x8e, 0xa7, 0xae, 0xd9, 0x80, 0xb3, 0xaa,
-		    0xac, 0x45, 0x00, 0xa8 ) );
-
-/** Random message SHA-1 signature test */
-RSA_SIGNATURE_TEST ( sha1_test,
-	PRIVATE ( 0x30, 0x82, 0x01, 0x3b, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00,
-		  0xe0, 0x3a, 0x8d, 0x35, 0xe1, 0x92, 0x2f, 0xea, 0x0d, 0x82,
-		  0x60, 0x2e, 0xb6, 0x0b, 0x02, 0xd3, 0xf4, 0x39, 0xfb, 0x06,
-		  0x43, 0x8e, 0xa1, 0x7c, 0xc5, 0xae, 0x0d, 0xc7, 0xee, 0x83,
-		  0xb3, 0x63, 0x20, 0x92, 0x34, 0xe2, 0x94, 0x3d, 0xdd, 0xbb,
-		  0x6c, 0x64, 0x69, 0x68, 0x25, 0x24, 0x81, 0x4b, 0x4d, 0x48,
-		  0x5a, 0xd2, 0x29, 0x14, 0xeb, 0x38, 0xdd, 0x3e, 0xb5, 0x57,
-		  0x45, 0x9b, 0xed, 0x33, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02,
-		  0x40, 0x3d, 0xa9, 0x1c, 0x47, 0xe2, 0xdd, 0xf6, 0x7b, 0x20,
-		  0x77, 0xe7, 0xc7, 0x30, 0x9c, 0x5a, 0x8c, 0xba, 0xae, 0x6f,
-		  0x0f, 0x4b, 0xe8, 0x9f, 0x13, 0xd6, 0xb0, 0x84, 0x6d, 0xa4,
-		  0x73, 0x67, 0x12, 0xa9, 0x7c, 0x75, 0xaf, 0x62, 0x92, 0x7b,
-		  0x80, 0xaf, 0x39, 0x7d, 0x01, 0xb3, 0x43, 0xc8, 0x0d, 0x17,
-		  0x7f, 0x82, 0x59, 0x46, 0xb8, 0xe5, 0x4e, 0xba, 0x5e, 0x71,
-		  0x5c, 0xba, 0x62, 0x06, 0x91, 0x02, 0x21, 0x00, 0xf7, 0xaa,
-		  0xb6, 0x9c, 0xc8, 0xad, 0x68, 0xa8, 0xd7, 0x25, 0xb1, 0xb5,
-		  0x91, 0xd4, 0xc7, 0xd6, 0x69, 0x51, 0x5d, 0x04, 0xed, 0xd8,
-		  0xc6, 0xea, 0x69, 0xd2, 0x24, 0xbe, 0x5e, 0x7c, 0x89, 0xa5,
-		  0x02, 0x21, 0x00, 0xe7, 0xc5, 0xf4, 0x01, 0x35, 0xe0, 0x16,
-		  0xb5, 0x13, 0x86, 0x14, 0x5a, 0x6a, 0x8d, 0x03, 0x90, 0xae,
-		  0x7d, 0x3a, 0xc1, 0xfe, 0x8c, 0xa0, 0x4a, 0xb4, 0x94, 0x50,
-		  0x58, 0xa4, 0xc6, 0x73, 0xf7, 0x02, 0x21, 0x00, 0xe2, 0xda,
-		  0x16, 0x6c, 0x63, 0x90, 0x1a, 0xc6, 0x54, 0x53, 0x2d, 0x84,
-		  0x8f, 0x70, 0x24, 0x1f, 0x6b, 0xd6, 0x5f, 0xea, 0x8c, 0xe5,
-		  0xbb, 0xc5, 0xa9, 0x6a, 0x17, 0xc7, 0xdb, 0x8a, 0x1d, 0x15,
-		  0x02, 0x21, 0x00, 0xe4, 0x2a, 0x7e, 0xe4, 0x76, 0x2a, 0x2d,
-		  0x90, 0x83, 0x30, 0xda, 0x76, 0x8c, 0x30, 0x58, 0x13, 0x25,
-		  0x83, 0x88, 0xc5, 0x93, 0x96, 0xd2, 0xf1, 0xd8, 0x45, 0xad,
-		  0xb7, 0x26, 0x37, 0x6b, 0xcf, 0x02, 0x20, 0x73, 0x58, 0x1f,
-		  0x0a, 0xcd, 0x0c, 0x83, 0x27, 0xcc, 0x15, 0xa2, 0x1e, 0x07,
-		  0x32, 0x1b, 0xa3, 0xc6, 0xa6, 0xb8, 0x83, 0x97, 0x48, 0x45,
-		  0x50, 0x6c, 0x37, 0x45, 0xa5, 0x54, 0x2a, 0x59, 0x3c ),
-	PUBLIC ( 0x30, 0x5c, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-		 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x4b, 0x00,
-		 0x30, 0x48, 0x02, 0x41, 0x00, 0xe0, 0x3a, 0x8d, 0x35, 0xe1,
-		 0x92, 0x2f, 0xea, 0x0d, 0x82, 0x60, 0x2e, 0xb6, 0x0b, 0x02,
-		 0xd3, 0xf4, 0x39, 0xfb, 0x06, 0x43, 0x8e, 0xa1, 0x7c, 0xc5,
-		 0xae, 0x0d, 0xc7, 0xee, 0x83, 0xb3, 0x63, 0x20, 0x92, 0x34,
-		 0xe2, 0x94, 0x3d, 0xdd, 0xbb, 0x6c, 0x64, 0x69, 0x68, 0x25,
-		 0x24, 0x81, 0x4b, 0x4d, 0x48, 0x5a, 0xd2, 0x29, 0x14, 0xeb,
-		 0x38, 0xdd, 0x3e, 0xb5, 0x57, 0x45, 0x9b, 0xed, 0x33, 0x02,
-		 0x03, 0x01, 0x00, 0x01 ),
-	PLAINTEXT ( 0xf7, 0x42, 0x01, 0x57, 0x6b, 0x70, 0xcc, 0x4a, 0xdc, 0xed,
-		    0x12, 0x83, 0x3f, 0xef, 0x27, 0xc1, 0x3c, 0x85, 0xdd, 0x5e,
-		    0x0a, 0x34, 0x98, 0xf9, 0x21, 0xd3, 0x24, 0x2a, 0x5a, 0xb2,
-		    0xdf, 0x60, 0x21, 0x28, 0x7c, 0x5b, 0x7a, 0xbe, 0xcb, 0xea,
-		    0xbc, 0xd6, 0x0e, 0xae, 0x94, 0x64, 0x21, 0xda, 0x28, 0x66,
-		    0x2f, 0x71, 0x48, 0xe5, 0xea, 0x59, 0x38, 0x28, 0x3e, 0xed,
-		    0x3b, 0x95, 0x4f, 0x3d, 0x72, 0x2a, 0x00, 0xf3, 0x95, 0x4d,
-		    0xf0, 0x02, 0x71, 0x63, 0x5a, 0xbc, 0x84, 0xd1, 0x81, 0x3f,
-		    0x16, 0xcd, 0x28, 0x3d, 0x47, 0xa2, 0xee, 0xa1, 0x2f, 0x84,
-		    0x8a, 0x22, 0x02, 0x88, 0xd7, 0x83, 0x06, 0x4a, 0x9f, 0xea,
-		    0x0f, 0x15, 0x48, 0x43, 0x58, 0x6d, 0x39, 0x78, 0x5a, 0x43,
-		    0x3f, 0xed, 0x6f, 0x68, 0xde, 0x9c, 0xfe, 0xd3, 0x67, 0x74,
-		    0x08, 0x46, 0x7d, 0x20, 0x22, 0x60, 0x8c, 0x37, 0x35, 0x46,
-		    0x56, 0x19, 0x3c, 0xfa, 0xa5, 0x40, 0xac, 0x44, 0x90, 0x8a,
-		    0xa5, 0x80, 0xb2, 0x32, 0xbc, 0xb4, 0x3f, 0x3e, 0x5e, 0xd4,
-		    0x51, 0xa9, 0x2e, 0xd9, 0x7f, 0x5e, 0x32, 0xb1, 0x24, 0x35,
-		    0x88, 0x71, 0x3a, 0x01, 0x86, 0x5c, 0xa2, 0xe2, 0x2d, 0x02,
-		    0x30, 0x91, 0x1c, 0xaa, 0x6c, 0x24, 0x42, 0x1b, 0x1a, 0xba,
-		    0x30, 0x40, 0x49, 0x83, 0xd9, 0xd7, 0x66, 0x7e, 0x5c, 0x1a,
-		    0x4b, 0x7f, 0xa6, 0x8e, 0x8a, 0xd6, 0x0c, 0x65, 0x75 ),
-	&sha1_algorithm,
-	SIGNATURE ( 0xa5, 0x5a, 0x8a, 0x67, 0x81, 0x76, 0x7e, 0xad, 0x99, 0x22,
-		    0xf1, 0x47, 0x64, 0xd2, 0xfb, 0x81, 0x45, 0xeb, 0x85, 0x56,
-		    0xf8, 0x7d, 0xb8, 0xec, 0x41, 0x17, 0x84, 0xf7, 0x2b, 0xbb,
-		    0x2b, 0x8f, 0xb6, 0xb8, 0x8f, 0xc6, 0xab, 0x39, 0xbc, 0xa3,
-		    0x72, 0xb3, 0x63, 0x45, 0x5a, 0xe0, 0xac, 0xf8, 0x1c, 0x83,
-		    0x48, 0x84, 0x89, 0x8a, 0x6b, 0xdf, 0x93, 0xa0, 0xc3, 0x0b,
-		    0x0e, 0x3d, 0x80, 0x80 ) );
-
-/** Random message SHA-256 signature test */
-RSA_SIGNATURE_TEST ( sha256_test,
-	PRIVATE ( 0x30, 0x82, 0x01, 0x3a, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00,
-		  0xa5, 0xe9, 0xdb, 0xa9, 0x1a, 0x6e, 0xd6, 0x4c, 0x25, 0x50,
-		  0xfe, 0x61, 0x77, 0x08, 0x7a, 0x80, 0x36, 0xcb, 0x88, 0x49,
-		  0x5c, 0xe8, 0xaa, 0x15, 0xf8, 0xb3, 0xd6, 0x78, 0x51, 0x46,
-		  0x86, 0x3a, 0x5f, 0xd5, 0x9f, 0xab, 0xfe, 0x74, 0x8c, 0x53,
-		  0x0d, 0xb5, 0x3c, 0x7d, 0x2c, 0x35, 0x88, 0x3f, 0xde, 0xa2,
-		  0xce, 0x46, 0x94, 0x30, 0xa9, 0x76, 0xee, 0x25, 0xc5, 0x5d,
-		  0xa6, 0xa6, 0x3a, 0xa5, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02,
-		  0x40, 0x14, 0x4b, 0xbc, 0x4c, 0x3e, 0x68, 0x8a, 0x9c, 0x7c,
-		  0x00, 0x21, 0x6e, 0x28, 0xd2, 0x87, 0xb1, 0xc1, 0x82, 0x3a,
-		  0x64, 0xc7, 0x11, 0xcb, 0x24, 0xae, 0xec, 0xc8, 0xf2, 0xa4,
-		  0xf6, 0x9c, 0x9a, 0xbb, 0x05, 0x94, 0x80, 0x9b, 0xc1, 0x21,
-		  0x83, 0x36, 0x23, 0xba, 0x04, 0x20, 0x23, 0x06, 0x48, 0xa7,
-		  0xa4, 0xe6, 0x31, 0x8e, 0xa1, 0x73, 0xe5, 0x6b, 0x83, 0x4c,
-		  0x3a, 0xb8, 0xd8, 0x22, 0x61, 0x02, 0x21, 0x00, 0xd4, 0xdf,
-		  0xcb, 0x21, 0x4a, 0x9a, 0x35, 0x52, 0x02, 0x99, 0xcc, 0x40,
-		  0x83, 0x65, 0x30, 0x1f, 0x9d, 0x13, 0xd6, 0xd1, 0x79, 0x10,
-		  0xce, 0x5b, 0xeb, 0x25, 0xa2, 0x39, 0x4e, 0xdf, 0x1c, 0x29,
-		  0x02, 0x21, 0x00, 0xc7, 0x86, 0x8f, 0xd9, 0x88, 0xe9, 0x98,
-		  0x4b, 0x5c, 0x50, 0x06, 0x94, 0x05, 0x59, 0x31, 0x25, 0xa7,
-		  0xa8, 0xe6, 0x95, 0x2b, 0xe3, 0x74, 0x93, 0x51, 0xa8, 0x8e,
-		  0x3d, 0xe2, 0xe0, 0xfa, 0x1d, 0x02, 0x20, 0x6e, 0xe3, 0x81,
-		  0x31, 0xff, 0x65, 0xa3, 0x1e, 0xec, 0x61, 0xe7, 0x67, 0x37,
-		  0xcb, 0x0f, 0x2d, 0x78, 0xaa, 0xab, 0xfd, 0x84, 0x5e, 0x3f,
-		  0xd0, 0xdc, 0x06, 0x47, 0xa2, 0x28, 0xb6, 0xca, 0x39, 0x02,
-		  0x20, 0x13, 0x7d, 0x9f, 0x9b, 0xbe, 0x76, 0x23, 0x3c, 0x69,
-		  0x5e, 0x1f, 0xe6, 0x61, 0xc7, 0x5e, 0xb7, 0xb0, 0xf3, 0x1c,
-		  0xe3, 0x41, 0x90, 0x4c, 0x98, 0xff, 0x87, 0x19, 0xae, 0x0d,
-		  0xf5, 0xb0, 0x39, 0x02, 0x21, 0x00, 0xb7, 0xeb, 0xcd, 0x01,
-		  0x2e, 0x23, 0x42, 0x4f, 0x0c, 0x6f, 0xde, 0xc8, 0x4f, 0xa7,
-		  0x69, 0x09, 0x12, 0x34, 0xb6, 0x95, 0x4d, 0xb8, 0x7f, 0x16,
-		  0xd0, 0x48, 0x17, 0x4a, 0x9e, 0x6e, 0x5e, 0xe2 ),
-	PUBLIC ( 0x30, 0x5c, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86,
-		 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x4b, 0x00,
-		 0x30, 0x48, 0x02, 0x41, 0x00, 0xa5, 0xe9, 0xdb, 0xa9, 0x1a,
-		 0x6e, 0xd6, 0x4c, 0x25, 0x50, 0xfe, 0x61, 0x77, 0x08, 0x7a,
-		 0x80, 0x36, 0xcb, 0x88, 0x49, 0x5c, 0xe8, 0xaa, 0x15, 0xf8,
-		 0xb3, 0xd6, 0x78, 0x51, 0x46, 0x86, 0x3a, 0x5f, 0xd5, 0x9f,
-		 0xab, 0xfe, 0x74, 0x8c, 0x53, 0x0d, 0xb5, 0x3c, 0x7d, 0x2c,
-		 0x35, 0x88, 0x3f, 0xde, 0xa2, 0xce, 0x46, 0x94, 0x30, 0xa9,
-		 0x76, 0xee, 0x25, 0xc5, 0x5d, 0xa6, 0xa6, 0x3a, 0xa5, 0x02,
-		 0x03, 0x01, 0x00, 0x01 ),
-	PLAINTEXT ( 0x60, 0xe7, 0xba, 0x9d, 0x5a, 0xe3, 0x2d, 0xfa, 0x5f, 0x47,
-		    0xdb, 0x93, 0x24, 0x2c, 0xc4, 0xe2, 0x61, 0xf3, 0x89, 0x4d,
-		    0x67, 0xad, 0xc8, 0xae, 0xf8, 0xe2, 0xfb, 0x52, 0x0f, 0x8d,
-		    0x18, 0x7e, 0x30, 0xd8, 0x8d, 0x94, 0x07, 0x92, 0x70, 0x91,
-		    0xaf, 0x3b, 0x92, 0xa6, 0x0f, 0x7a, 0x9b, 0x46, 0x85, 0x8c,
-		    0x2a, 0x5a, 0x78, 0x5d, 0x1e, 0x13, 0xbf, 0xe6, 0x12, 0xbd,
-		    0xb1, 0xbb, 0x92, 0x6d, 0x11, 0xed, 0xe1, 0xe4, 0x6e, 0x88,
-		    0x4d, 0x0b, 0x51, 0xd6, 0xfd, 0x6a, 0xb2, 0x9b, 0xd3, 0xfd,
-		    0x56, 0xec, 0xd9, 0xd6, 0xb8, 0xc5, 0xfd, 0x0c, 0xf7, 0x55,
-		    0x5f, 0xc5, 0x6f, 0xbc, 0xbb, 0x78, 0x2f, 0x50, 0x08, 0x65,
-		    0x0f, 0x12, 0xca, 0x5a, 0xea, 0x52, 0xd0, 0x94, 0x76, 0x17,
-		    0xe4, 0xba, 0x97, 0xba, 0x11, 0xbf, 0x05, 0x7e, 0xa1, 0xfd,
-		    0x7d, 0xb5, 0xf1, 0x3a, 0x7e, 0x6f, 0xa1, 0xaa, 0x97, 0x66,
-		    0x5d, 0x72, 0x76, 0x45, 0x40, 0xb5, 0x22, 0x71, 0x43, 0xe8,
-		    0x77, 0x76, 0xc8, 0x1b, 0xd2, 0xd1, 0x33, 0x05, 0x64, 0xa9,
-		    0xc2, 0xa8, 0x40, 0x40, 0x21, 0xdd, 0xcf, 0x07, 0x7e, 0xf2,
-		    0x4b, 0x80, 0x3d, 0x0f, 0x67, 0xf6, 0xbd, 0xc2, 0xc7, 0xe3,
-		    0x91, 0x71, 0xd6, 0x2d, 0xa1, 0xae, 0x81, 0x0c, 0xed, 0x54,
-		    0x48, 0x79, 0x8a, 0x78, 0x05, 0x74, 0x4d, 0x4f, 0xf0, 0xe0,
-		    0x3c, 0x41, 0x5c, 0x04, 0x0b, 0x68, 0x57, 0xc5, 0xd6 ),
-	&sha256_algorithm,
-	SIGNATURE ( 0x02, 0x2e, 0xc5, 0x2a, 0x2b, 0x7f, 0xb4, 0x80, 0xca, 0x9d,
-		    0x96, 0x5b, 0xaf, 0x1f, 0x72, 0x5b, 0x6e, 0xf1, 0x69, 0x7f,
-		    0x4d, 0x41, 0xd5, 0x9f, 0x00, 0xdc, 0x47, 0xf4, 0x68, 0x8f,
-		    0xda, 0xfc, 0xd1, 0x23, 0x96, 0x11, 0x1d, 0xc0, 0x1b, 0x1d,
-		    0x36, 0x66, 0x2a, 0xf9, 0x21, 0x51, 0xcb, 0xb9, 0x7d, 0x24,
-		    0x7d, 0x38, 0x37, 0xc4, 0xea, 0xdd, 0x3a, 0x6f, 0xa8, 0x65,
-		    0x60, 0x73, 0x77, 0x3c ) );
-
-/**
- * Perform RSA self-tests
- *
- */
-static void rsa_test_exec ( void ) {
-
-	rsa_encrypt_decrypt_ok ( &hw_test );
-	rsa_signature_ok ( &md5_test );
-	rsa_signature_ok ( &sha1_test );
-	rsa_signature_ok ( &sha256_test );
-}
-
-/** RSA self-test */
-struct self_test rsa_test __self_test = {
-	.name = "rsa",
-	.exec = rsa_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/settings_test.c ipxe-1.0.1~lliurex1505/src/tests/settings_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/settings_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/settings_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,397 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Settings self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <string.h>
-#include <ipxe/settings.h>
-#include <ipxe/test.h>
-
-/** Define inline raw data */
-#define RAW(...) { __VA_ARGS__ }
-
-/**
- * Report a formatted-store test result
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @v formatted		Formatted value
- * @v raw_array		Expected raw value
- */
-#define storef_ok( settings, setting, formatted, raw_array ) do {	\
-	const uint8_t expected[] = raw_array;				\
-	uint8_t actual[ sizeof ( expected ) ];				\
-	int len;							\
-									\
-	ok ( storef_setting ( settings, setting, formatted ) == 0 );	\
-	len = fetch_setting ( settings, setting, actual,		\
-			      sizeof ( actual ) );			\
-	if ( len >= 0 ) {						\
-		DBGC ( settings, "Stored %s \"%s\", got:\n",		\
-		       (setting)->type->name, formatted );		\
-		DBGC_HDA ( settings, 0, actual, len );			\
-	} else {							\
-		DBGC ( settings, "Stored %s \"%s\", got error %s\n",	\
-		       (setting)->type->name, formatted,		\
-		       strerror ( len ) );				\
-	}								\
-	ok ( len == ( int ) sizeof ( actual ) );			\
-	ok ( memcmp ( actual, expected, sizeof ( actual ) ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Report a formatted-fetch test result
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @v raw_array		Raw value
- * @v formatted		Expected formatted value
- */
-#define fetchf_ok( settings, setting, raw_array, formatted ) do {	\
-	const uint8_t raw[] = raw_array;				\
-	char actual[ strlen ( formatted ) + 1 ];			\
-	int len;							\
-									\
-	ok ( store_setting ( settings, setting, raw,			\
-			     sizeof ( raw ) ) == 0 );			\
-	len = fetchf_setting ( settings, setting, actual,		\
-			       sizeof ( actual ) );			\
-	DBGC ( settings, "Fetched %s \"%s\" from:\n",			\
-	       (setting)->type->name, actual );				\
-	DBGC_HDA ( settings, 0, raw, sizeof ( raw ) );			\
-	ok ( len == ( int ) ( sizeof ( actual ) - 1 ) );		\
-	ok ( strcmp ( actual, formatted ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report a numeric-store test result
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @v numeric		Numeric value
- * @v raw_array		Expected raw value
- */
-#define storen_ok( settings, setting, numeric, raw_array ) do {		\
-	const uint8_t expected[] = raw_array;				\
-	uint8_t actual[ sizeof ( expected ) ];				\
-	int len;							\
-									\
-	ok ( storen_setting ( settings, setting, numeric ) == 0 );	\
-	len = fetch_setting ( settings, setting, actual,		\
-			      sizeof ( actual ) );			\
-	if ( len >= 0 ) {						\
-		DBGC ( settings, "Stored %s %#lx, got:\n",		\
-		       (setting)->type->name,				\
-		       ( unsigned long ) numeric );			\
-		DBGC_HDA ( settings, 0, actual, len );			\
-	} else {							\
-		DBGC ( settings, "Stored %s %#lx, got error %s\n",	\
-		       (setting)->type->name,				\
-		       ( unsigned long ) numeric, strerror ( len ) );	\
-	}								\
-	ok ( len == ( int ) sizeof ( actual ) );			\
-	ok ( memcmp ( actual, expected, sizeof ( actual ) ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Report a numeric-fetch test result
- *
- * @v settings		Settings block
- * @v setting		Setting
- * @v raw_array		Raw array
- * @v numeric		Expected numeric value
- */
-#define fetchn_ok( settings, setting, raw_array, numeric ) do {		\
-	const uint8_t raw[] = raw_array;				\
-	unsigned long actual;						\
-									\
-	ok ( store_setting ( settings, setting, raw,			\
-			     sizeof ( raw ) ) == 0 );			\
-	ok ( fetchn_setting ( settings, setting, &actual ) == 0 );	\
-	DBGC ( settings, "Fetched %s %#lx from:\n",			\
-	       (setting)->type->name, actual );				\
-	DBGC_HDA ( settings, 0, raw, sizeof ( raw ) );			\
-	ok ( actual == ( unsigned long ) numeric );			\
-	} while ( 0 )
-
-/** Test generic settings block */
-struct generic_settings test_generic_settings = {
-	.settings = {
-		.refcnt = NULL,
-		.siblings =
-		    LIST_HEAD_INIT ( test_generic_settings.settings.siblings ),
-		.children =
-		    LIST_HEAD_INIT ( test_generic_settings.settings.children ),
-		.op = &generic_settings_operations,
-	},
-	.list = LIST_HEAD_INIT ( test_generic_settings.list ),
-};
-
-/** Test settings block */
-#define test_settings test_generic_settings.settings
-
-/** Test string setting */
-static struct setting test_string_setting = {
-	.name = "test_string",
-	.type = &setting_type_string,
-};
-
-/** Test URI-encoded string setting */
-static struct setting test_uristring_setting = {
-	.name = "test_uristring",
-	.type = &setting_type_uristring,
-};
-
-/** Test IPv4 address setting type */
-static struct setting test_ipv4_setting = {
-	.name = "test_ipv4",
-	.type = &setting_type_ipv4,
-};
-
-/** Test signed 8-bit integer setting type */
-static struct setting test_int8_setting = {
-	.name = "test_int8",
-	.type = &setting_type_int8,
-};
-
-/** Test signed 16-bit integer setting type */
-static struct setting test_int16_setting = {
-	.name = "test_int16",
-	.type = &setting_type_int16,
-};
-
-/** Test signed 32-bit integer setting type */
-static struct setting test_int32_setting = {
-	.name = "test_int32",
-	.type = &setting_type_int32,
-};
-
-/** Test unsigned 8-bit integer setting type */
-static struct setting test_uint8_setting = {
-	.name = "test_uint8",
-	.type = &setting_type_uint8,
-};
-
-/** Test unsigned 16-bit integer setting type */
-static struct setting test_uint16_setting = {
-	.name = "test_uint16",
-	.type = &setting_type_uint16,
-};
-
-/** Test unsigned 32-bit integer setting type */
-static struct setting test_uint32_setting = {
-	.name = "test_uint32",
-	.type = &setting_type_uint32,
-};
-
-/** Test colon-separated hex string setting type */
-static struct setting test_hex_setting = {
-	.name = "test_hex",
-	.type = &setting_type_hex,
-};
-
-/** Test hyphen-separated hex string setting type */
-static struct setting test_hexhyp_setting = {
-	.name = "test_hexhyp",
-	.type = &setting_type_hexhyp,
-};
-
-/** Test raw hex string setting type */
-static struct setting test_hexraw_setting = {
-	.name = "test_hexraw",
-	.type = &setting_type_hexraw,
-};
-
-/** Test UUID setting type */
-static struct setting test_uuid_setting = {
-	.name = "test_uuid",
-	.type = &setting_type_uuid,
-};
-
-/** Test PCI bus:dev.fn setting type */
-static struct setting test_busdevfn_setting = {
-	.name = "test_busdevfn",
-	.type = &setting_type_busdevfn,
-};
-
-/**
- * Perform settings self-tests
- *
- */
-static void settings_test_exec ( void ) {
-
-	/* Register test settings block */
-	ok ( register_settings ( &test_settings, NULL, "test" ) == 0 );
-
-	/* "string" setting type */
-	storef_ok ( &test_settings, &test_string_setting, "hello",
-		    RAW ( 'h', 'e', 'l', 'l', 'o' ) );
-	fetchf_ok ( &test_settings, &test_string_setting,
-		    RAW ( 'w', 'o', 'r', 'l', 'd' ), "world" );
-
-	/* "uristring" setting type */
-	storef_ok ( &test_settings, &test_uristring_setting, "hello%20world",
-		    RAW ( 'h', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l',
-			  'd' ) );
-	fetchf_ok ( &test_settings, &test_uristring_setting,
-		    RAW ( 1, 2, 3, 4, 5 ), "%01%02%03%04%05" );
-
-	/* "ipv4" setting type */
-	storef_ok ( &test_settings, &test_ipv4_setting, "192.168.0.1",
-		    RAW ( 192, 168, 0, 1 ) );
-	fetchf_ok ( &test_settings, &test_ipv4_setting,
-		    RAW ( 212, 13, 204, 60 ), "212.13.204.60" );
-
-	/* Integer setting types (as formatted strings) */
-	storef_ok ( &test_settings, &test_int8_setting,
-		    "54", RAW ( 54 ) );
-	storef_ok ( &test_settings, &test_int8_setting,
-		    "0x7f", RAW ( 0x7f ) );
-	storef_ok ( &test_settings, &test_int8_setting,
-		    "0x1234", RAW ( 0x34 ) );
-	storef_ok ( &test_settings, &test_int8_setting,
-		    "-32", RAW ( -32 ) );
-	fetchf_ok ( &test_settings, &test_int8_setting,
-		    RAW ( -9 ), "-9" );
-	fetchf_ok ( &test_settings, &test_int8_setting,
-		    RAW ( 106 ), "106" );
-	storef_ok ( &test_settings, &test_uint8_setting,
-		    "129", RAW ( 129 ) );
-	storef_ok ( &test_settings, &test_uint8_setting,
-		    "0x3421", RAW ( 0x21 ) );
-	fetchf_ok ( &test_settings, &test_uint8_setting,
-		    RAW ( 0x54 ), "0x54" );
-	storef_ok ( &test_settings, &test_int16_setting,
-		    "29483", RAW ( 0x73, 0x2b ) );
-	fetchf_ok ( &test_settings, &test_int16_setting,
-		    RAW ( 0x82, 0x14 ), "-32236" );
-	fetchf_ok ( &test_settings, &test_int16_setting,
-		    RAW ( 0x12, 0x78 ), "4728" );
-	storef_ok ( &test_settings, &test_uint16_setting,
-		    "48727", RAW ( 0xbe, 0x57 ) );
-	fetchf_ok ( &test_settings, &test_uint16_setting,
-		    RAW ( 0x9a, 0x24 ), "0x9a24" );
-	storef_ok ( &test_settings, &test_int32_setting,
-		    "2901274", RAW ( 0x00, 0x2c, 0x45, 0x1a ) );
-	fetchf_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0xff, 0x34, 0x2d, 0xaf ), "-13357649" );
-	fetchf_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0x01, 0x00, 0x34, 0xab ), "16790699" );
-	storef_ok ( &test_settings, &test_uint32_setting,
-		    "0xb598d21", RAW ( 0x0b, 0x59, 0x8d, 0x21 ) );
-	fetchf_ok ( &test_settings, &test_uint32_setting,
-		    RAW ( 0xf2, 0x37, 0xb2, 0x18 ), "0xf237b218" );
-
-	/* Integer setting types (as numeric values) */
-	storen_ok ( &test_settings, &test_int8_setting,
-		    72, RAW ( 72 ) );
-	storen_ok ( &test_settings, &test_int8_setting,
-		    0xabcd, RAW ( 0xcd ) );
-	fetchn_ok ( &test_settings, &test_int8_setting,
-		    RAW ( 0xfe ), -2 );
-	storen_ok ( &test_settings, &test_uint8_setting,
-		    84, RAW ( 84 ) );
-	fetchn_ok ( &test_settings, &test_uint8_setting,
-		    RAW ( 0xfe ), 0xfe );
-	storen_ok ( &test_settings, &test_int16_setting,
-		    0x87bd, RAW ( 0x87, 0xbd ) );
-	fetchn_ok ( &test_settings, &test_int16_setting,
-		    RAW ( 0x3d, 0x14 ), 0x3d14 );
-	fetchn_ok ( &test_settings, &test_int16_setting,
-		    RAW ( 0x80 ), -128 );
-	storen_ok ( &test_settings, &test_uint16_setting,
-		    1, RAW ( 0x00, 0x01 ) );
-	fetchn_ok ( &test_settings, &test_uint16_setting,
-		    RAW ( 0xbd, 0x87 ), 0xbd87 );
-	fetchn_ok ( &test_settings, &test_uint16_setting,
-		    RAW ( 0x80 ), 0x0080 );
-	storen_ok ( &test_settings, &test_int32_setting,
-		    0x0812bfd2, RAW ( 0x08, 0x12, 0xbf, 0xd2 ) );
-	fetchn_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0x43, 0x87, 0x91, 0xb4 ), 0x438791b4 );
-	fetchn_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0xff, 0xff, 0xfe ), -2 );
-	storen_ok ( &test_settings, &test_uint32_setting,
-		    0xb5927ab8, RAW ( 0xb5, 0x92, 0x7a, 0xb8 ) );
-	fetchn_ok ( &test_settings, &test_uint32_setting,
-		    RAW ( 0x98, 0xab, 0x41, 0x81 ), 0x98ab4181 );
-	fetchn_ok ( &test_settings, &test_uint32_setting,
-		    RAW ( 0xff, 0xff, 0xfe ), 0x00fffffe );
-	fetchn_ok ( &test_settings, &test_uint32_setting,
-		    RAW ( 0, 0, 0, 0x12, 0x34, 0x56, 0x78 ), 0x12345678 );
-	fetchn_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0, 0, 0, 0x12, 0x34, 0x56, 0x78 ), 0x12345678 );
-	fetchn_ok ( &test_settings, &test_int32_setting,
-		    RAW ( 0xff, 0xff, 0x87, 0x65, 0x43, 0x21 ), -0x789abcdf );
-
-	/* "hex" setting type */
-	storef_ok ( &test_settings, &test_hex_setting,
-		    "08:12:f5:22:90:1b:4b:47:a8:30:cb:4d:67:4c:d6:76",
-		    RAW ( 0x08, 0x12, 0xf5, 0x22, 0x90, 0x1b, 0x4b, 0x47, 0xa8,
-			  0x30, 0xcb, 0x4d, 0x67, 0x4c, 0xd6, 0x76 ) );
-	fetchf_ok ( &test_settings, &test_hex_setting,
-		    RAW ( 0x62, 0xd9, 0xd4, 0xc4, 0x7e, 0x3b, 0x41, 0x46, 0x91,
-			  0xc6, 0xfd, 0x0c, 0xbf ),
-		    "62:d9:d4:c4:7e:3b:41:46:91:c6:fd:0c:bf" );
-
-	/* "hexhyp" setting type */
-	storef_ok ( &test_settings, &test_hexhyp_setting,
-		    "11-33-22", RAW ( 0x11, 0x33, 0x22 ) );
-	fetchf_ok ( &test_settings, &test_hexhyp_setting,
-		    RAW ( 0x9f, 0xe5, 0x6d, 0xfb, 0x24, 0x3a, 0x4c, 0xbb, 0xa9,
-			  0x09, 0x6c, 0x66, 0x13, 0xc1, 0xa8, 0xec, 0x27 ),
-		    "9f-e5-6d-fb-24-3a-4c-bb-a9-09-6c-66-13-c1-a8-ec-27" );
-
-	/* "hexraw" setting type */
-	storef_ok ( &test_settings, &test_hexraw_setting,
-		    "012345abcdef", RAW ( 0x01, 0x23, 0x45, 0xab, 0xcd, 0xef ));
-	fetchf_ok ( &test_settings, &test_hexraw_setting,
-		    RAW ( 0x9e, 0x4b, 0x6e, 0xef, 0x36, 0xb6, 0x46, 0xfe, 0x8f,
-			  0x17, 0x06, 0x39, 0x6b, 0xf4, 0x48, 0x4e ),
-		    "9e4b6eef36b646fe8f1706396bf4484e" );
-
-	/* "uuid" setting type (no store capability) */
-	fetchf_ok ( &test_settings, &test_uuid_setting,
-		    RAW ( 0x1a, 0x6a, 0x74, 0x9d, 0x0e, 0xda, 0x46, 0x1a,0xa8,
-			  0x7a, 0x7c, 0xfe, 0x4f, 0xca, 0x4a, 0x57 ),
-		    "1a6a749d-0eda-461a-a87a-7cfe4fca4a57" );
-
-	/* "busdevfn" setting type (no store capability) */
-	fetchf_ok ( &test_settings, &test_busdevfn_setting,
-		    RAW ( 0x03, 0x45 ), "03:08.5" );
-
-	/* Clear and unregister test settings block */
-	clear_settings ( &test_settings );
-	unregister_settings ( &test_settings );
-}
-
-/** Settings self-test */
-struct self_test settings_test __self_test = {
-	.name = "settings",
-	.exec = settings_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/sha1_test.c ipxe-1.0.1~lliurex1505/src/tests/sha1_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/sha1_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/sha1_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,105 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * SHA-1 tests
- *
- */
-
-#include <stdint.h>
-#include <ipxe/sha1.h>
-#include <ipxe/test.h>
-#include "digest_test.h"
-
-/** An SHA-1 test vector */
-struct sha1_test_vector {
-	/** Test data */
-	void *data;
-	/** Test data length */
-	size_t len;
-	/** Expected digest */
-	uint8_t digest[SHA1_DIGEST_SIZE];
-};
-
-/** SHA-1 test vectors */
-static struct sha1_test_vector sha1_test_vectors[] = {
-	/* Empty test data
-	 *
-	 * Expected digest value obtained from "sha1sum /dev/null"
-	 */
-	{ NULL, 0,
-	  { 0xda, 0x39, 0xa3, 0xee, 0x5e, 0x6b, 0x4b, 0x0d, 0x32, 0x55,
-	    0xbf, 0xef, 0x95, 0x60, 0x18, 0x90, 0xaf, 0xd8, 0x07, 0x09 } },
-	/* Test data and expected digests taken from the NIST
-	 * Cryptographic Toolkit Algorithm Examples at
-	 * http://csrc.nist.gov/groups/ST/toolkit/documents/Examples/SHA1.pdf
-	 */
-	{ "abc", 3,
-	  { 0xa9, 0x99, 0x3e, 0x36, 0x47, 0x06, 0x81, 0x6a, 0xba, 0x3e,
-	    0x25, 0x71, 0x78, 0x50, 0xc2, 0x6c, 0x9c, 0xd0, 0xd8, 0x9d } },
-	{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", 56,
-	  { 0x84, 0x98, 0x3e, 0x44, 0x1c, 0x3b, 0xd2, 0x6e, 0xba, 0xae,
-	    0x4a, 0xa1, 0xf9, 0x51, 0x29, 0xe5, 0xe5, 0x46, 0x70, 0xf1 } },
-};
-
-/** SHA-1 test fragment lists */
-static struct digest_test_fragments sha1_test_fragments[] = {
-	{ { 0, -1UL, } },
-	{ { 1, 1, 1, 1, 1, 1, 1, 1 } },
-	{ { 2, 0, 23, 4, 6, 1, 0 } },
-};
-
-/**
- * Perform SHA-1 self-test
- *
- */
-static void sha1_test_exec ( void ) {
-	struct digest_algorithm *digest = &sha1_algorithm;
-	struct sha1_test_vector *test;
-	unsigned long cost;
-	unsigned int i;
-	unsigned int j;
-
-	/* Correctness test */
-	for ( i = 0 ; i < ( sizeof ( sha1_test_vectors ) /
-			    sizeof ( sha1_test_vectors[0] ) ) ; i++ ) {
-		test = &sha1_test_vectors[i];
-		/* Test with a single pass */
-		digest_ok ( digest, NULL, test->data, test->len, test->digest );
-		/* Test with fragment lists */
-		for ( j = 0 ; j < ( sizeof ( sha1_test_fragments ) /
-				    sizeof ( sha1_test_fragments[0] ) ) ; j++ ){
-			digest_ok ( digest, &sha1_test_fragments[j],
-				    test->data, test->len, test->digest );
-		}
-	}
-
-	/* Speed test */
-	cost = digest_cost ( digest );
-	DBG ( "SHA1 required %ld cycles per byte\n", cost );
-}
-
-/** SHA-1 self-test */
-struct self_test sha1_test __self_test = {
-	.name = "sha1",
-	.exec = sha1_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/sha256_test.c ipxe-1.0.1~lliurex1505/src/tests/sha256_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/sha256_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/sha256_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,108 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * SHA-256 tests
- *
- */
-
-#include <stdint.h>
-#include <ipxe/sha256.h>
-#include <ipxe/test.h>
-#include "digest_test.h"
-
-/** An SHA-256 test vector */
-struct sha256_test_vector {
-	/** Test data */
-	void *data;
-	/** Test data length */
-	size_t len;
-	/** Expected digest */
-	uint8_t digest[SHA256_DIGEST_SIZE];
-};
-
-/** SHA-256 test vectors */
-static struct sha256_test_vector sha256_test_vectors[] = {
-	/* Empty test data
-	 *
-	 * Expected digest value obtained from "sha256sum /dev/null"
-	 */
-	{ NULL, 0,
-	  { 0xe3, 0xb0, 0xc4, 0x42, 0x98, 0xfc, 0x1c, 0x14, 0x9a, 0xfb, 0xf4,
-	    0xc8, 0x99, 0x6f, 0xb9, 0x24, 0x27, 0xae, 0x41, 0xe4, 0x64, 0x9b,
-	    0x93, 0x4c, 0xa4, 0x95, 0x99, 0x1b, 0x78, 0x52, 0xb8, 0x55 } },
-	/* Test data and expected digests taken from the NIST
-	 * Cryptographic Toolkit Algorithm Examples at
-	 * http://csrc.nist.gov/groups/ST/toolkit/documents/Examples/SHA256.pdf
-	 */
-	{ "abc", 3,
-	  { 0xba, 0x78, 0x16, 0xbf, 0x8f, 0x01, 0xcf, 0xea, 0x41, 0x41, 0x40,
-	    0xde, 0x5d, 0xae, 0x22, 0x23, 0xb0, 0x03, 0x61, 0xa3, 0x96, 0x17,
-	    0x7a, 0x9c, 0xb4, 0x10, 0xff, 0x61, 0xf2, 0x00, 0x15, 0xad } },
-	{ "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq", 56,
-	  { 0x24, 0x8d, 0x6a, 0x61, 0xd2, 0x06, 0x38, 0xb8, 0xe5, 0xc0, 0x26,
-	    0x93, 0x0c, 0x3e, 0x60, 0x39, 0xa3, 0x3c, 0xe4, 0x59, 0x64, 0xff,
-	    0x21, 0x67, 0xf6, 0xec, 0xed, 0xd4, 0x19, 0xdb, 0x06, 0xc1 } },
-};
-
-/** SHA-256 test fragment lists */
-static struct digest_test_fragments sha256_test_fragments[] = {
-	{ { 0, -1UL, } },
-	{ { 1, 1, 1, 1, 1, 1, 1, 1 } },
-	{ { 2, 0, 23, 4, 6, 1, 0 } },
-};
-
-/**
- * Perform SHA-256 self-test
- *
- */
-static void sha256_test_exec ( void ) {
-	struct digest_algorithm *digest = &sha256_algorithm;
-	struct sha256_test_vector *test;
-	unsigned long cost;
-	unsigned int i;
-	unsigned int j;
-
-	/* Correctness test */
-	for ( i = 0 ; i < ( sizeof ( sha256_test_vectors ) /
-			    sizeof ( sha256_test_vectors[0] ) ) ; i++ ) {
-		test = &sha256_test_vectors[i];
-		/* Test with a single pass */
-		digest_ok ( digest, NULL, test->data, test->len, test->digest );
-		/* Test with fragment lists */
-		for ( j = 0 ; j < ( sizeof ( sha256_test_fragments ) /
-				    sizeof ( sha256_test_fragments[0] )); j++ ){
-			digest_ok ( digest, &sha256_test_fragments[j],
-				    test->data, test->len, test->digest );
-		}
-	}
-
-	/* Speed test */
-	cost = digest_cost ( digest );
-	DBG ( "SHA256 required %ld cycles per byte\n", cost );
-}
-
-/** SHA-256 self-test */
-struct self_test sha256_test __self_test = {
-	.name = "sha256",
-	.exec = sha256_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/string_test.c ipxe-1.0.1~lliurex1505/src/tests/string_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/string_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/string_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,133 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * String self-tests
- *
- * memcpy() tests are handled separately
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ipxe/test.h>
-
-/**
- * Perform string self-tests
- *
- */
-static void string_test_exec ( void ) {
-
-	/* Test strlen() */
-	ok ( strlen ( "" ) == 0 );
-	ok ( strlen ( "Hello" ) == 5 );
-	ok ( strlen ( "Hello world!" ) == 12 );
-	ok ( strlen ( "Hello\0world!" ) == 5 );
-
-	/* Test strnlen() */
-	ok ( strnlen ( "", 0 ) == 0 );
-	ok ( strnlen ( "", 10 ) == 0 );
-	ok ( strnlen ( "Hello", 0 ) == 0 );
-	ok ( strnlen ( "Hello", 3 ) == 3 );
-	ok ( strnlen ( "Hello", 5 ) == 5 );
-	ok ( strnlen ( "Hello", 16 ) == 5 );
-	ok ( strnlen ( "Hello world!", 5 ) == 5 );
-	ok ( strnlen ( "Hello world!", 11 ) == 11 );
-	ok ( strnlen ( "Hello world!", 16 ) == 12 );
-
-	/* Test strchr() */
-	ok ( strchr ( "", 'a' ) == NULL );
-	ok ( *(strchr ( "Testing", 'e' )) == 'e' );
-	ok ( *(strchr ( "Testing", 'g' )) == 'g' );
-	ok ( strchr ( "Testing", 'x' ) == NULL );
-
-	/* Test strcmp() */
-	ok ( strcmp ( "", "" ) == 0 );
-	ok ( strcmp ( "Hello", "Hello" ) == 0 );
-	ok ( strcmp ( "Hello", "hello" ) != 0 );
-	ok ( strcmp ( "Hello", "Hello world!" ) != 0 );
-	ok ( strcmp ( "Hello world!", "Hello" ) != 0 );
-
-	/* Test strncmp() */
-	ok ( strncmp ( "", "", 0 ) == 0 );
-	ok ( strncmp ( "", "", 15 ) == 0 );
-	ok ( strncmp ( "Goodbye", "Goodbye", 16 ) == 0 );
-	ok ( strncmp ( "Goodbye", "Hello", 16 ) != 0 );
-	ok ( strncmp ( "Goodbye", "Goodbye world", 32 ) != 0 );
-	ok ( strncmp ( "Goodbye", "Goodbye world", 7 ) == 0 );
-
-	/* Test memcmp() */
-	ok ( memcmp ( "", "", 0 ) == 0 );
-	ok ( memcmp ( "Foo", "Foo", 3 ) == 0 );
-	ok ( memcmp ( "Foo", "Bar", 3 ) != 0 );
-
-	/* Test memset() */
-	{
-		static uint8_t test[7] = { '>', 1, 1, 1, 1, 1, '<' };
-		static const uint8_t expected[7] = { '>', 0, 0, 0, 0, 0, '<' };
-		memset ( ( test + 1 ), 0, ( sizeof ( test ) - 2 ) );
-		ok ( memcmp ( test, expected, sizeof ( test ) ) == 0 );
-	}
-	{
-		static uint8_t test[4] = { '>', 0, 0, '<' };
-		static const uint8_t expected[4] = { '>', 0xeb, 0xeb, '<' };
-		memset ( ( test + 1 ), 0xeb, ( sizeof ( test ) - 2 ) );
-		ok ( memcmp ( test, expected, sizeof ( test ) ) == 0 );
-	}
-
-	/* Test memmove() */
-	{
-		static uint8_t test[11] =
-			{ '>', 1, 2, 3, 4, 5, 6, 7, 8, 9, '<' };
-		static const uint8_t expected[11] =
-			{ '>', 3, 4, 5, 6, 7, 8, 7, 8, 9, '<' };
-		memmove ( ( test + 1 ), ( test + 3 ), 6 );
-		ok ( memcmp ( test, expected, sizeof ( test ) ) == 0 );
-	}
-	{
-		static uint8_t test[12] =
-			{ '>', 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, '<' };
-		static const uint8_t expected[12] =
-			{ '>', 1, 2, 3, 4, 5, 1, 2, 3, 4, 5, '<' };
-		memmove ( ( test + 6 ), ( test + 1 ), 5 );
-		ok ( memcmp ( test, expected, sizeof ( test ) ) == 0 );
-	}
-
-	/* Test memswap() */
-	{
-		static uint8_t test[8] =
-			{ '>', 1, 2, 3, 7, 8, 9, '<' };
-		static const uint8_t expected[8] =
-			{ '>', 7, 8, 9, 1, 2, 3, '<' };
-		memswap ( ( test + 1 ), ( test + 4 ), 3 );
-		ok ( memcmp ( test, expected, sizeof ( test ) ) == 0 );
-	}
-}
-
-/** String self-test */
-struct self_test string_test __self_test = {
-	.name = "string",
-	.exec = string_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/tcpip_test.c ipxe-1.0.1~lliurex1505/src/tests/tcpip_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/tcpip_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/tcpip_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,213 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * TCP/IP self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <ipxe/test.h>
-#include <ipxe/profile.h>
-#include <ipxe/tcpip.h>
-
-/** A TCP/IP fixed-data test */
-struct tcpip_test {
-	/** Data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-};
-
-/** A TCP/IP pseudorandom-data test */
-struct tcpip_random_test {
-	/** Seed */
-	unsigned int seed;
-	/** Length of data */
-	size_t len;
-	/** Alignment offset */
-	size_t offset;
-};
-
-/** Define inline data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define a TCP/IP fixed-data test */
-#define TCPIP_TEST( name, DATA )					\
-	static const uint8_t __attribute__ (( aligned ( 16 ) ))		\
-		name ## _data[] = DATA;					\
-	static struct tcpip_test name = {				\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-	}
-
-/** Define a TCP/IP pseudorandom-data test */
-#define TCPIP_RANDOM_TEST( name, SEED, LEN, OFFSET )			\
-	static struct tcpip_random_test name = {			\
-		.seed = SEED,						\
-		.len = LEN,						\
-		.offset = OFFSET,					\
-	}
-
-/** Buffer for pseudorandom-data tests */
-static uint8_t __attribute__ (( aligned ( 16 ) ))
-	tcpip_data[ 4096 + 7 /* offset */ ];
-
-/** Empty data */
-TCPIP_TEST ( empty, DATA() );
-
-/** Single byte */
-TCPIP_TEST ( one_byte, DATA ( 0xeb ) );
-
-/** Double byte */
-TCPIP_TEST ( two_bytes, DATA ( 0xba, 0xbe ) );
-
-/** Final wrap-around carry (big-endian) */
-TCPIP_TEST ( final_carry_big,
-	     DATA ( 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01 ) );
-
-/** Final wrap-around carry (little-endian) */
-TCPIP_TEST ( final_carry_little,
-	     DATA ( 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00 ) );
-
-/** Random data (aligned) */
-TCPIP_RANDOM_TEST ( random_aligned, 0x12345678UL, 4096, 0 );
-
-/** Random data (unaligned, +1) */
-TCPIP_RANDOM_TEST ( random_unaligned_1, 0x12345678UL, 4096, 1 );
-
-/** Random data (unaligned, +2) */
-TCPIP_RANDOM_TEST ( random_unaligned_2, 0x12345678UL, 4096, 2 );
-
-/** Random data (aligned, truncated) */
-TCPIP_RANDOM_TEST ( random_aligned_truncated, 0x12345678UL, 4095, 0 );
-
-/** Random data (unaligned start and finish) */
-TCPIP_RANDOM_TEST ( partial, 0xcafebabe, 121, 5 );
-
-/**
- * Calculate TCP/IP checksum
- *
- * @v data		Data to sum
- * @v len		Length of data
- * @ret cksum		Checksum
- *
- * This is a reference implementation taken from RFC1071 (and modified
- * to fix compilation without warnings under gcc).
- */
-static uint16_t rfc_tcpip_chksum ( const void *data, size_t len ) {
-	unsigned long sum = 0;
-
-        while ( len > 1 )  {
-		sum += *( ( uint16_t * ) data );
-		data += 2;
-		len -= 2;
-	}
-
-	if ( len > 0 )
-		sum += *( ( uint8_t * ) data );
-
-	while ( sum >> 16 )
-		sum = ( ( sum & 0xffff ) + ( sum >> 16 ) );
-
-	return ~sum;
-}
-
-/**
- * Report TCP/IP fixed-data test result
- *
- * @v test		TCP/IP test
- */
-#define tcpip_ok( test ) do {						\
-	uint16_t expected;						\
-	uint16_t generic_sum;						\
-	uint16_t sum;							\
-	expected = rfc_tcpip_chksum ( (test)->data, (test)->len );	\
-	generic_sum = generic_tcpip_continue_chksum ( TCPIP_EMPTY_CSUM,	\
-						      (test)->data,	\
-						      (test)->len );	\
-	ok ( generic_sum == expected );					\
-	sum = tcpip_continue_chksum ( TCPIP_EMPTY_CSUM, (test)->data,	\
-				      (test)->len );			\
-	ok ( sum == expected );						\
-	} while ( 0 )
-
-/**
- * Report TCP/IP pseudorandom-data test result
- *
- * @v test		TCP/IP test
- */
-#define tcpip_random_ok( test ) do {					\
-	uint8_t *data = ( tcpip_data + (test)->offset );		\
-	uint16_t expected;						\
-	uint16_t generic_sum;						\
-	uint16_t sum;							\
-	unsigned long elapsed;						\
-	unsigned int i;							\
-	assert ( ( (test)->len + (test)->offset ) <=			\
-		 sizeof ( tcpip_data ) );				\
-	srandom ( (test)->seed );					\
-	for ( i = 0 ; i < (test)->len ; i++ )				\
-		data[i] = random();					\
-	expected = rfc_tcpip_chksum ( data, (test)->len );		\
-	generic_sum = generic_tcpip_continue_chksum ( TCPIP_EMPTY_CSUM,	\
-						      data,		\
-						      (test)->len );	\
-	ok ( generic_sum == expected );					\
-	simple_profile();						\
-	sum = tcpip_continue_chksum ( TCPIP_EMPTY_CSUM, data,		\
-				      (test)->len );			\
-	elapsed = simple_profile();					\
-	ok ( sum == expected );						\
-	DBG ( "TCPIP checksummed %zd bytes (+%zd) in %ld ticks\n",	\
-	      (test)->len, (test)->offset, elapsed );			\
-	} while ( 0 )
-
-/**
- * Perform TCP/IP self-tests
- *
- */
-static void tcpip_test_exec ( void ) {
-
-	tcpip_ok ( &empty );
-	tcpip_ok ( &one_byte );
-	tcpip_ok ( &two_bytes );
-	tcpip_ok ( &final_carry_big );
-	tcpip_ok ( &final_carry_little );
-	tcpip_random_ok ( &random_aligned );
-	tcpip_random_ok ( &random_unaligned_1 );
-	tcpip_random_ok ( &random_unaligned_2 );
-	tcpip_random_ok ( &random_aligned_truncated );
-	tcpip_random_ok ( &partial );
-}
-
-/** TCP/IP self-test */
-struct self_test tcpip_test __self_test = {
-	.name = "tcpip",
-	.exec = tcpip_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/test.c ipxe-1.0.1~lliurex1505/src/tests/test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/test.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -30,11 +29,9 @@
 
 #include <stddef.h>
 #include <stdio.h>
-#include <errno.h>
 #include <assert.h>
 #include <ipxe/test.h>
 #include <ipxe/init.h>
-#include <ipxe/image.h>
 
 /** Current self-test set */
 static struct self_test *current_tests;
@@ -103,9 +100,8 @@
 /**
  * Run all self-tests
  *
- * @ret rc		Return status code
  */
-static int run_all_tests ( void ) {
+static void test_init ( void ) {
 	struct self_test *tests;
 	unsigned int failures = 0;
 	unsigned int assertions = 0;
@@ -129,46 +125,18 @@
 			printf ( " with %d assertion failures", assertions );
 		}
 		printf ( "\n" );
-		return -EINPROGRESS;
 	} else {
 		printf ( "OK: all %d tests passed\n", total );
-		return 0;
 	}
-}
-
-static int test_image_probe ( struct image *image __unused ) {
-	return -ENOTTY;
-}
-
-static int test_image_exec ( struct image *image __unused ) {
-	return run_all_tests();
-}
-
-static struct image_type test_image_type = {
-	.name = "self-tests",
-	.probe = test_image_probe,
-	.exec = test_image_exec,
-};
-
-static struct image test_image = {
-	.refcnt = REF_INIT ( ref_no_free ),
-	.name = "<TESTS>",
-	.type = &test_image_type,
-};
 
-static void test_init ( void ) {
-	int rc;
-
-	/* Register self-tests image */
-	if ( ( rc = register_image ( &test_image ) ) != 0 ) {
-		DBG ( "Could not register self-test image: %s\n",
-		      strerror ( rc ) );
-		/* No way to report failure */
-		return;
-	}
+	/* Lock system */
+	while ( 1 ) {}
 }
 
 /** Self-test initialisation function */
-struct init_fn test_init_fn __init_fn ( INIT_EARLY ) = {
+struct init_fn test_init_fn __init_fn ( INIT_NORMAL ) = {
 	.initialise = test_init,
 };
+
+/* Drag in all applicable self-tests */
+REQUIRE_OBJECT ( list_test );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/tests.c ipxe-1.0.1~lliurex1505/src/tests/tests.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/tests.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/tests.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,51 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Self-test collection
- *
- */
-
-/* Drag in all applicable self-tests */
-REQUIRE_OBJECT ( memcpy_test );
-REQUIRE_OBJECT ( string_test );
-REQUIRE_OBJECT ( vsprintf_test );
-REQUIRE_OBJECT ( list_test );
-REQUIRE_OBJECT ( byteswap_test );
-REQUIRE_OBJECT ( base64_test );
-REQUIRE_OBJECT ( base16_test );
-REQUIRE_OBJECT ( settings_test );
-REQUIRE_OBJECT ( time_test );
-REQUIRE_OBJECT ( tcpip_test );
-REQUIRE_OBJECT ( ipv6_test );
-REQUIRE_OBJECT ( crc32_test );
-REQUIRE_OBJECT ( md5_test );
-REQUIRE_OBJECT ( sha1_test );
-REQUIRE_OBJECT ( sha256_test );
-REQUIRE_OBJECT ( aes_cbc_test );
-REQUIRE_OBJECT ( hmac_drbg_test );
-REQUIRE_OBJECT ( hash_df_test );
-REQUIRE_OBJECT ( bigint_test );
-REQUIRE_OBJECT ( rsa_test );
-REQUIRE_OBJECT ( x509_test );
-REQUIRE_OBJECT ( ocsp_test );
-REQUIRE_OBJECT ( cms_test );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/time_test.c ipxe-1.0.1~lliurex1505/src/tests/time_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/time_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/time_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,183 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * Date and time self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <time.h>
-#include <ipxe/test.h>
-
-/** A mktime() test */
-struct mktime_test {
-	/** Broken-down time */
-	struct tm tm;
-	/** Day of the week */
-	int wday;
-	/** Day of the year */
-	int yday;
-	/** Seconds since the Epoch */
-	time_t time;
-};
-
-/**
- * Define a mktime() test
- *
- * @v name		Test name
- * @v SEC		Seconds [0,60]
- * @v MIN		Minutes [0,59]
- * @v HOUR		Hour [0,23]
- * @v MDAY		Day of month [1,31]
- * @v MON		Month of year [0,11]
- * @v YEAR		Years since 1900
- * @v WDAY		Day of week [0,6] (Sunday=0)
- * @v YDAY		Day of year [0,365]
- * @v ISDST		Daylight savings flag (ignored)
- * @v TIME		Seconds since the Epoch
- * @ret test		mktime() test
- *
- * This macro is designed to make it easy to generate test vectors in
- * Perl using
- *
- *    print join ", ", gmtime ( $time ), $time."ULL";
- *
- */
-#define MKTIME_TEST( name, SEC, MIN, HOUR, MDAY, MON, YEAR, WDAY,	\
-		     YDAY, ISDST, TIME )				\
-	static struct mktime_test name = {				\
-		.tm = {							\
-			.tm_sec = SEC,					\
-			.tm_min = MIN,					\
-			.tm_hour = HOUR,				\
-			.tm_mday = MDAY,				\
-			.tm_mon = MON,					\
-			.tm_year = YEAR,				\
-			.tm_isdst = ISDST,				\
-		},							\
-		.wday = WDAY,						\
-		.yday = YDAY,						\
-		.time = TIME,						\
-	}
-
-/**
- * Report mktime() test result
- *
- * @v test		mktime() test
- */
-#define mktime_ok( test ) do {						\
-	time_t time = mktime ( &(test)->tm );				\
-	ok ( time == (test)->time );					\
-	ok ( (test)->tm.tm_wday == (test)->wday );			\
-	ok ( (test)->tm.tm_yday == (test)->yday );			\
-	} while ( 0 )
-
-/* Start of the Epoch */
-MKTIME_TEST ( mktime_epoch, 00, 00, 00, 01, 00, 70, 4, 0, 0, 0 );
-
-/* Birth of iPXE as a new project */
-MKTIME_TEST ( mktime_ipxe, 01, 15, 20, 19, 03, 110, 1, 108, 0, 1271708101ULL );
-
-/* Random test vectors generated using Perl's gmtime() */
-MKTIME_TEST ( mktime_0, 4, 17, 20, 1, 0, 150, 6, 0, 0, 2524681024ULL );
-MKTIME_TEST ( mktime_1, 22, 47, 21, 27, 11, 77, 2, 360, 0, 252107242ULL );
-MKTIME_TEST ( mktime_2, 26, 10, 0, 7, 2, 196, 3, 66, 0, 3981917426ULL );
-MKTIME_TEST ( mktime_3, 44, 44, 23, 15, 9, 261, 4, 287, 0, 6052319084ULL );
-MKTIME_TEST ( mktime_4, 3, 22, 18, 8, 9, 296, 6, 281, 0, 7156232523ULL );
-MKTIME_TEST ( mktime_5, 27, 26, 16, 18, 11, 338, 2, 351, 0, 8487649587ULL );
-MKTIME_TEST ( mktime_6, 31, 36, 22, 3, 3, 293, 3, 92, 0, 7045310191ULL );
-MKTIME_TEST ( mktime_7, 2, 0, 6, 25, 5, 289, 4, 175, 0, 6926191202ULL );
-MKTIME_TEST ( mktime_8, 43, 50, 1, 8, 0, 210, 3, 7, 0, 4418589043ULL );
-MKTIME_TEST ( mktime_9, 48, 14, 20, 23, 3, 86, 3, 112, 0, 514671288ULL );
-MKTIME_TEST ( mktime_10, 4, 43, 5, 29, 11, 173, 5, 362, 0, 3281751784ULL );
-MKTIME_TEST ( mktime_11, 47, 26, 21, 12, 7, 177, 4, 223, 0, 3396029207ULL );
-MKTIME_TEST ( mktime_12, 18, 55, 20, 26, 11, 88, 1, 360, 0, 599172918ULL );
-MKTIME_TEST ( mktime_13, 8, 32, 13, 15, 7, 314, 1, 226, 0, 7719456728ULL );
-MKTIME_TEST ( mktime_14, 0, 16, 11, 20, 6, 138, 2, 200, 0, 2163237360ULL );
-MKTIME_TEST ( mktime_15, 48, 0, 9, 31, 2, 202, 5, 89, 0, 4173238848ULL );
-MKTIME_TEST ( mktime_16, 51, 55, 0, 15, 1, 323, 6, 45, 0, 7987769751ULL );
-MKTIME_TEST ( mktime_17, 36, 10, 7, 11, 5, 301, 4, 161, 0, 7303590636ULL );
-MKTIME_TEST ( mktime_18, 22, 39, 11, 21, 9, 233, 3, 293, 0, 5169181162ULL );
-MKTIME_TEST ( mktime_19, 48, 29, 8, 31, 7, 207, 3, 242, 0, 4344222588ULL );
-MKTIME_TEST ( mktime_20, 4, 53, 22, 8, 8, 165, 2, 250, 0, 3019675984ULL );
-MKTIME_TEST ( mktime_21, 14, 16, 8, 10, 5, 298, 0, 160, 0, 7208900174ULL );
-MKTIME_TEST ( mktime_22, 10, 35, 3, 12, 3, 188, 1, 102, 0, 3732579310ULL );
-MKTIME_TEST ( mktime_23, 47, 12, 18, 22, 2, 103, 6, 80, 0, 1048356767ULL );
-MKTIME_TEST ( mktime_24, 23, 29, 17, 23, 10, 201, 3, 326, 0, 4162210163ULL );
-MKTIME_TEST ( mktime_25, 58, 35, 23, 24, 3, 111, 0, 113, 0, 1303688158ULL );
-MKTIME_TEST ( mktime_26, 34, 56, 15, 24, 11, 154, 4, 357, 0, 2681740594ULL );
-MKTIME_TEST ( mktime_27, 7, 11, 22, 28, 1, 243, 4, 58, 0, 5464447867ULL );
-MKTIME_TEST ( mktime_28, 25, 45, 23, 29, 11, 90, 6, 362, 0, 662514325ULL );
-MKTIME_TEST ( mktime_29, 31, 20, 12, 24, 1, 146, 6, 54, 0, 2403087631ULL );
-MKTIME_TEST ( mktime_30, 49, 7, 18, 16, 10, 271, 6, 319, 0, 6370596469ULL );
-MKTIME_TEST ( mktime_31, 31, 55, 2, 25, 5, 141, 2, 175, 0, 2255741731ULL );
-
-/**
- * Perform date and time self-tests
- *
- */
-static void time_test_exec ( void ) {
-
-	mktime_ok ( &mktime_epoch );
-	mktime_ok ( &mktime_ipxe );
-	mktime_ok ( &mktime_0 );
-	mktime_ok ( &mktime_1 );
-	mktime_ok ( &mktime_2 );
-	mktime_ok ( &mktime_3 );
-	mktime_ok ( &mktime_4 );
-	mktime_ok ( &mktime_5 );
-	mktime_ok ( &mktime_6 );
-	mktime_ok ( &mktime_7 );
-	mktime_ok ( &mktime_8 );
-	mktime_ok ( &mktime_9 );
-	mktime_ok ( &mktime_10 );
-	mktime_ok ( &mktime_11 );
-	mktime_ok ( &mktime_12 );
-	mktime_ok ( &mktime_13 );
-	mktime_ok ( &mktime_14 );
-	mktime_ok ( &mktime_15 );
-	mktime_ok ( &mktime_16 );
-	mktime_ok ( &mktime_17 );
-	mktime_ok ( &mktime_18 );
-	mktime_ok ( &mktime_19 );
-	mktime_ok ( &mktime_20 );
-	mktime_ok ( &mktime_21 );
-	mktime_ok ( &mktime_22 );
-	mktime_ok ( &mktime_23 );
-	mktime_ok ( &mktime_24 );
-	mktime_ok ( &mktime_25 );
-	mktime_ok ( &mktime_26 );
-	mktime_ok ( &mktime_27 );
-	mktime_ok ( &mktime_28 );
-	mktime_ok ( &mktime_29 );
-	mktime_ok ( &mktime_30 );
-	mktime_ok ( &mktime_31 );
-}
-
-/** Date and time self-test */
-struct self_test time_test __self_test = {
-	.name = "time",
-	.exec = time_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/vsprintf_test.c ipxe-1.0.1~lliurex1505/src/tests/vsprintf_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/vsprintf_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/vsprintf_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,102 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * vsprintf() self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <string.h>
-#include <stdio.h>
-#include <ipxe/test.h>
-
-/**
- * Report an snprintf() test result
- *
- */
-#define snprintf_ok( len, result, format, ... ) do {			\
-	char actual[ (len) ];						\
-	const char expected[] = result;					\
-	size_t actual_len;						\
-									\
-	actual_len = snprintf ( actual, sizeof ( actual ),		\
-				format, ##__VA_ARGS__ );		\
-	ok ( actual_len >= strlen ( result ) );				\
-	ok ( strcmp ( actual, expected ) == 0 );			\
-	if ( strcmp ( actual, expected ) != 0 ) {			\
-		DBG ( "SNPRINTF expected \"%s\", got \"%s\"\n",		\
-		      expected, actual );				\
-	}								\
-	} while ( 0 )
-
-/**
- * Perform vsprintf() self-tests
- *
- */
-static void vsprintf_test_exec ( void ) {
-
-	/* Constant string */
-	snprintf_ok ( 16, "Testing", "Testing" );
-
-	/* Constant string, truncated to fit */
-	snprintf_ok ( 5, "Test", "Testing" );
-
-	/* Basic format specifiers */
-	snprintf_ok ( 16, "%", "%%" );
-	snprintf_ok ( 16, "ABC", "%c%c%c", 'A', 'B', 'C' );
-	snprintf_ok ( 16, "abc", "%lc%lc%lc", L'a', L'b', L'c' );
-	snprintf_ok ( 16, "Hello world", "%s %s", "Hello", "world" );
-	snprintf_ok ( 16, "Goodbye world", "%ls %s", L"Goodbye", "world" );
-	snprintf_ok ( 16, "0x1234abcd", "%p", ( ( void * ) 0x1234abcd ) );
-	snprintf_ok ( 16, "0xa723", "%#x", 0xa723 );
-	snprintf_ok ( 16, "a723", "%x", 0xa723 );
-	snprintf_ok ( 16, "0x0000a723", "%#08x", 0xa723 );
-	snprintf_ok ( 16, "00A723", "%06X", 0xa723 );
-	snprintf_ok ( 16, "9876abcd", "%lx", 0x9876abcdUL );
-	snprintf_ok ( 16, "1234 5678", "%04llx %04llx", 0x1234ULL, 0x5678ULL );
-	snprintf_ok ( 16, "123", "%d", 123 );
-	snprintf_ok ( 16, "456", "%i", 456 );
-	snprintf_ok ( 16, " 99", "%3d", 99 );
-	snprintf_ok ( 16, "099", "%03d", 99 );
-	snprintf_ok ( 16, "-72", "%d", -72 );
-	snprintf_ok ( 16, " -72", "%4d", -72 );
-	snprintf_ok ( 16, "-072", "%04d", -72 );
-	snprintf_ok ( 16, "4", "%zd", sizeof ( uint32_t ) );
-	snprintf_ok ( 16, "123456789", "%d", 123456789 );
-
-	/* Realistic combinations */
-	snprintf_ok ( 64, "DBG 0x1234 thingy at 0x0003f0c0+0x5c\n",
-		      "DBG %p %s at %#08lx+%#zx\n", ( ( void * ) 0x1234 ),
-		      "thingy", 0x3f0c0UL, ( ( size_t ) 0x5c ) );
-	snprintf_ok ( 64, "PCI 00:1f.3", "PCI %02x:%02x.%x", 0x00, 0x1f, 0x03 );
-	snprintf_ok ( 64, "Region [1000000,3f000000)", "Region [%llx,%llx)",
-		      0x1000000ULL, 0x3f000000ULL );
-}
-
-/** vsprintf() self-test */
-struct self_test vsprintf_test __self_test = {
-	.name = "vsprintf",
-	.exec = vsprintf_test_exec,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/tests/x509_test.c ipxe-1.0.1~lliurex1505/src/tests/x509_test.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/tests/x509_test.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/tests/x509_test.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,948 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-/** @file
- *
- * X.509 self-tests
- *
- */
-
-/* Forcibly enable assertions */
-#undef NDEBUG
-
-#include <stdint.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/x509.h>
-#include <ipxe/asn1.h>
-#include <ipxe/sha256.h>
-#include <ipxe/test.h>
-
-/** Fingerprint algorithm used for X.509 test certificates */
-#define x509_test_algorithm sha256_algorithm
-
-/** An X.509 test certificate */
-struct x509_test_certificate {
-	/** Data */
-	const void *data;
-	/** Length of data */
-	size_t len;
-	/** Fingerprint */
-	const void *fingerprint;
-
-	/** Parsed certificate */
-	struct x509_certificate *cert;
-};
-
-/** An X.509 test certificate chain */
-struct x509_test_chain {
-	/** Test certificates */
-	struct x509_test_certificate **certs;
-	/** Number of certificates */
-	unsigned int count;
-
-	/** Parsed certificate chain */
-	struct x509_chain *chain;
-};
-
-/** Define inline certificate data */
-#define DATA(...) { __VA_ARGS__ }
-
-/** Define inline fingerprint data */
-#define FINGERPRINT(...) { __VA_ARGS__ }
-
-/** Define a test certificate */
-#define CERTIFICATE( name, DATA, FINGERPRINT )				\
-	static const uint8_t name ## _data[] = DATA;			\
-	static const uint8_t name ## _fingerprint[] = FINGERPRINT;	\
-	static struct x509_test_certificate name = {			\
-		.data = name ## _data,					\
-		.len = sizeof ( name ## _data ),			\
-		.fingerprint = name ## _fingerprint,			\
-	}
-
-/** Define a test certificate chain */
-#define CHAIN( name, ... )						\
-	static struct x509_test_certificate * name ## _certs[] =	\
-		{ __VA_ARGS__ };					\
-	static struct x509_test_chain name = {				\
-		.certs = name ## _certs,				\
-		.count = ( sizeof ( name ## _certs ) /			\
-			   sizeof ( name ## _certs[0] ) ),		\
-	}
-
-/*
- * subject	iPXE self-test root CA
- * issuer	iPXE self-test root CA
- */
-CERTIFICATE ( root_crt,
-	DATA ( 0x30, 0x82, 0x02, 0xb3, 0x30, 0x82, 0x02, 0x1c, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x09, 0x00, 0xc6, 0xb8, 0x9c, 0x58,
-	       0xd2, 0xdc, 0xc9, 0x5d, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86,
-	       0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30,
-	       0x81, 0x88, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04,
-	       0x06, 0x13, 0x02, 0x47, 0x42, 0x31, 0x17, 0x30, 0x15, 0x06,
-	       0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d, 0x62,
-	       0x72, 0x69, 0x64, 0x67, 0x65, 0x73, 0x68, 0x69, 0x72, 0x65,
-	       0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c,
-	       0x09, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65,
-	       0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c,
-	       0x0f, 0x46, 0x65, 0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65,
-	       0x6d, 0x73, 0x20, 0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f,
-	       0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78,
-	       0x65, 0x2e, 0x6f, 0x72, 0x67, 0x31, 0x1f, 0x30, 0x1d, 0x06,
-	       0x03, 0x55, 0x04, 0x03, 0x0c, 0x16, 0x69, 0x50, 0x58, 0x45,
-	       0x20, 0x73, 0x65, 0x6c, 0x66, 0x2d, 0x74, 0x65, 0x73, 0x74,
-	       0x20, 0x72, 0x6f, 0x6f, 0x74, 0x20, 0x43, 0x41, 0x30, 0x1e,
-	       0x17, 0x0d, 0x31, 0x32, 0x30, 0x33, 0x32, 0x32, 0x30, 0x30,
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-	       0x6c, 0xe7, 0x5d, 0x93, 0x97, 0xe1, 0xab, 0x36, 0x2c, 0x24,
-	       0x16, 0x92, 0x66, 0xf6, 0x6a, 0x14, 0x23, 0x1d, 0x18, 0xb9,
-	       0x44, 0x24, 0x61, 0x6b, 0xd3, 0x75, 0x02, 0x03, 0x01, 0x00,
-	       0x01, 0xa3, 0x23, 0x30, 0x21, 0x30, 0x0f, 0x06, 0x03, 0x55,
-	       0x1d, 0x13, 0x01, 0x01, 0xff, 0x04, 0x05, 0x30, 0x03, 0x01,
-	       0x01, 0xff, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x1d, 0x0f, 0x01,
-	       0x01, 0xff, 0x04, 0x04, 0x03, 0x02, 0x02, 0x04, 0x30, 0x0d,
-	       0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01,
-	       0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x94, 0x9e, 0xea,
-	       0x17, 0x8d, 0x27, 0xa9, 0x17, 0xe5, 0xa9, 0x19, 0xbe, 0x82,
-	       0x36, 0xbd, 0xac, 0x74, 0xf3, 0x6e, 0x75, 0x71, 0x30, 0x1c,
-	       0x05, 0x80, 0x6d, 0x1a, 0x69, 0x37, 0x86, 0x9c, 0x77, 0x75,
-	       0x29, 0xa1, 0xc6, 0xb7, 0x11, 0x0a, 0x63, 0x27, 0xee, 0xb1,
-	       0xc8, 0x94, 0xa9, 0x2e, 0x56, 0x8f, 0xca, 0x9d, 0xbe, 0xf4,
-	       0xdb, 0x63, 0x97, 0x68, 0x3b, 0x13, 0xf8, 0x6a, 0xa5, 0xd1,
-	       0x3d, 0xed, 0xbb, 0x86, 0x9d, 0x42, 0xfc, 0x15, 0x0a, 0x04,
-	       0xf8, 0x3c, 0x0e, 0xc4, 0x86, 0x05, 0x57, 0x56, 0x96, 0xf6,
-	       0xc0, 0x18, 0x53, 0xb0, 0xc5, 0xf0, 0xca, 0x72, 0x77, 0x77,
-	       0xc9, 0x8e, 0x90, 0xa5, 0x4b, 0xb6, 0x80, 0x4a, 0x4c, 0x34,
-	       0x6f, 0xc9, 0xe8, 0x6f, 0xc2, 0x28, 0xdf, 0x93, 0xa9, 0xf5,
-	       0x63, 0x18, 0xc0, 0xec, 0x9e, 0xd5, 0x19, 0x36, 0xc5, 0x94,
-	       0x10, 0xd4, 0x72, 0xd2, 0xb8 ),
-	FINGERPRINT ( 0x71, 0x5d, 0x51, 0x37, 0x5e, 0x18, 0xb3, 0xbc,
-		      0xbb, 0x30, 0x0e, 0x8f, 0x50, 0xc7, 0x55, 0xf5,
-		      0x96, 0xe7, 0xa8, 0x6d, 0x63, 0x2d, 0x32, 0x38,
-		      0xaf, 0x00, 0xc4, 0x1a, 0xfc, 0xd8, 0xac, 0xc3 ) );
-
-/*
- * subject	iPXE self-test intermediate CA
- * issuer	iPXE self-test root CA
- */
-CERTIFICATE ( intermediate_crt,
-	DATA ( 0x30, 0x82, 0x02, 0xb3, 0x30, 0x82, 0x02, 0x1c, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x01, 0x02, 0x30, 0x0d, 0x06, 0x09,
-	       0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05,
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-	       0x65, 0x64, 0x69, 0x61, 0x74, 0x65, 0x20, 0x43, 0x41, 0x30,
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-	       0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00, 0x03, 0x81, 0x8d,
-	       0x00, 0x30, 0x81, 0x89, 0x02, 0x81, 0x81, 0x00, 0xc9, 0x3a,
-	       0xee, 0xc6, 0x3c, 0xac, 0x4d, 0x81, 0xc6, 0x98, 0x5e, 0xe1,
-	       0x48, 0x66, 0x1a, 0x1e, 0x60, 0x19, 0x41, 0xae, 0xca, 0x14,
-	       0x97, 0xc8, 0x3a, 0x50, 0xb6, 0x48, 0xf5, 0x42, 0xac, 0x0f,
-	       0xe1, 0xe3, 0x47, 0xf0, 0xbf, 0x7c, 0xd0, 0xee, 0x8f, 0xb7,
-	       0xa6, 0x19, 0xad, 0xbb, 0xc5, 0x1b, 0x34, 0x38, 0xc8, 0xbd,
-	       0x55, 0x84, 0x93, 0x72, 0xaf, 0x84, 0xfc, 0x9b, 0x97, 0x1d,
-	       0xb5, 0x54, 0x24, 0xd6, 0x5d, 0xb7, 0x31, 0xf4, 0xbd, 0x3b,
-	       0x40, 0x97, 0xc0, 0xa9, 0x5a, 0x2a, 0xcb, 0x6b, 0x98, 0x07,
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-	       0x37, 0x2c, 0x88, 0x6a, 0x81, 0x21, 0x12, 0x4c, 0xf5, 0xcd,
-	       0xaf, 0xc9, 0xd2, 0x36, 0x3d, 0x82, 0xd1, 0xca, 0x19, 0xaf,
-	       0x4e, 0xae, 0x50, 0x71, 0x44, 0xbf, 0x02, 0x03, 0x01, 0x00,
-	       0x01, 0xa3, 0x23, 0x30, 0x21, 0x30, 0x0f, 0x06, 0x03, 0x55,
-	       0x1d, 0x13, 0x01, 0x01, 0xff, 0x04, 0x05, 0x30, 0x03, 0x01,
-	       0x01, 0xff, 0x30, 0x0e, 0x06, 0x03, 0x55, 0x1d, 0x0f, 0x01,
-	       0x01, 0xff, 0x04, 0x04, 0x03, 0x02, 0x02, 0x04, 0x30, 0x0d,
-	       0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01,
-	       0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00, 0x5d, 0x3c, 0xb3,
-	       0x52, 0x19, 0xa6, 0x9e, 0x4a, 0x44, 0x98, 0xbf, 0x51, 0x20,
-	       0x47, 0x0a, 0xf3, 0x26, 0x1a, 0xcc, 0x35, 0x2f, 0xc9, 0xed,
-	       0xe0, 0x9d, 0x46, 0xeb, 0xbc, 0x7e, 0xc9, 0xb9, 0x1d, 0x76,
-	       0xa4, 0x1d, 0xc2, 0xd9, 0x16, 0x29, 0x77, 0x01, 0x40, 0xdd,
-	       0xe5, 0xcb, 0x28, 0x91, 0x3a, 0x0c, 0x13, 0x01, 0x1b, 0x72,
-	       0x62, 0x45, 0x27, 0xfd, 0xd7, 0x00, 0x47, 0x36, 0x09, 0x1e,
-	       0x7b, 0xd2, 0xcb, 0x95, 0x3d, 0x28, 0x82, 0xce, 0x83, 0x59,
-	       0x32, 0xf9, 0xe6, 0xec, 0x89, 0xac, 0x88, 0x45, 0x22, 0x88,
-	       0x6f, 0x5e, 0xa2, 0x79, 0x95, 0xba, 0xb9, 0xc9, 0xb6, 0x4c,
-	       0x7c, 0xb4, 0x29, 0xa1, 0x02, 0xf5, 0xac, 0x5d, 0x8e, 0x52,
-	       0xeb, 0xe8, 0xb1, 0x56, 0x49, 0xb3, 0x77, 0x62, 0x7d, 0x87,
-	       0x4d, 0x17, 0xf2, 0x62, 0x83, 0x08, 0x59, 0x21, 0x60, 0x0d,
-	       0x84, 0x8e, 0x5a, 0x84, 0xf6 ),
-	FINGERPRINT ( 0x88, 0x70, 0xbf, 0xf0, 0xd6, 0x09, 0x03, 0x3a,
-		      0xe1, 0x80, 0xa7, 0xa5, 0x5c, 0x3e, 0xe1, 0x05,
-		      0x38, 0x97, 0xde, 0xe1, 0xe9, 0x74, 0x55, 0xb1,
-		      0x1e, 0x59, 0x69, 0x44, 0x42, 0x1b, 0xc8, 0xff ) );
-
-/*
- * subject	iPXE self-test leaf CA
- * issuer	iPXE self-test intermediate CA
- */
-CERTIFICATE ( leaf_crt,
-	DATA ( 0x30, 0x82, 0x02, 0xb6, 0x30, 0x82, 0x02, 0x1f, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x01, 0x02, 0x30, 0x0d, 0x06, 0x09,
-	       0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05,
-	       0x00, 0x30, 0x81, 0x90, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03,
-	       0x55, 0x04, 0x06, 0x13, 0x02, 0x47, 0x42, 0x31, 0x17, 0x30,
-	       0x15, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e, 0x43, 0x61,
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-	       0x30, 0x31, 0x33, 0x33, 0x5a, 0x17, 0x0d, 0x31, 0x34, 0x31,
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-	       0x25, 0x42, 0x49, 0xd0, 0xf0, 0xed, 0xc5, 0x5b, 0x6b, 0x4a,
-	       0xe7, 0x45, 0xfa, 0xd3, 0x3f, 0xae, 0xde, 0x5a, 0x90, 0xab,
-	       0xf1, 0x61, 0x2f, 0x40, 0x5e, 0xcf, 0x8b, 0x0b, 0x10, 0x59,
-	       0xa9, 0xd0, 0x1e, 0x0f, 0x18, 0x6b, 0x92, 0xd8, 0x9f, 0x58,
-	       0x10, 0x84, 0xb6, 0x15, 0xe8, 0x5b, 0xc4, 0xa0, 0x3e, 0x49,
-	       0x8b, 0xea, 0xdd, 0xa9, 0x7e, 0x32, 0x26, 0x9a, 0x68, 0x44,
-	       0xf0, 0x30, 0xca, 0x2a, 0xd6, 0x19, 0x7a, 0x80, 0xfd, 0xd7,
-	       0xfc, 0xc7, 0x5d, 0xe7, 0x61, 0xd2, 0x3f, 0x1f, 0x2c, 0x40,
-	       0x70, 0x7b, 0x34, 0xcb, 0x08, 0xa9, 0x02, 0x03, 0x01, 0x00,
-	       0x01, 0xa3, 0x26, 0x30, 0x24, 0x30, 0x12, 0x06, 0x03, 0x55,
-	       0x1d, 0x13, 0x01, 0x01, 0xff, 0x04, 0x08, 0x30, 0x06, 0x01,
-	       0x01, 0xff, 0x02, 0x01, 0x00, 0x30, 0x0e, 0x06, 0x03, 0x55,
-	       0x1d, 0x0f, 0x01, 0x01, 0xff, 0x04, 0x04, 0x03, 0x02, 0x02,
-	       0x04, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x81, 0x81, 0x00,
-	       0x40, 0xd2, 0x70, 0x02, 0x08, 0x19, 0xa0, 0xb8, 0x8d, 0x9d,
-	       0x3d, 0x62, 0x41, 0x90, 0x2a, 0x36, 0x4a, 0x8b, 0x21, 0x42,
-	       0x9a, 0xb4, 0xc5, 0xf8, 0x79, 0x17, 0xd7, 0x64, 0x4d, 0xbf,
-	       0x8f, 0x6a, 0x04, 0x54, 0x7a, 0x0b, 0xd4, 0xb5, 0x0e, 0xab,
-	       0xf7, 0xb7, 0x06, 0x2b, 0xf8, 0xde, 0x87, 0xb2, 0x37, 0x3b,
-	       0x95, 0x01, 0xba, 0x9f, 0x8f, 0xec, 0x0a, 0x86, 0xca, 0x51,
-	       0xb6, 0x25, 0x73, 0x2f, 0xa1, 0x66, 0xc8, 0x7a, 0x5e, 0x51,
-	       0xbd, 0x49, 0xb5, 0x75, 0xda, 0xea, 0xe5, 0xeb, 0x5d, 0xe3,
-	       0xb0, 0xad, 0x49, 0x9f, 0x8b, 0xfd, 0x89, 0xb3, 0xb7, 0xb2,
-	       0x4c, 0x7d, 0x8a, 0x29, 0xb2, 0xbe, 0x04, 0xef, 0x9c, 0x73,
-	       0x3c, 0xea, 0xa3, 0x9f, 0x07, 0x66, 0x5a, 0x2f, 0x38, 0xad,
-	       0x1a, 0xeb, 0xe1, 0xb0, 0x62, 0x14, 0x55, 0xdc, 0x8c, 0x83,
-	       0xbb, 0xc7, 0x13, 0x04, 0x41, 0x54, 0xf1, 0x45 ),
-	FINGERPRINT ( 0xca, 0xcf, 0xea, 0x98, 0x3d, 0x71, 0xb6, 0x9d,
-		      0x4f, 0x5b, 0x84, 0x5e, 0xaa, 0x8e, 0xae, 0x63,
-		      0x0e, 0xad, 0x52, 0xe8, 0xc7, 0x51, 0x81, 0x07,
-		      0xd1, 0xa1, 0x66, 0xdb, 0xd5, 0x62, 0xe1, 0xe6 ) );
-
-/*
- * subject	iPXE self-test useless CA
- * issuer	iPXE self-test leaf CA
- */
-CERTIFICATE ( useless_crt,
-	DATA ( 0x30, 0x82, 0x02, 0xae, 0x30, 0x82, 0x02, 0x17, 0xa0, 0x03,
-	       0x02, 0x01, 0x02, 0x02, 0x01, 0x02, 0x30, 0x0d, 0x06, 0x09,
-	       0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05,
-	       0x00, 0x30, 0x81, 0x88, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03,
-	       0x55, 0x04, 0x06, 0x13, 0x02, 0x47, 0x42, 0x31, 0x17, 0x30,
-	       0x15, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e, 0x43, 0x61,
-	       0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x73, 0x68, 0x69,
-	       0x72, 0x65, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55, 0x04,
-	       0x07, 0x0c, 0x09, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64,
-	       0x67, 0x65, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04,
-	       0x0a, 0x0c, 0x0f, 0x46, 0x65, 0x6e, 0x20, 0x53, 0x79, 0x73,
-	       0x74, 0x65, 0x6d, 0x73, 0x20, 0x4c, 0x74, 0x64, 0x31, 0x11,
-	       0x30, 0x0f, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x08, 0x69,
-	       0x70, 0x78, 0x65, 0x2e, 0x6f, 0x72, 0x67, 0x31, 0x1f, 0x30,
-	       0x1d, 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x16, 0x69, 0x50,
-	       0x58, 0x45, 0x20, 0x73, 0x65, 0x6c, 0x66, 0x2d, 0x74, 0x65,
-	       0x73, 0x74, 0x20, 0x6c, 0x65, 0x61, 0x66, 0x20, 0x43, 0x41,
-	       0x30, 0x1e, 0x17, 0x0d, 0x31, 0x32, 0x30, 0x33, 0x32, 0x32,
-	       0x30, 0x30, 0x30, 0x31, 0x33, 0x34, 0x5a, 0x17, 0x0d, 0x31,
-	       0x34, 0x31, 0x32, 0x31, 0x37, 0x30, 0x30, 0x30, 0x31, 0x33,
-	       0x34, 0x5a, 0x30, 0x81, 0x8b, 0x31, 0x0b, 0x30, 0x09, 0x06,
-	       0x03, 0x55, 0x04, 0x06, 0x13, 0x02, 0x47, 0x42, 0x31, 0x17,
-	       0x30, 0x15, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e, 0x43,
-	       0x61, 0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x73, 0x68,
-	       0x69, 0x72, 0x65, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55,
-	       0x04, 0x07, 0x0c, 0x09, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69,
-	       0x64, 0x67, 0x65, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55,
-	       0x04, 0x0a, 0x0c, 0x0f, 0x46, 0x65, 0x6e, 0x20, 0x53, 0x79,
-	       0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, 0x4c, 0x74, 0x64, 0x31,
-	       0x11, 0x30, 0x0f, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x08,
-	       0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f, 0x72, 0x67, 0x31, 0x22,
-	       0x30, 0x20, 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x19, 0x69,
-	       0x50, 0x58, 0x45, 0x20, 0x73, 0x65, 0x6c, 0x66, 0x2d, 0x74,
-	       0x65, 0x73, 0x74, 0x20, 0x75, 0x73, 0x65, 0x6c, 0x65, 0x73,
-	       0x73, 0x20, 0x43, 0x41, 0x30, 0x81, 0x9f, 0x30, 0x0d, 0x06,
-	       0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01,
-	       0x05, 0x00, 0x03, 0x81, 0x8d, 0x00, 0x30, 0x81, 0x89, 0x02,
-	       0x81, 0x81, 0x00, 0xbe, 0x7f, 0x5a, 0x07, 0x7c, 0x61, 0xc2,
-	       0x3a, 0x7e, 0xe3, 0x94, 0xcb, 0xe9, 0xc3, 0x4c, 0x6f, 0x8d,
-	       0x5c, 0x4a, 0xf0, 0xc2, 0x13, 0x54, 0x09, 0x39, 0xa8, 0xf9,
-	       0xc2, 0xc3, 0xdd, 0xbe, 0x42, 0x99, 0xa6, 0xe1, 0x58, 0x0a,
-	       0xd5, 0x89, 0x12, 0xa6, 0xd6, 0x4e, 0xfb, 0x6c, 0xe5, 0xab,
-	       0xff, 0x40, 0x52, 0xcc, 0x1e, 0x63, 0x10, 0xd7, 0xfe, 0x49,
-	       0xf3, 0x86, 0x29, 0x58, 0x6a, 0x90, 0xe4, 0xe2, 0x56, 0x85,
-	       0x14, 0x7d, 0xa5, 0xf8, 0xe0, 0x7e, 0x96, 0x88, 0xd9, 0x23,
-	       0xe5, 0x44, 0x72, 0xa9, 0x5a, 0xbb, 0x76, 0x6b, 0x59, 0x3e,
-	       0x85, 0xd4, 0xe7, 0xb2, 0x31, 0x32, 0xea, 0x40, 0x1f, 0xce,
-	       0xfb, 0xb1, 0x91, 0xee, 0x86, 0x91, 0x3e, 0xa4, 0x86, 0xa4,
-	       0xe9, 0x74, 0xd7, 0x14, 0x8c, 0xb6, 0xb4, 0xc0, 0x08, 0xbb,
-	       0xc8, 0x38, 0xc3, 0x96, 0x3d, 0x85, 0xcf, 0xef, 0x94, 0x52,
-	       0x29, 0x02, 0x03, 0x01, 0x00, 0x01, 0xa3, 0x23, 0x30, 0x21,
-	       0x30, 0x0f, 0x06, 0x03, 0x55, 0x1d, 0x13, 0x01, 0x01, 0xff,
-	       0x04, 0x05, 0x30, 0x03, 0x01, 0x01, 0xff, 0x30, 0x0e, 0x06,
-	       0x03, 0x55, 0x1d, 0x0f, 0x01, 0x01, 0xff, 0x04, 0x04, 0x03,
-	       0x02, 0x02, 0x04, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48,
-	       0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03, 0x81,
-	       0x81, 0x00, 0x50, 0x59, 0xfb, 0x9d, 0x4d, 0xfe, 0x0e, 0x5b,
-	       0xc4, 0x51, 0xe9, 0xe8, 0xa4, 0xf5, 0x2f, 0x32, 0x8b, 0x06,
-	       0x78, 0xbe, 0xf1, 0x18, 0xc5, 0x6f, 0xd9, 0x20, 0xee, 0xb7,
-	       0x51, 0x40, 0xaf, 0xf3, 0x3c, 0xe4, 0x74, 0x00, 0xa4, 0x63,
-	       0x3b, 0x37, 0xe1, 0xef, 0x80, 0xdc, 0xd5, 0x90, 0xed, 0xba,
-	       0x91, 0x86, 0x7f, 0x97, 0x5d, 0x3e, 0x8f, 0x29, 0xcc, 0x57,
-	       0xee, 0x79, 0x15, 0x6b, 0xe3, 0xd1, 0x25, 0x14, 0x24, 0xdf,
-	       0xbf, 0x38, 0xee, 0xe3, 0x8a, 0x88, 0x19, 0x0f, 0xc8, 0x10,
-	       0xae, 0x27, 0x99, 0xa8, 0x35, 0x47, 0xc9, 0xfb, 0x92, 0x47,
-	       0xa2, 0x36, 0x2a, 0x8c, 0x26, 0x12, 0xb1, 0x0d, 0x46, 0xe2,
-	       0xdc, 0x33, 0x29, 0x0c, 0x32, 0xcf, 0x22, 0x49, 0xde, 0xc3,
-	       0x55, 0x2a, 0xba, 0xdd, 0xe3, 0x98, 0xc0, 0xe4, 0x9a, 0xa2,
-	       0xe5, 0x43, 0x04, 0x32, 0xd3, 0x50, 0x7d, 0x9c, 0x71, 0x23 ),
-	FINGERPRINT ( 0xda, 0xbf, 0xd3, 0x5e, 0x2e, 0x29, 0xa9, 0xfd,
-		      0x4d, 0x40, 0xba, 0xb8, 0xdd, 0x66, 0x93, 0x4c,
-		      0x10, 0xea, 0x5b, 0x07, 0xa6, 0xe2, 0x27, 0x63,
-		      0x2e, 0xfe, 0x01, 0x63, 0x7c, 0xea, 0xc6, 0xd0 ) );
-
-/*
- * subject	boot.test.ipxe.org
- * issuer	iPXE self-test leaf CA
- */
-CERTIFICATE ( server_crt,
-	DATA ( 0x30, 0x82, 0x02, 0x7d, 0x30, 0x82, 0x01, 0xe6, 0x02, 0x01,
-	       0x03, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x81, 0x88, 0x31,
-	       0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02,
-	       0x47, 0x42, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04,
-	       0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64,
-	       0x67, 0x65, 0x73, 0x68, 0x69, 0x72, 0x65, 0x31, 0x12, 0x30,
-	       0x10, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x09, 0x43, 0x61,
-	       0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x31, 0x18, 0x30,
-	       0x16, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x0f, 0x46, 0x65,
-	       0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	       0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f, 0x06, 0x03, 0x55,
-	       0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f,
-	       0x72, 0x67, 0x31, 0x1f, 0x30, 0x1d, 0x06, 0x03, 0x55, 0x04,
-	       0x03, 0x0c, 0x16, 0x69, 0x50, 0x58, 0x45, 0x20, 0x73, 0x65,
-	       0x6c, 0x66, 0x2d, 0x74, 0x65, 0x73, 0x74, 0x20, 0x6c, 0x65,
-	       0x61, 0x66, 0x20, 0x43, 0x41, 0x30, 0x1e, 0x17, 0x0d, 0x31,
-	       0x32, 0x30, 0x33, 0x32, 0x32, 0x30, 0x30, 0x30, 0x31, 0x33,
-	       0x34, 0x5a, 0x17, 0x0d, 0x31, 0x33, 0x30, 0x33, 0x32, 0x32,
-	       0x30, 0x30, 0x30, 0x31, 0x33, 0x34, 0x5a, 0x30, 0x81, 0x84,
-	       0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13,
-	       0x02, 0x47, 0x42, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55,
-	       0x04, 0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69,
-	       0x64, 0x67, 0x65, 0x73, 0x68, 0x69, 0x72, 0x65, 0x31, 0x12,
-	       0x30, 0x10, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x09, 0x43,
-	       0x61, 0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x31, 0x18,
-	       0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x0f, 0x46,
-	       0x65, 0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73,
-	       0x20, 0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f, 0x06, 0x03,
-	       0x55, 0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78, 0x65, 0x2e,
-	       0x6f, 0x72, 0x67, 0x31, 0x1b, 0x30, 0x19, 0x06, 0x03, 0x55,
-	       0x04, 0x03, 0x0c, 0x12, 0x62, 0x6f, 0x6f, 0x74, 0x2e, 0x74,
-	       0x65, 0x73, 0x74, 0x2e, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f,
-	       0x72, 0x67, 0x30, 0x81, 0x9f, 0x30, 0x0d, 0x06, 0x09, 0x2a,
-	       0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00,
-	       0x03, 0x81, 0x8d, 0x00, 0x30, 0x81, 0x89, 0x02, 0x81, 0x81,
-	       0x00, 0xbd, 0x43, 0x97, 0x45, 0xa2, 0xe0, 0x1d, 0x38, 0x41,
-	       0xb0, 0xd9, 0x91, 0xf9, 0x77, 0xa9, 0xcb, 0x9c, 0x9c, 0x93,
-	       0xfe, 0x5a, 0xee, 0xbc, 0xd9, 0x0f, 0x39, 0xf6, 0x42, 0xe4,
-	       0x55, 0x21, 0xbb, 0x11, 0xfd, 0xfd, 0xba, 0x25, 0x58, 0xc8,
-	       0xc6, 0xa5, 0x3b, 0x6f, 0x80, 0xba, 0x5b, 0xbc, 0x89, 0xca,
-	       0x7a, 0xdf, 0x6e, 0xb9, 0x81, 0xb6, 0x25, 0x67, 0x0a, 0x38,
-	       0x10, 0xf8, 0x26, 0x43, 0x0c, 0x51, 0x02, 0x14, 0xd6, 0xf2,
-	       0x9d, 0x7c, 0xf5, 0x25, 0x1c, 0x78, 0x4d, 0x47, 0xaf, 0x87,
-	       0x2e, 0x38, 0x49, 0x87, 0xb5, 0x8a, 0xf3, 0xb5, 0xd4, 0x15,
-	       0x69, 0x2a, 0x52, 0xc9, 0x46, 0x97, 0x34, 0x8e, 0x50, 0x4b,
-	       0xc4, 0xf2, 0xfb, 0x39, 0xfd, 0x16, 0x68, 0xdb, 0xa8, 0x17,
-	       0xe2, 0x71, 0x4b, 0xe0, 0xdf, 0x3d, 0xfc, 0xc3, 0x9b, 0x9d,
-	       0x22, 0xc9, 0xd3, 0xf6, 0x02, 0xa6, 0x60, 0xef, 0xf7, 0x02,
-	       0x03, 0x01, 0x00, 0x01, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86,
-	       0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03,
-	       0x81, 0x81, 0x00, 0x7d, 0xff, 0x73, 0xf3, 0x68, 0xe3, 0x75,
-	       0xf1, 0xcf, 0xac, 0x2e, 0x23, 0x73, 0xea, 0xd1, 0x26, 0x33,
-	       0xbf, 0xf9, 0x56, 0xdf, 0xbf, 0x98, 0x20, 0x84, 0x08, 0x78,
-	       0x6b, 0xe6, 0x71, 0x7e, 0x22, 0x68, 0x4d, 0x6c, 0xbb, 0xd5,
-	       0xcc, 0xb4, 0x28, 0x33, 0x5e, 0xbe, 0x4d, 0x10, 0x16, 0x9f,
-	       0x65, 0x3b, 0x68, 0x90, 0xa7, 0xf7, 0x9d, 0x57, 0x71, 0x45,
-	       0x39, 0x86, 0x4c, 0xc0, 0x97, 0x34, 0x03, 0x9c, 0x2b, 0x25,
-	       0x05, 0xb1, 0x5c, 0x0c, 0x4e, 0xf2, 0x14, 0xbf, 0xcf, 0xf0,
-	       0x9a, 0x2d, 0xcf, 0x02, 0x47, 0x60, 0xd2, 0xe9, 0xed, 0xbf,
-	       0x71, 0x5d, 0x07, 0x09, 0x01, 0x87, 0xeb, 0xf7, 0xa8, 0x26,
-	       0x86, 0x24, 0x59, 0xf0, 0x31, 0x3b, 0x42, 0xd1, 0xf1, 0xfd,
-	       0x7c, 0x49, 0x5f, 0x1a, 0xf0, 0x41, 0x67, 0xf0, 0x16, 0x3a,
-	       0xfd, 0xb6, 0xb5, 0xf6, 0x2e, 0x0c, 0x18, 0x1f, 0x09, 0x8e,
-	       0x4d ),
-	FINGERPRINT ( 0xe0, 0xdb, 0x60, 0x53, 0x7c, 0xf6, 0x25, 0x8f,
-		      0xa7, 0xba, 0xdf, 0xe2, 0x1a, 0xfc, 0x27, 0x49,
-		      0xf6, 0x83, 0x15, 0xbd, 0x1b, 0x4c, 0x3f, 0x36,
-		      0x6f, 0x33, 0xf2, 0x47, 0x8e, 0x8b, 0x38, 0xa8 ) );
-
-/*
- * subject	not.a.ca.test.ipxe.org
- * issuer	boot.test.ipxe.org
- */
-CERTIFICATE ( not_ca_crt,
-	DATA ( 0x30, 0x82, 0x02, 0x7d, 0x30, 0x82, 0x01, 0xe6, 0x02, 0x01,
-	       0x02, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x81, 0x84, 0x31,
-	       0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02,
-	       0x47, 0x42, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04,
-	       0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64,
-	       0x67, 0x65, 0x73, 0x68, 0x69, 0x72, 0x65, 0x31, 0x12, 0x30,
-	       0x10, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x09, 0x43, 0x61,
-	       0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x31, 0x18, 0x30,
-	       0x16, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x0f, 0x46, 0x65,
-	       0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	       0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f, 0x06, 0x03, 0x55,
-	       0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f,
-	       0x72, 0x67, 0x31, 0x1b, 0x30, 0x19, 0x06, 0x03, 0x55, 0x04,
-	       0x03, 0x0c, 0x12, 0x62, 0x6f, 0x6f, 0x74, 0x2e, 0x74, 0x65,
-	       0x73, 0x74, 0x2e, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f, 0x72,
-	       0x67, 0x30, 0x1e, 0x17, 0x0d, 0x31, 0x32, 0x30, 0x33, 0x32,
-	       0x32, 0x30, 0x30, 0x30, 0x31, 0x33, 0x34, 0x5a, 0x17, 0x0d,
-	       0x31, 0x33, 0x30, 0x33, 0x32, 0x32, 0x30, 0x30, 0x30, 0x31,
-	       0x33, 0x34, 0x5a, 0x30, 0x81, 0x88, 0x31, 0x0b, 0x30, 0x09,
-	       0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02, 0x47, 0x42, 0x31,
-	       0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e,
-	       0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x73,
-	       0x68, 0x69, 0x72, 0x65, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03,
-	       0x55, 0x04, 0x07, 0x0c, 0x09, 0x43, 0x61, 0x6d, 0x62, 0x72,
-	       0x69, 0x64, 0x67, 0x65, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03,
-	       0x55, 0x04, 0x0a, 0x0c, 0x0f, 0x46, 0x65, 0x6e, 0x20, 0x53,
-	       0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20, 0x4c, 0x74, 0x64,
-	       0x31, 0x11, 0x30, 0x0f, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c,
-	       0x08, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f, 0x72, 0x67, 0x31,
-	       0x1f, 0x30, 0x1d, 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x16,
-	       0x6e, 0x6f, 0x74, 0x2e, 0x61, 0x2e, 0x63, 0x61, 0x2e, 0x74,
-	       0x65, 0x73, 0x74, 0x2e, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f,
-	       0x72, 0x67, 0x30, 0x81, 0x9f, 0x30, 0x0d, 0x06, 0x09, 0x2a,
-	       0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05, 0x00,
-	       0x03, 0x81, 0x8d, 0x00, 0x30, 0x81, 0x89, 0x02, 0x81, 0x81,
-	       0x00, 0xc3, 0x5b, 0x6d, 0xb3, 0x8d, 0x74, 0x9c, 0x1d, 0xbd,
-	       0x94, 0x41, 0xa2, 0x42, 0x96, 0x3c, 0x41, 0x82, 0xc0, 0xf1,
-	       0x95, 0xbf, 0xc5, 0x34, 0x92, 0x92, 0xa3, 0xed, 0xed, 0x5c,
-	       0x07, 0xaa, 0xb4, 0xc1, 0x66, 0xbb, 0xa6, 0xd1, 0xd9, 0x78,
-	       0x93, 0xf1, 0x9c, 0x3e, 0x13, 0x3a, 0xee, 0x74, 0x31, 0xeb,
-	       0x55, 0x86, 0xa5, 0x43, 0x8a, 0x5d, 0x0c, 0x2c, 0x0d, 0xfb,
-	       0x91, 0x9e, 0x31, 0x22, 0xbe, 0x96, 0xb5, 0x0e, 0x44, 0xc8,
-	       0x5b, 0x65, 0xb2, 0xf5, 0xec, 0x2a, 0x51, 0xed, 0x8f, 0x28,
-	       0xd8, 0xb2, 0x4b, 0x45, 0x39, 0x31, 0x1f, 0x11, 0xb7, 0x12,
-	       0xe3, 0xc6, 0xb2, 0xd2, 0x8d, 0x50, 0xd5, 0xf4, 0xd2, 0x71,
-	       0x77, 0xc9, 0x4c, 0x67, 0xee, 0xf7, 0xdc, 0xdb, 0x68, 0xa6,
-	       0xac, 0x33, 0xd4, 0xb2, 0x12, 0x61, 0x5c, 0xae, 0x4c, 0x2e,
-	       0x26, 0xe8, 0xdf, 0x46, 0x3a, 0x05, 0xaf, 0xeb, 0x0d, 0x02,
-	       0x03, 0x01, 0x00, 0x01, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86,
-	       0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x03,
-	       0x81, 0x81, 0x00, 0x90, 0x3e, 0x16, 0x27, 0x2f, 0x4e, 0x4b,
-	       0x31, 0x0e, 0xae, 0x31, 0x9d, 0x64, 0x88, 0x9f, 0xce, 0xd8,
-	       0x22, 0x51, 0x9d, 0xd9, 0x2b, 0xfe, 0xed, 0x75, 0xbe, 0xec,
-	       0x5a, 0x73, 0xaf, 0x6c, 0xa5, 0x5e, 0xd1, 0x15, 0x9a, 0x08,
-	       0xcf, 0x4d, 0x41, 0x78, 0x48, 0xb4, 0x29, 0xf1, 0xf7, 0x63,
-	       0x9b, 0x11, 0x91, 0x16, 0x94, 0x55, 0xff, 0xeb, 0xe9, 0x6f,
-	       0x0a, 0x34, 0x89, 0xed, 0xf2, 0xd1, 0x79, 0x91, 0x9d, 0xe5,
-	       0x73, 0x48, 0x68, 0x7f, 0x9b, 0xf4, 0x94, 0x80, 0x29, 0xbb,
-	       0x2f, 0xac, 0x6c, 0xf7, 0x6a, 0x43, 0xcc, 0x40, 0x34, 0x85,
-	       0xc8, 0xa1, 0x6d, 0x16, 0x36, 0x65, 0x3f, 0x93, 0x60, 0xc1,
-	       0x64, 0x33, 0x91, 0xa1, 0x8f, 0x86, 0x8c, 0xce, 0x14, 0x19,
-	       0x72, 0x28, 0xef, 0x94, 0x3d, 0x09, 0xb8, 0x3b, 0x39, 0xe8,
-	       0xd1, 0x66, 0x2b, 0x38, 0xb4, 0x46, 0x50, 0xf4, 0xcd, 0xc4,
-	       0x9a ),
-	FINGERPRINT ( 0x37, 0x6b, 0xc2, 0x20, 0xa9, 0xbc, 0xe2, 0x83,
-		      0x99, 0x60, 0x06, 0x2e, 0xaf, 0x94, 0xfe, 0xb0,
-		      0x1a, 0x2c, 0x17, 0x47, 0x1e, 0xc0, 0xd1, 0x66,
-		      0xb6, 0x76, 0xeb, 0x1c, 0x07, 0xae, 0x72, 0xf2 ) );
-
-/*
- * subject	bad.path.len.test.ipxe.org
- * issuer	iPXE self-test useless CA
- */
-CERTIFICATE ( bad_path_len_crt,
-	DATA ( 0x30, 0x82, 0x02, 0x88, 0x30, 0x82, 0x01, 0xf1, 0x02, 0x01,
-	       0x02, 0x30, 0x0d, 0x06, 0x09, 0x2a, 0x86, 0x48, 0x86, 0xf7,
-	       0x0d, 0x01, 0x01, 0x05, 0x05, 0x00, 0x30, 0x81, 0x8b, 0x31,
-	       0x0b, 0x30, 0x09, 0x06, 0x03, 0x55, 0x04, 0x06, 0x13, 0x02,
-	       0x47, 0x42, 0x31, 0x17, 0x30, 0x15, 0x06, 0x03, 0x55, 0x04,
-	       0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64,
-	       0x67, 0x65, 0x73, 0x68, 0x69, 0x72, 0x65, 0x31, 0x12, 0x30,
-	       0x10, 0x06, 0x03, 0x55, 0x04, 0x07, 0x0c, 0x09, 0x43, 0x61,
-	       0x6d, 0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x31, 0x18, 0x30,
-	       0x16, 0x06, 0x03, 0x55, 0x04, 0x0a, 0x0c, 0x0f, 0x46, 0x65,
-	       0x6e, 0x20, 0x53, 0x79, 0x73, 0x74, 0x65, 0x6d, 0x73, 0x20,
-	       0x4c, 0x74, 0x64, 0x31, 0x11, 0x30, 0x0f, 0x06, 0x03, 0x55,
-	       0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70, 0x78, 0x65, 0x2e, 0x6f,
-	       0x72, 0x67, 0x31, 0x22, 0x30, 0x20, 0x06, 0x03, 0x55, 0x04,
-	       0x03, 0x0c, 0x19, 0x69, 0x50, 0x58, 0x45, 0x20, 0x73, 0x65,
-	       0x6c, 0x66, 0x2d, 0x74, 0x65, 0x73, 0x74, 0x20, 0x75, 0x73,
-	       0x65, 0x6c, 0x65, 0x73, 0x73, 0x20, 0x43, 0x41, 0x30, 0x1e,
-	       0x17, 0x0d, 0x31, 0x32, 0x30, 0x33, 0x32, 0x32, 0x30, 0x30,
-	       0x30, 0x31, 0x33, 0x34, 0x5a, 0x17, 0x0d, 0x31, 0x33, 0x30,
-	       0x33, 0x32, 0x32, 0x30, 0x30, 0x30, 0x31, 0x33, 0x34, 0x5a,
-	       0x30, 0x81, 0x8c, 0x31, 0x0b, 0x30, 0x09, 0x06, 0x03, 0x55,
-	       0x04, 0x06, 0x13, 0x02, 0x47, 0x42, 0x31, 0x17, 0x30, 0x15,
-	       0x06, 0x03, 0x55, 0x04, 0x08, 0x0c, 0x0e, 0x43, 0x61, 0x6d,
-	       0x62, 0x72, 0x69, 0x64, 0x67, 0x65, 0x73, 0x68, 0x69, 0x72,
-	       0x65, 0x31, 0x12, 0x30, 0x10, 0x06, 0x03, 0x55, 0x04, 0x07,
-	       0x0c, 0x09, 0x43, 0x61, 0x6d, 0x62, 0x72, 0x69, 0x64, 0x67,
-	       0x65, 0x31, 0x18, 0x30, 0x16, 0x06, 0x03, 0x55, 0x04, 0x0a,
-	       0x0c, 0x0f, 0x46, 0x65, 0x6e, 0x20, 0x53, 0x79, 0x73, 0x74,
-	       0x65, 0x6d, 0x73, 0x20, 0x4c, 0x74, 0x64, 0x31, 0x11, 0x30,
-	       0x0f, 0x06, 0x03, 0x55, 0x04, 0x0b, 0x0c, 0x08, 0x69, 0x70,
-	       0x78, 0x65, 0x2e, 0x6f, 0x72, 0x67, 0x31, 0x23, 0x30, 0x21,
-	       0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x1a, 0x62, 0x61, 0x64,
-	       0x2e, 0x70, 0x61, 0x74, 0x68, 0x2e, 0x6c, 0x65, 0x6e, 0x2e,
-	       0x74, 0x65, 0x73, 0x74, 0x2e, 0x69, 0x70, 0x78, 0x65, 0x2e,
-	       0x6f, 0x72, 0x67, 0x30, 0x81, 0x9f, 0x30, 0x0d, 0x06, 0x09,
-	       0x2a, 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x01, 0x05,
-	       0x00, 0x03, 0x81, 0x8d, 0x00, 0x30, 0x81, 0x89, 0x02, 0x81,
-	       0x81, 0x00, 0xed, 0xf1, 0xe3, 0xb2, 0x61, 0x68, 0xa0, 0xd5,
-	       0x43, 0xfe, 0xad, 0xee, 0xfb, 0x8e, 0x2c, 0xf0, 0x44, 0xaf,
-	       0x0a, 0x3c, 0x87, 0xc2, 0x56, 0x9b, 0x66, 0x15, 0xc6, 0xbc,
-	       0x5b, 0x96, 0xef, 0xa1, 0x49, 0xd6, 0xe7, 0xeb, 0xb8, 0xf6,
-	       0x3d, 0x62, 0xf5, 0x51, 0xfd, 0xb1, 0xa5, 0x4e, 0x92, 0x7c,
-	       0x7a, 0x31, 0x1b, 0xb8, 0x21, 0x5c, 0xfe, 0x0b, 0x4e, 0x58,
-	       0xd6, 0xd0, 0x8b, 0x81, 0x00, 0x4a, 0xf8, 0xf7, 0x2a, 0xc9,
-	       0xea, 0xfa, 0x9c, 0xc9, 0x33, 0x0b, 0xc4, 0xce, 0x96, 0x4c,
-	       0x30, 0x6e, 0xf0, 0x07, 0xfa, 0x1b, 0x94, 0x1f, 0xe3, 0x3b,
-	       0xb2, 0x7d, 0x31, 0x1a, 0x37, 0x64, 0xe2, 0xc3, 0xf1, 0xe5,
-	       0xb9, 0xcc, 0xd1, 0x02, 0xae, 0x16, 0x39, 0x9b, 0xfc, 0x55,
-	       0xca, 0xdd, 0x33, 0x92, 0xe3, 0x12, 0x40, 0xc5, 0x32, 0x51,
-	       0x62, 0xac, 0x3a, 0xc0, 0x17, 0x36, 0xd0, 0x27, 0x3d, 0xbb,
-	       0x02, 0x03, 0x01, 0x00, 0x01, 0x30, 0x0d, 0x06, 0x09, 0x2a,
-	       0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x05, 0x05, 0x00,
-	       0x03, 0x81, 0x81, 0x00, 0x07, 0x53, 0x2a, 0x80, 0xd6, 0x25,
-	       0x10, 0x37, 0xce, 0x3b, 0x87, 0x87, 0xfc, 0xae, 0xe2, 0x2a,
-	       0x28, 0x3f, 0xf7, 0xa6, 0x32, 0x5b, 0x06, 0xbd, 0x4f, 0x34,
-	       0x6b, 0x47, 0x8a, 0x4b, 0x47, 0x51, 0xe8, 0x45, 0x69, 0xe3,
-	       0xf3, 0xdf, 0xa4, 0x25, 0x8f, 0x34, 0xbe, 0xe5, 0x2c, 0xa4,
-	       0x6c, 0x8c, 0x6e, 0x02, 0x74, 0x23, 0x43, 0x21, 0x4d, 0xe3,
-	       0x75, 0x93, 0x8e, 0xa8, 0x2c, 0x54, 0xba, 0x35, 0xe7, 0xab,
-	       0x44, 0xfa, 0x07, 0x7a, 0x18, 0xb4, 0xa7, 0xce, 0xfa, 0xa6,
-	       0x74, 0x5a, 0x45, 0x2c, 0x6f, 0x86, 0x34, 0x8f, 0x4a, 0x09,
-	       0xe0, 0xf3, 0x4f, 0x37, 0xbb, 0xa3, 0xa0, 0xcb, 0xad, 0x6b,
-	       0xc1, 0x16, 0x06, 0xdf, 0x83, 0x98, 0xaf, 0xa8, 0xc3, 0xa0,
-	       0x5f, 0x33, 0x09, 0x01, 0x12, 0xbd, 0xd3, 0x45, 0x9f, 0x5f,
-	       0x96, 0x93, 0xe9, 0x69, 0xe9, 0xb1, 0x8a, 0xe4, 0x94, 0xce,
-	       0xe4, 0x8d ),
-	FINGERPRINT ( 0xb6, 0x80, 0x84, 0xf1, 0x45, 0x55, 0x1f, 0xbc,
-		      0x15, 0xa6, 0xd8, 0x4b, 0xf3, 0x19, 0x65, 0xef,
-		      0x53, 0x5a, 0xc8, 0x99, 0xe5, 0xdf, 0x79, 0x07,
-		      0x00, 0x2c, 0x9f, 0x49, 0x91, 0x21, 0xeb, 0xfc ) );
-
-/** Valid certificate chain up to boot.test.ipxe.org */
-CHAIN ( server_chain, &server_crt, &leaf_crt, &intermediate_crt, &root_crt );
-
-/** Broken certificate chain up to boot.test.ipxe.org */
-CHAIN ( broken_server_chain, &server_crt, &leaf_crt, &root_crt );
-
-/** Incomplete certificate chain up to boot.test.ipxe.org */
-CHAIN ( incomplete_server_chain, &server_crt, &leaf_crt, &intermediate_crt );
-
-/** Non-functional certificate chain up to not_ca.test.ipxe.org */
-CHAIN ( not_ca_chain,
-	&not_ca_crt, &server_crt, &leaf_crt, &intermediate_crt, &root_crt );
-
-/** Valid certificate chain up to iPXE self-test useless CA */
-CHAIN ( useless_chain, &useless_crt, &leaf_crt,	&intermediate_crt, &root_crt );
-
-/** Non-functional certificate chain up to bad.path.len.test.ipxe.org */
-CHAIN ( bad_path_len_chain, &bad_path_len_crt, &useless_crt, &leaf_crt,
-	&intermediate_crt, &root_crt );
-
-/** Certificate store containing the iPXE self-test root CA */
-static struct x509_root test_root = {
-	.digest = &x509_test_algorithm,
-	.count = 1,
-	.fingerprints = root_crt_fingerprint,
-};
-
-/** Certificate store containing the iPXE self-test intermediate CA */
-static struct x509_root intermediate_root = {
-	.digest = &x509_test_algorithm,
-	.count = 1,
-	.fingerprints = intermediate_crt_fingerprint,
-};
-
-/** Dummy fingerprint (not matching any certificates) */
-static uint8_t dummy_fingerprint[] =
-	FINGERPRINT ( 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
-		      0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff,
-		      0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
-		      0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff );
-
-/** Certificate store containing a dummy fingerprint */
-static struct x509_root dummy_root = {
-	.digest = &x509_test_algorithm,
-	.count = 1,
-	.fingerprints = dummy_fingerprint,
-};
-
-/** Time at which all test certificates are valid */
-static time_t test_time = 1332374737ULL; /* Thu Mar 22 00:05:37 2012 */
-
-/** Time at which end-entity test certificates are invalid */
-static time_t test_expired = 1375573111ULL; /* Sat Aug  3 23:38:31 2013 */
-
-/** Time at which CA test certificates are invalid */
-static time_t test_ca_expired = 2205014905ULL; /* Wed Nov 16 00:08:25 2039 */
-
-/**
- * Report certificate parsing test result
- *
- * @v crt		Test certificate
- */
-#define x509_certificate_ok( crt ) do {					\
-	ok ( x509_certificate ( (crt)->data, (crt)->len,		\
-				&(crt)->cert ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report cached certificate parsing test result
- *
- * @v crt		Test certificate
- */
-#define x509_cached_ok( crt ) do {					\
-	struct x509_certificate *temp;					\
-	ok ( x509_certificate ( (crt)->data, (crt)->len,		\
-				&temp ) == 0 );				\
-	ok ( temp == (crt)->cert );					\
-	x509_put ( temp );						\
-	} while ( 0 )
-
-/**
- * Report certificate fingerprint test result
- *
- * @v crt		Test certificate
- */
-#define x509_fingerprint_ok( crt ) do {					\
-	uint8_t fingerprint[ x509_test_algorithm.digestsize ];		\
-	x509_fingerprint ( (crt)->cert, &x509_test_algorithm,		\
-			   fingerprint );				\
-	ok ( memcmp ( fingerprint, (crt)->fingerprint,			\
-		      sizeof ( fingerprint ) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report certificate issuer validation test result
- *
- * @v crt		Test certificate
- * @v issuer		Test issuer
- */
-#define x509_check_issuer_ok( crt, issuer ) do {			\
-	ok ( x509_check_issuer ( (crt)->cert, (issuer)->cert ) == 0 );	\
-	} while ( 0 )
-
-/**
- * Report certificate issuer validation failure test result
- *
- * @v crt		Test certificate
- * @v issuer		Test issuer
- */
-#define x509_check_issuer_fail_ok( crt, issuer ) do {			\
-	ok ( x509_check_issuer ( (crt)->cert, (issuer)->cert ) != 0 );	\
-	} while ( 0 )
-
-/**
- * Report certificate root validation test result
- *
- * @v crt		Test certificate
- * @v root		Test root certificate store
- */
-#define x509_check_root_ok( crt, root ) do {				\
-	ok ( x509_check_root ( (crt)->cert, root ) == 0 );		\
-	} while ( 0 )
-
-/**
- * Report certificate root validation failure test result
- *
- * @v crt		Test certificate
- * @v root		Test root certificate store
- */
-#define x509_check_root_fail_ok( crt, root ) do {			\
-	ok ( x509_check_root ( (crt)->cert, root ) != 0 );		\
-	} while ( 0 )
-
-/**
- * Report certificate time validation test result
- *
- * @v crt		Test certificate
- * @v time		Test time
- */
-#define x509_check_time_ok( crt, time ) do {				\
-	ok ( x509_check_time ( (crt)->cert, time ) == 0 );		\
-	} while ( 0 )
-
-/**
- * Report certificate time validation failure test result
- *
- * @v crt		Test certificate
- * @v time		Test time
- */
-#define x509_check_time_fail_ok( crt, time ) do {			\
-	ok ( x509_check_time ( (crt)->cert, time ) != 0 );		\
-	} while ( 0 )
-
-/**
- * Report certificate chain parsing test result
- *
- * @v chn		Test certificate chain
- */
-#define x509_chain_ok( chn ) do {					\
-	unsigned int i;							\
-	struct x509_certificate *first;					\
-	(chn)->chain = x509_alloc_chain();				\
-	ok ( (chn)->chain != NULL );					\
-	for ( i = 0 ; i < (chn)->count ; i++ ) {			\
-		ok ( x509_append ( (chn)->chain,			\
-				   (chn)->certs[i]->cert ) == 0 );	\
-	}								\
-	first = x509_first ( (chn)->chain );				\
-	ok ( first != NULL );						\
-	ok ( first->raw.len == (chn)->certs[0]->len );			\
-	ok ( memcmp ( first->raw.data, (chn)->certs[0]->data,		\
-		      first->raw.len ) == 0 );				\
-	} while ( 0 )
-
-/**
- * Report certificate chain validation test result
- *
- * @v chn		Test certificate chain
- * @v time		Test certificate validation time
- * @v root		Test root certificate store
- */
-#define x509_validate_chain_ok( chn, time, root ) do {			\
-	x509_invalidate_chain ( (chn)->chain );				\
-	ok ( x509_validate_chain ( (chn)->chain, (time),		\
-				   (root) ) == 0 );			\
-	} while ( 0 )
-
-/**
- * Report certificate chain validation failure test result
- *
- * @v chn		Test certificate chain
- * @v time		Test certificate validation time
- * @v root		Test root certificate store
- */
-#define x509_validate_chain_fail_ok( chn, time, root ) do {		\
-	x509_invalidate_chain ( (chn)->chain );				\
-	ok ( x509_validate_chain ( (chn)->chain, (time),		\
-				   (root) ) != 0 );			\
-	} while ( 0 )
-
-/**
- * Perform X.509 self-tests
- *
- */
-static void x509_test_exec ( void ) {
-
-	/* Parse all certificates */
-	x509_certificate_ok ( &root_crt );
-	x509_certificate_ok ( &intermediate_crt );
-	x509_certificate_ok ( &leaf_crt );
-	x509_certificate_ok ( &useless_crt );
-	x509_certificate_ok ( &server_crt );
-	x509_certificate_ok ( &not_ca_crt );
-	x509_certificate_ok ( &bad_path_len_crt );
-
-	/* Check cache functionality */
-	x509_cached_ok ( &root_crt );
-	x509_cached_ok ( &intermediate_crt );
-	x509_cached_ok ( &leaf_crt );
-	x509_cached_ok ( &useless_crt );
-	x509_cached_ok ( &server_crt );
-	x509_cached_ok ( &not_ca_crt );
-	x509_cached_ok ( &bad_path_len_crt );
-
-	/* Check all certificate fingerprints */
-	x509_fingerprint_ok ( &root_crt );
-	x509_fingerprint_ok ( &intermediate_crt );
-	x509_fingerprint_ok ( &leaf_crt );
-	x509_fingerprint_ok ( &useless_crt );
-	x509_fingerprint_ok ( &server_crt );
-	x509_fingerprint_ok ( &not_ca_crt );
-	x509_fingerprint_ok ( &bad_path_len_crt );
-
-	/* Check pairwise issuing */
-	x509_check_issuer_ok ( &intermediate_crt, &root_crt );
-	x509_check_issuer_ok ( &leaf_crt, &intermediate_crt );
-	x509_check_issuer_ok ( &useless_crt, &leaf_crt );
-	x509_check_issuer_ok ( &server_crt, &leaf_crt );
-	x509_check_issuer_fail_ok ( &not_ca_crt, &server_crt );
-	x509_check_issuer_ok ( &bad_path_len_crt, &useless_crt );
-
-	/* Check root certificate stores */
-	x509_check_root_ok ( &root_crt, &test_root );
-	x509_check_root_fail_ok ( &intermediate_crt, &test_root );
-	x509_check_root_ok ( &intermediate_crt, &intermediate_root );
-	x509_check_root_fail_ok ( &root_crt, &intermediate_root );
-	x509_check_root_fail_ok ( &root_crt, &dummy_root );
-
-	/* Check certificate validity periods */
-	x509_check_time_ok ( &server_crt, test_time );
-	x509_check_time_fail_ok ( &server_crt, test_expired );
-	x509_check_time_ok ( &root_crt, test_time );
-	x509_check_time_ok ( &root_crt, test_expired );
-	x509_check_time_fail_ok ( &root_crt, test_ca_expired );
-
-	/* Parse all certificate chains */
-	x509_chain_ok ( &server_chain );
-	x509_chain_ok ( &broken_server_chain );
-	x509_chain_ok ( &incomplete_server_chain );
-	x509_chain_ok ( &not_ca_chain );
-	x509_chain_ok ( &useless_chain );
-	x509_chain_ok ( &bad_path_len_chain );
-
-	/* Check certificate chains */
-	x509_validate_chain_ok ( &server_chain, test_time, &test_root );
-	x509_validate_chain_ok ( &server_chain, test_time, &intermediate_root );
-	x509_validate_chain_fail_ok ( &server_chain, test_time, &dummy_root );
-	x509_validate_chain_fail_ok ( &broken_server_chain, test_time,
-				      &test_root );
-	x509_validate_chain_fail_ok ( &incomplete_server_chain, test_time,
-				      &test_root );
-	x509_validate_chain_ok ( &incomplete_server_chain, test_time,
-				 &intermediate_root );
-	x509_validate_chain_fail_ok ( &not_ca_chain, test_time, &test_root );
-	x509_validate_chain_ok ( &useless_chain, test_time, &test_root );
-	x509_validate_chain_fail_ok ( &bad_path_len_chain, test_time,
-				      &test_root );
-
-	/* Check certificate chain expiry times */
-	x509_validate_chain_fail_ok ( &server_chain, test_expired, &test_root );
-	x509_validate_chain_ok ( &useless_chain, test_expired, &test_root );
-	x509_validate_chain_fail_ok ( &useless_chain, test_ca_expired,
-				      &test_root );
-
-	/* Drop chain references */
-	x509_chain_put ( bad_path_len_chain.chain );
-	x509_chain_put ( useless_chain.chain );
-	x509_chain_put ( not_ca_chain.chain );
-	x509_chain_put ( incomplete_server_chain.chain );
-	x509_chain_put ( broken_server_chain.chain );
-	x509_chain_put ( server_chain.chain );
-
-	/* Drop certificate references */
-	x509_put ( bad_path_len_crt.cert );
-	x509_put ( not_ca_crt.cert );
-	x509_put ( server_crt.cert );
-	x509_put ( useless_crt.cert );
-	x509_put ( leaf_crt.cert );
-	x509_put ( intermediate_crt.cert );
-	x509_put ( root_crt.cert );
-}
-
-/** X.509 self-test */
-struct self_test x509_test __self_test = {
-	.name = "x509",
-	.exec = x509_test_exec,
-};
-
-/* Drag in algorithms required for tests */
-REQUIRE_OBJECT ( rsa );
-REQUIRE_OBJECT ( sha1 );
-REQUIRE_OBJECT ( sha256 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/autoboot.c ipxe-1.0.1~lliurex1505/src/usr/autoboot.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/autoboot.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/autoboot.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -30,18 +29,11 @@
 #include <ipxe/uri.h>
 #include <ipxe/open.h>
 #include <ipxe/init.h>
-#include <ipxe/keys.h>
-#include <ipxe/version.h>
-#include <ipxe/shell.h>
-#include <ipxe/features.h>
-#include <ipxe/image.h>
-#include <ipxe/timer.h>
 #include <usr/ifmgmt.h>
 #include <usr/route.h>
+#include <usr/dhcpmgmt.h>
 #include <usr/imgmgmt.h>
-#include <usr/prompt.h>
 #include <usr/autoboot.h>
-#include <config/general.h>
 
 /** @file
  *
@@ -54,18 +46,6 @@
 #define EINFO_ENOENT_BOOT \
 	__einfo_uniqify ( EINFO_ENOENT, 0x01, "Nothing to boot" )
 
-#define NORMAL	"\033[0m"
-#define BOLD	"\033[1m"
-#define CYAN	"\033[36m"
-
-/** The "scriptlet" setting */
-struct setting scriptlet_setting __setting ( SETTING_MISC ) = {
-	.name = "scriptlet",
-	.description = "Boot scriptlet",
-	.tag = DHCP_EB_SCRIPTLET,
-	.type = &setting_type_string,
-};
-
 /**
  * Perform PXE menu boot when PXE stack is not available
  */
@@ -151,7 +131,6 @@
  */
 int uriboot ( struct uri *filename, struct uri *root_path, int drive,
 	      unsigned int flags ) {
-	struct image *image;
 	int rc;
 
 	/* Hook SAN device, if applicable */
@@ -178,11 +157,9 @@
 
 	/* Attempt filename boot if applicable */
 	if ( filename ) {
-		if ( ( rc = imgdownload ( filename, &image ) ) != 0 )
-			goto err_download;
-		image->flags |= IMAGE_AUTO_UNREGISTER;
-		if ( ( rc = image_exec ( image ) ) != 0 ) {
-			printf ( "Could not boot image: %s\n",
+		if ( ( rc = imgdownload ( filename, NULL, NULL,
+					  image_exec ) ) != 0 ) {
+			printf ( "\nCould not chain image: %s\n",
 				 strerror ( rc ) );
 			/* Fall through to (possibly) attempt a SAN boot
 			 * as a fallback.  If no SAN boot is attempted,
@@ -213,7 +190,6 @@
 		}
 	}
 
- err_download:
  err_san_describe:
 	/* Unhook SAN device, if applicable */
 	if ( ( drive >= 0 ) && ! ( flags & URIBOOT_NO_SAN_UNHOOK ) ) {
@@ -251,42 +227,31 @@
  * @ret uri		URI, or NULL on failure
  */
 struct uri * fetch_next_server_and_filename ( struct settings *settings ) {
-	struct in_addr next_server = { 0 };
-	char *raw_filename = NULL;
-	struct uri *uri = NULL;
+	struct in_addr next_server;
+	char buf[256];
 	char *filename;
+	struct uri *uri;
 
-	/* Determine settings block containing the filename, if any */
-	settings = fetch_setting_origin ( settings, &filename_setting );
+	/* Fetch next-server setting */
+	fetch_ipv4_setting ( settings, &next_server_setting, &next_server );
+	if ( next_server.s_addr )
+		printf ( "Next server: %s\n", inet_ntoa ( next_server ) );
 
-	/* If we have a filename, fetch it along with next-server */
-	if ( settings ) {
-		fetch_ipv4_setting ( settings, &next_server_setting,
-				     &next_server );
-		if ( fetch_string_setting_copy ( settings, &filename_setting,
-						 &raw_filename ) < 0 )
-			goto err_fetch;
-	}
+	/* Fetch filename setting */
+	fetch_string_setting ( settings, &filename_setting,
+			       buf, sizeof ( buf ) );
+	if ( buf[0] )
+		printf ( "Filename: %s\n", buf );
 
 	/* Expand filename setting */
-	filename = expand_settings ( raw_filename ? raw_filename : "" );
+	filename = expand_settings ( buf );
 	if ( ! filename )
-		goto err_expand;
+		return NULL;
 
 	/* Parse next server and filename */
-	if ( next_server.s_addr )
-		printf ( "Next server: %s\n", inet_ntoa ( next_server ) );
-	if ( filename[0] )
-		printf ( "Filename: %s\n", filename );
 	uri = parse_next_server_and_filename ( next_server, filename );
-	if ( ! uri )
-		goto err_parse;
 
- err_parse:
 	free ( filename );
- err_expand:
-	free ( raw_filename );
- err_fetch:
 	return uri;
 }
 
@@ -364,8 +329,8 @@
 		goto err_ifopen;
 	ifstat ( netdev );
 
-	/* Configure device */
-	if ( ( rc = ifconf ( netdev, NULL ) ) != 0 )
+	/* Configure device via DHCP */
+	if ( ( rc = dhcp ( netdev ) ) != 0 )
 		goto err_dhcp;
 	route();
 
@@ -453,80 +418,3 @@
 	printf ( "No more network devices\n" );
 	return rc;
 }
-
-/**
- * Prompt for shell entry
- *
- * @ret	enter_shell	User wants to enter shell
- */
-static int shell_banner ( void ) {
-
-	/* Skip prompt if timeout is zero */
-	if ( BANNER_TIMEOUT <= 0 )
-		return 0;
-
-	/* Prompt user */
-	printf ( "\n" );
-	return ( prompt ( "Press Ctrl-B for the iPXE command line...",
-			  ( ( BANNER_TIMEOUT * TICKS_PER_SEC ) / 10 ),
-			  CTRL_B ) == 0 );
-}
-
-/**
- * Main iPXE flow of execution
- *
- * @v netdev		Network device, or NULL
- */
-void ipxe ( struct net_device *netdev ) {
-	struct feature *feature;
-	struct image *image;
-	char *scriptlet;
-
-	/*
-	 * Print welcome banner
-	 *
-	 *
-	 * If you wish to brand this build of iPXE, please do so by
-	 * defining the string PRODUCT_NAME in config/general.h.
-	 *
-	 * While nothing in the GPL prevents you from removing all
-	 * references to iPXE or http://ipxe.org, we prefer you not to
-	 * do so.
-	 *
-	 */
-	printf ( NORMAL "\n\n" PRODUCT_NAME "\n" BOLD "iPXE %s"
-		 NORMAL " -- Open Source Network Boot Firmware -- "
-		 CYAN "http://ipxe.org" NORMAL "\n"
-		 "Features:", product_version );
-	for_each_table_entry ( feature, FEATURES )
-		printf ( " %s", feature->name );
-	printf ( "\n" );
-
-	/* Boot system */
-	if ( ( image = first_image() ) != NULL ) {
-		/* We have an embedded image; execute it */
-		image_exec ( image );
-	} else if ( shell_banner() ) {
-		/* User wants shell; just give them a shell */
-		shell();
-	} else {
-		fetch_string_setting_copy ( NULL, &scriptlet_setting,
-					    &scriptlet );
-		if ( scriptlet ) {
-			/* User has defined a scriptlet; execute it */
-			system ( scriptlet );
-			free ( scriptlet );
-		} else {
-			/* Try booting.  If booting fails, offer the
-			 * user another chance to enter the shell.
-			 */
-			if ( netdev ) {
-				netboot ( netdev );
-			} else {
-				autoboot();
-			}
-			if ( shell_banner() )
-				shell();
-		}
-	}
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/dhcpmgmt.c ipxe-1.0.1~lliurex1505/src/usr/dhcpmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/dhcpmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/dhcpmgmt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -25,22 +24,57 @@
 #include <ipxe/netdevice.h>
 #include <ipxe/dhcp.h>
 #include <ipxe/monojob.h>
+#include <ipxe/process.h>
 #include <usr/ifmgmt.h>
 #include <usr/dhcpmgmt.h>
 
+#define LINK_WAIT_MS	15000
+
 /** @file
  *
  * DHCP management
  *
  */
 
+int dhcp ( struct net_device *netdev ) {
+	struct dhcphdr *dhcphdr;
+	typeof ( dhcphdr->chaddr ) chaddr;
+	unsigned int hlen;
+	unsigned int i;
+	int rc;
+
+	/* Check we can open the interface first */
+	if ( ( rc = ifopen ( netdev ) ) != 0 )
+		return rc;
+
+	/* Wait for link-up */
+	if ( ( rc = iflinkwait ( netdev, LINK_WAIT_MS ) ) != 0 )
+		return rc;
+
+	/* Perform DHCP */
+	printf ( "DHCP (%s", netdev->name );
+	hlen = dhcp_chaddr ( netdev, chaddr, NULL );
+	for ( i = 0 ; i < hlen ; i++ )
+		printf ( "%c%02x", ( i ? ':' : ' ' ), chaddr[i] );
+	printf ( ")" );
+
+	if ( ( rc = start_dhcp ( &monojob, netdev ) ) == 0 ) {
+		rc = monojob_wait ( "" );
+	} else if ( rc > 0 ) {
+		printf ( " using cached\n" );
+		rc = 0;
+	}
+
+	return rc;
+}
+
 int pxebs ( struct net_device *netdev, unsigned int pxe_type ) {
 	int rc;
 
 	/* Perform PXE Boot Server Discovery */
 	printf ( "PXEBS (%s type %d)", netdev->name, pxe_type );
 	if ( ( rc = start_pxebs ( &monojob, netdev, pxe_type ) ) == 0 )
-		rc = monojob_wait ( "", 0 );
+		rc = monojob_wait ( "" );
 
 	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/fcmgmt.c ipxe-1.0.1~lliurex1505/src/usr/fcmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/fcmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/fcmgmt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -112,5 +111,5 @@
 	}
 
 	/* Wait for ELS to complete */
-	return monojob_wait ( "", 0 );
+	return monojob_wait ( "" );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/ifmgmt.c ipxe-1.0.1~lliurex1505/src/usr/ifmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/ifmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/ifmgmt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -26,10 +25,8 @@
 #include <ipxe/console.h>
 #include <ipxe/netdevice.h>
 #include <ipxe/device.h>
-#include <ipxe/job.h>
-#include <ipxe/monojob.h>
-#include <ipxe/nap.h>
-#include <ipxe/timer.h>
+#include <ipxe/process.h>
+#include <ipxe/keys.h>
 #include <usr/ifmgmt.h>
 
 /** @file
@@ -38,15 +35,6 @@
  *
  */
 
-/** Default time to wait for link-up */
-#define LINK_WAIT_TIMEOUT ( 15 * TICKS_PER_SEC )
-
-/** Default unsuccessful configuration status code */
-#define EADDRNOTAVAIL_CONFIG __einfo_error ( EINFO_EADDRNOTAVAIL_CONFIG )
-#define EINFO_EADDRNOTAVAIL_CONFIG					\
-	__einfo_uniqify ( EINFO_EADDRNOTAVAIL, 0x01,			\
-			  "No configuration methods succeeded" )
-
 /**
  * Open network device
  *
@@ -115,179 +103,46 @@
 	ifstat_errors ( &netdev->rx_stats, "RXE" );
 }
 
-/** Network device poller */
-struct ifpoller {
-	/** Job control interface */
-	struct interface job;
-	/** Network device */
-	struct net_device *netdev;
-	/** Network device configurator (if applicable) */
-	struct net_device_configurator *configurator;
-	/**
-	 * Check progress
-	 *
-	 * @v ifpoller		Network device poller
-	 * @ret ongoing_rc	Ongoing job status code (if known)
-	 */
-	int ( * progress ) ( struct ifpoller *ifpoller );
-};
-
-/**
- * Report network device poller progress
- *
- * @v ifpoller		Network device poller
- * @v progress		Progress report to fill in
- * @ret ongoing_rc	Ongoing job status code (if known)
- */
-static int ifpoller_progress ( struct ifpoller *ifpoller,
-			       struct job_progress *progress __unused ) {
-
-	/* Reduce CPU utilisation */
-	cpu_nap();
-
-	/* Hand off to current progress checker */
-	return ifpoller->progress ( ifpoller );
-}
-
-/** Network device poller operations */
-static struct interface_operation ifpoller_job_op[] = {
-	INTF_OP ( job_progress, struct ifpoller *, ifpoller_progress ),
-};
-
-/** Network device poller descriptor */
-static struct interface_descriptor ifpoller_job_desc =
-	INTF_DESC ( struct ifpoller, job, ifpoller_job_op );
-
-/**
- * Poll network device until completion
- *
- * @v netdev		Network device
- * @v configurator	Network device configurator (if applicable)
- * @v timeout		Timeout period, in ticks
- * @v progress		Method to check progress
- * @ret rc		Return status code
- */
-static int ifpoller_wait ( struct net_device *netdev,
-			   struct net_device_configurator *configurator,
-			   unsigned long timeout,
-			   int ( * progress ) ( struct ifpoller *ifpoller ) ) {
-	static struct ifpoller ifpoller = {
-		.job = INTF_INIT ( ifpoller_job_desc ),
-	};
-
-	ifpoller.netdev = netdev;
-	ifpoller.configurator = configurator;
-	ifpoller.progress = progress;
-	intf_plug_plug ( &monojob, &ifpoller.job );
-	return monojob_wait ( "", timeout );
-}
-
-/**
- * Check link-up progress
- *
- * @v ifpoller		Network device poller
- * @ret ongoing_rc	Ongoing job status code (if known)
- */
-static int iflinkwait_progress ( struct ifpoller *ifpoller ) {
-	struct net_device *netdev = ifpoller->netdev;
-	int ongoing_rc = netdev->link_rc;
-
-	/* Terminate successfully if link is up */
-	if ( ongoing_rc == 0 )
-		intf_close ( &ifpoller->job, 0 );
-
-	/* Otherwise, report link status as ongoing job status */
-	return ongoing_rc;
-}
-
 /**
  * Wait for link-up, with status indication
  *
  * @v netdev		Network device
- * @v timeout		Timeout period, in ticks
+ * @v max_wait_ms	Maximum time to wait, in ms
  */
-int iflinkwait ( struct net_device *netdev, unsigned long timeout ) {
+int iflinkwait ( struct net_device *netdev, unsigned int max_wait_ms ) {
+	int key;
 	int rc;
 
-	/* Ensure device is open */
-	if ( ( rc = ifopen ( netdev ) ) != 0 )
-		return rc;
-
-	/* Return immediately if link is already up */
-	netdev_poll ( netdev );
 	if ( netdev_link_ok ( netdev ) )
 		return 0;
 
-	/* Wait for link-up */
-	printf ( "Waiting for link-up on %s", netdev->name );
-	return ifpoller_wait ( netdev, NULL, timeout, iflinkwait_progress );
-}
+	printf ( "Waiting for link-up on %s...", netdev->name );
 
-/**
- * Check configuration progress
- *
- * @v ifpoller		Network device poller
- * @ret ongoing_rc	Ongoing job status code (if known)
- */
-static int ifconf_progress ( struct ifpoller *ifpoller ) {
-	struct net_device *netdev = ifpoller->netdev;
-	struct net_device_configurator *configurator = ifpoller->configurator;
-	struct net_device_configuration *config;
-	int rc;
-
-	/* Do nothing unless configuration has completed */
-	if ( netdev_configuration_in_progress ( netdev ) )
-		return 0;
-
-	/* Terminate with appropriate overall return status code */
-	if ( configurator ) {
-		config = netdev_configuration ( netdev, configurator );
-		rc = config->rc;
-	} else {
-		rc = ( netdev_configuration_ok ( netdev ) ?
-		       0 : -EADDRNOTAVAIL_CONFIG );
+	while ( 1 ) {
+		if ( netdev_link_ok ( netdev ) ) {
+			rc = 0;
+			break;
+		}
+		if ( max_wait_ms-- == 0 ) {
+			rc = netdev->link_rc;
+			break;
+		}
+		step();
+		if ( iskey() ) {
+			key = getchar();
+			if ( key == CTRL_C ) {
+				rc = -ECANCELED;
+				break;
+			}
+		}
+		mdelay ( 1 );
 	}
-	intf_close ( &ifpoller->job, rc );
-
-	return rc;
-}
 
-/**
- * Perform network device configuration
- *
- * @v netdev		Network device
- * @v configurator	Network device configurator, or NULL to use all
- * @ret rc		Return status code
- */
-int ifconf ( struct net_device *netdev,
-	     struct net_device_configurator *configurator ) {
-	int rc;
-
-	/* Ensure device is open and link is up */
-	if ( ( rc = iflinkwait ( netdev, LINK_WAIT_TIMEOUT ) ) != 0 )
-		return rc;
-
-	/* Start configuration */
-	if ( configurator ) {
-		if ( ( rc = netdev_configure ( netdev, configurator ) ) != 0 ) {
-			printf ( "Could not configure %s via %s: %s\n",
-				 netdev->name, configurator->name,
-				 strerror ( rc ) );
-			return rc;
-		}
+	if ( rc == 0 ) {
+		printf ( " ok\n" );
 	} else {
-		if ( ( rc = netdev_configure_all ( netdev ) ) != 0 ) {
-			printf ( "Could not configure %s: %s\n",
-				 netdev->name, strerror ( rc ) );
-			return rc;
-		}
+		printf ( " failed: %s\n", strerror ( rc ) );
 	}
 
-	/* Wait for configuration to complete */
-	printf ( "Configuring %s%s%s(%s %s)",
-		 ( configurator ? "[" : "" ),
-		 ( configurator ? configurator->name : "" ),
-		 ( configurator ? "] " : "" ),
-		 netdev->name, netdev->ll_protocol->ntoa ( netdev->ll_addr ) );
-	return ifpoller_wait ( netdev, configurator, 0, ifconf_progress );
+	return rc;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/imgmgmt.c ipxe-1.0.1~lliurex1505/src/usr/imgmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/imgmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/imgmgmt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -37,25 +36,39 @@
  */
 
 /**
- * Download a new image
+ * Download an image
  *
  * @v uri		URI
- * @v image		Image to fill in
+ * @v name		Image name, or NULL to use default
+ * @v cmdline		Command line, or NULL for no command line
+ * @v action		Action to take upon a successful download, or NULL
  * @ret rc		Return status code
  */
-int imgdownload ( struct uri *uri, struct image **image ) {
+int imgdownload ( struct uri *uri, const char *name, const char *cmdline,
+		  int ( * action ) ( struct image *image ) ) {
+	struct image *image;
 	size_t len = ( unparse_uri ( NULL, 0, uri, URI_ALL ) + 1 );
 	char uri_string_redacted[len];
 	const char *password;
 	int rc;
 
 	/* Allocate image */
-	*image = alloc_image ( uri );
-	if ( ! *image ) {
+	image = alloc_image();
+	if ( ! image ) {
 		rc = -ENOMEM;
 		goto err_alloc_image;
 	}
 
+	/* Set image name */
+	if ( name )
+		image_set_name ( image, name );
+
+	/* Set image URI */
+	image_set_uri ( image, uri );
+
+	/* Set image command line */
+	image_set_cmdline ( image, cmdline );
+
 	/* Redact password portion of URI, if necessary */
 	password = uri->password;
 	if ( password )
@@ -65,76 +78,60 @@
 	uri->password = password;
 
 	/* Create downloader */
-	if ( ( rc = create_downloader ( &monojob, *image, LOCATION_URI,
+	if ( ( rc = create_downloader ( &monojob, image, LOCATION_URI,
 					uri ) ) != 0 ) {
-		printf ( "Could not start download: %s\n", strerror ( rc ) );
 		goto err_create_downloader;
 	}
 
 	/* Wait for download to complete */
-	if ( ( rc = monojob_wait ( uri_string_redacted, 0 ) ) != 0 )
+	if ( ( rc = monojob_wait ( uri_string_redacted ) ) != 0 )
 		goto err_monojob_wait;
 
 	/* Register image */
-	if ( ( rc = register_image ( *image ) ) != 0 ) {
-		printf ( "Could not register image: %s\n", strerror ( rc ) );
+	if ( ( rc = register_image ( image ) ) != 0 )
 		goto err_register_image;
-	}
 
 	/* Drop local reference to image.  Image is guaranteed to
 	 * remain in scope since it is registered.
 	 */
-	image_put ( *image );
+	image_put ( image );
 
-	return 0;
+	/* Carry out specified post-download action, if applicable */
+	return ( action ? action ( image ) : 0 );
 
  err_register_image:
  err_monojob_wait:
  err_create_downloader:
-	image_put ( *image );
+	image_put ( image );
  err_alloc_image:
 	return rc;
 }
 
 /**
- * Download a new image
+ * Download an image
  *
- * @v uri_string	URI string
- * @v image		Image to fill in
+ * @v uri_string	URI as a string (e.g. "http://www.nowhere.com/vmlinuz")
+ * @v name		Image name, or NULL to use default
+ * @v cmdline		Command line, or NULL for no command line
+ * @v action		Action to take upon a successful download
  * @ret rc		Return status code
  */
-int imgdownload_string ( const char *uri_string, struct image **image ) {
+int imgdownload_string ( const char *uri_string, const char *name,
+			 const char *cmdline,
+			 int ( * action ) ( struct image *image ) ) {
 	struct uri *uri;
 	int rc;
 
 	if ( ! ( uri = parse_uri ( uri_string ) ) )
 		return -ENOMEM;
 
-	rc = imgdownload ( uri, image );
+	rc = imgdownload ( uri, name, cmdline, action );
 
 	uri_put ( uri );
 	return rc;
 }
 
 /**
- * Acquire an image
- *
- * @v name_uri		Name or URI string
- * @v image		Image to fill in
- * @ret rc		Return status code
- */
-int imgacquire ( const char *name_uri, struct image **image ) {
-
-	/* If we already have an image with the specified name, use it */
-	*image = find_image ( name_uri );
-	if ( *image )
-		return 0;
-
-	/* Otherwise, download a new image */
-	return imgdownload_string ( name_uri, image );
-}
-
-/**
  * Display status of an image
  *
  * @v image		Executable/loadable image
@@ -143,13 +140,18 @@
 	printf ( "%s : %zd bytes", image->name, image->len );
 	if ( image->type )
 		printf ( " [%s]", image->type->name );
-	if ( image->flags & IMAGE_TRUSTED )
-		printf ( " [TRUSTED]" );
 	if ( image->flags & IMAGE_SELECTED )
 		printf ( " [SELECTED]" );
-	if ( image->flags & IMAGE_AUTO_UNREGISTER )
-		printf ( " [AUTOFREE]" );
 	if ( image->cmdline )
 		printf ( " \"%s\"", image->cmdline );
 	printf ( "\n" );
 }
+
+/**
+ * Free an image
+ *
+ * @v image		Executable/loadable image
+ */
+void imgfree ( struct image *image ) {
+	unregister_image ( image );
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/imgtrust.c ipxe-1.0.1~lliurex1505/src/usr/imgtrust.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/imgtrust.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/imgtrust.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,110 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <errno.h>
-#include <time.h>
-#include <syslog.h>
-#include <ipxe/uaccess.h>
-#include <ipxe/image.h>
-#include <ipxe/cms.h>
-#include <ipxe/validator.h>
-#include <ipxe/monojob.h>
-#include <usr/imgtrust.h>
-
-/** @file
- *
- * Image trust management
- *
- */
-
-/**
- * Verify image using downloaded signature
- *
- * @v image		Image to verify
- * @v signature		Image containing signature
- * @v name		Required common name, or NULL to allow any name
- * @ret rc		Return status code
- */
-int imgverify ( struct image *image, struct image *signature,
-		const char *name ) {
-	size_t len;
-	void *data;
-	struct cms_signature *sig;
-	struct cms_signer_info *info;
-	time_t now;
-	int rc;
-
-	/* Mark image as untrusted */
-	image_untrust ( image );
-
-	/* Copy signature to internal memory */
-	len = signature->len;
-	data = malloc ( len );
-	if ( ! data ) {
-		rc = -ENOMEM;
-		goto err_alloc;
-	}
-	copy_from_user ( data, signature->data, 0, len );
-
-	/* Parse signature */
-	if ( ( rc = cms_signature ( data, len, &sig ) ) != 0 )
-		goto err_parse;
-
-	/* Free internal copy of signature */
-	free ( data );
-	data = NULL;
-
-	/* Complete all certificate chains */
-	list_for_each_entry ( info, &sig->info, list ) {
-		if ( ( rc = create_validator ( &monojob, info->chain ) ) != 0 )
-			goto err_create_validator;
-		if ( ( rc = monojob_wait ( NULL, 0 ) ) != 0 )
-			goto err_validator_wait;
-	}
-
-	/* Use signature to verify image */
-	now = time ( NULL );
-	if ( ( rc = cms_verify ( sig, image->data, image->len,
-				 name, now, NULL ) ) != 0 )
-		goto err_verify;
-
-	/* Drop reference to signature */
-	cms_put ( sig );
-	sig = NULL;
-
-	/* Mark image as trusted */
-	image_trust ( image );
-	syslog ( LOG_NOTICE, "Image \"%s\" signature OK\n", image->name );
-
-	return 0;
-
- err_verify:
- err_validator_wait:
- err_create_validator:
-	cms_put ( sig );
- err_parse:
-	free ( data );
- err_alloc:
-	syslog ( LOG_ERR, "Image \"%s\" signature bad: %s\n",
-		 image->name, strerror ( rc ) );
-	return rc;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/iwmgmt.c ipxe-1.0.1~lliurex1505/src/usr/iwmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/iwmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/iwmgmt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,13 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
 #include <stdio.h>
+#include <ipxe/console.h>
 #include <string.h>
 #include <errno.h>
 #include <ipxe/net80211.h>
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/lotest.c ipxe-1.0.1~lliurex1505/src/usr/lotest.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/lotest.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/lotest.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -39,6 +38,8 @@
  *
  */
 
+#define LINK_WAIT_MS 15000
+
 /**
  * Process received packet
  *
@@ -173,8 +174,7 @@
  */
 int loopback_test ( struct net_device *sender, struct net_device *receiver,
 		    size_t mtu ) {
-	uint8_t *buf;
-	uint32_t *seq;
+	uint8_t buf[mtu];
 	struct io_buffer *iobuf;
 	unsigned int i;
 	unsigned int successes;
@@ -187,19 +187,11 @@
 		return rc;
 
 	/* Wait for link-up */
-	if ( ( rc = iflinkwait ( sender, 0 ) ) != 0 )
+	if ( ( rc = iflinkwait ( sender, LINK_WAIT_MS ) ) != 0 )
 		return rc;
-	if ( ( rc = iflinkwait ( receiver, 0 ) ) != 0 )
+	if ( ( rc = iflinkwait ( receiver, LINK_WAIT_MS ) ) != 0 )
 		return rc;
 
-	/* Allocate data buffer */
-	if ( mtu < sizeof ( *seq ) )
-		mtu = sizeof ( *seq );
-	buf = malloc ( mtu );
-	if ( ! buf )
-		return -ENOMEM;
-	seq = ( ( void * ) buf );
-
 	/* Print initial statistics */
 	printf ( "Performing loopback test from %s to %s with %zd byte MTU\n",
 		 sender->name, receiver->name, mtu );
@@ -218,17 +210,17 @@
 		printf ( "\r%d", successes );
 
 		/* Generate random packet */
-		*seq = htonl ( successes );
-		for ( i = sizeof ( *seq ) ; i < mtu ; i++ )
+		for ( i = 0 ; i < sizeof ( buf ) ; i++ )
 			buf[i] = random();
-		iobuf = alloc_iob ( MAX_LL_HEADER_LEN + mtu );
+		iobuf = alloc_iob ( MAX_LL_HEADER_LEN + sizeof ( buf ) );
 		if ( ! iobuf ) {
 			printf ( "\nFailed to allocate I/O buffer" );
 			rc = -ENOMEM;
 			break;
 		}
 		iob_reserve ( iobuf, MAX_LL_HEADER_LEN );
-		memcpy ( iob_put ( iobuf, mtu ), buf, mtu );
+		memcpy ( iob_put ( iobuf, sizeof ( buf ) ),
+			 buf, sizeof ( buf ) );
 
 		/* Transmit packet */
 		if ( ( rc = net_tx ( iob_disown ( iobuf ), sender,
@@ -240,8 +232,10 @@
 		}
 
 		/* Wait for received packet */
-		if ( ( rc = loopback_wait ( receiver, buf, mtu ) ) != 0 )
+		if ( ( rc = loopback_wait ( receiver, buf,
+					    sizeof ( buf ) ) ) != 0 ) {
 			break;
+		}
 	}
 
 	printf ( "\n");
@@ -251,8 +245,5 @@
 	ifstat ( sender );
 	ifstat ( receiver );
 
-	/* Free buffer */
-	free ( buf );
-
 	return 0;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/neighmgmt.c ipxe-1.0.1~lliurex1505/src/usr/neighmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/neighmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/neighmgmt.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,56 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <ipxe/neighbour.h>
-#include <usr/neighmgmt.h>
-
-/** @file
- *
- * Neighbour management
- *
- */
-
-/**
- * Print neighbour table
- *
- */
-void nstat ( void ) {
-	struct neighbour *neighbour;
-	struct net_device *netdev;
-	struct ll_protocol *ll_protocol;
-	struct net_protocol *net_protocol;
-
-	list_for_each_entry ( neighbour, &neighbours, list ) {
-		netdev = neighbour->netdev;
-		ll_protocol = netdev->ll_protocol;
-		net_protocol = neighbour->net_protocol;
-		printf ( "%s %s %s is %s %s", netdev->name, net_protocol->name,
-			 net_protocol->ntoa ( neighbour->net_dest ),
-			 ll_protocol->name,
-			 ( neighbour_has_ll_dest ( neighbour ) ?
-			   ll_protocol->ntoa ( neighbour->ll_dest ) :
-			   "(incomplete)" ) );
-		if ( neighbour->discovery )
-			printf ( " (%s)", neighbour->discovery->name );
-		printf ( "\n" );
-	}
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/nslookup.c ipxe-1.0.1~lliurex1505/src/usr/nslookup.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/nslookup.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/nslookup.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,196 +0,0 @@
-/*
- * Copyright (C) 2012 Patrick Plenefisch <phplenefisch@wpi.edu>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-#include <ipxe/resolv.h>
-#include <ipxe/tcpip.h>
-#include <ipxe/monojob.h>
-#include <ipxe/settings.h>
-#include <usr/nslookup.h>
-
-/** @file
- *
- * Standalone name resolution
- *
- */
-
-/** A name resolution request */
-struct nslookup {
-	/** Reference count for this object */
-	struct refcnt refcnt;
-
-	/** Job control interface */
-	struct interface job;
-	/** Data transfer interface */
-	struct interface resolver;
-
-	/** Setting name */
-	char *setting_name;
-};
-
-/**
- * Terminate name resolution
- *
- * @v nslookup		Name resolution request
- * @v rc		Reason for termination
- */
-static void nslookup_close ( struct nslookup *nslookup, int rc ) {
-
-	/* Shut down interfaces */
-	intf_shutdown ( &nslookup->resolver, rc );
-	intf_shutdown ( &nslookup->job, rc );
-}
-
-/**
- * Handle resolved name
- *
- * @v nslookup		Name resolution request
- * @v sa		Completed socket address
- */
-static void nslookup_resolv_done ( struct nslookup *nslookup,
-				   struct sockaddr *sa ) {
-	struct sockaddr_in *sin;
-	struct setting_type *default_type;
-	struct settings *settings;
-	struct setting setting;
-	void *data;
-	size_t len;
-	int rc;
-
-	/* Extract address */
-	switch ( sa->sa_family ) {
-	case AF_INET:
-		sin = ( ( struct sockaddr_in * ) sa );
-		data = &sin->sin_addr;
-		len = sizeof ( sin->sin_addr );
-		default_type = &setting_type_ipv4;
-		break;
-	default:
-		rc = -ENOTSUP;
-		goto err;
-	}
-
-	/* Parse specified setting name */
-	if ( ( rc = parse_setting_name ( nslookup->setting_name,
-					 autovivify_child_settings, &settings,
-					 &setting ) ) != 0 )
-		goto err;
-
-	/* Apply default type if necessary */
-	if ( ! setting.type )
-		setting.type = default_type;
-
-	/* Store in specified setting */
-	if ( ( rc = store_setting ( settings, &setting, data, len ) ) != 0 )
-		goto err;
-
- err:
-	/* Terminate name resolution */
-	nslookup_close ( nslookup, rc );
-}
-
-/** Name resolution resolver interface operations */
-static struct interface_operation nslookup_resolver_operations[] = {
-	INTF_OP ( resolv_done, struct nslookup *, nslookup_resolv_done ),
-	INTF_OP ( intf_close, struct nslookup *, nslookup_close ),
-};
-
-/** Name resolution resolver interface descriptor */
-static struct interface_descriptor nslookup_resolver_desc =
-	INTF_DESC_PASSTHRU ( struct nslookup, resolver,
-			     nslookup_resolver_operations, job );
-
-/** Name resolution job control interface operations */
-static struct interface_operation nslookup_job_operations[] = {
-	INTF_OP ( intf_close, struct nslookup *, nslookup_close ),
-};
-
-/** Name resolution job control interface descriptor */
-static struct interface_descriptor nslookup_job_desc =
-	INTF_DESC_PASSTHRU ( struct nslookup, job,
-			     nslookup_job_operations, resolver );
-
-/**
- * Initiate standalone name resolution
- *
- * @v job		Parent interface
- * @v name		Name to resolve
- * @v setting_name	Setting name
- * @ret rc		Return status code
- */
-static int resolv_setting ( struct interface *job, const char *name,
-			    const char *setting_name ) {
-	struct nslookup *nslookup;
-	struct sockaddr sa;
-	char *setting_name_copy;
-	int rc;
-
-	/* Allocate and initialise structure */
-	nslookup = zalloc ( sizeof ( *nslookup ) + strlen ( setting_name )
-			    + 1 /* NUL */ );
-	if ( ! nslookup )
-		return -ENOMEM;
-	ref_init ( &nslookup->refcnt, NULL );
-	intf_init ( &nslookup->job, &nslookup_job_desc, &nslookup->refcnt );
-	intf_init ( &nslookup->resolver, &nslookup_resolver_desc,
-		    &nslookup->refcnt );
-	setting_name_copy = ( ( void * ) ( nslookup + 1 ) );
-	strcpy ( setting_name_copy, setting_name );
-	nslookup->setting_name = setting_name_copy;
-
-	/* Start name resolution */
-	memset ( &sa, 0, sizeof ( sa ) );
-	if ( ( rc = resolv ( &nslookup->resolver, name, &sa ) ) != 0 )
-		goto err_resolv;
-
-	/* Attach parent interface, mortalise self, and return */
-	intf_plug_plug ( &nslookup->job, job );
-	ref_put ( &nslookup->refcnt );
-	return 0;
-
- err_resolv:
-	ref_put ( &nslookup->refcnt );
-	return rc;
-}
-
-/**
- * Perform (blocking) standalone name resolution
- *
- * @v name		Name to resolve
- * @v setting_name	Setting name
- * @ret rc		Return status code
- */
-int nslookup ( const char *name, const char *setting_name ) {
-	int rc;
-
-	/* Perform name resolution */
-	if ( ( rc = resolv_setting ( &monojob, name, setting_name ) ) == 0 )
-		rc = monojob_wait ( NULL, 0 );
-	if ( rc != 0 ) {
-		printf ( "Could not resolve %s: %s\n", name, strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/pingmgmt.c ipxe-1.0.1~lliurex1505/src/usr/pingmgmt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/pingmgmt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/pingmgmt.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,80 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <ipxe/pinger.h>
-#include <ipxe/monojob.h>
-#include <ipxe/timer.h>
-#include <usr/pingmgmt.h>
-
-/** @file
- *
- * ICMP ping management
- *
- */
-
-/**
- * Display ping result
- *
- * @v src		Source socket address
- * @v sequence		Sequence number
- * @v len		Payload length
- * @v rc		Status code
- */
-static void ping_callback ( struct sockaddr *peer, unsigned int sequence,
-			    size_t len, int rc ) {
-
-	/* Display ping response */
-	printf ( "%zd bytes from %s: seq=%d",
-		 len, sock_ntoa ( peer ), sequence );
-	if ( rc != 0 )
-		printf ( ": %s", strerror ( rc ) );
-	printf ( "\n" );
-}
-
-/**
- * Ping a host
- *
- * @v hostname		Hostname
- * @v timeout		Timeout between pings, in ticks
- * @v len		Payload length
- * @ret rc		Return status code
- */
-int ping ( const char *hostname, unsigned long timeout, size_t len ) {
-	int rc;
-
-	/* Create pinger */
-	if ( ( rc = create_pinger ( &monojob, hostname, timeout,
-				    len, ping_callback ) ) != 0 ) {
-		printf ( "Could not start ping: %s\n", strerror ( rc ) );
-		return rc;
-	}
-
-	/* Wait for ping to complete */
-	if ( ( rc = monojob_wait ( NULL, 0 ) ) != 0 ) {
-		printf ( "Finished: %s\n", strerror ( rc ) );
-		return rc;
-	}
-
-	return 0;
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/prompt.c ipxe-1.0.1~lliurex1505/src/usr/prompt.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/prompt.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/prompt.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
@@ -28,27 +27,28 @@
 #include <errno.h>
 #include <stdio.h>
 #include <ipxe/console.h>
+#include <ipxe/timer.h>
 #include <usr/prompt.h>
 
 /**
  * Prompt for keypress
  *
  * @v text		Prompt string
- * @v timeout		Timeout period, in ticks (0=indefinite)
+ * @v wait_ms		Time to wait, in milliseconds (0=indefinite)
  * @v key		Key to wait for (0=any key)
  * @ret rc		Return status code
  *
  * Returns success if the specified key was pressed within the
  * specified timeout period.
  */
-int prompt ( const char *text, unsigned long timeout, int key ) {
+int prompt ( const char *text, unsigned int wait_ms, int key ) {
 	int key_pressed;
 
 	/* Display prompt */
 	printf ( "%s", text );
 
 	/* Wait for key */
-	key_pressed = getkey ( timeout );
+	key_pressed = getkey ( ( wait_ms * TICKS_PER_SEC ) / 1000 );
 
 	/* Clear the prompt line */
 	while ( *(text++) )
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/pxemenu.c ipxe-1.0.1~lliurex1505/src/usr/pxemenu.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/pxemenu.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/pxemenu.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route.c ipxe-1.0.1~lliurex1505/src/usr/route.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/route.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,32 +13,33 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 FILE_LICENCE ( GPL2_OR_LATER );
 
+#include <stdio.h>
 #include <ipxe/netdevice.h>
+#include <ipxe/ip.h>
 #include <usr/route.h>
 
 /** @file
  *
- * Routing management
+ * Routing table management
  *
  */
 
-/**
- * Print routing table
- *
- */
 void route ( void ) {
-	struct net_device *netdev;
-	struct routing_family *family;
+	struct ipv4_miniroute *miniroute;
 
-	for_each_netdev ( netdev ) {
-		for_each_table_entry ( family, ROUTING_FAMILIES ) {
-			family->print ( netdev );
-		}
+	list_for_each_entry ( miniroute, &ipv4_miniroutes, list ) {
+		printf ( "%s: %s/", miniroute->netdev->name,
+			 inet_ntoa ( miniroute->address ) );
+		printf ( "%s", inet_ntoa ( miniroute->netmask ) );
+		if ( miniroute->gateway.s_addr )
+			printf ( " gw %s", inet_ntoa ( miniroute->gateway ) );
+		if ( ! netdev_is_open ( miniroute->netdev ) )
+			printf ( " (inaccessible)" );
+		printf ( "\n" );
 	}
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route_ipv4.c ipxe-1.0.1~lliurex1505/src/usr/route_ipv4.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route_ipv4.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/route_ipv4.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ip.h>
-#include <usr/route.h>
-
-/** @file
- *
- * IPv4 routing management
- *
- */
-
-/**
- * Print IPv4 routing table
- *
- * @v netdev		Network device
- */
-static void route_ipv4_print ( struct net_device *netdev ) {
-	struct ipv4_miniroute *miniroute;
-
-	list_for_each_entry ( miniroute, &ipv4_miniroutes, list ) {
-		if ( miniroute->netdev != netdev )
-			continue;
-		printf ( "%s: %s/", netdev->name,
-			 inet_ntoa ( miniroute->address ) );
-		printf ( "%s", inet_ntoa ( miniroute->netmask ) );
-		if ( miniroute->gateway.s_addr )
-			printf ( " gw %s", inet_ntoa ( miniroute->gateway ) );
-		if ( ! netdev_is_open ( miniroute->netdev ) )
-			printf ( " (inaccessible)" );
-		printf ( "\n" );
-	}
-}
-
-/** IPv4 routing family */
-struct routing_family ipv4_routing_family __routing_family ( ROUTING_IPV4 ) = {
-	.print = route_ipv4_print,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route_ipv6.c ipxe-1.0.1~lliurex1505/src/usr/route_ipv6.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/route_ipv6.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/route_ipv6.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2013 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stdio.h>
-#include <ipxe/netdevice.h>
-#include <ipxe/ipv6.h>
-#include <usr/route.h>
-
-/** @file
- *
- * IPv6 routing management
- *
- */
-
-/**
- * Print IPv6 routing table
- *
- * @v netdev		Network device
- */
-static void route_ipv6_print ( struct net_device *netdev ) {
-	struct ipv6_miniroute *miniroute;
-
-	list_for_each_entry ( miniroute, &ipv6_miniroutes, list ) {
-		if ( miniroute->netdev != netdev )
-			continue;
-		printf ( "%s: %s/%d", netdev->name,
-			 inet6_ntoa ( &miniroute->address ),
-			 miniroute->prefix_len );
-		if ( miniroute->has_router )
-			printf ( " gw %s", inet6_ntoa ( &miniroute->router ) );
-		if ( ! netdev_is_open ( miniroute->netdev ) )
-			printf ( " (inaccessible)" );
-		printf ( "\n" );
-	}
-}
-
-/** IPv6 routing family */
-struct routing_family ipv6_routing_family __routing_family ( ROUTING_IPV6 ) = {
-	.print = route_ipv6_print,
-};
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/usr/sync.c ipxe-1.0.1~lliurex1505/src/usr/sync.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/usr/sync.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/usr/sync.c	1970-01-01 00:00:00.000000000 +0000
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2012 Michael Brown <mbrown@fensystems.co.uk>.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of the
- * License, or any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- * General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-
-FILE_LICENCE ( GPL2_OR_LATER );
-
-#include <stddef.h>
-#include <ipxe/job.h>
-#include <ipxe/monojob.h>
-#include <ipxe/pending.h>
-#include <usr/sync.h>
-
-/** @file
- *
- * Wait for pending operations to complete
- *
- */
-
-/**
- * Report progress
- *
- * @v intf		Interface
- * @v progress		Progress report to fill in
- * @ret ongoing_rc	Ongoing job status code (if known)
- */
-static int sync_progress ( struct interface *intf,
-			   struct job_progress *progress __unused ) {
-
-	/* Terminate successfully if no pending operations remain */
-	if ( ! have_pending() )
-		intf_close ( intf, 0 );
-
-	return 0;
-}
-
-/** Synchroniser interface operations */
-static struct interface_operation sync_intf_op[] = {
-	INTF_OP ( job_progress, struct interface *, sync_progress ),
-};
-
-/** Synchroniser interface descriptor */
-static struct interface_descriptor sync_intf_desc =
-	INTF_DESC_PURE ( sync_intf_op );
-
-/** Synchroniser */
-static struct interface sync_intf = INTF_INIT ( sync_intf_desc );
-
-/**
- * Wait for pending operations to complete
- *
- * @v timeout		Timeout period, in ticks (0=indefinite)
- * @ret rc		Return status code
- */
-int sync ( unsigned long timeout ) {
-
-	/* Attach synchroniser and wait for completion */
-	intf_plug_plug ( &monojob, &sync_intf );
-	return monojob_wait ( NULL, timeout );
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/catrom.pl ipxe-1.0.1~lliurex1505/src/util/catrom.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/catrom.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/catrom.pl	2012-01-06 23:49:04.000000000 +0000
@@ -3,27 +3,46 @@
 use warnings;
 use strict;
 
-use FindBin;
-use lib "$FindBin::Bin";
-use Option::ROM qw ( :all );
+use bytes;
 
+use constant MAX_ROM_LEN => 1024*1024;
+use constant PCI_OFF => 0x18;
+use constant INDICATOR_OFF => 0x15;
+
+my $total_len = 0;
 my @romfiles = @ARGV
     or die "Usage: $0 rom-file-1 rom-file-2 ... > multi-rom-file\n";
 
 while ( my $romfile = shift @romfiles ) {
+  my $last = @romfiles ? 0 : 1;
 
-  # Read ROM file
-  my $rom = new Option::ROM;
-  $rom->load ( $romfile );
-
-  # Tag final image as non-final in all except the final ROM
-  if ( @romfiles ) {
-    my $image = $rom;
-    $image = $image->next_image() while $image->next_image();
-    $image->pci_header->{last_image} &= ~PCI_LAST_IMAGE;
-    $image->fix_checksum();
-  }
+  open ROM, "<$romfile" or die "Could not open $romfile: $!\n";
+  my $len = read ( ROM, my $romdata, MAX_ROM_LEN )
+      or die "Could not read $romfile: $!\n";
+  close ROM;
+
+  die "$romfile is not a ROM file\n"
+      unless substr ( $romdata, 0, 2 ) eq "\x55\xAA";
+
+  ( my $checklen ) = unpack ( 'C', substr ( $romdata, 2, 1 ) );
+  $checklen *= 512;
+  die "$romfile has incorrect length field $checklen (should be $len)\n"
+      unless $len == $checklen;
+
+  ( my $pci ) = unpack ( 'v', substr ( $romdata, PCI_OFF, 2 ) );
+  die "Invalid PCI offset field in $romfile\n"
+      if $pci >= $len;
+  die "No PCIR signature in $romfile\n"
+      unless substr ( $romdata, $pci, 4 ) eq "PCIR";
+  
+  ( my $indicator ) =
+      unpack ( 'C', substr ( $romdata, $pci + INDICATOR_OFF, 1 ) );
+  my $msg = sprintf ( "$romfile: indicator was %02x, ", $indicator );
+  $indicator &= ! ( 1 << 7 );
+  $indicator |= ( $last << 7 );
+  $msg .= sprintf ( "now %02x\n", $indicator );
+  substr ( $romdata, $pci + INDICATOR_OFF, 1 ) = pack ( 'C', $indicator );
+  warn $msg;
 
-  # Write ROM file to STDOUT
-  $rom->save ( "-" );
+  print $romdata;
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/disrom.pl ipxe-1.0.1~lliurex1505/src/util/disrom.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/disrom.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/disrom.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 use strict;
 use warnings;
@@ -28,88 +27,55 @@
 my $rom = new Option::ROM;
 $rom->load ( $romfile );
 
-do {
+die "Not an option ROM image\n"
+    unless $rom->{signature} == ROM_SIGNATURE;
 
-  die "Not an option ROM image\n"
-      unless $rom->{signature} == ROM_SIGNATURE;
-
-  my $romlength = ( $rom->{length} * 512 );
-  my $filelength = $rom->length;
-  die "ROM image truncated (is $filelength, should be $romlength)\n"
-      if $filelength < $romlength;
-
-  printf "ROM header:\n\n";
-  printf "  %-16s 0x%02x (%d)\n", "Length:",
-	 $rom->{length}, ( $rom->{length} * 512 );
-  printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $rom->{checksum},
-	 ( ( $rom->checksum == 0 ) ? "" : "INCORRECT: " ), $rom->checksum;
-  printf "  %-16s 0x%04x\n", "Init:", $rom->{init};
-  printf "  %-16s 0x%04x\n", "UNDI header:", $rom->{undi_header};
-  printf "  %-16s 0x%04x\n", "PCI header:", $rom->{pci_header};
-  printf "  %-16s 0x%04x\n", "PnP header:", $rom->{pnp_header};
-  printf "\n";
-
-  my $pci = $rom->pci_header();
-  if ( $pci ) {
-    printf "PCI header:\n\n";
-    printf "  %-16s %s\n", "Signature:", $pci->{signature};
-    printf "  %-16s 0x%04x\n", "Vendor ID:", $pci->{vendor_id};
-    printf "  %-16s 0x%04x\n", "Device ID:", $pci->{device_id};
-    printf "  %-16s 0x%02x%02x%02x\n", "Device class:",
-	   $pci->{base_class}, $pci->{sub_class}, $pci->{prog_intf};
-    printf "  %-16s 0x%04x (%d)\n", "Image length:",
-	   $pci->{image_length}, ( $pci->{image_length} * 512 );
-    printf "  %-16s 0x%04x (%d)\n", "Runtime length:",
-	   $pci->{runtime_length}, ( $pci->{runtime_length} * 512 );
-    printf "  %-16s 0x%02x\n", "Code type:", $pci->{code_type};
-    if ( exists $pci->{conf_header} ) {
-      printf "  %-16s 0x%04x\n", "Config header:", $pci->{conf_header};
-      printf "  %-16s 0x%04x\n", "CLP entry:", $pci->{clp_entry};
-    }
-    printf "\n";
-  }
-
-  my $pnp = $rom->pnp_header();
-  if ( $pnp ) {
-    printf "PnP header:\n\n";
-    printf "  %-16s %s\n", "Signature:", $pnp->{signature};
-    printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $pnp->{checksum},
-	   ( ( $pnp->checksum == 0 ) ? "" : "INCORRECT: " ), $pnp->checksum;
-    printf "  %-16s 0x%04x \"%s\"\n", "Manufacturer:",
-	   $pnp->{manufacturer}, $pnp->manufacturer;
-    printf "  %-16s 0x%04x \"%s\"\n", "Product:",
-	   $pnp->{product}, $pnp->product;
-    printf "  %-16s 0x%04x\n", "BCV:", $pnp->{bcv};
-    printf "  %-16s 0x%04x\n", "BDV:", $pnp->{bdv};
-    printf "  %-16s 0x%04x\n", "BEV:", $pnp->{bev};
-    printf "\n";
-  }
-
-  my $undi = $rom->undi_header();
-  if ( $undi ) {
-    printf "UNDI header:\n\n";
-    printf "  %-16s %s\n", "Signature:", $undi->{signature};
-    printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $undi->{checksum},
-	   ( ( $undi->checksum == 0 ) ? "" : "INCORRECT: " ), $undi->checksum;
-    printf "  %-16s %d.%d.%d\n", "UNDI version:", $undi->{version_major},
-	   $undi->{version_minor}, $undi->{version_revision};
-    printf "  %-16s 0x%04x\n", "Loader entry:", $undi->{loader_entry};
-    printf "  %-16s 0x%04x\n", "Stack size:", $undi->{stack_size};
-    printf "  %-16s 0x%04x\n", "Data size:", $undi->{data_size};
-    printf "  %-16s 0x%04x\n", "Code size:", $undi->{code_size};
-    printf "  %-16s %s\n", "Bus type:", $undi->{bus_type};
-    printf "\n";
-  }
-
-  my $ipxe = $rom->ipxe_header();
-  if ( $ipxe ) {
-    printf "iPXE header:\n\n";
-    printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $ipxe->{checksum},
-	   ( ( $ipxe->checksum == 0 ) ? "" : "INCORRECT: " ), $ipxe->checksum;
-    printf "  %-16s 0x%02x (%d)\n", "Shrunk length:",
-	   $ipxe->{shrunk_length}, ( $ipxe->{shrunk_length} * 512 );
-    printf "  %-16s 0x%08x\n", "Build ID:", $ipxe->{build_id};
-    printf "\n";
+my $romlength = ( $rom->{length} * 512 );
+my $filelength = $rom->length;
+die "ROM image truncated (is $filelength, should be $romlength)\n"
+    if $filelength < $romlength;
+
+printf "ROM header:\n\n";
+printf "  %-16s 0x%02x (%d)\n", "Length:", $rom->{length}, ( $rom->{length} * 512 );
+printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $rom->{checksum},
+       ( ( $rom->checksum == 0 ) ? "" : "INCORRECT: " ), $rom->checksum;
+printf "  %-16s 0x%04x\n", "Init:", $rom->{init};
+printf "  %-16s 0x%04x\n", "UNDI header:", $rom->{undi_header};
+printf "  %-16s 0x%04x\n", "PCI header:", $rom->{pci_header};
+printf "  %-16s 0x%04x\n", "PnP header:", $rom->{pnp_header};
+printf "\n";
+
+my $pci = $rom->pci_header();
+if ( $pci ) {
+  printf "PCI header:\n\n";
+  printf "  %-16s %s\n", "Signature:", $pci->{signature};
+  printf "  %-16s 0x%04x\n", "Vendor ID:", $pci->{vendor_id};
+  printf "  %-16s 0x%04x\n", "Device ID:", $pci->{device_id};
+  printf "  %-16s 0x%02x%02x%02x\n", "Device class:",
+	 $pci->{base_class}, $pci->{sub_class}, $pci->{prog_intf};
+  printf "  %-16s 0x%04x (%d)\n", "Image length:",
+	 $pci->{image_length}, ( $pci->{image_length} * 512 );
+  printf "  %-16s 0x%04x (%d)\n", "Runtime length:",
+	 $pci->{runtime_length}, ( $pci->{runtime_length} * 512 );
+  if ( exists $pci->{conf_header} ) {
+    printf "  %-16s 0x%04x\n", "Config header:", $pci->{conf_header};
+    printf "  %-16s 0x%04x\n", "CLP entry:", $pci->{clp_entry};
   }
+  printf "\n";
+}
 
-} while ( $rom = $rom->next_image );
+my $pnp = $rom->pnp_header();
+if ( $pnp ) {
+  printf "PnP header:\n\n";
+  printf "  %-16s %s\n", "Signature:", $pnp->{signature};
+  printf "  %-16s 0x%02x (%s0x%02x)\n", "Checksum:", $pnp->{checksum},
+	 ( ( $pnp->checksum == 0 ) ? "" : "INCORRECT: " ), $pnp->checksum;
+  printf "  %-16s 0x%04x \"%s\"\n", "Manufacturer:",
+	 $pnp->{manufacturer}, $pnp->manufacturer;
+  printf "  %-16s 0x%04x \"%s\"\n", "Product:",
+	 $pnp->{product}, $pnp->product;
+  printf "  %-16s 0x%04x\n", "BCV:", $pnp->{bcv};
+  printf "  %-16s 0x%04x\n", "BDV:", $pnp->{bdv};
+  printf "  %-16s 0x%04x\n", "BEV:", $pnp->{bev};
+  printf "\n";
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/efirom.c ipxe-1.0.1~lliurex1505/src/util/efirom.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/efirom.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/efirom.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,8 +13,7 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stdint.h>
@@ -58,6 +57,18 @@
 }
 
 /**
+ * Get file size
+ *
+ * @v file		File
+ * @v len		File size
+ */
+static size_t file_size ( FILE *file ) {
+	ssize_t len;
+
+	return len;
+}
+
+/**
  * Read information from PE headers
  *
  * @v pe		PE file
@@ -228,15 +239,15 @@
 }
 
 int main ( int argc, char **argv ) {
-	struct options opts;
-	int infile_index;
+	struct options opts = {
+	};
+	unsigned int infile_index;
 	const char *infile_name;
 	const char *outfile_name;
 	FILE *infile;
 	FILE *outfile;
 
 	/* Parse command-line arguments */
-	memset ( &opts, 0, sizeof ( opts ) );
 	infile_index = parse_options ( argc, argv, &opts );
 	if ( argc != ( infile_index + 2 ) ) {
 		print_help ( argv[0] );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/einfo.c ipxe-1.0.1~lliurex1505/src/util/einfo.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/einfo.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/einfo.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,15 +13,13 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #include <stddef.h>
 #include <stdint.h>
 #include <stdlib.h>
 #include <stdio.h>
-#include <string.h>
 #include <errno.h>
 #include <sys/types.h>
 #include <sys/stat.h>
@@ -38,15 +36,10 @@
 
 /** Error usage information */
 struct einfo {
-	/** Size of error information record */
 	uint32_t size;
-	/** Error number */
 	uint32_t error;
-	/** Offset to error description (NUL-terminated) */
 	uint32_t desc;
-	/** Offset to file name (NUL-terminated) */
 	uint32_t file;
-	/** Line number */
 	uint32_t line;
 } __attribute__ (( packed ));
 
@@ -56,8 +49,7 @@
  * @v infile		Filename
  * @v opts		Command-line options
  */
-static void einfo ( const char *infile,
-		    struct options *opts __attribute__ (( unused )) ) {
+static void einfo ( const char *infile, struct options *opts ) {
 	int fd;
 	struct stat stat;
 	size_t len;
@@ -93,16 +85,15 @@
 		for ( einfo = start ; ( ( void * ) einfo ) < ( start + len ) ;
 		      einfo = ( ( ( void * ) einfo ) + einfo->size ) ) {
 			printf ( "%08x\t%s\t%d\t%s\n", einfo->error,
-				 ( ( ( char * ) einfo ) + einfo->file ),
+				 ( ( ( void * ) einfo ) + einfo->file ),
 				 einfo->line,
-				 ( ( ( char * ) einfo ) + einfo->desc ) );
+				 ( ( ( void * ) einfo ) + einfo->desc ) );
 		}
 
-		/* Unmap file */
-		munmap ( start, len );
 	}
 
-	/* Close file */
+	/* Unmap and close file */
+	munmap ( start, len );
 	close ( fd );
 }
 
@@ -124,7 +115,8 @@
  * @v opts		Options structure to populate
  */
 static int parse_options ( const int argc, char **argv,
-			   struct options *opts __attribute__ (( unused )) ) {
+			   struct options *opts ) {
+	char *end;
 	int c;
 
 	while (1) {
@@ -155,7 +147,7 @@
 int main ( int argc, char **argv ) {
 	struct options opts = {
 	};
-	int infile_index;
+	unsigned int infile_index;
 	const char *infile;
 
 	/* Parse command-line arguments */
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/elf2efi.c ipxe-1.0.1~lliurex1505/src/util/elf2efi.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/elf2efi.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/elf2efi.c	2012-01-06 23:49:04.000000000 +0000
@@ -13,13 +13,10 @@
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
 #define _GNU_SOURCE
-#define PACKAGE "elf2efi"
-#define PACKAGE_VERSION "1"
 #include <stdint.h>
 #include <stddef.h>
 #include <stdlib.h>
@@ -408,10 +405,6 @@
 			  EFI_IMAGE_SCN_MEM_WRITE );
 		applicable_start = &data_mid;
 		applicable_end = &data_end;
-	} else {
-		eprintf ( "Unrecognised characteristics %#lx for section %s\n",
-			  flags, section->name );
-		exit ( 1 );
 	}
 
 	/* Copy in section contents */
@@ -466,8 +459,7 @@
  * @v rel		Relocation entry
  * @v pe_reltab		PE relocation table to fill in
  */
-static void process_reloc ( bfd *bfd __attribute__ (( unused )),
-			    asection *section, arelent *rel,
+static void process_reloc ( bfd *bfd, asection *section, arelent *rel,
 			    struct pe_relocs **pe_reltab ) {
 	reloc_howto_type *howto = rel->howto;
 	asymbol *sym = *(rel->sym_ptr_ptr);
@@ -616,11 +608,8 @@
 	struct pe_section *section;
 	unsigned long fpos = 0;
 
-	/* Align length of headers */
-	fpos = pe_header->nt.OptionalHeader.SizeOfHeaders =
-		efi_file_align ( pe_header->nt.OptionalHeader.SizeOfHeaders );
-
 	/* Assign raw data pointers */
+	fpos = efi_file_align ( pe_header->nt.OptionalHeader.SizeOfHeaders );
 	for ( section = pe_sections ; section ; section = section->next ) {
 		if ( section->hdr.SizeOfRawData ) {
 			section->hdr.PointerToRawData = fpos;
@@ -648,7 +637,7 @@
 	for ( section = pe_sections ; section ; section = section->next ) {
 		if ( fseek ( pe, section->hdr.PointerToRawData,
 			     SEEK_SET ) != 0 ) {
-			eprintf ( "Could not seek to %x: %s\n",
+			eprintf ( "Could not seek to %lx: %s\n",
 				  section->hdr.PointerToRawData,
 				  strerror ( errno ) );
 			exit ( 1 );
@@ -797,7 +786,7 @@
 	struct options opts = {
 		.subsystem = EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION,
 	};
-	int infile_index;
+	unsigned int infile_index;
 	const char *infile;
 	const char *outfile;
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/fixrom.pl ipxe-1.0.1~lliurex1505/src/util/fixrom.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/fixrom.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/fixrom.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 use strict;
 use warnings;
@@ -29,13 +28,7 @@
 foreach my $romfile ( @romfiles ) {
   my $rom = new Option::ROM;
   $rom->load ( $romfile );
-  my $image = $rom;
-  while ( $image ) {
-    $image->pnp_header->fix_checksum() if $image->pnp_header;
-    $image->undi_header->fix_checksum() if $image->undi_header;
-    $image->ipxe_header->fix_checksum() if $image->ipxe_header;
-    $image->fix_checksum();
-    $image = $image->next_image();
-  }
+  $rom->pnp_header->fix_checksum() if $rom->pnp_header;
+  $rom->fix_checksum();
   $rom->save ( $romfile );
 }
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/fnrec.pl ipxe-1.0.1~lliurex1505/src/util/fnrec.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/fnrec.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/fnrec.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 =head1 NAME
 
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/genkeymap.pl ipxe-1.0.1~lliurex1505/src/util/genkeymap.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/genkeymap.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/genkeymap.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 =head1 NAME
 
@@ -125,10 +124,8 @@
   return unless $keysym;
 
   # Sanity check
-  if ( $keysym & 0xf000 ) {
-    warn "Unexpected keysym ".sprintf ( "0x%04x", $keysym )."\n";
-    return;
-  }
+  die "Unexpected keysym ".sprintf ( "0x%04x\n", $keysym )."\n"
+      if $keysym & 0xf000;
 
   # Extract type and value
   my $type = ( $keysym >> 8 );
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/get-pci-ids ipxe-1.0.1~lliurex1505/src/util/get-pci-ids
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/get-pci-ids	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/get-pci-ids	2012-01-06 23:49:04.000000000 +0000
@@ -16,8 +16,7 @@
 
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 
 
 # Known bugs/limitations:
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/iccfix.c ipxe-1.0.1~lliurex1505/src/util/iccfix.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/iccfix.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/iccfix.c	2012-01-06 23:49:04.000000000 +0000
@@ -2,7 +2,6 @@
 #include <stddef.h>
 #include <stdio.h>
 #include <stdlib.h>
-#include <string.h>
 #include <unistd.h>
 #include <fcntl.h>
 #include <errno.h>
@@ -50,7 +49,7 @@
 		     ( align >= ICC_ALIGN_HACK_FACTOR ) ) {
 			new_align = ( align / ICC_ALIGN_HACK_FACTOR );
 			shdr->sh_addralign = new_align;
-			dprintf ( "Section \"%s\": alignment %ld->%ld\n",
+			dprintf ( "Section \"%s\": alignment %d->%d\n",
 				  name, align, new_align );
 		}
 	}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/licence.pl ipxe-1.0.1~lliurex1505/src/util/licence.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/licence.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/licence.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 use strict;
 use warnings;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/Makefile ipxe-1.0.1~lliurex1505/src/util/Makefile
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/Makefile	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/Makefile	2012-01-06 23:49:04.000000000 +0000
@@ -1,11 +1,17 @@
 BLIB = ../bin/blib.a
 CFLAGS = -Os
 
-all : hijack mucurses_test
+all : hijack prototester mucurses_test
 
 hijack : hijack.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -Wall -lpcap -o $@ $<
 
+prototester.o : prototester.c
+	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -Wall -o $@ -c $< -idirafter ../include
+
+prototester : prototester.o $(BLIB)
+	$(CC) -o $@ $< -lc $(BLIB)
+
 mucurses_test.o : mucurses_test.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) -Wall -o $@ -c $<
 
@@ -13,4 +19,4 @@
 	$(CC) -o $@ $< -lc $(BLIB)
 
 clean :
-	rm -f hijack mucurses_test *.o
+	rm -f hijack prototester mucurses_test *.o
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/mergerom.pl ipxe-1.0.1~lliurex1505/src/util/mergerom.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/mergerom.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/mergerom.pl	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 use strict;
 use warnings;
@@ -44,6 +43,9 @@
 
 foreach my $rom ( @roms ) {
 
+  # Update base length
+  $baserom->{length} += $rom->{length};
+
   # Merge initialisation entry point
   merge_entry_points ( $baserom->{init}, $rom->{init}, $offset );
 
@@ -82,36 +84,15 @@
     merge_entry_points ( $baserom_pnp->{bev}, $rom_pnp->{bev}, $offset );
   }
 
-  # Update iPXE header, if present
-  my $baserom_ipxe = $baserom->ipxe_header;
-  my $rom_ipxe = $rom->ipxe_header;
-  if ( $baserom_ipxe ) {
-
-    # Update shrunk length
-    $baserom_ipxe->{shrunk_length} = ( $baserom->{length} +
-				       ( $rom_ipxe ?
-					 $rom_ipxe->{shrunk_length} :
-					 $rom->{length} ) );
-
-    # Fix checksum
-    $baserom_ipxe->fix_checksum();
-  }
-
-  # Update base length
-  $baserom->{length} += $rom->{length};
-
   # Fix checksum for this ROM segment
   $rom->fix_checksum();
 
-  # Add this ROM to base ROM
-  my $data = substr ( $baserom->get(), 0, $baserom->length() );
-  $data .= $rom->get();
-  $data .= $baserom->next_image()->get() if $baserom->next_image();
-  $baserom->set ( $data );
-
   $offset += $rom->length;
 }
 
 $baserom->pnp_header->fix_checksum() if $baserom->pnp_header;
 $baserom->fix_checksum();
 $baserom->save ( "-" );
+foreach my $rom ( @roms ) {
+  $rom->save ( "-" );
+}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/niclist.pl ipxe-1.0.1~lliurex1505/src/util/niclist.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/niclist.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/niclist.pl	1970-01-01 00:00:00.000000000 +0000
@@ -1,588 +0,0 @@
-#!/usr/bin/env perl
-#
-# Generates list of supported NICs with PCI vendor/device IDs, driver name
-# and other useful things.
-#
-# Initial version by Robin Smidsrød <robin@smidsrod.no>
-#
-
-use strict;
-use warnings;
-use autodie;
-use v5.10;
-
-use File::stat;
-use File::Basename qw(basename);
-use File::Find ();
-use Getopt::Long qw(GetOptions);
-
-GetOptions(
-    'help'       => \( my $help     = 0      ),
-    'format=s'   => \( my $format   = 'text' ),
-    'sort=s'     => \( my $sort     = 'bus,ipxe_driver,ipxe_name' ),
-    'columns=s'  => \( my $columns  = 'bus,vendor_id,device_id,'
-                                    . 'vendor_name,device_name,ipxe_driver,'
-                                    . 'ipxe_name,ipxe_description,file,legacy_api'
-                     ),
-    'pci-url=s'  => \( my $pci_url  = 'http://pciids.sourceforge.net/v2.2/pci.ids' ),
-    'pci-file=s' => \( my $pci_file = '/tmp/pci.ids' ),
-    'output=s'   => \( my $output   = '' ),
-);
-
-die(<<"EOM") if $help;
-Usage: $0 [options] [<directory>]
-
-Options:
-    --help     This page
-    --format   Set output format
-    --sort     Set output sort order (comma-separated)
-    --columns  Set output columns (comma-separated)
-    --pci-url  URL to pci.ids file
-    --pci-file Cache file for downloaded pci.ids
-    --output   Output file (not specified is STDOUT)
-
-Output formats:
-    text, csv, json, html, dokuwiki
-
-Column names (default order):
-    bus, vendor_id, device_id, vendor_name, device_name,
-    ipxe_driver, ipxe_name, ipxe_description, file, legacy_api
-EOM
-
-# Only load runtime requirements if actually in use
-given($format) {
-    when( /csv/  ) {
-                       eval { require Text::CSV; };
-                       die("Please install Text::CSV CPAN module to use this feature.\n")
-                           if $@;
-                   }
-    when( /json/ ) {
-                       eval { require JSON; };
-                       die("Please install JSON CPAN module to use this feature.\n")
-                           if $@;
-                   }
-    when( /html/ ) {
-                       eval { require HTML::Entities; };
-                       die("Please install HTML::Entities CPAN module to use this feature.\n")
-                           if $@;
-                   }
-    default        { }
-}
-
-# Scan source dir and build NIC list
-my $ipxe_src_dir = shift || '.'; # Default to current directory
-my $ipxe_nic_list = build_ipxe_nic_list( $ipxe_src_dir );
-
-# Download pci.ids file and parse it
-fetch_pci_ids_file($pci_url, $pci_file);
-my $pci_id_map = build_pci_id_map($pci_file);
-
-# Merge 'official' vendor/device names and sort list
-update_ipxe_nic_names($ipxe_nic_list, $pci_id_map);
-my $sorted_list = sort_ipxe_nic_list($ipxe_nic_list, $sort);
-
-# Run specified formatter
-my $column_names = parse_columns_param($columns);
-say STDERR "Formatting NIC list in format '$format' with columns: "
-         . join(", ", @$column_names);
-my $formatter = \&{ "format_nic_list_$format" };
-my $report = $formatter->( $sorted_list, $column_names );
-
-# Print final report
-if ( $output and $output ne '-' ) {
-    say STDERR "Printing report to '$output'...";
-    open( my $out_fh, ">", $output );
-    print $out_fh $report;
-    close($out_fh);
-}
-else {
-    print STDOUT $report;
-}
-
-exit;
-
-# fetch URL into specified filename
-sub fetch_pci_ids_file {
-    my ($url, $filename) = @_;
-    my @cmd = ( "wget", "--quiet", "-O", $filename, $url );
-    my @touch = ( "touch", $filename );
-    if ( -r $filename ) {
-        my $age = time - stat($filename)->mtime;
-        # Refresh if older than 1 day
-        if ( $age > 86400 ) {
-            say STDERR "Refreshing $filename from $url...";
-            system(@cmd);
-            system(@touch);
-        }
-    }
-    else {
-        say STDERR "Fetching $url into $filename...";
-        system(@cmd);
-        system(@touch);
-    }
-    return $filename;
-}
-
-sub build_pci_id_map {
-    my ($filename) = @_;
-    say STDERR "Building PCI ID map...";
-
-    my $devices = {};
-    my $classes = {};
-    my $pci_id = qr/[[:xdigit:]]{4}/;
-    my $c_id = qr/[[:xdigit:]]{2}/;
-    my $non_space = qr/[^\s]/;
-
-    # open pci.ids file specified
-    open( my $fh, "<", $filename );
-
-    # For devices
-    my $vendor_id = "";
-    my $vendor_name = "";
-    my $device_id = "";
-    my $device_name = "";
-
-    # For classes
-    my $class_id = "";
-    my $class_name = "";
-    my $subclass_id = "";
-    my $subclass_name = "";
-
-    while(<$fh>) {
-        # skip # and blank lines
-        next if m/^$/;
-        next if m/^\s*#/;
-
-        # Vendors, devices and subsystems. Please keep sorted.
-        # Syntax:
-        # vendor  vendor_name
-        #   device  device_name             <-- single tab
-        #       subvendor subdevice  subsystem_name <-- two tabs
-        if ( m/^ ($pci_id) \s+ ( $non_space .* ) /x ) {
-            $vendor_id = lc $1;
-            $vendor_name = $2;
-            $devices->{$vendor_id} = { name => $vendor_name };
-            next;
-        }
-
-        if ( $vendor_id and m/^ \t ($pci_id) \s+ ( $non_space .* ) /x ) {
-            $device_id = lc $1;
-            $device_name = $2;
-            $devices->{$vendor_id}->{'devices'} //= {};
-            $devices->{$vendor_id}->{'devices'}->{$device_id} = { name => $device_name };
-            next;
-        }
-
-        if ( $vendor_id and $device_id and m/^ \t{2} ($pci_id) \s+ ($pci_id) \s+ ( $non_space .* ) /x ) {
-            my $subvendor_id = lc $1;
-            my $subdevice_id = lc $2;
-            my $subsystem_name = $3;
-            $devices->{$vendor_id}->{'devices'}->{$device_id}->{'subvendor'} //= {};
-            $devices->{$vendor_id}->{'devices'}->{$device_id}->{'subvendor'}->{$subvendor_id} //= {};
-            $devices->{$vendor_id}->{'devices'}->{$device_id}->{'subvendor'}->{$subvendor_id}->{'devices'} //= {};
-            $devices->{$vendor_id}->{'devices'}->{$device_id}->{'subvendor'}->{$subvendor_id}->{'devices'}->{$subdevice_id} = { name => $subsystem_name };
-            next;
-        }
-
-        # List of known device classes, subclasses and programming interfaces
-        # Syntax:
-        # C class   class_name
-        #   subclass    subclass_name       <-- single tab
-        #       prog-if  prog-if_name   <-- two tabs
-        if ( m/^C \s+ ($c_id) \s+ ( $non_space .* ) /x ) {
-            $class_id = lc $1;
-            $class_name = $2;
-            $classes->{$class_id} = { name => $class_name };
-            next;
-        }
-
-        if ( $class_id and m/^ \t ($c_id) \s+ ( $non_space .* ) /x ) {
-            $subclass_id = lc $1;
-            $subclass_name = $2;
-            $classes->{$class_id}->{'subclasses'} //= {};
-            $classes->{$class_id}->{'subclasses'}->{$subclass_id} = { name => $subclass_name };
-            next;
-        }
-
-        if ( $class_id and $subclass_id and m/^ \t{2} ($c_id) \s+ ( $non_space .* )  /x ) {
-            my $prog_if_id = lc $1;
-            my $prog_if_name = $2;
-            $classes->{$class_id}->{'subclasses'}->{$subclass_id}->{'programming_interfaces'} //= {};
-            $classes->{$class_id}->{'subclasses'}->{$subclass_id}->{'programming_interfaces'}->{$prog_if_id} = { name => $prog_if_name };
-            next;
-        }
-    }
-
-    close($fh);
-
-    # Populate subvendor names
-    foreach my $vendor_id ( keys %$devices ) {
-        my $device_map = $devices->{$vendor_id}->{'devices'};
-        foreach my $device_id ( keys %$device_map ) {
-            my $subvendor_map = $device_map->{$device_id}->{'subvendor'};
-            foreach my $subvendor_id ( keys %$subvendor_map ) {
-                $subvendor_map->{$subvendor_id}->{'name'} = $devices->{$subvendor_id}->{'name'} || "";
-            }
-        }
-    }
-
-    return {
-        'devices' => $devices,
-        'classes' => $classes,
-    };
-}
-
-# Scan through C code and parse ISA_ROM and PCI_ROM lines
-sub build_ipxe_nic_list {
-    my ($dir) = @_;
-    say STDERR "Building iPXE NIC list from " . ( $dir eq '.' ? 'current directory' : $dir ) . "...";
-
-    # recursively iterate through dir and find .c files
-    my @c_files;
-    File::Find::find(sub {
-        # only process files
-        return if -d $_;
-        # skip unreadable files
-        return unless -r $_;
-        # skip all but files with .c extension
-        return unless /\.c$/;
-        push @c_files, $File::Find::name;
-    }, $dir);
-
-    # Look for ISA_ROM or PCI_ROM lines
-    my $ipxe_nic_list = [];
-    my $hex_id = qr/0 x [[:xdigit:]]{4} /x;
-    my $quote = qr/ ['"] /x;
-    my $non_space = qr/ [^\s] /x;
-    my $rom_line_counter = 0;
-    foreach my $c_path ( sort @c_files ) {
-        my $legacy = 0;
-        open( my $fh, "<", $c_path );
-        my $c_file = $c_path;
-        $c_file =~ s{^\Q$dir\E/?}{} if -d $dir; # Strip directory from reported filename
-        my $ipxe_driver = basename($c_file, '.c');
-        while(<$fh>) {
-            # Most likely EtherBoot legacy API
-            $legacy = 1 if m/struct \s* nic \s*/x;
-
-            # parse ISA|PCI_ROM lines into hashref and append to $ipxe_nic_list
-            next unless m/^ \s* (?:ISA|PCI)_ROM /x;
-            $rom_line_counter++;
-            chomp;
-            #say; # for debugging regexp
-            if ( m/^ \s* ISA_ROM \s* \( \s* $quote ( .*? ) $quote \s* , \s* $quote ( .*? ) $quote \s* \) /x ) {
-                my $image = $1;
-                my $name = $2;
-                push @$ipxe_nic_list, {
-                    file             => $c_file,
-                    bus              => 'isa',
-                    ipxe_driver      => $ipxe_driver,
-                    ipxe_name        => $image,
-                    ipxe_description => $name,
-                    legacy_api       => ( $legacy ? 'yes' : 'no' ),
-                };
-                next;
-            }
-            if ( m/^ \s* PCI_ROM \s* \( \s* ($hex_id) \s* , \s* ($hex_id) \s* , \s* $quote (.*?) $quote \s* , \s* $quote (.*?) $quote /x ) {
-                my $vendor_id = lc $1;
-                my $device_id = lc $2;
-                my $name = $3;
-                my $desc = $4;
-                push @$ipxe_nic_list, {
-                    file             => $c_file,
-                    bus              => 'pci',
-                    vendor_id        => substr($vendor_id, 2), # strip 0x
-                    device_id        => substr($device_id, 2), # strip 0x
-                    ipxe_driver      => $ipxe_driver,
-                    ipxe_name        => $name,
-                    ipxe_description => $desc,
-                    legacy_api       => ( $legacy ? 'yes' : 'no' ),
-                };
-                next;
-            }
-        }
-        close($fh);
-    }
-
-    # Verify all ROM lines where parsed properly
-    my @isa_roms = grep { $_->{'bus'} eq 'isa' } @$ipxe_nic_list;
-    my @pci_roms = grep { $_->{'bus'} eq 'pci' } @$ipxe_nic_list;
-    if ( $rom_line_counter != ( @isa_roms + @pci_roms ) ) {
-        say STDERR "Found ROM lines: $rom_line_counter";
-        say STDERR "Extracted ISA_ROM lines: " . scalar @isa_roms;
-        say STDERR "Extracted PCI_ROM lines: " . scalar @pci_roms;
-        die("Mismatch between number of ISA_ROM/PCI_ROM lines and extracted entries. Verify regular expressions.\n");
-    }
-
-    return $ipxe_nic_list;
-}
-
-# merge vendor/product name from $pci_id_map into $ipxe_nic_list
-sub update_ipxe_nic_names {
-    my ($ipxe_nic_list, $pci_id_map) = @_;
-    say STDERR "Merging 'official' vendor/device names...";
-
-    foreach my $nic ( @$ipxe_nic_list ) {
-        next unless $nic->{'bus'} eq 'pci';
-        $nic->{'vendor_name'} = $pci_id_map->{'devices'}->{ $nic->{'vendor_id'} }->{'name'} || "";
-        $nic->{'device_name'} = $pci_id_map->{'devices'}->{ $nic->{'vendor_id'} }->{'devices'}->{ $nic->{'device_id'} }->{'name'} || "";
-    }
-    return $ipxe_nic_list; # Redundant, as we're mutating the input list, useful for chaining calls
-}
-
-# Sort entries in NIC list according to sort criteria
-sub sort_ipxe_nic_list {
-    my ($ipxe_nic_list, $sort_column_names) = @_;
-    my @sort_column_names = @{ parse_columns_param($sort_column_names) };
-    say STDERR "Sorting NIC list by: " . join(", ", @sort_column_names );
-    # Start at the end of the list and resort until list is exhausted
-    my @sorted_list = @{ $ipxe_nic_list };
-    while(@sort_column_names) {
-        my $column_name = pop @sort_column_names;
-        @sorted_list = sort { ( $a->{$column_name} || "" ) cmp ( $b->{$column_name} || "" ) }
-                       @sorted_list;
-    }
-    return \@sorted_list;
-}
-
-# Parse comma-separated values into array
-sub parse_columns_param {
-    my ($columns) = @_;
-    return [
-        grep { is_valid_column($_) } # only include valid entries
-        map  { s/\s//g; $_; }        # filter whitespace
-        split( /,/, $columns )       # split on comma
-    ];
-}
-
-# Return true if the input column name is valid
-sub is_valid_column {
-    my ($name) = @_;
-    my $valid_column_map = {
-        map { $_ => 1 }
-        qw(
-           bus file legacy_api
-           ipxe_driver ipxe_name ipxe_description
-           vendor_id device_id vendor_name device_name
-        )
-    };
-    return unless $name;
-    return unless $valid_column_map->{$name};
-    return 1;
-}
-
-# Output NIC list in plain text
-sub format_nic_list_text {
-    my ($nic_list, $column_names) = @_;
-    return join("\n",
-        map { format_nic_text($_, $column_names) }
-        @$nic_list
-    );
-}
-
-# Format one ipxe_nic_list entry for display
-# Column order not supported by text format
-sub format_nic_text {
-    my ($nic, $column_names) = @_;
-    my $labels = {
-        bus              => 'Bus:             ',
-        ipxe_driver      => 'iPXE driver:     ',
-        ipxe_name        => 'iPXE name:       ',
-        ipxe_description => 'iPXE description:',
-        file             => 'Source file:     ',
-        legacy_api       => 'Using legacy API:',
-        vendor_id        => 'PCI vendor ID:   ',
-        device_id        => 'PCI device ID:   ',
-        vendor_name      => 'Vendor name:     ',
-        device_name      => 'Device name:     ',
-    };
-    my $pci_only = {
-        vendor_id   => 1,
-        device_id   => 1,
-        vendor_name => 1,
-        device_name => 1,
-    };
-    my $output = "";
-    foreach my $column ( @$column_names ) {
-        next if $nic->{'bus'} eq 'isa' and $pci_only->{$column};
-        $output .= $labels->{$column}
-                .  " "
-                . ( $nic->{$column} || "" )
-                . "\n";
-    }
-    return $output;
-}
-
-# Output NIC list in JSON
-sub format_nic_list_json {
-    my ($nic_list, $column_names) = @_;
-
-    # Filter columns not mentioned
-    my @nics;
-    foreach my $nic ( @$nic_list ) {
-        my $filtered_nic = {};
-        foreach my $key ( @$column_names ) {
-            $filtered_nic->{$key} = $nic->{$key};
-        }
-        push @nics, $filtered_nic;
-    }
-
-    return JSON->new->pretty->utf8->encode(\@nics);
-}
-
-# Output NIC list in CSV
-sub format_nic_list_csv {
-    my ($nic_list, $column_names) = @_;
-    my @output;
-
-    # Output CSV header
-    my $csv = Text::CSV->new();
-    if ( $csv->combine( @$column_names ) ) {
-        push @output, $csv->string();
-    }
-
-    # Output CSV lines
-    foreach my $nic ( @$nic_list ) {
-        my @columns = @{ $nic }{ @$column_names };
-        if ( $csv->combine( @columns ) ) {
-            push @output, $csv->string();
-        }
-    }
-    return join("\n", @output) . "\n";
-}
-
-# Output NIC list in HTML
-sub format_nic_list_html {
-    my ($nic_list, $column_names) = @_;
-    my @output;
-
-    push @output, <<'EOM';
-<!DOCTYPE html>
-<html>
-<head>
-<meta charset="utf-8">
-<title>Network cards supported by iPXE</title>
-<style>
-table.tablesorter {
- border: thin solid black;
-}
-
-table.tablesorter thead {
- background-color: #EEE;
-}
-
-table.tablesorter thead th {
- font-weight: bold;
-}
-
-table.tablesorter tbody td {
- vertical-align: top;
- padding-left: 0.25em;
- padding-right: 0.25em;
- padding-bottom: 0.125em;
- white-space: nowrap;
-}
-
-table.tablesorter tbody tr.even {
- background-color: #eee;
-}
-
-table.tablesorter tbody tr.odd {
- background-color: #fff;
-}
-</style>
-</head>
-<body>
-<h1>Network cards supported by iPXE</h1>
-<table class="tablesorter">
-<thead>
-EOM
-
-    # Output HTML header
-    push @output, "<tr>"
-                . join("",
-                    map { "<th>" . HTML::Entities::encode($_) . "</th>" }
-                    @$column_names
-                  )
-                . "</tr>";
-
-    push @output, <<"EOM";
-</thead>
-<tbody>
-EOM
-    # Output HTML lines
-    my $counter = 0;
-    foreach my $nic ( @$nic_list ) {
-        my @columns = @{ $nic }{ @$column_names }; # array slice from hashref, see perldoc perldata if confusing
-        push @output, q!<tr class="! . ( $counter % 2 ? 'even' : 'odd' ) . q!">!
-                    . join("",
-                        map { "<td>" . HTML::Entities::encode( $_ || "" ) . "</td>" }
-                        @columns
-                      )
-                    . "</tr>";
-        $counter++;
-    }
-
-    push @output, <<'EOM';
-</tbody>
-</table>
-<script type="text/javascript" src="http://ajax.googleapis.com/ajax/libs/jquery/1.7.1/jquery.min.js"></script>
-<script>
-/*
- *
- * TableSorter 2.0 - Client-side table sorting with ease!
- * Version 2.0.5b
- * @requires jQuery v1.2.3
- * From http://tablesorter.com/
- *
- * Copyright (c) 2007 Christian Bach
- * Examples and docs at: http://tablesorter.com
- * Dual licensed under the MIT and GPL licenses:
- * http://www.opensource.org/licenses/mit-license.php
- * http://www.gnu.org/licenses/gpl.html
- *
- */
-(function($){$.extend({tablesorter:new
-function(){var parsers=[],widgets=[];this.defaults={cssHeader:"header",cssAsc:"headerSortUp",cssDesc:"headerSortDown",cssChildRow:"expand-child",sortInitialOrder:"asc",sortMultiSortKey:"shiftKey",sortForce:null,sortAppend:null,sortLocaleCompare:true,textExtraction:"simple",parsers:{},widgets:[],widgetZebra:{css:["even","odd"]},headers:{},widthFixed:false,cancelSelection:true,sortList:[],headerList:[],dateFormat:"us",decimal:'/\.|\,/g',onRenderHeader:null,selectorHeaders:'thead th',debug:false};function benchmark(s,d){log(s+","+(new Date().getTime()-d.getTime())+"ms");}this.benchmark=benchmark;function log(s){if(typeof console!="undefined"&&typeof console.debug!="undefined"){console.log(s);}else{alert(s);}}function buildParserCache(table,$headers){if(table.config.debug){var parsersDebug="";}if(table.tBodies.length==0)return;var rows=table.tBodies[0].rows;if(rows[0]){var list=[],cells=rows[0].cells,l=cells.length;for(var i=0;i<l;i++){var p=false;if($.metadata&&($($headers[i]).metadata()&&$($headers[i]).metadata().sorter)){p=getParserById($($headers[i]).metadata().sorter);}else if((table.config.headers[i]&&table.config.headers[i].sorter)){p=getParserById(table.config.headers[i].sorter);}if(!p){p=detectParserForColumn(table,rows,-1,i);}if(table.config.debug){parsersDebug+="column:"+i+" parser:"+p.id+"\n";}list.push(p);}}if(table.config.debug){log(parsersDebug);}return list;};function detectParserForColumn(table,rows,rowIndex,cellIndex){var l=parsers.length,node=false,nodeValue=false,keepLooking=true;while(nodeValue==''&&keepLooking){rowIndex++;if(rows[rowIndex]){node=getNodeFromRowAndCellIndex(rows,rowIndex,cellIndex);nodeValue=trimAndGetNodeText(table.config,node);if(table.config.debug){log('Checking if value was empty on row:'+rowIndex);}}else{keepLooking=false;}}for(var i=1;i<l;i++){if(parsers[i].is(nodeValue,table,node)){return parsers[i];}}return parsers[0];}function getNodeFromRowAndCellIndex(rows,rowIndex,cellIndex){return rows[rowIndex].cells[cellIndex];}function trimAndGetNodeText(config,node){return $.trim(getElementText(config,node));}function getParserById(name){var l=parsers.length;for(var i=0;i<l;i++){if(parsers[i].id.toLowerCase()==name.toLowerCase()){return parsers[i];}}return false;}function buildCache(table){if(table.config.debug){var cacheTime=new Date();}var totalRows=(table.tBodies[0]&&table.tBodies[0].rows.length)||0,totalCells=(table.tBodies[0].rows[0]&&table.tBodies[0].rows[0].cells.length)||0,parsers=table.config.parsers,cache={row:[],normalized:[]};for(var i=0;i<totalRows;++i){var c=$(table.tBodies[0].rows[i]),cols=[];if(c.hasClass(table.config.cssChildRow)){cache.row[cache.row.length-1]=cache.row[cache.row.length-1].add(c);continue;}cache.row.push(c);for(var j=0;j<totalCells;++j){cols.push(parsers[j].format(getElementText(table.config,c[0].cells[j]),table,c[0].cells[j]));}cols.push(cache.normalized.length);cache.normalized.push(cols);cols=null;};if(table.config.debug){benchmark("Building cache for "+totalRows+" rows:",cacheTime);}return cache;};function getElementText(config,node){var text="";if(!node)return"";if(!config.supportsTextContent)config.supportsTextContent=node.textContent||false;if(config.textExtraction=="simple"){if(config.supportsTextContent){text=node.textContent;}else{if(node.childNodes[0]&&node.childNodes[0].hasChildNodes()){text=node.childNodes[0].innerHTML;}else{text=node.innerHTML;}}}else{if(typeof(config.textExtraction)=="function"){text=config.textExtraction(node);}else{text=$(node).text();}}return text;}function appendToTable(table,cache){if(table.config.debug){var appendTime=new Date()}var c=cache,r=c.row,n=c.normalized,totalRows=n.length,checkCell=(n[0].length-1),tableBody=$(table.tBodies[0]),rows=[];for(var i=0;i<totalRows;i++){var pos=n[i][checkCell];rows.push(r[pos]);if(!table.config.appender){var l=r[pos].length;for(var j=0;j<l;j++){tableBody[0].appendChild(r[pos][j]);}}}if(table.config.appender){table.config.appender(table,rows);}rows=null;if(table.config.debug){benchmark("Rebuilt table:",appendTime);}applyWidget(table);setTimeout(function(){$(table).trigger("sortEnd");},0);};function buildHeaders(table){if(table.config.debug){var time=new Date();}var meta=($.metadata)?true:false;var header_index=computeTableHeaderCellIndexes(table);$tableHeaders=$(table.config.selectorHeaders,table).each(function(index){this.column=header_index[this.parentNode.rowIndex+"-"+this.cellIndex];this.order=formatSortingOrder(table.config.sortInitialOrder);this.count=this.order;if(checkHeaderMetadata(this)||checkHeaderOptions(table,index))this.sortDisabled=true;if(checkHeaderOptionsSortingLocked(table,index))this.order=this.lockedOrder=checkHeaderOptionsSortingLocked(table,index);if(!this.sortDisabled){var $th=$(this).addClass(table.config.cssHeader);if(table.config.onRenderHeader)table.config.onRenderHeader.apply($th);}table.config.headerList[index]=this;});if(table.config.debug){benchmark("Built headers:",time);log($tableHeaders);}return $tableHeaders;};function computeTableHeaderCellIndexes(t){var matrix=[];var lookup={};var thead=t.getElementsByTagName('THEAD')[0];var trs=thead.getElementsByTagName('TR');for(var i=0;i<trs.length;i++){var cells=trs[i].cells;for(var j=0;j<cells.length;j++){var c=cells[j];var rowIndex=c.parentNode.rowIndex;var cellId=rowIndex+"-"+c.cellIndex;var rowSpan=c.rowSpan||1;var colSpan=c.colSpan||1
-var firstAvailCol;if(typeof(matrix[rowIndex])=="undefined"){matrix[rowIndex]=[];}for(var k=0;k<matrix[rowIndex].length+1;k++){if(typeof(matrix[rowIndex][k])=="undefined"){firstAvailCol=k;break;}}lookup[cellId]=firstAvailCol;for(var k=rowIndex;k<rowIndex+rowSpan;k++){if(typeof(matrix[k])=="undefined"){matrix[k]=[];}var matrixrow=matrix[k];for(var l=firstAvailCol;l<firstAvailCol+colSpan;l++){matrixrow[l]="x";}}}}return lookup;}function checkCellColSpan(table,rows,row){var arr=[],r=table.tHead.rows,c=r[row].cells;for(var i=0;i<c.length;i++){var cell=c[i];if(cell.colSpan>1){arr=arr.concat(checkCellColSpan(table,headerArr,row++));}else{if(table.tHead.length==1||(cell.rowSpan>1||!r[row+1])){arr.push(cell);}}}return arr;};function checkHeaderMetadata(cell){if(($.metadata)&&($(cell).metadata().sorter===false)){return true;};return false;}function checkHeaderOptions(table,i){if((table.config.headers[i])&&(table.config.headers[i].sorter===false)){return true;};return false;}function checkHeaderOptionsSortingLocked(table,i){if((table.config.headers[i])&&(table.config.headers[i].lockedOrder))return table.config.headers[i].lockedOrder;return false;}function applyWidget(table){var c=table.config.widgets;var l=c.length;for(var i=0;i<l;i++){getWidgetById(c[i]).format(table);}}function getWidgetById(name){var l=widgets.length;for(var i=0;i<l;i++){if(widgets[i].id.toLowerCase()==name.toLowerCase()){return widgets[i];}}};function formatSortingOrder(v){if(typeof(v)!="Number"){return(v.toLowerCase()=="desc")?1:0;}else{return(v==1)?1:0;}}function isValueInArray(v,a){var l=a.length;for(var i=0;i<l;i++){if(a[i][0]==v){return true;}}return false;}function setHeadersCss(table,$headers,list,css){$headers.removeClass(css[0]).removeClass(css[1]);var h=[];$headers.each(function(offset){if(!this.sortDisabled){h[this.column]=$(this);}});var l=list.length;for(var i=0;i<l;i++){h[list[i][0]].addClass(css[list[i][1]]);}}function fixColumnWidth(table,$headers){var c=table.config;if(c.widthFixed){var colgroup=$('<colgroup>');$("tr:first td",table.tBodies[0]).each(function(){colgroup.append($('<col>').css('width',$(this).width()));});$(table).prepend(colgroup);};}function updateHeaderSortCount(table,sortList){var c=table.config,l=sortList.length;for(var i=0;i<l;i++){var s=sortList[i],o=c.headerList[s[0]];o.count=s[1];o.count++;}}function multisort(table,sortList,cache){if(table.config.debug){var sortTime=new Date();}var dynamicExp="var sortWrapper = function(a,b) {",l=sortList.length;for(var i=0;i<l;i++){var c=sortList[i][0];var order=sortList[i][1];var s=(table.config.parsers[c].type=="text")?((order==0)?makeSortFunction("text","asc",c):makeSortFunction("text","desc",c)):((order==0)?makeSortFunction("numeric","asc",c):makeSortFunction("numeric","desc",c));var e="e"+i;dynamicExp+="var "+e+" = "+s;dynamicExp+="if("+e+") { return "+e+"; } ";dynamicExp+="else { ";}var orgOrderCol=cache.normalized[0].length-1;dynamicExp+="return a["+orgOrderCol+"]-b["+orgOrderCol+"];";for(var i=0;i<l;i++){dynamicExp+="}; ";}dynamicExp+="return 0; ";dynamicExp+="}; ";if(table.config.debug){benchmark("Evaling expression:"+dynamicExp,new Date());}eval(dynamicExp);cache.normalized.sort(sortWrapper);if(table.config.debug){benchmark("Sorting on "+sortList.toString()+" and dir "+order+" time:",sortTime);}return cache;};function makeSortFunction(type,direction,index){var a="a["+index+"]",b="b["+index+"]";if(type=='text'&&direction=='asc'){return"("+a+" == "+b+" ? 0 : ("+a+" === null ? Number.POSITIVE_INFINITY : ("+b+" === null ? Number.NEGATIVE_INFINITY : ("+a+" < "+b+") ? -1 : 1 )));";}else if(type=='text'&&direction=='desc'){return"("+a+" == "+b+" ? 0 : ("+a+" === null ? Number.POSITIVE_INFINITY : ("+b+" === null ? Number.NEGATIVE_INFINITY : ("+b+" < "+a+") ? -1 : 1 )));";}else if(type=='numeric'&&direction=='asc'){return"("+a+" === null && "+b+" === null) ? 0 :("+a+" === null ? Number.POSITIVE_INFINITY : ("+b+" === null ? Number.NEGATIVE_INFINITY : "+a+" - "+b+"));";}else if(type=='numeric'&&direction=='desc'){return"("+a+" === null && "+b+" === null) ? 0 :("+a+" === null ? Number.POSITIVE_INFINITY : ("+b+" === null ? Number.NEGATIVE_INFINITY : "+b+" - "+a+"));";}};function makeSortText(i){return"((a["+i+"] < b["+i+"]) ? -1 : ((a["+i+"] > b["+i+"]) ? 1 : 0));";};function makeSortTextDesc(i){return"((b["+i+"] < a["+i+"]) ? -1 : ((b["+i+"] > a["+i+"]) ? 1 : 0));";};function makeSortNumeric(i){return"a["+i+"]-b["+i+"];";};function makeSortNumericDesc(i){return"b["+i+"]-a["+i+"];";};function sortText(a,b){if(table.config.sortLocaleCompare)return a.localeCompare(b);return((a<b)?-1:((a>b)?1:0));};function sortTextDesc(a,b){if(table.config.sortLocaleCompare)return b.localeCompare(a);return((b<a)?-1:((b>a)?1:0));};function sortNumeric(a,b){return a-b;};function sortNumericDesc(a,b){return b-a;};function getCachedSortType(parsers,i){return parsers[i].type;};this.construct=function(settings){return this.each(function(){if(!this.tHead||!this.tBodies)return;var $this,$document,$headers,cache,config,shiftDown=0,sortOrder;this.config={};config=$.extend(this.config,$.tablesorter.defaults,settings);$this=$(this);$.data(this,"tablesorter",config);$headers=buildHeaders(this);this.config.parsers=buildParserCache(this,$headers);cache=buildCache(this);var sortCSS=[config.cssDesc,config.cssAsc];fixColumnWidth(this);$headers.click(function(e){var totalRows=($this[0].tBodies[0]&&$this[0].tBodies[0].rows.length)||0;if(!this.sortDisabled&&totalRows>0){$this.trigger("sortStart");var $cell=$(this);var i=this.column;this.order=this.count++%2;if(this.lockedOrder)this.order=this.lockedOrder;if(!e[config.sortMultiSortKey]){config.sortList=[];if(config.sortForce!=null){var a=config.sortForce;for(var j=0;j<a.length;j++){if(a[j][0]!=i){config.sortList.push(a[j]);}}}config.sortList.push([i,this.order]);}else{if(isValueInArray(i,config.sortList)){for(var j=0;j<config.sortList.length;j++){var s=config.sortList[j],o=config.headerList[s[0]];if(s[0]==i){o.count=s[1];o.count++;s[1]=o.count%2;}}}else{config.sortList.push([i,this.order]);}};setTimeout(function(){setHeadersCss($this[0],$headers,config.sortList,sortCSS);appendToTable($this[0],multisort($this[0],config.sortList,cache));},1);return false;}}).mousedown(function(){if(config.cancelSelection){this.onselectstart=function(){return false};return false;}});$this.bind("update",function(){var me=this;setTimeout(function(){me.config.parsers=buildParserCache(me,$headers);cache=buildCache(me);},1);}).bind("updateCell",function(e,cell){var config=this.config;var pos=[(cell.parentNode.rowIndex-1),cell.cellIndex];cache.normalized[pos[0]][pos[1]]=config.parsers[pos[1]].format(getElementText(config,cell),cell);}).bind("sorton",function(e,list){$(this).trigger("sortStart");config.sortList=list;var sortList=config.sortList;updateHeaderSortCount(this,sortList);setHeadersCss(this,$headers,sortList,sortCSS);appendToTable(this,multisort(this,sortList,cache));}).bind("appendCache",function(){appendToTable(this,cache);}).bind("applyWidgetId",function(e,id){getWidgetById(id).format(this);}).bind("applyWidgets",function(){applyWidget(this);});if($.metadata&&($(this).metadata()&&$(this).metadata().sortlist)){config.sortList=$(this).metadata().sortlist;}if(config.sortList.length>0){$this.trigger("sorton",[config.sortList]);}applyWidget(this);});};this.addParser=function(parser){var l=parsers.length,a=true;for(var i=0;i<l;i++){if(parsers[i].id.toLowerCase()==parser.id.toLowerCase()){a=false;}}if(a){parsers.push(parser);};};this.addWidget=function(widget){widgets.push(widget);};this.formatFloat=function(s){var i=parseFloat(s);return(isNaN(i))?0:i;};this.formatInt=function(s){var i=parseInt(s);return(isNaN(i))?0:i;};this.isDigit=function(s,config){return/^[-+]?\d*$/.test($.trim(s.replace(/[,.']/g,'')));};this.clearTableBody=function(table){if($.browser.msie){function empty(){while(this.firstChild)this.removeChild(this.firstChild);}empty.apply(table.tBodies[0]);}else{table.tBodies[0].innerHTML="";}};}});$.fn.extend({tablesorter:$.tablesorter.construct});var ts=$.tablesorter;ts.addParser({id:"text",is:function(s){return true;},format:function(s){return $.trim(s.toLocaleLowerCase());},type:"text"});ts.addParser({id:"digit",is:function(s,table){var c=table.config;return $.tablesorter.isDigit(s,c);},format:function(s){return $.tablesorter.formatFloat(s);},type:"numeric"});ts.addParser({id:"currency",is:function(s){return/^[£$€?.]/.test(s);},format:function(s){return $.tablesorter.formatFloat(s.replace(new RegExp(/[£$€]/g),""));},type:"numeric"});ts.addParser({id:"ipAddress",is:function(s){return/^\d{2,3}[\.]\d{2,3}[\.]\d{2,3}[\.]\d{2,3}$/.test(s);},format:function(s){var a=s.split("."),r="",l=a.length;for(var i=0;i<l;i++){var item=a[i];if(item.length==2){r+="0"+item;}else{r+=item;}}return $.tablesorter.formatFloat(r);},type:"numeric"});ts.addParser({id:"url",is:function(s){return/^(https?|ftp|file):\/\/$/.test(s);},format:function(s){return jQuery.trim(s.replace(new RegExp(/(https?|ftp|file):\/\//),''));},type:"text"});ts.addParser({id:"isoDate",is:function(s){return/^\d{4}[\/-]\d{1,2}[\/-]\d{1,2}$/.test(s);},format:function(s){return $.tablesorter.formatFloat((s!="")?new Date(s.replace(new RegExp(/-/g),"/")).getTime():"0");},type:"numeric"});ts.addParser({id:"percent",is:function(s){return/\%$/.test($.trim(s));},format:function(s){return $.tablesorter.formatFloat(s.replace(new RegExp(/%/g),""));},type:"numeric"});ts.addParser({id:"usLongDate",is:function(s){return s.match(new RegExp(/^[A-Za-z]{3,10}\.? [0-9]{1,2}, ([0-9]{4}|'?[0-9]{2}) (([0-2]?[0-9]:[0-5][0-9])|([0-1]?[0-9]:[0-5][0-9]\s(AM|PM)))$/));},format:function(s){return $.tablesorter.formatFloat(new Date(s).getTime());},type:"numeric"});ts.addParser({id:"shortDate",is:function(s){return/\d{1,2}[\/\-]\d{1,2}[\/\-]\d{2,4}/.test(s);},format:function(s,table){var c=table.config;s=s.replace(/\-/g,"/");if(c.dateFormat=="us"){s=s.replace(/(\d{1,2})[\/\-](\d{1,2})[\/\-](\d{4})/,"$3/$1/$2");}else if(c.dateFormat=="uk"){s=s.replace(/(\d{1,2})[\/\-](\d{1,2})[\/\-](\d{4})/,"$3/$2/$1");}else if(c.dateFormat=="dd/mm/yy"||c.dateFormat=="dd-mm-yy"){s=s.replace(/(\d{1,2})[\/\-](\d{1,2})[\/\-](\d{2})/,"$1/$2/$3");}return $.tablesorter.formatFloat(new Date(s).getTime());},type:"numeric"});ts.addParser({id:"time",is:function(s){return/^(([0-2]?[0-9]:[0-5][0-9])|([0-1]?[0-9]:[0-5][0-9]\s(am|pm)))$/.test(s);},format:function(s){return $.tablesorter.formatFloat(new Date("2000/01/01 "+s).getTime());},type:"numeric"});ts.addParser({id:"metadata",is:function(s){return false;},format:function(s,table,cell){var c=table.config,p=(!c.parserMetadataName)?'sortValue':c.parserMetadataName;return $(cell).metadata()[p];},type:"numeric"});ts.addWidget({id:"zebra",format:function(table){if(table.config.debug){var time=new Date();}var $tr,row=-1,odd;$("tr:visible",table.tBodies[0]).each(function(i){$tr=$(this);if(!$tr.hasClass(table.config.cssChildRow))row++;odd=(row%2==0);$tr.removeClass(table.config.widgetZebra.css[odd?0:1]).addClass(table.config.widgetZebra.css[odd?1:0])});if(table.config.debug){$.tablesorter.benchmark("Applying Zebra widget",time);}}});})(jQuery);
-</script>
-<script type="text/javascript">
-$(document).ready(function() {
-    $("table.tablesorter").tablesorter();
-});
-</script>
-</body>
-</html>
-EOM
-    return join("\n", @output);
-}
-
-# Output NIC list in DokuWiki format (for http://ipxe.org)
-sub format_nic_list_dokuwiki {
-    my ($nic_list, $column_names) = @_;
-    my @output;
-
-    push @output, <<'EOM';
-EOM
-
-    # Output DokuWiki table header
-    push @output, "^"
-                . join("^",
-                    map { $_ || "" }
-                    @$column_names
-                  )
-                . "^";
-
-    # Output DokuWiki table entries
-    foreach my $nic ( @$nic_list ) {
-        my @columns = @{ $nic }{ @$column_names }; # array slice from hashref, see perldoc perldata if confusing
-        push @output, '|'
-                    . join('|',
-                        map { $_ || "" }
-                        @columns
-                      )
-                    . '|';
-    }
-
-    return join("\n", @output);
-}
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/nrv2b.c ipxe-1.0.1~lliurex1505/src/util/nrv2b.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/nrv2b.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/nrv2b.c	2012-01-06 23:49:04.000000000 +0000
@@ -77,7 +77,7 @@
 
 /* These will be a complete waste of time on a lo-endian */
 /* system, but it only gets done once so WTF. */
-static unsigned long __attribute__ (( unused )) i86ul_to_host(unsigned long ul)
+static unsigned long i86ul_to_host(unsigned long ul)
 {
 	unsigned long res = 0;
 	int i;
@@ -209,7 +209,7 @@
 
 #define SWD_HSIZE	16384
 #define SWD_MAX_CHAIN	2048
-#undef SWD_BEST_OFF
+#define SWD_BEST_OFF    1
 
 #define HEAD3(b,p) \
     (((0x9f5f*(((((uint32_t)b[p]<<5)^b[p+1])<<5)^b[p+2]))>>5) & (SWD_HSIZE-1))
@@ -375,6 +375,7 @@
 int swd_init(struct ucl_swd *s, const uint8_t *dict, unsigned int dict_len)
 {
 	unsigned int i = 0;
+	int c = 0;
 
 	if (s->n == 0)
 		s->n = N;
@@ -438,7 +439,7 @@
 void swd_exit(struct ucl_swd *s)
 {
 	/* unused s */
-	( void ) s;
+
 }
 
 #define swd_pos2off(s,pos) \
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/Option/ROM.pm ipxe-1.0.1~lliurex1505/src/util/Option/ROM.pm
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/Option/ROM.pm	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/Option/ROM.pm	2012-01-06 23:49:04.000000000 +0000
@@ -14,8 +14,7 @@
 #
 # You should have received a copy of the GNU General Public License
 # along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
-# 02110-1301, USA.
+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 
 =head1 NAME
 
@@ -170,17 +169,13 @@
 
 use constant ROM_SIGNATURE => 0xaa55;
 use constant PCI_SIGNATURE => 'PCIR';
-use constant PCI_LAST_IMAGE => 0x80;
 use constant PNP_SIGNATURE => '$PnP';
-use constant IPXE_SIGNATURE => 'iPXE';
 
-our @EXPORT_OK = qw ( ROM_SIGNATURE PCI_SIGNATURE PCI_LAST_IMAGE
-		      PNP_SIGNATURE IPXE_SIGNATURE );
+our @EXPORT_OK = qw ( ROM_SIGNATURE PCI_SIGNATURE PNP_SIGNATURE );
 our %EXPORT_TAGS = ( all => [ @EXPORT_OK ] );
 
 use constant JMP_SHORT => 0xeb;
 use constant JMP_NEAR => 0xe9;
-use constant CALL_NEAR => 0xe8;
 
 sub pack_init {
   my $dest = shift;
@@ -204,9 +199,6 @@
   } elsif ( $jump == JMP_NEAR ) {
     my $offset = unpack ( "xS", $instr );
     return ( $offset + 6 );
-  } elsif ( $jump == CALL_NEAR ) {
-    my $offset = unpack ( "xS", $instr );
-    return ( $offset + 6 );
   } elsif ( $jump == 0 ) {
     return 0;
   } else {
@@ -237,7 +229,6 @@
       init =>		{ offset => 0x03, length => 0x03,
 			  pack => \&pack_init, unpack => \&unpack_init },
       checksum =>	{ offset => 0x06, length => 0x01, pack => "C" },
-      ipxe_header =>	{ offset => 0x10, length => 0x02, pack => "S" },
       bofm_header =>	{ offset => 0x14, length => 0x02, pack => "S" },
       undi_header =>	{ offset => 0x16, length => 0x02, pack => "S" },
       pci_header =>	{ offset => 0x18, length => 0x02, pack => "S" },
@@ -250,53 +241,6 @@
 
 =pod
 
-=item C<< set ( $data ) >>
-
-Set option ROM contents.
-
-=cut
-
-sub set {
-  my $hash = shift;
-  my $self = tied(%$hash);
-  my $data = shift;
-
-  # Store data
-  $self->{data} = \$data;
-
-  # Split out any data belonging to the next image
-  delete $self->{next_image};
-  my $length = ( $hash->{length} * 512 );
-  my $pci_header = $hash->pci_header();
-  if ( ( $length < length $data ) &&
-       ( defined $pci_header ) &&
-       ( ! ( $pci_header->{last_image} & PCI_LAST_IMAGE ) ) ) {
-    my $remainder = substr ( $data, $length );
-    $data = substr ( $data, 0, $length );
-    $self->{next_image} = new Option::ROM;
-    $self->{next_image}->set ( $remainder );
-  }
-}
-
-=pod
-
-=item C<< get () >>
-
-Get option ROM contents.
-
-=cut
-
-sub get {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  my $data = ${$self->{data}};
-  $data .= $self->{next_image}->get() if $self->{next_image};
-  return $data;
-}
-
-=pod
-
 =item C<< load ( $filename ) >>
 
 Load option ROM contents from the file C<$filename>.
@@ -312,8 +256,8 @@
 
   open my $fh, "<$filename"
       or croak "Cannot open $filename for reading: $!";
-  read $fh, my $data, -s $fh;
-  $hash->set ( $data );
+  read $fh, my $data, ( 128 * 1024 ); # 128kB is theoretical max size
+  $self->{data} = \$data;
   close $fh;
 }
 
@@ -335,8 +279,7 @@
 
   open my $fh, ">$filename"
       or croak "Cannot open $filename for writing: $!";
-  my $data = $hash->get();
-  print $fh $data;
+  print $fh ${$self->{data}};
   close $fh;
 }
 
@@ -396,60 +339,6 @@
 
 =pod
 
-=item C<< undi_header () >>
-
-Return a C<Option::ROM::UNDI> object representing the ROM's UNDI header,
-if present.
-
-=cut
-
-sub undi_header {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  my $offset = $hash->{undi_header};
-  return undef unless $offset != 0;
-
-  return Option::ROM::UNDI->new ( $self->{data}, $offset );
-}
-
-=pod
-
-=item C<< ipxe_header () >>
-
-Return a C<Option::ROM::iPXE> object representing the ROM's iPXE
-header, if present.
-
-=cut
-
-sub ipxe_header {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  my $offset = $hash->{ipxe_header};
-  return undef unless $offset != 0;
-
-  return Option::ROM::iPXE->new ( $self->{data}, $offset );
-}
-
-=pod
-
-=item C<< next_image () >>
-
-Return a C<Option::ROM> object representing the next image within the
-ROM, if present.
-
-=cut
-
-sub next_image {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  return $self->{next_image};
-}
-
-=pod
-
 =item C<< checksum () >>
 
 Calculate the byte checksum of the ROM.
@@ -610,119 +499,4 @@
   return unpack ( "Z*", $raw );
 }
 
-##############################################################################
-#
-# Option::ROM::UNDI
-#
-##############################################################################
-
-package Option::ROM::UNDI;
-
-use strict;
-use warnings;
-use Carp;
-use bytes;
-
-sub new {
-  my $class = shift;
-  my $data = shift;
-  my $offset = shift;
-
-  my $hash = {};
-  tie %$hash, "Option::ROM::Fields", {
-    data => $data,
-    offset => $offset,
-    length => 0x16,
-    fields => {
-      signature =>	{ offset => 0x00, length => 0x04, pack => "a4" },
-      struct_length =>	{ offset => 0x04, length => 0x01, pack => "C" },
-      checksum =>	{ offset => 0x05, length => 0x01, pack => "C" },
-      struct_revision =>{ offset => 0x06, length => 0x01, pack => "C" },
-      version_revision =>{ offset => 0x07, length => 0x01, pack => "C" },
-      version_minor =>	{ offset => 0x08, length => 0x01, pack => "C" },
-      version_major =>	{ offset => 0x09, length => 0x01, pack => "C" },
-      loader_entry =>	{ offset => 0x0a, length => 0x02, pack => "S" },
-      stack_size =>	{ offset => 0x0c, length => 0x02, pack => "S" },
-      data_size =>	{ offset => 0x0e, length => 0x02, pack => "S" },
-      code_size =>	{ offset => 0x10, length => 0x02, pack => "S" },
-      bus_type =>	{ offset => 0x12, length => 0x04, pack => "a4" },
-    },
-  };
-  bless $hash, $class;
-
-  # Retrieve true length of structure
-  my $self = tied ( %$hash );
-  $self->{length} = $hash->{struct_length};
-
-  return $hash;
-}
-
-sub checksum {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  return $self->checksum();
-}
-
-sub fix_checksum {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  $hash->{checksum} = ( ( $hash->{checksum} - $hash->checksum() ) & 0xff );
-}
-
-##############################################################################
-#
-# Option::ROM::iPXE
-#
-##############################################################################
-
-package Option::ROM::iPXE;
-
-use strict;
-use warnings;
-use Carp;
-use bytes;
-
-sub new {
-  my $class = shift;
-  my $data = shift;
-  my $offset = shift;
-
-  my $hash = {};
-  tie %$hash, "Option::ROM::Fields", {
-    data => $data,
-    offset => $offset,
-    length => 0x06,
-    fields => {
-      signature =>	{ offset => 0x00, length => 0x04, pack => "a4" },
-      struct_length =>	{ offset => 0x04, length => 0x01, pack => "C" },
-      checksum =>	{ offset => 0x05, length => 0x01, pack => "C" },
-      shrunk_length =>	{ offset => 0x06, length => 0x01, pack => "C" },
-      build_id =>	{ offset => 0x08, length => 0x04, pack => "L" },
-    },
-  };
-  bless $hash, $class;
-
-  # Retrieve true length of structure
-  my $self = tied ( %$hash );
-  $self->{length} = $hash->{struct_length};
-
-  return $hash;
-}
-
-sub checksum {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  return $self->checksum();
-}
-
-sub fix_checksum {
-  my $hash = shift;
-  my $self = tied(%$hash);
-
-  $hash->{checksum} = ( ( $hash->{checksum} - $hash->checksum() ) & 0xff );
-}
-
 1;
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/parserom.pl ipxe-1.0.1~lliurex1505/src/util/parserom.pl
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/parserom.pl	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/parserom.pl	2012-01-06 23:49:04.000000000 +0000
@@ -1,4 +1,4 @@
-#!/usr/bin/env perl
+#!/usr/bin/perl -w
 #
 # Parse PCI_ROM and ISA_ROM entries from a source file on stdin and
 # output the relevant Makefile variable definitions to stdout
diff -Nru ipxe-1.0.0+git-20131111.c3d1e78/src/util/zbin.c ipxe-1.0.1~lliurex1505/src/util/zbin.c
--- ipxe-1.0.0+git-20131111.c3d1e78/src/util/zbin.c	2013-11-11 17:33:35.000000000 +0000
+++ ipxe-1.0.1~lliurex1505/src/util/zbin.c	2012-01-06 23:49:04.000000000 +0000
@@ -143,7 +143,7 @@
 			  max_len );
 		return -1;
 	}
-	memset ( output->buf, 0xff, max_len );
+	memset ( output->buf, 0xff, sizeof ( output->buf ) );
 	return 0;
 }
 
@@ -218,8 +218,7 @@
 	return 0;
 }
 
-static int process_zinfo_payl ( struct input_file *input
-					__attribute__ (( unused )),
+static int process_zinfo_payl ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	struct zinfo_payload *payload = &zinfo->payload;
@@ -230,22 +229,20 @@
 	if ( DEBUG ) {
 		fprintf ( stderr, "PAYL at %#zx\n", output->hdr_len );
 	}
-	return 0;
 }
 
-static int process_zinfo_add ( struct input_file *input
-					__attribute__ (( unused )),
+static int process_zinfo_add ( struct input_file *input,
 			       struct output_file *output,
 			       size_t len,
-			       struct zinfo_add *add, size_t offset,
+			       struct zinfo_add *add,
 			       size_t datasize ) {
+	size_t offset = add->offset;
 	void *target;
 	signed long addend;
 	unsigned long size;
 	signed long val;
 	unsigned long mask;
 
-	offset += add->offset;
 	if ( ( offset + datasize ) > output->len ) {
 		fprintf ( stderr, "Add at %#zx outside output buffer\n",
 			  offset );
@@ -319,90 +316,42 @@
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->len,
-				   &zinfo->add, 0, 1 );
+				   &zinfo->add, 1 );
 }
 
 static int process_zinfo_addw ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->len,
-				   &zinfo->add, 0, 2 );
+				   &zinfo->add, 2 );
 }
 
 static int process_zinfo_addl ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->len,
-				   &zinfo->add, 0, 4 );
+				   &zinfo->add, 4 );
 }
 
 static int process_zinfo_adhb ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->hdr_len,
-				   &zinfo->add, 0, 1 );
+				   &zinfo->add, 1 );
 }
 
 static int process_zinfo_adhw ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->hdr_len,
-				   &zinfo->add, 0, 2 );
+				   &zinfo->add, 2 );
 }
 
 static int process_zinfo_adhl ( struct input_file *input,
 				struct output_file *output,
 				union zinfo_record *zinfo ) {
 	return process_zinfo_add ( input, output, output->hdr_len,
-				   &zinfo->add, 0, 4 );
-}
-
-static int process_zinfo_adpb ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, 0, 1 );
-}
-
-static int process_zinfo_adpw ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, 0, 2 );
-}
-
-static int process_zinfo_adpl ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, 0, 4 );
-}
-
-static int process_zinfo_appb ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, output->hdr_len, 1 );
-}
-
-static int process_zinfo_appw ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, output->hdr_len, 2 );
-}
-
-static int process_zinfo_appl ( struct input_file *input,
-				struct output_file *output,
-				union zinfo_record *zinfo ) {
-	return process_zinfo_add ( input, output,
-				   ( output->len - output->hdr_len ),
-				   &zinfo->add, output->hdr_len, 4 );
+				   &zinfo->add, 4 );
 }
 
 struct zinfo_processor {
@@ -422,12 +371,6 @@
 	{ "ADHB", process_zinfo_adhb },
 	{ "ADHW", process_zinfo_adhw },
 	{ "ADHL", process_zinfo_adhl },
-	{ "ADPB", process_zinfo_adpb },
-	{ "ADPW", process_zinfo_adpw },
-	{ "ADPL", process_zinfo_adpl },
-	{ "APPB", process_zinfo_appb },
-	{ "APPW", process_zinfo_appw },
-	{ "APPL", process_zinfo_appl },
 };
 
 static int process_zinfo ( struct input_file *input,