diff -Nru intel-vaapi-driver-1.6.2/configure intel-vaapi-driver-1.7.0/configure --- intel-vaapi-driver-1.6.2/configure 2015-12-15 06:00:47.000000000 +0000 +++ intel-vaapi-driver-1.7.0/configure 2016-03-15 06:42:19.000000000 +0000 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for intel_driver 1.6.2. +# Generated by GNU Autoconf 2.69 for intel_driver 1.7.0. # # Report bugs to . # @@ -590,8 +590,8 @@ # Identity of this package. PACKAGE_NAME='intel_driver' PACKAGE_TARNAME='libva-intel-driver' -PACKAGE_VERSION='1.6.2' -PACKAGE_STRING='intel_driver 1.6.2' +PACKAGE_VERSION='1.7.0' +PACKAGE_STRING='intel_driver 1.7.0' PACKAGE_BUGREPORT='haihao.xiang@intel.com' PACKAGE_URL='' @@ -1380,7 +1380,7 @@ # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures intel_driver 1.6.2 to adapt to many kinds of systems. +\`configure' configures intel_driver 1.7.0 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1451,7 +1451,7 @@ if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of intel_driver 1.6.2:";; + short | recursive ) echo "Configuration of intel_driver 1.7.0:";; esac cat <<\_ACEOF @@ -1601,7 +1601,7 @@ test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -intel_driver configure 1.6.2 +intel_driver configure 1.7.0 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -1970,7 +1970,7 @@ This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by intel_driver $as_me 1.6.2, which was +It was created by intel_driver $as_me 1.7.0, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -2834,7 +2834,7 @@ # Define the identity of the package. PACKAGE='libva-intel-driver' - VERSION='1.6.2' + VERSION='1.7.0' cat >>confdefs.h <<_ACEOF @@ -3047,16 +3047,16 @@ INTEL_DRIVER_MAJOR_VERSION=1 -INTEL_DRIVER_MINOR_VERSION=6 -INTEL_DRIVER_MICRO_VERSION=2 +INTEL_DRIVER_MINOR_VERSION=7 +INTEL_DRIVER_MICRO_VERSION=0 $as_echo "#define INTEL_DRIVER_MAJOR_VERSION 1" >>confdefs.h -$as_echo "#define INTEL_DRIVER_MINOR_VERSION 6" >>confdefs.h +$as_echo "#define INTEL_DRIVER_MINOR_VERSION 7" >>confdefs.h -$as_echo "#define INTEL_DRIVER_MICRO_VERSION 2" >>confdefs.h +$as_echo "#define INTEL_DRIVER_MICRO_VERSION 0" >>confdefs.h $as_echo "#define INTEL_DRIVER_PRE_VERSION 0" >>confdefs.h @@ -13133,7 +13133,7 @@ done -LIBVA_PACKAGE_VERSION=1.6.0 +LIBVA_PACKAGE_VERSION=1.7.0 LIBDRM_VERSION=2.4.45 @@ -13540,12 +13540,12 @@ pkg_cv_LIBVA_DEPS_CFLAGS="$LIBVA_DEPS_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.38\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libva >= 0.38") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.39\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva >= 0.39") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBVA_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva >= 0.38" 2>/dev/null` + pkg_cv_LIBVA_DEPS_CFLAGS=`$PKG_CONFIG --cflags "libva >= 0.39" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -13557,12 +13557,12 @@ pkg_cv_LIBVA_DEPS_LIBS="$LIBVA_DEPS_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.38\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libva >= 0.38") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libva >= 0.39\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libva >= 0.39") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_LIBVA_DEPS_LIBS=`$PKG_CONFIG --libs "libva >= 0.38" 2>/dev/null` + pkg_cv_LIBVA_DEPS_LIBS=`$PKG_CONFIG --libs "libva >= 0.39" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -13583,14 +13583,14 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva >= 0.38" 2>&1` + LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libva >= 0.39" 2>&1` else - LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva >= 0.38" 2>&1` + LIBVA_DEPS_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libva >= 0.39" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$LIBVA_DEPS_PKG_ERRORS" >&5 - as_fn_error $? "Package requirements (libva >= 0.38) were not met: + as_fn_error $? "Package requirements (libva >= 0.39) were not met: $LIBVA_DEPS_PKG_ERRORS @@ -14946,7 +14946,7 @@ # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by intel_driver $as_me 1.6.2, which was +This file was extended by intel_driver $as_me 1.7.0, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -15012,7 +15012,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -intel_driver config.status 1.6.2 +intel_driver config.status 1.7.0 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" diff -Nru intel-vaapi-driver-1.6.2/configure.ac intel-vaapi-driver-1.7.0/configure.ac --- intel-vaapi-driver-1.6.2/configure.ac 2015-12-15 05:57:59.000000000 +0000 +++ intel-vaapi-driver-1.7.0/configure.ac 2016-03-15 06:42:03.000000000 +0000 @@ -1,7 +1,7 @@ # intel-driver package version number m4_define([intel_driver_major_version], [1]) -m4_define([intel_driver_minor_version], [6]) -m4_define([intel_driver_micro_version], [2]) +m4_define([intel_driver_minor_version], [7]) +m4_define([intel_driver_micro_version], [0]) m4_define([intel_driver_pre_version], [0]) m4_define([intel_driver_version], [intel_driver_major_version.intel_driver_minor_version.intel_driver_micro_version]) @@ -10,8 +10,8 @@ ]) # libva minimum version requirement -m4_define([va_api_version], [0.38]) -m4_define([libva_package_version], [1.6.0]) +m4_define([va_api_version], [0.39]) +m4_define([libva_package_version], [1.7.0]) # libdrm minimum version requirement m4_define([libdrm_version], [2.4.45]) diff -Nru intel-vaapi-driver-1.6.2/debian/changelog intel-vaapi-driver-1.7.0/debian/changelog --- intel-vaapi-driver-1.6.2/debian/changelog 2016-03-11 03:34:42.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian/changelog 2016-03-18 17:33:34.000000000 +0000 @@ -1,14 +1,22 @@ -intel-vaapi-driver (1.6.2-1~ppa2) trusty; urgency=medium +intel-vaapi-driver (1.7.0-1~ppa1) trusty; urgency=medium - * redo + * Trusty - -- Doug McMahon Thu, 10 Mar 2016 22:34:15 -0500 + -- Doug McMahon Fri, 18 Mar 2016 13:33:07 -0400 -intel-vaapi-driver (1.6.2-1~ppa1) trusty; urgency=medium +intel-vaapi-driver (1.7.0-1) unstable; urgency=medium - * Trusty + * New upstream release. + * Move to automatic debug symbol packages. + * debian/control: + - Bump Standards-Version. + - Update Vcs-*. + - Bump B-D on libva-dev to 1.7.0. + - Remove obsolete Breaks, Replaces and Provides. + * debian/{rules,i965-va-driver.install}: Update for change to a single + binary package. - -- Doug McMahon Thu, 10 Mar 2016 21:14:24 -0500 + -- Sebastian Ramacher Wed, 16 Mar 2016 01:52:03 +0100 intel-vaapi-driver (1.6.2-1) unstable; urgency=medium diff -Nru intel-vaapi-driver-1.6.2/debian/control intel-vaapi-driver-1.7.0/debian/control --- intel-vaapi-driver-1.6.2/debian/control 2016-03-11 03:33:58.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian/control 2016-03-18 17:36:33.000000000 +0000 @@ -11,15 +11,15 @@ debhelper (>= 9), dh-autoreconf, libdrm-dev (>= 2.4.45), - libva-dev (>= 1.6.0~pre1), + libva-dev (>= 1.7.0), libwayland-dev (>= 1.0.0) [amd64 i386], libx11-dev, pkg-config, python [amd64 i386] Standards-Version: 3.9.6 Homepage: http://www.freedesktop.org/wiki/Software/vaapi -Vcs-Git: git://anonscm.debian.org/pkg-multimedia/intel-vaapi-driver.git -Vcs-Browser: http://anonscm.debian.org/gitweb/?p=pkg-multimedia/intel-vaapi-driver.git +Vcs-Git: https://anonscm.debian.org/git/pkg-multimedia/intel-vaapi-driver.git +Vcs-Browser: https://anonscm.debian.org/cgit/pkg-multimedia/intel-vaapi-driver.git Package: i965-va-driver Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386 @@ -28,12 +28,7 @@ Depends: ${misc:Depends}, ${shlibs:Depends} -Breaks: - libva-intel-vaapi-driver (<< 1.0.16-4) -Replaces: - libva-intel-vaapi-driver Provides: - libva-intel-vaapi-driver, va-driver Enhances: libva1 @@ -53,28 +48,3 @@ * Ivy Bridge * Haswell * Broadwell - -Package: i965-va-driver-dbg -Section: debug -Priority: extra -Architecture: amd64 i386 kfreebsd-amd64 kfreebsd-i386 -Multi-Arch: same -Breaks: - libva-intel-vaapi-driver-dbg (<< 1.0.16-4) -Replaces: - libva-intel-vaapi-driver-dbg -Provides: - libva-intel-vaapi-driver-dbg -Depends: - i965-va-driver (= ${binary:Version}), - ${misc:Depends} -Description: VAAPI driver for Intel G45 & HD Graphics family (debug symbols) - The VA-API (Video Acceleration API) enables hardware accelerated video - decode/encode at various entry-points (VLD, IDCT, Motion Compensation - etc.) for the prevailing coding standards today (MPEG-2, MPEG-4 - ASP/H.263, MPEG-4 AVC/H.264, and VC-1/WMV3). It provides an interface - to fully expose the video decode capabilities in today's GPUs. - . - This package contains the debug files for the video decode and encode driver - backend for the Intel G45 chipsets and Intel HD Graphics for Intel Core - processor family. diff -Nru intel-vaapi-driver-1.6.2/debian/i965-va-driver.install intel-vaapi-driver-1.7.0/debian/i965-va-driver.install --- intel-vaapi-driver-1.6.2/debian/i965-va-driver.install 2014-06-16 08:13:49.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian/i965-va-driver.install 1970-01-01 00:00:00.000000000 +0000 @@ -1 +0,0 @@ -usr/lib/*/dri/*.so diff -Nru intel-vaapi-driver-1.6.2/debian/rules intel-vaapi-driver-1.7.0/debian/rules --- intel-vaapi-driver-1.6.2/debian/rules 2015-04-20 21:13:26.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian/rules 2016-03-16 00:44:13.000000000 +0000 @@ -6,8 +6,9 @@ %: dh $@ --parallel --with autoreconf --with libva -override_dh_strip: - dh_strip --dbg-package=i965-va-driver-dbg +override_dh_install: + find -name *.la -delete + dh_install override_dh_installchangelogs: dh_installchangelogs NEWS diff -Nru intel-vaapi-driver-1.6.2/debian.upstream/changelog intel-vaapi-driver-1.7.0/debian.upstream/changelog --- intel-vaapi-driver-1.6.2/debian.upstream/changelog 2015-12-15 06:01:02.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian.upstream/changelog 2016-03-15 06:42:57.000000000 +0000 @@ -1,5 +1,5 @@ -libva-intel-driver (1.6.2-1) unstable; urgency=low +libva-intel-driver (1.7.0-1) unstable; urgency=low * Autogenerated package, see NEWS file for ChangeLog. - -- Gwenole Beauchesne Tue, 15 Dec 2015 14:01:02 +0800 + -- Gwenole Beauchesne Tue, 15 Mar 2016 14:42:57 +0800 diff -Nru intel-vaapi-driver-1.6.2/debian.upstream/control intel-vaapi-driver-1.7.0/debian.upstream/control --- intel-vaapi-driver-1.6.2/debian.upstream/control 2015-12-15 06:01:02.000000000 +0000 +++ intel-vaapi-driver-1.7.0/debian.upstream/control 2016-03-15 06:42:57.000000000 +0000 @@ -5,13 +5,13 @@ Build-Depends: debhelper (>= 5), cdbs, libdrm-dev (>= 2.4.45), - libva-dev (>= 1.6.0) + libva-dev (>= 1.7.0) Standards-Version: 3.7.2 Package: libva-intel-driver Section: libs Architecture: any -Depends: libva1 (>= 1.6.0), +Depends: libva1 (>= 1.7.0), ${shlibs:Depends}, ${misc:Depends} Description: VA driver for Intel G45 & HD Graphics family Video decode & encode driver for Intel G45 chipsets and Intel HD diff -Nru intel-vaapi-driver-1.6.2/NEWS intel-vaapi-driver-1.7.0/NEWS --- intel-vaapi-driver-1.6.2/NEWS 2015-12-15 05:58:28.000000000 +0000 +++ intel-vaapi-driver-1.7.0/NEWS 2016-03-15 06:41:19.000000000 +0000 @@ -1,6 +1,14 @@ -libva-intel-driver NEWS -- summary of changes. 2015-12-15 +libva-intel-driver NEWS -- summary of changes. 2016-03-15 Copyright (C) 2009-2015 Intel Corporation +Version 1.7.0 - 15.Mar.2016 +* Add support for Kabylake + - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC/HEVC 10-bit/VP9/VP9 10-bit + - Encoding: H.264/MPEG-2/JPEG/VP8/HEVC + - VPP: CSC/scaling/NoiseReduction/Deinterlacing{Bob, MotionAdaptive, MotionCompensated}/ColorBalance/STD +* Add new SKL and BXT PCI IDs +* Fix lots of VP9 decoding issues on BXT + Version 1.6.2 - 15.Dec.2015 * Add support for Broxton - Decoding: H.264/MPEG-2/VC-1/JPEG/VP8/HEVC/HEVC 10-bit/VP9 diff -Nru intel-vaapi-driver-1.6.2/README intel-vaapi-driver-1.7.0/README --- intel-vaapi-driver-1.6.2/README 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/README 2016-03-15 06:40:58.000000000 +0000 @@ -27,7 +27,7 @@ CHV/BSW: Cherryview/Braswell SKL: Skylake BXT: Broxton - +KBL: Kabylake Codecs ------ @@ -44,9 +44,9 @@ HEVC E SKL+ VP9 D BXT+ HEVC 10bit D BXT+ - +VP9 10bit D KBL+ Requirements ------------ -libva >= 1.6.0 +libva >= 1.7.0 diff -Nru intel-vaapi-driver-1.6.2/src/gen75_picture_process.c intel-vaapi-driver-1.7.0/src/gen75_picture_process.c --- intel-vaapi-driver-1.6.2/src/gen75_picture_process.c 2015-12-03 15:07:29.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen75_picture_process.c 2016-03-11 04:38:17.000000000 +0000 @@ -28,6 +28,7 @@ #include #include #include +#include #include "intel_batchbuffer.h" #include "intel_driver.h" @@ -123,6 +124,15 @@ (VAProcPipelineParameterBuffer *)proc_st->pipeline_param->buffer; struct object_surface *obj_dst_surf = NULL; struct object_surface *obj_src_surf = NULL; + + VAProcPipelineParameterBuffer pipeline_param2; + struct object_surface *stage1_dst_surf = NULL; + struct object_surface *stage2_dst_surf = NULL; + VARectangle src_rect, dst_rect; + VASurfaceID tmp_surfaces[2]; + VASurfaceID out_surface_id1 = VA_INVALID_ID, out_surface_id2 = VA_INVALID_ID; + int num_tmp_surfaces = 0; + VAStatus status; proc_ctx->pipeline_param = pipeline_param; @@ -168,69 +178,221 @@ proc_ctx->surface_pipeline_input_object = obj_src_surf; assert(pipeline_param->num_filters <= 4); + int vpp_stage1 = 0, vpp_stage2 = 1, vpp_stage3 = 0; + + if (pipeline_param->surface_region) { + src_rect.x = pipeline_param->surface_region->x; + src_rect.y = pipeline_param->surface_region->y; + src_rect.width = pipeline_param->surface_region->width; + src_rect.height = pipeline_param->surface_region->height; + } else { + src_rect.x = 0; + src_rect.y = 0; + src_rect.width = obj_src_surf->orig_width; + src_rect.height = obj_src_surf->orig_height; + } + + if (pipeline_param->output_region) { + dst_rect.x = pipeline_param->output_region->x; + dst_rect.y = pipeline_param->output_region->y; + dst_rect.width = pipeline_param->output_region->width; + dst_rect.height = pipeline_param->output_region->height; + } else { + dst_rect.x = 0; + dst_rect.y = 0; + dst_rect.width = obj_dst_surf->orig_width; + dst_rect.height = obj_dst_surf->orig_height; + } + + if(obj_src_surf->fourcc == VA_FOURCC_P010) { + vpp_stage1 = 1; + vpp_stage2 = 0; + vpp_stage3 = 0; + if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL) { + if(src_rect.x != dst_rect.x || + src_rect.y != dst_rect.y || + src_rect.width != dst_rect.width || + src_rect.height != dst_rect.height) + vpp_stage2 = 1; + + if(obj_dst_surf->fourcc != VA_FOURCC_NV12 && + obj_dst_surf->fourcc != VA_FOURCC_P010) + vpp_stage2 = 1; + } + else + vpp_stage2 = 1; + + if(vpp_stage2 == 1) { + if(obj_dst_surf->fourcc == VA_FOURCC_P010) + vpp_stage3 = 1; + } + } + else if(obj_dst_surf->fourcc == VA_FOURCC_P010) { + vpp_stage2 = 1; + vpp_stage3 = 1; + + if((obj_src_surf->fourcc == VA_FOURCC_NV12) && + (pipeline_param->num_filters == 0 || pipeline_param->filters == NULL)) { + if((src_rect.x == dst_rect.x) && + (src_rect.y == dst_rect.y) && + (src_rect.width == dst_rect.width) && + (src_rect.height == dst_rect.height)) + vpp_stage2 = 0; + } + } + + if(vpp_stage1 == 1){ + memset((void *)&pipeline_param2, 0, sizeof(pipeline_param2)); + pipeline_param2.surface = pipeline_param->surface; + pipeline_param2.surface_region = &src_rect; + pipeline_param2.output_region = &src_rect; + pipeline_param2.filter_flags = 0; + pipeline_param2.num_filters = 0; + + proc_ctx->pipeline_param = &pipeline_param2; + + if(vpp_stage2 == 1) { + status = i965_CreateSurfaces(ctx, + obj_src_surf->orig_width, + obj_src_surf->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id1); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id1; + stage1_dst_surf = SURFACE(out_surface_id1); + assert(stage1_dst_surf); + i965_check_alloc_surface_bo(ctx, stage1_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + + proc_ctx->surface_render_output_object = stage1_dst_surf; + } + + gen75_vpp_vebox(ctx, proc_ctx); + } + + if((vpp_stage3 == 1) && (vpp_stage2 == 1)) { + status = i965_CreateSurfaces(ctx, + obj_dst_surf->orig_width, + obj_dst_surf->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id2); + assert(status == VA_STATUS_SUCCESS); + tmp_surfaces[num_tmp_surfaces++] = out_surface_id2; + stage2_dst_surf = SURFACE(out_surface_id2); + assert(stage2_dst_surf); + i965_check_alloc_surface_bo(ctx, stage2_dst_surf, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + VABufferID *filter_id = (VABufferID*) pipeline_param->filters; - - if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ){ - /* implicity surface format coversion and scaling */ - gen75_vpp_fmt_cvt(ctx, profile, codec_state, hw_context); - }else if(pipeline_param->num_filters == 1) { - struct object_buffer * obj_buf = BUFFER((*filter_id) + 0); - - assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer); - - if (!obj_buf || - !obj_buf->buffer_store || - !obj_buf->buffer_store->buffer) { - status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; - goto error; - } - - VAProcFilterParameterBuffer* filter = - (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; - - if (filter->type == VAProcFilterNoiseReduction || - filter->type == VAProcFilterDeinterlacing || - filter->type == VAProcFilterSkinToneEnhancement || - filter->type == VAProcFilterColorBalance){ - gen75_vpp_vebox(ctx, proc_ctx); - }else if(filter->type == VAProcFilterSharpening){ - if (obj_src_surf->fourcc != VA_FOURCC_NV12 || - obj_dst_surf->fourcc != VA_FOURCC_NV12) { - status = VA_STATUS_ERROR_UNIMPLEMENTED; + + if(vpp_stage2 == 1) { + if(stage1_dst_surf != NULL) { + proc_ctx->surface_pipeline_input_object = stage1_dst_surf; + proc_ctx->surface_render_output_object = obj_dst_surf; + + pipeline_param->surface = out_surface_id1; + } + + if(stage2_dst_surf != NULL) { + proc_ctx->surface_render_output_object = stage2_dst_surf; + + proc_st->current_render_target = out_surface_id2; + } + + proc_ctx->pipeline_param = pipeline_param; + + if(pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ){ + /* implicity surface format coversion and scaling */ + + gen75_vpp_fmt_cvt(ctx, profile, codec_state, hw_context); + }else if(pipeline_param->num_filters == 1) { + struct object_buffer * obj_buf = BUFFER((*filter_id) + 0); + + assert(obj_buf && obj_buf->buffer_store && obj_buf->buffer_store->buffer); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) { + status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; goto error; } - gen75_vpp_gpe(ctx, proc_ctx); - } - }else if (pipeline_param->num_filters >= 2) { - unsigned int i = 0; - for (i = 0; i < pipeline_param->num_filters; i++){ - struct object_buffer * obj_buf = BUFFER(pipeline_param->filters[i]); - - if (!obj_buf || - !obj_buf->buffer_store || - !obj_buf->buffer_store->buffer) { - status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; - goto error; - } + VAProcFilterParameterBuffer* filter = + (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; - VAProcFilterParameterBuffer* filter = - (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + if (filter->type == VAProcFilterNoiseReduction || + filter->type == VAProcFilterDeinterlacing || + filter->type == VAProcFilterSkinToneEnhancement || + filter->type == VAProcFilterColorBalance){ + gen75_vpp_vebox(ctx, proc_ctx); + }else if(filter->type == VAProcFilterSharpening){ + if (proc_ctx->surface_pipeline_input_object->fourcc != VA_FOURCC_NV12 || + proc_ctx->surface_render_output_object->fourcc != VA_FOURCC_NV12) { + status = VA_STATUS_ERROR_UNIMPLEMENTED; + goto error; + } - if (filter->type != VAProcFilterNoiseReduction && - filter->type != VAProcFilterDeinterlacing && - filter->type != VAProcFilterSkinToneEnhancement && - filter->type != VAProcFilterColorBalance) { - fprintf(stderr, "Do not support multiply filters outside vebox pipeline \n"); - assert(0); + gen75_vpp_gpe(ctx, proc_ctx); + } + }else if (pipeline_param->num_filters >= 2) { + unsigned int i = 0; + for (i = 0; i < pipeline_param->num_filters; i++){ + struct object_buffer * obj_buf = BUFFER(pipeline_param->filters[i]); + + if (!obj_buf || + !obj_buf->buffer_store || + !obj_buf->buffer_store->buffer) { + status = VA_STATUS_ERROR_INVALID_FILTER_CHAIN; + goto error; + } + + VAProcFilterParameterBuffer* filter = + (VAProcFilterParameterBuffer*)obj_buf-> buffer_store->buffer; + + if (filter->type != VAProcFilterNoiseReduction && + filter->type != VAProcFilterDeinterlacing && + filter->type != VAProcFilterSkinToneEnhancement && + filter->type != VAProcFilterColorBalance) { + fprintf(stderr, "Do not support multiply filters outside vebox pipeline \n"); + assert(0); + } } - } - gen75_vpp_vebox(ctx, proc_ctx); - } + gen75_vpp_vebox(ctx, proc_ctx); + } + } + + if(vpp_stage3 == 1) + { + if(vpp_stage2 == 1) { + memset(&pipeline_param2, 0, sizeof(pipeline_param2)); + pipeline_param2.surface = out_surface_id2; + pipeline_param2.surface_region = &dst_rect; + pipeline_param2.output_region = &dst_rect; + pipeline_param2.filter_flags = 0; + pipeline_param2.num_filters = 0; + + proc_ctx->pipeline_param = &pipeline_param2; + proc_ctx->surface_pipeline_input_object = proc_ctx->surface_render_output_object; + proc_ctx->surface_render_output_object = obj_dst_surf; + } + + gen75_vpp_vebox(ctx, proc_ctx); + } + + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); return VA_STATUS_SUCCESS; error: + if (num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surfaces, + num_tmp_surfaces); + return status; } diff -Nru intel-vaapi-driver-1.6.2/src/gen75_vpp_vebox.c intel-vaapi-driver-1.7.0/src/gen75_vpp_vebox.c --- intel-vaapi-driver-1.6.2/src/gen75_vpp_vebox.c 2015-12-03 15:07:29.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen75_vpp_vebox.c 2016-03-11 04:38:17.000000000 +0000 @@ -1408,7 +1408,9 @@ } else if(obj_surf_input->fourcc == VA_FOURCC_AYUV || obj_surf_input->fourcc == VA_FOURCC_YUY2 || - obj_surf_input->fourcc == VA_FOURCC_NV12){ + obj_surf_input->fourcc == VA_FOURCC_NV12 || + obj_surf_input->fourcc == VA_FOURCC_P010){ + // nothing to do here } else { /* not support other format as input */ @@ -1447,7 +1449,9 @@ proc_ctx->format_convert_flags |= POST_FORMAT_CONVERT; } else if(obj_surf_output->fourcc == VA_FOURCC_AYUV || obj_surf_output->fourcc == VA_FOURCC_YUY2 || - obj_surf_output->fourcc == VA_FOURCC_NV12){ + obj_surf_input->fourcc == VA_FOURCC_NV12 || + obj_surf_input->fourcc == VA_FOURCC_P010){ + /* Nothing to do here */ } else { /* not support other format as input */ @@ -1602,6 +1606,11 @@ proc_ctx->is_first_frame = 0; proc_ctx->is_second_field = 0; + if(!proc_ctx->is_di_enabled && !proc_ctx->is_dn_enabled) { + // MUST enable IECP if all DI&DN are disabled + proc_ctx->is_iecp_enabled = 1; + } + /* Check whether we are deinterlacing the second field */ if (proc_ctx->is_di_enabled) { const VAProcFilterParameterBufferDeinterlacing * const deint_params = @@ -2290,7 +2299,8 @@ assert(obj_surf->fourcc == VA_FOURCC_NV12 || obj_surf->fourcc == VA_FOURCC_YUY2 || obj_surf->fourcc == VA_FOURCC_AYUV || - obj_surf->fourcc == VA_FOURCC_RGBA); + obj_surf->fourcc == VA_FOURCC_RGBA || + obj_surf->fourcc == VA_FOURCC_P010); if (obj_surf->fourcc == VA_FOURCC_NV12) { surface_format = PLANAR_420_8; @@ -2312,6 +2322,11 @@ surface_pitch = obj_surf->width * 4; is_uv_interleaved = 0; half_pitch_chroma = 0; + } else if (obj_surf->fourcc == VA_FOURCC_P010) { + surface_format = PLANAR_420_16; + surface_pitch = obj_surf->width; + is_uv_interleaved = 1; + half_pitch_chroma = 0; } derived_pitch = surface_pitch; diff -Nru intel-vaapi-driver-1.6.2/src/gen8_post_processing.c intel-vaapi-driver-1.7.0/src/gen8_post_processing.c --- intel-vaapi-driver-1.6.2/src/gen8_post_processing.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen8_post_processing.c 2016-03-11 04:38:17.000000000 +0000 @@ -42,6 +42,8 @@ #include "i965_yuv_coefs.h" #include "intel_media.h" +#include "gen75_picture_process.h" + #define SURFACE_STATE_PADDED_SIZE SURFACE_STATE_PADDED_SIZE_GEN8 #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) @@ -1460,6 +1462,11 @@ gen8_post_processing_context_finalize(VADriverContextP ctx, struct i965_post_processing_context *pp_context) { + if(pp_context->vebox_proc_ctx){ + gen75_vebox_context_destroy(ctx,pp_context->vebox_proc_ctx); + pp_context->vebox_proc_ctx = NULL; + } + dri_bo_unreference(pp_context->surface_state_binding_table.bo); pp_context->surface_state_binding_table.bo = NULL; diff -Nru intel-vaapi-driver-1.6.2/src/gen9_mfc_hevc.c intel-vaapi-driver-1.7.0/src/gen9_mfc_hevc.c --- intel-vaapi-driver-1.6.2/src/gen9_mfc_hevc.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen9_mfc_hevc.c 2016-03-11 04:38:17.000000000 +0000 @@ -152,13 +152,24 @@ int standard_select, struct intel_encoder_context *encoder_context) { + struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = encoder_context->base.batch; assert(standard_select == HCP_CODEC_HEVC); - BEGIN_BCS_BATCH(batch, 4); + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 6); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (6 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 4); + + OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); + } - OUT_BCS_BATCH(batch, HCP_PIPE_MODE_SELECT | (4 - 2)); OUT_BCS_BATCH(batch, (standard_select << 5) | (0 << 3) | /* disable Pic Status / Error Report */ @@ -166,6 +177,12 @@ OUT_BCS_BATCH(batch, 0); OUT_BCS_BATCH(batch, 0); + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); } @@ -209,6 +226,7 @@ gen9_hcpe_pipe_buf_addr_state(VADriverContextP ctx, struct encode_state *encode_state, struct intel_encoder_context *encoder_context) { + struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = encoder_context->base.batch; struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; struct object_surface *obj_surface; @@ -216,9 +234,18 @@ dri_bo *bo; unsigned int i; - BEGIN_BCS_BATCH(batch, 95); + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 104); - OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2)); + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (104 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 95); + + OUT_BCS_BATCH(batch, HCP_PIPE_BUF_ADDR_STATE | (95 - 2)); + } obj_surface = encode_state->reconstructed_object; assert(obj_surface && obj_surface->bo); @@ -269,6 +296,12 @@ OUT_BUFFER_MA_TARGET(NULL); /* DW 89..91, ignore for HEVC */ OUT_BUFFER_MA_TARGET(NULL); /* DW 92..94, ignore for HEVC */ + if(IS_KBL(i965->intel.device_info)) + { + for(i = 0;i < 9;i++) + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); } @@ -459,6 +492,7 @@ gen9_hcpe_hevc_pic_state(VADriverContextP ctx, struct encode_state *encode_state, struct intel_encoder_context *encoder_context) { + struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = encoder_context->base.batch; struct gen9_hcpe_context *mfc_context = encoder_context->mfc_context; VAEncPictureParameterBufferHEVC *pic_param ; @@ -504,9 +538,18 @@ /* set zero for encoder */ loop_filter_across_tiles_enabled_flag = 0; - BEGIN_BCS_BATCH(batch, 19); + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 31); + + OUT_BCS_BATCH(batch, HCP_PIC_STATE | (31 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 19); - OUT_BCS_BATCH(batch, HCP_PIC_STATE | (19 - 2)); + OUT_BCS_BATCH(batch, HCP_PIC_STATE | (19 - 2)); + } OUT_BCS_BATCH(batch, mfc_context->pic_size.picture_height_in_min_cb_minus1 << 16 | @@ -523,7 +566,7 @@ seq_param->log2_min_luma_coding_block_size_minus3); OUT_BCS_BATCH(batch, 0); /* DW 3, ignored */ OUT_BCS_BATCH(batch, - 0 << 27 | /* CU packet structure is 0 for SKL */ + (IS_KBL(i965->intel.device_info)? 1 : 0) << 27 | /* CU packet structure is 0 for SKL */ seq_param->seq_fields.bits.strong_intra_smoothing_enabled_flag << 26 | pic_param->pic_fields.bits.transquant_bypass_enabled_flag << 25 | seq_param->seq_fields.bits.amp_enabled_flag << 23 | @@ -577,6 +620,14 @@ 0 << 30 | minframesize); /* DW 18, min frame size units */ + if(IS_KBL(i965->intel.device_info)) + { + int i = 0; + + for(i = 0;i < 12;i++) + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); } @@ -723,6 +774,7 @@ struct intel_encoder_context *encoder_context, struct intel_batchbuffer *batch) { + struct i965_driver_data *i965 = i965_driver_data(ctx); VAEncSequenceParameterBufferHEVC *pSequenceParameter = (VAEncSequenceParameterBufferHEVC *)encode_state->seq_param_ext->buffer; int slice_type = slice_param->slice_type; @@ -754,9 +806,18 @@ } } - BEGIN_BCS_BATCH(batch, 9); + if(IS_KBL(i965->intel.device_info)) + { + BEGIN_BCS_BATCH(batch, 11); + + OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (11 - 2)); + } + else + { + BEGIN_BCS_BATCH(batch, 9); - OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (9 - 2)); + OUT_BCS_BATCH(batch, HCP_SLICE_STATE | (9 - 2)); + } OUT_BCS_BATCH(batch, slice_ver_pos << 16 | @@ -801,6 +862,12 @@ 0); /* Ignored for decoding */ OUT_BCS_BATCH(batch, 0); /* PAK-BSE data start offset */ + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); } @@ -1097,8 +1164,12 @@ int cu_count_in_lcu, unsigned int split_coding_unit_flag, struct intel_batchbuffer *batch) { + struct i965_driver_data *i965 = i965_driver_data(ctx); int len_in_dwords = 3; + if(IS_KBL(i965->intel.device_info)) + len_in_dwords = 5; + if (batch == NULL) batch = encoder_context->base.batch; @@ -1112,6 +1183,12 @@ OUT_BCS_BATCH(batch, (lcu_y << 16) | lcu_x); /* LCU for Y*/ + if(IS_KBL(i965->intel.device_info)) + { + OUT_BCS_BATCH(batch, 0); + OUT_BCS_BATCH(batch, 0); + } + ADVANCE_BCS_BATCH(batch); return len_in_dwords; diff -Nru intel-vaapi-driver-1.6.2/src/gen9_mfd.c intel-vaapi-driver-1.7.0/src/gen9_mfd.c --- intel-vaapi-driver-1.6.2/src/gen9_mfd.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen9_mfd.c 2016-03-11 04:38:17.000000000 +0000 @@ -982,23 +982,44 @@ #define VP9_PROB_BUFFER_RESTORED_SECNE_2 2 #define VP9_PROB_BUFFER_RESTORED_SECNE_MAX (VP9_PROB_BUFFER_RESTORED_SECNE_2 + 1) -static void vp9_update_segmentId_buffer(VADriverContextP ctx, +#define ALLOC_MV_BUFFER(gen_buffer, string, size,width,height) \ + do { \ + dri_bo_unreference(gen_buffer->bo); \ + gen_buffer->bo = dri_bo_alloc(i965->intel.bufmgr, \ + string, \ + size, \ + 0x1000); \ + assert(gen_buffer->bo); \ + gen_buffer->frame_width = width ; \ + gen_buffer->frame_height = height; \ + } while (0) + +static void +vp9_update_segmentId_buffer(VADriverContextP ctx, struct decode_state *decode_state, - struct gen9_hcpd_context *gen9_hcpd_context, uint8_t isScaling) + struct gen9_hcpd_context *gen9_hcpd_context) { + struct i965_driver_data *i965 = i965_driver_data(ctx); VADecPictureParameterBufferVP9 *pic_param; + int size = 0; + int is_scaling = 0; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; - int size = 0; + size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 1 ; + size <<= 6; + if (gen9_hcpd_context->vp9_segment_id_buffer.bo == NULL || pic_param->frame_width > gen9_hcpd_context->last_frame.frame_width || pic_param->frame_height > gen9_hcpd_context->last_frame.frame_height) + { + ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size); + } + + is_scaling = (pic_param->frame_width != gen9_hcpd_context->last_frame.frame_width) || (pic_param->frame_height != gen9_hcpd_context->last_frame.frame_height); if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || pic_param->pic_fields.bits.error_resilient_mode || - pic_param->pic_fields.bits.intra_only || isScaling) { + pic_param->pic_fields.bits.intra_only || is_scaling) { - size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1; - size<<=6; //VP9 Segment ID buffer needs to be zero dri_bo_map(gen9_hcpd_context->vp9_segment_id_buffer.bo,1); memset((unsigned char *)gen9_hcpd_context->vp9_segment_id_buffer.bo->virtual,0, size); @@ -1007,6 +1028,31 @@ } static void +vp9_update_mv_temporal_buffer(VADriverContextP ctx, + struct decode_state *decode_state, + struct gen9_hcpd_context *gen9_hcpd_context) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VADecPictureParameterBufferVP9 *pic_param; + int size = 0; + + assert(decode_state->pic_param && decode_state->pic_param->buffer); + pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; + + size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ; + size <<= 6; //CL aligned + if (gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo == NULL || pic_param->frame_width > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width || pic_param->frame_height > gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height) + { + ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_curr), "vp9 curr mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height); + } + if (gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo == NULL) + { + ALLOC_MV_BUFFER((&gen9_hcpd_context->vp9_mv_temporal_buffer_last), "vp9 last mv temporal buffer", size,pic_param->frame_width,pic_param->frame_height); + } + +} + +static void vp9_gen_default_probabilities(VADriverContextP ctx, struct gen9_hcpd_context *gen9_hcpd_context) { int i = 0; @@ -1103,7 +1149,7 @@ } }else if(gen9_hcpd_context->last_frame.prob_buffer_saved_flag == VP9_PROB_BUFFER_SAVED_SECNE_2) { - if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode) + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only||pic_param->pic_fields.bits.error_resilient_mode) { temp_frame_ctx_id = 0; } @@ -1130,7 +1176,7 @@ } } //first part buffer update: Case 1)Reset all 4 probablity buffers - if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only|pic_param->pic_fields.bits.error_resilient_mode) + if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) ||pic_param->pic_fields.bits.intra_only||pic_param->pic_fields.bits.error_resilient_mode) { if((pic_param->pic_fields.bits.frame_type == HCP_VP9_KEY_FRAME) || (pic_param->pic_fields.bits.reset_frame_context == 3)|| @@ -1265,9 +1311,7 @@ struct object_surface *obj_surface, struct gen9_hcpd_context *gen9_hcpd_context) { - struct i965_driver_data *i965 = i965_driver_data(ctx); GenVP9Surface *gen9_vp9_surface; - uint32_t size=0; if (!obj_surface) return; @@ -1277,20 +1321,11 @@ if (!gen9_vp9_surface) { gen9_vp9_surface = calloc(sizeof(GenVP9Surface), 1); + assert(gen9_vp9_surface); gen9_vp9_surface->base.frame_store_id = -1; obj_surface->private_data = gen9_vp9_surface; } - //Super block size in VP9 is 64x64, size in SBs - size = gen9_hcpd_context->picture_width_in_ctbs * gen9_hcpd_context->picture_height_in_ctbs * 9 ; - size<<=6; //CL aligned - - if (gen9_vp9_surface->motion_vector_temporal_bo == NULL) { - gen9_vp9_surface->motion_vector_temporal_bo = dri_bo_alloc(i965->intel.bufmgr, - "current motion vector temporal buffer", - size, - 0x1000); - } gen9_vp9_surface->frame_width = pic_param->frame_width; gen9_vp9_surface->frame_height = pic_param->frame_height; @@ -1306,6 +1341,7 @@ struct object_surface *obj_surface; uint32_t size; int width_in_mbs=0, height_in_mbs=0; + int bit_depth_minus8 = 0; assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; @@ -1317,6 +1353,23 @@ assert(width_in_mbs > 0 && width_in_mbs <= 256); /* 4K */ assert(height_in_mbs > 0 && height_in_mbs <= 256); + if(!(i965->codec_info->vp9_dec_profiles & (1U<profile))) + return VA_STATUS_ERROR_UNSUPPORTED_PROFILE; + + if(pic_param->profile >= 2) + { + if(pic_param->bit_depth >= 8) + bit_depth_minus8 = pic_param->bit_depth - 8; + + if(bit_depth_minus8 == 2) + { + if(!(i965->codec_info->vp9_dec_chroma_formats & VA_RT_FORMAT_YUV420_10BPP)) + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + else if((bit_depth_minus8 > 2) || (bit_depth_minus8 == 1) || (bit_depth_minus8 < 0)) + return VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT; + } + //Update the frame store buffers with the reference frames information intel_update_vp9_frame_store_index(ctx, decode_state, @@ -1346,12 +1399,18 @@ gen9_hcpd_init_vp9_surface(ctx, pic_param, obj_surface, gen9_hcpd_context); - size = gen9_hcpd_context->picture_width_in_ctbs*18; //num_width_in_SB * 18 + if(pic_param->profile >= 2) + size = gen9_hcpd_context->picture_width_in_ctbs*36; //num_width_in_SB * 36 + else + size = gen9_hcpd_context->picture_width_in_ctbs*18; //num_width_in_SB * 18 size<<=6; ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_line_buffer), "line buffer", size); ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_line_buffer), "tile line buffer", size); - size = gen9_hcpd_context->picture_height_in_ctbs*17; //num_height_in_SB * 17 + if(pic_param->profile >= 2) + size = gen9_hcpd_context->picture_height_in_ctbs*34; //num_height_in_SB * 17 + else + size = gen9_hcpd_context->picture_height_in_ctbs*17; //num_height_in_SB * 17 size<<=6; ALLOC_GEN_BUFFER((&gen9_hcpd_context->deblocking_filter_tile_column_buffer), "tile column buffer", size); @@ -1373,10 +1432,6 @@ size<<=6; ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer), "vp9 probability buffer", size); - size = (gen9_hcpd_context->picture_width_in_min_cb_minus1+2)*(gen9_hcpd_context->picture_height_in_min_cb_minus1 + 2) * 1; - size<<=6; - ALLOC_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer), "vp9 segment id buffer", size); - gen9_hcpd_context->first_inter_slice_collocated_ref_idx = 0; gen9_hcpd_context->first_inter_slice_collocated_from_l0_flag = 0; gen9_hcpd_context->first_inter_slice_valid = 0; @@ -1406,7 +1461,7 @@ (0 << 28) | /* surface id */ (obj_surface->width - 1)); /* pitch - 1 */ OUT_BCS_BATCH(batch, - (SURFACE_FORMAT_PLANAR_420_8 << 28) | + (((obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | y_cb_offset); ADVANCE_BCS_BATCH(batch); @@ -1424,7 +1479,7 @@ ((i + 2) << 28) | /* surface id */ (obj_surface->width - 1)); /* pitch - 1 */ OUT_BCS_BATCH(batch, - (SURFACE_FORMAT_PLANAR_420_8 << 28) | + (((obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | obj_surface->y_cb_offset); ADVANCE_BCS_BATCH(batch); }else @@ -1436,7 +1491,7 @@ ((i + 2) << 28) | /* surface id */ (tmp_obj_surface->width - 1)); /* pitch - 1 */ OUT_BCS_BATCH(batch, - (SURFACE_FORMAT_PLANAR_420_8 << 28) | + (((tmp_obj_surface->fourcc == VA_FOURCC_P010) ? SURFACE_FORMAT_P010: SURFACE_FORMAT_PLANAR_420_8) << 28) | tmp_obj_surface->y_cb_offset); ADVANCE_BCS_BATCH(batch); } @@ -1450,7 +1505,6 @@ { struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; struct object_surface *obj_surface; - GenVP9Surface *gen9_vp9_surface; int i=0; BEGIN_BCS_BATCH(batch, 95); @@ -1459,8 +1513,6 @@ obj_surface = decode_state->render_object; assert(obj_surface && obj_surface->bo); - gen9_vp9_surface = obj_surface->private_data; - assert(gen9_vp9_surface && gen9_vp9_surface->motion_vector_temporal_bo); OUT_BUFFER_MA_TARGET(obj_surface->bo); /* DW 1..3 */ OUT_BUFFER_MA_TARGET(gen9_hcpd_context->deblocking_filter_line_buffer.bo);/* DW 4..6 */ @@ -1472,7 +1524,7 @@ OUT_BUFFER_MA_TARGET(NULL); /* DW 22..24, ignore for VP9 */ OUT_BUFFER_MA_TARGET(NULL); /* DW 25..27, ignore for VP9 */ OUT_BUFFER_MA_TARGET(NULL); /* DW 28..30, ignore for VP9 */ - OUT_BUFFER_MA_TARGET(gen9_vp9_surface->motion_vector_temporal_bo); /* DW 31..33 */ + OUT_BUFFER_MA_TARGET(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo); /* DW 31..33 */ OUT_BUFFER_MA_TARGET(NULL); /* DW 34..36, reserved */ @@ -1502,7 +1554,7 @@ /* DW 66..81 - for 8 Collocated motion vectors */ for (i = 0; i < 1; i++) { - OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->last_frame.mv_temporal_buffer_bo); + OUT_BUFFER_NMA_REFERENCE(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo); } for (; i < ARRAY_ELEMS(gen9_hcpd_context->reference_surfaces); i++) { @@ -1517,7 +1569,6 @@ OUT_BUFFER_MA_TARGET(gen9_hcpd_context->hvd_tile_rowstore_buffer.bo);/* DW 92..94, VP9 HVD Tile Rowstore buffer */ ADVANCE_BCS_BATCH(batch); - gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = gen9_vp9_surface->motion_vector_temporal_bo; } static inline int @@ -1544,6 +1595,8 @@ uint16_t fwidth = 64; uint16_t fheight = 64; int i; + int bit_depth_minus8 = 0; + #define LEN_COMMAND_OWN 12 assert(decode_state->pic_param && decode_state->pic_param->buffer); pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; @@ -1601,6 +1654,12 @@ fwidth = (fwidth > frame_width_in_pixel)?frame_width_in_pixel:fwidth; fheight = (fheight > frame_height_in_pixel)?frame_height_in_pixel:fheight; + if(pic_param->profile >= 2) + { + if(pic_param->bit_depth >= 8) + bit_depth_minus8 = pic_param->bit_depth - 8; + } + BEGIN_BCS_BATCH(batch, LEN_COMMAND_OWN); OUT_BCS_BATCH(batch, HCP_VP9_PIC_STATE | (LEN_COMMAND_OWN - 2)); @@ -1633,7 +1692,9 @@ adapt_probabilities_flag << 1 | pic_param->pic_fields.bits.frame_type <<0); /* DW 2 */ OUT_BCS_BATCH(batch, - HCP_VP9_PROFILE0 << 28 | /* Profile 0 only supports 8 bit 420 only */ + pic_param->profile << 28 | + bit_depth_minus8 << 24 | + 0 << 22 | /* only support 4:2:0 */ pic_param->log2_tile_rows << 8 | pic_param->log2_tile_columns <<0); /* DW 3 */ // resolution change case @@ -1718,16 +1779,25 @@ seg_param->segment_flags.fields.segment_reference_enabled << 3 | seg_param->segment_flags.fields.segment_reference << 1 | seg_param->segment_flags.fields.segment_reference_skipped <<0 ); /* DW 2 */ - OUT_BCS_BATCH(batch, - seg_param->filter_level[1][1] << 24 | //FilterLevelRef1Mode1 - seg_param->filter_level[1][0] << 16 | //FilterLevelRef1Mode0 - seg_param->filter_level[0][1] << 8 | //FilterLevelRef0Mode1 - seg_param->filter_level[0][0] << 0 ); //FilterLevelRef0Mode0 /* DW 3 */ - OUT_BCS_BATCH(batch, - seg_param->filter_level[3][1] << 24 | //FilterLevelRef3Mode1 - seg_param->filter_level[3][0] << 16 | //FilterLevelRef3Mode0 - seg_param->filter_level[2][1] << 8 | //FilterLevelRef2Mode1 - seg_param->filter_level[2][0] << 0 ); //FilterLevelRef2Mode0 /* DW 4 */ + if(pic_param->filter_level) + { + OUT_BCS_BATCH(batch, + seg_param->filter_level[1][1] << 24 | //FilterLevelRef1Mode1 + seg_param->filter_level[1][0] << 16 | //FilterLevelRef1Mode0 + seg_param->filter_level[0][1] << 8 | //FilterLevelRef0Mode1 + seg_param->filter_level[0][0] << 0 ); //FilterLevelRef0Mode0 /* DW 3 */ + OUT_BCS_BATCH(batch, + seg_param->filter_level[3][1] << 24 | //FilterLevelRef3Mode1 + seg_param->filter_level[3][0] << 16 | //FilterLevelRef3Mode0 + seg_param->filter_level[2][1] << 8 | //FilterLevelRef2Mode1 + seg_param->filter_level[2][0] << 0 ); //FilterLevelRef2Mode0 /* DW 4 */ + }else + { + OUT_BCS_BATCH(batch, + 0 ); /* DW 3 */ + OUT_BCS_BATCH(batch, + 0 ); /* DW 4 */ + } OUT_BCS_BATCH(batch, seg_param->luma_ac_quant_scale << 16 | seg_param->luma_dc_quant_scale << 0 ); /* DW 5 */ @@ -1765,39 +1835,35 @@ struct decode_state *decode_state, struct gen9_hcpd_context *gen9_hcpd_context) { - VAStatus vaStatus; + VAStatus vaStatus = VA_STATUS_SUCCESS; struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = gen9_hcpd_context->base.batch; VADecPictureParameterBufferVP9 *pic_param; VASliceParameterBufferVP9 *slice_param; dri_bo *slice_data_bo; - int i = 0, num_segments=0, isScaling=0; - struct object_surface *obj_surface; - GenVP9Surface *gen9_vp9_surface; - vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context); - - if (vaStatus != VA_STATUS_SUCCESS) - goto out; + dri_bo *tmp_bo; + uint16_t tmp; + int i = 0, num_segments=0; assert(decode_state->pic_param && decode_state->pic_param->buffer); + assert(decode_state->slice_params && decode_state->slice_params[0]->buffer); + slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer; pic_param = (VADecPictureParameterBufferVP9 *)decode_state->pic_param->buffer; - //****And set the isScaling value accordingly****** - isScaling = 0; - for(i = 0; i < 3; i++) + if(slice_param->slice_data_size == 1) { - obj_surface = gen9_hcpd_context->reference_surfaces[i].obj_surface; - gen9_vp9_surface = NULL; - if (obj_surface && obj_surface->private_data) - { - gen9_vp9_surface = obj_surface->private_data; - isScaling |= (gen9_vp9_surface->frame_width == pic_param->frame_width && - gen9_vp9_surface->frame_height == pic_param->frame_height)? 0:1; - } + goto out; } + vaStatus = gen9_hcpd_vp9_decode_init(ctx, decode_state, gen9_hcpd_context); + + if (vaStatus != VA_STATUS_SUCCESS) + goto out; + //Update segment id buffer if needed - vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context, isScaling); + vp9_update_segmentId_buffer(ctx, decode_state, gen9_hcpd_context); + //Update mv buffer if needed + vp9_update_mv_temporal_buffer(ctx, decode_state, gen9_hcpd_context); //Update probability buffer if needed vp9_update_probabilities(ctx, decode_state, gen9_hcpd_context); @@ -1812,8 +1878,6 @@ gen9_hcpd_vp9_surface_state(ctx, decode_state, gen9_hcpd_context); //Only one VASliceParameterBufferVP9 should be sent per frame - assert(decode_state->slice_params && decode_state->slice_params[0]->buffer); - slice_param = (VASliceParameterBufferVP9 *)decode_state->slice_params[0]->buffer; slice_data_bo = decode_state->slice_datas[0]->bo; gen9_hcpd_ind_obj_base_addr_state(ctx, slice_data_bo, gen9_hcpd_context); @@ -1835,6 +1899,9 @@ gen9_hcpd_vp9_bsd_object(ctx, pic_param, slice_param, gen9_hcpd_context); + intel_batchbuffer_end_atomic(batch); + intel_batchbuffer_flush(batch); + // keep track of the last frame status gen9_hcpd_context->last_frame.frame_width = pic_param->frame_width; gen9_hcpd_context->last_frame.frame_height = pic_param->frame_height; @@ -1844,11 +1911,23 @@ gen9_hcpd_context->last_frame.frame_context_idx = pic_param->pic_fields.bits.frame_context_idx; gen9_hcpd_context->last_frame.intra_only = pic_param->pic_fields.bits.intra_only; - // update prob buffer to vp9_fc; + // switch mv buffer + if(pic_param->pic_fields.bits.frame_type != HCP_VP9_KEY_FRAME) + { + tmp_bo = gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo = tmp_bo; + + tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_width = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_width = tmp; + + tmp = gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height; + gen9_hcpd_context->vp9_mv_temporal_buffer_last.frame_height = gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height; + gen9_hcpd_context->vp9_mv_temporal_buffer_curr.frame_height = tmp; - intel_batchbuffer_end_atomic(batch); - intel_batchbuffer_flush(batch); + } //update vp9_frame_ctx according to frame_context_id if (pic_param->pic_fields.bits.refresh_frame_context) { @@ -1888,6 +1967,7 @@ vaStatus = gen9_hcpd_hevc_decode_picture(ctx, decode_state, gen9_hcpd_context); break; case VAProfileVP9Profile0: + case VAProfileVP9Profile2: vaStatus = gen9_hcpd_vp9_decode_picture(ctx, decode_state, gen9_hcpd_context); break; @@ -1919,6 +1999,8 @@ FREE_GEN_BUFFER((&gen9_hcpd_context->hvd_tile_rowstore_buffer)); FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_probability_buffer)); FREE_GEN_BUFFER((&gen9_hcpd_context->vp9_segment_id_buffer)); + dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_curr.bo); + dri_bo_unreference(gen9_hcpd_context->vp9_mv_temporal_buffer_last.bo); intel_batchbuffer_free(gen9_hcpd_context->base.batch); free(gen9_hcpd_context); @@ -1935,17 +2017,19 @@ gen9_hcpd_vp9_context_init(VADriverContextP ctx, struct gen9_hcpd_context *gen9_hcpd_context) { - int default_value = 255; gen9_hcpd_context->last_frame.frame_height = 0; gen9_hcpd_context->last_frame.show_frame = 0; gen9_hcpd_context->last_frame.frame_type = 0; - gen9_hcpd_context->last_frame.refresh_frame_context = default_value; - gen9_hcpd_context->last_frame.frame_context_idx = default_value; + gen9_hcpd_context->last_frame.refresh_frame_context = 0; + gen9_hcpd_context->last_frame.frame_context_idx = 0; gen9_hcpd_context->last_frame.intra_only = 0; gen9_hcpd_context->last_frame.prob_buffer_saved_flag = 0; gen9_hcpd_context->last_frame.prob_buffer_restored_flag = 0; - gen9_hcpd_context->last_frame.mv_temporal_buffer_bo = NULL; + + //Super block in VP9 is 64x64 + gen9_hcpd_context->ctb_size = 64; + gen9_hcpd_context->min_cb_size = 8; //Min block size is 8 vp9_gen_default_probabilities(ctx, gen9_hcpd_context); } @@ -1976,6 +2060,7 @@ gen9_hcpd_hevc_context_init(ctx, gen9_hcpd_context); break; case VAProfileVP9Profile0: + case VAProfileVP9Profile2: gen9_hcpd_vp9_context_init(ctx, gen9_hcpd_context); break; @@ -1991,7 +2076,8 @@ { if (obj_config->profile == VAProfileHEVCMain || obj_config->profile == VAProfileHEVCMain10 || - obj_config->profile == VAProfileVP9Profile0) { + obj_config->profile == VAProfileVP9Profile0 || + obj_config->profile == VAProfileVP9Profile2) { return gen9_hcpd_context_init(ctx, obj_config); } else { return gen8_dec_hw_context_init(ctx, obj_config); diff -Nru intel-vaapi-driver-1.6.2/src/gen9_mfd.h intel-vaapi-driver-1.7.0/src/gen9_mfd.h --- intel-vaapi-driver-1.6.2/src/gen9_mfd.h 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/gen9_mfd.h 2016-03-11 04:38:17.000000000 +0000 @@ -49,9 +49,15 @@ uint8_t intra_only; uint8_t prob_buffer_saved_flag; uint8_t prob_buffer_restored_flag; - dri_bo * mv_temporal_buffer_bo; }vp9_last_frame_status; +typedef struct vp9_mv_temporal_buffer +{ + dri_bo *bo; + uint16_t frame_width; + uint16_t frame_height; +}VP9_MV_BUFFER; + struct gen9_hcpd_context { struct hw_context base; @@ -84,6 +90,8 @@ GenBuffer hvd_tile_rowstore_buffer; GenBuffer vp9_probability_buffer; GenBuffer vp9_segment_id_buffer; + VP9_MV_BUFFER vp9_mv_temporal_buffer_curr; + VP9_MV_BUFFER vp9_mv_temporal_buffer_last; unsigned short first_inter_slice_collocated_ref_idx; unsigned short first_inter_slice_collocated_from_l0_flag; diff -Nru intel-vaapi-driver-1.6.2/src/i965_decoder_utils.c intel-vaapi-driver-1.7.0/src/i965_decoder_utils.c --- intel-vaapi-driver-1.6.2/src/i965_decoder_utils.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_decoder_utils.c 2016-03-11 04:38:17.000000000 +0000 @@ -1225,9 +1225,25 @@ ) { VAStatus va_status = VA_STATUS_SUCCESS; + int update = 0; + unsigned int fourcc = VA_FOURCC_NV12; + + if(pic_param->profile >= 2) + { + if(obj_surface->fourcc != VA_FOURCC_P010) + { + update = 1; + fourcc = VA_FOURCC_P010; + } + } + else if(obj_surface->fourcc != VA_FOURCC_NV12) + { + update = 1; + fourcc = VA_FOURCC_NV12; + } /* (Re-)allocate the underlying surface buffer store, if necessary */ - if (!obj_surface->bo || obj_surface->fourcc != VA_FOURCC_NV12) { + if (!obj_surface->bo || update) { struct i965_driver_data * const i965 = i965_driver_data(ctx); i965_destroy_surface_storage(obj_surface); @@ -1235,7 +1251,7 @@ va_status = i965_check_alloc_surface_bo(ctx, obj_surface, i965->codec_info->has_tiled_surface, - VA_FOURCC_NV12, + fourcc, SUBSAMPLE_YUV420); } @@ -1313,6 +1329,7 @@ //then sets the reference frames in the decode_state static VAStatus intel_decoder_check_vp9_parameter(VADriverContextP ctx, + VAProfile profile, struct decode_state *decode_state) { struct i965_driver_data *i965 = i965_driver_data(ctx); @@ -1321,11 +1338,14 @@ struct object_surface *obj_surface; int i=0, index=0; + if((profile - VAProfileVP9Profile0) < pic_param->profile) + return va_status; + //Max support upto 4k for BXT - if ((pic_param->frame_width-1 < 7) || (pic_param->frame_width-1 > 4095)) + if ((pic_param->frame_width-1 < 0) || (pic_param->frame_width-1 > 4095)) return va_status; - if ((pic_param->frame_height-1 < 7) || (pic_param->frame_height-1 > 4095)) + if ((pic_param->frame_height-1 < 0) || (pic_param->frame_height-1 > 4095)) return va_status; //Set the reference object in decode state for last reference @@ -1420,7 +1440,8 @@ break; case VAProfileVP9Profile0: - vaStatus = intel_decoder_check_vp9_parameter(ctx, decode_state); + case VAProfileVP9Profile2: + vaStatus = intel_decoder_check_vp9_parameter(ctx, profile, decode_state); break; default: diff -Nru intel-vaapi-driver-1.6.2/src/i965_device_info.c intel-vaapi-driver-1.7.0/src/i965_device_info.c --- intel-vaapi-driver-1.6.2/src/i965_device_info.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_device_info.c 2016-03-15 06:40:58.000000000 +0000 @@ -48,10 +48,16 @@ #define EXTRA_HEVC_DEC_CHROMA_FORMATS \ (VA_RT_FORMAT_YUV420_10BPP) +#define EXTRA_VP9_DEC_CHROMA_FORMATS \ + (VA_RT_FORMAT_YUV420_10BPP) + /* Defines VA profile as a 32-bit unsigned integer mask */ #define VA_PROFILE_MASK(PROFILE) \ (1U << VAProfile##PROFILE) +#define VP9_PROFILE_MASK(PROFILE) \ + (1U << PROFILE) + extern struct hw_context *i965_proc_context_init(VADriverContextP, struct object_config *); extern struct hw_context *g4x_dec_hw_context_init(VADriverContextP, struct object_config *); extern bool genx_render_init(VADriverContextP); @@ -377,6 +383,8 @@ .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | VA_PROFILE_MASK(H264MultiviewHigh)), + .vp9_dec_profiles = VP9_PROFILE_MASK(0), + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, @@ -401,6 +409,7 @@ .has_hevc_encoding = 1, .has_hevc10_decoding = 1, .has_vp9_decoding = 1, + .has_vpp_p010 = 1, .num_filters = 5, .filters = { @@ -412,6 +421,60 @@ }, }; +static struct hw_codec_info kbl_hw_codec_info = { + .dec_hw_context_init = gen9_dec_hw_context_init, + .enc_hw_context_init = gen9_enc_hw_context_init, + .proc_hw_context_init = gen75_proc_context_init, + .render_init = gen9_render_init, + .post_processing_context_init = gen9_post_processing_context_init, + + .max_width = 4096, + .max_height = 4096, + .min_linear_wpitch = 64, + .min_linear_hpitch = 16, + + .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) | + VA_PROFILE_MASK(H264MultiviewHigh)), + .vp9_dec_profiles = VP9_PROFILE_MASK(0) | + VP9_PROFILE_MASK(2), + + .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS, + .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS, + .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS, + .hevc_dec_chroma_formats = EXTRA_HEVC_DEC_CHROMA_FORMATS, + .vp9_dec_chroma_formats = EXTRA_VP9_DEC_CHROMA_FORMATS, + + .has_mpeg2_decoding = 1, + .has_mpeg2_encoding = 1, + .has_h264_decoding = 1, + .has_h264_encoding = 1, + .has_vc1_decoding = 1, + .has_jpeg_decoding = 1, + .has_jpeg_encoding = 1, + .has_vpp = 1, + .has_accelerated_getimage = 1, + .has_accelerated_putimage = 1, + .has_tiled_surface = 1, + .has_di_motion_adptive = 1, + .has_di_motion_compensated = 1, + .has_vp8_decoding = 1, + .has_vp8_encoding = 1, + .has_h264_mvc_encoding = 1, + .has_hevc_decoding = 1, + .has_hevc_encoding = 1, + .has_hevc10_decoding = 1, + .has_vp9_decoding = 1, + .has_vpp_p010 = 1, + + .num_filters = 5, + .filters = { + { VAProcFilterNoiseReduction, I965_RING_VEBOX }, + { VAProcFilterDeinterlacing, I965_RING_VEBOX }, + { VAProcFilterSharpening, I965_RING_NULL }, + { VAProcFilterColorBalance, I965_RING_VEBOX}, + { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX}, + }, +}; struct hw_codec_info * i965_get_codec_info(int devid) @@ -549,6 +612,15 @@ .is_broxton = 1, }; +static const struct intel_device_info kbl_device_info = { + .gen = 9, + + .urb_size = 4096, + .max_wm_threads = 64, /* per PSD */ + + .is_kabylake = 1, +}; + const struct intel_device_info * i965_get_device_info(int devid) { diff -Nru intel-vaapi-driver-1.6.2/src/i965_drv_video.c intel-vaapi-driver-1.7.0/src/i965_drv_video.c --- intel-vaapi-driver-1.6.2/src/i965_drv_video.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_drv_video.c 2016-03-15 06:40:58.000000000 +0000 @@ -109,9 +109,16 @@ #define HAS_VP9_DECODING(ctx) ((ctx)->codec_info->has_vp9_decoding && \ (ctx)->intel.has_bsd) +#define HAS_VP9_DECODING_PROFILE(ctx, profile) \ + (HAS_VP9_DECODING(ctx) && \ + ((ctx)->codec_info->vp9_dec_profiles & (1U << (profile - VAProfileVP9Profile0)))) + #define HAS_HEVC10_DECODING(ctx) ((ctx)->codec_info->has_hevc10_decoding && \ (ctx)->intel.has_bsd) +#define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \ + (ctx)->intel.has_bsd) + static int get_sampling_from_fourcc(unsigned int fourcc); /* Check whether we are rendering to X11 (VA/X11 or VA/GLX API) */ @@ -227,7 +234,7 @@ { unsigned int i; - for (i = 0; ARRAY_ELEMS(i965_fourcc_infos); i++) { + for (i = 0; i < ARRAY_ELEMS(i965_fourcc_infos); i++) { const i965_fourcc_info * const info = &i965_fourcc_infos[i]; if (info->fourcc == fourcc) @@ -316,6 +323,8 @@ { VA_FOURCC_RGBX, VA_LSB_FIRST, 32, 24, 0x000000ff, 0x0000ff00, 0x00ff0000 } }, { I965_SURFACETYPE_RGBA, { VA_FOURCC_BGRX, VA_LSB_FIRST, 32, 24, 0x00ff0000, 0x0000ff00, 0x000000ff } }, + { I965_SURFACETYPE_YUV, + { VA_FOURCC_P010, VA_LSB_FIRST, 24, } }, }; /* List of supported subpicture formats */ @@ -555,9 +564,11 @@ profile_list[i++] = VAProfileH264Main; profile_list[i++] = VAProfileH264High; } - if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264MultiviewHigh)) + if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264MultiviewHigh) || + HAS_H264_MVC_ENCODING(i965)) profile_list[i++] = VAProfileH264MultiviewHigh; - if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264StereoHigh)) + if (HAS_H264_MVC_DECODING_PROFILE(i965, VAProfileH264StereoHigh) || + HAS_H264_MVC_ENCODING(i965)) profile_list[i++] = VAProfileH264StereoHigh; if (HAS_VC1_DECODING(i965)) { @@ -580,11 +591,6 @@ profile_list[i++] = VAProfileVP8Version0_3; } - if (HAS_H264_MVC_ENCODING(i965)) { - profile_list[i++] = VAProfileH264MultiviewHigh; - profile_list[i++] = VAProfileH264StereoHigh; - } - if (HAS_HEVC_DECODING(i965)|| HAS_HEVC_ENCODING(i965)) { profile_list[i++] = VAProfileHEVCMain; @@ -594,10 +600,14 @@ profile_list[i++] = VAProfileHEVCMain10; } - if(HAS_VP9_DECODING(i965)) { + if(HAS_VP9_DECODING_PROFILE(i965, VAProfileVP9Profile0)) { profile_list[i++] = VAProfileVP9Profile0; } + if(HAS_VP9_DECODING_PROFILE(i965, VAProfileVP9Profile2)) { + profile_list[i++] = VAProfileVP9Profile2; + } + if (i965->wrapper_pdrvctx) { VAProfile wrapper_list[4]; int wrapper_num; @@ -708,18 +718,21 @@ break; case VAProfileVP9Profile0: - if(HAS_VP9_DECODING(i965)) + case VAProfileVP9Profile2: + if(HAS_VP9_DECODING_PROFILE(i965, profile)) entrypoint_list[n++] = VAEntrypointVLD; - if (i965->wrapper_pdrvctx) { - VAStatus va_status = VA_STATUS_SUCCESS; - VADriverContextP pdrvctx = i965->wrapper_pdrvctx; - - CALL_VTABLE(pdrvctx, va_status, - vaQueryConfigEntrypoints(pdrvctx, profile, - entrypoint_list, - num_entrypoints)); - return va_status; + if(profile == VAProfileVP9Profile0) { + if (i965->wrapper_pdrvctx) { + VAStatus va_status = VA_STATUS_SUCCESS; + VADriverContextP pdrvctx = i965->wrapper_pdrvctx; + + CALL_VTABLE(pdrvctx, va_status, + vaQueryConfigEntrypoints(pdrvctx, profile, + entrypoint_list, + num_entrypoints)); + return va_status; + } } break; @@ -830,9 +843,10 @@ break; case VAProfileVP9Profile0: - if ((HAS_VP9_DECODING(i965)) && (entrypoint == VAEntrypointVLD)) + case VAProfileVP9Profile2: + if ((HAS_VP9_DECODING_PROFILE(i965, profile)) && (entrypoint == VAEntrypointVLD)) va_status = VA_STATUS_SUCCESS; - else if (i965->wrapper_pdrvctx) + else if ((profile == VAProfileVP9Profile0) && i965->wrapper_pdrvctx) va_status = VA_STATUS_SUCCESS; else va_status = VA_STATUS_ERROR_UNSUPPORTED_ENTRYPOINT; @@ -874,10 +888,21 @@ break; case VAProfileHEVCMain10: - chroma_formats = 0; // clear YUV420 8bits format support if (HAS_HEVC10_DECODING(i965) && entrypoint == VAEntrypointVLD) chroma_formats |= i965->codec_info->hevc_dec_chroma_formats; break; + + case VAProfileNone: + if(HAS_VPP_P010(i965)) + chroma_formats |= VA_RT_FORMAT_YUV420_10BPP; + break; + + case VAProfileVP9Profile0: + case VAProfileVP9Profile2: + if (HAS_VP9_DECODING_PROFILE(i965, profile) && entrypoint == VAEntrypointVLD) + chroma_formats |= i965->codec_info->vp9_dec_chroma_formats; + break; + default: break; } @@ -3759,6 +3784,14 @@ image->offsets[0] = 0; image->data_size = size * 2; break; + case VA_FOURCC_P010: + image->num_planes = 2; + image->pitches[0] = awidth * 2; + image->offsets[0] = 0; + image->pitches[1] = awidth * 2; + image->offsets[1] = size * 2; + image->data_size = size * 2 + 2 * size2 * 2; + break; default: goto error; } @@ -3819,22 +3852,22 @@ int bpp_1stplane = bpp_1stplane_by_fourcc(fourcc); - if (obj_surface->user_h_stride_set) { - ASSERT_RET(IS_ALIGNED(obj_surface->width, 128), VA_STATUS_ERROR_INVALID_PARAMETER); - } else - obj_surface->width = ALIGN(obj_surface->orig_width * bpp_1stplane, 128); - - if (obj_surface->user_v_stride_set) { - ASSERT_RET(IS_ALIGNED(obj_surface->height, 32), VA_STATUS_ERROR_INVALID_PARAMETER); - } else - obj_surface->height = ALIGN(obj_surface->orig_height, 32); - if ((tiled && !obj_surface->user_disable_tiling)) { ASSERT_RET(fourcc != VA_FOURCC_I420 && fourcc != VA_FOURCC_IYUV && fourcc != VA_FOURCC_YV12, VA_STATUS_ERROR_UNSUPPORTED_RT_FORMAT); + if (obj_surface->user_h_stride_set) { + ASSERT_RET(IS_ALIGNED(obj_surface->width, 128), VA_STATUS_ERROR_INVALID_PARAMETER); + } else + obj_surface->width = ALIGN(obj_surface->orig_width * bpp_1stplane, 128); + + if (obj_surface->user_v_stride_set) { + ASSERT_RET(IS_ALIGNED(obj_surface->height, 32), VA_STATUS_ERROR_INVALID_PARAMETER); + }else + obj_surface->height = ALIGN(obj_surface->orig_height, 32); + region_height = obj_surface->height; switch (fourcc) { @@ -5688,6 +5721,14 @@ attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; attribs[i].value.value.i = VA_FOURCC_YV16; i++; + + if(HAS_VPP_P010(i965)) { + attribs[i].type = VASurfaceAttribPixelFormat; + attribs[i].value.type = VAGenericValueTypeInteger; + attribs[i].flags = VA_SURFACE_ATTRIB_GETTABLE | VA_SURFACE_ATTRIB_SETTABLE; + attribs[i].value.value.i = VA_FOURCC_P010; + i++; + } } } } diff -Nru intel-vaapi-driver-1.6.2/src/i965_drv_video.h intel-vaapi-driver-1.7.0/src/i965_drv_video.h --- intel-vaapi-driver-1.6.2/src/i965_drv_video.h 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_drv_video.h 2016-03-15 06:40:58.000000000 +0000 @@ -362,10 +362,13 @@ int min_linear_hpitch; unsigned int h264_mvc_dec_profiles; + unsigned int vp9_dec_profiles; + unsigned int h264_dec_chroma_formats; unsigned int jpeg_dec_chroma_formats; unsigned int jpeg_enc_chroma_formats; unsigned int hevc_dec_chroma_formats; + unsigned int vp9_dec_chroma_formats; unsigned int has_mpeg2_decoding:1; unsigned int has_mpeg2_encoding:1; @@ -388,6 +391,7 @@ unsigned int has_hevc_encoding:1; unsigned int has_hevc10_decoding:1; unsigned int has_vp9_decoding:1; + unsigned int has_vpp_p010:1; unsigned int num_filters; struct i965_filter filters[VAProcFilterCount]; diff -Nru intel-vaapi-driver-1.6.2/src/i965_pciids.h intel-vaapi-driver-1.7.0/src/i965_pciids.h --- intel-vaapi-driver-1.6.2/src/i965_pciids.h 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_pciids.h 2016-03-15 06:40:58.000000000 +0000 @@ -148,13 +148,40 @@ CHIPSET(0x191D, skl, skl, "Intel(R) Skylake") CHIPSET(0x191E, skl, skl, "Intel(R) Skylake") CHIPSET(0x1921, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1923, skl, skl, "Intel(R) Skylake") CHIPSET(0x1926, skl, skl, "Intel(R) Skylake") +CHIPSET(0x1927, skl, skl, "Intel(R) Skylake") CHIPSET(0x192A, skl, skl, "Intel(R) Skylake") CHIPSET(0x192B, skl, skl, "Intel(R) Skylake") +CHIPSET(0x192D, skl, skl, "Intel(R) Skylake") CHIPSET(0x1932, skl, skl, "Intel(R) Skylake") CHIPSET(0x193A, skl, skl, "Intel(R) Skylake") CHIPSET(0x193B, skl, skl, "Intel(R) Skylake") CHIPSET(0x193D, skl, skl, "Intel(R) Skylake") CHIPSET(0x0A84, bxt, bxt, "Intel(R) Broxton") CHIPSET(0x1A84, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x1A85, bxt, bxt, "Intel(R) Broxton") CHIPSET(0x5A84, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x5A85, bxt, bxt, "Intel(R) Broxton") +CHIPSET(0x5916, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5913, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5906, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5926, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5921, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5915, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590E, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591E, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5912, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5917, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5902, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x5932, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x592B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590B, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x592A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x590A, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x591D, kbl, kbl, "Intel(R) Kabylake") +CHIPSET(0x593D, kbl, kbl, "Intel(R) Kabylake") \ No newline at end of file diff -Nru intel-vaapi-driver-1.6.2/src/i965_post_processing.c intel-vaapi-driver-1.7.0/src/i965_post_processing.c --- intel-vaapi-driver-1.6.2/src/i965_post_processing.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_post_processing.c 2016-03-11 04:38:17.000000000 +0000 @@ -41,6 +41,8 @@ #include "i965_yuv_coefs.h" #include "intel_media.h" +#include "gen75_picture_process.h" + extern VAStatus vpp_surface_convert(VADriverContextP ctx, struct object_surface *src_obj_surf, @@ -5296,6 +5298,183 @@ return vaStatus; } +// it only support NV12 and P010 for vebox proc ctx +static struct object_surface *derive_surface(VADriverContextP ctx, + struct object_image *obj_image, + struct object_surface *obj_surface) +{ + VAImage * const image = &obj_image->image; + + memset((void *)obj_surface, 0, sizeof(*obj_surface)); + obj_surface->fourcc = image->format.fourcc; + obj_surface->orig_width = image->width; + obj_surface->orig_height = image->height; + obj_surface->width = image->pitches[0]; + obj_surface->height = image->height; + obj_surface->y_cb_offset = image->offsets[1] / obj_surface->width; + obj_surface->y_cr_offset = obj_surface->y_cb_offset; + obj_surface->bo = obj_image->bo; + obj_surface->subsampling = SUBSAMPLE_YUV420; + + return obj_surface; +} + +static VAStatus +vebox_processing_simple(VADriverContextP ctx, + struct i965_post_processing_context *pp_context, + struct object_surface *src_obj_surface, + struct object_surface *dst_obj_surface, + const VARectangle *rect) +{ + struct i965_driver_data *i965 = i965_driver_data(ctx); + VAProcPipelineParameterBuffer pipeline_param; + VAStatus status = VA_STATUS_ERROR_UNIMPLEMENTED; + + if(pp_context->vebox_proc_ctx == NULL) { + pp_context->vebox_proc_ctx = gen75_vebox_context_init(ctx); + } + + memset((void *)&pipeline_param, 0, sizeof(pipeline_param)); + pipeline_param.surface_region = rect; + pipeline_param.output_region = rect; + pipeline_param.filter_flags = 0; + pipeline_param.num_filters = 0; + + pp_context->vebox_proc_ctx->pipeline_param = &pipeline_param; + pp_context->vebox_proc_ctx->surface_input_object = src_obj_surface; + pp_context->vebox_proc_ctx->surface_output_object = dst_obj_surface; + + if (IS_GEN9(i965->intel.device_info)) + status = gen9_vebox_process_picture(ctx, pp_context->vebox_proc_ctx); + + return status; +} + +static VAStatus +i965_image_p010_processing(VADriverContextP ctx, + const struct i965_surface *src_surface, + const VARectangle *src_rect, + struct i965_surface *dst_surface, + const VARectangle *dst_rect) +{ +#define HAS_VPP_P010(ctx) ((ctx)->codec_info->has_vpp_p010 && \ + (ctx)->intel.has_bsd) + + struct i965_driver_data *i965 = i965_driver_data(ctx); + struct i965_post_processing_context *pp_context = i965->pp_context; + struct object_surface *src_obj_surface = NULL, *dst_obj_surface = NULL; + struct object_surface tmp_src_obj_surface, tmp_dst_obj_surface; + struct object_surface *tmp_surface = NULL; + VASurfaceID tmp_surface_id[3], out_surface_id = VA_INVALID_ID; + int num_tmp_surfaces = 0; + int fourcc = pp_get_surface_fourcc(ctx, dst_surface); + VAStatus vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; + int vpp_post = 0; + + if(HAS_VPP_P010(i965)) { + vpp_post = 0; + switch(fourcc) { + case VA_FOURCC_NV12: + if(src_rect->x != dst_rect->x || + src_rect->y != dst_rect->y || + src_rect->width != dst_rect->width || + src_rect->height != dst_rect->height) { + vpp_post = 1; + } + break; + case VA_FOURCC_P010: + // don't support scaling while the fourcc of dst_surface is P010 + if(src_rect->x != dst_rect->x || + src_rect->y != dst_rect->y || + src_rect->width != dst_rect->width || + src_rect->height != dst_rect->height) { + vaStatus = VA_STATUS_ERROR_UNIMPLEMENTED; + goto EXIT; + } + break; + default: + vpp_post = 1; + break; + } + + if(src_surface->type == I965_SURFACE_TYPE_IMAGE) { + src_obj_surface = derive_surface(ctx, (struct object_image *)src_surface->base, + &tmp_src_obj_surface); + } + else + src_obj_surface = (struct object_surface *)src_surface->base; + + if(src_obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + goto EXIT; + } + + if(vpp_post == 1) { + vaStatus = i965_CreateSurfaces(ctx, + src_obj_surface->orig_width, + src_obj_surface->orig_height, + VA_RT_FORMAT_YUV420, + 1, + &out_surface_id); + assert(vaStatus == VA_STATUS_SUCCESS); + tmp_surface_id[num_tmp_surfaces++] = out_surface_id; + tmp_surface = SURFACE(out_surface_id); + assert(tmp_surface); + i965_check_alloc_surface_bo(ctx, tmp_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); + } + + if(tmp_surface != NULL) + dst_obj_surface = tmp_surface; + else { + if(dst_surface->type == I965_SURFACE_TYPE_IMAGE) { + dst_obj_surface = derive_surface(ctx, (struct object_image *)dst_surface->base, + &tmp_dst_obj_surface); + } + else + dst_obj_surface = (struct object_surface *)dst_surface->base; + } + + if(dst_obj_surface == NULL) { + vaStatus = VA_STATUS_ERROR_ALLOCATION_FAILED; + goto EXIT; + } + + vaStatus = vebox_processing_simple(ctx, + pp_context, + src_obj_surface, + dst_obj_surface, + src_rect); + if(vaStatus != VA_STATUS_SUCCESS) + goto EXIT; + + if(vpp_post == 1) { + struct i965_surface src_surface_new; + + if(tmp_surface != NULL){ + src_surface_new.base = (struct object_base *)tmp_surface; + src_surface_new.type = I965_SURFACE_TYPE_SURFACE; + src_surface_new.flags = I965_SURFACE_FLAG_FRAME; + } + else + memcpy((void *)&src_surface_new, (void *)src_surface, sizeof(src_surface_new)); + + vaStatus = i965_image_pl2_processing(ctx, + &src_surface_new, + src_rect, + dst_surface, + dst_rect); + } + } + +EXIT: + if(num_tmp_surfaces) + i965_DestroySurfaces(ctx, + tmp_surface_id, + num_tmp_surfaces); + + return vaStatus; +} + VAStatus i965_image_processing(VADriverContextP ctx, const struct i965_surface *src_surface, @@ -5351,6 +5530,13 @@ src_surface, src_rect, dst_surface, + dst_rect); + break; + case VA_FOURCC_P010: + status = i965_image_p010_processing(ctx, + src_surface, + src_rect, + dst_surface, dst_rect); break; default: diff -Nru intel-vaapi-driver-1.6.2/src/i965_post_processing.h intel-vaapi-driver-1.7.0/src/i965_post_processing.h --- intel-vaapi-driver-1.6.2/src/i965_post_processing.h 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/i965_post_processing.h 2016-03-11 04:38:17.000000000 +0000 @@ -528,6 +528,8 @@ unsigned int curbe_allocation_size : 16; } vfe_gpu_state; + struct intel_vebox_context *vebox_proc_ctx; + struct pp_load_save_context pp_load_save_context; struct pp_scaling_context pp_scaling_context; struct pp_avs_context pp_avs_context; diff -Nru intel-vaapi-driver-1.6.2/src/intel_driver.h intel-vaapi-driver-1.7.0/src/intel_driver.h --- intel-vaapi-driver-1.6.2/src/intel_driver.h 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/intel_driver.h 2016-03-15 06:40:58.000000000 +0000 @@ -137,6 +137,7 @@ unsigned int is_haswell : 1; /* gen7 */ unsigned int is_cherryview : 1; /* gen8 */ unsigned int is_broxton : 1; /* gen9 */ + unsigned int is_kabylake : 1; /* gen9p5 */ }; struct intel_driver_data @@ -198,4 +199,6 @@ #define IS_GEN9(device_info) (device_info->gen == 9) +#define IS_KBL(device_info) (device_info->is_kabylake) + #endif /* _INTEL_DRIVER_H_ */ diff -Nru intel-vaapi-driver-1.6.2/src/intel_media_common.c intel-vaapi-driver-1.7.0/src/intel_media_common.c --- intel-vaapi-driver-1.6.2/src/intel_media_common.c 2015-12-15 05:55:31.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/intel_media_common.c 2016-03-15 06:40:58.000000000 +0000 @@ -123,9 +123,6 @@ return; } - dri_bo_unreference(vp9_surface->motion_vector_temporal_bo); - vp9_surface->motion_vector_temporal_bo = NULL; - free(vp9_surface); *data = NULL; diff -Nru intel-vaapi-driver-1.6.2/src/intel_version.h intel-vaapi-driver-1.7.0/src/intel_version.h --- intel-vaapi-driver-1.6.2/src/intel_version.h 2015-12-15 06:01:02.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/intel_version.h 2016-03-15 06:48:57.000000000 +0000 @@ -31,6 +31,6 @@ * The full version identifier of libva-intel-driver, from a git * repository, in string form (suitable for string concatenation). */ -#define INTEL_DRIVER_GIT_VERSION "1.6.2" +#define INTEL_DRIVER_GIT_VERSION "1.7.0" #endif /* INTEL_VERSION_H */ diff -Nru intel-vaapi-driver-1.6.2/src/.VERSION.pkg intel-vaapi-driver-1.7.0/src/.VERSION.pkg --- intel-vaapi-driver-1.6.2/src/.VERSION.pkg 2015-12-15 06:01:59.000000000 +0000 +++ intel-vaapi-driver-1.7.0/src/.VERSION.pkg 2016-03-15 07:32:27.000000000 +0000 @@ -1 +1 @@ -1.6.2 +1.7.0