diff -Nru tiomapconf-1.50.0/CHANGELOG tiomapconf-1.52.0/CHANGELOG --- tiomapconf-1.50.0/CHANGELOG 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/CHANGELOG 2012-11-14 16:36:23.000000000 +0000 @@ -1,3 +1,54 @@ +v1.52: +------- + - [OMAP5][CLKSPEED][AUDIT] fix missing BANDGAPTS expected clock rate + - [OMAP5][HELP][TEMP] fix supported memory sensor names in help + - [OMAP5][MODULE] fix double rounding side effect with GPU DSP And IVA PoR rates + - [OMAP5][TEMP] fix PCB sensor and add CHARGER sensor support + - [OMAP5][TEMP] remove unused code + - [OMAP5][TEMP] MPU and GPU hotspot sensors support + - [OMAP4][TEMP] cleanup code and fix sensors path + - [OMAP4][TEMP] fix hotspot sensor file read + - [OMAP4][TEMP] use new generic temperature sensor abstracted layer + - [OMAP4][CLOCK] fix 2 bugs in debug code + - [OMAP4][CLKSPEED][AUDIT] do not skip TIMERs, MCBSP, MCASP modules + - [OMAP4][UC_AUDIT] fix Jelly Bean support + - [OMAP4460][OMAP4470][OPP] fix VDD_IVA OPP NITROSB expected clock rate + - [OMAP4470][OPP] OMAP4470 VDD_CORE OPP100_HIGH support + - [PMIC] add function to round voltage + - [LIB] add functions to convert clock rates and voltages + - [TEMP] introduce generic temperature sensor abstraction layer + - [VOLTDM] introduce voltage domain generic abstraction layer + - [OPP] introduce OPP generic abstraction layer + - [OMAPCONF] add user options to dynamically trace omapconf memory R/W access + - [REGRESSIONTESTSUITE][OMAP4][UC_AUDIT] add output files to audit + - [REGRESSIONTESTSUITE][TEMP][OMAP5] update script to support new temp options + - [REGRESSIONTESTSUITE][OMAP4470] fix OPP50 MPU clock rate + + +v1.51: +------- + - [AUDIT][PERF] fixed empty interrupt statistic when CPU1 is offline + - [AUDIT][PERF] fixed segmentation fault + - [OMAP4][OMAP5][OPP] fixed OPP-clock rates incoherency + - [OMAP4][OMAP5][OPP] highlight disabled modules + - [OMAP4][OMAP5][OPP] highlight disabled modules + - [OMAP4][OMAP5][OPP] added debug traces + - [OMAP4][MODULE] fixed missing arg in debug trace in mod44xx_get_autoidle_mode() + - [OMAP5][VOLTDM][OPP] use nominal voltage instead of frequencies to detect OPP + - [OMAP5][VC] added function to retrieve registers of a given VC module + - [OMAP5][MODULE] fixed incorrect number of arguments in debug trace + - [OMAP5][MODULE] fixed GPU/IVA/DSP OPP_[NOM-HI] clock rates + - [STATCOLL] Added --overflow_delay in "trace" module help + - [STATCOLL] Extended --overflow_delay to -a 2 mode (direct dump on terminal) + - [STATCOLL] Reset HW IP after a certain number of iterations in -a 1 mode instead of counter checking + - [STATCOLL] per-counter config, error checking, HW bug handling, overflow handling + - [STATCOLL] clarified that option is -m MA_MPU_1_2, not MA_MPU_1_2 alone + - [STATCOLL] 6 counters and better description of counters before first data output + - [STATCOLL] Add capability to track overflow on 2 thresholds (use twice -o and -t) + - [STATCOLL] rename trans_qaul to trans_qual in cTools lib + - [STATCOLL] Missing initiator, error check for -m option and capability to use initiator name + + v1.50: ------- - - Initial release. \ No newline at end of file + - Initial release. diff -Nru tiomapconf-1.50.0/Makefile tiomapconf-1.52.0/Makefile --- tiomapconf-1.50.0/Makefile 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/Makefile 2012-11-14 16:36:23.000000000 +0000 @@ -70,7 +70,8 @@ omap4/vp44xx-data.c omap4/dpll44xx-data.c\ omap4/dpll4470-data-38_4MHz.c\ omap4/dpll4460-data-38_4MHz.c\ - omap4/dpll4430-data-38_4MHz.c omap4/pads44xx.c + omap4/dpll4430-data-38_4MHz.c omap4/pads44xx.c\ + omap4/opp44xx.c OMAP4OBJECTS= $(OMAP4SOURCES:.c=.o) @@ -100,7 +101,7 @@ omap5/abb54xx.c omap5/emif54xx-defs.c omap5/emif54xx.c\ omap5/clkdm_dependency54xx-data.c\ omap5/clkdm_dependency54xx.c omap5/ctt54xx.c\ - omap5/vp54xx.c omap5/vc54xx.c + omap5/vp54xx.c omap5/vc54xx.c omap5/opp54xx.c OMAP5OBJECTS= $(OMAP5SOURCES:.c=.o) @@ -115,7 +116,8 @@ statcoll/sci_swcapture.c statcoll/sci.c\ statcoll/cToolsHelper.c common/timestamp_32k.c\ common/lib_android.c common/mem.c common/emif.c\ - common/trace.c + common/trace.c common/opp.c common/voltdm.c\ + common/temperature.c OBJECTS= $(SOURCES:.c=.o) diff -Nru tiomapconf-1.50.0/common/audit.c tiomapconf-1.52.0/common/audit.c --- tiomapconf-1.50.0/common/audit.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/audit.c 2012-11-14 16:36:23.000000000 +0000 @@ -102,9 +102,9 @@ unsigned int emif_delta_cycles, emif_delta_busy_cycles; double emif_load; - uint64_t *time_in_opp_t0; - uint64_t *time_in_opp_t1; - uint64_t *time_in_opp_cnt; + uint64_t *time_in_opp_t0 = NULL; + uint64_t *time_in_opp_t1 = NULL; + uint64_t *time_in_opp_cnt = NULL; uint64_t total_trans_t0, total_trans_t1, total_trans_cnt; unsigned int i; uint64_t sec, msec, usec, active_c0_time; diff -Nru tiomapconf-1.50.0/common/cpuinfo.c tiomapconf-1.52.0/common/cpuinfo.c --- tiomapconf-1.50.0/common/cpuinfo.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/cpuinfo.c 2012-11-14 16:36:23.000000000 +0000 @@ -1116,6 +1116,26 @@ return load; } +/* ------------------------------------------------------------------------*//** + * @FUNCTION cpu_online_cores_count_get + * @BRIEF return the number of CPU cores online + * @RETURNS number of CPU cores online + * @param[in] none + * @DESCRIPTION return the number of CPU cores online + *//*------------------------------------------------------------------------ */ +unsigned int cpu_online_cores_count_get(void) +{ + unsigned int i, cpu_total_count, cpu_online_count; + + cpu_total_count = cpu_cores_count_get(); + cpu_online_count = 0; + for (i = 0; i < cpu_total_count; i ++) { + if (cpu_is_online(i) == 1) + cpu_online_count ++; + } + + return cpu_online_count; +} /* ------------------------------------------------------------------------*//** * @FUNCTION cpu_cores_count_get diff -Nru tiomapconf-1.50.0/common/cpuinfo.h tiomapconf-1.52.0/common/cpuinfo.h --- tiomapconf-1.50.0/common/cpuinfo.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/cpuinfo.h 2012-11-14 16:36:23.000000000 +0000 @@ -135,6 +135,7 @@ char *cpu_full_name_get(char s[CPU_FULL_NAME_MAX_LENGTH]); unsigned int cpu_cores_count_get(void); +unsigned int cpu_online_cores_count_get(void); unsigned int cpu_is_online(unsigned short cpu); int cpu_proc_stats_get(unsigned int cpu, diff -Nru tiomapconf-1.50.0/common/emif.h tiomapconf-1.52.0/common/emif.h --- tiomapconf-1.50.0/common/emif.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/emif.h 2012-11-14 16:36:23.000000000 +0000 @@ -46,7 +46,7 @@ #define __EMIF_H__ -#include +#include #define EMIF_TEMP_MAX_NAME_LENGTH 16 diff -Nru tiomapconf-1.50.0/common/help.c tiomapconf-1.52.0/common/help.c --- tiomapconf-1.50.0/common/help.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/help.c 2012-11-14 16:36:23.000000000 +0000 @@ -224,6 +224,14 @@ printf("\t Fake memory access (no real R/W done): write " "accesses are discarded, read accesses return physical " "address.\n"); + + printf("\n\t--trace_read\n"); + printf( + "\t Enable console tracing of all omapconf memory read access.\n"); + + printf("\n\t--trace_write\n"); + printf( + "\t Enable console tracing of all omapconf memory write access.\n"); } if ((cat == HELP_ALL) || (cat == HELP_FORCEDETECT)) { diff -Nru tiomapconf-1.50.0/common/lib.c tiomapconf-1.52.0/common/lib.c --- tiomapconf-1.50.0/common/lib.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/lib.c 2012-11-14 16:36:23.000000000 +0000 @@ -689,7 +689,7 @@ * open file in this directory. In case file is open for * read only, no change to regular fopen(). *//*------------------------------------------------------------------------ */ -FILE *workdir_fopen(char filename[128], const char * mode) +FILE *workdir_fopen(char filename[128], const char *mode) { char *workdir; char fullname[128]; @@ -1003,7 +1003,7 @@ * @param[in, out] addr: register address corresponding to reg. name. * @DESCRIPTION find reg. addr corresponding to reg. name *//*------------------------------------------------------------------------ */ -int find_reg_addr(char *name, unsigned int* addr) +int find_reg_addr(char *name, unsigned int *addr) { int ret = 0; @@ -1451,6 +1451,62 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION uv2v + * @BRIEF convert micro-volt (integer) to volt (floating point). + * @RETURNS voltage in volt (V) + * @param[in] uv: voltage in micro-volt (uV) + * @DESCRIPTION convert micro-volt (integer) to volt (floating point). + *//*------------------------------------------------------------------------ */ +inline double uv2v(int uv) +{ + double v; + + v = ((double) uv) / 1000000.0; + dprintf("%s(): uv=%d, v=%lf\n", __func__, uv, v); + return v; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION v2uv + * @BRIEF convert volt (floating point) to micro-volt (integer). + * @RETURNS voltage in micro-volt (uV) + * @param[in] v: voltage in volt (V) + * @DESCRIPTION convert volt (floating point) to micro-volt (integer). + *//*------------------------------------------------------------------------ */ +inline int v2uv(double v) +{ + return (int) (v * 1000000.0); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION khz2mhz + * @BRIEF convert KHz (integer) to MHz (floating point). + * @RETURNS frequency in MHz + * @param[in] khz: frequency in KHz + * @DESCRIPTION convert KHz (integer) to MHz (floating point). + *//*------------------------------------------------------------------------ */ +inline double khz2mhz(int khz) +{ + return ((double) khz) / 1000.0; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mhz2khz + * @BRIEF convert MHz (floating point) to KHz (integer). + * @RETURNS frequency in KHz + * @param[in] mhz: frequency in MHz + * @DESCRIPTION convert MHz (floating point) to KHz (integer). + *//*------------------------------------------------------------------------ */ +inline int mhz2khz(double mhz) +{ + return (int) (mhz * 1000.0); +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION omapconf_getdefaults * @BRIEF Gets defaults from a file and returns ints or strings in * the pointers allocated in the table provided. diff -Nru tiomapconf-1.50.0/common/lib.h tiomapconf-1.52.0/common/lib.h --- tiomapconf-1.50.0/common/lib.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/lib.h 2012-11-14 16:36:23.000000000 +0000 @@ -82,11 +82,6 @@ #define RELEASE_TYPE_MAX_LENGTH 128 #define RELEASE_DATE_MAX_LENGTH 128 -#define VOLTDM_MAX_NAME_LENGTH 12 -#define OPP_MAX_NAME_LENGTH 10 - -#define TEMP_ABSOLUTE_ZERO -273 - typedef enum { OFF_VOLTAGE = 0, RETENTION_VOLTAGE = 8, @@ -142,27 +137,27 @@ /* OMAP_READREG() MACRO DEPRECATED STARTING OMAP5, DON'T USE IT ANYMORE */ #define OMAP_READREG(addr, var) \ if (mem_read((unsigned int) addr, &var) != 0) { \ - fprintf(stderr, "%s(): read error at 0x%08X!!!\n", \ + fprintf(stderr, "omapconf: %s(): read error at 0x%08X!!!\n", \ __func__, (unsigned int) addr); \ return OMAPCONF_ERR_REG_ACCESS; \ } #define CHECK_NULL_ARG(arg, ret) \ if ((void *) arg == NULL) { \ - fprintf(stderr, "%s(): %s == NULL!!!\n", __func__, #arg); \ + fprintf(stderr, "omapconf: %s(): %s == NULL!!!\n", __func__, #arg); \ return ret; \ } #define CHECK_ARG_LESS_THAN(arg, max, ret) \ if (arg >= max) { \ - fprintf(stderr, "%s(): %s (%u) >= %s (%u) !!!\n", \ + fprintf(stderr, "omapconf: %s(): %s (%u) >= %s (%u) !!!\n", \ __func__, #arg, arg, #max, max); \ return ret; \ } #define CHECK_CPU(cpu, ret) \ if (!cpu_is_omap##cpu()) { \ - fprintf(stderr, "%s(): cpu %s not supported!!!\n", \ + fprintf(stderr, "omapconf: %s(): cpu %s not supported!!!\n", \ __func__, #cpu); \ return ret; \ } @@ -192,7 +187,7 @@ char *mhz2string(double rate, char s[15]); -int find_reg_addr(char *name, unsigned int* addr); +int find_reg_addr(char *name, unsigned int *addr); int name2addr(char *name, unsigned int *addr, reg_table table[]); int dumpregs(reg_table table[]); int mem_address_range_dump(unsigned int start, unsigned int end); @@ -201,7 +196,7 @@ char *uppercase(char *s); char *workdir_get(void); -FILE *workdir_fopen(char filename[128], const char * mode); +FILE *workdir_fopen(char filename[128], const char *mode); char *kernel_details_get(char version[KERNEL_VERSION_MAX_LENGTH], char author[KERNEL_AUTHOR_MAX_LENGTH], @@ -233,6 +228,12 @@ int celcius2fahrenheit(int d); +inline double uv2v(int uv); +inline int v2uv(double v); + +inline double khz2mhz(int khz); +inline int mhz2khz(double mhz); + int omapconf_getdefaults( char *defaults_file, char *prefix, name_desc_val_table tablep[]); diff -Nru tiomapconf-1.50.0/common/mem.c tiomapconf-1.52.0/common/mem.c --- tiomapconf-1.50.0/common/mem.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/mem.c 2012-11-14 16:36:23.000000000 +0000 @@ -49,6 +49,34 @@ static unsigned int last_mem_addr; static unsigned short fake_mem_access = 0; +static unsigned short mem_read_trace = 0; +static unsigned short mem_write_trace = 0; + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mem_read_trace_enable + * @BRIEF enable tracing of all memory read access. + * @param[in] enable: 0 to disable trace (default), 1 to enable it. + * @DESCRIPTION enable tracing of all memory read access. + * Print trace with physical address and read value. + *//*------------------------------------------------------------------------ */ +void mem_read_trace_enable(unsigned short enable) +{ + mem_read_trace = enable; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mem_write_trace_enable + * @BRIEF enable tracing of all memory write access. + * @param[in] enable: 0 to disable trace (default), 1 to enable it. + * @DESCRIPTION enable tracing of all memory read access. + * Print trace with physical address and written value. + *//*------------------------------------------------------------------------ */ +void mem_write_trace_enable(unsigned short enable) +{ + mem_write_trace = enable; +} /* ------------------------------------------------------------------------*//** @@ -164,6 +192,9 @@ ret = MEM_ERR_ACCESS; } + if (mem_read_trace) + printf("omapconf: read 0x%08X at address 0x%08X\n", *val, addr); + return ret; } @@ -196,6 +227,10 @@ ret = 0; } + if (mem_write_trace) + printf("omapconf: wrote 0x%08X at address 0x%08X\n", + val, addr); + return ret; } diff -Nru tiomapconf-1.50.0/common/mem.h tiomapconf-1.52.0/common/mem.h --- tiomapconf-1.50.0/common/mem.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/mem.h 2012-11-14 16:36:23.000000000 +0000 @@ -51,6 +51,9 @@ #define MEM_ERR_MAP -5 /* memory could not be mapped */ +void mem_read_trace_enable(unsigned short enable); +void mem_write_trace_enable(unsigned short enable); + int mem_map(unsigned int addr); void mem_unmap(void); inline void *mem_phys2virt(void *addr); diff -Nru tiomapconf-1.50.0/common/module.c tiomapconf-1.52.0/common/module.c --- tiomapconf-1.50.0/common/module.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/module.c 2012-11-14 16:36:23.000000000 +0000 @@ -44,6 +44,11 @@ #include #include +#include +#include +#include +#include +#include /* #define MOD_DEBUG */ @@ -289,3 +294,435 @@ return 0; } } + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mod_id_get + * @BRIEF return the platform-specific module ID corresponding to + * generic module name provided as argument. + * @RETURNS platform-specific module ID (>0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] mod: module name, as defined in module.h + * @DESCRIPTION return the platform-specific module ID corresponding to + * generic module name provided as argument. + *//*------------------------------------------------------------------------ */ +int mod_id_get(const char *mod) +{ + int mod_id; + #ifdef MOD_DEBUG + char name[MOD44XX_MAX_NAME_LENGTH]; + #endif + + /* FIXME: TACTICAL IMPLEMENTATION, NEED TO BE REWORKED/COMPLETED!!! */ + + CHECK_NULL_ARG(mod, OMAPCONF_ERR_ARG); + + if (strcmp(mod, "MPU") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_MPU; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_MPU; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "IVA") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_IVAHD; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_IVA; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "DSP") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_DSP; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_DSP; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "GPU") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_GFX; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_GPU; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "AESS") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_AESS; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_AESS; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "L3") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_L3_1; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_L3_MAIN1_INTERCONNECT; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "L4") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_L4_CFG; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_L4_CFG_INTERCONNECT; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "EMIF") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_EMIF1; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_EMIF1; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "MEM") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_DDRPHY; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_PHY_EMIF; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "ISS") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_ISS; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_ISS; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "FDIF") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_FDIF; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_FDIF; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "CAL") == 0) { + if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_CAL; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "IPU") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_MPU_M3; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_IPU; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "DSS") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_DISPC; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_DSS; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "BB2D") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_BB2D; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_BB2D; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "HSI") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_HSI; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_HSI; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else if (strcmp(mod, "C2C") == 0) { + if (cpu_is_omap44xx()) + mod_id = (int) OMAP4_C2C; + else if (cpu_is_omap54xx()) + mod_id = (int) OMAP5_C2C; + else + mod_id = (int) OMAPCONF_ERR_CPU; + } else { + mod_id = (int) OMAPCONF_ERR_NOT_AVAILABLE; + } + + #ifdef MOD_DEBUG + if (cpu_is_omap44xx()) + printf("%s(%s) = %d (%s)\n", __func__, mod, mod_id, + mod44xx_get_name(mod_id, name)); + else if (cpu_is_omap54xx()) + printf("%s(%s) = %d (%s)\n", __func__, mod, mod_id, + mod54xx_name_get(mod_id)); + #endif + return mod_id; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mod_clk_rate_get + * @BRIEF return the module functional clock rate, in KHz. + * @RETURNS module functional clock rate, in KHz. + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] mod: module name, as defined in module.h + * @DESCRIPTION return the module functional clock rate, in KHz. + *//*------------------------------------------------------------------------ */ +int mod_clk_rate_get(const char *mod) +{ + int ret, mod_id, rate_khz; + double rate_mhz; + clock44xx_id clk_id; + opp44xx_id opp_id; + + CHECK_NULL_ARG(mod, OMAPCONF_ERR_ARG); + + /* FIXME: TACTICAL IMPLEMENTATION, NEED TO BE REWORKED/COMPLETED!!! */ + + mod_id = mod_id_get(mod); + if (mod_id < 0) { + dprintf("%s(%s): could not retrieve module ID! (%d)\n", + __func__, mod, mod_id); + rate_khz = mod_id; + } else if (cpu_is_omap44xx()) { + ret = mod44xx_get_clk_speed((mod44xx_id) mod_id, + &clk_id, &opp_id, &rate_mhz); + if (ret != 0) { + dprintf( + "%s(%s): could not retrieve module rate! (%d)\n", + __func__, mod, ret); + rate_khz = ret; + } else { + if (mod_id == OMAP4_DDRPHY) + rate_mhz /= 2.0; + rate_khz = mhz2khz(rate_mhz); + } + } else if (cpu_is_omap54xx()) { + rate_mhz = mod54xx_clk_rate_get((mod54xx_id) mod_id, 1); + if (rate_mhz < 0) { + dprintf( + "%s(%s): could not retrieve module rate! (%d)\n", + __func__, mod, (int) rate_mhz); + rate_khz = (int) rate_mhz; + } else { + rate_khz = mhz2khz(rate_mhz); + } + } else { + fprintf(stderr, "omapconf: %s(): cpu not supported!!!\n", + __func__); + rate_khz = OMAPCONF_ERR_CPU; + } + + dprintf("%s(%s) = %d KHz\n", __func__, mod, rate_khz); + return rate_khz; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mod_mode_get + * @BRIEF return the module module. + * @RETURNS module module in case of success + * MOD_MODULE_MODE_MAX otherwise + * @param[in] mod: module name, as defined in module.h + * @DESCRIPTION return the module module. + *//*------------------------------------------------------------------------ */ +mod_module_mode mod_mode_get(const char *mod) +{ + mod_module_mode mmode; + + /* FIXME: TACTICAL IMPLEMENTATION, NEED TO BE REWORKED/COMPLETED!!! */ + + CHECK_NULL_ARG(mod, MOD_MODULE_MODE_MAX); + + if (strcmp(mod, "MPU") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_MPU, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_MPU); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "IVA") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_IVAHD, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_IVA); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "DSP") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_DSP, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_DSP); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "GPU") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_GFX, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_GPU); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "AESS") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_AESS, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_AESS); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "L3") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_L3_1, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_L3_MAIN1_INTERCONNECT); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "L4") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_L4_CFG, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_L4_CFG_INTERCONNECT); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "EMIF") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_EMIF1, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_EMIF1); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "MEM") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_DDRPHY, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_PHY_EMIF); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "ISS") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_ISS, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_ISS); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "FDIF") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_FDIF, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_FDIF); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "CAL") == 0) { + if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_CAL); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "IPU") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_MPU_M3, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_IPU); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "DSS") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_DISPC, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_DSS); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "BB2D") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_BB2D, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_BB2D); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "HSI") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_HSI, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_HSI); + else + mmode = MOD_MODULE_MODE_MAX; + } else if (strcmp(mod, "C2C") == 0) { + if (cpu_is_omap44xx()) + mod44xx_get_mode(OMAP4_C2C, &mmode); + else if (cpu_is_omap54xx()) + mmode = mod54xx_mode_get(OMAP5_C2C); + else + mmode = MOD_MODULE_MODE_MAX; + } else { + mmode = MOD_MODULE_MODE_MAX; + } + + dprintf("%s(%s) = %s\n", __func__, mod, + mod_module_mode_name_get(mmode)); + return mmode; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION mod_por_clk_rate_get + * @BRIEF return the recommended module functional clock rate, + * in KHz, for a given OPerating Point (OPP), + * as defined in Data Manual. + * @RETURNS module recommended functional clock rate, in KHz. + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] mod: module name, as defined in module.h + * @DESCRIPTION return the recommended module functional clock rate, + * in KHz, for a given OPerating Point (OPP), + * as defined in Data Manual. + *//*------------------------------------------------------------------------ */ +int mod_por_clk_rate_get(const char *mod, const char *opp) +{ + int ret, mod_id, opp_id, rate_khz; + double rate_mhz; + + CHECK_NULL_ARG(mod, OMAPCONF_ERR_ARG); + + /* FIXME: TACTICAL IMPLEMENTATION, NEED TO BE REWORKED/COMPLETED!!! */ + + mod_id = mod_id_get(mod); + if (mod_id < 0) { + dprintf("%s(%s): could not retrieve module ID! (%d)\n", + __func__, mod, mod_id); + rate_khz = mod_id; + goto mod_por_clk_rate_get_end; + } + + opp_id = opp_s2id(opp); + if (opp_id < 0) { + dprintf("%s(%s): could not retrieve OPP ID! (%d)\n", + __func__, mod, opp_id); + rate_khz = opp_id; + goto mod_por_clk_rate_get_end; + } + + if (cpu_is_omap44xx()) { + ret = mod44xx_get_por_clk_speed((mod44xx_id) mod_id, + (unsigned short) opp_id, &rate_mhz); + if (ret < 0) { + dprintf( + "%s(%s): could not retrieve module POR rate! (%d)\n", + __func__, mod, ret); + rate_khz = ret; + } else { + rate_khz = mhz2khz(rate_mhz); + } + } else if (cpu_is_omap54xx()) { + rate_mhz = mod54xx_por_clk_rate_get( + (mod54xx_id) mod_id, (opp54xx_id) opp_id); + if (rate_mhz < 0) { + rate_khz = (int) rate_mhz; + dprintf( + "%s(%s): could not retrieve module POR rate! (%d)\n", + __func__, mod, rate_khz); + } else { + rate_khz = mhz2khz(rate_mhz); + } + } else { + fprintf(stderr, "omapconf: %s(): cpu not supported!!!\n", + __func__); + rate_khz = OMAPCONF_ERR_CPU; + } + +mod_por_clk_rate_get_end: + dprintf("%s(%s) = %d KHz\n", __func__, mod, rate_khz); + return rate_khz; +} diff -Nru tiomapconf-1.50.0/common/module.h tiomapconf-1.52.0/common/module.h --- tiomapconf-1.50.0/common/module.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/module.h 2012-11-14 16:36:23.000000000 +0000 @@ -145,5 +145,10 @@ const char *mod_standby_status_name_get(mod_standby_status status); unsigned int mod_is_accessible(unsigned int cm_clkctrl); +int mod_id_get(const char *mod); +int mod_clk_rate_get(const char *mod); +int mod_por_clk_rate_get(const char *mod, const char *opp); +mod_module_mode mod_mode_get(const char *mod); + #endif diff -Nru tiomapconf-1.50.0/common/opp.c tiomapconf-1.52.0/common/opp.c --- tiomapconf-1.50.0/common/opp.c 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/opp.c 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,977 @@ +/* + * + * @Component OMAPCONF + * @Filename opp.c + * @Description OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* #define OPP_DEBUG */ +#ifdef OPP_DEBUG +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) +#else +#define dprintf(format, ...) +#endif + + +#define OPP_MAX_RETRY 10 + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp_init(void) +{ + if (cpu_is_omap44xx()) { + opp44xx_init(); + } else if (cpu_is_omap54xx()) { + opp54xx_init(); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_deinit + * @BRIEF free dynamically allocated internal data. + * @DESCRIPTION free dynamically allocated internal data. + * MUST BE CALLED AT END OF EXECUTION. + *//*------------------------------------------------------------------------ */ +void opp_deinit(void) +{ + if (cpu_is_omap44xx()) { + opp44xx_deinit(); + } else if (cpu_is_omap54xx()) { + opp54xx_deinit(); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_s2id + * @BRIEF convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + * @RETURNS plaftorm-specific OPP ID (> 0) in case of success + * OMAPCONF_ERR_CPU + * @param[in] opp: OPP provided as a string (as defined in opp.h) + * @DESCRIPTION convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + *//*------------------------------------------------------------------------ */ +int opp_s2id(const char *opp) +{ + if (cpu_is_omap44xx()) { + return opp44xx_id_get(opp); + } else if (cpu_is_omap54xx()) { + return opp54xx_id_get(opp); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_list_get + * @BRIEF return the list of OPP of a given voltage domain + * @RETURNS list of OPP of a given voltage domain in case of success + * NULL in case of error + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @DESCRIPTION return the list of OPP of a given voltage domain + *//*------------------------------------------------------------------------ */ +const genlist *opp_list_get(const char *voltdm) +{ + int vdd_id; + + CHECK_NULL_ARG(voltdm, NULL); + + opp_init(); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) + return NULL; + + if (cpu_is_omap44xx()) { + return opp44xx_list_get((voltdm44xx_id) vdd_id); + } else if (cpu_is_omap54xx()) { + return opp54xx_list_get((voltdm54xx_id) vdd_id); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return NULL; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_count_get + * @BRIEF return the number of OPP(s) of a given voltage domain + * @RETURNS number of OPP(s) (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @DESCRIPTION return the number of OPP(s) of a given voltage domain + *//*------------------------------------------------------------------------ */ +int opp_count_get(const char *voltdm) +{ + int vdd_id; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + opp_init(); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) + return OMAPCONF_ERR_ARG; + + if (cpu_is_omap44xx()) { + return opp44xx_count_get((voltdm44xx_id) vdd_id); + } else if (cpu_is_omap54xx()) { + return opp54xx_count_get((voltdm54xx_id) vdd_id); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_set + * @BRIEF change OPP of a given voltage domain. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] opp: name of OPP to be set (as defined in opp.h) + * @DESCRIPTION change OPP of a given voltage domain. + *//*------------------------------------------------------------------------ */ +int opp_set(const char *voltdm, const char *opp) +{ + int vdd_id, opp_id; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + CHECK_NULL_ARG(opp, OMAPCONF_ERR_ARG); + + opp_init(); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) + return OMAPCONF_ERR_ARG; + + opp_id = opp_s2id(opp); + if (opp_id < 0) + return OMAPCONF_ERR_ARG; + + if (cpu_is_omap44xx()) { + return opp44xx_set((voltdm44xx_id) vdd_id, (opp44xx_id) opp_id); + } else if (cpu_is_omap54xx()) { + return opp54xx_set((voltdm54xx_id) vdd_id, (opp54xx_id) opp_id); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_by_rate_get + * @BRIEF return the current voltage domain OPP name, + * searched by clock rates. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] quiet: if == 0, print warning message when OPP + * could not be found + * @DESCRIPTION return the current voltage domain OPP, + * searched by clock rates. + *//*------------------------------------------------------------------------ */ +const char *opp_by_rate_get(const char *voltdm, unsigned short quiet) +{ + const char *opp = NULL; + int vdd_id; + + CHECK_NULL_ARG(voltdm, NULL); + + opp_init(); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) + return NULL; + + if (cpu_is_omap44xx()) { + opp = opp44xx_by_rate_get(vdd_id); + } else if (cpu_is_omap54xx()) { + opp = opp54xx_by_rate_get(vdd_id); + } else { + fprintf(stderr, "omapconf: %s(): cpu not supported!!!\n", + __func__); + opp = NULL; + } + + if ((quiet == 0) && (opp == NULL)) + fprintf(stdout, + "omapconf: warning: no matching rate for %s OPP. Please check rates against Data Manual recommendations.\n", + voltdm); + + #ifdef OPP_DEBUG + if (opp != NULL) + printf("%s(%s): found %s OPP\n", __func__, voltdm, opp); + else + printf("%s(%s): OPP not found!\n", __func__, voltdm); + #endif + return opp; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_by_voltage_get + * @BRIEF return the current voltage domain OPP name, + * searched by voltages. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] quiet: if == 0, print warning message when OPP + * could not be found + * @DESCRIPTION return the current voltage domain OPP name, + * searched by voltages. + *//*------------------------------------------------------------------------ */ +#if 0 +const char *opp_by_voltage_get(const char *voltdm, unsigned short quiet) +{ + int volt; + opp_t opp; + const genlist *opp_list; + int i, opp_count; + const char *opp_name = NULL; + const char *opp_name2 = NULL; + + CHECK_NULL_ARG(voltdm, NULL); + + opp_init(); + + volt = voltdm_nominal_voltage_get(voltdm); + if (volt < 0) { + dprintf("%s(%s): could not get voltage!\n", __func__, voltdm); + return NULL; + } + dprintf("%s(%s): nominal voltage is %duV\n", __func__, voltdm, volt); + + opp_list = opp_list_get(voltdm); + if (opp_list == NULL) { + dprintf("%s(%s): could not get OPP list!\n", __func__, voltdm); + return NULL; + } + + opp_count = opp_count_get(voltdm); + if (opp_count <= 0) { + dprintf("%s(%s): could not get OPP count!\n", __func__, voltdm); + return NULL; + } + dprintf("%s(%s): found %d possible OPP\n", __func__, voltdm, opp_count); + + for (i = 0; i < opp_count; i++) { + genlist_get((genlist *) opp_list, i, (opp_t *) &opp); + dprintf("%s(%s): POR nominal voltage for %s is %duV\n", + __func__, voltdm, opp.name, opp.voltage); + if (volt == opp.voltage) { + /* + * OPP DPLL_CASC and OPP[50-NOM] shares the same + * voltage. + * This is also the case for OPP_NITRO and OPP_NITRO_SB. + * Must double-check with frequencies. + */ + if ((strcmp(opp.name, OPP_DPLL_CASC) != 0) && + (strcmp(opp.name, OPP_NITRO) != 0)) { + opp_name = opp.name; + dprintf("%s(%s): OPP found: %s\n", __func__, + voltdm, opp_name); + break; + } + dprintf( + "%s(%s): %s found, double-checking using rates (same voltage apply to more than 1 OPP.\n", + __func__, voltdm, opp.name); + opp_name2 = opp_by_rate_get(voltdm, 1); + if (strcmp(opp_name2, opp.name) == 0) { + opp_name = opp.name; + dprintf("%s(%s): OPP found: %s\n", __func__, + voltdm, opp_name); + break; + } + dprintf( + "%s(%s): this was not %s, but probably the next one.\n", + __func__, voltdm, opp.name); + } + } + + if ((quiet == 0) && (opp_name == NULL)) + fprintf(stdout, + "omapconf: warning: no matching %s OPP for %lfV nominal voltage. Please check voltage against Data Manual recommendations.\n", + voltdm, uv2v(volt)); + + return opp_name; +} +#endif + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_get + * @BRIEF return the current voltage domain OPP name + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] quiet: if == 0, print warning message when OPP + * could not be found + * @DESCRIPTION return the current voltage domain OPP name. Search it by + * voltage first, then if failed search it by rates. + *//*------------------------------------------------------------------------ */ +const char *opp_get(const char *voltdm, unsigned int quiet) +{ + const char *opp = NULL; + + CHECK_NULL_ARG(voltdm, NULL); + + opp_init(); + + /* + * + * Due to Smart-Reflex AVS Class1.5 which dynamically updates nominal + * voltages, it is not possible to search OPP using nominal voltages. + * Even if SR AVS Class1.5 could be disabled before and + * during the search, it is considered too constraining, + * as it would reset the voltage and force a new calibration to happen. + * Also if it was ever needed to print the current voltage, it would + * have to be done before the search, otherwise it may not always show + * the converged voltage. + * + * Another reason to skip it is that we want to be really strict, + * then OPP is a strict combination of voltage and frequency. + * which means we would have to search by voltage AND by frequency, + * and only consider it OK if both are found and are matching. + * + */ +#if 0 + dprintf("%s(%s): searching OPP by voltage first:\n", __func__, voltdm); + opp = opp_by_voltage_get(voltdm, quiet); + if (opp != NULL) { + dprintf("%s(%s): OPP search by voltage succeeded.\n", + __func__, voltdm); + goto opp_get_end; + } + /* + * Could not detect OPP using voltage, try again + * using frequencies instead. + */ + dprintf("%s(): OPP search by voltage failed, try using rate instead.\n", + __func__); +#endif + opp = opp_by_rate_get(voltdm, quiet); + +#if 0 +opp_get_end: +#endif + #ifdef OPP_DEBUG + if (opp != NULL) + printf("%s(%s): found %s OPP\n", __func__, voltdm, opp); + else + printf("%s(%s): OPP not found!\n", __func__, voltdm); + #endif + + return opp; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_show + * @BRIEF show current operating voltages and key clock rates. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_REG_ACCESS + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_INTERNAL + * @param[in,out] stream: output file stream (opened, != NULL) + * @DESCRIPTION show current operating voltages and key clock rates. + *//*------------------------------------------------------------------------ */ +int opp_show(FILE *stream) +{ + int volt, volt2; + const char *opp_s, *opp_s2; + int temp; + int rate_mpu, rate_mpu_por; + int rate_dsp, rate_iva, rate_gpu; + int rate_dsp_por, rate_iva_por, rate_gpu_por, rate_aess_por; + int rate_l3, rate_l3_por; + int rate_l4, rate_emif, rate_lpddr2, rate_aess, rate_iss, + rate_fdif, rate_dss, rate_bb2d, rate_hsi; + mod_module_mode mmode; + int rate_cal, rate_ipu, rate_c2c; + char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; + unsigned int row = 0; + unsigned int retry_cnt = 0; + unsigned int found = 0; + const genlist *voltdm_list; + int i, vdd_count; + const char voltdm[VOLTDM_MAX_NAME_LENGTH]; + char prev_gov[CPUFREQ_GOV_MAX_NAME_LENGTH], + prev_gov2[CPUFREQ_GOV_MAX_NAME_LENGTH]; + const char *temp_sensor; + + /* Switch to userspace governor temporarily, + * so that OPP cannot change during audit and does not false it. + */ + cpufreq_scaling_governor_set("userspace", prev_gov); + + autoadjust_table_init(table); + row = 0; + strncpy(table[row][1], "Temperature", TABLE_MAX_ELT_LEN); + strncpy(table[row][2], "Voltage", TABLE_MAX_ELT_LEN); + strncpy(table[row][3], "Frequency", TABLE_MAX_ELT_LEN); + strncpy(table[row][4], "OPerating Point", TABLE_MAX_ELT_LEN); + row++; + + /* + * In order to make sure all details (OPP, voltage, clock rates) are + * coherent (due to potential OPP change in between), must use a loop, + * checking that OPP and voltage did not change and that at least ONE + * clock rate is aligned to expected rate for the detected OPP. + */ + dprintf("%s():\n", __func__); + + voltdm_list = voltdm_list_get(); + if (voltdm_list == NULL) + return OMAPCONF_ERR_INTERNAL; + vdd_count = voltdm_count_get(); + if (vdd_count < 0) + return OMAPCONF_ERR_INTERNAL; + dprintf("found %d voltage domains\n", vdd_count); + for (i = 1; i < vdd_count; i++) { + genlist_get((genlist *) voltdm_list, i, (char *) &voltdm); + snprintf(table[row][0], TABLE_MAX_ELT_LEN, "%s / VDD_CORE%u", + voltdm, i); + dprintf(" %s:\n", voltdm); + + /* Retrieve OPP and clock rates */ + retry_cnt = 0; + found = 0; + do { + dprintf(" TRY #%u:\n", retry_cnt); + if (retry_cnt == 0) + /* Print warning on first try */ + opp_s = opp_get(voltdm, 0); + else + opp_s = opp_get(voltdm, 1); + if (opp_s == NULL) { + dprintf(" OPP NOT detected!\n"); + opp_s = OPP_UNKNOWN; + } else { + dprintf(" OPP detected: %s\n", opp_s); + } + + volt = voltdm_voltage_get(voltdm); + dprintf(" Voltage: %duV\n", volt); + + if (strcmp(voltdm, "VDD_MPU") == 0) { + rate_mpu = mod_clk_rate_get("MPU"); + if (strcmp(opp_s, OPP_UNKNOWN) != 0) + rate_mpu_por = mod_por_clk_rate_get( + "MPU", opp_s); + else + rate_mpu_por = -1; + dprintf( + " MPU Rate: %dKHz, POR Rate: %dKHz\n", + rate_mpu, rate_mpu_por); + } else if ((strcmp(voltdm, "VDD_IVA") == 0) || + (strcmp(voltdm, "VDD_MM") == 0)) { + rate_dsp_por = -1; + rate_iva_por = -1; + rate_aess_por = -1; + rate_gpu_por = -1; + rate_dsp = mod_clk_rate_get("DSP"); + rate_iva = mod_clk_rate_get("IVA"); + if (cpu_is_omap44xx()) + rate_aess = mod_clk_rate_get("AESS"); + else if (cpu_is_omap54xx()) + rate_gpu = mod_clk_rate_get("GPU"); + + if (strcmp(opp_s, OPP_UNKNOWN) != 0) { + rate_dsp_por = mod_por_clk_rate_get( + "DSP", opp_s); + rate_iva_por = mod_por_clk_rate_get( + "IVA", opp_s); + if (cpu_is_omap44xx()) + rate_aess_por = + mod_por_clk_rate_get( + "AESS", opp_s); + else if (cpu_is_omap54xx()) + rate_gpu_por = + mod_por_clk_rate_get( + "GPU", opp_s); + } + dprintf( + " DSP Rate: %dMHz, POR Rate: %dMHz\n", + rate_dsp, rate_dsp_por); + dprintf( + " IVA Rate: %dMHz, POR Rate: %dMHz\n", + rate_iva, rate_iva_por); + if (cpu_is_omap44xx()) { + dprintf( + " AESS Rate: %dMHz, POR Rate: %dMHz\n", + rate_aess, rate_aess_por); + } else if (cpu_is_omap54xx()) { + dprintf( + " GPU Rate: %dMHz, POR Rate: %dMHz\n", + rate_gpu, rate_gpu_por); + } + } else if (strcmp(voltdm, "VDD_CORE") == 0) { + rate_l3 = mod_clk_rate_get("L3"); + if (strcmp(opp_s, OPP_UNKNOWN) != 0) + rate_l3_por = mod_por_clk_rate_get( + "L3", opp_s); + else + rate_l3_por = -1; + dprintf( + " L3_1 Rate: %dMHz, POR Rate: %dMHz\n", + rate_l3, rate_l3_por); + + rate_emif = mod_clk_rate_get("EMIF"); + rate_lpddr2 = mod_clk_rate_get("MEM"); + rate_l4 = mod_clk_rate_get("L4"); + if (cpu_is_omap44xx()) + rate_gpu = mod_clk_rate_get("GPU"); + else if (cpu_is_omap54xx()) + rate_aess = mod_clk_rate_get("AESS"); + rate_iss = mod_clk_rate_get("ISS"); + rate_fdif = mod_clk_rate_get("FDIF"); + if (!cpu_is_omap44xx()) + rate_cal = mod_clk_rate_get("CAL"); + else + rate_cal = -1; + rate_ipu = mod_clk_rate_get("IPU"); + rate_dss = mod_clk_rate_get("DSS"); + rate_hsi = mod_clk_rate_get("HSI"); + if (cpu_is_omap4470() || cpu_is_omap54xx()) + rate_bb2d = mod_clk_rate_get("BB2D"); + else + rate_bb2d = -1; + rate_c2c = mod_clk_rate_get("C2C"); + } + + + if (strcmp(opp_s, OPP_UNKNOWN) == 0) { + dprintf( + " Could not detect OPP, aborting for this domain.\n"); + break; + } + + opp_s2 = opp_get(voltdm, 1); + if (opp_s2 == NULL) { + dprintf(" OPP NOT detected! (2)\n"); + opp_s2 = OPP_UNKNOWN; + } else { + dprintf(" OPP detected: %s (2)\n", opp_s2); + } + + volt2 = voltdm_voltage_get(voltdm); + dprintf(" Voltage (2): %dV\n", volt2); + + if (strcmp(voltdm, "VDD_MPU") == 0) { + found = ((rate_mpu == rate_mpu_por) && + (strcmp(opp_s, opp_s2) == 0) && + (volt == volt2)); + } else if (strcmp(voltdm, "VDD_IVA") == 0) { + found = ((strcmp(opp_s, opp_s2) == 0) && + (volt == volt2) && + (((unsigned int) rate_dsp == (unsigned int) rate_dsp_por) || + ((unsigned int) rate_iva == (unsigned int) rate_iva_por) || + ((unsigned int) rate_aess == (unsigned int) rate_aess_por))); + } else if (strcmp(voltdm, "VDD_MM") == 0) { + found = ((strcmp(opp_s, opp_s2) == 0) && + (volt == volt2) && + ((rate_dsp == rate_dsp_por) || + (rate_iva == rate_iva_por) || + (rate_gpu == rate_gpu_por))); + } else if (strcmp(voltdm, "VDD_CORE") == 0) { + found = ((strcmp(opp_s, opp_s2) == 0) && + (volt == volt2) && + (rate_l3 == rate_l3_por)); + } + dprintf(" found=%u\n", found); + + retry_cnt++; + } while ((retry_cnt < OPP_MAX_RETRY) && (found == 0)); + + /* Print temperature */ + temp_sensor = temp_sensor_voltdm2sensor(voltdm); + if (temp_sensor == NULL) { + snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); + } else { + temp = temp_sensor_get(temp_sensor); + if (temp != TEMP_ABSOLUTE_ZERO) + snprintf(table[row][1], TABLE_MAX_ELT_LEN, + "%dC / %dF", temp, + celcius2fahrenheit(temp)); + else + snprintf(table[row][1], TABLE_MAX_ELT_LEN, + "NA"); + } + + /* Print voltage */ + if (volt < 0) + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "NA"); + else if (!cpu_is_omap44xx()) + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%.3lf V", + uv2v(volt)); + else + snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%.6lf V", + uv2v(volt)); + + /* Print OPP */ + if (retry_cnt < OPP_MAX_RETRY) { + strncpy(table[row][4], opp_s, + TABLE_MAX_ELT_LEN); + } else { + fprintf(stderr, + "omapconf: too many %s OPP changes, could not retrieve it!!!\n", + voltdm); + strncpy(table[row][4], "ERROR", TABLE_MAX_ELT_LEN); + } + row++; + + /* Print clock rates */ + if (strcmp(voltdm, "VDD_MPU") == 0) { + if (cpu_is_online(1) == 1) + strncpy(table[row][0], " MPU (CPU1 ON)", + TABLE_MAX_ELT_LEN); + else + strncpy(table[row][0], " MPU (CPU1 OFF)", + TABLE_MAX_ELT_LEN); + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_mpu / 1000); + row += 2; + } else if ((strcmp(voltdm, "VDD_IVA") == 0) || + (strcmp(voltdm, "VDD_MM") == 0)) { + strncpy(table[row][0], " IVA", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("IVA"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_iva / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_iva / 1000); + row++; + + if (cpu_is_omap44xx()) { + strncpy(table[row][0], " AESS", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("AESS"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_aess / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_aess / 1000); + row++; + } else if (cpu_is_omap54xx()) { + strncpy(table[row][0], " GPU", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("GPU"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_gpu / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_gpu / 1000); + row++; + } + + strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("DSP"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_dsp / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_dsp / 1000); + row += 2; + } else if (strcmp(voltdm, "VDD_CORE") == 0) { + strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN); + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_l3 / 1000); + row++; + + strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN); + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_emif / 1000); + row++; + + strncpy(table[row][0], " LP-DDR2", + TABLE_MAX_ELT_LEN); + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_lpddr2 / 1000); + row++; + + strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN); + snprintf(table[row][3], TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_l4 / 1000); + row++; + + if (cpu_is_omap44xx()) { + strncpy(table[row][0], " GPU", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("GPU"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_gpu / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_gpu / 1000); + row++; + } else if (cpu_is_omap54xx()) { + strncpy(table[row][0], " AESS", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("AESS"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_aess / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_aess / 1000); + row++; + } + + strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("FDIF"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_fdif / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_fdif / 1000); + row++; + + if (cpu_is_omap54xx()) { + strncpy(table[row][0], " CAL", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("CAL"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_cal / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", + rate_cal / 1000); + row++; + } + + strncpy(table[row][0], " IPU", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("IPU"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_ipu / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_ipu / 1000); + row++; + if (cpu_is_omap44xx()) { + strncpy(table[row][0], " Cortex-M3 Cores", + TABLE_MAX_ELT_LEN); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_ipu / 2000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_ipu / 2000); + row++; + } else if (cpu_is_omap54xx()) { + strncpy(table[row][0], " Cortex-M4 Cores", + TABLE_MAX_ELT_LEN); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_ipu / 2000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_ipu / 2000); + row++; + } + + strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("ISS"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_iss / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_iss / 1000); + row++; + + strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("DSS"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_dss / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_dss / 1000); + row++; + + if (cpu_is_omap4470() || cpu_is_omap54xx()) { + strncpy(table[row][0], " BB2D", + TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("BB2D"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", + rate_bb2d / 1000); + else + snprintf(table[row][3], + TABLE_MAX_ELT_LEN, " %-4d MHz", + rate_bb2d / 1000); + row++; + } + + strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("HSI"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_hsi / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_hsi / 1000); + row++; + + strncpy(table[row][0], " C2C", TABLE_MAX_ELT_LEN); + mmode = mod_mode_get("C2C"); + if (mmode == MOD_DISABLED_MODE) + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + "(%-4d MHz) (1)", rate_c2c / 1000); + else + snprintf(table[row][3], TABLE_MAX_ELT_LEN, + " %-4d MHz", rate_c2c / 1000); + row++; + } + } + + /* Display table */ + autoadjust_table_fprint(stream, table, row, 5); + + fprintf(stream, "Notes:\n"); + fprintf(stream, + " (1) Module is disabled, rate may not be relevant.\n\n"); + + /* Restore CPUFreq governor */ + cpufreq_scaling_governor_set(prev_gov, prev_gov2); + + return 0; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp_audit + * @BRIEF OPP (Operating Point) audit. Assess for each OPP that + * both nominal voltage and frequency are aligned with + * recommendations, as specified in Data Manual. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_INTERNAL + * @param[in,out] stream: output file (opened) + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in,out] err_nbr: pointer to return audit error number + * @param[in,out] wng_nbr: pointer to return audit warning number + * @DESCRIPTION OPP (Operating Point) audit. + *//*------------------------------------------------------------------------ */ +const char *opp_audit(FILE *stream, const char *voltdm, + unsigned int *err_nbr, unsigned int *wng_nbr) +{ + /* Check voltage and rates against Data Manual Recommendations */ + + /* FIXME */ + stream = stream; + voltdm = voltdm; + err_nbr = err_nbr; + wng_nbr = wng_nbr; + + return NULL; +} diff -Nru tiomapconf-1.50.0/common/opp.h tiomapconf-1.52.0/common/opp.h --- tiomapconf-1.50.0/common/opp.h 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/opp.h 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * + * @Component OMAPCONF + * @Filename opp.h + * @Description OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef __OPP_H__ +#define __OPP_H__ + + +#include +#include + + +#define OPP_MAX_NAME_LENGTH 16 + +/* COMMON OPP */ +#define OPP_UNKNOWN ((const char *) "UNKNOWN") + +/* OMAP4, OMAP5 OPP */ +#define OPP_DPLL_CASC ((const char *) "DPLL_CASC") + +/* OMAP4 OPP */ +#define OPP_50 ((const char *) "OPP50") +#define OPP_50_LOW ((const char *) "OPP50_LOW") +#define OPP_50_HIGH ((const char *) "OPP50_HIGH") +#define OPP_100 ((const char *) "OPP100") +#define OPP_100_LOW ((const char *) "OPP100_LOW") +#define OPP_100_HIGH ((const char *) "OPP100_HIGH") +#define OPP_119 ((const char *) "OPP119") +#define OPP_119_LOW ((const char *) "OPP119_LOW") +#define OPP_119_HIGH ((const char *) "OPP119_HIGH") +#define OPP_TURBO ((const char *) "OPP_TURBO") +#define OPP_NITRO ((const char *) "OPP_NITRO") +#define OPP_NITROSB ((const char *) "OPP_NITRO_SB") +#define OPP_VHS ((const char *) "OPP_VHS") + +/* OMAP5 OPP */ +#define OPP_LOW ((const char *) "LOW") +#define OPP_NOM ((const char *) "NOM") +#define OPP_HIGH ((const char *) "HIGH") +#define OPP_SB ((const char *) "SPEEDBIN") + + +typedef struct { + const char *name; + int voltage; /* in micro-volt */ + int rate; /* in KHz */ +} opp_t; + + +void opp_init(void); +void opp_deinit(void); + +int opp_s2id(const char *opp); + +int opp_count_get(const char *voltdm); +const genlist *opp_list_get(const char *voltdm); + +const char *opp_get(const char *voltdm, unsigned int quiet); +const char *opp_by_rate_get(const char *voltdm, unsigned short quiet); +#if 0 +const char *opp_by_voltage_get(const char *voltdm, unsigned short quiet); +#endif +int opp_set(const char *voltdm, const char *opp); + +int opp_show(FILE *stream); + +const char *opp_audit(FILE *stream, const char *voltdm, + unsigned int *err_nbr, unsigned int *wng_nbr); + + +#endif diff -Nru tiomapconf-1.50.0/common/temp.h tiomapconf-1.52.0/common/temp.h --- tiomapconf-1.50.0/common/temp.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/temp.h 1970-01-01 00:00:00.000000000 +0000 @@ -1,59 +0,0 @@ -/* - * - * @Component OMAPCONF - * @Filename temp.h - * @Description OMAP Temperature Definitions - * @Author Patrick Titiano (p-titiano@ti.com) - * @Date 2010 - * @Copyright Texas Instruments Incorporated - * - * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the - * distribution. - * - * Neither the name of Texas Instruments Incorporated nor the names of - * its contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - - -#ifndef __TEMP_H__ -#define __TEMP_H__ - - -#define TEMP_ABSOLUTE_ZERO -273 - - -typedef enum { - TEMP_CELCIUS_DEGREES, - TEMP_FAHRENHEIT_DEGREES, - TEMP_UNIT_MAX -} temperature_unit; - - -#endif diff -Nru tiomapconf-1.50.0/common/temperature.c tiomapconf-1.52.0/common/temperature.c --- tiomapconf-1.50.0/common/temperature.c 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/temperature.c 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,497 @@ +/* + * + * @Component OMAPCONF + * @Filename temperature.c + * @Description Generic Temperature Sensors Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* #define TEMPERATURE_DEBUG */ +#ifdef TEMPERATURE_DEBUG +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) +#else +#define dprintf(format, ...) +#endif + + +genlist temp_sensor_list; +static unsigned short temp_sensor_init_done = 0; + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void temp_sensor_init(void) +{ + if (!temp_sensor_init_done) { + genlist_init(&temp_sensor_list); + if (cpu_is_omap44xx()) { + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_BANDGAP, + (1 + strlen(TEMP_SENSOR_BANDGAP)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_HOTSPOT_MPU, + (1 + strlen(TEMP_SENSOR_HOTSPOT_MPU)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_MEM1, + (1 + strlen(TEMP_SENSOR_MEM1)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_MEM2, + (1 + strlen(TEMP_SENSOR_MEM2)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_PCB, + (1 + strlen(TEMP_SENSOR_PCB)) * sizeof(char)); + } else if (cpu_is_omap54xx()) { + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_MPU, + (1 + strlen(TEMP_SENSOR_MPU)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_HOTSPOT_MPU, + (1 + strlen(TEMP_SENSOR_HOTSPOT_MPU)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_GPU, + (1 + strlen(TEMP_SENSOR_GPU)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_HOTSPOT_GPU, + (1 + strlen(TEMP_SENSOR_HOTSPOT_GPU)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_CORE, + (1 + strlen(TEMP_SENSOR_CORE)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_MEM1, + (1 + strlen(TEMP_SENSOR_MEM1)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_MEM2, + (1 + strlen(TEMP_SENSOR_MEM2)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_PCB, + (1 + strlen(TEMP_SENSOR_PCB)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_CASE, + (1 + strlen(TEMP_SENSOR_CASE)) * sizeof(char)); + genlist_addtail(&temp_sensor_list, + (void *) TEMP_SENSOR_CHARGER, + (1 + strlen(TEMP_SENSOR_CHARGER)) * sizeof(char)); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", + __func__); + } + + temp_sensor_init_done = 1; + dprintf("%s(): init done.\n", __func__); + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_deinit + * @BRIEF free dynamically allocated internal data. + * @DESCRIPTION free dynamically allocated internal data. + * MUST BE CALLED AT END OF EXECUTION. + *//*------------------------------------------------------------------------ */ +void temp_sensor_deinit(void) +{ + if (temp_sensor_init_done) + genlist_free(&temp_sensor_list); + dprintf("%s(): deinit done.\n", __func__); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_voltdm2sensor + * @BRIEF convert generic voltage domain name + * into generic temperature sensor name. + * @RETURNS temperature sensor name + * NULL if not available or in case of error + * @param[in] voltdm: voltage domain name + * @DESCRIPTION convert generic voltage domain name + * into generic temperature sensor name. + * To be used to generically retrieve the temperature + * sensor of a given voltage domain. + *//*------------------------------------------------------------------------ */ +const char *temp_sensor_voltdm2sensor(const char *voltdm) +{ + int vdd_id; + const char *sensor; + + CHECK_NULL_ARG(voltdm, NULL); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) { + sensor = NULL; + } else if (cpu_is_omap44xx()) { + switch (vdd_id) { + case OMAP4_VDD_MPU: + sensor = TEMP_SENSOR_HOTSPOT_MPU; + break; + case OMAP4_VDD_CORE: + sensor = TEMP_SENSOR_BANDGAP; + break; + default: + sensor = NULL; + + } + } else if (cpu_is_omap54xx()) { + switch (vdd_id) { + case VDD54XX_MPU: + sensor = TEMP_SENSOR_MPU; + break; + case VDD54XX_MM: + sensor = TEMP_SENSOR_GPU; + break; + case VDD54XX_CORE: + sensor = TEMP_SENSOR_CORE; + break; + default: + sensor = NULL; + + } + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + sensor = NULL; + } + + dprintf("%s(%s) = %s\n", __func__, voltdm, sensor); + return sensor; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_count_get + * @BRIEF return the number of temperature sensor(s) + * @RETURNS > 0 number of temperature sensor(s) + * OMAPCONF_ERR_CPU + * @DESCRIPTION return the number of temperature sensor(s) + *//*------------------------------------------------------------------------ */ +int temp_sensor_count_get(void) +{ + int count; + + temp_sensor_init(); + + if (cpu_is_omap44xx()) { + count = genlist_getcount(&temp_sensor_list); + } else if (cpu_is_omap54xx()) { + count = genlist_getcount(&temp_sensor_list); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + count = OMAPCONF_ERR_CPU; + } + + dprintf("%s() = %d\n", __func__, count); + return count; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_list_get + * @BRIEF return the list of temperature sensor(s) + * @RETURNS list of temperature sensor(s) + * NULL in case of architecture is not supported + * @DESCRIPTION return the list of temperature sensor(s) + *//*------------------------------------------------------------------------ */ +const genlist *temp_sensor_list_get(void) +{ + temp_sensor_init(); + + if (cpu_is_omap44xx()) { + return (const genlist *) &temp_sensor_list; + } else if (cpu_is_omap54xx()) { + return (const genlist *) &temp_sensor_list; + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return NULL; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_s2id + * @BRIEF convert generic temperature sensor name (string) + * into platform-specific ID (integer). + * @RETURNS >= 0 platform-specific ID + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] sensor: generic temperature sensor name + * @DESCRIPTION convert generic temperature sensor name (string) + * into platform-specific ID (integer). + * To be used when calling architecture-specific functions. + *//*------------------------------------------------------------------------ */ +int temp_sensor_s2id(const char *sensor) +{ + int id; + + CHECK_NULL_ARG(sensor, OMAPCONF_ERR_ARG); + + if (cpu_is_omap44xx()) { + if (strcasecmp(sensor, TEMP_SENSOR_BANDGAP) == 0) + id = (int) TEMP44XX_BANDGAP; + else if (strcasecmp(sensor, TEMP_SENSOR_HOTSPOT_MPU) == 0) + id = (int) TEMP44XX_HOTSPOT; + else if (strcasecmp(sensor, TEMP_SENSOR_MEM1) == 0) + id = (int) TEMP44XX_DDR1_CS1; + else if (strcasecmp(sensor, TEMP_SENSOR_MEM2) == 0) + id = (int) TEMP44XX_DDR2_CS1; + else if (strcasecmp(sensor, TEMP_SENSOR_PCB) == 0) + id = (int) TEMP44XX_PCB; + else + id = OMAPCONF_ERR_ARG; + } else if (cpu_is_omap54xx()) { + if (strcasecmp(sensor, TEMP_SENSOR_MPU) == 0) + id = (int) TEMP54XX_MPU; + else if (strcasecmp(sensor, TEMP_SENSOR_HOTSPOT_MPU) == 0) + id = (int) TEMP54XX_HOTSPOT_MPU; + else if (strcasecmp(sensor, TEMP_SENSOR_GPU) == 0) + id = (int) TEMP54XX_GPU; + else if (strcasecmp(sensor, TEMP_SENSOR_HOTSPOT_GPU) == 0) + id = (int) TEMP54XX_HOTSPOT_GPU; + else if (strcasecmp(sensor, TEMP_SENSOR_MEM1) == 0) + id = (int) TEMP54XX_EMIF1; + else if (strcasecmp(sensor, TEMP_SENSOR_MEM2) == 0) + id = (int) TEMP54XX_EMIF2; + else if (strcasecmp(sensor, TEMP_SENSOR_CORE) == 0) + id = (int) TEMP54XX_CORE; + else if (strcasecmp(sensor, TEMP_SENSOR_PCB) == 0) + id = (int) TEMP54XX_PCB; + else if (strcasecmp(sensor, TEMP_SENSOR_CASE) == 0) + id = (int) TEMP54XX_CASE; + else if (strcasecmp(sensor, TEMP_SENSOR_CHARGER) == 0) + id = (int) TEMP54XX_CHARGER; + else + id = OMAPCONF_ERR_ARG; + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + id = OMAPCONF_ERR_CPU; + } + + dprintf("%s(%s) = %d\n", __func__, sensor, id); + return id; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_is_available + * @BRIEF check if temperature sensor is available. + * @RETURNS 1 if temperature sensor is available + * 0 if temperature sensor is NOT available + * @param[in] sensor: generic temperature sensor name + * @DESCRIPTION check if temperature sensor is available + * (platform-dependent). + *//*------------------------------------------------------------------------ */ +int temp_sensor_is_available(const char *sensor) +{ + int id; + + CHECK_NULL_ARG(sensor, 0); + + id = temp_sensor_s2id(sensor); + if (id >= 0) { + dprintf("%s(): %s is available.\n", __func__, sensor); + return 1; + } else { + dprintf("%s(): %s is NOT available.\n", __func__, sensor); + return 0; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_get + * @BRIEF return temperature measured by temperature sensor. + * @RETURNS temperature measured by temperature sensor (Celcius) + * TEMP_ABSOLUTE_ZERO in case of error + * @param[in] sensor: generic temperature sensor name + * @DESCRIPTION return temperature measured by temperature sensor + * in Celcius degrees. + *//*------------------------------------------------------------------------ */ +int temp_sensor_get(const char *sensor) +{ + int id, temp; + + CHECK_NULL_ARG(sensor, TEMP_ABSOLUTE_ZERO); + + id = temp_sensor_s2id(sensor); + if (id < 0) + temp = TEMP_ABSOLUTE_ZERO; + else if (cpu_is_omap44xx()) { + temp = temp44xx_get(id); + } else if (cpu_is_omap54xx()) { + temp = temp54xx_get(id); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + temp = TEMP_ABSOLUTE_ZERO; + } + + dprintf("%s(%s) = %d\n", __func__, sensor, temp); + return temp; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION temp_sensor_show + * @BRIEF display all available temperatures formatted in a table. + * @RETURNS temperatures formatted in a table + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_INTERNAL + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in,out] stream: output file + * @param[in,out] sensor: generic temperature sensor name + * Use "all" to show all temperatures + * @DESCRIPTION display all available temperatures formatted in a table. + * Display both Celcius and Fahrenheit degrees. + *//*------------------------------------------------------------------------ */ +int temp_sensor_show(FILE *stream, const char *sensor) +{ + char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; + unsigned int row = 0; + int i, count, temp, temp_f; + char temp_s[EMIF_TEMP_MAX_NAME_LENGTH]; + const char sensor2[TEMP_SENSOR_MAX_NAME_LENGTH]; + const genlist *list; + + CHECK_NULL_ARG(stream, OMAPCONF_ERR_ARG); + CHECK_NULL_ARG(sensor, OMAPCONF_ERR_ARG); + + if (strcasecmp(sensor, "all") != 0) { + if (!temp_sensor_is_available(sensor)) { + fprintf(stderr, + "omapconf: '%s' temperature sensor is not available!\n", + sensor); + return OMAPCONF_ERR_NOT_AVAILABLE; + } + temp = temp_sensor_get(sensor); + if (temp == TEMP_ABSOLUTE_ZERO) { + fprintf(stderr, + "omapconf: could not retrieve '%s' temperature!\n", + sensor); + return OMAPCONF_ERR_INTERNAL; + } else if ((strcasecmp(sensor, TEMP_SENSOR_MEM1) == 0) || + (strcasecmp(sensor, TEMP_SENSOR_MEM2) == 0)) { + fprintf(stream, "%s\n", + emif_mr4_convert((emif_mr4_code) temp, + TEMP_CELCIUS_DEGREES)); + return 0; + } else { + fprintf(stream, "%d\n", temp); + return 0; + } + } + + /* Retrieve temperature sensor list */ + list = temp_sensor_list_get(); + if (list == NULL) { + fprintf(stderr, "omapconf: CPU not yet supported, sorry...\n"); + return OMAPCONF_ERR_INTERNAL; + } + + /* Retrieve temperature sensor list count */ + count = temp_sensor_count_get(); + if (count <= 0) { + fprintf(stderr, "omapconf: could not retrieve sensor count!\n"); + return OMAPCONF_ERR_INTERNAL; + } + dprintf("found %d temperature sensors\n", count); + + /* Fill table header */ + row = 0; + autoadjust_table_init(table); + autoadjust_table_strncpy(table, row, 0, "Sensor"); + autoadjust_table_strncpy(table, row, 1, "Temperature (C)"); + autoadjust_table_strncpy(table, row++, 2, "Temperature (F)"); + + /* Fill table with temperatures */ + for (i = 0; i < count; i++) { + genlist_get((genlist *) list, i, (char *) &sensor2); + if (sensor2 == NULL) { + fprintf(stderr, + "omapconf: could not retrieve sensor!\n"); + return OMAPCONF_ERR_INTERNAL; + } + autoadjust_table_strncpy(table, row, 0, (char *) sensor2); + dprintf("%s(): sensor is %s\n", __func__, sensor2); + temp = temp_sensor_get(sensor2); + if (temp != TEMP_ABSOLUTE_ZERO) { + if ((strcasecmp(sensor2, TEMP_SENSOR_MEM1) == 0) || + (strcasecmp(sensor2, TEMP_SENSOR_MEM2) == 0)) { + sprintf(temp_s, "%s", + emif_mr4_convert((emif_mr4_code) temp, + TEMP_CELCIUS_DEGREES)); + autoadjust_table_strncpy(table, row, 1, temp_s); + sprintf(temp_s, "%s", + emif_mr4_convert((emif_mr4_code) temp, + TEMP_FAHRENHEIT_DEGREES)); + autoadjust_table_strncpy(table, row++, 2, + temp_s); + } else { + sprintf(temp_s, "%d", temp); + autoadjust_table_strncpy(table, row, 1, temp_s); + temp_f = celcius2fahrenheit(temp); + sprintf(temp_s, "%d", temp_f); + autoadjust_table_strncpy(table, row++, 2, + temp_s); + } + } else { + autoadjust_table_strncpy(table, row, 1, "NA"); + autoadjust_table_strncpy(table, row++, 2, "NA"); + } + } + + /* Display table */ + return autoadjust_table_fprint(stream, table, row, 3); +} diff -Nru tiomapconf-1.50.0/common/temperature.h tiomapconf-1.52.0/common/temperature.h --- tiomapconf-1.50.0/common/temperature.h 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/temperature.h 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,91 @@ +/* + * + * @Component OMAPCONF + * @Filename temperature.h + * @Description Generic Temperature Sensors Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef __TEMPERATURE_H__ +#define __TEMPERATURE_H__ + + +#include +#include + + +typedef enum { + TEMP_CELCIUS_DEGREES, + TEMP_FAHRENHEIT_DEGREES, + TEMP_UNIT_MAX +} temperature_unit; + + +#define TEMP_ABSOLUTE_ZERO -273 + +#define TEMP_SENSOR_MAX_NAME_LENGTH 16 + +#define TEMP_SENSOR_BANDGAP ((const char *) "Bandgap") /* OMAP4 */ +#define TEMP_SENSOR_MPU ((const char *) "MPU") /* OMAP5 */ +#define TEMP_SENSOR_HOTSPOT_MPU ((const char *) "MPU_Hotspot") /* Common */ +#define TEMP_SENSOR_GPU ((const char *) "GPU") /* OMAP5 */ +#define TEMP_SENSOR_HOTSPOT_GPU ((const char *) "GPU_Hotspot") /* OMAP5 */ +#define TEMP_SENSOR_MEM1 ((const char *) "MEM1") /* Common */ +#define TEMP_SENSOR_MEM2 ((const char *) "MEM2") /* Common */ +#define TEMP_SENSOR_CORE ((const char *) "CORE") /* OMAP5 */ +#define TEMP_SENSOR_PCB ((const char *) "PCB") /* Common */ +#define TEMP_SENSOR_CASE ((const char *) "CASE") /* OMAP5 */ +#define TEMP_SENSOR_CHARGER ((const char *) "CHARGER") /* OMAP5 */ + + +void temp_sensor_init(void); +void temp_sensor_deinit(void); + +int temp_sensor_count_get(void); +const genlist *temp_sensor_list_get(void); + +const char *temp_sensor_voltdm2sensor(const char *voltdm); +int temp_sensor_s2id(const char *sensor); + +int temp_sensor_is_available(const char *sensor); +int temp_sensor_get(const char *sensor); +int temp_sensor_show(FILE *stream, const char *sensor); + + +#endif diff -Nru tiomapconf-1.50.0/common/trace.c tiomapconf-1.52.0/common/trace.c --- tiomapconf-1.50.0/common/trace.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/trace.c 2012-11-14 16:36:23.000000000 +0000 @@ -50,7 +50,7 @@ #include #include #include -#include +#include #include #include #include @@ -1208,9 +1208,9 @@ int *pcb_temp = NULL; int pcb_temp_min, pcb_temp_max; double pcb_temp_avg; - int *hotspot_temp = NULL; - int hotspot_temp_min, hotspot_temp_max; - double hotspot_temp_avg; + int *hotspot_mpu_temp = NULL; + int hotspot_mpu_temp_min, hotspot_mpu_temp_max; + double hotspot_mpu_temp_avg; /* Variables for OMAP5 temperature items */ int *temps[TEMP54XX_ID_MAX]; @@ -1349,9 +1349,9 @@ pcb_temp_min = 200; /* PCB Temp Min */ pcb_temp_max = TEMP_ABSOLUTE_ZERO; /* PCB Temp Max */ pcb_temp_avg = 0.0; /* PCB Temp Avg */ - hotspot_temp_min = 200; - hotspot_temp_max = TEMP_ABSOLUTE_ZERO; - hotspot_temp_avg = 0.0; + hotspot_mpu_temp_min = 200; + hotspot_mpu_temp_max = TEMP_ABSOLUTE_ZERO; + hotspot_mpu_temp_avg = 0.0; for (i = 0; i < (int) TEMP54XX_ID_MAX; i++) { temps_min[i] = 200; temps_max[i] = TEMP_ABSOLUTE_ZERO ; @@ -1531,29 +1531,29 @@ } } - if (p_flags[HOTSPOT_TEMP]) { - if (cpu_is_omap44xx() && - (temp44xx_hotspot_temp_get() != TEMP_ABSOLUTE_ZERO)) { - hotspot_temp = malloc(sample_cnt * sizeof(int)); - if (hotspot_temp == NULL) { + if (p_flags[HOTSPOT_MPU_TEMP]) { + if ((cpu_is_omap44xx() || cpu_is_omap54xx()) && + (temp_sensor_get(TEMP_SENSOR_HOTSPOT_MPU) != TEMP_ABSOLUTE_ZERO)) { + hotspot_mpu_temp = malloc(sample_cnt * sizeof(int)); + if (hotspot_mpu_temp == NULL) { fprintf(stderr, - "omapconf: could not allocate buffer for hotspot_temp!\n"); + "omapconf: could not allocate buffer for hotspot_mpu_temp!\n"); ret = OMAPCONF_ERR_NOT_AVAILABLE; goto trace_perf_capture_err; } } else { fprintf(stderr, "omapconf: warning: HOTSPOT temperature sensor not available, skipping it.\n"); - p_flags[HOTSPOT_TEMP] = 0; + p_flags[HOTSPOT_MPU_TEMP] = 0; } } if (p_flags[MPU_TEMP]) { if (cpu_is_omap54xx()) { - temps[TEMP54XX_CPU] = malloc(sample_cnt * sizeof(int)); - if (temps[TEMP54XX_CPU] == NULL) { + temps[TEMP54XX_MPU] = malloc(sample_cnt * sizeof(int)); + if (temps[TEMP54XX_MPU] == NULL) { fprintf(stderr, - "omapconf: could not allocate buffer for temps[TEMP54XX_CPU]!\n"); + "omapconf: could not allocate buffer for temps[TEMP54XX_MPU]!\n"); ret = OMAPCONF_ERR_NOT_AVAILABLE; goto trace_perf_capture_err; } @@ -1728,38 +1728,35 @@ __func__, gpu_freq[sample]); } + /* Get bandgap sensor temperature */ if (p_flags[BANDGAP_TEMP]) { - /* Get bandgap sensor temperature */ - ret = temp44xx_read_bandgap_sensor( - &(bandgap_temp[sample])); + bandgap_temp[sample] = + temp_sensor_get(TEMP_SENSOR_BANDGAP); dprintf("%s(): bandgap_temp = %dC\n", __func__, bandgap_temp[sample]); } + /* Get PCB sensor temperature */ if (p_flags[PCB_TEMP]) { - /* Get PCB sensor temperature */ - if (cpu_is_omap44xx()) - ret = temp44xx_read_pcb_sensor( - &(pcb_temp[sample])); - else - pcb_temp[sample] = temp54xx_get(TEMP54XX_PCB); + pcb_temp[sample] = temp_sensor_get(TEMP_SENSOR_PCB); dprintf("%s(): pcb_temp = %dC\n", __func__, pcb_temp[sample]); } /* Get HOTSPOT temperature */ - if (p_flags[HOTSPOT_TEMP]) { - hotspot_temp[sample] = temp44xx_hotspot_temp_get(); - dprintf("%s(): hotspot_temp = %dC\n", __func__, - hotspot_temp[sample]); + if (p_flags[HOTSPOT_MPU_TEMP]) { + hotspot_mpu_temp[sample] = + temp_sensor_get(TEMP_SENSOR_HOTSPOT_MPU); + dprintf("%s(): hotspot_mpu_temp = %dC\n", __func__, + hotspot_mpu_temp[sample]); } /* Get CPU sensor temperature */ if (p_flags[MPU_TEMP]) { - temps[TEMP54XX_CPU][sample] = - temp54xx_get(TEMP54XX_CPU); + temps[TEMP54XX_MPU][sample] = + temp54xx_get(TEMP54XX_MPU); dprintf("%s(): cpu_temp = %dC\n", __func__, - temps[TEMP54XX_CPU][sample]); + temps[TEMP54XX_MPU][sample]); } /* Get GPU sensor temperature */ @@ -2049,14 +2046,14 @@ } /* Compute and save HOTSPOT temperature */ - if (p_flags[HOTSPOT_TEMP]) { - if (hotspot_temp[sample] > hotspot_temp_max) - hotspot_temp_max = hotspot_temp[sample]; - if (hotspot_temp[sample] < hotspot_temp_min) - hotspot_temp_min = hotspot_temp[sample]; - hotspot_temp_avg = avg_recalc(hotspot_temp_avg, - hotspot_temp[sample], sample - 1); - sprintf(s, "%d", hotspot_temp[sample]); + if (p_flags[HOTSPOT_MPU_TEMP]) { + if (hotspot_mpu_temp[sample] > hotspot_mpu_temp_max) + hotspot_mpu_temp_max = hotspot_mpu_temp[sample]; + if (hotspot_mpu_temp[sample] < hotspot_mpu_temp_min) + hotspot_mpu_temp_min = hotspot_mpu_temp[sample]; + hotspot_mpu_temp_avg = avg_recalc(hotspot_mpu_temp_avg, + hotspot_mpu_temp[sample], sample - 1); + sprintf(s, "%d", hotspot_mpu_temp[sample]); fprintf(fp, ", %s", s); } else { fputs(", NA", fp); @@ -2064,18 +2061,18 @@ /* Compute and save CPU sensor temperature */ if (p_flags[MPU_TEMP]) { - if (temps[TEMP54XX_CPU][sample] > - temps_max[TEMP54XX_CPU]) - temps_max[TEMP54XX_CPU] = - temps[TEMP54XX_CPU][sample]; - if (temps[TEMP54XX_CPU][sample] < - temps_min[TEMP54XX_CPU]) - temps_min[TEMP54XX_CPU] = - temps[TEMP54XX_CPU][sample]; - temps_avg[TEMP54XX_CPU] = avg_recalc( - temps_avg[TEMP54XX_CPU], - temps[TEMP54XX_CPU][sample], sample - 1); - fprintf(fp, ", %d", temps[TEMP54XX_CPU][sample]); + if (temps[TEMP54XX_MPU][sample] > + temps_max[TEMP54XX_MPU]) + temps_max[TEMP54XX_MPU] = + temps[TEMP54XX_MPU][sample]; + if (temps[TEMP54XX_MPU][sample] < + temps_min[TEMP54XX_MPU]) + temps_min[TEMP54XX_MPU] = + temps[TEMP54XX_MPU][sample]; + temps_avg[TEMP54XX_MPU] = avg_recalc( + temps_avg[TEMP54XX_MPU], + temps[TEMP54XX_MPU][sample], sample - 1); + fprintf(fp, ", %d", temps[TEMP54XX_MPU][sample]); } else { fputs(", NA", fp); } @@ -2244,13 +2241,13 @@ } if (p_flags[MPU_TEMP]) { strncpy(table[row][0], "CPU Temperature", TABLE_MAX_ELT_LEN); - if (temps_avg[TEMP54XX_CPU] != TEMP_ABSOLUTE_ZERO) { + if (temps_avg[TEMP54XX_MPU] != TEMP_ABSOLUTE_ZERO) { snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%dC", - temps_min[TEMP54XX_CPU]); + temps_min[TEMP54XX_MPU]); snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%dC", - temps_max[TEMP54XX_CPU]); + temps_max[TEMP54XX_MPU]); snprintf(table[row][3], TABLE_MAX_ELT_LEN, "%.2lfC", - temps_avg[TEMP54XX_CPU]); + temps_avg[TEMP54XX_MPU]); } else { snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); snprintf(table[row][2], TABLE_MAX_ELT_LEN, "NA"); @@ -2390,16 +2387,16 @@ } row++; } - if (p_flags[HOTSPOT_TEMP]) { - strncpy(table[row][0], "HOTSPOT Temperature", + if (p_flags[HOTSPOT_MPU_TEMP]) { + strncpy(table[row][0], "MPU HOTSPOT Temperature", TABLE_MAX_ELT_LEN); - if (hotspot_temp_avg != TEMP_ABSOLUTE_ZERO) { + if (hotspot_mpu_temp_avg != TEMP_ABSOLUTE_ZERO) { snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%dC", - hotspot_temp_min); + hotspot_mpu_temp_min); snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%dC", - hotspot_temp_max); + hotspot_mpu_temp_max); snprintf(table[row][3], TABLE_MAX_ELT_LEN, "%.2lfC", - hotspot_temp_avg); + hotspot_mpu_temp_avg); } else { snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); snprintf(table[row][2], TABLE_MAX_ELT_LEN, "NA"); @@ -2479,7 +2476,7 @@ chart_count++; if (p_flags[CPU_FREQ] || p_flags[GPU_FREQ] || p_flags[L3_FREQ]) chart_count++; - if (p_flags[BANDGAP_TEMP] || p_flags[PCB_TEMP] || p_flags[HOTSPOT_TEMP]) + if (p_flags[BANDGAP_TEMP] || p_flags[PCB_TEMP] || p_flags[HOTSPOT_MPU_TEMP]) chart_count++; for (i = 0; i < geninput_num; i++) { if (geninput_flags[i]) { @@ -2649,7 +2646,7 @@ if (p_flags[BANDGAP_TEMP] || p_flags[PCB_TEMP] || p_flags[MPU_TEMP] || p_flags[GPU_TEMP] || p_flags[CORE_TEMP] || p_flags[CASE_TEMP] || - p_flags[HOTSPOT_TEMP]) { + p_flags[HOTSPOT_MPU_TEMP]) { /* Plot temperatures over time */ fprintf(fp, "set size 1.0,%.2lf\n", height); fprintf(fp, "set origin 0,%.2lf\n", @@ -2662,7 +2659,7 @@ p_flags[GPU_TEMP] || p_flags[CORE_TEMP] || p_flags[CASE_TEMP] || - p_flags[HOTSPOT_TEMP]) + p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, "plot '%s' using 1:%d ls 7 title 'Bandgap' with lines,\\\n", trace_perf_file, @@ -2682,7 +2679,7 @@ if (p_flags[MPU_TEMP] || p_flags[GPU_TEMP] || p_flags[CORE_TEMP] || p_flags[CASE_TEMP] || - p_flags[HOTSPOT_TEMP]) + p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, " '%s' using 1:%d ls 3 title 'PCB' with lines,\\\n", trace_perf_file, PCB_TEMP + 1); @@ -2699,7 +2696,7 @@ fprintf(fp, "plot "); if (p_flags[GPU_TEMP] || p_flags[CORE_TEMP] || p_flags[CASE_TEMP] || - p_flags[HOTSPOT_TEMP]) + p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, " '%s' using 1:%d ls 1 title 'MPU' with lines,\\\n", trace_perf_file, MPU_TEMP + 1); @@ -2717,7 +2714,7 @@ else fprintf(fp, "plot "); if (p_flags[CORE_TEMP] || p_flags[CASE_TEMP] || - p_flags[HOTSPOT_TEMP]) + p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, " '%s' using 1:%d ls 2 title 'GPU' with lines,\\\n", trace_perf_file, GPU_TEMP + 1); @@ -2735,7 +2732,7 @@ fprintf(fp, " "); else fprintf(fp, "plot "); - if (p_flags[CASE_TEMP] || p_flags[HOTSPOT_TEMP]) + if (p_flags[CASE_TEMP] || p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, " '%s' using 1:%d ls 7 title 'CORE' with lines,\\\n", trace_perf_file, CORE_TEMP + 1); @@ -2754,7 +2751,7 @@ fprintf(fp, " "); else fprintf(fp, "plot "); - if (p_flags[HOTSPOT_TEMP]) + if (p_flags[HOTSPOT_MPU_TEMP]) fprintf(fp, " '%s' using 1:%d ls 5 title 'CASE' with lines,\\\n", trace_perf_file, CASE_TEMP + 1); @@ -2764,7 +2761,7 @@ trace_perf_file, CASE_TEMP + 1); } - if (p_flags[HOTSPOT_TEMP]) { + if (p_flags[HOTSPOT_MPU_TEMP]) { if (p_flags[BANDGAP_TEMP] || p_flags[PCB_TEMP] || p_flags[MPU_TEMP] || @@ -2775,8 +2772,8 @@ else fprintf(fp, "plot "); fprintf(fp, - " '%s' using 1:%d ls 1 title 'HotSpot' with lines;\n", - trace_perf_file, HOTSPOT_TEMP + 1); + " '%s' using 1:%d ls 1 title 'MPU HotSpot' with lines;\n", + trace_perf_file, HOTSPOT_MPU_TEMP + 1); } fprintf(fp, "\n"); chart_count++; @@ -2888,8 +2885,8 @@ free(bandgap_temp); if (pcb_temp != NULL) free(pcb_temp); - if (hotspot_temp != NULL) - free(hotspot_temp); + if (hotspot_mpu_temp != NULL) + free(hotspot_mpu_temp); for (i = 0; i < (int) TEMP54XX_ID_MAX; i++) { if (temps[i] != NULL) free(temps[i]); diff -Nru tiomapconf-1.50.0/common/trace.h tiomapconf-1.52.0/common/trace.h --- tiomapconf-1.50.0/common/trace.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/common/trace.h 2012-11-14 16:36:23.000000000 +0000 @@ -68,7 +68,7 @@ EMIF_LOAD, BANDGAP_TEMP, PCB_TEMP, - HOTSPOT_TEMP, + HOTSPOT_MPU_TEMP, /* OMAP5 Specific */ MPU_TEMP, GPU_TEMP, diff -Nru tiomapconf-1.50.0/common/voltdm.c tiomapconf-1.52.0/common/voltdm.c --- tiomapconf-1.50.0/common/voltdm.c 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/voltdm.c 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,382 @@ +/* + * + * @Component OMAPCONF + * @Filename voltdm.c + * @Description Generic Voltage Domain Definitions & APIs + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include +#include +#include +#include +#include +#include +#include + + +/* #define VOLTDM_DEBUG */ +#ifdef VOLTDM_DEBUG +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) +#else +#define dprintf(format, ...) +#endif + + +genlist voltdm_list; +static unsigned short voltdm_init_done = 0; + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void voltdm_init(void) +{ + if (!voltdm_init_done) { + if (cpu_is_omap44xx()) { + genlist_init(&voltdm_list); + genlist_addtail(&voltdm_list, + (void *) VDD_WKUP, + (1 + strlen(VDD_WKUP)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_MPU, + (1 + strlen(VDD_MPU)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_IVA, + (1 + strlen(VDD_IVA)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_CORE, + (1 + strlen(VDD_CORE)) * sizeof(char)); + } else if (cpu_is_omap54xx()) { + genlist_init(&voltdm_list); + genlist_addtail(&voltdm_list, + (void *) VDD_WKUP, + (1 + strlen(VDD_WKUP)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_MPU, + (1 + strlen(VDD_MPU)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_MM, + (1 + strlen(VDD_MM)) * sizeof(char)); + genlist_addtail(&voltdm_list, + (void *) VDD_CORE, + (1 + strlen(VDD_CORE)) * sizeof(char)); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", + __func__); + } + + voltdm_init_done = 1; + dprintf("%s(): init done.\n", __func__); + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_deinit + * @BRIEF free dynamically allocated internal data. + * @DESCRIPTION free dynamically allocated internal data. + * MUST BE CALLED AT END OF EXECUTION. + *//*------------------------------------------------------------------------ */ +void voltdm_deinit(void) +{ + if (voltdm_init_done) { + genlist_free(&voltdm_list); + genlist_free(&voltdm_list); + genlist_free(&voltdm_list); + genlist_free(&voltdm_list); + } + dprintf("%s(): deinit done.\n", __func__); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_list_get + * @BRIEF return the list of voltage domain(s) + * @RETURNS list of voltage domain(s) in case of success + * NULL if not available + * @DESCRIPTION return the number of voltage domain(s) + *//*------------------------------------------------------------------------ */ +const genlist *voltdm_list_get(void) +{ + voltdm_init(); + + if (cpu_is_omap44xx() || cpu_is_omap54xx()) { + return (const genlist *) &voltdm_list; + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return NULL; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_s2id + * @BRIEF convert voltage domain provided as a string + * (as defined in voltdm.h) into a plaftorm-specific + * voltage domain ID (integer). + * @RETURNS plaftorm-specific voltage domain ID (> 0) if success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @DESCRIPTION convert voltage domain provided as a string + * (as defined in voltdm.h) into a plaftorm-specific + * voltage domain ID (integer). + *//*------------------------------------------------------------------------ */ +int voltdm_s2id(const char *voltdm) +{ + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + if (cpu_is_omap44xx()) { + if (strcmp(voltdm, VDD_WKUP) == 0) + return (int) OMAP4_LDO_WKUP; + else if (strcmp(voltdm, VDD_MPU) == 0) + return (int) OMAP4_VDD_MPU; + else if (strcmp(voltdm, VDD_IVA) == 0) + return (int) OMAP4_VDD_IVA; + else if (strcmp(voltdm, VDD_CORE) == 0) + return (int) OMAP4_VDD_CORE; + else + return OMAPCONF_ERR_ARG; + } else if (cpu_is_omap54xx()) { + if (strcmp(voltdm, VDD_WKUP) == 0) + return (int) VDD54XX_WKUP; + else if (strcmp(voltdm, VDD_MPU) == 0) + return (int) VDD54XX_MPU; + else if (strcmp(voltdm, VDD_MM) == 0) + return (int) VDD54XX_MM; + else if (strcmp(voltdm, VDD_CORE) == 0) + return (int) VDD54XX_CORE; + else + return OMAPCONF_ERR_ARG; + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_count_get + * @BRIEF return the number of voltage domain(s) + * @RETURNS number of voltage domain(s) (> 0) in case of success + * OMAPCONF_ERR_CPU + * @DESCRIPTION return the number of voltage domain(s) + *//*------------------------------------------------------------------------ */ +int voltdm_count_get(void) +{ + if (cpu_is_omap44xx()) { + return (int) OMAP4_VD_ID_MAX; + } else if (cpu_is_omap54xx()) { + return (int) VDD54XX_ID_MAX; + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_voltage_get + * @BRIEF return the current voltage supplied to a voltage domain. + * @RETURNS supplied voltage in micro-volt (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_REG_ACCESS + * OMAPCONF_ERR_NOT_AVAILABLE + * OMAPCONF_ERR_INTERNAL + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @DESCRIPTION return the current voltage supplied to a voltage domain. + *//*------------------------------------------------------------------------ */ +int voltdm_voltage_get(const char *voltdm) +{ + int id, ret; + double volt; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + voltdm_init(); + + id = voltdm_s2id(voltdm); + if (id < 0) + return (double) OMAPCONF_ERR_ARG; + + if (cpu_is_omap44xx()) { + ret = voltdm44xx_get_voltage((voltdm44xx_id) id, &volt); + if (ret < 0) + return (double) ret; + else + return v2uv(volt); + } else if (cpu_is_omap54xx()) { + return v2uv(voltdm54xx_voltage_get((voltdm54xx_id) id)); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return (double) OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_voltage_set + * @BRIEF set the voltage supplied to a voltage domain. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_REG_ACCESS + * OMAPCONF_ERR_NOT_AVAILABLE + * OMAPCONF_ERR_UNEXPECTED + * OMAPCONF_ERR_INTERNAL + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] uv: new voltage to be set (in micro-volt) + * @DESCRIPTION return the current voltage supplied to a voltage domain. + *//*------------------------------------------------------------------------ */ +int voltdm_voltage_set(const char *voltdm, int uv) +{ + int id; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + voltdm_init(); + + id = voltdm_s2id(voltdm); + if (id < 0) + return (double) OMAPCONF_ERR_ARG; + + if (cpu_is_omap44xx()) { + return sr44xx_voltage_set( + (unsigned int) id, (unsigned long) uv); + } else if (cpu_is_omap54xx()) { + return voltdm54xx_voltage_set( + (voltdm54xx_id) id, (unsigned long) uv); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_nominal_voltage_get + * @BRIEF return the nominal voltage supplied to a voltage domain. + * @RETURNS nominal voltage in micro-volt (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @DESCRIPTION return the nominal voltage supplied to a voltage domain. + * In case SmartReflex AVS Class3 is enabled, + * it may differ from the current supplied voltage. + *//*------------------------------------------------------------------------ */ +int voltdm_nominal_voltage_get(const char *voltdm) +{ + int id; + int uvolt; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + voltdm_init(); + + id = voltdm_s2id(voltdm); + if (id < 0) { + uvolt = OMAPCONF_ERR_ARG; + } else if (cpu_is_omap44xx()) { + uvolt = v2uv(voltdm44xx_nominal_voltage_get( + (voltdm44xx_id) id)); + } else if (cpu_is_omap54xx()) { + uvolt = v2uv(voltdm54xx_nominal_voltage_get( + (voltdm54xx_id) id)); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + uvolt = OMAPCONF_ERR_CPU; + } + + dprintf("%s(%s) = %duV\n", __func__, voltdm, uvolt); + return uvolt; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm_por_nominal_voltage_get + * @BRIEF return the nominal voltage to be supplied to a + * voltage domain, as defined in Data Manual. + * @RETURNS nominal voltage in micro-volt (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] voltdm: voltage domain name (as defined in voltdm.h) + * @param[in] opp: OPP provided as a string (as defined in opp.h) + * @DESCRIPTION return the nominal voltage to be supplied to a + * voltage domain, as defined in Data Manual. + * Not read from the platform, but from internal tables. + *//*------------------------------------------------------------------------ */ +int voltdm_por_nominal_voltage_get(const char *voltdm, const char *opp) +{ + int vdd_id, opp_id; + + CHECK_NULL_ARG(voltdm, OMAPCONF_ERR_ARG); + + voltdm_init(); + + vdd_id = voltdm_s2id(voltdm); + if (vdd_id < 0) + return OMAPCONF_ERR_ARG; + + opp_id = opp_s2id(opp); + if (opp_id < 0) + return opp_id; + + if (cpu_is_omap44xx()) { + return v2uv(voltdm44xx_por_nominal_voltage_get( + (voltdm44xx_id) vdd_id, (opp44xx_id) opp_id)); + } else if (cpu_is_omap54xx()) { + return v2uv(voltdm54xx_por_nominal_voltage_get( + (voltdm54xx_id) vdd_id, (opp54xx_id) opp_id)); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", __func__); + return OMAPCONF_ERR_CPU; + } +} diff -Nru tiomapconf-1.50.0/common/voltdm.h tiomapconf-1.52.0/common/voltdm.h --- tiomapconf-1.50.0/common/voltdm.h 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/common/voltdm.h 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,75 @@ +/* + * + * @Component OMAPCONF + * @Filename voltdm.h + * @Description Generic Voltage Domain Definitions & APIs + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef __VOLTDM_H__ +#define __VOLTDM_H__ + + +#include + +#define VOLTDM_MAX_NAME_LENGTH 16 + +#define VDD_WKUP ((const char *) "VDD_WKUP") /* Common */ +#define VDD_MPU ((const char *) "VDD_MPU") /* Common */ +#define VDD_IVA ((const char *) "VDD_IVA") /* OMAP4 */ +#define VDD_MM ((const char *) "VDD_MM") /* OMAP5 */ +#define VDD_CORE ((const char *) "VDD_CORE") /* Common */ + + +void voltdm_init(void); +void voltdm_deinit(void); + +int voltdm_s2id(const char *voltdm); + +int voltdm_count_get(void); +const genlist *voltdm_list_get(void); + +int voltdm_voltage_get(const char *voltdm); +int voltdm_voltage_set(const char *voltdm, int uv); + +int voltdm_nominal_voltage_get(const char *voltdm); +int voltdm_por_nominal_voltage_get(const char *voltdm, const char *opp); + + +#endif diff -Nru tiomapconf-1.50.0/debian/changelog tiomapconf-1.52.0/debian/changelog --- tiomapconf-1.50.0/debian/changelog 2012-12-12 14:48:56.000000000 +0000 +++ tiomapconf-1.52.0/debian/changelog 2012-12-12 14:48:56.000000000 +0000 @@ -1,3 +1,15 @@ +tiomapconf (1.52.0-1) precise; urgency=low + + * Upstream Release: v1.52 + + -- Xavier Boudet Fri, 16 Nov 2012 17:01:09 +0100 + +tiomapconf (1.51.0-1) precise; urgency=low + + * Upstream Release: v1.51 + + -- Xavier Boudet Tue, 16 Oct 2012 10:46:06 +0200 + tiomapconf (1.50.0-1) precise; urgency=low * Upstream Release: v1.50_public_release diff -Nru tiomapconf-1.50.0/linux/interrupts.c tiomapconf-1.52.0/linux/interrupts.c --- tiomapconf-1.50.0/linux/interrupts.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/linux/interrupts.c 2012-11-14 16:36:23.000000000 +0000 @@ -146,7 +146,7 @@ char irq_ctrl_name[256], dev_name[256]; int ret; - cpu_count = cpu_cores_count_get(); + cpu_count = cpu_online_cores_count_get(); if (cpu_count == 0) { fprintf(stderr, "%s(): cpu_count == 0!\n", __func__); return IRQ_ERR_CPU; @@ -244,7 +244,7 @@ char irq_ctrl_name[256], dev_name[256]; int ret; - cpu_count = cpu_cores_count_get(); + cpu_count = cpu_online_cores_count_get(); if (cpu_count == 0) { fprintf(stderr, "%s(): cpu_count == 0!\n", __func__); return IRQ_ERR_CPU; @@ -360,7 +360,7 @@ int ret; dprintf("%s(): looking for irq #%u name ...\n", __func__, n); - cpu_count = cpu_cores_count_get(); + cpu_count = cpu_online_cores_count_get(); if (cpu_count == 0) { fprintf(stderr, "%s(): cpu_count == 0!\n", __func__); return NULL; diff -Nru tiomapconf-1.50.0/omap4/audit44xx.c tiomapconf-1.52.0/omap4/audit44xx.c --- tiomapconf-1.50.0/omap4/audit44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/audit44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -1378,107 +1378,80 @@ 1000.0; dprintf("%s(): speed=%.3lfMHz\n", __func__, speed_curr); - switch (module_id) { - case OMAP4_TIMER2: - case OMAP4_TIMER3: - case OMAP4_TIMER4: - case OMAP4_TIMER5: - case OMAP4_TIMER6: - case OMAP4_TIMER7: - case OMAP4_TIMER8: - case OMAP4_TIMER9: - case OMAP4_TIMER10: - case OMAP4_TIMER11: - case OMAP4_MCASP: - case OMAP4_MCBSP1: - case OMAP4_MCBSP2: - case OMAP4_MCBSP3: - case OMAP4_SLIMBUS1: - case OMAP4_SLIMBUS2: - /* These modules are out of interest or - * there is no mandatory clock speed - */ - dprintf("%s(): no mandatory clock speed.\n", - __func__); - status = (char *) ignore4; - snprintf(s_por, 12, "%s", "Undefined"); - break; - - default: + /* + * Get Plan Of Record (POR) module's functional + * source clock speed + */ + ret = mod44xx_get_por_clk_speed(module_id, + current_opp, &speed_por); + mod44xx_get_mode(module_id, &mmode); + if ((ret == 0) && (speed_por != -1.0)) { + mhz2string(speed_por, s_por); /* - * Get Plan Of Record (POR) module's functional - * source clock speed + * Keep only 3 decimals for comparison */ - ret = mod44xx_get_por_clk_speed(module_id, - current_opp, &speed_por); - mod44xx_get_mode(module_id, &mmode); - if ((ret == 0) && (speed_por != -1.0)) { - mhz2string(speed_por, s_por); + speed_por = (int)(speed_por * 1000.0) / + 1000.0; + dprintf("%s(): PoR speed=%.3lfMHz\n", + __func__, speed_por); + + if (speed_curr == speed_por) { + status = (char *) pass; + dprintf("%s(): pass!\n", + __func__); + } else if (((module_id == OMAP4_AESS) || + (module_id == OMAP4_DMIC) || + (module_id == OMAP4_L4_ABE)) && + (current_opp == OMAP4_OPP100)) { /* - * Keep only 3 decimals for comparison + * From ICS pastry, + * ABE is not always following + * IVAHD OPP. i.e. it's possible + * that VDD_IVA=OPP100 but ABE + * stays at OPP50 clock rates. */ - speed_por = (int)(speed_por * 1000.0) / - 1000.0; - dprintf("%s(): PoR speed=%.3lfMHz\n", - __func__, speed_por); - - if (speed_curr == speed_por) { + mod44xx_get_por_clk_speed( + module_id, OMAP4_OPP50, + &speed_opp50_por); + if (speed_curr == + speed_opp50_por) { status = (char *) pass; + mhz2string( + speed_opp50_por, + s_por); dprintf("%s(): pass!\n", __func__); - } else if (((module_id == OMAP4_AESS) || - (module_id == OMAP4_DMIC) || - (module_id == OMAP4_L4_ABE)) && - (current_opp == OMAP4_OPP100)) { - /* - * From ICS pastry, - * ABE is not always following - * IVAHD OPP. i.e. it's possible - * that VDD_IVA=OPP100 but ABE - * stays at OPP50 clock rates. - */ - mod44xx_get_por_clk_speed( - module_id, OMAP4_OPP50, - &speed_opp50_por); - if (speed_curr == - speed_opp50_por) { - status = (char *) pass; - mhz2string( - speed_opp50_por, - s_por); - dprintf("%s(): pass!\n", - __func__); - } else { - dprintf("%s(): FAILED!" - "\n", __func__); - status = (char *) fail; - (*err_nbr)++; - } - } else if (mmode == MOD_DISABLED_MODE) { - /* - * may not be a true failure - * when module is disabled - * (not configured). Does not - * impact power. - */ - dprintf("%s(): disabled " - "module.\n", - __func__); - status = (char *) warning3; - (*wng_nbr)++; } else { - dprintf("%s(): FAILED!\n", - __func__); + dprintf("%s(): FAILED!" + "\n", __func__); status = (char *) fail; (*err_nbr)++; } - } else { - dprintf("%s(): warning POR speed " - "not found!\n", __func__); - status = (char *) warning1; + } else if (mmode == MOD_DISABLED_MODE) { + /* + * may not be a true failure + * when module is disabled + * (not configured). Does not + * impact power. + */ + dprintf("%s(): disabled " + "module.\n", + __func__); + status = (char *) warning3; (*wng_nbr)++; + } else { + dprintf("%s(): FAILED!\n", + __func__); + status = (char *) fail; + (*err_nbr)++; } + } else { + dprintf("%s(): warning POR speed " + "not found!\n", __func__); + status = (char *) warning1; + (*wng_nbr)++; } + clkspeed_audit44xx_show: if (stream != NULL) fprintf(stream, diff -Nru tiomapconf-1.50.0/omap4/clock44xx.c tiomapconf-1.52.0/omap4/clock44xx.c --- tiomapconf-1.50.0/omap4/clock44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/clock44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -294,7 +294,7 @@ dprintf("%s(): crystal rate = 16.8MHz\n", __func__); return 16.8; /* 16.8MHz */ case 4: - dprintf("%s(): crystal rate = 19.2MHz\n, __func__"); + dprintf("%s(): crystal rate = 19.2MHz\n", __func__); return 19.2; /* 19.2MHz */ case 5: dprintf("%s(): crystal rate = 26MHz\n", __func__); @@ -375,7 +375,7 @@ double src_clk_speed, out_clk_speed; clock44xx_id src_clk_id; double div; - #ifdef CLK44XX_GET_CLOCK_SPEED_DEBUG + #if defined (CLK44XX_GET_CLOCK_SPEED_DEBUG) || defined (CLOCK44XX_DEBUG) char clk_name[CLOCK44XX_MAX_NAME_LENGTH]; char src_clk_name[CLOCK44XX_MAX_NAME_LENGTH]; #endif diff -Nru tiomapconf-1.50.0/omap4/help44xx.c tiomapconf-1.52.0/omap4/help44xx.c --- tiomapconf-1.50.0/omap4/help44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/help44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -100,23 +100,12 @@ if ((cat == HELP_ALL) || (cat == HELP_TEMPERATURE)) { printf("\n\tomapconf show temp []\n"); - printf("\t Print temperature reported by , in " - "celcius degrees.\n"); - printf("\t Supported : bandgap, pcb, " - "hotspot.\n"); - printf("\t If is omitted, all available " - "sensors will be printed in a table, with both celcius " - "and fahrenheit degrees.\n"); - - printf("\n\tomapconf show temp mem \n"); - printf("\t Print memory (LP-DDR2) temperature, in " - "celcius degrees.\n"); - printf("\t is the EMIF controller instance ([1-2])" - ".\n"); - if (!cpu_is_omap4470()) - printf("\t is the chip select line ([0-1]).\n"); - else - printf("\t is the chip select line (0).\n"); + printf( + "\t Print temperature reported by , in celcius degrees.\n"); + printf( + "\t Supported : bandgap, hotspot, mem1, mem2, pcb.\n"); + printf( + "\t If is omitted, all available sensors will be printed in a table, with both celcius and fahrenheit degrees.\n"); } if ((cat == HELP_ALL) || (cat == HELP_VOLT)) { @@ -416,14 +405,12 @@ printf( "\t # omapconf trace perf -t 30 -d 3 -s 0.1 -p db175_mp3_\n"); - printf("\n\tomapconf trace bw [-h] [-m 0xyy or MA_MPU_1_2]" - " [-d x] [-a 1 or 2] [-i x] [-o x -t y] " - "[-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); - printf("\t EMIF traffic monitoring. Type 'omapconf trace " - "bw -h' for detailed help.\n"); - printf("\t Visit wiki: " - "\n"); + printf( + "\n\tomapconf trace bw [-h] [<-m | --m> <0xyy | ma_mpu | alldmm | dss | iva | ...>] [<-p | --p ] [<--tr | --tr> ] [-d x] [-a 1 or 2] [-i x] [--overflow_delay x] [-o x -t y] [-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); + printf( + "\t EMIF traffic monitoring. Type 'omapconf trace bw -h' for detailed help.\n"); + printf( + "\t Visit wiki: \n"); } if ((cat == HELP_ALL) || (cat == HELP_TRACE) || diff -Nru tiomapconf-1.50.0/omap4/main44xx.c tiomapconf-1.52.0/omap4/main44xx.c --- tiomapconf-1.50.0/omap4/main44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/main44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -68,7 +68,7 @@ #include #include #include -#include +#include #include #include #include @@ -87,6 +87,7 @@ #include #include #include +#include /* #define DEBUG */ @@ -451,7 +452,7 @@ return err_arg_too_many_msg_show(HELP_PRCM); } } else if (strcmp(argv[0], "opp") == 0) { - return voltdm44xx_opp_show(); + return opp_show(stdout); } else if (strcmp(argv[0], "pwst") == 0) { return power44xx_status_show(); } else if (strcmp(argv[0], "dpll") == 0) { @@ -474,7 +475,18 @@ else return err_arg_msg_show(HELP_ABE); } else if (strcmp(argv[0], "temp") == 0) { - return temp44xx_main(argc, argv); + if (argc == 1) { + return temp_sensor_show(stdout, "all"); + } else if (argc == 2) { + if (strcmp(argv[1], "all") == 0) + return temp_sensor_show(stdout, argv[1]); + else if (temp_sensor_is_available(argv[1]) != 0) + return temp_sensor_show(stdout, argv[1]); + else + return err_arg_msg_show(HELP_TEMPERATURE); + } else { + return err_arg_too_many_msg_show(HELP_TEMPERATURE); + } } else if (strcmp(argv[0], "sr") == 0) { if (argc == 1) { return sr44xx_config_show(stdout); @@ -875,7 +887,7 @@ if (strcmp(argv[0], "pwst") == 0) { ret = power44xx_status_show(); } else if (strcmp(argv[0], "opp") == 0) { - ret = voltdm44xx_opp_show(); + ret = opp_show(stdout); } else if (strcmp(argv[0], "hwobs") == 0) { ret = hwobs44xx_main(argc, argv); } else if (strcmp(argv[0], "mpu") == 0) { @@ -934,7 +946,18 @@ } else if (strcmp(argv[0], "abb") == 0) { ret = abb44xx_main(argc, argv); } else if (strcmp(argv[0], "temp") == 0) { - ret = temp44xx_main(argc, argv); + if (argc == 1) { + ret = temp_sensor_show(stdout, "all"); + } else if (argc == 2) { + if (strcmp(argv[1], "all") == 0) + ret = temp_sensor_show(stdout, argv[1]); + else if (temp_sensor_is_available(argv[1]) != 0) + ret = temp_sensor_show(stdout, argv[1]); + else + ret = err_arg_msg_show(HELP_TEMPERATURE); + } else { + ret = err_arg_too_many_msg_show(HELP_TEMPERATURE); + } } else if (strcmp(argv[0], "ctt") == 0) { ret = ctt44xx_main(argc, argv); } else if (strcmp(argv[0], "pct") == 0) { @@ -1029,6 +1052,8 @@ *//*------------------------------------------------------------------------ */ int main44xx(int argc, char *argv[]) { + int ret; + CHECK_CPU(44xx, OMAPCONF_ERR_CPU); if (argc == 0) { @@ -1040,33 +1065,35 @@ main44xx_init(); if (strcmp(argv[0], "dump") == 0) - return main44xx_dump(argc - 1, argv + 1); + ret = main44xx_dump(argc - 1, argv + 1); else if (strcmp(argv[0], "show") == 0) - return main44xx_show(argc - 1, argv + 1); + ret = main44xx_show(argc - 1, argv + 1); else if (strcmp(argv[0], "audit") == 0) - return audit44xx_main(argc, argv); + ret = audit44xx_main(argc, argv); else if (strcmp(argv[0], "trace") == 0) - return main44xx_trace(argc, argv); + ret = main44xx_trace(argc, argv); else if (strcmp(argv[0], "search") == 0) - return main44xx_search(argc - 1, argv + 1); + ret = main44xx_search(argc - 1, argv + 1); else if (strcmp(argv[0], "export") == 0) - return main44xx_export(argc - 1, argv + 1); + ret = main44xx_export(argc - 1, argv + 1); else if (strcmp(argv[0], "read") == 0) - return main44xx_read(argc - 1, argv + 1); + ret = main44xx_read(argc - 1, argv + 1); else if (strcmp(argv[0], "write") == 0) - return main44xx_write(argc - 1, argv + 1); + ret = main44xx_write(argc - 1, argv + 1); else if (strcmp(argv[0], "set") == 0) - return main44xx_set(argc - 1, argv + 1); + ret = main44xx_set(argc - 1, argv + 1); else if (strcmp(argv[0], "reset") == 0) - return main44xx_reset(argc - 1, argv + 1); + ret = main44xx_reset(argc - 1, argv + 1); else if (strcmp(argv[0], "clear") == 0) - return main44xx_clear(argc - 1, argv + 1); + ret = main44xx_clear(argc - 1, argv + 1); else if (strcmp(argv[0], "enable") == 0) - return main44xx_enable(argc - 1, argv + 1); + ret = main44xx_enable(argc - 1, argv + 1); else if (strcmp(argv[0], "setup") == 0) - return main44xx_setup(argc - 1, argv + 1); + ret = main44xx_setup(argc - 1, argv + 1); else if (strcmp(argv[0], "test") == 0) - return main44xx_test(argc - 1, argv + 1); + ret = main44xx_test(argc - 1, argv + 1); else - return main44xx_legacy(argc, argv); + ret = main44xx_legacy(argc, argv); + + return ret; } diff -Nru tiomapconf-1.50.0/omap4/module44xx-data.c tiomapconf-1.52.0/omap4/module44xx-data.c --- tiomapconf-1.50.0/omap4/module44xx-data.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/module44xx-data.c 2012-11-14 16:36:23.000000000 +0000 @@ -536,140 +536,140 @@ return OMAPCONF_ERR_CPU; for (i = 0; i < OMAP4_MODULE_ID_MAX; i++) - mod44xx_init_info(i, MOD_INTERFACE_NONE, 0, OMAP4_CD_ID_MAX, OMAP4_PD_ID_MAX, OMAP4_VD_ID_MAX, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0}); + mod44xx_init_info(i, MOD_INTERFACE_NONE, 0, OMAP4_CD_ID_MAX, OMAP4_PD_ID_MAX, OMAP4_VD_ID_MAX, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}); dprintf("OMAP4_MODULE_ID_MAX = %d\n", OMAP4_MODULE_ID_MAX); /* Voltage domain: LDO_WKUP, Power domain: WKUP, Functional clock domain = WKUP */ - mod44xx_init_info(OMAP4_L4WKUP, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_L4WKUP_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_L4WKUP_CONTEXT, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L4WKUP, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_L4WKUP_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_L4WKUP_CONTEXT, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); mod44xx_init_info(OMAP4_CONTROL_GEN_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_GEN_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); mod44xx_init_info(OMAP4_CONTROL_PADCONF_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_PADCONF_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_WDT2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_WDT2_WDSC, (unsigned int *) OMAP4430_CM_WKUP_WDT2_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT2_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPIO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_GPIO1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_GPIO1_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPT1_TIOCP_CFG, (unsigned int *) OMAP4430_CM_WKUP_TIMER1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER1_CONTEXT, OMAP4_GPT1_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SYNCTIMER, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_SYNCTIMER_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT, OMAP4_FUNC_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SARRAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_SARRAM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SARRAM_CONTEXT, OMAP4_L4_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_KEYBOARD, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_KBD_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_KEYBOARD_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_WDT2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_WDT2_WDSC, (unsigned int *) OMAP4430_CM_WKUP_WDT2_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT2_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPIO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_GPIO1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_GPIO1_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPT1_TIOCP_CFG, (unsigned int *) OMAP4430_CM_WKUP_TIMER1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER1_CONTEXT, OMAP4_GPT1_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SYNCTIMER, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_SYNCTIMER_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT, OMAP4_FUNC_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SARRAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_SARRAM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SARRAM_CONTEXT, OMAP4_L4_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_KEYBOARD, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_KBD_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_KEYBOARD_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); /* HS/EMU device only, not accessible for non-secure world */ - mod44xx_init_info(OMAP4_TIMER12, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_TIMER12_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER12_CONTEXT, OMAP4_GPT12_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_WDT1, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_WDT1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT1_CONTEXT, OMAP4_SECURE_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_USIM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_USIM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_USIM_CONTEXT, OMAP4_USIM_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 9.142858, 9.142858, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER12, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_TIMER12_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER12_CONTEXT, OMAP4_GPT12_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_WDT1, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_WDT1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT1_CONTEXT, OMAP4_SECURE_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_USIM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_USIM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_USIM_CONTEXT, OMAP4_USIM_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 9.142858, 9.142858, -1.0, -1.0, -1.0, -1.0}); /* end of HS/EMU device only */ /* Voltage domain: LDO_WKUP, Power domain: WKUP, Functional clock domain = NONE */ /* Voltage domain: LDO_WKUP, Power domain: EMU, Functional clock domain = EMU */ - mod44xx_init_info(OMAP4_DEBUGSS, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMU, OMAP4_PD_EMU, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, (unsigned int *) OMAP4430_RM_EMU_DEBUGSS_CONTEXT, OMAP4_CORE_DPLL_EMU_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 266.666687, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DEBUGSS, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMU, OMAP4_PD_EMU, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, (unsigned int *) OMAP4430_RM_EMU_DEBUGSS_CONTEXT, OMAP4_CORE_DPLL_EMU_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 266.666687, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_MPU, Power domain: MPU, Functional clock domain = MPU */ if (!cpu_is_omap4430()) - mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 350.0, 700.0, 920.0, 1200.0, 1500.0}); + mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 350.0, 700.0, 920.0, 1200.0, 1500.0, -1.0}); else - mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 300.0, 600.0, 800.0, 1008.0, 1200.0}); + mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 300.0, 600.0, 800.0, 1008.0, 1200.0, -1.0}); /* Voltage domain: VDD_MPU, Power domain: ALWON_MPU, Functional clock domain = NONE */ /* Voltage domain: VDD_IVA, Power domain: ABE, Functional clock domain = ABE */ - mod44xx_init_info(OMAP4_L4_ABE, MOD_INTERFACE_NONE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM1_ABE_L4ABE_CLKCTRL, NULL, OMAP4_ABE_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 49.152, 98.304, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_AESS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_AESS_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_AESS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_AESS_CONTEXT, OMAP4_AESS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 98.304, 196.608, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCPDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCPDM_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_PDM_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_PDM_CONTEXT, OMAP4_PAD_CLKS, (double[OPP44XX_ID_MAX]) {19.2, 19.2, 19.2, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_DMIC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_DMIC_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_DMIC_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_DMIC_CONTEXT, OMAP4_DMIC_ABE_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCASP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCASP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCASP_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCASP_CONTEXT, OMAP4_MCASP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 98.0, 98.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCBSP1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP1_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP1_CONTEXT, OMAP4_MCBSP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCBSP2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP2_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP2_CONTEXT, OMAP4_MCBSP2_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCBSP3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP3_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP3_CONTEXT, OMAP4_MCBSP3_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SLIMBUS1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_SLIMBUS1_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_SLIMBUS_CONTEXT, OMAP4_SLIMBUS_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT5_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER5_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER5_CONTEXT, OMAP4_ABE_GPT5_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT6_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER6_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER6_CONTEXT, OMAP4_ABE_GPT6_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER7, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT7_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER7_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER7_CONTEXT, OMAP4_ABE_GPT7_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER8, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT8_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER8_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER8_CONTEXT, OMAP4_ABE_GPT8_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_WDT3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_WDT3_WDSC, (unsigned int *) OMAP4430_CM1_ABE_WDT3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_WDT3_CONTEXT, OMAP4_ABE_ALWON_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L4_ABE, MOD_INTERFACE_NONE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM1_ABE_L4ABE_CLKCTRL, NULL, OMAP4_ABE_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 49.152, 98.304, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_AESS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_AESS_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_AESS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_AESS_CONTEXT, OMAP4_AESS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 98.304, 196.608, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCPDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCPDM_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_PDM_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_PDM_CONTEXT, OMAP4_PAD_CLKS, (double[OPP44XX_ID_MAX]) {19.2, 19.2, 19.2, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DMIC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_DMIC_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_DMIC_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_DMIC_CONTEXT, OMAP4_DMIC_ABE_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCASP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCASP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCASP_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCASP_CONTEXT, OMAP4_MCASP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP1_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP1_CONTEXT, OMAP4_MCBSP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP2_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP2_CONTEXT, OMAP4_MCBSP2_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP3_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP3_CONTEXT, OMAP4_MCBSP3_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_SLIMBUS1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_SLIMBUS1_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_SLIMBUS_CONTEXT, OMAP4_SLIMBUS_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT5_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER5_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER5_CONTEXT, OMAP4_ABE_GPT5_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT6_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER6_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER6_CONTEXT, OMAP4_ABE_GPT6_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER7, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT7_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER7_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER7_CONTEXT, OMAP4_ABE_GPT7_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER8, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT8_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER8_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER8_CONTEXT, OMAP4_ABE_GPT8_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_WDT3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_WDT3_WDSC, (unsigned int *) OMAP4430_CM1_ABE_WDT3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_WDT3_CONTEXT, OMAP4_ABE_ALWON_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_IVA, Power domain: IVAHD, Functional clock domain = IVAHD */ - mod44xx_init_info(OMAP4_IVAHD, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IVAHD_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ICONT1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ICONT2, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.0, -1.01}); - mod44xx_init_info(OMAP4_VDMA, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_IME3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_IPE3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ILF3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_MC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_CALC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ECD3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ICONT1_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ICONT2_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ILF3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_IME3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_CALC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_IPE3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_MC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_ECD3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); - mod44xx_init_info(OMAP4_SL2, MOD_INTERFACE_NONE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM_IVAHD_SL2_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_SL2_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 499.2}); + mod44xx_init_info(OMAP4_IVAHD, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IVAHD_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT2, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_VDMA, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IME3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IPE3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ILF3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_CALC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ECD3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT1_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT2_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ILF3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IME3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_CALC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IPE3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ECD3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_SL2, MOD_INTERFACE_NONE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM_IVAHD_SL2_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_SL2_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.4, 500.00002, -1.0}); /* Voltage domain: VDD_IVA, Power domain: DSP, Functional clock domain = DSP */ - mod44xx_init_info(OMAP4_DSP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_DSP_SYSC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 499.2}); - mod44xx_init_info(OMAP4_MMU_DSP, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_MMU_DSP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 499.2}); - mod44xx_init_info(OMAP4_DSP_WUGEN, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_ALWON_IVA, OMAP4_VDD_IVA, OMAP4430_DSP_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 499.2}); + mod44xx_init_info(OMAP4_DSP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_DSP_SYSC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MMU_DSP, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_MMU_DSP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_DSP_WUGEN, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_ALWON_IVA, OMAP4_VDD_IVA, OMAP4430_DSP_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.4, 500.00002, -1.0}); /* Voltage domain: VDD_CORE, Power domain: ALWON_CORE, Functional clock domain = AO_L4 */ - mod44xx_init_info(OMAP4_SMARTREFLEX_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_CORE, (unsigned int *) OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_CORE_CONTEXT, OMAP4_SR_CORE_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SMARTREFLEX_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_MPU, (unsigned int *) OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_MPU_CONTEXT, OMAP4_SR_MPU_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SMARTREFLEX_IVA, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_IVA, (unsigned int *) OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_IVA_CONTEXT, OMAP4_SR_IVA_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SMARTREFLEX_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_CORE, (unsigned int *) OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_CORE_CONTEXT, OMAP4_SR_CORE_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_SMARTREFLEX_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_MPU, (unsigned int *) OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_MPU_CONTEXT, OMAP4_SR_MPU_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_SMARTREFLEX_IVA, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_IVA, (unsigned int *) OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_IVA_CONTEXT, OMAP4_SR_IVA_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L4CFG */ - mod44xx_init_info(OMAP4_L4_CFG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_L4_CFG_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CONTROL_GEN_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_GEN_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CONTROL_PADCONF_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_PADCONF_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SPINLOCK, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SPINLOCK_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_HW_SEM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SYSTEM_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SYSTEM_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L4_CFG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_L4_CFG_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CONTROL_GEN_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_GEN_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CONTROL_PADCONF_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_PADCONF_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SPINLOCK, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SPINLOCK_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_HW_SEM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SYSTEM_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SYSTEM_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); /* TODO: CHECK IF REGISTER ACCESSIBLE FROM MPU mod44xx_init_info(OMAP4_IVAHD_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_IVAHD_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_UNDEF_CLK, 0.0); */ - mod44xx_init_info(OMAP4_SAR_ROM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SAR_ROM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = C2C */ - mod44xx_init_info(OMAP4_C2C, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_CONTEXT, OMAP4_C2C_L3X2_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_C2C_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_FW_CONTEXT, OMAP4_C2C_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_ICR_MDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MDM_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_ICR_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MPU_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_C2C, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_CONTEXT, OMAP4_C2C_L3X2_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_C2C_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_FW_CONTEXT, OMAP4_C2C_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_ICR_MDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MDM_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_ICR_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MPU_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = DMA */ - mod44xx_init_info(OMAP4_SDMA, MOD_INTERFACE_DUAL, 1, OMAP4_CD_DMA, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMA4_SYSCONFIG, (unsigned int *) OMAP4430_CM_SDMA_SDMA_CLKCTRL, (unsigned int *) OMAP4430_RM_SDMA_SDMA_CONTEXT, OMAP4_DMA_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SDMA, MOD_INTERFACE_DUAL, 1, OMAP4_CD_DMA, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMA4_SYSCONFIG, (unsigned int *) OMAP4430_CM_SDMA_SDMA_CLKCTRL, (unsigned int *) OMAP4430_RM_SDMA_SDMA_CONTEXT, OMAP4_DMA_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = MPU_M3 */ - mod44xx_init_info(OMAP4_MPU_M3, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU_M3, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_MPU_M3_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MPU_M3, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU_M3, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_MPU_M3_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); /* TODO: FURTHER CHECK mod44xx_init_info(OMAP4_MPU_M3_WUGEN, MOD_INTERFACE_DUAL, 0, OMAP4_CD_MPU_M3, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_MPU_M3_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0); */ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = NONE */ /* TODO: FURTHER CHECK WHEN MODULE IS ACCESSIBLE mod44xx_init_info(OMAP4_MMU_MPU_M3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_NONE, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_MMU_MPU_M3_SYSCONFIG, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0); */ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_1 */ - mod44xx_init_info(OMAP4_L3_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_1, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_1_L3_1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_1_L3_1_CONTEXT, OMAP4_L3_ICLK1, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L3_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_1, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_1_L3_1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_1_L3_1_CONTEXT, OMAP4_L3_ICLK1, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_2 */ - mod44xx_init_info(OMAP4_L3_2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_L3_2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_L3_2_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPMC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_GPMC_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3_2_GPMC_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_GPMC_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_OCMC_RAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L3_2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_L3_2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_L3_2_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPMC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_GPMC_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3_2_GPMC_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_GPMC_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_OCMC_RAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_INSTR */ - mod44xx_init_info(OMAP4_L3_3, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_3_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_L3_INSTR, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_OCP_WP1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L3_3, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_3_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L3_INSTR, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_OCP_WP1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = EMIF */ - mod44xx_init_info(OMAP4_DMM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMM_SYSCONFIG, (unsigned int *) OMAP4430_CM_MEMIF_DMM_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DMM_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_EMIF_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_EMIF1, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_1_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_EMIF2, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_2_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DMM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMM_SYSCONFIG, (unsigned int *) OMAP4430_CM_MEMIF_DMM_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DMM_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_EMIF_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_EMIF1, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_1_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_EMIF2, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_2_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); if (cpu_is_omap4430() && (cpu_revision_get() < REV_ES2_1)) - mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); else - mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 400.0, 800.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_DLL, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_DLL_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DLL_CONTEXT, OMAP4_DLL_CLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 100.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 400.0, 800.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DLL, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_DLL_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DLL_CONTEXT, OMAP4_DLL_CLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 100.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: STD_EFUSE, Functional clock domain = STD_EFUSE */ - mod44xx_init_info(OMAP4_STD_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_STD_EFUSE, OMAP4_PD_STD_EFUSE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_STD_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_STD_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_STD_EFUSE, OMAP4_PD_STD_EFUSE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_STD_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: CUST_EFUSE, Functional clock domain = CUST_EFUSE */ /* HS/EMU device only */ - mod44xx_init_info(OMAP4_CUST_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_CUST_EFUSE, OMAP4_PD_CUST_EFUSE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL, (unsigned int *) OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT, OMAP4_CUST_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CUST_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_CUST_EFUSE, OMAP4_PD_CUST_EFUSE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL, (unsigned int *) OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT, OMAP4_CUST_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); /* end of HS/EMU device only */ /* Voltage domain: VDD_CORE, Power domain: ALWON_CORE, Functional clock domain = NONE */ @@ -679,103 +679,103 @@ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = NONE */ /* Voltage domain: VDD_CORE, Power domain: CAM, Functional clock domain = CAM */ - mod44xx_init_info(OMAP4_ISS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISS_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CCP2, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CCP2_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CSI2_A, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_A_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CSI2_B, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_B_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TCTRL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_TCTRL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_BTE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_BTE_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_CBUFF, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CBUFF_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_ISP5, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISP5_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_RSZ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_RSZ_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SIMCOP, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SIMCOP_DMA, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DMA_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SIMCOP_DCT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DCT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SIMCOP_VLCDJ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_VLCDJ_CTRL, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SIMCOP_ROT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_ROT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_FDIF, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_FDIF_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_FDIF_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_FDIF_CONTEXT, OMAP4_FDIF_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 64.0, 128.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_ISS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISS_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CCP2, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CCP2_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CSI2_A, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_A_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CSI2_B, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_B_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TCTRL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_TCTRL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_BTE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_BTE_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CBUFF, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CBUFF_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_ISP5, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISP5_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_RSZ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_RSZ_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SIMCOP, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SIMCOP_DMA, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DMA_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SIMCOP_DCT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DCT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SIMCOP_VLCDJ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_VLCDJ_CTRL, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SIMCOP_ROT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_ROT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 400.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_FDIF, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_FDIF_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_FDIF_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_FDIF_CONTEXT, OMAP4_FDIF_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 64.0, 128.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: DSS, Functional clock domain = DSS */ - mod44xx_init_info(OMAP4_DISPC, MOD_INTERFACE_DUAL, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DISPC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_DSI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_DSI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_HDMI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_HDMI_WP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_HDMI_PHY_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_RFBI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_RFBI_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DISPC, MOD_INTERFACE_DUAL, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DISPC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DSI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DSI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_HDMI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_HDMI_WP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_HDMI_PHY_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_RFBI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_RFBI_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, -1.0, -1.0, -1.0, -1.0}); mod44xx_init_info(OMAP4_BB2D, MOD_INTERFACE_NONE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: GFX, Functional clock domain = GFX */ if (cpu_is_omap4430()) - mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 153.6, 307.2, 384.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 153.6, 307.2, 384.0, -1.0, -1.0, -1.0}); else - mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 153.6, 307.2, 384.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 153.6, 307.2, 384.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: L3_INIT, Functional clock domain = L3_INIT */ - mod44xx_init_info(OMAP4_MMC1, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC1_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC2, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC2_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_HSI, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSI_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_HSI_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_HSI_CONTEXT, OMAP4_HSI_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC1, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC1_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC2, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC2_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_HSI, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSI_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_HSI_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_HSI_CONTEXT, OMAP4_HSI_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); /* UNIPRO1 only in ES1.0 */ - mod44xx_init_info(OMAP4_UNIPRO1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UNIPRO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT, OMAP4_UNIPRO1_PHY_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_HSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UHH_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_HSUSBOTG, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSUSBOTG_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_OTG_CONTEXT, OMAP4_OTG_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_USBTLL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_USBTLL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_TLL_CONTEXT, OMAP4_INIT_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_P1500, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_P1500_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_P1500_CONTEXT, OMAP4_INIT_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_FSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_FSUSBHOST_HCOCPSYS, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_USBPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT, OMAP4_INIT_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_UNIPRO1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UNIPRO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT, OMAP4_UNIPRO1_PHY_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_HSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UHH_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_HSUSBOTG, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSUSBOTG_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_OTG_CONTEXT, OMAP4_OTG_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_USBTLL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_USBTLL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_TLL_CONTEXT, OMAP4_INIT_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_P1500, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_P1500_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_P1500_CONTEXT, OMAP4_INIT_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_FSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_FSUSBHOST_HCOCPSYS, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_USBPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT, OMAP4_INIT_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); /* Voltage domain: VDD_CORE, Power domain: L3_INIT, Functional clock domain = NONE */ /* Voltage domain: VDD_CORE, Power domain: L4_PER, Functional clock domain = L4_SEC */ /* HS/EMU device only, not accessible for non-secure world */ - mod44xx_init_info(OMAP4_CRYPTODMA, MOD_INTERFACE_NONE, 1, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_AES1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES1_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_AES2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES2_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SHA2MD5_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_RNG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_RNG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_RNG_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_DES3DES, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_DES3DES_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_DES3DES_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_PKAEIP29, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_CRYPTODMA, MOD_INTERFACE_NONE, 1, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_AES1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES1_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_AES2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES2_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SHA2MD5_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 200.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_RNG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_RNG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_RNG_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_DES3DES, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_DES3DES_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_DES3DES_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_PKAEIP29, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); /* end of HS/EMU device only */ /* Voltage domain: VDD_CORE, Power domain: L4_PER, Functional clock domain = L4_PER */ - mod44xx_init_info(OMAP4_TIMER10, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT10_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER10_CONTEXT, OMAP4_GPT10_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER11, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT11_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER11_CONTEXT, OMAP4_GPT11_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT2_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER2_CONTEXT, OMAP4_GPT2_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT3_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER3_CONTEXT, OMAP4_GPT3_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT4_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER4_CONTEXT, OMAP4_GPT4_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_TIMER9, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT9_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER9_CONTEXT, OMAP4_GPT9_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_ELM, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_ELM_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_ELM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_ELM_CONTEXT, OMAP4_PER_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO2_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO3_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO4_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO5_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_GPIO6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO6_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO6_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO6_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_HDQ1W, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_HDQ_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_HDQ1W_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_HDQ1W_CONTEXT, OMAP4_12M_FCLK, (double[OPP44XX_ID_MAX]) {6.144, 12.0, 12.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_I2C1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C1_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_I2C2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C2_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_I2C3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C3_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_I2C4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C4_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_L4_PER, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4PER_L4PER_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_L4_PER_CONTEXT, OMAP4_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCBSP4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCBSP4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCBSP4_CONTEXT, OMAP4_PER_MCBSP4_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI1_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI2_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI3_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI4_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MCSPI4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC3, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC3_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC4, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC4_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_SLIMBUS2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_SLIMBUS2_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT, OMAP4_SLIMBUS_CORE_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_UART1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_UART2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_UART3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_UART4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC5, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_MMC5_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER10, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT10_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER10_CONTEXT, OMAP4_GPT10_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER11, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT11_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER11_CONTEXT, OMAP4_GPT11_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT2_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER2_CONTEXT, OMAP4_GPT2_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT3_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER3_CONTEXT, OMAP4_GPT3_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT4_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER4_CONTEXT, OMAP4_GPT4_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_TIMER9, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT9_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER9_CONTEXT, OMAP4_GPT9_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_ELM, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_ELM_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_ELM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_ELM_CONTEXT, OMAP4_PER_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO2_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO3_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO4_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO5_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_GPIO6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO6_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO6_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO6_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_HDQ1W, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_HDQ_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_HDQ1W_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_HDQ1W_CONTEXT, OMAP4_12M_FCLK, (double[OPP44XX_ID_MAX]) {6.144, 12.0, 12.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_I2C1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C1_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_I2C2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C2_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_I2C3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C3_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_I2C4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C4_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_L4_PER, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4PER_L4PER_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_L4_PER_CONTEXT, OMAP4_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 100.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCBSP4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCBSP4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCBSP4_CONTEXT, OMAP4_PER_MCBSP4_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI1_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI2_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI3_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI4_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MCSPI4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC3, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC3_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC4, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC4_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_SLIMBUS2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_SLIMBUS2_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT, OMAP4_SLIMBUS_CORE_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_UART1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_UART2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_UART3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_UART4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC5, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_MMC5_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, -1.0, -1.0, -1.0, -1.0}); return 0; } @@ -796,134 +796,134 @@ return OMAPCONF_ERR_CPU; for (i = 0; i < OMAP4_MODULE_ID_MAX; i++) - mod44xx_init_info(i, MOD_INTERFACE_NONE, 0, OMAP4_CD_ID_MAX, OMAP4_PD_ID_MAX, OMAP4_VD_ID_MAX, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0}); + mod44xx_init_info(i, MOD_INTERFACE_NONE, 0, OMAP4_CD_ID_MAX, OMAP4_PD_ID_MAX, OMAP4_VD_ID_MAX, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}); dprintf("OMAP4_MODULE_ID_MAX = %d\n", OMAP4_MODULE_ID_MAX); /* Voltage domain: LDO_WKUP, Power domain: WKUP, Functional clock domain = WKUP */ - mod44xx_init_info(OMAP4_L4WKUP, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_L4WKUP_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_L4WKUP_CONTEXT, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_CONTROL_GEN_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_GEN_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_CONTROL_PADCONF_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_PADCONF_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_WDT2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_WDT2_WDSC, (unsigned int *) OMAP4430_CM_WKUP_WDT2_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT2_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_GPIO1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPIO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_GPIO1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_GPIO1_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_TIMER1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPT1_TIOCP_CFG, (unsigned int *) OMAP4430_CM_WKUP_TIMER1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER1_CONTEXT, OMAP4_GPT1_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_SYNCTIMER, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_SYNCTIMER_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT, OMAP4_FUNC_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_SARRAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_SARRAM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SARRAM_CONTEXT, OMAP4_L4_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_KEYBOARD, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_KBD_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_KEYBOARD_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_L4WKUP, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_L4WKUP_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_L4WKUP_CONTEXT, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_CONTROL_GEN_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_GEN_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_CONTROL_PADCONF_WKUP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_CONTROL_PADCONF_WKUP_SYSCONFIG, NULL, NULL, OMAP4_WKUP_L4_ICLK2, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_WDT2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_WDT2_WDSC, (unsigned int *) OMAP4430_CM_WKUP_WDT2_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT2_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_GPIO1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPIO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_GPIO1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_GPIO1_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_TIMER1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_GPT1_TIOCP_CFG, (unsigned int *) OMAP4430_CM_WKUP_TIMER1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER1_CONTEXT, OMAP4_GPT1_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_SYNCTIMER, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_SYNCTIMER_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT, OMAP4_FUNC_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_SARRAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_SARRAM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_SARRAM_CONTEXT, OMAP4_L4_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_KEYBOARD, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, OMAP4430_KBD_SYSCONFIG, (unsigned int *) OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_KEYBOARD_CONTEXT, OMAP4_WKUP_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); /* HS/EMU device only, not accessible for non-secure world */ - mod44xx_init_info(OMAP4_TIMER12, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_TIMER12_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER12_CONTEXT, OMAP4_GPT12_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_WDT1, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_WDT1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT1_CONTEXT, OMAP4_SECURE_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_USIM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_USIM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_USIM_CONTEXT, OMAP4_USIM_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 9.142858, 9.142858, 9.142858, 9.142858, 9.142858}); + mod44xx_init_info(OMAP4_TIMER12, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_TIMER12_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_TIMER12_CONTEXT, OMAP4_GPT12_FCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_WDT1, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_WDT1_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_WDT1_CONTEXT, OMAP4_SECURE_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_USIM, MOD_INTERFACE_NONE, 0, OMAP4_CD_WKUP, OMAP4_PD_WKUP, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_WKUP_USIM_CLKCTRL, (unsigned int *) OMAP4430_RM_WKUP_USIM_CONTEXT, OMAP4_USIM_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 9.142858, 9.142858, 9.142858, 9.142858, 9.142858, 9.142858}); /* end of HS/EMU device only */ /* Voltage domain: LDO_WKUP, Power domain: WKUP, Functional clock domain = NONE */ /* Voltage domain: LDO_WKUP, Power domain: EMU, Functional clock domain = EMU */ - mod44xx_init_info(OMAP4_DEBUGSS, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMU, OMAP4_PD_EMU, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, (unsigned int *) OMAP4430_RM_EMU_DEBUGSS_CONTEXT, OMAP4_CORE_DPLL_EMU_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 207.407, 266.666687, 266.666687, 310.4}); + mod44xx_init_info(OMAP4_DEBUGSS, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMU, OMAP4_PD_EMU, OMAP4_LDO_WKUP, NULL, (unsigned int *) OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, (unsigned int *) OMAP4430_RM_EMU_DEBUGSS_CONTEXT, OMAP4_CORE_DPLL_EMU_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 207.407, 266.666687, 266.666687, 266.666687, 266.666687}); /* Voltage domain: VDD_MPU, Power domain: MPU, Functional clock domain = MPU */ - mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 396.800018, 800.0, 1100.0, 1300, 1500}); + mod44xx_init_info(OMAP4_MPU, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU, OMAP4_PD_MPU, OMAP4_VDD_MPU, NULL, (unsigned int *) OMAP4430_CM_MPU_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_MPU_CONTEXT, OMAP4_MPU_DPLL_CLK, (double[OPP44XX_ID_MAX]) {196.608, 396.800018, 800.0, 1100.0, 1300, 1500, -1.0}); /* Voltage domain: VDD_MPU, Power domain: ALWON_MPU, Functional clock domain = NONE */ /* Voltage domain: VDD_IVA, Power domain: ABE, Functional clock domain = ABE */ - mod44xx_init_info(OMAP4_L4_ABE, MOD_INTERFACE_NONE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM1_ABE_L4ABE_CLKCTRL, NULL, OMAP4_ABE_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 49.152, 98.304, 98.304, 98.304, 98.304}); - mod44xx_init_info(OMAP4_AESS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_AESS_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_AESS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_AESS_CONTEXT, OMAP4_AESS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 98.304, 196.608, 196.608, 196.608, 196.608}); - mod44xx_init_info(OMAP4_MCPDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCPDM_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_PDM_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_PDM_CONTEXT, OMAP4_PAD_CLKS, (double[OPP44XX_ID_MAX]) {19.2, 19.2, 19.2, 19.2, 19.2, 19.2}); - mod44xx_init_info(OMAP4_DMIC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_DMIC_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_DMIC_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_DMIC_CONTEXT, OMAP4_DMIC_ABE_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576}); - mod44xx_init_info(OMAP4_MCASP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCASP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCASP_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCASP_CONTEXT, OMAP4_MCASP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 98.0, 98.0, 98.0, 98.0, 98.0}); - mod44xx_init_info(OMAP4_MCBSP1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP1_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP1_CONTEXT, OMAP4_MCBSP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MCBSP2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP2_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP2_CONTEXT, OMAP4_MCBSP2_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MCBSP3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP3_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP3_CONTEXT, OMAP4_MCBSP3_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_SLIMBUS1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_SLIMBUS1_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_SLIMBUS_CONTEXT, OMAP4_SLIMBUS_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576}); - mod44xx_init_info(OMAP4_TIMER5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT5_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER5_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER5_CONTEXT, OMAP4_ABE_GPT5_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT6_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER6_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER6_CONTEXT, OMAP4_ABE_GPT6_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER7, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT7_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER7_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER7_CONTEXT, OMAP4_ABE_GPT7_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER8, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT8_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER8_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER8_CONTEXT, OMAP4_ABE_GPT8_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_WDT3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_WDT3_WDSC, (unsigned int *) OMAP4430_CM1_ABE_WDT3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_WDT3_CONTEXT, OMAP4_ABE_ALWON_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_L4_ABE, MOD_INTERFACE_NONE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM1_ABE_L4ABE_CLKCTRL, NULL, OMAP4_ABE_ICLK2, (double[OPP44XX_ID_MAX]) {49.152, 49.152, 98.304, 98.304, 98.304, 98.304, -1.0}); + mod44xx_init_info(OMAP4_AESS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_AESS_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_AESS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_AESS_CONTEXT, OMAP4_AESS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 98.304, 196.608, 196.608, 196.608, 196.608, -1.0}); + mod44xx_init_info(OMAP4_MCPDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCPDM_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_PDM_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_PDM_CONTEXT, OMAP4_PAD_CLKS, (double[OPP44XX_ID_MAX]) {19.2, 19.2, 19.2, 19.2, 19.2, 19.2, -1.0}); + mod44xx_init_info(OMAP4_DMIC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_DMIC_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_DMIC_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_DMIC_CONTEXT, OMAP4_DMIC_ABE_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCASP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCASP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCASP_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCASP_CONTEXT, OMAP4_MCASP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP1_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP1_CONTEXT, OMAP4_MCBSP1_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP2_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP2_CONTEXT, OMAP4_MCBSP2_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_MCBSP3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_MCBSP3_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_MCBSP3_CONTEXT, OMAP4_MCBSP3_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_SLIMBUS1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_SLIMBUS1_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM1_ABE_SLIMBUS_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_SLIMBUS_CONTEXT, OMAP4_SLIMBUS_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, -1.0}); + mod44xx_init_info(OMAP4_TIMER5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT5_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER5_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER5_CONTEXT, OMAP4_ABE_GPT5_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_TIMER6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT6_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER6_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER6_CONTEXT, OMAP4_ABE_GPT6_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_TIMER7, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT7_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER7_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER7_CONTEXT, OMAP4_ABE_GPT7_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_TIMER8, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_GPT8_TIOCP_CFG, (unsigned int *) OMAP4430_CM1_ABE_TIMER8_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_TIMER8_CONTEXT, OMAP4_ABE_GPT8_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, -1.0}); + mod44xx_init_info(OMAP4_WDT3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_ABE, OMAP4_PD_ABE, OMAP4_VDD_IVA, OMAP4430_WDT3_WDSC, (unsigned int *) OMAP4430_CM1_ABE_WDT3_CLKCTRL, (unsigned int *) OMAP4430_RM_ABE_WDT3_CONTEXT, OMAP4_ABE_ALWON_32K_CLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, -1.0}); /* Voltage domain: VDD_IVA, Power domain: IVAHD, Functional clock domain = IVAHD */ - mod44xx_init_info(OMAP4_IVAHD, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IVAHD_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ICONT1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ICONT2, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_VDMA, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_IME3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_IPE3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ILF3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_MC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_CALC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ECD3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ICONT1_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ICONT2_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ILF3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_IME3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_CALC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_IPE3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_MC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_ECD3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); - mod44xx_init_info(OMAP4_SL2, MOD_INTERFACE_NONE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM_IVAHD_SL2_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_SL2_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 499.2}); + mod44xx_init_info(OMAP4_IVAHD, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IVAHD_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT2, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_VDMA, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IME3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IPE3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ILF3, MOD_INTERFACE_DUAL, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_CALC3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ECD3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT1_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT1_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ICONT2_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ICONT2_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ILF3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ILF3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IME3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IME3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_CALC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_CALC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_IPE3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_IPE3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MC3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_MC3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_ECD3_SB, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, OMAP4430_ECD3_SB_SYSCONFIG, (unsigned int *) OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_IVAHD_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_SL2, MOD_INTERFACE_NONE, 0, OMAP4_CD_IVA_HD, OMAP4_PD_IVA_HD, OMAP4_VDD_IVA, NULL, (unsigned int *) OMAP4430_CM_IVAHD_SL2_CLKCTRL, (unsigned int *) OMAP4430_RM_IVAHD_SL2_CONTEXT, OMAP4_IVAHD_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 133.028580, 266.057159, 330.7, 430.1, 500.00002, -1.0}); /* Voltage domain: VDD_IVA, Power domain: DSP, Functional clock domain = DSP */ - mod44xx_init_info(OMAP4_DSP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_DSP_SYSC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 499.2}); - mod44xx_init_info(OMAP4_MMU_DSP, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_MMU_DSP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 499.2}); - mod44xx_init_info(OMAP4_DSP_WUGEN, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_ALWON_IVA, OMAP4_VDD_IVA, OMAP4430_DSP_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 499.2}); + mod44xx_init_info(OMAP4_DSP, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_DSP_SYSC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_MMU_DSP, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSP, OMAP4_PD_DSP, OMAP4_VDD_IVA, OMAP4430_MMU_DSP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 500.00002, -1.0}); + mod44xx_init_info(OMAP4_DSP_WUGEN, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSP, OMAP4_PD_ALWON_IVA, OMAP4_VDD_IVA, OMAP4430_DSP_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSP_DSP_CLKCTRL, (unsigned int *) OMAP4430_RM_DSP_DSP_CONTEXT, OMAP4_DSP_ROOT_CLK, (double[OPP44XX_ID_MAX]) {98.304, 232.8, 465.6, 496.0, 430.1, 500.00002, -1.0}); /* Voltage domain: VDD_CORE, Power domain: ALWON_CORE, Functional clock domain = AO_L4 */ - mod44xx_init_info(OMAP4_SMARTREFLEX_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_CORE, (unsigned int *) OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_CORE_CONTEXT, OMAP4_SR_CORE_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_SMARTREFLEX_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_MPU, (unsigned int *) OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_MPU_CONTEXT, OMAP4_SR_MPU_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_SMARTREFLEX_IVA, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_IVA, (unsigned int *) OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_IVA_CONTEXT, OMAP4_SR_IVA_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_SMARTREFLEX_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_CORE, (unsigned int *) OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_CORE_CONTEXT, OMAP4_SR_CORE_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_SMARTREFLEX_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_MPU, (unsigned int *) OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_MPU_CONTEXT, OMAP4_SR_MPU_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_SMARTREFLEX_IVA, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_AO_L4, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_ERRCONFIG_IVA, (unsigned int *) OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, (unsigned int *) OMAP4430_RM_ALWON_SR_IVA_CONTEXT, OMAP4_SR_IVA_SYS_CLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L4CFG */ - mod44xx_init_info(OMAP4_L4_CFG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_L4_CFG_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_CONTROL_GEN_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_GEN_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_CONTROL_PADCONF_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_PADCONF_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_SPINLOCK, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SPINLOCK_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_HW_SEM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_SYSTEM_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SYSTEM_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); + mod44xx_init_info(OMAP4_L4_CFG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_L4_CFG_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_CONTROL_GEN_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_GEN_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_CONTROL_PADCONF_CORE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_CONTROL_PADCONF_CORE_SYSCONFIG, NULL, NULL, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_SPINLOCK, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SPINLOCK_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_HW_SEM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_SYSTEM_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_SYSTEM_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); /* TODO: CHECK IF REGISTER ACCESSIBLE FROM MPU mod44xx_init_info(OMAP4_IVAHD_MAILBOX, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_IVAHD_MBX_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_MAILBOX_CONTEXT, OMAP4_UNDEF_CLK, 0.0); */ - mod44xx_init_info(OMAP4_SAR_ROM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); + mod44xx_init_info(OMAP4_SAR_ROM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4CFG, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT, OMAP4_CFG_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = C2C */ - mod44xx_init_info(OMAP4_C2C, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_CONTEXT, OMAP4_C2C_L3X2_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_C2C_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_FW_CONTEXT, OMAP4_C2C_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_ICR_MDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MDM_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_ICR_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MPU_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); + mod44xx_init_info(OMAP4_C2C, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_CONTEXT, OMAP4_C2C_L3X2_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_C2C_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_C2C_C2C_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_C2C_C2C_FW_CONTEXT, OMAP4_C2C_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_ICR_MDM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MDM_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_ICR_MPU, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_C2C, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_ICR_MPU_SYS_CONFIG, NULL, NULL, OMAP4_C2C_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = DMA */ - mod44xx_init_info(OMAP4_SDMA, MOD_INTERFACE_DUAL, 1, OMAP4_CD_DMA, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMA4_SYSCONFIG, (unsigned int *) OMAP4430_CM_SDMA_SDMA_CLKCTRL, (unsigned int *) OMAP4430_RM_SDMA_SDMA_CONTEXT, OMAP4_DMA_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); + mod44xx_init_info(OMAP4_SDMA, MOD_INTERFACE_DUAL, 1, OMAP4_CD_DMA, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMA4_SYSCONFIG, (unsigned int *) OMAP4430_CM_SDMA_SDMA_CLKCTRL, (unsigned int *) OMAP4430_RM_SDMA_SDMA_CONTEXT, OMAP4_DMA_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = MPU_M3 */ - mod44xx_init_info(OMAP4_MPU_M3, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU_M3, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_MPU_M3_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); + mod44xx_init_info(OMAP4_MPU_M3, MOD_INTERFACE_NONE, 0, OMAP4_CD_MPU_M3, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_MPU_M3_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); /* TODO: FURTHER CHECK mod44xx_init_info(OMAP4_MPU_M3_WUGEN, MOD_INTERFACE_DUAL, 0, OMAP4_CD_MPU_M3, OMAP4_PD_ALWON_CORE, OMAP4_VDD_CORE, OMAP4430_MPU_M3_WUGEN_SYSCONFIG, (unsigned int *) OMAP4430_CM_MPU_M3_MPU_M3_CLKCTRL, (unsigned int *) OMAP4430_RM_MPU_M3_MPU_M3_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0); */ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = NONE */ /* TODO: FURTHER CHECK WHEN MODULE IS ACCESSIBLE mod44xx_init_info(OMAP4_MMU_MPU_M3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_NONE, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_MMU_MPU_M3_SYSCONFIG, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0); */ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_1 */ - mod44xx_init_info(OMAP4_L3_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_1, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_1_L3_1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_1_L3_1_CONTEXT, OMAP4_L3_ICLK1, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); + mod44xx_init_info(OMAP4_L3_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_1, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_1_L3_1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_1_L3_1_CONTEXT, OMAP4_L3_ICLK1, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_2 */ - mod44xx_init_info(OMAP4_L3_2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_L3_2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_L3_2_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_GPMC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_GPMC_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3_2_GPMC_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_GPMC_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_OCMC_RAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); + mod44xx_init_info(OMAP4_L3_2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_L3_2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_L3_2_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_GPMC, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_GPMC_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3_2_GPMC_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_GPMC_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_OCMC_RAM, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_2, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL, (unsigned int *) OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT, OMAP4_L3_ICLK2, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = L3_INSTR */ - mod44xx_init_info(OMAP4_L3_3, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_3_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_L3_INSTR, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_OCP_WP1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); + mod44xx_init_info(OMAP4_L3_3, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_3_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_L3_INSTR, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_OCP_WP1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INSTR, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT, OMAP4_L3_INSTR_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = EMIF */ - mod44xx_init_info(OMAP4_DMM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMM_SYSCONFIG, (unsigned int *) OMAP4430_CM_MEMIF_DMM_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DMM_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_EMIF_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_EMIF1, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_1_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_EMIF2, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_2_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 400.0, 800.0, 931.2,800.0, 931.2}); - mod44xx_init_info(OMAP4_DLL, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_DLL_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DLL_CONTEXT, OMAP4_DLL_CLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 100.0, 116.666672, 100.0, 116.666672}); + mod44xx_init_info(OMAP4_DMM, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, OMAP4430_DMM_SYSCONFIG, (unsigned int *) OMAP4430_CM_MEMIF_DMM_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DMM_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_EMIF_FW, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_EMIF1, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_1_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_EMIF2, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_EMIF_2_CONTEXT, OMAP4_EMIF_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666666, 200.0, 200.0, 233.333344, 116.666666}); + mod44xx_init_info(OMAP4_DDRPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_PHY_ROOT_CLK, (double[OPP44XX_ID_MAX]) {196.608, 400.0, 466.0, 800.0, 400.0, 931.2, 465.6}); + mod44xx_init_info(OMAP4_DLL, MOD_INTERFACE_NONE, 0, OMAP4_CD_EMIF, OMAP4_PD_CORE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_MEMIF_DLL_CLKCTRL, (unsigned int *) OMAP4430_RM_MEMIF_DLL_CONTEXT, OMAP4_DLL_CLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 116.666672, 100.0, 100.0, 116.666672, 116.666666}); /* Voltage domain: VDD_CORE, Power domain: STD_EFUSE, Functional clock domain = STD_EFUSE */ - mod44xx_init_info(OMAP4_STD_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_STD_EFUSE, OMAP4_PD_STD_EFUSE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_STD_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_STD_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_STD_EFUSE, OMAP4_PD_STD_EFUSE, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_STD_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); /* Voltage domain: VDD_CORE, Power domain: CUST_EFUSE, Functional clock domain = CUST_EFUSE */ /* HS/EMU device only */ - mod44xx_init_info(OMAP4_CUST_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_CUST_EFUSE, OMAP4_PD_CUST_EFUSE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL, (unsigned int *) OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT, OMAP4_CUST_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_CUST_EFUSE, MOD_INTERFACE_NONE, 0, OMAP4_CD_CUST_EFUSE, OMAP4_PD_CUST_EFUSE, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL, (unsigned int *) OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT, OMAP4_CUST_EFUSE_SYS_CLK, (double[OPP44XX_ID_MAX]) {-1.0, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); /* end of HS/EMU device only */ /* Voltage domain: VDD_CORE, Power domain: ALWON_CORE, Functional clock domain = NONE */ @@ -933,100 +933,100 @@ /* Voltage domain: VDD_CORE, Power domain: CORE, Functional clock domain = NONE */ /* Voltage domain: VDD_CORE, Power domain: CAM, Functional clock domain = CAM */ - mod44xx_init_info(OMAP4_ISS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISS_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_CCP2, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CCP2_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_CSI2_A, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_A_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_CSI2_B, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_B_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_TCTRL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_TCTRL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_BTE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_BTE_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_CBUFF, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CBUFF_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_ISP5, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISP5_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_RSZ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_RSZ_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_SIMCOP, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_SIMCOP_DMA, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DMA_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_SIMCOP_DCT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DCT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_SIMCOP_VLCDJ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_VLCDJ_CTRL, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_SIMCOP_ROT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_ROT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687}); - mod44xx_init_info(OMAP4_FDIF, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_FDIF_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_FDIF_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_FDIF_CONTEXT, OMAP4_FDIF_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 64.0, 128.0, 128.0, 128.0, 128.0}); + mod44xx_init_info(OMAP4_ISS, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISS_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_CCP2, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CCP2_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_CSI2_A, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_A_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_CSI2_B, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CSI2_B_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_TCTRL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_TCTRL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_BTE, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_BTE_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_CBUFF, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_CBUFF_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_ISP5, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_ISP5_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_RSZ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_RSZ_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_SIMCOP, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_SIMCOP_DMA, MOD_INTERFACE_MASTER, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DMA_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_SIMCOP_DCT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_DCT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_SIMCOP_VLCDJ, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_VLCDJ_CTRL, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, 233.33334}); + mod44xx_init_info(OMAP4_SIMCOP_ROT, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_SIMCOP_ROT_CFG, (unsigned int *) OMAP4430_CM_CAM_ISS_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_ISS_CONTEXT, OMAP4_ISS_CLK, (double[OPP44XX_ID_MAX]) {196.608, 200.0, 233.33334, 400.0, 400.0, 466.666687, -1.0}); + mod44xx_init_info(OMAP4_FDIF, MOD_INTERFACE_DUAL, 0, OMAP4_CD_CAM, OMAP4_PD_CAM, OMAP4_VDD_CORE, OMAP4430_FDIF_SYSCONFIG, (unsigned int *) OMAP4430_CM_CAM_FDIF_CLKCTRL, (unsigned int *) OMAP4430_RM_CAM_FDIF_CONTEXT, OMAP4_FDIF_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 64.0, 128.0, 128.0, 128.0, 128.0, 128.0}); /* Voltage domain: VDD_CORE, Power domain: DSS, Functional clock domain = DSS */ - mod44xx_init_info(OMAP4_DISPC, MOD_INTERFACE_DUAL, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DISPC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, 170.666673, 170.666673, 170.666673}); - mod44xx_init_info(OMAP4_DSI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, 170.666673, 170.666673, 170.666673}); - mod44xx_init_info(OMAP4_DSI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 170.666673, 170.666673, 170.666673, 170.666673}); - mod44xx_init_info(OMAP4_HDMI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_HDMI_WP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_HDMI_PHY_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_RFBI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_RFBI_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0, 0.0}); - mod44xx_init_info(OMAP4_BB2D, MOD_INTERFACE_NONE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_DSS_BB2D_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_BB2D_CONTEXT, OMAP4_BB2D_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 192.000008, 192.000008, 307.2, 384.0, 384.0}); + mod44xx_init_info(OMAP4_DISPC, MOD_INTERFACE_DUAL, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DISPC_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 85.333335, 170.666673, 170.666673, 170.666673, 170.666673}); + mod44xx_init_info(OMAP4_DSI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 85.333335, 170.666673, 170.666673, 170.666673, 170.666673}); + mod44xx_init_info(OMAP4_DSI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_DSI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_DSS_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 170.666673, 85.333335, 170.666673, 170.666673, 170.666673, 170.666673}); + mod44xx_init_info(OMAP4_HDMI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_HDMI_WP_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_HDMI_PHY_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_RFBI, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, OMAP4430_RFBI_SYSCONFIG, (unsigned int *) OMAP4430_CM_DSS_DSS_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_DSS_CONTEXT, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}); + mod44xx_init_info(OMAP4_BB2D, MOD_INTERFACE_NONE, 0, OMAP4_CD_DSS, OMAP4_PD_DSS, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_DSS_BB2D_CLKCTRL, (unsigned int *) OMAP4430_RM_DSS_BB2D_CONTEXT, OMAP4_BB2D_FCLK, (double[OPP44XX_ID_MAX]) {0.0, 192.000008, 192.000008, 307.2, 384.0, 384.0, 307.2}); /* Voltage domain: VDD_CORE, Power domain: GFX, Functional clock domain = GFX */ - mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 192.000008, 192.000008, 307.2, 384.0, 384.0}); + mod44xx_init_info(OMAP4_GFX, MOD_INTERFACE_DUAL, 0, OMAP4_CD_GFX, OMAP4_PD_GFX, OMAP4_VDD_CORE, OMAP4430_GFX_SYSCONFIG, (unsigned int *) OMAP4430_CM_GFX_GFX_CLKCTRL, (unsigned int *) OMAP4430_RM_GFX_GFX_CONTEXT, OMAP4_GFX_FCLK, (double[OPP44XX_ID_MAX]) {98.304, 153.6, 192.000008, 307.2, 384.0, 384.0, 307.2}); /* Voltage domain: VDD_CORE, Power domain: L3_INIT, Functional clock domain = L3_INIT */ - mod44xx_init_info(OMAP4_MMC1, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MMC1_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MMC2, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MMC2_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_HSI, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSI_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_HSI_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_HSI_CONTEXT, OMAP4_HSI_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_MMC1, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_MMC1_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC1_CONTEXT, OMAP4_MMC1_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_MMC2, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_MMC2_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSMMC2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_MMC2_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_MMC2_CONTEXT, OMAP4_MMC2_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_HSI, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSI_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_HSI_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_HSI_CONTEXT, OMAP4_HSI_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); /* UNIPRO1 only in ES1.0 */ - mod44xx_init_info(OMAP4_UNIPRO1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UNIPRO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT, OMAP4_UNIPRO1_PHY_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_HSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UHH_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_HSUSBOTG, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSUSBOTG_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_OTG_CONTEXT, OMAP4_OTG_60M_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 60.0, 60.0, 60.0, 60.0, 60.0}); - mod44xx_init_info(OMAP4_USBTLL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_USBTLL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_TLL_CONTEXT, OMAP4_INIT_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, 60.0, 60.0, 60.0}); - mod44xx_init_info(OMAP4_P1500, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_P1500_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_P1500_CONTEXT, OMAP4_INIT_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_FSUSBHOST, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {-1.0, -1.0, -1.0, -1.0, -1.0, -1.0}); - mod44xx_init_info(OMAP4_USBPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT, OMAP4_INIT_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_UNIPRO1, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UNIPRO1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT, OMAP4_UNIPRO1_PHY_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_HSUSBHOST, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_UHH_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_HOST_CONTEXT, OMAP4_INIT_48MC_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_HSUSBOTG, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_HSUSBOTG_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_OTG_CONTEXT, OMAP4_OTG_60M_FCLK, (double[OPP44XX_ID_MAX]) {-1.0, 60.0, 60.0, 60.0, 60.0, 60.0, 60.0}); + mod44xx_init_info(OMAP4_USBTLL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, OMAP4430_USBTLL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USB_TLL_CONTEXT, OMAP4_INIT_60M_FCLK, (double[OPP44XX_ID_MAX]) {60.0, 60.0, 60.0, 60.0, 60.0, 60.0, 60.0}); + mod44xx_init_info(OMAP4_P1500, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_P1500_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_P1500_CONTEXT, OMAP4_INIT_L3_ICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344, 233.333344}); + mod44xx_init_info(OMAP4_FSUSBHOST, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, NULL, NULL, OMAP4_UNDEF_CLK, (double[OPP44XX_ID_MAX]) {-1.0, -1.0, -1.0, -1.0, -1.0, -1.0, -1.0}); + mod44xx_init_info(OMAP4_USBPHY, MOD_INTERFACE_NONE, 0, OMAP4_CD_L3_INIT, OMAP4_PD_L3_INIT, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, (unsigned int *) OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT, OMAP4_INIT_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); /* Voltage domain: VDD_CORE, Power domain: L3_INIT, Functional clock domain = NONE */ /* Voltage domain: VDD_CORE, Power domain: L4_PER, Functional clock domain = L4_SEC */ /* HS/EMU device only, not accessible for non-secure world */ - mod44xx_init_info(OMAP4_CRYPTODMA, MOD_INTERFACE_NONE, 1, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_AES1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES1_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_AES2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES2_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_SHA2MD5_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344}); - mod44xx_init_info(OMAP4_RNG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_RNG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_RNG_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_DES3DES, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_DES3DES_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_DES3DES_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_PKAEIP29, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); + mod44xx_init_info(OMAP4_CRYPTODMA, MOD_INTERFACE_NONE, 1, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344, 233.333344}); + mod44xx_init_info(OMAP4_AES1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES1_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344, 233.333344}); + mod44xx_init_info(OMAP4_AES2, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_AES2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_AES2_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344, 233.333344}); + mod44xx_init_info(OMAP4_SHA2MD5_1, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT, OMAP4_L3_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {98.304, 100.0, 233.333344, 200.0, 233.333344, 233.333344}); + mod44xx_init_info(OMAP4_RNG, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_RNG_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_RNG_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_DES3DES, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_DES3DES_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_DES3DES_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_PKAEIP29, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_SEC, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL, (unsigned int *) OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT, OMAP4_L4_SECURE_GICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); /* end of HS/EMU device only */ /* Voltage domain: VDD_CORE, Power domain: L4_PER, Functional clock domain = L4_PER */ - mod44xx_init_info(OMAP4_TIMER10, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT10_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER10_CONTEXT, OMAP4_GPT10_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER11, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT11_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER11_CONTEXT, OMAP4_GPT11_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT2_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER2_CONTEXT, OMAP4_GPT2_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT3_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER3_CONTEXT, OMAP4_GPT3_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT4_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER4_CONTEXT, OMAP4_GPT4_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_TIMER9, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT9_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER9_CONTEXT, OMAP4_GPT9_FCLK, (double[OPP44XX_ID_MAX]) {12.288, 38.4, 38.4, 38.4, 38.4, 38.4}); - mod44xx_init_info(OMAP4_ELM, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_ELM_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_ELM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_ELM_CONTEXT, OMAP4_PER_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_GPIO2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO2_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_GPIO3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO3_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_GPIO4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO4_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_GPIO5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO5_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_GPIO6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO6_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO6_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO6_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); - mod44xx_init_info(OMAP4_HDQ1W, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_HDQ_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_HDQ1W_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_HDQ1W_CONTEXT, OMAP4_12M_FCLK, (double[OPP44XX_ID_MAX]) {6.144, 12.0, 12.0, 12.0, 12.0, 12.0}); - mod44xx_init_info(OMAP4_I2C1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C1_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_I2C2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C2_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_I2C3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C3_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_I2C4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C4_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_L4_PER, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4PER_L4PER_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_L4_PER_CONTEXT, OMAP4_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672}); - mod44xx_init_info(OMAP4_MCBSP4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCBSP4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCBSP4_CONTEXT, OMAP4_PER_MCBSP4_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0}); - mod44xx_init_info(OMAP4_MCSPI1_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI2_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI3_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI4_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MCSPI4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC3, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC3_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC4, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC4_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_SLIMBUS2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_SLIMBUS2_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT, OMAP4_SLIMBUS_CORE_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576}); - mod44xx_init_info(OMAP4_UART1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_UART2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_UART3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_UART4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC5, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); - mod44xx_init_info(OMAP4_MMC5_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_TIMER10, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT10_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER10_CONTEXT, OMAP4_GPT10_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_TIMER11, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT11_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER11_CONTEXT, OMAP4_GPT11_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_TIMER2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT2_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER2_CONTEXT, OMAP4_GPT2_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_TIMER3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT3_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER3_CONTEXT, OMAP4_GPT3_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_TIMER4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT4_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER4_CONTEXT, OMAP4_GPT4_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_TIMER9, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPT9_TIOCP_CFG, (unsigned int *) OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_DMTIMER9_CONTEXT, OMAP4_GPT9_FCLK, (double[OPP44XX_ID_MAX]) {38.4, 38.4, 38.4, 38.4, 38.4, 38.4, 38.4}); + mod44xx_init_info(OMAP4_ELM, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_ELM_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_ELM_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_ELM_CONTEXT, OMAP4_PER_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_GPIO2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO2_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_GPIO3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO3_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_GPIO4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO4_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_GPIO5, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO5_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_GPIO6, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_GPIO6_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_GPIO6_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_GPIO6_CONTEXT, OMAP4_PER_32K_GFCLK, (double[OPP44XX_ID_MAX]) {0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768, 0.032768}); + mod44xx_init_info(OMAP4_HDQ1W, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_HDQ_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_HDQ1W_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_HDQ1W_CONTEXT, OMAP4_12M_FCLK, (double[OPP44XX_ID_MAX]) {6.144, 12.0, 12.0, 12.0, 12.0, 12.0, 12.0}); + mod44xx_init_info(OMAP4_I2C1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C1_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_I2C2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C2_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_I2C3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C3_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_I2C4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_I2C4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_I2C4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_I2C4_CONTEXT, OMAP4_PER_96M_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_L4_PER, MOD_INTERFACE_NONE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, NULL, (unsigned int *) OMAP4430_CM_L4PER_L4PER_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_L4_PER_CONTEXT, OMAP4_L4_ICLK, (double[OPP44XX_ID_MAX]) {49.152, 50.0, 58.333336, 100.0, 100.0, 116.666672, 58.333336}); + mod44xx_init_info(OMAP4_MCBSP4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCBSP4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCBSP4_CONTEXT, OMAP4_PER_MCBSP4_FCLK, (double[OPP44XX_ID_MAX]) {49.152, 96.0, 96.0, 96.0, 96.0, 96.0, 96.0}); + mod44xx_init_info(OMAP4_MCSPI1_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI1, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI1_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI2_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI2, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI2_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI3_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI3, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI4_HL, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MCSPI4, MOD_INTERFACE_SLAVE, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MCSPI4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MCSPI4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC3, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC3_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS3_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC4, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC4_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS4_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_SLIMBUS2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_SLIMBUS2_CMP_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT, OMAP4_SLIMBUS_CORE_UCLKS, (double[OPP44XX_ID_MAX]) {24.576, 24.576, 24.576, 24.576, 24.576, 24.576, 24.576}); + mod44xx_init_info(OMAP4_UART1, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART1_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART1_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART1_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_UART2, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART2_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART2_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART2_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_UART3, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART3_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART3_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART3_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_UART4, MOD_INTERFACE_SLAVE, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_UART4_SYSC, (unsigned int *) OMAP4430_CM_L4PER_UART4_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_UART4_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC5, MOD_INTERFACE_DUAL, 1, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); + mod44xx_init_info(OMAP4_MMC5_HL, MOD_INTERFACE_DUAL, 0, OMAP4_CD_L4_PER, OMAP4_PD_L4_PER, OMAP4_VDD_CORE, OMAP4430_MMCHS5_HL_SYSCONFIG, (unsigned int *) OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, (unsigned int *) OMAP4430_RM_L4PER_MMCSD5_CONTEXT, OMAP4_PER_48M_FCLK, (double[OPP44XX_ID_MAX]) {24.576, 48.0, 48.0, 48.0, 48.0, 48.0, 48.0}); return 0; } diff -Nru tiomapconf-1.50.0/omap4/module44xx.c tiomapconf-1.52.0/omap4/module44xx.c --- tiomapconf-1.50.0/omap4/module44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/module44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -552,6 +552,7 @@ extract_bit(sysconfig, 9); ret_val = 1; dprintf("%s(): module %s AUTOIDLE bit 9 = %d\n", + __func__, mod44xx_get_name(module_id, name), *mode); break; diff -Nru tiomapconf-1.50.0/omap4/opp44xx.c tiomapconf-1.52.0/omap4/opp44xx.c --- tiomapconf-1.50.0/omap4/opp44xx.c 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/omap4/opp44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,870 @@ +/* + * + * @Component OMAPCONF + * @Filename opp44xx.c + * @Description OMAP4 OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* #define OPP44XX_DEBUG */ +#ifdef OPP44XX_DEBUG +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) +#else +#define dprintf(format, ...) +#endif + + +genlist vdd44xx_wkup_opp_list; +genlist vdd44xx_mpu_opp_list; +genlist vdd44xx_iva_opp_list; +genlist vdd44xx_core_opp_list; + +genlist *opp44xx_list_table[OMAP4_VD_ID_MAX] = { + &vdd44xx_wkup_opp_list, /* LDO_WKUP */ + &vdd44xx_mpu_opp_list, /* VDD_MPU */ + &vdd44xx_iva_opp_list, /* VDD_IVA */ + &vdd44xx_core_opp_list}; /* VDD_CORE */ + +static unsigned short opp44xx_init_done = 0; + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp4430_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp4430_init(void) +{ + + /* + * Fill nominal voltage field with Data Manual recommended voltages. + * Then convert it to a voltage that is achievable with SMPS + * (by considering SMPS voltage offset and step). + * This is easier to do it this way than looking at SMPS voltage table + * each time nominal voltage gets updated. + * + * As DPLL CASCADING OPP uses same nominal voltage as OPP50, set it at + * least 1 step lower than OPP50, so that it can be distinguished. + * OPP search by voltage will fail, but OPP search by rate should + * succeed. + */ + static opp_t opp_wkup_dpll_casc = { OPP_DPLL_CASC, 1060000, 49152}; + static opp_t opp_wkup_opp50 = { OPP_50, 1060000, 500000}; + static opp_t opp_wkup_opp100 = { OPP_100, 1060000, 100000}; + + static opp_t opp_mpu_dpll_casc = { OPP_DPLL_CASC, 1025000, 196608}; + static opp_t opp_mpu_opp50 = { OPP_50, 1025000, 300000}; + static opp_t opp_mpu_opp100 = { OPP_100, 1200000, 600000}; + static opp_t opp_mpu_turbo = { OPP_TURBO, 1325000, 800000}; + static opp_t opp_mpu_nitro = { OPP_NITRO, 1388000, 100800}; + static opp_t opp_mpu_nitrosb = { OPP_NITROSB, 1388000, 120000}; + + static opp_t opp_iva_dpll_casc = { OPP_DPLL_CASC, 950000, 98304}; + static opp_t opp_iva_opp50 = { OPP_50, 950000, 133028}; + static opp_t opp_iva_opp100 = { OPP_100, 1114000, 266057}; + static opp_t opp_iva_turbo = { OPP_TURBO, 1291000, 330700}; + + static opp_t opp_core_dpll_casc = { OPP_DPLL_CASC, 962000, 98304}; + static opp_t opp_core_opp50 = { OPP_50, 962000, 100000}; + static opp_t opp_core_opp100 = { OPP_100, 1127000, 200000}; + + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_dpll_casc, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp50, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp100, sizeof(opp_t)); + + opp_mpu_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_dpll_casc.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_dpll_casc, sizeof(opp_t)); + opp_mpu_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp50.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp50, sizeof(opp_t)); + opp_mpu_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp100.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp100, sizeof(opp_t)); + opp_mpu_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_turbo.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_turbo, sizeof(opp_t)); + opp_mpu_nitro.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitro.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitro, sizeof(opp_t)); + opp_mpu_nitrosb.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitrosb.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitrosb, sizeof(opp_t)); + + opp_iva_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_dpll_casc.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_dpll_casc, sizeof(opp_t)); + opp_iva_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp50.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp50, sizeof(opp_t)); + opp_iva_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp100.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp100, sizeof(opp_t)); + opp_iva_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_turbo.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_turbo, sizeof(opp_t)); + + opp_core_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_dpll_casc.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_dpll_casc, sizeof(opp_t)); + opp_core_opp50.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp50.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp50, sizeof(opp_t)); + opp_core_opp100.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp100.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp100, sizeof(opp_t)); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp4460_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp4460_init(void) +{ + static opp_t opp_wkup_dpll_casc = { OPP_DPLL_CASC, 1060000, 49152}; + static opp_t opp_wkup_opp50 = { OPP_50, 1060000, 50000}; + static opp_t opp_wkup_opp100 = { OPP_100, 1060000, 100000}; + + static opp_t opp_mpu_dpll_casc = { OPP_DPLL_CASC, 1025000, 196608}; + static opp_t opp_mpu_opp50 = { OPP_50, 1025000, 350000}; + static opp_t opp_mpu_opp100 = { OPP_100, 1203000, 700000}; + static opp_t opp_mpu_turbo = { OPP_TURBO, 1317000, 920000}; + static opp_t opp_mpu_nitro = { OPP_NITRO, 1380000, 1200000}; + static opp_t opp_mpu_nitrosb = { OPP_NITROSB, 1380000, 1500000}; + + static opp_t opp_iva_dpll_casc = { OPP_DPLL_CASC, 950000, 98304}; + static opp_t opp_iva_opp50 = { OPP_50, 950000, 133028}; + static opp_t opp_iva_opp100 = { OPP_100, 1114000, 266057}; + static opp_t opp_iva_turbo = { OPP_TURBO, 1291000, 330700}; + static opp_t opp_iva_nitro = { OPP_NITRO, 1375000, 430400}; + static opp_t opp_iva_nitrosb = { OPP_NITROSB, 1375000, 500000}; + + static opp_t opp_core_dpll_casc = { OPP_DPLL_CASC, 962000, 98304}; + static opp_t opp_core_opp50 = { OPP_50, 962000, 100000}; + static opp_t opp_core_opp100 = { OPP_100, 1127000, 200000}; + static opp_t opp_core_opp119 = { OPP_119, 1250000, 200000}; + + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_dpll_casc, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp50, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp100, sizeof(opp_t)); + + opp_mpu_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_dpll_casc.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_dpll_casc, sizeof(opp_t)); + opp_mpu_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp50.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp50, sizeof(opp_t)); + opp_mpu_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp100.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp100, sizeof(opp_t)); + opp_mpu_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_turbo.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_turbo, sizeof(opp_t)); + opp_mpu_nitro.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitro.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitro, sizeof(opp_t)); + opp_mpu_nitrosb.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitrosb.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitrosb, sizeof(opp_t)); + + opp_iva_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_dpll_casc.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_dpll_casc, sizeof(opp_t)); + opp_iva_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp50.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp50, sizeof(opp_t)); + opp_iva_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp100.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp100, sizeof(opp_t)); + opp_iva_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_turbo.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_turbo, sizeof(opp_t)); + opp_iva_nitro.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_nitro.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_nitro, sizeof(opp_t)); + opp_iva_nitrosb.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_nitrosb.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_nitrosb, sizeof(opp_t)); + + opp_core_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_dpll_casc.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_dpll_casc, sizeof(opp_t)); + opp_core_opp50.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp50.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp50, sizeof(opp_t)); + opp_core_opp100.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp100.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp100, sizeof(opp_t)); + opp_core_opp119.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp119.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp119, sizeof(opp_t)); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp4470_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp4470_init(void) +{ + static opp_t opp_wkup_dpll_casc = { OPP_DPLL_CASC, 1060000, 49152}; + static opp_t opp_wkup_opp50_low = { OPP_50_LOW, 1060000, 50000}; + static opp_t opp_wkup_opp50_high = { OPP_50_HIGH, 1060000, 58333}; + static opp_t opp_wkup_opp100_low = { OPP_100_LOW, 1060000, 100000}; + static opp_t opp_wkup_opp119_low = { OPP_119_LOW, 1060000, 100000}; + static opp_t opp_wkup_opp119_high = { OPP_119_HIGH, 1060000, 116666}; + + static opp_t opp_mpu_dpll_casc = { OPP_DPLL_CASC, 1037000, 196608}; + static opp_t opp_mpu_opp50 = { OPP_50, 1037000, 396800}; + static opp_t opp_mpu_opp100 = { OPP_100, 1200000, 800000}; + static opp_t opp_mpu_turbo = { OPP_TURBO, 1312000, 1100000}; + static opp_t opp_mpu_nitro = { OPP_NITRO, 1375000, 1300000}; + static opp_t opp_mpu_nitrosb = { OPP_NITROSB, 1387000, 1500000}; + + static opp_t opp_iva_dpll_casc = { OPP_DPLL_CASC, 962000, 98304}; + static opp_t opp_iva_opp50 = { OPP_50, 962000, 133028}; + static opp_t opp_iva_opp100 = { OPP_100, 1137000, 266057}; + static opp_t opp_iva_turbo = { OPP_TURBO, 1287000, 330700}; + static opp_t opp_iva_nitro = { OPP_NITRO, 1375000, 430100}; + static opp_t opp_iva_nitrosb = { OPP_NITROSB, 1380000, 500000}; + + static opp_t opp_core_dpll_casc = { OPP_DPLL_CASC, 980000, 98304}; + static opp_t opp_core_opp50_low = { OPP_50_LOW, 980000, 100000}; + static opp_t opp_core_opp50_high = { OPP_50_HIGH, 980000, 116666}; + static opp_t opp_core_opp100_low = { OPP_100_LOW, 1126000, 200000}; + static opp_t opp_core_opp100_high = { OPP_100_HIGH, 1126000, 116666}; + static opp_t opp_core_opp119_low = { OPP_119_LOW, 1190000, 200000}; + static opp_t opp_core_opp119_high = { OPP_119_HIGH, 1190000, 233333}; + + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_dpll_casc, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp50_low, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp50_high, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp100_low, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp119_low, sizeof(opp_t)); + genlist_addtail(&vdd44xx_wkup_opp_list, + (void *) &opp_wkup_opp119_high, sizeof(opp_t)); + + opp_mpu_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_dpll_casc.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_dpll_casc, sizeof(opp_t)); + opp_mpu_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp50.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp50, sizeof(opp_t)); + opp_mpu_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_opp100.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_opp100, sizeof(opp_t)); + opp_mpu_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_turbo.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_turbo, sizeof(opp_t)); + opp_mpu_nitro.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitro.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitro, sizeof(opp_t)); + opp_mpu_nitrosb.voltage = smps_voltage_round( + PMIC_SMPS_MPU, opp_mpu_nitrosb.voltage); + genlist_addtail(&vdd44xx_mpu_opp_list, + (void *) &opp_mpu_nitrosb, sizeof(opp_t)); + + opp_iva_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_dpll_casc.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_dpll_casc, sizeof(opp_t)); + opp_iva_opp50.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp50.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp50, sizeof(opp_t)); + opp_iva_opp100.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_opp100.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_opp100, sizeof(opp_t)); + opp_iva_turbo.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_turbo.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_turbo, sizeof(opp_t)); + opp_iva_nitro.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_nitro.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_nitro, sizeof(opp_t)); + opp_iva_nitrosb.voltage = smps_voltage_round( + PMIC_SMPS_MM, opp_iva_nitrosb.voltage); + genlist_addtail(&vdd44xx_iva_opp_list, + (void *) &opp_iva_nitrosb, sizeof(opp_t)); + + opp_core_dpll_casc.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_dpll_casc.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_dpll_casc, sizeof(opp_t)); + opp_core_opp50_low.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp50_low.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp50_low, sizeof(opp_t)); + opp_core_opp50_high.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp50_high.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp50_high, sizeof(opp_t)); + opp_core_opp100_low.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp100_low.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp100_low, sizeof(opp_t)); + opp_core_opp100_high.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp100_high.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp100_high, sizeof(opp_t)); + opp_core_opp119_low.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp119_low.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp119_low, sizeof(opp_t)); + opp_core_opp119_high.voltage = smps_voltage_round( + PMIC_SMPS_CORE, opp_core_opp119_high.voltage); + genlist_addtail(&vdd44xx_core_opp_list, + (void *) &opp_core_opp119_high, sizeof(opp_t)); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp44xx_init(void) +{ + #ifdef OPP44XX_DEBUG + opp_t opp; + int i, count; + voltdm44xx_id vdd; + char name[VOLTDM44XX_MAX_NAME_LENGTH]; + #endif + + if (!opp44xx_init_done) { + genlist_init(&vdd44xx_wkup_opp_list); + genlist_init(&vdd44xx_mpu_opp_list); + genlist_init(&vdd44xx_iva_opp_list); + genlist_init(&vdd44xx_core_opp_list); + + if (cpu_is_omap4430()) { + opp4430_init(); + } else if (cpu_is_omap4460()) { + opp4460_init(); + } else if (cpu_is_omap4470()) { + opp4470_init(); + } else { + fprintf(stderr, + "omapconf: %s(): cpu not supported!!!\n", + __func__); + } + opp44xx_init_done = 1; + + #ifdef OPP44XX_DEBUG + printf("%s(): init done.\n", __func__); + printf("OPP List:\n"); + for (vdd = OMAP4_LDO_WKUP; vdd <= OMAP4_VDD_CORE; vdd++) { + count = genlist_getcount( + (genlist *) opp44xx_list_table[vdd]); + voltdm44xx_get_name(vdd, name); + printf(" %s (%d): ", name, count); + for (i = 0; i < count; i++) { + genlist_get((genlist *) opp44xx_list_table[vdd], + i, (void *) &opp); + printf("%s (%.1lfMHz, %.3lfV)", + opp.name, khz2mhz(opp.rate), + uv2v(opp.voltage)); + if (i != count - 1) + printf(", "); + } + printf(".\n"); + } + #endif + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_deinit + * @BRIEF free dynamically allocated internal data. + * @DESCRIPTION free dynamically allocated internal data. + * MUST BE CALLED AT END OF EXECUTION. + *//*------------------------------------------------------------------------ */ +void opp44xx_deinit(void) +{ + if (opp44xx_init_done) { + genlist_free(&vdd44xx_wkup_opp_list); + genlist_free(&vdd44xx_mpu_opp_list); + genlist_free(&vdd44xx_iva_opp_list); + genlist_free(&vdd44xx_core_opp_list); + opp44xx_init_done = 0; + } + dprintf("%s(): deinit done.\n", __func__); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_id_get + * @BRIEF convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + * @RETURNS plaftorm-specific OPP ID (> 0) in case of success + * OMAPCONF_ERR_CPU + * @param[in] opp: OPP provided as a string (as defined in opp.h) + * @DESCRIPTION convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + *//*------------------------------------------------------------------------ */ +int opp44xx_id_get(const char *opp) +{ + CHECK_NULL_ARG(opp, OMAPCONF_ERR_ARG); + + if (strcasecmp(opp, OPP_DPLL_CASC) == 0) + return (int) OMAP4_OPPDPLL_CASC; + else if (strcasecmp(opp, OPP_50) == 0) + return (int) OMAP4_OPP50; + else if (strcasecmp(opp, OPP_100) == 0) + return (int) OMAP4_OPP100; + else if (strcasecmp(opp, OPP_TURBO) == 0) + return (int) OMAP4_OPP_TURBO; + else if (strcasecmp(opp, OPP_NITRO) == 0) + return (int) OMAP4_OPP_NITRO; + else if (strcasecmp(opp, OPP_NITROSB) == 0) + return (int) OMAP4_OPP_NITRO_SB; + else if (strcasecmp(opp, OPP_50_LOW) == 0) + return (int) OMAP447X_OPP50_LOW; + else if (strcasecmp(opp, OPP_50_HIGH) == 0) + return (int) OMAP447X_OPP50_HIGH; + else if (strcasecmp(opp, OPP_100_LOW) == 0) + return (int) OMAP447X_OPP100_LOW; + else if (strcasecmp(opp, OPP_100_HIGH) == 0) + return (int) OMAP447X_OPP100_HIGH; + else if (strcasecmp(opp, OPP_119_LOW) == 0) + return (int) OMAP447X_OPP119_LOW; + else if (strcasecmp(opp, OPP_119_HIGH) == 0) + return (int) OMAP447X_OPP119_HIGH; + else + return OMAPCONF_ERR_ARG; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_count_get + * @BRIEF return the number of OPP(s) of a given voltage domain + * @RETURNS number of OPP(s) (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the number of OPP(s) of a given voltage domain + *//*------------------------------------------------------------------------ */ +int opp44xx_count_get(voltdm44xx_id vdd_id) +{ + int count; + + CHECK_CPU(44xx, OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, OMAPCONF_ERR_ARG); + + opp44xx_init(); + + count = genlist_getcount(opp44xx_list_table[vdd_id]); + + dprintf("%s(%d) = %d\n", __func__, vdd_id, count); + return count; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_list_get + * @BRIEF return the list of OPP of a given voltage domain + * @RETURNS list of OPP of a given voltage domain in case of success + * NULL in case of error + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the list of OPP of a given voltage domain + *//*------------------------------------------------------------------------ */ +const genlist *opp44xx_list_get(voltdm44xx_id vdd_id) +{ + CHECK_CPU(44xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, NULL); + + opp44xx_init(); + + return opp44xx_list_table[vdd_id]; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_by_voltage_get + * @BRIEF return the current voltage domain OPP name, + * searched by voltages. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name, + * searched by voltages. + *//*------------------------------------------------------------------------ */ +#if 0 +const char *opp44xx_by_voltage_get(voltdm44xx_id vdd_id) +{ + CHECK_CPU(44xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, NULL); + + opp44xx_init(); + + return opp_by_voltage_get(voltdm44xx_id2s(vdd_id), 1); +} +#endif + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_by_rate_get + * @BRIEF return the current voltage domain OPP name, + * searched by clock rates. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name, + * searched by clock rates. + *//*------------------------------------------------------------------------ */ +const char *opp44xx_by_rate_get(voltdm44xx_id vdd_id) +{ + const char *opp_name = NULL; + int ret; + clock44xx_id clk_id; + mod44xx_id module_id; + int opp_id; + double rate = 0.0, rate_por = 0.0; + double gpu_rate = 0.0, gpu_rate_por = 0.0; + double dss_rate = 0.0, dss_rate_por = 0.0; + opp_t opp; + const genlist *opp_list; + int i, opp_count; + + #ifdef OPP44XX_DEBUG + char mname[MOD44XX_MAX_NAME_LENGTH]; + char cname[CLOCK44XX_MAX_NAME_LENGTH]; + char vname[VOLTDM44XX_MAX_NAME_LENGTH]; + #endif + + CHECK_CPU(44xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, NULL); + + opp44xx_init(); + + switch (vdd_id) { + case OMAP4_LDO_WKUP: + clk_id = OMAP4_L4_ICLK2; + module_id = OMAP4_SARRAM; + break; + + case OMAP4_VDD_MPU: + clk_id = OMAP4_MPU_DPLL_CLK; + module_id = OMAP4_MPU; + break; + + case OMAP4_VDD_IVA: + clk_id = OMAP4_IVAHD_ROOT_CLK; + module_id = OMAP4_IVAHD; + break; + + case OMAP4_VDD_CORE: + clk_id = OMAP4_L3_ICLK; + module_id = OMAP4_L3_1; + break; + + default: + fprintf(stderr, + "omapconf: %s(): vdd_id (%u) >= OMAP4_VD_ID_MAX (%u) !!!\n", + __func__, vdd_id, OMAP4_VD_ID_MAX); + opp_name = NULL; + goto opp44xx_by_rate_get_end; + } + + #ifdef OPP44XX_DEBUG + voltdm44xx_get_name(vdd_id, vname); + printf("%s(): Looking for %s OPP ...\n", __func__, vname); + #endif + + rate = clk44xx_get_clock_speed(clk_id, 1); + if (rate < 0.0) { + dprintf("%s(): could not retrieve clock speed!\n", __func__); + goto opp44xx_by_rate_get_end; + } + dprintf("%s(): %s speed is %lfMHz\n", __func__, + clk44xx_get_name(clk_id, cname), rate); + if (!cpu_is_omap4430() && (vdd_id == OMAP4_VDD_CORE)) { + gpu_rate = clk44xx_get_clock_speed(OMAP4_GFX_FCLK, 1); + if (gpu_rate < 0.0) { + dprintf( + "%s(): could not retrieve GPU clock rate!\n", + __func__); + goto opp44xx_by_rate_get_end; + } + dprintf("%s(): GPU speed is %lfMHz\n", __func__, gpu_rate); + } + + opp_list = opp44xx_list_get(vdd_id); + if (opp_list == NULL) { + dprintf("%s(): could not retrieve OPP list!\n", __func__); + goto opp44xx_by_rate_get_end; + } + + opp_count = opp44xx_count_get(vdd_id); + if (opp_count <= 0) { + dprintf("%s(): could not retrieve OPP count!\n", __func__); + goto opp44xx_by_rate_get_end; + } + + for (i = 0; i < opp_count; i++) { + ret = genlist_get((genlist *) opp_list, i, (opp_t *) &opp); + if (ret != 0) { + dprintf("%s(): could not retrieve OPP from list!\n", + __func__); + goto opp44xx_by_rate_get_end; + } + + opp_id = opp44xx_id_get(opp.name); + if (opp_id < 0) { + dprintf( + "%s(): could not retrieve OPP ID from OPP name!\n", + __func__); + goto opp44xx_by_rate_get_end; + } + + /* + * Retrieve module expected speed for this OPP + */ + ret = mod44xx_get_por_clk_speed( + module_id, opp_id, &rate_por); + if (ret != 0) { + dprintf( + "%s(): could not get %s %s POR speed! (%d)\n", + __func__, mod44xx_get_name( + module_id, mname), + opp.name, ret); + goto opp44xx_by_rate_get_end; + } + dprintf("%s(): %s POR Speed for %s is %lf\n", + __func__, + mod44xx_get_name(module_id, mname), + opp.name, rate_por); + + if ((int) rate_por != (int) rate) + continue; + + if (cpu_is_omap4470() && (vdd_id == OMAP4_VDD_CORE) && + (opp_id == OMAP447X_OPP100_LOW)) { + /* for opp_id == OMAP447X_OPP100_LOW + * and opp_id == OMAP447X_OPP119_LOW + * L3 clock frequencies are equal. + * Use GFX clock frequencies to distinguish. + */ + ret = mod44xx_get_por_clk_speed(OMAP4_GFX, + OMAP447X_OPP119_LOW, &gpu_rate_por); + if (ret != 0) { + dprintf( + "%s(): could not get GPU OPP119_LOW POR speed! (%d)\n", + __func__, ret); + goto opp44xx_by_rate_get_end; + } + dprintf( + "%s(): GPU POR Speed for OPP119_LOW is %lfMHz\n", + __func__, gpu_rate_por); + + gpu_rate = clk44xx_get_clock_speed(OMAP4_GFX_FCLK, 1); + if (gpu_rate < 0.0) { + dprintf( + "%s(): could not retrieve GPU clock rate!\n", + __func__); + goto opp44xx_by_rate_get_end; + } + dprintf("%s(): GPU speed is %lfMHz\n", + __func__, gpu_rate); + if ((int) gpu_rate == (int) gpu_rate_por) { + opp_name = OPP_119_LOW; + goto opp44xx_by_rate_get_end; + } else { + opp_name = OPP_100_LOW; + goto opp44xx_by_rate_get_end; + } + } else if (cpu_is_omap4470() && (vdd_id == OMAP4_VDD_CORE) && + (opp_id == OMAP447X_OPP50_HIGH)) { + /* for opp_id == OMAP447X_OPP50_HIGH + * and opp_id == OMAP447X_OPP100_HIGH + * L3 clock frequencies are equal. + * Use DSS clock frequencies to distinguish. + */ + ret = mod44xx_get_por_clk_speed(OMAP4_DISPC, + OMAP447X_OPP50_HIGH, &dss_rate_por); + if (ret != 0) { + dprintf( + "%s(): could not get DSS OMAP447X_OPP50_HIGH POR speed! (%d)\n", + __func__, ret); + goto opp44xx_by_rate_get_end; + } + dprintf( + "%s(): DSS POR Speed for OMAP447X_OPP50_HIGH is %lfMHz\n", + __func__, dss_rate_por); + + dss_rate = clk44xx_get_clock_speed(OMAP4_DSS_FCLK, 1); + if (dss_rate < 0.0) { + dprintf( + "%s(): could not retrieve DSS clock rate!\n", + __func__); + goto opp44xx_by_rate_get_end; + } + dprintf("%s(): DSS speed is %lfMHz\n", + __func__, dss_rate); + if ((int) dss_rate == (int) dss_rate_por) { + opp_name = OPP_50_HIGH; + goto opp44xx_by_rate_get_end; + } else { + opp_name = OPP_100_HIGH; + goto opp44xx_by_rate_get_end; + } + } else { + opp_name = opp.name; + goto opp44xx_by_rate_get_end; + } + } + +opp44xx_by_rate_get_end: + #ifdef OPP44XX_DEBUG + if (opp_name == NULL) + printf("%s(): OPP not found!\n", __func__); + else + printf("%s(): OPP found: %s\n", __func__, opp_name); + #endif + + return opp_name; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_get + * @BRIEF return the current voltage domain OPP name. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name. Search it by + * voltage first, then if failed search it by rates. + *//*------------------------------------------------------------------------ */ +const char *opp44xx_get(voltdm44xx_id vdd_id) +{ + CHECK_CPU(44xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, NULL); + + opp44xx_init(); + + return opp_get(voltdm44xx_id2s(vdd_id), 1); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp44xx_set + * @BRIEF change OPP of a given voltage domain. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] vdd_id: voltage domain ID + * @param[in] opp_id: ID of the OPP to be set + * @DESCRIPTION change OPP of a given voltage domain. + *//*------------------------------------------------------------------------ */ +int opp44xx_set(voltdm44xx_id vdd_id, opp44xx_id opp_id) +{ + CHECK_CPU(44xx, OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, OMAPCONF_ERR_ARG); + CHECK_ARG_LESS_THAN(opp_id, OPP44XX_ID_MAX, OMAPCONF_ERR_ARG); + + opp44xx_init(); + + printf("Sorry, not yet implemented.\n"); + + return OMAPCONF_ERR_NOT_AVAILABLE; +} diff -Nru tiomapconf-1.50.0/omap4/opp44xx.h tiomapconf-1.52.0/omap4/opp44xx.h --- tiomapconf-1.50.0/omap4/opp44xx.h 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/omap4/opp44xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,70 @@ +/* + * + * @Component OMAPCONF + * @Filename opp44xx.h + * @Description OMAP4 OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef __OPP44XX_H__ +#define __OPP44XX_H__ + + +#include +#include + + +void opp44xx_init(void); +void opp44xx_deinit(void); + +int opp44xx_id_get(const char *opp); + +int opp44xx_count_get(voltdm44xx_id vdd_id); +const genlist *opp44xx_list_get(voltdm44xx_id vdd_id); + +const char *opp44xx_get(voltdm44xx_id vdd_id); +#if 0 +const char *opp44xx_by_voltage_get(voltdm44xx_id vdd_id); +#endif +const char *opp44xx_by_rate_get(voltdm44xx_id vdd_id); +int opp44xx_set(voltdm44xx_id vdd_id, opp44xx_id opp_id); + + +#endif diff -Nru tiomapconf-1.50.0/omap4/smartreflex44xx.c tiomapconf-1.52.0/omap4/smartreflex44xx.c --- tiomapconf-1.50.0/omap4/smartreflex44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/smartreflex44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -533,31 +533,15 @@ if (!cpu_is_omap44xx()) return OMAPCONF_ERR_CPU; - ret = mem_read(OMAP4430_PRM_VC_SMPS_SA, - &(vc_regs.prm_vc_smps_sa)); - ret += mem_read(OMAP4430_PRM_VC_VAL_SMPS_RA_VOL, - &(vc_regs.prm_vc_smps_ra_vol)); - ret += mem_read(OMAP4430_PRM_VC_VAL_SMPS_RA_CMD, - &(vc_regs.prm_vc_val_smps_ra_cmd)); - ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L, - &(vc_regs.prm_vc_val_cmd_vdd_core_l)); - ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L, - &(vc_regs.prm_vc_val_cmd_vdd_mpu_l)); - ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L, - &(vc_regs.prm_vc_val_cmd_vdd_iva_l)); - ret += mem_read(OMAP4430_PRM_VC_CFG_CHANNEL, - &(vc_regs.prm_vc_cfg_channel)); - ret += mem_read(OMAP4430_PRM_VC_CFG_I2C_MODE, - &(vc_regs.prm_vc_cfg_i2c_mode)); - ret += mem_read(OMAP4430_PRM_VC_CFG_I2C_CLK, - &(vc_regs.prm_vc_cfg_i2c_clk)); + ret = vc44xx_registers_get(&vc_regs); if (ret != 0) - return OMAPCONF_ERR_REG_ACCESS; + return ret; /* Analyze VC configuration registers */ ret = vc44xx_config_show(stdout, &vc_regs); if (ret != 0) return ret; + return sri2c_config_show(stdout, vc_regs.prm_vc_cfg_i2c_mode, vc_regs.prm_vc_cfg_i2c_clk); } diff -Nru tiomapconf-1.50.0/omap4/temperature44xx.c tiomapconf-1.52.0/omap4/temperature44xx.c --- tiomapconf-1.50.0/omap4/temperature44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/temperature44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -42,74 +42,23 @@ */ +#include #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include +#include #include #include -#include -#include -#include -#include - - -#define OMAP4430_CONTROL_TEMP_SENSOR 0x4A00232C - -#define OMAP4460_CM_WKUP_BANDGAP_CLKCTRL 0x4A307888 -#define OMAP4460_CORE_STD_FUSE_OPP_BGAP 0x4A002260 - -#define OMAP4460_BANDGAP_CLKON_MASK (1 << 8) - -#define OMAP4460_BGAP_TEMPSOFF_SHIFT 13 -#define OMAP4460_BGAP_TEMPSOFF_MASK (1 << 13) -#define OMAP4460_BGAP_TEMP_SENSOR_CONTCONV_SHIFT 12 -#define OMAP4460_BGAP_TEMP_SENSOR_CONTCONV_MASK (1 << 12) -#define OMAP4460_BGAP_TEMP_SENSOR_SOC_SHIFT 11 -#define OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK (1 << 11) -#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_SHIFT 10 -#define OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK (1 << 10) -#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_SHIFT 0 -#define OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) - - -#define OMAP_ADC_START_VALUE 530 -#define OMAP_ADC_END_VALUE 923 - - -#define TMP102_TEMP_REG 0x00 -#define TMP102_CONF_REG 0x01 -#define TMP102_CONF_SD 0x0100 -#define TMP102_CONF_TM 0x0200 -#define TMP102_CONF_POL 0x0400 -#define TMP102_CONF_F0 0x0800 -#define TMP102_CONF_F1 0x1000 -#define TMP102_CONF_R0 0x2000 -#define TMP102_CONF_R1 0x4000 -#define TMP102_CONF_OS 0x8000 -#define TMP102_CONF_EM 0x0010 -#define TMP102_CONF_AL 0x0020 -#define TMP102_CONF_CR0 0x0040 -#define TMP102_CONF_CR1 0x0080 -#define TMP102_TLOW_REG 0x02 -#define TMP102_THIGH_REG 0x03 - - -/* OMAP4460 PCB Sensor */ -#define THERM_R0 47 /* 47 kOhms */ -#define THERM_RX 10 /* 10 kOhms */ -#define THERM_RY 220 /* 220 kOhms */ -#define THERM_BETA 4050 /* from thermistor datasheet */ -#define THERM_T0 298150 /* mKelvin (25C + 273.15) */ -#define THERM_KELVIN_TO_CELSIUS 273150 /* mKelvin */ -#define PCB4460_SENSOR_MAX_ADC_VAL 977 + + +const char *temp44xx_sensor_names[TEMP44XX_ID_MAX + 1] = { + "BANDGAP", + "HOTSPOT", + "DDR1_CS1", + "DDR1_CS2", + "DDR2_CS1", + "DDR2_CS2", + "PCB", + "FIXME"}; /* #define TEMP44XX_DEBUG */ @@ -120,1352 +69,170 @@ #endif -static const int adc_code2celcius_table[93] = { - -38, -35, -34, -32, -30, -28, -26, -24, -22, -20, -18, -17, -15, -13, - -12, -10, -8, -6, -5, -3, -1, 0, 2, 3, 5, 6, 8, 10, 12, 13, 15, 17, 19, - 21, 23, 25, 27, 28, 30, 32, 33, 35, 37, 38, 40, 42, 43, 45, 47, 48, 50, - 52, 53, 55, 57, 58, 60, 62, 64, 66, 68, 70, 71, 73, 75, 77, 78, 80, 82, - 83, 85, 87, 88, 90, 92, 93, 95, 97, 98, 100, 102, 103, 105, 107, 109, - 111, 113, 115, 117, 118, 120, 122, 123}; - -/* - * Temperature values in milidegrees celsius. ADC code values from 530 to 923 - */ -static int OMAP4460_adc_to_temp[] = { - -40000, -40000, -40000, -40000, -39800, -39400, -39000, -38600, -38200, - -37800, -37300, -36800, -36400, -36000, -35600, -35200, -34800, - -34300, -33800, -33400, -33000, -32600, -32200, -31800, -31300, - -30800, -30400, -30000, -29600, -29200, -28700, -28200, -27800, - -27400, -27000, -26600, -26200, -25700, -25200, -24800, -24400, - -24000, -23600, -23200, -22700, -22200, -21800, -21400, -21000, - -20600, -20200, -19700, -19200, -18800, -18400, -18000, -17600, - -17200, -16700, -16200, -15800, -15400, -15000, -14600, -14200, - -13700, -13200, -12800, -12400, -12000, -11600, -11200, -10700, - -10200, -9800, -9400, -9000, -8600, -8200, -7700, -7200, -6800, - -6400, -6000, -5600, -5200, -4800, -4300, -3800, -3400, -3000, - -2600, -2200, -1800, -1300, -800, -400, 0, 400, 800, 1200, 1600, - 2100, 2600, 3000, 3400, 3800, 4200, 4600, 5100, 5600, 6000, 6400, - 6800, 7200, 7600, 8000, 8500, 9000, 9400, 9800, 10200, 10600, 11000, - 11400, 11900, 12400, 12800, 13200, 13600, 14000, 14400, 14800, - 15300, 15800, 16200, 16600, 17000, 17400, 17800, 18200, 18700, - 19200, 19600, 20000, 20400, 20800, 21200, 21600, 22100, 22600, - 23000, 23400, 23800, 24200, 24600, 25000, 25400, 25900, 26400, - 26800, 27200, 27600, 28000, 28400, 28800, 29300, 29800, 30200, - 30600, 31000, 31400, 31800, 32200, 32600, 33100, 33600, 34000, - 34400, 34800, 35200, 35600, 36000, 36400, 36800, 37300, 37800, - 38200, 38600, 39000, 39400, 39800, 40200, 40600, 41100, 41600, - 42000, 42400, 42800, 43200, 43600, 44000, 44400, 44800, 45300, - 45800, 46200, 46600, 47000, 47400, 47800, 48200, 48600, 49000, - 49500, 50000, 50400, 50800, 51200, 51600, 52000, 52400, 52800, - 53200, 53700, 54200, 54600, 55000, 55400, 55800, 56200, 56600, - 57000, 57400, 57800, 58200, 58700, 59200, 59600, 60000, 60400, - 60800, 61200, 61600, 62000, 62400, 62800, 63300, 63800, 64200, - 64600, 65000, 65400, 65800, 66200, 66600, 67000, 67400, 67800, - 68200, 68700, 69200, 69600, 70000, 70400, 70800, 71200, 71600, - 72000, 72400, 72800, 73200, 73600, 74100, 74600, 75000, 75400, - 75800, 76200, 76600, 77000, 77400, 77800, 78200, 78600, 79000, - 79400, 79800, 80300, 80800, 81200, 81600, 82000, 82400, 82800, - 83200, 83600, 84000, 84400, 84800, 85200, 85600, 86000, 86400, - 86800, 87300, 87800, 88200, 88600, 89000, 89400, 89800, 90200, - 90600, 91000, 91400, 91800, 92200, 92600, 93000, 93400, 93800, - 94200, 94600, 95000, 95500, 96000, 96400, 96800, 97200, 97600, - 98000, 98400, 98800, 99200, 99600, 100000, 100400, 100800, 101200, - 101600, 102000, 102400, 102800, 103200, 103600, 104000, 104400, - 104800, 105200, 105600, 106100, 106600, 107000, 107400, 107800, - 108200, 108600, 109000, 109400, 109800, 110200, 110600, 111000, - 111400, 111800, 112200, 112600, 113000, 113400, 113800, 114200, - 114600, 115000, 115400, 115800, 116200, 116600, 117000, 117400, - 117800, 118200, 118600, 119000, 119400, 119800, 120200, 120600, - 121000, 121400, 121800, 122200, 122600, 123000 -}; - - -static const int - omap4460_pcb_sensor_adc2celcius_table[PCB4460_SENSOR_MAX_ADC_VAL] = { - -273, 135, 123, 117, 112, 108, 105, 103, 101, 99, 98, 96, 95, 94, - 93, 92, 91, 90, 89, 88, 88, 87, 86, 86, 85, 84, 84, - 83, 83, 82, 82, 81, 81, 81, 80, 80, 79, 79, 79, 78, - 78, 78, 77, 77, 77, 76, 76, 76, 75, 75, 75, 75, 74, - 74, 74, 73, 73, 73, 73, 73, 72, 72, 72, 72, 71, 71, - 71, 71, 71, 70, 70, 70, 70, 70, 69, 69, 69, 69, 69, - 69, 68, 68, 68, 68, 68, 68, 67, 67, 67, 67, 67, 67, - 66, 66, 66, 66, 66, 66, 66, 65, 65, 65, 65, 65, 65, - 65, 65, 64, 64, 64, 64, 64, 64, 64, 63, 63, 63, 63, - 63, 63, 63, 63, 63, 62, 62, 62, 62, 62, 62, 62, 62, - 62, 61, 61, 61, 61, 61, 61, 61, 61, 61, 61, 60, 60, - 60, 60, 60, 60, 60, 60, 60, 60, 59, 59, 59, 59, 59, - 59, 59, 59, 59, 59, 59, 59, 58, 58, 58, 58, 58, 58, - 58, 58, 58, 58, 58, 57, 57, 57, 57, 57, 57, 57, 57, - 57, 57, 57, 57, 57, 56, 56, 56, 56, 56, 56, 56, 56, - 56, 56, 56, 56, 56, 55, 55, 55, 55, 55, 55, 55, 55, - 55, 55, 55, 55, 55, 55, 54, 54, 54, 54, 54, 54, 54, - 54, 54, 54, 54, 54, 54, 54, 54, 53, 53, 53, 53, 53, - 53, 53, 53, 53, 53, 53, 53, 53, 53, 53, 53, 52, 52, - 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, 52, - 52, 52, 51, 51, 51, 51, 51, 51, 51, 51, 51, 51, 51, - 51, 51, 51, 51, 51, 51, 50, 50, 50, 50, 50, 50, 50, - 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 50, 49, 49, - 49, 49, 49, 49, 49, 49, 49, 49, 49, 49, 49, 49, 49, - 49, 49, 49, 49, 48, 48, 48, 48, 48, 48, 48, 48, 48, - 48, 48, 48, 48, 48, 48, 48, 48, 48, 48, 48, 47, 47, - 47, 47, 47, 47, 47, 47, 47, 47, 47, 47, 47, 47, 47, - 47, 47, 47, 47, 47, 46, 46, 46, 46, 46, 46, 46, 46, - 46, 46, 46, 46, 46, 46, 46, 46, 46, 46, 46, 46, 46, - 45, 45, 45, 45, 45, 45, 45, 45, 45, 45, 45, 45, 45, - 45, 45, 45, 45, 45, 45, 45, 45, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, 44, - 44, 44, 44, 44, 43, 43, 43, 43, 43, 43, 43, 43, 43, - 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, 43, - 43, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, - 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 41, 41, 41, - 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, 41, - 41, 41, 41, 41, 41, 41, 41, 41, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, 40, - 40, 40, 40, 40, 40, 39, 39, 39, 39, 39, 39, 39, 39, - 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, 39, - 39, 39, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, - 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 38, 37, - 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, 37, - 37, 37, 37, 37, 37, 37, 37, 37, 37, 36, 36, 36, 36, - 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, 36, - 36, 36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35, - 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, 35, - 35, 35, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, - 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 34, 33, 33, - 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, 33, - 33, 33, 33, 33, 33, 33, 32, 32, 32, 32, 32, 32, 32, - 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, - 32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, - 31, 31, 31, 31, 31, 31, 31, 31, 30, 30, 30, 30, 30, - 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, 30, - 30, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, - 29, 29, 29, 29, 29, 29, 29, 28, 28, 28, 28, 28, 28, - 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, - 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, - 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, - 26, 26, 26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, - 25, 25, 25, 25, 25, 25, 25, 24, 24, 24, 24, 24, 24, - 24, 24, 24, 24, 24, 24, 24, 24, 23, 23, 23, 23, 23, - 23, 23, 23, 23, 23, 23, 23, 23, 22, 22, 22, 22, 22, - 22, 22, 22, 22, 22, 22, 22, 21, 21, 21, 21, 21, 21, - 21, 21, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, - 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 19, 18, - 18, 18, 18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, - 17, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 15, 15, - 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 14, 13, 13, - 13, 13, 13, 13, 12, 12, 12, 12, 12, 11, 11, 11, 11, - 11, 10, 10, 10, 10, 9, 9, 9, 9, 8, 8, 8, 8, - 7, 7, 7, 6, 6, 6, 5, 5, 4, 4, 4, 3, 3, - 2, 2, 1, 0, 0, -1, -2, -3, -4, -5, -6, -8, -10, - -12}; - - /* ------------------------------------------------------------------------*//** - * @FUNCTION omap4460_pcb_sensor_adc2temp - * @BRIEF convert ADC code into temperature (celcius) - * @RETURNS temperature (Celcius) - * @param[in] code: ADC code read from PCB sensor - * @DESCRIPTION convert ADC code into temperature (celcius) + * @FUNCTION temp44xx_name_get + * @BRIEF return temperature sensor name + * @RETURNS temperature sensor ID + * NULL in case of incorrect id + * @param[in] id: temperature sensor ID + * @DESCRIPTION return temperature sensor name *//*------------------------------------------------------------------------ */ -int omap4460_pcb_sensor_adc2temp(unsigned int adc_value) +const char *temp44xx_name_get(temp44xx_sensor_id id) { - /* Main formula to be used: - * (Beta*T0) / (Beta-T0*LN(-R0*(ADC_VALUE*(Rx+Ry)*Vref-1023*Ry*Vx) / - * (ADC_VALUE*Rx*Ry*Vref)))-273.15 - * Following formula has been simplified assuming that Vref = Vx. - * - * NB: to avoid having to link with the math lib, used a pre-computed - * conversion table. - */ - CHECK_ARG_LESS_THAN(adc_value, PCB4460_SENSOR_MAX_ADC_VAL, -273); + if (id > TEMP44XX_ID_MAX) + id = TEMP44XX_ID_MAX; - return omap4460_pcb_sensor_adc2celcius_table[adc_value]; + return temp44xx_sensor_names[id]; } /* ------------------------------------------------------------------------*//** - * @FUNCTION tmp102_read_reg - * @BRIEF read tmp102 sensor - * @RETURNS > 0 in case of success (read data from tmp102 register) - * -1 in case of incorrect argument (i2c) - * -8 in case of i2c dev cannot be opened - * -4 in case of I2C read error - * @param[in] reg: tmp102 register address - * @DESCRIPTION read tmp102 sensor + * @FUNCTION temp44xx_voltdm2sensor_id + * @BRIEF convert voltage domain ID to sensor domain ID + * @RETURNS valid sensor ID in case of success + * TEMP44XX_ID_MAX in case of voltage domain ID + * @param[in] vdd_id: valid voltage domain ID + * @DESCRIPTION convert voltage domain ID to sensor domain ID. *//*------------------------------------------------------------------------ */ -static inline int tmp102_read_reg(unsigned char reg) +temp44xx_sensor_id temp44xx_voltdm2sensor_id(voltdm44xx_id vdd_id) { - int retres; - unsigned int tmp102_data; - retres = i2cget_word(4, 0x48, reg, &tmp102_data); - if (retres < 0) { - return retres; - } else { - return (int) ((tmp102_data << 8) & 0xFF00) | - ((tmp102_data >> 8) & 0xFF); - } -} + static const temp44xx_sensor_id voltdm2sensor_map[OMAP4_VD_ID_MAX] = { + TEMP44XX_ID_MAX, /* OMAP4_LDO_WKUP */ + TEMP44XX_HOTSPOT, /* OMAP4_VDD_MPU */ + TEMP44XX_ID_MAX, /* OMAP4_VDD_IVA */ + TEMP44XX_BANDGAP}; /* OMAP4_VDD_CORE */ + CHECK_ARG_LESS_THAN(vdd_id, OMAP4_VD_ID_MAX, TEMP44XX_ID_MAX); -/* ------------------------------------------------------------------------*//** - * @FUNCTION tmp102_write_reg - * @BRIEF write to tmp102 sensor register - * @RETURNS 0 in case of success - * -1 in case of incorrect argument (i2c) - * -8 in case of i2c dev cannot be opened - * -4 in case of I2C read error - * @param[in] reg: tmp102 register address - * @param[in] val: data to write - * @DESCRIPTION write to tmp102 sensor register - *//*------------------------------------------------------------------------ */ -static inline int tmp102_write_reg(unsigned char reg, unsigned short val) -{ - return i2cset_word(4, 0x48, reg, ((val << 8) & 0xFF00) | - ((val >> 8) & 0xFF)); + dprintf("%s(%d) = %d\n", __func__, vdd_id, voltdm2sensor_map[vdd_id]); + return voltdm2sensor_map[vdd_id]; } /* ------------------------------------------------------------------------*//** - * @FUNCTION tmp102_reg_to_mC - * @BRIEF convert tmp102 register value into temperature - * (millicelcius) - * @RETURNS temperatute value in celsius - * @param[in] val: register code read from tmp102 - * @param[in] IsExtendedMode: mode of tmp102 sensor - * @DESCRIPTION convert tmp102 register value into temperature - * (millicelcius) + * @FUNCTION temp44xx_get + * @BRIEF return temperature measured by selected sensor + * (in degrees celcius) + * @RETURNS measured temperature in case of success + * TEMP_ABSOLUTE_ZERO (-273) in case of error + * @param[in] id: temperature sensor id + * @DESCRIPTION return temperature measured by selected sensor + * (in degrees celcius) *//*------------------------------------------------------------------------ */ -static inline int tmp102_reg_to_mC(short int val, int IsExtendedMode) +int temp44xx_get(temp44xx_sensor_id id) { - if (IsExtendedMode) - return ((val & ~0x01) * 1000) / 128; - else - return ((val & ~0x01) * 1000) / 256; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_bandgap_adc_code2celcius - * @BRIEF convert ADC code into temperature (celcius) - * @RETURNS 0 in case of success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_INTERNAL - * @param[in] code: ADC code read from bandgap register - * @param[in,out] temp: temperature (Celcius, min) (returned) - * @DESCRIPTION convert ADC code into temperature (celcius) - * ADC code actually gives range, so it returns the min - * temperature in the range indicated by ADC code. - *//*------------------------------------------------------------------------ */ -int temp44xx_bandgap_adc_code2celcius(unsigned short int code, int *temp) -{ - if (temp == NULL) - return OMAPCONF_ERR_ARG; - *temp = -50; - if (code >= 128) - return OMAPCONF_ERR_ARG; - - if (code <= 13) - *temp = -40; - else if (code >= 107) - *temp = 125; - else - *temp = adc_code2celcius_table[code - 14]; - - dprintf("%s(): adc code=%d => temp=%d C\n", __func__, code, *temp); - - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_bandgap_sensor_is_enabled - * @BRIEF return bandgap temperature sensor clock status - * @RETURNS 0 if bandgap sensor clock is not enabled, or in case of - * error - * 1 if bandgap sensor clock is enabled - * @DESCRIPTION return bandgap temperature sensor clock status - *//*------------------------------------------------------------------------ */ -int temp44xx_bandgap_sensor_is_enabled(void) -{ - unsigned int cm_wkup_bandgap_clkctrl; - int ret; - - if (!cpu_is_omap44xx()) { - fprintf(stderr, "CPU is not supported yet.\n"); - return 0; - } - - /* Read bandgap sensor clock control register */ - ret = mem_read(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - &cm_wkup_bandgap_clkctrl); - if (ret != 0) { - fprintf(stderr, "%s(): Error reading clock register! (%d)\n", - __func__, ret); - return 0; - } - dprintf("%s(): CM_WKUP_BANDGAP_CLKCTRL = 0x%08X\n", - __func__, cm_wkup_bandgap_clkctrl); - - /* check if bandgap sensor clock is enabled or not */ - if ((cm_wkup_bandgap_clkctrl & OMAP4460_BANDGAP_CLKON_MASK) == 0) { - dprintf("%s(): bandgap sensor clock is disabled\n", __func__); - ret = 0; - } else { - dprintf("%s(): bandgap sensor clock is enabled\n", __func__); - ret = 1; - } - - return ret; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_bandgap_sensor_enable - * @BRIEF enable bandgap temperature sensor clock - * @RETURNS 0 on success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * @DESCRIPTION enable bandgap temperature sensor clock - *//*------------------------------------------------------------------------ */ -int temp44xx_bandgap_sensor_enable(void) -{ - unsigned int cm_wkup_bandgap_clkctrl; - int ret; - - if (!cpu_is_omap44xx()) { - fprintf(stderr, "CPU is not supported yet.\n"); - return OMAPCONF_ERR_CPU; - } - - /* Read bandgap sensor clock control register */ - ret = mem_read(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - &cm_wkup_bandgap_clkctrl); - if (ret != 0) { - fprintf(stderr, "%s(): Error reading clock register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - /* Enable optional fclk */ - ret = mem_write(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - cm_wkup_bandgap_clkctrl | OMAP4460_BANDGAP_CLKON_MASK); - if (ret != 0) { - fprintf(stderr, "%s(): Error writing control register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - dprintf("%s(): bandgap sensor clock enabled\n", __func__); - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_bandgap_sensor_disable - * @BRIEF disable bandgap temperature sensor clock - * @RETURNS 0 on success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * @DESCRIPTION disable bandgap temperature sensor clock - *//*------------------------------------------------------------------------ */ -int temp44xx_bandgap_sensor_disable(void) -{ - unsigned int cm_wkup_bandgap_clkctrl; - int ret; - - if (!cpu_is_omap44xx()) { - fprintf(stderr, "CPU is not supported yet.\n"); - return OMAPCONF_ERR_CPU; - } - - /* Read bandgap sensor clock control register */ - ret = mem_read(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - &cm_wkup_bandgap_clkctrl); - if (ret != 0) { - fprintf(stderr, "%s(): Error reading clock register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - /* Disable optional fclk */ - ret = mem_write(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - cm_wkup_bandgap_clkctrl & ~OMAP4460_BANDGAP_CLKON_MASK); - if (ret != 0) { - fprintf(stderr, "%s(): Error writing control register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - dprintf("%s(): bandgap sensor clock disabled\n", __func__); - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp4460_bandgap_sensor_clock_get - * @BRIEF return bandgap temperature sensor clock rate in MHz - * @RETURNS 0 on success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * @DESCRIPTION return bandgap temperature sensor clock rate in MHz - *//*------------------------------------------------------------------------ */ -double temp4460_bandgap_sensor_clock_get(void) -{ - unsigned int cm_wkup_bandgap_clkctrl; - int ret; - unsigned char div; - double rate; - - /* Read bandgap sensor clock control register */ - ret = mem_read(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - &cm_wkup_bandgap_clkctrl); - if (ret != 0) { - fprintf(stderr, "%s(): Error reading clock register! (%d)\n", - __func__, ret); - return (double) OMAPCONF_ERR_REG_ACCESS; - } - dprintf("%s(): CM_WKUP_BANDGAP_CLKCTRL = 0x%08X\n", - __func__, cm_wkup_bandgap_clkctrl); - - /* Retieve L4WKUP_ICLK rate */ - rate = (unsigned int) clk44xx_get_clock_speed(OMAP4_L4WKUP_ICLK, 0); - if (rate <= 0.0) - return rate; - - /* Retrieve divider value */ - div = 8 << extract_bitfield(cm_wkup_bandgap_clkctrl, 24, 2); - dprintf("%s(): sensor f-clk rate = " - "%lfMHz (L4WKUP_ICLK (%lfMHz) / %u)\n", - __func__, rate / div, rate, div); - - return rate / (double) div; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp4460_bandgap_sensor_clock_set - * @BRIEF set bandgap temperature sensor clock divider to - * guarantee a rate between 1 and 2MHz. - * @RETURNS 0 on success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * OMAPCONF_ERR_INTERNAL - * @DESCRIPTION set bandgap temperature sensor clock divider to - * guarantee a rate between 1 and 2MHz. - *//*------------------------------------------------------------------------ */ -int temp4460_bandgap_sensor_clock_set(void) -{ - unsigned int cm_wkup_bandgap_clkctrl; - int ret; - unsigned char div; - double rate; - - /* Read bandgap sensor clock control register */ - ret = mem_read(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - &cm_wkup_bandgap_clkctrl); - if (ret != 0) { - fprintf(stderr, "%s(): Error reading clock register! (%d)\n", - __func__, ret); - return (double) OMAPCONF_ERR_REG_ACCESS; - } - dprintf("%s(): CM_WKUP_BANDGAP_CLKCTRL = 0x%08X\n", - __func__, cm_wkup_bandgap_clkctrl); - - /* Retieve L4WKUP_ICLK rate */ - rate = (unsigned int) clk44xx_get_clock_speed(OMAP4_L4WKUP_ICLK, 0); - if (rate <= 0.0) - return OMAPCONF_ERR_INTERNAL; - - /* Select divider to guarantee a rate between 1 and 2MHz. */ - div = ((unsigned int) rate >> 4) & 3; - dprintf("%s(): div = %u\n", __func__, div); - div = (((unsigned int) rate >> 4) & 3) << 24; - - /* Update divider in register */ - ret = mem_write(OMAP4460_CM_WKUP_BANDGAP_CLKCTRL, - cm_wkup_bandgap_clkctrl | div); - if (ret != 0) { - fprintf(stderr, "%s(): Error writing control register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp4460_read_bandgap_sensor - * @BRIEF read temperature from OMAP bandgap temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * OMAPCONF_ERR_UNEXPECTED - * @param[in,out] temp: bandgap sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP bandgap temperature sensor - * OMAP4460 specific implementation - *//*------------------------------------------------------------------------ */ -int temp4460_read_bandgap_sensor(int *temp) -{ - unsigned int control_temp_sensor; - unsigned int control_temp_sensor_saved; - unsigned int res, enabled; - int ret; - unsigned short adc_val; - #ifdef TEMP44XX_DEBUG - double rate; - #endif - - if (temp == NULL) - return OMAPCONF_ERR_ARG; - *temp = 0; - if (!cpu_is_omap4460() && !cpu_is_omap4470()) - return OMAPCONF_ERR_CPU; - - ret = mem_read(OMAP4460_CORE_STD_FUSE_OPP_BGAP, &res); - if (ret != 0) { - dprintf("%s(): Error reading trim register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - if (res == 0) - printf( - "WARNING: invalid EFUSE => non-trimmed BGAP sensor, temperature is not accurate\n"); - - - /* Make sure sensor clock is correctly configured */ - #ifdef TEMP44XX_DEBUG - rate = temp4460_bandgap_sensor_clock_get(); - dprintf("%s(): sensor rate is %lf\n", __func__, rate); - #endif - ret = temp4460_bandgap_sensor_clock_set(); - if (ret < 0) { - fprintf(stderr, "%s(): could not set sensor rate! (%d)\n", - __func__, ret); - return ret; - } - #ifdef TEMP44XX_DEBUG - rate = temp4460_bandgap_sensor_clock_get(); - dprintf("%s(): sensor new rate is %lf\n", __func__, rate); - #endif - - /* Enable sensor clock, if not yet enabled */ - enabled = temp44xx_bandgap_sensor_is_enabled(); - if (!enabled) { - ret = temp44xx_bandgap_sensor_enable(); - if (ret != 0) { - fprintf(stderr, "%s(): could not enable clock!\n", - __func__); - return ret; - } - } - - /* Read control register */ - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, &control_temp_sensor); - if (ret != 0) { - dprintf("%s(): Error reading control register! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4460_read_bandgap_sensor_end; - } - dprintf("%s(): 1st read control_temp_sensor = 0x%08X\n", - __func__, control_temp_sensor); - - control_temp_sensor_saved = control_temp_sensor; - /* check if temp_sensor wasn't enabled, if not enable it */ - if ((control_temp_sensor & OMAP4460_BGAP_TEMPSOFF_MASK)) { - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, - control_temp_sensor & ~OMAP4460_BGAP_TEMPSOFF_MASK); - if (ret != 0) { - dprintf("%s: Error writing control register (start)! " - "(%d)\n", __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4460_read_bandgap_sensor_end; - } - } - /* check if conversion is running now, if not start it*/ - if ((control_temp_sensor & (OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK - | OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK)) == 0) { - /* start */ - control_temp_sensor |= OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK; - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, - control_temp_sensor); - usleep(20); - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, - &control_temp_sensor); - /* clear start */ - control_temp_sensor &= ~OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK; - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, - control_temp_sensor); - } - /* sleep for 200 us, should be enough to finish conversion */ - usleep(200); - /* read result */ - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, &control_temp_sensor); - if (ret != 0) { - dprintf("%s(): Error reading control register (conv)! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4460_read_bandgap_sensor_end; - } - /* check if conversion is running now*/ - if ((control_temp_sensor & (OMAP4460_BGAP_TEMP_SENSOR_EOCZ_MASK - | OMAP4460_BGAP_TEMP_SENSOR_SOC_MASK - | OMAP4460_BGAP_TEMP_SENSOR_CONTCONV_MASK)) == 0) { - /* restore off state */ - if ((control_temp_sensor_saved & OMAP4460_BGAP_TEMPSOFF_MASK)) - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, - control_temp_sensor | - OMAP4460_BGAP_TEMPSOFF_MASK); - } - /* calculate temperature */ - adc_val = control_temp_sensor & OMAP4460_BGAP_TEMP_SENSOR_DTEMP_MASK; - if (adc_val < OMAP_ADC_START_VALUE || adc_val > OMAP_ADC_END_VALUE) { - printf("%s(): invalid adc code reported by the sensor! (%d)\n", - __func__, control_temp_sensor); - ret = OMAPCONF_ERR_UNEXPECTED; - } else { - *temp = (OMAP4460_adc_to_temp[adc_val - OMAP_ADC_START_VALUE] + - 500) / 1000; - ret = 0; - } - -temp4460_read_bandgap_sensor_end: - /* Restore sensor clock to previous state */ - if (!enabled) - temp44xx_bandgap_sensor_disable(); - - return ret; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp4430_read_bandgap_sensor - * @BRIEF read temperature from OMAP bandgap temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * @param[in,out] temp: bandgap sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP bandgap temperature sensor - * OMAP4430 specific implementation - *//*------------------------------------------------------------------------ */ -int temp4430_read_bandgap_sensor(int *temp) -{ - unsigned int control_temp_sensor, enabled; - int ret; - unsigned short adc_val; - - if (!cpu_is_omap4430()) - return OMAPCONF_ERR_CPU; - if (temp == NULL) - return OMAPCONF_ERR_ARG; - *temp = 0; - - /* Enable sensor clock, if not yet enabled */ - enabled = temp44xx_bandgap_sensor_is_enabled(); - if (!enabled) { - ret = temp44xx_bandgap_sensor_enable(); - if (ret != 0) { - fprintf(stderr, "%s(): could not enable clock!\n", - __func__); - return ret; - } - } - - /* Read control register */ - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, &control_temp_sensor); - if (ret != 0) { - dprintf("%s(): Error reading control register! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4430_read_bandgap_sensor_end; - } - dprintf("%s(): 1st read control_temp_sensor = 0x%08X\n", - __func__, control_temp_sensor); - - /* - * Clean previous operation. - * Just in case a previous operation did not complete - * Sensor needs a rising edge on this bit - */ - control_temp_sensor &= ~(1 << 9); - dprintf("%s(): 1st write control_temp_sensor = 0x%08X\n", - __func__, control_temp_sensor); - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, control_temp_sensor); - if (ret != 0) { - dprintf("%s: Error writing control register (clean)! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4430_read_bandgap_sensor_end; - } - usleep(10000); /* wait for 10ms before next operation */ - - /* Start Conversion (Single Conversion Mode) */ - control_temp_sensor |= (1 << 9); - dprintf("%s(): start write control_temp_sensor = 0x%08X\n", - __func__, control_temp_sensor); - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, control_temp_sensor); - if (ret != 0) { - dprintf("%s(): Error writing control register (start)! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4430_read_bandgap_sensor_end; - } - - /* Wait for end of Conversion - * Conversion time is about 11-14 32K cycles (~0.5us) - * After some testing, for some reason EOCZ bit (8) is always low - * even when no conversion ongoing. Don't check it then ... - */ - usleep(1000); - #if 0 - do { - usleep(1000); /* wait for 1ms between each read */ - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, - &control_temp_sensor); - if (ret != 0) { - dprintf("temp44xx_read_bandgap_sensor(): " - "Error reading control register (end)! (%d)\n", ret); - return OMAPCONF_ERR_REG_ACCESS; - } - dprintf("temp44xx_read_bandgap_sensor(): in conversion " - "control_temp_sensor = 0x%08X\n", control_temp_sensor); - } while (extract_bit(control_temp_sensor, 8) != 0); - /* FIXME: potential deadloop here if conversion never ends */ - #endif - - /* Stop Conversion */ - control_temp_sensor &= ~(1 << 9); - dprintf("%s(): stop write control_temp_sensor = 0x%08X\n", - __func__, control_temp_sensor); - ret = mem_write(OMAP4430_CONTROL_TEMP_SENSOR, control_temp_sensor); - if (ret != 0) { - dprintf("%s: Error writing control register (stop)! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4430_read_bandgap_sensor_end; - } - - /* Read value from sensor */ - ret = mem_read(OMAP4430_CONTROL_TEMP_SENSOR, &control_temp_sensor); - if (ret != 0) { - dprintf("%s(): Error reading control register (conv)! (%d)\n", - __func__, ret); - ret = OMAPCONF_ERR_REG_ACCESS; - goto temp4430_read_bandgap_sensor_end; - } - - /* Convert sensor value to celcius degrees */ - adc_val = extract_bitfield(control_temp_sensor, 0, 8); - ret = temp44xx_bandgap_adc_code2celcius(adc_val, temp); - dprintf("%s(): control_temp_sensor = 0x%08X adc_val = %d temp = %d\n", - __func__, control_temp_sensor, adc_val, *temp); - -temp4430_read_bandgap_sensor_end: - /* Restore sensor clock to previous state */ - if (!enabled) - temp44xx_bandgap_sensor_disable(); - - return ret; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_read_bandgap_sensor - * @BRIEF read temperature from OMAP bandgap temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * @param[in,out] temp: bandgap sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP bandgap temperature sensor - *//*------------------------------------------------------------------------ */ -int temp44xx_read_bandgap_sensor(int *temp) -{ - FILE *fp = NULL; - char line[256]; - int ret; - - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - CHECK_NULL_ARG(temp, OMAPCONF_ERR_ARG) - - *temp = 0; - - /* First try to use data from temperature sensor driver, if loaded */ - if (os_is_android()) { - if (os_is_android() && (android_pastry_get() < PASTRY_ICS)) - fp = fopen( - "/sys/devices/platform/omap_temp_sensor.0/temp1_input", - "r"); - else - fp = fopen( - "/sys/devices/platform/omap/omap_temp_sensor.0" - "/temp1_input", "r"); - if (fp == NULL) { - dprintf("%s(): couldn't open temp sensor file!\n", - __func__); - goto temp44xx_read_bandgap_sensor_no_driver; - } - if (fgets(line, 256, fp) == NULL) { - fclose(fp); - goto temp44xx_read_bandgap_sensor_no_driver; - } - fclose(fp); - - /* Remove endind '\n' */ - line[strlen(line) - 1] = '\0'; - dprintf("%s(): line=%s len=%u\n", __func__, line, strlen(line)); - - /* Retrieve temperature, in millidegrees celcius */ - ret = sscanf(line, "%d", temp); - if (ret != 1) - goto temp44xx_read_bandgap_sensor_no_driver; - *temp = *temp / 1000; /* convert to degrees */ - - return 0; - } - -temp44xx_read_bandgap_sensor_no_driver: - if (cpu_is_omap4430()) - return temp4430_read_bandgap_sensor(temp); - else /* 4460 & 4470 */ - return temp4460_read_bandgap_sensor(temp); -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp4470_read_pcb_sensor - * @BRIEF read temperature from OMAP pcb temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * @param[in,out] temp: pcb sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP pcb temperature sensor - * OMAP4470 specific implementation - *//*------------------------------------------------------------------------ */ -int temp4470_read_pcb_sensor(int *temp) -{ - FILE *fp = NULL; - char line[256]; - int ret; - int conf; - static const char pcb_temp_file_gb[] = - "/sys/devices/platform/i2c_omap.4/i2c-4/4-0048/temp1_input"; - static const char pcb_temp_file_ics[] = - "/sys/devices/platform/omap/omap_i2c.4/i2c-4/4-0048/" - "temp1_input"; - char *pcb_temp_file; - - CHECK_CPU(4470, OMAPCONF_ERR_CPU); - CHECK_NULL_ARG(temp, OMAPCONF_ERR_ARG) - *temp = -273; - - /* First try to use data from temperature sensor driver, if loaded */ - if (os_is_android()) { - if (android_pastry_get() < PASTRY_ICS) - pcb_temp_file = (char *) pcb_temp_file_gb; - else - pcb_temp_file = (char *) pcb_temp_file_ics; - fp = fopen(pcb_temp_file, "r"); - if (fp == NULL) { - dprintf("%s(): couldn't open temp sensor file! (%s)\n", - __func__, pcb_temp_file); - goto temp4470_read_pcb_sensor_no_driver; - } - if (fgets(line, 256, fp) == NULL) { - fclose(fp); - goto temp4470_read_pcb_sensor_no_driver; - } - fclose(fp); - - /* Remove endind '\n' */ - line[strlen(line) - 1] = '\0'; - dprintf("%s(): line=%s len=%u\n", __func__, line, strlen(line)); - - /* Retrieve temperature, in millidegrees celcius */ - ret = sscanf(line, "%d", temp); - if (ret != 1) - goto temp4470_read_pcb_sensor_no_driver; - *temp = *temp / 1000; /* convert to degrees */ - - return 0; - } - -temp4470_read_pcb_sensor_no_driver: - conf = tmp102_read_reg(TMP102_CONF_REG); - if (conf < 0) { - fprintf(stderr, "%s(): could not read register!" - "(%d)\n", __func__, conf); - return OMAPCONF_ERR_REG_ACCESS; - } - - /* Check if tmp102 is in shut down mode */ - if (conf & TMP102_CONF_SD) { - conf &= ~TMP102_CONF_SD; - ret = tmp102_write_reg(TMP102_CONF_REG, conf); - if (ret < 0) { - fprintf(stderr, "%s(): could not write register!" - "(%d)\n", __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - } - - ret = tmp102_read_reg(TMP102_TEMP_REG); - if (ret < 0) { - fprintf(stderr, "%s(): could not read register!" - "(%d)\n", __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - *temp = tmp102_reg_to_mC(ret, conf & TMP102_CONF_EM); - *temp = *temp / 1000; /* convert to degrees */ - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_read_pcb_sensor - * @BRIEF read temperature from OMAP4470 pcb temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * @param[in,out] temp: pcb sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP4470 pcb temperature sensor - *//*------------------------------------------------------------------------ */ -int temp4460_read_pcb_sensor(int *temp) -{ - FILE *fp = NULL; + int temp, ret; char line[256]; - int ret; - static const char pcb_temp_file_gb[] = - "/sys/devices/platform/i2c_omap.1/i2c-1/1-0049/twl6030_gpadc/" - "in4_input"; - static const char pcb_temp_file_ics[] = - "/sys/devices/platform/omap/pcb_temp_sensor.0/temp1_input"; - char *pcb_temp_file; - - CHECK_CPU(4460, OMAPCONF_ERR_CPU); - CHECK_NULL_ARG(temp, OMAPCONF_ERR_ARG) - *temp = -273; - - /* First try to use data from temperature sensor driver, if loaded */ - if (os_is_android()) { - if (android_pastry_get() < PASTRY_ICS) - pcb_temp_file = (char *) pcb_temp_file_gb; - else - pcb_temp_file = (char *) pcb_temp_file_ics; - fp = fopen(pcb_temp_file, "r"); - if (fp == NULL) { - fprintf(stderr, "Couldn't open PCB sensor file! " - "(%s)\n\n", pcb_temp_file); - return OMAPCONF_ERR_NOT_AVAILABLE; - } - if (fgets(line, 256, fp) == NULL) { - fclose(fp); - return OMAPCONF_ERR_NOT_AVAILABLE; - } - fclose(fp); - - /* Remove endind '\n' */ - line[strlen(line) - 1] = '\0'; - dprintf("%s(): line=%s len=%u\n", __func__, line, strlen(line)); - - /* Retrieve temperature, in millidegrees celcius */ - ret = sscanf(line, "%d", temp); - if (ret != 1) - return OMAPCONF_ERR_NOT_AVAILABLE; - *temp = omap4460_pcb_sensor_adc2temp(*temp); - return 0; - } else { - /* FIXME */ - return OMAPCONF_ERR_NOT_AVAILABLE; - } -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_read_pcb_sensor - * @BRIEF read temperature from pcb temperature sensor - * (when available) - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * @param[in,out] temp: pcb sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from pcb temperature sensor - * (when available) - *//*------------------------------------------------------------------------ */ -int temp44xx_read_pcb_sensor(int *temp) -{ - int ret; - - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - CHECK_NULL_ARG(temp, OMAPCONF_ERR_ARG); - *temp = -273; - - /* First try to use data from temperature sensor driver, if loaded */ - if (cpu_is_omap4430()) { - printf("PCB temperature sensor is not present on OMAP4430.\n"); - *temp = TEMP_ABSOLUTE_ZERO; - ret = OMAPCONF_ERR_NOT_AVAILABLE; - } else if (cpu_is_omap4470()) { - ret = temp4470_read_pcb_sensor(temp); - } else if (cpu_is_omap4460()) { - ret = temp4460_read_pcb_sensor(temp); - } - - return ret; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_hotspot_temp_get - * @BRIEF return hotspot temperature (in deg. C) - * @RETURNS hotspot temperature (-273 deg. C in case of error) - * @DESCRIPTION return hotspot temperature (in deg. C) - *//*------------------------------------------------------------------------ */ -int temp44xx_hotspot_temp_get(void) -{ + unsigned int i; FILE *fp = NULL; - char line[256]; - int ret, degc; - static const char hotspot_temp_file[] = - "/sys/devices/platform/omap/omap_temp_sensor.0/hotspot_temp"; + static const char *sensor_filenames1[TEMP44XX_ID_MAX] = { + "/sys/devices/platform/omap4plus_scm.0/temp_sensor_hwmon.0/temp1_input", /* GLP */ + "/sys/devices/platform/omap/omap_temp_sensor.0/hotspot_temp", + "/sys/kernel/debug/emif.1/mr4", /* GLP */ + "/sys/kernel/debug/emif.1/mr4", /* GLP */ + "/sys/kernel/debug/emif.2/mr4", /* GLP */ + "/sys/kernel/debug/emif.2/mr4", /* GLP */ + "/sys/devices/platform/i2c_omap.1/i2c-1/1-0049/twl6030_gpadc/in4_input"}; /* 4460 */ + + static const char *sensor_filenames2[TEMP44XX_ID_MAX] = { + "/sys/devices/platform/omap/omap_temp_sensor.0/temp1_input", /* Android */ + "/sys/devices/platform/omap/omap_temp_sensor.0/hotspot_temp", + "/sys/devices/platform/omap/omap_emif.0/temperature", /* Android */ + "/sys/devices/platform/omap/omap_emif.0/temperature", /* Android */ + "/sys/devices/platform/omap/omap_emif.1/temperature", /* Android */ + "/sys/devices/platform/omap/omap_emif.1/temperature", /* Android */ + "/sys/devices/platform/omap/pcb_temp_sensor.0/temp1_input"}; /* 4460 */ + + static const char *sensor_filenames3[TEMP44XX_ID_MAX] = { + "/sys/devices/platform/omap4plus_scm.0/temp_sensor_hwmon.0/temp1_input", + "/sys/devices/platform/omap/omap_temp_sensor.0/hotspot_temp", + "/sys/kernel/debug/emif.1/mr4", + "/sys/kernel/debug/emif.1/mr4", + "/sys/kernel/debug/emif.2/mr4", + "/sys/kernel/debug/emif.2/mr4", + "/sys/devices/platform/i2c_omap.4/i2c-4/4-0048/temp1_input"}; /* 4470 */ + + static const char *sensor_filenames4[TEMP44XX_ID_MAX] = { + "/sys/devices/platform/omap4plus_scm.0/temp_sensor_hwmon.0/temp1_input", + "/sys/devices/platform/omap/omap_temp_sensor.0/hotspot_temp", + "/sys/kernel/debug/emif.1/mr4", + "/sys/kernel/debug/emif.1/mr4", + "/sys/kernel/debug/emif.2/mr4", + "/sys/kernel/debug/emif.2/mr4", + "/sys/devices/platform/omap/omap_i2c.4/i2c-4/4-0048/temp1_input"}; /* 4470 */ + + static const char **sensor_filenames_list[4] = { + sensor_filenames1, + sensor_filenames2, + sensor_filenames3, + sensor_filenames4}; CHECK_CPU(44xx, TEMP_ABSOLUTE_ZERO); + CHECK_ARG_LESS_THAN(id, TEMP44XX_ID_MAX, TEMP_ABSOLUTE_ZERO); - fp = fopen(hotspot_temp_file, "r"); + /* Open file exported by temp. sensor driver (if loaded) */ + for (i = 0; i < 4; i++) { + dprintf("%s(): i=%u id=%u filename=%s\n", __func__, i, id, + (char *) sensor_filenames_list[i][id]); + fp = fopen((char *) sensor_filenames_list[i][id], "r"); + if (fp != NULL) + break; + } if (fp == NULL) { - dprintf( - "Hotspot temperature sensor file (%s) could not be opened.\n", - hotspot_temp_file); - return TEMP_ABSOLUTE_ZERO; + dprintf("%s(): could not open %s file!\n", __func__, + temp44xx_name_get(id)); + temp = TEMP_ABSOLUTE_ZERO; + goto temp44xx_get_end; } + + /* Read file */ if (fgets(line, 256, fp) == NULL) { fclose(fp); - fprintf(stderr, "Unexpected error reading hotspot temperature " - "sensor file (%s).\n\n", hotspot_temp_file); - return TEMP_ABSOLUTE_ZERO; + dprintf("%s(): fgets() returned NULL!\n", __func__); + temp = TEMP_ABSOLUTE_ZERO; + goto temp44xx_get_end; } fclose(fp); /* Remove endind '\n' */ line[strlen(line) - 1] = '\0'; dprintf("%s(): line=%s len=%u\n", __func__, line, strlen(line)); - - /* Retrieve temperature, in millidegrees celcius */ - ret = sscanf(line, "hot spot temp%d", °c); - if (ret != 1) { - fprintf(stderr, "Unexpected error reading hotspot temperature " - "sensor file (%s).\n\n", hotspot_temp_file); - return TEMP_ABSOLUTE_ZERO; - } - degc = degc / 1000; /* convert to degrees */ - - return degc; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_read_mem_sensor - * @BRIEF read temperature from OMAP memory temperature sensor - * @RETURNS 0 on success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_UNEXPECTED - * @param[in] emif: EMIF instance (1-2) - * @param[in] cs: chip select (0-1) - * @param[in, out] temp: memory sensor temperature (Celcius) (returned) - * @DESCRIPTION read temperature from OMAP memory temperature sensor - *//*------------------------------------------------------------------------ */ -int temp44xx_read_mem_sensor(unsigned short emif, - unsigned short cs, omap4_emif_temperature *temp) -{ - unsigned int emif_lpddr2_mode_reg_cfg_addr; - unsigned int emif_lpddr2_mode_reg_cfg; - unsigned int emif_lpddr2_mode_reg_data_addr; - int ret; - - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - CHECK_ARG_LESS_THAN(cs, emif44xx_cs_count_get(), OMAPCONF_ERR_ARG); - CHECK_NULL_ARG(temp, OMAPCONF_ERR_ARG); - *temp = OMAP4_EMIF_TEMP_BELOW_85C; - - switch (emif) { - case 1: - emif_lpddr2_mode_reg_cfg_addr = - OMAP44XX_EMIF1_LPDDR2_MODE_REG_CFG; - emif_lpddr2_mode_reg_data_addr = - OMAP44XX_EMIF1_LPDDR2_MODE_REG_DATA; - break; - case 2: - emif_lpddr2_mode_reg_cfg_addr = - OMAP44XX_EMIF2_LPDDR2_MODE_REG_CFG; - emif_lpddr2_mode_reg_data_addr = - OMAP44XX_EMIF2_LPDDR2_MODE_REG_DATA; - break; - default: - return OMAPCONF_ERR_ARG; - } - - switch (cs) { - case 0: - emif_lpddr2_mode_reg_cfg = 0x4; - break; - case 1: - emif_lpddr2_mode_reg_cfg = 0x80000004; - break; - default: - return OMAPCONF_ERR_ARG; - } - /* Write EMIF cfg register */ - ret = mem_write(emif_lpddr2_mode_reg_cfg_addr, emif_lpddr2_mode_reg_cfg); - if (ret != 0) { - dprintf("%s(): Error writing cfg register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - - /* Read EMIF data register */ - ret = mem_read(emif_lpddr2_mode_reg_data_addr, (unsigned int *) temp); - if (ret != 0) { - dprintf("%s(): Error reading data register! (%d)\n", - __func__, ret); - return OMAPCONF_ERR_REG_ACCESS; - } - dprintf("%s(): emif_lpddr2_mode_reg_data = 0x%08X\n", __func__, *temp); - - /* Mask result with MR4_SDRAM_REF_RATE_MASK */ - *temp &= 0x7; - - /* if reported value is < OMAP4_EMIF_TEMP_BELOW_85C, treat as normal */ - if (*temp < OMAP4_EMIF_TEMP_BELOW_85C) - *temp = OMAP4_EMIF_TEMP_BELOW_85C; - - if ((*temp == OMAP4_EMIF_TEMP_BELOW_85C) || - (*temp == OMAP4_EMIF_TEMP_ABOVE_85C) || - (*temp == OMAP4_EMIF_TEMP_EXCEED_105C)) { - return 0; - } else { - *temp = OMAP4_EMIF_TEMP_RESERVED; - return OMAPCONF_ERR_UNEXPECTED; - } -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_read_sensors - * @BRIEF read OMAP4 temperature sensors (bandgap, pcb, memory) - * @RETURNS 0 - * @DESCRIPTION read OMAP4 temperature sensors (bandgap, pcb, memory) - *//*------------------------------------------------------------------------ */ -int temp44xx_read_sensors(void) -{ - int ret; - int temp_sensor_c, temp_sensor_f; - omap4_emif_temperature temp_mem; - char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; - unsigned int row = 0; - unsigned short emif, cs, num_cs; - - num_cs = emif44xx_cs_count_get(); - - ret = temp44xx_read_mem_sensor(1, 0, &temp_mem); - ret = temp44xx_read_mem_sensor(2, 0, &temp_mem); - - if (num_cs == 2) { - ret = temp44xx_read_mem_sensor(1, 1, &temp_mem); - ret = temp44xx_read_mem_sensor(2, 1, &temp_mem); - } - - autoadjust_table_init(table); - row = 0; - strncpy(table[row][0], "OMAP Temperature Sensor", TABLE_MAX_ELT_LEN); - strncpy(table[row][1], "Temperature (C)", TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "Temperature (F)", TABLE_MAX_ELT_LEN); - row++; - - /* PCB temperature sensor is not available on OMAP4430 */ - if (!cpu_is_omap4430()) { - strncpy(table[row][0], "PCB", TABLE_MAX_ELT_LEN); - ret = temp44xx_read_pcb_sensor(&temp_sensor_c); - if (ret != 0) { - strncpy(table[row][1], "Unavailable", - TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "Unavailable", - TABLE_MAX_ELT_LEN); - } else { - temp_sensor_f = ((temp_sensor_c * 9) / 5) + 32; - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_c); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_f); - } - row += 1; - } - - strncpy(table[row][0], "Bandgap", TABLE_MAX_ELT_LEN); - ret = temp44xx_read_bandgap_sensor(&temp_sensor_c); - if (ret != 0) { - strncpy(table[row][1], "error!", TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "error!", TABLE_MAX_ELT_LEN); - } else { - temp_sensor_f = celcius2fahrenheit(temp_sensor_c); - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_c); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_f); - } - row++; - - strncpy(table[row][0], "Hotspot", TABLE_MAX_ELT_LEN); - temp_sensor_c = temp44xx_hotspot_temp_get(); - if (temp_sensor_c == TEMP_ABSOLUTE_ZERO) { - strncpy(table[row][1], "Unavailable", TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "Unavailable", TABLE_MAX_ELT_LEN); - } else { - temp_sensor_f = ((temp_sensor_c * 9) / 5) + 32; - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_c); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%d", - temp_sensor_f); - } - row += 2; - - for (emif = 1; emif < 3; emif++) { - for (cs = 0; cs < num_cs; cs++) { - snprintf(table[row][0], TABLE_MAX_ELT_LEN, - "EMIF%d CS%d", emif, cs); - ret = temp44xx_read_mem_sensor(emif, cs, - &temp_mem); - switch (temp_mem) { - case OMAP4_EMIF_TEMP_BELOW_85C: - strncpy(table[row][1], "<= 85", - TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "<= 185", - TABLE_MAX_ELT_LEN); - break; - case OMAP4_EMIF_TEMP_ABOVE_85C: - strncpy(table[row][1], "> 85", - TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "> 185", - TABLE_MAX_ELT_LEN); - break; - case OMAP4_EMIF_TEMP_EXCEED_105C: - strncpy(table[row][1], "> 105!", - TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "> 221!", - TABLE_MAX_ELT_LEN); - break; - default: - strncpy(table[row][1], "error!", - TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "error!", - TABLE_MAX_ELT_LEN); - } - row++; - } - } - autoadjust_table_print(table, row, 3); - - return 0; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp44xx_main - * @BRIEF main entry point - * @RETURNS 0 in case of success - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_INTERNAL - * @param[in] argc: shell input argument number - * @param[in] argv: shell input argument(s) - * @DESCRIPTION main entry point - *//*------------------------------------------------------------------------ */ -int temp44xx_main(int argc, char *argv[]) -{ - int ret; - omap4_emif_temperature temp_mem; - int temp_bandgap_pcb; - unsigned int emif; - unsigned int cs; - - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - - if (argc == 1) { - ret = temp44xx_read_sensors(); - } else if (argc == 2) { - if (strcmp(argv[1], "bandgap") == 0) { - ret = temp44xx_read_bandgap_sensor( - &temp_bandgap_pcb); - if (ret == 0) - printf("%d\n", temp_bandgap_pcb); - } else if (strcmp(argv[1], "pcb") == 0) { - ret = temp44xx_read_pcb_sensor(&temp_bandgap_pcb); - if (ret == 0) - printf("%d\n", temp_bandgap_pcb); - } else if (strcmp(argv[1], "hotspot") == 0) { - temp_bandgap_pcb = temp44xx_hotspot_temp_get(); - if (temp_bandgap_pcb != TEMP_ABSOLUTE_ZERO) - printf("%d\n", temp_bandgap_pcb); - } else { - help(HELP_TEMPERATURE); - ret = OMAPCONF_ERR_ARG; - } - } else if ((argc == 4) && - (strcmp(argv[1], "mem") == 0)) { - /* Retrieve EMIF # */ - ret = sscanf(argv[2], "%u", &emif); + if ((id != TEMP44XX_DDR1_CS1) && (id != TEMP44XX_DDR1_CS2) && + (id != TEMP44XX_DDR2_CS1) && (id != TEMP44XX_DDR2_CS1)) { + /* Retrieve temperature, in millidegrees celcius */ + ret = sscanf(line, "%d", &temp); if (ret != 1) { - dprintf("emif not found (%s)\n", argv[2]); - help(HELP_TEMPERATURE); - return OMAPCONF_ERR_ARG; + dprintf("%s(): sscanf() returned %d!\n", __func__, ret); + temp = TEMP_ABSOLUTE_ZERO; + goto temp44xx_get_end; } - dprintf("emif = %u\n", emif); - /* Retrieve CS # */ - ret = sscanf(argv[3], "%u", &cs); + temp = temp / 1000; /* convert to degrees */ + } else { + /* Retrieve temperature as MR4 code */ + ret = sscanf(line, "MR4=%d", &temp); if (ret != 1) { - dprintf("cs not found (%s)\n", argv[3]); - help(HELP_TEMPERATURE); - return OMAPCONF_ERR_ARG; - } - dprintf("cs = %u\n", cs); - if (cs >= emif44xx_cs_count_get()) { - dprintf("bad cs (%u)\n", cs); - help(HELP_TEMPERATURE); - return OMAPCONF_ERR_ARG; - } - - ret = temp44xx_read_mem_sensor(emif, cs, &temp_mem); - if (ret == 0) { - switch (temp_mem) { - case OMAP4_EMIF_TEMP_BELOW_85C: - printf("%d (<= 85C / <= 185F)\n", - (unsigned int) temp_mem); - break; - case OMAP4_EMIF_TEMP_ABOVE_85C: - printf("%d (> 85C / > 185F)\n", - (unsigned int) temp_mem); - break; - case OMAP4_EMIF_TEMP_EXCEED_105C: - printf("%d (> 105! / > 221!)\n", - (unsigned int) temp_mem); - break; - default: - break; + dprintf("%s(): sscanf(\"MR4=%%d\") returned %d!\n", + __func__, ret); + ret = sscanf(line, "%d", &temp); + if (ret != 1) { + dprintf("%s(): sscanf(\"%%d\") returned %d!\n", + __func__, ret); + temp = TEMP_ABSOLUTE_ZERO; + goto temp44xx_get_end; } - } else if (ret == OMAPCONF_ERR_ARG) { - dprintf("incorrect EMIF (%u) / CS (%u)\n", emif, cs); - help(HELP_TEMPERATURE); - } else { - printf("error during the capture! (%d)\n", ret); } - } else { - help(HELP_TEMPERATURE); - ret = OMAPCONF_ERR_ARG; } - return ret; +temp44xx_get_end: + if ((id != TEMP44XX_DDR1_CS1) && (id != TEMP44XX_DDR1_CS2) && + (id != TEMP44XX_DDR2_CS1) && (id != TEMP44XX_DDR2_CS1)) { + dprintf("%s(%s): temp is %d C\n", __func__, + temp44xx_name_get(id), temp); + } else { + dprintf("%s(%s): temp is %s\n", __func__, + temp44xx_name_get(id), + emif_mr4_convert(temp, TEMP_CELCIUS_DEGREES)); + } + return temp; } diff -Nru tiomapconf-1.50.0/omap4/temperature44xx.h tiomapconf-1.52.0/omap4/temperature44xx.h --- tiomapconf-1.50.0/omap4/temperature44xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/temperature44xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -46,7 +46,19 @@ #define __TEMPERATURE44XX_H__ -#define TEMP_ABSOLUTE_ZERO -273 +#include + + +typedef enum { + TEMP44XX_BANDGAP, + TEMP44XX_HOTSPOT, + TEMP44XX_DDR1_CS1, + TEMP44XX_DDR1_CS2, + TEMP44XX_DDR2_CS1, + TEMP44XX_DDR2_CS2, + TEMP44XX_PCB, + TEMP44XX_ID_MAX +} temp44xx_sensor_id; typedef enum { @@ -57,12 +69,9 @@ } omap4_emif_temperature; -int temp44xx_main(int argc, char *argv[]); -int temp44xx_read_pcb_sensor(int *temp); -int temp44xx_read_bandgap_sensor(int *temp); -int temp44xx_hotspot_temp_get(void); -int temp44xx_read_mem_sensor(unsigned short emif, - unsigned short cs, omap4_emif_temperature *temp); +temp44xx_sensor_id temp44xx_voltdm2sensor_id(voltdm44xx_id vdd_id); +const char *temp44xx_name_get(temp44xx_sensor_id id); +int temp44xx_get(temp44xx_sensor_id id); #endif diff -Nru tiomapconf-1.50.0/omap4/uc_audit44xx.c tiomapconf-1.52.0/omap4/uc_audit44xx.c --- tiomapconf-1.50.0/omap4/uc_audit44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/uc_audit44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -122,9 +122,9 @@ static const opp44xx_id omap4_ics_por_opp_table[OMAP4_VD_ID_MAX][OMAP4_UC_MAX] = { {OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100}, - {OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50}, - {OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50}, - {OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50} }; + {OMAP4_OPP50, OMAP4_OPPDPLL_CASC, OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50, OMAP4_OPP50}, + {OMAP4_OPP50, OMAP4_OPPDPLL_CASC, OMAP4_OPP100, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50}, + {OMAP4_OPP50, OMAP4_OPPDPLL_CASC, OMAP4_OPP100, OMAP4_OPP50, OMAP4_OPP100, OMAP4_OPP50} }; static const opp44xx_id omap4470_blaze_ics_por_opp_table[OMAP4_VD_ID_MAX][OMAP4_UC_MAX] = { {OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100, OMAP4_OPP100}, @@ -211,7 +211,7 @@ static const dpll_status omap4_gb_por_dpll_status_table[DPLL44XX_ID_MAX][OMAP4_UC_MAX] = { {DPLL_STATUS_LOCKED, DPLL_STATUS_BYPASSED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED}, /* DPLL44XX_MPU */ - {DPLL_STATUS_STOPPED, DPLL_STATUS_STOPPED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_STOPPED}, /* DPLL44XX_IVA */ + {DPLL_STATUS_STOPPED, DPLL_STATUS_BYPASSED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_STOPPED}, /* DPLL44XX_IVA */ {DPLL_STATUS_LOCKED, DPLL_STATUS_BYPASSED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED}, /* DPLL44XX_CORE */ {DPLL_STATUS_LOCKED, DPLL_STATUS_BYPASSED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED}, /* DPLL44XX_PER */ {DPLL_STATUS_STOPPED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_LOCKED, DPLL_STATUS_STOPPED}, /* DPLL44XX_ABE */ @@ -281,6 +281,7 @@ opp44xx_id por_opp44xx_get(voltdm44xx_id id, omap4_use_case_id uc_id) { opp44xx_id opp_por; + android_pastry_id pastry; #ifdef UC_AUDIT44XX_DEBUG char vname[VOLTDM44XX_MAX_NAME_LENGTH]; char oname[OPP44XX_MAX_NAME_LENGTH]; @@ -290,13 +291,13 @@ CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, OPP44XX_ID_MAX); CHECK_ARG_LESS_THAN(uc_id, OMAP4_UC_MAX, OPP44XX_ID_MAX); - /* FIXME: find expected OPP for Generic Linux */ - switch (android_pastry_get()) { - case PASTRY_GB: - case PASTRY_HC: + pastry = android_pastry_get(); + if ((pastry == PASTRY_UNKNOWN) || (pastry == PASTRY_ID_MAX)) { + /* FIXME: find expected OPP for Generic Linux */ + opp_por = OPP44XX_ID_MAX; + } else if (pastry < PASTRY_ICS) { opp_por = omap4_gb_por_opp_table[id][uc_id]; - break; - case PASTRY_ICS: + } else { if (!cpu_is_omap4470()) opp_por = omap4_ics_por_opp_table[id][uc_id]; else if (((unsigned int) clk44xx_get_clock_speed(OMAP4_L3_ICLK1, 1) == 100) || @@ -304,9 +305,6 @@ opp_por = omap4470_blaze_ics_por_opp_table[id][uc_id]; else opp_por = omap4470_tablet_ics_por_opp_table[id][uc_id]; - break; - default: - opp_por = OPP44XX_ID_MAX; } #ifdef UC_AUDIT44XX_DEBUG @@ -447,7 +445,7 @@ return (char *) warning; } /* Get nominal voltage for this particular UC */ - *volt_por = voltdm44xx_nominal_voltage_get(vd_id, opp_por); + *volt_por = voltdm44xx_por_nominal_voltage_get(vd_id, opp_por); if (*volt_por <= 0) { (*wng_nbr)++; return (char *) warning; @@ -513,7 +511,7 @@ } /* Get expected retention voltage */ - *volt_por = voltdm44xx_retention_voltage_get(vd_id); + *volt_por = voltdm44xx_por_retention_voltage_get(vd_id); if (*volt_por <= 0.0) { (*wng_nbr)++; return (char *) warning; @@ -703,6 +701,7 @@ unsigned int *err_nbr, unsigned int *wng_nbr) { int ret; + android_pastry_id pastry; #ifdef UC_AUDIT44XX_DEBUG char pwst[6]; char pwst_por[6]; @@ -736,20 +735,17 @@ } /* Get expected power domain state */ - /* FIXME: find expected power domain state for Generic Linux */ - switch (android_pastry_get()) { - case PASTRY_GB: - case PASTRY_HC: - *state_por = omap4_por_hotplug_cpu1_power_state_table[uc_id]; - break; - case PASTRY_ICS: - *state_por = - omap4_por_interactive_cpu1_power_state_table[uc_id]; - break; - default: + pastry = android_pastry_get(); + if ((pastry == PASTRY_UNKNOWN) || (pastry == PASTRY_ID_MAX)) { + /* FIXME: find expected OPP for Generic Linux */ *state_por = PWRDM_STATE_MAX; (*wng_nbr)++; return (char *) warning; + } else if (pastry < PASTRY_ICS) { + *state_por = omap4_por_hotplug_cpu1_power_state_table[uc_id]; + } else { + *state_por = + omap4_por_interactive_cpu1_power_state_table[uc_id]; } #ifdef UC_AUDIT44XX_DEBUG @@ -790,6 +786,7 @@ { int ret; omap4_dpll_params dpll_params; + android_pastry_id pastry; if ((status == NULL) || (status_por == NULL) || (err_nbr == NULL) || (wng_nbr == NULL)) { @@ -817,18 +814,20 @@ *status = dpll_params.status; /* Get expected DPLL Status */ - /* FIXME: find expected DPLL Status for Generic Linux */ - switch (android_pastry_get()) { - case PASTRY_GB: - case PASTRY_HC: - *status_por = omap4_gb_por_dpll_status_table[dpll_id][uc_id]; - break; - case PASTRY_ICS: - *status_por = omap4_ics_por_dpll_status_table[dpll_id][uc_id]; - break; - default: + pastry = android_pastry_get(); + if ((pastry == PASTRY_UNKNOWN) || (pastry == PASTRY_ID_MAX)) { + /* FIXME: find expected OPP for Generic Linux */ (*wng_nbr)++; return (char *) warning; + } else if (pastry < PASTRY_ICS) { + *status_por = omap4_gb_por_dpll_status_table[dpll_id][uc_id]; + } else { + if (cpu_is_omap4470()) + *status_por = + omap4_ics_por_dpll_status_table[dpll_id][uc_id]; + else + *status_por = + omap4_gb_por_dpll_status_table[dpll_id][uc_id]; } #ifdef UC_AUDIT44XX_DEBUG @@ -864,6 +863,7 @@ unsigned int *err_nbr, unsigned int *wng_nbr) { FILE *fp = NULL; + android_pastry_id pastry; if ((gov == NULL) || (gov_por == NULL) || (err_nbr == NULL) || (wng_nbr == NULL)) { @@ -891,18 +891,15 @@ dprintf("gov = %s\n", gov); /* Retrieve expected governor depending on Android pastry */ - /* FIXME: find expected governor for Generic Linux */ - switch (android_pastry_get()) { - case PASTRY_GB: - case PASTRY_HC: - strncpy(gov_por, "hotplug", 16); - break; - case PASTRY_ICS: - strncpy(gov_por, "interactive", 16); - break; - default: + pastry = android_pastry_get(); + if ((pastry == PASTRY_UNKNOWN) || (pastry == PASTRY_ID_MAX)) { + /* FIXME: find expected OPP for Generic Linux */ (*wng_nbr)++; return (char *) warning; + } else if (pastry < PASTRY_ICS) { + strncpy(gov_por, "hotplug", 16); + } else { + strncpy(gov_por, "interactive", 16); } if (strncmp(gov, gov_por, strlen(gov_por)) == 0) { @@ -945,6 +942,7 @@ unsigned int cstate_usage_sample1[MAX_CSTATE]; unsigned int cstate_usage_sample2[MAX_CSTATE]; unsigned int i; + android_pastry_id pastry; if ((cstate == NULL) || (cstate_por == NULL) || (err_nbr == NULL) || (wng_nbr == NULL)) { @@ -968,18 +966,15 @@ } /* Retrieve expected lowest C-State */ - /* FIXME: find expected lowest C-State for Generic Linux */ - switch (android_pastry_get()) { - case PASTRY_GB: - case PASTRY_HC: - *cstate_por = omap4_gb_por_cstate_table[uc_id]; - break; - case PASTRY_ICS: - *cstate_por = omap4_ics_por_cstate_table[uc_id]; - break; - default: + pastry = android_pastry_get(); + if ((pastry == PASTRY_UNKNOWN) || (pastry == PASTRY_ID_MAX)) { + /* FIXME: find expected OPP for Generic Linux */ (*wng_nbr)++; return (char *) warning; + } else if (pastry < PASTRY_ICS) { + *cstate_por = omap4_gb_por_cstate_table[uc_id]; + } else { + *cstate_por = omap4_ics_por_cstate_table[uc_id]; } dprintf("%s(): UC is %s POR C-STATE is C%d\n", __func__, @@ -1192,11 +1187,8 @@ /* Check Smart-Reflex is enabled */ strncpy(table[row][0], "Smart-Reflex", TABLE_MAX_ELT_LEN); row++; - switch (android_pastry_get()) { - case PASTRY_UNKNOWN: - case PASTRY_ID_MAX: - case PASTRY_ICS: - /* ICS use SR Class 1.5. + if (android_pastry_get() != PASTRY_GB) { + /* ICS and next pastries use SR Class 1.5. * Sensors are disabled outside of periodic recalibration. * Just ignore this audit. */ @@ -1213,11 +1205,6 @@ row += 2; test_nbr++; goto use_case_audit44xx_voltage_check; - break; - - default: - /* execute regular audit */ - break; } if (sr44xx_is_enabled(OMAP4_SR_MPU) == 1) { diff -Nru tiomapconf-1.50.0/omap4/vc44xx.c tiomapconf-1.52.0/omap4/vc44xx.c --- tiomapconf-1.50.0/omap4/vc44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/vc44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -44,6 +44,8 @@ #include +#include +#include #include #include #include @@ -350,6 +352,46 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION vc44xx_registers_get + * @BRIEF save all VC registers in structure provided as argument. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_REG_ACCESS + * @param[in, out] vc_regs: structure where to store VC registers + * @DESCRIPTION save all VC registers in structure provided as argument. + *//*------------------------------------------------------------------------ */ +int vc44xx_registers_get(vc44xx_registers *vc_regs) +{ + int ret; + + CHECK_CPU(44xx, OMAPCONF_ERR_CPU); + CHECK_NULL_ARG(vc_regs, OMAPCONF_ERR_ARG); + + ret = mem_read(OMAP4430_PRM_VC_SMPS_SA, + &(vc_regs->prm_vc_smps_sa)); + ret += mem_read(OMAP4430_PRM_VC_VAL_SMPS_RA_VOL, + &(vc_regs->prm_vc_smps_ra_vol)); + ret += mem_read(OMAP4430_PRM_VC_VAL_SMPS_RA_CMD, + &(vc_regs->prm_vc_val_smps_ra_cmd)); + ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L, + &(vc_regs->prm_vc_val_cmd_vdd_core_l)); + ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L, + &(vc_regs->prm_vc_val_cmd_vdd_mpu_l)); + ret += mem_read(OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L, + &(vc_regs->prm_vc_val_cmd_vdd_iva_l)); + ret += mem_read(OMAP4430_PRM_VC_CFG_CHANNEL, + &(vc_regs->prm_vc_cfg_channel)); + ret += mem_read(OMAP4430_PRM_VC_CFG_I2C_MODE, + &(vc_regs->prm_vc_cfg_i2c_mode)); + ret += mem_read(OMAP4430_PRM_VC_CFG_I2C_CLK, + &(vc_regs->prm_vc_cfg_i2c_clk)); + + return ret; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION vc44xx_config_show * @BRIEF decode and show VC current configuration * @RETURNS 0 in case of success diff -Nru tiomapconf-1.50.0/omap4/vc44xx.h tiomapconf-1.52.0/omap4/vc44xx.h --- tiomapconf-1.50.0/omap4/vc44xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/vc44xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -76,6 +76,8 @@ unsigned char *cmd_on, unsigned char *cmd_onlp, unsigned char *cmd_ret, unsigned char *cmd_off); +int vc44xx_registers_get(vc44xx_registers *vc_regs); + int vc44xx_config_show(FILE *stream, vc44xx_registers *vc_regs); diff -Nru tiomapconf-1.50.0/omap4/voltdm44xx.c tiomapconf-1.52.0/omap4/voltdm44xx.c --- tiomapconf-1.50.0/omap4/voltdm44xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/voltdm44xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -42,7 +42,9 @@ */ +#include #include +#include #include #include #include @@ -54,9 +56,11 @@ #include #include #include +#include #include #include #include +#include /* #define VOLTDM44XX_DEBUG */ @@ -67,6 +71,9 @@ #endif +#define OPP_MAX_RETRY 100 + + const char voltdm44xx_name_table[OMAP4_VD_ID_MAX][VOLTDM44XX_MAX_NAME_LENGTH] = { "LDO_WKUP", @@ -83,6 +90,7 @@ "OPP100_LOW", "OPP119_LOW", "OPP119_HIGH", + "OPP100_HIGH", "UNKNOWN"}; @@ -103,10 +111,10 @@ static const double omap4430_nominal_voltage_table[OMAP4_VD_ID_MAX][OPP44XX_ID_MAX] = { - {0.0, 0.0, 0.0, 0.0, 0.0, 0.0}, /* LDO_WKUP */ - {1.0255, 1.0255, 1.2027, 1.3293, 1.3926, 1.3926}, /* VDD_MPU */ - {0.9622, 0.9622, 1.114, 1.291, -1.0, -1.0}, /* VDD_IVA */ - {0.9622, 0.9622, 1.127, -1.0, -1.0, -1.0} }; /* VDD_CORE */ + {1.06, 1.06, 1.06, 1.06, 1.06, 1.06, 1.06}, /* LDO_WKUP */ + {1.0255, 1.0255, 1.2027, 1.3293, 1.3926, 1.3926, -1.0}, /* VDD_MPU */ + {0.9622, 0.9622, 1.114, 1.291, -1.0, -1.0, -1.0}, /* VDD_IVA */ + {0.9622, 0.9622, 1.127, -1.0, -1.0, -1.0, -1.0} }; /* VDD_CORE */ static const double omap4460_retention_voltage_table[OMAP4_VD_ID_MAX] = { @@ -115,9 +123,9 @@ static const double omap4460_nominal_voltage_table[OMAP4_VD_ID_MAX][OPP44XX_ID_MAX] = { - {0.0, 0.0, 0.0, 0.0, 0.0, 0.0}, /* LDO_WKUP */ - {1.025, 1.025, 1.203, 1.317, 1.380, 1.380}, /* VDD_MPU */ - {0.9622, 0.9622, 1.114, 1.291, 1.380, 1.380}, /* VDD_IVA */ + {1.06, 1.06, 1.06, 1.06, 1.06, 1.06, 1.06}, /* LDO_WKUP */ + {1.025, 1.025, 1.203, 1.317, 1.380, 1.380, -1.0}, /* VDD_MPU */ + {0.9622, 0.9622, 1.114, 1.291, 1.380, 1.380, -1.0}, /* VDD_IVA */ {0.9622, 0.9622, 1.127, 1.2534, -1.0, -1.0} }; /* VDD_CORE */ @@ -127,10 +135,10 @@ static const double omap4470_nominal_voltage_table[OMAP4_VD_ID_MAX][OPP44XX_ID_MAX] = { - {0.0, 0.0, 0.0, 0.0, 0.0, 0.0}, /* LDO_WKUP */ - {1.0255, 1.0255, 1.2027, 1.3167, 1.380, 1.380}, /* VDD_MPU */ - {0.9622, 0.9622, 1.1394, 1.2914, 1.380, 1.380}, /* VDD_IVA */ - {0.9622, 0.9622, 0.9622, 1.1255, 1.2534, 1.2534} }; /* VDD_CORE */ + {1.06, 1.06, 1.06, 1.06, 1.06, 1.06, 1.06}, /* LDO_WKUP */ + {1.0255, 1.0255, 1.2027, 1.3167, 1.380, 1.380, -1.0}, /* VDD_MPU */ + {0.9622, 0.9622, 1.1394, 1.2914, 1.380, 1.380, -1.0}, /* VDD_IVA */ + {0.9622, 0.9622, 0.9622, 1.1255, 1.2534, 1.253, 1.1274} }; /* VDD_CORE */ /* ------------------------------------------------------------------------*//** @@ -188,21 +196,66 @@ /* ------------------------------------------------------------------------*//** * @FUNCTION voltdm44xx_retention_voltage_get - * @BRIEF return voltage domain retention voltage + * @BRIEF return voltage domain retention voltage, in volt. * @RETURNS voltage domain retention voltage on success (> 0) * <= 0 in case of error * @param[in] id: voltage domain ID - * @DESCRIPTION return voltage domain retention voltage + * @DESCRIPTION return voltage domain retention voltage, in volt. *//*------------------------------------------------------------------------ */ double voltdm44xx_retention_voltage_get(voltdm44xx_id id) { + int ret; double volt; + vc44xx_registers vc_regs; + unsigned char cmd_on, cmd_onlp, cmd_ret, cmd_off; #ifdef VOLTDM44XX_DEBUG char vname[VOLTDM44XX_MAX_NAME_LENGTH]; #endif - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, -1.0); + CHECK_CPU(44xx, (double) OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, (double) OMAPCONF_ERR_ARG); + + /* Retrieve VC registers */ + ret = vc44xx_registers_get(&vc_regs); + if (ret != 0) + return (double) ret; + + /* Retrieve RET command value */ + ret = vc44xx_cmd_values_get(id, &vc_regs, + &cmd_on, &cmd_onlp, &cmd_ret, &cmd_off); + if (ret != 0) + return (double) ret; + + /* Convert RET command value to voltage */ + volt = smps_vsel2volt(vdd_id2smps_id(id), cmd_ret); + + dprintf("%s(%s): retention voltage = %lfV\n", __func__, + voltdm44xx_get_name(id, vname), volt); + + return volt; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm44xx_por_retention_voltage_get + * @BRIEF return voltage domain retention voltage, as defined in + * Data Manual. + * @RETURNS domain retention voltage on success (> 0, in volt) + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] id: voltage domain ID + * @DESCRIPTION return voltage domain retention voltage, as defined in + * Data Manual. + *//*------------------------------------------------------------------------ */ +double voltdm44xx_por_retention_voltage_get(voltdm44xx_id id) +{ + double volt; + #ifdef VOLTDM44XX_DEBUG + char vname[VOLTDM44XX_MAX_NAME_LENGTH]; + #endif + + CHECK_CPU(44xx, (double) OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, (double) OMAPCONF_ERR_ARG); switch (cpu_get()) { case OMAP_4430: @@ -215,7 +268,7 @@ volt = omap4470_retention_voltage_table[id]; break; default: - return -1.0; + return OMAPCONF_ERR_CPU; } dprintf("%s(%s): retention voltage = %lfV\n", __func__, @@ -229,12 +282,59 @@ * @FUNCTION voltdm44xx_nominal_voltage_get * @BRIEF return voltage domain nominal voltage * @RETURNS voltage domain nominal voltage on success (> 0) - * <= 0 in case of error + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_NOT_AVAILABLE * @param[in] id: voltage domain ID - * @param[in] opp: opp id * @DESCRIPTION return voltage domain nominal voltage *//*------------------------------------------------------------------------ */ -double voltdm44xx_nominal_voltage_get(voltdm44xx_id id, opp44xx_id opp) +double voltdm44xx_nominal_voltage_get(voltdm44xx_id id) +{ + int ret; + double volt; + vc44xx_registers vc_regs; + unsigned char cmd_on, cmd_onlp, cmd_ret, cmd_off; + #ifdef VOLTDM44XX_DEBUG + char vname[VOLTDM44XX_MAX_NAME_LENGTH]; + #endif + + CHECK_CPU(44xx, (double) OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, (double) OMAPCONF_ERR_ARG); + + /* Retrieve VC registers */ + ret = vc44xx_registers_get(&vc_regs); + if (ret != 0) + return (double) ret; + + /* Retrieve ON command value */ + ret = vc44xx_cmd_values_get(id, &vc_regs, + &cmd_on, &cmd_onlp, &cmd_ret, &cmd_off); + if (ret != 0) + return (double) ret; + + /* Convert ON command value to voltage */ + volt = smps_vsel2volt(vdd_id2smps_id(id), cmd_on); + + dprintf("%s(%s): ON voltage = %lfV\n", __func__, + voltdm44xx_get_name(id, vname), volt); + + return volt; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm44xx_por_nominal_voltage_get + * @BRIEF return voltage domain nominal voltage, as defined in + * Data Manual. + * @RETURNS domain nominal voltage on success (> 0, in volt) + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] id: voltage domain ID + * @param[in] opp: opp id + * @DESCRIPTION return voltage domain nominal voltage, as defined in + * Data Manual. + *//*------------------------------------------------------------------------ */ +double voltdm44xx_por_nominal_voltage_get(voltdm44xx_id id, opp44xx_id opp) { double volt; #ifdef VOLTDM44XX_DEBUG @@ -243,8 +343,8 @@ #endif CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, -1.0); - CHECK_ARG_LESS_THAN(opp, OPP44XX_ID_MAX, -1.0); + CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, (double) OMAPCONF_ERR_ARG); + CHECK_ARG_LESS_THAN(opp, OPP44XX_ID_MAX, (double) OMAPCONF_ERR_ARG); #ifdef VOLTDM44XX_DEBUG voltdm44xx_opp2string(oname, opp, id); @@ -261,7 +361,7 @@ volt = omap4470_nominal_voltage_table[id][opp]; break; default: - return -1.0; + return OMAPCONF_ERR_CPU; } dprintf("%s(%s, %s): nominal voltage = %lfV\n", __func__, @@ -277,6 +377,9 @@ #undef dprintf #define dprintf(format, ...) printf(format, ## __VA_ARGS__) #endif +#else +#undef dprintf +#define dprintf(format, ...) #endif /* ------------------------------------------------------------------------*//** * @FUNCTION voltdm44xx_get_opp @@ -297,9 +400,10 @@ unsigned int opp_id; double speed_curr = 0.0, speed_por = 0.0; double gfx_speed_curr = 0.0, gfx_speed_por = 0.0; + double dss_speed_curr = 0.0, dss_speed_por = 0.0; omap4_dpll_params dpll_params; dpll44xx_id dpll_id; - #if (defined OMAP4CONF_GET_OPP_DEBUG || defined VOLTDM44XX_DEBUG) + #ifdef OMAP4CONF_GET_OPP_DEBUG char mname[MOD44XX_MAX_NAME_LENGTH]; char cname[CLOCK44XX_MAX_NAME_LENGTH]; char vname[VOLTDM44XX_MAX_NAME_LENGTH]; @@ -361,8 +465,7 @@ dprintf("%s(): %s speed is %lfMHz\n", __func__, clk44xx_get_name(clk_id, cname), speed_curr); for (opp_id = 0; opp_id < OPP44XX_ID_MAX; opp_id++) { - #if (defined OMAP4CONF_GET_OPP_DEBUG || \ - defined VOLTDM44XX_DEBUG) + #ifdef OMAP4CONF_GET_OPP_DEBUG voltdm44xx_opp2string(s_opp, opp_id, id); #endif @@ -409,16 +512,54 @@ if ((int) gfx_speed_curr == (int) gfx_speed_por) { opp_id = OMAP447X_OPP119_LOW; - #if (defined OMAP4CONF_GET_OPP_DEBUG ||\ - defined VOLTDM44XX_DEBUG) - voltdm44xx_opp2string(s_opp, opp_id, - id); + #ifdef OMAP4CONF_GET_OPP_DEBUG + voltdm44xx_opp2string(s_opp, opp_id, id); #endif dprintf("%s(): GFX POR Speed == OPP119_LOW " "POR Speed\n", __func__); } else { dprintf("%s(): GFX POR Speed != OPP119_LOW " "POR Speed\n", __func__); + continue; + } + } else if (cpu_is_omap4470() && (id == OMAP4_VDD_CORE) && \ + (opp_id == OMAP447X_OPP50_HIGH)) { + /* for opp_id == OMAP447X_OPP50_HIGH + * and opp_id == OMAP447X_OPP100_HIGH + * L3 clock frequencies are equal. + * Use DSS clock frequencies to distinguish. + */ + ret = mod44xx_get_por_clk_speed(OMAP4_DISPC, + OMAP447X_OPP50_HIGH, &dss_speed_por); + if (ret != 0) { + dprintf("%s(): could not get %s %s POR " + "speed! (%d)\n", __func__, + mod44xx_get_name(OMAP4_DISPC, mname), + "OPP50_HIGH", ret); + return ret; + } + dprintf("%s(): %s POR Speed for OMAP447X_OPP50_HIGH is %lfMHz\n", + __func__, clk44xx_get_name( + OMAP4_DSS_FCLK, cname), + dss_speed_por); + + dss_speed_curr = + clk44xx_get_clock_speed(OMAP4_DSS_FCLK, 1); + dprintf("%s(): %s speed is %lfMHz\n", __func__, + clk44xx_get_name(OMAP4_DSS_FCLK, cname), + dss_speed_curr); + + if ((int) dss_speed_curr == (int) dss_speed_por) { + opp_id = OMAP447X_OPP50_HIGH; + #ifdef OMAP4CONF_GET_OPP_DEBUG + voltdm44xx_opp2string(s_opp, opp_id, id); + #endif + dprintf("%s(): DSS POR Speed == OPP50_HIGH " + "POR Speed\n", __func__); + } else { + dprintf("%s(): DSS POR Speed != OPP50_HIGH " + "POR Speed\n", __func__); + continue; } } @@ -437,6 +578,9 @@ #undef dprintf #define dprintf(format, ...) #endif +#else +#undef dprintf +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) #endif @@ -497,6 +641,9 @@ case OMAP447X_OPP100_LOW: strcpy(s, "OPP100_LOW"); break; + case OMAP447X_OPP100_HIGH: + strcpy(s, "OPP100_HIGH"); + break; case OMAP447X_OPP119_LOW: strcpy(s, "OPP119_LOW"); break; @@ -567,6 +714,8 @@ return (unsigned int) OMAP447X_OPP50_HIGH; else if (strcmp(s, "opp100_low") == 0) return (unsigned int) OMAP447X_OPP100_LOW; + else if (strcmp(s, "opp100_high") == 0) + return (unsigned int) OMAP447X_OPP100_HIGH; else if (strcmp(s, "opp119_low") == 0) return (unsigned int) OMAP447X_OPP119_LOW; else if (strcmp(s, "opp119_high") == 0) @@ -577,6 +726,43 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm44xx_id2s + * @BRIEF convert voltage domain ID to voltage domain name, as + * defined in voltdm.h. + * @RETURNS Generic string corresponding to voltage domain ID + * NULL in case of invalid voltage domain ID + * @param[in] id: voltage domain ID + * @DESCRIPTION convert voltage domain ID to voltage domain name, as + * defined in voltdm.h. + *//*------------------------------------------------------------------------ */ +const char *voltdm44xx_id2s(voltdm44xx_id id) +{ + const char *s; + CHECK_ARG_LESS_THAN(id, OMAP4_VD_ID_MAX, NULL); + + switch (id) { + case OMAP4_LDO_WKUP: + s = VDD_WKUP; + break; + case OMAP4_VDD_MPU: + s = VDD_MPU; + break; + case OMAP4_VDD_IVA: + s = VDD_IVA; + break; + case OMAP4_VDD_CORE: + s = VDD_CORE; + break; + default: + s = NULL; + } + + dprintf("%s(%d) = %s\n", __func__, id, s); + return s; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION voltdm44xx_get_voltage * @BRIEF find the current supply voltage of a domain, taking care * of the voltage domain state (ON/ON_LP/RET/OFF). @@ -761,176 +947,6 @@ /* ------------------------------------------------------------------------*//** - * @FUNCTION voltdm44xx_opp_show - * @BRIEF show OPerating Point (OPP, voltage + frequency) - * of a given voltage domain. - * @RETURNS 0 in case of success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_REG_ACCESS - * @param[in] none - * @DESCRIPTION show OPerating Point (OPP, voltage + frequency) - * of a given voltage domain. - *//*------------------------------------------------------------------------ */ -int voltdm44xx_opp_show(void) -{ - opp44xx_id current_opp[OMAP4_VD_ID_MAX] = { - OPP44XX_ID_MAX, OPP44XX_ID_MAX, OPP44XX_ID_MAX, OPP44XX_ID_MAX}; - char s_opp_mpu[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN"; - char s_opp_ivahd[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN"; - char s_opp_core[OPP44XX_MAX_NAME_LENGTH] = "UNKNOWN"; - char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; - unsigned int row = 0; - int ret = 0; - double volt; - char prev_gov[CPUFREQ_GOV_MAX_NAME_LENGTH], - prev_gov2[CPUFREQ_GOV_MAX_NAME_LENGTH]; - - CHECK_CPU(44xx, OMAPCONF_ERR_CPU); - - /* Switch to userspace governor temporarily, - * so that OPP cannot change during audit and does not false it. - */ - cpufreq_scaling_governor_set("userspace", prev_gov); - - /* Retrieve OPP */ - ret = voltdm44xx_get_opp(OMAP4_VDD_MPU, ¤t_opp[OMAP4_VDD_MPU]); - if (ret != 0) - dprintf("%s(): warning VDD_MPU OPP not detected!!! (%d)\n", - __func__, ret); - else - voltdm44xx_opp2string(s_opp_mpu, current_opp[OMAP4_VDD_MPU], - OMAP4_VDD_MPU); - - ret = voltdm44xx_get_opp(OMAP4_VDD_IVA, ¤t_opp[OMAP4_VDD_IVA]); - if (ret != 0) - dprintf("%s(): warning VDD_IVA OPP not detected!!! (%d)\n", - __func__, ret); - else - voltdm44xx_opp2string(s_opp_ivahd, current_opp[OMAP4_VDD_IVA], - OMAP4_VDD_IVA); - - ret = voltdm44xx_get_opp(OMAP4_VDD_CORE, ¤t_opp[OMAP4_VDD_CORE]); - if (ret != 0) - dprintf("%s(): warning VDD_CORE OPP not detected!!! (%d)\n", - __func__, ret); - else - voltdm44xx_opp2string(s_opp_core, current_opp[OMAP4_VDD_CORE], - OMAP4_VDD_CORE); - - autoadjust_table_init(table); - row = 0; - strncpy(table[row][1], "Voltage", TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "Frequency", TABLE_MAX_ELT_LEN); - strncpy(table[row][3], "OPerating Point", TABLE_MAX_ELT_LEN); - row++; - - strncpy(table[row][0], "VDD_MPU / VDD_CORE1", TABLE_MAX_ELT_LEN); - ret = voltdm44xx_get_voltage(OMAP4_VDD_MPU, &volt); - if (ret == 0) - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt); - else - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); - strncpy(table[row][3], s_opp_mpu, TABLE_MAX_ELT_LEN); - row++; - if (cpu_is_online(1) == 1) - strncpy(table[row][0], " MPU (CPU1 ON)", TABLE_MAX_ELT_LEN); - else - strncpy(table[row][0], " MPU (CPU1 OFF)", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_MPU_DPLL_CLK, - 0)); - row += 2; - - strncpy(table[row][0], "VDD_IVA / VDD_CORE2", TABLE_MAX_ELT_LEN); - ret = voltdm44xx_get_voltage(OMAP4_VDD_IVA, &volt); - if (ret == 0) - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt); - else - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); - strncpy(table[row][3], s_opp_ivahd, TABLE_MAX_ELT_LEN); - row++; - strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_DSP_ROOT_CLK, 1)); - row++; - strncpy(table[row][0], " IVAHD", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_IVAHD_ROOT_CLK, - 1)); - row++; - strncpy(table[row][0], " ABE", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_ABE_CLK, 1)); - row += 2; - - strncpy(table[row][0], "VDD_CORE / VDD_CORE3", TABLE_MAX_ELT_LEN); - ret = voltdm44xx_get_voltage(OMAP4_VDD_CORE, &volt); - if (ret == 0) - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%-4f V", volt); - else - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "NA"); - strncpy(table[row][3], s_opp_core, TABLE_MAX_ELT_LEN); - row++; - strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_L3_ICLK, 1)); - row++; - strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_EMIF_L3_ICLK, 1)); - row++; - strncpy(table[row][0], " LPDDR2", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed( - OMAP4_PHY_ROOT_CLK, 1) / 2); - row++; - strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_L4_ICLK, 1)); - row++; - strncpy(table[row][0], " GFX", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_GFX_FCLK, 1)); - row++; - strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_FDIF_FCLK, 1)); - row++; - strncpy(table[row][0], " Cortex-M3 Cores", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed( - OMAP4_MPU_M3_CLK, 1) / 2); - row++; - strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_ISS_CLK, 1)); - row++; - strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_DSS_FCLK, 1)); - row++; - if (cpu_is_omap4470()) { - strncpy(table[row][0], " BB2D", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed( - OMAP4_BB2D_FCLK, 1)); - row++; - } - strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) clk44xx_get_clock_speed(OMAP4_HSI_FCLK, 1)); - row++; - - autoadjust_table_print(table, row, 4); - - /* Restore CPUFreq governor */ - cpufreq_scaling_governor_set(prev_gov, prev_gov2); - - return 0; -} - - -/* ------------------------------------------------------------------------*//** * @FUNCTION voltdm44xx_vminsearch * @BRIEF Search minimum supply voltage of a given voltage domain * by decreasing voltage step by step until it breaks. @@ -978,7 +994,7 @@ /* Show current OPP for reference */ printf("Current OPP settings for reference:\n\n"); - voltdm44xx_opp_show(); + opp_show(stdout); /* decreasing step by step voltage until it breaks */ printf("Starting Vmin search...\n"); @@ -1000,16 +1016,15 @@ /* Get vsel corresponding to target voltage */ vsel = smps_uvolt2vsel(vdd_id2smps_id(vdd_id), uv); - ret = temp44xx_read_bandgap_sensor(&bandgap_temp); - if (ret != 0) { - printf("Trying %1.6lfV (SMPS code: %02d, temperature: " - "N/A)...", - (double) ((double) uv / 1000000.0), vsel); - } else { - printf("Trying %1.6lfV (SMPS code: %02d, temperature: " - "%dC/%dF)...", + bandgap_temp = temp44xx_get(TEMP44XX_BANDGAP); + if (bandgap_temp != TEMP_ABSOLUTE_ZERO) { + printf( + "Trying %1.6lfV (SMPS code: %02d, temperature: %dC/%dF)...", (double) ((double) uv / 1000000.0), vsel, bandgap_temp, celcius2fahrenheit(bandgap_temp)); + } else { + printf("Trying %1.6lfV (SMPS code: %02d, temperature: N/A)...", + (double) ((double) uv / 1000000.0), vsel); } fflush(stdout); ret = sr44xx_voltage_set(vdd_id, uv); diff -Nru tiomapconf-1.50.0/omap4/voltdm44xx.h tiomapconf-1.52.0/omap4/voltdm44xx.h --- tiomapconf-1.50.0/omap4/voltdm44xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap4/voltdm44xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -65,6 +65,7 @@ OMAP4_OPP_TURBO, OMAP4_OPP_NITRO, OMAP4_OPP_NITRO_SB, + OMAP4_DUMMY, /* for OMAP447X_OPP100_HIGH introduction ... */ OPP44XX_ID_MAX } opp44xx_id; @@ -74,7 +75,8 @@ OMAP447X_OPP50_HIGH, OMAP447X_OPP100_LOW, OMAP447X_OPP119_LOW, - OMAP447X_OPP119_HIGH + OMAP447X_OPP119_HIGH, + OMAP447X_OPP100_HIGH, } omap447X_opp_id; typedef enum { @@ -89,12 +91,13 @@ char *voltdm44xx_get_name(voltdm44xx_id id, char name[VOLTDM44XX_MAX_NAME_LENGTH]); - voltdm44xx_id voltdm44xx_s2id(char *s); double voltdm44xx_retention_voltage_get(voltdm44xx_id id); -double voltdm44xx_nominal_voltage_get(voltdm44xx_id id, opp44xx_id opp); +double voltdm44xx_por_retention_voltage_get(voltdm44xx_id id); +double voltdm44xx_nominal_voltage_get(voltdm44xx_id id); +double voltdm44xx_por_nominal_voltage_get(voltdm44xx_id id, opp44xx_id opp); const char *opp44xx_name_get(unsigned short opp_id, voltdm44xx_id vdd_id); @@ -106,7 +109,7 @@ unsigned int opp44xx_s2id(char *s); -int voltdm44xx_opp_show(void); +const char *voltdm44xx_id2s(voltdm44xx_id id); int voltdm44xx_vminsearch(voltdm44xx_id vdd_id, double v, unsigned int ms); diff -Nru tiomapconf-1.50.0/omap5/audit54xx.c tiomapconf-1.52.0/omap5/audit54xx.c --- tiomapconf-1.50.0/omap5/audit54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/audit54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -52,6 +52,7 @@ #include #include #include +#include /* #define AUDIT54XX_DEBUG */ diff -Nru tiomapconf-1.50.0/omap5/help54xx.c tiomapconf-1.52.0/omap5/help54xx.c --- tiomapconf-1.50.0/omap5/help54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/help54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -131,22 +131,12 @@ if ((cat == HELP_ALL) || (cat == HELP_TEMPERATURE)) { printf("\n\tomapconf show temp []\n"); - printf("\t Print temperature reported by , in " - "celcius degrees.\n"); - printf("\t Supported : mpu, gpu, core, pcb, case, " - "emif1, emif2, all.\n"); - printf("\t If is omitted or = all, " - "all available sensors will be printed in a table, " - "with both celcius and fahrenheit degrees.\n"); - -#if 0 /* FIXME */ - autoadjust_table_strncpy(table, row, 2, - " 'EMIF' instance ([1-2])."); - row++; - autoadjust_table_strncpy(table, row, 2, - " 'CS' line ([0-1])."); - row += 2; -#endif + printf( + "\t Print temperature reported by , in celcius degrees.\n"); + printf( + "\t Supported : mpu, mpu_hotspot, gpu, gpu_hotspot, core, pcb, case, mem1, mem2, charger, all.\n"); + printf( + "\t If is omitted or = all, all available sensors will be printed in a table, with both celcius and fahrenheit degrees.\n"); } if ((cat == HELP_ALL) || (cat == HELP_DPLL)) { @@ -645,7 +635,7 @@ "\t # omapconf trace perf -t 30 -d 3 -s 0.1 -p db175_mp3_\n"); printf( - "\n\tomapconf trace bw [-h] [-m 0xyy or MA_MPU_1_2] [-d x] [-a 1 or 2] [-i x] [-o x -t y] [-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); + "\n\tomapconf trace bw [-h] [<-m | --m> <0xyy | ma_mpu | alldmm | dss | iva | ...>] [<-p | --p ] [<--tr | --tr> ] [-d x] [-a 1 or 2] [-i x] [--overflow_delay x] [-o x -t y] [-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); printf( "\t EMIF traffic monitoring. Type 'omapconf trace bw -h' for detailed help.\n"); printf( diff -Nru tiomapconf-1.50.0/omap5/lib54xx.c tiomapconf-1.52.0/omap5/lib54xx.c --- tiomapconf-1.50.0/omap5/lib54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/lib54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -58,10 +58,14 @@ #include #include #include -#include +#include #include #include #include +#include +#include +#include +#include /* #define LIB54XX_DEBUG */ @@ -322,159 +326,6 @@ /* ------------------------------------------------------------------------*//** - * @FUNCTION lib54xx_opp_show - * @BRIEF show current operating voltages and frequencies - * @RETURNS 0 in case of success - * OMAPCONF_ERR_REG_ACCESS - * OMAPCONF_ERR_CPU - * @DESCRIPTION show current operating voltages and frequencies - *//*------------------------------------------------------------------------ */ -int lib54xx_opp_show(void) -{ - opp54xx_id opp_mpu, opp_mm, opp_core; - double volt_mpu, volt_mm, volt_core; - char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; - unsigned int row = 0; - char prev_gov[CPUFREQ_GOV_MAX_NAME_LENGTH], - prev_gov2[CPUFREQ_GOV_MAX_NAME_LENGTH]; - - /* Switch to userspace governor temporarily, - * so that OPP cannot change during audit and does not false it. - */ - cpufreq_scaling_governor_set("userspace", prev_gov); - - opp_mpu = voltdm54xx_opp_get(VDD54XX_MPU); - opp_mm = voltdm54xx_opp_get(VDD54XX_MM); - opp_core = voltdm54xx_opp_get(VDD54XX_CORE); - - volt_mpu = voltdm54xx_voltage_get(VDD54XX_MPU); - volt_mm = voltdm54xx_voltage_get(VDD54XX_MM); - volt_core = voltdm54xx_voltage_get(VDD54XX_CORE); - - autoadjust_table_init(table); - row = 0; - strncpy(table[row][1], "Voltage", TABLE_MAX_ELT_LEN); - strncpy(table[row][2], "Frequency", TABLE_MAX_ELT_LEN); - strncpy(table[row][3], "OPerating Point", TABLE_MAX_ELT_LEN); - row++; - - strncpy(table[row][0], "VDD_MPU / VDD_CORE1", TABLE_MAX_ELT_LEN); - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_mpu); - if (opp_mpu != OPP54XX_ID_MAX) - strncpy(table[row][3], opp54xx_name_get(opp_mpu), - TABLE_MAX_ELT_LEN); - else - strncpy(table[row][3], "UNKNOWN", - TABLE_MAX_ELT_LEN); - row++; - if (cpu_is_online(1) == 1) - strncpy(table[row][0], " MPU (CPU1 ON)", TABLE_MAX_ELT_LEN); - else - strncpy(table[row][0], " MPU (CPU1 OFF)", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_MPU, 0)); - row += 2; - - strncpy(table[row][0], "VDD_MM / VDD_CORE2", TABLE_MAX_ELT_LEN); - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_mm); - if (opp_mm != OPP54XX_ID_MAX) - strncpy(table[row][3], opp54xx_name_get(opp_mm), - TABLE_MAX_ELT_LEN); - else - strncpy(table[row][3], "UNKNOWN", - TABLE_MAX_ELT_LEN); - row++; - strncpy(table[row][0], " IVA", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_IVA, 1)); - row++; - strncpy(table[row][0], " GPU", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_GPU, 1)); - row++; - strncpy(table[row][0], " DSP", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_DSP, 1)); - row += 2; - - strncpy(table[row][0], "VDD_CORE / VDD_CORE3", TABLE_MAX_ELT_LEN); - snprintf(table[row][1], TABLE_MAX_ELT_LEN, "%.3lf V", volt_core); - if (opp_core != OPP54XX_ID_MAX) - strncpy(table[row][3], opp54xx_name_get(opp_core), - TABLE_MAX_ELT_LEN); - else - strncpy(table[row][3], "UNKNOWN", - TABLE_MAX_ELT_LEN); - row++; - strncpy(table[row][0], " L4", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get( - OMAP5_L4_CFG_INTERCONNECT, 1)); - row++; - strncpy(table[row][0], " L3", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get( - OMAP5_L3_MAIN1_INTERCONNECT, 1)); - row++; - strncpy(table[row][0], " DMM/EMIF", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_EMIF1, 1)); - row++; - strncpy(table[row][0], " LP-DDR2", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_PHY_EMIF, 1)); - row++; - strncpy(table[row][0], " AESS", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_AESS, 1)); - row++; - strncpy(table[row][0], " ISS", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_ISS, 1)); - row++; - strncpy(table[row][0], " FDIF", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_FDIF, 1)); - row++; - strncpy(table[row][0], " CAL", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_CAL, 1)); - row++; - strncpy(table[row][0], " IPU", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_IPU, 1)); - row++; - strncpy(table[row][0], " Cortex-M4 Cores", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_IPU, 1) / 2); - row++; - strncpy(table[row][0], " DSS", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_DSS, 1)); - row++; - strncpy(table[row][0], " BB2D", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_BB2D, 1)); - row++; - strncpy(table[row][0], " HSI", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_HSI, 1)); - row++; - strncpy(table[row][0], " C2C", TABLE_MAX_ELT_LEN); - snprintf(table[row][2], TABLE_MAX_ELT_LEN, "%-4d MHz", - (unsigned int) mod54xx_clk_rate_get(OMAP5_C2C, 1)); - row++; - - autoadjust_table_print(table, row, 4); - - /* Restore CPUFreq governor */ - cpufreq_scaling_governor_set(prev_gov, prev_gov2); - - return 0; -} - - -/* ------------------------------------------------------------------------*//** * @FUNCTION lib54xx_voltage_set * @BRIEF change voltage of a given voltage domain, switching * CPUFreq governor to "userspace" & disabling smart-reflex @@ -637,7 +488,7 @@ /* Show current OPP for reference */ printf("Current OPP configuration for reference:\n\n"); - lib54xx_opp_show(); + opp_show(stdout); /* Retrieving SMPS voltage step */ vstep = smps_step_get(vdd_id2smps_id(vdd_id)); diff -Nru tiomapconf-1.50.0/omap5/lib54xx.h tiomapconf-1.52.0/omap5/lib54xx.h --- tiomapconf-1.50.0/omap5/lib54xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/lib54xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -51,7 +51,6 @@ int lib54xx_pwst_show(FILE *stream); -int lib54xx_opp_show(void); int lib54xx_export(char *file); int lib54xx_import(char *file); int lib54xx_voltage_set(voltdm54xx_id vdd_id, double volt); diff -Nru tiomapconf-1.50.0/omap5/main54xx.c tiomapconf-1.52.0/omap5/main54xx.c --- tiomapconf-1.50.0/omap5/main54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/main54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -71,6 +71,8 @@ #include #include #include +#include +#include /* #define MAIN54XX_DEBUG */ @@ -641,7 +643,6 @@ int main54xx_show(int argc, char *argv[]) { int ret; - temp54xx_sensor_id sensor_id; CHECK_CPU(54xx, OMAPCONF_ERR_CPU); CHECK_NULL_ARG(argv, OMAPCONF_ERR_ARG); @@ -653,7 +654,7 @@ return prcm54xx_config_show(stdout, argc - 1, argv + 1); } else if (strcmp(argv[0], "opp") == 0) { if (argc == 1) - return lib54xx_opp_show(); + return opp_show(stdout); else return err_arg_too_many_msg_show(HELP_SOC_OPP); } else if (strcmp(argv[0], "pwst") == 0) { @@ -663,15 +664,14 @@ return err_arg_too_many_msg_show(HELP_SOC_PWST); } else if (strcmp(argv[0], "temp") == 0) { if (argc == 1) { - return temp54xx_show(stdout, TEMP54XX_ID_MAX); + return temp_sensor_show(stdout, "all"); } else if (argc == 2) { if (strcmp(argv[1], "all") == 0) - return temp54xx_show(stdout, TEMP54XX_ID_MAX); - sensor_id = temp54xx_s2id(argv[1]); - if (sensor_id == TEMP54XX_ID_MAX) - return err_arg_msg_show(HELP_TEMPERATURE); + return temp_sensor_show(stdout, argv[1]); + else if (temp_sensor_is_available(argv[1]) != 0) + return temp_sensor_show(stdout, argv[1]); else - return temp54xx_show(stdout, sensor_id); + return err_arg_msg_show(HELP_TEMPERATURE); } else { return err_arg_too_many_msg_show(HELP_TEMPERATURE); } @@ -1069,6 +1069,8 @@ ret = OMAPCONF_ERR_ARG; main54xx_end: + /* Deinitializations */ dpll54xx_free(); + return ret; } diff -Nru tiomapconf-1.50.0/omap5/module54xx-data.c tiomapconf-1.52.0/omap5/module54xx-data.c --- tiomapconf-1.50.0/omap5/module54xx-data.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/module54xx-data.c 2012-11-14 16:36:23.000000000 +0000 @@ -975,7 +975,7 @@ {-1.0, -1.0, 19.2, -1.0, -1.0, -1.0}, /* OMAP5_SMARTREFLEX_CORE */ {-1.0, -1.0, 19.2, -1.0, -1.0, -1.0}, /* OMAP5_SMARTREFLEX_MM */ {-1.0, -1.0, 19.2, -1.0, -1.0, -1.0}, /* OMAP5_SMARTREFLEX_MPU */ - {-1.0, -1.0, -1.0, -1.0, -1.0, -1.0}, /* OMAP5_BANDGAPTS */ + {-1.0, -1.0, 1.2, -1.0, -1.0, -1.0}, /* OMAP5_BANDGAPTS */ {-1.0, -1.0, 19.2, -1.0, -1.0, -1.0}, /* OMAP5_IO_SRCOMP_CORE */ {-1.0, -1.0, 0.032768, -1.0, -1.0, -1.0}, /* OMAP5_USB_PHY_CORE */ /* Voltage dom.: CORE, Power dom.: CAM, Clock domain = CAM */ @@ -1096,12 +1096,12 @@ {-1.0, 19.2, 19.2, -1.0, -1.0, -1.0}, /* OMAP5_TIMER8 */ {0.032768, 0.032768, 0.032768, -1.0, -1.0, -1.0}, /* OMAP5_WD_TIMER3 */ /* Voltage dom.: MM, Power dom.: DSP, Clock domain = DSP */ - {98.304, 232.960, 465.92, 532.0, -1.0, -1.0}, /* OMAP5_DSP */ + {98.304, 232.960, 465.919, 532.0, -1.0, -1.0}, /* OMAP5_DSP */ /* Voltage dom.: MM, Power dom.: GPU, Clock domain = GPU */ - {98.304, 192.0, 384.0, -1.0, -1.0, -1.0}, /* OMAP5_GPU */ + {98.304, 177.333, 354.666, 532.0, -1.0, -1.0}, /* OMAP5_GPU */ /* Voltage dom.: MM, Power dom.: IVA, Clock domain = IVA */ - {98.304, 194.133, 388.267, 531.2, -1.0, -1.0}, /* OMAP5_IVA */ - {98.304, 194.133, 388.267, 531.2, -1.0, -1.0}, /* OMAP5_SL2 */ + {98.304, 194.133, 388.266, 532.0, -1.0, -1.0}, /* OMAP5_IVA */ + {98.304, 194.133, 388.266, 532.0, -1.0, -1.0}, /* OMAP5_SL2 */ /* Voltage dom.: MPU, Power dom.: MPUAON Clock domain = MPU */ {196.608, 400.0, 800.0, 1100.0, 1200.0, -1.0} }; /* OMAP5_MPU */ diff -Nru tiomapconf-1.50.0/omap5/module54xx.c tiomapconf-1.52.0/omap5/module54xx.c --- tiomapconf-1.50.0/omap5/module54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/module54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -1193,8 +1193,7 @@ rm_context_reg = mod54xx_rm_context_reg_get(id); if (rm_context_reg == NULL) { dprintf("%s(%u (%s)): %s addr==NULL\n", __func__, id, - mod54xx_name_get(id), reg_name_get(rm_context_reg), - reg_addr_get(rm_context_reg), rm_context); + mod54xx_name_get(id), reg_name_get(rm_context_reg)); return -1; } /* Read register */ diff -Nru tiomapconf-1.50.0/omap5/opp54xx.c tiomapconf-1.52.0/omap5/opp54xx.c --- tiomapconf-1.50.0/omap5/opp54xx.c 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/omap5/opp54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,492 @@ +/* + * + * @Component OMAPCONF + * @Filename opp54xx.c + * @Description OMAP5 OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#include +#include +#include +#include +#include +#include +#include +#include + + +/* #define OPP54XX_DEBUG */ +#ifdef OPP54XX_DEBUG +#define dprintf(format, ...) printf(format, ## __VA_ARGS__) +#else +#define dprintf(format, ...) +#endif + + +genlist vdd54xx_wkup_opp_list; +genlist vdd54xx_mpu_opp_list; +genlist vdd54xx_mm_opp_list; +genlist vdd54xx_core_opp_list; + +genlist *opp54xx_list_table_es1[VDD54XX_ID_MAX] = { + &vdd54xx_wkup_opp_list, /* VDD_WKUP */ + &vdd54xx_mpu_opp_list, /* VDD_MPU */ + &vdd54xx_mm_opp_list, /* VDD_MM */ + &vdd54xx_core_opp_list}; /* VDD_CORE */ + +static unsigned short opp54xx_init_done = 0; + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_init + * @BRIEF initialize internal data + * @DESCRIPTION initialize internal data (architecture dependent) + *//*------------------------------------------------------------------------ */ +void opp54xx_init(void) +{ + opp_t opp; + + static const opp_t mpu_opp_low = {OPP_LOW, 950000, 400000}; + static const opp_t mpu_opp_nom = {OPP_NOM, 1040000, 800000}; + static const opp_t mpu_opp_high = {OPP_HIGH, 1220000, 1100000}; + + static const opp_t mm_opp_low = {OPP_LOW, 950000, 177333}; + static const opp_t mm_opp_nom = {OPP_NOM, 1040000, 354667}; + static const opp_t mm_opp_high = {OPP_HIGH, 1220000, 532000}; + + static const opp_t core_opp_low = {OPP_LOW, 950000, 133000}; + static const opp_t core_opp_nom = {OPP_NOM, 1040000, 2660000}; + + #ifdef OPP54XX_DEBUG + int i, count; + voltdm54xx_id vdd; + #endif + + if (!opp54xx_init_done) { + genlist_init(&vdd54xx_wkup_opp_list); + opp.name = OPP_NOM; + opp.voltage = 1.0; + opp.rate = clk54xx_sysclk_rate_get(); + genlist_addtail(&vdd54xx_wkup_opp_list, + (void *) &opp, sizeof(opp_t)); + + genlist_init(&vdd54xx_mpu_opp_list); + genlist_addtail(&vdd54xx_mpu_opp_list, + (void *) &mpu_opp_low, sizeof(opp_t)); + genlist_addtail(&vdd54xx_mpu_opp_list, + (void *) &mpu_opp_nom, sizeof(opp_t)); + genlist_addtail(&vdd54xx_mpu_opp_list, + (void *) &mpu_opp_high, sizeof(opp_t)); + + genlist_init(&vdd54xx_mm_opp_list); + genlist_addtail(&vdd54xx_mm_opp_list, + (void *) &mm_opp_low, sizeof(opp_t)); + genlist_addtail(&vdd54xx_mm_opp_list, + (void *) &mm_opp_nom, sizeof(opp_t)); + genlist_addtail(&vdd54xx_mm_opp_list, + (void *) &mm_opp_high, sizeof(opp_t)); + + genlist_init(&vdd54xx_core_opp_list); + genlist_addtail(&vdd54xx_core_opp_list, + (void *) &core_opp_low, sizeof(opp_t)); + genlist_addtail(&vdd54xx_core_opp_list, + (void *) &core_opp_nom, sizeof(opp_t)); + + opp54xx_init_done = 1; + #ifdef OPP54XX_DEBUG + printf("%s(): init done.\n", __func__); + printf("OPP List:\n"); + for (vdd = VDD54XX_WKUP; vdd <= VDD54XX_CORE; vdd++) { + count = genlist_getcount( + (genlist *) opp54xx_list_table_es1[vdd]); + printf(" %s (%d): ", voltdm54xx_name_get(vdd), count); + for (i = 0; i < count; i++) { + genlist_get( + (genlist *) opp54xx_list_table_es1[vdd], + i, (void *) &opp); + printf("%s (%.1lfMHz, %.3lfV)", + opp.name, khz2mhz(opp.rate), + uv2v(opp.voltage)); + if (i != count - 1) + printf(", "); + } + printf(".\n"); + } + #endif + } +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_deinit + * @BRIEF free dynamically allocated internal data. + * @DESCRIPTION free dynamically allocated internal data. + * MUST BE CALLED AT END OF EXECUTION. + *//*------------------------------------------------------------------------ */ +void opp54xx_deinit(void) +{ + if (opp54xx_init_done) { + genlist_free(&vdd54xx_wkup_opp_list); + genlist_free(&vdd54xx_mpu_opp_list); + genlist_free(&vdd54xx_mm_opp_list); + genlist_free(&vdd54xx_core_opp_list); + opp54xx_init_done = 0; + + } + dprintf("%s(): deinit done.\n", __func__); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_id_get + * @BRIEF convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + * @RETURNS plaftorm-specific OPP ID (> 0) in case of success + * OMAPCONF_ERR_CPU + * @param[in] opp: OPP provided as a string (as defined in opp.h) + * @DESCRIPTION convert OPP provided as a string (as defined in opp.h) + * into a plaftorm-specific OPP ID (integer). + *//*------------------------------------------------------------------------ */ +int opp54xx_id_get(const char *opp) +{ + CHECK_NULL_ARG(opp, OMAPCONF_ERR_ARG); + + if (strcasecmp(opp, OPP_DPLL_CASC) == 0) + return (int) OPP54XX_DPLL_CASC; + else if (strcasecmp(opp, OPP_LOW) == 0) + return (int) OPP54XX_LOW; + else if (strcasecmp(opp, OPP_NOM) == 0) + return (int) OPP54XX_NOM; + else if (strcasecmp(opp, OPP_HIGH) == 0) + return (int) OPP54XX_HIGH; + else if (strcasecmp(opp, OPP_SB) == 0) + return (int) OPP54XX_SB; + else + return OMAPCONF_ERR_ARG; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_count_get + * @BRIEF return the number of OPP(s) of a given voltage domain + * @RETURNS number of OPP(s) (> 0) in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the number of OPP(s) of a given voltage domain + *//*------------------------------------------------------------------------ */ +int opp54xx_count_get(voltdm54xx_id vdd_id) +{ + int count; + + CHECK_CPU(54xx, OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, OMAPCONF_ERR_ARG); + + opp54xx_init(); + + count = genlist_getcount(opp54xx_list_table_es1[vdd_id]); + + dprintf("%s(%d) = %d\n", __func__, vdd_id, count); + return count; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_list_get + * @BRIEF return the list of OPP of a given voltage domain + * @RETURNS list of OPP of a given voltage domain in case of success + * NULL in case of error + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the list of OPP of a given voltage domain + *//*------------------------------------------------------------------------ */ +const genlist *opp54xx_list_get(voltdm54xx_id vdd_id) +{ + CHECK_CPU(54xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, NULL); + + opp54xx_init(); + + return opp54xx_list_table_es1[vdd_id]; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_by_voltage_get + * @BRIEF return the current voltage domain OPP name, + * searched by voltages. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name, + * searched by voltages. + *//*------------------------------------------------------------------------ */ +#if 0 +const char *opp54xx_by_voltage_get(voltdm54xx_id vdd_id) +{ + CHECK_CPU(54xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, NULL); + + opp54xx_init(); + + return opp_by_voltage_get(voltdm54xx_id2s(vdd_id), 1); +} +#endif + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_by_rate_get + * @BRIEF return the current voltage domain OPP name, + * searched by clock rates. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name, + * searched by clock rates. + *//*------------------------------------------------------------------------ */ +const char *opp54xx_by_rate_get(voltdm54xx_id vdd_id) +{ + const char *opp_name = NULL; + int opp_id; + mod54xx_id module_id; + double rate = 0.0, rate_por = 0.0; + double rate_dsp = 0.0, rate_dsp_por = 0.0; + double rate_gpu = 0.0, rate_gpu_por = 0.0; + opp_t opp; + const genlist *opp_list; + int i, ret, opp_count; + + CHECK_CPU(54xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, NULL); + + /* + * Determine current OPPs by getting MPU / IVA / L3 / SARRAM rate + * and comparing it to POR rate. + */ + switch (vdd_id) { + case VDD54XX_WKUP: + module_id = OMAP5_L4WKUP_INTERCONNECT; + break; + + case VDD54XX_MPU: + module_id = OMAP5_MPU; + break; + + case VDD54XX_MM: + module_id = OMAP5_IVA; + break; + + case VDD54XX_CORE: + module_id = OMAP5_L3_MAIN1_INTERCONNECT; + break; + + default: + return NULL; + } + + /* + * If the DPLL clocking the selected module is stopped, + * reported speed will be 0 and OPP cannot be detected. + * Hence, ignore DPLL status. + */ + rate = mod54xx_clk_rate_get(module_id, 1); + if (rate < 0.0) { + dprintf("%s(): could not retrieve clock speed!\n", __func__); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): %s rate is %lfMHz\n", __func__, + voltdm54xx_name_get(vdd_id), + clk54xx_name_get(mod54xx_clk_get(module_id)), rate); + if (vdd_id == VDD54XX_MM) { + rate_dsp = mod54xx_clk_rate_get(OMAP5_DSP, 1); + if (rate_dsp < 0.0) { + dprintf("%s(): could not retrieve clock speed!\n", + __func__); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): DSP rate is %lfMHz\n", __func__, + voltdm54xx_name_get(vdd_id), rate_dsp); + rate_gpu = mod54xx_clk_rate_get(OMAP5_GPU, 1); + if (rate_gpu < 0.0) { + dprintf("%s(): could not retrieve clock speed!\n", + __func__); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): GPU rate is %lfMHz\n", __func__, + voltdm54xx_name_get(vdd_id), rate_gpu); + } + + opp_list = opp54xx_list_get(vdd_id); + if (opp_list == NULL) { + dprintf("%s(): could not retrieve OPP list!\n", __func__); + goto opp54xx_by_rate_get_end; + } + + opp_count = opp54xx_count_get(vdd_id); + if (opp_count <= 0) { + dprintf("%s(): could not retrieve OPP count!\n", __func__); + goto opp54xx_by_rate_get_end; + } + + + for (i = 0; i < opp_count; i++) { + ret = genlist_get((genlist *) opp_list, i, (opp_t *) &opp); + if (ret != 0) { + dprintf("%s(): could not retrieve OPP from list!\n", + __func__); + goto opp54xx_by_rate_get_end; + } + + opp_id = opp54xx_id_get(opp.name); + if (opp_id < 0) { + dprintf( + "%s(): could not retrieve OPP ID from OPP name!\n", + __func__); + goto opp54xx_by_rate_get_end; + } + + rate_por = mod54xx_por_clk_rate_get(module_id, opp_id); + if (rate_por < 0) { + dprintf( + "%s(): could not get %s %s POR speed! (%d)\n", + __func__, mod54xx_name_get(module_id), + opp.name, ret); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): %s POR rate for %s is %lf\n", + __func__, voltdm54xx_name_get(vdd_id), + mod54xx_name_get(module_id), opp.name, rate_por); + if (vdd_id == VDD54XX_MM) { + rate_dsp_por = + mod54xx_por_clk_rate_get(OMAP5_DSP, opp_id); + if (rate_dsp_por < 0) { + dprintf( + "%s(): could not get DSP %s POR speed! (%d)\n", + __func__, opp.name, ret); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): DSP POR rate for %s is %lf\n", + __func__, voltdm54xx_name_get(vdd_id), + opp.name, rate_dsp_por); + rate_gpu_por = + mod54xx_por_clk_rate_get(OMAP5_GPU, opp_id); + if (rate_gpu_por < 0) { + dprintf( + "%s(): could not get GPU %s POR speed! (%d)\n", + __func__, opp.name, ret); + goto opp54xx_by_rate_get_end; + } + dprintf("%s(%s): GPU POR rate for %s is %lf\n", + __func__, voltdm54xx_name_get(vdd_id), + opp.name, rate_gpu_por); + + if (((int) rate == (int) rate_por) && + ((int) rate_dsp == (int) rate_dsp_por) && + ((int) rate_gpu == (int) rate_gpu_por)) { + opp_name = opp.name; + goto opp54xx_by_rate_get_end; + } + } else { + if ((int) rate == (int) rate_por) { + opp_name = opp.name; + goto opp54xx_by_rate_get_end; + } + } + } + + dprintf("%s(%s): OPP not found!\n", + __func__, voltdm54xx_name_get(vdd_id)); + +opp54xx_by_rate_get_end: + #ifdef OPP54XX_DEBUG + if (opp_name == NULL) + printf("%s(%s): OPP not found!\n", __func__, + voltdm54xx_name_get(vdd_id)); + else + printf("%s(%s): OPP found: %s\n", __func__, + voltdm54xx_name_get(vdd_id), opp_name); + #endif + return opp_name; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_get + * @BRIEF return the current voltage domain OPP name. + * @RETURNS current voltage domain OPP name (as defined in opp.h) + * NULL pointer in case of error or not found + * @param[in] vdd_id: voltage domain ID + * @DESCRIPTION return the current voltage domain OPP name. Search it by + * voltage first, then if failed search it by rates. + *//*------------------------------------------------------------------------ */ +const char *opp54xx_get(voltdm54xx_id vdd_id) +{ + CHECK_CPU(54xx, NULL); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, NULL); + + opp54xx_init(); + + return opp_get(voltdm54xx_id2s(vdd_id), 1); +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION opp54xx_set + * @BRIEF change OPP of a given voltage domain. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] vdd_id: voltage domain ID + * @param[in] opp_id: ID of the OPP to be set + * @DESCRIPTION change OPP of a given voltage domain. + *//*------------------------------------------------------------------------ */ +int opp54xx_set(voltdm54xx_id vdd_id, opp54xx_id opp_id) +{ + CHECK_CPU(54xx, OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(vdd_id, VDD54XX_ID_MAX, OMAPCONF_ERR_ARG); + CHECK_ARG_LESS_THAN(opp_id, OPP54XX_ID_MAX, OMAPCONF_ERR_ARG); + + opp54xx_init(); + + printf("Sorry, not yet implemented...\n"); + + return OMAPCONF_ERR_NOT_AVAILABLE; +} diff -Nru tiomapconf-1.50.0/omap5/opp54xx.h tiomapconf-1.52.0/omap5/opp54xx.h --- tiomapconf-1.50.0/omap5/opp54xx.h 1970-01-01 00:00:00.000000000 +0000 +++ tiomapconf-1.52.0/omap5/opp54xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -0,0 +1,69 @@ +/* + * + * @Component OMAPCONF + * @Filename opp54xx.h + * @Description OMAP5 OPerating Point (OPP) Common Definitions + * & Functions + * @Author Patrick Titiano (p-titiano@ti.com) + * @Date 2012 + * @Copyright Texas Instruments Incorporated + * + * + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the + * distribution. + * + * Neither the name of Texas Instruments Incorporated nor the names of + * its contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + + +#ifndef __OPP54XX_H__ +#define __OPP54XX_H__ + + +#include + + +void opp54xx_init(void); +void opp54xx_deinit(void); + +int opp54xx_count_get(voltdm54xx_id vdd_id); +const genlist *opp54xx_list_get(voltdm54xx_id vdd_id); + +int opp54xx_id_get(const char *opp); + +const char *opp54xx_get(voltdm54xx_id vdd_id); +#if 0 +const char *opp54xx_by_voltage_get(voltdm54xx_id vdd_id); +#endif +const char *opp54xx_by_rate_get(voltdm54xx_id vdd_id); +int opp54xx_set(voltdm54xx_id vdd_id, opp54xx_id opp_id); + + +#endif diff -Nru tiomapconf-1.50.0/omap5/temp54xx.c tiomapconf-1.52.0/omap5/temp54xx.c --- tiomapconf-1.50.0/omap5/temp54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/temp54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -62,13 +62,16 @@ const char *temp54xx_sensor_names[TEMP54XX_ID_MAX + 1] = { - "CPU", + "MPU", + "Hotspot MPU", "GPU", + "Hotspot GPU", "CORE", "EMIF1", "EMIF2", "PCB", "CASE", + "CHARGER", "FIXME"}; @@ -101,7 +104,7 @@ { static const temp54xx_sensor_id voltdm2sensor_map[VDD54XX_ID_MAX] = { TEMP54XX_ID_MAX, - TEMP54XX_CPU, + TEMP54XX_MPU, TEMP54XX_GPU, TEMP54XX_CORE}; @@ -131,28 +134,37 @@ FILE *fp = NULL; static const char *sensor_filenames1[TEMP54XX_ID_MAX] = { "/sys/kernel/debug/thermal_debug/devices/omap_cpu_sensor/temperature", + "/sys/kernel/debug/thermal_debug/devices/omap_cpu_governor/hotspot_temp", "/sys/kernel/debug/thermal_debug/devices/omap_gpu_sensor/temperature", + "/sys/kernel/debug/thermal_debug/devices/omap_gpu_governor/hotspot_temp", "/sys/kernel/debug/thermal_debug/devices/omap_core_sensor/temperature", "/sys/kernel/debug/emif.1/mr4", "/sys/kernel/debug/emif.2/mr4", - "/sys/kernel/debug/thermal_debug/devices/tmp102_sensor/temperature", - "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature"}; + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.72/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.73/temperature"}; static const char *sensor_filenames2[TEMP54XX_ID_MAX] = { "/sys/devices/platform/omap/omap_temp_sensor.0/temp1_input", + "/sys/kernel/debug/thermal_debug/devices/omap_cpu_governor/hotspot_temp", "/sys/devices/platform/omap/omap_temp_sensor.1/temp1_input", + "/sys/kernel/debug/thermal_debug/devices/omap_gpu_governor/hotspot_temp", "/sys/devices/platform/omap/omap_temp_sensor.2/temp1_input", "/sys/kernel/debug/emif.1/mr4", "/sys/kernel/debug/emif.2/mr4", - "/sys/kernel/debug/thermal_debug/devices/tmp102_sensor/temperature", - "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature"}; + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.72/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.73/temperature"}; static const char *sensor_filenames3[TEMP54XX_ID_MAX] = { "/sys/devices/platform/omap/omap4plus_scm.0/temp_sensor_hwmon.0/temp1_input", + "/sys/kernel/debug/thermal_debug/devices/omap_cpu_governor/hotspot_temp", "/sys/devices/platform/omap/omap4plus_scm.0/temp_sensor_hwmon.1/temp1_input", + "/sys/kernel/debug/thermal_debug/devices/omap_gpu_governor/hotspot_temp", "/sys/devices/platform/omap/omap4plus_scm.0/temp_sensor_hwmon.2/temp1_input", "/sys/kernel/debug/emif.1/mr4", "/sys/kernel/debug/emif.2/mr4", - "/sys/kernel/debug/thermal_debug/devices/tmp102_sensor/temperature", - "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature"}; + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.72/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp006_sensor/temperature", + "/sys/kernel/debug/thermal_debug/devices/tmp102_temp_sensor.73/temperature"}; static const char **sensor_filenames_list[3] = { sensor_filenames1, sensor_filenames2, @@ -219,125 +231,3 @@ } return temp; } - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp54xx_s2id - * @BRIEF convert string into valid sensor ID - * @RETURNS valid sensor ID on success - * TEMP54XX_ID_MAX otherwise - * @param[in,out] s: string to be converted to sensor ID - * @DESCRIPTION convert string into valid sensor ID - *//*------------------------------------------------------------------------ */ -temp54xx_sensor_id temp54xx_s2id(char *s) -{ - temp54xx_sensor_id id; - - CHECK_NULL_ARG(s, TEMP54XX_ID_MAX); - - if (strcmp(s, "cpu") == 0) - id = TEMP54XX_CPU; - else if (strcmp(s, "gpu") == 0) - id = TEMP54XX_GPU; - else if (strcmp(s, "core") == 0) - id = TEMP54XX_CORE; - else if (strcmp(s, "pcb") == 0) - id = TEMP54XX_PCB; - else if (strcmp(s, "case") == 0) - id = TEMP54XX_CASE; - else if (strcmp(s, "emif1") == 0) - id = TEMP54XX_EMIF1; - else if (strcmp(s, "emif2") == 0) - id = TEMP54XX_EMIF2; - else - id = TEMP54XX_ID_MAX; - - dprintf("%s(%s) = %d (%s)\n", __func__, s, id, temp54xx_name_get(id)); - return id; -} - - -/* ------------------------------------------------------------------------*//** - * @FUNCTION temp54xx_show - * @BRIEF display temperature(s) - * @RETURNS 0 in case of success - * OMAPCONF_ERR_CPU - * OMAPCONF_ERR_ARG - * OMAPCONF_ERR_NOT_AVAILABLE - * @param[in,out] stream: output file - * @param[in] id: sensor ID. - * Use TEMP54XX_ID_MAX to display all temperature sensors. - * @DESCRIPTION display temperature(s) - *//*------------------------------------------------------------------------ */ -int temp54xx_show(FILE *stream, temp54xx_sensor_id id) -{ - char table[TABLE_MAX_ROW][TABLE_MAX_COL][TABLE_MAX_ELT_LEN]; - unsigned int row = 0; - int temp, temp_f; - char temp_s[EMIF_TEMP_MAX_NAME_LENGTH]; - char sensor_name[32]; - - CHECK_CPU(54xx, OMAPCONF_ERR_CPU); - CHECK_NULL_ARG(stream, OMAPCONF_ERR_ARG); - - if (id != TEMP54XX_ID_MAX) { - temp = temp54xx_get(id); - if (temp != TEMP_ABSOLUTE_ZERO) { - if ((id == TEMP54XX_EMIF1) || (id == TEMP54XX_EMIF2)) - fprintf(stream, "%s\n", - emif_mr4_convert((emif_mr4_code) temp, - TEMP_CELCIUS_DEGREES)); - else - fprintf(stream, "%d\n", temp); - return 0; - } else { - fprintf(stream, - "omapconf: %s temperature not available.\n", - temp54xx_name_get(id)); - return OMAPCONF_ERR_NOT_AVAILABLE; - } - } - - row = 0; - autoadjust_table_init(table); - autoadjust_table_strncpy(table, row, 0, "OMAP5 Sensor"); - autoadjust_table_strncpy(table, row, 1, "Temperature (C)"); - autoadjust_table_strncpy(table, row++, 2, "Temperature (F)"); - - for (id = TEMP54XX_CPU; id < TEMP54XX_ID_MAX; id++) { - if (id != TEMP54XX_CASE) { - sprintf(sensor_name, "%s", - (char *) temp54xx_name_get(id)); - } else { - sprintf(sensor_name, "%s (extrapolated)", - (char *) temp54xx_name_get(id)); - } - autoadjust_table_strncpy(table, row, 0, sensor_name); - temp = temp54xx_get(id); - if (temp != TEMP_ABSOLUTE_ZERO) { - if ((id == TEMP54XX_EMIF1) || (id == TEMP54XX_EMIF2)) { - sprintf(temp_s, "%s", - emif_mr4_convert((emif_mr4_code) temp, - TEMP_CELCIUS_DEGREES)); - autoadjust_table_strncpy(table, row, 1, temp_s); - sprintf(temp_s, "%s", - emif_mr4_convert((emif_mr4_code) temp, - TEMP_FAHRENHEIT_DEGREES)); - autoadjust_table_strncpy(table, row++, 2, - temp_s); - } else { - sprintf(temp_s, "%d", temp); - autoadjust_table_strncpy(table, row, 1, temp_s); - temp_f = celcius2fahrenheit(temp); - sprintf(temp_s, "%d", temp_f); - autoadjust_table_strncpy(table, row++, 2, - temp_s); - } - } else { - autoadjust_table_strncpy(table, row, 1, "NA"); - autoadjust_table_strncpy(table, row++, 2, "NA"); - } - } - - return autoadjust_table_fprint(stream, table, row, 3); -} diff -Nru tiomapconf-1.50.0/omap5/temp54xx.h tiomapconf-1.52.0/omap5/temp54xx.h --- tiomapconf-1.50.0/omap5/temp54xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/temp54xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -51,13 +51,16 @@ typedef enum { - TEMP54XX_CPU, + TEMP54XX_MPU, + TEMP54XX_HOTSPOT_MPU, TEMP54XX_GPU, + TEMP54XX_HOTSPOT_GPU, TEMP54XX_CORE, TEMP54XX_EMIF1, TEMP54XX_EMIF2, TEMP54XX_PCB, TEMP54XX_CASE, + TEMP54XX_CHARGER, TEMP54XX_ID_MAX } temp54xx_sensor_id; @@ -65,8 +68,6 @@ const char *temp54xx_name_get(temp54xx_sensor_id id); temp54xx_sensor_id voltdm2sensor_id(voltdm54xx_id vdd_id); int temp54xx_get(temp54xx_sensor_id id); -temp54xx_sensor_id temp54xx_s2id(char *s); -int temp54xx_show(FILE *stream, temp54xx_sensor_id id); #endif diff -Nru tiomapconf-1.50.0/omap5/vc54xx.c tiomapconf-1.52.0/omap5/vc54xx.c --- tiomapconf-1.50.0/omap5/vc54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/vc54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -43,6 +43,7 @@ #include +#include #include #include #include @@ -166,6 +167,44 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION vc54xx_registers_get + * @BRIEF save all VC registers in structure provided as argument. + * @RETURNS 0 in case of success + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_ARG + * @param[in, out] vc_regs: structure where to store VC registers + * @DESCRIPTION save all VC registers in structure provided as argument. + *//*------------------------------------------------------------------------ */ +int vc54xx_registers_get(vc54xx_registers *vc_regs) +{ + CHECK_CPU(54xx, OMAPCONF_ERR_CPU); + CHECK_NULL_ARG(vc_regs, OMAPCONF_ERR_ARG); + + vc_regs->vc_smps_mpu_config = + reg_read(&omap5430_prm_vc_smps_mpu_config); + vc_regs->vc_smps_mm_config = + reg_read(&omap5430_prm_vc_smps_mm_config); + vc_regs->vc_smps_core_config = + reg_read(&omap5430_prm_vc_smps_core_config); + vc_regs->vc_val_cmd_vdd_mpu_l = + reg_read(&omap5430_prm_vc_val_cmd_vdd_mpu_l); + vc_regs->vc_val_cmd_vdd_mm_l = + reg_read(&omap5430_prm_vc_val_cmd_vdd_mm_l); + vc_regs->vc_val_cmd_vdd_core_l = + reg_read(&omap5430_prm_vc_val_cmd_vdd_core_l); + vc_regs->vc_val_bypass = reg_read(&omap5430_prm_vc_val_bypass); + vc_regs->vc_mpu_errst = reg_read(&omap5430_prm_vc_mpu_errst); + vc_regs->vc_mm_errst = reg_read(&omap5430_prm_vc_mm_errst); + vc_regs->vc_core_errst = reg_read(&omap5430_prm_vc_core_errst); + vc_regs->vc_bypass_errst = reg_read(&omap5430_prm_vc_bypass_errst); + vc_regs->vc_cfg_i2c_mode = reg_read(&omap5430_prm_vc_cfg_i2c_mode); + vc_regs->vc_cfg_i2c_clk = reg_read(&omap5430_prm_vc_cfg_i2c_clk); + + return 0; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION vc54xx_sa_get * @BRIEF return Slave Address (SA) * @RETURNS >0 Slave Address (SA) diff -Nru tiomapconf-1.50.0/omap5/vc54xx.h tiomapconf-1.52.0/omap5/vc54xx.h --- tiomapconf-1.50.0/omap5/vc54xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/vc54xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -96,6 +96,8 @@ int vc54xx_config_show(FILE *stream, vc54xx_registers *vc_regs); +int vc54xx_registers_get(vc54xx_registers *vc_regs); + short int vc54xx_sa_get(voltdm54xx_id id, vc54xx_registers *vc_regs); short int vc54xx_volra_get(voltdm54xx_id id, vc54xx_registers *vc_regs); short int vc54xx_cmdra_get(voltdm54xx_id id, vc54xx_registers *vc_regs); diff -Nru tiomapconf-1.50.0/omap5/voltdm54xx.c tiomapconf-1.52.0/omap5/voltdm54xx.c --- tiomapconf-1.50.0/omap5/voltdm54xx.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/voltdm54xx.c 2012-11-14 16:36:23.000000000 +0000 @@ -42,7 +42,10 @@ */ +#include +#include #include +#include #include #include #include @@ -81,6 +84,14 @@ "UNKNOWN"}; +static const double + voltdm54xx_por_nominal_voltages_table_es1[VDD54XX_ID_MAX][OPP54XX_ID_MAX + 1] = { + {-1.0, -1.0, -1.0, -1.0, -1.0}, /* VDD_WKUP */ + {0.94, 0.95, 1.04, 1.22, -1.0}, /* VDD_MPU */ + {0.94, 0.95, 1.04, 1.22, -1.0}, /* VDD_MM */ + {0.94, 0.95, 1.04, -1.0, -1.0} }; /* VDD_CORE */ + + /* ------------------------------------------------------------------------*//** * @FUNCTION voltdm54xx_name_get * @BRIEF return voltage domain name @@ -129,6 +140,42 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm54xx_id2s + * @BRIEF convert voltage domain ID into voltage domain name, as + * defined in voltdm.h. + * @RETURNS Voltage Domain name, as defined in voltdm.h. + * NULL in case of invalid voltage domain ID + * @param[in] id: voltage domain ID + * @DESCRIPTION convert voltage domain ID to voltage domain name. + *//*------------------------------------------------------------------------ */ +const char *voltdm54xx_id2s(voltdm54xx_id id) +{ + const char *s; + CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, NULL); + + switch (id) { + case VDD54XX_WKUP: + s = VDD_WKUP; + break; + case VDD54XX_MPU: + s = VDD_MPU; + break; + case VDD54XX_MM: + s = VDD_MM; + break; + case VDD54XX_CORE: + s = VDD_CORE; + break; + default: + s = NULL; + } + + dprintf("%s(%d) = %s\n", __func__, id, s); + return s; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION opp54xx_name_get * @BRIEF return OPP name * @RETURNS OPP name on success @@ -155,75 +202,54 @@ opp54xx_id voltdm54xx_opp_get(voltdm54xx_id id) { opp54xx_id opp_id; - mod54xx_id module_id; - dpll54xx_id dpll_id; - dpll_status status; - double rate = 0.0, rate_por = 0.0; + double volt = 0.0, volt_por = 0.0; CHECK_CPU(54xx, OPP54XX_ID_MAX); CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, OPP54XX_ID_MAX); - /* - * Determine current OPPs by getting MPU / IVA / L3 / SARRAM rate - * and comparing it to POR rate. - */ - switch (id) { - case VDD54XX_WKUP: - module_id = OMAP5_L4WKUP_INTERCONNECT; - dpll_id = DPLL54XX_CORE; - break; - - case VDD54XX_MPU: - module_id = OMAP5_MPU; - dpll_id = DPLL54XX_MPU; - break; - - case VDD54XX_MM: - module_id = OMAP5_IVA; - dpll_id = DPLL54XX_IVA; - break; - - case VDD54XX_CORE: - module_id = OMAP5_L3_MAIN1_INTERCONNECT; - dpll_id = DPLL54XX_CORE; - break; - - default: - return OPP54XX_ID_MAX; - } - - /* if the DPLL clocking the selected module is stopped, - * reported speed will be 0 and OPP cannot be detected. - * Hence, if DPLL is stopped, ignore DPLL status to get - * the speed when the DPLL is running. - */ - status = dpll54xx_status_get(dpll_id); - if (status == DPLL_STATUS_STOPPED) - rate = mod54xx_clk_rate_get(module_id, 1); - else - rate = mod54xx_clk_rate_get(module_id, 0); - - dprintf("%s(%s): %s rate is %lfMHz\n", __func__, - voltdm54xx_name_get(id), - clk54xx_name_get(mod54xx_clk_get(module_id)), rate); - - for (opp_id = OPP54XX_DPLL_CASC; opp_id < OPP54XX_ID_MAX; opp_id++) { - rate_por = mod54xx_por_clk_rate_get(module_id, opp_id); - dprintf("%s(%s): %s POR rate for %s is %lf\n", - __func__, voltdm54xx_name_get(id), - mod54xx_name_get(module_id), - opp54xx_name_get(opp_id), rate_por); - if ((int) rate == (int) rate_por) { - dprintf("%s(%s): OPP found: %s\n", + if (id == VDD54XX_WKUP) { + /* Only 1 OPP for WKUP voltage domain */ + opp_id = OPP54XX_NOM; + } else { + /* + * In VDD_MM there are 3 independent modules (GPU, IVA, DSP) + * that may be running at different clock rates. + * Furthermore, these modules may or may not be running, so + * module's clock rate may not be relevant. + * Use nominal voltage instead. + */ + volt = voltdm54xx_nominal_voltage_get(id); + if (volt < 0.0) + return OPP54XX_ID_MAX; + + dprintf("%s(%s): nominal voltage is %lfV\n", __func__, + voltdm54xx_name_get(id), volt); + + for (opp_id = OPP54XX_DPLL_CASC; opp_id < OPP54XX_ID_MAX; + opp_id++) { + volt_por = voltdm54xx_por_nominal_voltage_get( + id, opp_id); + if (volt_por < 0.0) + return OPP54XX_ID_MAX; + dprintf("%s(%s): POR nominal voltage for %s is %lfV\n", __func__, voltdm54xx_name_get(id), - opp54xx_name_get(opp_id)); - return opp_id; + opp54xx_name_get(opp_id), volt_por); + if (volt == volt_por) + break; } } - dprintf("%s(%s): OPP not found!\n", __func__, voltdm54xx_name_get(id)); + #ifdef VOLTDM54XX_DEBUG + if (opp_id != OPP54XX_ID_MAX) { + dprintf("%s(%s): OPP found: %s\n", __func__, + voltdm54xx_name_get(id), opp54xx_name_get(opp_id)); + } else { + dprintf("%s(%s): OPP not found!\n", __func__, + voltdm54xx_name_get(id)); + } + #endif - return OPP54XX_ID_MAX; + return opp_id; } @@ -280,6 +306,72 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm54xx_nominal_voltage_get + * @BRIEF return the nominal voltage of a given voltage domain + * @RETURNS supply voltage in case of success (>= 0.0) + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] id: valid voltage domain ID + * @DESCRIPTION return the nominal voltage of a given voltage domain. + *//*------------------------------------------------------------------------ */ +double voltdm54xx_nominal_voltage_get(voltdm54xx_id id) +{ + int ret; + double volt; + vc54xx_registers vc_regs; + unsigned char cmd_on, cmd_onlp, cmd_ret, cmd_off; + + CHECK_CPU(54xx, (double) OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, (double) OMAPCONF_ERR_ARG); + + ret = vc54xx_registers_get(&vc_regs); + if (ret != 0) + return (double) ret; + ret = vc54xx_cmd_values_get(id, &vc_regs, + &cmd_on, &cmd_onlp, &cmd_ret, &cmd_off); + if (ret != 0) + return (double) ret; + + volt = smps_vsel2volt(vdd_id2smps_id(id), cmd_on); + + dprintf("%s(%s): nominal volt=%lfV\n", __func__, + voltdm54xx_name_get(id), volt); + + return volt; +} + + +/* ------------------------------------------------------------------------*//** + * @FUNCTION voltdm54xx_por_nominal_voltage_get + * @BRIEF return the Plan of Record (POR) nominal voltage + * of a given voltage domain for a given OPP. + * @RETURNS supply voltage in case of success (>= 0.0) + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_CPU + * @param[in] id: valid voltage domain ID + * @DESCRIPTION return the Plan of Record (POR) nominal voltage + * of a given voltage domain for a given OPP. + *//*------------------------------------------------------------------------ */ +double voltdm54xx_por_nominal_voltage_get(voltdm54xx_id id, opp54xx_id opp_id) +{ + double volt; + + CHECK_CPU(54xx, (double) OMAPCONF_ERR_CPU); + CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, (double) OMAPCONF_ERR_ARG); + CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, (double) OMAPCONF_ERR_ARG); + + volt = voltdm54xx_por_nominal_voltages_table_es1[id][opp_id]; + + dprintf("%s(%s): %s POR nominal volt=%lfV\n", __func__, + opp54xx_name_get(opp_id), + voltdm54xx_name_get(id), volt); + + return volt; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION voltdm54xx_voltage_get * @BRIEF find the current supply voltage of a domain * @RETURNS supply voltage in case of success (>= 0.0) @@ -302,7 +394,6 @@ CHECK_CPU(54xx, (double) OMAPCONF_ERR_CPU); CHECK_ARG_LESS_THAN(id, VDD54XX_ID_MAX, (double) OMAPCONF_ERR_ARG); - /* Retrieve domain state */ switch (id) { case VDD54XX_WKUP: return (double) OMAPCONF_ERR_NOT_AVAILABLE; diff -Nru tiomapconf-1.50.0/omap5/voltdm54xx.h tiomapconf-1.52.0/omap5/voltdm54xx.h --- tiomapconf-1.50.0/omap5/voltdm54xx.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omap5/voltdm54xx.h 2012-11-14 16:36:23.000000000 +0000 @@ -70,6 +70,7 @@ const char *voltdm54xx_name_get(voltdm54xx_id id); opp54xx_id opp54xx_s2id(char *s); +const char *voltdm54xx_id2s(voltdm54xx_id id); const char *opp54xx_name_get(opp54xx_id id); opp54xx_id voltdm54xx_opp_get(voltdm54xx_id id); @@ -77,5 +78,8 @@ double voltdm54xx_voltage_get(voltdm54xx_id id); int voltdm54xx_voltage_set(voltdm54xx_id id, unsigned long uv); +double voltdm54xx_nominal_voltage_get(voltdm54xx_id id); +double voltdm54xx_por_nominal_voltage_get(voltdm54xx_id id, opp54xx_id opp_id); + #endif diff -Nru tiomapconf-1.50.0/omapconf.c tiomapconf-1.52.0/omapconf.c --- tiomapconf-1.50.0/omapconf.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/omapconf.c 2012-11-14 16:36:23.000000000 +0000 @@ -60,6 +60,10 @@ #include #include #include +#include +#include +#include +#include /* #define DEBUG */ @@ -853,6 +857,16 @@ "\n### FAKE MEMORY ACCESS DEBUG MODE ENABLED ###\n\n"); cpt++; ret++; + } else if (strcmp((*argv)[i], "--trace_read") == 0) { + /* Trace all memory read access */ + mem_read_trace_enable(1); + cpt++; + ret++; + } else if (strcmp((*argv)[i], "--trace_write") == 0) { + /* Trace all memory write access */ + mem_write_trace_enable(1); + cpt++; + ret++; } } @@ -1176,5 +1190,10 @@ /* Unmap last mapped memory page */ mem_unmap(); + /* Deinitializations */ + opp_deinit(); + voltdm_deinit(); + temp_sensor_deinit(); + return ret; } diff -Nru tiomapconf-1.50.0/pmic/pmic.c tiomapconf-1.52.0/pmic/pmic.c --- tiomapconf-1.50.0/pmic/pmic.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/pmic/pmic.c 2012-11-14 16:36:23.000000000 +0000 @@ -272,8 +272,9 @@ is_twl6034 = twl603x_is_twl6034(); is_twl6035 = twl603x_is_twl6035(); tps62361_present = tps62361_is_present(); - dprintf("%s(): is_twl6030=%u is_twl6032=%u is_tps62361=%u " - "is_twl6034=%u is_twl6035=%u\n", __func__, is_twl6030, + dprintf( + "%s(): is_twl6030=%u is_twl6032=%u is_tps62361=%u is_twl6034=%u is_twl6035=%u\n", + __func__, is_twl6030, is_twl6032, tps62361_present, is_twl6034, is_twl6035); /* @@ -926,6 +927,38 @@ /* ------------------------------------------------------------------------*//** + * @FUNCTION smps_voltage_round + * @BRIEF for a given rail, convert RAW voltage + * (e.g from Data Manual) into stepped SMPS voltage + * (in micro-volt). + * @RETURNS >= 0 voltage in microvolt rounded to SMPS voltage + * OMAPCONF_ERR_ARG + * OMAPCONF_ERR_NOT_AVAILABLE + * @param[in] smps_id: valid SMPS ID + * @param[in] uvolt: RAW voltage in microvolt + * @DESCRIPTION for a given rail, convert RAW voltage + * (e.g from Data Manual) into stepped SMPS voltage + * (in microvolt). + *//*------------------------------------------------------------------------ */ +long smps_voltage_round(pmic_smps_id smps_id, long uvolt) +{ + long rounded_uvolt; + int vsel; + + CHECK_ARG_LESS_THAN(smps_id, PMIC_SMPS_ID_MAX, (long) OMAPCONF_ERR_ARG); + if (uvolt < 0) + return (long) OMAPCONF_ERR_ARG; + + vsel = smps_uvolt2vsel(smps_id, uvolt); + rounded_uvolt = smps_vsel2uvolt(smps_id, vsel); + + dprintf("%s(%s, %lduV) = %lduV (vsel=%d)\n", + __func__, smps_name_get(smps_id), uvolt, rounded_uvolt, vsel); + return rounded_uvolt; +} + + +/* ------------------------------------------------------------------------*//** * @FUNCTION smps_vsel_get * @BRIEF return VSEL-encoded voltage of a given SMPS voltage rail * @RETURNS 0 on success diff -Nru tiomapconf-1.50.0/pmic/pmic.h tiomapconf-1.52.0/pmic/pmic.h --- tiomapconf-1.50.0/pmic/pmic.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/pmic/pmic.h 2012-11-14 16:36:23.000000000 +0000 @@ -91,6 +91,7 @@ int smps_uvolt2vsel(pmic_smps_id smps_id, unsigned long uvolt); long smps_vsel2uvolt(pmic_smps_id smps_id, unsigned char vsel); double smps_vsel2volt(pmic_smps_id smps_id, unsigned char vsel); +long smps_voltage_round(pmic_smps_id smps_id, long uvolt); int smps_vsel_get(pmic_smps_id smps_id); double smps_voltage_get(pmic_smps_id smps_id); int smps_voltage_set(pmic_smps_id smps_id, unsigned long uvolt); diff -Nru tiomapconf-1.50.0/regression_test_suite/regression_test_suite44xx.sh tiomapconf-1.52.0/regression_test_suite/regression_test_suite44xx.sh --- tiomapconf-1.50.0/regression_test_suite/regression_test_suite44xx.sh 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/regression_test_suite/regression_test_suite44xx.sh 2012-11-14 16:36:23.000000000 +0000 @@ -16,7 +16,7 @@ # NOTES: --- # AUTHOR: Patrick Titiano # COMPANY: Texas Instruments France -VERSION=1.00 +VERSION=1.01 # CREATED: 2011-09-06 # REVISION: --- #================================================================================= @@ -57,8 +57,8 @@ if [ "$1" = "dump dpll" ]; then # EMIF clocks may be gated or not, ignore it - $ref_omapconf_bin $1 | grep -v CM_DIV_M2_DPLL_CORE | grep -v CM_DIV_M4_DPLL_CORE > $logfile_ref - $new_omapconf_bin $1 | grep -v CM_DIV_M2_DPLL_CORE | grep -v CM_DIV_M4_DPLL_CORE > $logfile_new + $ref_omapconf_bin $1 | grep -v CM_DIV_M2_DPLL_CORE | grep -v CM_DIV_M4_DPLL_CORE &> $logfile_ref + $new_omapconf_bin $1 | grep -v CM_DIV_M2_DPLL_CORE | grep -v CM_DIV_M4_DPLL_CORE &> $logfile_new elif [ "$1" = "show pwst" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref @@ -102,27 +102,75 @@ elif [ "$1" = "audit homescreen full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat home_screen_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat home_screen_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat home_screen_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat home_screen_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new elif [ "$1" = "audit os_idle full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat os_idle_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat os_idle_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat os_idle_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat os_idle_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new elif [ "$1" = "audit mp3 full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat mp3_playback_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat mp3_playback_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat mp3_playback_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat mp3_playback_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new elif [ "$1" = "audit play720p full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat avplayback_720p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat avplayback_720p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat avplayback_720p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat avplayback_720p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new elif [ "$1" = "audit play1080p full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat avplayback_1080p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat avplayback_1080p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat avplayback_1080p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat avplayback_1080p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new elif [ "$1" = "audit rec1080p full_log" ]; then # ignore EMIF status (always changing) $ref_omapconf_bin $1 | grep -v EMIF > $logfile_ref + # Append summary file to logfile and ignore OMAPCONF header + cat avrecord_1080p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_ref + # Append details file to logfile and ignore OMAPCONF header + cat avrecord_1080p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_ref $new_omapconf_bin $1 | grep -v EMIF > $logfile_new + # Append summary file to logfile and ignore OMAPCONF header + cat avrecord_1080p_uc_audit_summary.txt | grep -v OMAPCONF >> $logfile_new + # Append details file to logfile and ignore OMAPCONF header + cat avrecord_1080p_uc_audit_details.txt | grep -v OMAPCONF >> $logfile_new else $ref_omapconf_bin $1 > $logfile_ref $new_omapconf_bin $1 > $logfile_new @@ -228,7 +276,7 @@ omap_cpu=$($new_omapconf_bin --cpuinfo | grep perf | awk '{print $1}') opp_list_4430="300000 600000 800000 1008000" opp_list_4460="350000 700000 920000 1200000 1500000" -opp_list_4470="400000 800000 1100000 1300000 1500000" +opp_list_4470="396800 800000 1100000 1300000 1500000" if [ $omap_cpu = OMAP4430 ]; then opp_list=$opp_list_4430 elif [ $omap_cpu = OMAP4460 ]; then @@ -431,16 +479,11 @@ compare "show temp bandgap" "SHOW TEMP BANDGAP" 0 compare "show temp pcb" "SHOW TEMP PCB" 0 compare "show temp hotspot" "SHOW TEMP HOTSPOT" 0 - compare "show temp mem 1 0" "SHOW TEMP MEM 1 0" 0 - compare "show temp mem 2 0" "SHOW TEMP MEM 2 0" 0 - if [ $omap_cpu != OMAP4470 ]; then - compare "show temp mem 1 1" "SHOW TEMP MEM 1 1" 0 - compare "show temp mem 2 1" "SHOW TEMP MEM 2 1" 1 - else - echo | tee -a $logfile - fi + compare "show temp mem1" "SHOW TEMP MEM1" 0 + compare "show temp mem2" "SHOW TEMP MEM2" 1 fi + # Test EXPORT function(s) if [ $all_tests = 1 ] || [ $tests = export ]; then compare "export ctt" "EXPORT CTT STDOUT" 0 diff -Nru tiomapconf-1.50.0/regression_test_suite/regression_test_suite54xx.sh tiomapconf-1.52.0/regression_test_suite/regression_test_suite54xx.sh --- tiomapconf-1.50.0/regression_test_suite/regression_test_suite54xx.sh 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/regression_test_suite/regression_test_suite54xx.sh 2012-11-14 16:36:23.000000000 +0000 @@ -16,7 +16,7 @@ # NOTES: --- # AUTHOR: Patrick Titiano # COMPANY: Texas Instruments France -VERSION=0.30 +VERSION=1.01 # CREATED: 2011-12-22 # REVISION: --- #=================================================================================== @@ -55,8 +55,8 @@ echo "compare: $new_omapconf_bin $1 > $logfile_new" fi - $ref_omapconf_bin --force omap5430 --norw --import regression_test_suite54xx_ref_settings.xml $1 > $logfile_ref - $new_omapconf_bin --force omap5430 --norw --import regression_test_suite54xx_ref_settings.xml $1 > $logfile_new + $ref_omapconf_bin --force omap5430 --norw --import regression_test_suite54xx_ref_settings.xml $1 &> $logfile_ref + $new_omapconf_bin --force omap5430 --norw --import regression_test_suite54xx_ref_settings.xml $1 &> $logfile_new # First line of log file will always be different (contains OMAPCONF/CHIPS/BUILD revision numbers). # busybox diff doesn't support -I option. @@ -352,15 +352,20 @@ # Test TEMPERATURE function(s) if [ $all_tests = 1 ] || [ $tests = temp ]; then compare "show temp" "SHOW TEMP" 0 - compare "show temp cpu" "SHOW TEMP CPU" 0 + compare "show temp all" "SHOW TEMP ALL" 0 + compare "show temp mpu" "SHOW TEMP MPU" 0 + compare "show temp mpu_hotspot" "SHOW TEMP MPU HOTSPOT" 0 compare "show temp gpu" "SHOW TEMP GPU" 0 + compare "show temp gpu_hotspot" "SHOW TEMP GPU HOTSPOT" 0 compare "show temp core" "SHOW TEMP CORE" 0 - compare "show temp emif1" "SHOW TEMP EMIF1" 0 - compare "show temp emif2" "SHOW TEMP EMIF2" 0 + compare "show temp mem1" "SHOW TEMP MEM1" 0 + compare "show temp mem2" "SHOW TEMP MEM2" 0 compare "show temp pcb" "SHOW TEMP PCB" 0 compare "show temp case" "SHOW TEMP CASE" 1 + compare "show temp charger" "SHOW TEMP CHARGER" 1 fi + # Test EXPORT function(s) if [ $all_tests = 1 ] || [ $tests = export ]; then compare "export ctt" "CTT DUMP" 0 diff -Nru tiomapconf-1.50.0/revision.h tiomapconf-1.52.0/revision.h --- tiomapconf-1.50.0/revision.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/revision.h 2012-11-14 16:36:23.000000000 +0000 @@ -47,7 +47,7 @@ #define OMAPCONF_REV_MAJOR 1 -#define OMAPCONF_REV_MINOR 50 +#define OMAPCONF_REV_MINOR 52 extern char *builddate; diff -Nru tiomapconf-1.50.0/statcoll/sci.c tiomapconf-1.52.0/statcoll/sci.c --- tiomapconf-1.50.0/statcoll/sci.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/statcoll/sci.c 2012-11-14 16:36:23.000000000 +0000 @@ -530,7 +530,7 @@ filter[0].match_userinfo = 0; filter[1].en = 0; - pcfg->filter[0].trans_qaul = SCI_RD_OR_WR_DONTCARE; + pcfg->filter[0].trans_qual = SCI_RD_OR_WR_DONTCARE; } else { num_filters = pcfg->num_filters; @@ -545,7 +545,7 @@ else filter[i].mask_mstaddr = pcfg->filter[i].mstr_addr_mask; - switch (pcfg->filter[i].trans_qaul) { + switch (pcfg->filter[i].trans_qual) { case SCI_RD_ONLY: filter[i].mask_rd = 1; filter[i].mask_wr = 1; @@ -604,7 +604,7 @@ /* Setup the meta data */ get_meta_data(phandle, *pusecase_key, sdram_probe_name_table[pcfg->probe_id], - trans_type_table[pcfg->filter[0].trans_qaul], + trans_type_table[pcfg->filter[0].trans_qual], master_name_table[filter[0].match_mstaddr], filter[0].mask_mstaddr ); #endif @@ -782,7 +782,7 @@ filter.match_requserinfo = 0; filter.match_rspuserinfo = 0; - pcfg->filter.trans_qaul = SCI_RD_OR_WR_DONTCARE; + pcfg->filter.trans_qual = SCI_RD_OR_WR_DONTCARE; } else { @@ -802,7 +802,7 @@ else filter.mask_slvaddr = pcfg->filter.slave_addr_match; - switch (pcfg->filter.trans_qaul) { + switch (pcfg->filter.trans_qual) { case SCI_RD_ONLY: filter.mask_rd = 1; filter.mask_wr = 1; @@ -856,7 +856,7 @@ /* Setup the meta data */ get_meta_data(phandle, *pusecase_key, mstr_probe_name_table[pcfg->probe_id], - trans_type_table[pcfg->filter.trans_qaul], + trans_type_table[pcfg->filter.trans_qual], master_name_table[filter.match_mstaddr], filter.mask_mstaddr ); #endif diff -Nru tiomapconf-1.50.0/statcoll/sci.h tiomapconf-1.52.0/statcoll/sci.h --- tiomapconf-1.50.0/statcoll/sci.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/statcoll/sci.h 2012-11-14 16:36:23.000000000 +0000 @@ -398,7 +398,7 @@ { enum sci_master_addr mstr_addr_match; /*!< Master address match */ uint32_t mstr_addr_mask; /*!< Master address mask */ - enum sci_trans_qual trans_qaul; /*!< Tranaction qualifier */ + enum sci_trans_qual trans_qual; /*!< Tranaction qualifier */ enum sci_error_qual error_qual; /*!< Error qualifier */ //#if _SC_VER_1_16 // bool addr_filter_enable; /*!< Probe address filter enable */ @@ -411,7 +411,7 @@ struct sci_filter_mstr { enum sci_slave_addr slave_addr_match; /*!< Slave address match */ uint32_t slave_addr_mask; /*!< Slave address mask */ - enum sci_trans_qual trans_qaul; /*!< Tranaction qualifier */ + enum sci_trans_qual trans_qual; /*!< Tranaction qualifier */ enum sci_error_qual error_qual; /*!< Error qualifier */ }; diff -Nru tiomapconf-1.50.0/statcoll/sci_dev.h tiomapconf-1.52.0/statcoll/sci_dev.h --- tiomapconf-1.50.0/statcoll/sci_dev.h 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/statcoll/sci_dev.h 2012-11-14 16:36:23.000000000 +0000 @@ -167,16 +167,26 @@ SCI_MSTID_BB2D_P2 = 0x6C, SCI_MSTID_DSS = 0x70, SCI_MSTID_C2C = 0x80, - SCI_MSTID_LLI = 0x84, +#if defined(_OMAP5430) + SCI_MSTID_LLI = 0x84, +#endif SCI_MSTID_HSI = 0x90, +#if defined(_OMAP5430) SCI_MSTID_UNIPRO1 = 0x94, SCI_MSTID_UNIPRO2 = 0x98, +#endif SCI_MSTID_MMC1 = 0xA0, SCI_MSTID_MMC2 = 0xA4, +#if defined(_OMAP5430) SCI_MSTID_SATA = 0xA8, +#endif SCI_MSTID_USB_HOST_HS = 0xC0, - SCI_MSTID_USB_OTG_HS = 0xCC, - SCI_MASTID_ALL + SCI_MSTID_USB_OTG_HS = 0xC4, + SCI_MSTID_USB_OTG_FS = 0xC8, +#if defined(_OMAP5430) + SCI_MSTID_USB3 = 0xCC, +#endif + SCI_MASTID_ALL }; /*! \par sci_slave_addr Slave address enumerations. */ diff -Nru tiomapconf-1.50.0/statcoll/sci_swcapture.c tiomapconf-1.52.0/statcoll/sci_swcapture.c --- tiomapconf-1.50.0/statcoll/sci_swcapture.c 2012-09-22 21:00:44.000000000 +0000 +++ tiomapconf-1.52.0/statcoll/sci_swcapture.c 2012-11-14 16:36:23.000000000 +0000 @@ -48,6 +48,7 @@ #include #include #include +#include #include #include @@ -64,224 +65,172 @@ #include #include -struct sci_config_sdram my_config_emif1 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF1, - 1, - { - { - SCI_MASTID_ALL, - 0xff, - SCI_WR_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -struct sci_config_sdram my_config_emif2 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF2, - 1, - { - { - SCI_MASTID_ALL, - 0xff, - SCI_WR_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -struct sci_config_sdram my_config_emif3 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF1, - 1, - { - { - SCI_MASTID_ALL, - 0xff, - SCI_RD_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -struct sci_config_sdram my_config_emif4 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF2, - 1, - { - { - SCI_MASTID_ALL, - 0xff, - SCI_RD_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -struct sci_config_sdram my_config_emif5 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF1, - 1, - { - { - SCI_MSTID_IVA, - 0xff, - SCI_WR_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -struct sci_config_sdram my_config_emif6 = { - SCI_SDRAM_THROUGHPUT, - SCI_EMIF2, - 1, - { - { - SCI_MSTID_IVA, - 0xff, - SCI_WR_ONLY, - SCI_ERR_DONTCARE - } - } - }; - -char * msg[] = { "EMIF 0:Wr:All Initiators", - "EMIF 1:Wr:All Initiators", - "EMIF 0:Rd:All Initiators", - "EMIF 1:Rd:All Initiators", - "EMIF 0:Rd:IVA", - "EMIF 1:Rd:IVA", - "EMIF 0:Wr:IVA", - "EMIF 1:Rd:IVA", - }; -char * msg_overflow[] = { "EMIF 0:W:All Initiators", - "EMIF 1:W:All Initiators", - "EMIF 0:R:All Initiators", - "EMIF 1:R:All Initiators", - "EMIF 0:R:IVA", - "EMIF 1:R:IVA", - "EMIF 0:W:IVA", - "EMIF 1:W:IVA", - }; +struct name_value { + char *name; + char *name_ccs; + unsigned int value; +}; + +struct name_value match_master[] = { +{ "alldmm", "All DMM", SCI_MASTID_ALL }, +{ "mpuss", "MPUSS", SCI_MSTID_MPUSS }, +{ "dap", "DAP", SCI_MSTID_DAP }, +{ "dsp", "DSP", SCI_MSTID_DSP }, +{ "iva", "IVA", SCI_MSTID_IVA }, +{ "iss", "ISS", SCI_MSTID_ISS }, +{ "ipu", "IPU", SCI_MSTID_IPU }, +{ "fdid", "FDID", SCI_MSTID_FDIF }, +{ "sdma_rd", "SDMA_RD", SCI_MSTID_SDMA_RD }, +{ "sdma_wr", "SDMA_WR", SCI_MSTID_SDMA_WR }, +{ "gpu_p1", "GPU_P1", SCI_MSTID_GPU_P1 }, +{ "gpu_p2", "GPU_P2", SCI_MSTID_GPU_P2 }, +{ "bb2d_p1", "BB2D_P1", SCI_MSTID_BB2D_P1 }, +{ "bb2d_p2", "BB2D_P2", SCI_MSTID_BB2D_P2 }, +{ "dss", "DSS", SCI_MSTID_DSS }, +{ "c2c", "C2C", SCI_MSTID_C2C }, +{ "lli", "LLI", SCI_MSTID_LLI }, +{ "hsi", "HSI", SCI_MSTID_HSI }, +{ "unipro1", "UNIPRO1", SCI_MSTID_UNIPRO1 }, +{ "unipro2", "UNIPRO2", SCI_MSTID_UNIPRO2 }, +{ "mmc1", "MMC1", SCI_MSTID_MMC1 }, +{ "mmc2", "MMC2", SCI_MSTID_MMC2 }, +{ "sata", "SATA", SCI_MSTID_SATA }, +{ "usb_host_hs", "USB_HOST_HS", SCI_MSTID_USB_HOST_HS }, +{ "usb_otg_hs", "USB_OTG_HS", SCI_MSTID_USB_OTG_HS }, +{ "usb_otg_fs", "USB_OTG_FS", SCI_MSTID_USB_OTG_FS }, +{ "usb3", "USB3", SCI_MSTID_USB3 }, +{ NULL, NULL, 0 } +}; + +struct name_value match_qualifier[] = { +{ "r", "Rd", SCI_RD_ONLY }, +{ "r+w", "Rd/Wr", SCI_RD_OR_WR_DONTCARE }, +{ "w", "Wr", SCI_WR_ONLY }, +{ NULL, NULL, 0 } +}; + +struct name_value match_probe[] = { +{ "emif1", "EMIF 0", SCI_EMIF1 }, +{ "emif2", "EMIF 1", SCI_EMIF2 }, +{ NULL, NULL, 0 } +}; + +struct sci_config_sdram my_config_emif1 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF1, 1, { { SCI_MASTID_ALL, 0xff, SCI_WR_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif2 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF2, 1, { { SCI_MASTID_ALL, 0xff, SCI_WR_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif3 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF1, 1, { { SCI_MASTID_ALL, 0xff, SCI_RD_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif4 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF2, 1, { { SCI_MASTID_ALL, 0xff, SCI_RD_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif5 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF1, 1, { { SCI_MASTID_ALL, 0xff, SCI_WR_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif6 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF2, 1, { { SCI_MASTID_ALL, 0xff, SCI_WR_ONLY, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif7 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF1, 0, { { SCI_MASTID_ALL, 0xff, SCI_RD_OR_WR_DONTCARE, SCI_ERR_DONTCARE } } }; +struct sci_config_sdram my_config_emif8 = { SCI_SDRAM_THROUGHPUT, SCI_EMIF2, 0, { { SCI_MASTID_ALL, 0xff, SCI_RD_OR_WR_DONTCARE, SCI_ERR_DONTCARE } } }; struct sci_config_sdram * pmy_cfg[] = { &my_config_emif1, &my_config_emif2, &my_config_emif3, &my_config_emif4, - //&my_config_emif5, - //&my_config_emif6, + &my_config_emif5, + &my_config_emif6, + &my_config_emif7, + &my_config_emif8, }; -void sci_errhandler(psci_handle phandle, const char * func, enum sci_err err) -{ - enum sci_err my_sci_err = SCI_SUCCESS; - - printf("SCILib failure %d in function: %s \n", err, func ); - - if (NULL != phandle) - my_sci_err = sci_close(&phandle); - - if ( my_sci_err ) - exit(-2); - else - exit (-3); -} - -static volatile unsigned int *addr_32k = NULL; - #define GET_32K *(addr_32k) - #define MAX_ITERATIONS 1000000UL -uint32_t counters[(8+1)*MAX_ITERATIONS]; -unsigned int num_use_cases; -unsigned int overflow_counter_index; -unsigned int tests; -unsigned int nosleep_32k_reg; -unsigned int nosleep_32k = 0; -unsigned int accumulation_type; -unsigned int valid_usecase_cnt = 0; -psci_handle psci_hdl = NULL; -psci_usecase_key my_usecase_key[8] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; -void nosleep_32k_enable(void) -{ - unsigned int reg; - unsigned int reg_clk; - - if (cpu_is_omap54xx()) - reg_clk = OMAP5430_CM_WKUPAON_CLKSTCTRL; - else if (cpu_is_omap44xx()) - reg_clk = OMAP4430_CM_WKUP_CLKSTCTRL; - mem_read(reg_clk, ®); - nosleep_32k_reg = reg & 0x3; - reg = reg & (~0x3); - mem_write(reg_clk, reg); -} - -void nosleep_32k_disable(void) -{ - unsigned int reg; - unsigned int reg_clk; - - if (cpu_is_omap54xx()) - reg_clk = OMAP5430_CM_WKUPAON_CLKSTCTRL; - else if (cpu_is_omap44xx()) - reg_clk = OMAP4430_CM_WKUP_CLKSTCTRL; - - mem_read(reg_clk, ®); - reg = reg | nosleep_32k_reg; - mem_write(reg_clk, reg); -} - -void omapconf_emu_enable_domain() -{ - if (cpu_is_omap44xx()) - //omap4conf_emu_enable_domain(); - mem_write(OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, 0x1); - else if (cpu_is_omap54xx()) - //omap5conf_emu_enable_domain(); - mem_write(OMAP5430_CM_L3INSTR_L3_MAIN_3_CLKCTRL, 0x1); -} - -void omapconf_emu_disable_domain() -{ - if (cpu_is_omap44xx()) - //omap4conf_emu_disable_domain(); - mem_write(OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, 0); - else if (cpu_is_omap54xx()) - //omap5conf_emu_disable_domain(); - mem_write(OMAP5430_CM_L3INSTR_L3_MAIN_3_CLKCTRL, 0x0); -} +static char msg[8][100], msg_overflow[8][100]; // messages for CCS like output (-a 1 option) +static volatile unsigned int *addr_32k = NULL; // 32K timestamping +static uint32_t counters[(8+1)*MAX_ITERATIONS]; // timestamp+counters storing in "-a 1" mode +static unsigned int num_use_cases = 4; +static unsigned int option_overflow_counter_index[2], option_overflow_threshold[2]; +static unsigned int option_overflow_iterations; +static unsigned int tests; // number of tests really executed in case of Ctrl-C +static unsigned int nosleep_32k_reg; // -n option +static unsigned int option_nosleep_32k = 0; // -n option +static unsigned int option_accumulation_type; // -a option +static unsigned int valid_usecase_cnt = 0; +static psci_handle psci_hdl = NULL; +static psci_usecase_key my_usecase_key[8] = {NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL}; + + +void sci_errhandler(psci_handle phandle, const char * func, enum sci_err err); +void nosleep_32k_enable(void); +void nosleep_32k_disable(void); +void omapconf_emu_enable_domain(void); +void omapconf_emu_disable_domain(void); + +// Generic handling of sample array +#define SAMPLE_SIZE (1 + num_use_cases) // sample contains 1 timestamp + x counters +#define TIMESTAMP_INDEX (0) // timestamp is first index in 1 sample +#define COUNTER_INDEX (1) // counters are put just after timestamp void dump_buffer(void) { uint32_t *counters_current = counters; - unsigned int timestamp0; - unsigned int i,j; + unsigned int timestamp0, time; + unsigned int i,j, tests_overflow; + unsigned int *prev_counter, *current_counter; + tests_overflow = 1; + unsigned int overflow_on = 0; fprintf(stderr, "%u iterations finished, dumping to file\n", tests); + // for each test, we will compute delta between prev and current and print at current timestamp for (i = 0; i < tests - 1; i++) { - unsigned int timestamp = *(counters_current + 1 + num_use_cases); + unsigned int timestamp = *(counters_current + TIMESTAMP_INDEX + SAMPLE_SIZE); if (i == 0) { - timestamp0 = *counters_current; + timestamp0 = *(counters_current + TIMESTAMP_INDEX); printf("Ref timestamp: %u\n", timestamp0); } + // Use relative timestamp + time = timestamp - timestamp0; + + // Detect reset. Sample i triggers reset so sample i+1 delta to i is ignored + if ( ( (option_overflow_iterations > 0) && (tests_overflow > option_overflow_iterations) ) + || ( (option_overflow_iterations == 0) + && ( (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[0]) >= option_overflow_threshold[0]) + || (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[1]) >= option_overflow_threshold[1]) + ) + ) + ) + overflow_on = 1; + for (j = 0; j < num_use_cases; j++) { - if ( (*(counters_current + 1 + num_use_cases + 1 + overflow_counter_index) < *(counters_current + 1 + overflow_counter_index)) ) { + // current counter is in fact next sample, i.e. j + sample_size. prev is j + current_counter = counters_current + SAMPLE_SIZE + COUNTER_INDEX + j; + prev_counter = counters_current + COUNTER_INDEX + j; + + // Overflow at 2^32. We can't fix that + if (*current_counter == 0xFFFFFFFF) { + fprintf(stderr, "ERROR: counter %d %s overflowed at time %u, don't trust results\n", j, msg[j], time); + printf("ERROR: counter %d %s overflowed at time %u, don't trust results\n", j, msg[j], time); + } + + // Dump result. In case of overflow, just print for reference, post-processing will ignore + if (overflow_on == 1) { printf("Warning: overflow\n"); - printf("0,0,0,S,,SDRAM,,%u,%s,T,V,%u,,,,0,\n", *(counters_current + 1 + num_use_cases + 1 + j) - *(counters_current + 1 + j), msg_overflow[j], timestamp - timestamp0); - } + printf("0,0,0,S,,SDRAM,,%u,%s,T,V,%u,,,,0,\n", *current_counter - *prev_counter, msg_overflow[j], time); + } else { - printf("0,0,0,S,,SDRAM,,%u,%s,T,V,%u,,,,0,\n", *(counters_current + 1 + num_use_cases + 1 + j) - *(counters_current + 1 + j), msg[j], timestamp - timestamp0); + // HW bug, you read a counter that is < previous value. We fix this by forcing same value than previous sample + if (*current_counter < *prev_counter) { + fprintf(stderr, "WARNING: HW bug, counter %d %s N-1=%u N=%u at time %u. omapconf fixes it\n", j, msg[j], *prev_counter, *current_counter, time); + printf("WARNING: HW bug, counter %d %s N-1=%u N=%u at time %u. omapconf fixes it\n", j, msg[j], *prev_counter, *current_counter, time); + // omapconf fix, any value is OK as this is only about deltas + *current_counter = *prev_counter; } + + printf("0,0,0,S,,SDRAM,,%u,%s,T,V,%u,,,,0,\n", *current_counter - *prev_counter, msg[j], time); + } } - counters_current += 1 + num_use_cases; + counters_current += SAMPLE_SIZE; + + if (overflow_on == 1) { + tests_overflow = 0; + overflow_on = 0; + } + tests_overflow++; } } @@ -289,12 +238,12 @@ { unsigned int i; - if (accumulation_type == 1) + if (option_accumulation_type == 1) dump_buffer(); mem_unmap_32k(addr_32k); - if (nosleep_32k) + if (option_nosleep_32k) nosleep_32k_disable(); for (i = 0; i < valid_usecase_cnt; i++) { @@ -306,65 +255,106 @@ omapconf_emu_disable_domain(); } + int statcoll_main(int argc, char **argv) { struct sci_config my_sci_config; enum sci_err my_sci_err; - int c; - unsigned int delay_us; - unsigned int iterations; - unsigned int overflow_threshold; - unsigned int disable = 0; - unsigned int min_addr; - unsigned int max_addr; - - delay_us = 1000000; - accumulation_type = 2; - iterations = 0; - overflow_counter_index = 1; - overflow_threshold = 0; + int c, option_index = 0; + static int longopt_flag; + unsigned int option_delay_us; + unsigned int option_overflow_delay_us; + unsigned int option_iterations; + unsigned int option_disable = 0; + unsigned int option_min_addr; + unsigned int option_max_addr; + unsigned int describe_loop; + + // Default values of options + option_delay_us = 1000000; // 1 second + option_overflow_delay_us = 1000000; // 1 second + option_overflow_iterations = option_overflow_delay_us / option_delay_us; + option_accumulation_type = 2; // dump on terminal + option_iterations = 0; // infinite iterations + option_overflow_counter_index[0] = 0; // check counter 0 for overflow + option_overflow_counter_index[1] = 0; + option_overflow_threshold[0] = 0; // reset at each capture + option_overflow_threshold[1] = 0; + + static struct option long_options[] = + { + /* These options set a flag. */ + {"m0", required_argument, &longopt_flag, 'm'}, + {"m1", required_argument, &longopt_flag, 'm'}, + {"m2", required_argument, &longopt_flag, 'm'}, + {"m3", required_argument, &longopt_flag, 'm'}, + {"m4", required_argument, &longopt_flag, 'm'}, + {"m5", required_argument, &longopt_flag, 'm'}, + {"m6", required_argument, &longopt_flag, 'm'}, + {"m7", required_argument, &longopt_flag, 'm'}, + {"tr0", required_argument, &longopt_flag, 'q'}, + {"tr1", required_argument, &longopt_flag, 'q'}, + {"tr2", required_argument, &longopt_flag, 'q'}, + {"tr3", required_argument, &longopt_flag, 'q'}, + {"tr4", required_argument, &longopt_flag, 'q'}, + {"tr5", required_argument, &longopt_flag, 'q'}, + {"tr", required_argument, &longopt_flag, 'q'}, + {"p0", required_argument, &longopt_flag, 'p'}, + {"p1", required_argument, &longopt_flag, 'p'}, + {"p2", required_argument, &longopt_flag, 'p'}, + {"p3", required_argument, &longopt_flag, 'p'}, + {"p4", required_argument, &longopt_flag, 'p'}, + {"p5", required_argument, &longopt_flag, 'p'}, + {"p6", required_argument, &longopt_flag, 'p'}, + {"p7", required_argument, &longopt_flag, 'p'}, + {"allcounters", no_argument, &longopt_flag, '8'}, + {"overflow_delay", required_argument, &longopt_flag, '1'}, + {0, 0, 0, 0} + }; + + while ((c = getopt_long (argc, argv, "hnm:d:a:i:o:t:r:p:q:D", long_options, &option_index)) != -1) { + // small trick to merge long options with short options of same doaain (-m and --m0 --m1 ...) + unsigned int long_opt = 0; + + if (c == 0) + { + long_opt = 1; + c = long_options[option_index].val; + } - while ((c = getopt (argc, argv, "hnm:d:a:i:o:t:r:D")) != -1) { switch (c) { case 'h': - printf("\n\tomapconf trace bw [-h] [-m 0xyy or MA_MPU_1_2] [-d x] [-a 1 or 2] [-i x] [-o x -t y] [-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); - printf("\n\t-m 0xaa or MA_MPU_1_2\n"); - printf("\t\tMaster initiator\n"); - printf("\t\tMA_MPU_1_2 - Non DMM MPU memory traffic, see Examples\n"); - printf("\t\tSCI_MASTID_ALL 0x%x\n", SCI_MASTID_ALL); - printf("\t\tSCI_MSTID_MPUSS 0x%x\n",SCI_MSTID_MPUSS ); - printf("\t\tSCI_MSTID_DAP 0x%x\n", SCI_MSTID_DAP); - printf("\t\tSCI_MSTID_DSP 0x%x\n", SCI_MSTID_DSP); - printf("\t\tSCI_MSTID_IVA 0x%x\n", SCI_MSTID_IVA); - printf("\t\tSCI_MSTID_ISS 0x%x\n", SCI_MSTID_ISS); - printf("\t\tSCI_MSTID_IPU 0x%x\n", SCI_MSTID_IPU); - printf("\t\tSCI_MSTID_FDIF 0x%x\n", SCI_MSTID_FDIF); - printf("\t\tSCI_MSTID_SDMA_RD 0x%x\n", SCI_MSTID_SDMA_RD); - printf("\t\tSCI_MSTID_SDMA_WR 0x%x\n", SCI_MSTID_SDMA_WR); - printf("\t\tSCI_MSTID_GPU_P1 0x%x\n", SCI_MSTID_GPU_P1); - printf("\t\tSCI_MSTID_GPU_P2 0x%x\n", SCI_MSTID_GPU_P2); - printf("\t\tSCI_MSTID_BB2D_P1 0x%x (GC320)\n", SCI_MSTID_BB2D_P1); - printf("\t\tSCI_MSTID_BB2D_P2 0x%x (GC320)\n", SCI_MSTID_BB2D_P2); - printf("\t\tSCI_MSTID_DSS 0x%x\n", SCI_MSTID_DSS); - printf("\t\tSCI_MSTID_C2C 0x%x\n", SCI_MSTID_C2C); - printf("\t\tSCI_MSTID_LLI 0x%x\n", SCI_MSTID_LLI); - printf("\t\tSCI_MSTID_HSI 0x%x\n", SCI_MSTID_HSI); - printf("\t\tSCI_MSTID_UNIPRO1 0x%x\n", SCI_MSTID_UNIPRO1); - printf("\t\tSCI_MSTID_UNIPRO2 0x%x\n", SCI_MSTID_UNIPRO2); - printf("\t\tSCI_MSTID_MMC1 0x%x\n", SCI_MSTID_MMC1); - printf("\t\tSCI_MSTID_MMC2 0x%x\n", SCI_MSTID_MMC2); - printf("\t\tSCI_MSTID_SATA 0x%x\n", SCI_MSTID_SATA); - printf("\t\tSCI_MSTID_USB_HOST_HS 0x%x\n", SCI_MSTID_USB_HOST_HS); - printf("\t\tSCI_MSTID_USB_OTG_HS 0x%x\n", SCI_MSTID_USB_OTG_HS); + { + unsigned int loop = 0; + + printf("\n\tomapconf trace bw [-h] [<-m | --m> <0xyy | ma_mpu | alldmm | dss | iva | ...>] [<-p | --p ] [<--tr | --tr> ] [-d x] [--overflow_delay x] [-a 1 or 2] [-i x] [-o x -t y] [-r 0xaaaaaaaa-0xbbbbbbbb] [-n]\n"); + printf("\n\t-m, -p, -q sets all 8 counters while -m0, --p0, --q0 to --m7, --tr7, --p5 set 1 counter only\n"); + printf("\n\t-m <0xyy | ma_mpu | alldmm | dss | iva | ...> (MA_MPU_1_2 deprecated)\n"); + printf("\t\tMaster initiator monitored. WARNING: All DMM traffic includes DSS, IVA, GPU, ... but not MA_MPU, which requires parallel monitoring \n"); + printf("\t\tma_mpu (MA_MPU_1_2 deprecated) - Non DMM MPU memory traffic, see Examples\n"); + + while (match_master[loop].name != NULL) + { + printf("\t\t%s 0x%x\n", match_master[loop].name, match_master[loop].value); + loop++; + } + printf("\n\t-d xxx or 0.xx\n"); printf("\t\tDelay in ms between 2 captures, can be float\n"); + printf("\n\t--overflow_delay xxx or 0.xx\n"); + printf("\t\tDelay in ms after which HW IP is reset to avoid overflow. Disables -o -t options. Can be float.\n"); + printf("\n\t-p or --p \n"); + printf("\t\tProbed channel. 1 counter can monitor only EMIF1 or EMIF2\n"); + printf("\n\t--tr or --tr \n"); + printf("\t\tTransaction qualifier. Rd or Wr or Rd+Wr monitoring. HW implementation prevents changing this on last 2 counters\n"); printf("\n\t-a 1 or 2\n"); printf("\t\taccumulation type. 2: dump at every capture. 1: dump only at end\n"); printf("\n\t-i x\n"); printf("\t\tnumber of iterations (for -a 1). You can Ctrl-C during test, current captures will be displayed\n"); printf("\n\t-o x -t y \n"); - printf("\t\tindex for overflow handling (0=Wr_EMIF0,1=Wr_EMIF1,2=Rd_EMIF0,3=Rd_EMIF1) + threshold to reset HW. You must use them for -a 1\n"); + printf("\t\tindex for overflow handling + threshold to reset HW. Disables auto-reset of HW IP based on time (--overflow_delay). You MUST use them for -a 1\n"); + printf("\t\tUse this option twice to set 2 different thresholds on 2 different counters\n"); printf("\n\t-r 0xaa-0xbb\n"); printf("\t\taddress filtering, like 0x9b000000-0x9f000000\n"); printf("\n\t-n\n"); @@ -372,106 +362,475 @@ printf("\n\t-D\n"); printf("\t\tdisable statcol (deprecated)\n"); printf("\n\tExamples:\n"); - printf("\t-m 0x70 -d 0.3 -a 1 -i 40000 -o 2 -t 3000000000\n"); + printf("\tDefault: --p7 emif2 (this forces use of 8 counters and counter 7 is using emif2 as default probed channel)\n"); + printf("\t\tCounter: 0 Master: alldmm Transaction: w Probe: emif1\n"); + printf("\t\tCounter: 1 Master: alldmm Transaction: w Probe: emif2\n"); + printf("\t\tCounter: 2 Master: alldmm Transaction: r Probe: emif1\n"); + printf("\t\tCounter: 3 Master: alldmm Transaction: r Probe: emif2\n"); + printf("\t\tCounter: 4 Master: alldmm Transaction: w Probe: emif1\n"); + printf("\t\tCounter: 5 Master: alldmm Transaction: w Probe: emif2\n"); + printf("\t\tCounter: 6 Master: alldmm Transaction: r+w Probe: emif1\n"); + printf("\t\tCounter: 7 Master: alldmm Transaction: r+w Probe: emif2\n"); + printf("\n\t-m 0x70 -d 1000 -a 2 (often used as -m 0x70 only)\n"); + printf("\t\taccumulation 2 is reading of registers and tracing them immediately\n"); + printf("\t\tFormat is time: time_start time_end delta_time -> Wr_DMM_EMIF1 Wr_DMM_EMIF2 Rd_DMM_EMIF1 Rd_DMM_EMIF2 (MB/s)\n"); + printf("\n\t-m dss -d 0.3 -a 1 -i 40000 -o 2 -t 3000000000\n"); printf("\t\taccumulation 1 is reading of registers and storing in RAM. Result is dumped at the end with CCS format to reuse\n"); printf("\t\texisting post-processing. So you must set iterations. Overflow is taken into account. Suits small delays\n"); - printf("\n\t-m 0x70 -d 1000 -a 2 -o 2 -t 3000000000 (often used as -m 0x70 only)\n"); - printf("\t\taccumulation 2 is reading of registers and tracing them immediately\n"); - printf("\t\tFormat is time: time_start time_end delta_time -> Wr_EMIF0 Wr_EMIF1 Rd_EMIF0 Rd_EMIF1 (MB/s)\n"); - printf("\n\t-m MA_MPU_1_2 -d 1000 -a 2 -o 2 -t 3000000000\n"); - printf("\t\tMA_MPU is MPU memory adaptor, a direct path to EMIF. There are 2 MA. MA_MPU_1_2 will display:\n"); - printf("\t\tWr_MA_MPU_1 Wr_MA_MPU_2 Rd_MA_MPU_1 Rd_MA_MPU_2 (MB/s)\n"); + printf("\n\t-m MA_MPU -d 1000 -a 2 --overflow_delay 500\n"); + printf("\t\tMA_MPU is MPU memory adaptor, a direct path to EMIF. MA_MPU will display:\n"); + printf("\t\tWr_MA_MPU_EMIF1 Wr_MA_MPU_EMIF2 Rd_MA_MPU_EMIF Rd_MA_MPU_EMIF2 (MB/s)\n"); + printf("\n\t--tr r+w -p emif1 --m0 ma_mpu --m1 ma_mpu --tr1 w --p1 emif2 --m2 gpu_p1 --m3 dss --m4 alldmm --m5 alldmm --p5 emif2\n"); + printf("\t\tCounter: 0 Master: ma_mpu Transaction: r+w Probe: emif1\n"); + printf("\t\tCounter: 1 Master: ma_mpu Transaction: w Probe: emif2\n"); + printf("\t\tCounter: 2 Master: gpu_p1 Transaction: r+w Probe: emif1\n"); + printf("\t\tCounter: 3 Master: dss Transaction: r+w Probe: emif1\n"); + printf("\t\tCounter: 4 Master: alldmm Transaction: r+w Probe: emif1\n"); + printf("\t\tCounter: 5 Master: alldmm Transaction: r+w Probe: emif2\n"); + printf("\n\t2 masters + all traffic on EMIF1 and EMIF2: --tr r+w --m0 dss --m1 dss --m2 iva --m3 iva --m6 ma_mpu --m7 ma_mpu\n"); + printf("\tNote that you can monitor more masters if you have identified earlier that traffic is well balanced over EMIF1 and EMIF2, i.e. traffic for this master = 2 * EMIF1 = 2 * EMIF2\n"); printf("\n\tDefault settings:\n"); - printf("\t\t-m 0xcd -d 1000 -a 2 -i 0 -o 0 -t 0\n"); - printf("\t\tall initiators, 1000ms delay, accumulation 2, infinite iterations, overflow on counter 0, threshold=0 i.e. always stop/restart HW IP after 1 capture\n"); + printf("\t\t-m 0xcd -d 1000 -a 2 -i 0 --overflow_delay 1000\n"); + printf("\t\tall initiators, 1000ms delay, accumulation 2, infinite iterations, auto-reset IP after 1 s, i.e. always stop/restart HW IP after 1 capture\n"); printf("\n\tPost-processing (for -a 1):\n"); printf("\t\tgit clone git://gitorious.tif.ti.com/omap-video-perf/runperf.git, instrumentation/bandwidth/BWstats_ccsv5.py\n"); printf("\t\tpython-matplotlib is needed\n"); printf("\n\tWiki:\n"); printf("\t\t\n\n"); - sci_global_disable(psci_hdl); - sci_close(&psci_hdl); + //sci_global_disable(psci_hdl); + //sci_close(&psci_hdl); return 0; + } case 'm': - if (strstr(optarg, "0x")) { - int a; - sscanf(optarg, "%x", &a); - my_config_emif1.filter[0].mstr_addr_match = a; - my_config_emif2.filter[0].mstr_addr_match = a; - my_config_emif3.filter[0].mstr_addr_match = a; - my_config_emif4.filter[0].mstr_addr_match = a; - printf("Master: %x\n", a); + { + unsigned int index; + + if (long_opt == 1) { + index = long_options[option_index].name[1] - '0'; + + // go up to 6 couhters + if ((index + 1) > num_use_cases) + num_use_cases = index + 1; } - else if (strstr(optarg, "ma_mpu_1_2")) { + + if (!strstr(optarg, "ma_mpu")) { + unsigned int loop = 0; + + if (strstr(optarg, "0x")) { + unsigned int a; + sscanf(optarg, "%x", &a); + while (match_master[loop].name != NULL) + { + if (match_master[loop].value == a) + break; + loop++; + } + } + else { + while (match_master[loop].name != NULL) + { + if (!strcmp(match_master[loop].name, optarg)) + break; + loop++; + } + } + + if (match_master[loop].name != NULL) { + if (long_opt == 1) { + pmy_cfg[index]->filter[0].mstr_addr_match = match_master[loop].value; + if (pmy_cfg[index]->probe_id == SCI_MA_MPU_P1) + pmy_cfg[index]->probe_id = SCI_EMIF1; + if (pmy_cfg[index]->probe_id == SCI_MA_MPU_P2) + pmy_cfg[index]->probe_id = SCI_EMIF2; + } + else { + unsigned int i; + + for (i = 0; i < sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); i++) { + pmy_cfg[i]->filter[0].mstr_addr_match = match_master[loop].value; + if (pmy_cfg[i]->probe_id == SCI_MA_MPU_P1) + pmy_cfg[i]->probe_id = SCI_EMIF1; + if (pmy_cfg[i]->probe_id == SCI_MA_MPU_P2) + pmy_cfg[i]->probe_id = SCI_EMIF2; + } + } + } + // parsing error + else { + printf("ERROR: %s option of -m is not recognized\n", optarg); + goto END; + } + } + else if ( (!strcmp(optarg, "ma_mpu_1_2")) && (long_opt == 0) ) { my_config_emif1.probe_id = SCI_MA_MPU_P1; + my_config_emif1.filter[0].mstr_addr_match = SCI_MASTID_ALL; my_config_emif2.probe_id = SCI_MA_MPU_P2; + my_config_emif2.filter[0].mstr_addr_match = SCI_MASTID_ALL; my_config_emif3.probe_id = SCI_MA_MPU_P1; + my_config_emif3.filter[0].mstr_addr_match = SCI_MASTID_ALL; my_config_emif4.probe_id = SCI_MA_MPU_P2; - printf("Master: MA_MPU_1 and MA_MPU_2\n"); + my_config_emif5.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif5.probe_id = SCI_MA_MPU_P1; + my_config_emif6.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif6.probe_id = SCI_MA_MPU_P2; + my_config_emif6.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif7.probe_id = SCI_MA_MPU_P1; + my_config_emif7.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif8.probe_id = SCI_MA_MPU_P2; + my_config_emif8.filter[0].mstr_addr_match = SCI_MASTID_ALL; } + else if (!strcmp(optarg, "ma_mpu")) { + if (long_opt == 1) { + pmy_cfg[index]->filter[0].mstr_addr_match = SCI_MASTID_ALL; + if (pmy_cfg[index]->probe_id == SCI_EMIF1) + pmy_cfg[index]->probe_id = SCI_MA_MPU_P1; + if (pmy_cfg[index]->probe_id == SCI_EMIF2) + pmy_cfg[index]->probe_id = SCI_MA_MPU_P2; + } + else { + unsigned int i; + + for (i = 0; i < sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); i++) { + pmy_cfg[i]->filter[0].mstr_addr_match = SCI_MASTID_ALL; + if (pmy_cfg[i]->probe_id == SCI_EMIF1) + pmy_cfg[i]->probe_id = SCI_MA_MPU_P1; + if (pmy_cfg[i]->probe_id == SCI_EMIF2) + pmy_cfg[i]->probe_id = SCI_MA_MPU_P2; + } + } + } + else { + printf("ERROR: %s option of -m is not recognized\n", optarg); + goto END; + } + } + break; + case 'q': + { + unsigned int loop = 0; + unsigned int index; + + if (!strcmp(long_options[option_index].name, "tr")) + long_opt = 0; + + if (long_opt == 1) { + index = long_options[option_index].name[2] - '0'; + + // go up to 6 couhters + if ((index + 1) > num_use_cases) + num_use_cases = index + 1; + } + + while (match_qualifier[loop].name != NULL) + { + if (!strcmp(match_qualifier[loop].name, optarg)) + break; + loop++; + } + + if (match_qualifier[loop].name != NULL) { + if (long_opt == 1) { + pmy_cfg[index]->filter[0].trans_qual = match_qualifier[loop].value; + } + else { + unsigned int i; + + for (i = 0; i < sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); i++) { + pmy_cfg[i]->filter[0].trans_qual = match_qualifier[loop].value; + } + } + } + else { + printf("ERROR: %s option of -q/--qx not recognized\n", optarg); + goto END; + } + } + break; + case 'p': + { + unsigned int loop = 0; + unsigned int index; + + if (long_opt == 1) { + index = long_options[option_index].name[1] - '0'; + + // go up to 6 couhters + if ((index + 1) > num_use_cases) + num_use_cases = index + 1; + } + + while (match_probe[loop].name != NULL) + { + if (!strcmp(match_probe[loop].name, optarg)) + break; + loop++; + } + + if (match_probe[loop].name != NULL) { + if (long_opt == 1) { + if (pmy_cfg[index]->probe_id == SCI_MA_MPU_P1) { + if (match_probe[loop].value == SCI_EMIF2) + pmy_cfg[index]->probe_id = SCI_MA_MPU_P2; + } + else if (pmy_cfg[index]->probe_id == SCI_MA_MPU_P2) { + if (match_probe[loop].value == SCI_EMIF1) + pmy_cfg[index]->probe_id = SCI_MA_MPU_P1; + } + else { + pmy_cfg[index]->probe_id = match_probe[loop].value; + } + } + else { + unsigned int i; + + for (i = 0; i < sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); i++) { + if ( (pmy_cfg[i]->probe_id == SCI_MA_MPU_P1) && (match_probe[loop].value == SCI_EMIF2) ) + pmy_cfg[i]->probe_id = SCI_MA_MPU_P2; + else if ( (pmy_cfg[i]->probe_id == SCI_MA_MPU_P2) && (match_probe[loop].value == SCI_EMIF1) ) + pmy_cfg[i]->probe_id = SCI_MA_MPU_P1; + else + pmy_cfg[i]->probe_id = match_probe[loop].value; + } + } + } + else { + printf("ERROR: %s option of -p/--px not recognized\n", optarg); + goto END; + } + } break; case 'd': { float a; - sscanf(optarg, "%f", &a); - delay_us = a * 1000; + if ( (sscanf(optarg, "%f", &a) > 0) && (a > 0)) + option_delay_us = a * 1000; + else { + printf("ERROR: %s option of -d not recognized or wrong\n", optarg); + goto END; + } + if (option_overflow_iterations > 0) + option_overflow_iterations = option_overflow_delay_us / option_delay_us; } break; case 'a': - sscanf(optarg, "%u", &accumulation_type); + sscanf(optarg, "%u", &option_accumulation_type); + if ((option_accumulation_type != 1) && (option_accumulation_type != 2)) { + printf("ERROR: %s option of -a not recognized or wrong\n", optarg); + goto END; + } break; case 'i': - sscanf(optarg, "%u", &iterations); + if (sscanf(optarg, "%u", &option_iterations) == 0) { + printf("ERROR: %s option of -i not recognized\n", optarg); + goto END; + } break; case 'o': - sscanf(optarg, "%u", &overflow_counter_index); + { + static unsigned int o_count = 0; + unsigned int result; + + if ((sscanf(optarg, "%u", &result) == 0) || (result > 7)) { + printf("ERROR: %s option of -o not recognized or too high\n", optarg); + goto END; + } + + option_overflow_counter_index[1] = result; + if (o_count++ == 0) + option_overflow_counter_index[0] = result; + option_overflow_delay_us = 0; + option_overflow_iterations = 0; + } break; case 't': - sscanf(optarg, "%u", &overflow_threshold); + { + static unsigned int t_count = 0; + unsigned int result; + + if (sscanf(optarg, "%u", &result) == 0) { + printf("ERROR: %s option of -t not recognized\n", optarg); + goto END; + } + + option_overflow_threshold[1] = result; + if (t_count++ == 0) + option_overflow_threshold[0] = result; + option_overflow_delay_us = 0; + option_overflow_iterations = 0; + } break; case 'n': - nosleep_32k = 1; + option_nosleep_32k = 1; + break; + case '8': + num_use_cases = sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); + break; + case '1': + { + float a; + if ( (sscanf(optarg, "%f", &a) > 0) && (a > 0)) { + option_overflow_delay_us = a * 1000; + option_overflow_iterations = option_overflow_delay_us / option_delay_us; + } + else { + printf("ERROR: %s option of --overflow_delay not recognized or wrong\n", optarg); + goto END; + } + } break; case 'r': - sscanf(optarg, "0x%x-0x%x", &min_addr, &max_addr); + sscanf(optarg, "0x%x-0x%x", &option_min_addr, &option_max_addr); - my_config_emif1.addr_filter_min = min_addr; - my_config_emif2.addr_filter_min = min_addr; - my_config_emif3.addr_filter_min = min_addr; - my_config_emif4.addr_filter_min = min_addr; - - my_config_emif1.addr_filter_max = max_addr; - my_config_emif2.addr_filter_max = max_addr; - my_config_emif3.addr_filter_max = max_addr; - my_config_emif4.addr_filter_max = max_addr; + my_config_emif1.addr_filter_min = option_min_addr; + my_config_emif2.addr_filter_min = option_min_addr; + my_config_emif3.addr_filter_min = option_min_addr; + my_config_emif4.addr_filter_min = option_min_addr; + my_config_emif5.addr_filter_min = option_min_addr; + my_config_emif6.addr_filter_min = option_min_addr; + + my_config_emif1.addr_filter_max = option_max_addr; + my_config_emif2.addr_filter_max = option_max_addr; + my_config_emif3.addr_filter_max = option_max_addr; + my_config_emif4.addr_filter_max = option_max_addr; + my_config_emif5.addr_filter_max = option_max_addr; + my_config_emif6.addr_filter_max = option_max_addr; my_config_emif1.addr_filter_enable = true; my_config_emif2.addr_filter_enable = true; my_config_emif3.addr_filter_enable = true; my_config_emif4.addr_filter_enable = true; + my_config_emif5.addr_filter_enable = true; + my_config_emif6.addr_filter_enable = true; break; case 'D': - disable = 1; + option_disable = 1; default: - printf("Unknown option\n"); + printf("ERROR: Unknown option\n"); + goto END; + } + } + + // Error checking, are there still elements ? + if (optind < argc) + { + printf ("ERROR: non-option ARGV-elements: "); + while (optind < argc) + printf ("%s ", argv[optind++]); + putchar ('\n'); + goto END; + } + + // Even if above chhanges config of counter 7 and 8, we restore default as they can't filter + my_config_emif7.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif7.filter[0].trans_qual = SCI_RD_OR_WR_DONTCARE; + my_config_emif8.filter[0].mstr_addr_match = SCI_MASTID_ALL; + my_config_emif8.filter[0].trans_qual = SCI_RD_OR_WR_DONTCARE; + + // Describe configuration of counters in human readable format + for (describe_loop = 0; describe_loop < num_use_cases; describe_loop++) { + unsigned int a, b, c; + char *a_name, *b_name, *c_name; + unsigned int loop = 0, loop_transaction = 0; + + a = pmy_cfg[describe_loop]->filter[0].mstr_addr_match; + b = pmy_cfg[describe_loop]->filter[0].trans_qual; + c = pmy_cfg[describe_loop]->probe_id; + + while (match_probe[loop].name != NULL) + { + if (match_probe[loop].value == c) + break; + loop++; + } + if (match_probe[loop].name != NULL) { + c_name = match_probe[loop].name; + strcpy(msg[describe_loop], match_probe[loop].name_ccs); + strcpy(msg_overflow[describe_loop], match_probe[loop].name_ccs); + } + else { + c_name = "ERROR"; + strcpy(msg[describe_loop], "ERROR"); + strcpy(msg_overflow[describe_loop], "ERROR"); + } + + loop_transaction = 0; + while (match_qualifier[loop_transaction].name != NULL) + { + if (match_qualifier[loop_transaction].value == b) + break; + loop_transaction++; + } + if (match_qualifier[loop_transaction].name != NULL) { + char temp[20]; + + b_name = match_qualifier[loop_transaction].name; + sprintf(temp, ":%s:", match_qualifier[loop_transaction].name_ccs); + strcat(msg[describe_loop], temp); + sprintf(temp, ":%s:", match_qualifier[loop_transaction].name); + strcat(msg_overflow[describe_loop], temp); + } + else { + b_name = "ERROR"; + strcat(msg[describe_loop], ":ERROR:"); + strcat(msg_overflow[describe_loop], ":ERROR:"); + } + + loop = 0; + while (match_master[loop].name != NULL) + { + if (match_master[loop].value == a) + break; + loop++; + } + if (match_master[loop].name != NULL) { + a_name = match_master[loop].name; + strcat(msg[describe_loop], match_master[loop].name_ccs); + strcat(msg_overflow[describe_loop], match_master[loop].name_ccs); + } + else { + a_name = "ERROR"; + strcat(msg[describe_loop], "ERROR"); + strcat(msg_overflow[describe_loop], "ERROR"); + } + + if ( (pmy_cfg[describe_loop]->filter[0].mstr_addr_match == SCI_MASTID_ALL) && (pmy_cfg[describe_loop]->probe_id == SCI_MA_MPU_P1)) { + printf("Counter: %d Master: ma_mpu Transaction: %s Probe: emif1\n", describe_loop, b_name); + sprintf(msg[describe_loop], "EMIF 0:%s:MA_MPU", match_qualifier[loop_transaction].name_ccs); + sprintf(msg_overflow[describe_loop], "EMIF 0:%s:MA_MPU", match_qualifier[loop_transaction].name); + continue; + } + if ( (pmy_cfg[describe_loop]->filter[0].mstr_addr_match == SCI_MASTID_ALL) && (pmy_cfg[describe_loop]->probe_id == SCI_MA_MPU_P2)) { + printf("Counter: %d Master: ma_mpu Transaction: %s Probe: emif2\n", describe_loop, b_name); + sprintf(msg[describe_loop], "EMIF 1:%s:MA_MPU", match_qualifier[loop_transaction].name_ccs); + sprintf(msg_overflow[describe_loop], "EMIF 1:%s:MA_MPU", match_qualifier[loop_transaction].name); + continue; } + + printf("Counter: %d Master: %s Transaction: %s Probe: %s\n", describe_loop, a_name, b_name, c_name); } - printf("delay in us: %u\n", delay_us); - printf("accumulation type: %u\n", accumulation_type); - printf("iterations (0=infinite): %u\n", iterations); - printf("Overflow counter index: %u\n", overflow_counter_index); - printf("Overflow threshold: %u\n", overflow_threshold); - - if ((accumulation_type == 1) && (overflow_threshold == 0)) - printf("WARNING: it is not recommended to set -a 1 with -t 0 if -d is small. HW is reset at every capture !\n"); - - if (iterations > MAX_ITERATIONS) { - iterations = MAX_ITERATIONS; - printf("WARNING: MAX_ITERATIONS(%d) exceeded\n", iterations); + printf("delay in us: %u\n", option_delay_us); + if (option_overflow_iterations > 0) + printf("overflow delay in us: %u (iterations=%u)\n", option_overflow_delay_us, option_overflow_iterations); + else + printf("overflow delay in us: DISABLED (-o -t used)\n"); + printf("accumulation type: %u\n", option_accumulation_type); + printf("iterations (0=infinite): %u\n", option_iterations); + if (option_overflow_iterations == 0) { + printf("Overflow counter index: %u %u\n", option_overflow_counter_index[0], option_overflow_counter_index[1]); + printf("Overflow threshold: %u %u\n", option_overflow_threshold[0], option_overflow_threshold[1]); + } + else { + printf("Overflow counter index: DISABLED (overflow delay used)\n"); + printf("Overflow threshold: DISABLED (overflow delay used)\n"); + } + + if (option_iterations > MAX_ITERATIONS) { + option_iterations = MAX_ITERATIONS; + printf("WARNING: MAX_ITERATIONS(%d) exceeded\n", option_iterations); } omapconf_emu_enable_domain(); @@ -513,7 +872,6 @@ { unsigned int i, j; - num_use_cases = sizeof(pmy_cfg)/sizeof(struct sci_config_sdram *); for (i = 0; i < num_use_cases; i++) { my_sci_err = sci_reg_usecase_sdram(psci_hdl, pmy_cfg[i], &my_usecase_key[i] ); @@ -523,7 +881,7 @@ } /* If you kill the process, statcoll is left running. this is an option to disable it. We should intercept and handle signal */ - if (disable == 1) { + if (option_disable == 1) { sci_global_disable(psci_hdl); sci_close(&psci_hdl); return 0; @@ -532,34 +890,43 @@ /* And this is an ugly hack to disable it so that it will reset counters at enable */ sci_global_disable(psci_hdl); - if (nosleep_32k) + if (option_nosleep_32k) nosleep_32k_enable(); if (valid_usecase_cnt == num_use_cases) { uint32_t *counters_current = counters; + unsigned int tests_overflow = 1; - if (accumulation_type == 1) { - for (tests = 0; tests < (iterations * 9); tests++) + if (option_accumulation_type == 1) { + for (tests = 0; tests < (option_iterations * 9); tests++) counters[tests] = 0; my_sci_err = sci_global_enable(psci_hdl); - for (tests = 0; tests < iterations; tests++) { - usleep(delay_us); - *counters_current = GET_32K; - sci_dump_sdram_cntrs(num_use_cases, counters_current + 1); - - if (*(counters_current + 1 + overflow_counter_index) >= overflow_threshold) { + for (tests = 0; tests < option_iterations; tests++) { + usleep(option_delay_us); + *(counters_current + TIMESTAMP_INDEX) = GET_32K; + sci_dump_sdram_cntrs(num_use_cases, counters_current + COUNTER_INDEX); + + if ( ( (option_overflow_iterations > 0) && (tests_overflow > option_overflow_iterations) ) + || ( (option_overflow_iterations == 0) + && ( (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[0]) >= option_overflow_threshold[0]) + || (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[1]) >= option_overflow_threshold[1]) + ) + ) + ) { sci_global_disable(psci_hdl); sci_global_enable(psci_hdl); - counters_current += 1 + num_use_cases; - *counters_current = GET_32K; - sci_dump_sdram_cntrs(num_use_cases, counters_current + 1); + counters_current += SAMPLE_SIZE; + *(counters_current + TIMESTAMP_INDEX) = GET_32K; + sci_dump_sdram_cntrs(num_use_cases, counters_current + COUNTER_INDEX); tests++; + tests_overflow = 1; //printf("overflow %u\n", *counters_current - counters[0]); } - counters_current += 1 + num_use_cases; + counters_current += SAMPLE_SIZE; + tests_overflow++; } } else { @@ -567,59 +934,75 @@ uint32_t *counters_overflow; unsigned int overflow_on; uint32_t delta_time; + unsigned int tests_overflow = 1; for (i = 0; i < sizeof(counters)/4; i++) counters[i] = 0; counters_prev = counters; - counters_current = counters + 1 + num_use_cases; - counters_overflow = counters + 2 + 2 * num_use_cases; + counters_current = counters + SAMPLE_SIZE; + counters_overflow = counters + 2 * SAMPLE_SIZE; sci_global_enable(psci_hdl); - *counters_prev = GET_32K; - sci_dump_sdram_cntrs(num_use_cases, counters_prev + 1); + *(counters_prev + TIMESTAMP_INDEX) = GET_32K; + sci_dump_sdram_cntrs(num_use_cases, counters_prev + COUNTER_INDEX); for (;;) { - usleep(delay_us); - *counters_current = GET_32K; - sci_dump_sdram_cntrs(num_use_cases, counters_current + 1); - - if (*(counters_current + 1 + overflow_counter_index ) >= overflow_threshold) { - //printf("DEBUG1 %u %u %u %u\n", *counters_prev, *(counters_prev + 1), *(counters_prev + 2), *(counters_prev + 3)); - //printf("DEBUG2 %u %u %u %u\n", *counters_current, *(counters_current + 1), *(counters_current + 2), *(counters_current + 3)); + tests_overflow++; + + usleep(option_delay_us); + *(counters_current + TIMESTAMP_INDEX) = GET_32K; + sci_dump_sdram_cntrs(num_use_cases, counters_current + COUNTER_INDEX); + + + if ( ( (option_overflow_iterations > 0) && (tests_overflow > option_overflow_iterations) ) + || ( (option_overflow_iterations == 0) + && ( (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[0]) >= option_overflow_threshold[0]) + || (*(counters_current + COUNTER_INDEX + option_overflow_counter_index[1]) >= option_overflow_threshold[1]) + ) + ) + ) { sci_global_disable(psci_hdl); sci_global_enable(psci_hdl); - *counters_overflow = GET_32K; - sci_dump_sdram_cntrs(num_use_cases, counters_overflow + 1); + *(counters_overflow + TIMESTAMP_INDEX) = GET_32K; + sci_dump_sdram_cntrs(num_use_cases, counters_overflow + COUNTER_INDEX); overflow_on = 1; + tests_overflow = 1; } /* trace current - prev */ - delta_time = *counters_current - *counters_prev; - printf("time: %u %u %u -> ", *counters_current, *counters_prev, delta_time); + delta_time = *(counters_current + TIMESTAMP_INDEX) - *(counters_prev + TIMESTAMP_INDEX); + printf("time: %u %u %u -> ", *(counters_current + TIMESTAMP_INDEX), *(counters_prev + TIMESTAMP_INDEX), delta_time); for (j = 0; j < num_use_cases; j++) { - printf("%.2f ", ((float)(*(counters_current + 1 + j) - *(counters_prev + 1 + j))/1000000)*32768.0/delta_time); + printf("%.2f ", ((float)(*(counters_current + COUNTER_INDEX + j) - *(counters_prev + COUNTER_INDEX + j))/1000000)*32768.0/delta_time); } printf("\n"); + for (j = 0; j < num_use_cases; j++) { + if (*(counters_current + COUNTER_INDEX + j) == 0xFFFFFFFF) { + fprintf(stderr, "ERROR: counter %d %s overflowed at time %u, don't trust results\n", j, msg[j], *(counters_current + TIMESTAMP_INDEX)); + printf("ERROR: counter %d %s overflowed at time %u, don't trust results\n", j, msg[j], *(counters_current + TIMESTAMP_INDEX)); + } + } + /* pointers increment */ if (overflow_on == 1) { overflow_on = 0; - printf("Warning: statcoll HW IP reset to avoid overflow (user defined through -o -t)\n"); counters_current = counters_overflow; } + // offset all pointers by 1 sample counters_prev = counters_current; - if ((unsigned int)(counters_current - counters) == (2 + 2 * num_use_cases)) + if ((unsigned int)(counters_current - counters) == (2 * SAMPLE_SIZE)) counters_current = counters; else - counters_current += 1 + num_use_cases; + counters_current += SAMPLE_SIZE; counters_overflow = counters_current; - if ((unsigned int)(counters_overflow - counters) == (2 + 2 * num_use_cases)) + if ((unsigned int)(counters_overflow - counters) == (2 * SAMPLE_SIZE)) counters_overflow = counters; else - counters_overflow += 1 + num_use_cases; + counters_overflow += SAMPLE_SIZE; } } } @@ -629,6 +1012,69 @@ } sci_killhandler(); - +END: exit(0); } + +void sci_errhandler(psci_handle phandle, const char * func, enum sci_err err) +{ + enum sci_err my_sci_err = SCI_SUCCESS; + + printf("SCILib failure %d in function: %s \n", err, func ); + + if (NULL != phandle) + my_sci_err = sci_close(&phandle); + + if ( my_sci_err ) + exit(-2); + else + exit (-3); +} + + +void nosleep_32k_enable(void) +{ + unsigned int reg; + unsigned int reg_clk; + + if (cpu_is_omap54xx()) + reg_clk = OMAP5430_CM_WKUPAON_CLKSTCTRL; + else if (cpu_is_omap44xx()) + reg_clk = OMAP4430_CM_WKUP_CLKSTCTRL; + mem_read(reg_clk, ®); + nosleep_32k_reg = reg & 0x3; + reg = reg & (~0x3); + mem_write(reg_clk, reg); +} + +void nosleep_32k_disable(void) +{ + unsigned int reg; + unsigned int reg_clk; + + if (cpu_is_omap54xx()) + reg_clk = OMAP5430_CM_WKUPAON_CLKSTCTRL; + else if (cpu_is_omap44xx()) + reg_clk = OMAP4430_CM_WKUP_CLKSTCTRL; + + mem_read(reg_clk, ®); + reg = reg | nosleep_32k_reg; + mem_write(reg_clk, reg); +} + +void omapconf_emu_enable_domain(void) +{ + if (cpu_is_omap44xx()) + mem_write(OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, 0x1); + else if (cpu_is_omap54xx()) + mem_write(OMAP5430_CM_L3INSTR_L3_MAIN_3_CLKCTRL, 0x1); +} + +void omapconf_emu_disable_domain(void) +{ + if (cpu_is_omap44xx()) + mem_write(OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, 0); + else if (cpu_is_omap54xx()) + mem_write(OMAP5430_CM_L3INSTR_L3_MAIN_3_CLKCTRL, 0x0); +} +