diff -Nru gcc-4.6-4.6.3/debian/README.gnat gcc-4.6-4.6.4/debian/README.gnat --- gcc-4.6-4.6.3/debian/README.gnat 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/README.gnat 2013-04-14 22:48:24.000000000 +0000 @@ -1,7 +1,7 @@ If you want to develop Ada programs and libraries on Debian, please read the Debian Policy for Ada: -http://www.ada-france.org/debian/debian-ada-policy.html +http://people.debian.org/~lbrenta/debian-ada-policy.html The default Ada compiler is and always will be the package `gnat'. Debian contains many programs and libraries compiled with it, which diff -Nru gcc-4.6-4.6.3/debian/changelog gcc-4.6-4.6.4/debian/changelog --- gcc-4.6-4.6.3/debian/changelog 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/changelog 2013-04-14 22:48:24.000000000 +0000 @@ -1,11 +1,332 @@ -gcc-4.6 (4.6.3-4ubuntu1) quantal; urgency=low +gcc-4.6 (4.6.4-1ubuntu1~12.04) precise; urgency=low + + * Build for precise. + + -- Matthias Klose Mon, 15 Apr 2013 00:34:24 +0200 + +gcc-4.6 (4.6.4-1ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 12 Apr 2013 14:18:06 +0200 + +gcc-4.6 (4.6.4-1) experimental; urgency=low + + * GCC 4.6.4 release. + * Update the Linaro support to the 4.6-2013.04 release. + + -- Matthias Klose Fri, 12 Apr 2013 13:57:03 +0200 + +gcc-4.6 (4.6.3-16ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Fri, 05 Apr 2013 16:18:23 +0200 + +gcc-4.6 (4.6.3-16) experimental; urgency=low + + * Update to SVN 20130405 (r197516) from the gcc-4_6-branch (4.6.4 release + candidate 1). + - Fix PR target/56114 (x86), PR tree-optimization/55755, + PR rtl-optimization/56023, PR tree-optimization/55264, + PR fortran/55072, PR bootstrap/55571, PR rtl-optimization/56275, + PR c++/56247, PR fortran/55852, PR fortran/50627, + PR fortran/56054, PR other/54620, PR target/39064, + PR middle-end/45472, PR middle-end/56461, PR middle-end/55889, + PR target/56560 (x86), PR bootstrap/56258, + PR bootstrap/56258, PR c++/56403, PR fortran/56615, + PR fortran/56575, PR fortran/55362, PR fortran/56385, PR fortran/56318, + PR middle-end/52547, PR tree-optimization/56539, PR middle-end/56015, + PR tree-optimization/56098, PR tree-optimization/55921, PR c/54363, + PR middle-end/54486, PR debug/53174, PR middle-end/52547, + PR tree-optimization/52445, PR c++/56239, PR target/56771 (ARM), + PR rtl-optimization/48308, PR rtl-optimization/54472, + PR tree-optimization/48189, PR fortran/56737, PR fortran/56737, + PR fortran/56735, PR other/43620. + * Backport PR rtl-optimization/52573 from trunk, apply for m68k only. + Closes: #698380. + * Allow building with cloog-0.16 / ppl-1.0. + * Update the Linaro support to the 4.6-2013.02 release. + + -- Matthias Klose Fri, 05 Apr 2013 16:12:56 +0200 + +gcc-4.6 (4.6.3-15ubuntu4) raring; urgency=low + + * Update to SVN 20130403 (r197459) from the gcc-4_6-branch. + - Fix PR middle-end/45472, PR middle-end/56461, PR middle-end/55889, + PR middle-end/56077, PR target/56560 (x86), PR bootstrap/56258, + PR bootstrap/56258, PR c++/56403, PR fortran/56615, + PR fortran/56575, PR fortran/55362, PR fortran/56385, PR fortran/56318, + PR middle-end/52547, PR tree-optimization/56539, PR middle-end/56015, + PR tree-optimization/56098, PR tree-optimization/55921, PR c/54363, + PR middle-end/54486, PR debug/53174, PR middle-end/52547, + PR tree-optimization/52445, PR c++/56239, PR target/56771 (ARM). + + -- Matthias Klose Thu, 04 Apr 2013 00:10:51 +0200 + +gcc-4.6 (4.6.3-15ubuntu3) raring; urgency=low + + * Update to SVN 20130214 (r195576) from the gcc-4_6-branch. + - Fix PR bootstrap/55571, PR rtl-optimization/56275, + PR c++/56247, PR fortran/55852, PR fortran/50627, + PR fortran/56054, PR other/54620, PR target/39064. + * Update the Linaro support to the 4.6-2013.02 release. + + -- Matthias Klose Thu, 14 Feb 2013 20:53:11 +0100 + +gcc-4.6 (4.6.3-15ubuntu2) raring; urgency=low + + * Update to SVN 20130130 (r195576) from the gcc-4_6-branch. + - Fix PR target/56114 (x86), PR tree-optimization/55755, + PR rtl-optimization/56023, PR tree-optimization/55264, + PR fortran/55072. + * Allow building with cloog-0.16 / ppl-1.0. + + -- Matthias Klose Wed, 30 Jan 2013 16:15:58 +0100 + +gcc-4.6 (4.6.3-15ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Tue, 15 Jan 2013 00:10:43 +0100 + +gcc-4.6 (4.6.3-15) unstable; urgency=low + + * Update to SVN 20130114 (r195168) from the gcc-4_6-branch. + - Fix PR bootstrap/55571, PR target/53789, PR c++/55804, + PR tree-optimization/55355, PR target/54121 (sparc), PR c++/55032, + PR middle-end/50283, PR target/55195, PR libgcc/48076, PR c++/55877, + PR c++/55032, PR c++/55245, PR c++/54883, PR c++/55249, PR c++/53862, + PR c++/51662, PR target/53912 (mingw), PR ada/54614, PR fortran/42769, + PR fortran/45836, PR fortran/45900, PR fortran/55827, PR fortran/55618. + - Backport multiarch patches, including powerpcspu fix. Closes: #695654. + + [ Matthias Klose ] + * For cross builds, fix libc6 dependencies for non-default multilib packages. + * Don't ship libiberty.a in gcc-4.6-hppa64. Closes: #659556. + + [ Thorsten Glaser ] + * libffi: Update the libffi-m68k patch from upstream and apply + further fixes from upstream as well as upstreamed from #660525. + * Ada: debian/patches/ada-libgnatprj.diff: Add missing wildcard + to the m68k-*-linux* target (fixes building shared libraries). + * Ada: Enable on m68k Linux. + * Backport: trunk r187181, r187234, r187714 to speed up genattrtab, + apply for m68k only. + * Backport: atomic builtin backend code for Linux/m68k from trunk. + * PR52714: Add proposed fix (use gcc-4.5 version of PR45695 fix), + apply for m68k only. + * m68k: PR40134: Add t-slibgcc-libgcc for m68k-linux. + * Cross: When building a cross-compiler, re-enable building the + runtime packages that were disabled because gcc-4.7 provides + them for the main archive to keep them self-contained. + * mint-m68k: Add the FreeMiNT patches from Vincent Rivière to + enable building DEB_STAGE=stage1 cross-compilers, which are + needed for developing bootloaders on m68k. + * Closes: #694112. + + -- Matthias Klose Mon, 14 Jan 2013 19:37:53 +0100 + +gcc-4.6 (4.6.3-14) unstable; urgency=low + + * Update to SVN 20121121 (r193837) from the gcc-4_6-branch. + - Fix PR fortran/55314. + * Make explicit --{en,dis}able-multiarch options effecitive (Thorsten Glaser). + * Fix multiarch name for powerpc non-biarch builds. + * Fix 64bit C++ header installation on s390. Closes: #694482. + + -- Matthias Klose Tue, 27 Nov 2012 06:02:15 +0100 + +gcc-4.6 (4.6.3-13ubuntu1) raring; urgency=low + + * Merge with Debian; remaining changes: + - Build from the upstream source. + + -- Matthias Klose Thu, 22 Nov 2012 04:25:03 +0100 + +gcc-4.6 (4.6.3-13) unstable; urgency=low + + * Update to SVN 20121121 (r193700) from the gcc-4_6-branch. + - Fix PR middle-end/55219 (ice on valid), PR rtl-optimization/48374 (ice + on valid), PR rtl-optimization/53701 (ice on valid), PR middle-end/54945, + PR target/54950 (m32c), PR libfortran/54736 (wrong code). + * Split multiarch patches into local and upstreamed parts. + * Update symbols files for powerpcspe (Roland Stigge). Closes: #693326. + * Clean up libstdc++ man pages. Closes: #692446. + + -- Matthias Klose Thu, 22 Nov 2012 02:28:41 +0100 + +gcc-4.6 (4.6.3-12) unstable; urgency=low + + * Update to SVN 20121011 (r192379) from the gcc-4_6-branch. + - PARISC fix, test case fix. + + [ Matthias Klose ] + * Merge from gnat-4.6 4.6.3-6: + * debian/patches/ada-symbolic-tracebacks.diff (src/gcc/ada/tracebak.c): + Use the GCC stack unwinder on GNU/kFreeBSD too. Closes: #685559. + * debian/patches/gcc_ada_gcc-interface_Makefile.in.diff: link + libgnarl.so.4.6 with librt on GNU/Hurd. Closes: #685561. + * debian/patches/ada-kfreebsd-gnu.diff: likewise on GNU/kFreeBSD. + Closes: #685562. + * debian/patches/ada-symbolic-tracebacks.diff (src/gcc/ada/tracebak.c): + new hunk. Use the GCC stack unwinder on GNU/Hurd. Closes: #681998. + * debian/patches/ada-link-lib.diff: do not use parallel makes to build + the GNAT tools. Closes: #667184. + + [ Thorsten Glaser ] + * Actually apply the libffi-m68k patch; update it from upstream + * Apply further m68k platform bugfixes (pr47955, m68k-fp-cmp-zero) + * Revert pr45144 fix on m68k only, it results in miscompilation + * Apply initial m68k-ada support patch; enable Ada for m68k + * debian/patches/ada-libgnatprj.diff: add support for m68k-*-linux. + + [ Steven Chamberlain ] + * Fix kfreebsd build issues. + + -- Matthias Klose Fri, 12 Oct 2012 00:19:41 +0200 + +gcc-4.6 (4.6.3-11) unstable; urgency=low + + * Update to SVN 20121006 (r192156) from the gcc-4_6-branch. + - Fix PR other/43620, PR middle-end/54638, PR libstdc++/54228, + PR tree-optimization/33763 (closes: #672411), PR target/54785, + PR target/54741. + * On ARM, don't warn anymore that 4.4 has changed the `va_list' mangling, + taken from the trunk. + * Don't run the libstdc++ tests on mipsel, times out on the buildds. + + -- Matthias Klose Sat, 06 Oct 2012 14:05:54 +0200 + +gcc-4.6 (4.6.3-10ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Tue, 18 Sep 2012 22:44:00 +0200 + +gcc-4.6 (4.6.3-10) unstable; urgency=low + + * Update to SVN 20120918 (r191439) from the gcc-4_6-branch. + - Fix PR c/54552 (ice on valid), PR c/54103 (ice on valid), + PR target/54536 (AVR), PR middle-end/54515 (ice on valid), + PR target/45070 (ARM, wrong code), PR target/54220 (AVR), + PR driver/54335, PR rtl-optimization/54369 (mips, wrong code), + PR c++/54511 (ice on valid), PR fortran/54225 (ice on invalid), + PR fortran/53306 (ice on invalid), PR fortran/54556 (wrong code), + PR fortran/54208 (rejects valid). + + [ Nobuhiro Iwamatsu ] + * Remove sh4-enable-ieee.diff, -mieee enabled by default. Closes: #685974. + + [ Matthias Klose ] + * Fix PR tree-optimization/51987, backport from the trunk, Linaro only + (Matthew Gretton-Dann). LP: #1029454. + + -- Matthias Klose Tue, 18 Sep 2012 22:40:18 +0200 + +gcc-4.6 (4.6.3-9ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Mon, 20 Aug 2012 18:30:30 +0200 + +gcc-4.6 (4.6.3-9) unstable; urgency=medium + + * Update to SVN 20120820 (r190530) from the gcc-4_6-branch. + - ARM: Set vector type alignment to 8 bytes. + - Fix PR target/33135 (SH), PR rtl-optimization/53908 (wrong code), + PR middle-end/53433, PR middle-end/38474, PR middle-end/53790, + PR c++/52988 (wrong code), PR fortran/51758. + + [ Aurelien Jarno ] + * Add patches/ada-ppc64.diff to fix GNAT build on ppc64. + * powerpc64: fix non-multilib builds. + + [ Matthias Klose ] + * Update the Linaro support to the 4.6-2012.08 release. + * spu build: Move static libraries to version specific directories. + Closes: #680022. + + [ Thibaut Girka ] + * Fix cross compilers for 64bit architectures when using + DEB_CROSS_NO_BIARCH. + + -- Matthias Klose Mon, 20 Aug 2012 13:13:45 +0200 + +gcc-4.6 (4.6.3-8ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Mon, 25 Jun 2012 14:45:37 +0200 + +gcc-4.6 (4.6.3-8) unstable; urgency=low + + * Update to SVN 20120624 (r188916) from the gcc-4_6-branch. + - Fix PR gcov-profile/53744, PR target/48126, PR target/53621, + PR target/53559, PR target/46261, PR target/52999, PR middle-end/53541, + PR target/53385, PR middle-end/51071, PR target/52407, PR c/52862, + PR fortran/53597, PR fortran/50619, PR fortran/53521, PR fortran/53389, + PR libstdc++/53678. + * Update the Linaro support to the 4.6-2012.06 release. + + -- Matthias Klose Sun, 24 Jun 2012 14:41:39 +0200 + +gcc-4.6 (4.6.3-7) unstable; urgency=low + + * Update to SVN 20120528 (r187930) from the gcc-4_6-branch. + - Fix PR target/53385, PR middle-end/51071, PR target/52407, + PR c/52862, PR fortran/53389. + + -- Matthias Klose Mon, 28 May 2012 16:12:02 +0200 + +gcc-4.6 (4.6.3-6ubuntu1) quantal; urgency=low + + * Merge with Debian. + + -- Matthias Klose Tue, 22 May 2012 07:39:40 +0200 + +gcc-4.6 (4.6.3-6) unstable; urgency=low + + * Update to SVN 20120522 (r187757) from the gcc-4_6-branch. + - Fix PR fortran/52864, PR c/53418, PR target/53416, PR target/46098, + PR target/52999, PR target/53228, PR target/53199, PR fortran/53310. + * Update the arm-dynamic-linker patch as found on the trunk, and + the arm-multilib-defaults patch as proposed for upstream. + * Update the Linaro support to the 4.6-2012.05 release. + + -- Matthias Klose Tue, 22 May 2012 13:24:37 +0800 + +gcc-4.6 (4.6.3-5ubuntu2) quantal; urgency=low + + * Update to SVN 20120502 (r187066) from the gcc-4_6-branch. + - Fix PR fortran/52864. + * Update the arm-dynamic-linker patch as found on the trunk, and + the arm-multilib-defaults patch as proposed for upstream. + + -- Matthias Klose Thu, 03 May 2012 11:31:18 +0200 + +gcc-4.6 (4.6.3-5ubuntu1) quantal; urgency=low - * Update to SVN 20120425 (r186817) from the gcc-4_6-branch. - - Fix PR middle-end/53084, PR lto/48246. * Default to armv5t, soft float on armel. + * Build again multilib gnat on armel and armhf. -- Matthias Klose Wed, 25 Apr 2012 16:26:46 +0200 +gcc-4.6 (4.6.3-5) unstable; urgency=medium + + * Update to SVN 20120430 (r186999) from the gcc-4_6-branch. + - Fix PR middle-end/53084, PR lto/48246, PR target/53138. + * Don't build multilib gnat on armel and armhf. + * Don't try to run the libstdc++ testsuite if the C++ frontend isn't built. + * Don't configure with --enable-gnu-unique-object on kfreebsd and hurd. + * Treat wheezy the same as sid in more places (Peter Green). Closes: #670821. + * Fix setting MULTILIB_DEFAULTS for ARM multilib builds. + + -- Matthias Klose Mon, 30 Apr 2012 22:38:54 +0200 + gcc-4.6 (4.6.3-4) unstable; urgency=low [ Matthias Klose ] diff -Nru gcc-4.6-4.6.3/debian/control gcc-4.6-4.6.4/debian/control --- gcc-4.6-4.6.3/debian/control 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/control 2013-04-14 22:48:24.000000000 +0000 @@ -3,10 +3,19 @@ Priority: optional Maintainer: Ubuntu Core developers XSBC-Original-Maintainer: Debian GCC Maintainers -Uploaders: Matthias Klose , Arthur Loiret -Standards-Version: 3.9.3 -Build-Depends: dpkg-dev (>= 1.16.0~ubuntu4), debhelper (>= 5.0.62), g++-multilib [amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc], libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6), libc6-dev-amd64 [i386], libc6-dev-sparc64 [sparc], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x], lib64gcc1 [i386 powerpc sparc s390], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], libc6-dev-armhf [armel], libc6-dev-armel [armhf], m4, libtool, autoconf2.64, automake (>= 1:1.11), automake (<< 1:1.12), libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], zlib1g-dev, gawk, lzma, xz-utils, patchutils, binutils (>= 2.21.1) | binutils-multiarch (>= 2.21.1), binutils-hppa64 (>= 2.21.1) [hppa], gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), locales, procps, sharutils, binutils-spu (>= 2.21.1) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], libcloog-ppl-dev (>= 0.15.9-2~), libmpc-dev, libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), libelfg0-dev (>= 0.8.12), dejagnu [!m68k !hurd-i386 !hurd-alpha], autogen, realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt -Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base, +Uploaders: Matthias Klose +Standards-Version: 3.9.4 +Build-Depends: dpkg-dev (>= 1.16.0~ubuntu4), debhelper (>= 5.0.62), g++-multilib [amd64 armel armhf i386 kfreebsd-amd64 mips mipsel powerpc ppc64 s390 s390x sparc], + libc6.1-dev (>= 2.13-0ubuntu6) [alpha ia64] | libc0.3-dev (>= 2.13-0ubuntu6) [hurd-i386] | libc0.1-dev (>= 2.13-0ubuntu6) [kfreebsd-i386 kfreebsd-amd64] | libc6-dev (>= 2.13-0ubuntu6), libc6-dev-amd64 [i386], libc6-dev-sparc64 [sparc], libc6-dev-s390 [s390x], libc6-dev-s390x [s390], libc6-dev-i386 [amd64], libc6-dev-powerpc [ppc64], libc6-dev-ppc64 [powerpc], libc0.1-dev-i386 [kfreebsd-amd64], lib32gcc1 [amd64 ppc64 kfreebsd-amd64 s390x], lib64gcc1 [i386 powerpc sparc s390], libc6-dev-mips64 [mips mipsel], libc6-dev-mipsn32 [mips mipsel], libc6-dev-armhf [armel], libc6-dev-armel [armhf], + m4, libtool, autoconf2.64, automake (>= 1:1.11), automake (<< 1:1.12), + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + zlib1g-dev, gawk, lzma, xz-utils, patchutils, + binutils (>= 2.21.1) | binutils-multiarch (>= 2.21.1), binutils-hppa64 (>= 2.21.1) [hppa], + gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), locales, sharutils, + procps, binutils-spu (>= 2.21.1) [powerpc ppc64], newlib-spu (>= 1.16.0) [powerpc ppc64], + libcloog-ppl-dev (>= 0.15.9-2~), libmpc-dev, libmpfr-dev (>= 3.0.0-9~), libgmp-dev (>= 2:5.0.1~), libelfg0-dev (>= 0.8.12), dejagnu [!m68k !hurd-i386 !hurd-alpha], autogen, + realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt +Build-Depends-Indep: doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base, xsltproc, libxml2-utils, docbook-xsl-ns, Build-Conflicts: binutils-gold Homepage: http://gcc.gnu.org/ XS-Vcs-Browser: http://svn.debian.org/viewsvn/gcccvs/branches/sid/gcc-4.6/ diff -Nru gcc-4.6-4.6.3/debian/control.m4 gcc-4.6-4.6.4/debian/control.m4 --- gcc-4.6-4.6.3/debian/control.m4 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/control.m4 2013-04-14 22:48:24.000000000 +0000 @@ -38,15 +38,32 @@ ifelse(regexp(SRCNAME, `gnat'),0,`dnl Uploaders: Ludovic Brenta ', regexp(SRCNAME, `gdc'),0,`dnl -Uploaders: Iain Buclaw , Arthur Loiret +Uploaders: Iain Buclaw ', `dnl -Uploaders: Matthias Klose , Arthur Loiret +Uploaders: Matthias Klose ')dnl SRCNAME -Standards-Version: 3.9.3 +Standards-Version: 3.9.4 ifdef(`TARGET',`dnl cross -Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP AUTOGEN_BUILD_DEP AUTO_BUILD_DEP SOURCE_BUILD_DEP CROSS_BUILD_DEP CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP ELF_BUILD_DEP, zlib1g-dev, gawk, lzma, xz-utils, patchutils, BINUTILS_BUILD_DEP, bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, make (>= 3.81), quilt +Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP + LIBUNWIND_BUILD_DEP LIBATOMIC_OPS_BUILD_DEP + AUTOGEN_BUILD_DEP AUTO_BUILD_DEP + SOURCE_BUILD_DEP CROSS_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP + ELF_BUILD_DEP, zlib1g-dev, gawk, lzma, xz-utils, patchutils, + BINUTILS_BUILD_DEP, + bison (>= 1:2.3), flex, realpath (>= 1.9.12), lsb-release, make (>= 3.81), quilt ',`dnl native -Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), GCC_MULTILIB_BUILD_DEP LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP AUTO_BUILD_DEP AUTOGEN_BUILD_DEP libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], zlib1g-dev, gawk, lzma, xz-utils, patchutils, BINUTILS_BUILD_DEP, binutils-hppa64 (>= BINUTILSV) [hppa], gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), FORTRAN_BUILD_DEP locales, procps, sharutils, JAVA_BUILD_DEP GNAT_BUILD_DEP GDC_BUILD_DEP SPU_BUILD_DEP CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP ELF_BUILD_DEP CHECK_BUILD_DEP realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt +Build-Depends: DPKG_BUILD_DEP debhelper (>= 5.0.62), GCC_MULTILIB_BUILD_DEP + LIBC_BUILD_DEP, LIBC_BIARCH_BUILD_DEP + AUTO_BUILD_DEP AUTOGEN_BUILD_DEP + libunwind7-dev (>= 0.98.5-6) [ia64], libatomic-ops-dev [ia64], + zlib1g-dev, gawk, lzma, xz-utils, patchutils, + BINUTILS_BUILD_DEP, binutils-hppa64 (>= BINUTILSV) [hppa], + gperf (>= 3.0.1), bison (>= 1:2.3), flex, gettext, texinfo (>= 4.3), locales, sharutils, + procps, FORTRAN_BUILD_DEP JAVA_BUILD_DEP GNAT_BUILD_DEP GDC_BUILD_DEP SPU_BUILD_DEP + CLOOG_BUILD_DEP MPC_BUILD_DEP MPFR_BUILD_DEP GMP_BUILD_DEP ELF_BUILD_DEP CHECK_BUILD_DEP + realpath (>= 1.9.12), chrpath, lsb-release, make (>= 3.81), quilt Build-Depends-Indep: LIBSTDCXX_BUILD_INDEP JAVA_BUILD_INDEP ')dnl Build-Conflicts: binutils-gold @@ -68,7 +85,7 @@ Depends: binutils`'TS (>= ${binutils:Version}), ${dep:libcbiarchdev}, ${dep:libcdev}, ${dep:libunwinddev}, ${snap:depends}, ${shlibs:Depends}, ${dep:ecj}, python, ${misc:Depends} Recommends: ${snap:recommends} Suggests: ${dep:gold} -Provides: c++-compiler`'TS`'ifdef(`TARGET)',`',`, c++abi2-dev') +Provides: c++-compiler`'TS`'ifdef(`TARGET',`',`, c++abi2-dev') Description: A SNAPSHOT of the GNU Compiler Collection This package contains a recent development SNAPSHOT of all files contained in the GNU Compiler Collection (GCC). diff -Nru gcc-4.6-4.6.3/debian/libgcc1.symbols.powerpcspe gcc-4.6-4.6.4/debian/libgcc1.symbols.powerpcspe --- gcc-4.6-4.6.3/debian/libgcc1.symbols.powerpcspe 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libgcc1.symbols.powerpcspe 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,139 @@ +libgcc_s.so.1 libgcc1 #MINVER# + GCC_3.0@GCC_3.0 1:4.1.1 + GCC_3.3.1@GCC_3.3.1 1:4.1.1 + GCC_3.3.4@GCC_3.3.4 1:4.1.1 + GCC_3.3@GCC_3.3 1:4.1.1 + GCC_3.4.2@GCC_3.4.2 1:4.1.1 + GCC_3.4@GCC_3.4 1:4.1.1 + GCC_4.0.0@GCC_4.0.0 1:4.1.1 + GCC_4.1.0@GCC_4.1.0 1:4.1.1 + GCC_4.2.0@GCC_4.2.0 1:4.1.1 + GCC_4.3.0@GCC_4.3.0 1:4.3 + GLIBC_2.0@GLIBC_2.0 1:4.1.1 + _Unwind_Backtrace@GCC_3.3 1:4.1.1 + _Unwind_DeleteException@GCC_3.0 1:4.1.1 + _Unwind_FindEnclosingFunction@GCC_3.3 1:4.1.1 + _Unwind_Find_FDE@GCC_3.0 1:4.1.1 + _Unwind_ForcedUnwind@GCC_3.0 1:4.1.1 + _Unwind_GetCFA@GCC_3.3 1:4.1.1 + _Unwind_GetDataRelBase@GCC_3.0 1:4.1.1 + _Unwind_GetGR@GCC_3.0 1:4.1.1 + _Unwind_GetIP@GCC_3.0 1:4.1.1 + _Unwind_GetIPInfo@GCC_4.2.0 1:4.1.1 + _Unwind_GetLanguageSpecificData@GCC_3.0 1:4.1.1 + _Unwind_GetRegionStart@GCC_3.0 1:4.1.1 + _Unwind_GetTextRelBase@GCC_3.0 1:4.1.1 + _Unwind_RaiseException@GCC_3.0 1:4.1.1 + _Unwind_Resume@GCC_3.0 1:4.1.1 + _Unwind_Resume_or_Rethrow@GCC_3.3 1:4.1.1 + _Unwind_SetGR@GCC_3.0 1:4.1.1 + _Unwind_SetIP@GCC_3.0 1:4.1.1 + __absvdi2@GCC_3.0 1:4.1.1 + __absvsi2@GCC_3.0 1:4.1.1 + __adddf3@GCC_3.0 1:4.1.1 + __addsf3@GCC_3.0 1:4.1.1 + __addvdi3@GCC_3.0 1:4.1.1 + __addvsi3@GCC_3.0 1:4.1.1 + __ashldi3@GCC_3.0 1:4.1.1 + __ashrdi3@GCC_3.0 1:4.1.1 + __bswapdi2@GCC_4.3.0 1:4.3 + __bswapsi2@GCC_4.3.0 1:4.3 + __clear_cache@GCC_3.0 1:4.1.1 + __clzdi2@GCC_3.4 1:4.1.1 + __clzsi2@GCC_3.4 1:4.1.1 + __cmpdi2@GCC_3.0 1:4.1.1 + __ctzdi2@GCC_3.4 1:4.1.1 + __ctzsi2@GCC_3.4 1:4.1.1 + __deregister_frame@GLIBC_2.0 1:4.1.1 + __deregister_frame_info@GLIBC_2.0 1:4.1.1 + __deregister_frame_info_bases@GCC_3.0 1:4.1.1 + __divdc3@GCC_4.0.0 1:4.1.1 + __divdf3@GCC_3.0 1:4.1.1 + __divdi3@GLIBC_2.0 1:4.1.1 + __divsc3@GCC_4.0.0 1:4.1.1 + __divsf3@GCC_3.0 1:4.1.1 + __divtc3@GCC_4.1.0 1:4.1.1 + __emutls_get_address@GCC_4.3.0 1:4.3 + __emutls_register_common@GCC_4.3.0 1:4.3 + __enable_execute_stack@GCC_3.4.2 1:4.1.1 + __eqdf2@GCC_3.0 1:4.1.1 + __eqsf2@GCC_3.0 1:4.1.1 + __extendsfdf2@GCC_3.0 1:4.1.1 + __ffsdi2@GCC_3.0 1:4.1.1 + __ffssi2@GCC_4.3.0 1:4.3 + __fixdfdi@GCC_3.0 1:4.1.1 + __fixdfsi@GCC_3.0 1:4.1.1 + __fixsfdi@GCC_3.0 1:4.1.1 + __fixsfsi@GCC_3.0 1:4.1.1 + __fixtfdi@GCC_4.1.0 1:4.1.1 + __fixunsdfdi@GCC_3.0 1:4.1.1 + __fixunsdfsi@GCC_3.0 1:4.1.1 + __fixunssfdi@GCC_3.0 1:4.1.1 + __fixunssfsi@GCC_3.0 1:4.1.1 + __fixunstfdi@GCC_4.1.0 1:4.1.1 + __floatdidf@GCC_3.0 1:4.1.1 + __floatdisf@GCC_3.0 1:4.1.1 + __floatditf@GCC_4.1.0 1:4.1.1 + __floatsidf@GCC_3.0 1:4.1.1 + __floatsisf@GCC_3.0 1:4.1.1 + __floatundidf@GCC_4.2.0 1:4.2.1 + __floatundisf@GCC_4.2.0 1:4.2.1 + __floatunditf@GCC_4.2.0 1:4.2.1 + __floatunsidf@GCC_4.2.0 1:4.2.1 + __floatunsisf@GCC_4.2.0 1:4.2.1 + __frame_state_for@GLIBC_2.0 1:4.1.1 + __gcc_personality_v0@GCC_3.3.1 1:4.1.1 + __gcc_qadd@GCC_4.1.0 1:4.1.1 + __gcc_qdiv@GCC_4.1.0 1:4.1.1 + __gcc_qmul@GCC_4.1.0 1:4.1.1 + __gcc_qsub@GCC_4.1.0 1:4.1.1 + __gedf2@GCC_3.0 1:4.1.1 + __gesf2@GCC_3.0 1:4.1.1 + __gtdf2@GCC_3.0 1:4.1.1 + __gtsf2@GCC_3.0 1:4.1.1 + __ledf2@GCC_3.0 1:4.1.1 + __lesf2@GCC_3.0 1:4.1.1 + __lshrdi3@GCC_3.0 1:4.1.1 + __ltdf2@GCC_3.0 1:4.1.1 + __ltsf2@GCC_3.0 1:4.1.1 + __moddi3@GLIBC_2.0 1:4.1.1 + __muldc3@GCC_4.0.0 1:4.1.1 + __muldf3@GCC_3.0 1:4.1.1 + __muldi3@GCC_3.0 1:4.1.1 + __mulsc3@GCC_4.0.0 1:4.1.1 + __mulsf3@GCC_3.0 1:4.1.1 + __multc3@GCC_4.1.0 1:4.1.1 + __mulvdi3@GCC_3.0 1:4.1.1 + __mulvsi3@GCC_3.0 1:4.1.1 + __nedf2@GCC_3.0 1:4.1.1 + __negdf2@GCC_3.0 1:4.1.1 + __negdi2@GCC_3.0 1:4.1.1 + __negsf2@GCC_3.0 1:4.1.1 + __negvdi2@GCC_3.0 1:4.1.1 + __negvsi2@GCC_3.0 1:4.1.1 + __nesf2@GCC_3.0 1:4.1.1 + __paritydi2@GCC_3.4 1:4.1.1 + __paritysi2@GCC_3.4 1:4.1.1 + __popcountdi2@GCC_3.4 1:4.1.1 + __popcountsi2@GCC_3.4 1:4.1.1 + __powidf2@GCC_4.0.0 1:4.1.1 + __powisf2@GCC_4.0.0 1:4.1.1 + __powitf2@GCC_4.1.0 1:4.1.1 + __register_frame@GLIBC_2.0 1:4.1.1 + __register_frame_info@GLIBC_2.0 1:4.1.1 + __register_frame_info_bases@GCC_3.0 1:4.1.1 + __register_frame_info_table@GLIBC_2.0 1:4.1.1 + __register_frame_info_table_bases@GCC_3.0 1:4.1.1 + __register_frame_table@GLIBC_2.0 1:4.1.1 + __subdf3@GCC_3.0 1:4.1.1 + __subsf3@GCC_3.0 1:4.1.1 + __subvdi3@GCC_3.0 1:4.1.1 + __subvsi3@GCC_3.0 1:4.1.1 + __trampoline_setup@GCC_3.4.2 1:4.1.1 + __truncdfsf2@GCC_3.0 1:4.1.1 + __ucmpdi2@GCC_3.0 1:4.1.1 + __udivdi3@GLIBC_2.0 1:4.1.1 + __udivmoddi4@GCC_3.0 1:4.1.1 + __umoddi3@GLIBC_2.0 1:4.1.1 + __unorddf2@GCC_3.3.4 1:4.1.1 + __unordsf2@GCC_3.3.4 1:4.1.1 diff -Nru gcc-4.6-4.6.3/debian/libgfortran3.symbols.16.powerpcspe gcc-4.6-4.6.4/debian/libgfortran3.symbols.16.powerpcspe --- gcc-4.6-4.6.3/debian/libgfortran3.symbols.16.powerpcspe 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libgfortran3.symbols.16.powerpcspe 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,100 @@ + __iso_c_binding_c_f_pointer_c16@GFORTRAN_1.0 4.3 + __iso_c_binding_c_f_pointer_r16@GFORTRAN_1.0 4.3 + _gfortran_arandom_r16@GFORTRAN_1.0 4.3 + _gfortran_bessel_jn_r16@GFORTRAN_1.4 4.6 + _gfortran_bessel_yn_r16@GFORTRAN_1.4 4.6 + _gfortran_cpu_time_16@GFORTRAN_1.0 4.3 + _gfortran_erfc_scaled_r16@GFORTRAN_1.1 4.4.0 + _gfortran_exponent_r16@GFORTRAN_1.0 4.3 + _gfortran_fraction_r16@GFORTRAN_1.0 4.3 + _gfortran_matmul_c16@GFORTRAN_1.0 4.3 + _gfortran_matmul_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_maxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_maxval_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_minloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_minval_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mmaxval_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_mminloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_mminval_r16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_c16@GFORTRAN_1.0 4.3 + _gfortran_mproduct_r16@GFORTRAN_1.0 4.3 + _gfortran_msum_c16@GFORTRAN_1.0 4.3 + _gfortran_msum_r16@GFORTRAN_1.0 4.3 + _gfortran_nearest_r16@GFORTRAN_1.0 4.3 + _gfortran_norm2_r16@GFORTRAN_1.4 4.6 + _gfortran_pow_c16_i4@GFORTRAN_1.0 4.3 + _gfortran_pow_c16_i8@GFORTRAN_1.0 4.3 + _gfortran_pow_r16_i4@GFORTRAN_1.0 4.6 + _gfortran_pow_r16_i8@GFORTRAN_1.0 4.3 + _gfortran_product_c16@GFORTRAN_1.0 4.3 + _gfortran_product_r16@GFORTRAN_1.0 4.3 + _gfortran_random_r16@GFORTRAN_1.0 4.3 + _gfortran_reshape_c16@GFORTRAN_1.0 4.3 + _gfortran_reshape_r16@GFORTRAN_1.0 4.3 + _gfortran_rrspacing_r16@GFORTRAN_1.0 4.3 + _gfortran_set_exponent_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_smaxval_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc0_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_4_r16@GFORTRAN_1.0 4.3 + _gfortran_sminloc1_8_r16@GFORTRAN_1.0 4.3 + _gfortran_sminval_r16@GFORTRAN_1.0 4.3 + _gfortran_spacing_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__abs_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__acosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__aimag_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__aint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__anint_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__asinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan2_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__atanh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__conjg_16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__cos_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__cosh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__dim_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__exp_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log10_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__log_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__mod_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_4_16@GFORTRAN_1.0 4.3 + _gfortran_specific__nint_8_16@GFORTRAN_1.0 4.3 + _gfortran_specific__sign_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sin_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sinh_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_c16@GFORTRAN_1.0 4.3 + _gfortran_specific__sqrt_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tan_r16@GFORTRAN_1.0 4.3 + _gfortran_specific__tanh_r16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_c16@GFORTRAN_1.0 4.3 + _gfortran_sproduct_r16@GFORTRAN_1.0 4.3 + _gfortran_ssum_c16@GFORTRAN_1.0 4.3 + _gfortran_ssum_r16@GFORTRAN_1.0 4.3 + _gfortran_sum_c16@GFORTRAN_1.0 4.3 + _gfortran_sum_r16@GFORTRAN_1.0 4.3 + _gfortran_transpose_c16@GFORTRAN_1.0 4.3 + _gfortran_transpose_r16@GFORTRAN_1.0 4.3 diff -Nru gcc-4.6-4.6.3/debian/libgfortran3.symbols.powerpcspe gcc-4.6-4.6.4/debian/libgfortran3.symbols.powerpcspe --- gcc-4.6-4.6.3/debian/libgfortran3.symbols.powerpcspe 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libgfortran3.symbols.powerpcspe 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,3 @@ +libgfortran.so.3 libgfortran3 #MINVER# +#include "libgfortran3.symbols.common" +#include "libgfortran3.symbols.16.powerpc" diff -Nru gcc-4.6-4.6.3/debian/libstdc++6.symbols.32bit gcc-4.6-4.6.4/debian/libstdc++6.symbols.32bit --- gcc-4.6-4.6.3/debian/libstdc++6.symbols.32bit 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libstdc++6.symbols.32bit 2013-04-14 22:48:24.000000000 +0000 @@ -325,7 +325,7 @@ _ZNSt14collate_bynameIcEC2EPKcj@GLIBCXX_3.4 4.1.1 _ZNSt14collate_bynameIwEC1EPKcj@GLIBCXX_3.4 4.1.1 _ZNSt14collate_bynameIwEC2EPKcj@GLIBCXX_3.4 4.1.1 - (arch=!powerpc !ppc64 !sparc)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0 + (arch=!powerpc !powerpcspe !ppc64 !sparc)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0 _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@GLIBCXX_3.4.16 4.6.0 _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@GLIBCXX_3.4.16 4.6.0 diff -Nru gcc-4.6-4.6.3/debian/libstdc++6.symbols.64bit gcc-4.6-4.6.4/debian/libstdc++6.symbols.64bit --- gcc-4.6-4.6.3/debian/libstdc++6.symbols.64bit 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libstdc++6.symbols.64bit 2013-04-14 22:48:24.000000000 +0000 @@ -323,7 +323,7 @@ _ZNSt14collate_bynameIcEC2EPKcm@GLIBCXX_3.4 4.1.1 _ZNSt14collate_bynameIwEC1EPKcm@GLIBCXX_3.4 4.1.1 _ZNSt14collate_bynameIwEC2EPKcm@GLIBCXX_3.4 4.1.1 - (arch=!alpha !powerpc !ppc64 !s390)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0 + (arch=!alpha !powerpc !powerpcspe !ppc64 !s390)_ZNSt14numeric_limitsIeE12max_digits10E@GLIBCXX_3.4.14 4.5.0 _ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffElSt12_Ios_SeekdirSt13_Ios_Openmode@GLIBCXX_3.4 4.1.1 _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEl@GLIBCXX_3.4.16 4.6.0 _ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEl@GLIBCXX_3.4.16 4.6.0 diff -Nru gcc-4.6-4.6.3/debian/libstdc++6.symbols.powerpcspe gcc-4.6-4.6.4/debian/libstdc++6.symbols.powerpcspe --- gcc-4.6-4.6.3/debian/libstdc++6.symbols.powerpcspe 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/libstdc++6.symbols.powerpcspe 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,8 @@ +libstdc++.so.6 libstdc++6 #MINVER# +#include "libstdc++6.symbols.32bit" +#include "libstdc++6.symbols.excprop" + __gxx_personality_v0@CXXABI_1.3 4.1.1 +#include "libstdc++6.symbols.glibcxxmath" +#include "libstdc++6.symbols.ldbl.32bit" + _ZNKSt3tr14hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 + _ZNKSt4hashIeEclEe@GLIBCXX_3.4.10 4.3.0~rc2 diff -Nru gcc-4.6-4.6.3/debian/patches/ada-kfreebsd-gnu.diff gcc-4.6-4.6.4/debian/patches/ada-kfreebsd-gnu.diff --- gcc-4.6-4.6.3/debian/patches/ada-kfreebsd-gnu.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/ada-kfreebsd-gnu.diff 2013-04-14 22:48:24.000000000 +0000 @@ -183,6 +183,24 @@ s-osinte.ads 45) ++#if (defined (linux) || defined(__GNU__) || defined(__kFreeBSD_kernel__)) && (__GNUC__ * 10 + __GNUC_MINOR__ > 45) + #define USE_GCC_UNWINDER + #else + #define USE_GENERIC_UNWINDER diff -Nru gcc-4.6-4.6.3/debian/patches/arm-dynamic-linker.diff gcc-4.6-4.6.4/debian/patches/arm-dynamic-linker.diff --- gcc-4.6-4.6.3/debian/patches/arm-dynamic-linker.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/arm-dynamic-linker.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,21 +1,56 @@ # DP: For ARM hard float, set the dynamic linker to # DP: /lib/ld-linux-armhf.so.3. -diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 80bd825..8c9d2e7 100644 +2012-05-01 Richard Earnshaw + + * arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_DEFAULT): Avoid ifdef + comparing enumeration values. Update comments. + +2012-04-26 Michael Hope + Richard Earnshaw + + * config/arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_SOFT_FLOAT): Define. + (GLIBC_DYNAMIC_LINKER_HARD_FLOAT): Define. + (GLIBC_DYNAMIC_LINKER_DEFAULT): Define. + (GLIBC_DYNAMIC_LINKER): Redefine to use the hard float path. + --- a/src/gcc/config/arm/linux-eabi.h +++ b/src/gcc/config/arm/linux-eabi.h -@@ -62,7 +62,11 @@ - /* Use ld-linux.so.3 so that it will be possible to run "classic" - GNU/Linux binaries on an EABI system. */ +@@ -32,7 +32,8 @@ + while (false) + + /* We default to a soft-float ABI so that binaries can run on all +- target hardware. */ ++ target hardware. If you override this to use the hard-float ABI then ++ change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ + #undef TARGET_DEFAULT_FLOAT_ABI + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT + +@@ -59,11 +60,24 @@ + #undef SUBTARGET_EXTRA_LINK_SPEC + #define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION + +-/* Use ld-linux.so.3 so that it will be possible to run "classic" +- GNU/Linux binaries on an EABI system. */ ++/* GNU/Linux on ARM currently supports three dynamic linkers: ++ - ld-linux.so.2 - for the legacy ABI ++ - ld-linux.so.3 - for the EABI-derived soft-float ABI ++ - ld-linux-armhf.so.3 - for the EABI-derived hard-float ABI. ++ All the dynamic linkers live in /lib. ++ We default to soft-float, but this can be overridden by changing both ++ GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */ ++ #undef GLIBC_DYNAMIC_LINKER -#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3" +#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" +#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" ++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT + +#define GLIBC_DYNAMIC_LINKER \ + "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ -+ %{!mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "}" - ++ %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \ ++ %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}" ++ /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to use the GNU/Linux version, not the generic BPABI version. */ - + #undef LINK_SPEC diff -Nru gcc-4.6-4.6.3/debian/patches/arm-multilib-defaults.diff gcc-4.6-4.6.4/debian/patches/arm-multilib-defaults.diff --- gcc-4.6-4.6.3/debian/patches/arm-multilib-defaults.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/arm-multilib-defaults.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,103 @@ +# DP: Set MULTILIB_DEFAULTS for ARM multilib builds + +--- a/src/gcc/config.gcc ++++ a/src/gcc/config.gcc +@@ -3013,10 +3013,18 @@ + esac + + case "$with_float" in +- "" \ +- | soft | hard | softfp) ++ "") + # OK + ;; ++ soft) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=0" ++ ;; ++ softfp) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=1" ++ ;; ++ hard) ++ tm_defines="${tm_defines} TARGET_CONFIGURED_FLOAT_ABI=2" ++ ;; + *) + echo "Unknown floating point type used in --with-float=$with_float" 1>&2 + exit 1 +@@ -3060,6 +3068,9 @@ + "" \ + | arm | thumb ) + #OK ++ if test "$with_mode" = thumb; then ++ tm_defines="${tm_defines} TARGET_CONFIGURED_THUMB_MODE=1" ++ fi + ;; + *) + echo "Unknown mode used in --with-mode=$with_mode" +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -35,7 +35,21 @@ + target hardware. If you override this to use the hard-float ABI then + change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ + #undef TARGET_DEFAULT_FLOAT_ABI ++#ifdef TARGET_CONFIGURED_FLOAT_ABI ++#if TARGET_CONFIGURED_FLOAT_ABI == 2 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_HARD ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=hard" ++#elif TARGET_CONFIGURED_FLOAT_ABI == 1 ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFTFP ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=softfp" ++#else + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif ++#else ++#define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT ++#define MULTILIB_DEFAULT_FLOAT_ABI "mfloat-abi=soft" ++#endif + + /* We default to the "aapcs-linux" ABI so that enums are int-sized by + default. */ +@@ -71,13 +85,43 @@ + #undef GLIBC_DYNAMIC_LINKER + #define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" + #define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" ++#ifdef TARGET_CONFIGURED_FLOAT_ABI ++#if TARGET_CONFIGURED_FLOAT_ABI == 2 ++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_HARD_FLOAT ++#else + #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT ++#endif ++#else ++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT ++#endif + + #define GLIBC_DYNAMIC_LINKER \ + "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ + %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \ + %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}" + ++/* Set the multilib defaults according the configuration, needed to ++ let gcc -print-multi-dir do the right thing. */ ++ ++#if TARGET_BIG_ENDIAN_DEFAULT ++#define MULTILIB_DEFAULT_ENDIAN "mbig-endian" ++#else ++#define MULTILIB_DEFAULT_ENDIAN "mlittle-endian" ++#endif ++ ++#ifndef TARGET_CONFIGURED_THUMB_MODE ++#define MULTILIB_DEFAULT_MODE "marm" ++#elif TARGET_CONFIGURED_THUMB_MODE == 1 ++#define MULTILIB_DEFAULT_MODE "mthumb" ++#else ++#define MULTILIB_DEFAULT_MODE "marm" ++#endif ++ ++#undef MULTILIB_DEFAULTS ++#define MULTILIB_DEFAULTS \ ++ { MULTILIB_DEFAULT_MODE, MULTILIB_DEFAULT_ENDIAN, \ ++ MULTILIB_DEFAULT_FLOAT_ABI, "mno-thumb-interwork" } ++ + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ + #undef LINK_SPEC diff -Nru gcc-4.6-4.6.3/debian/patches/arm-multilib-soft.diff gcc-4.6-4.6.4/debian/patches/arm-multilib-soft.diff --- gcc-4.6-4.6.3/debian/patches/arm-multilib-soft.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/arm-multilib-soft.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,27 @@ +# DP: ARM hard/soft float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=soft/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?soft=msoft-float mfloat-abi?soft=mfloat-abi?softfp ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff -Nru gcc-4.6-4.6.3/debian/patches/arm-multilib-softfp.diff gcc-4.6-4.6.4/debian/patches/arm-multilib-softfp.diff --- gcc-4.6-4.6.3/debian/patches/arm-multilib-softfp.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/arm-multilib-softfp.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,27 @@ +# DP: ARM hard/softfp float multilib support + +Index: b/src/gcc/config/arm/t-linux-eabi +=================================================================== +--- a/src/gcc/config/arm/t-linux-eabi 2011-01-03 20:52:22.000000000 +0000 ++++ b/src/gcc/config/arm/t-linux-eabi 2011-08-21 21:08:47.583351817 +0000 +@@ -24,6 +24,20 @@ + MULTILIB_OPTIONS = + MULTILIB_DIRNAMES = + ++ifeq ($(with_float),hard) ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = arm-linux-gnueabi:arm-linux-gnueabi ../lib:arm-linux-gnueabihf ++else ++MULTILIB_OPTIONS = mfloat-abi=softfp/mfloat-abi=hard ++MULTILIB_DIRNAMES = sf hf ++MULTILIB_EXCEPTIONS = ++MULTILIB_MATCHES = mfloat-abi?hard=mhard-float mfloat-abi?softfp=msoft-float mfloat-abi?softfp=mfloat-abi?soft ++MULTILIB_OSDIRNAMES = ../lib:arm-linux-gnueabi arm-linux-gnueabihf:arm-linux-gnueabihf ++endif ++ + #MULTILIB_OPTIONS += mcpu=fa606te/mcpu=fa626te/mcpu=fmp626/mcpu=fa726te + #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te + #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* diff -Nru gcc-4.6-4.6.3/debian/patches/arm-no-va_list-warn.diff gcc-4.6-4.6.4/debian/patches/arm-no-va_list-warn.diff --- gcc-4.6-4.6.3/debian/patches/arm-no-va_list-warn.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/arm-no-va_list-warn.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,31 @@ +# DP: Don't warn anymore that 4.4 has changed the `va_list' mangling. + +gcc/ + +2012-09-21 Matthias Klose + + * config/arm/arm.c (arm_mangle_type): Don't warn anymore that + 4.4 has changed the `va_list' mangling. + +Index: gcc/config/arm/arm.c +=================================================================== +--- a/src/gcc/config/arm/arm.c (revision 191609) ++++ b/src/gcc/config/arm/arm.c (revision 191610) +@@ -25072,16 +25072,7 @@ + has to be managled as if it is in the "std" namespace. */ + if (TARGET_AAPCS_BASED + && lang_hooks.types_compatible_p (CONST_CAST_TREE (type), va_list_type)) +- { +- static bool warned; +- if (!warned && warn_psabi && !in_system_header) +- { +- warned = true; +- inform (input_location, +- "the mangling of % has changed in GCC 4.4"); +- } +- return "St9__va_list"; +- } ++ return "St9__va_list"; + + /* Half-precision float. */ + if (TREE_CODE (type) == REAL_TYPE && TYPE_PRECISION (type) == 16) diff -Nru gcc-4.6-4.6.3/debian/patches/config-ml.diff gcc-4.6-4.6.4/debian/patches/config-ml.diff --- gcc-4.6-4.6.3/debian/patches/config-ml.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/config-ml.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,35 +1,11 @@ -# DP: disable some biarch libraries for biarch builds - ---- - config-ml.in | 45 ++++++++++++++++++++++++++++++++++++++++++++- - 1 files changed, 44 insertions(+), 1 deletions(-) +# DP: - Disable some biarch libraries for biarch builds. +# DP: - Fix multilib builds on kernels which don't support all multilibs. +Index: b/src/config-ml.in +=================================================================== --- a/src/config-ml.in +++ b/src/config-ml.in -@@ -306,6 +306,11 @@ - done - fi - ;; -+i[34567]86-*-*) -+ case " $multidirs " in -+ *" 64 "*) ac_configure_args="${ac_configure_args} --host=x86_64-linux-gnu" -+ esac -+ ;; - m68*-*-*) - if [ x$enable_softfloat = xno ] - then -@@ -477,9 +482,36 @@ - esac - done - fi -+ case " $multidirs " in -+ *" 64 "*) ac_configure_args="${ac_configure_args} --host=powerpc64-linux-gnu" -+ esac -+ ;; -+s390-*-*) -+ case " $multidirs " in -+ *" 64 "*) ac_configure_args="${ac_configure_args} --host=s390x-linux-gnu" -+ esac +@@ -467,6 +467,25 @@ ;; esac @@ -43,7 +19,7 @@ +multidirs="" +for x in ${old_multidirs}; do + case " $x " in -+ " 32 "|" n32 "|" 64 "|" hf "|" sf ") ++ " 32 "|" n32 "|" x32 "|" 64 "|" hf "|" sf ") + case "$biarch_multidir_names" in + *"$ml_srcbase"*) multidirs="${multidirs} ${x}" ;; + esac @@ -55,7 +31,43 @@ # Remove extraneous blanks from multidirs. # Tests like `if [ -n "$multidirs" ]' require it. multidirs=`echo "$multidirs" | sed -e 's/^[ ][ ]*//' -e 's/[ ][ ]*$//' -e 's/[ ][ ]*/ /g'` -@@ -871,9 +903,20 @@ +@@ -654,6 +673,35 @@ + + for ml_dir in ${multidirs}; do + ++ # a native build fails if the running kernel doesn't support the multilib ++ # variant; force cross compilation for these cases. ++ ml_host_arg= ++ case "${host}" in ++ i[34567]86-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=x86_64-linux-gnu";; ++ x32) ml_host_arg="--host=x86_64-linux-gnux32";; ++ esac ++ ;; ++ powerpc-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=powerpc64-linux-gnu" ++ esac ++ ;; ++ s390-*-linux*) ++ case "${ml_dir}" in ++ 64) ml_host_arg="--host=s390x-linux-gnu" ++ esac ++ ;; ++ x86_64-*-linux*) ++ case "${ml_dir}" in ++ x32) ml_host_arg="--host=x86_64-linux-gnux32" ++ esac ++ esac ++ if [ -n "${ml_host_arg}" ]; then ++ ml_host_arg="${ml_host_arg} --with-default-host-alias=${host_alias}" ++ fi ++ + if [ "${ml_verbose}" = --verbose ]; then + echo "Running configure in multilib subdir ${ml_dir}" + echo "pwd: `${PWDCMD-pwd}`" +@@ -858,9 +906,20 @@ fi fi @@ -73,7 +85,76 @@ if eval ${ml_config_env} ${ml_config_shell} ${ml_recprog} \ --with-multisubdir=${ml_dir} --with-multisrctop=${multisrctop} \ - ${ac_configure_args} ${ml_config_env} ${ml_srcdiroption} ; then -+ ${ac_configure_args} ${ml_configure_args} ${ml_srcdiroption} ; then ++ ${ac_configure_args} ${ml_configure_args} ${ml_host_arg} ${ml_srcdiroption} ; then true else exit 1 +Index: b/src/libstdc++-v3/include/Makefile.am +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.am ++++ b/src/libstdc++-v3/include/Makefile.am +@@ -829,8 +829,9 @@ + endif + + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++default_host_alias = @default_host_alias@ ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1050,6 +1051,7 @@ + + stamp-${host_alias}: + @-mkdir -p ${host_builddir} ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/include/Makefile.in +=================================================================== +--- a/src/libstdc++-v3/include/Makefile.in ++++ b/src/libstdc++-v3/include/Makefile.in +@@ -1082,8 +1082,9 @@ + # For --enable-cheaders=c_std + @GLIBCXX_C_HEADERS_COMPATIBILITY_TRUE@c_compatibility_headers_extra = ${c_compatibility_headers} + host_srcdir = ${glibcxx_srcdir}/$(OS_INC_SRCDIR) +-host_builddir = ./${host_alias}/bits +-host_installdir = ${gxx_include_dir}/${host_alias}$(MULTISUBDIR)/bits ++default_host_alias = @default_host_alias@ ++host_builddir = ./${default_host_alias}/bits ++host_installdir = ${gxx_include_dir}/${default_host_alias}$(MULTISUBDIR)/bits + host_headers = \ + ${host_srcdir}/ctype_base.h \ + ${host_srcdir}/ctype_inline.h \ +@@ -1461,6 +1462,7 @@ + + stamp-${host_alias}: + @-mkdir -p ${host_builddir} ++ @test ${default_host_alias} = ${host_alias} || ln -sf ${default_host_alias} ${host_alias} + @$(STAMP) stamp-${host_alias} + + # Host includes static. +Index: b/src/libstdc++-v3/configure.ac +=================================================================== +--- a/src/libstdc++-v3/configure.ac ++++ b/src/libstdc++-v3/configure.ac +@@ -458,6 +458,16 @@ + multilib_arg= + fi + ++AC_ARG_WITH(default-host-alias, ++[AS_HELP_STRING([--with-default-host-alias=TRIPLET], ++ [specifies host triplet used for the default multilib build])], ++[case "${withval}" in ++yes) AC_MSG_ERROR(bad value ${withval} given for default host triplet) ;; ++no) default_host_alias='${host_alias}' ;; ++*) default_host_alias=${withval} ;; ++esac],[default_host_alias='${host_alias}']) ++AC_SUBST(default_host_alias) ++ + # Export all the install information. + GLIBCXX_EXPORT_INSTALL_INFO + diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-base-version.diff gcc-4.6-4.6.4/debian/patches/gcc-base-version.diff --- gcc-4.6-4.6.3/debian/patches/gcc-base-version.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-base-version.diff 2013-04-14 22:48:24.000000000 +0000 @@ -3,12 +3,12 @@ --- a/src/gcc/BASE-VER +++ b/src/gcc/BASE-VER @@ -1 +1 @@ --4.6.3 +-4.6.4 +4.6 --- /dev/null +++ b/src/gcc/FULL-VER @@ -0,0 +1 @@ -+4.6.3 ++4.6.4 --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in @@ -832,11 +832,13 @@ diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-cloog-dl.diff gcc-4.6-4.6.4/debian/patches/gcc-cloog-dl.diff --- gcc-4.6-4.6.3/debian/patches/gcc-cloog-dl.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-cloog-dl.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,7 +1,7 @@ # DP: Link against -ldl instead of -lcloog -lppl. Exit with an error when using # DP: the Graphite loop transformation infrastructure without having the -# DP: libcloog-ppl0 package installed. Packages using these optimizations -# DP: should build-depend on libcloog-ppl0. +# DP: libcloog-ppl[01] package installed. Packages using these optimizations +# DP: should build-depend on libcloog-ppl1 | libcloog-ppl0. 2011-01-04 Jakub Jelinek @@ -18,9 +18,11 @@ stmt_for argument to stmt_fora. * graphite-poly.h: Include graphite-cloog-util.h. +Index: b/src/gcc/Makefile.in +=================================================================== --- a/src/gcc/Makefile.in +++ b/src/gcc/Makefile.in -@@ -984,6 +984,8 @@ +@@ -999,6 +999,8 @@ PLUGIN_H = plugin.h $(GCC_PLUGIN_H) PLUGIN_VERSION_H = plugin-version.h configargs.h LIBFUNCS_H = libfuncs.h $(HASHTAB_H) @@ -29,7 +31,7 @@ # # Now figure out from those variables how to compile and link. -@@ -1037,7 +1039,7 @@ +@@ -1052,7 +1054,7 @@ # and the system's installed libraries. LIBS = @LIBS@ $(CPPLIB) $(LIBINTL) $(LIBICONV) $(LIBIBERTY) $(LIBDECNUMBER) \ $(HOST_LIBS) @@ -38,7 +40,7 @@ $(ZLIB) # Any system libraries needed just for GNAT. SYSLIBS = @GNAT_LIBEXC@ -@@ -2668,40 +2670,40 @@ +@@ -2684,40 +2686,40 @@ $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \ $(TREE_FLOW_H) $(TREE_DUMP_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) sese.h \ @@ -93,7 +95,7 @@ graphite-sese-to-poly.h tree-vect-loop.o: tree-vect-loop.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ $(TM_H) $(GGC_H) $(TREE_H) $(BASIC_BLOCK_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ -@@ -3483,6 +3485,11 @@ +@@ -3499,6 +3501,11 @@ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) \ $(out_file) $(OUTPUT_OPTION) @@ -105,6 +107,8 @@ # Build auxiliary files that support ecoff format. mips-tfile: mips-tfile.o version.o $(LIBDEPS) $(LINKER) $(LINKERFLAGS) $(LDFLAGS) -o $@ \ +Index: b/src/gcc/graphite-cloog-compat.h +=================================================================== --- a/src/gcc/graphite-cloog-compat.h +++ b/src/gcc/graphite-cloog-compat.h @@ -272,4 +272,277 @@ @@ -385,9 +389,11 @@ + + #endif /* GRAPHITE_CLOOG_COMPAT_H */ +Index: b/src/gcc/graphite.c +=================================================================== --- a/src/gcc/graphite.c +++ b/src/gcc/graphite.c -@@ -56,6 +56,35 @@ +@@ -56,6 +56,37 @@ CloogState *cloog_state; @@ -400,7 +406,9 @@ + + if (cloog_pointers__.inited) + return cloog_pointers__.h != NULL; -+ h = dlopen ("libcloog-ppl.so.0", RTLD_LAZY); ++ h = dlopen ("libcloog-ppl.so.1", RTLD_LAZY); ++ if (!h) ++ h = dlopen ("libcloog-ppl.so.0", RTLD_LAZY); + cloog_pointers__.h = h; + if (h == NULL) + return false; @@ -423,19 +431,21 @@ /* Print global statistics to FILE. */ static void -@@ -201,6 +230,12 @@ +@@ -201,6 +232,12 @@ return false; } + if (!init_cloog_pointers ()) + { -+ sorry ("Graphite loop optimizations can only be used if the libcloog-ppl0 package is installed"); ++ sorry ("Graphite loop optimizations can only be used if the libcloog-ppl1 or libcloog-ppl0 package is installed"); + return false; + } + scev_reset (); recompute_all_dominators (); initialize_original_copy_tables (); +Index: b/src/gcc/graphite-clast-to-gimple.c +=================================================================== --- a/src/gcc/graphite-clast-to-gimple.c +++ b/src/gcc/graphite-clast-to-gimple.c @@ -738,10 +738,10 @@ @@ -451,6 +461,8 @@ struct clast_user_stmt *body = clast_get_body_of_loop (stmt); CloogStatement *cs = body->statement; poly_bb_p pbb = (poly_bb_p) cloog_statement_usr (cs); +Index: b/src/gcc/graphite-poly.h +=================================================================== --- a/src/gcc/graphite-poly.h +++ b/src/gcc/graphite-poly.h @@ -22,6 +22,8 @@ diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-gengtype-fix1.diff gcc-4.6-4.6.4/debian/patches/gcc-gengtype-fix1.diff --- gcc-4.6-4.6.3/debian/patches/gcc-gengtype-fix1.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-gengtype-fix1.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,46 @@ +# DP: Backport patch from the 4.7 branch, fixing gengtype memory issue. + +gcc/ + +2011-04-21 Dimitrios Apostolou + Jeff Law + + * gengtype-state.c (read_a_state_token): Fix argument to + obstack_free. + * gengtype.c (matching_file_name_substitute): Likewise. + +Index: gcc/gengtype-state.c +=================================================================== +--- a/src/gcc/gengtype-state.c (revision 172831) ++++ b/src/gcc/gengtype-state.c (revision 172832) +@@ -303,7 +303,7 @@ + obstack_1grow (&id_obstack, (char) 0); + ids = XOBFINISH (&id_obstack, char *); + sid = state_ident_by_name (ids, INSERT); +- obstack_free (&id_obstack, ids); ++ obstack_free (&id_obstack, NULL); + ids = NULL; + tk = XCNEW (struct state_token_st); + tk->stok_kind = STOK_NAME; +@@ -408,7 +408,7 @@ + tk->stok_file = state_path; + tk->stok_next = NULL; + strcpy (tk->stok_un.stok_string, cstr); +- obstack_free (&bstring_obstack, cstr); ++ obstack_free (&bstring_obstack, NULL); + + return tk; + } +Index: gcc/gengtype.c +=================================================================== +--- a/src/gcc/gengtype.c (revision 172831) ++++ b/src/gcc/gengtype.c (revision 172832) +@@ -1943,7 +1943,7 @@ + obstack_1grow (&str_obstack, '\0'); + rawstr = XOBFINISH (&str_obstack, char *); + str = xstrdup (rawstr); +- obstack_free (&str_obstack, rawstr); ++ obstack_free (&str_obstack, NULL); + DBGPRINTF ("matched replacement %s", str); + rawstr = NULL; + return str; diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-gengtype-fix2.diff gcc-4.6-4.6.4/debian/patches/gcc-gengtype-fix2.diff --- gcc-4.6-4.6.3/debian/patches/gcc-gengtype-fix2.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-gengtype-fix2.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,16 @@ +# DP: Write gengtype output to a temporary file before using it + +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -3780,9 +3780,10 @@ + gtyp-input.list + # First, parse all files and save a state file. + $(RUN_GEN) build/gengtype$(build_exeext) $(GENGTYPE_FLAGS) \ +- -S $(srcdir) -I gtyp-input.list -w gtype.state ++ -S $(srcdir) -I gtyp-input.list -w tmp-gtype.state + # Second, read the state file and generate all files. This ensure that + # gtype.state is correctly read: ++ $(SHELL) $(srcdir)/../move-if-change tmp-gtype.state gtype.state + $(RUN_GEN) build/gengtype$(build_exeext) $(GENGTYPE_FLAGS) \ + -r gtype.state + $(STAMP) s-gtype diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-linaro-doc.diff gcc-4.6-4.6.4/debian/patches/gcc-linaro-doc.diff --- gcc-4.6-4.6.3/debian/patches/gcc-linaro-doc.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-linaro-doc.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,8 +1,8 @@ -# DP: Changes for the Linaro 4.6-2012.04 release (documentation). +# DP: Changes for the Linaro 4.6-2013.04 release (documentation). --- a/src/gcc/doc/invoke.texi +++ b/src/gcc/doc/invoke.texi -@@ -8725,6 +8725,10 @@ +@@ -8728,6 +8728,10 @@ The maximum number of best instructions in the ready list that are considered for renaming in the selective scheduler. The default value is 2. @@ -13,7 +13,7 @@ @item max-last-value-rtl The maximum size measured as number of RTLs that can be recorded in an expression in combiner for a pseudo register as last known value of that register. The default -@@ -8904,6 +8908,11 @@ +@@ -8907,6 +8911,11 @@ The maximum number of namespaces to consult for suggestions when C++ name lookup fails for an identifier. The default is 1000. @@ -25,7 +25,7 @@ @end table @end table -@@ -10193,12 +10202,23 @@ +@@ -10196,12 +10205,23 @@ @samp{arm10e}, @samp{arm1020e}, @samp{arm1022e}, @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, @@ -51,7 +51,7 @@ @item -mtune=@var{name} @opindex mtune This option is very similar to the @option{-mcpu=} option, except that -@@ -10210,6 +10230,18 @@ +@@ -10213,6 +10233,18 @@ For some ARM implementations better performance can be obtained by using this option. @@ -70,7 +70,7 @@ @item -march=@var{name} @opindex march This specifies the name of the target ARM architecture. GCC uses this -@@ -10223,6 +10255,11 @@ +@@ -10226,6 +10258,11 @@ @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. @@ -177,7 +177,7 @@ Further canonicalization rules are defined in the function --- a/src/gcc/doc/tm.texi +++ b/src/gcc/doc/tm.texi -@@ -2533,7 +2533,7 @@ +@@ -2541,7 +2541,7 @@ register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when @var{x} is a floating-point constant. If the constant can't be loaded into any kind of register, code generation will be better if @@ -186,7 +186,7 @@ of using @code{TARGET_PREFERRED_RELOAD_CLASS}. If an insn has pseudos in it after register allocation, reload will go -@@ -2570,8 +2570,8 @@ +@@ -2578,8 +2578,8 @@ register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when @var{x} is a floating-point constant. If the constant can't be loaded into any kind of register, code generation will be better if @@ -197,7 +197,7 @@ If an insn has pseudos in it after register allocation, reload will go through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS} -@@ -4319,6 +4319,34 @@ +@@ -4327,6 +4327,34 @@ must have move patterns for this mode. @end deftypefn @@ -232,7 +232,7 @@ @deftypefn {Target Hook} bool TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P (enum machine_mode @var{mode}) Define this to return nonzero for machine modes for which the port has small register classes. If this target hook returns nonzero for a given -@@ -5577,13 +5605,13 @@ +@@ -5585,13 +5613,13 @@ @code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook. @end defmac @@ -253,3 +253,55 @@ @deftypefn {Target Hook} rtx TARGET_DELEGITIMIZE_ADDRESS (rtx @var{x}) This hook is used to undo the possibly obfuscating effects of the +--- a/src/gcc/doc/tm.texi.in ++++ b/src/gcc/doc/tm.texi.in +@@ -2523,7 +2523,7 @@ + register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when + @var{x} is a floating-point constant. If the constant can't be loaded + into any kind of register, code generation will be better if +-@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead ++@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead + of using @code{TARGET_PREFERRED_RELOAD_CLASS}. + + If an insn has pseudos in it after register allocation, reload will go +@@ -2560,8 +2560,8 @@ + register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when + @var{x} is a floating-point constant. If the constant can't be loaded + into any kind of register, code generation will be better if +-@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead +-of using @code{PREFERRED_RELOAD_CLASS}. ++@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead ++of using @code{TARGET_PREFERRED_RELOAD_CLASS}. + + If an insn has pseudos in it after register allocation, reload will go + through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS} +@@ -4307,6 +4307,8 @@ + must have move patterns for this mode. + @end deftypefn + ++@hook TARGET_ARRAY_MODE_SUPPORTED_P ++ + @hook TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P + Define this to return nonzero for machine modes for which the port has + small register classes. If this target hook returns nonzero for a given +@@ -5557,13 +5559,13 @@ + @code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook. + @end defmac + +-@defmac LEGITIMATE_CONSTANT_P (@var{x}) +-A C expression that is nonzero if @var{x} is a legitimate constant for +-an immediate operand on the target machine. You can assume that +-@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact, +-@samp{1} is a suitable definition for this macro on machines where +-anything @code{CONSTANT_P} is valid. +-@end defmac ++@hook TARGET_LEGITIMATE_CONSTANT_P ++This hook returns true if @var{x} is a legitimate constant for a ++@var{mode}-mode immediate operand on the target machine. You can assume that ++@var{x} satisfies @code{CONSTANT_P}, so you need not check this. ++ ++The default definition returns true. ++@end deftypefn + + @hook TARGET_DELEGITIMIZE_ADDRESS + This hook is used to undo the possibly obfuscating effects of the diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-linaro-revert-106905-doc.diff gcc-4.6-4.6.4/debian/patches/gcc-linaro-revert-106905-doc.diff --- gcc-4.6-4.6.3/debian/patches/gcc-linaro-revert-106905-doc.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-linaro-revert-106905-doc.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,28 @@ +--- a/src/gcc/doc/tm.texi 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/doc/tm.texi 2011-07-01 09:19:21 +0000 +@@ -1118,14 +1118,6 @@ + If the value of this macro has a type, it should be an unsigned type. + @end defmac + +-@deftypefn {Target Hook} HOST_WIDE_INT TARGET_VECTOR_ALIGNMENT (const_tree @var{type}) +-This hook can be used to define the alignment for a vector of type +-@var{type}, in order to comply with a platform ABI. The default is to +-require natural alignment for vector types. The alignment returned by +-this hook must be a power-of-two multiple of the default alignment of +-the vector element type. +-@end deftypefn +- + @defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align}) + If defined, a C expression to compute the alignment for stack slot. + @var{type} is the data type, @var{mode} is the widest mode available, +--- a/src/gcc/doc/tm.texi.in 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/doc/tm.texi.in 2011-07-01 09:19:21 +0000 +@@ -1108,8 +1108,6 @@ + If the value of this macro has a type, it should be an unsigned type. + @end defmac + +-@hook TARGET_VECTOR_ALIGNMENT +- + @defmac STACK_SLOT_ALIGNMENT (@var{type}, @var{mode}, @var{basic-align}) + If defined, a C expression to compute the alignment for stack slot. + @var{type} is the data type, @var{mode} is the widest mode available, diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-linaro-revert-106905.diff gcc-4.6-4.6.4/debian/patches/gcc-linaro-revert-106905.diff --- gcc-4.6-4.6.3/debian/patches/gcc-linaro-revert-106905.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-linaro-revert-106905.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,290 @@ +--- a/src/gcc/config/arm/arm.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/config/arm/arm.c 2012-07-01 01:50:29 +0000 +@@ -258,7 +258,6 @@ + unsigned HOST_WIDE_INT); + static enum machine_mode arm_preferred_simd_mode (enum machine_mode); + static bool arm_class_likely_spilled_p (reg_class_t); +-static HOST_WIDE_INT arm_vector_alignment (const_tree type); + static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); + static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, + const_tree type, +@@ -613,9 +612,6 @@ + #undef TARGET_CLASS_LIKELY_SPILLED_P + #define TARGET_CLASS_LIKELY_SPILLED_P arm_class_likely_spilled_p + +-#undef TARGET_VECTOR_ALIGNMENT +-#define TARGET_VECTOR_ALIGNMENT arm_vector_alignment +- + #undef TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE + #define TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE \ + arm_vector_alignment_reachable +@@ -24815,18 +24811,6 @@ + } + } + +-/* The AAPCS sets the maximum alignment of a vector to 64 bits. */ +-static HOST_WIDE_INT +-arm_vector_alignment (const_tree type) +-{ +- HOST_WIDE_INT align = tree_low_cst (TYPE_SIZE (type), 0); +- +- if (TARGET_AAPCS_BASED) +- align = MIN (align, 64); +- +- return align; +-} +- + static unsigned int + arm_autovectorize_vector_sizes (void) + { +--- a/src/gcc/stor-layout.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/stor-layout.c 2012-04-02 11:35:45 +0000 +@@ -1955,17 +1955,9 @@ + TYPE_SIZE (type) = int_const_binop (MULT_EXPR, TYPE_SIZE (innertype), + bitsize_int (nunits), 0); + +- /* For vector types, we do not default to the mode's alignment. +- Instead, query a target hook, defaulting to natural alignment. +- This prevents ABI changes depending on whether or not native +- vector modes are supported. */ +- TYPE_ALIGN (type) = targetm.vector_alignment (type); +- +- /* However, if the underlying mode requires a bigger alignment than +- what the target hook provides, we cannot use the mode. For now, +- simply reject that case. */ +- gcc_assert (TYPE_ALIGN (type) +- >= GET_MODE_ALIGNMENT (TYPE_MODE (type))); ++ /* Always naturally align vectors. This prevents ABI changes ++ depending on whether or not native vector modes are supported. */ ++ TYPE_ALIGN (type) = tree_low_cst (TYPE_SIZE (type), 0); + break; + } + +--- a/src/gcc/target.def 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/target.def 2011-07-01 09:19:21 +0000 +@@ -1618,16 +1618,6 @@ + bool, (enum machine_mode mode), + hook_bool_mode_false) + +-DEFHOOK +-(vector_alignment, +- "This hook can be used to define the alignment for a vector of type\n\ +-@var{type}, in order to comply with a platform ABI. The default is to\n\ +-require natural alignment for vector types. The alignment returned by\n\ +-this hook must be a power-of-two multiple of the default alignment of\n\ +-the vector element type.", +- HOST_WIDE_INT, (const_tree type), +- default_vector_alignment) +- + /* True if we should try to use a scalar mode to represent an array, + overriding the usual MAX_FIXED_MODE limit. */ + DEFHOOK +--- a/src/gcc/targhooks.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/targhooks.c 2012-04-02 11:35:45 +0000 +@@ -979,13 +979,6 @@ + return id; + } + +-/* Default to natural alignment for vector types. */ +-HOST_WIDE_INT +-default_vector_alignment (const_tree type) +-{ +- return tree_low_cst (TYPE_SIZE (type), 0); +-} +- + bool + default_builtin_vector_alignment_reachable (const_tree type, bool is_packed) + { +--- a/src/gcc/targhooks.h 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/targhooks.h 2011-05-03 15:17:25 +0000 +@@ -85,8 +85,6 @@ + + extern tree default_builtin_reciprocal (unsigned int, bool, bool); + +-extern HOST_WIDE_INT default_vector_alignment (const_tree); +- + extern bool default_builtin_vector_alignment_reachable (const_tree, bool); + extern bool + default_builtin_support_vector_misalignment (enum machine_mode mode, +--- a/src/gcc/testsuite/gcc.dg/align-2.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/testsuite/gcc.dg/align-2.c 2004-10-19 18:21:41 +0000 +@@ -1,5 +1,5 @@ + /* PR 17962 */ +-/* { dg-do compile { target vect_natural_alignment } } */ ++/* { dg-do compile } */ + /* { dg-options "" } */ + + typedef float v4 __attribute__((vector_size(sizeof(float)*4))); +--- a/src/gcc/testsuite/gcc.dg/vect/slp-25.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-25.c 2011-09-19 07:44:24 +0000 +@@ -56,5 +56,5 @@ + + /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ + /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" } } */ +-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align || { ! vect_natural_alignment } } } } } */ ++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail { vect_no_align } } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c 2012-08-09 14:38:28 +0000 ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-1.c 2011-09-19 07:44:24 +0000 +@@ -48,6 +48,6 @@ + } + + /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ ++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_element_align } } } */ + /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c 2012-08-09 14:38:28 +0000 ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-2.c 2011-09-19 07:44:24 +0000 +@@ -49,6 +49,6 @@ + } + + /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ +-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target { { vect_element_align } && { vect_aligned_arrays } } } } } */ ++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target vect_element_align } } } */ ++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { target vect_element_align } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-3.c 2012-08-09 14:38:28 +0000 ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-3.c 2010-11-22 13:59:45 +0000 +@@ -4,7 +4,9 @@ + #include "tree-vect.h" + + #define N 128 +-#define RES 21640 ++#define RES 21888 ++ ++/* unaligned store. */ + + int ib[N+10]; + int ia[N+10]; +@@ -16,11 +18,11 @@ + int i, suma = 0, sumb = 0, sumc = 0; + + /* ib and ic have same misalignment, we peel to align them. */ +- for (i = 0; i <= N; i++) ++ for (i = 1; i <= N; i++) + { + suma += ia[i]; +- sumb += ib[i+5]; +- sumc += ic[i+1]; ++ sumb += ib[i+6]; ++ sumc += ic[i+2]; + } + + /* check results: */ +@@ -47,7 +49,7 @@ + return main1 (); + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */ +-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail vect_no_align } } } */ ++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c 2012-08-09 14:38:28 +0000 ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-peel-4.c 2011-09-19 07:44:24 +0000 +@@ -16,13 +16,13 @@ + /* Don't peel keeping one load and the store aligned. */ + for (i = 0; i <= N; i++) + { +- ia[i] = ib[i] + ib[i+5]; ++ ia[i] = ib[i] + ib[i+6]; + } + + /* check results: */ + for (i = 1; i <= N; i++) + { +- if (ia[i] != ib[i] + ib[i+5]) ++ if (ia[i] != ib[i] + ib[i+6]) + abort (); + } + +@@ -44,7 +44,7 @@ + return main1 (); + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail vect_no_align } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ + /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail vect_no_align } } } */ + /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/lib/target-supports.exp 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/testsuite/lib/target-supports.exp 2012-03-02 13:53:14 +0000 +@@ -3117,26 +3117,6 @@ + return $et_natural_alignment_64_saved + } + +-# Return 1 if all vector types are naturally aligned (aligned to their +-# type-size), 0 otherwise. +-# +-# This won't change for different subtargets so cache the result. +- +-proc check_effective_target_vect_natural_alignment { } { +- global et_vect_natural_alignment +- +- if [info exists et_vect_natural_alignment_saved] { +- verbose "check_effective_target_vect_natural_alignment: using cached result" 2 +- } else { +- set et_vect_natural_alignment_saved 1 +- if { [check_effective_target_arm_eabi] } { +- set et_vect_natural_alignment_saved 0 +- } +- } +- verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2 +- return $et_vect_natural_alignment_saved +-} +- + # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise. + # + # This won't change for different subtargets so cache the result. +--- a/src/gcc/tree-vect-data-refs.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/tree-vect-data-refs.c 2012-06-26 09:29:30 +0000 +@@ -1041,7 +1041,7 @@ + int misal = DR_MISALIGNMENT (dr); + tree vectype = STMT_VINFO_VECTYPE (stmt_info); + misal += negative ? -npeel * dr_size : npeel * dr_size; +- misal &= (TYPE_ALIGN (vectype) / BITS_PER_UNIT) - 1; ++ misal &= GET_MODE_SIZE (TYPE_MODE (vectype)) - 1; + SET_DR_MISALIGNMENT (dr, misal); + return; + } +--- a/src/gcc/tree-vect-loop-manip.c 2012-08-07 18:13:10 +0000 ++++ b/src/gcc/tree-vect-loop-manip.c 2011-07-04 11:13:51 +0000 +@@ -1972,7 +1972,7 @@ + If the misalignment of DR is known at compile time: + addr_mis = int mis = DR_MISALIGNMENT (dr); + Else, compute address misalignment in bytes: +- addr_mis = addr & (vectype_align - 1) ++ addr_mis = addr & (vectype_size - 1) + + prolog_niters = min (LOOP_NITERS, ((VF - addr_mis/elem_size)&(VF-1))/step) + +@@ -2029,10 +2029,9 @@ + tree ptr_type = TREE_TYPE (start_addr); + tree size = TYPE_SIZE (ptr_type); + tree type = lang_hooks.types.type_for_size (tree_low_cst (size, 1), 1); +- tree vectype_align_minus_1 = build_int_cst (type, vectype_align - 1); +- HOST_WIDE_INT elem_size = +- int_cst_value (TYPE_SIZE_UNIT (TREE_TYPE (vectype))); +- tree elem_size_log = build_int_cst (type, exact_log2 (elem_size)); ++ tree vectype_size_minus_1 = build_int_cst (type, vectype_align - 1); ++ tree elem_size_log = ++ build_int_cst (type, exact_log2 (vectype_align/nelements)); + tree nelements_minus_1 = build_int_cst (type, nelements - 1); + tree nelements_tree = build_int_cst (type, nelements); + tree byte_misalign; +@@ -2041,10 +2040,10 @@ + new_bb = gsi_insert_seq_on_edge_immediate (pe, new_stmts); + gcc_assert (!new_bb); + +- /* Create: byte_misalign = addr & (vectype_align - 1) */ ++ /* Create: byte_misalign = addr & (vectype_size - 1) */ + byte_misalign = + fold_build2 (BIT_AND_EXPR, type, fold_convert (type, start_addr), +- vectype_align_minus_1); ++ vectype_size_minus_1); + + /* Create: elem_misalign = byte_misalign / element_size */ + elem_misalign = diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-linaro.diff gcc-4.6-4.6.4/debian/patches/gcc-linaro.diff --- gcc-4.6-4.6.3/debian/patches/gcc-linaro.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-linaro.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,8 +1,442 @@ -# DP: Changes for the Linaro 4.6-2012.04 release. +# DP: Changes for the Linaro 4.6-2013.04 release. --- a/src/ChangeLog.linaro +++ b/src/ChangeLog.linaro -@@ -0,0 +1,3522 @@ +@@ -0,0 +1,3956 @@ ++2013-04-08 Christophe Lyon ++ ++ GCC Linaro 4.6-2013.04 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-04-05 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 197511) ++ ++2013-04-04 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 197470) ++ ++2013-04-02 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 197313) ++ ++2013-03-11 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-03-11 Matthew Gretton-Dann ++ ++ GCC Linaro 4.6-2013.03 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-02-25 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 196247) ++ ++2013-02-08 Christophe Lyon ++ ++ gcc/ ++ * LINARO: Bump version. ++ ++2013-02-08 Christophe Lyon ++ ++ GCC Linaro 4.6-2013.02 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-02-05 Yvan Roux ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 195744). ++ ++2013-01-15 Zhenqiang Chen ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2013-01-15 Zhenqiang Chen ++ ++ GCC Linaro 4.6-2013.01 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2013-01-02 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 194771). ++ ++2012-12-12 Yvan Roux ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-12-12 Yvan Roux ++ ++ GCC Linaro 4.6-2012.12 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-12-10 Yvan Roux ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 194340). ++ ++2012-11-13 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-11-12 Matthew Gretton-Dann ++ ++ GCC Linaro 4.6-2012.11 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-11-07 Michael Hope ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 193199). ++ ++2012-10-08 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-10-08 Matthew Gretton-Dann ++ ++ GCC Linaro 4.6-2012.10 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-10-01 Matthew Gretton-Dann ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 191880) ++ ++2012-09-18 Matthew Gretton-Dann ++ ++ LP 1029454 ++ Backport from mainline r183524: ++ ++ gcc/ ++ 2012-01-25 Jakub Jelinek ++ ++ PR tree-optimization/51987 ++ * tree-data-ref.c (get_references_in_stmt): Handle references in ++ non-volatile GIMPLE_ASM. ++ ++ gcc/testsuite/ ++ 2012-01-25 Jakub Jelinek ++ ++ PR tree-optimization/51987 ++ * gcc.target/i386/pr51987.c: New test. ++ ++2012-09-12 Michael Hope ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-09-12 Michael Hope ++ ++ GCC Linaro 4.6-2012.09 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-09-11 Michael Hope ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 191000). ++ ++2012-08-13 Matthew Gretton-Dann ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-08-13 Matthew Gretton-Dann ++ ++ GCC Linaro 4.6-2012.08 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-08-10 Ulrich Weigand ++ ++ Backport from mainline: ++ ++ gcc/ ++ 2012-07-30 Ulrich Weigand ++ Richard Earnshaw ++ ++ * target.def (vector_alignment): New target hook. ++ * doc/tm.texi.in (TARGET_VECTOR_ALIGNMENT): Document new hook. ++ * doc/tm.texi: Regenerate. ++ * targhooks.c (default_vector_alignment): New function. ++ * targhooks.h (default_vector_alignment): Add prototype. ++ * stor-layout.c (layout_type): Use targetm.vector_alignment. ++ * config/arm/arm.c (arm_vector_alignment): New function. ++ (TARGET_VECTOR_ALIGNMENT): Define. ++ ++ * tree-vect-data-refs.c (vect_update_misalignment_for_peel): Use ++ vector type alignment instead of size. ++ * tree-vect-loop-manip.c (vect_do_peeling_for_loop_bound): Use ++ element type size directly instead of computing it from alignment. ++ Fix variable naming and comment. ++ ++ gcc/testsuite/ ++ 2012-07-30 Ulrich Weigand ++ ++ * lib/target-supports.exp ++ (check_effective_target_vect_natural_alignment): New function. ++ * gcc.dg/align-2.c: Only run on targets with natural alignment ++ of vector types. ++ * gcc.dg/vect/slp-25.c: Adjust tests for targets without natural ++ alignment of vector types. ++ ++ 2011-12-21 Michael Zolotukhin ++ ++ * gcc.dg/vect/vect-peel-1.c: Adjust test diag-scans to fix fail on AVX. ++ * gcc.dg/vect/vect-peel-2.c: Ditto. ++ ++ 2011-06-21 Ira Rosen ++ ++ PR testsuite/49443 ++ * gcc.dg/vect/vect-peel-3.c: Expect to fail on vect_no_align ++ targets. ++ * gcc.dg/vect/vect-peel-4.c: Likewise. ++ ++ 2011-06-14 Ira Rosen ++ ++ * gcc.dg/vect/vect-peel-3.c: Adjust misalignment values ++ for double-word vectors. ++ * gcc.dg/vect/vect-peel-4.c: Likewise. ++ ++2012-08-01 Michael Hope ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 189991). ++ ++2012-07-02 Ramana Radhakrishnan ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-07-02 Ramana Radhakrishnan ++ ++ GCC Linaro 4.6-2012.07 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-07-01 Michael Hope ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 189058). ++ ++2012-06-29 Ulrich Weigand ++ ++ LP 1010826 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/53729 ++ PR tree-optimization/53636 ++ * tree-vect-slp.c (vect_slp_analyze_bb_1): Delay call to ++ vect_verify_datarefs_alignment until after statements have ++ been marked as relevant/irrelevant. ++ * tree-vect-data-refs.c (vect_verify_datarefs_alignment): ++ Skip irrelevant statements. ++ (vect_enhance_data_refs_alignment): Use STMT_VINFO_RELEVANT_P ++ instead of STMT_VINFO_RELEVANT. ++ (vect_get_data_access_cost): Do not check for supportable ++ alignment before calling vect_get_load_cost/vect_get_store_cost. ++ * tree-vect-stmts.c (vect_get_store_cost): Do not abort when ++ handling unsupported alignment. ++ (vect_get_load_cost): Likewise. ++ ++ gcc/ ++ PR tree-optimization/53636 ++ * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Verify ++ stride when doing basic-block vectorization. ++ ++ gcc/testsuite/ ++ PR tree-optimization/53636 ++ * gcc.target/arm/pr53636.c: New test. ++ ++2012-06-28 Ramana Radhakrishnan ++ ++ gcc/ ++ * config/arm/arm.c (neon_dereference_pointer): Fixup typos. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/lp101329.c: Remove unneeded comment. ++ ++2012-06-21 Ramana Radhakrishnan ++ ++ LP 1013209 ++ gcc/ ++ * config/arm/arm.c (neon_dereference_pointer): Use fold_convert ++ to convert expression to the right type. This is a Linaro 4.6 only ++ patch as this was originally backported from FSF 4.7 and hence applies ++ only here. ++ ++ gcc/testsuite/ ++ * gcc.target/arm/lp101329.c: New test. ++ ++2012-06-14 Michael Hope ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-06-12 Michael Hope ++ ++ GCC Linaro 4.6-2012.06 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-06-11 Michael Hope ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 188320). ++ ++2012-05-22 Ramana Radhakrishnan ++ ++ Backport from mainline: ++ gcc/ ++ 2012-03-15 Ramana Radhakrishnan ++ ++ * config.gcc (target_type_format_char): New. Document it. Set it for ++ arm*-*-* . ++ ++2012-05-23 Ramana Radhakrishnan ++ ++ LP:990530 ++ gcc/ ++ 2012-03-12 Richard Guenther ++ * config/arm/arm.c (neon_dereference_pointer): Do not call ++ covert during RTL expansion. ++ ++2012-05-21 Michael Hope ++ ++ Backport from mainline r186859: ++ ++ gcc/ ++ 2012-04-26 Michael Hope ++ Richard Earnshaw ++ ++ * config/arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_SOFT_FLOAT): Define. ++ (GLIBC_DYNAMIC_LINKER_HARD_FLOAT): Define. ++ (GLIBC_DYNAMIC_LINKER_DEFAULT): Define. ++ (GLIBC_DYNAMIC_LINKER): Redefine to use the hard float path. ++ ++ Backport from mainline r187012: ++ ++ gcc/ ++ 2012-05-01 Richard Earnshaw ++ ++ * arm/linux-eabi.h (GLIBC_DYNAMIC_LINKER_DEFAULT): Avoid ifdef ++ comparing enumeration values. Update comments. ++ ++2012-05-15 Andrew Stubbs ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ ++2012-05-15 Andrew Stubbs ++ ++ GCC Linaro 4.6-2012.05 released. ++ ++ gcc/ ++ * LINARO-VERSION: Update. ++ ++2012-05-08 Andrew Stubbs ++ ++ Merge from FSF GCC 4.6.3 (svn branches/gcc-4_6-branch 187273). ++ ++2012-05-08 Ulrich Weigand ++ ++ LP 959242 ++ ++ Backport from mainline: ++ ++ 2012-05-04 Ulrich Weigand ++ ++ gcc/ ++ PR tree-optimization/52633 ++ * tree-vect-patterns.c (vect_vect_recog_func_ptrs): Swap order of ++ vect_recog_widen_shift_pattern and vect_recog_over_widening_pattern. ++ (vect_recog_over_widening_pattern): Remove handling of code that was ++ already detected as over-widening pattern. Remove special handling ++ of "unsigned" cases. Instead, support general case of conversion ++ of the shift result to another type. ++ ++ gcc/testsuite/ ++ PR tree-optimization/52633 ++ * gcc.target/arm/pr52633.c: New test. ++ ++ gcc/ ++ * tree-vect-patterns.c (vect_single_imm_use): New function. ++ (vect_recog_widen_mult_pattern): Use it instead of open-coding loop. ++ (vect_recog_over_widening_pattern): Likewise. ++ (vect_recog_widen_shift_pattern): Likewise. ++ ++ gcc/ ++ * tree-vect-patterns.c (vect_same_loop_or_bb_p): New function. ++ (vect_handle_widen_op_by_const): Use it instead of open-coding test. ++ (vect_recog_widen_mult_pattern): Likewise. ++ (vect_operation_fits_smaller_type): Likewise. ++ (vect_recog_over_widening_pattern): Likewise. ++ (vect_recog_widen_shift_pattern): Add to vect_same_loop_or_bb_p test. ++ ++2012-04-16 Ulrich Weigand ++ ++ LP 972648 ++ ++ Backport from mainline: ++ ++ 2011-08-23 Richard Guenther ++ ++ gcc/ ++ * Makefile.in (tree-data-ref.o): Add tree-affine.h dependency. ++ * tree-affine.h (aff_comb_cannot_overlap_p): Declare. ++ * tree-affine.c (aff_comb_cannot_overlap_p): New function, moved ++ from ... ++ * tree-ssa-loop-im.c (cannot_overlap_p): ... here. ++ (mem_refs_may_alias_p): Adjust. ++ * tree-data-ref.h (dr_may_alias_p): Adjust. ++ * tree-data-ref.c: Include tree-affine.h. ++ (dr_analyze_indices): Do nothing for the non-loop case. ++ (dr_may_alias_p): Distinguish loop and non-loop case. Disambiguate ++ more cases in the non-loop case. ++ * graphite-sese-to-poly.c (write_alias_graph_to_ascii_dimacs): Adjust ++ calls to dr_may_alias_p. ++ (write_alias_graph_to_ascii_ecc): Likewise. ++ (write_alias_graph_to_ascii_dot): Likewise. ++ (build_alias_set_optimal_p): Likewise. ++ ++2012-04-13 Ulrich Weigand ++ ++ LP 968766 ++ ++ Backport from mainline: ++ ++ gcc/ ++ PR tree-optimization/52870 ++ * tree-vect-patterns.c (vect_recog_widen_mult_pattern): Verify that ++ presumed pattern statement is within the same loop or basic block. ++ ++ gcc/testsuite/ ++ PR tree-optimization/52870 ++ * gcc.dg/vect/pr52870.c: New test. ++ ++2012-04-10 Andrew Stubbs ++ ++ gcc/ ++ * LINARO-VERSION: Bump version. ++ +2012-04-10 Andrew Stubbs + + GCC Linaro 4.6-2012.04 released. @@ -3525,358 +3959,6 @@ + * LINARO-VERSION: New file. + +Imported GCC from FSF trunk SVN revision 170067. ---- a/src/boehm-gc/ChangeLog -+++ b/src/boehm-gc/ChangeLog -@@ -1,3 +1,17 @@ -+2012-03-02 Jack Howarth -+ -+ Backport from mainline -+ 2012-02-23 Patrick Marlier -+ Jack Howarth -+ -+ PR boehm-gc/52179 -+ * include/gc_config.h.in: Undefine HAVE_PTHREAD_GET_STACKADDR_NP. -+ * include/private/gcconfig.h (DARWIN): Define STACKBOTTOM with -+ pthread_get_stackaddr_np when available. -+ * configure.ac (THREADS): Check availability of -+ pthread_get_stackaddr_np. -+ * configure: Regenerate. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/boehm-gc/configure -+++ b/src/boehm-gc/configure -@@ -15246,6 +15246,17 @@ - fi - done - -+for ac_func in pthread_get_stackaddr_np -+do : -+ ac_fn_c_check_func "$LINENO" "pthread_get_stackaddr_np" "ac_cv_func_pthread_get_stackaddr_np" -+if test "x$ac_cv_func_pthread_get_stackaddr_np" = x""yes; then : -+ cat >>confdefs.h <<_ACEOF -+#define HAVE_PTHREAD_GET_STACKADDR_NP 1 -+_ACEOF -+ -+fi -+done -+ - LIBS="$oldLIBS" - - # Configuration of machine-dependent code ---- a/src/boehm-gc/configure.ac -+++ b/src/boehm-gc/configure.ac -@@ -392,6 +392,7 @@ - oldLIBS="$LIBS" - LIBS="$LIBS $THREADLIBS" - AC_CHECK_FUNCS([pthread_getattr_np]) -+AC_CHECK_FUNCS([pthread_get_stackaddr_np]) - LIBS="$oldLIBS" - - # Configuration of machine-dependent code ---- a/src/boehm-gc/include/gc_config.h.in -+++ b/src/boehm-gc/include/gc_config.h.in -@@ -87,6 +87,9 @@ - /* Define to 1 if you have the `pthread_getattr_np' function. */ - #undef HAVE_PTHREAD_GETATTR_NP - -+/* Define to 1 if you have the `pthread_get_stackaddr_np_np' function. */ -+#undef HAVE_PTHREAD_GET_STACKADDR_NP -+ - /* Define to 1 if you have the header file. */ - #undef HAVE_STDINT_H - ---- a/src/boehm-gc/include/private/gcconfig.h -+++ b/src/boehm-gc/include/private/gcconfig.h -@@ -1331,7 +1331,11 @@ - These aren't used when dyld support is enabled (it is by default) */ - # define DATASTART ((ptr_t) get_etext()) - # define DATAEND ((ptr_t) get_end()) --# define STACKBOTTOM ((ptr_t) 0xc0000000) -+# ifdef HAVE_PTHREAD_GET_STACKADDR_NP -+# define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) -+# else -+# define STACKBOTTOM ((ptr_t) 0xc0000000) -+# endif - # define USE_MMAP - # define USE_MMAP_ANON - # define USE_ASM_PUSH_REGS -@@ -2011,7 +2015,11 @@ - These aren't used when dyld support is enabled (it is by default) */ - # define DATASTART ((ptr_t) get_etext()) - # define DATAEND ((ptr_t) get_end()) --# define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) -+# ifdef HAVE_PTHREAD_GET_STACKADDR_NP -+# define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) -+# else -+# define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) -+# endif - # define USE_MMAP - # define USE_MMAP_ANON - # ifdef GC_DARWIN_THREADS ---- a/src/gcc/ChangeLog -+++ b/src/gcc/ChangeLog -@@ -1,3 +1,203 @@ -+2012-03-29 Uros Bizjak -+ -+ * config/i386/sse.md (avx_hv4df3): Fix results -+ crossing 128bit lane boundary. -+ -+2012-03-29 Uros Bizjak -+ -+ Backported from mainline -+ 2012-03-27 Uros Bizjak -+ -+ PR target/52698 -+ * config/i386/i386-protos.h (ix86_legitimize_reload_address): -+ New prototype. -+ * config/i386/i386.h (LEGITIMIZE_RELOAD_ADDRESS): New define. -+ * config/i386/i386.c: Include reload.h. -+ (ix86_legitimize_reload_address): New function. -+ -+2012-03-28 Joey Ye -+ -+ Backported from mainline -+ 2011-12-20 Bernd Schmidt -+ -+ PR middle-end/51200 -+ * expr.c (store_field): Avoid a direct store if the mode is larger -+ than the size of the bit field. -+ * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields, -+ treat non-volatile bit fields like volatile ones. -+ * toplev.c (process_options): Disallow combination of -+ -fstrict-volatile-bitfields and ABI versions less than 2. -+ * config/arm/arm.c (arm_option_override): Don't enable -+ flag_strict_volatile_bitfields if the ABI version is less than 2. -+ * config/h8300/h8300.c (h8300_option_override): Likewise. -+ * config/rx/rx.c (rx_option_override): Likewise. -+ * config/m32c/m32c.c (m32c_option_override): Likewise. -+ * config/sh/sh.c (sh_option_override): Likewise. -+ -+ 2011-12-22 Joey Ye -+ -+ * toplev.c (process_options): Fix typo. -+ -+2012-03-28 Martin Jambor -+ -+ Backported from mainline -+ 2012-03-27 Martin Jambor -+ -+ PR middle-end/52693 -+ * tree-sra.c (sra_modify_assign): Do not call -+ load_assign_lhs_subreplacements when working with an unscalarizable -+ region. -+ -+2012-03-28 Georg-Johann Lay -+ -+ PR target/52741 -+ -+ Revert r181936 from 2011-12-02 for: -+ * config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__) -+ * config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on) -+ * config/avr/avr.c (output_movhi, avr_file_start) -+ -+2012-03-28 Jakub Jelinek -+ -+ PR target/52736 -+ * config/i386/sse.md (sse2_loadlpd splitter): Use offset 0 -+ instead of 8 in adjust_address. -+ -+2012-03-24 Jan Hubicka -+ -+ Backport from mainline -+ PR regression/52696 -+ * predict.c (predict_paths_for_bb): Fix typo. -+ -+2012-03-24 Jan Hubicka -+ -+ Backport from mainline -+ PR middle-end/51737 -+ * cgraph.c (cgraph_remove_node_and_inline_clones): Add FORBIDDEN_NODE -+ parameter. -+ * cgraph.h (cgraph_remove_node_and_inline_clones): Update prototype. -+ * ipa-inline-transform.c (save_inline_function_body): Remove copied -+ clone if needed. -+ * tree-inline.c (delete_unreachable_blocks_update_callgraph): Update. -+ -+2012-03-24 Steven Bosscher -+ -+ PR middle-end/52640 -+ * varasm.c: Include pointer-set.h. -+ (pending_assemble_externals_set): New pointer set. -+ (process_pending_assemble_externals): Destroy the pointer set. -+ (assemble_external): See if decl is in pending_assemble_externals_set, -+ and add it to pending_assemble_externals if necessary. -+ (init_varasm_once): Allocate pending_assemble_externals_set. -+ -+2012-03-16 Jan Hubicka -+ -+ Backport from mainline -+ PR middle-end/48600 -+ * predict.c (predict_paths_for_bb): Prevent looping. -+ (predict_paths_leading_to_edge, predict_paths_leading_to): Update. -+ -+2012-03-16 Michael Hope -+ -+ Backport from mainline -+ 2011-05-05 Michael Hope -+ -+ PR pch/45979 -+ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for -+ __ARM_EABI__ hosts. -+ -+2012-03-15 Chung-Lin Tang -+ -+ Backport from mainline -+ 2012-03-10 Chung-Lin Tang -+ -+ PR rtl-optimization/52528 -+ * combine.c (can_combine_p): Add setting of subst_low_luid -+ before call to expand_field_assignment(). -+ -+2012-03-12 John David Anglin -+ -+ Backport from mainline -+ 2011-09-03 John David Anglin -+ -+ PR Bug middle-end/50232 -+ * config/pa/pa.md (return): Define "return" insn pattern. -+ (epilogue): Use it when no epilogue is needed. -+ * config/pa/pa.c (pa_can_use_return_insn): New function. -+ * config/pa/pa-protos.h (pa_can_use_return_insn): Declare. -+ -+ Backport for mainline -+ 2012-01-28 John David Anglin -+ -+ PR target/51871 -+ * config/pa/pa.c (pa_return_addr_rtx): Add support for PA2.0 export -+ stubs. -+ -+2012-03-06 Michael Meissner -+ -+ Backport from mainline -+ PR target/50310 -+ * config/rs6000/vector.md (vector_uneq): Add support for -+ UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. -+ (vector_ltgt): Likewise. -+ (vector_ordered): Likewise. -+ (vector_unordered): Likewise. -+ * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. -+ -+2012-03-04 John David Anglin -+ -+ Backport from mainline -+ 2012-03-01 John David Anglin -+ -+ PR target/52408 -+ * config/pa/pa.md (zvdep_imm32): Change type of variable x from int to -+ unsigned HOST_WIDE_INT. -+ (zvdep_imm64): Likewise. -+ (vdepi_ior): Change type of variable x from int to HOST_WIDE_INT. -+ (vdepi_and): Likewise. -+ Likewise for unamed 64-bit patterns. -+ * config/pa/predicates.md (lhs_lshift_cint_operand): Update comment. -+ -+2012-03-03 Eric Botcazou -+ -+ PR target/52425 -+ Backport from mainline -+ 2011-05-22 Eric Botcazou -+ -+ * config/sparc/sparc.c (sparc_delegitimize_address): Handle -+ UNSPEC_MOVE_PIC pattern. -+ -+2012-03-02 Peter Bergner -+ -+ Backport from mainline -+ 2012-03-02 Peter Bergner -+ -+ * config/rs6000/vsx.md (vsx_set_): Reorder operands. -+ -+2012-03-02 Bill Schmidt -+ Ira Rosen -+ -+ PR tree-optimization/50031 -+ PR tree-optimization/50969 -+ * targhooks.c (default_builtin_vectorization_cost): Handle -+ vec_promote_demote. -+ * target.h (enum vect_cost_for_stmt): Add vec_promote_demote. -+ * tree-vect-loop.c (vect_get_single_scalar_iteraion_cost): Handle -+ all types of reduction and pattern statements. -+ (vect_estimate_min_profitable_iters): Likewise. -+ * tree-vect-stmts.c (vect_model_promotion_demotion_cost): New function. -+ (vect_model_store_cost): Use vec_perm rather than vector_stmt for -+ statement cost. -+ (vect_model_load_cost): Likewise. -+ (vect_get_load_cost): Likewise; add dump logic for explicit realigns. -+ (vectorizable_type_demotion): Call vect_model_promotion_demotion_cost. -+ (vectorizable_type_promotion): Likewise. -+ * config/spu/spu.c (spu_builtin_vectorization_cost): Handle -+ vec_promote_demote. -+ * config/i386/i386.c (ix86_builtin_vectorization_cost): Likewise. -+ * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Update -+ vec_perm for VSX and handle vec_promote_demote. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/gcc/DATESTAMP -+++ b/src/gcc/DATESTAMP -@@ -1 +1 @@ --20120301 -+20120402 ---- a/src/gcc/LINARO-VERSION -+++ b/src/gcc/LINARO-VERSION -@@ -0,0 +1 @@ -+4.6-2012.04 ---- a/src/gcc/Makefile.in -+++ b/src/gcc/Makefile.in -@@ -888,6 +888,8 @@ - READ_MD_H = $(OBSTACK_H) $(HASHTAB_H) read-md.h - PARAMS_H = params.h params.def - BUILTINS_DEF = builtins.def sync-builtins.def omp-builtins.def -+INTERNAL_FN_DEF = internal-fn.def -+INTERNAL_FN_H = internal-fn.h $(INTERNAL_FN_DEF) - TREE_H = tree.h all-tree.def tree.def c-family/c-common.def \ - $(lang_tree_files) $(MACHMODE_H) tree-check.h $(BUILTINS_DEF) \ - $(INPUT_H) statistics.h $(VEC_H) treestruct.def $(HASHTAB_H) \ -@@ -897,7 +899,7 @@ - BASIC_BLOCK_H = basic-block.h $(PREDICT_H) $(VEC_H) $(FUNCTION_H) cfghooks.h - GIMPLE_H = gimple.h gimple.def gsstruct.def pointer-set.h $(VEC_H) \ - $(GGC_H) $(BASIC_BLOCK_H) $(TARGET_H) tree-ssa-operands.h \ -- tree-ssa-alias.h vecir.h -+ tree-ssa-alias.h vecir.h $(INTERNAL_FN_H) - GCOV_IO_H = gcov-io.h gcov-iov.h auto-host.h - COVERAGE_H = coverage.h $(GCOV_IO_H) - DEMANGLE_H = $(srcdir)/../include/demangle.h -@@ -1269,6 +1271,7 @@ - init-regs.o \ - input.o \ - integrate.o \ -+ internal-fn.o \ - intl.o \ - ira.o \ - ira-build.o \ -@@ -2422,7 +2425,8 @@ - tree-ssa-phiopt.o : tree-ssa-phiopt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(GGC_H) $(TREE_H) $(TM_P_H) $(BASIC_BLOCK_H) \ - $(TREE_FLOW_H) $(TREE_PASS_H) $(TREE_DUMP_H) langhooks.h $(FLAGS_H) \ -- $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h -+ $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h $(CFGLOOP_H) \ -+ $(TREE_DATA_REF_H) - tree-nrv.o : tree-nrv.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - $(TM_H) $(TREE_H) $(FUNCTION_H) $(BASIC_BLOCK_H) $(FLAGS_H) \ - $(DIAGNOSTIC_H) $(TREE_FLOW_H) $(TIMEVAR_H) $(TREE_DUMP_H) $(TREE_PASS_H) \ -@@ -2750,6 +2754,8 @@ - $(TM_H) $(TREE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ - $(TREE_PASS_H) tree-ssa-propagate.h tree-pretty-print.h \ - gimple-pretty-print.h -+internal-fn.o : internal-fn.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ -+ $(GIMPLE_H) $(TREE_H) $(EXPR_H) $(OPTABS_H) $(RECOG_H) - gimple.o : gimple.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TREE_H) \ - $(GGC_H) $(GIMPLE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) gt-gimple.h \ - $(TREE_FLOW_H) value-prof.h $(FLAGS_H) $(DEMANGLE_H) \ --- a/src/gcc/builtins.c +++ b/src/gcc/builtins.c @@ -264,7 +264,14 @@ @@ -3987,74 +4069,6 @@ return NULL; /* Misc codes. */ ---- a/src/gcc/cgraph.c -+++ b/src/gcc/cgraph.c -@@ -1700,19 +1700,27 @@ - free_nodes = node; - } - --/* Remove the node from cgraph. */ -+/* Remove the node from cgraph and all inline clones inlined into it. -+ Skip however removal of FORBIDDEN_NODE and return true if it needs to be -+ removed. This allows to call the function from outer loop walking clone -+ tree. */ - --void --cgraph_remove_node_and_inline_clones (struct cgraph_node *node) -+bool -+cgraph_remove_node_and_inline_clones (struct cgraph_node *node, struct cgraph_node *forbidden_node) - { - struct cgraph_edge *e, *next; -+ bool found = false; -+ -+ if (node == forbidden_node) -+ return true; - for (e = node->callees; e; e = next) - { - next = e->next_callee; - if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ found |= cgraph_remove_node_and_inline_clones (e->callee, forbidden_node); - } - cgraph_remove_node (node); -+ return found; - } - - /* Notify finalize_compilation_unit that given node is reachable. */ ---- a/src/gcc/cgraph.h -+++ b/src/gcc/cgraph.h -@@ -547,7 +547,7 @@ - void cgraph_insert_node_to_hashtable (struct cgraph_node *node); - void cgraph_remove_edge (struct cgraph_edge *); - void cgraph_remove_node (struct cgraph_node *); --void cgraph_remove_node_and_inline_clones (struct cgraph_node *); -+bool cgraph_remove_node_and_inline_clones (struct cgraph_node *, struct cgraph_node *); - void cgraph_release_function_body (struct cgraph_node *); - void cgraph_node_remove_callees (struct cgraph_node *node); - struct cgraph_edge *cgraph_create_edge (struct cgraph_node *, ---- a/src/gcc/cgraphunit.c -+++ b/src/gcc/cgraphunit.c -@@ -2157,8 +2157,19 @@ - first_clone->ipa_transforms_to_apply); - first_clone->ipa_transforms_to_apply = NULL; - -+ /* When doing recursive inlining, the clone may become unnecessary. -+ This is possible i.e. in the case when the recursive function is proved to be -+ non-throwing and the recursion happens only in the EH landing pad. -+ We can not remove the clone until we are done with saving the body. -+ Remove it now. */ -+ if (!first_clone->callers) -+ { -+ cgraph_remove_node_and_inline_clones (first_clone, NULL); -+ first_clone = NULL; -+ } - #ifdef ENABLE_CHECKING -- verify_cgraph_node (first_clone); -+ else -+ verify_cgraph_node (first_clone); - #endif - return first_clone; - } --- a/src/gcc/combine.c +++ b/src/gcc/combine.c @@ -391,8 +391,8 @@ @@ -4068,18 +4082,7 @@ static rtx simplify_if_then_else (rtx); static rtx simplify_set (rtx); static rtx simplify_logical (rtx); -@@ -1788,6 +1788,10 @@ - if (set == 0) - return 0; - -+ /* The simplification in expand_field_assignment may call back to -+ get_last_value, so set safe guard here. */ -+ subst_low_luid = DF_INSN_LUID (insn); -+ - set = expand_field_assignment (set); - src = SET_SRC (set), dest = SET_DEST (set); - -@@ -3096,7 +3100,7 @@ +@@ -3130,7 +3130,7 @@ /* It is possible that the source of I2 or I1 may be performing an unneeded operation, such as a ZERO_EXTEND of something that is known to have the high part zero. Handle that case @@ -4088,7 +4091,7 @@ Another way to do this would be to have a function that tries to simplify a single insn instead of merging two or more -@@ -3119,13 +3123,11 @@ +@@ -3153,13 +3153,11 @@ if (i1) { subst_low_luid = DF_INSN_LUID (i1); @@ -4106,7 +4109,7 @@ } n_occurrences = 0; /* `subst' counts here */ -@@ -3136,7 +3138,7 @@ +@@ -3170,7 +3168,7 @@ self-referential RTL when we will be substituting I1SRC for I1DEST later. Likewise if I0 feeds into I2, either directly or indirectly through I1, and I0DEST is in I0SRC. */ @@ -4115,7 +4118,7 @@ (i1_feeds_i2_n && i1dest_in_i1src) || ((i0_feeds_i2_n || (i0_feeds_i1_n && i1_feeds_i2_n)) && i0dest_in_i0src)); -@@ -3180,7 +3182,7 @@ +@@ -3214,7 +3212,7 @@ copy of I1SRC each time we substitute it, in order to avoid creating self-referential RTL when we will be substituting I0SRC for I0DEST later. */ @@ -4124,7 +4127,7 @@ i0_feeds_i1_n && i0dest_in_i0src); substed_i1 = 1; -@@ -3214,7 +3216,7 @@ +@@ -3248,7 +3246,7 @@ n_occurrences = 0; subst_low_luid = DF_INSN_LUID (i0); @@ -4133,7 +4136,7 @@ substed_i0 = 1; } -@@ -3276,7 +3278,7 @@ +@@ -3310,7 +3308,7 @@ { rtx t = i1pat; if (i0_feeds_i1_n) @@ -4142,7 +4145,7 @@ XVECEXP (newpat, 0, --total_sets) = t; } -@@ -3284,10 +3286,10 @@ +@@ -3318,10 +3316,10 @@ { rtx t = i2pat; if (i1_feeds_i2_n) @@ -4155,7 +4158,7 @@ XVECEXP (newpat, 0, --total_sets) = t; } -@@ -4959,11 +4961,13 @@ +@@ -4998,11 +4996,13 @@ IN_DEST is nonzero if we are processing the SET_DEST of a SET. @@ -4170,7 +4173,7 @@ { enum rtx_code code = GET_CODE (x); enum machine_mode op0_mode = VOIDmode; -@@ -5024,7 +5028,7 @@ +@@ -5063,7 +5063,7 @@ && GET_CODE (XVECEXP (x, 0, 0)) == SET && GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == ASM_OPERANDS) { @@ -4179,7 +4182,7 @@ /* If this substitution failed, this whole thing fails. */ if (GET_CODE (new_rtx) == CLOBBER -@@ -5041,7 +5045,7 @@ +@@ -5080,7 +5080,7 @@ && GET_CODE (dest) != CC0 && GET_CODE (dest) != PC) { @@ -4188,7 +4191,7 @@ /* If this substitution failed, this whole thing fails. */ if (GET_CODE (new_rtx) == CLOBBER -@@ -5087,8 +5091,8 @@ +@@ -5126,8 +5126,8 @@ } else { @@ -4199,7 +4202,7 @@ /* If this substitution failed, this whole thing fails. */ -@@ -5165,7 +5169,9 @@ +@@ -5204,7 +5204,9 @@ && (code == SUBREG || code == STRICT_LOW_PART || code == ZERO_EXTRACT)) || code == SET) @@ -4210,7 +4213,7 @@ /* If we found that we will have to reject this combination, indicate that by returning the CLOBBER ourselves, rather than -@@ -5222,7 +5228,7 @@ +@@ -5261,7 +5263,7 @@ /* If X is sufficiently simple, don't bother trying to do anything with it. */ if (code != CONST_INT && code != REG && code != CLOBBER) @@ -4219,7 +4222,7 @@ if (GET_CODE (x) == code) break; -@@ -5242,10 +5248,12 @@ +@@ -5281,10 +5283,12 @@ expression. OP0_MODE is the original mode of XEXP (x, 0). IN_DEST is nonzero @@ -4234,7 +4237,7 @@ { enum rtx_code code = GET_CODE (x); enum machine_mode mode = GET_MODE (x); -@@ -5300,8 +5308,8 @@ +@@ -5339,8 +5343,8 @@ false arms to store-flag values. Be careful to use copy_rtx here since true_rtx or false_rtx might share RTL with x as a result of the if_then_else_cond call above. */ @@ -4245,7 +4248,7 @@ /* If true_rtx and false_rtx are not general_operands, an if_then_else is unlikely to be simpler. */ -@@ -5645,7 +5653,7 @@ +@@ -5684,7 +5688,7 @@ { /* Try to simplify the expression further. */ rtx tor = simplify_gen_binary (IOR, mode, XEXP (x, 0), XEXP (x, 1)); @@ -4254,7 +4257,7 @@ /* If we could, great. If not, do not go ahead with the IOR replacement, since PLUS appears in many special purpose -@@ -5738,7 +5746,16 @@ +@@ -5777,7 +5781,16 @@ ZERO_EXTRACT is indeed appropriate, it will be placed back by the call to make_compound_operation in the SET case. */ @@ -4272,7 +4275,7 @@ && new_code == NE && GET_MODE_CLASS (mode) == MODE_INT && op1 == const0_rtx && mode == GET_MODE (op0) -@@ -5784,7 +5801,10 @@ +@@ -5823,7 +5836,10 @@ /* If STORE_FLAG_VALUE is -1, we have cases similar to those above. */ @@ -4284,7 +4287,7 @@ && new_code == NE && GET_MODE_CLASS (mode) == MODE_INT && op1 == const0_rtx && (num_sign_bit_copies (op0, mode) -@@ -5982,11 +6002,11 @@ +@@ -6021,11 +6037,11 @@ if (reg_mentioned_p (from, true_rtx)) true_rtx = subst (known_cond (copy_rtx (true_rtx), true_code, from, true_val), @@ -4298,7 +4301,7 @@ SUBST (XEXP (x, 1), swapped ? false_rtx : true_rtx); SUBST (XEXP (x, 2), swapped ? true_rtx : false_rtx); -@@ -6203,11 +6223,11 @@ +@@ -6242,11 +6258,11 @@ { temp = subst (simplify_gen_relational (true_code, m, VOIDmode, cond_op0, cond_op1), @@ -4312,7 +4315,7 @@ temp = simplify_gen_binary (op, m, gen_lowpart (m, z), temp); if (extend_op != UNKNOWN) -@@ -6287,10 +6307,18 @@ +@@ -6326,10 +6342,18 @@ enum rtx_code new_code; rtx op0, op1, tmp; int other_changed = 0; @@ -4332,7 +4335,7 @@ else op0 = src, op1 = CONST0_RTX (GET_MODE (src)); -@@ -6332,6 +6360,12 @@ +@@ -6371,6 +6395,12 @@ need to use a different CC mode here. */ if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) compare_mode = GET_MODE (op0); @@ -4347,7 +4350,7 @@ --- a/src/gcc/common.opt +++ b/src/gcc/common.opt -@@ -1614,6 +1614,19 @@ +@@ -1617,6 +1617,19 @@ Common Report Var(flag_sched_pressure) Init(0) Optimization Enable register pressure sensitive insn scheduling @@ -4367,144 +4370,6 @@ fsched-spec Common Report Var(flag_schedule_speculative) Init(1) Optimization Allow speculative motion of non-loads ---- a/src/gcc/config/arm/arm-cores.def -+++ b/src/gcc/config/arm/arm-cores.def -@@ -70,10 +70,10 @@ - /* V4 Architecture Processors */ - ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) - ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) --ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) --ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) -+ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) -+ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) - ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul) - ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul) - -@@ -122,15 +122,19 @@ - ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) - ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) - ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) --ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e) --ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e) --ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e) --ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e) -+ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2) -+ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) -+ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex) -+ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) -+ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) -+ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) - ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) --ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, 9e) --ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e) --ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e) --ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e) --ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) --ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) --ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) -+ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) -+ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) -+ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) -+ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) -+ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex) -+ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex) -+ ---- a/src/gcc/config/arm/arm-protos.h -+++ b/src/gcc/config/arm/arm-protos.h -@@ -46,6 +46,7 @@ - extern bool arm_small_register_classes_for_mode_p (enum machine_mode); - extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode); - extern int const_ok_for_arm (HOST_WIDE_INT); -+extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); - extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx, - HOST_WIDE_INT, rtx, rtx, int); - extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *); -@@ -58,14 +59,19 @@ - int); - extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int, - int); -+extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int); - extern int arm_const_double_rtx (rtx); - extern int neg_const_double_rtx_ok_for_fpa (rtx); - extern int vfp3_const_double_rtx (rtx); - extern int neon_immediate_valid_for_move (rtx, enum machine_mode, rtx *, int *); - extern int neon_immediate_valid_for_logic (rtx, enum machine_mode, int, rtx *, - int *); -+extern int neon_immediate_valid_for_shift (rtx, enum machine_mode, rtx *, -+ int *, bool); - extern char *neon_output_logic_immediate (const char *, rtx *, - enum machine_mode, int, int); -+extern char *neon_output_shift_immediate (const char *, char, rtx *, -+ enum machine_mode, int, bool); - extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode, - rtx (*) (rtx, rtx, rtx)); - extern rtx neon_make_constant (rtx); -@@ -81,7 +87,6 @@ - extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx, - bool); - extern bool arm_tls_referenced_p (rtx); --extern bool arm_cannot_force_const_mem (rtx); - - extern int cirrus_memory_offset (rtx); - extern int arm_coproc_mem_operand (rtx, bool); -@@ -99,6 +104,7 @@ - extern int symbol_mentioned_p (rtx); - extern int label_mentioned_p (rtx); - extern RTX_CODE minmax_code (rtx); -+extern bool arm_sat_operator_match (rtx, rtx, int *, bool *); - extern int adjacent_mem_locations (rtx, rtx); - extern bool gen_ldm_seq (rtx *, int, bool); - extern bool gen_stm_seq (rtx *, int); -@@ -152,6 +158,7 @@ - extern const char *arm_output_memory_barrier (rtx *); - extern const char *arm_output_sync_insn (rtx, rtx *); - extern unsigned int arm_sync_loop_insns (rtx , rtx *); -+extern int arm_attr_length_push_multi(rtx, rtx); - - #if defined TREE_CODE - extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); -@@ -175,6 +182,7 @@ - #endif - extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); - #ifdef RTX_CODE -+extern enum arm_cond_code maybe_get_arm_condition_code (rtx); - extern void thumb1_final_prescan_insn (rtx); - extern void thumb2_final_prescan_insn (rtx); - extern const char *thumb_load_double_from_address (rtx *); -@@ -220,12 +228,18 @@ - bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool); - bool (*sched_adjust_cost) (rtx, rtx, rtx, int *); - int constant_limit; -+ /* Maximum number of instructions to conditionalise in -+ arm_final_prescan_insn. */ -+ int max_insns_skipped; - int num_prefetch_slots; - int l1_cache_size; - int l1_cache_line_size; -+ bool prefer_constant_pool; -+ int (*branch_cost) (bool, bool); - }; - - extern const struct tune_params *current_tune; -+extern int vfp3_const_double_for_fract_bits (rtx); - #endif /* RTX_CODE */ - - #endif /* ! GCC_ARM_PROTOS_H */ ---- a/src/gcc/config/arm/arm-tune.md -+++ b/src/gcc/config/arm/arm-tune.md -@@ -1,5 +1,5 @@ - ;; -*- buffer-read-only: t -*- - ;; Generated automatically by gentune.sh from arm-cores.def - (define_attr "tune" -- "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexm4,cortexm3,cortexm1,cortexm0" -+ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0" - (const (symbol_ref "((enum attr_tune) arm_tune)"))) --- a/src/gcc/config/arm/arm.c +++ b/src/gcc/config/arm/arm.c @@ -63,6 +63,11 @@ @@ -4567,8 +4432,8 @@ + unsigned HOST_WIDE_INT); static enum machine_mode arm_preferred_simd_mode (enum machine_mode); static bool arm_class_likely_spilled_p (reg_class_t); - static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); -@@ -250,6 +265,9 @@ + static HOST_WIDE_INT arm_vector_alignment (const_tree type); +@@ -251,6 +266,9 @@ bool is_packed); static void arm_conditional_register_usage (void); static reg_class_t arm_preferred_rename_class (reg_class_t rclass); @@ -4578,7 +4443,7 @@ /* Table of machine attributes. */ -@@ -293,6 +311,11 @@ +@@ -294,6 +312,11 @@ /* Set default optimization options. */ static const struct default_options arm_option_optimization_table[] = { @@ -4590,7 +4455,7 @@ /* Enable section anchors by default at -O1 or higher. */ { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 }, -@@ -393,8 +416,13 @@ +@@ -394,8 +417,13 @@ #define TARGET_SHIFT_TRUNCATION_MASK arm_shift_truncation_mask #undef TARGET_VECTOR_MODE_SUPPORTED_P #define TARGET_VECTOR_MODE_SUPPORTED_P arm_vector_mode_supported_p @@ -4604,7 +4469,7 @@ #undef TARGET_MACHINE_DEPENDENT_REORG #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg -@@ -403,6 +431,8 @@ +@@ -404,6 +432,8 @@ #define TARGET_INIT_BUILTINS arm_init_builtins #undef TARGET_EXPAND_BUILTIN #define TARGET_EXPAND_BUILTIN arm_expand_builtin @@ -4613,7 +4478,7 @@ #undef TARGET_INIT_LIBFUNCS #define TARGET_INIT_LIBFUNCS arm_init_libfuncs -@@ -519,6 +549,9 @@ +@@ -520,6 +550,9 @@ #undef TARGET_HAVE_CONDITIONAL_EXECUTION #define TARGET_HAVE_CONDITIONAL_EXECUTION arm_have_conditional_execution @@ -4623,7 +4488,7 @@ #undef TARGET_CANNOT_FORCE_CONST_MEM #define TARGET_CANNOT_FORCE_CONST_MEM arm_cannot_force_const_mem -@@ -659,12 +692,13 @@ +@@ -663,12 +696,13 @@ #define FL_THUMB2 (1 << 16) /* Thumb-2. */ #define FL_NOTM (1 << 17) /* Instructions not present in the 'M' profile. */ @@ -4638,7 +4503,7 @@ #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */ -@@ -691,8 +725,8 @@ +@@ -695,8 +729,8 @@ #define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM) #define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7) #define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K) @@ -4649,7 +4514,7 @@ #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM) /* The bits in this mask specify which -@@ -778,7 +812,8 @@ +@@ -782,7 +816,8 @@ int arm_arch_thumb2; /* Nonzero if chip supports integer division instruction. */ @@ -4659,7 +4524,7 @@ /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, we must report the mode of the memory reference from -@@ -851,48 +886,117 @@ +@@ -855,48 +890,117 @@ { arm_slowmul_rtx_costs, NULL, @@ -4789,7 +4654,7 @@ }; -@@ -1698,7 +1802,8 @@ +@@ -1702,7 +1806,8 @@ arm_tune_wbuf = (tune_flags & FL_WBUF) != 0; arm_tune_xscale = (tune_flags & FL_XSCALE) != 0; arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0; @@ -4799,7 +4664,7 @@ arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0; /* If we are not using the default (ARM mode) section anchor offset -@@ -1965,6 +2070,28 @@ +@@ -1969,6 +2074,28 @@ fix_cm3_ldrd = 0; } @@ -4828,7 +4693,7 @@ if (TARGET_THUMB1 && flag_schedule_insns) { /* Don't warn since it's on by default in -O2. */ -@@ -1978,12 +2105,7 @@ +@@ -1982,12 +2109,7 @@ max_insns_skipped = 6; } else @@ -4842,17 +4707,7 @@ /* Hot/Cold partitioning is not currently supported, since we can't handle literal pool placement in that case. */ -@@ -2005,7 +2127,8 @@ - global_options_set.x_param_values); - - /* ARM EABI defaults to strict volatile bitfields. */ -- if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0) -+ if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0 -+ && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - /* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed -@@ -2440,7 +2563,7 @@ +@@ -2445,7 +2567,7 @@ } /* Return true if I is a valid constant for the operation CODE. */ @@ -4861,7 +4716,7 @@ const_ok_for_op (HOST_WIDE_INT i, enum rtx_code code) { if (const_ok_for_arm (i)) -@@ -2448,7 +2571,21 @@ +@@ -2453,7 +2575,21 @@ switch (code) { @@ -4883,7 +4738,7 @@ case COMPARE: case EQ: case NE: -@@ -2564,68 +2701,41 @@ +@@ -2569,68 +2705,41 @@ 1); } @@ -4976,7 +4831,7 @@ } } -@@ -2652,13 +2762,161 @@ +@@ -2657,13 +2766,161 @@ the constant starting from `best_start', and also starting from zero (i.e. with bit 31 first to be output). If `best_start' doesn't yield a shorter sequence, we may as well use zero. */ @@ -5143,7 +4998,7 @@ } /* Emit an instruction with the indicated PATTERN. If COND is -@@ -2675,7 +2933,6 @@ +@@ -2680,7 +2937,6 @@ /* As above, but extra parameter GENERATE which, if clear, suppresses RTL generation. */ @@ -5151,7 +5006,7 @@ static int arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, -@@ -2687,15 +2944,15 @@ +@@ -2692,15 +2948,15 @@ int final_invert = 0; int can_negate_initial = 0; int i; @@ -5170,7 +5025,7 @@ /* Find out which operations are safe for a given CODE. Also do a quick check for degenerate cases; these can occur when DImode operations -@@ -2704,7 +2961,6 @@ +@@ -2709,7 +2965,6 @@ { case SET: can_invert = 1; @@ -5178,7 +5033,7 @@ break; case PLUS: -@@ -2732,9 +2988,6 @@ +@@ -2737,9 +2992,6 @@ gen_rtx_SET (VOIDmode, target, source)); return 1; } @@ -5188,7 +5043,7 @@ break; case AND: -@@ -2776,6 +3029,7 @@ +@@ -2781,6 +3033,7 @@ gen_rtx_NOT (mode, source))); return 1; } @@ -5196,7 +5051,7 @@ break; case MINUS: -@@ -2798,7 +3052,6 @@ +@@ -2803,7 +3056,6 @@ source))); return 1; } @@ -5204,7 +5059,7 @@ break; -@@ -2807,9 +3060,7 @@ +@@ -2812,9 +3064,7 @@ } /* If we can do it in one insn get out quickly. */ @@ -5215,7 +5070,7 @@ { if (generate) emit_constant_insn (cond, -@@ -2862,15 +3113,6 @@ +@@ -2867,15 +3117,6 @@ switch (code) { case SET: @@ -5231,7 +5086,7 @@ /* See if we can do this by sign_extending a constant that is known to be negative. This is a good, way of doing it, since the shift may well merge into a subsequent insn. */ -@@ -3221,121 +3463,97 @@ +@@ -3226,121 +3467,97 @@ break; } @@ -5429,7 +5284,7 @@ if (final_invert) { -@@ -4114,6 +4332,11 @@ +@@ -4119,6 +4336,11 @@ (TARGET_VFP_DOUBLE || !is_double)); } @@ -5441,7 +5296,7 @@ static bool aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, enum machine_mode mode, const_tree type, -@@ -4121,9 +4344,20 @@ +@@ -4126,9 +4348,20 @@ { enum machine_mode new_mode = VOIDmode; @@ -5465,7 +5320,7 @@ { *count = 1; new_mode = mode; -@@ -4133,15 +4367,6 @@ +@@ -4138,15 +4371,6 @@ *count = 2; new_mode = (mode == DCmode ? DFmode : SFmode); } @@ -5481,7 +5336,7 @@ else return false; -@@ -5933,7 +6158,7 @@ +@@ -5950,7 +6174,7 @@ addresses based on the frame pointer or arg pointer until the reload pass starts. This is so that eliminating such addresses into stack based ones won't produce impossible code. */ @@ -5490,7 +5345,7 @@ thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) { /* ??? Not clear if this is right. Experiment. */ -@@ -6415,31 +6640,159 @@ +@@ -6432,31 +6656,159 @@ int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -5667,7 +5522,7 @@ else return false; -@@ -6552,9 +6905,47 @@ +@@ -6569,9 +6921,47 @@ return for_each_rtx (&x, arm_tls_operand_p_1, NULL); } @@ -5716,7 +5571,7 @@ arm_cannot_force_const_mem (rtx x) { rtx base, offset; -@@ -7250,6 +7641,9 @@ +@@ -7267,6 +7657,9 @@ *total = COSTS_N_INSNS (4); return true; @@ -5726,7 +5581,7 @@ case UNSPEC: /* We cost this as high as our memory costs to allow this to be hoisted from loops. */ -@@ -7606,6 +8000,9 @@ +@@ -7623,6 +8016,9 @@ *total = COSTS_N_INSNS (1) + 1; return true; @@ -5736,7 +5591,7 @@ default: if (mode != VOIDmode) *total = COSTS_N_INSNS (ARM_NUM_REGS (mode)); -@@ -8186,6 +8583,21 @@ +@@ -8203,6 +8599,21 @@ return cost; } @@ -5758,7 +5613,7 @@ static int fp_consts_inited = 0; /* Only zero is valid for VFP. Other values are also valid for FPA. */ -@@ -8643,7 +9055,67 @@ +@@ -8660,7 +9071,67 @@ return 1; } @@ -5827,7 +5682,7 @@ MNEM. */ char * -@@ -8665,6 +9137,28 @@ +@@ -8682,6 +9153,28 @@ return templ; } @@ -5856,7 +5711,7 @@ /* Output a sequence of pairwise operations to implement a reduction. NOTE: We do "too much work" here, because pairwise operations work on two registers-worth of operands in one go. Unfortunately we can't exploit those -@@ -9137,6 +9631,11 @@ +@@ -9154,6 +9647,11 @@ if (GET_CODE (ind) == REG) return arm_address_register_rtx_p (ind, 0); @@ -5868,7 +5723,7 @@ return FALSE; } -@@ -9165,11 +9664,14 @@ +@@ -9182,11 +9680,14 @@ return GENERAL_REGS; } @@ -5886,7 +5741,7 @@ if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode)) return NO_REGS; -@@ -9484,6 +9986,42 @@ +@@ -9501,6 +10002,42 @@ } } @@ -5929,7 +5784,7 @@ /* Return 1 if memory locations are adjacent. */ int adjacent_mem_locations (rtx a, rtx b) -@@ -10363,6 +10901,335 @@ +@@ -10380,6 +10917,335 @@ return true; } @@ -6265,7 +6120,7 @@ int arm_gen_movmemqi (rtx *operands) { -@@ -10375,8 +11242,13 @@ +@@ -10392,8 +11258,13 @@ if (GET_CODE (operands[2]) != CONST_INT || GET_CODE (operands[3]) != CONST_INT @@ -6281,7 +6136,7 @@ return 0; dstbase = operands[0]; -@@ -10804,7 +11676,7 @@ +@@ -10821,7 +11692,7 @@ return CC_Zmode; /* We can do an equality test in three Thumb instructions. */ @@ -6290,7 +6145,7 @@ return CC_Zmode; /* FALLTHROUGH */ -@@ -10816,7 +11688,7 @@ +@@ -10833,7 +11704,7 @@ /* DImode unsigned comparisons can be implemented by cmp + cmpeq without a scratch register. Not worth doing in Thumb-2. */ @@ -6299,7 +6154,7 @@ return CC_CZmode; /* FALLTHROUGH */ -@@ -11465,6 +12337,19 @@ +@@ -11482,6 +12353,19 @@ return 0; } @@ -6319,7 +6174,7 @@ /* Move a minipool fix MP from its current location to before MAX_MP. If MAX_MP is NULL, then MP doesn't need moving, but the addressing constraints may need updating. */ -@@ -12011,8 +12896,12 @@ +@@ -12028,8 +12912,12 @@ within range. */ gcc_assert (GET_CODE (from) != BARRIER); @@ -6334,7 +6189,7 @@ /* If there is a jump table, add its length. */ tmp = is_jump_table (from); -@@ -12432,6 +13321,11 @@ +@@ -12449,6 +13337,11 @@ insn = table; } } @@ -6346,7 +6201,7 @@ } fix = minipool_fix_head; -@@ -16623,7 +17517,8 @@ +@@ -16640,7 +17533,8 @@ { rtx addr; bool postinc = FALSE; @@ -6356,7 +6211,7 @@ gcc_assert (GET_CODE (x) == MEM); addr = XEXP (x, 0); -@@ -16638,14 +17533,15 @@ +@@ -16655,14 +17549,15 @@ instruction (for some alignments) as an aid to the memory subsystem of the target. */ align = MEM_ALIGN (x) >> 3; @@ -6376,7 +6231,7 @@ align_bits = 64; else align_bits = 0; -@@ -16695,6 +17591,11 @@ +@@ -16712,6 +17607,11 @@ } return; @@ -6388,7 +6243,7 @@ /* Register specifier for vld1.16/vst1.16. Translate the S register number into a D register number and element index. */ case 'z': -@@ -17054,10 +17955,10 @@ +@@ -17071,10 +17971,10 @@ decremented/zeroed by arm_asm_output_opcode as the insns are output. */ /* Returns the index of the ARM condition code string in @@ -6403,7 +6258,7 @@ { enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); enum arm_cond_code code; -@@ -17081,11 +17982,11 @@ +@@ -17098,11 +17998,11 @@ case CC_DLTUmode: code = ARM_CC; dominance: @@ -6418,7 +6273,7 @@ case CC_NOOVmode: switch (comp_code) -@@ -17094,7 +17995,7 @@ +@@ -17111,7 +18011,7 @@ case EQ: return ARM_EQ; case GE: return ARM_PL; case LT: return ARM_MI; @@ -6427,7 +6282,7 @@ } case CC_Zmode: -@@ -17102,7 +18003,7 @@ +@@ -17119,7 +18019,7 @@ { case NE: return ARM_NE; case EQ: return ARM_EQ; @@ -6436,7 +6291,7 @@ } case CC_Nmode: -@@ -17110,7 +18011,7 @@ +@@ -17127,7 +18027,7 @@ { case NE: return ARM_MI; case EQ: return ARM_PL; @@ -6445,7 +6300,7 @@ } case CCFPEmode: -@@ -17135,7 +18036,7 @@ +@@ -17152,7 +18052,7 @@ /* UNEQ and LTGT do not have a representation. */ case UNEQ: /* Fall through. */ case LTGT: /* Fall through. */ @@ -6454,7 +6309,7 @@ } case CC_SWPmode: -@@ -17151,7 +18052,7 @@ +@@ -17168,7 +18068,7 @@ case GTU: return ARM_CC; case LEU: return ARM_CS; case LTU: return ARM_HI; @@ -6463,7 +6318,7 @@ } case CC_Cmode: -@@ -17159,7 +18060,7 @@ +@@ -17176,7 +18076,7 @@ { case LTU: return ARM_CS; case GEU: return ARM_CC; @@ -6472,7 +6327,7 @@ } case CC_CZmode: -@@ -17171,7 +18072,7 @@ +@@ -17188,7 +18088,7 @@ case GTU: return ARM_HI; case LEU: return ARM_LS; case LTU: return ARM_CC; @@ -6481,7 +6336,7 @@ } case CC_NCVmode: -@@ -17181,7 +18082,7 @@ +@@ -17198,7 +18098,7 @@ case LT: return ARM_LT; case GEU: return ARM_CS; case LTU: return ARM_CC; @@ -6490,7 +6345,7 @@ } case CCmode: -@@ -17197,13 +18098,22 @@ +@@ -17214,13 +18114,22 @@ case GTU: return ARM_HI; case LEU: return ARM_LS; case LTU: return ARM_CC; @@ -6514,7 +6369,7 @@ /* Tell arm_asm_output_opcode to output IT blocks for conditionally executed instructions. */ void -@@ -17815,920 +18725,612 @@ +@@ -17832,920 +18741,612 @@ return value; } @@ -8017,11 +7872,21 @@ intQI_pointer_node = build_pointer_type (neon_intQI_type_node); intHI_pointer_node = build_pointer_type (neon_intHI_type_node); -@@ -18863,264 +19465,752 @@ +@@ -18880,264 +19481,752 @@ qreg_types[3] = V4SF_type_node; qreg_types[4] = V2DI_type_node; - for (i = 0; i < 5; i++) +- { +- int j; +- for (j = 0; j < 5; j++) +- { +- reinterp_ftype_dreg[i][j] +- = build_function_type_list (dreg_types[i], dreg_types[j], NULL); +- reinterp_ftype_qreg[i][j] +- = build_function_type_list (qreg_types[i], qreg_types[j], NULL); +- } +- } + for (i = 0; i < 5; i++) + { + int j; @@ -8592,7 +8457,8 @@ + tree_cons (NULL_TREE, + V4HI_type_node, + endlink)))); -+ + +- for (i = 0; i < ARRAY_SIZE (neon_builtin_data); i++) + tree di_ftype_v4hi_v4hi + = build_function_type (long_long_unsigned_type_node, + tree_cons (NULL_TREE, V4HI_type_node, @@ -8626,33 +8492,13 @@ + operands. */ + for (i = 0, d = bdesc_2arg; i < ARRAY_SIZE (bdesc_2arg); i++, d++) { -- int j; -- for (j = 0; j < 5; j++) -- { -- reinterp_ftype_dreg[i][j] -- = build_function_type_list (dreg_types[i], dreg_types[j], NULL); -- reinterp_ftype_qreg[i][j] -- = build_function_type_list (qreg_types[i], qreg_types[j], NULL); -- } -- } -+ /* Use one of the operands; the target can have a different mode for -+ mask-generating compares. */ -+ enum machine_mode mode; -+ tree type; - -- for (i = 0; i < ARRAY_SIZE (neon_builtin_data); i++) -- { - neon_builtin_datum *d = &neon_builtin_data[i]; - unsigned int j, codeidx = 0; -+ if (d->name == 0) -+ continue; - +- - d->base_fcode = fcode; -+ mode = insn_data[d->icode].operand[1].mode; - +- - for (j = 0; j < T_MAX; j++) -+ switch (mode) - { +- { - const char* const modenames[] = { - "v8qi", "v4hi", "v2si", "v2sf", "di", - "v16qi", "v8hi", "v4si", "v4sf", "v2di" @@ -8792,7 +8638,11 @@ - case T_V2DI: - eltype = intDI_pointer_node; - break; -- ++ /* Use one of the operands; the target can have a different mode for ++ mask-generating compares. */ ++ enum machine_mode mode; ++ tree type; + - default: gcc_unreachable (); - } - } @@ -8826,16 +8676,21 @@ - default: gcc_unreachable (); - } - } -- ++ if (d->name == 0) ++ continue; + - if (k == 0 && !is_store) - return_type = eltype; - else - args = tree_cons (NULL_TREE, eltype, args); - } -- ++ mode = insn_data[d->icode].operand[1].mode; + - ftype = build_function_type (return_type, args); - } - break; ++ switch (mode) ++ { + case V8QImode: + type = v8qi_ftype_v8qi_v8qi; + break; @@ -9017,7 +8872,7 @@ } static void -@@ -19147,6 +20237,17 @@ +@@ -19164,6 +20253,17 @@ arm_init_fp16_builtins (); } @@ -9035,7 +8890,7 @@ /* Implement TARGET_INVALID_PARAMETER_TYPE. */ static const char * -@@ -19298,55 +20399,68 @@ +@@ -19315,55 +20415,68 @@ return target; } @@ -9128,9 +8983,9 @@ + /* Create a type that describes the full access. */ + upper_bound = build_int_cst (size_type_node, nelems - 1); + array_type = build_array_type (elem_type, build_index_type (upper_bound)); -+ + /* Dereference EXP using that type. */ -+ exp = convert (build_pointer_type (array_type), exp); ++ exp = fold_convert (build_pointer_type (array_type), exp); ++ + return fold_build2 (MEM_REF, array_type, exp, + build_int_cst (TREE_TYPE (exp), 0)); +} @@ -9142,7 +8997,7 @@ tree exp, ...) { va_list ap; -@@ -19355,7 +20469,9 @@ +@@ -19372,7 +20485,9 @@ rtx op[NEON_MAX_BUILTIN_ARGS]; enum machine_mode tmode = insn_data[icode].operand[0].mode; enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; @@ -9152,7 +9007,7 @@ if (have_retval && (!target -@@ -19373,26 +20489,46 @@ +@@ -19390,26 +20505,46 @@ break; else { @@ -9202,7 +9057,7 @@ case NEON_ARG_STOP: gcc_unreachable (); } -@@ -19470,15 +20606,17 @@ +@@ -19487,15 +20622,17 @@ static rtx arm_expand_neon_builtin (int fcode, tree exp, rtx target) { @@ -9223,7 +9078,7 @@ NEON_ARG_COPY_TO_REG, NEON_ARG_CONSTANT, NEON_ARG_STOP); case NEON_BINOP: -@@ -19488,90 +20626,90 @@ +@@ -19505,90 +20642,90 @@ case NEON_SCALARMULH: case NEON_SHIFTINSERT: case NEON_LOGICBINOP: @@ -9334,7 +9189,7 @@ NEON_ARG_STOP); } -@@ -21484,6 +22622,8 @@ +@@ -21501,6 +22638,8 @@ const char *fpu_name; if (arm_selected_arch) asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name); @@ -9343,7 +9198,7 @@ else asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_selected_cpu->name); -@@ -21547,6 +22687,10 @@ +@@ -21564,6 +22703,10 @@ val = 6; asm_fprintf (asm_out_file, "\t.eabi_attribute 30, %d\n", val); @@ -9354,7 +9209,7 @@ /* Tag_ABI_FP_16bit_format. */ if (arm_fp16_format) asm_fprintf (asm_out_file, "\t.eabi_attribute 38, %d\n", -@@ -22290,7 +23434,21 @@ +@@ -22307,7 +23450,21 @@ return false; } @@ -9377,7 +9232,7 @@ registers when autovectorizing for Neon, at least until multiple vector widths are supported properly by the middle-end. */ -@@ -22301,15 +23459,15 @@ +@@ -22318,15 +23475,15 @@ switch (mode) { case SFmode: @@ -9398,7 +9253,7 @@ return V2DImode; break; -@@ -22334,14 +23492,16 @@ +@@ -22351,14 +23508,16 @@ /* Implement TARGET_CLASS_LIKELY_SPILLED_P. @@ -9420,7 +9275,7 @@ || rclass == CC_REG) return true; -@@ -22993,8 +24153,13 @@ +@@ -23010,8 +24169,13 @@ { switch (arm_tune) { @@ -9434,7 +9289,7 @@ case cortexa5: case cortexa8: case cortexa9: -@@ -23247,12 +24412,26 @@ +@@ -23264,12 +24428,26 @@ rtx target, rtx memory) { @@ -9465,7 +9320,7 @@ } /* Emit a strex{b,h,d, } instruction appropriate for the specified -@@ -23265,14 +24444,41 @@ +@@ -23282,14 +24460,41 @@ rtx value, rtx memory) { @@ -9512,7 +9367,7 @@ } /* Helper to emit a two operand instruction. */ -@@ -23314,7 +24520,7 @@ +@@ -23331,7 +24536,7 @@ required_value: @@ -9521,7 +9376,7 @@ the modify to continue, if NULL no comparsion is performed. */ static void arm_output_sync_loop (emit_f emit, -@@ -23328,7 +24534,13 @@ +@@ -23345,7 +24550,13 @@ enum attr_sync_op sync_op, int early_barrier_required) { @@ -9536,7 +9391,7 @@ gcc_assert (t1 != t2); -@@ -23339,82 +24551,142 @@ +@@ -23356,82 +24567,142 @@ arm_output_ldrex (emit, mode, old_value, memory); @@ -9700,20 +9555,7 @@ break; default: -@@ -23422,8 +24694,11 @@ - } - } - -- arm_process_output_memory_barrier (emit, NULL); -+ /* Note: label is before barrier so that in cmp failure case we still get -+ a barrier to stop subsequent loads floating upwards past the ldrex -+ PR target/48126. */ - arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX); -+ arm_process_output_memory_barrier (emit, NULL); - } - - static rtx -@@ -23517,7 +24792,7 @@ +@@ -23537,7 +24808,7 @@ target = gen_reg_rtx (mode); memory = arm_legitimize_sync_memory (memory); @@ -9722,7 +9564,7 @@ { rtx load_temp = gen_reg_rtx (SImode); -@@ -23536,6 +24811,12 @@ +@@ -23556,6 +24827,12 @@ } } @@ -9735,7 +9577,7 @@ static bool arm_vector_alignment_reachable (const_tree type, bool is_packed) { -@@ -23689,4 +24970,53 @@ +@@ -23709,4 +24986,53 @@ return NO_REGS; } @@ -9789,6 +9631,54 @@ + #include "gt-arm.h" + +--- a/src/gcc/config/arm/arm-cores.def ++++ b/src/gcc/config/arm/arm-cores.def +@@ -70,10 +70,10 @@ + /* V4 Architecture Processors */ + ARM_CORE("arm8", arm8, 4, FL_MODE26 | FL_LDSCHED, fastmul) + ARM_CORE("arm810", arm810, 4, FL_MODE26 | FL_LDSCHED, fastmul) +-ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +-ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +-ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) +-ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, fastmul) ++ARM_CORE("strongarm", strongarm, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) ++ARM_CORE("strongarm110", strongarm110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) ++ARM_CORE("strongarm1100", strongarm1100, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) ++ARM_CORE("strongarm1110", strongarm1110, 4, FL_MODE26 | FL_LDSCHED | FL_STRONG, strongarm) + ARM_CORE("fa526", fa526, 4, FL_LDSCHED, fastmul) + ARM_CORE("fa626", fa626, 4, FL_LDSCHED, fastmul) + +@@ -122,15 +122,19 @@ + ARM_CORE("arm1176jzf-s", arm1176jzfs, 6ZK, FL_LDSCHED | FL_VFPV2, 9e) + ARM_CORE("mpcorenovfp", mpcorenovfp, 6K, FL_LDSCHED, 9e) + ARM_CORE("mpcore", mpcore, 6K, FL_LDSCHED | FL_VFPV2, 9e) +-ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, 9e) +-ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, 9e) +-ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, 9e) +-ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, 9e) ++ARM_CORE("arm1156t2-s", arm1156t2s, 6T2, FL_LDSCHED, v6t2) ++ARM_CORE("arm1156t2f-s", arm1156t2fs, 6T2, FL_LDSCHED | FL_VFPV2, v6t2) ++ARM_CORE("generic-armv7-a", genericv7a, 7A, FL_LDSCHED, cortex) ++ARM_CORE("cortex-a5", cortexa5, 7A, FL_LDSCHED, cortex_a5) ++ARM_CORE("cortex-a7", cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) ++ARM_CORE("cortex-a8", cortexa8, 7A, FL_LDSCHED, cortex) + ARM_CORE("cortex-a9", cortexa9, 7A, FL_LDSCHED, cortex_a9) +-ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED, 9e) +-ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, 9e) +-ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, 9e) +-ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, 9e) +-ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, 9e) +-ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, 9e) +-ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, 9e) ++ARM_CORE("cortex-a15", cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex) ++ARM_CORE("cortex-r4", cortexr4, 7R, FL_LDSCHED, cortex) ++ARM_CORE("cortex-r4f", cortexr4f, 7R, FL_LDSCHED, cortex) ++ARM_CORE("cortex-r5", cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) ++ARM_CORE("cortex-m4", cortexm4, 7EM, FL_LDSCHED, cortex) ++ARM_CORE("cortex-m3", cortexm3, 7M, FL_LDSCHED, cortex) ++ARM_CORE("cortex-m1", cortexm1, 6M, FL_LDSCHED, cortex) ++ARM_CORE("cortex-m0", cortexm0, 6M, FL_LDSCHED, cortex) ++ --- a/src/gcc/config/arm/arm.h +++ b/src/gcc/config/arm/arm.h @@ -47,6 +47,8 @@ @@ -9827,17 +9717,7 @@ /* We could use unified syntax for arm mode, but for now we just use it for Thumb-2. */ -@@ -294,7 +300,8 @@ - #define TARGET_HAVE_DMB (arm_arch7) - - /* Nonzero if this chip implements a memory barrier via CP15. */ --#define TARGET_HAVE_DMB_MCR (arm_arch6k && ! TARGET_HAVE_DMB) -+#define TARGET_HAVE_DMB_MCR (arm_arch6 && ! TARGET_HAVE_DMB \ -+ && ! TARGET_THUMB1) - - /* Nonzero if this chip implements a memory barrier instruction. */ - #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR) -@@ -302,8 +309,16 @@ +@@ -303,8 +309,16 @@ /* Nonzero if this chip supports ldrex and strex */ #define TARGET_HAVE_LDREX ((arm_arch6 && TARGET_ARM) || arm_arch7) @@ -9856,7 +9736,7 @@ /* True iff the full BPABI is being used. If TARGET_BPABI is true, then TARGET_AAPCS_BASED must be true -- but the converse does not -@@ -489,8 +504,11 @@ +@@ -490,8 +504,11 @@ /* Nonzero if chip supports Thumb 2. */ extern int arm_arch_thumb2; @@ -9870,7 +9750,7 @@ #ifndef TARGET_DEFAULT #define TARGET_DEFAULT (MASK_APCS_FRAME) -@@ -1171,12 +1189,12 @@ +@@ -1172,12 +1189,12 @@ } /* FPA registers can't do subreg as all values are reformatted to internal @@ -9889,7 +9769,7 @@ : 0) /* The class value for index registers, and the one for base regs. */ -@@ -1187,7 +1205,7 @@ +@@ -1188,7 +1205,7 @@ when addressing quantities in QI or HI mode; if we don't know the mode, then we must be conservative. */ #define MODE_BASE_REG_CLASS(MODE) \ @@ -9898,7 +9778,7 @@ (((MODE) == SImode) ? BASE_REGS : LO_REGS)) /* For Thumb we can not support SP+reg addressing, so we return LO_REGS -@@ -1777,27 +1795,6 @@ +@@ -1778,27 +1795,6 @@ #define TARGET_DEFAULT_WORD_RELOCATIONS 0 #endif @@ -9926,7 +9806,7 @@ #ifndef SUBTARGET_NAME_ENCODING_LENGTHS #define SUBTARGET_NAME_ENCODING_LENGTHS #endif -@@ -1972,7 +1969,7 @@ +@@ -1973,7 +1969,7 @@ : min >= -4096 && max < 4096 \ ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \ : SImode) \ @@ -9935,7 +9815,7 @@ : (max >= 0x200) ? HImode \ : QImode)) -@@ -2041,7 +2038,8 @@ +@@ -2042,7 +2038,8 @@ /* Try to generate sequences that don't involve branches, we can then use conditional instructions */ #define BRANCH_COST(speed_p, predictable_p) \ @@ -9945,7 +9825,7 @@ /* Position Independent Code. */ /* We decide which register to use based on the compilation options and -@@ -2279,178 +2277,6 @@ +@@ -2280,178 +2277,6 @@ : arm_gen_return_addr_mask ()) @@ -10124,7 +10004,7 @@ /* Do not emit .note.GNU-stack by default. */ #ifndef NEED_INDICATE_EXEC_STACK #define NEED_INDICATE_EXEC_STACK 0 -@@ -2460,4 +2286,25 @@ +@@ -2461,4 +2286,25 @@ instruction. */ #define MAX_LDM_STM_OPS 4 @@ -11558,6 +11438,96 @@ +munaligned-access +Target Report Var(unaligned_access) Init(2) +Enable unaligned word and halfword accesses to packed data. +--- a/src/gcc/config/arm/arm-protos.h ++++ b/src/gcc/config/arm/arm-protos.h +@@ -46,6 +46,7 @@ + extern bool arm_small_register_classes_for_mode_p (enum machine_mode); + extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode); + extern int const_ok_for_arm (HOST_WIDE_INT); ++extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); + extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx, + HOST_WIDE_INT, rtx, rtx, int); + extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *); +@@ -58,14 +59,19 @@ + int); + extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int, + int); ++extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int); + extern int arm_const_double_rtx (rtx); + extern int neg_const_double_rtx_ok_for_fpa (rtx); + extern int vfp3_const_double_rtx (rtx); + extern int neon_immediate_valid_for_move (rtx, enum machine_mode, rtx *, int *); + extern int neon_immediate_valid_for_logic (rtx, enum machine_mode, int, rtx *, + int *); ++extern int neon_immediate_valid_for_shift (rtx, enum machine_mode, rtx *, ++ int *, bool); + extern char *neon_output_logic_immediate (const char *, rtx *, + enum machine_mode, int, int); ++extern char *neon_output_shift_immediate (const char *, char, rtx *, ++ enum machine_mode, int, bool); + extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode, + rtx (*) (rtx, rtx, rtx)); + extern rtx neon_make_constant (rtx); +@@ -81,7 +87,6 @@ + extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx, + bool); + extern bool arm_tls_referenced_p (rtx); +-extern bool arm_cannot_force_const_mem (rtx); + + extern int cirrus_memory_offset (rtx); + extern int arm_coproc_mem_operand (rtx, bool); +@@ -99,6 +104,7 @@ + extern int symbol_mentioned_p (rtx); + extern int label_mentioned_p (rtx); + extern RTX_CODE minmax_code (rtx); ++extern bool arm_sat_operator_match (rtx, rtx, int *, bool *); + extern int adjacent_mem_locations (rtx, rtx); + extern bool gen_ldm_seq (rtx *, int, bool); + extern bool gen_stm_seq (rtx *, int); +@@ -152,6 +158,7 @@ + extern const char *arm_output_memory_barrier (rtx *); + extern const char *arm_output_sync_insn (rtx, rtx *); + extern unsigned int arm_sync_loop_insns (rtx , rtx *); ++extern int arm_attr_length_push_multi(rtx, rtx); + + #if defined TREE_CODE + extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); +@@ -175,6 +182,7 @@ + #endif + extern int thumb_shiftable_const (unsigned HOST_WIDE_INT); + #ifdef RTX_CODE ++extern enum arm_cond_code maybe_get_arm_condition_code (rtx); + extern void thumb1_final_prescan_insn (rtx); + extern void thumb2_final_prescan_insn (rtx); + extern const char *thumb_load_double_from_address (rtx *); +@@ -220,12 +228,18 @@ + bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool); + bool (*sched_adjust_cost) (rtx, rtx, rtx, int *); + int constant_limit; ++ /* Maximum number of instructions to conditionalise in ++ arm_final_prescan_insn. */ ++ int max_insns_skipped; + int num_prefetch_slots; + int l1_cache_size; + int l1_cache_line_size; ++ bool prefer_constant_pool; ++ int (*branch_cost) (bool, bool); + }; + + extern const struct tune_params *current_tune; ++extern int vfp3_const_double_for_fract_bits (rtx); + #endif /* RTX_CODE */ + + #endif /* ! GCC_ARM_PROTOS_H */ +--- a/src/gcc/config/arm/arm-tune.md ++++ b/src/gcc/config/arm/arm-tune.md +@@ -1,5 +1,5 @@ + ;; -*- buffer-read-only: t -*- + ;; Generated automatically by gentune.sh from arm-cores.def + (define_attr "tune" +- "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexm4,cortexm3,cortexm1,cortexm0" ++ "arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,fa526,fa626,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,fa606te,fa626te,fmp626,fa726te,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,genericv7a,cortexa5,cortexa7,cortexa8,cortexa9,cortexa15,cortexr4,cortexr4f,cortexr5,cortexm4,cortexm3,cortexm1,cortexm0" + (const (symbol_ref "((enum attr_tune) arm_tune)"))) --- a/src/gcc/config/arm/bpabi.h +++ b/src/gcc/config/arm/bpabi.h @@ -56,7 +56,9 @@ @@ -12338,17 +12308,45 @@ SYNC_LOCK_RELEASE (int, 4) SYNC_LOCK_RELEASE (short, 2) SYNC_LOCK_RELEASE (char, 1) ---- a/src/gcc/config/arm/neon-testgen.ml -+++ b/src/gcc/config/arm/neon-testgen.ml -@@ -177,7 +177,7 @@ - let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in - "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" - | (PtrTo elt | CstPtrTo elt) -> -- "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]" -+ "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]" - | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" - | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" - | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" +--- a/src/gcc/config/arm/linux-eabi.h ++++ b/src/gcc/config/arm/linux-eabi.h +@@ -32,7 +32,8 @@ + while (false) + + /* We default to a soft-float ABI so that binaries can run on all +- target hardware. */ ++ target hardware. If you override this to use the hard-float ABI then ++ change the setting of GLIBC_DYNAMIC_LINKER_DEFAULT as well. */ + #undef TARGET_DEFAULT_FLOAT_ABI + #define TARGET_DEFAULT_FLOAT_ABI ARM_FLOAT_ABI_SOFT + +@@ -59,10 +60,23 @@ + #undef SUBTARGET_EXTRA_LINK_SPEC + #define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION + +-/* Use ld-linux.so.3 so that it will be possible to run "classic" +- GNU/Linux binaries on an EABI system. */ ++/* GNU/Linux on ARM currently supports three dynamic linkers: ++ - ld-linux.so.2 - for the legacy ABI ++ - ld-linux.so.3 - for the EABI-derived soft-float ABI ++ - ld-linux-armhf.so.3 - for the EABI-derived hard-float ABI. ++ All the dynamic linkers live in /lib. ++ We default to soft-float, but this can be overridden by changing both ++ GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI. */ ++ + #undef GLIBC_DYNAMIC_LINKER +-#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3" ++#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3" ++#define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT ++ ++#define GLIBC_DYNAMIC_LINKER \ ++ "%{mfloat-abi=hard:" GLIBC_DYNAMIC_LINKER_HARD_FLOAT "} \ ++ %{mfloat-abi=soft*:" GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "} \ ++ %{!mfloat-abi=*:" GLIBC_DYNAMIC_LINKER_DEFAULT "}" + + /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to + use the GNU/Linux version, not the generic BPABI version. */ --- a/src/gcc/config/arm/neon.md +++ b/src/gcc/config/arm/neon.md @@ -783,30 +783,57 @@ @@ -13912,6 +13910,17 @@ + (const_string "neon_fp_vadd_qqq_vabs_qq")) + (const_string "neon_int_5")))] +) +--- a/src/gcc/config/arm/neon-testgen.ml ++++ b/src/gcc/config/arm/neon-testgen.ml +@@ -177,7 +177,7 @@ + let alt2 = commas (fun x -> x) (n_things n elt_regexp) "" in + "\\\\\\{((" ^ alt1 ^ ")|(" ^ alt2 ^ "))\\\\\\}" + | (PtrTo elt | CstPtrTo elt) -> +- "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\\\\\]" ++ "\\\\\\[" ^ (analyze_shape_elt elt) ^ "\\(:\\[0-9\\]+\\)?\\\\\\]" + | Element_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" + | Element_of_qreg -> (analyze_shape_elt Qreg) ^ "\\\\\\[\\[0-9\\]+\\\\\\]" + | All_elements_of_dreg -> (analyze_shape_elt Dreg) ^ "\\\\\\[\\\\\\]" --- a/src/gcc/config/arm/predicates.md +++ b/src/gcc/config/arm/predicates.md @@ -129,11 +129,18 @@ @@ -14768,13 +14777,6 @@ $(srcdir)/config/arm/cirrus.md \ $(srcdir)/config/arm/fpa.md \ $(srcdir)/config/arm/vec-common.md \ ---- a/src/gcc/config/arm/t-linux-eabi -+++ b/src/gcc/config/arm/t-linux-eabi -@@ -36,3 +36,4 @@ - EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o - - LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic.c -+LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic-64bit.c --- a/src/gcc/config/arm/thumb2.md +++ b/src/gcc/config/arm/thumb2.md @@ -207,7 +207,9 @@ @@ -14879,6 +14881,13 @@ + FAIL; +}") + +--- a/src/gcc/config/arm/t-linux-eabi ++++ b/src/gcc/config/arm/t-linux-eabi +@@ -41,3 +41,4 @@ + EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o + + LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic.c ++LIB2FUNCS_STATIC_EXTRA += $(srcdir)/config/arm/linux-atomic-64bit.c --- a/src/gcc/config/arm/unwind-arm.c +++ b/src/gcc/config/arm/unwind-arm.c @@ -32,13 +32,18 @@ @@ -15097,517 +15106,20 @@ +driver-arm.o: $(srcdir)/config/arm/driver-arm.c \ + $(CONFIG_H) $(SYSTEM_H) + $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $< ---- a/src/gcc/config/avr/avr.c -+++ b/src/gcc/config/avr/avr.c -@@ -1879,12 +1879,9 @@ - } - else if (test_hard_reg_class (STACK_REG, src)) - { -- *l = 2; -- return AVR_HAVE_8BIT_SP -- ? (AS2 (in,%A0,__SP_L__) CR_TAB -- AS1 (clr,%B0)) -- : (AS2 (in,%A0,__SP_L__) CR_TAB -- AS2 (in,%B0,__SP_H__)); -+ *l = 2; -+ return (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS2 (in,%B0,__SP_H__)); - } - - if (AVR_HAVE_MOVW) -@@ -5177,10 +5174,9 @@ - - default_file_start (); - -- fputs ("__SREG__ = 0x3f\n", asm_out_file); -- if (!AVR_HAVE_8BIT_SP) -- fputs ("__SP_H__ = 0x3e\n", asm_out_file); -- fputs ("__SP_L__ = 0x3d\n", asm_out_file); -+ fputs ("__SREG__ = 0x3f\n" -+ "__SP_H__ = 0x3e\n" -+ "__SP_L__ = 0x3d\n", asm_out_file); - - fputs ("__tmp_reg__ = 0\n" - "__zero_reg__ = 1\n", asm_out_file); ---- a/src/gcc/config/avr/avr.md -+++ b/src/gcc/config/avr/avr.md -@@ -299,7 +299,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_OFF))] -- "!AVR_HAVE_8BIT_SP" -+ "" - "out __SP_H__, %B1 - out __SP_L__, %A1" - [(set_attr "length" "2") -@@ -309,7 +309,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_ON))] -- "!AVR_HAVE_8BIT_SP" -+ "" - "cli - out __SP_H__, %B1 - sei ---- a/src/gcc/config/avr/libgcc.S -+++ b/src/gcc/config/avr/libgcc.S -@@ -582,15 +582,6 @@ - push r17 - push r28 - push r29 --#if defined (__AVR_HAVE_8BIT_SP__) --;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level --;; so this lines are dead code. To make it work, devices without --;; SP_H must get their own multilib(s), see PR51345. -- in r28,__SP_L__ -- sub r28,r26 -- clr r29 -- out __SP_L__,r28 --#else - in r28,__SP_L__ - in r29,__SP_H__ - sub r28,r26 -@@ -600,7 +591,6 @@ - out __SP_H__,r29 - out __SREG__,__tmp_reg__ - out __SP_L__,r28 --#endif - #if defined (__AVR_HAVE_EIJMP_EICALL__) - eijmp - #else -@@ -635,15 +625,6 @@ - ldd r16,Y+4 - ldd r17,Y+3 - ldd r26,Y+2 --#if defined (__AVR_HAVE_8BIT_SP__) --;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level --;; so this lines are dead code. To make it work, devices without --;; SP_H must get their own multilib(s). -- ldd r29,Y+1 -- add r28,r30 -- out __SP_L__,r28 -- mov r28, r26 --#else - ldd r27,Y+1 - add r28,r30 - adc r29,__zero_reg__ -@@ -654,7 +635,6 @@ - out __SP_L__,r28 - mov_l r28, r26 - mov_h r29, r27 --#endif - ret - .endfunc - #endif /* defined (L_epilogue) */ ---- a/src/gcc/config/h8300/h8300.c -+++ b/src/gcc/config/h8300/h8300.c -@@ -416,7 +416,7 @@ - } - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - } - --- a/src/gcc/config/host-linux.c +++ b/src/gcc/config/host-linux.c -@@ -84,6 +84,8 @@ - # define TRY_EMPTY_VM_SPACE 0x60000000 +@@ -85,7 +85,7 @@ #elif defined(__mc68000__) # define TRY_EMPTY_VM_SPACE 0x40000000 -+#elif defined(__ARM_EABI__) + #elif defined(__ARM_EABI__) +-# define TRY_EMPTY_VM_SPACE 0x60000000 +# define TRY_EMPTY_VM_SPACE 0x60000000 #else # define TRY_EMPTY_VM_SPACE 0 #endif ---- a/src/gcc/config/i386/i386-protos.h -+++ b/src/gcc/config/i386/i386-protos.h -@@ -59,7 +59,8 @@ - extern bool constant_address_p (rtx); - extern bool legitimate_pic_operand_p (rtx); - extern bool legitimate_pic_address_disp_p (rtx); -- -+extern bool ix86_legitimize_reload_address (rtx, enum machine_mode, -+ int, int, int); - extern void print_reg (rtx, int, FILE*); - extern void ix86_print_operand (FILE *, rtx, int); - ---- a/src/gcc/config/i386/i386.c -+++ b/src/gcc/config/i386/i386.c -@@ -46,6 +46,7 @@ - #include "target.h" - #include "target-def.h" - #include "langhooks.h" -+#include "reload.h" - #include "cgraph.h" - #include "gimple.h" - #include "dwarf2.h" -@@ -12168,6 +12169,64 @@ - return false; - } - -+/* Our implementation of LEGITIMIZE_RELOAD_ADDRESS. Returns a value to -+ replace the input X, or the original X if no replacement is called for. -+ The output parameter *WIN is 1 if the calling macro should goto WIN, -+ 0 if it should not. */ -+ -+bool -+ix86_legitimize_reload_address (rtx x, -+ enum machine_mode mode ATTRIBUTE_UNUSED, -+ int opnum, int type, -+ int ind_levels ATTRIBUTE_UNUSED) -+{ -+ /* Reload can generate: -+ -+ (plus:DI (plus:DI (unspec:DI [(const_int 0 [0])] UNSPEC_TP) -+ (reg:DI 97)) -+ (reg:DI 2 cx)) -+ -+ This RTX is rejected from ix86_legitimate_address_p due to -+ non-strictness of base register 97. Following this rejection, -+ reload pushes all three components into separate registers, -+ creating invalid memory address RTX. -+ -+ Following code reloads only the invalid part of the -+ memory address RTX. */ -+ -+ if (GET_CODE (x) == PLUS -+ && REG_P (XEXP (x, 1)) -+ && GET_CODE (XEXP (x, 0)) == PLUS -+ && REG_P (XEXP (XEXP (x, 0), 1))) -+ { -+ rtx base, index; -+ bool something_reloaded = false; -+ -+ base = XEXP (XEXP (x, 0), 1); -+ if (!REG_OK_FOR_BASE_STRICT_P (base)) -+ { -+ push_reload (base, NULL_RTX, &XEXP (XEXP (x, 0), 1), NULL, -+ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, -+ opnum, (enum reload_type)type); -+ something_reloaded = true; -+ } -+ -+ index = XEXP (x, 1); -+ if (!REG_OK_FOR_INDEX_STRICT_P (index)) -+ { -+ push_reload (index, NULL_RTX, &XEXP (x, 1), NULL, -+ INDEX_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, -+ opnum, (enum reload_type)type); -+ something_reloaded = true; -+ } -+ -+ gcc_assert (something_reloaded); -+ return true; -+ } -+ -+ return false; -+} -+ - /* Recognizes RTL expressions that are valid memory addresses for an - instruction. The MODE argument is the machine mode for the MEM - expression that wants to use this address. -@@ -32823,7 +32882,8 @@ - return ix86_cost->cond_not_taken_branch_cost; - - case vec_perm: -- return 1; -+ case vec_promote_demote: -+ return ix86_cost->vec_stmt_cost; - - default: - gcc_unreachable (); ---- a/src/gcc/config/i386/i386.h -+++ b/src/gcc/config/i386/i386.h -@@ -1668,6 +1668,17 @@ - - #define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) - -+/* Try a machine-dependent way of reloading an illegitimate address -+ operand. If we find one, push the reload and jump to WIN. This -+ macro is used in only one place: `find_reloads_address' in reload.c. */ -+ -+#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, INDL, WIN) \ -+do { \ -+ if (ix86_legitimize_reload_address ((X), (MODE), (OPNUM), \ -+ (int)(TYPE), (INDL))) \ -+ goto WIN; \ -+} while (0) -+ - /* If defined, a C expression to determine the base term of address X. - This macro is used in only one place: `find_base_term' in alias.c. - ---- a/src/gcc/config/i386/sse.md -+++ b/src/gcc/config/i386/sse.md -@@ -1324,14 +1324,14 @@ - (parallel [(const_int 0)])) - (vec_select:DF (match_dup 1) (parallel [(const_int 1)]))) - (plusminus:DF -- (vec_select:DF (match_dup 1) (parallel [(const_int 2)])) -- (vec_select:DF (match_dup 1) (parallel [(const_int 3)])))) -- (vec_concat:V2DF -- (plusminus:DF - (vec_select:DF - (match_operand:V4DF 2 "nonimmediate_operand" "xm") - (parallel [(const_int 0)])) -- (vec_select:DF (match_dup 2) (parallel [(const_int 1)]))) -+ (vec_select:DF (match_dup 2) (parallel [(const_int 1)])))) -+ (vec_concat:V2DF -+ (plusminus:DF -+ (vec_select:DF (match_dup 1) (parallel [(const_int 2)])) -+ (vec_select:DF (match_dup 1) (parallel [(const_int 3)]))) - (plusminus:DF - (vec_select:DF (match_dup 2) (parallel [(const_int 2)])) - (vec_select:DF (match_dup 2) (parallel [(const_int 3)]))))))] -@@ -5058,7 +5058,7 @@ - (vec_select:DF (match_dup 0) (parallel [(const_int 1)]))))] - "TARGET_SSE2 && reload_completed" - [(set (match_dup 0) (match_dup 1))] -- "operands[0] = adjust_address (operands[0], DFmode, 8);") -+ "operands[0] = adjust_address (operands[0], DFmode, 0);") - - ;; Not sure these two are ever used, but it doesn't hurt to have - ;; them. -aoliva ---- a/src/gcc/config/m32c/m32c.c -+++ b/src/gcc/config/m32c/m32c.c -@@ -447,7 +447,7 @@ - flag_ivopts = 0; - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - /* r8c/m16c have no 16-bit indirect call, so thunks are involved. ---- a/src/gcc/config/pa/pa-protos.h -+++ b/src/gcc/config/pa/pa-protos.h -@@ -136,6 +136,7 @@ - extern int cint_ok_for_move (HOST_WIDE_INT); - extern void hppa_expand_prologue (void); - extern void hppa_expand_epilogue (void); -+extern bool pa_can_use_return_insn (void); - extern int ior_mask_p (unsigned HOST_WIDE_INT); - extern void compute_zdepdi_operands (unsigned HOST_WIDE_INT, - unsigned *); ---- a/src/gcc/config/pa/pa.c -+++ b/src/gcc/config/pa/pa.c -@@ -4442,6 +4442,24 @@ - } - } - -+bool -+pa_can_use_return_insn (void) -+{ -+ if (!reload_completed) -+ return false; -+ -+ if (frame_pointer_needed) -+ return false; -+ -+ if (df_regs_ever_live_p (2)) -+ return false; -+ -+ if (crtl->profile) -+ return false; -+ -+ return compute_frame_size (get_frame_size (), 0) == 0; -+} -+ - rtx - hppa_pic_save_rtx (void) - { -@@ -4586,7 +4604,7 @@ - rtx saved_rp; - rtx ins; - -- /* Instruction stream at the normal return address for the export stub: -+ /* The instruction stream at the return address of a PA1.X export stub is: - - 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp - 0x004010a1 | stub+12: ldsid (sr0,rp),r1 -@@ -4594,10 +4612,16 @@ - 0xe0400002 | stub+20: be,n 0(sr0,rp) - - 0xe0400002 must be specified as -532676606 so that it won't be -- rejected as an invalid immediate operand on 64-bit hosts. */ -+ rejected as an invalid immediate operand on 64-bit hosts. - -- HOST_WIDE_INT insns[4] = {0x4bc23fd1, 0x004010a1, 0x00011820, -532676606}; -- int i; -+ The instruction stream at the return address of a PA2.0 export stub is: -+ -+ 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp -+ 0xe840d002 | stub+12: bve,n (rp) -+ */ -+ -+ HOST_WIDE_INT insns[4]; -+ int i, len; - - if (count != 0) - return NULL_RTX; -@@ -4620,11 +4644,26 @@ - ins = copy_to_reg (gen_rtx_AND (Pmode, rp, MASK_RETURN_ADDR)); - label = gen_label_rtx (); - -+ if (TARGET_PA_20) -+ { -+ insns[0] = 0x4bc23fd1; -+ insns[1] = -398405630; -+ len = 2; -+ } -+ else -+ { -+ insns[0] = 0x4bc23fd1; -+ insns[1] = 0x004010a1; -+ insns[2] = 0x00011820; -+ insns[3] = -532676606; -+ len = 4; -+ } -+ - /* Check the instruction stream at the normal return address for the - export stub. If it is an export stub, than our return address is - really in -24[frameaddr]. */ - -- for (i = 0; i < 3; i++) -+ for (i = 0; i < len; i++) - { - rtx op0 = gen_rtx_MEM (SImode, plus_constant (ins, i * 4)); - rtx op1 = GEN_INT (insns[i]); ---- a/src/gcc/config/pa/pa.md -+++ b/src/gcc/config/pa/pa.md -@@ -6348,7 +6348,7 @@ - "" - "* - { -- int x = INTVAL (operands[1]); -+ unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); - operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); - operands[1] = GEN_INT ((x & 0xf) - 0x10); - return \"{zvdepi %1,%2,%0|depwi,z %1,%%sar,%2,%0}\"; -@@ -6366,7 +6366,7 @@ - "exact_log2 (INTVAL (operands[1]) + 1) > 0" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 (x + 1)); - return \"{vdepi -1,%2,%0|depwi -1,%%sar,%2,%0}\"; - }" -@@ -6383,7 +6383,7 @@ - "INTVAL (operands[1]) == -2" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 ((~x) + 1)); - return \"{vdepi 0,%2,%0|depwi 0,%%sar,%2,%0}\"; - }" -@@ -6447,7 +6447,7 @@ - "TARGET_64BIT" - "* - { -- int x = INTVAL (operands[1]); -+ unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); - operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); - operands[1] = GEN_INT ((x & 0x1f) - 0x20); - return \"depdi,z %1,%%sar,%2,%0\"; -@@ -6465,7 +6465,7 @@ - "TARGET_64BIT && exact_log2 (INTVAL (operands[1]) + 1) > 0" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 (x + 1)); - return \"depdi -1,%%sar,%2,%0\"; - }" -@@ -6482,7 +6482,7 @@ - "TARGET_64BIT && INTVAL (operands[1]) == -2" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 ((~x) + 1)); - return \"depdi 0,%%sar,%2,%0\"; - }" -@@ -6671,6 +6671,20 @@ - - ;; Unconditional and other jump instructions. - -+;; Trivial return used when no epilogue is needed. -+(define_insn "return" -+ [(return) -+ (use (reg:SI 2))] -+ "pa_can_use_return_insn ()" -+ "* -+{ -+ if (TARGET_PA_20) -+ return \"bve%* (%%r2)\"; -+ return \"bv%* %%r0(%%r2)\"; -+}" -+ [(set_attr "type" "branch") -+ (set_attr "length" "4")]) -+ - ;; This is used for most returns. - (define_insn "return_internal" - [(return) -@@ -6719,11 +6733,8 @@ - rtx x; - - /* Try to use the trivial return first. Else use the full epilogue. */ -- if (reload_completed -- && !frame_pointer_needed -- && !df_regs_ever_live_p (2) -- && (compute_frame_size (get_frame_size (), 0) ? 0 : 1)) -- x = gen_return_internal (); -+ if (pa_can_use_return_insn ()) -+ x = gen_return (); - else - { - hppa_expand_epilogue (); ---- a/src/gcc/config/pa/predicates.md -+++ b/src/gcc/config/pa/predicates.md -@@ -421,9 +421,9 @@ - (ior (match_operand 0 "register_operand") - (match_operand 0 "cint_ior_operand"))) - --;; True iff OP is a CONST_INT of the forms 0...0xxxx or --;; 0...01...1xxxx. Such values can be the left hand side x in (x << --;; r), using the zvdepi instruction. -+;; True iff OP is a CONST_INT of the forms 0...0xxxx, 0...01...1xxxx, -+;; or 1...1xxxx. Such values can be the left hand side x in (x << r), -+;; using the zvdepi instruction. - - (define_predicate "lhs_lshift_cint_operand" - (match_code "const_int") --- a/src/gcc/config/rs6000/rs6000.c +++ b/src/gcc/config/rs6000/rs6000.c -@@ -3695,12 +3695,23 @@ - case vec_to_scalar: - case scalar_to_vec: - case cond_branch_not_taken: -- case vec_perm: - return 1; - - case cond_branch_taken: - return 3; - -+ case vec_perm: -+ if (TARGET_VSX) -+ return 4; -+ else -+ return 1; -+ -+ case vec_promote_demote: -+ if (TARGET_VSX) -+ return 5; -+ else -+ return 1; -+ - case unaligned_load: - if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN) - { -@@ -5135,7 +5146,9 @@ +@@ -5146,7 +5146,9 @@ for (i = 0; i < n_elts; ++i) { x = XVECEXP (vals, 0, i); @@ -15618,7 +15130,7 @@ ++n_var; } if (n_var == 0) -@@ -5287,7 +5300,9 @@ +@@ -5298,7 +5300,9 @@ for (i = 0; i < n_elts; ++i) { x = XVECEXP (vals, 0, i); @@ -15629,187 +15141,38 @@ ++n_var, one_var = i; else if (x != CONST0_RTX (inner_mode)) all_const_zero = false; -@@ -17229,6 +17244,10 @@ - case EQ: - case GT: - case GTU: -+ case ORDERED: -+ case UNORDERED: -+ case UNEQ: -+ case LTGT: - mask = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (VOIDmode, - mask, ---- a/src/gcc/config/rs6000/vector.md -+++ b/src/gcc/config/rs6000/vector.md -@@ -448,6 +448,94 @@ - "VECTOR_UNIT_ALTIVEC_P (mode)" - "") - -+(define_insn_and_split "*vector_uneq" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (uneq:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (gt:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (gt:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (not:VEC_F (ior:VEC_F (match_dup 3) -+ (match_dup 4))))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_ltgt" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (ltgt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (gt:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (gt:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (ior:VEC_F (match_dup 3) -+ (match_dup 4)))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_ordered" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (ordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (ge:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (ge:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (ior:VEC_F (match_dup 3) -+ (match_dup 4)))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_unordered" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (unordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (ge:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (ge:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (not:VEC_F (ior:VEC_F (match_dup 3) -+ (match_dup 4))))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ - ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask - ;; which is in the reverse order that we want - (define_expand "vector_select_" ---- a/src/gcc/config/rs6000/vsx.md -+++ b/src/gcc/config/rs6000/vsx.md -@@ -1006,9 +1006,9 @@ - "VECTOR_MEM_VSX_P (mode)" - { - if (INTVAL (operands[3]) == 0) -- return \"xxpermdi %x0,%x1,%x2,1\"; -+ return \"xxpermdi %x0,%x2,%x1,1\"; - else if (INTVAL (operands[3]) == 1) -- return \"xxpermdi %x0,%x2,%x1,0\"; -+ return \"xxpermdi %x0,%x1,%x2,0\"; - else - gcc_unreachable (); - } ---- a/src/gcc/config/rx/rx.c -+++ b/src/gcc/config/rx/rx.c -@@ -2348,7 +2348,7 @@ - rx_option_override (void) - { - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - rx_override_options_after_change (); ---- a/src/gcc/config/sh/sh.c -+++ b/src/gcc/config/sh/sh.c -@@ -1018,7 +1018,7 @@ - sh_fix_range (sh_fixed_range_str); - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - } - ---- a/src/gcc/config/sparc/sparc.c -+++ b/src/gcc/config/sparc/sparc.c -@@ -3658,13 +3658,17 @@ - { - x = delegitimize_mem_from_attrs (x); - -- if (GET_CODE (x) == LO_SUM -- && GET_CODE (XEXP (x, 1)) == UNSPEC -- && XINT (XEXP (x, 1), 1) == UNSPEC_TLSLE) -- { -- x = XVECEXP (XEXP (x, 1), 0, 0); -- gcc_assert (GET_CODE (x) == SYMBOL_REF); -- } -+ if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 1)) == UNSPEC) -+ switch (XINT (XEXP (x, 1), 1)) -+ { -+ case UNSPEC_MOVE_PIC: -+ case UNSPEC_TLSLE: -+ x = XVECEXP (XEXP (x, 1), 0, 0); -+ gcc_assert (GET_CODE (x) == SYMBOL_REF); -+ break; -+ default: -+ break; -+ } - - return x; - } ---- a/src/gcc/config/spu/spu.c -+++ b/src/gcc/config/spu/spu.c -@@ -6794,6 +6794,7 @@ - case scalar_to_vec: - case cond_branch_not_taken: - case vec_perm: -+ case vec_promote_demote: - return 1; - - case scalar_store: +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -177,7 +177,12 @@ + # configure_default_options + # Set to an initializer for configure_default_options + # in configargs.h, based on --with-cpu et cetera. +- ++# ++# target_type_format_char ++# The default character to be used for formatting ++# the attribute in a ++# .type symbol_name, ${t_t_f_c} ++# directive. + # The following variables are used in each case-construct to build up the + # outgoing variables: + # +@@ -219,6 +224,7 @@ + target_gtfiles= + need_64bit_hwint= + need_64bit_isa= ++target_type_format_char='@' + + # Don't carry these over build->host->target. Please. + xm_file= +@@ -312,6 +318,7 @@ + arm*-*-*) + cpu_type=arm + extra_headers="mmintrin.h arm_neon.h" ++ target_type_format_char='%' + c_target_objs="arm-c.o" + cxx_target_objs="arm-c.o" + ;; --- a/src/gcc/config.host +++ b/src/gcc/config.host @@ -100,6 +100,14 @@ @@ -15829,7 +15192,7 @@ alpha*-*-linux*) --- a/src/gcc/configure +++ b/src/gcc/configure -@@ -1647,7 +1647,8 @@ +@@ -1652,7 +1652,8 @@ use sysroot as the system root during the build --with-sysroot=DIR Search for usr/lib, usr/include, et al, within DIR. --with-specs=SPECS add SPECS to driver command-line processing @@ -15839,7 +15202,7 @@ --with-bugurl=URL Direct users to URL to report a bug --with-multilib-list Select multilibs (SH only) --with-gnu-ld assume the C compiler uses GNU ld default=no -@@ -7129,7 +7130,7 @@ +@@ -7161,7 +7162,7 @@ *) PKGVERSION="($withval) " ;; esac else @@ -15848,27 +15211,46 @@ fi -@@ -17495,7 +17496,7 @@ +@@ -17527,7 +17528,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF --#line 17498 "configure" -+#line 17499 "configure" +-#line 17530 "configure" ++#line 17531 "configure" #include "confdefs.h" #if HAVE_DLFCN_H -@@ -17601,7 +17602,7 @@ +@@ -17633,7 +17634,7 @@ lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF --#line 17604 "configure" -+#line 17605 "configure" +-#line 17636 "configure" ++#line 17637 "configure" #include "confdefs.h" #if HAVE_DLFCN_H +@@ -25259,7 +25260,7 @@ + then gcc_cv_as_gnu_unique_object=yes + fi + elif test x$gcc_cv_as != x; then +- echo '.type foo, @gnu_unique_object' > conftest.s ++ echo '.type foo, '$target_type_format_char'gnu_unique_object' > conftest.s + if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5' + { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 + (eval $ac_try) 2>&5 +@@ -25278,7 +25279,8 @@ + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_gnu_unique_object" >&5 + $as_echo "$gcc_cv_as_gnu_unique_object" >&6; } + if test $gcc_cv_as_gnu_unique_object = yes; then +- # Also check for ld.so support, i.e. glibc 2.11 or higher. ++ # We need to unquote above to to use the definition from config.gcc. ++# Also check for ld.so support, i.e. glibc 2.11 or higher. + if test x$host = x$build -a x$host = x$target && + ldd --version 2>/dev/null && + glibcver=`ldd --version 2>/dev/null | sed 's/.* //;q'`; then --- a/src/gcc/configure.ac +++ b/src/gcc/configure.ac -@@ -760,7 +760,7 @@ +@@ -782,7 +782,7 @@ ) AC_SUBST(CONFIGURE_SPECS) @@ -15877,6 +15259,16 @@ ACX_BUGURL([http://gcc.gnu.org/bugs.html]) # Sanity check enable_languages in case someone does not run the toplevel +@@ -3945,7 +3945,8 @@ + esac], + [gcc_GAS_CHECK_FEATURE([gnu_unique_object], gcc_cv_as_gnu_unique_object, + [elf,2,19,52],, +- [.type foo, @gnu_unique_object],, ++ [.type foo, '$target_type_format_char'gnu_unique_object],, ++# We need to unquote above to to use the definition from config.gcc. + # Also check for ld.so support, i.e. glibc 2.11 or higher. + [[if test x$host = x$build -a x$host = x$target && + ldd --version 2>/dev/null && --- a/src/gcc/cp/typeck2.c +++ b/src/gcc/cp/typeck2.c @@ -479,18 +479,20 @@ @@ -16153,58 +15545,6 @@ && !df_ignore_stack_reg (mws->start_regno)) { bool really_add_notes = debug_insn != 0; ---- a/src/gcc/doc/tm.texi.in -+++ b/src/gcc/doc/tm.texi.in -@@ -2521,7 +2521,7 @@ - register, so @code{TARGET_PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead - of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go -@@ -2558,8 +2558,8 @@ - register, so @code{PREFERRED_RELOAD_CLASS} returns @code{NO_REGS} when - @var{x} is a floating-point constant. If the constant can't be loaded - into any kind of register, code generation will be better if --@code{LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead --of using @code{PREFERRED_RELOAD_CLASS}. -+@code{TARGET_LEGITIMATE_CONSTANT_P} makes the constant illegitimate instead -+of using @code{TARGET_PREFERRED_RELOAD_CLASS}. - - If an insn has pseudos in it after register allocation, reload will go - through the alternatives and call repeatedly @code{PREFERRED_RELOAD_CLASS} -@@ -4305,6 +4305,8 @@ - must have move patterns for this mode. - @end deftypefn - -+@hook TARGET_ARRAY_MODE_SUPPORTED_P -+ - @hook TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P - Define this to return nonzero for machine modes for which the port has - small register classes. If this target hook returns nonzero for a given -@@ -5555,13 +5557,13 @@ - @code{TARGET_MODE_DEPENDENT_ADDRESS_P} target hook. - @end defmac - --@defmac LEGITIMATE_CONSTANT_P (@var{x}) --A C expression that is nonzero if @var{x} is a legitimate constant for --an immediate operand on the target machine. You can assume that --@var{x} satisfies @code{CONSTANT_P}, so you need not check this. In fact, --@samp{1} is a suitable definition for this macro on machines where --anything @code{CONSTANT_P} is valid. --@end defmac -+@hook TARGET_LEGITIMATE_CONSTANT_P -+This hook returns true if @var{x} is a legitimate constant for a -+@var{mode}-mode immediate operand on the target machine. You can assume that -+@var{x} satisfies @code{CONSTANT_P}, so you need not check this. -+ -+The default definition returns true. -+@end deftypefn - - @hook TARGET_DELEGITIMIZE_ADDRESS - This hook is used to undo the possibly obfuscating effects of the --- a/src/gcc/dojump.c +++ b/src/gcc/dojump.c @@ -36,6 +36,7 @@ @@ -16803,16 +16143,7 @@ return nz_elts == 0; } -@@ -5971,6 +5993,8 @@ - || bitpos % GET_MODE_ALIGNMENT (mode)) - && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))) - || (bitpos % BITS_PER_UNIT != 0))) -+ || (bitsize >= 0 && mode != BLKmode -+ && GET_MODE_BITSIZE (mode) > bitsize) - /* If the RHS and field are a constant size and the size of the - RHS isn't the same size as the bitfield, we must use bitfield - operations. */ -@@ -7803,18 +7827,16 @@ +@@ -7805,18 +7827,16 @@ { enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); this_optab = usmul_widen_optab; @@ -16840,7 +16171,7 @@ } } /* Check for a multiplication with matching signedness. */ -@@ -7829,10 +7851,10 @@ +@@ -7831,10 +7851,10 @@ optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; @@ -16854,7 +16185,7 @@ { expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); -@@ -7840,7 +7862,8 @@ +@@ -7842,7 +7862,8 @@ unsignedp, this_optab); return REDUCE_BIT_FIELD (temp); } @@ -16864,7 +16195,7 @@ && innermode == word_mode) { rtx htem, hipart; -@@ -8406,6 +8429,19 @@ +@@ -8456,6 +8477,19 @@ return target; } @@ -16884,7 +16215,7 @@ case VEC_PACK_TRUNC_EXPR: case VEC_PACK_SAT_EXPR: case VEC_PACK_FIX_TRUNC_EXPR: -@@ -8687,10 +8723,13 @@ +@@ -8737,10 +8771,13 @@ if (code == SSA_NAME && (g = SSA_NAME_DEF_STMT (ssa_name)) && gimple_code (g) == GIMPLE_CALL) @@ -16902,7 +16233,7 @@ else pmode = promote_decl_mode (exp, &unsignedp); gcc_assert (GET_MODE (decl_rtl) == pmode); -@@ -9250,7 +9289,7 @@ +@@ -9301,7 +9338,7 @@ constant and we don't need a memory reference. */ if (CONSTANT_P (op0) && mode2 != BLKmode @@ -16930,7 +16261,7 @@ { --- a/src/gcc/fold-const.c +++ b/src/gcc/fold-const.c -@@ -9232,15 +9232,10 @@ +@@ -9239,15 +9239,10 @@ 0 <= N < M as is common. In general, the precise value of P is unknown. M is chosen as large as possible such that constant N can be determined. @@ -16948,7 +16279,7 @@ { enum tree_code code; -@@ -9270,9 +9265,8 @@ +@@ -9277,9 +9272,8 @@ } } @@ -16960,7 +16291,7 @@ } else if (code == POINTER_PLUS_EXPR) { -@@ -9282,8 +9276,7 @@ +@@ -9289,8 +9283,7 @@ op0 = TREE_OPERAND (expr, 0); STRIP_NOPS (op0); @@ -16970,7 +16301,7 @@ op1 = TREE_OPERAND (expr, 1); STRIP_NOPS (op1); -@@ -11147,8 +11140,7 @@ +@@ -11154,8 +11147,7 @@ unsigned HOST_WIDE_INT modulus, residue; unsigned HOST_WIDE_INT low = TREE_INT_CST_LOW (arg1); @@ -16980,53 +16311,6 @@ /* This works because modulus is a power of 2. If this weren't the case, we'd have to replace it by its greatest power-of-2 ---- a/src/gcc/fortran/ChangeLog -+++ b/src/gcc/fortran/ChangeLog -@@ -1,3 +1,18 @@ -+2012-03-10 Tobias Burnus -+ -+ PR fortran/52469 -+ * trans-types.c (gfc_get_function_type): Handle backend_decl -+ of a procedure pointer. -+ -+2012-03-06 Tobias Burnus -+ -+ Backport from mainline -+ 2012-03-02 Tobias Burnus -+ -+ PR fortran/52452 -+ * resolve.c (resolve_intrinsic): Don't search for a -+ function if we know that it is a subroutine. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/gcc/fortran/resolve.c -+++ b/src/gcc/fortran/resolve.c -@@ -1452,7 +1452,7 @@ - - if (sym->intmod_sym_id) - isym = gfc_intrinsic_function_by_id ((gfc_isym_id) sym->intmod_sym_id); -- else -+ else if (!sym->attr.subroutine) - isym = gfc_find_function (sym->name); - - if (isym) ---- a/src/gcc/fortran/trans-types.c -+++ b/src/gcc/fortran/trans-types.c -@@ -2519,7 +2519,11 @@ - || sym->attr.flavor == FL_PROGRAM); - - if (sym->backend_decl) -- return TREE_TYPE (sym->backend_decl); -+ { -+ if (sym->attr.proc_pointer) -+ return TREE_TYPE (TREE_TYPE (sym->backend_decl)); -+ return TREE_TYPE (sym->backend_decl); -+ } - - alternate_return = 0; - typelist = NULL_TREE; --- a/src/gcc/gengtype-lex.c +++ b/src/gcc/gengtype-lex.c @@ -55,7 +55,6 @@ @@ -17066,8 +16350,8 @@ #define YY_MORE_ADJ 0 #define YY_RESTORE_YY_MORE_OFFSET char *yytext; --#line 1 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 1 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 1 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 1 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* -*- indented-text -*- */ /* Process source files and output type information. Copyright (C) 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010 @@ -17075,8 +16359,8 @@ along with GCC; see the file COPYING3. If not see . */ #define YY_NO_INPUT 1 --#line 25 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 25 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 25 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 25 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" #include "bconfig.h" #include "system.h" @@ -17115,8 +16399,8 @@ register char *yy_cp, *yy_bp; register int yy_act; --#line 59 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 59 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 59 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 59 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* Do this on entry to yylex(): */ *yylval = 0; @@ -17133,8 +16417,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 70 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 70 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 70 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 70 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return TYPEDEF; @@ -17142,8 +16426,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 74 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 74 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 74 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 74 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return STRUCT; @@ -17151,8 +16435,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 78 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 78 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 78 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 78 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return UNION; @@ -17160,8 +16444,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 82 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 82 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 82 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 82 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return EXTERN; @@ -17169,8 +16453,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 86 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 86 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 86 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 86 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return STATIC; @@ -17178,8 +16462,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 91 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 91 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 91 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 91 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_OP; @@ -17187,8 +16471,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 95 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 95 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 95 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 95 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_I; @@ -17196,8 +16480,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 99 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 99 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 99 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 99 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); return DEFVEC_ALLOC; @@ -17205,22 +16489,22 @@ case 9: YY_RULE_SETUP --#line 107 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 107 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 107 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 107 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct_comment); } YY_BREAK case 10: /* rule 10 can match eol */ YY_RULE_SETUP --#line 109 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 109 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 109 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 109 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 11: /* rule 11 can match eol */ YY_RULE_SETUP --#line 110 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 110 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 110 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 110 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 12: @@ -17228,8 +16512,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 5; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 112 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 112 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 112 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 112 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* don't care */ YY_BREAK case 13: @@ -17237,8 +16521,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 3; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 113 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 113 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 113 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 113 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return GTY_TOKEN; } YY_BREAK case 14: @@ -17246,8 +16530,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 3; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 114 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 114 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 114 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 114 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return VEC_TOKEN; } YY_BREAK case 15: @@ -17255,8 +16539,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 5; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 115 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 115 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 115 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 115 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return UNION; } YY_BREAK case 16: @@ -17264,8 +16548,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 6; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 116 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 116 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 116 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 116 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return STRUCT; } YY_BREAK case 17: @@ -17273,8 +16557,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 4; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 117 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 117 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 117 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 117 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return ENUM; } YY_BREAK case 18: @@ -17282,8 +16566,8 @@ (yy_c_buf_p) = yy_cp = yy_bp + 9; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 118 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 118 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 118 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 118 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return PTR_ALIAS; } YY_BREAK case 19: @@ -17291,14 +16575,14 @@ (yy_c_buf_p) = yy_cp = yy_bp + 10; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 119 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 119 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 119 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 119 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return NESTED_PTR; } YY_BREAK case 20: YY_RULE_SETUP --#line 120 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 120 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 120 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 120 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return NUM; } YY_BREAK case 21: @@ -17306,8 +16590,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 121 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 121 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 121 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 121 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return PARAM_IS; @@ -17315,13 +16599,13 @@ *yy_cp = (yy_hold_char); /* undo effects of setting up yytext */ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ --#line 127 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 127 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 127 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" case 23: /* rule 23 can match eol */ YY_RULE_SETUP --#line 127 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 127 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 127 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 127 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { size_t len; @@ -17329,8 +16613,8 @@ (yy_c_buf_p) = yy_cp -= 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 139 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 139 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 139 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 139 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext, yyleng, yyleng+1); return ID; @@ -17338,8 +16622,8 @@ case 25: /* rule 25 can match eol */ YY_RULE_SETUP --#line 144 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 144 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 144 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 144 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return STRING; @@ -17347,8 +16631,8 @@ case 26: /* rule 26 can match eol */ YY_RULE_SETUP --#line 149 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 149 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 149 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 149 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng-1); return ARRAY; @@ -17356,8 +16640,8 @@ case 27: /* rule 27 can match eol */ YY_RULE_SETUP --#line 153 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 153 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 153 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 153 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { *yylval = XDUPVAR (const char, yytext+1, yyleng-2, yyleng); return CHAR; @@ -17365,28 +16649,28 @@ YY_BREAK case 28: YY_RULE_SETUP --#line 158 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 158 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 158 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 158 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return ELLIPSIS; } YY_BREAK case 29: YY_RULE_SETUP --#line 159 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 159 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 159 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 159 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { return yytext[0]; } YY_BREAK /* ignore pp-directives */ case 30: /* rule 30 can match eol */ YY_RULE_SETUP --#line 162 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 162 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 162 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 162 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" {lexer_line.line++;} YY_BREAK case 31: YY_RULE_SETUP --#line 164 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 164 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 164 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 164 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unexpected character `%s'", yytext); } @@ -17394,36 +16678,36 @@ case 32: YY_RULE_SETUP --#line 169 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 169 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 169 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 169 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_comment); } YY_BREAK case 33: /* rule 33 can match eol */ YY_RULE_SETUP --#line 170 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 170 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 170 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 170 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 34: --#line 172 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 172 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 172 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 172 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" case 35: /* rule 35 can match eol */ --#line 173 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 173 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 173 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" case 36: /* rule 36 can match eol */ YY_RULE_SETUP --#line 173 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 173 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 173 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 173 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 37: /* rule 37 can match eol */ YY_RULE_SETUP --#line 174 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 174 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 174 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 174 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { update_lineno (yytext, yyleng); } YY_BREAK case 38: @@ -17431,25 +16715,25 @@ (yy_c_buf_p) = yy_cp = yy_bp + 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 175 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 175 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 175 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 175 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 39: /* rule 39 can match eol */ YY_RULE_SETUP --#line 178 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 178 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 178 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 178 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { lexer_line.line++; } YY_BREAK case 40: --#line 180 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 180 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 180 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" case 41: YY_RULE_SETUP --#line 180 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 180 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 180 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 180 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 42: @@ -17457,30 +16741,30 @@ (yy_c_buf_p) = yy_cp = yy_bp + 1; YY_DO_BEFORE_ACTION; /* set up yytext again */ YY_RULE_SETUP --#line 181 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 181 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 181 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 181 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 43: YY_RULE_SETUP --#line 183 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 183 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 183 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 183 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(INITIAL); } YY_BREAK case 44: YY_RULE_SETUP --#line 184 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 184 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 184 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 184 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { BEGIN(in_struct); } YY_BREAK case 45: --#line 187 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 187 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 187 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" case 46: YY_RULE_SETUP --#line 187 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 187 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 187 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 187 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" { error_at_line (&lexer_line, "unterminated comment or string; unexpected EOF"); @@ -17488,14 +16772,14 @@ case 47: /* rule 47 can match eol */ YY_RULE_SETUP --#line 192 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 192 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 192 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 192 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" /* do nothing */ YY_BREAK case 48: YY_RULE_SETUP --#line 194 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 194 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 194 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" YY_FATAL_ERROR( "flex scanner jammed" ); YY_BREAK -#line 1650 "gengtype-lex.c" @@ -17518,8 +16802,8 @@ #define YYTABLES_NAME "yytables" --#line 194 "/d//gcc-4.6.3/gcc-4.6.3/gcc/gengtype-lex.l" -+#line 194 "/home/ams/tmp/linaro/gcc-4.6/gcc-linaro-4.6-2012.04/gcc/gengtype-lex.l" +-#line 194 "/home/jakub/gcc-4.6.4/gcc-4.6.4/gcc/gengtype-lex.l" ++#line 194 "/home/doko/gcc-4.6.4-RC-20130412/gcc-4.6.4-RC-20130412/gcc/gengtype-lex.l" @@ -17631,57 +16915,6 @@ break; } ---- a/src/gcc/gimple-low.c -+++ b/src/gcc/gimple-low.c -@@ -218,6 +218,10 @@ - tree fndecl, parms, p; - unsigned int i, nargs; - -+ /* Calls to internal functions always match their signature. */ -+ if (gimple_call_internal_p (stmt)) -+ return true; -+ - nargs = gimple_call_num_args (stmt); - - /* Get argument types for verification. */ ---- a/src/gcc/gimple-pretty-print.c -+++ b/src/gcc/gimple-pretty-print.c -@@ -343,6 +343,8 @@ - case VEC_EXTRACT_ODD_EXPR: - case VEC_INTERLEAVE_HIGH_EXPR: - case VEC_INTERLEAVE_LOW_EXPR: -+ case VEC_WIDEN_LSHIFT_HI_EXPR: -+ case VEC_WIDEN_LSHIFT_LO_EXPR: - for (p = tree_code_name [(int) code]; *p; p++) - pp_character (buffer, TOUPPER (*p)); - pp_string (buffer, " <"); -@@ -596,8 +598,12 @@ - - if (flags & TDF_RAW) - { -- dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", -- gs, gimple_call_fn (gs), lhs); -+ if (gimple_call_internal_p (gs)) -+ dump_gimple_fmt (buffer, spc, flags, "%G <%s, %T", gs, -+ internal_fn_name (gimple_call_internal_fn (gs)), lhs); -+ else -+ dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", -+ gs, gimple_call_fn (gs), lhs); - if (gimple_call_num_args (gs) > 0) - { - pp_string (buffer, ", "); -@@ -617,7 +623,10 @@ - - pp_space (buffer); - } -- print_call_name (buffer, gimple_call_fn (gs), flags); -+ if (gimple_call_internal_p (gs)) -+ pp_string (buffer, internal_fn_name (gimple_call_internal_fn (gs))); -+ else -+ print_call_name (buffer, gimple_call_fn (gs), flags); - pp_string (buffer, " ("); - dump_gimple_call_args (buffer, gs, flags); - pp_character (buffer, ')'); --- a/src/gcc/gimple.c +++ b/src/gcc/gimple.c @@ -276,6 +276,59 @@ @@ -17833,25 +17066,7 @@ return 0; switch (TREE_STRING_POINTER (attr)[0]) -@@ -2293,6 +2374,7 @@ - if (is_gimple_call (s)) - { - unsigned nargs = gimple_call_num_args (s); -+ tree fn; - - if (!(gimple_call_flags (s) & (ECF_CONST | ECF_PURE))) - return true; -@@ -2307,7 +2389,8 @@ - return true; - } - -- if (TREE_SIDE_EFFECTS (gimple_call_fn (s))) -+ fn = gimple_call_fn (s); -+ if (fn && TREE_SIDE_EFFECTS (fn)) - return true; - - for (i = 0; i < nargs; i++) -@@ -2349,14 +2432,15 @@ +@@ -2317,14 +2398,15 @@ if (is_gimple_call (s)) { unsigned nargs = gimple_call_num_args (s); @@ -17869,7 +17084,7 @@ { gcc_assert (gimple_has_volatile_ops (s)); return true; -@@ -3113,7 +3197,6 @@ +@@ -3081,7 +3163,6 @@ gimple_call_copy_skip_args (gimple stmt, bitmap args_to_skip) { int i; @@ -17877,7 +17092,7 @@ int nargs = gimple_call_num_args (stmt); VEC(tree, heap) *vargs = VEC_alloc (tree, heap, nargs); gimple new_stmt; -@@ -3122,7 +3205,11 @@ +@@ -3090,7 +3171,11 @@ if (!bitmap_bit_p (args_to_skip, i)) VEC_quick_push (tree, vargs, gimple_call_arg (stmt, i)); @@ -18020,9 +17235,60 @@ /* See through the pointer. */ type = TREE_TYPE (type); +--- a/src/gcc/gimple-low.c ++++ b/src/gcc/gimple-low.c +@@ -218,6 +218,10 @@ + tree fndecl, parms, p; + unsigned int i, nargs; + ++ /* Calls to internal functions always match their signature. */ ++ if (gimple_call_internal_p (stmt)) ++ return true; ++ + nargs = gimple_call_num_args (stmt); + + /* Get argument types for verification. */ +--- a/src/gcc/gimple-pretty-print.c ++++ b/src/gcc/gimple-pretty-print.c +@@ -343,6 +343,8 @@ + case VEC_EXTRACT_ODD_EXPR: + case VEC_INTERLEAVE_HIGH_EXPR: + case VEC_INTERLEAVE_LOW_EXPR: ++ case VEC_WIDEN_LSHIFT_HI_EXPR: ++ case VEC_WIDEN_LSHIFT_LO_EXPR: + for (p = tree_code_name [(int) code]; *p; p++) + pp_character (buffer, TOUPPER (*p)); + pp_string (buffer, " <"); +@@ -596,8 +598,12 @@ + + if (flags & TDF_RAW) + { +- dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", +- gs, gimple_call_fn (gs), lhs); ++ if (gimple_call_internal_p (gs)) ++ dump_gimple_fmt (buffer, spc, flags, "%G <%s, %T", gs, ++ internal_fn_name (gimple_call_internal_fn (gs)), lhs); ++ else ++ dump_gimple_fmt (buffer, spc, flags, "%G <%T, %T", ++ gs, gimple_call_fn (gs), lhs); + if (gimple_call_num_args (gs) > 0) + { + pp_string (buffer, ", "); +@@ -617,7 +623,10 @@ + + pp_space (buffer); + } +- print_call_name (buffer, gimple_call_fn (gs), flags); ++ if (gimple_call_internal_p (gs)) ++ pp_string (buffer, internal_fn_name (gimple_call_internal_fn (gs))); ++ else ++ print_call_name (buffer, gimple_call_fn (gs), flags); + pp_string (buffer, " ("); + dump_gimple_call_args (buffer, gs, flags); + pp_character (buffer, ')'); --- a/src/gcc/gimplify.c +++ b/src/gcc/gimplify.c -@@ -3711,9 +3711,8 @@ +@@ -3712,9 +3712,8 @@ case ARRAY_TYPE: { struct gimplify_init_ctor_preeval_data preeval_data; @@ -18034,7 +17300,7 @@ /* Aggregate types must lower constructors to initialization of individual elements. The exception is that a CONSTRUCTOR node -@@ -3730,7 +3729,7 @@ +@@ -3731,7 +3730,7 @@ can only do so if it known to be a valid constant initializer. */ valid_const_initializer = categorize_ctor_elements (ctor, &num_nonzero_elements, @@ -18043,7 +17309,7 @@ /* If a const aggregate variable is being initialized, then it should never be a lose to promote the variable to be static. */ -@@ -3768,26 +3767,29 @@ +@@ -3769,26 +3768,29 @@ parts in, then generate code for the non-constant parts. */ /* TODO. There's code in cp/typeck.c to do this. */ @@ -18090,6 +17356,53 @@ /* If there are "lots" of initialized elements, and all of them are valid address constants, then the entire initializer can +--- a/src/gcc/graphite-sese-to-poly.c ++++ b/src/gcc/graphite-sese-to-poly.c +@@ -1721,7 +1721,7 @@ + + FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) + for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) +- if (dr_may_alias_p (dr1, dr2)) ++ if (dr_may_alias_p (dr1, dr2, true)) + edge_num++; + + fprintf (file, "$\n"); +@@ -1733,7 +1733,7 @@ + + FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) + for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) +- if (dr_may_alias_p (dr1, dr2)) ++ if (dr_may_alias_p (dr1, dr2, true)) + fprintf (file, "e %d %d\n", i + 1, j + 1); + + return true; +@@ -1763,7 +1763,7 @@ + + FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) + for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) +- if (dr_may_alias_p (dr1, dr2)) ++ if (dr_may_alias_p (dr1, dr2, true)) + fprintf (file, "n%d n%d\n", i, j); + + return true; +@@ -1789,7 +1789,7 @@ + + FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) + for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) +- if (dr_may_alias_p (dr1, dr2)) ++ if (dr_may_alias_p (dr1, dr2, true)) + fprintf (file, "%d %d\n", i, j); + + return true; +@@ -1825,7 +1825,7 @@ + + FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) + for (j = i+1; VEC_iterate (data_reference_p, drs, j, dr2); j++) +- if (dr_may_alias_p (dr1, dr2)) ++ if (dr_may_alias_p (dr1, dr2, true)) + { + add_edge (g, i, j); + add_edge (g, j, i); --- a/src/gcc/haifa-sched.c +++ b/src/gcc/haifa-sched.c @@ -348,6 +348,14 @@ @@ -20097,7 +19410,7 @@ } free (curr_state); -@@ -3936,7 +5410,7 @@ +@@ -3939,7 +5413,7 @@ INSN_TICK (next) = tick; delay = tick - clock_var; @@ -20106,7 +19419,7 @@ delay = QUEUE_READY; change_queue_index (next, delay); -@@ -5185,7 +6659,7 @@ +@@ -5188,7 +6662,7 @@ if (insn == jump) break; @@ -20115,7 +19428,7 @@ { dep_def _new_dep, *new_dep = &_new_dep; -@@ -5556,6 +7030,7 @@ +@@ -5559,6 +7033,7 @@ FOR_EACH_VEC_ELT (haifa_insn_data_def, h_i_d, i, data) { @@ -20425,7 +19738,7 @@ +#endif --- a/src/gcc/ipa-prop.c +++ b/src/gcc/ipa-prop.c -@@ -1418,6 +1418,8 @@ +@@ -1417,6 +1417,8 @@ { tree target = gimple_call_fn (call); @@ -20434,6 +19747,10 @@ if (TREE_CODE (target) == SSA_NAME) ipa_analyze_indirect_call_uses (node, info, parms_info, call, target); else if (TREE_CODE (target) == OBJ_TYPE_REF) +--- a/src/gcc/LINARO-VERSION ++++ b/src/gcc/LINARO-VERSION +@@ -0,0 +1 @@ ++4.6-2013.04 --- a/src/gcc/longlong.h +++ b/src/gcc/longlong.h @@ -203,7 +203,7 @@ @@ -20615,45 +19932,101 @@ */ condition = gen_rtx_fmt_ee (NE, VOIDmode, inc_src, const1_rtx); ---- a/src/gcc/modulo-sched.c -+++ b/src/gcc/modulo-sched.c -@@ -116,14 +116,18 @@ - - /* The number of different iterations the nodes in ps span, assuming - the stage boundaries are placed efficiently. */ --#define PS_STAGE_COUNT(ps) ((PS_MAX_CYCLE (ps) - PS_MIN_CYCLE (ps) \ -- + 1 + (ps)->ii - 1) / (ps)->ii) -+#define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \ -+ + 1 + ii - 1) / ii) -+/* The stage count of ps. */ -+#define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count) - - /* A single instruction in the partial schedule. */ - struct ps_insn - { -- /* The corresponding DDG_NODE. */ -- ddg_node_ptr node; -+ /* Identifies the instruction to be scheduled. Values smaller than -+ the ddg's num_nodes refer directly to ddg nodes. A value of -+ X - num_nodes refers to register move X. */ -+ int id; - - /* The (absolute) cycle in which the PS instruction is scheduled. - Same as SCHED_TIME (node). */ -@@ -133,10 +137,35 @@ - ps_insn_ptr next_in_row, - prev_in_row; - -- /* The number of nodes in the same row that come after this node. */ -- int row_rest_count; - }; - -+/* Information about a register move that has been added to a partial -+ schedule. */ -+struct ps_reg_move_info -+{ -+ /* The source of the move is defined by the ps_insn with id DEF. -+ The destination is used by the ps_insns with the ids in USES. */ +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -903,6 +903,8 @@ + READ_MD_H = $(OBSTACK_H) $(HASHTAB_H) read-md.h + PARAMS_H = params.h params.def + BUILTINS_DEF = builtins.def sync-builtins.def omp-builtins.def ++INTERNAL_FN_DEF = internal-fn.def ++INTERNAL_FN_H = internal-fn.h $(INTERNAL_FN_DEF) + TREE_H = tree.h all-tree.def tree.def c-family/c-common.def \ + $(lang_tree_files) $(MACHMODE_H) tree-check.h $(BUILTINS_DEF) \ + $(INPUT_H) statistics.h $(VEC_H) treestruct.def $(HASHTAB_H) \ +@@ -912,7 +914,7 @@ + BASIC_BLOCK_H = basic-block.h $(PREDICT_H) $(VEC_H) $(FUNCTION_H) cfghooks.h + GIMPLE_H = gimple.h gimple.def gsstruct.def pointer-set.h $(VEC_H) \ + $(GGC_H) $(BASIC_BLOCK_H) $(TARGET_H) tree-ssa-operands.h \ +- tree-ssa-alias.h vecir.h ++ tree-ssa-alias.h vecir.h $(INTERNAL_FN_H) + GCOV_IO_H = gcov-io.h gcov-iov.h auto-host.h + COVERAGE_H = coverage.h $(GCOV_IO_H) + DEMANGLE_H = $(srcdir)/../include/demangle.h +@@ -1284,6 +1286,7 @@ + init-regs.o \ + input.o \ + integrate.o \ ++ internal-fn.o \ + intl.o \ + ira.o \ + ira-build.o \ +@@ -2438,7 +2441,8 @@ + tree-ssa-phiopt.o : tree-ssa-phiopt.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(GGC_H) $(TREE_H) $(TM_P_H) $(BASIC_BLOCK_H) \ + $(TREE_FLOW_H) $(TREE_PASS_H) $(TREE_DUMP_H) langhooks.h $(FLAGS_H) \ +- $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h ++ $(DIAGNOSTIC_H) $(TIMEVAR_H) pointer-set.h domwalk.h $(CFGLOOP_H) \ ++ $(TREE_DATA_REF_H) + tree-nrv.o : tree-nrv.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(TREE_H) $(FUNCTION_H) $(BASIC_BLOCK_H) $(FLAGS_H) \ + $(DIAGNOSTIC_H) $(TREE_FLOW_H) $(TIMEVAR_H) $(TREE_DUMP_H) $(TREE_PASS_H) \ +@@ -2679,7 +2683,7 @@ + $(TREE_PASS_H) $(PARAMS_H) gt-tree-scalar-evolution.h + tree-data-ref.o : tree-data-ref.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + gimple-pretty-print.h $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ +- $(TREE_PASS_H) langhooks.h ++ $(TREE_PASS_H) langhooks.h tree-affine.h + sese.o : sese.c sese.h $(CONFIG_H) $(SYSTEM_H) coretypes.h tree-pretty-print.h \ + $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h + graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \ +@@ -2766,6 +2770,8 @@ + $(TM_H) $(TREE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) $(TREE_FLOW_H) \ + $(TREE_PASS_H) tree-ssa-propagate.h tree-pretty-print.h \ + gimple-pretty-print.h ++internal-fn.o : internal-fn.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ ++ $(GIMPLE_H) $(TREE_H) $(EXPR_H) $(OPTABS_H) $(RECOG_H) + gimple.o : gimple.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TREE_H) \ + $(GGC_H) $(GIMPLE_H) $(DIAGNOSTIC_CORE_H) $(DIAGNOSTIC_H) gt-gimple.h \ + $(TREE_FLOW_H) value-prof.h $(FLAGS_H) $(DEMANGLE_H) \ +--- a/src/gcc/modulo-sched.c ++++ b/src/gcc/modulo-sched.c +@@ -116,14 +116,18 @@ + + /* The number of different iterations the nodes in ps span, assuming + the stage boundaries are placed efficiently. */ +-#define PS_STAGE_COUNT(ps) ((PS_MAX_CYCLE (ps) - PS_MIN_CYCLE (ps) \ +- + 1 + (ps)->ii - 1) / (ps)->ii) ++#define CALC_STAGE_COUNT(max_cycle,min_cycle,ii) ((max_cycle - min_cycle \ ++ + 1 + ii - 1) / ii) ++/* The stage count of ps. */ ++#define PS_STAGE_COUNT(ps) (((partial_schedule_ptr)(ps))->stage_count) + + /* A single instruction in the partial schedule. */ + struct ps_insn + { +- /* The corresponding DDG_NODE. */ +- ddg_node_ptr node; ++ /* Identifies the instruction to be scheduled. Values smaller than ++ the ddg's num_nodes refer directly to ddg nodes. A value of ++ X - num_nodes refers to register move X. */ ++ int id; + + /* The (absolute) cycle in which the PS instruction is scheduled. + Same as SCHED_TIME (node). */ +@@ -133,10 +137,35 @@ + ps_insn_ptr next_in_row, + prev_in_row; + +- /* The number of nodes in the same row that come after this node. */ +- int row_rest_count; + }; + ++/* Information about a register move that has been added to a partial ++ schedule. */ ++struct ps_reg_move_info ++{ ++ /* The source of the move is defined by the ps_insn with id DEF. ++ The destination is used by the ps_insns with the ids in USES. */ + int def; + sbitmap uses; + @@ -23266,76 +22639,6 @@ +#define MAX_STORES_TO_SINK \ + PARAM_VALUE (PARAM_MAX_STORES_TO_SINK) #endif /* ! GCC_PARAMS_H */ ---- a/src/gcc/predict.c -+++ b/src/gcc/predict.c -@@ -1790,7 +1790,8 @@ - static void - predict_paths_for_bb (basic_block cur, basic_block bb, - enum br_predictor pred, -- enum prediction taken) -+ enum prediction taken, -+ bitmap visited) - { - edge e; - edge_iterator ei; -@@ -1811,7 +1812,7 @@ - continue; - gcc_assert (bb == cur || dominated_by_p (CDI_POST_DOMINATORS, cur, bb)); - -- /* See if there is how many edge from e->src that is not abnormal -+ /* See if there is an edge from e->src that is not abnormal - and does not lead to BB. */ - FOR_EACH_EDGE (e2, ei2, e->src->succs) - if (e2 != e -@@ -1824,16 +1825,20 @@ - - /* If there is non-abnormal path leaving e->src, predict edge - using predictor. Otherwise we need to look for paths -- leading to e->src. */ -+ leading to e->src. -+ -+ The second may lead to infinite loop in the case we are predicitng -+ regions that are only reachable by abnormal edges. We simply -+ prevent visiting given BB twice. */ - if (found) - predict_edge_def (e, pred, taken); -- else -- predict_paths_for_bb (e->src, e->src, pred, taken); -+ else if (bitmap_set_bit (visited, e->src->index)) -+ predict_paths_for_bb (e->src, e->src, pred, taken, visited); - } - for (son = first_dom_son (CDI_POST_DOMINATORS, cur); - son; - son = next_dom_son (CDI_POST_DOMINATORS, son)) -- predict_paths_for_bb (son, bb, pred, taken); -+ predict_paths_for_bb (son, bb, pred, taken, visited); - } - - /* Sets branch probabilities according to PREDiction and -@@ -1843,7 +1848,9 @@ - predict_paths_leading_to (basic_block bb, enum br_predictor pred, - enum prediction taken) - { -- predict_paths_for_bb (bb, bb, pred, taken); -+ bitmap visited = BITMAP_ALLOC (NULL); -+ predict_paths_for_bb (bb, bb, pred, taken, visited); -+ BITMAP_FREE (visited); - } - - /* Like predict_paths_leading_to but take edge instead of basic block. */ -@@ -1866,7 +1873,11 @@ - break; - } - if (!has_nonloop_edge) -- predict_paths_for_bb (bb, bb, pred, taken); -+ { -+ bitmap visited = BITMAP_ALLOC (NULL); -+ predict_paths_for_bb (bb, bb, pred, taken, visited); -+ BITMAP_FREE (visited); -+ } - else - predict_edge_def (e, pred, taken); - } --- a/src/gcc/recog.c +++ b/src/gcc/recog.c @@ -930,7 +930,9 @@ @@ -23376,52 +22679,6 @@ } return NULL_RTX; } ---- a/src/gcc/reload.c -+++ b/src/gcc/reload.c -@@ -1017,6 +1017,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))] - && (CONSTANT_P (SUBREG_REG (in)) - || GET_CODE (SUBREG_REG (in)) == PLUS - || strict_low -@@ -1123,6 +1124,7 @@ - #ifdef CANNOT_CHANGE_MODE_CLASS - && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass) - #endif -+ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))] - && (CONSTANT_P (SUBREG_REG (out)) - || strict_low - || (((REG_P (SUBREG_REG (out)) -@@ -4721,7 +4723,8 @@ - simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno], - GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); - gcc_assert (tem); -- if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem)) -+ if (CONSTANT_P (tem) -+ && !targetm.legitimate_constant_p (GET_MODE (x), tem)) - { - tem = force_const_mem (GET_MODE (x), tem); - i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), -@@ -6049,7 +6052,7 @@ - enum reload_type type, int ind_levels) - { - if (CONSTANT_P (x) -- && (! LEGITIMATE_CONSTANT_P (x) -+ && (!targetm.legitimate_constant_p (mode, x) - || targetm.preferred_reload_class (x, rclass) == NO_REGS)) - { - x = force_const_mem (mode, x); -@@ -6059,7 +6062,7 @@ - - else if (GET_CODE (x) == PLUS - && CONSTANT_P (XEXP (x, 1)) -- && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) -+ && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1)) - || targetm.preferred_reload_class (XEXP (x, 1), rclass) - == NO_REGS)) - { --- a/src/gcc/reload1.c +++ b/src/gcc/reload1.c @@ -4159,6 +4159,9 @@ @@ -23592,6 +22849,52 @@ /* How to do this reload can get quite tricky. Normally, we are being asked to reload a simple operand, such as a MEM, a constant, or a pseudo +--- a/src/gcc/reload.c ++++ b/src/gcc/reload.c +@@ -1017,6 +1017,7 @@ + #ifdef CANNOT_CHANGE_MODE_CLASS + && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, rclass) + #endif ++ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (in))] + && (CONSTANT_P (SUBREG_REG (in)) + || GET_CODE (SUBREG_REG (in)) == PLUS + || strict_low +@@ -1123,6 +1124,7 @@ + #ifdef CANNOT_CHANGE_MODE_CLASS + && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, rclass) + #endif ++ && contains_reg_of_mode[(int) rclass][(int) GET_MODE (SUBREG_REG (out))] + && (CONSTANT_P (SUBREG_REG (out)) + || strict_low + || (((REG_P (SUBREG_REG (out)) +@@ -4721,7 +4723,8 @@ + simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno], + GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); + gcc_assert (tem); +- if (CONSTANT_P (tem) && !LEGITIMATE_CONSTANT_P (tem)) ++ if (CONSTANT_P (tem) ++ && !targetm.legitimate_constant_p (GET_MODE (x), tem)) + { + tem = force_const_mem (GET_MODE (x), tem); + i = find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0), +@@ -6049,7 +6052,7 @@ + enum reload_type type, int ind_levels) + { + if (CONSTANT_P (x) +- && (! LEGITIMATE_CONSTANT_P (x) ++ && (!targetm.legitimate_constant_p (mode, x) + || targetm.preferred_reload_class (x, rclass) == NO_REGS)) + { + x = force_const_mem (mode, x); +@@ -6059,7 +6062,7 @@ + + else if (GET_CODE (x) == PLUS + && CONSTANT_P (XEXP (x, 1)) +- && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) ++ && (!targetm.legitimate_constant_p (GET_MODE (x), XEXP (x, 1)) + || targetm.preferred_reload_class (XEXP (x, 1), rclass) + == NO_REGS)) + { --- a/src/gcc/sched-deps.c +++ b/src/gcc/sched-deps.c @@ -450,7 +450,7 @@ @@ -23763,7 +23066,7 @@ for (bb = 0; bb < current_nr_blocks; bb++) --- a/src/gcc/simplify-rtx.c +++ b/src/gcc/simplify-rtx.c -@@ -1000,6 +1000,48 @@ +@@ -1001,6 +1001,48 @@ && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) return XEXP (op, 0); @@ -23812,7 +23115,7 @@ /* Check for a sign extension of a subreg of a promoted variable, where the promotion is sign-extended, and the target mode is the same as the variable's promotion. */ -@@ -1071,6 +1113,48 @@ +@@ -1072,6 +1114,48 @@ && GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (XEXP (op, 0)))) return rtl_hooks.gen_lowpart_no_emit (mode, op); @@ -23861,7 +23164,7 @@ /* (zero_extend:M (zero_extend:N )) is (zero_extend:M ). */ if (GET_CODE (op) == ZERO_EXTEND) return simplify_gen_unary (ZERO_EXTEND, mode, XEXP (op, 0), -@@ -2506,6 +2590,46 @@ +@@ -2507,6 +2591,46 @@ XEXP (op0, 1), mode), op1); @@ -23908,7 +23211,7 @@ /* (xor (comparison foo bar) (const_int 1)) can become the reversed comparison if STORE_FLAG_VALUE is 1. */ if (STORE_FLAG_VALUE == 1 -@@ -5453,6 +5577,7 @@ +@@ -5454,6 +5578,7 @@ /* Optimize SUBREG truncations of zero and sign extended values. */ if ((GET_CODE (op) == ZERO_EXTEND || GET_CODE (op) == SIGN_EXTEND) @@ -23916,7 +23219,7 @@ && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode)) { unsigned int bitpos = subreg_lsb_1 (outermode, innermode, byte); -@@ -5491,6 +5616,7 @@ +@@ -5492,6 +5617,7 @@ if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) && SCALAR_INT_MODE_P (outermode) @@ -23924,7 +23227,7 @@ /* Ensure that OUTERMODE is at least twice as wide as the INNERMODE to avoid the possibility that an outer LSHIFTRT shifts by more than the sign extension's sign_bit_copies and introduces zeros -@@ -5510,6 +5636,7 @@ +@@ -5511,6 +5637,7 @@ if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) && SCALAR_INT_MODE_P (outermode) @@ -23932,7 +23235,7 @@ && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode) && CONST_INT_P (XEXP (op, 1)) && GET_CODE (XEXP (op, 0)) == ZERO_EXTEND -@@ -5524,6 +5651,7 @@ +@@ -5525,6 +5652,7 @@ the outer subreg is effectively a truncation to the original mode. */ if (GET_CODE (op) == ASHIFT && SCALAR_INT_MODE_P (outermode) @@ -23940,7 +23243,7 @@ && GET_MODE_BITSIZE (outermode) < GET_MODE_BITSIZE (innermode) && CONST_INT_P (XEXP (op, 1)) && (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND -@@ -5537,7 +5665,7 @@ +@@ -5538,7 +5666,7 @@ /* Recognize a word extraction from a multi-word subreg. */ if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) @@ -23949,7 +23252,7 @@ && GET_MODE_BITSIZE (outermode) >= BITS_PER_WORD && GET_MODE_BITSIZE (innermode) >= (2 * GET_MODE_BITSIZE (outermode)) && CONST_INT_P (XEXP (op, 1)) -@@ -5559,6 +5687,7 @@ +@@ -5560,6 +5688,7 @@ if ((GET_CODE (op) == LSHIFTRT || GET_CODE (op) == ASHIFTRT) @@ -24123,24 +23426,7 @@ /* Subroutine of layout_decl: Force alignment required for the data type. But if the decl itself wants greater alignment, don't override that. */ -@@ -660,12 +688,13 @@ - /* See if we can use an ordinary integer mode for a bit-field. - Conditions are: a fixed size that is correct for another mode, - occupying a complete byte or bytes on proper boundary, -- and not volatile or not -fstrict-volatile-bitfields. */ -+ and not -fstrict-volatile-bitfields. If the latter is set, -+ we unfortunately can't check TREE_THIS_VOLATILE, as a cast -+ may make a volatile object later. */ - if (TYPE_SIZE (type) != 0 - && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST - && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT -- && !(TREE_THIS_VOLATILE (decl) -- && flag_strict_volatile_bitfields > 0)) -+ && flag_strict_volatile_bitfields <= 0) - { - enum machine_mode xmode - = mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1); -@@ -2039,14 +2068,8 @@ +@@ -2048,14 +2076,8 @@ && (TYPE_MODE (TREE_TYPE (type)) != BLKmode || TYPE_NO_FORCE_BLK (TREE_TYPE (type)))) { @@ -24173,9 +23459,9 @@ /* True if the constant X cannot be placed in the constant pool. */ DEFHOOK (cannot_force_const_mem, -@@ -1611,6 +1618,38 @@ - bool, (enum machine_mode mode), - hook_bool_mode_false) +@@ -1621,6 +1628,38 @@ + HOST_WIDE_INT, (const_tree type), + default_vector_alignment) +/* True if we should try to use a scalar mode to represent an array, + overriding the usual MAX_FIXED_MODE limit. */ @@ -24212,29 +23498,9 @@ /* Compute cost of moving data from a register of class FROM to one of TO, using MODE. */ DEFHOOK ---- a/src/gcc/target.h -+++ b/src/gcc/target.h -@@ -128,7 +128,8 @@ - scalar_to_vec, - cond_branch_not_taken, - cond_branch_taken, -- vec_perm -+ vec_perm, -+ vec_promote_demote - }; - - /* Sets of optimization levels at which an option may be enabled by --- a/src/gcc/targhooks.c +++ b/src/gcc/targhooks.c -@@ -529,6 +529,7 @@ - case scalar_to_vec: - case cond_branch_not_taken: - case vec_perm: -+ case vec_promote_demote: - return 1; - - case unaligned_load: -@@ -1519,4 +1520,15 @@ +@@ -1527,4 +1527,15 @@ { OPT_LEVELS_NONE, 0, NULL, 0 } }; @@ -24252,85 +23518,11 @@ #include "gt-targhooks.h" --- a/src/gcc/targhooks.h +++ b/src/gcc/targhooks.h -@@ -183,3 +183,4 @@ +@@ -185,3 +185,4 @@ extern void *default_get_pch_validity (size_t *); extern const char *default_pch_valid_p (const void *, size_t); +extern bool default_legitimate_constant_p (enum machine_mode, rtx); ---- a/src/gcc/testsuite/ChangeLog -+++ b/src/gcc/testsuite/ChangeLog -@@ -1,3 +1,65 @@ -+2012-03-28 Joey Ye -+ -+ Backported from mainline -+ 2011-12-20 Bernd Schmidt -+ -+ PR middle-end/51200 -+ * gcc.target/arm/volatile-bitfields-4.c: New test. -+ * c-c++-common/abi-bf.c: New test. -+ -+ 2011-12-26 Joey Ye -+ -+ PR middle-end/51200 -+ * gcc.dg/volatile-bitfields-2.c: New test. -+ -+2012-03-28 Martin Jambor -+ -+ Backported from mainline -+ 2012-03-27 Martin Jambor -+ -+ PR middle-end/52693 -+ * gcc.dg/torture/pr52693.c: New test. -+ -+2012-03-28 Jakub Jelinek -+ -+ PR target/52736 -+ * gcc.target/i386/pr52736.c: New test. -+ -+2012-03-24 Jan Hubicka -+ -+ PR middle-end/51737 -+ * g++.dg/torture/pr51737.C: New testcase -+ -+2012-03-24 Steven Bosscher -+ -+ PR middle-end/52640 -+ * gcc.c-torture/compile/limits-externdecl.c: New test. -+ -+2012-03-16 Jan Hubicka -+ -+ PR middle-end/48600 -+ * g++.dg/torture/pr48600.C: New testcase. -+ -+2012-03-10 Tobias Burnus -+ -+ PR fortran/52469 -+ * gfortran.dg/proc_ptr_34.f90: New. -+ -+2012-03-06 Tobias Burnus -+ -+ Backport from mainline -+ 2012-03-02 Tobias Burnus -+ -+ PR fortran/52452 -+ * gfortran.dg/intrinsic_8.f90: New. -+ -+2012-03-02 Peter Bergner -+ -+ Backport from mainline -+ 2012-03-02 Peter Bergner -+ -+ * gcc.target/powerpc/pr52457.c: New test. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/gcc/testsuite/c-c++-common/abi-bf.c -+++ b/src/gcc/testsuite/c-c++-common/abi-bf.c -@@ -0,0 +1,3 @@ -+/* { dg-warning "incompatible" } */ -+/* { dg-do compile } */ -+/* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */ --- a/src/gcc/testsuite/gcc.c-torture/compile/20110401-1.c +++ b/src/gcc/testsuite/gcc.c-torture/compile/20110401-1.c @@ -0,0 +1,22 @@ @@ -24356,65 +23548,6 @@ + } + } +} ---- a/src/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c -+++ b/src/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c -@@ -0,0 +1,56 @@ -+/* Inspired by the test case for PR middle-end/52640. */ -+ -+typedef struct -+{ -+ char *value; -+} REFERENCE; -+ -+/* Add a few "extern int Xxxxxx ();" declarations. */ -+#undef DEF -+#undef LIM1 -+#undef LIM2 -+#undef LIM3 -+#undef LIM4 -+#undef LIM5 -+#undef LIM6 -+#define DEF(x) extern int x () -+#define LIM1(x) DEF(x##0); DEF(x##1); DEF(x##2); DEF(x##3); DEF(x##4); \ -+ DEF(x##5); DEF(x##6); DEF(x##7); DEF(x##8); DEF(x##9); -+#define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ -+ LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) -+#define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ -+ LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) -+#define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ -+ LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) -+#define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ -+ LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) -+#define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ -+ LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) -+LIM5 (X); -+ -+/* Add references to them, or GCC will simply ignore the extern decls. */ -+#undef DEF -+#undef LIM1 -+#undef LIM2 -+#undef LIM3 -+#undef LIM4 -+#undef LIM5 -+#undef LIM6 -+#define DEF(x) (char *) x -+#define LIM1(x) DEF(x##0), DEF(x##1), DEF(x##2), DEF(x##3), DEF(x##4), \ -+ DEF(x##5), DEF(x##6), DEF(x##7), DEF(x##8), DEF(x##9), -+#define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ -+ LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) -+#define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ -+ LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) -+#define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ -+ LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) -+#define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ -+ LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) -+#define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ -+ LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) -+REFERENCE references[] = { -+ LIM5 (X) -+ 0 -+}; -+ --- a/src/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c +++ b/src/gcc/testsuite/gcc.dg/di-longlong64-sync-1.c @@ -0,0 +1,164 @@ @@ -25096,54 +24229,6 @@ +} + +/* { dg-final { scan-assembler "abort" } } */ ---- a/src/gcc/testsuite/gcc.dg/torture/pr52693.c -+++ b/src/gcc/testsuite/gcc.dg/torture/pr52693.c -@@ -0,0 +1,33 @@ -+/* { dg-do run } */ -+ -+struct pair -+{ -+ int x; -+ int y; -+}; -+ -+struct array -+{ -+ struct pair elems[ 2 ]; -+ unsigned index; -+}; -+ -+extern void abort (); -+ -+void __attribute__ ((noinline,noclone)) -+test_results (int x1, int y1, int x2, int y2) -+{ -+ if (x1 != x2 || y1 != y2) -+ abort (); -+} -+ -+int -+main (void) -+{ -+ struct array arr = {{{1,2}, {3,4}}, 1}; -+ struct pair last = arr.elems[arr.index]; -+ -+ test_results ( last.x, last.y, arr.elems[1].x, arr.elems[1].y); -+ -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c -@@ -26,7 +26,7 @@ - } - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - --- a/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c +++ b/src/gcc/testsuite/gcc.dg/vect/bb-slp-11.c @@ -48,7 +48,6 @@ @@ -26105,8 +25190,8 @@ +/* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c +--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c ++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c @@ -53,6 +53,7 @@ } @@ -26116,8 +25201,8 @@ +/* { dg-final { scan-tree-dump-times "possible dependence between data-refs" 2 "vect" { target vect_multiple_sizes } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102a.c +--- a/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c ++++ b/src/gcc/testsuite/gcc.dg/vect/no-vfa-vect-102.c @@ -53,6 +53,7 @@ } @@ -26147,6 +25232,18 @@ +/* { dg-final { scan-tree-dump-times "can't determine dependence" 1 "vect" { xfail vect_multiple_sizes } } } */ +/* { dg-final { scan-tree-dump-times "can't determine dependence" 2 "vect" { target vect_multiple_sizes } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c ++++ b/src/gcc/testsuite/gcc.dg/vect/O3-pr39675-2.c +@@ -26,7 +26,7 @@ + } + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided_wide } } } */ +-/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided_wide } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ + --- a/src/gcc/testsuite/gcc.dg/vect/pr30843.c +++ b/src/gcc/testsuite/gcc.dg/vect/pr30843.c @@ -20,6 +20,6 @@ @@ -26246,6 +25343,156 @@ +} + +/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/pr52870.c ++++ b/src/gcc/testsuite/gcc.dg/vect/pr52870.c +@@ -0,0 +1,17 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O1 -ftree-vectorize" } */ ++ ++long ++test (int *x) ++{ ++ unsigned long sx, xprec; ++ ++ sx = *x >= 0 ? *x : -*x; ++ ++ xprec = sx * 64; ++ ++ if (sx < 16384) ++ foo (sx); ++ ++ return xprec; ++} +--- a/src/gcc/testsuite/gcc.dg/vect/slp-11a.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11a.c +@@ -0,0 +1,75 @@ ++/* { dg-require-effective-target vect_int } */ ++ ++#include ++#include "tree-vect.h" ++ ++#define N 8 ++ ++int ++main1 () ++{ ++ int i; ++ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; ++ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; ++ ++ /* Different operations - not SLPable. */ ++ for (i = 0; i < N; i++) ++ { ++ a0 = in[i*8] + 5; ++ a1 = in[i*8 + 1] * 6; ++ a2 = in[i*8 + 2] + 7; ++ a3 = in[i*8 + 3] + 8; ++ a4 = in[i*8 + 4] + 9; ++ a5 = in[i*8 + 5] + 10; ++ a6 = in[i*8 + 6] + 11; ++ a7 = in[i*8 + 7] + 12; ++ ++ b0 = a0 * 3; ++ b1 = a1 * 2; ++ b2 = a2 * 12; ++ b3 = a3 * 5; ++ b4 = a4 * 8; ++ b5 = a5 * 4; ++ b6 = a6 * 3; ++ b7 = a7 * 2; ++ ++ out[i*8] = b0 - 2; ++ out[i*8 + 1] = b1 - 3; ++ out[i*8 + 2] = b2 - 2; ++ out[i*8 + 3] = b3 - 1; ++ out[i*8 + 4] = b4 - 8; ++ out[i*8 + 5] = b5 - 7; ++ out[i*8 + 6] = b6 - 3; ++ out[i*8 + 7] = b7 - 7; ++ } ++ ++ /* check results: */ ++ for (i = 0; i < N; i++) ++ { ++ if (out[i*8] != (in[i*8] + 5) * 3 - 2 ++ || out[i*8 + 1] != (in[i*8 + 1] * 6) * 2 - 3 ++ || out[i*8 + 2] != (in[i*8 + 2] + 7) * 12 - 2 ++ || out[i*8 + 3] != (in[i*8 + 3] + 8) * 5 - 1 ++ || out[i*8 + 4] != (in[i*8 + 4] + 9) * 8 - 8 ++ || out[i*8 + 5] != (in[i*8 + 5] + 10) * 4 - 7 ++ || out[i*8 + 6] != (in[i*8 + 6] + 11) * 3 - 3 ++ || out[i*8 + 7] != (in[i*8 + 7] + 12) * 2 - 7) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++int main (void) ++{ ++ check_vect (); ++ ++ main1 (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-11b.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11b.c +@@ -0,0 +1,49 @@ ++/* { dg-require-effective-target vect_int } */ ++ ++#include ++#include "tree-vect.h" ++ ++#define N 8 ++ ++int ++main1 () ++{ ++ int i; ++ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; ++ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; ++ ++ /* Requires permutation - not SLPable. */ ++ for (i = 0; i < N*2; i++) ++ { ++ out[i*4] = (in[i*4] + 2) * 3; ++ out[i*4 + 1] = (in[i*4 + 2] + 2) * 7; ++ out[i*4 + 2] = (in[i*4 + 1] + 7) * 3; ++ out[i*4 + 3] = (in[i*4 + 3] + 3) * 4; ++ } ++ ++ /* check results: */ ++ for (i = 0; i < N*2; i++) ++ { ++ if (out[i*4] != (in[i*4] + 2) * 3 ++ || out[i*4 + 1] != (in[i*4 + 2] + 2) * 7 ++ || out[i*4 + 2] != (in[i*4 + 1] + 7) * 3 ++ || out[i*4 + 3] != (in[i*4 + 3] + 3) * 4) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++int main (void) ++{ ++ check_vect (); ++ ++ main1 (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided4 && vect_int_mult } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided4 && vect_int_mult } } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/slp-11.c +++ b/src/gcc/testsuite/gcc.dg/vect/slp-11.c @@ -1,113 +0,0 @@ @@ -26362,9 +25609,9 @@ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -/* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11a.c -@@ -0,0 +1,75 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-11c.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-11c.c +@@ -0,0 +1,46 @@ +/* { dg-require-effective-target vect_int } */ + +#include @@ -26376,54 +25623,25 @@ +main1 () +{ + int i; -+ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; + unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; ++ float out[N*8]; + + /* Different operations - not SLPable. */ -+ for (i = 0; i < N; i++) ++ for (i = 0; i < N*4; i++) + { -+ a0 = in[i*8] + 5; -+ a1 = in[i*8 + 1] * 6; -+ a2 = in[i*8 + 2] + 7; -+ a3 = in[i*8 + 3] + 8; -+ a4 = in[i*8 + 4] + 9; -+ a5 = in[i*8 + 5] + 10; -+ a6 = in[i*8 + 6] + 11; -+ a7 = in[i*8 + 7] + 12; -+ -+ b0 = a0 * 3; -+ b1 = a1 * 2; -+ b2 = a2 * 12; -+ b3 = a3 * 5; -+ b4 = a4 * 8; -+ b5 = a5 * 4; -+ b6 = a6 * 3; -+ b7 = a7 * 2; -+ -+ out[i*8] = b0 - 2; -+ out[i*8 + 1] = b1 - 3; -+ out[i*8 + 2] = b2 - 2; -+ out[i*8 + 3] = b3 - 1; -+ out[i*8 + 4] = b4 - 8; -+ out[i*8 + 5] = b5 - 7; -+ out[i*8 + 6] = b6 - 3; -+ out[i*8 + 7] = b7 - 7; ++ out[i*2] = ((float) in[i*2] * 2 + 6) ; ++ out[i*2 + 1] = (float) (in[i*2 + 1] * 3 + 7); + } + + /* check results: */ -+ for (i = 0; i < N; i++) ++ for (i = 0; i < N*4; i++) + { -+ if (out[i*8] != (in[i*8] + 5) * 3 - 2 -+ || out[i*8 + 1] != (in[i*8 + 1] * 6) * 2 - 3 -+ || out[i*8 + 2] != (in[i*8 + 2] + 7) * 12 - 2 -+ || out[i*8 + 3] != (in[i*8 + 3] + 8) * 5 - 1 -+ || out[i*8 + 4] != (in[i*8 + 4] + 9) * 8 - 8 -+ || out[i*8 + 5] != (in[i*8 + 5] + 10) * 4 - 7 -+ || out[i*8 + 6] != (in[i*8 + 6] + 11) * 3 - 3 -+ || out[i*8 + 7] != (in[i*8 + 7] + 12) * 2 - 7) -+ abort (); ++ if (out[i*2] != ((float) in[i*2] * 2 + 6) ++ || out[i*2 + 1] != (float) (in[i*2 + 1] * 3 + 7)) ++ abort (); + } + ++ + return 0; +} + @@ -26436,110 +25654,9 @@ + return 0; +} + -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided8 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided8 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11b.c -@@ -0,0 +1,49 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int out[N*8], a0, a1, a2, a3, a4, a5, a6, a7, b1, b0, b2, b3, b4, b5, b6, b7; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ -+ /* Requires permutation - not SLPable. */ -+ for (i = 0; i < N*2; i++) -+ { -+ out[i*4] = (in[i*4] + 2) * 3; -+ out[i*4 + 1] = (in[i*4 + 2] + 2) * 7; -+ out[i*4 + 2] = (in[i*4 + 1] + 7) * 3; -+ out[i*4 + 3] = (in[i*4 + 3] + 3) * 4; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*2; i++) -+ { -+ if (out[i*4] != (in[i*4] + 2) * 3 -+ || out[i*4 + 1] != (in[i*4 + 2] + 2) * 7 -+ || out[i*4 + 2] != (in[i*4 + 1] + 7) * 3 -+ || out[i*4 + 3] != (in[i*4 + 3] + 3) * 4) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_strided4 && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { vect_strided4 && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-11c.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-11c.c -@@ -0,0 +1,46 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include -+#include "tree-vect.h" -+ -+#define N 8 -+ -+int -+main1 () -+{ -+ int i; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ float out[N*8]; -+ -+ /* Different operations - not SLPable. */ -+ for (i = 0; i < N*4; i++) -+ { -+ out[i*2] = ((float) in[i*2] * 2 + 6) ; -+ out[i*2 + 1] = (float) (in[i*2 + 1] * 3 + 7); -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*4; i++) -+ { -+ if (out[i*2] != ((float) in[i*2] * 2 + 6) -+ || out[i*2 + 1] != (float) (in[i*2 + 1] * 3 + 7)) -+ abort (); -+ } -+ -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! { { vect_uintfloat_cvt && vect_strided2 } && vect_int_mult } } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/slp-12a.c +++ b/src/gcc/testsuite/gcc.dg/vect/slp-12a.c @@ -26680,6 +25797,131 @@ +/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "vect" { target vect_strided8 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-19a.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-19a.c +@@ -0,0 +1,61 @@ ++/* { dg-require-effective-target vect_int } */ ++ ++#include ++#include "tree-vect.h" ++ ++#define N 16 ++ ++int ++main1 () ++{ ++ unsigned int i; ++ unsigned int out[N*8]; ++ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; ++ unsigned int ia[N*2]; ++ ++ for (i = 0; i < N; i++) ++ { ++ out[i*8] = in[i*8]; ++ out[i*8 + 1] = in[i*8 + 1]; ++ out[i*8 + 2] = in[i*8 + 2]; ++ out[i*8 + 3] = in[i*8 + 3]; ++ out[i*8 + 4] = in[i*8 + 4]; ++ out[i*8 + 5] = in[i*8 + 5]; ++ out[i*8 + 6] = in[i*8 + 6]; ++ out[i*8 + 7] = in[i*8 + 7]; ++ ++ ia[i] = in[i*8 + 2]; ++ } ++ ++ /* check results: */ ++ for (i = 0; i < N; i++) ++ { ++ if (out[i*8] != in[i*8] ++ || out[i*8 + 1] != in[i*8 + 1] ++ || out[i*8 + 2] != in[i*8 + 2] ++ || out[i*8 + 3] != in[i*8 + 3] ++ || out[i*8 + 4] != in[i*8 + 4] ++ || out[i*8 + 5] != in[i*8 + 5] ++ || out[i*8 + 6] != in[i*8 + 6] ++ || out[i*8 + 7] != in[i*8 + 7] ++ || ia[i] != in[i*8 + 2]) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++int main (void) ++{ ++ check_vect (); ++ ++ main1 (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided8 } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided8 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided8} } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/slp-19b.c ++++ b/src/gcc/testsuite/gcc.dg/vect/slp-19b.c +@@ -0,0 +1,58 @@ ++/* { dg-require-effective-target vect_int } */ ++ ++#include ++#include "tree-vect.h" ++ ++#define N 16 ++ ++int ++main1 () ++{ ++ unsigned int i; ++ unsigned int out[N*8]; ++ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; ++ unsigned int ia[N*2], a0, a1, a2, a3; ++ ++ for (i = 0; i < N*2; i++) ++ { ++ a0 = in[i*4] + 1; ++ a1 = in[i*4 + 1] + 2; ++ a2 = in[i*4 + 2] + 3; ++ a3 = in[i*4 + 3] + 4; ++ ++ out[i*4] = a0; ++ out[i*4 + 1] = a1; ++ out[i*4 + 2] = a2; ++ out[i*4 + 3] = a3; ++ ++ ia[i] = a2; ++ } ++ ++ /* check results: */ ++ for (i = 0; i < N*2; i++) ++ { ++ if (out[i*4] != in[i*4] + 1 ++ || out[i*4 + 1] != in[i*4 + 1] + 2 ++ || out[i*4 + 2] != in[i*4 + 2] + 3 ++ || out[i*4 + 3] != in[i*4 + 3] + 4 ++ || ia[i] != in[i*4 + 2] + 3) ++ abort (); ++ } ++ ++ return 0; ++} ++ ++int main (void) ++{ ++ check_vect (); ++ ++ main1 (); ++ ++ return 0; ++} ++ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided4 } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided4 } } } } */ ++/* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/slp-19.c +++ b/src/gcc/testsuite/gcc.dg/vect/slp-19.c @@ -1,154 +0,0 @@ @@ -26837,131 +26079,6 @@ -/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target { ! { vect_strided_wide } } } } } */ -/* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19a.c -@@ -0,0 +1,61 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include -+#include "tree-vect.h" -+ -+#define N 16 -+ -+int -+main1 () -+{ -+ unsigned int i; -+ unsigned int out[N*8]; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2]; -+ -+ for (i = 0; i < N; i++) -+ { -+ out[i*8] = in[i*8]; -+ out[i*8 + 1] = in[i*8 + 1]; -+ out[i*8 + 2] = in[i*8 + 2]; -+ out[i*8 + 3] = in[i*8 + 3]; -+ out[i*8 + 4] = in[i*8 + 4]; -+ out[i*8 + 5] = in[i*8 + 5]; -+ out[i*8 + 6] = in[i*8 + 6]; -+ out[i*8 + 7] = in[i*8 + 7]; -+ -+ ia[i] = in[i*8 + 2]; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N; i++) -+ { -+ if (out[i*8] != in[i*8] -+ || out[i*8 + 1] != in[i*8 + 1] -+ || out[i*8 + 2] != in[i*8 + 2] -+ || out[i*8 + 3] != in[i*8 + 3] -+ || out[i*8 + 4] != in[i*8 + 4] -+ || out[i*8 + 5] != in[i*8 + 5] -+ || out[i*8 + 6] != in[i*8 + 6] -+ || out[i*8 + 7] != in[i*8 + 7] -+ || ia[i] != in[i*8 + 2]) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided8 } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided8 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided8} } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/slp-19b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/slp-19b.c -@@ -0,0 +1,58 @@ -+/* { dg-require-effective-target vect_int } */ -+ -+#include -+#include "tree-vect.h" -+ -+#define N 16 -+ -+int -+main1 () -+{ -+ unsigned int i; -+ unsigned int out[N*8]; -+ unsigned int in[N*8] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63}; -+ unsigned int ia[N*2], a0, a1, a2, a3; -+ -+ for (i = 0; i < N*2; i++) -+ { -+ a0 = in[i*4] + 1; -+ a1 = in[i*4 + 1] + 2; -+ a2 = in[i*4 + 2] + 3; -+ a3 = in[i*4 + 3] + 4; -+ -+ out[i*4] = a0; -+ out[i*4 + 1] = a1; -+ out[i*4 + 2] = a2; -+ out[i*4 + 3] = a3; -+ -+ ia[i] = a2; -+ } -+ -+ /* check results: */ -+ for (i = 0; i < N*2; i++) -+ { -+ if (out[i*4] != in[i*4] + 1 -+ || out[i*4 + 1] != in[i*4 + 1] + 2 -+ || out[i*4 + 2] != in[i*4 + 2] + 3 -+ || out[i*4 + 3] != in[i*4 + 3] + 4 -+ || ia[i] != in[i*4 + 2] + 3) -+ abort (); -+ } -+ -+ return 0; -+} -+ -+int main (void) -+{ -+ check_vect (); -+ -+ main1 (); -+ -+ return 0; -+} -+ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { target { ! vect_strided4 } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "vect" { target vect_strided4 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 0 "vect" { target { ! vect_strided4 } } } } */ -+/* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/slp-19c.c +++ b/src/gcc/testsuite/gcc.dg/vect/slp-19c.c @@ -0,0 +1,95 @@ @@ -27327,26 +26444,6 @@ +/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ + ---- a/src/gcc/testsuite/gcc.dg/vect/vect-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-1.c -@@ -85,6 +85,6 @@ - fbar (a); - } - --/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_extract_even_odd_wide } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_extract_even_odd_wide } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_strided2 } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_strided2 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-10.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-10.c -@@ -22,5 +22,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_strided2 } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/vect-104.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-104.c @@ -64,6 +64,7 @@ @@ -27377,6 +26474,15 @@ #include #include "tree-vect.h" +--- a/src/gcc/testsuite/gcc.dg/vect/vect-10.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-10.c +@@ -22,5 +22,5 @@ + return 0; + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_extract_even_odd } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { ! vect_strided2 } } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/vect-119.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-119.c @@ -0,0 +1,28 @@ @@ -27408,6 +26514,17 @@ + +/* { dg-final { scan-tree-dump-times "Detected interleaving of size 2" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-1.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-1.c +@@ -85,6 +85,6 @@ + fbar (a); + } + +-/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_extract_even_odd_wide } } } */ +-/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_extract_even_odd_wide } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 6 loops" 1 "vect" { target vect_strided2 } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 5 loops" 1 "vect" { xfail vect_strided2 } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ --- a/src/gcc/testsuite/gcc.dg/vect/vect-40.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-40.c @@ -1,4 +1,5 @@ @@ -27710,6 +26827,70 @@ + +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 0 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect.exp ++++ b/src/gcc/testsuite/gcc.dg/vect/vect.exp +@@ -75,15 +75,20 @@ + lappend VECT_SLP_CFLAGS "-fdump-tree-slp-details" + + # Main loop. +-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ +- "" $DEFAULT_VECTCFLAGS +-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ +- "" $DEFAULT_VECTCFLAGS +-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ +- "" $DEFAULT_VECTCFLAGS +-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ +- "" $VECT_SLP_CFLAGS +- ++set VECT_ADDITIONAL_FLAGS [list ""] ++if { [check_effective_target_lto] } { ++ lappend VECT_ADDITIONAL_FLAGS "-flto" ++} ++foreach flags $VECT_ADDITIONAL_FLAGS { ++ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ ++ $flags $DEFAULT_VECTCFLAGS ++ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ ++ $flags $DEFAULT_VECTCFLAGS ++ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ ++ $flags $DEFAULT_VECTCFLAGS ++ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ ++ $flags $VECT_SLP_CFLAGS ++} + + #### Tests with special options + global SAVED_DEFAULT_VECTCFLAGS +@@ -210,6 +215,12 @@ + dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/ggc-*.\[cS\]]] \ + "" $DEFAULT_VECTCFLAGS + ++# -ftree-loop-if-convert-stores ++set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS ++lappend DEFAULT_VECTCFLAGS "-ftree-loop-if-convert-stores" ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/if-cvt-stores-vect-*.\[cS\]]] \ ++ "" $DEFAULT_VECTCFLAGS ++ + # With -O3. + # Don't allow IPA cloning, because it throws our counts out of whack. + set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS +@@ -234,6 +245,18 @@ + dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-reassoc-bb-slp-*.\[cS\]]] \ + "" $VECT_SLP_CFLAGS + ++# -fno-tree-fre ++set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS ++lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-fre-*.\[cS\]]] \ ++ "" $DEFAULT_VECTCFLAGS ++ ++# -fno-tree-fre -fno-tree-pre ++set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS ++lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" "-fno-tree-pre" ++dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-fre-pre*.\[cS\]]] \ ++ "" $DEFAULT_VECTCFLAGS ++ + # Clean up. + set dg-do-what-default ${save-dg-do-what-default} + --- a/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c @@ -1,5 +1,4 @@ @@ -27742,9 +26923,9 @@ #include #include "tree-vect.h" ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c -@@ -22,5 +22,6 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c +@@ -20,5 +20,6 @@ } /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ @@ -27752,9 +26933,9 @@ +/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ +/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1a.c -@@ -20,5 +20,6 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c +@@ -22,5 +22,6 @@ } /* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED" 1 "vect" { xfail *-*-* } } } */ @@ -27762,8 +26943,8 @@ +/* { dg-final { scan-tree-dump-times "strided access in outer loop" 1 "vect" { xfail vect_multiple_sizes } } } */ +/* { dg-final { scan-tree-dump-times "strided access in outer loop" 2 "vect" { target vect_multiple_sizes } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1b.c +--- a/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-outer-1.c @@ -22,5 +22,6 @@ } @@ -28317,8 +27498,8 @@ +/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c +--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c @@ -71,6 +71,6 @@ return 0; } @@ -28326,9 +27507,9 @@ -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ - ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult.c + +--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-mult-char-ls.c @@ -71,6 +71,6 @@ return 0; } @@ -28336,7 +27517,7 @@ -/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ - + --- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-same-dr.c @@ -72,5 +72,5 @@ @@ -28546,6 +27727,16 @@ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c +@@ -54,6 +54,6 @@ + return 0; + } + +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ + /* { dg-final { cleanup-tree-dump "vect" } } */ + --- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2-gap.c @@ -71,6 +71,6 @@ @@ -28556,16 +27747,16 @@ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i2.c -@@ -54,6 +54,6 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c +@@ -85,6 +85,6 @@ return 0; } --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided2 } } } */ +-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ - + --- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8-gap2.c @@ -78,6 +78,6 @@ @@ -28596,16 +27787,6 @@ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ /* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-strided-u8-i8.c -@@ -85,6 +85,6 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target { vect_interleave && vect_extract_even_odd } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_strided8 } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - --- a/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c +++ b/src/gcc/testsuite/gcc.dg/vect/vect-vfa-03.c @@ -53,6 +53,6 @@ @@ -28760,9 +27941,9 @@ +/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ + ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c -@@ -0,0 +1,59 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c +@@ -0,0 +1,49 @@ +/* { dg-require-effective-target vect_int } */ + +#include "tree-vect.h" @@ -28770,26 +27951,22 @@ + +#define N 32 +#define COEF 32470 ++#define COEF2 324700 + +unsigned char in[N]; +int out[N]; ++int out2[N]; + +__attribute__ ((noinline)) void -+foo () -+{ -+ int i; -+ -+ for (i = 0; i < N; i++) -+ out[i] = in[i] * COEF; -+} -+ -+__attribute__ ((noinline)) void -+bar () ++foo (int a) +{ + int i; + + for (i = 0; i < N; i++) -+ out[i] = COEF * in[i]; ++ { ++ out[i] = in[i] * COEF; ++ out2[i] = in[i] + a; ++ } +} + +int main (void) @@ -28802,29 +27979,23 @@ + __asm__ volatile (""); + } + -+ foo (); -+ -+ for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF) -+ abort (); -+ -+ bar (); ++ foo (COEF2); + + for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF) ++ if (out[i] != in[i] * COEF || out2[i] != in[i] + COEF2) + abort (); + + return 0; +} + -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */ ++/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ + ---- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c -+++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half.c -@@ -0,0 +1,49 @@ +--- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c ++++ b/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-half-u8.c +@@ -0,0 +1,59 @@ +/* { dg-require-effective-target vect_int } */ + +#include "tree-vect.h" @@ -28832,22 +28003,26 @@ + +#define N 32 +#define COEF 32470 -+#define COEF2 324700 + +unsigned char in[N]; +int out[N]; -+int out2[N]; + +__attribute__ ((noinline)) void -+foo (int a) ++foo () +{ + int i; + + for (i = 0; i < N; i++) -+ { -+ out[i] = in[i] * COEF; -+ out2[i] = in[i] + a; -+ } ++ out[i] = in[i] * COEF; ++} ++ ++__attribute__ ((noinline)) void ++bar () ++{ ++ int i; ++ ++ for (i = 0; i < N; i++) ++ out[i] = COEF * in[i]; +} + +int main (void) @@ -28860,18 +28035,24 @@ + __asm__ volatile (""); + } + -+ foo (COEF2); ++ foo (); + + for (i = 0; i < N; i++) -+ if (out[i] != in[i] * COEF || out2[i] != in[i] + COEF2) ++ if (out[i] != in[i] * COEF) ++ abort (); ++ ++ bar (); ++ ++ for (i = 0; i < N; i++) ++ if (out[i] != in[i] * COEF) + abort (); + + return 0; +} + -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { target vect_widen_mult_hi_to_si } } } */ -+/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ -+/* { dg-final { scan-tree-dump-times "pattern recognized" 1 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_widen_mult_hi_to_si } } } */ ++/* { dg-final { scan-tree-dump-times "vect_recog_widen_mult_pattern: detected" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ ++/* { dg-final { scan-tree-dump-times "pattern recognized" 2 "vect" { target vect_widen_mult_hi_to_si_pattern } } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ + --- a/src/gcc/testsuite/gcc.dg/vect/vect-widen-mult-u16.c @@ -29231,88 +28412,6 @@ +/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 2 "vect" { target vect_widen_shift } } } */ +/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ +/* { dg-final { cleanup-tree-dump "vect" } } */ ---- a/src/gcc/testsuite/gcc.dg/vect/vect.exp -+++ b/src/gcc/testsuite/gcc.dg/vect/vect.exp -@@ -75,15 +75,20 @@ - lappend VECT_SLP_CFLAGS "-fdump-tree-slp-details" - - # Main loop. --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ -- "" $DEFAULT_VECTCFLAGS --dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ -- "" $VECT_SLP_CFLAGS -- -+set VECT_ADDITIONAL_FLAGS [list ""] -+if { [check_effective_target_lto] } { -+ lappend VECT_ADDITIONAL_FLAGS "-flto" -+} -+foreach flags $VECT_ADDITIONAL_FLAGS { -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/pr*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/vect-*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/slp-*.\[cS\]]] \ -+ $flags $DEFAULT_VECTCFLAGS -+ dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/bb-slp*.\[cS\]]] \ -+ $flags $VECT_SLP_CFLAGS -+} - - #### Tests with special options - global SAVED_DEFAULT_VECTCFLAGS -@@ -210,6 +215,12 @@ - dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/ggc-*.\[cS\]]] \ - "" $DEFAULT_VECTCFLAGS - -+# -ftree-loop-if-convert-stores -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-ftree-loop-if-convert-stores" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/if-cvt-stores-vect-*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ - # With -O3. - # Don't allow IPA cloning, because it throws our counts out of whack. - set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -@@ -234,6 +245,18 @@ - dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-reassoc-bb-slp-*.\[cS\]]] \ - "" $VECT_SLP_CFLAGS - -+# -fno-tree-fre -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-tree-fre-*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ -+# -fno-tree-fre -fno-tree-pre -+set DEFAULT_VECTCFLAGS $SAVED_DEFAULT_VECTCFLAGS -+lappend DEFAULT_VECTCFLAGS "-fno-tree-fre" "-fno-tree-pre" -+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/no-fre-pre*.\[cS\]]] \ -+ "" $DEFAULT_VECTCFLAGS -+ - # Clean up. - set dg-do-what-default ${save-dg-do-what-default} - ---- a/src/gcc/testsuite/gcc.dg/volatile-bitfields-2.c -+++ b/src/gcc/testsuite/gcc.dg/volatile-bitfields-2.c -@@ -0,0 +1,15 @@ -+/* { dg-do run } */ -+/* { dg-options "-fstrict-volatile-bitfields" } */ -+ -+extern void abort(void); -+struct thing { -+ volatile unsigned short a: 8; -+ volatile unsigned short b: 8; -+} t = {1,2}; -+ -+int main() -+{ -+ t.a = 3; -+ if (t.a !=3 || t.b !=2) abort(); -+ return 0; -+} --- a/src/gcc/testsuite/gcc.target/arm/aapcs/abitest.h +++ b/src/gcc/testsuite/gcc.target/arm/aapcs/abitest.h @@ -1,3 +1,4 @@ @@ -29635,16 +28734,6 @@ +ARG(double, 2.47, STACK+sizeof(int32x4x3_t)) +LAST_ARG(int, 3, R0) +#endif ---- a/src/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c -+++ b/src/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c -@@ -1,6 +1,6 @@ - /* Test AAPCS layout (VFP variant) */ - --/* { dg-do run { target arm*-*-eabi* } } */ -+/* { dg-do run { target arm*-*-*eabi* } } */ - /* { dg-require-effective-target arm_hard_vfp_ok } */ - /* { dg-require-effective-target arm32 } */ - /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ --- a/src/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c +++ b/src/gcc/testsuite/gcc.target/arm/aapcs/vfp10.c @@ -1,6 +1,6 @@ @@ -29725,6 +28814,16 @@ /* { dg-require-effective-target arm_hard_vfp_ok } */ /* { dg-require-effective-target arm32 } */ /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ +--- a/src/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c ++++ b/src/gcc/testsuite/gcc.target/arm/aapcs/vfp1.c +@@ -1,6 +1,6 @@ + /* Test AAPCS layout (VFP variant) */ + +-/* { dg-do run { target arm*-*-eabi* } } */ ++/* { dg-do run { target arm*-*-*eabi* } } */ + /* { dg-require-effective-target arm_hard_vfp_ok } */ + /* { dg-require-effective-target arm32 } */ + /* { dg-options "-O -mfpu=vfp -mfloat-abi=hard" } */ --- a/src/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c +++ b/src/gcc/testsuite/gcc.target/arm/aapcs/vfp2.c @@ -1,6 +1,6 @@ @@ -29934,6 +29033,22 @@ +/* { dg-final { scan-assembler-not "__sync_" } } */ +/* { dg-final { scan-assembler-not "ldrex\t" } } */ +/* { dg-final { scan-assembler-not "strex\t" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/lp1013209.c ++++ b/src/gcc/testsuite/gcc.target/arm/lp1013209.c +@@ -0,0 +1,13 @@ ++/* { dg-do compile } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++#include "arm_neon.h" ++ ++void foo (void) ++{ ++ int16_t buffer[2048]; ++ int f; ++ for (f = 0; f < 128; f += 8) ++ vst1q_u16 (&buffer[f], (uint16x8_t){0}); ++ ++} --- a/src/gcc/testsuite/gcc.target/arm/mla-2.c +++ b/src/gcc/testsuite/gcc.target/arm/mla-2.c @@ -0,0 +1,9 @@ @@ -29946,6 +29061,231 @@ +} + +/* { dg-final { scan-assembler "smlalbb" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c +@@ -15,5 +15,5 @@ + out_float32x2_t = vld1_dup_f32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c +@@ -15,5 +15,5 @@ + out_poly16x4_t = vld1_dup_p16 (0); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c +@@ -15,5 +15,5 @@ + out_poly8x8_t = vld1_dup_p8 (0); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c +@@ -15,5 +15,5 @@ + out_int16x4_t = vld1_dup_s16 (0); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c +@@ -15,5 +15,5 @@ + out_int32x2_t = vld1_dup_s32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c +@@ -15,5 +15,5 @@ + out_int64x1_t = vld1_dup_s64 (0); + } + +-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c +@@ -15,5 +15,5 @@ + out_int8x8_t = vld1_dup_s8 (0); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c +@@ -15,5 +15,5 @@ + out_uint16x4_t = vld1_dup_u16 (0); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c +@@ -15,5 +15,5 @@ + out_uint32x2_t = vld1_dup_u32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c +@@ -15,5 +15,5 @@ + out_uint64x1_t = vld1_dup_u64 (0); + } + +-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c +@@ -15,5 +15,5 @@ + out_uint8x8_t = vld1_dup_u8 (0); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c +@@ -15,5 +15,5 @@ + out_float32x2_t = vld1_f32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c +@@ -16,5 +16,5 @@ + out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c +@@ -16,5 +16,5 @@ + out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c +@@ -16,5 +16,5 @@ + out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c +@@ -16,5 +16,5 @@ + out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c +@@ -16,5 +16,5 @@ + out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c +@@ -16,5 +16,5 @@ + out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); + } + +-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c +@@ -16,5 +16,5 @@ + out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c +@@ -16,5 +16,5 @@ + out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c +@@ -16,5 +16,5 @@ + out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c +@@ -16,5 +16,5 @@ + out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); + } + +-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c +@@ -16,5 +16,5 @@ + out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c +@@ -15,5 +15,5 @@ + out_poly16x4_t = vld1_p16 (0); + } + +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c +@@ -15,5 +15,5 @@ + out_poly8x8_t = vld1_p8 (0); + } + +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c @@ -15,5 +15,5 @@ @@ -30045,6 +29385,15 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c +@@ -15,5 +15,5 @@ + out_float32x4_t = vld1q_f32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c @@ -16,5 +16,5 @@ @@ -30144,15 +29493,6 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c -@@ -15,5 +15,5 @@ - out_float32x4_t = vld1q_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c @@ -15,5 +15,5 @@ @@ -30243,302 +29583,295 @@ -/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c @@ -15,5 +15,5 @@ - out_float32x2_t = vld1_dup_f32 (0); + out_int16x4_t = vld1_s16 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c @@ -15,5 +15,5 @@ - out_poly16x4_t = vld1_dup_p16 (0); + out_int32x2_t = vld1_s32 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c @@ -15,5 +15,5 @@ - out_poly8x8_t = vld1_dup_p8 (0); + out_int64x1_t = vld1_s64 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c @@ -15,5 +15,5 @@ - out_int16x4_t = vld1_dup_s16 (0); + out_int8x8_t = vld1_s8 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c @@ -15,5 +15,5 @@ - out_int32x2_t = vld1_dup_s32 (0); + out_uint16x4_t = vld1_u16 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c @@ -15,5 +15,5 @@ - out_int64x1_t = vld1_dup_s64 (0); + out_uint32x2_t = vld1_u32 (0); + } + +-/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c +@@ -15,5 +15,5 @@ + out_uint64x1_t = vld1_u64 (0); } -/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c @@ -15,5 +15,5 @@ - out_int8x8_t = vld1_dup_s8 (0); + out_uint8x8_t = vld1_u8 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c @@ -15,5 +15,5 @@ - out_uint16x4_t = vld1_dup_u16 (0); + out_float32x2x2_t = vld2_dup_f32 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c @@ -15,5 +15,5 @@ - out_uint32x2_t = vld1_dup_u32 (0); + out_poly16x4x2_t = vld2_dup_p16 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c @@ -15,5 +15,5 @@ - out_uint64x1_t = vld1_dup_u64 (0); + out_poly8x8x2_t = vld2_dup_p8 (0); } --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c @@ -15,5 +15,5 @@ - out_uint8x8_t = vld1_dup_u8 (0); + out_int16x4x2_t = vld2_dup_s16 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c +@@ -15,5 +15,5 @@ + out_int32x2x2_t = vld2_dup_s32 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c +@@ -15,5 +15,5 @@ + out_int64x1x2_t = vld2_dup_s64 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c +@@ -15,5 +15,5 @@ + out_int8x8x2_t = vld2_dup_s8 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c +@@ -15,5 +15,5 @@ + out_uint16x4x2_t = vld2_dup_u16 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c +@@ -15,5 +15,5 @@ + out_uint32x2x2_t = vld2_dup_u32 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c -@@ -16,5 +16,5 @@ - out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c +@@ -15,5 +15,5 @@ + out_uint64x1x2_t = vld2_dup_u64 (0); } --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c +@@ -15,5 +15,5 @@ + out_uint8x8x2_t = vld2_dup_u8 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c +@@ -15,5 +15,5 @@ + out_float32x2x2_t = vld2_f32 (0); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c @@ -16,5 +16,5 @@ - out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1); + out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c @@ -16,5 +16,5 @@ - out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0); + out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c @@ -16,5 +16,5 @@ - out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1); - } - --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1f32.c -@@ -15,5 +15,5 @@ - out_float32x2_t = vld1_f32 (0); - } - --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p16.c -@@ -15,5 +15,5 @@ - out_poly16x4_t = vld1_p16 (0); + out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1p8.c -@@ -15,5 +15,5 @@ - out_poly8x8_t = vld1_p8 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c +@@ -16,5 +16,5 @@ + out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s16.c -@@ -15,5 +15,5 @@ - out_int16x4_t = vld1_s16 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c +@@ -16,5 +16,5 @@ + out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s32.c -@@ -15,5 +15,5 @@ - out_int32x2_t = vld1_s32 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c +@@ -16,5 +16,5 @@ + out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s64.c -@@ -15,5 +15,5 @@ - out_int64x1_t = vld1_s64 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c +@@ -16,5 +16,5 @@ + out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1s8.c -@@ -15,5 +15,5 @@ - out_int8x8_t = vld1_s8 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c +@@ -16,5 +16,5 @@ + out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u16.c -@@ -15,5 +15,5 @@ - out_uint16x4_t = vld1_u16 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c +@@ -16,5 +16,5 @@ + out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); } --/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c @@ -15,5 +15,5 @@ - out_uint32x2_t = vld1_u32 (0); + out_poly16x4x2_t = vld2_p16 (0); } --/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c @@ -15,5 +15,5 @@ - out_uint64x1_t = vld1_u64 (0); + out_poly8x8x2_t = vld2_p8 (0); } --/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld1u8.c -@@ -15,5 +15,5 @@ - out_uint8x8_t = vld1_u8 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c +@@ -15,6 +15,6 @@ + out_float32x4x2_t = vld2q_f32 (0); } --/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c @@ -30594,17 +29927,6 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x2_t = vld2q_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c @@ -15,6 +15,6 @@ @@ -30693,213 +30015,6 @@ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c -@@ -15,5 +15,5 @@ - out_float32x2x2_t = vld2_dup_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c -@@ -15,5 +15,5 @@ - out_poly16x4x2_t = vld2_dup_p16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c -@@ -15,5 +15,5 @@ - out_poly8x8x2_t = vld2_dup_p8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c -@@ -15,5 +15,5 @@ - out_int16x4x2_t = vld2_dup_s16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c -@@ -15,5 +15,5 @@ - out_int32x2x2_t = vld2_dup_s32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c -@@ -15,5 +15,5 @@ - out_int64x1x2_t = vld2_dup_s64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c -@@ -15,5 +15,5 @@ - out_int8x8x2_t = vld2_dup_s8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c -@@ -15,5 +15,5 @@ - out_uint16x4x2_t = vld2_dup_u16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c -@@ -15,5 +15,5 @@ - out_uint32x2x2_t = vld2_dup_u32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c -@@ -15,5 +15,5 @@ - out_uint64x1x2_t = vld2_dup_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c -@@ -15,5 +15,5 @@ - out_uint8x8x2_t = vld2_dup_u8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c -@@ -16,5 +16,5 @@ - out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c -@@ -16,5 +16,5 @@ - out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c -@@ -16,5 +16,5 @@ - out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2f32.c -@@ -15,5 +15,5 @@ - out_float32x2x2_t = vld2_f32 (0); - } - --/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p16.c -@@ -15,5 +15,5 @@ - out_poly16x4x2_t = vld2_p16 (0); - } - --/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2p8.c -@@ -15,5 +15,5 @@ - out_poly8x8x2_t = vld2_p8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2s16.c @@ -15,5 +15,5 @@ @@ -30954,176 +30069,23 @@ -/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c -@@ -15,5 +15,5 @@ - out_uint64x1x2_t = vld2_u64 (0); - } - --/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c -@@ -15,5 +15,5 @@ - out_uint8x8x2_t = vld2_u8 (0); - } - --/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x3_t = vld3q_f32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c -@@ -15,6 +15,6 @@ - out_poly16x8x3_t = vld3q_p16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c -@@ -15,6 +15,6 @@ - out_poly8x16x3_t = vld3q_p8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c -@@ -15,6 +15,6 @@ - out_int16x8x3_t = vld3q_s16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c -@@ -15,6 +15,6 @@ - out_int32x4x3_t = vld3q_s32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c -@@ -15,6 +15,6 @@ - out_int8x16x3_t = vld3q_s8 (0); - } - --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c -@@ -15,6 +15,6 @@ - out_uint16x8x3_t = vld3q_u16 (0); - } - --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c -@@ -15,6 +15,6 @@ - out_uint32x4x3_t = vld3q_u32 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u64.c +@@ -15,5 +15,5 @@ + out_uint64x1x2_t = vld2_u64 (0); } --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c -@@ -15,6 +15,6 @@ - out_uint8x16x3_t = vld3q_u8 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld2u8.c +@@ -15,5 +15,5 @@ + out_uint8x8x2_t = vld2_u8 (0); } --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c @@ -31224,6 +30186,15 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c +@@ -15,5 +15,5 @@ + out_float32x2x3_t = vld3_f32 (0); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c @@ -16,5 +16,5 @@ @@ -31305,15 +30276,6 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3f32.c -@@ -15,5 +15,5 @@ - out_float32x2x3_t = vld3_f32 (0); - } - --/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3p16.c @@ -15,5 +15,5 @@ @@ -31332,6 +30294,159 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c +@@ -15,6 +15,6 @@ + out_float32x4x3_t = vld3q_f32 (0); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c +@@ -16,5 +16,5 @@ + out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c +@@ -16,5 +16,5 @@ + out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c +@@ -16,5 +16,5 @@ + out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c +@@ -16,5 +16,5 @@ + out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c +@@ -16,5 +16,5 @@ + out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c +@@ -16,5 +16,5 @@ + out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c +@@ -15,6 +15,6 @@ + out_poly16x8x3_t = vld3q_p16 (0); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c +@@ -15,6 +15,6 @@ + out_poly8x16x3_t = vld3q_p8 (0); + } + +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c +@@ -15,6 +15,6 @@ + out_int16x8x3_t = vld3q_s16 (0); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c +@@ -15,6 +15,6 @@ + out_int32x4x3_t = vld3q_s32 (0); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c +@@ -15,6 +15,6 @@ + out_int8x16x3_t = vld3q_s8 (0); + } + +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c +@@ -15,6 +15,6 @@ + out_uint16x8x3_t = vld3q_u16 (0); + } + +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c +@@ -15,6 +15,6 @@ + out_uint32x4x3_t = vld3q_u32 (0); + } + +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c +@@ -15,6 +15,6 @@ + out_uint8x16x3_t = vld3q_u8 (0); + } + +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld3s16.c @@ -15,5 +15,5 @@ @@ -31404,159 +30519,6 @@ -/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c -@@ -16,5 +16,5 @@ - out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c -@@ -16,5 +16,5 @@ - out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c -@@ -16,5 +16,5 @@ - out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c -@@ -16,5 +16,5 @@ - out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c -@@ -16,5 +16,5 @@ - out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c -@@ -16,5 +16,5 @@ - out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c -@@ -15,6 +15,6 @@ - out_float32x4x4_t = vld4q_f32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c -@@ -15,6 +15,6 @@ - out_poly16x8x4_t = vld4q_p16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c -@@ -15,6 +15,6 @@ - out_poly8x16x4_t = vld4q_p8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c -@@ -15,6 +15,6 @@ - out_int16x8x4_t = vld4q_s16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c -@@ -15,6 +15,6 @@ - out_int32x4x4_t = vld4q_s32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c -@@ -15,6 +15,6 @@ - out_int8x16x4_t = vld4q_s8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c -@@ -15,6 +15,6 @@ - out_uint16x8x4_t = vld4q_u16 (0); - } - --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c -@@ -15,6 +15,6 @@ - out_uint32x4x4_t = vld4q_u32 (0); - } - --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c -@@ -15,6 +15,6 @@ - out_uint8x16x4_t = vld4q_u8 (0); - } - --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c @@ -15,5 +15,5 @@ @@ -31656,6 +30618,15 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c +@@ -15,5 +15,5 @@ + out_float32x2x4_t = vld4_f32 (0); + } + +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c @@ -16,5 +16,5 @@ @@ -31737,31 +30708,175 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4f32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c @@ -15,5 +15,5 @@ - out_float32x2x4_t = vld4_f32 (0); + out_poly16x4x4_t = vld4_p16 (0); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c +@@ -15,5 +15,5 @@ + out_poly8x8x4_t = vld4_p8 (0); + } + +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c +@@ -15,6 +15,6 @@ + out_float32x4x4_t = vld4q_f32 (0); } -/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p16.c -@@ -15,5 +15,5 @@ - out_poly16x4x4_t = vld4_p16 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c +@@ -16,5 +16,5 @@ + out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c +@@ -16,5 +16,5 @@ + out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c +@@ -16,5 +16,5 @@ + out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c +@@ -16,5 +16,5 @@ + out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c +@@ -16,5 +16,5 @@ + out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c +@@ -16,5 +16,5 @@ + out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1); + } + +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c +@@ -15,6 +15,6 @@ + out_poly16x8x4_t = vld4q_p16 (0); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c +@@ -15,6 +15,6 @@ + out_poly8x16x4_t = vld4q_p8 (0); + } + +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c +@@ -15,6 +15,6 @@ + out_int16x8x4_t = vld4q_s16 (0); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c +@@ -15,6 +15,6 @@ + out_int32x4x4_t = vld4q_s32 (0); + } + +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c +@@ -15,6 +15,6 @@ + out_int8x16x4_t = vld4q_s8 (0); + } + +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c +@@ -15,6 +15,6 @@ + out_uint16x8x4_t = vld4q_u16 (0); + } + +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c +@@ -15,6 +15,6 @@ + out_uint32x4x4_t = vld4q_u32 (0); } --/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vld4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4p8.c -@@ -15,5 +15,5 @@ - out_poly8x8x4_t = vld4_p8 (0); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c +@@ -15,6 +15,6 @@ + out_uint8x16x4_t = vld4q_u8 (0); } -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vld4s16.c @@ -31836,6 +30951,141 @@ -/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vld4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c +@@ -16,5 +16,5 @@ + vst1_f32 (arg0_float32_t, arg1_float32x2_t); + } + +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c +@@ -16,5 +16,5 @@ + vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c +@@ -16,5 +16,5 @@ + vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c +@@ -16,5 +16,5 @@ + vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c +@@ -16,5 +16,5 @@ + vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c +@@ -16,5 +16,5 @@ + vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c +@@ -16,5 +16,5 @@ + vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); + } + +-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c +@@ -16,5 +16,5 @@ + vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c +@@ -16,5 +16,5 @@ + vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c +@@ -16,5 +16,5 @@ + vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c +@@ -16,5 +16,5 @@ + vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); + } + +-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c +@@ -16,5 +16,5 @@ + vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); + } + +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c +@@ -16,5 +16,5 @@ + vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); + } + +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c +@@ -16,5 +16,5 @@ + vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); + } + +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c +@@ -16,5 +16,5 @@ + vst1q_f32 (arg0_float32_t, arg1_float32x4_t); + } + +-/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c @@ -16,5 +16,5 @@ @@ -31935,15 +31185,6 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c -@@ -16,5 +16,5 @@ - vst1q_f32 (arg0_float32_t, arg1_float32x4_t); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c @@ -16,5 +16,5 @@ @@ -32034,203 +31275,196 @@ -/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst1\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c -@@ -16,5 +16,5 @@ - vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1); - } - --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c @@ -16,5 +16,5 @@ - vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1); + vst1_s16 (arg0_int16_t, arg1_int16x4_t); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c @@ -16,5 +16,5 @@ - vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1); + vst1_s32 (arg0_int32_t, arg1_int32x2_t); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c @@ -16,5 +16,5 @@ - vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1); + vst1_s64 (arg0_int64_t, arg1_int64x1_t); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c @@ -16,5 +16,5 @@ - vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1); + vst1_s8 (arg0_int8_t, arg1_int8x8_t); } --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c @@ -16,5 +16,5 @@ - vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0); + vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c @@ -16,5 +16,5 @@ - vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1); + vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c @@ -16,5 +16,5 @@ - vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1); + vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c @@ -16,5 +16,5 @@ - vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1); + vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); } --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c @@ -16,5 +16,5 @@ - vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0); + vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c @@ -16,5 +16,5 @@ - vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1); + vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1f32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c @@ -16,5 +16,5 @@ - vst1_f32 (arg0_float32_t, arg1_float32x2_t); + vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c @@ -16,5 +16,5 @@ - vst1_p16 (arg0_poly16_t, arg1_poly16x4_t); + vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1p8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c @@ -16,5 +16,5 @@ - vst1_p8 (arg0_poly8_t, arg1_poly8x8_t); + vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c @@ -16,5 +16,5 @@ - vst1_s16 (arg0_int16_t, arg1_int16x4_t); + vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c @@ -16,5 +16,5 @@ - vst1_s32 (arg0_int32_t, arg1_int32x2_t); + vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c @@ -16,5 +16,5 @@ - vst1_s64 (arg0_int64_t, arg1_int64x1_t); + vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1s8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c @@ -16,5 +16,5 @@ - vst1_s8 (arg0_int8_t, arg1_int8x8_t); + vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c @@ -16,5 +16,5 @@ - vst1_u16 (arg0_uint16_t, arg1_uint16x4_t); + vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); } --/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.16\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c @@ -16,5 +16,5 @@ - vst1_u32 (arg0_uint32_t, arg1_uint32x2_t); + vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); } --/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c @@ -16,5 +16,5 @@ - vst1_u64 (arg0_uint64_t, arg1_uint64x1_t); + vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst1u8.c -@@ -16,5 +16,5 @@ - vst1_u8 (arg0_uint8_t, arg1_uint8x8_t); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c +@@ -16,6 +16,6 @@ + vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); } --/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.8\[ \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c @@ -32286,17 +31520,6 @@ -/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c -@@ -16,6 +16,6 @@ - vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c @@ -16,6 +16,6 @@ @@ -32368,129 +31591,21 @@ @@ -16,6 +16,6 @@ vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t); } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c -@@ -16,6 +16,6 @@ - vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c -@@ -16,5 +16,5 @@ - vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c -@@ -16,5 +16,5 @@ - vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c -@@ -16,5 +16,5 @@ - vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c -@@ -16,5 +16,5 @@ - vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c -@@ -16,5 +16,5 @@ - vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c -@@ -16,5 +16,5 @@ - vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c -@@ -16,5 +16,5 @@ - vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c -@@ -16,5 +16,5 @@ - vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c -@@ -16,5 +16,5 @@ - vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1); - } - --/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2f32.c -@@ -16,5 +16,5 @@ - vst2_f32 (arg0_float32_t, arg1_float32x2x2_t); - } - --/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p16.c -@@ -16,5 +16,5 @@ - vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t); - } - --/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst2\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2p8.c -@@ -16,5 +16,5 @@ - vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t); +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c +@@ -16,6 +16,6 @@ + vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t); } -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst2s16.c @@ -32565,6 +31680,125 @@ -/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst2\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c +@@ -16,5 +16,5 @@ + vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); + } + +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c +@@ -16,5 +16,5 @@ + vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c +@@ -16,5 +16,5 @@ + vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c +@@ -16,5 +16,5 @@ + vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c +@@ -16,5 +16,5 @@ + vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c +@@ -16,5 +16,5 @@ + vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c +@@ -16,5 +16,5 @@ + vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c +@@ -16,5 +16,5 @@ + vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c +@@ -16,5 +16,5 @@ + vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c +@@ -16,5 +16,5 @@ + vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); + } + +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c +@@ -16,5 +16,5 @@ + vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); + } + +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c +@@ -16,5 +16,5 @@ + vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); + } + +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c +@@ -16,6 +16,6 @@ + vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); + } + +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c @@ -16,5 +16,5 @@ @@ -32619,17 +31853,6 @@ -/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c -@@ -16,6 +16,6 @@ - vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t); - } - --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c @@ -16,6 +16,6 @@ @@ -32718,185 +31941,196 @@ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c @@ -16,5 +16,5 @@ - vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1); + vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c @@ -16,5 +16,5 @@ - vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1); + vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c @@ -16,5 +16,5 @@ - vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1); + vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c @@ -16,5 +16,5 @@ - vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1); + vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c @@ -16,5 +16,5 @@ - vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1); + vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c @@ -16,5 +16,5 @@ - vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1); + vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c @@ -16,5 +16,5 @@ - vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1); + vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c @@ -16,5 +16,5 @@ - vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1); + vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c @@ -16,5 +16,5 @@ - vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1); + vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3f32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c @@ -16,5 +16,5 @@ - vst3_f32 (arg0_float32_t, arg1_float32x2x3_t); + vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c @@ -16,5 +16,5 @@ - vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t); + vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3p8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c @@ -16,5 +16,5 @@ - vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t); + vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c @@ -16,5 +16,5 @@ - vst3_s16 (arg0_int16_t, arg1_int16x4x3_t); + vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c @@ -16,5 +16,5 @@ - vst3_s32 (arg0_int32_t, arg1_int32x2x3_t); + vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c @@ -16,5 +16,5 @@ - vst3_s64 (arg0_int64_t, arg1_int64x1x3_t); + vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3s8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c @@ -16,5 +16,5 @@ - vst3_s8 (arg0_int8_t, arg1_int8x8x3_t); + vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u16.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c @@ -16,5 +16,5 @@ - vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t); + vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u32.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c @@ -16,5 +16,5 @@ - vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t); + vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); } --/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u64.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c @@ -16,5 +16,5 @@ - vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t); + vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); } --/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst1\.64\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst3u8.c +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c @@ -16,5 +16,5 @@ - vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t); + vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); } --/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst3\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ + /* { dg-final { cleanup-saved-temps } } */ +--- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c ++++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c +@@ -16,6 +16,6 @@ + vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); + } + +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +-/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ ++/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c @@ -32952,17 +32186,6 @@ -/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c -@@ -16,6 +16,6 @@ - vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c @@ -16,6 +16,6 @@ @@ -33051,114 +32274,6 @@ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ +/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c -@@ -16,5 +16,5 @@ - vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c -@@ -16,5 +16,5 @@ - vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c -@@ -16,5 +16,5 @@ - vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c -@@ -16,5 +16,5 @@ - vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c -@@ -16,5 +16,5 @@ - vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c -@@ -16,5 +16,5 @@ - vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c -@@ -16,5 +16,5 @@ - vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c -@@ -16,5 +16,5 @@ - vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c -@@ -16,5 +16,5 @@ - vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4f32.c -@@ -16,5 +16,5 @@ - vst4_f32 (arg0_float32_t, arg1_float32x2x4_t); - } - --/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.32\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p16.c -@@ -16,5 +16,5 @@ - vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t); - } - --/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.16\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ ---- a/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c -+++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4p8.c -@@ -16,5 +16,5 @@ - vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t); - } - --/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ -+/* { dg-final { scan-assembler "vst4\.8\[ \]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */ - /* { dg-final { cleanup-saved-temps } } */ --- a/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c +++ b/src/gcc/testsuite/gcc.target/arm/neon/vst4s16.c @@ -16,5 +16,5 @@ @@ -33642,6 +32757,22 @@ +} + +/* { dg-final { scan-assembler "umlal" } } */ +--- a/src/gcc/testsuite/gcc.target/arm/pr52633.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr52633.c +@@ -0,0 +1,13 @@ ++/* PR tree-optimization/52633 */ ++/* { dg-do compile } */ ++/* { dg-require-effective-target arm_neon_ok } */ ++/* { dg-options "-march=armv7-a -mfloat-abi=softfp -mfpu=neon -O -ftree-vectorize" } */ ++ ++void ++test (unsigned short *x, signed char *y) ++{ ++ int i; ++ for (i = 0; i < 32; i++) ++ x[i] = (short) (y[i] << 5); ++} ++ --- a/src/gcc/testsuite/gcc.target/arm/pr52686.c +++ b/src/gcc/testsuite/gcc.target/arm/pr52686.c @@ -0,0 +1,19 @@ @@ -33664,6 +32795,57 @@ + } +} + +--- a/src/gcc/testsuite/gcc.target/arm/pr53636.c ++++ b/src/gcc/testsuite/gcc.target/arm/pr53636.c +@@ -0,0 +1,48 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_neon_hw } */ ++/* { dg-options "-O -ftree-vectorize" } */ ++/* { dg-add-options arm_neon } */ ++ ++void fill (short *buf) __attribute__ ((noinline)); ++void fill (short *buf) ++{ ++ int i; ++ ++ for (i = 0; i < 11 * 8; i++) ++ buf[i] = i; ++} ++ ++void test (unsigned char *dst) __attribute__ ((noinline)); ++void test (unsigned char *dst) ++{ ++ short tmp[11 * 8], *tptr; ++ int i; ++ ++ fill (tmp); ++ ++ tptr = tmp; ++ for (i = 0; i < 8; i++) ++ { ++ dst[0] = (-tptr[0] + 9 * tptr[0 + 1] + 9 * tptr[0 + 2] - tptr[0 + 3]) >> 7; ++ dst[1] = (-tptr[1] + 9 * tptr[1 + 1] + 9 * tptr[1 + 2] - tptr[1 + 3]) >> 7; ++ dst[2] = (-tptr[2] + 9 * tptr[2 + 1] + 9 * tptr[2 + 2] - tptr[2 + 3]) >> 7; ++ dst[3] = (-tptr[3] + 9 * tptr[3 + 1] + 9 * tptr[3 + 2] - tptr[3 + 3]) >> 7; ++ dst[4] = (-tptr[4] + 9 * tptr[4 + 1] + 9 * tptr[4 + 2] - tptr[4 + 3]) >> 7; ++ dst[5] = (-tptr[5] + 9 * tptr[5 + 1] + 9 * tptr[5 + 2] - tptr[5 + 3]) >> 7; ++ dst[6] = (-tptr[6] + 9 * tptr[6 + 1] + 9 * tptr[6 + 2] - tptr[6 + 3]) >> 7; ++ dst[7] = (-tptr[7] + 9 * tptr[7 + 1] + 9 * tptr[7 + 2] - tptr[7 + 3]) >> 7; ++ ++ dst += 8; ++ tptr += 11; ++ } ++} ++ ++int main (void) ++{ ++ char buf [8 * 8]; ++ ++ test (buf); ++ ++ return 0; ++} ++ --- a/src/gcc/testsuite/gcc.target/arm/sat-1.c +++ b/src/gcc/testsuite/gcc.target/arm/sat-1.c @@ -0,0 +1,64 @@ @@ -34209,39 +33391,6 @@ /* { dg-final { scan-assembler "fstd.+ \\\[r1, #256\\\]" } } */ d[32] = d[127] + d[-127]; } ---- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c -+++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c -@@ -0,0 +1,30 @@ -+/* { dg-require-effective-target arm_eabi } */ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+/* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ -+/* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ -+/* { dg-final { scan-assembler-not "strb" } } */ -+ -+struct thing { -+ unsigned a: 8; -+ unsigned b: 8; -+ unsigned c: 8; -+ unsigned d: 8; -+}; -+ -+struct thing2 { -+ volatile unsigned a: 8; -+ volatile unsigned b: 8; -+ volatile unsigned c: 8; -+ volatile unsigned d: 8; -+}; -+ -+void test1(volatile struct thing *t) -+{ -+ t->a = 5; -+} -+ -+void test2(struct thing2 *t) -+{ -+ t->a = 5; -+} --- a/src/gcc/testsuite/gcc.target/arm/wmul-10.c +++ b/src/gcc/testsuite/gcc.target/arm/wmul-10.c @@ -0,0 +1,10 @@ @@ -34417,73 +33566,40 @@ +/* { dg-final { scan-assembler "orr" } } */ +/* { dg-final { scan-assembler-not "mvn" } } */ +/* { dg-final { scan-assembler-not "uxth" } } */ ---- a/src/gcc/testsuite/gcc.target/i386/pr52736.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr52736.c -@@ -0,0 +1,29 @@ -+/* PR target/52736 */ -+/* { dg-do run } */ -+/* { dg-options "-O1 -msse2" } */ -+/* { dg-require-effective-target sse2_runtime } */ -+ -+#include -+ -+typedef double D __attribute__((may_alias)); -+__attribute__((aligned(16))) static const double r[4] = { 1., 5., 1., 3. }; -+ -+__attribute__((noinline, noclone)) -+void -+foo (int x) -+{ -+ asm volatile ("" : "+g" (x) : : "memory"); -+ if (x != 3) -+ __builtin_abort (); -+} -+ -+int -+main () -+{ -+ __m128d t = _mm_set1_pd (5.); -+ ((D *)(&t))[0] = 1.; -+ foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[0])))); -+ ((D *)(&t))[1] = 3.; -+ foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[2])))); -+ return 0; -+} ---- a/src/gcc/testsuite/gcc.target/powerpc/pr52457.c -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr52457.c -@@ -0,0 +1,34 @@ -+/* { dg-do run { target { powerpc*-*-linux* } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ -+/* { dg-require-effective-target vsx_hw } */ -+/* { dg-options "-O1 -mcpu=power7" } */ +--- a/src/gcc/testsuite/gcc.target/i386/pr51987.c ++++ b/src/gcc/testsuite/gcc.target/i386/pr51987.c +@@ -0,0 +1,33 @@ ++/* PR tree-optimization/51987 */ ++/* { dg-do run { target { ! { ilp32 } } } } */ ++/* { dg-options "-O3" } */ + +extern void abort (void); ++union U { unsigned long long l; struct { unsigned int l, h; } i; }; + -+typedef long long T; -+typedef T vl_t __attribute__((vector_size(2 * sizeof (T)))); -+ -+vl_t -+buggy_func (T x) ++__attribute__((noinline, noclone)) void ++foo (char *x, char *y) +{ -+ vl_t w; -+ T *p = (T *)&w; -+ p[0] = p[1] = x; -+ return w; ++ int i; ++ for (i = 0; i < 64; i++) ++ { ++ union U u; ++ asm ("movl %1, %k0; salq $32, %0" : "=r" (u.l) : "r" (i)); ++ x[i] = u.i.h; ++ union U v; ++ asm ("movl %1, %k0; salq $32, %0" : "=r" (v.l) : "r" (i)); ++ y[i] = v.i.h; ++ } +} + +int -+main(void) ++main () +{ -+ vl_t rval; -+ T *pl; -+ -+ pl = (T *) &rval; -+ rval = buggy_func (2); -+ -+ if (pl[0] != 2 || pl[1] != 2) -+ abort (); -+ ++ char a[64], b[64]; ++ int i; ++ foo (a, b); ++ for (i = 0; i < 64; i++) ++ if (a[i] != i || b[i] != i) ++ abort (); + return 0; +} --- a/src/gcc/testsuite/gcc.target/sparc/ultrasp12.c @@ -34553,114 +33669,6 @@ + sum[4] = s12; + ; +} ---- a/src/gcc/testsuite/gfortran.dg/intrinsic_8.f90 -+++ b/src/gcc/testsuite/gfortran.dg/intrinsic_8.f90 -@@ -0,0 +1,23 @@ -+! { dg-do compile } -+! -+! PR fortran/52452 -+! -+! Contributed by Roger Ferrer Ibanez -+! -+PROGRAM test_etime -+ IMPLICIT NONE -+ INTRINSIC :: etime -+ REAL(4) :: tarray(1:2) -+ REAL(4) :: result -+ -+ CALL etime(tarray, result) -+END PROGRAM test_etime -+ -+subroutine test_etime2 -+ IMPLICIT NONE -+ INTRINSIC :: etime -+ REAL(4) :: tarray(1:2) -+ REAL(4) :: result -+ -+ result = etime(tarray) -+END subroutine test_etime2 ---- a/src/gcc/testsuite/gfortran.dg/proc_ptr_34.f90 -+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_34.f90 -@@ -0,0 +1,79 @@ -+! { dg-do compile } -+! -+! PR fortran/52469 -+! -+! This was failing as the DECL of the proc pointer "func" -+! was used for the interface of the proc-pointer component "my_f_ptr" -+! rather than the decl of the proc-pointer target -+! -+! Contributed by palott@gmail.com -+! -+ -+module ExampleFuncs -+ implicit none -+ -+ ! NOTE: "func" is a procedure pointer! -+ pointer :: func -+ interface -+ function func (z) -+ real :: func -+ real, intent (in) :: z -+ end function func -+ end interface -+ -+ type Contains_f_ptr -+ procedure (func), pointer, nopass :: my_f_ptr -+ end type Contains_f_ptr -+contains -+ -+function f1 (x) -+ real :: f1 -+ real, intent (in) :: x -+ -+ f1 = 2.0 * x -+ -+ return -+end function f1 -+ -+function f2 (x) -+ real :: f2 -+ real, intent (in) :: x -+ -+ f2 = 3.0 * x**2 -+ -+ return -+end function f2 -+ -+function fancy (func, x) -+ real :: fancy -+ real, intent (in) :: x -+ -+ interface AFunc -+ function func (y) -+ real :: func -+ real, intent (in) ::y -+ end function func -+ end interface AFunc -+ -+ fancy = func (x) + 3.3 * x -+end function fancy -+ -+end module ExampleFuncs -+ -+ -+program test_proc_ptr -+ use ExampleFuncs -+ implicit none -+ -+ type (Contains_f_ptr), dimension (2) :: NewType -+ -+ !NewType(1) % my_f_ptr => f1 -+ NewType(2) % my_f_ptr => f2 -+ -+ !write (*, *) NewType(1) % my_f_ptr (3.0), NewType(2) % my_f_ptr (3.0) -+ write (6, *) NewType(2) % my_f_ptr (3.0) ! < Shall print '27.0' -+ -+ stop -+end program test_proc_ptr -+ -+! { dg-final { cleanup-modules "examplefuncs" } } --- a/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90 +++ b/src/gcc/testsuite/gfortran.dg/vect/pr19049.f90 @@ -19,6 +19,7 @@ @@ -34861,7 +33869,7 @@ # dot-product of signed chars, 0 otherwise. # # This won't change for different subtargets so cache the result. -@@ -3150,29 +3291,6 @@ +@@ -3170,29 +3311,6 @@ return $et_vect_extract_even_odd_saved } @@ -34891,7 +33899,7 @@ # Return 1 if the target supports vector interleaving, 0 otherwise. proc check_effective_target_vect_interleave { } { -@@ -3195,41 +3313,66 @@ +@@ -3215,41 +3333,66 @@ return $et_vect_interleave_saved } @@ -34981,7 +33989,7 @@ } # Return 1 if the target supports section-anchors -@@ -3282,6 +3425,31 @@ +@@ -3302,6 +3445,31 @@ return $et_sync_int_long_saved } @@ -35013,7 +34021,7 @@ # Return 1 if the target supports atomic operations on "char" and "short". proc check_effective_target_sync_char_short { } { -@@ -3615,11 +3783,11 @@ +@@ -3635,11 +3803,11 @@ return $flags } @@ -35028,22 +34036,67 @@ } return $flags ---- a/src/gcc/toplev.c -+++ b/src/gcc/toplev.c -@@ -1326,6 +1326,13 @@ - "and -ftree-loop-linear)"); - #endif +--- a/src/gcc/tree-affine.c ++++ b/src/gcc/tree-affine.c +@@ -887,3 +887,30 @@ + *size = shwi_to_double_int ((bitsize + BITS_PER_UNIT - 1) / BITS_PER_UNIT); + } -+ if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2)) ++/* Returns true if a region of size SIZE1 at position 0 and a region of ++ size SIZE2 at position DIFF cannot overlap. */ ++ ++bool ++aff_comb_cannot_overlap_p (aff_tree *diff, double_int size1, double_int size2) ++{ ++ double_int d, bound; ++ ++ /* Unless the difference is a constant, we fail. */ ++ if (diff->n != 0) ++ return false; ++ ++ d = diff->offset; ++ if (double_int_negative_p (d)) + { -+ warning (0, "-fstrict-volatile-bitfields disabled; " -+ "it is incompatible with ABI versions < 2"); -+ flag_strict_volatile_bitfields = 0; ++ /* The second object is before the first one, we succeed if the last ++ element of the second object is before the start of the first one. */ ++ bound = double_int_add (d, double_int_add (size2, double_int_minus_one)); ++ return double_int_negative_p (bound); + } ++ else ++ { ++ /* We succeed if the second object starts after the first one ends. */ ++ return double_int_scmp (size1, d) <= 0; ++ } ++} ++ +--- a/src/gcc/tree-affine.h ++++ b/src/gcc/tree-affine.h +@@ -76,6 +76,7 @@ + struct pointer_map_t **); + void get_inner_reference_aff (tree, aff_tree *, double_int *); + void free_affine_expand_cache (struct pointer_map_t **); ++bool aff_comb_cannot_overlap_p (aff_tree *, double_int, double_int); + + /* Debugging functions. */ + void print_aff (FILE *, aff_tree *); +--- a/src/gcc/tree.c ++++ b/src/gcc/tree.c +@@ -7321,6 +7321,15 @@ + return build_array_type_1 (elt_type, index_type, false); + } + ++/* Return a representation of ELT_TYPE[NELTS], using indices of type ++ sizetype. */ ++ ++tree ++build_array_type_nelts (tree elt_type, unsigned HOST_WIDE_INT nelts) ++{ ++ return build_array_type (elt_type, build_index_type (size_int (nelts - 1))); ++} + - /* Unrolling all loops implies that standard loop unrolling must also - be done. */ - if (flag_unroll_all_loops) + /* Recursively examines the array elements of TYPE, until a non-array + element type is found. */ + --- a/src/gcc/tree-cfg.c +++ b/src/gcc/tree-cfg.c @@ -3046,7 +3046,26 @@ @@ -35190,7 +34243,22 @@ LHS. All calls whose value is ignored should be --- a/src/gcc/tree-data-ref.c +++ b/src/gcc/tree-data-ref.c -@@ -721,11 +721,11 @@ +@@ -1,5 +1,5 @@ + /* Data references and dependences detectors. +- Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 ++ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012 + Free Software Foundation, Inc. + Contributed by Sebastian Pop + +@@ -84,6 +84,7 @@ + #include "tree-scalar-evolution.h" + #include "tree-pass.h" + #include "langhooks.h" ++#include "tree-affine.h" + + static struct datadep_stats + { +@@ -721,11 +722,11 @@ } /* Analyzes the behavior of the memory reference DR in the innermost loop or @@ -35204,7 +34272,7 @@ { gimple stmt = DR_STMT (dr); struct loop *loop = loop_containing_stmt (stmt); -@@ -768,14 +768,25 @@ +@@ -768,14 +769,25 @@ } else base = build_fold_addr_expr (base); @@ -35233,7 +34301,7 @@ } } else -@@ -800,10 +811,18 @@ +@@ -800,10 +812,18 @@ else if (!simple_iv (loop, loop_containing_stmt (stmt), poffset, &offset_iv, false)) { @@ -35256,7 +34324,50 @@ } } -@@ -967,7 +986,7 @@ +@@ -842,30 +862,30 @@ + tree base, off, access_fn = NULL_TREE; + basic_block before_loop = NULL; + +- if (nest) +- before_loop = block_before_loop (nest); ++ if (!nest) ++ { ++ DR_BASE_OBJECT (dr) = ref; ++ DR_ACCESS_FNS (dr) = NULL; ++ return; ++ } ++ ++ before_loop = block_before_loop (nest); + + while (handled_component_p (aref)) + { + if (TREE_CODE (aref) == ARRAY_REF) + { + op = TREE_OPERAND (aref, 1); +- if (nest) +- { +- access_fn = analyze_scalar_evolution (loop, op); +- access_fn = instantiate_scev (before_loop, loop, access_fn); +- VEC_safe_push (tree, heap, access_fns, access_fn); +- } +- ++ access_fn = analyze_scalar_evolution (loop, op); ++ access_fn = instantiate_scev (before_loop, loop, access_fn); ++ VEC_safe_push (tree, heap, access_fns, access_fn); + TREE_OPERAND (aref, 1) = build_int_cst (TREE_TYPE (op), 0); + } + + aref = TREE_OPERAND (aref, 0); + } + +- if (nest +- && (INDIRECT_REF_P (aref) +- || TREE_CODE (aref) == MEM_REF)) ++ if (INDIRECT_REF_P (aref) || TREE_CODE (aref) == MEM_REF) + { + op = TREE_OPERAND (aref, 0); + access_fn = analyze_scalar_evolution (loop, op); +@@ -967,7 +987,7 @@ DR_REF (dr) = memref; DR_IS_READ (dr) = is_read; @@ -35265,7 +34376,7 @@ dr_analyze_indices (dr, nest, loop); dr_analyze_alias (dr); -@@ -991,6 +1010,48 @@ +@@ -991,6 +1011,48 @@ return dr; } @@ -35314,7 +34425,61 @@ /* Returns true if FNA == FNB. */ static bool -@@ -4294,7 +4355,7 @@ +@@ -1240,14 +1302,33 @@ + } + + /* Returns false if we can prove that data references A and B do not alias, +- true otherwise. */ ++ true otherwise. If LOOP_NEST is false no cross-iteration aliases are ++ considered. */ + + bool +-dr_may_alias_p (const struct data_reference *a, const struct data_reference *b) ++dr_may_alias_p (const struct data_reference *a, const struct data_reference *b, ++ bool loop_nest) + { + tree addr_a = DR_BASE_OBJECT (a); + tree addr_b = DR_BASE_OBJECT (b); + ++ /* If we are not processing a loop nest but scalar code we ++ do not need to care about possible cross-iteration dependences ++ and thus can process the full original reference. Do so, ++ similar to how loop invariant motion applies extra offset-based ++ disambiguation. */ ++ if (!loop_nest) ++ { ++ aff_tree off1, off2; ++ double_int size1, size2; ++ get_inner_reference_aff (DR_REF (a), &off1, &size1); ++ get_inner_reference_aff (DR_REF (b), &off2, &size2); ++ aff_combination_scale (&off1, double_int_minus_one); ++ aff_combination_add (&off2, &off1); ++ if (aff_comb_cannot_overlap_p (&off2, size1, size2)) ++ return false; ++ } ++ + if (DR_IS_WRITE (a) && DR_IS_WRITE (b)) + return refs_output_dependent_p (addr_a, addr_b); + else if (DR_IS_READ (a) && DR_IS_WRITE (b)) +@@ -1285,7 +1366,7 @@ + } + + /* If the data references do not alias, then they are independent. */ +- if (!dr_may_alias_p (a, b)) ++ if (!dr_may_alias_p (a, b, loop_nest != NULL)) + { + DDR_ARE_DEPENDENT (res) = chrec_known; + return res; +@@ -4162,7 +4243,7 @@ + if ((stmt_code == GIMPLE_CALL + && !(gimple_call_flags (stmt) & (ECF_CONST | ECF_PURE))) + || (stmt_code == GIMPLE_ASM +- && gimple_asm_volatile_p (stmt))) ++ && (gimple_asm_volatile_p (stmt) || gimple_vuse (stmt)))) + clobbers_memory = true; + + if (!gimple_vuse (stmt)) +@@ -4294,7 +4375,7 @@ DATAREFS. Returns chrec_dont_know when failing to analyze a difficult case, returns NULL_TREE otherwise. */ @@ -35323,7 +34488,7 @@ find_data_references_in_bb (struct loop *loop, basic_block bb, VEC (data_reference_p, heap) **datarefs) { -@@ -5143,7 +5204,7 @@ +@@ -5143,7 +5224,7 @@ DR_STMT (dr) = stmt; DR_REF (dr) = op0; @@ -35332,7 +34497,7 @@ && stride_of_unit_type_p (DR_STEP (dr), TREE_TYPE (op0)); free_data_ref (dr); -@@ -5183,7 +5244,7 @@ +@@ -5183,7 +5264,7 @@ DR_STMT (dr) = stmt; DR_REF (dr) = *ref->pos; @@ -35361,12 +34526,52 @@ extern void create_rdg_vertices (struct graph *, VEC (gimple, heap) *); extern bool dr_may_alias_p (const struct data_reference *, - const struct data_reference *); +- const struct data_reference *); ++ const struct data_reference *, bool); +extern bool dr_equal_offsets_p (struct data_reference *, + struct data_reference *); /* Return true when the base objects of data references A and B are +--- a/src/gcc/tree.def ++++ b/src/gcc/tree.def +@@ -1092,6 +1092,19 @@ + is subtracted from t3. */ + DEFTREECODE (WIDEN_MULT_MINUS_EXPR, "widen_mult_minus_expr", tcc_expression, 3) + ++/* Widening shift left. ++ The first operand is of type t1. ++ The second operand is the number of bits to shift by; it need not be the ++ same type as the first operand and result. ++ Note that the result is undefined if the second operand is larger ++ than or equal to the first operand's type size. ++ The type of the entire expression is t2, such that t2 is at least twice ++ the size of t1. ++ WIDEN_LSHIFT_EXPR is equivalent to first widening (promoting) ++ the first argument from type t1 to type t2, and then shifting it ++ by the second argument. */ ++DEFTREECODE (WIDEN_LSHIFT_EXPR, "widen_lshift_expr", tcc_binary, 2) ++ + /* Fused multiply-add. + All operands and the result are of the same type. No intermediate + rounding is performed after multiplying operand one with operand two +@@ -1147,6 +1160,16 @@ + DEFTREECODE (VEC_INTERLEAVE_HIGH_EXPR, "vec_interleavehigh_expr", tcc_binary, 2) + DEFTREECODE (VEC_INTERLEAVE_LOW_EXPR, "vec_interleavelow_expr", tcc_binary, 2) + ++/* Widening vector shift left in bits. ++ Operand 0 is a vector to be shifted with N elements of size S. ++ Operand 1 is an integer shift amount in bits. ++ The result of the operation is N elements of size 2*S. ++ VEC_WIDEN_LSHIFT_HI_EXPR computes the N/2 high results. ++ VEC_WIDEN_LSHIFT_LO_EXPR computes the N/2 low results. ++ */ ++DEFTREECODE (VEC_WIDEN_LSHIFT_HI_EXPR, "widen_lshift_hi_expr", tcc_binary, 2) ++DEFTREECODE (VEC_WIDEN_LSHIFT_LO_EXPR, "widen_lshift_lo_expr", tcc_binary, 2) ++ + /* PREDICT_EXPR. Specify hint for branch prediction. The + PREDICT_EXPR_PREDICTOR specify predictor and PREDICT_EXPR_OUTCOME the + outcome (0 for not taken and 1 for taken). Once the profile is guessed --- a/src/gcc/tree-eh.c +++ b/src/gcc/tree-eh.c @@ -2752,7 +2752,7 @@ @@ -35378,6 +34583,41 @@ || gimple_call_num_args (ones) != gimple_call_num_args (twos)) return false; +--- a/src/gcc/tree.h ++++ b/src/gcc/tree.h +@@ -4197,6 +4197,7 @@ + extern tree build_index_type (tree); + extern tree build_array_type (tree, tree); + extern tree build_nonshared_array_type (tree, tree); ++extern tree build_array_type_nelts (tree, unsigned HOST_WIDE_INT); + extern tree build_function_type (tree, tree); + extern tree build_function_type_list (tree, ...); + extern tree build_function_type_skip_args (tree, bitmap); +@@ -4626,21 +4627,10 @@ + + extern VEC(tree,gc) *ctor_to_vec (tree); + +-/* Examine CTOR to discover: +- * how many scalar fields are set to nonzero values, +- and place it in *P_NZ_ELTS; +- * how many scalar fields in total are in CTOR, +- and place it in *P_ELT_COUNT. +- * if a type is a union, and the initializer from the constructor +- is not the largest element in the union, then set *p_must_clear. ++extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, ++ HOST_WIDE_INT *, bool *); + +- Return whether or not CTOR is a valid static constant initializer, the same +- as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ +- +-extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, HOST_WIDE_INT *, +- bool *); +- +-extern HOST_WIDE_INT count_type_elements (const_tree, bool); ++extern bool complete_ctor_at_level_p (const_tree, HOST_WIDE_INT, const_tree); + + /* integer_zerop (tree x) is nonzero if X is an integer constant of value 0. */ + --- a/src/gcc/tree-if-conv.c +++ b/src/gcc/tree-if-conv.c @@ -464,8 +464,8 @@ @@ -35489,26 +34729,6 @@ cost += estimate_move_cost (TREE_TYPE (funtype)); if (funtype) -@@ -4947,7 +4953,7 @@ - if ((e = cgraph_edge (id->dst_node, gsi_stmt (bsi))) != NULL) - { - if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); - else - cgraph_remove_edge (e); - } -@@ -4957,8 +4963,8 @@ - { - if ((e = cgraph_edge (node, gsi_stmt (bsi))) != NULL) - { -- if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ if (!e->inline_failed && e->callee != id->src_node) -+ cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); - else - cgraph_remove_edge (e); - } --- a/src/gcc/tree-loop-distribution.c +++ b/src/gcc/tree-loop-distribution.c @@ -312,7 +312,7 @@ @@ -35533,7 +34753,7 @@ if (!valid_initializer_p (&init_dr, ref->distance + 1, root->ref)) --- a/src/gcc/tree-pretty-print.c +++ b/src/gcc/tree-pretty-print.c -@@ -1539,6 +1539,7 @@ +@@ -1543,6 +1543,7 @@ case RROTATE_EXPR: case VEC_LSHIFT_EXPR: case VEC_RSHIFT_EXPR: @@ -35541,7 +34761,7 @@ case BIT_IOR_EXPR: case BIT_XOR_EXPR: case BIT_AND_EXPR: -@@ -2209,6 +2210,22 @@ +@@ -2213,6 +2214,22 @@ pp_string (buffer, " > "); break; @@ -35564,7 +34784,7 @@ case VEC_UNPACK_HI_EXPR: pp_string (buffer, " VEC_UNPACK_HI_EXPR < "); dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false); -@@ -2531,6 +2548,9 @@ +@@ -2535,6 +2552,9 @@ case RSHIFT_EXPR: case LROTATE_EXPR: case RROTATE_EXPR: @@ -35574,7 +34794,7 @@ return 11; case WIDEN_SUM_EXPR: -@@ -2706,6 +2726,9 @@ +@@ -2710,6 +2730,9 @@ case VEC_RSHIFT_EXPR: return "v>>"; @@ -35584,23 +34804,6 @@ case POINTER_PLUS_EXPR: return "+"; ---- a/src/gcc/tree-sra.c -+++ b/src/gcc/tree-sra.c -@@ -2937,7 +2937,13 @@ - } - else - { -- if (access_has_children_p (lacc) && access_has_children_p (racc)) -+ if (access_has_children_p (lacc) -+ && access_has_children_p (racc) -+ /* When an access represents an unscalarizable region, it usually -+ represents accesses with variable offset and thus must not be used -+ to generate new memory accesses. */ -+ && !lacc->grp_unscalarizable_region -+ && !racc->grp_unscalarizable_region) - { - gimple_stmt_iterator orig_gsi = *gsi; - enum unscalarized_data_handling refreshed; --- a/src/gcc/tree-ssa-ccp.c +++ b/src/gcc/tree-ssa-ccp.c @@ -522,10 +522,6 @@ @@ -35626,7 +34829,7 @@ if (TREE_CODE (fn) == ADDR_EXPR && TREE_CODE (TREE_OPERAND (fn, 0)) == FUNCTION_DECL && DECL_BUILT_IN (TREE_OPERAND (fn, 0))) -@@ -2317,6 +2316,11 @@ +@@ -2321,6 +2320,11 @@ return true; } @@ -35702,6 +34905,51 @@ fprintf (stream, " ("); for (i = 0; i < nargs; i++) { +--- a/src/gcc/tree-ssa-loop-im.c ++++ b/src/gcc/tree-ssa-loop-im.c +@@ -1834,33 +1834,6 @@ + create_vop_ref_mapping (); + } + +-/* Returns true if a region of size SIZE1 at position 0 and a region of +- size SIZE2 at position DIFF cannot overlap. */ +- +-static bool +-cannot_overlap_p (aff_tree *diff, double_int size1, double_int size2) +-{ +- double_int d, bound; +- +- /* Unless the difference is a constant, we fail. */ +- if (diff->n != 0) +- return false; +- +- d = diff->offset; +- if (double_int_negative_p (d)) +- { +- /* The second object is before the first one, we succeed if the last +- element of the second object is before the start of the first one. */ +- bound = double_int_add (d, double_int_add (size2, double_int_minus_one)); +- return double_int_negative_p (bound); +- } +- else +- { +- /* We succeed if the second object starts after the first one ends. */ +- return double_int_scmp (size1, d) <= 0; +- } +-} +- + /* Returns true if MEM1 and MEM2 may alias. TTAE_CACHE is used as a cache in + tree_to_aff_combination_expand. */ + +@@ -1889,7 +1862,7 @@ + aff_combination_scale (&off1, double_int_minus_one); + aff_combination_add (&off2, &off1); + +- if (cannot_overlap_p (&off2, size1, size2)) ++ if (aff_comb_cannot_overlap_p (&off2, size1, size2)) + return false; + + return true; --- a/src/gcc/tree-ssa-math-opts.c +++ b/src/gcc/tree-ssa-math-opts.c @@ -1266,39 +1266,67 @@ @@ -36191,7 +35439,7 @@ static unsigned int tree_ssa_phiopt (void); static unsigned int tree_ssa_phiopt_worker (bool); -@@ -1292,35 +1294,18 @@ +@@ -1303,35 +1305,18 @@ return true; } @@ -36230,8 +35478,8 @@ - /* Check if then_bb and else_bb contain only one store each. */ if (then_assign == NULL || !gimple_assign_single_p (then_assign) - || else_assign == NULL -@@ -1385,6 +1370,190 @@ + || gimple_has_volatile_ops (then_assign) +@@ -1398,6 +1383,190 @@ return true; } @@ -36620,7 +35868,63 @@ if (vect_print_dump_info (REPORT_DR_DETAILS)) { fprintf (vect_dump, "can't determine dependence between "); -@@ -1250,7 +1254,9 @@ +@@ -841,6 +845,24 @@ + } + } + ++ /* Similarly, if we're doing basic-block vectorization, we can only use ++ base and misalignment information relative to an innermost loop if the ++ misalignment stays the same throughout the execution of the loop. ++ As above, this is the case if the stride of the dataref evenly divides ++ by the vector size. */ ++ if (!loop) ++ { ++ tree step = DR_STEP (dr); ++ HOST_WIDE_INT dr_step = TREE_INT_CST_LOW (step); ++ ++ if (dr_step % GET_MODE_SIZE (TYPE_MODE (vectype)) != 0) ++ { ++ if (vect_print_dump_info (REPORT_ALIGNMENT)) ++ fprintf (vect_dump, "SLP: step doesn't divide the vector-size."); ++ misalign = NULL_TREE; ++ } ++ } ++ + base = build_fold_indirect_ref (base_addr); + alignment = ssize_int (TYPE_ALIGN (vectype)/BITS_PER_UNIT); + +@@ -1053,6 +1075,9 @@ + gimple stmt = DR_STMT (dr); + stmt_vec_info stmt_info = vinfo_for_stmt (stmt); + ++ if (!STMT_VINFO_RELEVANT_P (stmt_info)) ++ continue; ++ + /* For interleaving, only the alignment of the first access matters. + Skip statements marked as not vectorizable. */ + if ((STMT_VINFO_STRIDED_ACCESS (stmt_info) +@@ -1171,17 +1196,11 @@ + loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); + int vf = LOOP_VINFO_VECT_FACTOR (loop_vinfo); + int ncopies = vf / nunits; +- bool supportable_dr_alignment = vect_supportable_dr_alignment (dr, true); + +- if (!supportable_dr_alignment) +- *inside_cost = VECT_MAX_COST; ++ if (DR_IS_READ (dr)) ++ vect_get_load_cost (dr, ncopies, true, inside_cost, outside_cost); + else +- { +- if (DR_IS_READ (dr)) +- vect_get_load_cost (dr, ncopies, true, inside_cost, outside_cost); +- else +- vect_get_store_cost (dr, ncopies, inside_cost); +- } ++ vect_get_store_cost (dr, ncopies, inside_cost); + + if (vect_print_dump_info (REPORT_COST)) + fprintf (vect_dump, "vect_get_data_access_cost: inside_cost = %d, " +@@ -1250,7 +1269,9 @@ vect_peel_info elem = (vect_peel_info) *slot; vect_peel_extended_info max = (vect_peel_extended_info) data; @@ -36631,7 +35935,16 @@ { max->peel_info.npeel = elem->npeel; max->peel_info.count = elem->count; -@@ -2256,19 +2262,6 @@ +@@ -1493,7 +1514,7 @@ + stmt = DR_STMT (dr); + stmt_info = vinfo_for_stmt (stmt); + +- if (!STMT_VINFO_RELEVANT (stmt_info)) ++ if (!STMT_VINFO_RELEVANT_P (stmt_info)) + continue; + + /* For interleaving, only the alignment of the first access +@@ -2256,19 +2277,6 @@ return false; } @@ -36651,7 +35964,7 @@ if (stride == 0) stride = count; -@@ -2993,31 +2986,33 @@ +@@ -2993,31 +3001,33 @@ /* Function vect_create_data_ref_ptr. @@ -36697,7 +36010,7 @@ if OFFSET is not supplied: initial_address = &a[init]; -@@ -3037,7 +3032,7 @@ +@@ -3037,7 +3047,7 @@ 4. Return the pointer. */ tree @@ -36706,7 +36019,7 @@ tree offset, tree *initial_address, gimple *ptr_incr, bool only_init, bool *inv_p) { -@@ -3047,17 +3042,16 @@ +@@ -3047,17 +3057,16 @@ struct loop *loop = NULL; bool nested_in_vect_loop = false; struct loop *containing_loop = NULL; @@ -36728,7 +36041,7 @@ gimple_stmt_iterator incr_gsi; bool insert_after; bool negative; -@@ -3068,6 +3062,9 @@ +@@ -3068,6 +3077,9 @@ gimple_stmt_iterator gsi = gsi_for_stmt (stmt); tree base; @@ -36738,7 +36051,7 @@ if (loop_vinfo) { loop = LOOP_VINFO_LOOP (loop_vinfo); -@@ -3102,8 +3099,9 @@ +@@ -3102,8 +3114,9 @@ if (vect_print_dump_info (REPORT_DETAILS)) { tree data_ref_base = base_name; @@ -36750,7 +36063,7 @@ if (TREE_CODE (data_ref_base) == VAR_DECL || TREE_CODE (data_ref_base) == ARRAY_REF) fprintf (vect_dump, " vectorizing an array ref: "); -@@ -3114,27 +3112,28 @@ +@@ -3114,27 +3127,28 @@ print_generic_expr (vect_dump, base_name, TDF_SLIM); } @@ -36792,7 +36105,7 @@ get_name (base_name)); } -@@ -3145,14 +3144,14 @@ +@@ -3145,14 +3159,14 @@ do { tree lhs = gimple_assign_lhs (orig_stmt); @@ -36813,7 +36126,7 @@ get_name (base_name)); break; } -@@ -3162,7 +3161,7 @@ +@@ -3162,7 +3176,7 @@ while (orig_stmt); } @@ -36822,7 +36135,7 @@ /* Note: If the dataref is in an inner-loop nested in LOOP, and we are vectorizing LOOP (i.e., outer-loop vectorization), we need to create two -@@ -3195,8 +3194,8 @@ +@@ -3195,8 +3209,8 @@ vp2 = vp1 + step if () goto LOOP */ @@ -36833,7 +36146,7 @@ /* Create: (&(base[init_val+offset]) in the loop preheader. */ -@@ -3215,17 +3214,17 @@ +@@ -3215,17 +3229,17 @@ *initial_address = new_temp; @@ -36858,7 +36171,7 @@ if (pe) { new_bb = gsi_insert_on_edge_immediate (pe, vec_stmt); -@@ -3235,19 +3234,19 @@ +@@ -3235,19 +3249,19 @@ gsi_insert_before (&gsi, vec_stmt, GSI_SAME_STMT); } else @@ -36883,7 +36196,7 @@ /* One exception to the above is when the scalar step of the load in LOOP is zero. In this case the step here is also zero. */ if (*inv_p) -@@ -3257,9 +3256,9 @@ +@@ -3257,9 +3271,9 @@ standard_iv_increment_position (loop, &incr_gsi, &insert_after); @@ -36896,7 +36209,7 @@ &indx_before_incr, &indx_after_incr); incr = gsi_stmt (incr_gsi); set_vinfo_for_stmt (incr, new_stmt_vec_info (incr, loop_vinfo, NULL)); -@@ -3273,14 +3272,14 @@ +@@ -3273,14 +3287,14 @@ if (ptr_incr) *ptr_incr = incr; @@ -36914,7 +36227,7 @@ nested in LOOP, if exists. */ gcc_assert (nested_in_vect_loop); -@@ -3288,7 +3287,7 @@ +@@ -3288,7 +3302,7 @@ { standard_iv_increment_position (containing_loop, &incr_gsi, &insert_after); @@ -36923,7 +36236,7 @@ containing_loop, &incr_gsi, insert_after, &indx_before_incr, &indx_after_incr); incr = gsi_stmt (incr_gsi); -@@ -3425,13 +3424,22 @@ +@@ -3425,13 +3439,22 @@ and FALSE otherwise. */ bool @@ -36947,7 +36260,7 @@ /* Check that the operation is supported. */ interleave_high_optab = optab_for_tree_code (VEC_INTERLEAVE_HIGH_EXPR, vectype, optab_default); -@@ -3456,6 +3464,18 @@ +@@ -3456,6 +3479,18 @@ } @@ -36966,7 +36279,7 @@ /* Function vect_permute_store_chain. Given a chain of interleaved stores in DR_CHAIN of LENGTH that must be -@@ -3517,7 +3537,7 @@ +@@ -3517,7 +3552,7 @@ I3: 4 12 20 28 5 13 21 30 I4: 6 14 22 30 7 15 23 31. */ @@ -36975,7 +36288,7 @@ vect_permute_store_chain (VEC(tree,heap) *dr_chain, unsigned int length, gimple stmt, -@@ -3531,9 +3551,7 @@ +@@ -3531,9 +3566,7 @@ unsigned int j; enum tree_code high_code, low_code; @@ -36986,7 +36299,7 @@ *result_chain = VEC_copy (tree, heap, dr_chain); -@@ -3586,7 +3604,6 @@ +@@ -3586,7 +3619,6 @@ } dr_chain = VEC_copy (tree, heap, *result_chain); } @@ -36994,7 +36307,7 @@ } /* Function vect_setup_realignment -@@ -3756,8 +3773,9 @@ +@@ -3756,8 +3788,9 @@ gcc_assert (!compute_in_loop); vec_dest = vect_create_destination_var (scalar_dest, vectype); @@ -37006,7 +36319,7 @@ new_stmt = gimple_build_assign_with_ops (BIT_AND_EXPR, NULL_TREE, ptr, build_int_cst (TREE_TYPE (ptr), -@@ -3862,13 +3880,22 @@ +@@ -3862,13 +3895,22 @@ and FALSE otherwise. */ bool @@ -37030,7 +36343,7 @@ perm_even_optab = optab_for_tree_code (VEC_EXTRACT_EVEN_EXPR, vectype, optab_default); if (!perm_even_optab) -@@ -3903,6 +3930,16 @@ +@@ -3903,6 +3945,16 @@ return true; } @@ -37047,7 +36360,7 @@ /* Function vect_permute_load_chain. -@@ -3980,7 +4017,7 @@ +@@ -3980,7 +4032,7 @@ 3rd vec (E2): 2 6 10 14 18 22 26 30 4th vec (E4): 3 7 11 15 19 23 27 31. */ @@ -37056,7 +36369,7 @@ vect_permute_load_chain (VEC(tree,heap) *dr_chain, unsigned int length, gimple stmt, -@@ -3993,9 +4030,7 @@ +@@ -3993,9 +4045,7 @@ int i; unsigned int j; @@ -37067,7 +36380,7 @@ *result_chain = VEC_copy (tree, heap, dr_chain); for (i = 0; i < exact_log2 (length); i++) -@@ -4038,7 +4073,6 @@ +@@ -4038,7 +4088,6 @@ } dr_chain = VEC_copy (tree, heap, *result_chain); } @@ -37075,7 +36388,7 @@ } -@@ -4049,24 +4083,32 @@ +@@ -4049,24 +4098,32 @@ the scalar statements. */ @@ -37117,7 +36430,7 @@ /* Put a permuted data-ref in the VECTORIZED_STMT field. Since we scan the chain starting from it's first node, their order -@@ -4128,9 +4170,6 @@ +@@ -4128,9 +4185,6 @@ break; } } @@ -37140,58 +36453,6 @@ type = TREE_TYPE (rhs1); /* Optabs will try converting a negation into a subtraction, so ---- a/src/gcc/tree-vect-loop-manip.c -+++ b/src/gcc/tree-vect-loop-manip.c -@@ -1105,35 +1105,6 @@ - first_niters = PHI_RESULT (newphi); - } - -- --/* Remove dead assignments from loop NEW_LOOP. */ -- --static void --remove_dead_stmts_from_loop (struct loop *new_loop) --{ -- basic_block *bbs = get_loop_body (new_loop); -- unsigned i; -- for (i = 0; i < new_loop->num_nodes; ++i) -- { -- gimple_stmt_iterator gsi; -- for (gsi = gsi_start_bb (bbs[i]); !gsi_end_p (gsi);) -- { -- gimple stmt = gsi_stmt (gsi); -- if (is_gimple_assign (stmt) -- && TREE_CODE (gimple_assign_lhs (stmt)) == SSA_NAME -- && has_zero_uses (gimple_assign_lhs (stmt))) -- { -- gsi_remove (&gsi, true); -- release_defs (stmt); -- } -- else -- gsi_next (&gsi); -- } -- } -- free (bbs); --} -- -- - /* Function slpeel_tree_peel_loop_to_edge. - - Peel the first (last) iterations of LOOP into a new prolog (epilog) loop -@@ -1445,13 +1416,6 @@ - BITMAP_FREE (definitions); - delete_update_ssa (); - -- /* Remove all pattern statements from the loop copy. They will confuse -- the expander if DCE is disabled. -- ??? The pattern recognizer should be split into an analysis and -- a transformation phase that is then run only on the loop that is -- going to be transformed. */ -- remove_dead_stmts_from_loop (new_loop); -- - adjust_vec_debug_stmts (); - - return new_loop; --- a/src/gcc/tree-vect-loop.c +++ b/src/gcc/tree-vect-loop.c @@ -181,6 +181,8 @@ @@ -37214,7 +36475,7 @@ - gimple stmt = gsi_stmt (si); - stmt_info = vinfo_for_stmt (stmt); + tree vf_vectype; -+ + + if (analyze_pattern_stmt) + { + stmt = pattern_stmt; @@ -37222,7 +36483,7 @@ + } + else + stmt = gsi_stmt (si); - ++ + stmt_info = vinfo_for_stmt (stmt); + if (vect_print_dump_info (REPORT_DETAILS)) @@ -37352,38 +36613,7 @@ /* Data-flow analysis to detect stmts that do not need to be vectorized. */ -@@ -2104,7 +2153,8 @@ - if (stmt_info - && !STMT_VINFO_RELEVANT_P (stmt_info) - && (!STMT_VINFO_LIVE_P (stmt_info) -- || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def)) -+ || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info))) -+ && !STMT_VINFO_IN_PATTERN_P (stmt_info)) - continue; - - if (STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt))) -@@ -2251,11 +2301,19 @@ - { - gimple stmt = gsi_stmt (si); - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -+ -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info)) -+ { -+ stmt = STMT_VINFO_RELATED_STMT (stmt_info); -+ stmt_info = vinfo_for_stmt (stmt); -+ } -+ - /* Skip stmts that are not vectorized inside the loop. */ - if (!STMT_VINFO_RELEVANT_P (stmt_info) - && (!STMT_VINFO_LIVE_P (stmt_info) -- || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def)) -+ || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info)))) - continue; -+ - vec_inside_cost += STMT_VINFO_INSIDE_OF_LOOP_COST (stmt_info) * factor; - /* FIXME: for stmts in the inner-loop in outer-loop vectorization, - some of the "outside" costs are generated inside the outer-loop. */ -@@ -3233,8 +3291,8 @@ +@@ -3242,8 +3291,8 @@ /* Get the loop-entry arguments. */ if (slp_node) @@ -37394,7 +36624,7 @@ else { vec_initial_defs = VEC_alloc (tree, heap, 1); -@@ -3959,7 +4017,7 @@ +@@ -3968,7 +4017,7 @@ VEC (tree, heap) *vec_oprnds0 = NULL, *vec_oprnds1 = NULL, *vect_defs = NULL; VEC (gimple, heap) *phis = NULL; int vec_num; @@ -37403,7 +36633,7 @@ if (nested_in_vect_loop_p (loop, stmt)) { -@@ -4038,6 +4096,9 @@ +@@ -4047,6 +4096,9 @@ gcc_unreachable (); } @@ -37413,7 +36643,7 @@ scalar_dest = gimple_assign_lhs (stmt); scalar_type = TREE_TYPE (scalar_dest); if (!POINTER_TYPE_P (scalar_type) && !INTEGRAL_TYPE_P (scalar_type) -@@ -4112,7 +4173,7 @@ +@@ -4121,7 +4173,7 @@ if (code == COND_EXPR) { @@ -37422,7 +36652,7 @@ { if (vect_print_dump_info (REPORT_DETAILS)) fprintf (vect_dump, "unsupported condition in reduction"); -@@ -4267,6 +4328,25 @@ +@@ -4276,6 +4328,25 @@ return false; } @@ -37448,7 +36678,7 @@ if (!vec_stmt) /* transformation not required. */ { STMT_VINFO_TYPE (stmt_info) = reduc_vec_info_type; -@@ -4365,7 +4445,7 @@ +@@ -4374,7 +4445,7 @@ gcc_assert (!slp_node); vectorizable_condition (stmt, gsi, vec_stmt, PHI_RESULT (VEC_index (gimple, phis, 0)), @@ -37457,7 +36687,7 @@ /* Multiple types are not supported for condition. */ break; } -@@ -4373,8 +4453,6 @@ +@@ -4382,8 +4453,6 @@ /* Handle uses. */ if (j == 0) { @@ -37466,7 +36696,7 @@ op0 = ops[!reduc_index]; if (op_type == ternary_op) { -@@ -4385,8 +4463,8 @@ +@@ -4394,8 +4463,8 @@ } if (slp_node) @@ -37477,7 +36707,7 @@ else { loop_vec_def0 = vect_get_vec_def_for_operand (ops[!reduc_index], -@@ -4404,11 +4482,19 @@ +@@ -4413,11 +4482,19 @@ { if (!slp_node) { @@ -37499,7 +36729,7 @@ loop_vec_def1 = vect_get_vec_def_for_stmt_copy (dt, loop_vec_def1); VEC_replace (tree, vec_oprnds1, 0, loop_vec_def1); -@@ -4713,6 +4799,8 @@ +@@ -4722,6 +4799,8 @@ tree cond_expr = NULL_TREE; gimple_seq cond_expr_stmt_list = NULL; bool do_peeling_for_loop_bound; @@ -37508,7 +36738,7 @@ if (vect_print_dump_info (REPORT_DETAILS)) fprintf (vect_dump, "=== vec_transform_loop ==="); -@@ -4800,11 +4888,19 @@ +@@ -4809,11 +4888,19 @@ } } @@ -37530,7 +36760,7 @@ if (vect_print_dump_info (REPORT_DETAILS)) { fprintf (vect_dump, "------>vectorizing statement: "); -@@ -4827,14 +4923,54 @@ +@@ -4836,14 +4923,54 @@ if (!STMT_VINFO_RELEVANT_P (stmt_info) && !STMT_VINFO_LIVE_P (stmt_info)) @@ -37590,7 +36820,7 @@ if (!STMT_SLP_TYPE (stmt_info) && nunits != (unsigned int) vectorization_factor && vect_print_dump_info (REPORT_DETAILS)) -@@ -4859,8 +4995,9 @@ +@@ -4868,8 +4995,9 @@ /* Hybrid SLP stmts must be vectorized in addition to SLP. */ if (!vinfo_for_stmt (stmt) || PURE_SLP_STMT (stmt_info)) { @@ -37602,7 +36832,7 @@ } } -@@ -4879,7 +5016,7 @@ +@@ -4888,7 +5016,7 @@ the chain. */ vect_remove_stores (DR_GROUP_FIRST_DR (stmt_info)); gsi_remove (&si, true); @@ -37611,7 +36841,7 @@ } else { -@@ -4889,7 +5026,9 @@ +@@ -4898,7 +5026,9 @@ continue; } } @@ -37622,9 +36852,222 @@ } /* stmts in BB */ } /* BBs in loop */ +--- a/src/gcc/tree-vect-loop-manip.c ++++ b/src/gcc/tree-vect-loop-manip.c +@@ -1105,35 +1105,6 @@ + first_niters = PHI_RESULT (newphi); + } + +- +-/* Remove dead assignments from loop NEW_LOOP. */ +- +-static void +-remove_dead_stmts_from_loop (struct loop *new_loop) +-{ +- basic_block *bbs = get_loop_body (new_loop); +- unsigned i; +- for (i = 0; i < new_loop->num_nodes; ++i) +- { +- gimple_stmt_iterator gsi; +- for (gsi = gsi_start_bb (bbs[i]); !gsi_end_p (gsi);) +- { +- gimple stmt = gsi_stmt (gsi); +- if (is_gimple_assign (stmt) +- && TREE_CODE (gimple_assign_lhs (stmt)) == SSA_NAME +- && has_zero_uses (gimple_assign_lhs (stmt))) +- { +- gsi_remove (&gsi, true); +- release_defs (stmt); +- } +- else +- gsi_next (&gsi); +- } +- } +- free (bbs); +-} +- +- + /* Function slpeel_tree_peel_loop_to_edge. + + Peel the first (last) iterations of LOOP into a new prolog (epilog) loop +@@ -1445,13 +1416,6 @@ + BITMAP_FREE (definitions); + delete_update_ssa (); + +- /* Remove all pattern statements from the loop copy. They will confuse +- the expander if DCE is disabled. +- ??? The pattern recognizer should be split into an analysis and +- a transformation phase that is then run only on the loop that is +- going to be transformed. */ +- remove_dead_stmts_from_loop (new_loop); +- + adjust_vec_debug_stmts (); + + return new_loop; +--- a/src/gcc/tree-vectorizer.h ++++ b/src/gcc/tree-vectorizer.h +@@ -73,15 +73,15 @@ + /************************************************************************ + SLP + ************************************************************************/ ++typedef void *slp_void_p; ++DEF_VEC_P (slp_void_p); ++DEF_VEC_ALLOC_P (slp_void_p, heap); + +-/* A computation tree of an SLP instance. Each node corresponds to a group of ++/* A computation tree of an SLP instance. Each node corresponds to a group of + stmts to be packed in a SIMD stmt. */ + typedef struct _slp_tree { +- /* Only binary and unary operations are supported. LEFT child corresponds to +- the first operand and RIGHT child to the second if the operation is +- binary. */ +- struct _slp_tree *left; +- struct _slp_tree *right; ++ /* Nodes that contain def-stmts of this node statements operands. */ ++ VEC (slp_void_p, heap) *children; + /* A group of scalar stmts to be vectorized together. */ + VEC (gimple, heap) *stmts; + /* Vectorized stmt/s. */ +@@ -146,14 +146,32 @@ + #define SLP_INSTANCE_LOADS(S) (S)->loads + #define SLP_INSTANCE_FIRST_LOAD_STMT(S) (S)->first_load + +-#define SLP_TREE_LEFT(S) (S)->left +-#define SLP_TREE_RIGHT(S) (S)->right ++#define SLP_TREE_CHILDREN(S) (S)->children + #define SLP_TREE_SCALAR_STMTS(S) (S)->stmts + #define SLP_TREE_VEC_STMTS(S) (S)->vec_stmts + #define SLP_TREE_NUMBER_OF_VEC_STMTS(S) (S)->vec_stmts_size + #define SLP_TREE_OUTSIDE_OF_LOOP_COST(S) (S)->cost.outside_of_loop + #define SLP_TREE_INSIDE_OF_LOOP_COST(S) (S)->cost.inside_of_loop + ++/* This structure is used in creation of an SLP tree. Each instance ++ corresponds to the same operand in a group of scalar stmts in an SLP ++ node. */ ++typedef struct _slp_oprnd_info ++{ ++ /* Def-stmts for the operands. */ ++ VEC (gimple, heap) *def_stmts; ++ /* Information about the first statement, its vector def-type, type, the ++ operand itself in case it's constant, and an indication if it's a pattern ++ stmt. */ ++ enum vect_def_type first_dt; ++ tree first_def_type; ++ tree first_const_oprnd; ++ bool first_pattern; ++} *slp_oprnd_info; ++ ++DEF_VEC_P(slp_oprnd_info); ++DEF_VEC_ALLOC_P(slp_oprnd_info, heap); ++ + + typedef struct _vect_peel_info + { +@@ -464,6 +482,9 @@ + pattern). */ + gimple related_stmt; + ++ /* Used to keep a def stmt of a pattern stmt if such exists. */ ++ gimple pattern_def_stmt; ++ + /* List of datarefs that are known to have the same alignment as the dataref + of this stmt. */ + VEC(dr_p,heap) *same_align_refs; +@@ -531,6 +552,7 @@ + + #define STMT_VINFO_IN_PATTERN_P(S) (S)->in_pattern_p + #define STMT_VINFO_RELATED_STMT(S) (S)->related_stmt ++#define STMT_VINFO_PATTERN_DEF_STMT(S) (S)->pattern_def_stmt + #define STMT_VINFO_SAME_ALIGN_REFS(S) (S)->same_align_refs + #define STMT_VINFO_DEF_TYPE(S) (S)->def_type + #define STMT_VINFO_DR_GROUP_FIRST_DR(S) (S)->first_dr +@@ -794,9 +816,9 @@ + extern tree vectorizable_function (gimple, tree, tree); + extern void vect_model_simple_cost (stmt_vec_info, int, enum vect_def_type *, + slp_tree); +-extern void vect_model_store_cost (stmt_vec_info, int, enum vect_def_type, +- slp_tree); +-extern void vect_model_load_cost (stmt_vec_info, int, slp_tree); ++extern void vect_model_store_cost (stmt_vec_info, int, bool, ++ enum vect_def_type, slp_tree); ++extern void vect_model_load_cost (stmt_vec_info, int, bool, slp_tree); + extern void vect_finish_stmt_generation (gimple, gimple, + gimple_stmt_iterator *); + extern bool vect_mark_stmts_to_be_vectorized (loop_vec_info); +@@ -810,10 +832,13 @@ + extern void vect_remove_stores (gimple); + extern bool vect_analyze_stmt (gimple, bool *, slp_tree); + extern bool vectorizable_condition (gimple, gimple_stmt_iterator *, gimple *, +- tree, int); ++ tree, int, slp_tree); + extern void vect_get_load_cost (struct data_reference *, int, bool, + unsigned int *, unsigned int *); + extern void vect_get_store_cost (struct data_reference *, int, unsigned int *); ++extern bool vect_supportable_shift (enum tree_code, tree); ++extern void vect_get_vec_defs (tree, tree, gimple, VEC (tree, heap) **, ++ VEC (tree, heap) **, slp_tree, int); + + /* In tree-vect-data-refs.c. */ + extern bool vect_can_force_dr_alignment_p (const_tree, unsigned int); +@@ -829,21 +854,22 @@ + extern bool vect_analyze_data_ref_accesses (loop_vec_info, bb_vec_info); + extern bool vect_prune_runtime_alias_test_list (loop_vec_info); + extern bool vect_analyze_data_refs (loop_vec_info, bb_vec_info, int *); +-extern tree vect_create_data_ref_ptr (gimple, struct loop *, tree, tree *, +- gimple *, bool, bool *); ++extern tree vect_create_data_ref_ptr (gimple, tree, struct loop *, tree, ++ tree *, gimple *, bool, bool *); + extern tree bump_vector_ptr (tree, gimple, gimple_stmt_iterator *, gimple, tree); + extern tree vect_create_destination_var (tree, tree); +-extern bool vect_strided_store_supported (tree); +-extern bool vect_strided_load_supported (tree); +-extern bool vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, ++extern bool vect_strided_store_supported (tree, unsigned HOST_WIDE_INT); ++extern bool vect_store_lanes_supported (tree, unsigned HOST_WIDE_INT); ++extern bool vect_strided_load_supported (tree, unsigned HOST_WIDE_INT); ++extern bool vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT); ++extern void vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, + gimple_stmt_iterator *, VEC(tree,heap) **); + extern tree vect_setup_realignment (gimple, gimple_stmt_iterator *, tree *, + enum dr_alignment_support, tree, + struct loop **); +-extern bool vect_permute_load_chain (VEC(tree,heap) *,unsigned int, gimple, +- gimple_stmt_iterator *, VEC(tree,heap) **); +-extern bool vect_transform_strided_load (gimple, VEC(tree,heap) *, int, ++extern void vect_transform_strided_load (gimple, VEC(tree,heap) *, int, + gimple_stmt_iterator *); ++extern void vect_record_strided_load_vectors (gimple, VEC(tree,heap) *); + extern int vect_get_place_in_interleaving_chain (gimple, gimple); + extern tree vect_get_new_vect_var (tree, enum vect_var_kind, const char *); + extern tree vect_create_addr_base_for_vector_ref (gimple, gimple_seq *, +@@ -879,8 +905,9 @@ + extern bool vect_analyze_slp (loop_vec_info, bb_vec_info); + extern void vect_make_slp_decision (loop_vec_info); + extern void vect_detect_hybrid_slp (loop_vec_info); +-extern void vect_get_slp_defs (tree, tree, slp_tree, VEC (tree,heap) **, +- VEC (tree,heap) **, int); ++extern void vect_get_slp_defs (VEC (tree, heap) *, slp_tree, ++ VEC (slp_void_p, heap) **, int); ++ + extern LOC find_bb_location (basic_block); + extern bb_vec_info vect_slp_analyze_bb (basic_block); + extern void vect_slp_transform_bb (basic_block); +@@ -889,9 +916,9 @@ + /* Pattern recognition functions. + Additional pattern recognition functions can (and will) be added + in the future. */ +-typedef gimple (* vect_recog_func_ptr) (gimple, tree *, tree *); +-#define NUM_PATTERNS 4 +-void vect_pattern_recog (loop_vec_info); ++typedef gimple (* vect_recog_func_ptr) (VEC (gimple, heap) **, tree *, tree *); ++#define NUM_PATTERNS 7 ++void vect_pattern_recog (loop_vec_info, bb_vec_info); + + /* In tree-vectorizer.c. */ + unsigned vectorize_loops (void); --- a/src/gcc/tree-vect-patterns.c +++ b/src/gcc/tree-vect-patterns.c -@@ -38,33 +38,40 @@ +@@ -38,33 +38,94 @@ #include "recog.h" #include "diagnostic-core.h" @@ -37656,34 +37099,87 @@ vect_recog_widen_sum_pattern, vect_recog_dot_prod_pattern, - vect_recog_pow_pattern}; -- + vect_recog_pow_pattern, -+ vect_recog_over_widening_pattern, + vect_recog_widen_shift_pattern, ++ vect_recog_over_widening_pattern, + vect_recog_mixed_size_cond_pattern}; + -/* Function widened_name_p ++/* Check whether STMT2 is in the same loop or basic block as STMT1. ++ Which of the two applies depends on whether we're currently doing ++ loop-based or basic-block-based vectorization, as determined by ++ the vinfo_for_stmt for STMT1 (which must be defined). - Check whether NAME, an ssa-name used in USE_STMT, - is a result of a type-promotion, such that: - DEF_STMT: NAME = NOP (name0) - where the type of name0 (HALF_TYPE) is smaller than the type of NAME. -*/ ++ If this returns true, vinfo_for_stmt for STMT2 is guaranteed ++ to be defined as well. */ + + static bool +-widened_name_p (tree name, gimple use_stmt, tree *half_type, gimple *def_stmt) ++vect_same_loop_or_bb_p (gimple stmt1, gimple stmt2) ++{ ++ stmt_vec_info stmt_vinfo = vinfo_for_stmt (stmt1); ++ loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); ++ bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); ++ ++ if (!gimple_bb (stmt2)) ++ return false; ++ ++ if (loop_vinfo) ++ { ++ struct loop *loop = LOOP_VINFO_LOOP (loop_vinfo); ++ if (!flow_bb_inside_loop_p (loop, gimple_bb (stmt2))) ++ return false; ++ } ++ else ++ { ++ if (gimple_bb (stmt2) != BB_VINFO_BB (bb_vinfo) ++ || gimple_code (stmt2) == GIMPLE_PHI) ++ return false; ++ } ++ ++ gcc_assert (vinfo_for_stmt (stmt2)); ++ return true; ++} ++ ++/* If the LHS of DEF_STMT has a single use, and that statement is ++ in the same loop or basic block, return it. */ ++ ++static gimple ++vect_single_imm_use (gimple def_stmt) ++{ ++ tree lhs = gimple_assign_lhs (def_stmt); ++ use_operand_p use_p; ++ gimple use_stmt; ++ ++ if (!single_imm_use (lhs, &use_p, &use_stmt)) ++ return NULL; ++ ++ if (!vect_same_loop_or_bb_p (def_stmt, use_stmt)) ++ return NULL; ++ ++ return use_stmt; ++} ++ +/* Check whether NAME, an ssa-name used in USE_STMT, + is a result of a type promotion or demotion, such that: + DEF_STMT: NAME = NOP (name0) + where the type of name0 (ORIG_TYPE) is smaller/bigger than the type of NAME. + If CHECK_SIGN is TRUE, check that either both types are signed or both are + unsigned. */ - - static bool --widened_name_p (tree name, gimple use_stmt, tree *half_type, gimple *def_stmt) ++ ++static bool +type_conversion_p (tree name, gimple use_stmt, bool check_sign, + tree *orig_type, gimple *def_stmt, bool *promotion) { tree dummy; gimple dummy_gimple; -@@ -74,35 +81,43 @@ +@@ -74,35 +135,43 @@ tree oprnd0; enum vect_def_type dt; tree def; @@ -37735,7 +37231,7 @@ &dt)) return false; -@@ -145,9 +160,9 @@ +@@ -145,9 +214,9 @@ Input: @@ -37748,7 +37244,7 @@ Output: -@@ -168,9 +183,10 @@ +@@ -168,9 +237,10 @@ inner-loop nested in an outer-loop that us being vectorized). */ static gimple @@ -37761,7 +37257,7 @@ tree oprnd0, oprnd1; tree oprnd00, oprnd01; stmt_vec_info stmt_vinfo = vinfo_for_stmt (last_stmt); -@@ -178,8 +194,14 @@ +@@ -178,8 +248,14 @@ gimple pattern_stmt; tree prod_type; loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_vinfo); @@ -37777,7 +37273,7 @@ if (!is_gimple_assign (last_stmt)) return NULL; -@@ -238,7 +260,9 @@ +@@ -238,7 +314,9 @@ return NULL; stmt = last_stmt; @@ -37788,7 +37284,7 @@ { stmt = def_stmt; oprnd0 = gimple_assign_rhs1 (stmt); -@@ -293,10 +317,14 @@ +@@ -293,10 +371,14 @@ if (!types_compatible_p (TREE_TYPE (oprnd0), prod_type) || !types_compatible_p (TREE_TYPE (oprnd1), prod_type)) return NULL; @@ -37805,7 +37301,7 @@ return NULL; oprnd01 = gimple_assign_rhs1 (def_stmt); if (!types_compatible_p (half_type0, half_type1)) -@@ -327,6 +355,100 @@ +@@ -327,6 +409,88 @@ return pattern_stmt; } @@ -37830,16 +37326,6 @@ +{ + tree new_type, new_oprnd, tmp; + gimple new_stmt; -+ loop_vec_info loop_vinfo; -+ struct loop *loop = NULL; -+ bb_vec_info bb_vinfo; -+ stmt_vec_info stmt_vinfo; -+ -+ stmt_vinfo = vinfo_for_stmt (stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ if (loop_vinfo) -+ loop = LOOP_VINFO_LOOP (loop_vinfo); + + if (code != MULT_EXPR && code != LSHIFT_EXPR) + return false; @@ -37855,12 +37341,10 @@ + return true; + } + -+ if (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 4) -+ || !gimple_bb (def_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) -+ || (!loop && gimple_bb (def_stmt) != BB_VINFO_BB (bb_vinfo) -+ && gimple_code (def_stmt) != GIMPLE_PHI) -+ || !vinfo_for_stmt (def_stmt)) ++ if (TYPE_PRECISION (type) < (TYPE_PRECISION (*half_type) * 4)) ++ return false; ++ ++ if (!vect_same_loop_or_bb_p (stmt, def_stmt)) + return false; + + /* TYPE is 4 times bigger than HALF_TYPE, try widening operation for @@ -37906,7 +37390,7 @@ /* Function vect_recog_widen_mult_pattern Try to find the following pattern: -@@ -342,37 +464,80 @@ +@@ -342,37 +506,81 @@ where type 'TYPE' is at least double the size of type 'type'. @@ -37992,11 +37476,12 @@ enum tree_code dummy_code; int dummy_int; VEC (tree, heap) *dummy_vec; -+ bool op1_ok, promotion; ++ bool op1_ok; ++ bool promotion; if (!is_gimple_assign (last_stmt)) return NULL; -@@ -391,15 +556,68 @@ +@@ -391,15 +599,58 @@ || !types_compatible_p (TREE_TYPE (oprnd1), type)) return NULL; @@ -38037,26 +37522,16 @@ + Use unsigned TYPE as the type for WIDEN_MULT_EXPR. */ + if (TYPE_UNSIGNED (type) != TYPE_UNSIGNED (half_type0)) + { -+ tree lhs = gimple_assign_lhs (last_stmt), use_lhs; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; -+ gimple use_stmt = NULL; ++ gimple use_stmt; ++ tree use_lhs; + tree use_type; + + if (TYPE_UNSIGNED (type) == TYPE_UNSIGNED (half_type1)) + return NULL; + -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) ++ use_stmt = vect_single_imm_use (last_stmt); ++ if (!use_stmt || !is_gimple_assign (use_stmt) ++ || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) + return NULL; + + use_lhs = gimple_assign_lhs (use_stmt); @@ -38072,7 +37547,7 @@ if (!types_compatible_p (half_type0, half_type1)) return NULL; -@@ -431,6 +649,7 @@ +@@ -431,6 +682,7 @@ if (vect_print_dump_info (REPORT_DETAILS)) print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); @@ -38080,7 +37555,7 @@ return pattern_stmt; } -@@ -462,8 +681,9 @@ +@@ -462,8 +714,9 @@ */ static gimple @@ -38091,7 +37566,7 @@ tree fn, base, exp = NULL; gimple stmt; tree var; -@@ -574,16 +794,24 @@ +@@ -574,16 +827,24 @@ inner-loop nested in an outer-loop that us being vectorized). */ static gimple @@ -38118,7 +37593,7 @@ if (!is_gimple_assign (last_stmt)) return NULL; -@@ -612,14 +840,16 @@ +@@ -612,14 +873,16 @@ || !types_compatible_p (TREE_TYPE (oprnd1), type)) return NULL; @@ -38138,7 +37613,7 @@ oprnd0 = gimple_assign_rhs1 (stmt); *type_in = half_type; -@@ -641,10 +871,820 @@ +@@ -641,10 +904,715 @@ when doing outer-loop vectorization. */ gcc_assert (!nested_in_vect_loop_p (loop, last_stmt)); @@ -38185,13 +37660,7 @@ + tree interm_type = NULL_TREE, half_type, tmp, new_oprnd, type; + gimple def_stmt, new_stmt; + bool first = false; -+ loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (vinfo_for_stmt (stmt)); + bool promotion; -+ bb_vec_info bb_info = STMT_VINFO_BB_VINFO (vinfo_for_stmt (stmt)); -+ struct loop *loop = NULL; -+ -+ if (loop_info) -+ loop = LOOP_VINFO_LOOP (loop_info); + + *new_def_stmt = NULL; + @@ -38222,13 +37691,9 @@ + { + first = true; + if (!type_conversion_p (oprnd, stmt, false, &half_type, &def_stmt, -+ &promotion) -+ || !promotion -+ || !gimple_bb (def_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (def_stmt))) -+ || (!loop && gimple_bb (def_stmt) != BB_VINFO_BB (bb_info) -+ && gimple_code (def_stmt) != GIMPLE_PHI) -+ || !vinfo_for_stmt (def_stmt)) ++ &promotion) ++ || !promotion ++ || !vect_same_loop_or_bb_p (stmt, def_stmt)) + return false; + } + @@ -38399,24 +37864,11 @@ +{ + gimple stmt = VEC_pop (gimple, *stmts); + gimple pattern_stmt = NULL, new_def_stmt, prev_stmt = NULL, use_stmt = NULL; -+ tree op0, op1, vectype = NULL_TREE, lhs, use_lhs, use_type; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; ++ tree op0, op1, vectype = NULL_TREE, use_lhs, use_type; + tree var = NULL_TREE, new_type = NULL_TREE, tmp, new_oprnd; + bool first; -+ loop_vec_info loop_vinfo; -+ struct loop *loop = NULL; -+ bb_vec_info bb_vinfo; -+ stmt_vec_info stmt_vinfo; + tree type = NULL; + -+ stmt_vinfo = vinfo_for_stmt (stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ if (loop_vinfo) -+ loop = LOOP_VINFO_LOOP (loop_vinfo); -+ + first = true; + while (1) + { @@ -38436,20 +37888,8 @@ + } + + /* STMT can be performed on a smaller type. Check its uses. */ -+ lhs = gimple_assign_lhs (stmt); -+ nuses = 0; -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || !gimple_bb (use_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))) -+ || (!loop && gimple_bb (use_stmt) != BB_VINFO_BB (bb_vinfo))) ++ use_stmt = vect_single_imm_use (stmt); ++ if (!use_stmt || !is_gimple_assign (use_stmt)) + return NULL; + + /* Create pattern statement for STMT. */ @@ -38564,16 +38004,20 @@ + + where type 'TYPE' is at least double the size of type 'type'. + -+ Also detect unsigned cases: ++ Also detect cases where the shift result is immediately converted ++ to another type 'result_type' that is no larger in size than 'TYPE'. ++ In those cases we perform a widen-shift that directly results in ++ 'result_type', to avoid a possible over-widening situation: + -+ unsigned type a_t; -+ unsigned TYPE u_res_T; ++ type a_t; + TYPE a_T, res_T; ++ result_type res_result; + + S1 a_t = ; + S2 a_T = (TYPE) a_t; + S3 res_T = a_T << CONST; -+ S4 u_res_T = (unsigned TYPE) res_T; ++ S4 res_result = (result_type) res_T; ++ '--> res_result' = a_t w<< CONST; + + And a case when 'TYPE' is 4 times bigger than 'type'. In that case we + create an additional pattern stmt for S2 to create a variable of an @@ -38614,60 +38058,21 @@ + gimple def_stmt0; + tree oprnd0, oprnd1; + tree type, half_type0; -+ gimple pattern_stmt, orig_stmt = NULL; ++ gimple pattern_stmt; + tree vectype, vectype_out = NULL_TREE; + tree dummy; + tree var; + enum tree_code dummy_code; + int dummy_int; + VEC (tree, heap) * dummy_vec; -+ gimple use_stmt = NULL; -+ bool over_widen = false; ++ gimple use_stmt; + bool promotion; + + if (!is_gimple_assign (last_stmt) || !vinfo_for_stmt (last_stmt)) + return NULL; + -+ orig_stmt = last_stmt; + if (STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (last_stmt))) -+ { -+ /* This statement was also detected as over-widening operation (it can't -+ be any other pattern, because only over-widening detects shifts). -+ LAST_STMT is the final type demotion statement, but its related -+ statement is shift. We analyze the related statement to catch cases: -+ -+ orig code: -+ type a_t; -+ itype res; -+ TYPE a_T, res_T; -+ -+ S1 a_T = (TYPE) a_t; -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; -+ -+ (size of type * 2 <= size of itype -+ and size of itype * 2 <= size of TYPE) -+ -+ code after over-widening pattern detection: -+ -+ S1 a_T = (TYPE) a_t; -+ --> a_it = (itype) a_t; -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; <--- LAST_STMT -+ --> res = a_it << CONST; -+ -+ after widen_shift: -+ -+ S1 a_T = (TYPE) a_t; -+ --> a_it = (itype) a_t; - redundant -+ S2 res_T = a_T << CONST; -+ S3 res = (itype)res_T; -+ --> res = a_t w<< CONST; -+ -+ i.e., we replace the three statements with res = a_t w<< CONST. */ -+ last_stmt = STMT_VINFO_RELATED_STMT (vinfo_for_stmt (last_stmt)); -+ over_widen = true; -+ } ++ return NULL; + + if (gimple_assign_rhs_code (last_stmt) != LSHIFT_EXPR) + return NULL; @@ -38691,59 +38096,29 @@ + oprnd0 = gimple_assign_rhs1 (def_stmt0); + type = gimple_expr_type (last_stmt); + ++ /* Check for subsequent conversion to another type. */ ++ use_stmt = vect_single_imm_use (last_stmt); ++ if (use_stmt && is_gimple_assign (use_stmt) ++ && CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (use_stmt)) ++ && !STMT_VINFO_IN_PATTERN_P (vinfo_for_stmt (use_stmt))) ++ { ++ tree use_lhs = gimple_assign_lhs (use_stmt); ++ tree use_type = TREE_TYPE (use_lhs); ++ ++ if (INTEGRAL_TYPE_P (use_type) ++ && TYPE_PRECISION (use_type) <= TYPE_PRECISION (type)) ++ { ++ last_stmt = use_stmt; ++ type = use_type; ++ } ++ } ++ + /* Check if this a widening operation. */ + if (!vect_handle_widen_op_by_const (last_stmt, LSHIFT_EXPR, oprnd1, + &oprnd0, stmts, + type, &half_type0, def_stmt0)) + return NULL; + -+ /* Handle unsigned case. Look for -+ S4 u_res_T = (unsigned TYPE) res_T; -+ Use unsigned TYPE as the type for WIDEN_LSHIFT_EXPR. */ -+ if (TYPE_UNSIGNED (type) != TYPE_UNSIGNED (half_type0)) -+ { -+ tree lhs = gimple_assign_lhs (last_stmt), use_lhs; -+ imm_use_iterator imm_iter; -+ use_operand_p use_p; -+ int nuses = 0; -+ tree use_type; -+ -+ if (over_widen) -+ { -+ /* In case of over-widening pattern, S4 should be ORIG_STMT itself. -+ We check here that TYPE is the correct type for the operation, -+ i.e., it's the type of the original result. */ -+ tree orig_type = gimple_expr_type (orig_stmt); -+ if ((TYPE_UNSIGNED (type) != TYPE_UNSIGNED (orig_type)) -+ || (TYPE_PRECISION (type) != TYPE_PRECISION (orig_type))) -+ return NULL; -+ } -+ else -+ { -+ FOR_EACH_IMM_USE_FAST (use_p, imm_iter, lhs) -+ { -+ if (is_gimple_debug (USE_STMT (use_p))) -+ continue; -+ use_stmt = USE_STMT (use_p); -+ nuses++; -+ } -+ -+ if (nuses != 1 || !is_gimple_assign (use_stmt) -+ || !CONVERT_EXPR_CODE_P (gimple_assign_rhs_code (use_stmt))) -+ return NULL; -+ -+ use_lhs = gimple_assign_lhs (use_stmt); -+ use_type = TREE_TYPE (use_lhs); -+ -+ if (!INTEGRAL_TYPE_P (use_type) -+ || (TYPE_UNSIGNED (type) == TYPE_UNSIGNED (use_type)) -+ || (TYPE_PRECISION (type) != TYPE_PRECISION (use_type))) -+ return NULL; -+ -+ type = use_type; -+ } -+ } -+ + /* Pattern detected. */ + if (vect_print_dump_info (REPORT_DETAILS)) + fprintf (vect_dump, "vect_recog_widen_shift_pattern: detected: "); @@ -38772,11 +38147,6 @@ + if (vect_print_dump_info (REPORT_DETAILS)) + print_gimple_stmt (vect_dump, pattern_stmt, 0, TDF_SLIM); + -+ if (use_stmt) -+ last_stmt = use_stmt; -+ else -+ last_stmt = orig_stmt; -+ + VEC_safe_push (gimple, heap, *stmts, last_stmt); + return pattern_stmt; +} @@ -38959,7 +38329,7 @@ /* Function vect_pattern_recog_1 Input: -@@ -669,29 +1709,33 @@ +@@ -669,29 +1637,33 @@ static void vect_pattern_recog_1 ( @@ -39001,7 +38371,7 @@ pattern_vectype = type_out ? type_out : type_in; } else -@@ -736,22 +1780,32 @@ +@@ -736,22 +1708,32 @@ } /* Mark the stmts that are involved in the pattern. */ @@ -39047,7 +38417,7 @@ } -@@ -761,8 +1815,8 @@ +@@ -761,8 +1743,8 @@ LOOP_VINFO - a struct_loop_info of a loop in which we want to look for computation idioms. @@ -39058,7 +38428,7 @@ also record some information in the struct_stmt_info of the relevant stmts, as explained below: -@@ -777,79 +1831,113 @@ +@@ -777,79 +1759,113 @@ S5: ... = ..use(a_0).. - - - Say the sequence {S1,S2,S3,S4} was detected as a pattern that can be @@ -40401,6 +39771,40 @@ if (!vect_analyze_data_ref_dependences (NULL, bb_vinfo, &max_vf, &data_dependence_in_bb) || min_vf > max_vf +@@ -1756,16 +2010,6 @@ + return NULL; + } + +- if (!vect_verify_datarefs_alignment (NULL, bb_vinfo)) +- { +- if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) +- fprintf (vect_dump, "not vectorized: unsupported alignment in basic " +- "block.\n"); +- +- destroy_bb_vec_info (bb_vinfo); +- return NULL; +- } +- + /* Check the SLP opportunities in the basic block, analyze and build SLP + trees. */ + if (!vect_analyze_slp (NULL, bb_vinfo)) +@@ -1788,6 +2032,16 @@ + vect_mark_slp_stmts_relevant (SLP_INSTANCE_TREE (instance)); + } + ++ if (!vect_verify_datarefs_alignment (NULL, bb_vinfo)) ++ { ++ if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) ++ fprintf (vect_dump, "not vectorized: unsupported alignment in basic " ++ "block.\n"); ++ ++ destroy_bb_vec_info (bb_vinfo); ++ return NULL; ++ } ++ + if (!vect_slp_analyze_operations (bb_vinfo)) + { + if (vect_print_dump_info (REPORT_UNVECTORIZED_LOCATIONS)) @@ -1816,6 +2070,61 @@ } @@ -40845,15 +40249,6 @@ + } + } + } -+ -+ if (!found) -+ { -+ /* This is the last stmt in a sequence that was detected as a -+ pattern that can potentially be vectorized. Don't mark the stmt -+ as relevant/live because it's not going to be vectorized. -+ Instead mark the pattern-stmt that replaces it. */ -+ -+ pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); - /* This is the last stmt in a sequence that was detected as a - pattern that can potentially be vectorized. Don't mark the stmt @@ -40869,6 +40264,15 @@ - save_relevant = STMT_VINFO_RELEVANT (stmt_info); - save_live_p = STMT_VINFO_LIVE_P (stmt_info); - stmt = pattern_stmt; ++ if (!found) ++ { ++ /* This is the last stmt in a sequence that was detected as a ++ pattern that can potentially be vectorized. Don't mark the stmt ++ as relevant/live because it's not going to be vectorized. ++ Instead mark the pattern-stmt that replaces it. */ ++ ++ pattern_stmt = STMT_VINFO_RELATED_STMT (stmt_info); ++ + if (vect_print_dump_info (REPORT_DETAILS)) + fprintf (vect_dump, "last stmt in pattern. don't mark" + " relevant/live."); @@ -41028,54 +40432,7 @@ } /* while worklist */ VEC_free (gimple, heap, worklist); -@@ -623,6 +833,46 @@ - } - - -+/* Model cost for type demotion and promotion operations. PWR is normally -+ zero for single-step promotions and demotions. It will be one if -+ two-step promotion/demotion is required, and so on. Each additional -+ step doubles the number of instructions required. */ -+ -+static void -+vect_model_promotion_demotion_cost (stmt_vec_info stmt_info, -+ enum vect_def_type *dt, int pwr) -+{ -+ int i, tmp; -+ int inside_cost = 0, outside_cost = 0, single_stmt_cost; -+ -+ /* The SLP costs were already calculated during SLP tree build. */ -+ if (PURE_SLP_STMT (stmt_info)) -+ return; -+ -+ single_stmt_cost = vect_get_stmt_cost (vec_promote_demote); -+ for (i = 0; i < pwr + 1; i++) -+ { -+ tmp = (STMT_VINFO_TYPE (stmt_info) == type_promotion_vec_info_type) ? -+ (i + 1) : i; -+ inside_cost += vect_pow2 (tmp) * single_stmt_cost; -+ } -+ -+ /* FORNOW: Assuming maximum 2 args per stmts. */ -+ for (i = 0; i < 2; i++) -+ { -+ if (dt[i] == vect_constant_def || dt[i] == vect_external_def) -+ outside_cost += vect_get_stmt_cost (vector_stmt); -+ } -+ -+ if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, "vect_model_promotion_demotion_cost: inside_cost = %d, " -+ "outside_cost = %d .", inside_cost, outside_cost); -+ -+ /* Set the costs in STMT_INFO. */ -+ stmt_vinfo_set_inside_of_loop_cost (stmt_info, NULL, inside_cost); -+ stmt_vinfo_set_outside_of_loop_cost (stmt_info, NULL, outside_cost); -+} -+ - /* Function vect_cost_strided_group_size - - For strided load or store, return the group_size only if it is the first -@@ -648,7 +898,8 @@ +@@ -688,7 +898,8 @@ void vect_model_store_cost (stmt_vec_info stmt_info, int ncopies, @@ -41085,7 +40442,7 @@ { int group_size; unsigned int inside_cost = 0, outside_cost = 0; -@@ -685,13 +936,15 @@ +@@ -725,9 +936,11 @@ first_dr = STMT_VINFO_DATA_REF (stmt_info); } @@ -41100,12 +40457,24 @@ { /* Uses a high and low interleave operation for each needed permute. */ inside_cost = ncopies * exact_log2(group_size) * group_size -- * vect_get_stmt_cost (vector_stmt); -+ * vect_get_stmt_cost (vec_perm); +@@ -789,6 +1002,16 @@ + break; + } - if (vect_print_dump_info (REPORT_COST)) - fprintf (vect_dump, "vect_model_store_cost: strided group_size = %d .", -@@ -763,8 +1016,8 @@ ++ case dr_unaligned_unsupported: ++ { ++ *inside_cost = VECT_MAX_COST; ++ ++ if (vect_print_dump_info (REPORT_COST)) ++ fprintf (vect_dump, "vect_model_store_cost: unsupported access."); ++ ++ break; ++ } ++ + default: + gcc_unreachable (); + } +@@ -803,8 +1026,8 @@ access scheme chosen. */ void @@ -41116,7 +40485,7 @@ { int group_size; gimple first_stmt; -@@ -789,13 +1042,15 @@ +@@ -829,9 +1052,11 @@ first_dr = dr; } @@ -41131,45 +40500,24 @@ { /* Uses an even and odd extract operations for each needed permute. */ inside_cost = ncopies * exact_log2(group_size) * group_size -- * vect_get_stmt_cost (vector_stmt); -+ * vect_get_stmt_cost (vec_perm); - - if (vect_print_dump_info (REPORT_COST)) - fprintf (vect_dump, "vect_model_load_cost: strided group_size = %d .", -@@ -855,7 +1110,7 @@ - case dr_explicit_realign: - { - *inside_cost += ncopies * (2 * vect_get_stmt_cost (vector_load) -- + vect_get_stmt_cost (vector_stmt)); -+ + vect_get_stmt_cost (vec_perm)); - - /* FIXME: If the misalignment remains fixed across the iterations of - the containing loop, the following cost should be added to the -@@ -863,6 +1118,9 @@ - if (targetm.vectorize.builtin_mask_for_load) - *inside_cost += vect_get_stmt_cost (vector_stmt); - -+ if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, "vect_model_load_cost: explicit realign"); -+ +@@ -938,6 +1163,16 @@ break; } - case dr_explicit_realign_optimized: -@@ -886,7 +1144,12 @@ - } - - *inside_cost += ncopies * (vect_get_stmt_cost (vector_load) -- + vect_get_stmt_cost (vector_stmt)); -+ + vect_get_stmt_cost (vec_perm)); + ++ case dr_unaligned_unsupported: ++ { ++ *inside_cost = VECT_MAX_COST; + + if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, -+ "vect_model_load_cost: explicit realign optimized"); ++ fprintf (vect_dump, "vect_model_load_cost: unsupported access."); + - break; - } - -@@ -1068,7 +1331,14 @@ ++ break; ++ } ++ + default: + gcc_unreachable (); + } +@@ -1116,7 +1351,14 @@ /* Get the def from the vectorized stmt. */ def_stmt_info = vinfo_for_stmt (def_stmt); @@ -41184,7 +40532,7 @@ gcc_assert (vec_stmt); if (gimple_code (vec_stmt) == GIMPLE_PHI) vec_oprnd = PHI_RESULT (vec_stmt); -@@ -1217,16 +1487,35 @@ +@@ -1265,16 +1507,35 @@ } @@ -41226,7 +40574,7 @@ else { tree vec_oprnd; -@@ -1324,6 +1613,7 @@ +@@ -1372,6 +1633,7 @@ VEC(tree, heap) *vargs = NULL; enum { NARROW, NONE, WIDEN } modifier; size_t i, nargs; @@ -41234,7 +40582,7 @@ /* FORNOW: unsupported in basic block SLP. */ gcc_assert (loop_vinfo); -@@ -1461,7 +1751,7 @@ +@@ -1509,7 +1771,7 @@ /** Transform. **/ if (vect_print_dump_info (REPORT_DETAILS)) @@ -41243,7 +40591,7 @@ /* Handle def. */ scalar_dest = gimple_call_lhs (stmt); -@@ -1580,8 +1870,11 @@ +@@ -1628,8 +1890,11 @@ rhs of the statement with something harmless. */ type = TREE_TYPE (scalar_dest); @@ -41257,7 +40605,7 @@ set_vinfo_for_stmt (new_stmt, stmt_info); /* For pattern statements make the related statement to point to NEW_STMT in order to be able to retrieve the original statement -@@ -1810,7 +2103,8 @@ +@@ -1858,7 +2123,8 @@ for (j = 0; j < ncopies; j++) { if (j == 0) @@ -41267,7 +40615,7 @@ else vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds0, NULL); -@@ -2015,7 +2309,7 @@ +@@ -2063,7 +2329,7 @@ { /* Handle uses. */ if (j == 0) @@ -41276,7 +40624,7 @@ else vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds, NULL); -@@ -2048,6 +2342,42 @@ +@@ -2096,6 +2362,42 @@ } @@ -41319,7 +40667,7 @@ /* Function vectorizable_shift. Check if STMT performs a shift operation that can be vectorized. -@@ -2334,10 +2664,10 @@ +@@ -2382,10 +2684,10 @@ operand 1 should be of a vector type (the usual case). */ if (vec_oprnd1) vect_get_vec_defs (op0, NULL_TREE, stmt, &vec_oprnds0, NULL, @@ -41332,7 +40680,7 @@ } else vect_get_vec_defs_for_stmt_copy (dt, &vec_oprnds0, &vec_oprnds1); -@@ -2645,10 +2975,10 @@ +@@ -2693,10 +2995,10 @@ { if (op_type == binary_op || op_type == ternary_op) vect_get_vec_defs (op0, op1, stmt, &vec_oprnds0, &vec_oprnds1, @@ -41345,7 +40693,7 @@ if (op_type == ternary_op) { vec_oprnds2 = VEC_alloc (tree, heap, 1); -@@ -2839,11 +3169,9 @@ +@@ -2887,11 +3189,9 @@ VEC (tree, heap) *vec_oprnds0 = NULL; VEC (tree, heap) *vec_dsts = NULL, *interm_types = NULL, *tmp_vec_dsts = NULL; tree last_oprnd, intermediate_type; @@ -41359,7 +40707,7 @@ return false; if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def) -@@ -2871,7 +3199,7 @@ +@@ -2919,7 +3219,7 @@ && SCALAR_FLOAT_TYPE_P (TREE_TYPE (op0)) && CONVERT_EXPR_CODE_P (code)))) return false; @@ -41368,16 +40716,7 @@ &def_stmt, &def, &dt[0], &vectype_in)) { if (vect_print_dump_info (REPORT_DETAILS)) -@@ -2919,7 +3247,7 @@ - STMT_VINFO_TYPE (stmt_info) = type_demotion_vec_info_type; - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vectorizable_demotion ==="); -- vect_model_simple_cost (stmt_info, ncopies, dt, NULL); -+ vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); - return true; - } - -@@ -2962,7 +3290,8 @@ +@@ -3010,7 +3310,8 @@ { /* Handle uses. */ if (slp_node) @@ -41387,7 +40726,7 @@ else { VEC_free (tree, heap, vec_oprnds0); -@@ -3118,11 +3447,10 @@ +@@ -3166,11 +3467,10 @@ int multi_step_cvt = 0; VEC (tree, heap) *vec_oprnds0 = NULL, *vec_oprnds1 = NULL; VEC (tree, heap) *vec_dsts = NULL, *interm_types = NULL, *tmp_vec_dsts = NULL; @@ -41402,7 +40741,7 @@ return false; if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def) -@@ -3137,7 +3465,8 @@ +@@ -3185,7 +3485,8 @@ code = gimple_assign_rhs_code (stmt); if (!CONVERT_EXPR_CODE_P (code) @@ -41412,7 +40751,7 @@ return false; scalar_dest = gimple_assign_lhs (stmt); -@@ -3151,13 +3480,40 @@ +@@ -3199,13 +3500,40 @@ && SCALAR_FLOAT_TYPE_P (TREE_TYPE (op0)) && CONVERT_EXPR_CODE_P (code)))) return false; @@ -41454,7 +40793,7 @@ /* If op0 is an external or constant def use a vector type with the same size as the output vector type. */ if (!vectype_in) -@@ -3190,18 +3546,6 @@ +@@ -3238,18 +3566,6 @@ gcc_assert (ncopies >= 1); @@ -41473,16 +40812,7 @@ /* Supportable by target? */ if (!supportable_widening_operation (code, stmt, vectype_out, vectype_in, &decl1, &decl2, &code1, &code2, -@@ -3217,7 +3561,7 @@ - STMT_VINFO_TYPE (stmt_info) = type_promotion_vec_info_type; - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vectorizable_promotion ==="); -- vect_model_simple_cost (stmt_info, 2*ncopies, dt, NULL); -+ vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); - return true; - } - -@@ -3227,6 +3571,14 @@ +@@ -3275,6 +3591,14 @@ fprintf (vect_dump, "transform type promotion operation. ncopies = %d.", ncopies); @@ -41497,7 +40827,7 @@ /* Handle def. */ /* In case of multi-step promotion, we first generate promotion operations to the intermediate types, and then from that types to the final one. -@@ -3260,6 +3612,8 @@ +@@ -3308,6 +3632,8 @@ if (op_type == binary_op) vec_oprnds1 = VEC_alloc (tree, heap, 1); } @@ -41506,7 +40836,7 @@ /* In case the vectorization factor (VF) is bigger than the number of elements that we can fit in a vectype (nunits), we have to generate -@@ -3273,15 +3627,33 @@ +@@ -3321,15 +3647,33 @@ if (j == 0) { if (slp_node) @@ -41544,7 +40874,7 @@ VEC_quick_push (tree, vec_oprnds1, vec_oprnd1); } } -@@ -3292,7 +3664,10 @@ +@@ -3340,7 +3684,10 @@ VEC_replace (tree, vec_oprnds0, 0, vec_oprnd0); if (op_type == binary_op) { @@ -41556,7 +40886,7 @@ VEC_replace (tree, vec_oprnds1, 0, vec_oprnd1); } } -@@ -3337,6 +3712,7 @@ +@@ -3385,6 +3732,7 @@ stmt_vec_info stmt_info = vinfo_for_stmt (stmt); struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info), *first_dr = NULL; tree vectype = STMT_VINFO_VECTYPE (stmt_info); @@ -41564,7 +40894,7 @@ loop_vec_info loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_info); struct loop *loop = NULL; enum machine_mode vec_mode; -@@ -3352,6 +3728,7 @@ +@@ -3400,6 +3748,7 @@ int j; gimple next_stmt, first_stmt = NULL; bool strided_store = false; @@ -41572,7 +40902,7 @@ unsigned int group_size, i; VEC(tree,heap) *dr_chain = NULL, *oprnds = NULL, *result_chain = NULL; bool inv_p; -@@ -3359,6 +3736,7 @@ +@@ -3407,6 +3756,7 @@ bool slp = (slp_node != NULL); unsigned int vec_num; bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); @@ -41580,7 +40910,7 @@ if (loop_vinfo) loop = LOOP_VINFO_LOOP (loop_vinfo); -@@ -3412,7 +3790,8 @@ +@@ -3460,7 +3810,8 @@ /* The scalar rhs type needs to be trivially convertible to the vector component type. This should always be the case. */ @@ -41590,7 +40920,7 @@ { if (vect_print_dump_info (REPORT_DETAILS)) fprintf (vect_dump, "??? operands of different types"); -@@ -3439,9 +3818,14 @@ +@@ -3487,9 +3838,14 @@ { strided_store = true; first_stmt = DR_GROUP_FIRST_DR (stmt_info); @@ -41608,7 +40938,7 @@ if (first_stmt == stmt) { -@@ -3467,7 +3851,7 @@ +@@ -3515,7 +3871,7 @@ if (!vec_stmt) /* transformation not required. */ { STMT_VINFO_TYPE (stmt_info) = store_vec_info_type; @@ -41617,7 +40947,7 @@ return true; } -@@ -3501,6 +3885,7 @@ +@@ -3549,6 +3905,7 @@ vec_num = SLP_TREE_NUMBER_OF_VEC_STMTS (slp_node); first_stmt = VEC_index (gimple, SLP_TREE_SCALAR_STMTS (slp_node), 0); first_dr = STMT_VINFO_DATA_REF (vinfo_for_stmt (first_stmt)); @@ -41625,7 +40955,7 @@ } else /* VEC_NUM is the number of vect stmts to be created for this -@@ -3522,6 +3907,16 @@ +@@ -3570,6 +3927,16 @@ alignment_support_scheme = vect_supportable_dr_alignment (first_dr, false); gcc_assert (alignment_support_scheme); @@ -41642,7 +40972,7 @@ /* In case the vectorization factor (VF) is bigger than the number of elements that we can fit in a vectype (nunits), we have to generate -@@ -3573,8 +3968,8 @@ +@@ -3621,8 +3988,8 @@ if (slp) { /* Get vectorized arguments for SLP_NODE. */ @@ -41653,7 +40983,7 @@ vec_oprnd = VEC_index (tree, vec_oprnds, 0); } -@@ -3610,9 +4005,9 @@ +@@ -3658,9 +4025,9 @@ /* We should have catched mismatched types earlier. */ gcc_assert (useless_type_conversion_p (vectype, TREE_TYPE (vec_oprnd))); @@ -41666,7 +40996,7 @@ gcc_assert (bb_vinfo || !inv_p); } else -@@ -3633,76 +4028,101 @@ +@@ -3681,76 +4048,101 @@ VEC_replace(tree, dr_chain, i, vec_oprnd); VEC_replace(tree, oprnds, i, vec_oprnd); } @@ -41824,7 +41154,7 @@ } } -@@ -3813,6 +4233,7 @@ +@@ -3861,6 +4253,7 @@ bool nested_in_vect_loop = false; struct data_reference *dr = STMT_VINFO_DATA_REF (stmt_info), *first_dr; tree vectype = STMT_VINFO_VECTYPE (stmt_info); @@ -41832,7 +41162,7 @@ tree new_temp; enum machine_mode mode; gimple new_stmt = NULL; -@@ -3829,6 +4250,7 @@ +@@ -3877,6 +4270,7 @@ gimple phi = NULL; VEC(tree,heap) *dr_chain = NULL; bool strided_load = false; @@ -41840,7 +41170,7 @@ gimple first_stmt; tree scalar_type; bool inv_p; -@@ -3841,6 +4263,7 @@ +@@ -3889,6 +4283,7 @@ enum tree_code code; bb_vec_info bb_vinfo = STMT_VINFO_BB_VINFO (stmt_info); int vf; @@ -41848,7 +41178,7 @@ if (loop_vinfo) { -@@ -3917,7 +4340,8 @@ +@@ -3965,7 +4360,8 @@ /* The vector component type needs to be trivially convertible to the scalar lhs. This should always be the case. */ @@ -41858,7 +41188,7 @@ { if (vect_print_dump_info (REPORT_DETAILS)) fprintf (vect_dump, "??? operands of different types"); -@@ -3931,10 +4355,15 @@ +@@ -3979,10 +4375,15 @@ /* FORNOW */ gcc_assert (! nested_in_vect_loop); @@ -41878,7 +41208,7 @@ } if (negative) -@@ -3959,18 +4388,23 @@ +@@ -4007,18 +4408,23 @@ if (!vec_stmt) /* transformation not required. */ { STMT_VINFO_TYPE (stmt_info) = load_vec_info_type; @@ -41904,7 +41234,7 @@ /* Check if the chain of loads is already vectorized. */ if (STMT_VINFO_VEC_STMT (vinfo_for_stmt (first_stmt))) { -@@ -3990,8 +4424,6 @@ +@@ -4038,8 +4444,6 @@ } else vec_num = group_size; @@ -41913,7 +41243,7 @@ } else { -@@ -4002,6 +4434,11 @@ +@@ -4050,6 +4454,11 @@ alignment_support_scheme = vect_supportable_dr_alignment (first_dr, false); gcc_assert (alignment_support_scheme); @@ -41925,7 +41255,7 @@ /* In case the vectorization factor (VF) is bigger than the number of elements that we can fit in a vectype (nunits), we have to generate -@@ -4133,208 +4570,252 @@ +@@ -4181,208 +4590,252 @@ if (negative) offset = size_int (-TYPE_VECTOR_SUBPARTS (vectype) + 1); @@ -41949,11 +41279,11 @@ - bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, NULL_TREE); + dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, stmt, + TYPE_SIZE_UNIT (aggr_type)); - -- for (i = 0; i < vec_num; i++) ++ + if (strided_load || slp_perm) + dr_chain = VEC_alloc (tree, heap, vec_num); -+ + +- for (i = 0; i < vec_num; i++) + if (load_lanes_p) { - if (i > 0) @@ -42081,27 +41411,27 @@ - || alignment_support_scheme == dr_explicit_realign) + /* Extract each vector into an SSA_NAME. */ + for (i = 0; i < vec_num; i++) - { -- tree tmp; ++ { + new_temp = read_vector_array (stmt, gsi, scalar_dest, + vec_array, i); + VEC_quick_push (tree, dr_chain, new_temp); + } - -- lsq = gimple_assign_lhs (new_stmt); -- if (!realignment_token) -- realignment_token = dataref_ptr; ++ + /* Record the mapping between SSA_NAMEs and statements. */ + vect_record_strided_load_vectors (stmt, dr_chain); + } + else + { + for (i = 0; i < vec_num; i++) -+ { + { +- tree tmp; + if (i > 0) + dataref_ptr = bump_vector_ptr (dataref_ptr, ptr_incr, gsi, + stmt, NULL_TREE); -+ + +- lsq = gimple_assign_lhs (new_stmt); +- if (!realignment_token) +- realignment_token = dataref_ptr; + /* 2. Create the vector-load in the loop. */ + switch (alignment_support_scheme) + { @@ -42348,7 +41678,7 @@ } if (slp && !slp_perm) -@@ -4353,12 +4834,9 @@ +@@ -4401,12 +4854,9 @@ { if (strided_load) { @@ -42363,7 +41693,7 @@ } else { -@@ -4369,11 +4847,10 @@ +@@ -4417,11 +4867,10 @@ prev_stmt_info = vinfo_for_stmt (new_stmt); } } @@ -42377,7 +41707,7 @@ return true; } -@@ -4387,7 +4864,7 @@ +@@ -4435,7 +4884,7 @@ condition operands are supportable using vec_is_simple_use. */ static bool @@ -42386,7 +41716,7 @@ { tree lhs, rhs; tree def; -@@ -4402,7 +4879,7 @@ +@@ -4450,7 +4899,7 @@ if (TREE_CODE (lhs) == SSA_NAME) { gimple lhs_def_stmt = SSA_NAME_DEF_STMT (lhs); @@ -42395,7 +41725,7 @@ &dt)) return false; } -@@ -4413,7 +4890,7 @@ +@@ -4461,7 +4910,7 @@ if (TREE_CODE (rhs) == SSA_NAME) { gimple rhs_def_stmt = SSA_NAME_DEF_STMT (rhs); @@ -42404,7 +41734,7 @@ &dt)) return false; } -@@ -4439,7 +4916,8 @@ +@@ -4487,7 +4936,8 @@ bool vectorizable_condition (gimple stmt, gimple_stmt_iterator *gsi, @@ -42414,7 +41744,7 @@ { tree scalar_dest = NULL_TREE; tree vec_dest = NULL_TREE; -@@ -4456,19 +4934,24 @@ +@@ -4504,19 +4954,24 @@ tree def; enum vect_def_type dt, dts[4]; int nunits = TYPE_VECTOR_SUBPARTS (vectype); @@ -42445,7 +41775,7 @@ return false; if (STMT_VINFO_DEF_TYPE (stmt_info) != vect_internal_def -@@ -4476,10 +4959,6 @@ +@@ -4524,10 +4979,6 @@ && reduc_def)) return false; @@ -42456,7 +41786,7 @@ /* FORNOW: not yet supported. */ if (STMT_VINFO_LIVE_P (stmt_info)) { -@@ -4503,7 +4982,7 @@ +@@ -4551,7 +5002,7 @@ then_clause = TREE_OPERAND (op, 1); else_clause = TREE_OPERAND (op, 2); @@ -42465,7 +41795,7 @@ return false; /* We do not handle two different vector types for the condition -@@ -4515,7 +4994,7 @@ +@@ -4563,7 +5014,7 @@ if (TREE_CODE (then_clause) == SSA_NAME) { gimple then_def_stmt = SSA_NAME_DEF_STMT (then_clause); @@ -42474,7 +41804,7 @@ &then_def_stmt, &def, &dt)) return false; } -@@ -4527,7 +5006,7 @@ +@@ -4575,7 +5026,7 @@ if (TREE_CODE (else_clause) == SSA_NAME) { gimple else_def_stmt = SSA_NAME_DEF_STMT (else_clause); @@ -42483,7 +41813,7 @@ &else_def_stmt, &def, &dt)) return false; } -@@ -4545,7 +5024,15 @@ +@@ -4593,7 +5044,15 @@ return expand_vec_cond_expr_p (TREE_TYPE (op), vec_mode); } @@ -42500,7 +41830,7 @@ /* Handle def. */ scalar_dest = gimple_assign_lhs (stmt); -@@ -4554,67 +5041,118 @@ +@@ -4602,67 +5061,118 @@ /* Handle cond expr. */ for (j = 0; j < ncopies; j++) { @@ -42660,7 +41990,7 @@ return true; } -@@ -4629,6 +5167,7 @@ +@@ -4677,6 +5187,7 @@ enum vect_relevant relevance = STMT_VINFO_RELEVANT (stmt_info); bool ok; tree scalar_type, vectype; @@ -42668,7 +41998,7 @@ if (vect_print_dump_info (REPORT_DETAILS)) { -@@ -4650,16 +5189,70 @@ +@@ -4698,16 +5209,70 @@ - any LABEL_EXPRs in the loop - computations that are used only for array indexing or loop control. In basic blocks we only analyze statements that are a part of some SLP @@ -42743,7 +42073,7 @@ switch (STMT_VINFO_DEF_TYPE (stmt_info)) { -@@ -4733,15 +5326,18 @@ +@@ -4781,15 +5346,18 @@ || vectorizable_call (stmt, NULL, NULL) || vectorizable_store (stmt, NULL, NULL, NULL) || vectorizable_reduction (stmt, NULL, NULL, NULL) @@ -42765,7 +42095,7 @@ } if (!ok) -@@ -4777,27 +5373,6 @@ +@@ -4825,27 +5393,6 @@ return false; } @@ -42793,7 +42123,7 @@ return true; } -@@ -4814,7 +5389,6 @@ +@@ -4862,7 +5409,6 @@ bool is_store = false; gimple vec_stmt = NULL; stmt_vec_info stmt_info = vinfo_for_stmt (stmt); @@ -42801,7 +42131,7 @@ bool done; switch (STMT_VINFO_TYPE (stmt_info)) -@@ -4879,8 +5453,7 @@ +@@ -4927,8 +5473,7 @@ break; case condition_vec_info_type: @@ -42811,7 +42141,7 @@ gcc_assert (done); break; -@@ -4953,21 +5526,7 @@ +@@ -5001,21 +5546,7 @@ } if (vec_stmt) @@ -42834,7 +42164,7 @@ return is_store; } -@@ -5017,6 +5576,7 @@ +@@ -5065,6 +5596,7 @@ STMT_VINFO_VECTORIZABLE (res) = true; STMT_VINFO_IN_PATTERN_P (res) = false; STMT_VINFO_RELATED_STMT (res) = NULL; @@ -42842,7 +42172,7 @@ STMT_VINFO_DATA_REF (res) = NULL; STMT_VINFO_DR_BASE_ADDRESS (res) = NULL; -@@ -5354,8 +5914,12 @@ +@@ -5402,8 +5934,12 @@ || *dt == vect_nested_cycle) { stmt_vec_info stmt_info = vinfo_for_stmt (*def_stmt); @@ -42856,7 +42186,7 @@ *vectype = STMT_VINFO_VECTYPE (stmt_info); gcc_assert (*vectype != NULL_TREE); } -@@ -5404,7 +5968,7 @@ +@@ -5452,7 +5988,7 @@ { stmt_vec_info stmt_info = vinfo_for_stmt (stmt); loop_vec_info loop_info = STMT_VINFO_LOOP_VINFO (stmt_info); @@ -42865,7 +42195,7 @@ bool ordered_p; enum machine_mode vec_mode; enum insn_code icode1, icode2; -@@ -5413,6 +5977,9 @@ +@@ -5461,6 +5997,9 @@ tree wide_vectype = vectype_out; enum tree_code c1, c2; @@ -42875,7 +42205,7 @@ /* The result of a vectorized widening operation usually requires two vectors (because the widened results do not fit int one vector). The generated vector results would normally be expected to be generated in the same -@@ -5433,7 +6000,8 @@ +@@ -5481,7 +6020,8 @@ iterations in parallel). We therefore don't allow to change the order of the computation in the inner-loop during outer-loop vectorization. */ @@ -42885,7 +42215,7 @@ && !nested_in_vect_loop_p (vect_loop, stmt)) ordered_p = false; else -@@ -5470,6 +6038,19 @@ +@@ -5518,6 +6058,19 @@ } break; @@ -42905,259 +42235,6 @@ CASE_CONVERT: if (BYTES_BIG_ENDIAN) { ---- a/src/gcc/tree-vectorizer.h -+++ b/src/gcc/tree-vectorizer.h -@@ -73,15 +73,15 @@ - /************************************************************************ - SLP - ************************************************************************/ -+typedef void *slp_void_p; -+DEF_VEC_P (slp_void_p); -+DEF_VEC_ALLOC_P (slp_void_p, heap); - --/* A computation tree of an SLP instance. Each node corresponds to a group of -+/* A computation tree of an SLP instance. Each node corresponds to a group of - stmts to be packed in a SIMD stmt. */ - typedef struct _slp_tree { -- /* Only binary and unary operations are supported. LEFT child corresponds to -- the first operand and RIGHT child to the second if the operation is -- binary. */ -- struct _slp_tree *left; -- struct _slp_tree *right; -+ /* Nodes that contain def-stmts of this node statements operands. */ -+ VEC (slp_void_p, heap) *children; - /* A group of scalar stmts to be vectorized together. */ - VEC (gimple, heap) *stmts; - /* Vectorized stmt/s. */ -@@ -146,14 +146,32 @@ - #define SLP_INSTANCE_LOADS(S) (S)->loads - #define SLP_INSTANCE_FIRST_LOAD_STMT(S) (S)->first_load - --#define SLP_TREE_LEFT(S) (S)->left --#define SLP_TREE_RIGHT(S) (S)->right -+#define SLP_TREE_CHILDREN(S) (S)->children - #define SLP_TREE_SCALAR_STMTS(S) (S)->stmts - #define SLP_TREE_VEC_STMTS(S) (S)->vec_stmts - #define SLP_TREE_NUMBER_OF_VEC_STMTS(S) (S)->vec_stmts_size - #define SLP_TREE_OUTSIDE_OF_LOOP_COST(S) (S)->cost.outside_of_loop - #define SLP_TREE_INSIDE_OF_LOOP_COST(S) (S)->cost.inside_of_loop - -+/* This structure is used in creation of an SLP tree. Each instance -+ corresponds to the same operand in a group of scalar stmts in an SLP -+ node. */ -+typedef struct _slp_oprnd_info -+{ -+ /* Def-stmts for the operands. */ -+ VEC (gimple, heap) *def_stmts; -+ /* Information about the first statement, its vector def-type, type, the -+ operand itself in case it's constant, and an indication if it's a pattern -+ stmt. */ -+ enum vect_def_type first_dt; -+ tree first_def_type; -+ tree first_const_oprnd; -+ bool first_pattern; -+} *slp_oprnd_info; -+ -+DEF_VEC_P(slp_oprnd_info); -+DEF_VEC_ALLOC_P(slp_oprnd_info, heap); -+ - - typedef struct _vect_peel_info - { -@@ -464,6 +482,9 @@ - pattern). */ - gimple related_stmt; - -+ /* Used to keep a def stmt of a pattern stmt if such exists. */ -+ gimple pattern_def_stmt; -+ - /* List of datarefs that are known to have the same alignment as the dataref - of this stmt. */ - VEC(dr_p,heap) *same_align_refs; -@@ -531,6 +552,7 @@ - - #define STMT_VINFO_IN_PATTERN_P(S) (S)->in_pattern_p - #define STMT_VINFO_RELATED_STMT(S) (S)->related_stmt -+#define STMT_VINFO_PATTERN_DEF_STMT(S) (S)->pattern_def_stmt - #define STMT_VINFO_SAME_ALIGN_REFS(S) (S)->same_align_refs - #define STMT_VINFO_DEF_TYPE(S) (S)->def_type - #define STMT_VINFO_DR_GROUP_FIRST_DR(S) (S)->first_dr -@@ -794,9 +816,9 @@ - extern tree vectorizable_function (gimple, tree, tree); - extern void vect_model_simple_cost (stmt_vec_info, int, enum vect_def_type *, - slp_tree); --extern void vect_model_store_cost (stmt_vec_info, int, enum vect_def_type, -- slp_tree); --extern void vect_model_load_cost (stmt_vec_info, int, slp_tree); -+extern void vect_model_store_cost (stmt_vec_info, int, bool, -+ enum vect_def_type, slp_tree); -+extern void vect_model_load_cost (stmt_vec_info, int, bool, slp_tree); - extern void vect_finish_stmt_generation (gimple, gimple, - gimple_stmt_iterator *); - extern bool vect_mark_stmts_to_be_vectorized (loop_vec_info); -@@ -810,10 +832,13 @@ - extern void vect_remove_stores (gimple); - extern bool vect_analyze_stmt (gimple, bool *, slp_tree); - extern bool vectorizable_condition (gimple, gimple_stmt_iterator *, gimple *, -- tree, int); -+ tree, int, slp_tree); - extern void vect_get_load_cost (struct data_reference *, int, bool, - unsigned int *, unsigned int *); - extern void vect_get_store_cost (struct data_reference *, int, unsigned int *); -+extern bool vect_supportable_shift (enum tree_code, tree); -+extern void vect_get_vec_defs (tree, tree, gimple, VEC (tree, heap) **, -+ VEC (tree, heap) **, slp_tree, int); - - /* In tree-vect-data-refs.c. */ - extern bool vect_can_force_dr_alignment_p (const_tree, unsigned int); -@@ -829,21 +854,22 @@ - extern bool vect_analyze_data_ref_accesses (loop_vec_info, bb_vec_info); - extern bool vect_prune_runtime_alias_test_list (loop_vec_info); - extern bool vect_analyze_data_refs (loop_vec_info, bb_vec_info, int *); --extern tree vect_create_data_ref_ptr (gimple, struct loop *, tree, tree *, -- gimple *, bool, bool *); -+extern tree vect_create_data_ref_ptr (gimple, tree, struct loop *, tree, -+ tree *, gimple *, bool, bool *); - extern tree bump_vector_ptr (tree, gimple, gimple_stmt_iterator *, gimple, tree); - extern tree vect_create_destination_var (tree, tree); --extern bool vect_strided_store_supported (tree); --extern bool vect_strided_load_supported (tree); --extern bool vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, -+extern bool vect_strided_store_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_store_lanes_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_strided_load_supported (tree, unsigned HOST_WIDE_INT); -+extern bool vect_load_lanes_supported (tree, unsigned HOST_WIDE_INT); -+extern void vect_permute_store_chain (VEC(tree,heap) *,unsigned int, gimple, - gimple_stmt_iterator *, VEC(tree,heap) **); - extern tree vect_setup_realignment (gimple, gimple_stmt_iterator *, tree *, - enum dr_alignment_support, tree, - struct loop **); --extern bool vect_permute_load_chain (VEC(tree,heap) *,unsigned int, gimple, -- gimple_stmt_iterator *, VEC(tree,heap) **); --extern bool vect_transform_strided_load (gimple, VEC(tree,heap) *, int, -+extern void vect_transform_strided_load (gimple, VEC(tree,heap) *, int, - gimple_stmt_iterator *); -+extern void vect_record_strided_load_vectors (gimple, VEC(tree,heap) *); - extern int vect_get_place_in_interleaving_chain (gimple, gimple); - extern tree vect_get_new_vect_var (tree, enum vect_var_kind, const char *); - extern tree vect_create_addr_base_for_vector_ref (gimple, gimple_seq *, -@@ -879,8 +905,9 @@ - extern bool vect_analyze_slp (loop_vec_info, bb_vec_info); - extern void vect_make_slp_decision (loop_vec_info); - extern void vect_detect_hybrid_slp (loop_vec_info); --extern void vect_get_slp_defs (tree, tree, slp_tree, VEC (tree,heap) **, -- VEC (tree,heap) **, int); -+extern void vect_get_slp_defs (VEC (tree, heap) *, slp_tree, -+ VEC (slp_void_p, heap) **, int); -+ - extern LOC find_bb_location (basic_block); - extern bb_vec_info vect_slp_analyze_bb (basic_block); - extern void vect_slp_transform_bb (basic_block); -@@ -889,9 +916,9 @@ - /* Pattern recognition functions. - Additional pattern recognition functions can (and will) be added - in the future. */ --typedef gimple (* vect_recog_func_ptr) (gimple, tree *, tree *); --#define NUM_PATTERNS 4 --void vect_pattern_recog (loop_vec_info); -+typedef gimple (* vect_recog_func_ptr) (VEC (gimple, heap) **, tree *, tree *); -+#define NUM_PATTERNS 7 -+void vect_pattern_recog (loop_vec_info, bb_vec_info); - - /* In tree-vectorizer.c. */ - unsigned vectorize_loops (void); ---- a/src/gcc/tree.c -+++ b/src/gcc/tree.c -@@ -7321,6 +7321,15 @@ - return build_array_type_1 (elt_type, index_type, false); - } - -+/* Return a representation of ELT_TYPE[NELTS], using indices of type -+ sizetype. */ -+ -+tree -+build_array_type_nelts (tree elt_type, unsigned HOST_WIDE_INT nelts) -+{ -+ return build_array_type (elt_type, build_index_type (size_int (nelts - 1))); -+} -+ - /* Recursively examines the array elements of TYPE, until a non-array - element type is found. */ - ---- a/src/gcc/tree.def -+++ b/src/gcc/tree.def -@@ -1092,6 +1092,19 @@ - is subtracted from t3. */ - DEFTREECODE (WIDEN_MULT_MINUS_EXPR, "widen_mult_minus_expr", tcc_expression, 3) - -+/* Widening shift left. -+ The first operand is of type t1. -+ The second operand is the number of bits to shift by; it need not be the -+ same type as the first operand and result. -+ Note that the result is undefined if the second operand is larger -+ than or equal to the first operand's type size. -+ The type of the entire expression is t2, such that t2 is at least twice -+ the size of t1. -+ WIDEN_LSHIFT_EXPR is equivalent to first widening (promoting) -+ the first argument from type t1 to type t2, and then shifting it -+ by the second argument. */ -+DEFTREECODE (WIDEN_LSHIFT_EXPR, "widen_lshift_expr", tcc_binary, 2) -+ - /* Fused multiply-add. - All operands and the result are of the same type. No intermediate - rounding is performed after multiplying operand one with operand two -@@ -1147,6 +1160,16 @@ - DEFTREECODE (VEC_INTERLEAVE_HIGH_EXPR, "vec_interleavehigh_expr", tcc_binary, 2) - DEFTREECODE (VEC_INTERLEAVE_LOW_EXPR, "vec_interleavelow_expr", tcc_binary, 2) - -+/* Widening vector shift left in bits. -+ Operand 0 is a vector to be shifted with N elements of size S. -+ Operand 1 is an integer shift amount in bits. -+ The result of the operation is N elements of size 2*S. -+ VEC_WIDEN_LSHIFT_HI_EXPR computes the N/2 high results. -+ VEC_WIDEN_LSHIFT_LO_EXPR computes the N/2 low results. -+ */ -+DEFTREECODE (VEC_WIDEN_LSHIFT_HI_EXPR, "widen_lshift_hi_expr", tcc_binary, 2) -+DEFTREECODE (VEC_WIDEN_LSHIFT_LO_EXPR, "widen_lshift_lo_expr", tcc_binary, 2) -+ - /* PREDICT_EXPR. Specify hint for branch prediction. The - PREDICT_EXPR_PREDICTOR specify predictor and PREDICT_EXPR_OUTCOME the - outcome (0 for not taken and 1 for taken). Once the profile is guessed ---- a/src/gcc/tree.h -+++ b/src/gcc/tree.h -@@ -4197,6 +4197,7 @@ - extern tree build_index_type (tree); - extern tree build_array_type (tree, tree); - extern tree build_nonshared_array_type (tree, tree); -+extern tree build_array_type_nelts (tree, unsigned HOST_WIDE_INT); - extern tree build_function_type (tree, tree); - extern tree build_function_type_list (tree, ...); - extern tree build_function_type_skip_args (tree, bitmap); -@@ -4626,21 +4627,10 @@ - - extern VEC(tree,gc) *ctor_to_vec (tree); - --/* Examine CTOR to discover: -- * how many scalar fields are set to nonzero values, -- and place it in *P_NZ_ELTS; -- * how many scalar fields in total are in CTOR, -- and place it in *P_ELT_COUNT. -- * if a type is a union, and the initializer from the constructor -- is not the largest element in the union, then set *p_must_clear. -+extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, -+ HOST_WIDE_INT *, bool *); - -- Return whether or not CTOR is a valid static constant initializer, the same -- as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ -- --extern bool categorize_ctor_elements (const_tree, HOST_WIDE_INT *, HOST_WIDE_INT *, -- bool *); -- --extern HOST_WIDE_INT count_type_elements (const_tree, bool); -+extern bool complete_ctor_at_level_p (const_tree, HOST_WIDE_INT, const_tree); - - /* integer_zerop (tree x) is nonzero if X is an integer constant of value 0. */ - --- a/src/gcc/value-prof.c +++ b/src/gcc/value-prof.c @@ -1252,6 +1252,9 @@ @@ -43178,282 +42255,6 @@ || gimple_call_fndecl (stmt) != NULL_TREE) return; ---- a/src/gcc/varasm.c -+++ b/src/gcc/varasm.c -@@ -30,6 +30,7 @@ - #include "config.h" - #include "system.h" - #include "coretypes.h" -+#include "pointer-set.h" - #include "tm.h" - #include "rtl.h" - #include "tree.h" -@@ -2097,6 +2098,14 @@ - it all the way to final. See PR 17982 for further discussion. */ - static GTY(()) tree pending_assemble_externals; - -+/* FIXME: Trunk is at GCC 4.8 now and the above problem still hasn't been -+ addressed properly. This caused PR 52640 due to O(external_decls**2) -+ lookups in the pending_assemble_externals TREE_LIST in assemble_external. -+ Paper over with this pointer set, which we use to see if we have already -+ added a decl to pending_assemble_externals without first traversing -+ the entire pending_assemble_externals list. See assemble_external(). */ -+static struct pointer_set_t *pending_assemble_externals_set; -+ - #ifdef ASM_OUTPUT_EXTERNAL - /* True if DECL is a function decl for which no out-of-line copy exists. - It is assumed that DECL's assembler name has been set. */ -@@ -2146,6 +2155,7 @@ - assemble_external_real (TREE_VALUE (list)); - - pending_assemble_externals = 0; -+ pointer_set_destroy (pending_assemble_externals_set); - #endif - } - -@@ -2186,7 +2196,7 @@ - weak_decls = tree_cons (NULL, decl, weak_decls); - - #ifdef ASM_OUTPUT_EXTERNAL -- if (value_member (decl, pending_assemble_externals) == NULL_TREE) -+ if (! pointer_set_insert (pending_assemble_externals_set, decl)) - pending_assemble_externals = tree_cons (NULL, decl, - pending_assemble_externals); - #endif -@@ -6019,6 +6029,10 @@ - - if (readonly_data_section == NULL) - readonly_data_section = text_section; -+ -+#ifdef ASM_OUTPUT_EXTERNAL -+ pending_assemble_externals_set = pointer_set_create (); -+#endif - } - - enum tls_model ---- a/src/libffi/ChangeLog -+++ b/src/libffi/ChangeLog -@@ -1,3 +1,17 @@ -+2012-03-22 David Edelsohn -+ -+ Backport from mainline: -+ 2012-03-09 David Edelsohn -+ -+ * src/powerpc/aix_closure.S (ffi_closure_ASM): Adjust for Darwin64 -+ change to return value of ffi_closure_helper_DARWIN and load type -+ from return type. -+ -+ From Tom Honermann : -+ * src/powerpc/aix.S: Declare .ffi_prep_args. Insert nops after -+ branch instructions. -+ * src/powerpc/aix_closure.S: Declare .ffi_closure_helper_DARWIN. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/libffi/src/powerpc/aix.S -+++ b/src/libffi/src/powerpc/aix.S -@@ -1,5 +1,5 @@ - /* ----------------------------------------------------------------------- -- aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc. -+ aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc. - based on darwin.S by John Hornkvist - - PowerPC Assembly glue. -@@ -79,6 +79,8 @@ - .set f20,20 - .set f21,21 - -+ .extern .ffi_prep_args -+ - #define LIBFFI_ASM - #include - #include -@@ -125,6 +127,7 @@ - /* Call ffi_prep_args. */ - mr r4, r1 - bl .ffi_prep_args -+ nop - - /* Now do the call. */ - ld r0, 0(r29) -@@ -226,6 +229,7 @@ - /* Call ffi_prep_args. */ - mr r4, r1 - bl .ffi_prep_args -+ nop - - /* Now do the call. */ - lwz r0, 0(r29) ---- a/src/libffi/src/powerpc/aix_closure.S -+++ b/src/libffi/src/powerpc/aix_closure.S -@@ -79,6 +79,8 @@ - .set f20,20 - .set f21,21 - -+ .extern .ffi_closure_helper_DARWIN -+ - #define LIBFFI_ASM - #define JUMPTARGET(name) name - #define L(x) x -@@ -165,6 +167,7 @@ - - /* look up the proper starting point in table */ - /* by using return type as offset */ -+ lhz r3, 10(r3) /* load type from return type */ - ld r4, LC..60(2) /* get address of jump table */ - sldi r3, r3, 4 /* now multiply return type by 16 */ - ld r0, 240+16(r1) /* load return address */ -@@ -337,8 +340,9 @@ - - /* look up the proper starting point in table */ - /* by using return type as offset */ -+ lhz r3, 6(r3) /* load type from return type */ - lwz r4, LC..60(2) /* get address of jump table */ -- slwi r3, r3, 4 /* now multiply return type by 4 */ -+ slwi r3, r3, 4 /* now multiply return type by 16 */ - lwz r0, 176+8(r1) /* load return address */ - add r3, r3, r4 /* add contents of table to table address */ - mtctr r3 ---- a/src/libjava/ChangeLog -+++ b/src/libjava/ChangeLog -@@ -1,3 +1,13 @@ -+2012-03-02 Jack Howarth -+ -+ Backport from mainline -+ 2012-02-23 Patrick Marlier -+ Jack Howarth -+ -+ PR target/49461 -+ * configure.ac (SYSTEMSPEC): No longer pass -no_pie for darwin11. -+ * configure: Regenerate. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/libjava/configure -+++ b/src/libjava/configure -@@ -19775,14 +19775,9 @@ - SYSTEMSPEC="-lunicows $SYSTEMSPEC" - fi - ;; -- *-*-darwin9*) -+ *-*-darwin[912]*) - SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" - ;; -- *-*-darwin[12]*) -- # Something is incompatible with pie, would be nice to fix it and -- # remove -no_pie. PR49461 -- SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" -- ;; - *) - SYSTEMSPEC= - ;; ---- a/src/libjava/configure.ac -+++ b/src/libjava/configure.ac -@@ -886,14 +886,9 @@ - SYSTEMSPEC="-lunicows $SYSTEMSPEC" - fi - ;; -- *-*-darwin9*) -+ *-*-darwin[[912]]*) - SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" - ;; -- *-*-darwin[[12]]*) -- # Something is incompatible with pie, would be nice to fix it and -- # remove -no_pie. PR49461 -- SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" -- ;; - *) - SYSTEMSPEC= - ;; ---- a/src/libstdc++-v3/ChangeLog -+++ b/src/libstdc++-v3/ChangeLog -@@ -1,3 +1,10 @@ -+2012-03-08 Jonathan Wakely -+ -+ PR libstdc++/52433 -+ * include/debug/safe_iterator.h (_Safe_iterator): Add move -+ constructor and move assignment operator. -+ * testsuite/23_containers/vector/debug/52433.cc: New. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. ---- a/src/libstdc++-v3/include/debug/safe_iterator.h -+++ b/src/libstdc++-v3/include/debug/safe_iterator.h -@@ -1,6 +1,6 @@ - // Safe iterator implementation -*- C++ -*- - --// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011 -+// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011, 2012 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -142,6 +142,24 @@ - ._M_iterator(__x, "other")); - } - -+#ifdef __GXX_EXPERIMENTAL_CXX0X__ -+ /** -+ * @brief Move construction. -+ * @post __x is singular and unattached -+ */ -+ _Safe_iterator(_Safe_iterator&& __x) : _M_current() -+ { -+ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular() -+ || __x._M_current == _Iterator(), -+ _M_message(__msg_init_copy_singular) -+ ._M_iterator(*this, "this") -+ ._M_iterator(__x, "other")); -+ std::swap(_M_current, __x._M_current); -+ this->_M_attach(__x._M_sequence); -+ __x._M_detach(); -+ } -+#endif -+ - /** - * @brief Converting constructor from a mutable iterator to a - * constant iterator. -@@ -181,6 +199,27 @@ - return *this; - } - -+#ifdef __GXX_EXPERIMENTAL_CXX0X__ -+ /** -+ * @brief Move assignment. -+ * @post __x is singular and unattached -+ */ -+ _Safe_iterator& -+ operator=(_Safe_iterator&& __x) -+ { -+ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular() -+ || __x._M_current == _Iterator(), -+ _M_message(__msg_copy_singular) -+ ._M_iterator(*this, "this") -+ ._M_iterator(__x, "other")); -+ _M_current = __x._M_current; -+ _M_attach(__x._M_sequence); -+ __x._M_detach(); -+ __x._M_current = _Iterator(); -+ return *this; -+ } -+#endif -+ - /** - * @brief Iterator dereference. - * @pre iterator is dereferenceable -@@ -415,7 +454,9 @@ - /// Is this iterator equal to the sequence's before_begin() iterator if - /// any? - bool _M_is_before_begin() const -- { return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence()); } -+ { -+ return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence()); -+ } - }; - - template --- a/src/libstdc++-v3/libsupc++/eh_arm.cc +++ b/src/libstdc++-v3/libsupc++/eh_arm.cc @@ -30,10 +30,11 @@ @@ -43550,49 +42351,3 @@ } return ctm_failed; ---- a/src/libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc -+++ b/src/libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc -@@ -0,0 +1,43 @@ -+// Copyright (C) 2012 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// . -+// -+// { dg-require-debug-mode "" } -+// { dg-options "-std=gnu++0x" } -+// { dg-do compile } -+ -+// PR libstdc++/52433 -+ -+#include -+ -+struct X -+{ -+ std::vector::iterator i; -+ -+ X() = default; -+ X(const X&) = default; -+ X(X&&) = default; -+ X& operator=(const X&) = default; -+ X& operator=(X&&) = default; -+}; -+ -+X test01() -+{ -+ X x; -+ x = X(); -+ return x; -+} -+ diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-multiarch-doc.diff gcc-4.6-4.6.4/debian/patches/gcc-multiarch-doc.diff --- gcc-4.6-4.6.3/debian/patches/gcc-multiarch-doc.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-multiarch-doc.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,8 +1,101 @@ -# DP: Document -print-multiarch option +# DP: Document multiarch changes ---- a/src/gcc/doc/invoke.texi -+++ b/src/gcc/doc/invoke.texi -@@ -5937,6 +5937,11 @@ +--- a/src/gcc/doc/install.texi (Revision 193696) ++++ b/src/gcc/doc/install.texi (Arbeitskopie) +@@ -1005,6 +1005,14 @@ + workable alternative. This requires gas and gdb, as the normal SVR4 + tools can not generate or interpret stabs. + ++@item --enable-multiarch ++Specify whether to enable or disable multiarch support. The default is ++to check for glibc start files in a multiarch location, and enable it ++if the files are found. The auto detection is enabled for native builds, ++and for cross builds configured with @option{--with-sysroot}. ++More documentation about multiarch can be found at ++@uref{http://wiki.debian.org/Multiarch}. ++ + @item --disable-multilib + Specify that multiple target + libraries to support different target variants, calling +--- a/src/gcc/doc/fragments.texi (Revision 193696) ++++ b/src/gcc/doc/fragments.texi (Arbeitskopie) +@@ -115,6 +115,12 @@ + default value will be @code{MULTILIB_OPTIONS}, with all slashes treated + as spaces. + ++@code{MULTILIB_DIRNAMES} describes the multilib directories using GCC ++conventions and is applied to directories that are part of the GCC ++installation. When multilib-enabled, the compiler will add a ++subdirectory of the form @var{prefix}/@var{multilib} before each ++directory in the search path for libraries and crt files. ++ + For example, if @code{MULTILIB_OPTIONS} is set to @samp{m68000/m68020 + msoft-float}, then the default value of @code{MULTILIB_DIRNAMES} is + @samp{m68000 m68020 msoft-float}. You may specify a different value if +@@ -157,6 +163,60 @@ + you must set this to the directory containing the headers. This value + should match the value of the @code{SYSTEM_INCLUDE_DIR} macro. + ++@findex MULTILIB_OSDIRNAMES ++@item MULTILIB_OSDIRNAMES ++If @code{MULTILIB_OPTIONS} is used, this variable specifies ++a list of subdirectory names, that are used to modify the search ++path depending on the chosen multilib. Unlike @code{MULTILIB_DIRNAMES}, ++@code{MULTILIB_OSDIRNAMES} describes the multilib directories using ++operating systems conventions, and is applied to the directories such as ++@code{lib} or those in the @env{LIBRARY_PATH} environment variable. ++The format is either the same as of ++@code{MULTILIB_DIRNAMES}, or a set of mappings. When it is the same ++as @code{MULTILIB_DIRNAMES}, it describes the multilib directories ++using operating system conventions, rather than GCC conventions. When it is a set ++of mappings of the form @var{gccdir}=@var{osdir}, the left side gives ++the GCC convention and the right gives the equivalent OS defined ++location. If the @var{osdir} part begins with a @samp{!}, ++GCC will not search in the non-multilib directory and use ++exclusively the multilib directory. Otherwise, the compiler will ++examine the search path for libraries and crt files twice; the first ++time it will add @var{multilib} to each directory in the search path, ++the second it will not. ++ ++For configurations that support both multilib and multiarch, ++@code{MULTILIB_OSDIRNAMES} also encodes the multiarch name, thus ++subsuming @code{MULTIARCH_DIRNAME}. The multiarch name is appended to ++each directory name, separated by a colon (e.g. ++@samp{../lib32:i386-linux-gnu}). ++ ++Each multiarch subdirectory will be searched before the corresponding OS ++multilib directory, for example @samp{/lib/i386-linux-gnu} before ++@samp{/lib/../lib32}. The multiarch name will also be used to modify the ++system header search path, as explained for @code{MULTIARCH_DIRNAME}. ++ ++@findex MULTIARCH_DIRNAME ++@item MULTIARCH_DIRNAME ++This variable specifies the multiarch name for configurations that are ++multiarch-enabled but not multilibbed configurations. ++ ++The multiarch name is used to augment the search path for libraries, crt ++files and system header files with additional locations. The compiler ++will add a multiarch subdirectory of the form ++@var{prefix}/@var{multiarch} before each directory in the library and ++crt search path. It will also add two directories ++@code{LOCAL_INCLUDE_DIR}/@var{multiarch} and ++@code{NATIVE_SYSTEM_HEADER_DIR}/@var{multiarch}) to the system header ++search path, respectively before @code{LOCAL_INCLUDE_DIR} and ++@code{NATIVE_SYSTEM_HEADER_DIR}. ++ ++@code{MULTIARCH_DIRNAME} is not used for configurations that support ++both multilib and multiarch. In that case, multiarch names are encoded ++in @code{MULTILIB_OSDIRNAMES} instead. ++ ++More documentation about multiarch can be found at ++@uref{http://wiki.debian.org/Multiarch}. ++ + @findex SPECS + @item SPECS + Unfortunately, setting @code{MULTILIB_EXTRA_OPTS} is not enough, since +--- a/src/gcc/doc/invoke.texi (Revision 193696) ++++ b/src/gcc/doc/invoke.texi (Arbeitskopie) +@@ -5787,6 +5787,11 @@ @file{../lib32}, or if OS libraries are present in @file{lib/@var{subdir}} subdirectories it prints e.g.@: @file{amd64}, @file{sparcv9} or @file{ev6}. diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-multiarch.diff gcc-4.6-4.6.4/debian/patches/gcc-multiarch.diff --- gcc-4.6-4.6.3/debian/patches/gcc-multiarch.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-multiarch.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,563 +1,5 @@ -# DP: Add multiarch support to GCC. -# DP: -# DP: Convert the multilib option to a target triplet, -# DP: add multiarch include directories and libraries path: -# DP: /usr/local/include/-linux-gnu -# DP: /usr/include/-linux-gnu -# DP: /usr/lib/-linux-gnu -# DP: to the system paths. +# DP: Add multiarch support to GCC (chunks not yet applied upstream). -2011-08-18 Matthias Klose - - * doc/invoke.texi: Document -print-multiarch. - * Makefile.in (s-mlib): Pass MULTIARCH_DIRNAME to genmultilib. - * genmultilib: Add new option for the multiarch name. - * gcc.c (multiarch_dir): Define. - (for_each_path): Search for multiarch suffixes. - (driver_handle_option): Handle multiarch option. - (do_spec_1): Pass -imultiarch if defined. - (main): Print multiarch. - (set_multilib_dir): Separate multilib and multiarch names - from multilib_select. - (print_multilib_info): Ignore multiarch names in multilib_select. - * incpath.c (add_standard_paths): Search the multiarch include dirs. - * cppdeault.h (default_include): Document multiarch in multilib - member. - * cppdefault.c: [LOCAL_INCLUDE_DIR, STANDARD_INCLUDE_DIR] Add an - include directory for multiarch directories. - * common.opt: New options --print-multiarch and -imultilib. - * config/s390/t-linux64: Add multiarch names in MULTILIB_OSDIRNAMES. - * config/sparc/t-linux64: Likewise. - * config/powerpc/t-linux64: Likewise. - * config/i386/t-linux64: Likewise. - * config/mips/t-linux64: Likewise. - * config/alpha/t-linux: Define MULTIARCH_DIRNAME. - * config/arm/t-linux: Likewise. - * config/i386/t-linux: Likewise. - * config/pa/t-linux: Likewise. - * config/sparc/t-linux: Likewise. - * config/ia64/t-glibc: Define MULTIARCH_DIRNAME for linux target. - - ---- a/src/gcc/incpath.c -+++ b/src/gcc/incpath.c -@@ -150,8 +150,14 @@ - if (!strncmp (p->fname, cpp_GCC_INCLUDE_DIR, len)) - { - char *str = concat (iprefix, p->fname + len, NULL); -- if (p->multilib && imultilib) -+ if (p->multilib == 1 && imultilib) - str = concat (str, dir_separator_str, imultilib, NULL); -+ else if (p->multilib == 2) -+ { -+ if (!imultiarch) -+ continue; -+ str = concat (str, dir_separator_str, imultiarch, NULL); -+ } - add_path (str, SYSTEM, p->cxx_aware, false); - } - } -@@ -195,8 +201,14 @@ - else - str = update_path (p->fname, p->component); - -- if (p->multilib && imultilib) -+ if (p->multilib == 1 && imultilib) - str = concat (str, dir_separator_str, imultilib, NULL); -+ else if (p->multilib == 2) -+ { -+ if (!imultiarch) -+ continue; -+ str = concat (str, dir_separator_str, imultiarch, NULL); -+ } - - add_path (str, SYSTEM, p->cxx_aware, false); - } ---- a/src/gcc/gcc.c -+++ b/src/gcc/gcc.c -@@ -1136,6 +1136,11 @@ - set_multilib_dir based on the compilation options. */ - - static const char *multilib_os_dir; -+ -+/* Subdirectory to use for locating libraries in multiarch conventions. Set by -+ set_multilib_dir based on the compilation options. */ -+ -+static const char *multiarch_dir; - - /* Structure to keep track of the specs that have been defined so far. - These are accessed using %(specname) or %[specname] in a compiler -@@ -2049,6 +2054,7 @@ - struct prefix_list *pl; - const char *multi_dir = NULL; - const char *multi_os_dir = NULL; -+ const char *multiarch_suffix = NULL; - const char *multi_suffix; - const char *just_multi_suffix; - char *path = NULL; -@@ -2066,11 +2072,14 @@ - } - if (do_multi && multilib_os_dir && strcmp (multilib_os_dir, ".") != 0) - multi_os_dir = concat (multilib_os_dir, dir_separator_str, NULL); -+ if (multiarch_dir) -+ multiarch_suffix = concat (multiarch_dir, dir_separator_str, NULL); - - while (1) - { - size_t multi_dir_len = 0; - size_t multi_os_dir_len = 0; -+ size_t multiarch_len = 0; - size_t suffix_len; - size_t just_suffix_len; - size_t len; -@@ -2079,16 +2088,15 @@ - multi_dir_len = strlen (multi_dir); - if (multi_os_dir) - multi_os_dir_len = strlen (multi_os_dir); -+ if (multiarch_suffix) -+ multiarch_len = strlen (multiarch_suffix); - suffix_len = strlen (multi_suffix); - just_suffix_len = strlen (just_multi_suffix); - - if (path == NULL) - { - len = paths->max_len + extra_space + 1; -- if (suffix_len > multi_os_dir_len) -- len += suffix_len; -- else -- len += multi_os_dir_len; -+ len += MAX (MAX (suffix_len, multi_os_dir_len), multiarch_len); - path = XNEWVEC (char, len); - } - -@@ -2117,6 +2125,16 @@ - break; - } - -+ /* Now try the multiarch path. */ -+ if (!skip_multi_dir -+ && !pl->require_machine_suffix && multiarch_dir) -+ { -+ memcpy (path + len, multiarch_suffix, multiarch_len + 1); -+ ret = callback (path, callback_info); -+ if (ret) -+ break; -+ } -+ - /* Now try the base path. */ - if (!pl->require_machine_suffix - && !(pl->os_multilib ? skip_multi_os_dir : skip_multi_dir)) -@@ -2970,6 +2970,9 @@ - fputs (_(" -print-libgcc-file-name Display the name of the compiler's companion library\n"), stdout); - fputs (_(" -print-file-name= Display the full path to library \n"), stdout); - fputs (_(" -print-prog-name= Display the full path to compiler component \n"), stdout); -+ fputs (_("\ -+ -print-multiarch Display the target's normalized GNU triplet, used as\n\ -+ a component in the library path\n"), stdout); - fputs (_(" -print-multi-directory Display the root directory for versions of libgcc\n"), stdout); - fputs (_("\ - -print-multi-lib Display the mapping between command line options and\n\ -@@ -3218,6 +3236,7 @@ - case OPT_print_multi_directory: - case OPT_print_sysroot: - case OPT_print_multi_os_directory: -+ case OPT_print_multiarch: - case OPT_print_sysroot_headers_suffix: - case OPT_time: - case OPT_wrapper: -@@ -4868,6 +4887,15 @@ - do_spec_1 (" ", 0, NULL); - } - -+ if (multiarch_dir) -+ { -+ do_spec_1 ("-imultiarch", 1, NULL); -+ /* Make this a separate argument. */ -+ do_spec_1 (" ", 0, NULL); -+ do_spec_1 (multiarch_dir, 1, NULL); -+ do_spec_1 (" ", 0, NULL); -+ } -+ - if (gcc_exec_prefix) - { - do_spec_1 ("-iprefix", 1, NULL); -@@ -6760,6 +6788,15 @@ - return (0); - } - -+ if (print_multiarch) -+ { -+ if (multiarch_dir == NULL) -+ printf ("\n"); -+ else -+ printf ("%s\n", multiarch_dir); -+ return (0); -+ } -+ - if (print_sysroot) - { - if (target_system_root) -@@ -7735,10 +7772,26 @@ - q++; - if (q < end) - { -- char *new_multilib_os_dir = XNEWVEC (char, end - q); -+ const char *q2 = q + 1; -+ char *new_multilib_os_dir; -+ -+ while (q2 < end && *q2 != ':') -+ q2++; -+ if (*q2 == ':') -+ end = q2; -+ new_multilib_os_dir = XNEWVEC (char, end - q); - memcpy (new_multilib_os_dir, q + 1, end - q - 1); - new_multilib_os_dir[end - q - 1] = '\0'; - multilib_os_dir = new_multilib_os_dir; -+ -+ end = this_path + this_path_len; -+ if (q2 < end && *q2 == ':') -+ { -+ char *new_multiarch_dir = XNEWVEC (char, end - q2); -+ memcpy (new_multiarch_dir, q2 + 1, end - q2 - 1); -+ new_multiarch_dir[end - q2 - 1] = '\0'; -+ multiarch_dir = new_multiarch_dir; -+ } - break; - } - } -@@ -7800,7 +7853,7 @@ - /* When --disable-multilib was used but target defines - MULTILIB_OSDIRNAMES, entries starting with .: are there just - to find multilib_os_dir, so skip them from output. */ -- if (this_path[0] == '.' && this_path[1] == ':') -+ if (this_path[0] == '.' && this_path[1] == ':' && this_path[2] != '.' && this_path[3] != ':') - skip = 1; - - /* Check for matches with the multilib_exclusions. We don't bother ---- a/src/gcc/genmultilib -+++ b/src/gcc/genmultilib -@@ -73,6 +73,8 @@ - # the os directory names are used exclusively. Use the mapping when - # there is no one-to-one equivalence between GCC levels and the OS. - -+# The optional eight argument is the multiarch name. -+ - # The last option should be "yes" if multilibs are enabled. If it is not - # "yes", all GCC multilib dir names will be ".". - -@@ -121,7 +123,8 @@ - extra=$5 - exclusions=$6 - osdirnames=$7 --enable_multilib=$8 -+multiarch=$8 -+enable_multilib=$9 - - echo "static const char *const multilib_raw[] = {" - -@@ -222,6 +225,9 @@ - # names. - toosdirnames= - defaultosdirname= -+if [ -n "${multiarch}" ]; then -+ defaultosdirname=:.:${multiarch} -+fi - if [ -n "${osdirnames}" ]; then - set x ${osdirnames} - shift -@@ -229,6 +235,9 @@ - case "$1" in - .=*) - defaultosdirname=`echo $1 | sed 's|^.=|:|'` -+ if [ -n "${multiarch}" ]; then -+ defaultosdirname=${defaultosdirname}:${multiarch} -+ fi - shift - ;; - *=*) -@@ -314,13 +323,13 @@ - dirout=`echo ${combo} | sed -e 's/=/-/g'` - fi - # Remove the leading and trailing slashes. -- dirout=`echo ${dirout} | sed -e 's|^/||' -e 's|/$||g'` -+ dirout=`echo ${dirout} | sed -e 's|^/||' -e 's|/*:/*|:|' -e 's|/$||g'` - - # Use the OS directory names rather than the option names. - if [ -n "${toosdirnames}" ]; then - osdirout=`echo ${combo} | sed ${toosdirnames}` - # Remove the leading and trailing slashes. -- osdirout=`echo ${osdirout} | sed -e 's|^/||' -e 's|/$||g'` -+ osdirout=`echo ${osdirout} | sed -e 's|^/||' -e 's|/*:/*|:|' -e 's|/$||g'` - if [ "x${enable_multilib}" != xyes ]; then - dirout=".:${osdirout}" - disable_multilib=yes ---- a/src/gcc/cppdefault.c -+++ b/src/gcc/cppdefault.c -@@ -64,6 +64,7 @@ - #endif - #ifdef LOCAL_INCLUDE_DIR - /* /usr/local/include comes before the fixincluded header files. */ -+ { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 2 }, - { LOCAL_INCLUDE_DIR, 0, 0, 1, 1, 0 }, - #endif - #ifdef PREFIX_INCLUDE_DIR -@@ -95,6 +96,7 @@ - #endif - #ifdef STANDARD_INCLUDE_DIR - /* /usr/include comes dead last. */ -+ { STANDARD_INCLUDE_DIR, STANDARD_INCLUDE_COMPONENT, 0, 0, 1, 2 }, - { STANDARD_INCLUDE_DIR, STANDARD_INCLUDE_COMPONENT, 0, 0, 1, 0 }, - #endif - { 0, 0, 0, 0, 0, 0 } ---- a/src/gcc/cppdefault.h -+++ b/src/gcc/cppdefault.h -@@ -43,9 +43,11 @@ - C++. */ - const char add_sysroot; /* FNAME should be prefixed by - cpp_SYSROOT. */ -- const char multilib; /* FNAME should have the multilib path -- specified with -imultilib -- appended. */ -+ const char multilib; /* FNAME should have appended -+ - the multilib path specified with -imultilib -+ when 1 is passed, -+ - the multiarch path specified with -+ -imultiarch, when 2 is passed. */ - }; - - extern const struct default_include cpp_include_defaults[]; ---- a/src/gcc/common.opt -+++ b/src/gcc/common.opt -@@ -334,6 +334,9 @@ - -print-multi-os-directory - Driver Alias(print-multi-os-directory) - -+-print-multiarch -+Driver Alias(print-multiarch) -+ - -print-prog-name - Driver Separate Alias(print-prog-name=) - -@@ -2190,6 +2193,10 @@ - Common Joined Var(plugindir_string) Init(0) - -iplugindir= Set to be the default plugin directory - -+imultiarch -+Common Joined Separate RejectDriver Var(imultiarch) Init(0) -+-imultiarch Set to be the multiarch include subdirectory -+ - l - Driver Joined Separate - -@@ -2247,6 +2254,9 @@ - - print-multi-os-directory - Driver Var(print_multi_os_directory) -+ -+print-multiarch -+Driver Var(print_multiarch) - - print-prog-name= - Driver JoinedOrMissing Var(print_prog_name) ---- a/src/gcc/Makefile.in -+++ b/src/gcc/Makefile.in -@@ -338,6 +338,8 @@ - - enable_plugin = @enable_plugin@ - -+with_float = @with_float@ -+ - CPPLIB = ../libcpp/libcpp.a - CPPINC = -I$(srcdir)/../libcpp/include - -@@ -1945,10 +1947,11 @@ - "$(MULTILIB_EXTRA_OPTS)" \ - "$(MULTILIB_EXCLUSIONS)" \ - "$(MULTILIB_OSDIRNAMES)" \ -+ "$(MULTIARCH_DIRNAME)" \ - "@enable_multilib@" \ - > tmp-mlib.h; \ - else \ -- $(SHELL) $(srcdir)/genmultilib '' '' '' '' '' '' '' no \ -+ $(SHELL) $(srcdir)/genmultilib '' '' '' '' '' '' '' "$(MULTIARCH_DIRNAME)" no \ - > tmp-mlib.h; \ - fi - $(SHELL) $(srcdir)/../move-if-change tmp-mlib.h multilib.h ---- a/src/gcc/config/alpha/t-linux -+++ b/src/gcc/config/alpha/t-linux -@@ -1 +1,3 @@ - SHLIB_MAPFILES += $(srcdir)/config/alpha/libgcc-alpha-ldbl.ver -+ -+MULTIARCH_DIRNAME = alpha-linux-gnu ---- a/src/gcc/config/s390/t-linux64 -+++ b/src/gcc/config/s390/t-linux64 -@@ -7,4 +7,4 @@ - - MULTILIB_OPTIONS = m64/m31 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu ---- a/src/gcc/config/sparc/t-linux64 -+++ b/src/gcc/config/sparc/t-linux64 -@@ -26,7 +26,7 @@ - - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu - - LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib ---- a/src/gcc/config/sparc/t-linux -+++ b/src/gcc/config/sparc/t-linux -@@ -3,3 +3,5 @@ - # Avoid the t-linux version file. - SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver \ - $(srcdir)/config/sparc/libgcc-sparc-glibc.ver -+ -+MULTIARCH_DIRNAME = sparc-linux-gnu ---- a/src/gcc/config/i386/t-linux -+++ b/src/gcc/config/i386/t-linux -@@ -3,3 +3,5 @@ - # t-slibgcc-elf-ver and t-linux - SHLIB_MAPFILES = $(srcdir)/libgcc-std.ver \ - $(srcdir)/config/i386/libgcc-glibc.ver -+ -+MULTIARCH_DIRNAME = i386-linux-gnu ---- a/src/gcc/config/i386/t-linux64 -+++ b/src/gcc/config/i386/t-linux64 -@@ -25,7 +25,11 @@ - - MULTILIB_OPTIONS = m64/m32 - MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) -+MULTILIB_OSDIRNAMES = ../lib64:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu -+ -+ifneq (,$(findstring kfreebsd, $(target))) -+ MULTILIB_OSDIRNAMES := $(subst linux,kfreebsd,$(MULTILIB_OSDIRNAMES)) -+endif - - LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib ---- a/src/gcc/config/ia64/t-glibc -+++ b/src/gcc/config/ia64/t-glibc -@@ -3,3 +3,7 @@ - $(srcdir)/unwind-compat.c - - SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-glibc.ver -+ -+ifneq (,$(findstring linux, $(target))) -+MULTIARCH_DIRNAME = ia64-linux-gnu -+endif ---- a/src/gcc/config/m68k/t-linux -+++ b/src/gcc/config/m68k/t-linux -@@ -21,6 +21,9 @@ - # Only include multilibs for 680x0 CPUs with an MMU. - M68K_MLIB_CPU += && (CPU ~ "^m680") && (FLAGS ~ "FL_MMU") - -+MULTILIB_OSDIRNAMES = m68k-linux-gnu:m68k-linux-gnu -+MULTIARCH_DIRNAME = m68k-linux-gnu -+ - # This rule uses MULTILIB_MATCHES to generate a definition of - # SYSROOT_SUFFIX_SPEC. - sysroot-suffix.h: $(srcdir)/config/m68k/print-sysroot-suffix.sh ---- a/src/gcc/config/rs6000/t-linux64 -+++ b/src/gcc/config/rs6000/t-linux64 -@@ -36,7 +36,7 @@ - MULTILIB_EXTRA_OPTS = fPIC mstrict-align - MULTILIB_EXCEPTIONS = m64/msoft-float - MULTILIB_EXCLUSIONS = m64/!m32/msoft-float --MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib) nof -+MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu nof - MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) - - softfp_wrap_start := '\#ifndef __powerpc64__' ---- a/src/gcc/config/pa/t-linux -+++ b/src/gcc/config/pa/t-linux -@@ -35,3 +35,5 @@ - - # Compile crtbeginS.o and crtendS.o as PIC. - CRTSTUFF_T_CFLAGS_S = -fPIC -+ -+MULTIARCH_DIRNAME = hppa-linux-gnu ---- a/src/gcc/config/mips/t-linux64 -+++ b/src/gcc/config/mips/t-linux64 -@@ -18,7 +18,11 @@ - - MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64 - MULTILIB_DIRNAMES = n32 32 64 --MULTILIB_OSDIRNAMES = ../lib32 ../lib ../lib64 -+MIPS_EL = $(if $(filter %el, $(firstword $(subst -, ,$(target)))),el) -+MULTILIB_OSDIRNAMES = \ -+ ../lib32:mips64$(MIPS_EL)-linux-gnuabin32 \ -+ ../lib:mips$(MIPS_EL)-linux-gnu \ -+ ../lib64:mips64$(MIPS_EL)-linux-gnuabi64 - - EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o - ---- a/src/gcc/config.gcc -+++ b/src/gcc/config.gcc -@@ -2180,6 +2180,7 @@ - ;; - *) - tm_file="${tm_file} rs6000/linux.h glibc-stdint.h" -+ tmake_file="$tmake_file rs6000/t-linux" - ;; - esac - tmake_file="${tmake_file} t-slibgcc-libgcc rs6000/t-fprules-softfp soft-fp/t-softfp" -@@ -2187,7 +2188,8 @@ - powerpc*-*-linux*altivec*) - tm_file="${tm_file} rs6000/linuxaltivec.h" ;; - powerpc*-*-linux*spe*) -- tm_file="${tm_file} rs6000/linuxspe.h rs6000/e500.h" ;; -+ tm_file="${tm_file} rs6000/linuxspe.h rs6000/e500.h" -+ tmake_file="${tmake_file} rs6000/t-linux-spe" ;; - powerpc*-*-linux*paired*) - tm_file="${tm_file} rs6000/750cl.h" ;; - esac -@@ -2311,6 +2313,8 @@ - tm_file="s390/s390.h dbxelf.h elfos.h gnu-user.h linux.h glibc-stdint.h s390/linux.h" - if test x$enable_targets = xall; then - tmake_file="${tmake_file} s390/t-linux64" -+ else -+ tmake_file="${tmake_file} s390/t-linux" - fi - ;; - s390x-*-linux*) -@@ -3674,6 +3678,14 @@ - i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu | \ - i[34567]86-*-gnu*) - tmake_file="${tmake_file} i386/t-fprules-softfp soft-fp/t-softfp i386/t-linux" -+ case ${target} in -+ i[34567]86-*-linux* | x86_64-*-linux*) -+ ;; -+ i[34567]86-*-kfreebsd*-gnu | x86_64-*-kfreebsd*-gnu) -+ tmake_file="${tmake_file} i386/t-kfreebsd";; -+ i[34567]86-*-gnu*) -+ tmake_file="${tmake_file} i386/t-gnu";; -+ esac - ;; - i[34567]86-*-solaris2*) - tmake_file="${tmake_file} i386/t-fprules-softfp soft-fp/t-softfp" ---- /dev/null -+++ b/src/gcc/config/i386/t-gnu -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = i386-gnu ---- /dev/null -+++ b/src/gcc/config/i386/t-kfreebsd -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = i386-kfreebsd-gnu ---- a/src/gcc/config/arm/t-linux-eabi -+++ b/src/gcc/config/arm/t-linux-eabi -@@ -42,6 +42,8 @@ - #MULTILIB_DIRNAMES += fa606te fa626te fmp626 fa726te - #MULTILIB_EXCEPTIONS += *mthumb/*mcpu=fa606te *mthumb/*mcpu=fa626te *mthumb/*mcpu=fmp626 *mthumb/*mcpu=fa726te* - -+MULTIARCH_DIRNAME = arm-linux-gnueabi$(if $(filter hard,$(with_float)),hf) -+ - # Use a version of div0 which raises SIGFPE, and a special __clear_cache. - LIB1ASMFUNCS := $(filter-out _dvmd_tls,$(LIB1ASMFUNCS)) _dvmd_lnx _clear_cache - --- a/src/gcc/config/sh/t-linux +++ b/src/gcc/config/sh/t-linux @@ -6,3 +6,5 @@ @@ -566,30 +8,10 @@ EXTRA_MULTILIB_PARTS= crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o + +MULTILIB_OSDIRNAMES = sh4-linux-gnu:sh4-linux-gnu sh4_nofpu-linux-gnu:sh4-linux-gnu ---- a/src/gcc/configure.ac -+++ b/src/gcc/configure.ac -@@ -606,6 +606,9 @@ - [], [enable_multilib=yes]) - AC_SUBST(enable_multilib) - -+# needed for ARM multiarch name -+AC_SUBST(with_float) -+ - # Enable __cxa_atexit for C++. - AC_ARG_ENABLE(__cxa_atexit, - [ --enable-__cxa_atexit enable __cxa_atexit for C++], ---- /dev/null -+++ b/src/gcc/config/rs6000/t-linux -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = powerpc-linux-gnu --- /dev/null +++ b/src/gcc/config/s390/t-linux @@ -0,0 +1 @@ +MULTIARCH_DIRNAME = s390-linux-gnu ---- /dev/null -+++ b/src/gcc/config/rs6000/t-linux-spe -@@ -0,0 +1 @@ -+MULTIARCH_DIRNAME = powerpc-linux-gnuspe --- a/src/libstdc++-v3/python/hook.in +++ b/src/libstdc++-v3/python/hook.in @@ -47,7 +47,10 @@ diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-multilib64-multiarch.diff gcc-4.6-4.6.4/debian/patches/gcc-multilib64-multiarch.diff --- gcc-4.6-4.6.3/debian/patches/gcc-multilib64-multiarch.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-multilib64-multiarch.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,44 +1,53 @@ # DP: Use lib instead of lib64 as the 64bit system dir on biarch # DP: architectures defaulting to 64bit. +Index: b/src/gcc/config/s390/t-linux64 +=================================================================== --- a/src/gcc/config/s390/t-linux64 +++ b/src/gcc/config/s390/t-linux64 -@@ -7,4 +7,4 @@ +@@ -7,5 +7,5 @@ MULTILIB_OPTIONS = m64/m31 MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:s390x-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):s390-linux-gnu +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:s390x-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:s390x-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:s390-linux-gnu) +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== --- a/src/gcc/config/rs6000/t-linux64 +++ b/src/gcc/config/rs6000/t-linux64 @@ -34,7 +34,7 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 MULTILIB_EXTRA_OPTS = fPIC mstrict-align --MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) + MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) - softfp_wrap_start := '\#ifndef __powerpc64__' - softfp_wrap_end := '\#endif' +Index: b/src/gcc/config/sparc/t-linux64 +=================================================================== --- a/src/gcc/config/sparc/t-linux64 +++ b/src/gcc/config/sparc/t-linux64 @@ -26,7 +26,7 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:sparc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):sparc-linux-gnu +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:sparc64-linux-gnu) ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:sparc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:sparc-linux-gnu) LIBGCC = stmp-multilib - INSTALL_LIBGCC = install-multilib +Index: b/src/gcc/config/i386/t-linux64 +=================================================================== --- a/src/gcc/config/i386/t-linux64 +++ b/src/gcc/config/i386/t-linux64 @@ -25,7 +25,7 @@ MULTILIB_OPTIONS = m64/m32 MULTILIB_DIRNAMES = 64 32 --MULTILIB_OSDIRNAMES = ../lib64:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu -+MULTILIB_OSDIRNAMES = ../lib:x86_64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):i386-linux-gnu +-MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:x86_64-linux-gnu) \ ++MULTILIB_OSDIRNAMES = ../lib$(call if_multiarch,:x86_64-linux-gnu) \ + $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:i386-linux-gnu) - ifneq (,$(findstring kfreebsd, $(target))) - MULTILIB_OSDIRNAMES := $(subst linux,kfreebsd,$(MULTILIB_OSDIRNAMES)) + LIBGCC = stmp-multilib diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-powerpc-nof.diff gcc-4.6-4.6.4/debian/patches/gcc-powerpc-nof.diff --- gcc-4.6-4.6.3/debian/patches/gcc-powerpc-nof.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-powerpc-nof.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,8 +1,10 @@ # DP: Don't build nof multlib on powerpc. +Index: b/src/gcc/config/rs6000/t-linux64 +=================================================================== --- a/src/gcc/config/rs6000/t-linux64 +++ b/src/gcc/config/rs6000/t-linux64 -@@ -31,13 +31,10 @@ +@@ -31,14 +31,11 @@ # it doesn't tell anything about the 32bit libraries on those systems. Set # MULTILIB_OSDIRNAMES according to what is found on the target. @@ -13,9 +15,9 @@ MULTILIB_EXTRA_OPTS = fPIC mstrict-align -MULTILIB_EXCEPTIONS = m64/msoft-float -MULTILIB_EXCLUSIONS = m64/!m32/msoft-float --MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu nof --MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) -+MULTILIB_OSDIRNAMES = ../lib64:powerpc64-linux-gnu $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib):powerpc-linux-gnu + MULTILIB_OSDIRNAMES = ../lib64$(call if_multiarch,:powerpc64-linux-gnu) + MULTILIB_OSDIRNAMES += $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)$(call if_multiarch,:powerpc-linux-gnu) +-MULTILIB_OSDIRNAMES += nof + MULTILIB_MATCHES = $(MULTILIB_MATCHES_FLOAT) softfp_wrap_start := '\#ifndef __powerpc64__' - softfp_wrap_end := '\#endif' diff -Nru gcc-4.6-4.6.3/debian/patches/gcc-speed-up-insn-attrtab.diff gcc-4.6-4.6.4/debian/patches/gcc-speed-up-insn-attrtab.diff --- gcc-4.6-4.6.3/debian/patches/gcc-speed-up-insn-attrtab.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc-speed-up-insn-attrtab.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,433 @@ +# DP: speed up genattrtab (3/3) + +[backport from gcc-4.8/trunk r187714 ] + +Date: Mon, 7 May 2012 15:11:16 +0200 (CEST) +From: Michael Matz +Subject: Speed up insn-attrtab.c compilation +List-Archive: + +Hi, + +neverending story. Maybe this time something gets in :) + +This patch changes generation of insn-attrtab.c to: +* order attributes topologically (so that the "inlining" genattrtab does + is as effective as possible, and doesn't hit the size limits too much) +* adjusts the rtx_cost for the attribute tests to correctly account for + all tests (even the cheap ones have an impact after all) +* lowers the limits for inlining +* only uses an "optimized" new value if it actually is cheaper than + the old value (and overall not too expensive) +* limits the number of predicates we remember from if/elseif/elseif + cascades to optimize further elseif tests (doesn't change code on x86, + but reduces generation time) + +The effect is that insn-attrtab.c on x86_64 is 2.9 MB instead of 6.0 MB, +and that compilation of insn-attrtab.c with an unoptimized (i.e. stage1) +cc1 is done in 45 seconds instead of 269 seconds. The genattrtab call +itself (unoptimized genattrtab) takes 9.5 seconds instead of 9.1. + +This was before Steven implemented the three file split, with that split +take the above as cumulative time, the overall speedup transfers to the +split version. + +Compilation time on x86_64-linux, with an unoptimized cc1(plus), with -g +-O2: + unpatched patched +big-code.c 157.1s 157.4s +kdecore.cc 304.3s 301.9s + +(i.e. noise). + +In particular this patch doesn't contain my controversial variant of +caching get_attr_xxx calls (which dynamically calls those functions more +often than Jakubs variant). Still a good speedup, though. + +Regstrapping on x86_64-linux in progress. Okay if that passes? (I'd like +to retain the #if 0 code therein, it's just a generator and it helps +easily debugging the topsort thingy if something breaks) + + +Ciao, +Michael. + +gcc/ + +2012-05-21 Michael Matz + + * genattrtab.c (attr_rtx_cost): Move earlier, start with cost being 1. + (simplify_test_exp): Handle one more case of distributive law, + decrease cost threshold. + (tests_attr_p, get_attr_order): New functions. + (optimize_attrs): Use topological order, inline only cheap values. + (write_attr_set): Reset our_known_true after some time. + +--- a/src/gcc/genattrtab.c ++++ b/src/gcc/genattrtab.c +@@ -115,6 +115,8 @@ along with GCC; see the file COPYING3. + #include "gensupport.h" + #include "vecprim.h" + ++#define DEBUG 0 ++ + /* Flags for make_internal_attr's `special' parameter. */ + #define ATTR_NONE 0 + #define ATTR_SPECIAL (1 << 0) +@@ -1640,6 +1642,57 @@ write_length_unit_log (FILE *outf) + fprintf (outf, "EXPORTED_CONST int length_unit_log = %u;\n", length_unit_log); + } + ++/* Compute approximate cost of the expression. Used to decide whether ++ expression is cheap enough for inline. */ ++static int ++attr_rtx_cost (rtx x) ++{ ++ int cost = 1; ++ enum rtx_code code; ++ if (!x) ++ return 0; ++ code = GET_CODE (x); ++ switch (code) ++ { ++ case MATCH_OPERAND: ++ if (XSTR (x, 1)[0]) ++ return 10; ++ else ++ return 1; ++ ++ case EQ_ATTR_ALT: ++ return 1; ++ ++ case EQ_ATTR: ++ /* Alternatives don't result into function call. */ ++ if (!strcmp_check (XSTR (x, 0), alternative_name)) ++ return 1; ++ else ++ return 5; ++ default: ++ { ++ int i, j; ++ const char *fmt = GET_RTX_FORMAT (code); ++ for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ++ { ++ switch (fmt[i]) ++ { ++ case 'V': ++ case 'E': ++ for (j = 0; j < XVECLEN (x, i); j++) ++ cost += attr_rtx_cost (XVECEXP (x, i, j)); ++ break; ++ case 'e': ++ cost += attr_rtx_cost (XEXP (x, i)); ++ break; ++ } ++ } ++ } ++ break; ++ } ++ return cost; ++} ++ + /* Take a COND expression and see if any of the conditions in it can be + simplified. If any are known true or known false for the particular insn + code, the COND can be further simplified. +@@ -2235,57 +2288,6 @@ simplify_or_tree (rtx exp, rtx *pterm, i + return exp; + } + +-/* Compute approximate cost of the expression. Used to decide whether +- expression is cheap enough for inline. */ +-static int +-attr_rtx_cost (rtx x) +-{ +- int cost = 0; +- enum rtx_code code; +- if (!x) +- return 0; +- code = GET_CODE (x); +- switch (code) +- { +- case MATCH_OPERAND: +- if (XSTR (x, 1)[0]) +- return 10; +- else +- return 0; +- +- case EQ_ATTR_ALT: +- return 0; +- +- case EQ_ATTR: +- /* Alternatives don't result into function call. */ +- if (!strcmp_check (XSTR (x, 0), alternative_name)) +- return 0; +- else +- return 5; +- default: +- { +- int i, j; +- const char *fmt = GET_RTX_FORMAT (code); +- for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) +- { +- switch (fmt[i]) +- { +- case 'V': +- case 'E': +- for (j = 0; j < XVECLEN (x, i); j++) +- cost += attr_rtx_cost (XVECEXP (x, i, j)); +- break; +- case 'e': +- cost += attr_rtx_cost (XEXP (x, i)); +- break; +- } +- } +- } +- break; +- } +- return cost; +-} +- + /* Simplify test expression and use temporary obstack in order to avoid + memory bloat. Use ATTR_IND_SIMPLIFIED to avoid unnecessary simplifications + and avoid unnecessary copying if possible. */ +@@ -2618,6 +2620,25 @@ simplify_test_exp (rtx exp, int insn_cod + return SIMPLIFY_TEST_EXP (newexp, insn_code, insn_index); + } + ++ /* Similarly, ++ convert (ior (and (y) (x)) ++ (and (z) (x))) ++ to (and (ior (y) (z)) ++ (x)) ++ Note that we want the common term to stay at the end. ++ */ ++ ++ else if (GET_CODE (left) == AND && GET_CODE (right) == AND ++ && attr_equal_p (XEXP (left, 1), XEXP (right, 1))) ++ { ++ newexp = attr_rtx (IOR, XEXP (left, 0), XEXP (right, 0)); ++ ++ left = newexp; ++ right = XEXP (right, 1); ++ newexp = attr_rtx (AND, left, right); ++ return SIMPLIFY_TEST_EXP (newexp, insn_code, insn_index); ++ } ++ + /* See if all or all but one of the insn's alternatives are specified + in this tree. Optimize if so. */ + +@@ -2753,7 +2774,7 @@ simplify_test_exp (rtx exp, int insn_cod + x = evaluate_eq_attr (exp, attr, av->value, + insn_code, insn_index); + x = SIMPLIFY_TEST_EXP (x, insn_code, insn_index); +- if (attr_rtx_cost(x) < 20) ++ if (attr_rtx_cost(x) < 7) + return x; + } + } +@@ -2773,6 +2794,133 @@ simplify_test_exp (rtx exp, int insn_cod + return newexp; + } + ++/* Return 1 if any EQ_ATTR subexpression of P refers to ATTR, ++ otherwise return 0. */ ++ ++static int ++tests_attr_p (rtx p, struct attr_desc *attr) ++{ ++ const char *fmt; ++ int i, ie, j, je; ++ ++ if (GET_CODE (p) == EQ_ATTR) ++ { ++ if (XSTR (p, 0) != attr->name) ++ return 0; ++ return 1; ++ } ++ ++ fmt = GET_RTX_FORMAT (GET_CODE (p)); ++ ie = GET_RTX_LENGTH (GET_CODE (p)); ++ for (i = 0; i < ie; i++) ++ { ++ switch (*fmt++) ++ { ++ case 'e': ++ if (tests_attr_p (XEXP (p, i), attr)) ++ return 1; ++ break; ++ ++ case 'E': ++ je = XVECLEN (p, i); ++ for (j = 0; j < je; ++j) ++ if (tests_attr_p (XVECEXP (p, i, j), attr)) ++ return 1; ++ break; ++ } ++ } ++ ++ return 0; ++} ++ ++/* Calculate a topological sorting of all attributes so that ++ all attributes only depend on attributes in front of it. ++ Place the result in *RET (which is a pointer to an array of ++ attr_desc pointers), and return the size of that array. */ ++ ++static int ++get_attr_order (struct attr_desc ***ret) ++{ ++ int i, j; ++ int num = 0; ++ struct attr_desc *attr; ++ struct attr_desc **all, **sorted; ++ char *handled; ++ for (i = 0; i < MAX_ATTRS_INDEX; i++) ++ for (attr = attrs[i]; attr; attr = attr->next) ++ num++; ++ all = XNEWVEC (struct attr_desc *, num); ++ sorted = XNEWVEC (struct attr_desc *, num); ++ handled = XCNEWVEC (char, num); ++ num = 0; ++ for (i = 0; i < MAX_ATTRS_INDEX; i++) ++ for (attr = attrs[i]; attr; attr = attr->next) ++ all[num++] = attr; ++ ++ j = 0; ++ for (i = 0; i < num; i++) ++ if (all[i]->is_const) ++ handled[i] = 1, sorted[j++] = all[i]; ++ ++ /* We have only few attributes hence we can live with the inner ++ loop being O(n^2), unlike the normal fast variants of topological ++ sorting. */ ++ while (j < num) ++ { ++ for (i = 0; i < num; i++) ++ if (!handled[i]) ++ { ++ /* Let's see if I depends on anything interesting. */ ++ int k; ++ for (k = 0; k < num; k++) ++ if (!handled[k]) ++ { ++ struct attr_value *av; ++ for (av = all[i]->first_value; av; av = av->next) ++ if (av->num_insns != 0) ++ if (tests_attr_p (av->value, all[k])) ++ break; ++ ++ if (av) ++ /* Something in I depends on K. */ ++ break; ++ } ++ if (k == num) ++ { ++ /* Nothing in I depended on anything intersting, so ++ it's done. */ ++ handled[i] = 1; ++ sorted[j++] = all[i]; ++ } ++ } ++ } ++ ++ if (DEBUG) ++ for (j = 0; j < num; j++) ++ { ++ struct attr_desc *attr2; ++ struct attr_value *av; ++ ++ attr = sorted[j]; ++ fprintf (stderr, "%s depends on: ", attr->name); ++ for (i = 0; i < MAX_ATTRS_INDEX; ++i) ++ for (attr2 = attrs[i]; attr2; attr2 = attr2->next) ++ if (!attr2->is_const) ++ for (av = attr->first_value; av; av = av->next) ++ if (av->num_insns != 0) ++ if (tests_attr_p (av->value, attr2)) ++ { ++ fprintf (stderr, "%s, ", attr2->name); ++ break; ++ } ++ fprintf (stderr, "\n"); ++ } ++ ++ free (all); ++ *ret = sorted; ++ return num; ++} ++ + /* Optimize the attribute lists by seeing if we can determine conditional + values from the known values of other attributes. This will save subroutine + calls during the compilation. */ +@@ -2787,6 +2935,8 @@ optimize_attrs (void) + int i; + struct attr_value_list *ivbuf; + struct attr_value_list *iv; ++ struct attr_desc **topsort; ++ int topnum; + + /* For each insn code, make a list of all the insn_ent's for it, + for all values for all attributes. */ +@@ -2802,18 +2952,22 @@ optimize_attrs (void) + + iv = ivbuf = XNEWVEC (struct attr_value_list, num_insn_ents); + +- for (i = 0; i < MAX_ATTRS_INDEX; i++) +- for (attr = attrs[i]; attr; attr = attr->next) +- for (av = attr->first_value; av; av = av->next) +- for (ie = av->first_insn; ie; ie = ie->next) +- { +- iv->attr = attr; +- iv->av = av; +- iv->ie = ie; +- iv->next = insn_code_values[ie->def->insn_code]; +- insn_code_values[ie->def->insn_code] = iv; +- iv++; +- } ++ /* Create the chain of insn*attr values such that we see dependend ++ attributes after their dependencies. As we use a stack via the ++ next pointers start from the end of the topological order. */ ++ topnum = get_attr_order (&topsort); ++ for (i = topnum - 1; i >= 0; i--) ++ for (av = topsort[i]->first_value; av; av = av->next) ++ for (ie = av->first_insn; ie; ie = ie->next) ++ { ++ iv->attr = topsort[i]; ++ iv->av = av; ++ iv->ie = ie; ++ iv->next = insn_code_values[ie->def->insn_code]; ++ insn_code_values[ie->def->insn_code] = iv; ++ iv++; ++ } ++ free (topsort); + + /* Sanity check on num_insn_ents. */ + gcc_assert (iv == ivbuf + num_insn_ents); +@@ -2848,7 +3002,15 @@ optimize_attrs (void) + } + + rtl_obstack = old; +- if (newexp != av->value) ++ /* If we created a new value for this instruction, and it's ++ cheaper than the old value, and overall cheap, use that ++ one as specific value for the current instruction. ++ The last test is to avoid exploding the get_attr_ function ++ sizes for no much gain. */ ++ if (newexp != av->value ++ && attr_rtx_cost (newexp) < attr_rtx_cost (av->value) ++ && attr_rtx_cost (newexp) < 26 ++ ) + { + newexp = attr_copy_rtx (newexp); + remove_insn_ent (av, ie); +@@ -3944,6 +4106,10 @@ write_attr_set (FILE *outf, struct attr_ + rtx testexp; + rtx inner_true; + ++ /* Reset our_known_true after some time to not accumulate ++ too much cruft (slowing down genattrtab). */ ++ if ((i & 31) == 0) ++ our_known_true = known_true; + testexp = eliminate_known_true (our_known_true, + XVECEXP (value, 0, i), + insn_code, insn_index); diff -Nru gcc-4.6-4.6.3/debian/patches/gcc_ada_gcc-interface_Makefile.in.diff gcc-4.6-4.6.4/debian/patches/gcc_ada_gcc-interface_Makefile.in.diff --- gcc-4.6-4.6.3/debian/patches/gcc_ada_gcc-interface_Makefile.in.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/gcc_ada_gcc-interface_Makefile.in.diff 2013-04-14 22:48:24.000000000 +0000 @@ -24,7 +24,7 @@ + indepsw.adbrtype->elements[0]->type == FFI_TYPE_STRUCT && ++ cif->rtype->elements[1]) ++ { ++ cif->flags = 0; ++ break; ++ } ++ + switch (cif->rtype->size) + { + case 1: +@@ -163,6 +172,14 @@ + cif->flags = CIF_FLAGS_DINT; + break; + ++ case FFI_TYPE_SINT16: ++ cif->flags = CIF_FLAGS_SINT16; ++ break; ++ ++ case FFI_TYPE_SINT8: ++ cif->flags = CIF_FLAGS_SINT8; ++ break; ++ + default: + cif->flags = CIF_FLAGS_INT; + break; @@ -261,7 +261,8 @@ void *user_data, void *codeloc) @@ -66,3 +181,16 @@ *(unsigned short *)closure->tramp = 0x207c; *(void **)(closure->tramp + 2) = codeloc; +--- a/src/libffi/src/m68k/ffitarget.h ++++ b/src/libffi/src/m68k/ffitarget.h +@@ -34,8 +34,8 @@ + typedef enum ffi_abi { + FFI_FIRST_ABI = 0, + FFI_SYSV, +- FFI_DEFAULT_ABI = FFI_SYSV, +- FFI_LAST_ABI = FFI_DEFAULT_ABI + 1 ++ FFI_LAST_ABI, ++ FFI_DEFAULT_ABI = FFI_SYSV + } ffi_abi; + #endif + diff -Nru gcc-4.6-4.6.3/debian/patches/libstdc++-man-3cxx.diff gcc-4.6-4.6.4/debian/patches/libstdc++-man-3cxx.diff --- gcc-4.6-4.6.3/debian/patches/libstdc++-man-3cxx.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/libstdc++-man-3cxx.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,7 +1,20 @@ # DP: Install libstdc++ man pages with suffix .3cxx instead of .3 +Index: b/src/libstdc++-v3/doc/doxygen/user.cfg.in +=================================================================== --- a/src/libstdc++-v3/doc/doxygen/user.cfg.in +++ b/src/libstdc++-v3/doc/doxygen/user.cfg.in +@@ -181,8 +181,8 @@ + + ALIASES = doctodo="@todo\nNeeds documentation! See http://gcc.gnu.org/onlinedocs/libstdc++/manual/documentation_style.html" + +-ALIASES += headername{1}="Instead, include <\1>." +-ALIASES += headername{2}="Instead, include <\1> or <\2>." ++ALIASES += headername{1}="Instead, include \<\1\>." ++ALIASES += headername{2}="Instead, include \<\1\> or \<\2\>." + + # Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C + # sources only. Doxygen will then generate output that is more tailored for C. @@ -1388,7 +1388,7 @@ # The MAN_EXTENSION tag determines the extension that is added to # the generated man pages (default is the subroutine's section .3) @@ -11,17 +24,21 @@ # If the MAN_LINKS tag is set to YES and Doxygen generates man output, # then it will generate one additional man file for each entity +Index: b/src/libstdc++-v3/scripts/run_doxygen +=================================================================== --- a/src/libstdc++-v3/scripts/run_doxygen +++ b/src/libstdc++-v3/scripts/run_doxygen -@@ -235,6 +235,7 @@ +@@ -235,6 +235,9 @@ if $do_man; then echo :: echo :: Fixing up the man pages... ++mkdir -p $outdir/man/man3 +mv $outdir/man/man3cxx/* $outdir/man/man3/ ++rmdir $outdir/man/man3cxx cd $outdir/man/man3 # File names with embedded spaces (EVIL!) need to be....? renamed or removed? -@@ -256,7 +257,7 @@ +@@ -256,7 +259,7 @@ # and I'm off getting coffee then anyhow, so I didn't care enough to make # this super-fast. g++ ${srcdir}/doc/doxygen/stdheader.cc -o ./stdheader @@ -30,16 +47,16 @@ for f in $problematic; do # this is also slow, but safe and easy to debug oldh=`sed -n '/fC#include .*/\1/p' $f` -@@ -269,7 +270,7 @@ +@@ -269,7 +272,7 @@ # Some of the pages for generated modules have text that confuses certain # implementations of man(1), e.g., Linux's. We need to have another top-level # *roff tag to /stop/ the .SH NAME entry. -problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3` -+problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3 [A-Z]*.3cxx` ++problematic=`egrep --files-without-match '^\.SH SYNOPSIS' [A-Z]*.3cxx` #problematic='Containers.3 Sequences.3 Assoc_containers.3 Iterator_types.3' for f in $problematic; do -@@ -283,7 +284,7 @@ +@@ -283,7 +286,7 @@ done # Also, break this (generated) line up. It's ugly as sin. @@ -48,7 +65,7 @@ for f in $problematic; do sed 's/Definition at line/\ .PP\ -@@ -388,8 +389,8 @@ +@@ -388,8 +391,8 @@ istringstream ostringstream stringstream filebuf ifstream \ ofstream fstream string; do @@ -59,3 +76,16 @@ done echo :: +Index: b/src/libstdc++-v3/include/profile/impl/profiler_algos.h +=================================================================== +--- a/src/libstdc++-v3/include/profile/impl/profiler_algos.h ++++ b/src/libstdc++-v3/include/profile/impl/profiler_algos.h +@@ -24,7 +24,7 @@ + /** @file profile/impl/profiler_algos.h + * @brief Algorithms used by the profile extension. + * +- * This file is needed to avoid including or . ++ * This file is needed to avoid including \ or \. + * Including those files would result in recursive includes. + * These implementations are oversimplified. In general, efficiency may be + * sacrificed to minimize maintenance overhead. diff -Nru gcc-4.6-4.6.3/debian/patches/libstdc++-no-testsuite.diff gcc-4.6-4.6.4/debian/patches/libstdc++-no-testsuite.diff --- gcc-4.6-4.6.3/debian/patches/libstdc++-no-testsuite.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/libstdc++-no-testsuite.diff 2013-04-14 22:48:24.000000000 +0000 @@ -7,7 +7,7 @@ # Run the testsuite in normal mode. check-DEJAGNU $(check_DEJAGNU_normal_targets): check-DEJAGNU%: site.exp -+ case "$(target)" in arm*|hppa*|mipsel*) exit 0;; esac; \ ++ case "$(target)" in arm*|hppa*|mips*) exit 0;; esac; \ AR="$(AR)"; export AR; \ RANLIB="$(RANLIB)"; export RANLIB; \ if [ -z "$*$(filter-out --target_board=%, $(RUNTESTFLAGS))" ] \ diff -Nru gcc-4.6-4.6.3/debian/patches/linaro-lp972648.diff gcc-4.6-4.6.4/debian/patches/linaro-lp972648.diff --- gcc-4.6-4.6.3/debian/patches/linaro-lp972648.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/linaro-lp972648.diff 1970-01-01 00:00:00.000000000 +0000 @@ -1,292 +0,0 @@ -# DP: Fix ICE (regression) in Linaro 4.6. - -ChangeLog.linaro - -2012-04-04 Ulrich Weigand - - LP 972648 - - Backport from mainline: - - 2011-08-23 Richard Guenther - - gcc/ - * Makefile.in (tree-data-ref.o): Add tree-affine.h dependency. - * tree-affine.h (aff_comb_cannot_overlap_p): Declare. - * tree-affine.c (aff_comb_cannot_overlap_p): New function, moved - from ... - * tree-ssa-loop-im.c (cannot_overlap_p): ... here. - (mem_refs_may_alias_p): Adjust. - * tree-data-ref.h (dr_may_alias_p): Adjust. - * tree-data-ref.c: Include tree-affine.h. - (dr_analyze_indices): Do nothing for the non-loop case. - (dr_may_alias_p): Distinguish loop and non-loop case. Disambiguate - more cases in the non-loop case. - * graphite-sese-to-poly.c (write_alias_graph_to_ascii_dimacs): Adjust - calls to dr_may_alias_p. - (write_alias_graph_to_ascii_ecc): Likewise. - (write_alias_graph_to_ascii_dot): Likewise. - (build_alias_set_optimal_p): Likewise. - ---- a/src/gcc/Makefile.in 2011-09-08 15:18:31 +0000 -+++ b/src/gcc/Makefile.in 2012-04-05 02:07:06 +0000 -@@ -2667,7 +2667,7 @@ - $(TREE_PASS_H) $(PARAMS_H) gt-tree-scalar-evolution.h - tree-data-ref.o : tree-data-ref.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ - gimple-pretty-print.h $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) \ -- $(TREE_PASS_H) langhooks.h -+ $(TREE_PASS_H) langhooks.h tree-affine.h - sese.o : sese.c sese.h $(CONFIG_H) $(SYSTEM_H) coretypes.h tree-pretty-print.h \ - $(TREE_FLOW_H) $(CFGLOOP_H) $(TREE_DATA_REF_H) tree-pass.h value-prof.h - graphite.o : graphite.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(DIAGNOSTIC_CORE_H) \ - ---- a/src/gcc/graphite-sese-to-poly.c 2011-02-08 16:53:57 +0000 -+++ b/src/gcc/graphite-sese-to-poly.c 2012-04-05 02:07:06 +0000 -@@ -1721,7 +1721,7 @@ - - FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) - for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) -- if (dr_may_alias_p (dr1, dr2)) -+ if (dr_may_alias_p (dr1, dr2, true)) - edge_num++; - - fprintf (file, "$\n"); -@@ -1733,7 +1733,7 @@ - - FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) - for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) -- if (dr_may_alias_p (dr1, dr2)) -+ if (dr_may_alias_p (dr1, dr2, true)) - fprintf (file, "e %d %d\n", i + 1, j + 1); - - return true; -@@ -1763,7 +1763,7 @@ - - FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) - for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) -- if (dr_may_alias_p (dr1, dr2)) -+ if (dr_may_alias_p (dr1, dr2, true)) - fprintf (file, "n%d n%d\n", i, j); - - return true; -@@ -1789,7 +1789,7 @@ - - FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) - for (j = i + 1; VEC_iterate (data_reference_p, drs, j, dr2); j++) -- if (dr_may_alias_p (dr1, dr2)) -+ if (dr_may_alias_p (dr1, dr2, true)) - fprintf (file, "%d %d\n", i, j); - - return true; -@@ -1825,7 +1825,7 @@ - - FOR_EACH_VEC_ELT (data_reference_p, drs, i, dr1) - for (j = i+1; VEC_iterate (data_reference_p, drs, j, dr2); j++) -- if (dr_may_alias_p (dr1, dr2)) -+ if (dr_may_alias_p (dr1, dr2, true)) - { - add_edge (g, i, j); - add_edge (g, j, i); - ---- a/src/gcc/tree-affine.c 2010-11-26 12:42:41 +0000 -+++ b/src/gcc/tree-affine.c 2012-04-05 02:07:06 +0000 -@@ -887,3 +887,30 @@ - *size = shwi_to_double_int ((bitsize + BITS_PER_UNIT - 1) / BITS_PER_UNIT); - } - -+/* Returns true if a region of size SIZE1 at position 0 and a region of -+ size SIZE2 at position DIFF cannot overlap. */ -+ -+bool -+aff_comb_cannot_overlap_p (aff_tree *diff, double_int size1, double_int size2) -+{ -+ double_int d, bound; -+ -+ /* Unless the difference is a constant, we fail. */ -+ if (diff->n != 0) -+ return false; -+ -+ d = diff->offset; -+ if (double_int_negative_p (d)) -+ { -+ /* The second object is before the first one, we succeed if the last -+ element of the second object is before the start of the first one. */ -+ bound = double_int_add (d, double_int_add (size2, double_int_minus_one)); -+ return double_int_negative_p (bound); -+ } -+ else -+ { -+ /* We succeed if the second object starts after the first one ends. */ -+ return double_int_scmp (size1, d) <= 0; -+ } -+} -+ - ---- a/src/gcc/tree-affine.h 2009-11-25 10:55:54 +0000 -+++ a/src/gcc/tree-affine.h 2012-04-05 02:07:06 +0000 -@@ -76,6 +76,7 @@ - struct pointer_map_t **); - void get_inner_reference_aff (tree, aff_tree *, double_int *); - void free_affine_expand_cache (struct pointer_map_t **); -+bool aff_comb_cannot_overlap_p (aff_tree *, double_int, double_int); - - /* Debugging functions. */ - void print_aff (FILE *, aff_tree *); - ---- a/src/gcc/tree-data-ref.c 2011-10-02 08:43:10 +0000 -+++ b/src/gcc/tree-data-ref.c 2012-04-05 02:07:06 +0000 -@@ -84,6 +84,7 @@ - #include "tree-scalar-evolution.h" - #include "tree-pass.h" - #include "langhooks.h" -+#include "tree-affine.h" - - static struct datadep_stats - { -@@ -861,30 +862,30 @@ - tree base, off, access_fn = NULL_TREE; - basic_block before_loop = NULL; - -- if (nest) -- before_loop = block_before_loop (nest); -+ if (!nest) -+ { -+ DR_BASE_OBJECT (dr) = ref; -+ DR_ACCESS_FNS (dr) = NULL; -+ return; -+ } -+ -+ before_loop = block_before_loop (nest); - - while (handled_component_p (aref)) - { - if (TREE_CODE (aref) == ARRAY_REF) - { - op = TREE_OPERAND (aref, 1); -- if (nest) -- { -- access_fn = analyze_scalar_evolution (loop, op); -- access_fn = instantiate_scev (before_loop, loop, access_fn); -- VEC_safe_push (tree, heap, access_fns, access_fn); -- } -- -+ access_fn = analyze_scalar_evolution (loop, op); -+ access_fn = instantiate_scev (before_loop, loop, access_fn); -+ VEC_safe_push (tree, heap, access_fns, access_fn); - TREE_OPERAND (aref, 1) = build_int_cst (TREE_TYPE (op), 0); - } - - aref = TREE_OPERAND (aref, 0); - } - -- if (nest -- && (INDIRECT_REF_P (aref) -- || TREE_CODE (aref) == MEM_REF)) -+ if (INDIRECT_REF_P (aref) || TREE_CODE (aref) == MEM_REF) - { - op = TREE_OPERAND (aref, 0); - access_fn = analyze_scalar_evolution (loop, op); -@@ -1301,14 +1302,33 @@ - } - - /* Returns false if we can prove that data references A and B do not alias, -- true otherwise. */ -+ true otherwise. If LOOP_NEST is false no cross-iteration aliases are -+ considered. */ - - bool --dr_may_alias_p (const struct data_reference *a, const struct data_reference *b) -+dr_may_alias_p (const struct data_reference *a, const struct data_reference *b, -+ bool loop_nest) - { - tree addr_a = DR_BASE_OBJECT (a); - tree addr_b = DR_BASE_OBJECT (b); - -+ /* If we are not processing a loop nest but scalar code we -+ do not need to care about possible cross-iteration dependences -+ and thus can process the full original reference. Do so, -+ similar to how loop invariant motion applies extra offset-based -+ disambiguation. */ -+ if (!loop_nest) -+ { -+ aff_tree off1, off2; -+ double_int size1, size2; -+ get_inner_reference_aff (DR_REF (a), &off1, &size1); -+ get_inner_reference_aff (DR_REF (b), &off2, &size2); -+ aff_combination_scale (&off1, double_int_minus_one); -+ aff_combination_add (&off2, &off1); -+ if (aff_comb_cannot_overlap_p (&off2, size1, size2)) -+ return false; -+ } -+ - if (DR_IS_WRITE (a) && DR_IS_WRITE (b)) - return refs_output_dependent_p (addr_a, addr_b); - else if (DR_IS_READ (a) && DR_IS_WRITE (b)) -@@ -1346,7 +1366,7 @@ - } - - /* If the data references do not alias, then they are independent. */ -- if (!dr_may_alias_p (a, b)) -+ if (!dr_may_alias_p (a, b, loop_nest != NULL)) - { - DDR_ARE_DEPENDENT (res) = chrec_known; - return res; - ---- a/src/gcc/tree-data-ref.h 2011-10-02 08:43:10 +0000 -+++ b/src/gcc/tree-data-ref.h 2012-04-05 02:07:06 +0000 -@@ -431,7 +431,7 @@ - - extern void create_rdg_vertices (struct graph *, VEC (gimple, heap) *); - extern bool dr_may_alias_p (const struct data_reference *, -- const struct data_reference *); -+ const struct data_reference *, bool); - extern bool dr_equal_offsets_p (struct data_reference *, - struct data_reference *); - - ---- a/src/gcc/tree-ssa-loop-im.c 2011-02-18 13:22:17 +0000 -+++ b/src/gcc/tree-ssa-loop-im.c 2012-04-05 02:07:06 +0000 -@@ -1834,33 +1834,6 @@ - create_vop_ref_mapping (); - } - --/* Returns true if a region of size SIZE1 at position 0 and a region of -- size SIZE2 at position DIFF cannot overlap. */ -- --static bool --cannot_overlap_p (aff_tree *diff, double_int size1, double_int size2) --{ -- double_int d, bound; -- -- /* Unless the difference is a constant, we fail. */ -- if (diff->n != 0) -- return false; -- -- d = diff->offset; -- if (double_int_negative_p (d)) -- { -- /* The second object is before the first one, we succeed if the last -- element of the second object is before the start of the first one. */ -- bound = double_int_add (d, double_int_add (size2, double_int_minus_one)); -- return double_int_negative_p (bound); -- } -- else -- { -- /* We succeed if the second object starts after the first one ends. */ -- return double_int_scmp (size1, d) <= 0; -- } --} -- - /* Returns true if MEM1 and MEM2 may alias. TTAE_CACHE is used as a cache in - tree_to_aff_combination_expand. */ - -@@ -1889,7 +1862,7 @@ - aff_combination_scale (&off1, double_int_minus_one); - aff_combination_add (&off2, &off1); - -- if (cannot_overlap_p (&off2, size1, size2)) -+ if (aff_comb_cannot_overlap_p (&off2, size1, size2)) - return false; - - return true; - diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-ada.diff gcc-4.6-4.6.4/debian/patches/m68k-ada.diff --- gcc-4.6-4.6.3/debian/patches/m68k-ada.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-ada.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,257 @@ +gcc/ada/ + +2011-10-12 Mikael Pettersson + + PR ada/48835 + * gcc-interface/Makefile.in: Add support for m68k-linux. + * system-linux-m68k.ads: New file based on system-linux-ppc.ads + and system-vxworks-m68k.ads. + * s-memory.adb (Gnat_Malloc): New wrapper around Alloc, returning + the memory address as a pointer not an integer. + Add Gnat_Malloc -> __gnat_malloc export. + * s-memory.ads: Remove Alloc -> __gnat_malloc export. + +Index: gcc-4.6-4.6.3/src/gcc/ada/gcc-interface/Makefile.in +=================================================================== +--- gcc-4.6-4.6.3.orig/src/gcc/ada/gcc-interface/Makefile.in 2012-03-04 16:06:01.000000000 +0000 ++++ gcc-4.6-4.6.3/src/gcc/ada/gcc-interface/Makefile.in 2012-03-04 16:06:49.000000000 +0000 +@@ -1871,6 +1871,34 @@ + LIBRARY_VERSION := $(LIB_VERSION) + endif + ++ifeq ($(strip $(filter-out m68k% linux%,$(arch) $(osys))),) ++ LIBGNAT_TARGET_PAIRS = \ ++ a-intnam.ads. -- ++-- -- ++-- GNAT was originally developed by the GNAT team at New York University. -- ++-- Extensive contributions were provided by Ada Core Technologies Inc. -- ++-- -- ++------------------------------------------------------------------------------ ++ ++package System is ++ pragma Pure; ++ -- Note that we take advantage of the implementation permission to make ++ -- this unit Pure instead of Preelaborable; see RM 13.7.1(15). In Ada ++ -- 2005, this is Pure in any case (AI-362). ++ ++ type Name is (SYSTEM_NAME_GNAT); ++ System_Name : constant Name := SYSTEM_NAME_GNAT; ++ ++ -- System-Dependent Named Numbers ++ ++ Min_Int : constant := Long_Long_Integer'First; ++ Max_Int : constant := Long_Long_Integer'Last; ++ ++ Max_Binary_Modulus : constant := 2 ** Long_Long_Integer'Size; ++ Max_Nonbinary_Modulus : constant := 2 ** Integer'Size - 1; ++ ++ Max_Base_Digits : constant := Long_Long_Float'Digits; ++ Max_Digits : constant := Long_Long_Float'Digits; ++ ++ Max_Mantissa : constant := 63; ++ Fine_Delta : constant := 2.0 ** (-Max_Mantissa); ++ ++ Tick : constant := 0.000_001; ++ ++ -- Storage-related Declarations ++ ++ type Address is private; ++ pragma Preelaborable_Initialization (Address); ++ Null_Address : constant Address; ++ ++ Storage_Unit : constant := 8; ++ Word_Size : constant := 32; ++ Memory_Size : constant := 2 ** 32; ++ ++ -- Address comparison ++ ++ function "<" (Left, Right : Address) return Boolean; ++ function "<=" (Left, Right : Address) return Boolean; ++ function ">" (Left, Right : Address) return Boolean; ++ function ">=" (Left, Right : Address) return Boolean; ++ function "=" (Left, Right : Address) return Boolean; ++ ++ pragma Import (Intrinsic, "<"); ++ pragma Import (Intrinsic, "<="); ++ pragma Import (Intrinsic, ">"); ++ pragma Import (Intrinsic, ">="); ++ pragma Import (Intrinsic, "="); ++ ++ -- Other System-Dependent Declarations ++ ++ type Bit_Order is (High_Order_First, Low_Order_First); ++ Default_Bit_Order : constant Bit_Order := High_Order_First; ++ pragma Warnings (Off, Default_Bit_Order); -- kill constant condition warning ++ ++ -- Priority-related Declarations (RM D.1) ++ ++ -- 0 .. 98 corresponds to the system priority range 1 .. 99. ++ -- ++ -- If the scheduling policy is SCHED_FIFO or SCHED_RR the runtime makes use ++ -- of the entire range provided by the system. ++ -- ++ -- If the scheduling policy is SCHED_OTHER the only valid system priority ++ -- is 1 and other values are simply ignored. ++ ++ Max_Priority : constant Positive := 97; ++ Max_Interrupt_Priority : constant Positive := 98; ++ ++ subtype Any_Priority is Integer range 0 .. 98; ++ subtype Priority is Any_Priority range 0 .. 97; ++ subtype Interrupt_Priority is Any_Priority range 98 .. 98; ++ ++ Default_Priority : constant Priority := 48; ++ ++private ++ ++ type Address is mod Memory_Size; ++ Null_Address : constant Address := 0; ++ ++ -------------------------------------- ++ -- System Implementation Parameters -- ++ -------------------------------------- ++ ++ -- These parameters provide information about the target that is used ++ -- by the compiler. They are in the private part of System, where they ++ -- can be accessed using the special circuitry in the Targparm unit ++ -- whose source should be consulted for more detailed descriptions ++ -- of the individual switch values. ++ ++ Backend_Divide_Checks : constant Boolean := False; ++ Backend_Overflow_Checks : constant Boolean := True; ++ Command_Line_Args : constant Boolean := True; ++ Configurable_Run_Time : constant Boolean := False; ++ Denorm : constant Boolean := True; ++ Duration_32_Bits : constant Boolean := False; ++ Exit_Status_Supported : constant Boolean := True; ++ Fractional_Fixed_Ops : constant Boolean := False; ++ Frontend_Layout : constant Boolean := False; ++ Machine_Overflows : constant Boolean := False; ++ Machine_Rounds : constant Boolean := True; ++ Preallocated_Stacks : constant Boolean := False; ++ Signed_Zeros : constant Boolean := False; ++ Stack_Check_Default : constant Boolean := False; ++ Stack_Check_Probes : constant Boolean := False; ++ Stack_Check_Limits : constant Boolean := False; ++ Support_64_Bit_Divides : constant Boolean := True; ++ Support_Aggregates : constant Boolean := True; ++ Support_Composite_Assign : constant Boolean := True; ++ Support_Composite_Compare : constant Boolean := True; ++ Support_Long_Shifts : constant Boolean := True; ++ Always_Compatible_Rep : constant Boolean := True; ++ Suppress_Standard_Library : constant Boolean := False; ++ Use_Ada_Main_Program_Name : constant Boolean := False; ++ ZCX_By_Default : constant Boolean := True; ++ GCC_ZCX_Support : constant Boolean := True; ++ ++end System; diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-atomic.diff gcc-4.6-4.6.4/debian/patches/m68k-atomic.diff --- gcc-4.6-4.6.3/debian/patches/m68k-atomic.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-atomic.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,255 @@ +# DP: backport atomic builtin backend code for m68k from trunk +# DP: and add t-slibgcc-libgcc to m68k configuration by advice +# DP: of Mikel Pettersson to avoid running into PR40134 again + +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -383,9 +383,10 @@ m68k*-*-openbsd*) + ;; + m68k-*-uclinux*) # Motorola m68k/ColdFire running uClinux with uClibc + ;; +-m68k-*-linux*) # Motorola m68k's running GNU/Linux ++m68k-*-linux*) # Motorola m68k's running GNU/Linux + # with ELF format using glibc 2 + # aka the GNU/Linux C library 6. ++ tmake_file="$tmake_file m68k/t-linux" + ;; + m68k-*-rtems*) + ;; +--- /dev/null ++++ b/src/libgcc/config/m68k/linux-atomic.c +@@ -0,0 +1,211 @@ ++/* Linux-specific atomic operations for m68k Linux. ++ Copyright (C) 2011 Free Software Foundation, Inc. ++ Based on code contributed by CodeSourcery for ARM EABI Linux. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify it under ++the terms of the GNU General Public License as published by the Free ++Software Foundation; either version 3, or (at your option) any later ++version. ++ ++GCC is distributed in the hope that it will be useful, but WITHOUT ANY ++WARRANTY; without even the implied warranty of MERCHANTABILITY or ++FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License ++for more details. ++ ++Under Section 7 of GPL version 3, you are granted additional ++permissions described in the GCC Runtime Library Exception, version ++3.1, as published by the Free Software Foundation. ++ ++You should have received a copy of the GNU General Public License and ++a copy of the GCC Runtime Library Exception along with this program; ++see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++. */ ++ ++/* Coldfire dropped the CAS instruction from the base M68K ISA. ++ ++ GCC automatically issues a asm memory barrier when it encounters ++ a __sync_synchronize builtin. Thus, we do not need to define this ++ builtin. ++ ++ We implement byte, short and int versions of each atomic operation ++ using the kernel helper defined below. There is no support for ++ 64-bit operations yet. */ ++ ++#include ++#include ++ ++#ifndef __NR_atomic_cmpxchg_32 ++#define __NR_atomic_cmpxchg_32 335 ++#endif ++ ++/* Kernel helper for compare-and-exchange a 32-bit value. */ ++static inline unsigned ++__kernel_cmpxchg (unsigned *mem, unsigned oldval, unsigned newval) ++{ ++ register unsigned *a0 asm("a0") = mem; ++ register unsigned d2 asm("d2") = oldval; ++ register unsigned d1 asm("d1") = newval; ++ register unsigned d0 asm("d0") = __NR_atomic_cmpxchg_32; ++ ++ asm volatile ("trap #0" ++ : "=r"(d0), "=r"(d1), "=r"(a0) ++ : "r"(d0), "r"(d1), "r"(d2), "r"(a0) ++ : "memory", "a1"); ++ ++ return d0; ++} ++ ++#define HIDDEN __attribute__ ((visibility ("hidden"))) ++ ++/* Big endian masks */ ++#define INVERT_MASK_1 24 ++#define INVERT_MASK_2 16 ++ ++#define MASK_1 0xffu ++#define MASK_2 0xffffu ++ ++#define NAME_oldval(OP, WIDTH) __sync_fetch_and_##OP##_##WIDTH ++#define NAME_newval(OP, WIDTH) __sync_##OP##_and_fetch_##WIDTH ++ ++#define WORD_SYNC_OP(OP, PFX_OP, INF_OP, RETURN) \ ++ unsigned HIDDEN \ ++ NAME##_##RETURN (OP, 4) (unsigned *ptr, unsigned val) \ ++ { \ ++ unsigned oldval, newval, cmpval = *ptr; \ ++ \ ++ do { \ ++ oldval = cmpval; \ ++ newval = PFX_OP (oldval INF_OP val); \ ++ cmpval = __kernel_cmpxchg (ptr, oldval, newval); \ ++ } while (__builtin_expect (oldval != cmpval, 0)); \ ++ \ ++ return RETURN; \ ++ } ++ ++#define SUBWORD_SYNC_OP(OP, PFX_OP, INF_OP, TYPE, WIDTH, RETURN) \ ++ TYPE HIDDEN \ ++ NAME##_##RETURN (OP, WIDTH) (TYPE *ptr, TYPE sval) \ ++ { \ ++ unsigned *wordptr = (unsigned *) ((unsigned long) ptr & ~3); \ ++ unsigned int mask, shift, oldval, newval, cmpval, wval; \ ++ \ ++ shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \ ++ mask = MASK_##WIDTH << shift; \ ++ wval = (sval & MASK_##WIDTH) << shift; \ ++ \ ++ cmpval = *wordptr; \ ++ do { \ ++ oldval = cmpval; \ ++ newval = PFX_OP (oldval INF_OP wval); \ ++ newval = (newval & mask) | (oldval & ~mask); \ ++ cmpval = __kernel_cmpxchg (wordptr, oldval, newval); \ ++ } while (__builtin_expect (oldval != cmpval, 0)); \ ++ \ ++ return (RETURN >> shift) & MASK_##WIDTH; \ ++ } ++ ++WORD_SYNC_OP (add, , +, oldval) ++WORD_SYNC_OP (sub, , -, oldval) ++WORD_SYNC_OP (or, , |, oldval) ++WORD_SYNC_OP (and, , &, oldval) ++WORD_SYNC_OP (xor, , ^, oldval) ++WORD_SYNC_OP (nand, ~, &, oldval) ++ ++SUBWORD_SYNC_OP (add, , +, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (or, , |, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (and, , &, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, oldval) ++ ++SUBWORD_SYNC_OP (add, , +, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (or, , |, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (and, , &, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, oldval) ++SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, oldval) ++ ++WORD_SYNC_OP (add, , +, newval) ++WORD_SYNC_OP (sub, , -, newval) ++WORD_SYNC_OP (or, , |, newval) ++WORD_SYNC_OP (and, , &, newval) ++WORD_SYNC_OP (xor, , ^, newval) ++WORD_SYNC_OP (nand, ~, &, newval) ++ ++SUBWORD_SYNC_OP (add, , +, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (sub, , -, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (or, , |, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (and, , &, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (xor, , ^, unsigned short, 2, newval) ++SUBWORD_SYNC_OP (nand, ~, &, unsigned short, 2, newval) ++ ++SUBWORD_SYNC_OP (add, , +, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (sub, , -, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (or, , |, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (and, , &, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (xor, , ^, unsigned char, 1, newval) ++SUBWORD_SYNC_OP (nand, ~, &, unsigned char, 1, newval) ++ ++unsigned HIDDEN ++__sync_val_compare_and_swap_4 (unsigned *ptr, unsigned oldval, unsigned newval) ++{ ++ return __kernel_cmpxchg (ptr, oldval, newval); ++} ++ ++bool HIDDEN ++__sync_bool_compare_and_swap_4 (unsigned *ptr, unsigned oldval, ++ unsigned newval) ++{ ++ return __kernel_cmpxchg (ptr, oldval, newval) == oldval; ++} ++ ++#define SUBWORD_VAL_CAS(TYPE, WIDTH) \ ++ TYPE HIDDEN \ ++ __sync_val_compare_and_swap_##WIDTH (TYPE *ptr, TYPE soldval, \ ++ TYPE snewval) \ ++ { \ ++ unsigned *wordptr = (unsigned *)((unsigned long) ptr & ~3); \ ++ unsigned int mask, shift, woldval, wnewval; \ ++ unsigned oldval, newval, cmpval; \ ++ \ ++ shift = (((unsigned long) ptr & 3) << 3) ^ INVERT_MASK_##WIDTH; \ ++ mask = MASK_##WIDTH << shift; \ ++ woldval = (soldval & MASK_##WIDTH) << shift; \ ++ wnewval = (snewval & MASK_##WIDTH) << shift; \ ++ cmpval = *wordptr; \ ++ \ ++ do { \ ++ oldval = cmpval; \ ++ if ((oldval & mask) != woldval) \ ++ break; \ ++ newval = (oldval & ~mask) | wnewval; \ ++ cmpval = __kernel_cmpxchg (wordptr, oldval, newval); \ ++ } while (__builtin_expect (oldval != cmpval, 0)); \ ++ \ ++ return (oldval >> shift) & MASK_##WIDTH; \ ++ } ++ ++SUBWORD_VAL_CAS (unsigned short, 2) ++SUBWORD_VAL_CAS (unsigned char, 1) ++ ++#define SUBWORD_BOOL_CAS(TYPE, WIDTH) \ ++ bool HIDDEN \ ++ __sync_bool_compare_and_swap_##WIDTH (TYPE *ptr, TYPE oldval, \ ++ TYPE newval) \ ++ { \ ++ return (__sync_val_compare_and_swap_##WIDTH (ptr, oldval, newval) \ ++ == oldval); \ ++ } ++ ++SUBWORD_BOOL_CAS (unsigned short, 2) ++SUBWORD_BOOL_CAS (unsigned char, 1) ++ ++#undef NAME_oldval ++#define NAME_oldval(OP, WIDTH) __sync_lock_##OP##_##WIDTH ++#define COMMA , ++ ++WORD_SYNC_OP (test_and_set, , COMMA, oldval) ++SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned short, 1, oldval) ++SUBWORD_SYNC_OP (test_and_set, , COMMA, unsigned short, 2, oldval) +--- /dev/null ++++ b/src/libgcc/config/m68k/t-linux +@@ -0,0 +1 @@ ++LIB2ADD_ST = $(srcdir)/config/m68k/linux-atomic.c +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -1792,7 +1792,7 @@ m68k-*-uclinux*) # Motorola m68k/ColdFi + tm_defines="${tm_defines} MOTOROLA=1" + tmake_file="m68k/t-floatlib m68k/t-uclinux m68k/t-mlibs" + ;; +-m68k-*-linux*) # Motorola m68k's running GNU/Linux ++m68k-*-linux*) # Motorola m68k's running GNU/Linux + # with ELF format using glibc 2 + # aka the GNU/Linux C library 6. + default_m68k_cpu=68020 +@@ -1807,6 +1807,7 @@ m68k-*-linux*) # Motorola m68k's runnin + if test x$sjlj != x1; then + tmake_file="$tmake_file m68k/t-slibgcc-elf-ver" + fi ++ tmake_file="$tmake_file t-slibgcc-libgcc" + ;; + m68k-*-rtems*) + default_m68k_cpu=68020 diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-fp-cmp-zero.diff gcc-4.6-4.6.4/debian/patches/m68k-fp-cmp-zero.diff --- gcc-4.6-4.6.3/debian/patches/m68k-fp-cmp-zero.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-fp-cmp-zero.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,118 @@ +[backport proposed and approved but not yet applied fix for a + wrong-code bug in m68k fp compares with zero ] + +Date: Wed, 19 Oct 2011 22:29:36 +0100 +From: Julian Brown +Subject: [PATCH, m68k] Fix floating-point comparisons with zero +List-Archive: + +Hi, + +It appears that m68k floating-point comparisons may have been +subtly broken since 2007 when the following patch was applied: + + http://gcc.gnu.org/ml/gcc-patches/2007-09/msg01570.html + +The bug shows with our internal 4.6-based branch, but appears to be +latent on mainline (generated code is perturbed by r171236, an +apparently-unrelated change -- if that commit alone is reverted, the bug +reappears on current trunk). The discussion below was written wrt. the +previously-mentioned 4.6 branch, so details may be slightly different on +mainline, but the outcome is the same. + +The trouble is the code introduced in m68k.c:notice_update_cc, intended +to reverse the sense of comparisons for one particular +*cmp_68881/*cmp_cf alternative, inadvertently also inverts +the sense for tst_68881/tst_cf (FP comparisons against +zero). + +For the test case gcc.c-torture/execute/ieee/20010114-2.c, the +badness only triggers when -freorder-blocks is in effect (-O2 and +above). Two comparisons (of the same variable) against zero are munged +into one in final.c after basic-block reordering makes them +consecutive, and we get: + + ftst.s %d0 | x + fjgt .L13 | +(final.c omits a redundant "ftst.s %d0" here) + fjngt .L2 | + +when we ought to have got: + + ftst.s %d0 | x + fjgt .L13 | + fjnlt .L2 | + +The bug only triggers due to the omission of the test, else it would +happen (far) more often: if the ftst is actually emitted, the flags get +reset before any harm can be done: + +(define_insn "tst_68881" + [(set (cc0) + (compare (match_operand:FP 0 "general_operand" "fm") + (match_operand:FP 1 "const0_operand" "H")))] + "TARGET_68881" +{ + cc_status.flags = CC_IN_68881; /* unsets CC_REVERSED & other flags */ + ... + +but, when final.c decides the second ftst is redundant, nothing unsets +CC_REVERSED, so we actually (incorrectly) treat the comparison as +having been done with reversed operands. + +We can fix this by never setting CC_REVERSED for ftst instructions in +the first place. The problem is that the test (in notice_update_cc), + + if (cc_status.value2 && GET_CODE (cc_status.value2) == COMPARE + && GET_MODE_CLASS (GET_MODE (XEXP (cc_status.value2, 0))) == MODE_FLOAT) + { + cc_status.flags = CC_IN_68881; + if (!FP_REG_P (XEXP (cc_status.value2, 0))) + cc_status.flags |= CC_REVERSED; + } + +is not strict enough, and triggers for ftst instructions (even elided +ones), as well as for the intended third alternative of fcmp. + +So, the fix is to tighten up the inner condition to not trigger for +ftst. The attached patch does that, and we get the following test result +delta (as well as some noise in libstdc++ results, but I think those +are environment-related): + +FAIL -> PASS: gcc.c-torture/execute/ieee/20010114-2.c execution, -O2 +FAIL -> PASS: gcc.c-torture/execute/ieee/20010114-2.c execution, -O3 -fomit-frame-pointer +FAIL -> PASS: gcc.c-torture/execute/ieee/20010114-2.c execution, -O3 -g +FAIL -> PASS: gcc.c-torture/execute/ieee/20030331-1.c execution, -O2 +FAIL -> PASS: gcc.c-torture/execute/ieee/20030331-1.c execution, -O3 -fomit-frame-pointer +FAIL -> PASS: gcc.c-torture/execute/ieee/20030331-1.c execution, -O3 -g + +These results are against mainline *with r171236 reverted*, cross to +ColdFire Linux -- otherwise results are the same before/after. I believe +the patch is still needed regardless though. + +OK to apply? + +Thanks, + +Julian + +ChangeLog + + gcc/ + * config/m68k/m68k.c (notice_update_cc): Tighten condition for + setting CC_REVERSED for FP comparisons. + +Index: gcc-4.6-4.6.3/src/gcc/config/m68k/m68k.c +=================================================================== +--- gcc-4.6-4.6.3.orig/src/gcc/config/m68k/m68k.c 2012-03-04 15:55:43.000000000 +0000 ++++ gcc-4.6-4.6.3/src/gcc/config/m68k/m68k.c 2012-03-04 15:59:23.000000000 +0000 +@@ -4306,7 +4306,8 @@ + && GET_MODE_CLASS (GET_MODE (XEXP (cc_status.value2, 0))) == MODE_FLOAT) + { + cc_status.flags = CC_IN_68881; +- if (!FP_REG_P (XEXP (cc_status.value2, 0))) ++ if (!FP_REG_P (XEXP (cc_status.value2, 0)) ++ && FP_REG_P (XEXP (cc_status.value2, 1))) + cc_status.flags |= CC_REVERSED; + } + } diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-mint.diff gcc-4.6-4.6.4/debian/patches/m68k-mint.diff --- gcc-4.6-4.6.3/debian/patches/m68k-mint.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-mint.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,1182 @@ +# DP: Add support for the m68k-atari-mint target. + +Description: Add support for the m68k-atari-mint target + http://vincent.riviere.free.fr/soft/m68k-atari-mint/ contains a + collection of patches for a FreeMiNT cross and native toolchain. + This patch applies gcc-4.6.2-mint-20111028.patch.bz2 except the + not FreeMiNT-specific parts, which are already applied. It has + been reviewed, whitespace-sanitised, and some changes previously + globally applied are now only enabled for a FreeMiNT target. +Origin: http://vincent.riviere.free.fr/soft/m68k-atari-mint/archives/gcc-4.6.2-mint-20111028.patch.bz2 +Author: Vincent Rivière +Reviewed-by: Thorsten Glaser +Last-Update: 2012-04-22 + +--- a/src/config-ml.in ++++ b/src/config-ml.in +@@ -351,6 +351,23 @@ m68*-*-*) + esac + done + fi ++ case "${host}" in ++ *-*-mint*) ++ case "${srcdir}" in ++ */libgcc ) : ;; ++ *) ++ old_multidirs="${multidirs}" ++ multidirs="" ++ for x in ${old_multidirs}; do ++ case "$x" in ++ *mshort ) : ;; ++ *) multidirs="${multidirs} ${x}" ;; ++ esac ++ done ++ ;; ++ esac ++ ;; ++ esac + ;; + mips*-*-*) + if [ x$enable_single_float = xno ] +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -523,6 +523,9 @@ if test x$enable_libmudflap = x ; then + *-*-freebsd*) + # Enable libmudflap by default in FreeBSD. + ;; ++ *-*-mint*) ++ # Enable libmudflap by default in MiNT. ++ ;; + *) + # Disable it by default everywhere else. + noconfigdirs="$noconfigdirs target-libmudflap" +@@ -895,6 +898,9 @@ case "${target}" in + m68k-*-coff*) + noconfigdirs="$noconfigdirs ${libgcj}" + ;; ++ m68k-*-mint*) ++ noconfigdirs="$noconfigdirs target-libiberty ${libgcj}" ++ ;; + m68*-*-* | fido-*-*) + libgloss_dir=m68k + ;; +--- a/src/gcc/config/m68k/lb1sf68.asm ++++ b/src/gcc/config/m68k/lb1sf68.asm +@@ -666,7 +666,9 @@ ROUND_TO_MINUS = 3 | round result tow + .globl SYM (__negdf2) + .globl SYM (__cmpdf2) + .globl SYM (__cmpdf2_internal) ++#ifdef __ELF__ + .hidden SYM (__cmpdf2_internal) ++#endif + + .text + .even +@@ -2581,7 +2583,9 @@ ROUND_TO_MINUS = 3 | round result tow + .globl SYM (__negsf2) + .globl SYM (__cmpsf2) + .globl SYM (__cmpsf2_internal) ++#ifdef __ELF__ + .hidden SYM (__cmpsf2_internal) ++#endif + + | These are common routines to return and signal exceptions. + +--- a/src/gcc/config/m68k/math-68881.h ++++ b/src/gcc/config/m68k/math-68881.h +@@ -42,6 +42,15 @@ + #ifndef __math_68881 + #define __math_68881 + ++#undef __math_68881_inline ++#if defined(__GNUC_GNU_INLINE__) || defined(__GNUC_STDC_INLINE__) ++#define __math_68881_inline extern __inline__ __attribute__((__gnu_inline__)) ++#elif defined(__STDC_VERSION__) && (__STDC_VERSION__ >= 199901L) ++#define __math_68881_inline static inline ++#else ++#define __math_68881_inline extern __inline__ ++#endif ++ + #include + + #undef HUGE_VAL +@@ -64,7 +73,7 @@ + }) + #endif + +-__inline extern double ++__math_68881_inline double + sin (double x) + { + double value; +@@ -75,7 +84,7 @@ sin (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + cos (double x) + { + double value; +@@ -86,7 +95,7 @@ cos (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + tan (double x) + { + double value; +@@ -97,7 +106,7 @@ tan (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + asin (double x) + { + double value; +@@ -108,7 +117,7 @@ asin (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + acos (double x) + { + double value; +@@ -119,7 +128,7 @@ acos (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + atan (double x) + { + double value; +@@ -130,7 +139,7 @@ atan (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + atan2 (double y, double x) + { + double pi, pi_over_2; +@@ -187,7 +196,7 @@ atan2 (double y, double x) + } + } + +-__inline extern double ++__math_68881_inline double + sinh (double x) + { + double value; +@@ -198,7 +207,7 @@ sinh (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + cosh (double x) + { + double value; +@@ -209,7 +218,7 @@ cosh (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + tanh (double x) + { + double value; +@@ -220,7 +229,7 @@ tanh (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + atanh (double x) + { + double value; +@@ -231,7 +240,7 @@ atanh (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + exp (double x) + { + double value; +@@ -242,7 +251,7 @@ exp (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + expm1 (double x) + { + double value; +@@ -253,7 +262,7 @@ expm1 (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + log (double x) + { + double value; +@@ -264,7 +273,7 @@ log (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + log1p (double x) + { + double value; +@@ -275,7 +284,7 @@ log1p (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + log10 (double x) + { + double value; +@@ -286,7 +295,7 @@ log10 (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + sqrt (double x) + { + double value; +@@ -297,13 +306,13 @@ sqrt (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + hypot (double x, double y) + { + return sqrt (x*x + y*y); + } + +-__inline extern double ++__math_68881_inline double + pow (double x, double y) + { + if (x > 0) +@@ -352,7 +361,7 @@ pow (double x, double y) + } + } + +-__inline extern double ++__math_68881_inline double + fabs (double x) + { + double value; +@@ -363,7 +372,7 @@ fabs (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + ceil (double x) + { + int rounding_mode, round_up; +@@ -385,7 +394,7 @@ ceil (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + floor (double x) + { + int rounding_mode, round_down; +@@ -408,7 +417,7 @@ floor (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + rint (double x) + { + int rounding_mode, round_nearest; +@@ -430,7 +439,7 @@ rint (double x) + return value; + } + +-__inline extern double ++__math_68881_inline double + fmod (double x, double y) + { + double value; +@@ -442,7 +451,7 @@ fmod (double x, double y) + return value; + } + +-__inline extern double ++__math_68881_inline double + drem (double x, double y) + { + double value; +@@ -454,7 +463,7 @@ drem (double x, double y) + return value; + } + +-__inline extern double ++__math_68881_inline double + scalb (double x, int n) + { + double value; +@@ -466,7 +475,7 @@ scalb (double x, int n) + return value; + } + +-__inline extern double ++__math_68881_inline double + logb (double x) + { + double exponent; +@@ -477,7 +486,7 @@ logb (double x) + return exponent; + } + +-__inline extern double ++__math_68881_inline double + ldexp (double x, int n) + { + double value; +@@ -489,7 +498,7 @@ ldexp (double x, int n) + return value; + } + +-__inline extern double ++__math_68881_inline double + frexp (double x, int *exp) + { + double float_exponent; +@@ -514,7 +523,7 @@ frexp (double x, int *exp) + return mantissa; + } + +-__inline extern double ++__math_68881_inline double + modf (double x, double *ip) + { + double temp; +--- /dev/null ++++ b/src/gcc/config/m68k/mint.h +@@ -0,0 +1,179 @@ ++/* Definitions of target machine for GNU compiler. ++ Atari ST TOS/MiNT. ++ Copyright (C) 1994, 1995, 2007, 2008, 2009, 2010, 2011, 2012 ++ Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++You should have received a copy of the GNU General Public License ++along with GCC; see the file COPYING3. If not see ++. */ ++ ++/* Here are four prefixes that are used by asm_fprintf to ++ facilitate customization for alternate assembler syntaxes. ++ Machines with no likelihood of an alternate syntax need not ++ define these and need not use asm_fprintf. */ ++ ++/* The prefix for register names. Note that REGISTER_NAMES ++ is supposed to include this prefix. Also note that this is NOT an ++ fprintf format string, it is a literal string */ ++ ++#undef REGISTER_PREFIX ++#define REGISTER_PREFIX "%" ++ ++/* The prefix for local (compiler generated) labels. ++ These labels will not appear in the symbol table. */ ++ ++#undef LOCAL_LABEL_PREFIX ++#define LOCAL_LABEL_PREFIX "." ++ ++#undef ASM_COMMENT_START ++#define ASM_COMMENT_START "|" ++ ++#undef WCHAR_TYPE ++#define WCHAR_TYPE "short unsigned int" ++ ++#undef WCHAR_TYPE_SIZE ++#define WCHAR_TYPE_SIZE SHORT_TYPE_SIZE ++ ++#undef TARGET_OS_CPP_BUILTINS ++#define TARGET_OS_CPP_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("__MINT__"); \ ++ builtin_define_std ("atarist"); \ ++ builtin_assert ("machine=atari"); \ ++ builtin_assert ("system=mint"); \ ++ if (TARGET_68881) \ ++ /* non-standard */ \ ++ builtin_define ("__M68881__"); \ ++ } \ ++ while (0) ++ ++/* The following defines are nonstandard ++ and are kept only for compatibility ++ with older versions of GCC for MiNT. */ ++ ++#undef CPP_SPEC ++#define CPP_SPEC \ ++ "%{m68000:-D__M68000__} " \ ++ "%{mc68020:-D__M68020__} " \ ++ "%{m68020:-D__M68020__} " \ ++ "%{m68030:-D__M68020__} " \ ++ "%{m68040:-D__M68020__} " \ ++ "%{m68060:-D__M68020__} " \ ++ "%{m68020-40:-D__M68020__} " \ ++ "%{m68020-60:-D__M68020__} " \ ++ "%{!m680*:%{!mc680*:-D__M68000__}} " \ ++ "%{mshort:-D__MSHORT__}" ++ ++#define STARTFILE_SPEC "%{pg|p|profile:gcrt0.o%s;:crt0.o%s}" ++#define LIB_SPEC "-lc" ++ ++/* Every structure or union's size must be a multiple of 2 bytes. */ ++#define STRUCTURE_SIZE_BOUNDARY 16 ++ ++/* The -g option generates stabs debug information. */ ++#define DBX_DEBUGGING_INFO 1 ++ ++/* This is the assembler directive to equate two values. */ ++#undef SET_ASM_OP ++#define SET_ASM_OP "\t.set\t" ++ ++/* This is how we tell the assembler that a symbol is weak. */ ++#undef ASM_WEAKEN_LABEL ++#define ASM_WEAKEN_LABEL(FILE,NAME) \ ++ do { fputs ("\t.weak\t", FILE); assemble_name (FILE, NAME); \ ++ fputc ('\n', FILE); } while (0) ++ ++/* Don't default to pcc-struct-return, because gcc is the only compiler, and ++ we want to retain compatibility with older gcc versions. */ ++#define DEFAULT_PCC_STRUCT_RETURN 0 ++ ++/* The system headers are C++-aware. */ ++#define NO_IMPLICIT_EXTERN_C ++ ++/* By default, the vtable entries are void pointers, the so the alignment ++ is the same as pointer alignment. The value of this macro specifies ++ the alignment of the vtable entry in bits. It should be defined only ++ when special alignment is necessary. ++ ++ MiNT: The default value of 32 is too much and unsupported by a.out-mintprg. ++*/ ++#define TARGET_VTABLE_ENTRY_ALIGN 16 ++ ++/* If we have a definition of INCOMING_RETURN_ADDR_RTX, assume that ++ the rest of the DWARF 2 frame unwind support is also provided. ++ ++ MiNT: DWARF 2 frame unwind is not supported by a.out-mint. ++*/ ++#define DWARF2_UNWIND_INFO 0 ++ ++/* config/m68k.md has an explicit reference to the program counter, ++ prefix this by the register prefix. */ ++ ++#define ASM_RETURN_CASE_JUMP \ ++ do { \ ++ if (TARGET_COLDFIRE) \ ++ { \ ++ if (ADDRESS_REG_P (operands[0])) \ ++ return "jmp %%pc@(2,%0:l)"; \ ++ else \ ++ return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \ ++ } \ ++ else \ ++ return "jmp %%pc@(2,%0:w)"; \ ++ } while (0) ++ ++/* The ADDR_DIFF_VEC must exactly follow the previous instruction. */ ++ ++#undef ADDR_VEC_ALIGN ++#define ADDR_VEC_ALIGN(ADDR_VEC) 0 ++ ++/* If defined, a C expression whose value is a string containing the ++ assembler operation to identify the following data as uninitialized global ++ data. */ ++ ++#define BSS_SECTION_ASM_OP "\t.bss" ++ ++/* A C statement (sans semicolon) to output to the stdio stream ++ FILE the assembler definition of uninitialized global DECL named ++ NAME whose size is SIZE bytes and alignment is ALIGN bytes. ++ Try to use asm_output_aligned_bss to implement this macro. */ ++ ++#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ ++ asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN) ++ ++/* Disable -fpic and -fPIC since bsr.l _label@PLTPC ++ is unsupported by the assembler. */ ++ ++#undef SUBTARGET_OVERRIDE_OPTIONS ++#define SUBTARGET_OVERRIDE_OPTIONS \ ++do { \ ++ if (flag_pic && !TARGET_PCREL) \ ++ error ("-f%s is not supported on this target", \ ++ (flag_pic > 1) ? "PIC" : "pic"); \ ++} while (0) ++ ++ ++/* Workaround for GCC bug #35067 about multiple thunks. */ ++ ++#undef MAKE_DECL_ONE_ONLY ++#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1) ++ ++/* Avoid requiring -static with -fmudflap like in config/bfin/uclinux.h */ ++#define MFWRAP_SPEC " %{fmudflap|fmudflapth: \ ++ --wrap=malloc --wrap=free --wrap=calloc --wrap=realloc\ ++ --wrap=mmap --wrap=munmap --wrap=alloca\ ++ %{fmudflapth: --wrap=pthread_create\ ++}} %{fmudflap|fmudflapth: --wrap=main}" +--- /dev/null ++++ b/src/gcc/config/m68k/t-mint +@@ -0,0 +1,41 @@ ++# ++# Use multiple libraries ++# ++ ++MULTILIB_OPTIONS = m68020-60/mcpu=5475 mshort ++ ++MULTILIB_DIRNAMES = m68020-60 m5475 mshort ++ ++MULTILIB_MATCHES = \ ++ m68020-60=m68881 \ ++ m68020-60=m68020 \ ++ m68020-60=m68020-40 \ ++ m68020-60=mc68020 \ ++ m68020-60=m68030 \ ++ m68020-60=m68040 \ ++ m68020-60=m68060 \ ++ m68020-60=mcpu?68020 \ ++ m68020-60=mcpu?68030 \ ++ m68020-60=mcpu?68040 \ ++ m68020-60=mcpu?68060 \ ++ m68020-60=march?68020 \ ++ m68020-60=march?68030 \ ++ m68020-60=march?68040 \ ++ m68020-60=march?68060 \ ++ mcpu?5475=mcfv4e \ ++ mcpu?5475=mcpu?5470 \ ++ mcpu?5475=mcpu?5471 \ ++ mcpu?5475=mcpu?5472 \ ++ mcpu?5475=mcpu?5473 \ ++ mcpu?5475=mcpu?5474 \ ++ mcpu?5475=mcpu?547x \ ++ mcpu?5475=mcpu?5480 \ ++ mcpu?5475=mcpu?5481 \ ++ mcpu?5475=mcpu?5482 \ ++ mcpu?5475=mcpu?5483 \ ++ mcpu?5475=mcpu?5484 \ ++ mcpu?5475=mcpu?5485 \ ++ mcpu?5475=mcpu?548x ++ ++LIBGCC = stmp-multilib ++INSTALL_LIBGCC = install-multilib +--- a/src/gcc/config.gcc ++++ b/src/gcc/config.gcc +@@ -1809,6 +1809,15 @@ m68k-*-linux*) # Motorola m68k's runni + fi + tmake_file="$tmake_file t-slibgcc-libgcc" + ;; ++m68k-*-mint*) ++ default_m68k_cpu=68000 ++ default_cf_cpu=5475 ++ tm_file="${tm_file} m68k/mint.h" ++ tm_defines="${tm_defines} MOTOROLA=1" ++ tmake_file="m68k/t-floatlib m68k/t-mint" ++ gas=yes ++ gnu_ld=yes ++ ;; + m68k-*-rtems*) + default_m68k_cpu=68020 + default_cf_cpu=5206 +--- a/src/libdecnumber/decNumberLocal.h ++++ b/src/libdecnumber/decNumberLocal.h +@@ -188,7 +188,8 @@ see the files COPYING3 and COPYING.RUNTI + #if (DECNUMMAXE != DEC_MAX_EMAX) + #error Maximum exponent mismatch + #endif +- #if (DECNUMMINE != DEC_MIN_EMIN) ++ /* gcc 2.95.3 has bug in "!=" operator for negative constants */ ++ #if !(DECNUMMINE == DEC_MIN_EMIN) + #error Minimum exponent mismatch + #endif + +--- a/src/libgcc/config.host ++++ b/src/libgcc/config.host +@@ -388,6 +388,8 @@ m68k-*-linux*) # Motorola m68k's runni + # aka the GNU/Linux C library 6. + tmake_file="$tmake_file m68k/t-linux" + ;; ++m68k-*-mint*) ++ ;; + m68k-*-rtems*) + ;; + mcore-*-elf) +--- a/src/libiberty/configure.ac ++++ b/src/libiberty/configure.ac +@@ -201,6 +201,7 @@ esac + if [[ "${shared}" = "yes" ]]; then + case "${host}" in + *-*-cygwin*) ;; ++ *-*-mint*) ;; + alpha*-*-linux*) PICFLAG=-fPIC ;; + arm*-*-*) PICFLAG=-fPIC ;; + hppa*-*-*) PICFLAG=-fPIC ;; +--- a/src/libiberty/hex.c ++++ b/src/libiberty/hex.c +@@ -24,7 +24,8 @@ Boston, MA 02110-1301, USA. */ + #include "libiberty.h" + #include "safe-ctype.h" /* for HOST_CHARSET_ASCII */ + +-#if EOF != -1 ++/* gcc 2.95.3 has bug in "!=" operator for negative constants */ ++#if !(EOF == -1) + #error "hex.c requires EOF == -1" + #endif + +--- a/src/libiberty/safe-ctype.c ++++ b/src/libiberty/safe-ctype.c +@@ -119,7 +119,8 @@ sets of characters: + #include + #include /* for EOF */ + +-#if EOF != -1 ++/* gcc 2.95.3 has bug in "!=" operator for negative constants */ ++#if !(EOF == -1) + #error " requires EOF == -1" + #endif + +--- a/src/libmudflap/mf-hooks2.c ++++ b/src/libmudflap/mf-hooks2.c +@@ -1667,6 +1667,7 @@ WRAPPER2(int, system, const char *string + return system (string); + } + ++#ifdef HAVE_DLFCN_H + + WRAPPER2(void *, dlopen, const char *path, int flags) + { +@@ -1737,6 +1738,7 @@ WRAPPER2(void *, dlsym, void *handle, ch + return p; + } + ++#endif /* HAVE_DLFCN_H */ + + #if defined (HAVE_SYS_IPC_H) && defined (HAVE_SYS_SEM_H) && defined (HAVE_SYS_SHM_H) + +--- a/src/libmudflap/mf-runtime.h ++++ b/src/libmudflap/mf-runtime.h +@@ -97,6 +97,7 @@ extern int __mf_set_options (const char + instrumented modules are meant to be affected. */ + + #ifdef _MUDFLAP ++#ifndef __USER_LABEL_PREFIX__ + #pragma redefine_extname memcpy __mfwrap_memcpy + #pragma redefine_extname memmove __mfwrap_memmove + #pragma redefine_extname memset __mfwrap_memset +@@ -230,6 +231,141 @@ extern int __mf_set_options (const char + #pragma redefine_extname getprotoent __mfwrap_getprotoent + #pragma redefine_extname getprotobyname __mfwrap_getprotobyname + #pragma redefine_extname getprotobynumber __mfwrap_getprotobynumber ++#else ++#pragma redefine_extname memcpy ___mfwrap_memcpy ++#pragma redefine_extname memmove ___mfwrap_memmove ++#pragma redefine_extname memset ___mfwrap_memset ++#pragma redefine_extname memcmp ___mfwrap_memcmp ++#pragma redefine_extname memchr ___mfwrap_memchr ++#pragma redefine_extname memrchr ___mfwrap_memrchr ++#pragma redefine_extname strcpy ___mfwrap_strcpy ++#pragma redefine_extname strncpy ___mfwrap_strncpy ++#pragma redefine_extname strcat ___mfwrap_strcat ++#pragma redefine_extname strncat ___mfwrap_strncat ++#pragma redefine_extname strcmp ___mfwrap_strcmp ++#pragma redefine_extname strcasecmp ___mfwrap_strcasecmp ++#pragma redefine_extname strncmp ___mfwrap_strncmp ++#pragma redefine_extname strncasecmp ___mfwrap_strncasecmp ++#pragma redefine_extname strdup ___mfwrap_strdup ++#pragma redefine_extname strndup ___mfwrap_strndup ++#pragma redefine_extname strchr ___mfwrap_strchr ++#pragma redefine_extname strrchr ___mfwrap_strrchr ++#pragma redefine_extname strstr ___mfwrap_strstr ++#pragma redefine_extname memmem ___mfwrap_memmem ++#pragma redefine_extname strlen ___mfwrap_strlen ++#pragma redefine_extname strnlen ___mfwrap_strnlen ++#pragma redefine_extname bzero ___mfwrap_bzero ++#pragma redefine_extname bcopy ___mfwrap_bcopy ++#pragma redefine_extname bcmp ___mfwrap_bcmp ++#pragma redefine_extname index ___mfwrap_index ++#pragma redefine_extname rindex ___mfwrap_rindex ++#pragma redefine_extname asctime ___mfwrap_asctime ++#pragma redefine_extname ctime ___mfwrap_ctime ++#pragma redefine_extname gmtime ___mfwrap_gmtime ++#pragma redefine_extname localtime ___mfwrap_localtime ++#pragma redefine_extname time ___mfwrap_time ++#pragma redefine_extname strerror ___mfwrap_strerror ++#pragma redefine_extname fopen ___mfwrap_fopen ++#pragma redefine_extname fdopen ___mfwrap_fdopen ++#pragma redefine_extname freopen ___mfwrap_freopen ++#pragma redefine_extname fclose ___mfwrap_fclose ++#pragma redefine_extname fread ___mfwrap_fread ++#pragma redefine_extname fwrite ___mfwrap_fwrite ++#pragma redefine_extname fgetc ___mfwrap_fgetc ++#pragma redefine_extname fgets ___mfwrap_fgets ++#pragma redefine_extname getc ___mfwrap_getc ++#pragma redefine_extname gets ___mfwrap_gets ++#pragma redefine_extname ungetc ___mfwrap_ungetc ++#pragma redefine_extname fputc ___mfwrap_fputc ++#pragma redefine_extname fputs ___mfwrap_fputs ++#pragma redefine_extname putc ___mfwrap_putc ++#pragma redefine_extname puts ___mfwrap_puts ++#pragma redefine_extname clearerr ___mfwrap_clearerr ++#pragma redefine_extname feof ___mfwrap_feof ++#pragma redefine_extname ferror ___mfwrap_ferror ++#pragma redefine_extname fileno ___mfwrap_fileno ++#pragma redefine_extname printf ___mfwrap_printf ++#pragma redefine_extname fprintf ___mfwrap_fprintf ++#pragma redefine_extname sprintf ___mfwrap_sprintf ++#pragma redefine_extname snprintf ___mfwrap_snprintf ++#pragma redefine_extname vprintf ___mfwrap_vprintf ++#pragma redefine_extname vfprintf ___mfwrap_vfprintf ++#pragma redefine_extname vsprintf ___mfwrap_vsprintf ++#pragma redefine_extname vsnprintf ___mfwrap_vsnprintf ++#pragma redefine_extname access ___mfwrap_access ++#pragma redefine_extname remove ___mfwrap_remove ++#pragma redefine_extname fflush ___mfwrap_fflush ++#pragma redefine_extname fseek ___mfwrap_fseek ++#pragma redefine_extname ftell ___mfwrap_ftell ++#pragma redefine_extname rewind ___mfwrap_rewind ++#pragma redefine_extname fgetpos ___mfwrap_fgetpos ++#pragma redefine_extname fsetpos ___mfwrap_fsetpos ++#pragma redefine_extname stat ___mfwrap_stat ++#pragma redefine_extname fstat ___mfwrap_fstat ++#pragma redefine_extname lstat ___mfwrap_lstat ++#pragma redefine_extname mkfifo ___mfwrap_mkfifo ++#pragma redefine_extname setvbuf ___mfwrap_setvbuf ++#pragma redefine_extname setbuf ___mfwrap_setbuf ++#pragma redefine_extname setbuffer ___mfwrap_setbuffer ++#pragma redefine_extname setlinebuf ___mfwrap_setlinebuf ++#pragma redefine_extname opendir ___mfwrap_opendir ++#pragma redefine_extname closedir ___mfwrap_closedir ++#pragma redefine_extname readdir ___mfwrap_readdir ++#pragma redefine_extname recv ___mfwrap_recv ++#pragma redefine_extname recvfrom ___mfwrap_recvfrom ++#pragma redefine_extname recvmsg ___mfwrap_recvmsg ++#pragma redefine_extname send ___mfwrap_send ++#pragma redefine_extname sendto ___mfwrap_sendto ++#pragma redefine_extname sendmsg ___mfwrap_sendmsg ++#pragma redefine_extname setsockopt ___mfwrap_setsockopt ++#pragma redefine_extname getsockopt ___mfwrap_getsockopt ++#pragma redefine_extname accept ___mfwrap_accept ++#pragma redefine_extname bind ___mfwrap_bind ++#pragma redefine_extname connect ___mfwrap_connect ++#pragma redefine_extname gethostname ___mfwrap_gethostname ++#pragma redefine_extname sethostname ___mfwrap_sethostname ++#pragma redefine_extname gethostbyname ___mfwrap_gethostbyname ++#pragma redefine_extname wait ___mfwrap_wait ++#pragma redefine_extname waitpid ___mfwrap_waitpid ++#pragma redefine_extname popen ___mfwrap_popen ++#pragma redefine_extname pclose ___mfwrap_pclose ++#pragma redefine_extname execve ___mfwrap_execve ++#pragma redefine_extname execv ___mfwrap_execv ++#pragma redefine_extname execvp ___mfwrap_execvp ++#pragma redefine_extname system ___mfwrap_system ++#pragma redefine_extname dlopen ___mfwrap_dlopen ++#pragma redefine_extname dlerror ___mfwrap_dlerror ++#pragma redefine_extname dlsym ___mfwrap_dlsym ++#pragma redefine_extname dlclose ___mfwrap_dlclose ++#pragma redefine_extname fopen64 ___mfwrap_fopen64 ++#pragma redefine_extname freopen64 ___mfwrap_freopen64 ++#pragma redefine_extname stat64 ___mfwrap_stat64 ++#pragma redefine_extname fseeko64 ___mfwrap_fseeko64 ++#pragma redefine_extname ftello64 ___mfwrap_ftello64 ++#pragma redefine_extname semop ___mfwrap_semop ++#pragma redefine_extname semctl ___mfwrap_semctl ++#pragma redefine_extname shmctl ___mfwrap_shmctl ++#pragma redefine_extname shmat ___mfwrap_shmat ++#pragma redefine_extname shmdt ___mfwrap_shmdt ++#pragma redefine_extname __ctype_b_loc ___mfwrap___ctype_b_loc ++#pragma redefine_extname __ctype_toupper_loc ___mfwrap___ctype_toupper_loc ++#pragma redefine_extname __ctype_tolower_loc ___mfwrap___ctype_tolower_loc ++#pragma redefine_extname getlogin ___mfwrap_getlogin ++#pragma redefine_extname cuserid ___mfwrap_cuserid ++#pragma redefine_extname getpwnam ___mfwrap_getpwnam ++#pragma redefine_extname getpwuid ___mfwrap_getpwuid ++#pragma redefine_extname getgrnam ___mfwrap_getgrnam ++#pragma redefine_extname getgrgid ___mfwrap_getgrgid ++#pragma redefine_extname getservent ___mfwrap_getservent ++#pragma redefine_extname getservbyname ___mfwrap_getservbyname ++#pragma redefine_extname getservbyport ___mfwrap_getservbyport ++#pragma redefine_extname gai_strerror ___mfwrap_gai_strerror ++#pragma redefine_extname getmntent ___mfwrap_getmntent ++#pragma redefine_extname inet_ntoa ___mfwrap_inet_ntoa ++#pragma redefine_extname getprotoent ___mfwrap_getprotoent ++#pragma redefine_extname getprotobyname ___mfwrap_getprotobyname ++#pragma redefine_extname getprotobynumber ___mfwrap_getprotobynumber ++#endif /* __USER_LABEL_PREFIX__ */ + + /* Disable glibc macros. */ + #define __NO_STRING_INLINES +--- a/src/libssp/ssp.c ++++ b/src/libssp/ssp.c +@@ -63,6 +63,9 @@ see the files COPYING3 and COPYING.RUNTI + #ifdef HAVE_SYSLOG_H + # include + #endif ++#ifdef __MINT__ ++#include ++#endif + + void *__stack_chk_guard = 0; + +@@ -96,7 +99,10 @@ __guard_setup (void) + static void + fail (const char *msg1, size_t msg1len, const char *msg3) + { +-#ifdef __GNU_LIBRARY__ ++#if defined(__MINT__) ++#define __progname program_invocation_short_name ++#endif ++#if defined(__GNU_LIBRARY__) || defined(__MINT__) + extern char * __progname; + #else + static const char __progname[] = ""; +@@ -139,6 +145,9 @@ fail (const char *msg1, size_t msg1len, + syslog (LOG_CRIT, msg3); + #endif /* HAVE_SYSLOG_H */ + ++#ifdef __MINT__ ++ Pterm(127); ++#else + /* Try very hard to exit. Note that signals may be blocked preventing + the first two options from working. The use of volatile is here to + prevent optimizers from "knowing" that __builtin_trap is called first, +@@ -160,6 +169,7 @@ fail (const char *msg1, size_t msg1len, + break; + } + } ++#endif + } + + void +--- /dev/null ++++ b/src/libstdc++-v3/config/os/mint/ctype_base.h +@@ -0,0 +1,59 @@ ++// Locale support -*- C++ -*- ++ ++// Copyright (C) 1997, 1998, 1999, 2003, 2009, 2010 ++// Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++// ++// ISO C++ 14882: 22.1 Locales ++// ++ ++// Mint C types, taken from mintlib-0.57.3/include/ctype.h ++ ++namespace std _GLIBCXX_VISIBILITY(default) ++{ ++_GLIBCXX_BEGIN_NAMESPACE_VERSION ++ ++ /// @brief Base class for ctype. ++ struct ctype_base ++ { ++ // Non-standard typedefs. ++ typedef const int* __to_type; ++ ++ // NB: Offsets into ctype::_M_table force a particular size ++ // on the mask type. Because of this, we don't use an enum. ++ typedef unsigned int mask; ++ static const mask upper = _CTu; ++ static const mask lower = _CTl; ++ static const mask alpha = _CTu | _CTl; ++ static const mask digit = _CTd; ++ static const mask xdigit = _CTx; ++ static const mask space = _CTs; ++ static const mask print = _CTP; ++ static const mask graph = _CTg; ++ static const mask cntrl = _CTc; ++ static const mask punct = _CTp; ++ static const mask alnum = _CTd | _CTu | _CTl ; ++ }; ++ ++_GLIBCXX_END_NAMESPACE_VERSION ++} // namespace +--- /dev/null ++++ b/src/libstdc++-v3/config/os/mint/ctype_inline.h +@@ -0,0 +1,76 @@ ++// Locale support -*- C++ -*- ++ ++// Copyright (C) 2000, 2003, 2009, 2010 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++/** @file bits/ctype_inline.h ++ * This is an internal header file, included by other library headers. ++ * Do not attempt to use it directly. @headername{locale} ++ */ ++ ++// ++// ISO C++ 14882: 22.1 Locales ++// ++ ++// ctype bits to be inlined go here. Non-inlinable (ie virtual do_*) ++// functions go in ctype.cc ++ ++// Mint C types, taken from mintlib-0.57.3/include/ctype.h ++ ++namespace std _GLIBCXX_VISIBILITY(default) ++{ ++_GLIBCXX_BEGIN_NAMESPACE_VERSION ++ ++ bool ++ ctype:: ++ is(mask __m, char __c) const ++ { return _ctype[(unsigned char)((__c) + 1)] & __m; } ++ ++ const char* ++ ctype:: ++ is(const char* __low, const char* __high, mask* __vec) const ++ { ++ while (__low < __high) ++ *__vec++ = _ctype[(*__low++) + 1] ; ++ return __high; ++ } ++ ++ const char* ++ ctype:: ++ scan_is(mask __m, const char* __low, const char* __high) const ++ { ++ while (__low < __high && !this->is(__m, *__low)) ++ ++__low; ++ return __low; ++ } ++ ++ const char* ++ ctype:: ++ scan_not(mask __m, const char* __low, const char* __high) const ++ { ++ while (__low < __high && this->is(__m, *__low) != 0) ++ ++__low; ++ return __low; ++ } ++ ++_GLIBCXX_END_NAMESPACE_VERSION ++} // namespace +--- /dev/null ++++ b/src/libstdc++-v3/config/os/mint/ctype_noninline.h +@@ -0,0 +1,92 @@ ++// Locale support -*- C++ -*- ++ ++// Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2009, 2010 ++// Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++/** @file bits/ctype_noninline.h ++ * This is an internal header file, included by other library headers. ++ * Do not attempt to use it directly. @headername{locale} ++ */ ++ ++// ++// ISO C++ 14882: 22.1 Locales ++// ++ ++// Information as gleaned from /usr/include/ctype.h ++ ++ const ctype_base::mask* ++ ctype::classic_table() throw() ++ { return 0; } ++ ++ ctype::ctype(__c_locale, const mask* __table, bool __del, ++ size_t __refs) ++ : facet(__refs), _M_del(__table != 0 && __del), ++ _M_toupper(NULL), _M_tolower(NULL), ++ _M_table(__table ? __table : classic_table()) ++ { ++ memset(_M_widen, 0, sizeof(_M_widen)); ++ _M_widen_ok = 0; ++ memset(_M_narrow, 0, sizeof(_M_narrow)); ++ _M_narrow_ok = 0; ++ } ++ ++ ctype::ctype(const mask* __table, bool __del, size_t __refs) ++ : facet(__refs), _M_del(__table != 0 && __del), ++ _M_toupper(NULL), _M_tolower(NULL), ++ _M_table(__table ? __table : classic_table()) ++ { ++ memset(_M_widen, 0, sizeof(_M_widen)); ++ _M_widen_ok = 0; ++ memset(_M_narrow, 0, sizeof(_M_narrow)); ++ _M_narrow_ok = 0; ++ } ++ ++ char ++ ctype::do_toupper(char __c) const ++ { return ::toupper((int) __c); } ++ ++ const char* ++ ctype::do_toupper(char* __low, const char* __high) const ++ { ++ while (__low < __high) ++ { ++ *__low = ::toupper((int) *__low); ++ ++__low; ++ } ++ return __high; ++ } ++ ++ char ++ ctype::do_tolower(char __c) const ++ { return ::tolower((int) __c); } ++ ++ const char* ++ ctype::do_tolower(char* __low, const char* __high) const ++ { ++ while (__low < __high) ++ { ++ *__low = ::tolower((int) *__low); ++ ++__low; ++ } ++ return __high; ++ } +--- /dev/null ++++ b/src/libstdc++-v3/config/os/mint/os_defines.h +@@ -0,0 +1,36 @@ ++// Specific definitions for generic platforms -*- C++ -*- ++ ++// Copyright (C) 2000, 2009, 2010 Free Software Foundation, Inc. ++// ++// This file is part of the GNU ISO C++ Library. This library is free ++// software; you can redistribute it and/or modify it under the ++// terms of the GNU General Public License as published by the ++// Free Software Foundation; either version 3, or (at your option) ++// any later version. ++ ++// This library is distributed in the hope that it will be useful, ++// but WITHOUT ANY WARRANTY; without even the implied warranty of ++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++// GNU General Public License for more details. ++ ++// Under Section 7 of GPL version 3, you are granted additional ++// permissions described in the GCC Runtime Library Exception, version ++// 3.1, as published by the Free Software Foundation. ++ ++// You should have received a copy of the GNU General Public License and ++// a copy of the GCC Runtime Library Exception along with this program; ++// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see ++// . ++ ++/** @file bits/os_defines.h ++ * This is an internal header file, included by other library headers. ++ * Do not attempt to use it directly. @headername{iosfwd} ++ */ ++ ++#ifndef _GLIBCXX_OS_DEFINES ++#define _GLIBCXX_OS_DEFINES 1 ++ ++// System-specific #define, typedefs, corrections, etc, go here. This ++// file will come before all others. ++ ++#endif +--- a/src/libstdc++-v3/configure.host ++++ b/src/libstdc++-v3/configure.host +@@ -258,6 +258,10 @@ case "${host_os}" in + error_constants_dir="os/mingw32" + OPT_LDFLAGS="${OPT_LDFLAGS} \$(lt_host_flags)" + ;; ++ mint*) ++ SECTION_FLAGS="${SECTION_FLAGS} -D_GNU_SOURCE" ++ os_include_dir="os/mint" ++ ;; + netbsd*) + os_include_dir="os/bsd/netbsd" + ;; +--- a/src/libstdc++-v3/crossconfig.m4 ++++ b/src/libstdc++-v3/crossconfig.m4 +@@ -141,7 +141,7 @@ case "${host}" in + ;; + esac + ;; +- *-linux* | *-uclinux* | *-gnu* | *-kfreebsd*-gnu | *-knetbsd*-gnu) ++ *-linux* | *-uclinux* | *-gnu* | *-kfreebsd*-gnu | *-knetbsd*-gnu | *-mint*) + GLIBCXX_CHECK_COMPILER_FEATURES + GLIBCXX_CHECK_LINKER_FEATURES + GLIBCXX_CHECK_MATH_SUPPORT diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-pr52391.diff gcc-4.6-4.6.4/debian/patches/m68k-pr52391.diff --- gcc-4.6-4.6.3/debian/patches/m68k-pr52391.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-pr52391.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,151 @@ +# DP: speed up genattrtab (2/3) + +[backport from gcc-4.8/trunk r187234 ] + +Date: Sun, 6 May 2012 23:49:19 +0200 +Subject: [patch][m68k] Remove sched_branch_type, reduce genattrtab run time to reasonable numbers +From: Steven Bosscher +List-Archive: + +Hello, + +Since around trunk r135033, m68k has some scheduler attributes that +are computed by C functions in m68k.c. Together with Richard +Sandiford's improvements to genattrtab optimizations, the run time for +genattrtab for m68k is >9 minutes on a fast machine (gcc110). + +With the attached patch, genattrtab goes down to less than 2 minutes. + +But the only thing the patch does, is remove a write-only array, +sched_branch_type! This array was apparently introduced to compute the +best type-attribute for four branch instructions, with a FIXME that +someone should implement the actual computations for the best type. +However, exactly four years have passed since this code was added, and +nobody has bothered to actually implement this better type attribute +assignment.To me, it makes no sense to keep this code around, given +the problems it creates for genattrtab. + +Tested by building a cross to m68k-linux. OK for trunk? + +Ciao! +Steven +gcc/ + +2012-05-07 Steven Bosscher + + * config/m68k/m68k.c (m68k_sched_branch_type): Remove. + (sched_branch_type): Remove. + (m68k_sched_md_init_global): Don't allocate it. + (m68k_sched_md_finish_global): Don't free it. + * config/m68k/m68k.h (m68k_sched_branch_type): Remove prototype. + * config/m68k/m68k.md: Set the type of insns using m68k_sched_branch_type + to bcc directly. + +--- a/src/gcc/config/m68k/m68k-protos.h ++++ b/src/gcc/config/m68k/m68k-protos.h +@@ -81,7 +81,6 @@ extern enum attr_opx_type m68k_sched_att + extern enum attr_opy_type m68k_sched_attr_opy_type (rtx, int); + extern enum attr_size m68k_sched_attr_size (rtx); + extern enum attr_op_mem m68k_sched_attr_op_mem (rtx); +-extern enum attr_type m68k_sched_branch_type (rtx); + #endif /* HAVE_ATTR_cpu */ + + #endif /* RTX_CODE */ +--- a/src/gcc/config/m68k/m68k.c ++++ b/src/gcc/config/m68k/m68k.c +@@ -5974,26 +5974,6 @@ m68k_sched_attr_op_mem (rtx insn) + return OP_MEM_I1; + } + +-/* Jump instructions types. Indexed by INSN_UID. +- The same rtl insn can be expanded into different asm instructions +- depending on the cc0_status. To properly determine type of jump +- instructions we scan instruction stream and map jumps types to this +- array. */ +-static enum attr_type *sched_branch_type; +- +-/* Return the type of the jump insn. */ +-enum attr_type +-m68k_sched_branch_type (rtx insn) +-{ +- enum attr_type type; +- +- type = sched_branch_type[INSN_UID (insn)]; +- +- gcc_assert (type != 0); +- +- return type; +-} +- + /* Data for ColdFire V4 index bypass. + Producer modifies register that is used as index in consumer with + specified scale. */ +@@ -6210,20 +6190,6 @@ m68k_sched_md_init_global (FILE *sched_d + int sched_verbose ATTRIBUTE_UNUSED, + int n_insns ATTRIBUTE_UNUSED) + { +- /* Init branch types. */ +- { +- rtx insn; +- +- sched_branch_type = XCNEWVEC (enum attr_type, get_max_uid () + 1); +- +- for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn)) +- { +- if (JUMP_P (insn)) +- /* !!! FIXME: Implement real scan here. */ +- sched_branch_type[INSN_UID (insn)] = TYPE_BCC; +- } +- } +- + #ifdef ENABLE_CHECKING + /* Check that all instructions have DFA reservations and + that all instructions can be issued from a clean state. */ +@@ -6305,9 +6271,6 @@ m68k_sched_md_finish_global (FILE *dump + sched_ib.records.adjust = NULL; + sched_ib.records.n_insns = 0; + max_insn_size = 0; +- +- free (sched_branch_type); +- sched_branch_type = NULL; + } + + /* Implementation of targetm.sched.init () hook. +--- a/src/gcc/config/m68k/m68k.md ++++ b/src/gcc/config/m68k/m68k.md +@@ -6323,7 +6323,7 @@ + { + OUTPUT_JUMP ("jeq %l0", "fjeq %l0", "jeq %l0"); + } +- [(set (attr "type") (symbol_ref "m68k_sched_branch_type (insn)"))]) ++ [(set_attr "type" "bcc")]) + + (define_insn "bne" + [(set (pc) +@@ -6335,7 +6335,7 @@ + { + OUTPUT_JUMP ("jne %l0", "fjne %l0", "jne %l0"); + } +- [(set (attr "type") (symbol_ref "m68k_sched_branch_type (insn)"))]) ++ [(set_attr "type" "bcc")]) + + (define_insn "bgt" + [(set (pc) +@@ -6353,7 +6353,7 @@ + + OUTPUT_JUMP ("jgt %l0", "fjgt %l0", 0); + } +- [(set (attr "type") (symbol_ref "m68k_sched_branch_type (insn)"))]) ++ [(set_attr "type" "bcc")]) + + (define_insn "bgtu" + [(set (pc) +@@ -6389,7 +6389,7 @@ + + OUTPUT_JUMP ("jlt %l0", "fjlt %l0", "jmi %l0"); + } +- [(set (attr "type") (symbol_ref "m68k_sched_branch_type (insn)"))]) ++ [(set_attr "type" "bcc")]) + + (define_insn "bltu" + [(set (pc) diff -Nru gcc-4.6-4.6.3/debian/patches/m68k-revert-pr45144.diff gcc-4.6-4.6.4/debian/patches/m68k-revert-pr45144.diff --- gcc-4.6-4.6.3/debian/patches/m68k-revert-pr45144.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/m68k-revert-pr45144.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,20 @@ +[revert the minor PR45144 missed-optimization fix because it + results in miscompilation of gnat on m68k with gcc-4.6 and 4.5; + with gcc-4.7 other changes mask the issue ] + + PR ada/48835 + +Index: gcc-4.6-4.6.3/src/gcc/tree-sra.c +=================================================================== +--- gcc-4.6-4.6.3.orig/src/gcc/tree-sra.c 2012-01-05 22:24:45.000000000 +0000 ++++ gcc-4.6-4.6.3/src/gcc/tree-sra.c 2012-03-04 16:01:53.000000000 +0000 +@@ -854,9 +854,6 @@ + { + tree ft = TREE_TYPE (fld); + +- if (DECL_BIT_FIELD (fld)) +- return false; +- + if (!is_gimple_reg_type (ft) + && !type_consists_of_records_p (ft)) + return false; diff -Nru gcc-4.6-4.6.3/debian/patches/ppl-version.diff gcc-4.6-4.6.4/debian/patches/ppl-version.diff --- gcc-4.6-4.6.3/debian/patches/ppl-version.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/ppl-version.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,16 @@ +# DP: recognize ppl version 1.0 + +--- a/src/configure.ac ++++ b/src/configure.ac +@@ -1577,8 +1579,10 @@ + CFLAGS="$CFLAGS $pplinc $gmpinc" + AC_MSG_CHECKING([for version 0.11 (revision 0 or later) of PPL]) + AC_TRY_COMPILE([#include "ppl_c.h"],[ +- #if PPL_VERSION_MAJOR != 0 || PPL_VERSION_MINOR < 11 ++ #if PPL_VERSION_MAJOR < 1 ++ # if PPL_VERSION_MINOR < 11 + choke me ++ # endif + #endif + ], [AC_MSG_RESULT([yes])], [AC_MSG_RESULT([no]); ppllibs= ; pplinc= ; with_ppl=no ]) + CFLAGS="$saved_CFLAGS" diff -Nru gcc-4.6-4.6.3/debian/patches/pr29442.diff gcc-4.6-4.6.4/debian/patches/pr29442.diff --- gcc-4.6-4.6.3/debian/patches/pr29442.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/pr29442.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,1492 @@ +# DP: speed up genattrtab (1/3) + +[backport from gcc-4.8/trunk r187181 ] + +gcc/ + +2012-05-04 Steven Bosscher + + PR other/29442 + * read-md.c (fprint_md_ptr_loc, fprint_c_condition): New functions. + (print_md_ptr_loc, print_c_condition): Use them. + * read-md.h (fprint_md_ptr_loc, fprint_c_condition): New prototypes. + * genattrtab.c (attr_file_name, dfa_file_name, latency_file_name, + attr_file, dfa_file, latency_file): New global variables. + (write_attr_valueq, write_attr_set, write_attr_case, write_attr_value, + write_upcase, write_indent, write_length_unit_log, write_test_expr, + write_attr_get, write_insn_cases, write_eligible_delay, + write_const_num_delay_slots): Accept FILE pointer and toss it around. + Update all callers. + (write_header, open_outfile, handle_arg): New funcions. + (make_automaton_attrs): Write prototypes as extern to the output + files. + (main): Use init_rtx_reader_args_cb with handle_arg to take 3 file + names from the command line. Open the output files and write out + internal functions for DFA functions to dfa_file_name, insn latency + functions to latency_file_name, and everything else to attr_file. + * Makefile.in (OBJS): Add insn-dfatab.o and insn-latencytab.o. + (BACKEND): Build libbackend first. + (MOSTLYCLEANFILES): Add insn-dfatab.c and insn-latencytab.c. + (.PRECIOUS): Likewise. + (insn-dfatab.o): New rule. + (insn-latencytab.o): New rule. + (simple_rtl_generated_c): Do not include insn-attrtab.c. + (s-attrtab): New rule. + +--- a/src/gcc/Makefile.in ++++ b/src/gcc/Makefile.in +@@ -1176,8 +1176,10 @@ C_OBJS = c-lang.o c-family/stub-objc.o $ + OBJS-common = \ + insn-attrtab.o \ + insn-automata.o \ ++ insn-dfatab.o \ + insn-emit.o \ + insn-extract.o \ ++ insn-latencytab.o \ + insn-modes.o \ + insn-opinit.o \ + insn-output.o \ +@@ -1496,11 +1498,12 @@ ALL_HOST_BACKEND_OBJS = $(GCC_OBJS) $(OB + # compilation or not. + ALL_HOST_OBJS = $(ALL_HOST_FRONTEND_OBJS) $(ALL_HOST_BACKEND_OBJS) + +-BACKEND = main.o @TREEBROWSER@ libbackend.a $(CPPLIB) $(LIBDECNUMBER) ++BACKEND = libbackend.a main.o @TREEBROWSER@ $(CPPLIB) $(LIBDECNUMBER) + + MOSTLYCLEANFILES = insn-flags.h insn-config.h insn-codes.h \ + insn-output.c insn-recog.c insn-emit.c insn-extract.c insn-peep.c \ +- insn-attr.h insn-attrtab.c insn-opinit.c insn-preds.c insn-constants.h \ ++ insn-attr.h insn-attrtab.c insn-dfatab.c insn-latencytab.c \ ++ insn-opinit.c insn-preds.c insn-constants.h \ + tm-preds.h tm-constrs.h checksum-options \ + tree-check.h min-insn-modes.c insn-modes.c insn-modes.h \ + genrtl.h gt-*.h gtype-*.h gtype-desc.c gtyp-input.list \ +@@ -3513,7 +3516,7 @@ mips-tdump.o : mips-tdump.c $(CONFIG_H) + + .PRECIOUS: insn-config.h insn-flags.h insn-codes.h insn-constants.h \ + insn-emit.c insn-recog.c insn-extract.c insn-output.c insn-peep.c \ +- insn-attr.h insn-attrtab.c insn-preds.c ++ insn-attr.h insn-attrtab.c insn-dfatab.c insn-latencytab.c insn-preds.c + + # Dependencies for the md file. The first time through, we just assume + # the md file itself and the generated dependency file (in order to get +@@ -3532,7 +3535,11 @@ insn-attrtab.o : insn-attrtab.c $(CONFIG + insn-config.h $(DIAGNOSTIC_CORE_H) $(RECOG_H) $(TM_P_H) $(FLAGS_H) + insn-automata.o : insn-automata.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(RTL_H) $(REGS_H) output.h $(INSN_ATTR_H) \ +- insn-config.h toplev.h $(DIAGNOSTIC_CORE_H) $(RECOG_H) $(TM_P_H) $(FLAGS_H) $(EMIT_RTL_H) ++ insn-config.h toplev.h $(DIAGNOSTIC_CORE_H) $(RECOG_H) \ ++ $(TM_P_H) $(FLAGS_H) $(EMIT_RTL_H) ++insn-dfatab.o : insn-dfatab.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ ++ $(TM_H) $(RTL_H) $(REGS_H) output.h $(INSN_ATTR_H) \ ++ insn-config.h $(DIAGNOSTIC_CORE_H) $(RECOG_H) $(TM_P_H) $(FLAGS_H) + insn-emit.o : insn-emit.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(RTL_H) $(TM_P_H) $(FUNCTION_H) $(EXPR_H) $(OPTABS_H) \ + dfp.h $(FLAGS_H) output.h insn-config.h hard-reg-set.h $(RECOG_H) \ +@@ -3541,6 +3548,9 @@ insn-emit.o : insn-emit.c $(CONFIG_H) $( + insn-enums.o : insn-enums.c $(CONFIG_H) $(SYSTEM_H) insn-constants.h + insn-extract.o : insn-extract.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ + $(TM_H) $(RTL_H) $(DIAGNOSTIC_CORE_H) insn-config.h $(RECOG_H) ++insn-latencytab.o : insn-latencytab.c $(CONFIG_H) $(SYSTEM_H) \ ++ coretypes.h $(TM_H) $(RTL_H) $(REGS_H) output.h $(INSN_ATTR_H) \ ++ insn-config.h $(DIAGNOSTIC_CORE_H) $(RECOG_H) $(TM_P_H) $(FLAGS_H) + insn-modes.o : insn-modes.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \ + $(MACHMODE_H) + insn-opinit.o : insn-opinit.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \ +@@ -3572,7 +3582,7 @@ insn-recog.o : insn-recog.c $(CONFIG_H) + + simple_rtl_generated_h = insn-attr.h insn-codes.h insn-config.h insn-flags.h + +-simple_rtl_generated_c = insn-attrtab.c insn-automata.c insn-emit.c \ ++simple_rtl_generated_c = insn-automata.c insn-emit.c \ + insn-extract.c insn-opinit.c insn-output.c \ + insn-peep.c insn-recog.c + +@@ -3609,6 +3619,17 @@ s-check : build/gencheck$(build_exeext) + $(SHELL) $(srcdir)/../move-if-change tmp-check.h tree-check.h + $(STAMP) s-check + ++# genattrtab produces three files: tmp-{attrtab.c,dfatab.c,latencytab.c} ++insn-attrtab.c insn-dfatab.c insn-latencytab.c: s-attrtab ; @true ++s-attrtab : $(MD_DEPS) build/genattrtab$(build_exeext) \ ++ insn-conditions.md ++ $(RUN_GEN) build/genattrtab$(build_exeext) $(md_file) insn-conditions.md \ ++ -Atmp-attrtab.c -Dtmp-dfatab.c -Ltmp-latencytab.c ++ $(SHELL) $(srcdir)/../move-if-change tmp-attrtab.c insn-attrtab.c ++ $(SHELL) $(srcdir)/../move-if-change tmp-dfatab.c insn-dfatab.c ++ $(SHELL) $(srcdir)/../move-if-change tmp-latencytab.c insn-latencytab.c ++ $(STAMP) s-attrtab ++ + # gencondmd doesn't use the standard naming convention. + build/gencondmd.c: s-conditions; @true + s-conditions: $(MD_DEPS) build/genconditions$(build_exeext) +--- a/src/gcc/genattrtab.c ++++ b/src/gcc/genattrtab.c +@@ -274,16 +274,17 @@ static rtx copy_rtx_unchanging (rtx); + static bool attr_alt_subset_p (rtx, rtx); + static bool attr_alt_subset_of_compl_p (rtx, rtx); + static void clear_struct_flag (rtx); +-static void write_attr_valueq (struct attr_desc *, const char *); ++static void write_attr_valueq (FILE *, struct attr_desc *, const char *); + static struct attr_value *find_most_used (struct attr_desc *); +-static void write_attr_set (struct attr_desc *, int, rtx, ++static void write_attr_set (FILE *, struct attr_desc *, int, rtx, + const char *, const char *, rtx, + int, int, unsigned int); +-static void write_attr_case (struct attr_desc *, struct attr_value *, ++static void write_attr_case (FILE *, struct attr_desc *, ++ struct attr_value *, + int, const char *, const char *, int, rtx); +-static void write_attr_value (struct attr_desc *, rtx); +-static void write_upcase (const char *); +-static void write_indent (int); ++static void write_attr_value (FILE *, struct attr_desc *, rtx); ++static void write_upcase (FILE *, const char *); ++static void write_indent (FILE *, int); + static rtx identity_fn (rtx); + static rtx zero_fn (rtx); + static rtx one_fn (rtx); +@@ -293,6 +294,23 @@ static rtx min_fn (rtx); + #define oballoc(T) XOBNEW (hash_obstack, T) + #define oballocvec(T, N) XOBNEWVEC (hash_obstack, T, (N)) + ++/* This gen* file is unique, in that it writes out multiple files. ++ ++ Before GCC 4.8, insn-attrtab.c was written out containing many large ++ functions and tables. This made insn-attrtab.c _the_ bottle-neck in ++ a parallel build, and even made it impossible to build GCC on machines ++ with relatively small RAM space (PR other/29442). Therefore, the ++ atrribute functions/tables are now written out to three separate ++ files: all "*insn_default_latency" functions go to LATENCY_FILE_NAME, ++ all "*internal_dfa_insn_code" functions go to DFA_FILE_NAME, and the ++ rest goes to ATTR_FILE_NAME. */ ++ ++static const char *attr_file_name = NULL; ++static const char *dfa_file_name = NULL; ++static const char *latency_file_name = NULL; ++ ++static FILE *attr_file, *dfa_file, *latency_file; ++ + /* Hash table for sharing RTL and strings. */ + + /* Each hash table slot is a bucket containing a chain of these structures. +@@ -1596,7 +1614,7 @@ min_fn (rtx exp) + } + + static void +-write_length_unit_log (void) ++write_length_unit_log (FILE *outf) + { + struct attr_desc *length_attr = find_attr (&length_str, 0); + struct attr_value *av; +@@ -1619,7 +1637,7 @@ write_length_unit_log (void) + for (length_unit_log = 0; length_or & 1; length_or >>= 1) + length_unit_log++; + } +- printf ("EXPORTED_CONST int length_unit_log = %u;\n", length_unit_log); ++ fprintf (outf, "EXPORTED_CONST int length_unit_log = %u;\n", length_unit_log); + } + + /* Take a COND expression and see if any of the conditions in it can be +@@ -3200,7 +3218,7 @@ find_attrs_to_cache (rtx exp, bool creat + } + } + +-/* Given a piece of RTX, print a C expression to test its truth value. ++/* Given a piece of RTX, print a C expression to test its truth value to OUTF. + We use AND and IOR both for logical and bit-wise operations, so + interpret them as logical unless they are inside a comparison expression. */ + +@@ -3218,7 +3236,7 @@ find_attrs_to_cache (rtx exp, bool creat + #define FLG_OUTSIDE_AND 8 + + static unsigned int +-write_test_expr (rtx exp, unsigned int attrs_cached, int flags) ++write_test_expr (FILE *outf, rtx exp, unsigned int attrs_cached, int flags) + { + int comparison_operator = 0; + RTX_CODE code; +@@ -3227,14 +3245,14 @@ write_test_expr (rtx exp, unsigned int a + /* In order not to worry about operator precedence, surround our part of + the expression with parentheses. */ + +- printf ("("); ++ fprintf (outf, "("); + code = GET_CODE (exp); + switch (code) + { + /* Binary operators. */ + case GEU: case GTU: + case LEU: case LTU: +- printf ("(unsigned) "); ++ fprintf (outf, "(unsigned) "); + /* Fall through. */ + + case EQ: case NE: +@@ -3248,7 +3266,7 @@ write_test_expr (rtx exp, unsigned int a + if ((code != AND && code != IOR) || (flags & FLG_BITWISE)) + { + flags &= ~(FLG_AFTER | FLG_INSIDE | FLG_OUTSIDE_AND); +- write_test_expr (XEXP (exp, 0), attrs_cached, ++ write_test_expr (outf, XEXP (exp, 0), attrs_cached, + flags | comparison_operator); + } + else +@@ -3260,78 +3278,78 @@ write_test_expr (rtx exp, unsigned int a + || (GET_CODE (XEXP (exp, 0)) == NOT + && GET_CODE (XEXP (XEXP (exp, 0), 0)) == EQ_ATTR)) + attrs_cached +- = write_test_expr (XEXP (exp, 0), attrs_cached, flags); ++ = write_test_expr (outf, XEXP (exp, 0), attrs_cached, flags); + else +- write_test_expr (XEXP (exp, 0), attrs_cached, flags); ++ write_test_expr (outf, XEXP (exp, 0), attrs_cached, flags); + } + switch (code) + { + case EQ: +- printf (" == "); ++ fprintf (outf, " == "); + break; + case NE: +- printf (" != "); ++ fprintf (outf, " != "); + break; + case GE: +- printf (" >= "); ++ fprintf (outf, " >= "); + break; + case GT: +- printf (" > "); ++ fprintf (outf, " > "); + break; + case GEU: +- printf (" >= (unsigned) "); ++ fprintf (outf, " >= (unsigned) "); + break; + case GTU: +- printf (" > (unsigned) "); ++ fprintf (outf, " > (unsigned) "); + break; + case LE: +- printf (" <= "); ++ fprintf (outf, " <= "); + break; + case LT: +- printf (" < "); ++ fprintf (outf, " < "); + break; + case LEU: +- printf (" <= (unsigned) "); ++ fprintf (outf, " <= (unsigned) "); + break; + case LTU: +- printf (" < (unsigned) "); ++ fprintf (outf, " < (unsigned) "); + break; + case PLUS: +- printf (" + "); ++ fprintf (outf, " + "); + break; + case MINUS: +- printf (" - "); ++ fprintf (outf, " - "); + break; + case MULT: +- printf (" * "); ++ fprintf (outf, " * "); + break; + case DIV: +- printf (" / "); ++ fprintf (outf, " / "); + break; + case MOD: +- printf (" %% "); ++ fprintf (outf, " %% "); + break; + case AND: + if (flags & FLG_BITWISE) +- printf (" & "); ++ fprintf (outf, " & "); + else +- printf (" && "); ++ fprintf (outf, " && "); + break; + case IOR: + if (flags & FLG_BITWISE) +- printf (" | "); ++ fprintf (outf, " | "); + else +- printf (" || "); ++ fprintf (outf, " || "); + break; + case XOR: +- printf (" ^ "); ++ fprintf (outf, " ^ "); + break; + case ASHIFT: +- printf (" << "); ++ fprintf (outf, " << "); + break; + case LSHIFTRT: + case ASHIFTRT: +- printf (" >> "); ++ fprintf (outf, " >> "); + break; + default: + gcc_unreachable (); +@@ -3362,9 +3380,9 @@ write_test_expr (rtx exp, unsigned int a + || (GET_CODE (XEXP (exp, 1)) == NOT + && GET_CODE (XEXP (XEXP (exp, 1), 0)) == EQ_ATTR))) + attrs_cached +- = write_test_expr (XEXP (exp, 1), attrs_cached, flags); ++ = write_test_expr (outf, XEXP (exp, 1), attrs_cached, flags); + else +- write_test_expr (XEXP (exp, 1), attrs_cached, ++ write_test_expr (outf, XEXP (exp, 1), attrs_cached, + flags | comparison_operator); + break; + +@@ -3374,12 +3392,14 @@ write_test_expr (rtx exp, unsigned int a + { + if (XSTR (XEXP (exp, 0), 0) == alternative_name) + { +- printf ("which_alternative != %s", XSTR (XEXP (exp, 0), 1)); ++ fprintf (outf, "which_alternative != %s", ++ XSTR (XEXP (exp, 0), 1)); + break; + } + +- printf ("! "); +- attrs_cached = write_test_expr (XEXP (exp, 0), attrs_cached, flags); ++ fprintf (outf, "! "); ++ attrs_cached = ++ write_test_expr (outf, XEXP (exp, 0), attrs_cached, flags); + break; + } + +@@ -3391,22 +3411,22 @@ write_test_expr (rtx exp, unsigned int a + { + case NOT: + if (flags & FLG_BITWISE) +- printf ("~ "); ++ fprintf (outf, "~ "); + else +- printf ("! "); ++ fprintf (outf, "! "); + break; + case ABS: +- printf ("abs "); ++ fprintf (outf, "abs "); + break; + case NEG: +- printf ("-"); ++ fprintf (outf, "-"); + break; + default: + gcc_unreachable (); + } + + flags &= ~(FLG_AFTER | FLG_INSIDE | FLG_OUTSIDE_AND); +- write_test_expr (XEXP (exp, 0), attrs_cached, flags); ++ write_test_expr (outf, XEXP (exp, 0), attrs_cached, flags); + break; + + case EQ_ATTR_ALT: +@@ -3444,13 +3464,13 @@ write_test_expr (rtx exp, unsigned int a + if (!(set & 1)) + bit++; + +- printf ("which_alternative %s= %d", +- XINT (exp, 1) ? "!" : "=", bit); ++ fprintf (outf, "which_alternative %s= %d", ++ XINT (exp, 1) ? "!" : "=", bit); + } + else + { +- printf ("%s((1 << which_alternative) & %#x)", +- XINT (exp, 1) ? "!" : "", set); ++ fprintf (outf, "%s((1 << which_alternative) & %#x)", ++ XINT (exp, 1) ? "!" : "", set); + } + } + break; +@@ -3464,7 +3484,7 @@ write_test_expr (rtx exp, unsigned int a + + if (XSTR (exp, 0) == alternative_name) + { +- printf ("which_alternative == %s", XSTR (exp, 1)); ++ fprintf (outf, "which_alternative == %s", XSTR (exp, 1)); + break; + } + +@@ -3474,8 +3494,10 @@ write_test_expr (rtx exp, unsigned int a + /* Now is the time to expand the value of a constant attribute. */ + if (attr->is_const) + { +- write_test_expr (evaluate_eq_attr (exp, attr, +- attr->default_val->value, -2, -2), ++ write_test_expr (outf, ++ evaluate_eq_attr (exp, attr, ++ attr->default_val->value, ++ -2, -2), + attrs_cached, 0); + } + else +@@ -3485,10 +3507,10 @@ write_test_expr (rtx exp, unsigned int a + if (attr->name == cached_attrs[i]) + break; + if (i < cached_attr_count && (attrs_cached & (1U << i)) != 0) +- printf ("cached_%s", attr->name); ++ fprintf (outf, "cached_%s", attr->name); + else if (i < cached_attr_count && (attrs_to_cache & (1U << i)) != 0) + { +- printf ("(cached_%s = get_attr_%s (insn))", ++ fprintf (outf, "(cached_%s = get_attr_%s (insn))", + attr->name, attr->name); + if (flags & FLG_AFTER) + attrs_cached_after |= (1U << i); +@@ -3497,9 +3519,9 @@ write_test_expr (rtx exp, unsigned int a + attrs_cached |= (1U << i); + } + else +- printf ("get_attr_%s (insn)", attr->name); +- printf (" == "); +- write_attr_valueq (attr, XSTR (exp, 1)); ++ fprintf (outf, "get_attr_%s (insn)", attr->name); ++ fprintf (outf, " == "); ++ write_attr_valueq (outf, attr, XSTR (exp, 1)); + } + break; + +@@ -3507,7 +3529,7 @@ write_test_expr (rtx exp, unsigned int a + case ATTR_FLAG: + if (flags & FLG_BITWISE) + fatal ("ATTR_FLAG not valid inside comparison"); +- printf ("(flags & ATTR_FLAG_%s) != 0", XSTR (exp, 0)); ++ fprintf (outf, "(flags & ATTR_FLAG_%s) != 0", XSTR (exp, 0)); + break; + + /* See if an operand matches a predicate. */ +@@ -3519,28 +3541,29 @@ write_test_expr (rtx exp, unsigned int a + if (GET_MODE (exp) == VOIDmode) + fatal ("null MATCH_OPERAND specified as test"); + else +- printf ("GET_MODE (operands[%d]) == %smode", +- XINT (exp, 0), GET_MODE_NAME (GET_MODE (exp))); ++ fprintf (outf, "GET_MODE (operands[%d]) == %smode", ++ XINT (exp, 0), GET_MODE_NAME (GET_MODE (exp))); + } + else +- printf ("%s (operands[%d], %smode)", +- XSTR (exp, 1), XINT (exp, 0), GET_MODE_NAME (GET_MODE (exp))); ++ fprintf (outf, "%s (operands[%d], %smode)", ++ XSTR (exp, 1), XINT (exp, 0), GET_MODE_NAME (GET_MODE (exp))); + break; + + /* Constant integer. */ + case CONST_INT: +- printf (HOST_WIDE_INT_PRINT_DEC, XWINT (exp, 0)); ++ fprintf (outf, HOST_WIDE_INT_PRINT_DEC, XWINT (exp, 0)); + break; + + /* A random C expression. */ + case SYMBOL_REF: +- print_c_condition (XSTR (exp, 0)); ++ fprint_c_condition (outf, XSTR (exp, 0)); + break; + + /* The address of the branch target. */ + case MATCH_DUP: +- printf ("INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[%d]) == LABEL_REF ? XEXP (operands[%d], 0) : operands[%d])) : 0", +- XINT (exp, 0), XINT (exp, 0), XINT (exp, 0)); ++ fprintf (outf, ++ "INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[%d]) == LABEL_REF ? XEXP (operands[%d], 0) : operands[%d])) : 0", ++ XINT (exp, 0), XINT (exp, 0), XINT (exp, 0)); + break; + + case PC: +@@ -3549,19 +3572,19 @@ write_test_expr (rtx exp, unsigned int a + address of the next insn for forward branches, and both with + adjustments that account for the worst-case possible stretching of + intervening alignments between this insn and its destination. */ +- printf ("insn_current_reference_address (insn)"); ++ fprintf (outf, "insn_current_reference_address (insn)"); + break; + + case CONST_STRING: +- printf ("%s", XSTR (exp, 0)); ++ fprintf (outf, "%s", XSTR (exp, 0)); + break; + + case IF_THEN_ELSE: +- write_test_expr (XEXP (exp, 0), attrs_cached, 0); +- printf (" ? "); +- write_test_expr (XEXP (exp, 1), attrs_cached, FLG_BITWISE); +- printf (" : "); +- write_test_expr (XEXP (exp, 2), attrs_cached, FLG_BITWISE); ++ write_test_expr (outf, XEXP (exp, 0), attrs_cached, 0); ++ fprintf (outf, " ? "); ++ write_test_expr (outf, XEXP (exp, 1), attrs_cached, FLG_BITWISE); ++ fprintf (outf, " : "); ++ write_test_expr (outf, XEXP (exp, 2), attrs_cached, FLG_BITWISE); + break; + + default: +@@ -3569,7 +3592,7 @@ write_test_expr (rtx exp, unsigned int a + GET_RTX_NAME (code)); + } + +- printf (")"); ++ fprintf (outf, ")"); + return attrs_cached; + } + +@@ -3772,7 +3795,7 @@ walk_attr_value (rtx exp) + /* Write out a function to obtain the attribute for a given INSN. */ + + static void +-write_attr_get (struct attr_desc *attr) ++write_attr_get (FILE *outf, struct attr_desc *attr) + { + struct attr_value *av, *common_av; + int i, j; +@@ -3784,37 +3807,37 @@ write_attr_get (struct attr_desc *attr) + /* Write out start of function, then all values with explicit `case' lines, + then a `default', then the value with the most uses. */ + if (attr->enum_name) +- printf ("enum %s\n", attr->enum_name); ++ fprintf (outf, "enum %s\n", attr->enum_name); + else if (!attr->is_numeric) +- printf ("enum attr_%s\n", attr->name); ++ fprintf (outf, "enum attr_%s\n", attr->name); + else +- printf ("int\n"); ++ fprintf (outf, "int\n"); + + /* If the attribute name starts with a star, the remainder is the name of + the subroutine to use, instead of `get_attr_...'. */ + if (attr->name[0] == '*') +- printf ("%s (rtx insn ATTRIBUTE_UNUSED)\n", &attr->name[1]); ++ fprintf (outf, "%s (rtx insn ATTRIBUTE_UNUSED)\n", &attr->name[1]); + else if (attr->is_const == 0) +- printf ("get_attr_%s (rtx insn ATTRIBUTE_UNUSED)\n", attr->name); ++ fprintf (outf, "get_attr_%s (rtx insn ATTRIBUTE_UNUSED)\n", attr->name); + else + { +- printf ("get_attr_%s (void)\n", attr->name); +- printf ("{\n"); ++ fprintf (outf, "get_attr_%s (void)\n", attr->name); ++ fprintf (outf, "{\n"); + + for (av = attr->first_value; av; av = av->next) + if (av->num_insns == 1) +- write_attr_set (attr, 2, av->value, "return", ";", ++ write_attr_set (outf, attr, 2, av->value, "return", ";", + true_rtx, av->first_insn->def->insn_code, + av->first_insn->def->insn_index, 0); + else if (av->num_insns != 0) +- write_attr_set (attr, 2, av->value, "return", ";", ++ write_attr_set (outf, attr, 2, av->value, "return", ";", + true_rtx, -2, 0, 0); + +- printf ("}\n\n"); ++ fprintf (outf, "}\n\n"); + return; + } + +- printf ("{\n"); ++ fprintf (outf, "{\n"); + + /* Find attributes that are worth caching in the conditions. */ + cached_attr_count = 0; +@@ -3835,27 +3858,27 @@ write_attr_get (struct attr_desc *attr) + cached_attr = find_attr (&name, 0); + gcc_assert (cached_attr && cached_attr->is_const == 0); + if (cached_attr->enum_name) +- printf (" enum %s", cached_attr->enum_name); ++ fprintf (outf, " enum %s", cached_attr->enum_name); + else if (!cached_attr->is_numeric) +- printf (" enum attr_%s", cached_attr->name); ++ fprintf (outf, " enum attr_%s", cached_attr->name); + else +- printf (" int"); +- printf (" cached_%s ATTRIBUTE_UNUSED;\n", name); ++ fprintf (outf, " int"); ++ fprintf (outf, " cached_%s ATTRIBUTE_UNUSED;\n", name); + j++; + } + cached_attr_count = j; + if (cached_attr_count) +- printf ("\n"); ++ fprintf (outf, "\n"); + +- printf (" switch (recog_memoized (insn))\n"); +- printf (" {\n"); ++ fprintf (outf, " switch (recog_memoized (insn))\n"); ++ fprintf (outf, " {\n"); + + for (av = attr->first_value; av; av = av->next) + if (av != common_av) +- write_attr_case (attr, av, 1, "return", ";", 4, true_rtx); ++ write_attr_case (outf, attr, av, 1, "return", ";", 4, true_rtx); + +- write_attr_case (attr, common_av, 0, "return", ";", 4, true_rtx); +- printf (" }\n}\n\n"); ++ write_attr_case (outf, attr, common_av, 0, "return", ";", 4, true_rtx); ++ fprintf (outf, " }\n}\n\n"); + cached_attr_count = 0; + } + +@@ -3893,7 +3916,7 @@ eliminate_known_true (rtx known_true, rt + and ";"). */ + + static void +-write_attr_set (struct attr_desc *attr, int indent, rtx value, ++write_attr_set (FILE *outf, struct attr_desc *attr, int indent, rtx value, + const char *prefix, const char *suffix, rtx known_true, + int insn_code, int insn_index, unsigned int attrs_cached) + { +@@ -3948,49 +3971,49 @@ write_attr_set (struct attr_desc *attr, + + attrs_cached_inside = attrs_cached; + attrs_cached_after = attrs_cached; +- write_indent (indent); +- printf ("%sif ", first_if ? "" : "else "); ++ write_indent (outf, indent); ++ fprintf (outf, "%sif ", first_if ? "" : "else "); + first_if = 0; +- write_test_expr (testexp, attrs_cached, ++ write_test_expr (outf, testexp, attrs_cached, + (FLG_AFTER | FLG_INSIDE | FLG_OUTSIDE_AND)); + attrs_cached = attrs_cached_after; +- printf ("\n"); +- write_indent (indent + 2); +- printf ("{\n"); ++ fprintf (outf, "\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "{\n"); + +- write_attr_set (attr, indent + 4, ++ write_attr_set (outf, attr, indent + 4, + XVECEXP (value, 0, i + 1), prefix, suffix, + inner_true, insn_code, insn_index, + attrs_cached_inside); +- write_indent (indent + 2); +- printf ("}\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "}\n"); + our_known_true = newexp; + } + + if (! first_if) + { +- write_indent (indent); +- printf ("else\n"); +- write_indent (indent + 2); +- printf ("{\n"); ++ write_indent (outf, indent); ++ fprintf (outf, "else\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "{\n"); + } + +- write_attr_set (attr, first_if ? indent : indent + 4, default_val, ++ write_attr_set (outf, attr, first_if ? indent : indent + 4, default_val, + prefix, suffix, our_known_true, insn_code, insn_index, + attrs_cached); + + if (! first_if) + { +- write_indent (indent + 2); +- printf ("}\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "}\n"); + } + } + else + { +- write_indent (indent); +- printf ("%s ", prefix); +- write_attr_value (attr, value); +- printf ("%s\n", suffix); ++ write_indent (outf, indent); ++ fprintf (outf, "%s ", prefix); ++ write_attr_value (outf, attr, value); ++ fprintf (outf, "%s\n", suffix); + } + } + +@@ -3998,25 +4021,25 @@ write_attr_set (struct attr_desc *attr, + INDENT is the amount of indentation to write before each case. */ + + static void +-write_insn_cases (struct insn_ent *ie, int indent) ++write_insn_cases (FILE *outf, struct insn_ent *ie, int indent) + { + for (; ie != 0; ie = ie->next) + if (ie->def->insn_code != -1) + { +- write_indent (indent); ++ write_indent (outf, indent); + if (GET_CODE (ie->def->def) == DEFINE_PEEPHOLE) +- printf ("case %d: /* define_peephole, line %d */\n", +- ie->def->insn_code, ie->def->lineno); ++ fprintf (outf, "case %d: /* define_peephole, line %d */\n", ++ ie->def->insn_code, ie->def->lineno); + else +- printf ("case %d: /* %s */\n", +- ie->def->insn_code, XSTR (ie->def->def, 0)); ++ fprintf (outf, "case %d: /* %s */\n", ++ ie->def->insn_code, XSTR (ie->def->def, 0)); + } + } + + /* Write out the computation for one attribute value. */ + + static void +-write_attr_case (struct attr_desc *attr, struct attr_value *av, ++write_attr_case (FILE *outf, struct attr_desc *attr, struct attr_value *av, + int write_case_lines, const char *prefix, const char *suffix, + int indent, rtx known_true) + { +@@ -4025,22 +4048,22 @@ write_attr_case (struct attr_desc *attr, + + if (av->has_asm_insn) + { +- write_indent (indent); +- printf ("case -1:\n"); +- write_indent (indent + 2); +- printf ("if (GET_CODE (PATTERN (insn)) != ASM_INPUT\n"); +- write_indent (indent + 2); +- printf (" && asm_noperands (PATTERN (insn)) < 0)\n"); +- write_indent (indent + 2); +- printf (" fatal_insn_not_found (insn);\n"); ++ write_indent (outf, indent); ++ fprintf (outf, "case -1:\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "if (GET_CODE (PATTERN (insn)) != ASM_INPUT\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, " && asm_noperands (PATTERN (insn)) < 0)\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, " fatal_insn_not_found (insn);\n"); + } + + if (write_case_lines) +- write_insn_cases (av->first_insn, indent); ++ write_insn_cases (outf, av->first_insn, indent); + else + { +- write_indent (indent); +- printf ("default:\n"); ++ write_indent (outf, indent); ++ fprintf (outf, "default:\n"); + } + + /* See what we have to do to output this value. */ +@@ -4049,78 +4072,78 @@ write_attr_case (struct attr_desc *attr, + + if (must_constrain) + { +- write_indent (indent + 2); +- printf ("extract_constrain_insn_cached (insn);\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "extract_constrain_insn_cached (insn);\n"); + } + else if (must_extract) + { +- write_indent (indent + 2); +- printf ("extract_insn_cached (insn);\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "extract_insn_cached (insn);\n"); + } + + attrs_to_cache = 0; + if (av->num_insns == 1) +- write_attr_set (attr, indent + 2, av->value, prefix, suffix, ++ write_attr_set (outf, attr, indent + 2, av->value, prefix, suffix, + known_true, av->first_insn->def->insn_code, + av->first_insn->def->insn_index, 0); + else +- write_attr_set (attr, indent + 2, av->value, prefix, suffix, ++ write_attr_set (outf, attr, indent + 2, av->value, prefix, suffix, + known_true, -2, 0, 0); + + if (strncmp (prefix, "return", 6)) + { +- write_indent (indent + 2); +- printf ("break;\n"); ++ write_indent (outf, indent + 2); ++ fprintf (outf, "break;\n"); + } +- printf ("\n"); ++ fprintf (outf, "\n"); + } + + /* Utilities to write in various forms. */ + + static void +-write_attr_valueq (struct attr_desc *attr, const char *s) ++write_attr_valueq (FILE *outf, struct attr_desc *attr, const char *s) + { + if (attr->is_numeric) + { + int num = atoi (s); + +- printf ("%d", num); ++ fprintf (outf, "%d", num); + + if (num > 9 || num < 0) +- printf (" /* %#x */", num); ++ fprintf (outf, " /* %#x */", num); + } + else + { +- write_upcase (attr->enum_name ? attr->enum_name : attr->name); +- printf ("_"); +- write_upcase (s); ++ write_upcase (outf, attr->enum_name ? attr->enum_name : attr->name); ++ fprintf (outf, "_"); ++ write_upcase (outf, s); + } + } + + static void +-write_attr_value (struct attr_desc *attr, rtx value) ++write_attr_value (FILE *outf, struct attr_desc *attr, rtx value) + { + int op; + + switch (GET_CODE (value)) + { + case CONST_STRING: +- write_attr_valueq (attr, XSTR (value, 0)); ++ write_attr_valueq (outf, attr, XSTR (value, 0)); + break; + + case CONST_INT: +- printf (HOST_WIDE_INT_PRINT_DEC, INTVAL (value)); ++ fprintf (outf, HOST_WIDE_INT_PRINT_DEC, INTVAL (value)); + break; + + case SYMBOL_REF: +- print_c_condition (XSTR (value, 0)); ++ fprint_c_condition (outf, XSTR (value, 0)); + break; + + case ATTR: + { + struct attr_desc *attr2 = find_attr (&XSTR (value, 0), 0); +- printf ("get_attr_%s (%s)", attr2->name, +- (attr2->is_const ? "" : "insn")); ++ fprintf (outf, "get_attr_%s (%s)", attr2->name, ++ (attr2->is_const ? "" : "insn")); + } + break; + +@@ -4141,11 +4164,11 @@ write_attr_value (struct attr_desc *attr + goto do_operator; + + do_operator: +- write_attr_value (attr, XEXP (value, 0)); +- putchar (' '); +- putchar (op); +- putchar (' '); +- write_attr_value (attr, XEXP (value, 1)); ++ write_attr_value (outf, attr, XEXP (value, 0)); ++ fputc (' ', outf); ++ fputc (op, outf); ++ fputc (' ', outf); ++ write_attr_value (outf, attr, XEXP (value, 1)); + break; + + default: +@@ -4154,24 +4177,24 @@ write_attr_value (struct attr_desc *attr + } + + static void +-write_upcase (const char *str) ++write_upcase (FILE *outf, const char *str) + { + while (*str) + { + /* The argument of TOUPPER should not have side effects. */ +- putchar (TOUPPER(*str)); ++ fputc (TOUPPER(*str), outf); + str++; + } + } + + static void +-write_indent (int indent) ++write_indent (FILE *outf, int indent) + { + for (; indent > 8; indent -= 8) +- printf ("\t"); ++ fprintf (outf, "\t"); + + for (; indent; indent--) +- printf (" "); ++ fprintf (outf, " "); + } + + /* Write a subroutine that is given an insn that requires a delay slot, a +@@ -4187,7 +4210,7 @@ write_indent (int indent) + or "annul_false"). */ + + static void +-write_eligible_delay (const char *kind) ++write_eligible_delay (FILE *outf, const char *kind) + { + struct delay_desc *delay; + int max_slots; +@@ -4207,19 +4230,20 @@ write_eligible_delay (const char *kind) + + /* Write function prelude. */ + +- printf ("int\n"); +- printf ("eligible_for_%s (rtx delay_insn ATTRIBUTE_UNUSED, int slot, rtx candidate_insn, int flags ATTRIBUTE_UNUSED)\n", +- kind); +- printf ("{\n"); +- printf (" rtx insn;\n"); +- printf ("\n"); +- printf (" gcc_assert (slot < %d);\n", max_slots); +- printf ("\n"); ++ fprintf (outf, "int\n"); ++ fprintf (outf, "eligible_for_%s (rtx delay_insn ATTRIBUTE_UNUSED, int slot, \n" ++ " rtx candidate_insn, int flags ATTRIBUTE_UNUSED)\n", ++ kind); ++ fprintf (outf, "{\n"); ++ fprintf (outf, " rtx insn;\n"); ++ fprintf (outf, "\n"); ++ fprintf (outf, " gcc_assert (slot < %d);\n", max_slots); ++ fprintf (outf, "\n"); + /* Allow dbr_schedule to pass labels, etc. This can happen if try_split + converts a compound instruction into a loop. */ +- printf (" if (!INSN_P (candidate_insn))\n"); +- printf (" return 0;\n"); +- printf ("\n"); ++ fprintf (outf, " if (!INSN_P (candidate_insn))\n"); ++ fprintf (outf, " return 0;\n"); ++ fprintf (outf, "\n"); + + /* If more than one delay type, find out which type the delay insn is. */ + +@@ -4229,28 +4253,28 @@ write_eligible_delay (const char *kind) + gcc_assert (attr); + common_av = find_most_used (attr); + +- printf (" insn = delay_insn;\n"); +- printf (" switch (recog_memoized (insn))\n"); +- printf (" {\n"); ++ fprintf (outf, " insn = delay_insn;\n"); ++ fprintf (outf, " switch (recog_memoized (insn))\n"); ++ fprintf (outf, " {\n"); + + sprintf (str, " * %d;\n break;", max_slots); + for (av = attr->first_value; av; av = av->next) + if (av != common_av) +- write_attr_case (attr, av, 1, "slot +=", str, 4, true_rtx); ++ write_attr_case (outf, attr, av, 1, "slot +=", str, 4, true_rtx); + +- write_attr_case (attr, common_av, 0, "slot +=", str, 4, true_rtx); +- printf (" }\n\n"); ++ write_attr_case (outf, attr, common_av, 0, "slot +=", str, 4, true_rtx); ++ fprintf (outf, " }\n\n"); + + /* Ensure matched. Otherwise, shouldn't have been called. */ +- printf (" gcc_assert (slot >= %d);\n\n", max_slots); ++ fprintf (outf, " gcc_assert (slot >= %d);\n\n", max_slots); + } + + /* If just one type of delay slot, write simple switch. */ + if (num_delays == 1 && max_slots == 1) + { +- printf (" insn = candidate_insn;\n"); +- printf (" switch (recog_memoized (insn))\n"); +- printf (" {\n"); ++ fprintf (outf, " insn = candidate_insn;\n"); ++ fprintf (outf, " switch (recog_memoized (insn))\n"); ++ fprintf (outf, " {\n"); + + attr = find_attr (&delay_1_0_str, 0); + gcc_assert (attr); +@@ -4258,27 +4282,27 @@ write_eligible_delay (const char *kind) + + for (av = attr->first_value; av; av = av->next) + if (av != common_av) +- write_attr_case (attr, av, 1, "return", ";", 4, true_rtx); ++ write_attr_case (outf, attr, av, 1, "return", ";", 4, true_rtx); + +- write_attr_case (attr, common_av, 0, "return", ";", 4, true_rtx); +- printf (" }\n"); ++ write_attr_case (outf, attr, common_av, 0, "return", ";", 4, true_rtx); ++ fprintf (outf, " }\n"); + } + + else + { + /* Write a nested CASE. The first indicates which condition we need to + test, and the inner CASE tests the condition. */ +- printf (" insn = candidate_insn;\n"); +- printf (" switch (slot)\n"); +- printf (" {\n"); ++ fprintf (outf, " insn = candidate_insn;\n"); ++ fprintf (outf, " switch (slot)\n"); ++ fprintf (outf, " {\n"); + + for (delay = delays; delay; delay = delay->next) + for (i = 0; i < XVECLEN (delay->def, 1); i += 3) + { +- printf (" case %d:\n", +- (i / 3) + (num_delays == 1 ? 0 : delay->num * max_slots)); +- printf (" switch (recog_memoized (insn))\n"); +- printf ("\t{\n"); ++ fprintf (outf, " case %d:\n", ++ (i / 3) + (num_delays == 1 ? 0 : delay->num * max_slots)); ++ fprintf (outf, " switch (recog_memoized (insn))\n"); ++ fprintf (outf, "\t{\n"); + + sprintf (str, "*%s_%d_%d", kind, delay->num, i / 3); + pstr = str; +@@ -4288,18 +4312,18 @@ write_eligible_delay (const char *kind) + + for (av = attr->first_value; av; av = av->next) + if (av != common_av) +- write_attr_case (attr, av, 1, "return", ";", 8, true_rtx); ++ write_attr_case (outf, attr, av, 1, "return", ";", 8, true_rtx); + +- write_attr_case (attr, common_av, 0, "return", ";", 8, true_rtx); +- printf (" }\n"); ++ write_attr_case (outf, attr, common_av, 0, "return", ";", 8, true_rtx); ++ fprintf (outf, " }\n"); + } + +- printf (" default:\n"); +- printf (" gcc_unreachable ();\n"); +- printf (" }\n"); ++ fprintf (outf, " default:\n"); ++ fprintf (outf, " gcc_unreachable ();\n"); ++ fprintf (outf, " }\n"); + } + +- printf ("}\n\n"); ++ fprintf (outf, "}\n\n"); + } + + /* This page contains miscellaneous utility routines. */ +@@ -4438,29 +4462,29 @@ copy_rtx_unchanging (rtx orig) + number of delay slots is not a function of the length of the insn. */ + + static void +-write_const_num_delay_slots (void) ++write_const_num_delay_slots (FILE *outf) + { + struct attr_desc *attr = find_attr (&num_delay_slots_str, 0); + struct attr_value *av; + + if (attr) + { +- printf ("int\nconst_num_delay_slots (rtx insn)\n"); +- printf ("{\n"); +- printf (" switch (recog_memoized (insn))\n"); +- printf (" {\n"); ++ fprintf (outf, "int\nconst_num_delay_slots (rtx insn)\n"); ++ fprintf (outf, "{\n"); ++ fprintf (outf, " switch (recog_memoized (insn))\n"); ++ fprintf (outf, " {\n"); + + for (av = attr->first_value; av; av = av->next) + { + length_used = 0; + walk_attr_value (av->value); + if (length_used) +- write_insn_cases (av->first_insn, 4); ++ write_insn_cases (outf, av->first_insn, 4); + } + +- printf (" default:\n"); +- printf (" return 1;\n"); +- printf (" }\n}\n\n"); ++ fprintf (outf, " default:\n"); ++ fprintf (outf, " return 1;\n"); ++ fprintf (outf, " }\n}\n\n"); + } + } + +@@ -4636,7 +4660,10 @@ find_tune_attr (rtx exp) + } + } + +-/* Create all of the attributes that describe automaton properties. */ ++/* Create all of the attributes that describe automaton properties. ++ Write the DFA and latency function prototypes to the files that ++ need to have them, and write the init_sched_attrs(). */ ++ + static void + make_automaton_attrs (void) + { +@@ -4658,23 +4685,49 @@ make_automaton_attrs (void) + gcc_assert (tune_attr->is_const + && !tune_attr->is_special + && !tune_attr->is_numeric); ++ ++ /* Write the prototypes for all DFA functions. */ ++ for (val = tune_attr->first_value; val; val = val->next) ++ { ++ if (val == tune_attr->default_val) ++ continue; ++ gcc_assert (GET_CODE (val->value) == CONST_STRING); ++ fprintf (dfa_file, ++ "extern int internal_dfa_insn_code_%s (rtx);\n", ++ XSTR (val->value, 0)); ++ } ++ fprintf (dfa_file, "\n"); ++ ++ /* Write the prototypes for all latency functions. */ + for (val = tune_attr->first_value; val; val = val->next) + { + if (val == tune_attr->default_val) + continue; + gcc_assert (GET_CODE (val->value) == CONST_STRING); +- printf ("static int internal_dfa_insn_code_%s (rtx);\n" +- "static int insn_default_latency_%s (rtx);\n", +- XSTR (val->value, 0), XSTR (val->value, 0)); ++ fprintf (latency_file, ++ "extern int insn_default_latency_%s (rtx);\n", ++ XSTR (val->value, 0)); + } ++ fprintf (latency_file, "\n"); + +- printf ("\n"); +- printf ("int (*internal_dfa_insn_code) (rtx);\n"); +- printf ("int (*insn_default_latency) (rtx);\n"); +- printf ("\n"); +- printf ("void\n"); +- printf ("init_sched_attrs (void)\n"); +- printf ("{\n"); ++ /* Write the prototypes for all automaton functions. */ ++ for (val = tune_attr->first_value; val; val = val->next) ++ { ++ if (val == tune_attr->default_val) ++ continue; ++ gcc_assert (GET_CODE (val->value) == CONST_STRING); ++ fprintf (attr_file, ++ "extern int internal_dfa_insn_code_%s (rtx);\n" ++ "extern int insn_default_latency_%s (rtx);\n", ++ XSTR (val->value, 0), XSTR (val->value, 0)); ++ } ++ fprintf (attr_file, "\n"); ++ fprintf (attr_file, "int (*internal_dfa_insn_code) (rtx);\n"); ++ fprintf (attr_file, "int (*insn_default_latency) (rtx);\n"); ++ fprintf (attr_file, "\n"); ++ fprintf (attr_file, "void\n"); ++ fprintf (attr_file, "init_sched_attrs (void)\n"); ++ fprintf (attr_file, "{\n"); + + for (val = tune_attr->first_value; val; val = val->next) + { +@@ -4743,27 +4796,27 @@ make_automaton_attrs (void) + + if (first) + { +- printf (" if ("); ++ fprintf (attr_file, " if ("); + first = false; + } + else +- printf (" else if ("); +- write_test_expr (test, 0, 0); +- printf (")\n"); +- printf (" {\n"); +- printf (" internal_dfa_insn_code\n"); +- printf (" = internal_dfa_insn_code_%s;\n", +- XSTR (val->value, 0)); +- printf (" insn_default_latency\n"); +- printf (" = insn_default_latency_%s;\n", +- XSTR (val->value, 0)); +- printf (" }\n"); +- } +- +- printf (" else\n"); +- printf (" gcc_unreachable ();\n"); +- printf ("}\n"); +- printf ("\n"); ++ fprintf (attr_file, " else if ("); ++ write_test_expr (attr_file, test, 0, 0); ++ fprintf (attr_file, ")\n"); ++ fprintf (attr_file, " {\n"); ++ fprintf (attr_file, " internal_dfa_insn_code\n"); ++ fprintf (attr_file, " = internal_dfa_insn_code_%s;\n", ++ XSTR (val->value, 0)); ++ fprintf (attr_file, " insn_default_latency\n"); ++ fprintf (attr_file, " = insn_default_latency_%s;\n", ++ XSTR (val->value, 0)); ++ fprintf (attr_file, " }\n"); ++ } ++ ++ fprintf (attr_file, " else\n"); ++ fprintf (attr_file, " gcc_unreachable ();\n"); ++ fprintf (attr_file, "}\n"); ++ fprintf (attr_file, "\n"); + + XDELETEVEC (condexps); + } +@@ -4813,7 +4866,62 @@ make_automaton_attrs (void) + } + } + +- make_internal_attr ("*bypass_p", byps_exp, ATTR_NONE); ++ make_internal_attr ("*bypass_p", byps_exp, ATTR_NONE); ++} ++ ++static void ++write_header (FILE *outf) ++{ ++ fprintf (outf, "/* Generated automatically by the program `genattrtab'\n" ++ " from the machine description file `md'. */\n\n"); ++ ++ fprintf (outf, "#include \"config.h\"\n"); ++ fprintf (outf, "#include \"system.h\"\n"); ++ fprintf (outf, "#include \"coretypes.h\"\n"); ++ fprintf (outf, "#include \"tm.h\"\n"); ++ fprintf (outf, "#include \"rtl.h\"\n"); ++ fprintf (outf, "#include \"insn-attr.h\"\n"); ++ fprintf (outf, "#include \"tm_p.h\"\n"); ++ fprintf (outf, "#include \"insn-config.h\"\n"); ++ fprintf (outf, "#include \"recog.h\"\n"); ++ fprintf (outf, "#include \"regs.h\"\n"); ++ fprintf (outf, "#include \"real.h\"\n"); ++ fprintf (outf, "#include \"output.h\"\n"); ++ fprintf (outf, "#include \"toplev.h\"\n"); ++ fprintf (outf, "#include \"flags.h\"\n"); ++ fprintf (outf, "#include \"function.h\"\n"); ++ fprintf (outf, "\n"); ++ fprintf (outf, "#define operands recog_data.operand\n\n"); ++} ++ ++static FILE * ++open_outfile (const char *file_name) ++{ ++ FILE *outf; ++ outf = fopen (file_name, "w"); ++ if (! outf) ++ fatal ("cannot open file %s: %s", file_name, xstrerror (errno)); ++ write_header (outf); ++ return outf; ++} ++ ++static bool ++handle_arg (const char *arg) ++{ ++ switch (arg[1]) ++ { ++ case 'A': ++ attr_file_name = &arg[2]; ++ return true; ++ case 'D': ++ dfa_file_name = &arg[2]; ++ return true; ++ case 'L': ++ latency_file_name = &arg[2]; ++ return true; ++ default: ++ return false; ++ } + } + + int +@@ -4827,8 +4935,12 @@ main (int argc, char **argv) + + progname = "genattrtab"; + +- if (!init_rtx_reader_args (argc, argv)) +- return (FATAL_EXIT_CODE); ++ if (!init_rtx_reader_args_cb (argc, argv, handle_arg)) ++ return FATAL_EXIT_CODE; ++ ++ attr_file = open_outfile (attr_file_name); ++ dfa_file = open_outfile (dfa_file_name); ++ latency_file = open_outfile (latency_file_name); + + obstack_init (hash_obstack); + obstack_init (temp_obstack); +@@ -4847,9 +4959,6 @@ main (int argc, char **argv) + delay_1_0_str = DEF_ATTR_STRING ("*delay_1_0"); + num_delay_slots_str = DEF_ATTR_STRING ("*num_delay_slots"); + +- printf ("/* Generated automatically by the program `genattrtab'\n\ +-from the machine description file `md'. */\n\n"); +- + /* Read the machine description. */ + + while (1) +@@ -4909,23 +5018,6 @@ from the machine description file `md'. + if (num_delays) + expand_delays (); + +- printf ("#include \"config.h\"\n"); +- printf ("#include \"system.h\"\n"); +- printf ("#include \"coretypes.h\"\n"); +- printf ("#include \"tm.h\"\n"); +- printf ("#include \"rtl.h\"\n"); +- printf ("#include \"insn-attr.h\"\n"); +- printf ("#include \"tm_p.h\"\n"); +- printf ("#include \"insn-config.h\"\n"); +- printf ("#include \"recog.h\"\n"); +- printf ("#include \"regs.h\"\n"); +- printf ("#include \"output.h\"\n"); +- printf ("#include \"diagnostic-core.h\"\n"); +- printf ("#include \"flags.h\"\n"); +- printf ("#include \"function.h\"\n"); +- printf ("\n"); +- printf ("#define operands recog_data.operand\n\n"); +- + /* Make `insn_alternatives'. */ + insn_alternatives = oballocvec (int, insn_code_number); + for (id = defs; id; id = id->next) +@@ -4970,8 +5062,19 @@ from the machine description file `md'. + for (i = 0; i < MAX_ATTRS_INDEX; i++) + for (attr = attrs[i]; attr; attr = attr->next) + { ++ FILE *outf; ++ ++#define IS_ATTR_GROUP(X) (!strncmp(attr->name,X,strlen(X))) ++ if (IS_ATTR_GROUP ("*internal_dfa_insn_code")) ++ outf = dfa_file; ++ else if (IS_ATTR_GROUP ("*insn_default_latency")) ++ outf = latency_file; ++ else ++ outf = attr_file; ++#undef IS_ATTR_GROUP ++ + if (! attr->is_special && ! attr->is_const) +- write_attr_get (attr); ++ write_attr_get (outf, attr); + } + + /* Write out delay eligibility information, if DEFINE_DELAY present. +@@ -4979,18 +5082,25 @@ from the machine description file `md'. + below.) */ + if (num_delays) + { +- write_eligible_delay ("delay"); ++ write_eligible_delay (attr_file, "delay"); + if (have_annul_true) +- write_eligible_delay ("annul_true"); ++ write_eligible_delay (attr_file, "annul_true"); + if (have_annul_false) +- write_eligible_delay ("annul_false"); ++ write_eligible_delay (attr_file, "annul_false"); + } + + /* Write out constant delay slot info. */ +- write_const_num_delay_slots (); ++ write_const_num_delay_slots (attr_file); + +- write_length_unit_log (); ++ write_length_unit_log (attr_file); + +- fflush (stdout); +- return (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE); ++ if (fclose (attr_file) != 0) ++ fatal ("cannot close file %s: %s", attr_file_name, xstrerror (errno)); ++ if (fclose (dfa_file) != 0) ++ fatal ("cannot close file %s: %s", dfa_file_name, xstrerror (errno)); ++ if (fclose (latency_file) != 0) ++ fatal ("cannot close file %s: %s", latency_file_name, xstrerror (errno)); ++ ++ return SUCCESS_EXIT_CODE; + } ++ +--- a/src/gcc/read-md.c ++++ b/src/gcc/read-md.c +@@ -167,14 +167,21 @@ copy_md_ptr_loc (const void *new_ptr, co + } + + /* If PTR is associated with a known file position, print a #line +- directive for it. */ ++ directive for it to OUTF. */ + + void +-print_md_ptr_loc (const void *ptr) ++fprint_md_ptr_loc (FILE *outf, const void *ptr) + { + const struct ptr_loc *loc = get_md_ptr_loc (ptr); + if (loc != 0) +- printf ("#line %d \"%s\"\n", loc->lineno, loc->filename); ++ fprintf (outf, "#line %d \"%s\"\n", loc->lineno, loc->filename); ++} ++ ++/* Special fprint_md_ptr_loc for writing to STDOUT. */ ++void ++print_md_ptr_loc (const void *ptr) ++{ ++ fprint_md_ptr_loc (stdout, ptr); + } + + /* Return a condition that satisfies both COND1 and COND2. Either string +@@ -204,31 +211,39 @@ join_c_conditions (const char *cond1, co + return result; + } + +-/* Print condition COND, wrapped in brackets. If COND was created by +- join_c_conditions, recursively invoke this function for the original ++/* Print condition COND to OUTF, wrapped in brackets. If COND was created ++ by join_c_conditions, recursively invoke this function for the original + conditions and join the result with "&&". Otherwise print a #line + directive for COND if its original file position is known. */ + + void +-print_c_condition (const char *cond) ++fprint_c_condition (FILE *outf, const char *cond) + { + const char **halves = (const char **) htab_find (joined_conditions, &cond); + if (halves != 0) + { +- printf ("("); +- print_c_condition (halves[1]); +- printf (" && "); +- print_c_condition (halves[2]); +- printf (")"); ++ fprintf (outf, "("); ++ fprint_c_condition (outf, halves[1]); ++ fprintf (outf, " && "); ++ fprint_c_condition (outf, halves[2]); ++ fprintf (outf, ")"); + } + else + { +- putc ('\n', stdout); +- print_md_ptr_loc (cond); +- printf ("(%s)", cond); ++ fputc ('\n', outf); ++ fprint_md_ptr_loc (outf, cond); ++ fprintf (outf, "(%s)", cond); + } + } + ++/* Special fprint_c_condition for writing to STDOUT. */ ++ ++void ++print_c_condition (const char *cond) ++{ ++ fprint_c_condition (stdout, cond); ++} ++ + /* A vfprintf-like function for reporting an error against line LINENO + of the current MD file. */ + +--- a/src/gcc/read-md.h ++++ b/src/gcc/read-md.h +@@ -118,8 +118,10 @@ extern hashval_t leading_string_hash (co + extern int leading_string_eq_p (const void *, const void *); + extern void copy_md_ptr_loc (const void *, const void *); + extern void print_md_ptr_loc (const void *); ++extern void fprint_md_ptr_loc (FILE *, const void *); + extern const char *join_c_conditions (const char *, const char *); + extern void print_c_condition (const char *); ++extern void fprint_c_condition (FILE *, const char *); + extern void message_with_line (int, const char *, ...) ATTRIBUTE_PRINTF_2; + extern void error_with_line (int, const char *, ...) ATTRIBUTE_PRINTF_2; + extern void fatal_with_file_and_line (const char *, ...) diff -Nru gcc-4.6-4.6.3/debian/patches/pr47955.diff gcc-4.6-4.6.4/debian/patches/pr47955.diff --- gcc-4.6-4.6.3/debian/patches/pr47955.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/pr47955.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,17 @@ +# DP: Backport m68k bugfix from gcc-4.7/trunk + +Index: gcc-4.6-4.6.3/src/gcc/config/m68k/m68k.c +=================================================================== +--- gcc-4.6-4.6.3.orig/src/gcc/config/m68k/m68k.c 2011-07-31 15:09:25.000000000 +0000 ++++ gcc-4.6-4.6.3/src/gcc/config/m68k/m68k.c 2012-03-04 15:55:43.000000000 +0000 +@@ -1074,6 +1074,10 @@ + + m68k_compute_frame_layout (); + ++ if (flag_stack_usage) ++ current_function_static_stack_size ++ = current_frame.size + current_frame.offset; ++ + /* If the stack limit is a symbol, we can check it here, + before actually allocating the space. */ + if (crtl->limit_stack diff -Nru gcc-4.6-4.6.3/debian/patches/pr52573.diff gcc-4.6-4.6.4/debian/patches/pr52573.diff --- gcc-4.6-4.6.3/debian/patches/pr52573.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/pr52573.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,197 @@ +gcc/ + +2013-01-18 Bernd Schmidt + + PR rtl-optimization/52573 + * regrename.c (build_def_use): Ignore REG_DEAD notes if there is a + REG_UNUSED for the same register. + +gcc/testsuite/ + +2013-01-17 Jeff Law + + PR rtl-optimization/52573 + * gcc.dg/pr52573.c: New test. + +--- a/src/gcc/regrename.c (Revision 195287) ++++ b/src/gcc/regrename.c (Revision 195288) +@@ -1710,9 +1710,16 @@ + scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, + OP_INOUT); + +- /* Step 4: Close chains for registers that die here. */ ++ /* Step 4: Close chains for registers that die here, unless ++ the register is mentioned in a REG_UNUSED note. In that ++ case we keep the chain open until step #7 below to ensure ++ it conflicts with other output operands of this insn. ++ See PR 52573. Arguably the insn should not have both ++ notes; it has proven difficult to fix that without ++ other undesirable side effects. */ + for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) +- if (REG_NOTE_KIND (note) == REG_DEAD) ++ if (REG_NOTE_KIND (note) == REG_DEAD ++ && !find_regno_note (insn, REG_UNUSED, REGNO (XEXP (note, 0)))) + { + remove_from_hard_reg_set (&live_hard_regs, + GET_MODE (XEXP (note, 0)), +--- a/src/gcc/testsuite/gcc.dg/pr52573.c (Revision 0) ++++ b/src/gcc/testsuite/gcc.dg/pr52573.c (Revision 195288) +@@ -0,0 +1,158 @@ ++ ++/* { dg-do compile { target { m68k-*-* } } } */ ++/* { dg-options "-w -O3 -funroll-loops" } */ ++/* { dg-final { scan-assembler-not "%d0:%d0" } } */ ++/* { dg-final { scan-assembler-not "%d1:%d1" } } */ ++/* { dg-final { scan-assembler-not "%d2:%d2" } } */ ++/* { dg-final { scan-assembler-not "%d3:%d3" } } */ ++/* { dg-final { scan-assembler-not "%d4:%d4" } } */ ++/* { dg-final { scan-assembler-not "%d5:%d5" } } */ ++/* { dg-final { scan-assembler-not "%d6:%d6" } } */ ++/* { dg-final { scan-assembler-not "%d7:%d7" } } */ ++/* Test arithmetics on bitfields. */ ++ ++extern void abort (void); ++extern void exit (int); ++ ++unsigned int ++myrnd (void) ++{ ++ static unsigned int s = 1388815473; ++ s *= 1103515245; ++ s += 12345; ++ return (s / 65536) % 2048; ++} ++ ++#define T(S) \ ++struct S s##S; \ ++struct S retme##S (struct S x) \ ++{ \ ++ return x; \ ++} \ ++ \ ++unsigned int fn1##S (unsigned int x) \ ++{ \ ++ struct S y = s##S; \ ++ y.k += x; \ ++ y = retme##S (y); \ ++ return y.k; \ ++} \ ++ \ ++unsigned int fn2##S (unsigned int x) \ ++{ \ ++ struct S y = s##S; \ ++ y.k += x; \ ++ y.k %= 15; \ ++ return y.k; \ ++} \ ++ \ ++unsigned int retit##S (void) \ ++{ \ ++ return s##S.k; \ ++} \ ++ \ ++unsigned int fn3##S (unsigned int x) \ ++{ \ ++ s##S.k += x; \ ++ return retit##S (); \ ++} \ ++ \ ++void test##S (void) \ ++{ \ ++ int i; \ ++ unsigned int mask, v, a, r; \ ++ struct S x; \ ++ char *p = (char *) &s##S; \ ++ for (i = 0; i < sizeof (s##S); ++i) \ ++ *p++ = myrnd (); \ ++ if (__builtin_classify_type (s##S.l) == 8) \ ++ s##S.l = 5.25; \ ++ s##S.k = -1; \ ++ mask = s##S.k; \ ++ v = myrnd (); \ ++ a = myrnd (); \ ++ s##S.k = v; \ ++ x = s##S; \ ++ r = fn1##S (a); \ ++ if (x.i != s##S.i || x.j != s##S.j \ ++ || x.k != s##S.k || x.l != s##S.l \ ++ || ((v + a) & mask) != r) \ ++ abort (); \ ++ v = myrnd (); \ ++ a = myrnd (); \ ++ s##S.k = v; \ ++ x = s##S; \ ++ r = fn2##S (a); \ ++ if (x.i != s##S.i || x.j != s##S.j \ ++ || x.k != s##S.k || x.l != s##S.l \ ++ || ((((v + a) & mask) % 15) & mask) != r) \ ++ abort (); \ ++ v = myrnd (); \ ++ a = myrnd (); \ ++ s##S.k = v; \ ++ x = s##S; \ ++ r = fn3##S (a); \ ++ if (x.i != s##S.i || x.j != s##S.j \ ++ || s##S.k != r || x.l != s##S.l \ ++ || ((v + a) & mask) != r) \ ++ abort (); \ ++} ++ ++struct A { unsigned int i : 6, l : 1, j : 10, k : 15; }; T(A) ++struct B { unsigned int i : 6, j : 11, k : 15; unsigned int l; }; T(B) ++struct C { unsigned int l; unsigned int i : 6, j : 11, k : 15; }; T(C) ++struct D { unsigned long long l : 6, i : 6, j : 23, k : 29; }; T(D) ++struct E { unsigned long long l, i : 12, j : 23, k : 29; }; T(E) ++struct F { unsigned long long i : 12, j : 23, k : 29, l; }; T(F) ++struct G { unsigned int i : 12, j : 13, k : 7; unsigned long long l; }; T(G) ++struct H { unsigned int i : 12, j : 11, k : 9; unsigned long long l; }; T(H) ++struct I { unsigned short i : 1, j : 6, k : 9; unsigned long long l; }; T(I) ++struct J { unsigned short i : 1, j : 8, k : 7; unsigned short l; }; T(J) ++struct K { unsigned int k : 6, l : 1, j : 10, i : 15; }; T(K) ++struct L { unsigned int k : 6, j : 11, i : 15; unsigned int l; }; T(L) ++struct M { unsigned int l; unsigned int k : 6, j : 11, i : 15; }; T(M) ++struct N { unsigned long long l : 6, k : 6, j : 23, i : 29; }; T(N) ++struct O { unsigned long long l, k : 12, j : 23, i : 29; }; T(O) ++struct P { unsigned long long k : 12, j : 23, i : 29, l; }; T(P) ++struct Q { unsigned int k : 12, j : 13, i : 7; unsigned long long l; }; T(Q) ++struct R { unsigned int k : 12, j : 11, i : 9; unsigned long long l; }; T(R) ++struct S { unsigned short k : 1, j : 6, i : 9; unsigned long long l; }; T(S) ++struct T { unsigned short k : 1, j : 8, i : 7; unsigned short l; }; T(T) ++struct U { unsigned short j : 6, k : 1, i : 9; unsigned long long l; }; T(U) ++struct V { unsigned short j : 8, k : 1, i : 7; unsigned short l; }; T(V) ++struct W { long double l; unsigned int k : 12, j : 13, i : 7; }; T(W) ++struct X { unsigned int k : 12, j : 13, i : 7; long double l; }; T(X) ++struct Y { unsigned int k : 12, j : 11, i : 9; long double l; }; T(Y) ++struct Z { long double l; unsigned int j : 13, i : 7, k : 12; }; T(Z) ++ ++int ++main (void) ++{ ++ testA (); ++ testB (); ++ testC (); ++ testD (); ++ testE (); ++ testF (); ++ testG (); ++ testH (); ++ testI (); ++ testJ (); ++ testK (); ++ testL (); ++ testM (); ++ testN (); ++ testO (); ++ testP (); ++ testQ (); ++ testR (); ++ testS (); ++ testT (); ++ testU (); ++ testV (); ++ testW (); ++ testX (); ++ testY (); ++ testZ (); ++ exit (0); ++} diff -Nru gcc-4.6-4.6.3/debian/patches/pr52714.diff gcc-4.6-4.6.4/debian/patches/pr52714.diff --- gcc-4.6-4.6.3/debian/patches/pr52714.diff 1970-01-01 00:00:00.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/pr52714.diff 2013-04-14 22:48:24.000000000 +0000 @@ -0,0 +1,68 @@ +# DP: Proposed fix for PR rtl-optimization/52714: +# DP: Revert gcc 4.6 to gcc the 4.5 version of the PR rtl-optimization/45695 fix: + +--- a/src/gcc/combine.c ++++ b/src/gcc/combine.c +@@ -3769,41 +3769,42 @@ try_combine (rtx i3, rtx i2, rtx i1, rtx + && GET_CODE (XVECEXP (newpat, 0, 1)) == SET + && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != ZERO_EXTRACT + && GET_CODE (SET_DEST (XVECEXP (newpat, 0, 1))) != STRICT_LOW_PART ++ && ! use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)), ++ DF_INSN_LUID (i2)) + && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 1)), + XVECEXP (newpat, 0, 0)) + && ! reg_referenced_p (SET_DEST (XVECEXP (newpat, 0, 0)), + XVECEXP (newpat, 0, 1)) + && ! (contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 0))) +- && contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 1))))) ++ && contains_muldiv (SET_SRC (XVECEXP (newpat, 0, 1)))) ++#ifdef HAVE_cc0 ++ /* We cannot split the parallel into two sets if both sets ++ reference cc0. */ ++ && ! (reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0)) ++ && reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 1))) ++#endif ++ ) + { + /* Normally, it doesn't matter which of the two is done first, +- but the one that references cc0 can't be the second, and +- one which uses any regs/memory set in between i2 and i3 can't ++ but it does if one references cc0. In that case, it has to + be first. */ +- if (!use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 1)), +- DF_INSN_LUID (i2)) +-#ifdef HAVE_cc0 +- && !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0)) +-#endif +- ) +- { +- newi2pat = XVECEXP (newpat, 0, 1); +- newpat = XVECEXP (newpat, 0, 0); +- } +- else if (!use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 0)), +- DF_INSN_LUID (i2)) + #ifdef HAVE_cc0 +- && !reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 1)) +-#endif +- ) ++ if (reg_referenced_p (cc0_rtx, XVECEXP (newpat, 0, 0))) + { ++ if (use_crosses_set_p (SET_SRC (XVECEXP (newpat, 0, 0)), ++ DF_INSN_LUID (i2))) ++ { ++ undo_all (); ++ return 0; ++ } + newi2pat = XVECEXP (newpat, 0, 0); + newpat = XVECEXP (newpat, 0, 1); + } + else ++#endif + { +- undo_all (); +- return 0; ++ newi2pat = XVECEXP (newpat, 0, 1); ++ newpat = XVECEXP (newpat, 0, 0); + } + + i2_code_number = recog_for_combine (&newi2pat, i2, &new_i2_notes); diff -Nru gcc-4.6-4.6.3/debian/patches/pr52870.diff gcc-4.6-4.6.4/debian/patches/pr52870.diff --- gcc-4.6-4.6.3/debian/patches/pr52870.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/pr52870.diff 1970-01-01 00:00:00.000000000 +0000 @@ -1,84 +0,0 @@ -# DP: Fix PR middle-end/52870, taken from the trunk - -PR 52870 is another crash in vectorizer pattern detection that was uncovered -by Ira's patch to enable patterns for SLP as well. - -In this case, the problem is that vect_recog_widen_mult_pattern detects a -statement as part of a pattern, but that statement is actually outside of -the basic block SLP is currently working on. This means the statement -has no stmt_vinfo allocated, and thus SLP crashes later on when operating -on the statement. - -Note that in theory this could already have happened before that latest -patch, if vect_recog_widen_mult_pattern would have detected a statement -outside the current *loop*. That is apparently much rarer, though. - -The fix is to verify that the statement is actually part of the current -basic block or loop, as appropriate. That same check is already performed -in various other pattern detection routines. - -Tested on i686-linux and x86_64 with no regressions. - -gcc/ - PR tree-optimization/52870 - * tree-vect-patterns.c (vect_recog_widen_mult_pattern): Verify that - presumed pattern statement is within the same loop or basic block. - -gcc/testsuite/ - PR tree-optimization/52870 - * gcc.dg/vect/pr52870.c: New test. - - ---- a/src/gcc/testsuite/gcc.dg/vect/pr52870.c 1970-01-01 00:00:00 +0000 -+++ b/src/gcc/testsuite/gcc.dg/vect/pr52870.c 2012-04-04 16:29:51 +0000 -@@ -0,0 +1,17 @@ -+/* { dg-do compile } */ -+/* { dg-options "-O1 -ftree-vectorize" } */ -+ -+long -+test (int *x) -+{ -+ unsigned long sx, xprec; -+ -+ sx = *x >= 0 ? *x : -*x; -+ -+ xprec = sx * 64; -+ -+ if (sx < 16384) -+ foo (sx); -+ -+ return xprec; -+} - ---- a/src/gcc/tree-vect-patterns.c 2012-01-18 01:53:19 +0000 -+++ b/src/gcc/tree-vect-patterns.c 2012-04-04 16:29:51 +0000 -@@ -538,6 +538,16 @@ - int dummy_int; - VEC (tree, heap) *dummy_vec; - bool op1_ok, promotion; -+ loop_vec_info loop_vinfo; -+ struct loop *loop = NULL; -+ bb_vec_info bb_vinfo; -+ stmt_vec_info stmt_vinfo; -+ -+ stmt_vinfo = vinfo_for_stmt (last_stmt); -+ loop_vinfo = STMT_VINFO_LOOP_VINFO (stmt_vinfo); -+ bb_vinfo = STMT_VINFO_BB_VINFO (stmt_vinfo); -+ if (loop_vinfo) -+ loop = LOOP_VINFO_LOOP (loop_vinfo); - - if (!is_gimple_assign (last_stmt)) - return NULL; -@@ -608,6 +618,11 @@ - || gimple_assign_rhs_code (use_stmt) != NOP_EXPR) - return NULL; - -+ if (!gimple_bb (use_stmt) -+ || (loop && !flow_bb_inside_loop_p (loop, gimple_bb (use_stmt))) -+ || (!loop && gimple_bb (use_stmt) != BB_VINFO_BB (bb_vinfo))) -+ return NULL; -+ - use_lhs = gimple_assign_lhs (use_stmt); - use_type = TREE_TYPE (use_lhs); - if (!INTEGRAL_TYPE_P (use_type) - diff -Nru gcc-4.6-4.6.3/debian/patches/sh4-enable-ieee.diff gcc-4.6-4.6.4/debian/patches/sh4-enable-ieee.diff --- gcc-4.6-4.6.3/debian/patches/sh4-enable-ieee.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/sh4-enable-ieee.diff 1970-01-01 00:00:00.000000000 +0000 @@ -1,20 +0,0 @@ -# DP: Enable -mieee by default on sh4. - -diff --git a/src/gcc/config/sh/sh.c b/src/gcc/config/sh/sh.c -index ee80028..9049576 100644 ---- a/src/gcc/config/sh/sh.c -+++ b/src/gcc/config/sh/sh.c -@@ -1020,6 +1020,13 @@ sh_option_override (void) - /* This target defaults to strict volatile bitfields. */ - if (flag_strict_volatile_bitfields < 0) - flag_strict_volatile_bitfields = 1; -+ -+ /* Enable -mieee option */ -+ if (TARGET_SH4 || TARGET_SH4A_ARCH) -+ { -+ if (!flag_finite_math_only) -+ target_flags |= MASK_IEEE; -+ } - } - - /* Print the operand address in x to the stream. */ diff -Nru gcc-4.6-4.6.3/debian/patches/svn-updates-linaro.diff gcc-4.6-4.6.4/debian/patches/svn-updates-linaro.diff --- gcc-4.6-4.6.3/debian/patches/svn-updates-linaro.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/svn-updates-linaro.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,816 +1,14 @@ -# DP: updates from the 4.6 branch upto 20120425 (r186817). +# DP: updates from the 4.6 branch upto 2013xxxx (r197516). last_updated() { cat > ${dir}LAST_UPDATED < -+ -+ PR middle-end/53084 -+ * varasm.c (compute_reloc_for_constant): Handle ADDR_EXPR -+ of MEM_REF. -+ (output_addressed_constants): Likewise. -+ -+2012-04-20 Thomas Schwinge -+ -+ struct siginfo vs. siginfo_t -+ -+ Backport from trunk (but apply to gcc/): -+ -+ 2012-04-20 Thomas Schwinge -+ -+ * config/alpha/linux-unwind.h (alpha_fallback_frame_state): Use -+ siginfo_t instead of struct siginfo. -+ * config/bfin/linux-unwind.h (bfin_fallback_frame_state): Likewise. -+ * config/i386/linux-unwind.h (x86_fallback_frame_state): Likewise. -+ * config/ia64/linux-unwind.h (ia64_fallback_frame_state) -+ (ia64_handle_unwabi): Likewise. -+ * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. -+ * config/pa/linux-unwind.h (pa32_fallback_frame_state): Likewise. -+ * config/sh/linux-unwind.h (shmedia_fallback_frame_state) -+ (sh_fallback_frame_state): Likewise. -+ * config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Likewise. -+ -+2012-04-13 Michael Meissner -+ -+ Backport from mainline -+ 2012-04-12 Michael Meissner -+ -+ PR target/52775 -+ * config/rs6000/rs6000.h (TARGET_FCFID): Add TARGET_PPC_GPOPT to -+ the list of options to enable the FCFID instruction. -+ -+2012-04-12 Richard Earnshaw -+ -+ PR target/49448 -+ * config.gcc (arm*-*-linux*): Use an unambiguous pattern for -+ detecting big-endian triplets. -+ -+2012-04-10 John David Anglin -+ -+ PR middle-end/52894 -+ * varasm.c (process_pending_assemble_externals): Set -+ pending_assemble_externals_processed true. -+ (assemble_external): Call assemble_external_real if the pending -+ assemble externals have been processed. -+ -+2012-04-09 Eric Botcazou -+ -+ PR target/52717 -+ * config/sparc/sparc.c (sparc_file_end): Set TREE_PUBLIC explicitly on -+ the DECL generated for the special GOT helper. -+ -+2012-04-06 Matt Turner -+ -+ * doc/install.texi: Correct typo "-mno-lsc" -> "-mno-llsc". -+ - 2012-03-29 Uros Bizjak - - * config/i386/sse.md (avx_hv4df3): Fix results -Index: gcc/testsuite/gcc.target/powerpc/pr52775.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr52775.c (revision -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr52775.c (revision -@@ -0,0 +1,16 @@ -+/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O1 -mcpu=power4" } */ -+/* { dg-final { scan-assembler-times "fcfid" 2 } } */ -+ -+double -+int_to_double (int *p) -+{ -+ return (double)*p; -+} -+ -+double -+long_long_to_double (long long *p) -+{ -+ return (double)*p; -+} -Index: gcc/testsuite/gcc.c-torture/execute/pr53084.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr53084.c (revision -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr53084.c (revision -@@ -0,0 +1,18 @@ -+/* PR middle-end/53084 */ -+ -+extern void abort (void); -+ -+__attribute__((noinline, noclone)) void -+bar (const char *p) -+{ -+ if (p[0] != 'o' || p[1] != 'o' || p[2]) -+ abort (); -+} -+ -+int -+main () -+{ -+ static const char *const foo[] = {"foo" + 1}; -+ bar (foo[0]); -+ return 0; -+} -Index: gcc/testsuite/ChangeLog -=================================================================== ---- a/src/gcc/testsuite/ChangeLog (revision -+++ b/src/gcc/testsuite/ChangeLog (revision -@@ -1,3 +1,21 @@ -+2012-04-24 Jakub Jelinek -+ -+ PR middle-end/53084 -+ * gcc.c-torture/execute/pr53084.c: New test. -+ -+2012-04-13 Michael Meissner -+ -+ Backport from mainline -+ 2012-04-12 Michael Meissner -+ -+ PR target/52775 -+ * gcc.target/powerpc/pr52775.c: New file. -+ -+2012-04-03 Jason Merrill -+ -+ PR c++/52796 -+ * g++.dg/cpp0x/variadic-value1.C: New. -+ - 2012-03-28 Joey Ye - - Backported from mainline -Index: gcc/testsuite/g++.dg/cpp0x/variadic-value1.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C (revision -+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C (revision -@@ -0,0 +1,24 @@ -+// PR c++/52796 -+// { dg-do run { target c++11 } } -+ -+inline void *operator new(__SIZE_TYPE__ s, void *p) { return p; } -+ -+struct A -+{ -+ int i; -+ template -+ A(Ts&&... ts): i(ts...) { } -+}; -+ -+static union { -+ unsigned char c[sizeof(A)]; -+ int i; -+}; -+ -+int main() -+{ -+ i = 0xdeadbeef; -+ new(c) A; -+ if (i != 0) -+ __builtin_abort(); -+} -Index: gcc/cp/decl.c -=================================================================== ---- a/src/gcc/cp/decl.c (revision -+++ b/src/gcc/cp/decl.c (revision -@@ -3636,7 +3636,7 @@ - TYPE_SIZE_UNIT (nullptr_type_node) = size_int (GET_MODE_SIZE (ptr_mode)); - TYPE_UNSIGNED (nullptr_type_node) = 1; - TYPE_PRECISION (nullptr_type_node) = GET_MODE_BITSIZE (ptr_mode); -- SET_TYPE_MODE (nullptr_type_node, Pmode); -+ SET_TYPE_MODE (nullptr_type_node, ptr_mode); - record_builtin_type (RID_MAX, "decltype(nullptr)", nullptr_type_node); - nullptr_node = build_int_cst (nullptr_type_node, 0); - } -Index: gcc/cp/ChangeLog -=================================================================== ---- a/src/gcc/cp/ChangeLog (revision -+++ b/src/gcc/cp/ChangeLog (revision -@@ -1,3 +1,14 @@ -+2012-04-04 Steve Ellcey -+ -+ Backported from mainline. -+ * decl.c (cxx_init_decl_processing): Use ptr_mode instead of Pmode. -+ -+2012-04-03 Jason Merrill -+ -+ PR c++/52796 -+ * pt.c (tsubst_initializer_list): A pack expansion with no elements -+ means value-initialization. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/cp/pt.c -=================================================================== ---- a/src/gcc/cp/pt.c (revision -+++ b/src/gcc/cp/pt.c (revision -@@ -17785,6 +17785,7 @@ - } - else - { -+ tree tmp; - decl = tsubst_copy (TREE_PURPOSE (t), argvec, - tf_warning_or_error, NULL_TREE); - -@@ -17793,10 +17794,17 @@ - in_base_initializer = 1; - - init = TREE_VALUE (t); -+ tmp = init; - if (init != void_type_node) - init = tsubst_expr (init, argvec, - tf_warning_or_error, NULL_TREE, - /*integral_constant_expression_p=*/false); -+ if (init == NULL_TREE && tmp != NULL_TREE) -+ /* If we had an initializer but it instantiated to nothing, -+ value-initialize the object. This will only occur when -+ the initializer was a pack expansion where the parameter -+ packs used in that expansion were of length zero. */ -+ init = void_type_node; - in_base_initializer = 0; - } - -Index: gcc/cp/semantics.c -=================================================================== ---- a/src/gcc/cp/semantics.c (revision -+++ b/src/gcc/cp/semantics.c (revision -@@ -6763,7 +6763,6 @@ - - STRIP_NOPS (sub); - subtype = TREE_TYPE (sub); -- gcc_assert (POINTER_TYPE_P (subtype)); - - if (TREE_CODE (sub) == ADDR_EXPR) - { -Index: gcc/lto/lto.c -=================================================================== ---- a/src/gcc/lto/lto.c (revision -+++ b/src/gcc/lto/lto.c (revision -@@ -893,7 +893,8 @@ - - for (node = cgraph_nodes; node; node = node->next) - { -- if (!partition_cgraph_node_p (node)) -+ if (!partition_cgraph_node_p (node) -+ || node->aux) - continue; - - file_data = node->local.lto_file_data; -@@ -923,13 +924,13 @@ - npartitions++; - } - -- if (!node->aux) -- add_cgraph_node_to_partition (partition, node); -+ add_cgraph_node_to_partition (partition, node); - } - - for (vnode = varpool_nodes; vnode; vnode = vnode->next) - { -- if (!partition_varpool_node_p (vnode)) -+ if (!partition_varpool_node_p (vnode) -+ || vnode->aux) - continue; - file_data = vnode->lto_file_data; - slot = pointer_map_contains (pmap, file_data); -@@ -943,8 +944,7 @@ - npartitions++; - } - -- if (!vnode->aux) -- add_varpool_node_to_partition (partition, vnode); -+ add_varpool_node_to_partition (partition, vnode); - } - for (node = cgraph_nodes; node; node = node->next) - node->aux = NULL; -@@ -1050,8 +1050,9 @@ - - for (i = 0; i < n_nodes; i++) - { -- if (!order[i]->aux) -- add_cgraph_node_to_partition (partition, order[i]); -+ if (order[i]->aux) -+ continue; -+ add_cgraph_node_to_partition (partition, order[i]); - total_size -= order[i]->global.size; - - /* Once we added a new node to the partition, we also want to add -@@ -1231,6 +1232,8 @@ - } - i = best_i; - /* When we are finished, avoid creating empty partition. */ -+ while (i < n_nodes - 1 && order[i + 1]->aux) -+ i++; - if (i == n_nodes - 1) - break; - partition = new_partition (""); -Index: gcc/lto/ChangeLog -=================================================================== ---- a/src/gcc/lto/ChangeLog (revision -+++ b/src/gcc/lto/ChangeLog (revision -@@ -1,3 +1,12 @@ -+2012-04-23 Peter Bergner -+ -+ Backport from mainline -+ 2011-06-11 Jan Hubicka -+ -+ PR lto/48246 -+ * lto.c (lto_1_to_1_map): Don't create empty partitions. -+ (lto_balanced_map): Likewise. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/varasm.c -=================================================================== ---- a/src/gcc/varasm.c (revision -+++ b/src/gcc/varasm.c (revision -@@ -1,7 +1,7 @@ - /* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, - 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, -- 2010, 2011 Free Software Foundation, Inc. -+ 2010, 2011, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -2106,6 +2106,11 @@ - the entire pending_assemble_externals list. See assemble_external(). */ - static struct pointer_set_t *pending_assemble_externals_set; - -+/* Some targets delay some output to final using TARGET_ASM_FILE_END. -+ As a result, assemble_external can be called after the list of externals -+ is processed and the pointer set destroyed. */ -+static bool pending_assemble_externals_processed; -+ - #ifdef ASM_OUTPUT_EXTERNAL - /* True if DECL is a function decl for which no out-of-line copy exists. - It is assumed that DECL's assembler name has been set. */ -@@ -2155,6 +2160,7 @@ - assemble_external_real (TREE_VALUE (list)); - - pending_assemble_externals = 0; -+ pending_assemble_externals_processed = true; - pointer_set_destroy (pending_assemble_externals_set); - #endif - } -@@ -2196,6 +2202,12 @@ - weak_decls = tree_cons (NULL, decl, weak_decls); - - #ifdef ASM_OUTPUT_EXTERNAL -+ if (pending_assemble_externals_processed) -+ { -+ assemble_external_real (decl); -+ return; -+ } -+ - if (! pointer_set_insert (pending_assemble_externals_set, decl)) - pending_assemble_externals = tree_cons (NULL, decl, - pending_assemble_externals); -@@ -3932,6 +3944,13 @@ - tem = TREE_OPERAND (tem, 0)) - ; - -+ if (TREE_CODE (tem) == MEM_REF -+ && TREE_CODE (TREE_OPERAND (tem, 0)) == ADDR_EXPR) -+ { -+ reloc = compute_reloc_for_constant (TREE_OPERAND (tem, 0)); -+ break; -+ } -+ - if (TREE_PUBLIC (tem)) - reloc |= 2; - else -@@ -4000,6 +4019,9 @@ - - if (CONSTANT_CLASS_P (tem) || TREE_CODE (tem) == CONSTRUCTOR) - output_constant_def (tem, 0); -+ -+ if (TREE_CODE (tem) == MEM_REF) -+ output_addressed_constants (TREE_OPERAND (tem, 0)); - break; - - case PLUS_EXPR: -Index: gcc/config.gcc -=================================================================== ---- a/src/gcc/config.gcc (revision -+++ b/src/gcc/config.gcc (revision -@@ -817,7 +817,7 @@ - arm*-*-linux*) # ARM GNU/Linux with ELF - tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h" - case $target in -- arm*b-*) -+ arm*b-*-linux*) - tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" - ;; - esac -Index: gcc/config/alpha/linux-unwind.h -=================================================================== ---- a/src/gcc/config/alpha/linux-unwind.h (revision -+++ b/src/gcc/config/alpha/linux-unwind.h (revision -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Alpha Linux. -- Copyright (C) 2004, 2005, 2009, 2011 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2011, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -49,7 +49,7 @@ - else if (pc[1] == 0x201f015f) /* lda $0,NR_rt_sigreturn */ - { - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - sc = &rt_->uc.uc_mcontext; -Index: gcc/config/sparc/sparc.c -=================================================================== ---- a/src/gcc/config/sparc/sparc.c (revision -+++ b/src/gcc/config/sparc/sparc.c (revision -@@ -9638,6 +9638,7 @@ - void_list_node)); - DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL, - NULL_TREE, void_type_node); -+ TREE_PUBLIC (decl) = 1; - TREE_STATIC (decl) = 1; - make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl)); - DECL_VISIBILITY (decl) = VISIBILITY_HIDDEN; -Index: gcc/config/i386/linux-unwind.h -=================================================================== ---- a/src/gcc/config/i386/linux-unwind.h (revision -+++ b/src/gcc/config/i386/linux-unwind.h (revision -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for AMD x86-64 and x86. -- Copyright (C) 2004, 2005, 2006, 2009, 2010 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2009, 2010, 2012 Free Software Foundation, -+ Inc. - - This file is part of GCC. - -@@ -133,9 +134,9 @@ - { - struct rt_sigframe { - int sig; -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -Index: gcc/config/sh/linux-unwind.h -=================================================================== ---- a/src/gcc/config/sh/linux-unwind.h (revision -+++ b/src/gcc/config/sh/linux-unwind.h (revision -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for SH Linux. -- Copyright (C) 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2007, 2009, 2012 Free Software Foundation, -+ Inc. - - This file is part of GCC. - -@@ -80,9 +81,9 @@ - && (*(unsigned long *) (pc+11) == 0x6ff0fff0)) - { - struct rt_sigframe { -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -@@ -179,7 +180,7 @@ - && (*(unsigned short *) (pc+14) == 0x00ad)))) - { - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -Index: gcc/config/xtensa/linux-unwind.h -=================================================================== ---- a/src/gcc/config/xtensa/linux-unwind.h (revision -+++ b/src/gcc/config/xtensa/linux-unwind.h (revision -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Xtensa. -- Copyright (C) 2008, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2008, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -62,7 +62,7 @@ - struct sigcontext *sc; - - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_; - -Index: gcc/config/ia64/linux-unwind.h -=================================================================== ---- a/src/gcc/config/ia64/linux-unwind.h (revision -+++ b/src/gcc/config/ia64/linux-unwind.h (revision -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for IA64 Linux. -- Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -47,7 +47,7 @@ - struct sigframe { - char scratch[16]; - unsigned long sig_number; -- struct siginfo *info; -+ siginfo_t *info; - struct sigcontext *sc; - } *frame_ = (struct sigframe *)context->psp; - struct sigcontext *sc = frame_->sc; -@@ -137,7 +137,7 @@ - struct sigframe { - char scratch[16]; - unsigned long sig_number; -- struct siginfo *info; -+ siginfo_t *info; - struct sigcontext *sc; - } *frame = (struct sigframe *)context->psp; - struct sigcontext *sc = frame->sc; -Index: gcc/config/rs6000/rs6000.h -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.h (revision -+++ b/src/gcc/config/rs6000/rs6000.h (revision -@@ -469,10 +469,11 @@ - /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only. - Enable 32-bit fcfid's on any of the switches for newer ISA machines or - XILINX. */ --#define TARGET_FCFID (TARGET_POWERPC64 \ -- || TARGET_POPCNTB /* ISA 2.02 */ \ -- || TARGET_CMPB /* ISA 2.05 */ \ -- || TARGET_POPCNTD /* ISA 2.06 */ \ -+#define TARGET_FCFID (TARGET_POWERPC64 \ -+ || TARGET_PPC_GPOPT /* 970/power4 */ \ -+ || TARGET_POPCNTB /* ISA 2.02 */ \ -+ || TARGET_CMPB /* ISA 2.05 */ \ -+ || TARGET_POPCNTD /* ISA 2.06 */ \ - || TARGET_XILINX_FPU) - - #define TARGET_FCTIDZ TARGET_FCFID -Index: gcc/config/pa/linux-unwind.h -=================================================================== ---- a/src/gcc/config/pa/linux-unwind.h (revision -+++ b/src/gcc/config/pa/linux-unwind.h (revision -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for PA Linux. -- Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -63,7 +63,7 @@ - int i; - struct sigcontext *sc; - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *frame; - -Index: gcc/config/mips/linux-unwind.h -=================================================================== ---- a/src/gcc/config/mips/linux-unwind.h (revision -+++ b/src/gcc/config/mips/linux-unwind.h (revision -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for MIPS Linux. -- Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2012 Free Software -+ Foundation, Inc. - - This file is part of GCC. - -@@ -75,7 +76,7 @@ - struct rt_sigframe { - u_int32_t ass[4]; /* Argument save space for o32. */ - u_int32_t trampoline[2]; -- struct siginfo info; -+ siginfo_t info; - _sig_ucontext_t uc; - } *rt_ = context->cfa; - sc = &rt_->uc.uc_mcontext; -Index: gcc/config/bfin/linux-unwind.h -=================================================================== ---- a/src/gcc/config/bfin/linux-unwind.h (revision -+++ b/src/gcc/config/bfin/linux-unwind.h (revision -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Blackfin. -- Copyright (C) 2007, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2007, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -48,10 +48,10 @@ - { - struct rt_sigframe { - int sig; -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; - char retcode[8]; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - -Index: libstdc++-v3/include/bits/stl_algo.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/stl_algo.h (revision -+++ b/src/libstdc++-v3/include/bits/stl_algo.h (revision -@@ -1811,7 +1811,8 @@ - for (; __first != __last; ++__first) - if (__pred(*__first)) - { -- *__result1 = _GLIBCXX_MOVE(*__first); -+ if (__result1 != __first) -+ *__result1 = _GLIBCXX_MOVE(*__first); - ++__result1; - } - else -Index: libstdc++-v3/ChangeLog -=================================================================== ---- a/src/libstdc++-v3/ChangeLog (revision -+++ b/src/libstdc++-v3/ChangeLog (revision -@@ -1,3 +1,20 @@ -+2012-04-12 Jeffrey Yasskin -+ -+ PR libstdc++/52822 -+ * include/bits/stl_algo.h (__stable_partition_adaptive): Avoid -+ move-assigning an object to itself by explicitly testing for -+ identity. -+ * testsuite/25_algorithms/stable_partition/pr52822.cc: Test -+ vectors, which have a destructive self-move-assignment. -+ * testsuite/25_algorithms/stable_partition/moveable.cc (test02): -+ Test with rvalstruct, which explicitly checks -+ self-move-assignment. -+ -+2012-04-09 Terry Guo -+ -+ * testsuite/Makefile.am (TEST_GCC_EXEC_PREFIX): New. -+ * testsuite/Makefile.in: Regenerated. -+ - 2012-03-08 Jonathan Wakely - - PR libstdc++/52433 -Index: libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc (revision -+++ b/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc (revision -@@ -0,0 +1,43 @@ -+// { dg-options "-std=gnu++0x" } -+ -+// Copyright (C) 2012 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+ -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without Pred the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+ -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// . -+ -+// 25.2.12 [lib.alg.partitions] Partitions. -+ -+#include -+#include -+#include -+ -+bool true_vector_pred(const std::vector&) { return true; } -+ -+void -+test01() -+{ -+ std::vector > v(1); -+ v[0].push_back(7); -+ VERIFY( v[0].size() == 1 ); -+ std::stable_partition(v.begin(), v.end(), &true_vector_pred); -+ VERIFY( v[0].size() == 1 ); -+} -+ -+int -+main() -+{ -+ test01(); -+ return 0; -+} -Index: libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc (revision -+++ b/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc (revision -@@ -1,6 +1,6 @@ - // { dg-options "-std=gnu++0x" } - --// Copyright (C) 2009, 2010 Free Software Foundation, Inc. -+// Copyright (C) 2009, 2010, 2012 Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free - // software; you can redistribute it and/or modify it under the -@@ -39,6 +39,11 @@ - const int B[] = {2, 4, 6, 8, 10, 12, 14, 16, 1, 3, 5, 7, 9, 11, 13, 15, 17}; - const int N = sizeof(A) / sizeof(int); - -+// Check that starting with a true predicate works too. (PR52822) -+const int A2[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}; -+const int B2[] = {2, 4, 6, 8, 10, 12, 14, 16, 3, 5, 7, 9, 11, 13, 15, 17}; -+const int N2 = sizeof(A2) / sizeof(int); -+ - struct Pred - { - bool -@@ -46,7 +51,7 @@ - { return (x.val % 2) == 0; } - }; - --// 25.2.12 stable_partition() -+// 25.2.12 stable_partition(), starting with a false predicate. - void - test01() - { -@@ -60,9 +65,24 @@ - VERIFY( std::equal(s1, s1 + N, B) ); - } - -+// 25.2.12 stable_partition(), starting with a true predicate. -+void -+test02() -+{ -+ bool test __attribute__((unused)) = true; -+ -+ rvalstruct s1[N2]; -+ std::copy(A2, A2 + N2, s1); -+ Container con(s1, s1 + N2); -+ -+ std::stable_partition(con.begin(), con.end(), Pred()); -+ VERIFY( std::equal(s1, s1 + N2, B2) ); -+} -+ - int - main() - { - test01(); -+ test02(); - return 0; - } -Index: libstdc++-v3/testsuite/Makefile.in -=================================================================== ---- a/src/libstdc++-v3/testsuite/Makefile.in (revision -+++ b/src/libstdc++-v3/testsuite/Makefile.in (revision -@@ -502,6 +502,7 @@ - @echo 'set target_triplet $(target_triplet)' >>site.tmp - @echo 'set libiconv "$(LIBICONV)"' >>site.tmp - @echo 'set baseline_dir "$(baseline_dir)"' >> site.tmp -+ @echo 'set TEST_GCC_EXEC_PREFIX "$(libdir)/gcc/"' >> site.tmp - @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp - @test ! -f site.exp || \ - sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp -Index: libstdc++-v3/testsuite/Makefile.am -=================================================================== ---- a/src/libstdc++-v3/testsuite/Makefile.am (revision -+++ b/src/libstdc++-v3/testsuite/Makefile.am (revision -@@ -59,6 +59,7 @@ - @echo 'set target_triplet $(target_triplet)' >>site.tmp - @echo 'set libiconv "$(LIBICONV)"' >>site.tmp - @echo 'set baseline_dir "$(baseline_dir)"' >> site.tmp -+ @echo 'set TEST_GCC_EXEC_PREFIX "$(libdir)/gcc/"' >> site.tmp - @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp - @test ! -f site.exp || \ - sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp diff -Nru gcc-4.6-4.6.3/debian/patches/svn-updates.diff gcc-4.6-4.6.4/debian/patches/svn-updates.diff --- gcc-4.6-4.6.3/debian/patches/svn-updates.diff 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/patches/svn-updates.diff 2013-04-14 22:48:24.000000000 +0000 @@ -1,3072 +1,14 @@ -# DP: updates from the 4.6 branch upto 20120425 (r186817). +# DP: updates from the 4.6 branch upto 2013xxxx (r197516). last_updated() { cat > ${dir}LAST_UPDATED <callees; e; e = next) - { - next = e->next_callee; - if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ found |= cgraph_remove_node_and_inline_clones (e->callee, forbidden_node); - } - cgraph_remove_node (node); -+ return found; - } - - /* Notify finalize_compilation_unit that given node is reachable. */ -Index: gcc/cgraph.h -=================================================================== ---- a/src/gcc/cgraph.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cgraph.h (.../branches/gcc-4_6-branch) -@@ -547,7 +547,7 @@ - void cgraph_insert_node_to_hashtable (struct cgraph_node *node); - void cgraph_remove_edge (struct cgraph_edge *); - void cgraph_remove_node (struct cgraph_node *); --void cgraph_remove_node_and_inline_clones (struct cgraph_node *); -+bool cgraph_remove_node_and_inline_clones (struct cgraph_node *, struct cgraph_node *); - void cgraph_release_function_body (struct cgraph_node *); - void cgraph_node_remove_callees (struct cgraph_node *node); - struct cgraph_edge *cgraph_create_edge (struct cgraph_node *, -Index: gcc/DATESTAMP -=================================================================== ---- a/src/gcc/DATESTAMP (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/DATESTAMP (.../branches/gcc-4_6-branch) -@@ -1 +1 @@ --20120301 -+20120425 -Index: gcc/target.h -=================================================================== ---- a/src/gcc/target.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/target.h (.../branches/gcc-4_6-branch) -@@ -128,7 +128,8 @@ - scalar_to_vec, - cond_branch_not_taken, - cond_branch_taken, -- vec_perm -+ vec_perm, -+ vec_promote_demote - }; - - /* Sets of optimization levels at which an option may be enabled by -Index: gcc/toplev.c -=================================================================== ---- a/src/gcc/toplev.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/toplev.c (.../branches/gcc-4_6-branch) -@@ -1326,6 +1326,13 @@ - "and -ftree-loop-linear)"); - #endif - -+ if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2)) -+ { -+ warning (0, "-fstrict-volatile-bitfields disabled; " -+ "it is incompatible with ABI versions < 2"); -+ flag_strict_volatile_bitfields = 0; -+ } -+ - /* Unrolling all loops implies that standard loop unrolling must also - be done. */ - if (flag_unroll_all_loops) -Index: gcc/cgraphunit.c -=================================================================== ---- a/src/gcc/cgraphunit.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cgraphunit.c (.../branches/gcc-4_6-branch) -@@ -2157,8 +2157,19 @@ - first_clone->ipa_transforms_to_apply); - first_clone->ipa_transforms_to_apply = NULL; - -+ /* When doing recursive inlining, the clone may become unnecessary. -+ This is possible i.e. in the case when the recursive function is proved to be -+ non-throwing and the recursion happens only in the EH landing pad. -+ We can not remove the clone until we are done with saving the body. -+ Remove it now. */ -+ if (!first_clone->callers) -+ { -+ cgraph_remove_node_and_inline_clones (first_clone, NULL); -+ first_clone = NULL; -+ } - #ifdef ENABLE_CHECKING -- verify_cgraph_node (first_clone); -+ else -+ verify_cgraph_node (first_clone); - #endif - return first_clone; - } -Index: gcc/ChangeLog -=================================================================== ---- a/src/gcc/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,263 @@ -+2012-04-24 Jakub Jelinek -+ -+ PR middle-end/53084 -+ * varasm.c (compute_reloc_for_constant): Handle ADDR_EXPR -+ of MEM_REF. -+ (output_addressed_constants): Likewise. -+ -+2012-04-20 Thomas Schwinge -+ -+ struct siginfo vs. siginfo_t -+ -+ Backport from trunk (but apply to gcc/): -+ -+ 2012-04-20 Thomas Schwinge -+ -+ * config/alpha/linux-unwind.h (alpha_fallback_frame_state): Use -+ siginfo_t instead of struct siginfo. -+ * config/bfin/linux-unwind.h (bfin_fallback_frame_state): Likewise. -+ * config/i386/linux-unwind.h (x86_fallback_frame_state): Likewise. -+ * config/ia64/linux-unwind.h (ia64_fallback_frame_state) -+ (ia64_handle_unwabi): Likewise. -+ * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. -+ * config/pa/linux-unwind.h (pa32_fallback_frame_state): Likewise. -+ * config/sh/linux-unwind.h (shmedia_fallback_frame_state) -+ (sh_fallback_frame_state): Likewise. -+ * config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Likewise. -+ -+2012-04-13 Michael Meissner -+ -+ Backport from mainline -+ 2012-04-12 Michael Meissner -+ -+ PR target/52775 -+ * config/rs6000/rs6000.h (TARGET_FCFID): Add TARGET_PPC_GPOPT to -+ the list of options to enable the FCFID instruction. -+ -+2012-04-12 Richard Earnshaw -+ -+ PR target/49448 -+ * config.gcc (arm*-*-linux*): Use an unambiguous pattern for -+ detecting big-endian triplets. -+ -+2012-04-10 John David Anglin -+ -+ PR middle-end/52894 -+ * varasm.c (process_pending_assemble_externals): Set -+ pending_assemble_externals_processed true. -+ (assemble_external): Call assemble_external_real if the pending -+ assemble externals have been processed. -+ -+2012-04-09 Eric Botcazou -+ -+ PR target/52717 -+ * config/sparc/sparc.c (sparc_file_end): Set TREE_PUBLIC explicitly on -+ the DECL generated for the special GOT helper. -+ -+2012-04-06 Matt Turner -+ -+ * doc/install.texi: Correct typo "-mno-lsc" -> "-mno-llsc". -+ -+2012-03-29 Uros Bizjak -+ -+ * config/i386/sse.md (avx_hv4df3): Fix results -+ crossing 128bit lane boundary. -+ -+2012-03-29 Uros Bizjak -+ -+ Backported from mainline -+ 2012-03-27 Uros Bizjak -+ -+ PR target/52698 -+ * config/i386/i386-protos.h (ix86_legitimize_reload_address): -+ New prototype. -+ * config/i386/i386.h (LEGITIMIZE_RELOAD_ADDRESS): New define. -+ * config/i386/i386.c: Include reload.h. -+ (ix86_legitimize_reload_address): New function. -+ -+2012-03-28 Joey Ye -+ -+ Backported from mainline -+ 2011-12-20 Bernd Schmidt -+ -+ PR middle-end/51200 -+ * expr.c (store_field): Avoid a direct store if the mode is larger -+ than the size of the bit field. -+ * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields, -+ treat non-volatile bit fields like volatile ones. -+ * toplev.c (process_options): Disallow combination of -+ -fstrict-volatile-bitfields and ABI versions less than 2. -+ * config/arm/arm.c (arm_option_override): Don't enable -+ flag_strict_volatile_bitfields if the ABI version is less than 2. -+ * config/h8300/h8300.c (h8300_option_override): Likewise. -+ * config/rx/rx.c (rx_option_override): Likewise. -+ * config/m32c/m32c.c (m32c_option_override): Likewise. -+ * config/sh/sh.c (sh_option_override): Likewise. -+ -+ 2011-12-22 Joey Ye -+ -+ * toplev.c (process_options): Fix typo. -+ -+2012-03-28 Martin Jambor -+ -+ Backported from mainline -+ 2012-03-27 Martin Jambor -+ -+ PR middle-end/52693 -+ * tree-sra.c (sra_modify_assign): Do not call -+ load_assign_lhs_subreplacements when working with an unscalarizable -+ region. -+ -+2012-03-28 Georg-Johann Lay -+ -+ PR target/52741 -+ -+ Revert r181936 from 2011-12-02 for: -+ * config/avr/libgcc.S (__prologue_saves__, __epilogue_restores__) -+ * config/avr/avr.md (movhi_sp_r_irq_off, movhi_sp_r_irq_on) -+ * config/avr/avr.c (output_movhi, avr_file_start) -+ -+2012-03-28 Jakub Jelinek -+ -+ PR target/52736 -+ * config/i386/sse.md (sse2_loadlpd splitter): Use offset 0 -+ instead of 8 in adjust_address. -+ -+2012-03-24 Jan Hubicka -+ -+ Backport from mainline -+ PR regression/52696 -+ * predict.c (predict_paths_for_bb): Fix typo. -+ -+2012-03-24 Jan Hubicka -+ -+ Backport from mainline -+ PR middle-end/51737 -+ * cgraph.c (cgraph_remove_node_and_inline_clones): Add FORBIDDEN_NODE -+ parameter. -+ * cgraph.h (cgraph_remove_node_and_inline_clones): Update prototype. -+ * ipa-inline-transform.c (save_inline_function_body): Remove copied -+ clone if needed. -+ * tree-inline.c (delete_unreachable_blocks_update_callgraph): Update. -+ -+2012-03-24 Steven Bosscher -+ -+ PR middle-end/52640 -+ * varasm.c: Include pointer-set.h. -+ (pending_assemble_externals_set): New pointer set. -+ (process_pending_assemble_externals): Destroy the pointer set. -+ (assemble_external): See if decl is in pending_assemble_externals_set, -+ and add it to pending_assemble_externals if necessary. -+ (init_varasm_once): Allocate pending_assemble_externals_set. -+ -+2012-03-16 Jan Hubicka -+ -+ Backport from mainline -+ PR middle-end/48600 -+ * predict.c (predict_paths_for_bb): Prevent looping. -+ (predict_paths_leading_to_edge, predict_paths_leading_to): Update. -+ -+2012-03-16 Michael Hope -+ -+ Backport from mainline -+ 2011-05-05 Michael Hope -+ -+ PR pch/45979 -+ * config/host-linux.c (TRY_EMPTY_VM_SPACE): Define for -+ __ARM_EABI__ hosts. -+ -+2012-03-15 Chung-Lin Tang -+ -+ Backport from mainline -+ 2012-03-10 Chung-Lin Tang -+ -+ PR rtl-optimization/52528 -+ * combine.c (can_combine_p): Add setting of subst_low_luid -+ before call to expand_field_assignment(). -+ -+2012-03-12 John David Anglin -+ -+ Backport from mainline -+ 2011-09-03 John David Anglin -+ -+ PR Bug middle-end/50232 -+ * config/pa/pa.md (return): Define "return" insn pattern. -+ (epilogue): Use it when no epilogue is needed. -+ * config/pa/pa.c (pa_can_use_return_insn): New function. -+ * config/pa/pa-protos.h (pa_can_use_return_insn): Declare. -+ -+ Backport for mainline -+ 2012-01-28 John David Anglin -+ -+ PR target/51871 -+ * config/pa/pa.c (pa_return_addr_rtx): Add support for PA2.0 export -+ stubs. -+ -+2012-03-06 Michael Meissner -+ -+ Backport from mainline -+ PR target/50310 -+ * config/rs6000/vector.md (vector_uneq): Add support for -+ UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons. -+ (vector_ltgt): Likewise. -+ (vector_ordered): Likewise. -+ (vector_unordered): Likewise. -+ * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise. -+ -+2012-03-04 John David Anglin -+ -+ Backport from mainline -+ 2012-03-01 John David Anglin -+ -+ PR target/52408 -+ * config/pa/pa.md (zvdep_imm32): Change type of variable x from int to -+ unsigned HOST_WIDE_INT. -+ (zvdep_imm64): Likewise. -+ (vdepi_ior): Change type of variable x from int to HOST_WIDE_INT. -+ (vdepi_and): Likewise. -+ Likewise for unamed 64-bit patterns. -+ * config/pa/predicates.md (lhs_lshift_cint_operand): Update comment. -+ -+2012-03-03 Eric Botcazou -+ -+ PR target/52425 -+ Backport from mainline -+ 2011-05-22 Eric Botcazou -+ -+ * config/sparc/sparc.c (sparc_delegitimize_address): Handle -+ UNSPEC_MOVE_PIC pattern. -+ -+2012-03-02 Peter Bergner -+ -+ Backport from mainline -+ 2012-03-02 Peter Bergner -+ -+ * config/rs6000/vsx.md (vsx_set_): Reorder operands. -+ -+2012-03-02 Bill Schmidt -+ Ira Rosen -+ -+ PR tree-optimization/50031 -+ PR tree-optimization/50969 -+ * targhooks.c (default_builtin_vectorization_cost): Handle -+ vec_promote_demote. -+ * target.h (enum vect_cost_for_stmt): Add vec_promote_demote. -+ * tree-vect-loop.c (vect_get_single_scalar_iteraion_cost): Handle -+ all types of reduction and pattern statements. -+ (vect_estimate_min_profitable_iters): Likewise. -+ * tree-vect-stmts.c (vect_model_promotion_demotion_cost): New function. -+ (vect_model_store_cost): Use vec_perm rather than vector_stmt for -+ statement cost. -+ (vect_model_load_cost): Likewise. -+ (vect_get_load_cost): Likewise; add dump logic for explicit realigns. -+ (vectorizable_type_demotion): Call vect_model_promotion_demotion_cost. -+ (vectorizable_type_promotion): Likewise. -+ * config/spu/spu.c (spu_builtin_vectorization_cost): Handle -+ vec_promote_demote. -+ * config/i386/i386.c (ix86_builtin_vectorization_cost): Likewise. -+ * config/rs6000/rs6000.c (rs6000_builtin_vectorization_cost): Update -+ vec_perm for VSX and handle vec_promote_demote. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,30 @@ -+/* { dg-require-effective-target arm_eabi } */ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+/* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ -+/* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */ -+/* { dg-final { scan-assembler-not "strb" } } */ -+ -+struct thing { -+ unsigned a: 8; -+ unsigned b: 8; -+ unsigned c: 8; -+ unsigned d: 8; -+}; -+ -+struct thing2 { -+ volatile unsigned a: 8; -+ volatile unsigned b: 8; -+ volatile unsigned c: 8; -+ volatile unsigned d: 8; -+}; -+ -+void test1(volatile struct thing *t) -+{ -+ t->a = 5; -+} -+ -+void test2(struct thing2 *t) -+{ -+ t->a = 5; -+} -Index: gcc/testsuite/gcc.target/powerpc/pr52775.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr52775.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr52775.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,16 @@ -+/* { dg-do compile { target { powerpc*-*-* && ilp32 } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-options "-O1 -mcpu=power4" } */ -+/* { dg-final { scan-assembler-times "fcfid" 2 } } */ -+ -+double -+int_to_double (int *p) -+{ -+ return (double)*p; -+} -+ -+double -+long_long_to_double (long long *p) -+{ -+ return (double)*p; -+} -Index: gcc/testsuite/gcc.target/powerpc/pr52457.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/powerpc/pr52457.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.target/powerpc/pr52457.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,34 @@ -+/* { dg-do run { target { powerpc*-*-linux* } } } */ -+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ -+/* { dg-skip-if "" { powerpc*-*-*spe* } { "*" } { "" } } */ -+/* { dg-require-effective-target vsx_hw } */ -+/* { dg-options "-O1 -mcpu=power7" } */ -+ -+extern void abort (void); -+ -+typedef long long T; -+typedef T vl_t __attribute__((vector_size(2 * sizeof (T)))); -+ -+vl_t -+buggy_func (T x) -+{ -+ vl_t w; -+ T *p = (T *)&w; -+ p[0] = p[1] = x; -+ return w; -+} -+ -+int -+main(void) -+{ -+ vl_t rval; -+ T *pl; -+ -+ pl = (T *) &rval; -+ rval = buggy_func (2); -+ -+ if (pl[0] != 2 || pl[1] != 2) -+ abort (); -+ -+ return 0; -+} -Index: gcc/testsuite/gcc.target/i386/pr52736.c -=================================================================== ---- a/src/gcc/testsuite/gcc.target/i386/pr52736.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.target/i386/pr52736.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,29 @@ -+/* PR target/52736 */ -+/* { dg-do run } */ -+/* { dg-options "-O1 -msse2" } */ -+/* { dg-require-effective-target sse2_runtime } */ -+ -+#include -+ -+typedef double D __attribute__((may_alias)); -+__attribute__((aligned(16))) static const double r[4] = { 1., 5., 1., 3. }; -+ -+__attribute__((noinline, noclone)) -+void -+foo (int x) -+{ -+ asm volatile ("" : "+g" (x) : : "memory"); -+ if (x != 3) -+ __builtin_abort (); -+} -+ -+int -+main () -+{ -+ __m128d t = _mm_set1_pd (5.); -+ ((D *)(&t))[0] = 1.; -+ foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[0])))); -+ ((D *)(&t))[1] = 3.; -+ foo (_mm_movemask_pd (_mm_cmpeq_pd (t, _mm_load_pd (&r[2])))); -+ return 0; -+} -Index: gcc/testsuite/gfortran.dg/intrinsic_8.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/intrinsic_8.f90 (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gfortran.dg/intrinsic_8.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,23 @@ -+! { dg-do compile } -+! -+! PR fortran/52452 -+! -+! Contributed by Roger Ferrer Ibanez -+! -+PROGRAM test_etime -+ IMPLICIT NONE -+ INTRINSIC :: etime -+ REAL(4) :: tarray(1:2) -+ REAL(4) :: result -+ -+ CALL etime(tarray, result) -+END PROGRAM test_etime -+ -+subroutine test_etime2 -+ IMPLICIT NONE -+ INTRINSIC :: etime -+ REAL(4) :: tarray(1:2) -+ REAL(4) :: result -+ -+ result = etime(tarray) -+END subroutine test_etime2 -Index: gcc/testsuite/gfortran.dg/proc_ptr_34.f90 -=================================================================== ---- a/src/gcc/testsuite/gfortran.dg/proc_ptr_34.f90 (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gfortran.dg/proc_ptr_34.f90 (.../branches/gcc-4_6-branch) -@@ -0,0 +1,79 @@ -+! { dg-do compile } -+! -+! PR fortran/52469 -+! -+! This was failing as the DECL of the proc pointer "func" -+! was used for the interface of the proc-pointer component "my_f_ptr" -+! rather than the decl of the proc-pointer target -+! -+! Contributed by palott@gmail.com -+! -+ -+module ExampleFuncs -+ implicit none -+ -+ ! NOTE: "func" is a procedure pointer! -+ pointer :: func -+ interface -+ function func (z) -+ real :: func -+ real, intent (in) :: z -+ end function func -+ end interface -+ -+ type Contains_f_ptr -+ procedure (func), pointer, nopass :: my_f_ptr -+ end type Contains_f_ptr -+contains -+ -+function f1 (x) -+ real :: f1 -+ real, intent (in) :: x -+ -+ f1 = 2.0 * x -+ -+ return -+end function f1 -+ -+function f2 (x) -+ real :: f2 -+ real, intent (in) :: x -+ -+ f2 = 3.0 * x**2 -+ -+ return -+end function f2 -+ -+function fancy (func, x) -+ real :: fancy -+ real, intent (in) :: x -+ -+ interface AFunc -+ function func (y) -+ real :: func -+ real, intent (in) ::y -+ end function func -+ end interface AFunc -+ -+ fancy = func (x) + 3.3 * x -+end function fancy -+ -+end module ExampleFuncs -+ -+ -+program test_proc_ptr -+ use ExampleFuncs -+ implicit none -+ -+ type (Contains_f_ptr), dimension (2) :: NewType -+ -+ !NewType(1) % my_f_ptr => f1 -+ NewType(2) % my_f_ptr => f2 -+ -+ !write (*, *) NewType(1) % my_f_ptr (3.0), NewType(2) % my_f_ptr (3.0) -+ write (6, *) NewType(2) % my_f_ptr (3.0) ! < Shall print '27.0' -+ -+ stop -+end program test_proc_ptr -+ -+! { dg-final { cleanup-modules "examplefuncs" } } -Index: gcc/testsuite/gcc.c-torture/execute/pr53084.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/execute/pr53084.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.c-torture/execute/pr53084.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,18 @@ -+/* PR middle-end/53084 */ -+ -+extern void abort (void); -+ -+__attribute__((noinline, noclone)) void -+bar (const char *p) -+{ -+ if (p[0] != 'o' || p[1] != 'o' || p[2]) -+ abort (); -+} -+ -+int -+main () -+{ -+ static const char *const foo[] = {"foo" + 1}; -+ bar (foo[0]); -+ return 0; -+} -Index: gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c -=================================================================== ---- a/src/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.c-torture/compile/limits-externdecl.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,56 @@ -+/* Inspired by the test case for PR middle-end/52640. */ -+ -+typedef struct -+{ -+ char *value; -+} REFERENCE; -+ -+/* Add a few "extern int Xxxxxx ();" declarations. */ -+#undef DEF -+#undef LIM1 -+#undef LIM2 -+#undef LIM3 -+#undef LIM4 -+#undef LIM5 -+#undef LIM6 -+#define DEF(x) extern int x () -+#define LIM1(x) DEF(x##0); DEF(x##1); DEF(x##2); DEF(x##3); DEF(x##4); \ -+ DEF(x##5); DEF(x##6); DEF(x##7); DEF(x##8); DEF(x##9); -+#define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ -+ LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) -+#define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ -+ LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) -+#define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ -+ LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) -+#define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ -+ LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) -+#define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ -+ LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) -+LIM5 (X); -+ -+/* Add references to them, or GCC will simply ignore the extern decls. */ -+#undef DEF -+#undef LIM1 -+#undef LIM2 -+#undef LIM3 -+#undef LIM4 -+#undef LIM5 -+#undef LIM6 -+#define DEF(x) (char *) x -+#define LIM1(x) DEF(x##0), DEF(x##1), DEF(x##2), DEF(x##3), DEF(x##4), \ -+ DEF(x##5), DEF(x##6), DEF(x##7), DEF(x##8), DEF(x##9), -+#define LIM2(x) LIM1(x##0) LIM1(x##1) LIM1(x##2) LIM1(x##3) LIM1(x##4) \ -+ LIM1(x##5) LIM1(x##6) LIM1(x##7) LIM1(x##8) LIM1(x##9) -+#define LIM3(x) LIM2(x##0) LIM2(x##1) LIM2(x##2) LIM2(x##3) LIM2(x##4) \ -+ LIM2(x##5) LIM2(x##6) LIM2(x##7) LIM2(x##8) LIM2(x##9) -+#define LIM4(x) LIM3(x##0) LIM3(x##1) LIM3(x##2) LIM3(x##3) LIM3(x##4) \ -+ LIM3(x##5) LIM3(x##6) LIM3(x##7) LIM3(x##8) LIM3(x##9) -+#define LIM5(x) LIM4(x##0) LIM4(x##1) LIM4(x##2) LIM4(x##3) LIM4(x##4) \ -+ LIM4(x##5) LIM4(x##6) LIM4(x##7) LIM4(x##8) LIM4(x##9) -+#define LIM6(x) LIM5(x##0) LIM5(x##1) LIM5(x##2) LIM5(x##3) LIM5(x##4) \ -+ LIM5(x##5) LIM5(x##6) LIM5(x##7) LIM5(x##8) LIM5(x##9) -+REFERENCE references[] = { -+ LIM5 (X) -+ 0 -+}; -+ -Index: gcc/testsuite/gcc.dg/torture/pr52693.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/torture/pr52693.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.dg/torture/pr52693.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,33 @@ -+/* { dg-do run } */ -+ -+struct pair -+{ -+ int x; -+ int y; -+}; -+ -+struct array -+{ -+ struct pair elems[ 2 ]; -+ unsigned index; -+}; -+ -+extern void abort (); -+ -+void __attribute__ ((noinline,noclone)) -+test_results (int x1, int y1, int x2, int y2) -+{ -+ if (x1 != x2 || y1 != y2) -+ abort (); -+} -+ -+int -+main (void) -+{ -+ struct array arr = {{{1,2}, {3,4}}, 1}; -+ struct pair last = arr.elems[arr.index]; -+ -+ test_results ( last.x, last.y, arr.elems[1].x, arr.elems[1].y); -+ -+ return 0; -+} -Index: gcc/testsuite/gcc.dg/volatile-bitfields-2.c -=================================================================== ---- a/src/gcc/testsuite/gcc.dg/volatile-bitfields-2.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/gcc.dg/volatile-bitfields-2.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,15 @@ -+/* { dg-do run } */ -+/* { dg-options "-fstrict-volatile-bitfields" } */ -+ -+extern void abort(void); -+struct thing { -+ volatile unsigned short a: 8; -+ volatile unsigned short b: 8; -+} t = {1,2}; -+ -+int main() -+{ -+ t.a = 3; -+ if (t.a !=3 || t.b !=2) abort(); -+ return 0; -+} -Index: gcc/testsuite/ChangeLog -=================================================================== ---- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,83 @@ -+2012-04-24 Jakub Jelinek -+ -+ PR middle-end/53084 -+ * gcc.c-torture/execute/pr53084.c: New test. -+ -+2012-04-13 Michael Meissner -+ -+ Backport from mainline -+ 2012-04-12 Michael Meissner -+ -+ PR target/52775 -+ * gcc.target/powerpc/pr52775.c: New file. -+ -+2012-04-03 Jason Merrill -+ -+ PR c++/52796 -+ * g++.dg/cpp0x/variadic-value1.C: New. -+ -+2012-03-28 Joey Ye -+ -+ Backported from mainline -+ 2011-12-20 Bernd Schmidt -+ -+ PR middle-end/51200 -+ * gcc.target/arm/volatile-bitfields-4.c: New test. -+ * c-c++-common/abi-bf.c: New test. -+ -+ 2011-12-26 Joey Ye -+ -+ PR middle-end/51200 -+ * gcc.dg/volatile-bitfields-2.c: New test. -+ -+2012-03-28 Martin Jambor -+ -+ Backported from mainline -+ 2012-03-27 Martin Jambor -+ -+ PR middle-end/52693 -+ * gcc.dg/torture/pr52693.c: New test. -+ -+2012-03-28 Jakub Jelinek -+ -+ PR target/52736 -+ * gcc.target/i386/pr52736.c: New test. -+ -+2012-03-24 Jan Hubicka -+ -+ PR middle-end/51737 -+ * g++.dg/torture/pr51737.C: New testcase -+ -+2012-03-24 Steven Bosscher -+ -+ PR middle-end/52640 -+ * gcc.c-torture/compile/limits-externdecl.c: New test. -+ -+2012-03-16 Jan Hubicka -+ -+ PR middle-end/48600 -+ * g++.dg/torture/pr48600.C: New testcase. -+ -+2012-03-10 Tobias Burnus -+ -+ PR fortran/52469 -+ * gfortran.dg/proc_ptr_34.f90: New. -+ -+2012-03-06 Tobias Burnus -+ -+ Backport from mainline -+ 2012-03-02 Tobias Burnus -+ -+ PR fortran/52452 -+ * gfortran.dg/intrinsic_8.f90: New. -+ -+2012-03-02 Peter Bergner -+ -+ Backport from mainline -+ 2012-03-02 Peter Bergner -+ -+ * gcc.target/powerpc/pr52457.c: New test. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/testsuite/g++.dg/cpp0x/variadic-value1.C -=================================================================== ---- a/src/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/g++.dg/cpp0x/variadic-value1.C (.../branches/gcc-4_6-branch) -@@ -0,0 +1,24 @@ -+// PR c++/52796 -+// { dg-do run { target c++11 } } -+ -+inline void *operator new(__SIZE_TYPE__ s, void *p) { return p; } -+ -+struct A -+{ -+ int i; -+ template -+ A(Ts&&... ts): i(ts...) { } -+}; -+ -+static union { -+ unsigned char c[sizeof(A)]; -+ int i; -+}; -+ -+int main() -+{ -+ i = 0xdeadbeef; -+ new(c) A; -+ if (i != 0) -+ __builtin_abort(); -+} -Index: gcc/testsuite/c-c++-common/abi-bf.c -=================================================================== ---- a/src/gcc/testsuite/c-c++-common/abi-bf.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/testsuite/c-c++-common/abi-bf.c (.../branches/gcc-4_6-branch) -@@ -0,0 +1,3 @@ -+/* { dg-warning "incompatible" } */ -+/* { dg-do compile } */ -+/* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */ -Index: gcc/cp/decl.c -=================================================================== ---- a/src/gcc/cp/decl.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cp/decl.c (.../branches/gcc-4_6-branch) -@@ -3636,7 +3636,7 @@ - TYPE_SIZE_UNIT (nullptr_type_node) = size_int (GET_MODE_SIZE (ptr_mode)); - TYPE_UNSIGNED (nullptr_type_node) = 1; - TYPE_PRECISION (nullptr_type_node) = GET_MODE_BITSIZE (ptr_mode); -- SET_TYPE_MODE (nullptr_type_node, Pmode); -+ SET_TYPE_MODE (nullptr_type_node, ptr_mode); - record_builtin_type (RID_MAX, "decltype(nullptr)", nullptr_type_node); - nullptr_node = build_int_cst (nullptr_type_node, 0); - } -Index: gcc/cp/ChangeLog -=================================================================== ---- a/src/gcc/cp/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cp/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,14 @@ -+2012-04-04 Steve Ellcey -+ -+ Backported from mainline. -+ * decl.c (cxx_init_decl_processing): Use ptr_mode instead of Pmode. -+ -+2012-04-03 Jason Merrill -+ -+ PR c++/52796 -+ * pt.c (tsubst_initializer_list): A pack expansion with no elements -+ means value-initialization. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/cp/pt.c -=================================================================== ---- a/src/gcc/cp/pt.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cp/pt.c (.../branches/gcc-4_6-branch) -@@ -17785,6 +17785,7 @@ - } - else - { -+ tree tmp; - decl = tsubst_copy (TREE_PURPOSE (t), argvec, - tf_warning_or_error, NULL_TREE); - -@@ -17793,10 +17794,17 @@ - in_base_initializer = 1; - - init = TREE_VALUE (t); -+ tmp = init; - if (init != void_type_node) - init = tsubst_expr (init, argvec, - tf_warning_or_error, NULL_TREE, - /*integral_constant_expression_p=*/false); -+ if (init == NULL_TREE && tmp != NULL_TREE) -+ /* If we had an initializer but it instantiated to nothing, -+ value-initialize the object. This will only occur when -+ the initializer was a pack expansion where the parameter -+ packs used in that expansion were of length zero. */ -+ init = void_type_node; - in_base_initializer = 0; - } - -Index: gcc/cp/semantics.c -=================================================================== ---- a/src/gcc/cp/semantics.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/cp/semantics.c (.../branches/gcc-4_6-branch) -@@ -6763,7 +6763,6 @@ - - STRIP_NOPS (sub); - subtype = TREE_TYPE (sub); -- gcc_assert (POINTER_TYPE_P (subtype)); - - if (TREE_CODE (sub) == ADDR_EXPR) - { -Index: gcc/expr.c -=================================================================== ---- a/src/gcc/expr.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/expr.c (.../branches/gcc-4_6-branch) -@@ -5971,6 +5971,8 @@ - || bitpos % GET_MODE_ALIGNMENT (mode)) - && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target))) - || (bitpos % BITS_PER_UNIT != 0))) -+ || (bitsize >= 0 && mode != BLKmode -+ && GET_MODE_BITSIZE (mode) > bitsize) - /* If the RHS and field are a constant size and the size of the - RHS isn't the same size as the bitfield, we must use bitfield - operations. */ -Index: gcc/predict.c -=================================================================== ---- a/src/gcc/predict.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/predict.c (.../branches/gcc-4_6-branch) -@@ -1790,7 +1790,8 @@ - static void - predict_paths_for_bb (basic_block cur, basic_block bb, - enum br_predictor pred, -- enum prediction taken) -+ enum prediction taken, -+ bitmap visited) - { - edge e; - edge_iterator ei; -@@ -1811,7 +1812,7 @@ - continue; - gcc_assert (bb == cur || dominated_by_p (CDI_POST_DOMINATORS, cur, bb)); - -- /* See if there is how many edge from e->src that is not abnormal -+ /* See if there is an edge from e->src that is not abnormal - and does not lead to BB. */ - FOR_EACH_EDGE (e2, ei2, e->src->succs) - if (e2 != e -@@ -1824,16 +1825,20 @@ - - /* If there is non-abnormal path leaving e->src, predict edge - using predictor. Otherwise we need to look for paths -- leading to e->src. */ -+ leading to e->src. -+ -+ The second may lead to infinite loop in the case we are predicitng -+ regions that are only reachable by abnormal edges. We simply -+ prevent visiting given BB twice. */ - if (found) - predict_edge_def (e, pred, taken); -- else -- predict_paths_for_bb (e->src, e->src, pred, taken); -+ else if (bitmap_set_bit (visited, e->src->index)) -+ predict_paths_for_bb (e->src, e->src, pred, taken, visited); - } - for (son = first_dom_son (CDI_POST_DOMINATORS, cur); - son; - son = next_dom_son (CDI_POST_DOMINATORS, son)) -- predict_paths_for_bb (son, bb, pred, taken); -+ predict_paths_for_bb (son, bb, pred, taken, visited); - } - - /* Sets branch probabilities according to PREDiction and -@@ -1843,7 +1848,9 @@ - predict_paths_leading_to (basic_block bb, enum br_predictor pred, - enum prediction taken) - { -- predict_paths_for_bb (bb, bb, pred, taken); -+ bitmap visited = BITMAP_ALLOC (NULL); -+ predict_paths_for_bb (bb, bb, pred, taken, visited); -+ BITMAP_FREE (visited); - } - - /* Like predict_paths_leading_to but take edge instead of basic block. */ -@@ -1866,7 +1873,11 @@ - break; - } - if (!has_nonloop_edge) -- predict_paths_for_bb (bb, bb, pred, taken); -+ { -+ bitmap visited = BITMAP_ALLOC (NULL); -+ predict_paths_for_bb (bb, bb, pred, taken, visited); -+ BITMAP_FREE (visited); -+ } - else - predict_edge_def (e, pred, taken); - } -Index: gcc/fortran/ChangeLog -=================================================================== ---- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,18 @@ -+2012-03-10 Tobias Burnus -+ -+ PR fortran/52469 -+ * trans-types.c (gfc_get_function_type): Handle backend_decl -+ of a procedure pointer. -+ -+2012-03-06 Tobias Burnus -+ -+ Backport from mainline -+ 2012-03-02 Tobias Burnus -+ -+ PR fortran/52452 -+ * resolve.c (resolve_intrinsic): Don't search for a -+ function if we know that it is a subroutine. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/fortran/trans-types.c -=================================================================== ---- a/src/gcc/fortran/trans-types.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/fortran/trans-types.c (.../branches/gcc-4_6-branch) -@@ -2519,7 +2519,11 @@ - || sym->attr.flavor == FL_PROGRAM); - - if (sym->backend_decl) -- return TREE_TYPE (sym->backend_decl); -+ { -+ if (sym->attr.proc_pointer) -+ return TREE_TYPE (TREE_TYPE (sym->backend_decl)); -+ return TREE_TYPE (sym->backend_decl); -+ } - - alternate_return = 0; - typelist = NULL_TREE; -Index: gcc/fortran/resolve.c -=================================================================== ---- a/src/gcc/fortran/resolve.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/fortran/resolve.c (.../branches/gcc-4_6-branch) -@@ -1452,7 +1452,7 @@ - - if (sym->intmod_sym_id) - isym = gfc_intrinsic_function_by_id ((gfc_isym_id) sym->intmod_sym_id); -- else -+ else if (!sym->attr.subroutine) - isym = gfc_find_function (sym->name); - - if (isym) -Index: gcc/stor-layout.c -=================================================================== ---- a/src/gcc/stor-layout.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/stor-layout.c (.../branches/gcc-4_6-branch) -@@ -660,12 +660,13 @@ - /* See if we can use an ordinary integer mode for a bit-field. - Conditions are: a fixed size that is correct for another mode, - occupying a complete byte or bytes on proper boundary, -- and not volatile or not -fstrict-volatile-bitfields. */ -+ and not -fstrict-volatile-bitfields. If the latter is set, -+ we unfortunately can't check TREE_THIS_VOLATILE, as a cast -+ may make a volatile object later. */ - if (TYPE_SIZE (type) != 0 - && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST - && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT -- && !(TREE_THIS_VOLATILE (decl) -- && flag_strict_volatile_bitfields > 0)) -+ && flag_strict_volatile_bitfields <= 0) - { - enum machine_mode xmode - = mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1); -Index: gcc/tree-vect-loop.c -=================================================================== ---- a/src/gcc/tree-vect-loop.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/tree-vect-loop.c (.../branches/gcc-4_6-branch) -@@ -2104,7 +2104,8 @@ - if (stmt_info - && !STMT_VINFO_RELEVANT_P (stmt_info) - && (!STMT_VINFO_LIVE_P (stmt_info) -- || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def)) -+ || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info))) -+ && !STMT_VINFO_IN_PATTERN_P (stmt_info)) - continue; - - if (STMT_VINFO_DATA_REF (vinfo_for_stmt (stmt))) -@@ -2251,11 +2252,19 @@ - { - gimple stmt = gsi_stmt (si); - stmt_vec_info stmt_info = vinfo_for_stmt (stmt); -+ -+ if (STMT_VINFO_IN_PATTERN_P (stmt_info)) -+ { -+ stmt = STMT_VINFO_RELATED_STMT (stmt_info); -+ stmt_info = vinfo_for_stmt (stmt); -+ } -+ - /* Skip stmts that are not vectorized inside the loop. */ - if (!STMT_VINFO_RELEVANT_P (stmt_info) - && (!STMT_VINFO_LIVE_P (stmt_info) -- || STMT_VINFO_DEF_TYPE (stmt_info) != vect_reduction_def)) -+ || !VECTORIZABLE_CYCLE_DEF (STMT_VINFO_DEF_TYPE (stmt_info)))) - continue; -+ - vec_inside_cost += STMT_VINFO_INSIDE_OF_LOOP_COST (stmt_info) * factor; - /* FIXME: for stmts in the inner-loop in outer-loop vectorization, - some of the "outside" costs are generated inside the outer-loop. */ -Index: gcc/tree-sra.c -=================================================================== ---- a/src/gcc/tree-sra.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/tree-sra.c (.../branches/gcc-4_6-branch) -@@ -2937,7 +2937,13 @@ - } - else - { -- if (access_has_children_p (lacc) && access_has_children_p (racc)) -+ if (access_has_children_p (lacc) -+ && access_has_children_p (racc) -+ /* When an access represents an unscalarizable region, it usually -+ represents accesses with variable offset and thus must not be used -+ to generate new memory accesses. */ -+ && !lacc->grp_unscalarizable_region -+ && !racc->grp_unscalarizable_region) - { - gimple_stmt_iterator orig_gsi = *gsi; - enum unscalarized_data_handling refreshed; -Index: gcc/lto/lto.c -=================================================================== ---- a/src/gcc/lto/lto.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/lto/lto.c (.../branches/gcc-4_6-branch) -@@ -893,7 +893,8 @@ - - for (node = cgraph_nodes; node; node = node->next) - { -- if (!partition_cgraph_node_p (node)) -+ if (!partition_cgraph_node_p (node) -+ || node->aux) - continue; - - file_data = node->local.lto_file_data; -@@ -923,13 +924,13 @@ - npartitions++; - } - -- if (!node->aux) -- add_cgraph_node_to_partition (partition, node); -+ add_cgraph_node_to_partition (partition, node); - } - - for (vnode = varpool_nodes; vnode; vnode = vnode->next) - { -- if (!partition_varpool_node_p (vnode)) -+ if (!partition_varpool_node_p (vnode) -+ || vnode->aux) - continue; - file_data = vnode->lto_file_data; - slot = pointer_map_contains (pmap, file_data); -@@ -943,8 +944,7 @@ - npartitions++; - } - -- if (!vnode->aux) -- add_varpool_node_to_partition (partition, vnode); -+ add_varpool_node_to_partition (partition, vnode); - } - for (node = cgraph_nodes; node; node = node->next) - node->aux = NULL; -@@ -1050,8 +1050,9 @@ - - for (i = 0; i < n_nodes; i++) - { -- if (!order[i]->aux) -- add_cgraph_node_to_partition (partition, order[i]); -+ if (order[i]->aux) -+ continue; -+ add_cgraph_node_to_partition (partition, order[i]); - total_size -= order[i]->global.size; - - /* Once we added a new node to the partition, we also want to add -@@ -1231,6 +1232,8 @@ - } - i = best_i; - /* When we are finished, avoid creating empty partition. */ -+ while (i < n_nodes - 1 && order[i + 1]->aux) -+ i++; - if (i == n_nodes - 1) - break; - partition = new_partition (""); -Index: gcc/lto/ChangeLog -=================================================================== ---- a/src/gcc/lto/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/lto/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,12 @@ -+2012-04-23 Peter Bergner -+ -+ Backport from mainline -+ 2011-06-11 Jan Hubicka -+ -+ PR lto/48246 -+ * lto.c (lto_1_to_1_map): Don't create empty partitions. -+ (lto_balanced_map): Likewise. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: gcc/varasm.c -=================================================================== ---- a/src/gcc/varasm.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/varasm.c (.../branches/gcc-4_6-branch) -@@ -1,7 +1,7 @@ - /* Output variables, constants and external declarations, for GNU compiler. - Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, - 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, -- 2010, 2011 Free Software Foundation, Inc. -+ 2010, 2011, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -30,6 +30,7 @@ - #include "config.h" - #include "system.h" - #include "coretypes.h" -+#include "pointer-set.h" - #include "tm.h" - #include "rtl.h" - #include "tree.h" -@@ -2097,6 +2098,19 @@ - it all the way to final. See PR 17982 for further discussion. */ - static GTY(()) tree pending_assemble_externals; - -+/* FIXME: Trunk is at GCC 4.8 now and the above problem still hasn't been -+ addressed properly. This caused PR 52640 due to O(external_decls**2) -+ lookups in the pending_assemble_externals TREE_LIST in assemble_external. -+ Paper over with this pointer set, which we use to see if we have already -+ added a decl to pending_assemble_externals without first traversing -+ the entire pending_assemble_externals list. See assemble_external(). */ -+static struct pointer_set_t *pending_assemble_externals_set; -+ -+/* Some targets delay some output to final using TARGET_ASM_FILE_END. -+ As a result, assemble_external can be called after the list of externals -+ is processed and the pointer set destroyed. */ -+static bool pending_assemble_externals_processed; -+ - #ifdef ASM_OUTPUT_EXTERNAL - /* True if DECL is a function decl for which no out-of-line copy exists. - It is assumed that DECL's assembler name has been set. */ -@@ -2146,6 +2160,8 @@ - assemble_external_real (TREE_VALUE (list)); - - pending_assemble_externals = 0; -+ pending_assemble_externals_processed = true; -+ pointer_set_destroy (pending_assemble_externals_set); - #endif - } - -@@ -2186,7 +2202,13 @@ - weak_decls = tree_cons (NULL, decl, weak_decls); - - #ifdef ASM_OUTPUT_EXTERNAL -- if (value_member (decl, pending_assemble_externals) == NULL_TREE) -+ if (pending_assemble_externals_processed) -+ { -+ assemble_external_real (decl); -+ return; -+ } -+ -+ if (! pointer_set_insert (pending_assemble_externals_set, decl)) - pending_assemble_externals = tree_cons (NULL, decl, - pending_assemble_externals); - #endif -@@ -3922,6 +3944,13 @@ - tem = TREE_OPERAND (tem, 0)) - ; - -+ if (TREE_CODE (tem) == MEM_REF -+ && TREE_CODE (TREE_OPERAND (tem, 0)) == ADDR_EXPR) -+ { -+ reloc = compute_reloc_for_constant (TREE_OPERAND (tem, 0)); -+ break; -+ } -+ - if (TREE_PUBLIC (tem)) - reloc |= 2; - else -@@ -3990,6 +4019,9 @@ - - if (CONSTANT_CLASS_P (tem) || TREE_CODE (tem) == CONSTRUCTOR) - output_constant_def (tem, 0); -+ -+ if (TREE_CODE (tem) == MEM_REF) -+ output_addressed_constants (TREE_OPERAND (tem, 0)); - break; - - case PLUS_EXPR: -@@ -6019,6 +6051,10 @@ - - if (readonly_data_section == NULL) - readonly_data_section = text_section; -+ -+#ifdef ASM_OUTPUT_EXTERNAL -+ pending_assemble_externals_set = pointer_set_create (); -+#endif - } - - enum tls_model -Index: gcc/tree-vect-stmts.c -=================================================================== ---- a/src/gcc/tree-vect-stmts.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/tree-vect-stmts.c (.../branches/gcc-4_6-branch) -@@ -623,6 +623,46 @@ - } - - -+/* Model cost for type demotion and promotion operations. PWR is normally -+ zero for single-step promotions and demotions. It will be one if -+ two-step promotion/demotion is required, and so on. Each additional -+ step doubles the number of instructions required. */ -+ -+static void -+vect_model_promotion_demotion_cost (stmt_vec_info stmt_info, -+ enum vect_def_type *dt, int pwr) -+{ -+ int i, tmp; -+ int inside_cost = 0, outside_cost = 0, single_stmt_cost; -+ -+ /* The SLP costs were already calculated during SLP tree build. */ -+ if (PURE_SLP_STMT (stmt_info)) -+ return; -+ -+ single_stmt_cost = vect_get_stmt_cost (vec_promote_demote); -+ for (i = 0; i < pwr + 1; i++) -+ { -+ tmp = (STMT_VINFO_TYPE (stmt_info) == type_promotion_vec_info_type) ? -+ (i + 1) : i; -+ inside_cost += vect_pow2 (tmp) * single_stmt_cost; -+ } -+ -+ /* FORNOW: Assuming maximum 2 args per stmts. */ -+ for (i = 0; i < 2; i++) -+ { -+ if (dt[i] == vect_constant_def || dt[i] == vect_external_def) -+ outside_cost += vect_get_stmt_cost (vector_stmt); -+ } -+ -+ if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, "vect_model_promotion_demotion_cost: inside_cost = %d, " -+ "outside_cost = %d .", inside_cost, outside_cost); -+ -+ /* Set the costs in STMT_INFO. */ -+ stmt_vinfo_set_inside_of_loop_cost (stmt_info, NULL, inside_cost); -+ stmt_vinfo_set_outside_of_loop_cost (stmt_info, NULL, outside_cost); -+} -+ - /* Function vect_cost_strided_group_size - - For strided load or store, return the group_size only if it is the first -@@ -691,7 +731,7 @@ - { - /* Uses a high and low interleave operation for each needed permute. */ - inside_cost = ncopies * exact_log2(group_size) * group_size -- * vect_get_stmt_cost (vector_stmt); -+ * vect_get_stmt_cost (vec_perm); - - if (vect_print_dump_info (REPORT_COST)) - fprintf (vect_dump, "vect_model_store_cost: strided group_size = %d .", -@@ -795,7 +835,7 @@ - { - /* Uses an even and odd extract operations for each needed permute. */ - inside_cost = ncopies * exact_log2(group_size) * group_size -- * vect_get_stmt_cost (vector_stmt); -+ * vect_get_stmt_cost (vec_perm); - - if (vect_print_dump_info (REPORT_COST)) - fprintf (vect_dump, "vect_model_load_cost: strided group_size = %d .", -@@ -855,7 +895,7 @@ - case dr_explicit_realign: - { - *inside_cost += ncopies * (2 * vect_get_stmt_cost (vector_load) -- + vect_get_stmt_cost (vector_stmt)); -+ + vect_get_stmt_cost (vec_perm)); - - /* FIXME: If the misalignment remains fixed across the iterations of - the containing loop, the following cost should be added to the -@@ -863,6 +903,9 @@ - if (targetm.vectorize.builtin_mask_for_load) - *inside_cost += vect_get_stmt_cost (vector_stmt); - -+ if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, "vect_model_load_cost: explicit realign"); -+ - break; - } - case dr_explicit_realign_optimized: -@@ -886,7 +929,12 @@ - } - - *inside_cost += ncopies * (vect_get_stmt_cost (vector_load) -- + vect_get_stmt_cost (vector_stmt)); -+ + vect_get_stmt_cost (vec_perm)); -+ -+ if (vect_print_dump_info (REPORT_COST)) -+ fprintf (vect_dump, -+ "vect_model_load_cost: explicit realign optimized"); -+ - break; - } - -@@ -2919,7 +2967,7 @@ - STMT_VINFO_TYPE (stmt_info) = type_demotion_vec_info_type; - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vectorizable_demotion ==="); -- vect_model_simple_cost (stmt_info, ncopies, dt, NULL); -+ vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); - return true; - } - -@@ -3217,7 +3265,7 @@ - STMT_VINFO_TYPE (stmt_info) = type_promotion_vec_info_type; - if (vect_print_dump_info (REPORT_DETAILS)) - fprintf (vect_dump, "=== vectorizable_promotion ==="); -- vect_model_simple_cost (stmt_info, 2*ncopies, dt, NULL); -+ vect_model_promotion_demotion_cost (stmt_info, dt, multi_step_cvt); - return true; - } - -Index: gcc/tree-inline.c -=================================================================== ---- a/src/gcc/tree-inline.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/tree-inline.c (.../branches/gcc-4_6-branch) -@@ -4947,7 +4947,7 @@ - if ((e = cgraph_edge (id->dst_node, gsi_stmt (bsi))) != NULL) - { - if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); - else - cgraph_remove_edge (e); - } -@@ -4957,8 +4957,8 @@ - { - if ((e = cgraph_edge (node, gsi_stmt (bsi))) != NULL) - { -- if (!e->inline_failed) -- cgraph_remove_node_and_inline_clones (e->callee); -+ if (!e->inline_failed && e->callee != id->src_node) -+ cgraph_remove_node_and_inline_clones (e->callee, id->dst_node); - else - cgraph_remove_edge (e); - } -Index: gcc/combine.c -=================================================================== ---- a/src/gcc/combine.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/combine.c (.../branches/gcc-4_6-branch) -@@ -1788,6 +1788,10 @@ - if (set == 0) - return 0; - -+ /* The simplification in expand_field_assignment may call back to -+ get_last_value, so set safe guard here. */ -+ subst_low_luid = DF_INSN_LUID (insn); -+ - set = expand_field_assignment (set); - src = SET_SRC (set), dest = SET_DEST (set); - -Index: gcc/config.gcc -=================================================================== ---- a/src/gcc/config.gcc (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config.gcc (.../branches/gcc-4_6-branch) -@@ -817,7 +817,7 @@ - arm*-*-linux*) # ARM GNU/Linux with ELF - tm_file="dbxelf.h elfos.h gnu-user.h linux.h linux-android.h glibc-stdint.h arm/elf.h arm/linux-gas.h arm/linux-elf.h" - case $target in -- arm*b-*) -+ arm*b-*-linux*) - tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1" - ;; - esac -Index: gcc/config/alpha/linux-unwind.h -=================================================================== ---- a/src/gcc/config/alpha/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/alpha/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Alpha Linux. -- Copyright (C) 2004, 2005, 2009, 2011 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2011, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -49,7 +49,7 @@ - else if (pc[1] == 0x201f015f) /* lda $0,NR_rt_sigreturn */ - { - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - sc = &rt_->uc.uc_mcontext; -Index: gcc/config/m32c/m32c.c -=================================================================== ---- a/src/gcc/config/m32c/m32c.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/m32c/m32c.c (.../branches/gcc-4_6-branch) -@@ -447,7 +447,7 @@ - flag_ivopts = 0; - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - /* r8c/m16c have no 16-bit indirect call, so thunks are involved. -Index: gcc/config/spu/spu.c -=================================================================== ---- a/src/gcc/config/spu/spu.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/spu/spu.c (.../branches/gcc-4_6-branch) -@@ -6794,6 +6794,7 @@ - case scalar_to_vec: - case cond_branch_not_taken: - case vec_perm: -+ case vec_promote_demote: - return 1; - - case scalar_store: -Index: gcc/config/sparc/sparc.c -=================================================================== ---- a/src/gcc/config/sparc/sparc.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/sparc/sparc.c (.../branches/gcc-4_6-branch) -@@ -3658,13 +3658,17 @@ - { - x = delegitimize_mem_from_attrs (x); - -- if (GET_CODE (x) == LO_SUM -- && GET_CODE (XEXP (x, 1)) == UNSPEC -- && XINT (XEXP (x, 1), 1) == UNSPEC_TLSLE) -- { -- x = XVECEXP (XEXP (x, 1), 0, 0); -- gcc_assert (GET_CODE (x) == SYMBOL_REF); -- } -+ if (GET_CODE (x) == LO_SUM && GET_CODE (XEXP (x, 1)) == UNSPEC) -+ switch (XINT (XEXP (x, 1), 1)) -+ { -+ case UNSPEC_MOVE_PIC: -+ case UNSPEC_TLSLE: -+ x = XVECEXP (XEXP (x, 1), 0, 0); -+ gcc_assert (GET_CODE (x) == SYMBOL_REF); -+ break; -+ default: -+ break; -+ } - - return x; - } -@@ -9634,6 +9638,7 @@ - void_list_node)); - DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL, - NULL_TREE, void_type_node); -+ TREE_PUBLIC (decl) = 1; - TREE_STATIC (decl) = 1; - make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl)); - DECL_VISIBILITY (decl) = VISIBILITY_HIDDEN; -Index: gcc/config/rx/rx.c -=================================================================== ---- a/src/gcc/config/rx/rx.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/rx/rx.c (.../branches/gcc-4_6-branch) -@@ -2348,7 +2348,7 @@ - rx_option_override (void) - { - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - rx_override_options_after_change (); -Index: gcc/config/i386/i386.h -=================================================================== ---- a/src/gcc/config/i386/i386.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/i386/i386.h (.../branches/gcc-4_6-branch) -@@ -1668,6 +1668,17 @@ - - #define LEGITIMATE_CONSTANT_P(X) legitimate_constant_p (X) - -+/* Try a machine-dependent way of reloading an illegitimate address -+ operand. If we find one, push the reload and jump to WIN. This -+ macro is used in only one place: `find_reloads_address' in reload.c. */ -+ -+#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, INDL, WIN) \ -+do { \ -+ if (ix86_legitimize_reload_address ((X), (MODE), (OPNUM), \ -+ (int)(TYPE), (INDL))) \ -+ goto WIN; \ -+} while (0) -+ - /* If defined, a C expression to determine the base term of address X. - This macro is used in only one place: `find_base_term' in alias.c. - -Index: gcc/config/i386/sse.md -=================================================================== ---- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/i386/sse.md (.../branches/gcc-4_6-branch) -@@ -1324,15 +1324,15 @@ - (parallel [(const_int 0)])) - (vec_select:DF (match_dup 1) (parallel [(const_int 1)]))) - (plusminus:DF -- (vec_select:DF (match_dup 1) (parallel [(const_int 2)])) -- (vec_select:DF (match_dup 1) (parallel [(const_int 3)])))) -- (vec_concat:V2DF -- (plusminus:DF - (vec_select:DF - (match_operand:V4DF 2 "nonimmediate_operand" "xm") - (parallel [(const_int 0)])) -- (vec_select:DF (match_dup 2) (parallel [(const_int 1)]))) -+ (vec_select:DF (match_dup 2) (parallel [(const_int 1)])))) -+ (vec_concat:V2DF - (plusminus:DF -+ (vec_select:DF (match_dup 1) (parallel [(const_int 2)])) -+ (vec_select:DF (match_dup 1) (parallel [(const_int 3)]))) -+ (plusminus:DF - (vec_select:DF (match_dup 2) (parallel [(const_int 2)])) - (vec_select:DF (match_dup 2) (parallel [(const_int 3)]))))))] - "TARGET_AVX" -@@ -5058,7 +5058,7 @@ - (vec_select:DF (match_dup 0) (parallel [(const_int 1)]))))] - "TARGET_SSE2 && reload_completed" - [(set (match_dup 0) (match_dup 1))] -- "operands[0] = adjust_address (operands[0], DFmode, 8);") -+ "operands[0] = adjust_address (operands[0], DFmode, 0);") - - ;; Not sure these two are ever used, but it doesn't hurt to have - ;; them. -aoliva -Index: gcc/config/i386/linux-unwind.h -=================================================================== ---- a/src/gcc/config/i386/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/i386/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for AMD x86-64 and x86. -- Copyright (C) 2004, 2005, 2006, 2009, 2010 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2009, 2010, 2012 Free Software Foundation, -+ Inc. - - This file is part of GCC. - -@@ -133,9 +134,9 @@ - { - struct rt_sigframe { - int sig; -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -Index: gcc/config/i386/i386-protos.h -=================================================================== ---- a/src/gcc/config/i386/i386-protos.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/i386/i386-protos.h (.../branches/gcc-4_6-branch) -@@ -59,7 +59,8 @@ - extern bool constant_address_p (rtx); - extern bool legitimate_pic_operand_p (rtx); - extern bool legitimate_pic_address_disp_p (rtx); -- -+extern bool ix86_legitimize_reload_address (rtx, enum machine_mode, -+ int, int, int); - extern void print_reg (rtx, int, FILE*); - extern void ix86_print_operand (FILE *, rtx, int); - -Index: gcc/config/i386/i386.c -=================================================================== ---- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_6-branch) -@@ -46,6 +46,7 @@ - #include "target.h" - #include "target-def.h" - #include "langhooks.h" -+#include "reload.h" - #include "cgraph.h" - #include "gimple.h" - #include "dwarf2.h" -@@ -12168,6 +12169,64 @@ - return false; - } - -+/* Our implementation of LEGITIMIZE_RELOAD_ADDRESS. Returns a value to -+ replace the input X, or the original X if no replacement is called for. -+ The output parameter *WIN is 1 if the calling macro should goto WIN, -+ 0 if it should not. */ -+ -+bool -+ix86_legitimize_reload_address (rtx x, -+ enum machine_mode mode ATTRIBUTE_UNUSED, -+ int opnum, int type, -+ int ind_levels ATTRIBUTE_UNUSED) -+{ -+ /* Reload can generate: -+ -+ (plus:DI (plus:DI (unspec:DI [(const_int 0 [0])] UNSPEC_TP) -+ (reg:DI 97)) -+ (reg:DI 2 cx)) -+ -+ This RTX is rejected from ix86_legitimate_address_p due to -+ non-strictness of base register 97. Following this rejection, -+ reload pushes all three components into separate registers, -+ creating invalid memory address RTX. -+ -+ Following code reloads only the invalid part of the -+ memory address RTX. */ -+ -+ if (GET_CODE (x) == PLUS -+ && REG_P (XEXP (x, 1)) -+ && GET_CODE (XEXP (x, 0)) == PLUS -+ && REG_P (XEXP (XEXP (x, 0), 1))) -+ { -+ rtx base, index; -+ bool something_reloaded = false; -+ -+ base = XEXP (XEXP (x, 0), 1); -+ if (!REG_OK_FOR_BASE_STRICT_P (base)) -+ { -+ push_reload (base, NULL_RTX, &XEXP (XEXP (x, 0), 1), NULL, -+ BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, -+ opnum, (enum reload_type)type); -+ something_reloaded = true; -+ } -+ -+ index = XEXP (x, 1); -+ if (!REG_OK_FOR_INDEX_STRICT_P (index)) -+ { -+ push_reload (index, NULL_RTX, &XEXP (x, 1), NULL, -+ INDEX_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, -+ opnum, (enum reload_type)type); -+ something_reloaded = true; -+ } -+ -+ gcc_assert (something_reloaded); -+ return true; -+ } -+ -+ return false; -+} -+ - /* Recognizes RTL expressions that are valid memory addresses for an - instruction. The MODE argument is the machine mode for the MEM - expression that wants to use this address. -@@ -32823,7 +32882,8 @@ - return ix86_cost->cond_not_taken_branch_cost; - - case vec_perm: -- return 1; -+ case vec_promote_demote: -+ return ix86_cost->vec_stmt_cost; - - default: - gcc_unreachable (); -Index: gcc/config/sh/linux-unwind.h -=================================================================== ---- a/src/gcc/config/sh/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/sh/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for SH Linux. -- Copyright (C) 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2007, 2009, 2012 Free Software Foundation, -+ Inc. - - This file is part of GCC. - -@@ -80,9 +81,9 @@ - && (*(unsigned long *) (pc+11) == 0x6ff0fff0)) - { - struct rt_sigframe { -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -@@ -179,7 +180,7 @@ - && (*(unsigned short *) (pc+14) == 0x00ad)))) - { - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - /* The void * cast is necessary to avoid an aliasing warning. -Index: gcc/config/sh/sh.c -=================================================================== ---- a/src/gcc/config/sh/sh.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/sh/sh.c (.../branches/gcc-4_6-branch) -@@ -1018,7 +1018,7 @@ - sh_fix_range (sh_fixed_range_str); - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - } - -Index: gcc/config/avr/libgcc.S -=================================================================== ---- a/src/gcc/config/avr/libgcc.S (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/avr/libgcc.S (.../branches/gcc-4_6-branch) -@@ -582,16 +582,7 @@ - push r17 - push r28 - push r29 --#if defined (__AVR_HAVE_8BIT_SP__) --;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level --;; so this lines are dead code. To make it work, devices without --;; SP_H must get their own multilib(s), see PR51345. - in r28,__SP_L__ -- sub r28,r26 -- clr r29 -- out __SP_L__,r28 --#else -- in r28,__SP_L__ - in r29,__SP_H__ - sub r28,r26 - sbc r29,r27 -@@ -600,7 +591,6 @@ - out __SP_H__,r29 - out __SREG__,__tmp_reg__ - out __SP_L__,r28 --#endif - #if defined (__AVR_HAVE_EIJMP_EICALL__) - eijmp - #else -@@ -635,15 +625,6 @@ - ldd r16,Y+4 - ldd r17,Y+3 - ldd r26,Y+2 --#if defined (__AVR_HAVE_8BIT_SP__) --;; FIXME: __AVR_HAVE_8BIT_SP__ is set on device level, not on core level --;; so this lines are dead code. To make it work, devices without --;; SP_H must get their own multilib(s). -- ldd r29,Y+1 -- add r28,r30 -- out __SP_L__,r28 -- mov r28, r26 --#else - ldd r27,Y+1 - add r28,r30 - adc r29,__zero_reg__ -@@ -654,7 +635,6 @@ - out __SP_L__,r28 - mov_l r28, r26 - mov_h r29, r27 --#endif - ret - .endfunc - #endif /* defined (L_epilogue) */ -Index: gcc/config/avr/avr.md -=================================================================== ---- a/src/gcc/config/avr/avr.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/avr/avr.md (.../branches/gcc-4_6-branch) -@@ -299,7 +299,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_OFF))] -- "!AVR_HAVE_8BIT_SP" -+ "" - "out __SP_H__, %B1 - out __SP_L__, %A1" - [(set_attr "length" "2") -@@ -309,7 +309,7 @@ - [(set (match_operand:HI 0 "stack_register_operand" "=q") - (unspec_volatile:HI [(match_operand:HI 1 "register_operand" "r")] - UNSPECV_WRITE_SP_IRQ_ON))] -- "!AVR_HAVE_8BIT_SP" -+ "" - "cli - out __SP_H__, %B1 - sei -Index: gcc/config/avr/avr.c -=================================================================== ---- a/src/gcc/config/avr/avr.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/avr/avr.c (.../branches/gcc-4_6-branch) -@@ -1879,12 +1879,9 @@ - } - else if (test_hard_reg_class (STACK_REG, src)) - { -- *l = 2; -- return AVR_HAVE_8BIT_SP -- ? (AS2 (in,%A0,__SP_L__) CR_TAB -- AS1 (clr,%B0)) -- : (AS2 (in,%A0,__SP_L__) CR_TAB -- AS2 (in,%B0,__SP_H__)); -+ *l = 2; -+ return (AS2 (in,%A0,__SP_L__) CR_TAB -+ AS2 (in,%B0,__SP_H__)); - } - - if (AVR_HAVE_MOVW) -@@ -5177,10 +5174,9 @@ - - default_file_start (); - -- fputs ("__SREG__ = 0x3f\n", asm_out_file); -- if (!AVR_HAVE_8BIT_SP) -- fputs ("__SP_H__ = 0x3e\n", asm_out_file); -- fputs ("__SP_L__ = 0x3d\n", asm_out_file); -+ fputs ("__SREG__ = 0x3f\n" -+ "__SP_H__ = 0x3e\n" -+ "__SP_L__ = 0x3d\n", asm_out_file); - - fputs ("__tmp_reg__ = 0\n" - "__zero_reg__ = 1\n", asm_out_file); -Index: gcc/config/xtensa/linux-unwind.h -=================================================================== ---- a/src/gcc/config/xtensa/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/xtensa/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Xtensa. -- Copyright (C) 2008, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2008, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -62,7 +62,7 @@ - struct sigcontext *sc; - - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_; - -Index: gcc/config/host-linux.c -=================================================================== ---- a/src/gcc/config/host-linux.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/host-linux.c (.../branches/gcc-4_6-branch) -@@ -84,6 +84,8 @@ - # define TRY_EMPTY_VM_SPACE 0x60000000 - #elif defined(__mc68000__) - # define TRY_EMPTY_VM_SPACE 0x40000000 -+#elif defined(__ARM_EABI__) -+# define TRY_EMPTY_VM_SPACE 0x60000000 - #else - # define TRY_EMPTY_VM_SPACE 0 - #endif -Index: gcc/config/ia64/linux-unwind.h -=================================================================== ---- a/src/gcc/config/ia64/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/ia64/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for IA64 Linux. -- Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -47,7 +47,7 @@ - struct sigframe { - char scratch[16]; - unsigned long sig_number; -- struct siginfo *info; -+ siginfo_t *info; - struct sigcontext *sc; - } *frame_ = (struct sigframe *)context->psp; - struct sigcontext *sc = frame_->sc; -@@ -137,7 +137,7 @@ - struct sigframe { - char scratch[16]; - unsigned long sig_number; -- struct siginfo *info; -+ siginfo_t *info; - struct sigcontext *sc; - } *frame = (struct sigframe *)context->psp; - struct sigcontext *sc = frame->sc; -Index: gcc/config/rs6000/vector.md -=================================================================== ---- a/src/gcc/config/rs6000/vector.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/rs6000/vector.md (.../branches/gcc-4_6-branch) -@@ -448,6 +448,94 @@ - "VECTOR_UNIT_ALTIVEC_P (mode)" - "") - -+(define_insn_and_split "*vector_uneq" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (uneq:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (gt:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (gt:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (not:VEC_F (ior:VEC_F (match_dup 3) -+ (match_dup 4))))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_ltgt" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (ltgt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (gt:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (gt:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (ior:VEC_F (match_dup 3) -+ (match_dup 4)))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_ordered" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (ordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (ge:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (ge:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (ior:VEC_F (match_dup 3) -+ (match_dup 4)))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ -+(define_insn_and_split "*vector_unordered" -+ [(set (match_operand:VEC_F 0 "vfloat_operand" "") -+ (unordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "") -+ (match_operand:VEC_F 2 "vfloat_operand" "")))] -+ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" -+ "#" -+ "" -+ [(set (match_dup 3) -+ (ge:VEC_F (match_dup 1) -+ (match_dup 2))) -+ (set (match_dup 4) -+ (ge:VEC_F (match_dup 2) -+ (match_dup 1))) -+ (set (match_dup 0) -+ (not:VEC_F (ior:VEC_F (match_dup 3) -+ (match_dup 4))))] -+ " -+{ -+ operands[3] = gen_reg_rtx (mode); -+ operands[4] = gen_reg_rtx (mode); -+}") -+ - ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask - ;; which is in the reverse order that we want - (define_expand "vector_select_" -Index: gcc/config/rs6000/rs6000.c -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/rs6000/rs6000.c (.../branches/gcc-4_6-branch) -@@ -3695,12 +3695,23 @@ - case vec_to_scalar: - case scalar_to_vec: - case cond_branch_not_taken: -- case vec_perm: - return 1; - - case cond_branch_taken: - return 3; - -+ case vec_perm: -+ if (TARGET_VSX) -+ return 4; -+ else -+ return 1; -+ -+ case vec_promote_demote: -+ if (TARGET_VSX) -+ return 5; -+ else -+ return 1; -+ - case unaligned_load: - if (TARGET_VSX && TARGET_ALLOW_MOVMISALIGN) - { -@@ -17229,6 +17240,10 @@ - case EQ: - case GT: - case GTU: -+ case ORDERED: -+ case UNORDERED: -+ case UNEQ: -+ case LTGT: - mask = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (VOIDmode, - mask, -Index: gcc/config/rs6000/vsx.md -=================================================================== ---- a/src/gcc/config/rs6000/vsx.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/rs6000/vsx.md (.../branches/gcc-4_6-branch) -@@ -1006,9 +1006,9 @@ - "VECTOR_MEM_VSX_P (mode)" - { - if (INTVAL (operands[3]) == 0) -- return \"xxpermdi %x0,%x1,%x2,1\"; -+ return \"xxpermdi %x0,%x2,%x1,1\"; - else if (INTVAL (operands[3]) == 1) -- return \"xxpermdi %x0,%x2,%x1,0\"; -+ return \"xxpermdi %x0,%x1,%x2,0\"; - else - gcc_unreachable (); - } -Index: gcc/config/rs6000/rs6000.h -=================================================================== ---- a/src/gcc/config/rs6000/rs6000.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/rs6000/rs6000.h (.../branches/gcc-4_6-branch) -@@ -469,10 +469,11 @@ - /* ISA 2.01 allowed FCFID to be done in 32-bit, previously it was 64-bit only. - Enable 32-bit fcfid's on any of the switches for newer ISA machines or - XILINX. */ --#define TARGET_FCFID (TARGET_POWERPC64 \ -- || TARGET_POPCNTB /* ISA 2.02 */ \ -- || TARGET_CMPB /* ISA 2.05 */ \ -- || TARGET_POPCNTD /* ISA 2.06 */ \ -+#define TARGET_FCFID (TARGET_POWERPC64 \ -+ || TARGET_PPC_GPOPT /* 970/power4 */ \ -+ || TARGET_POPCNTB /* ISA 2.02 */ \ -+ || TARGET_CMPB /* ISA 2.05 */ \ -+ || TARGET_POPCNTD /* ISA 2.06 */ \ - || TARGET_XILINX_FPU) - - #define TARGET_FCTIDZ TARGET_FCFID -Index: gcc/config/arm/arm.c -=================================================================== ---- a/src/gcc/config/arm/arm.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/arm/arm.c (.../branches/gcc-4_6-branch) -@@ -2005,7 +2005,8 @@ - global_options_set.x_param_values); - - /* ARM EABI defaults to strict volatile bitfields. */ -- if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0) -+ if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0 -+ && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - - /* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed -Index: gcc/config/pa/predicates.md -=================================================================== ---- a/src/gcc/config/pa/predicates.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/pa/predicates.md (.../branches/gcc-4_6-branch) -@@ -421,9 +421,9 @@ - (ior (match_operand 0 "register_operand") - (match_operand 0 "cint_ior_operand"))) - --;; True iff OP is a CONST_INT of the forms 0...0xxxx or --;; 0...01...1xxxx. Such values can be the left hand side x in (x << --;; r), using the zvdepi instruction. -+;; True iff OP is a CONST_INT of the forms 0...0xxxx, 0...01...1xxxx, -+;; or 1...1xxxx. Such values can be the left hand side x in (x << r), -+;; using the zvdepi instruction. - - (define_predicate "lhs_lshift_cint_operand" - (match_code "const_int") -Index: gcc/config/pa/linux-unwind.h -=================================================================== ---- a/src/gcc/config/pa/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/pa/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for PA Linux. -- Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -63,7 +63,7 @@ - int i; - struct sigcontext *sc; - struct rt_sigframe { -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *frame; - -Index: gcc/config/pa/pa.md -=================================================================== ---- a/src/gcc/config/pa/pa.md (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/pa/pa.md (.../branches/gcc-4_6-branch) -@@ -6348,7 +6348,7 @@ - "" - "* - { -- int x = INTVAL (operands[1]); -+ unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); - operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); - operands[1] = GEN_INT ((x & 0xf) - 0x10); - return \"{zvdepi %1,%2,%0|depwi,z %1,%%sar,%2,%0}\"; -@@ -6366,7 +6366,7 @@ - "exact_log2 (INTVAL (operands[1]) + 1) > 0" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 (x + 1)); - return \"{vdepi -1,%2,%0|depwi -1,%%sar,%2,%0}\"; - }" -@@ -6383,7 +6383,7 @@ - "INTVAL (operands[1]) == -2" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 ((~x) + 1)); - return \"{vdepi 0,%2,%0|depwi 0,%%sar,%2,%0}\"; - }" -@@ -6447,7 +6447,7 @@ - "TARGET_64BIT" - "* - { -- int x = INTVAL (operands[1]); -+ unsigned HOST_WIDE_INT x = UINTVAL (operands[1]); - operands[2] = GEN_INT (4 + exact_log2 ((x >> 4) + 1)); - operands[1] = GEN_INT ((x & 0x1f) - 0x20); - return \"depdi,z %1,%%sar,%2,%0\"; -@@ -6465,7 +6465,7 @@ - "TARGET_64BIT && exact_log2 (INTVAL (operands[1]) + 1) > 0" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 (x + 1)); - return \"depdi -1,%%sar,%2,%0\"; - }" -@@ -6482,7 +6482,7 @@ - "TARGET_64BIT && INTVAL (operands[1]) == -2" - "* - { -- int x = INTVAL (operands[1]); -+ HOST_WIDE_INT x = INTVAL (operands[1]); - operands[2] = GEN_INT (exact_log2 ((~x) + 1)); - return \"depdi 0,%%sar,%2,%0\"; - }" -@@ -6671,6 +6671,20 @@ - - ;; Unconditional and other jump instructions. - -+;; Trivial return used when no epilogue is needed. -+(define_insn "return" -+ [(return) -+ (use (reg:SI 2))] -+ "pa_can_use_return_insn ()" -+ "* -+{ -+ if (TARGET_PA_20) -+ return \"bve%* (%%r2)\"; -+ return \"bv%* %%r0(%%r2)\"; -+}" -+ [(set_attr "type" "branch") -+ (set_attr "length" "4")]) -+ - ;; This is used for most returns. - (define_insn "return_internal" - [(return) -@@ -6719,11 +6733,8 @@ - rtx x; - - /* Try to use the trivial return first. Else use the full epilogue. */ -- if (reload_completed -- && !frame_pointer_needed -- && !df_regs_ever_live_p (2) -- && (compute_frame_size (get_frame_size (), 0) ? 0 : 1)) -- x = gen_return_internal (); -+ if (pa_can_use_return_insn ()) -+ x = gen_return (); - else - { - hppa_expand_epilogue (); -Index: gcc/config/pa/pa-protos.h -=================================================================== ---- a/src/gcc/config/pa/pa-protos.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/pa/pa-protos.h (.../branches/gcc-4_6-branch) -@@ -136,6 +136,7 @@ - extern int cint_ok_for_move (HOST_WIDE_INT); - extern void hppa_expand_prologue (void); - extern void hppa_expand_epilogue (void); -+extern bool pa_can_use_return_insn (void); - extern int ior_mask_p (unsigned HOST_WIDE_INT); - extern void compute_zdepdi_operands (unsigned HOST_WIDE_INT, - unsigned *); -Index: gcc/config/pa/pa.c -=================================================================== ---- a/src/gcc/config/pa/pa.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/pa/pa.c (.../branches/gcc-4_6-branch) -@@ -4442,6 +4442,24 @@ - } - } - -+bool -+pa_can_use_return_insn (void) -+{ -+ if (!reload_completed) -+ return false; -+ -+ if (frame_pointer_needed) -+ return false; -+ -+ if (df_regs_ever_live_p (2)) -+ return false; -+ -+ if (crtl->profile) -+ return false; -+ -+ return compute_frame_size (get_frame_size (), 0) == 0; -+} -+ - rtx - hppa_pic_save_rtx (void) - { -@@ -4586,7 +4604,7 @@ - rtx saved_rp; - rtx ins; - -- /* Instruction stream at the normal return address for the export stub: -+ /* The instruction stream at the return address of a PA1.X export stub is: - - 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp - 0x004010a1 | stub+12: ldsid (sr0,rp),r1 -@@ -4594,11 +4612,17 @@ - 0xe0400002 | stub+20: be,n 0(sr0,rp) - - 0xe0400002 must be specified as -532676606 so that it won't be -- rejected as an invalid immediate operand on 64-bit hosts. */ -+ rejected as an invalid immediate operand on 64-bit hosts. - -- HOST_WIDE_INT insns[4] = {0x4bc23fd1, 0x004010a1, 0x00011820, -532676606}; -- int i; -+ The instruction stream at the return address of a PA2.0 export stub is: - -+ 0x4bc23fd1 | stub+8: ldw -18(sr0,sp),rp -+ 0xe840d002 | stub+12: bve,n (rp) -+ */ -+ -+ HOST_WIDE_INT insns[4]; -+ int i, len; -+ - if (count != 0) - return NULL_RTX; - -@@ -4620,11 +4644,26 @@ - ins = copy_to_reg (gen_rtx_AND (Pmode, rp, MASK_RETURN_ADDR)); - label = gen_label_rtx (); - -+ if (TARGET_PA_20) -+ { -+ insns[0] = 0x4bc23fd1; -+ insns[1] = -398405630; -+ len = 2; -+ } -+ else -+ { -+ insns[0] = 0x4bc23fd1; -+ insns[1] = 0x004010a1; -+ insns[2] = 0x00011820; -+ insns[3] = -532676606; -+ len = 4; -+ } -+ - /* Check the instruction stream at the normal return address for the - export stub. If it is an export stub, than our return address is - really in -24[frameaddr]. */ - -- for (i = 0; i < 3; i++) -+ for (i = 0; i < len; i++) - { - rtx op0 = gen_rtx_MEM (SImode, plus_constant (ins, i * 4)); - rtx op1 = GEN_INT (insns[i]); -Index: gcc/config/mips/linux-unwind.h -=================================================================== ---- a/src/gcc/config/mips/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/mips/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,6 @@ - /* DWARF2 EH unwinding support for MIPS Linux. -- Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2012 Free Software -+ Foundation, Inc. - - This file is part of GCC. - -@@ -75,7 +76,7 @@ - struct rt_sigframe { - u_int32_t ass[4]; /* Argument save space for o32. */ - u_int32_t trampoline[2]; -- struct siginfo info; -+ siginfo_t info; - _sig_ucontext_t uc; - } *rt_ = context->cfa; - sc = &rt_->uc.uc_mcontext; -Index: gcc/config/h8300/h8300.c -=================================================================== ---- a/src/gcc/config/h8300/h8300.c (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/h8300/h8300.c (.../branches/gcc-4_6-branch) -@@ -416,7 +416,7 @@ - } - - /* This target defaults to strict volatile bitfields. */ -- if (flag_strict_volatile_bitfields < 0) -+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2)) - flag_strict_volatile_bitfields = 1; - } - -Index: gcc/config/bfin/linux-unwind.h -=================================================================== ---- a/src/gcc/config/bfin/linux-unwind.h (.../tags/gcc_4_6_3_release) -+++ b/src/gcc/config/bfin/linux-unwind.h (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* DWARF2 EH unwinding support for Blackfin. -- Copyright (C) 2007, 2009 Free Software Foundation, Inc. -+ Copyright (C) 2007, 2009, 2012 Free Software Foundation, Inc. - - This file is part of GCC. - -@@ -48,10 +48,10 @@ - { - struct rt_sigframe { - int sig; -- struct siginfo *pinfo; -+ siginfo_t *pinfo; - void *puc; - char retcode[8]; -- struct siginfo info; -+ siginfo_t info; - struct ucontext uc; - } *rt_ = context->cfa; - -Index: libstdc++-v3/include/debug/safe_iterator.h -=================================================================== ---- a/src/libstdc++-v3/include/debug/safe_iterator.h (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/include/debug/safe_iterator.h (.../branches/gcc-4_6-branch) -@@ -1,6 +1,6 @@ - // Safe iterator implementation -*- C++ -*- - --// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011 -+// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011, 2012 - // Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free -@@ -142,7 +142,25 @@ - ._M_iterator(__x, "other")); - } - -+#ifdef __GXX_EXPERIMENTAL_CXX0X__ - /** -+ * @brief Move construction. -+ * @post __x is singular and unattached -+ */ -+ _Safe_iterator(_Safe_iterator&& __x) : _M_current() -+ { -+ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular() -+ || __x._M_current == _Iterator(), -+ _M_message(__msg_init_copy_singular) -+ ._M_iterator(*this, "this") -+ ._M_iterator(__x, "other")); -+ std::swap(_M_current, __x._M_current); -+ this->_M_attach(__x._M_sequence); -+ __x._M_detach(); -+ } -+#endif -+ -+ /** - * @brief Converting constructor from a mutable iterator to a - * constant iterator. - */ -@@ -181,7 +199,28 @@ - return *this; - } - -+#ifdef __GXX_EXPERIMENTAL_CXX0X__ - /** -+ * @brief Move assignment. -+ * @post __x is singular and unattached -+ */ -+ _Safe_iterator& -+ operator=(_Safe_iterator&& __x) -+ { -+ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular() -+ || __x._M_current == _Iterator(), -+ _M_message(__msg_copy_singular) -+ ._M_iterator(*this, "this") -+ ._M_iterator(__x, "other")); -+ _M_current = __x._M_current; -+ _M_attach(__x._M_sequence); -+ __x._M_detach(); -+ __x._M_current = _Iterator(); -+ return *this; -+ } -+#endif -+ -+ /** - * @brief Iterator dereference. - * @pre iterator is dereferenceable - */ -@@ -415,7 +454,9 @@ - /// Is this iterator equal to the sequence's before_begin() iterator if - /// any? - bool _M_is_before_begin() const -- { return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence()); } -+ { -+ return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence()); -+ } - }; - - template -Index: libstdc++-v3/include/bits/stl_algo.h -=================================================================== ---- a/src/libstdc++-v3/include/bits/stl_algo.h (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/include/bits/stl_algo.h (.../branches/gcc-4_6-branch) -@@ -1811,7 +1811,8 @@ - for (; __first != __last; ++__first) - if (__pred(*__first)) - { -- *__result1 = _GLIBCXX_MOVE(*__first); -+ if (__result1 != __first) -+ *__result1 = _GLIBCXX_MOVE(*__first); - ++__result1; - } - else -Index: libstdc++-v3/ChangeLog -=================================================================== ---- a/src/libstdc++-v3/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,27 @@ -+2012-04-12 Jeffrey Yasskin -+ -+ PR libstdc++/52822 -+ * include/bits/stl_algo.h (__stable_partition_adaptive): Avoid -+ move-assigning an object to itself by explicitly testing for -+ identity. -+ * testsuite/25_algorithms/stable_partition/pr52822.cc: Test -+ vectors, which have a destructive self-move-assignment. -+ * testsuite/25_algorithms/stable_partition/moveable.cc (test02): -+ Test with rvalstruct, which explicitly checks -+ self-move-assignment. -+ -+2012-04-09 Terry Guo -+ -+ * testsuite/Makefile.am (TEST_GCC_EXEC_PREFIX): New. -+ * testsuite/Makefile.in: Regenerated. -+ -+2012-03-08 Jonathan Wakely -+ -+ PR libstdc++/52433 -+ * include/debug/safe_iterator.h (_Safe_iterator): Add move -+ constructor and move assignment operator. -+ * testsuite/23_containers/vector/debug/52433.cc: New. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/pr52822.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,43 @@ -+// { dg-options "-std=gnu++0x" } -+ -+// Copyright (C) 2012 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+ -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without Pred the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+ -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// . -+ -+// 25.2.12 [lib.alg.partitions] Partitions. -+ -+#include -+#include -+#include -+ -+bool true_vector_pred(const std::vector&) { return true; } -+ -+void -+test01() -+{ -+ std::vector > v(1); -+ v[0].push_back(7); -+ VERIFY( v[0].size() == 1 ); -+ std::stable_partition(v.begin(), v.end(), &true_vector_pred); -+ VERIFY( v[0].size() == 1 ); -+} -+ -+int -+main() -+{ -+ test01(); -+ return 0; -+} -Index: libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/testsuite/25_algorithms/stable_partition/moveable.cc (.../branches/gcc-4_6-branch) -@@ -1,6 +1,6 @@ - // { dg-options "-std=gnu++0x" } - --// Copyright (C) 2009, 2010 Free Software Foundation, Inc. -+// Copyright (C) 2009, 2010, 2012 Free Software Foundation, Inc. - // - // This file is part of the GNU ISO C++ Library. This library is free - // software; you can redistribute it and/or modify it under the -@@ -39,6 +39,11 @@ - const int B[] = {2, 4, 6, 8, 10, 12, 14, 16, 1, 3, 5, 7, 9, 11, 13, 15, 17}; - const int N = sizeof(A) / sizeof(int); - -+// Check that starting with a true predicate works too. (PR52822) -+const int A2[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17}; -+const int B2[] = {2, 4, 6, 8, 10, 12, 14, 16, 3, 5, 7, 9, 11, 13, 15, 17}; -+const int N2 = sizeof(A2) / sizeof(int); -+ - struct Pred - { - bool -@@ -46,7 +51,7 @@ - { return (x.val % 2) == 0; } - }; - --// 25.2.12 stable_partition() -+// 25.2.12 stable_partition(), starting with a false predicate. - void - test01() - { -@@ -60,9 +65,24 @@ - VERIFY( std::equal(s1, s1 + N, B) ); - } - -+// 25.2.12 stable_partition(), starting with a true predicate. -+void -+test02() -+{ -+ bool test __attribute__((unused)) = true; -+ -+ rvalstruct s1[N2]; -+ std::copy(A2, A2 + N2, s1); -+ Container con(s1, s1 + N2); -+ -+ std::stable_partition(con.begin(), con.end(), Pred()); -+ VERIFY( std::equal(s1, s1 + N2, B2) ); -+} -+ - int - main() - { - test01(); -+ test02(); - return 0; - } -Index: libstdc++-v3/testsuite/Makefile.in -=================================================================== ---- a/src/libstdc++-v3/testsuite/Makefile.in (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/testsuite/Makefile.in (.../branches/gcc-4_6-branch) -@@ -502,6 +502,7 @@ - @echo 'set target_triplet $(target_triplet)' >>site.tmp - @echo 'set libiconv "$(LIBICONV)"' >>site.tmp - @echo 'set baseline_dir "$(baseline_dir)"' >> site.tmp -+ @echo 'set TEST_GCC_EXEC_PREFIX "$(libdir)/gcc/"' >> site.tmp - @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp - @test ! -f site.exp || \ - sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp -Index: libstdc++-v3/testsuite/Makefile.am -=================================================================== ---- a/src/libstdc++-v3/testsuite/Makefile.am (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/testsuite/Makefile.am (.../branches/gcc-4_6-branch) -@@ -59,6 +59,7 @@ - @echo 'set target_triplet $(target_triplet)' >>site.tmp - @echo 'set libiconv "$(LIBICONV)"' >>site.tmp - @echo 'set baseline_dir "$(baseline_dir)"' >> site.tmp -+ @echo 'set TEST_GCC_EXEC_PREFIX "$(libdir)/gcc/"' >> site.tmp - @echo '## All variables above are generated by configure. Do Not Edit ##' >>site.tmp - @test ! -f site.exp || \ - sed '1,/^## All variables above are.*##/ d' site.exp >> site.tmp -Index: libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc -=================================================================== ---- a/src/libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc (.../tags/gcc_4_6_3_release) -+++ b/src/libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc (.../branches/gcc-4_6-branch) -@@ -0,0 +1,43 @@ -+// Copyright (C) 2012 Free Software Foundation, Inc. -+// -+// This file is part of the GNU ISO C++ Library. This library is free -+// software; you can redistribute it and/or modify it under the -+// terms of the GNU General Public License as published by the -+// Free Software Foundation; either version 3, or (at your option) -+// any later version. -+// -+// This library is distributed in the hope that it will be useful, -+// but WITHOUT ANY WARRANTY; without even the implied warranty of -+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+// GNU General Public License for more details. -+// -+// You should have received a copy of the GNU General Public License along -+// with this library; see the file COPYING3. If not see -+// . -+// -+// { dg-require-debug-mode "" } -+// { dg-options "-std=gnu++0x" } -+// { dg-do compile } -+ -+// PR libstdc++/52433 -+ -+#include -+ -+struct X -+{ -+ std::vector::iterator i; -+ -+ X() = default; -+ X(const X&) = default; -+ X(X&&) = default; -+ X& operator=(const X&) = default; -+ X& operator=(X&&) = default; -+}; -+ -+X test01() -+{ -+ X x; -+ x = X(); -+ return x; -+} -+ -Index: boehm-gc/configure.ac -=================================================================== ---- a/src/boehm-gc/configure.ac (.../tags/gcc_4_6_3_release) -+++ b/src/boehm-gc/configure.ac (.../branches/gcc-4_6-branch) -@@ -392,6 +392,7 @@ - oldLIBS="$LIBS" - LIBS="$LIBS $THREADLIBS" - AC_CHECK_FUNCS([pthread_getattr_np]) -+AC_CHECK_FUNCS([pthread_get_stackaddr_np]) - LIBS="$oldLIBS" - - # Configuration of machine-dependent code -Index: boehm-gc/include/gc_config.h.in -=================================================================== ---- a/src/boehm-gc/include/gc_config.h.in (.../tags/gcc_4_6_3_release) -+++ b/src/boehm-gc/include/gc_config.h.in (.../branches/gcc-4_6-branch) -@@ -87,6 +87,9 @@ - /* Define to 1 if you have the `pthread_getattr_np' function. */ - #undef HAVE_PTHREAD_GETATTR_NP - -+/* Define to 1 if you have the `pthread_get_stackaddr_np_np' function. */ -+#undef HAVE_PTHREAD_GET_STACKADDR_NP -+ - /* Define to 1 if you have the header file. */ - #undef HAVE_STDINT_H - -Index: boehm-gc/include/private/gcconfig.h -=================================================================== ---- a/src/boehm-gc/include/private/gcconfig.h (.../tags/gcc_4_6_3_release) -+++ b/src/boehm-gc/include/private/gcconfig.h (.../branches/gcc-4_6-branch) -@@ -1331,7 +1331,11 @@ - These aren't used when dyld support is enabled (it is by default) */ - # define DATASTART ((ptr_t) get_etext()) - # define DATAEND ((ptr_t) get_end()) --# define STACKBOTTOM ((ptr_t) 0xc0000000) -+# ifdef HAVE_PTHREAD_GET_STACKADDR_NP -+# define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) -+# else -+# define STACKBOTTOM ((ptr_t) 0xc0000000) -+# endif - # define USE_MMAP - # define USE_MMAP_ANON - # define USE_ASM_PUSH_REGS -@@ -2011,7 +2015,11 @@ - These aren't used when dyld support is enabled (it is by default) */ - # define DATASTART ((ptr_t) get_etext()) - # define DATAEND ((ptr_t) get_end()) --# define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) -+# ifdef HAVE_PTHREAD_GET_STACKADDR_NP -+# define STACKBOTTOM (ptr_t)pthread_get_stackaddr_np(pthread_self()) -+# else -+# define STACKBOTTOM ((ptr_t) 0x7fff5fc00000) -+# endif - # define USE_MMAP - # define USE_MMAP_ANON - # ifdef GC_DARWIN_THREADS -Index: boehm-gc/ChangeLog -=================================================================== ---- a/src/boehm-gc/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/boehm-gc/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,17 @@ -+2012-03-02 Jack Howarth -+ -+ Backport from mainline -+ 2012-02-23 Patrick Marlier -+ Jack Howarth -+ -+ PR boehm-gc/52179 -+ * include/gc_config.h.in: Undefine HAVE_PTHREAD_GET_STACKADDR_NP. -+ * include/private/gcconfig.h (DARWIN): Define STACKBOTTOM with -+ pthread_get_stackaddr_np when available. -+ * configure.ac (THREADS): Check availability of -+ pthread_get_stackaddr_np. -+ * configure: Regenerate. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: boehm-gc/configure -=================================================================== ---- a/src/boehm-gc/configure (.../tags/gcc_4_6_3_release) -+++ b/src/boehm-gc/configure (.../branches/gcc-4_6-branch) -@@ -15246,6 +15246,17 @@ - fi - done - -+for ac_func in pthread_get_stackaddr_np -+do : -+ ac_fn_c_check_func "$LINENO" "pthread_get_stackaddr_np" "ac_cv_func_pthread_get_stackaddr_np" -+if test "x$ac_cv_func_pthread_get_stackaddr_np" = x""yes; then : -+ cat >>confdefs.h <<_ACEOF -+#define HAVE_PTHREAD_GET_STACKADDR_NP 1 -+_ACEOF -+ -+fi -+done -+ - LIBS="$oldLIBS" - - # Configuration of machine-dependent code -Index: libffi/src/powerpc/aix.S -=================================================================== ---- a/src/libffi/src/powerpc/aix.S (.../tags/gcc_4_6_3_release) -+++ b/src/libffi/src/powerpc/aix.S (.../branches/gcc-4_6-branch) -@@ -1,5 +1,5 @@ - /* ----------------------------------------------------------------------- -- aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc. -+ aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc. - based on darwin.S by John Hornkvist - - PowerPC Assembly glue. -@@ -79,6 +79,8 @@ - .set f20,20 - .set f21,21 - -+ .extern .ffi_prep_args -+ - #define LIBFFI_ASM - #include - #include -@@ -125,6 +127,7 @@ - /* Call ffi_prep_args. */ - mr r4, r1 - bl .ffi_prep_args -+ nop - - /* Now do the call. */ - ld r0, 0(r29) -@@ -226,6 +229,7 @@ - /* Call ffi_prep_args. */ - mr r4, r1 - bl .ffi_prep_args -+ nop - - /* Now do the call. */ - lwz r0, 0(r29) -Index: libffi/src/powerpc/aix_closure.S -=================================================================== ---- a/src/libffi/src/powerpc/aix_closure.S (.../tags/gcc_4_6_3_release) -+++ b/src/libffi/src/powerpc/aix_closure.S (.../branches/gcc-4_6-branch) -@@ -79,6 +79,8 @@ - .set f20,20 - .set f21,21 - -+ .extern .ffi_closure_helper_DARWIN -+ - #define LIBFFI_ASM - #define JUMPTARGET(name) name - #define L(x) x -@@ -165,6 +167,7 @@ - - /* look up the proper starting point in table */ - /* by using return type as offset */ -+ lhz r3, 10(r3) /* load type from return type */ - ld r4, LC..60(2) /* get address of jump table */ - sldi r3, r3, 4 /* now multiply return type by 16 */ - ld r0, 240+16(r1) /* load return address */ -@@ -337,8 +340,9 @@ - - /* look up the proper starting point in table */ - /* by using return type as offset */ -+ lhz r3, 6(r3) /* load type from return type */ - lwz r4, LC..60(2) /* get address of jump table */ -- slwi r3, r3, 4 /* now multiply return type by 4 */ -+ slwi r3, r3, 4 /* now multiply return type by 16 */ - lwz r0, 176+8(r1) /* load return address */ - add r3, r3, r4 /* add contents of table to table address */ - mtctr r3 -Index: libffi/ChangeLog -=================================================================== ---- a/src/libffi/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/libffi/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,17 @@ -+2012-03-22 David Edelsohn -+ -+ Backport from mainline: -+ 2012-03-09 David Edelsohn -+ -+ * src/powerpc/aix_closure.S (ffi_closure_ASM): Adjust for Darwin64 -+ change to return value of ffi_closure_helper_DARWIN and load type -+ from return type. -+ -+ From Tom Honermann : -+ * src/powerpc/aix.S: Declare .ffi_prep_args. Insert nops after -+ branch instructions. -+ * src/powerpc/aix_closure.S: Declare .ffi_closure_helper_DARWIN. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: libjava/configure.ac -=================================================================== ---- a/src/libjava/configure.ac (.../tags/gcc_4_6_3_release) -+++ b/src/libjava/configure.ac (.../branches/gcc-4_6-branch) -@@ -886,14 +886,9 @@ - SYSTEMSPEC="-lunicows $SYSTEMSPEC" - fi - ;; -- *-*-darwin9*) -+ *-*-darwin[[912]]*) - SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" - ;; -- *-*-darwin[[12]]*) -- # Something is incompatible with pie, would be nice to fix it and -- # remove -no_pie. PR49461 -- SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" -- ;; - *) - SYSTEMSPEC= - ;; -Index: libjava/ChangeLog -=================================================================== ---- a/src/libjava/ChangeLog (.../tags/gcc_4_6_3_release) -+++ b/src/libjava/ChangeLog (.../branches/gcc-4_6-branch) -@@ -1,3 +1,13 @@ -+2012-03-02 Jack Howarth -+ -+ Backport from mainline -+ 2012-02-23 Patrick Marlier -+ Jack Howarth -+ -+ PR target/49461 -+ * configure.ac (SYSTEMSPEC): No longer pass -no_pie for darwin11. -+ * configure: Regenerate. -+ - 2012-03-01 Release Manager - - * GCC 4.6.3 released. -Index: libjava/configure -=================================================================== ---- a/src/libjava/configure (.../tags/gcc_4_6_3_release) -+++ b/src/libjava/configure (.../branches/gcc-4_6-branch) -@@ -19775,14 +19775,9 @@ - SYSTEMSPEC="-lunicows $SYSTEMSPEC" - fi - ;; -- *-*-darwin9*) -+ *-*-darwin[912]*) - SYSTEMSPEC="%{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" - ;; -- *-*-darwin[12]*) -- # Something is incompatible with pie, would be nice to fix it and -- # remove -no_pie. PR49461 -- SYSTEMSPEC="-no_pie %{!Zdynamiclib:%{!Zbundle:-allow_stack_execute}}" -- ;; - *) - SYSTEMSPEC= - ;; diff -Nru gcc-4.6-4.6.3/debian/rules.conf gcc-4.6-4.6.4/debian/rules.conf --- gcc-4.6-4.6.3/debian/rules.conf 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.conf 2013-04-14 22:48:24.000000000 +0000 @@ -173,6 +173,13 @@ endif endif LIBC_DEV_DEP = $(LIBC_DEP)-dev +ifeq ($(DEB_TARGET_ARCH_OS),mint) + # FreeMiNT has no shared libraries + LIBC_DEP = + # mintlib is the libc6-dev equivalent + LIBC_DEV_DEP = mintlib + libc_dev_ver = 0~ +endif # for cross ifeq ($(DEB_CROSS),yes) LIBC_DEP ?= $(LIBC_DEP)$(LS) @@ -198,8 +205,8 @@ LIBCXX_BIARCH_DEP := LIBCXX_BIARCH_DBG_DEP := ifneq (,$(findstring yes,$(biarch64) $(biarch32) $(biarchn32)$(biarchhf)$(biarchsf))) - LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS) (>= $(libc_ver)) - LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) (>= $(libc_ver)) + LIBC_BIARCH_DEP := $(LIBC_DEP)-$(biarch_deb_arch)$(LS_biarch) (>= $(libc_ver)) + LIBC_BIARCH_DEV_DEP := $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS_biarch) (>= $(libc_ver)) ifeq ($(biarch64),yes) LIBCXX_BIARCH_DEP := lib64stdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) LIBCXX_BIARCH_DBG_DEP := lib64stdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) @@ -223,14 +230,14 @@ ifeq ($(biarchhf),yes) LIBCXX_BIARCH_DEP := libhfstdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) | libstdc++$(CXX_SONAME)$(LS)-armhf LIBCXX_BIARCH_DBG_DEP := libhfstdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) | libstdc++$(CXX_SONAME)-$(BASE_VERSION)$(LS)-dbg-armhf - LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS) - LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS_biarch) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS_biarch) endif ifeq ($(biarchsf),yes) LIBCXX_BIARCH_DEP := libsfstdc++$(CXX_SONAME)$(LS) (>= $${gcc:Version}) | libstdc++$(CXX_SONAME)$(LS)-armel LIBCXX_BIARCH_DBG_DEP := libsfstdc++$(CXX_SONAME)-$(BASE_VERSION)-dbg$(LS) | libstdc++$(CXX_SONAME)-$(BASE_VERSION)$(LS)-dbg-armel - LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS) - LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS) + LIBC_BIARCH_DEP += | $(LIBC_DEP)-$(biarch_deb_arch)$(LS_biarch) + LIBC_BIARCH_DEV_DEP += | $(LIBC_DEV_DEP)-$(biarch_deb_arch)$(LS_biarch) endif endif @@ -273,17 +280,14 @@ MPFR_BUILD_DEP = libmpfr-dev (>= 3.0.0-9~), endif -cloog_parma = -ifeq ($(cloog_parma),yes) - PPL_BUILD_DEP = libppl-dev (>= 0.11~) | libppl0.11-dev, - CLOOG_BUILD_DEP = libcloog-parma-dev, - # FIXME: currently not dl'opened. - #CLOOG_RUNTIME_DEP = libcloog-ppl1, libppl-c4, libppl9, libpwl5 -else +ifneq (,$(filter $(distrelease),lenny etch squeeze sid dapper hardy jaunty karmic lucid maverick natty oneiric precise quantal)) PPL_BUILD_DEP = libppl-dev (>= 0.11~) | libppl0.10-dev, CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.15.9-2~), - # FIXME: currently not dl'opened. - #CLOOG_RUNTIME_DEP = libcloog-ppl0 (>= 0.15.9-2~), libppl-c2, libppl7 + CLOOG_RUNTIME_DEP = libcloog-ppl0 (>= 0.15.9-2~), libppl-c2, libppl7 +else + PPL_BUILD_DEP = libppl-dev (>= 0.12) | libppl0.12-dev, + CLOOG_BUILD_DEP = libcloog-ppl-dev (>= 0.16), + CLOOG_RUNTIME_DEP = libcloog-ppl1 | libcloog-ppl0 (>= 0.15.9-2~), libppl-c4, libppl12 | libppl9 endif MPC_BUILD_DEP = libmpc-dev, ELF_BUILD_DEP = libelfg0-dev (>= 0.8.12), @@ -343,9 +347,7 @@ #JAVA_BUILD_INDEP := gcj-$(BASE_VERSION)-jdk ifeq ($(single_package),yes) LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base - ifeq ($(cloog_parma),yes) - LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns - endif + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns JAVA_BUILD_INDEP := endif ifeq ($(with_separate_libgcj),yes) @@ -369,9 +371,7 @@ ifeq ($(PKGSOURCE),gcc-$(BASE_VERSION)) LIBSTDCXX_BUILD_INDEP = doxygen (>= 1.7.2), graphviz (>= 2.2), gsfonts-x11, texlive-latex-base - ifeq ($(cloog_parma),yes) - LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns - endif + LIBSTDCXX_BUILD_INDEP +=, xsltproc, libxml2-utils, docbook-xsl-ns JAVA_BUILD_INDEP :=, $(JAVA_BUILD_INDEP) endif @@ -389,7 +389,7 @@ # Ditto, as part of the gcc-snapshot package. # FIXME: ad hoc dependency, better fix setting of ada_no_archs #GNAT_BUILD_DEP := gnat (>= 4.1) [$(ada_no_archs)], gcc-snapshot (>= 20090821-1) [armel armhf], - GNAT_BUILD_DEP := gnat (>= 4.1) [!arm !armhf !m68k !powerpcspe !sh4 !sparc64 !hurd-i386], + GNAT_BUILD_DEP := gnat (>= 4.1) [!arm !armhf !powerpcspe !sh4 !sparc64 !hurd-i386], else ifeq ($(PKGSOURCE),gnat-$(BASE_VERSION)) # Special source package just for gnat. Fail early if gnat is not present, # rather than waste CPU cycles and fail later. @@ -416,7 +416,14 @@ else # build cross compiler +ifeq ($(DEB_TARGET_ARCH_OS),mint) + #XXX for now; we can only do DEB_STAGE=stage1 because otherwise, gcc + # wants to use shared libraries, which FreeMiNT does not have; the + # correct value to use here is 'mintlib' possibly with some cross-foo + CROSS_BUILD_DEP := +else CROSS_BUILD_DEP := libc6-dev$(cross_lib_arch), +endif ifeq ($(REVERSE_CROSS),yes) CROSS_BUILD_DEP += zlib1g-dev$(cross_lib_arch), libmpfr-dev$(cross_lib_arch), endif @@ -589,6 +596,12 @@ ifeq ($(DEB_STAGE),stage2) addons += libgcc gccxbase endif + ifeq ($(DEB_STAGE),stage1) + ifeq ($(DEB_TARGET_ARCH_OS),mint) + # hack to make cross-compiler self-hosted + addons += gccxbase + endif + endif else languages = c c++ fortran objc objpp ifeq ($(DEB_CROSS),yes) @@ -620,8 +633,8 @@ endif ifeq ($(with_libgfortran),yes) addons += libgfortran lib32gfortran lib64gfortran libn32gfortran - addons += $(if $(findstring armel,$(biarchhfarchs)),libhffortran) - addons += $(if $(findstring armhf,$(biarchsfarchs)),libsffortran) + addons += $(if $(findstring armel,$(biarchhfarchs)),libhfgfortran) + addons += $(if $(findstring armhf,$(biarchsfarchs)),libsfgfortran) endif ifeq ($(with_libobjc),yes) addons += libobjc lib32objc lib64objc libn32objc diff -Nru gcc-4.6-4.6.3/debian/rules.d/binary-gcc.mk gcc-4.6-4.6.4/debian/rules.d/binary-gcc.mk --- gcc-4.6-4.6.3/debian/rules.d/binary-gcc.mk 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.d/binary-gcc.mk 2013-04-14 22:48:24.000000000 +0000 @@ -16,6 +16,16 @@ endif endif +ifeq ($(DEB_CROSS),yes) + ifeq ($(DEB_TARGET_ARCH),mint-m68k) + # even binutils-multiarch's strip fails these + # and dh_strip is too unflexible to allow mixing + # strip calls for building cross-compilers, as + # opposed to cross-building packages + p_gcc_dhstrip_opts := -X libgcc.a -X libgcov.a + endif +endif + # gcc must be moved after g77 and g++ # not all files $(PF)/include/*.h are part of gcc, # but it becomes difficult to name all these files ... @@ -76,7 +86,7 @@ files_gcc += $(gcc_lib_dir)/include/ia64intrin.h endif -ifeq ($(DEB_TARGET_ARCH),m68k) +ifeq ($(DEB_TARGET_ARCH_CPU),m68k) files_gcc += $(gcc_lib_dir)/include/math-68881.h endif @@ -212,7 +222,7 @@ true; \ fi debian/dh_rmemptydirs -p$(p_gcc) - dh_strip -p$(p_gcc) + dh_strip -p$(p_gcc) $(p_gcc_dhstrip_opts) dh_compress -p$(p_gcc) -X README.Bugs dh_fixperms -p$(p_gcc) dh_shlibdeps -p$(p_gcc) diff -Nru gcc-4.6-4.6.3/debian/rules.d/binary-hppa64.mk gcc-4.6-4.6.4/debian/rules.d/binary-hppa64.mk --- gcc-4.6-4.6.3/debian/rules.d/binary-hppa64.mk 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.d/binary-hppa64.mk 2013-04-14 22:48:24.000000000 +0000 @@ -7,6 +7,9 @@ # dh_installdirs -p$(p_hppa64) + rm -f $(d_hppa64)/usr/lib/libiberty.a + -find $(d_hppa64) ! -type d + : # provide as and ld links dh_link -p $(p_hppa64) \ /usr/bin/hppa64-linux-gnu-as \ diff -Nru gcc-4.6-4.6.3/debian/rules.d/binary-spu.mk gcc-4.6-4.6.4/debian/rules.d/binary-spu.mk --- gcc-4.6-4.6.3/debian/rules.d/binary-spu.mk 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.d/binary-spu.mk 2013-04-14 22:48:24.000000000 +0000 @@ -47,11 +47,11 @@ $(PF)/bin/spu-g++$(pkg_ver) \ $(gcc_spu_lexec_dir)/cc1plus \ $(PF)/spu/include/c++ \ - $(PF)/spu/lib/{libsupc++,libstdc++}.a \ + $(gcc_spu_lib_dir)/lib{sup,std}c++.a ifeq ($(with_spumea64),yes) files_spucxx += \ - $(PF)/spu/lib/mea64/{libsupc++,libstdc++}.a + $(gcc_spu_lib_dir)/mea64/lib{sup,std}c++.a endif ifneq ($(GFDL_INVARIANT_FREE),yes) @@ -70,12 +70,12 @@ $(gcc_spu_lib_dir)/finclude \ $(gcc_spu_lib_dir)/libgfortran.spec \ $(gcc_spu_lib_dir)/libgfortranbegin.a \ - $(PF)/spu/lib/libgfortran.a \ + $(gcc_spu_lib_dir)/libgfortran{,begin}.a ifeq ($(with_spumea64),yes) files_spuf95 += \ $(gcc_spu_lib_dir)/mea64/libgfortranbegin.a \ - $(PF)/spu/lib/mea64/libgfortran.a + $(gcc_spu_lib_dir)/mea64/libgfortran{,begin}.a endif ifneq ($(GFDL_INVARIANT_FREE),yes) diff -Nru gcc-4.6-4.6.3/debian/rules.defs gcc-4.6-4.6.4/debian/rules.defs --- gcc-4.6-4.6.3/debian/rules.defs 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.defs 2013-04-14 22:48:24.000000000 +0000 @@ -146,6 +146,7 @@ TP := $(subst _,-,$(DEB_TARGET_GNU_TYPE))- TS := -$(subst _,-,$(DEB_TARGET_ALIAS)) LS := -$(subst _,-,$(DEB_TARGET_ARCH))-cross + LS_biarch := -cross cross_bin_arch := -$(subst _,-,$(DEB_TARGET_ALIAS)) cross_lib_arch := -$(subst _,-,$(DEB_TARGET_ARCH))-cross @@ -310,6 +311,12 @@ # XXX: should with_common_libs be "yes" only if this is the default compiler # version on the targeted arch? +ifeq ($(DEB_CROSS),yes) +# re-enable common and library packages for cross builds +with_common_pkgs := yes +with_common_libs := yes +endif + # is this a multiarch-enabled build? ifeq (,$(filter $(distrelease),lenny etch squeeze dapper hardy jaunty karmic lucid maverick)) with_multiarch_lib := yes @@ -344,6 +351,11 @@ else with_gccxbase := yes endif +else + ifeq ($(DEB_TARGET_ARCH_OS),mint) + # hack to make cross-compiler self-hosted + with_gccxbase := yes + endif endif # build dev packages. @@ -397,11 +409,11 @@ ifndef DEB_STAGE # Ada -------------------- -ada_no_cpus := m32r m68k sh3 sh3eb sh4 sh4eb +ada_no_cpus := m32r sh3 sh3eb sh4 sh4eb ada_no_systems := ada_no_cross := yes ada_no_snap := no -ifneq (,$(filter $(DEB_TARGET_ARCH),armhf m68k powerpcspe sh4 sparc64)) +ifneq (,$(filter $(DEB_TARGET_ARCH),armhf powerpcspe sh4 sparc64)) ada_no_snap := yes endif @@ -662,6 +674,9 @@ ifeq ($(fortran_no_cross)-$(DEB_CROSS),yes-yes) with_fortran := diasbled for cross compiler package endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + with_fortran := not for FreeMiNT target from Debian packaging +endif with_fortran := $(call envfilt, fortran, , , $(with_fortran)) # Build all packages needed for Fortran development @@ -697,6 +712,9 @@ ifeq ($(objc_no_cross)-$(DEB_CROSS),yes-yes) with_objc := diasbled for cross compiler package endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + with_objc := not for FreeMiNT target from Debian packaging +endif with_objc := $(call envfilt, objc, obj-c++, , $(with_objc)) ifeq ($(with_objc),yes) @@ -736,6 +754,9 @@ ifeq ($(objcxx_no_cross)-$(DEB_CROSS),yes-yes) with_objcxx := diasbled for cross compiler package endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + with_objcxx := not for FreeMiNT target from Debian packaging +endif with_objcxx := $(call envfilt, obj-c++, , c++ objc, $(with_objcxx)) ifeq ($(with_objcxx),yes) @@ -790,6 +811,9 @@ ifeq ($(trunk_build),yes) with_nls := no endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + with_nls := disabled for FreeMiNT +endif with_nls := $(call envfilt, nls, , , $(with_nls)) # powerpc nof libraries ----- @@ -1001,7 +1025,7 @@ # multilib biarch_map := i686=x86_64 powerpc=powerpc64 sparc=sparc64 s390=s390x s390x=s390 \ x86_64=i686 powerpc64=powerpc mips=mips64 mipsel=mips64el -ifeq (,$(filter $(distrelease),lenny etch squeeze sid dapper hardy jaunty karmic lucid)) +ifeq (,$(filter $(distrelease),lenny etch squeeze wheezy sid dapper hardy jaunty karmic lucid)) biarch_map := $(subst i686=,i486=,$(biarch_map)) endif ifeq ($(distribution),Ubuntu) @@ -1113,11 +1137,6 @@ ifeq ($(with_d)-$(with_separate_gdc),yes-yes) no_biarch_libs := yes endif -ifneq (,$(filter $(DEB_TARGET_ARCH_CPU),arm)) - ifeq ($(with_ada)-$(with_separate_gnat),yes-yes) - no_biarch_libs := yes - endif -endif ifeq ($(no_biarch_libs),yes) with_lib64gcc := no @@ -1254,6 +1273,9 @@ ifneq (,$(findstring $(DEB_TARGET_GNU_SYSTEM),$(locale_no_systems))) force_gnu_locales := disabled for system $(DEB_TARGET_GNU_SYSTEM) endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + force_gnu_locales := disabled for FreeMiNT +endif gcc_tarpath := $(firstword $(wildcard gcc-*.tar.* /usr/src/gcc-$(BASE_VERSION)/gcc-*.tar.*)) gcc_tarball := $(notdir $(gcc_tarpath)) diff -Nru gcc-4.6-4.6.3/debian/rules.parameters gcc-4.6-4.6.4/debian/rules.parameters --- gcc-4.6-4.6.3/debian/rules.parameters 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.parameters 2013-04-14 22:48:24.000000000 +0000 @@ -1,16 +1,16 @@ # configuration parameters taken from upstream source files -GCC_VERSION := 4.6.3 -NEXT_GCC_VERSION := 4.6.4 +GCC_VERSION := 4.6.4 +NEXT_GCC_VERSION := 4.6.5 BASE_VERSION := 4.6 -SOURCE_VERSION := 4.6.3-4ubuntu1 -DEB_VERSION := 4.6.3-4ubuntu1 -DEB_EVERSION := 1:4.6.3-4ubuntu1 +SOURCE_VERSION := 4.6.4-1ubuntu1~12.04 +DEB_VERSION := 4.6.4-1ubuntu1~12.04 +DEB_EVERSION := 1:4.6.4-1ubuntu1~12.04 GDC_BASE_VERSION := DEB_GDC_VERSION := DEB_SOVERSION := 4.6 DEB_SOEVERSION := 1:4.6 DEB_LIBGCC_SOVERSION := 1:4.6 -DEB_LIBGCC_VERSION := 1:4.6.3-4ubuntu1 +DEB_LIBGCC_VERSION := 1:4.6.4-1ubuntu1~12.04 DEB_STDCXX_SOVERSION := 4.6 DEB_GCJ_SOVERSION := 4.6 PKG_GCJ_EXT := 12 diff -Nru gcc-4.6-4.6.3/debian/rules.patch gcc-4.6-4.6.4/debian/rules.patch --- gcc-4.6-4.6.3/debian/rules.patch 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules.patch 2013-04-14 22:48:24.000000000 +0000 @@ -14,9 +14,9 @@ debian_patches = \ $(if $(with_linaro_branch),gcc-linaro) \ - svn-updates$(if $(with_linaro_branch),-linaro) \ - $(if $(with_linaro_branch),pr52870) \ - $(if $(with_linaro_branch),linaro-lp972648) \ + $(if $(with_linaro_branch),gcc-linaro-revert-106905) \ + +# svn-updates$(if $(with_linaro_branch),-linaro) \ ifeq ($(with_java),yes) # debian_patches += \ @@ -27,6 +27,7 @@ debian_patches += \ rename-info-files \ $(if $(with_linaro_branch),gcc-linaro-doc) \ + $(if $(with_linaro_branch),gcc-linaro-revert-106905-doc) \ # $(if $(with_linaro_branch),,svn-doc-updates) \ @@ -82,6 +83,7 @@ pr49944 \ gcc-cloog-dl \ libffi-kfreebsd \ + libffi-m68k \ gcc-base-version \ pr49696 \ libffi-powerpc-sf \ @@ -91,7 +93,13 @@ pr50114 \ $(if $(with_linaro_branch),,pr50946) \ $(if $(with_linaro_branch),,gcc-arm-abi-conformance) \ - sh4-enable-ieee \ + arm-no-va_list-warn \ + pr47955 \ + m68k-fp-cmp-zero \ + m68k-atomic \ + gcc-gengtype-fix1 \ + gcc-gengtype-fix2 \ + ppl-version \ # $(if $(filter yes, $(DEB_CROSS)),,gcc-print-file-name) \ # libstdc++-nothumb-check \ @@ -127,7 +135,8 @@ ada-gcc-name \ ada-default-project-path \ ada-symbolic-tracebacks \ - ada-library-project-files-soname + ada-library-project-files-soname \ + ada-ppc64 ifeq ($(biarch64),yes) debian_patches += \ @@ -192,8 +201,17 @@ debian_patches += libjava-armel-unwind endif -ifeq ($(DEB_TARGET_ARCH),m68k) +ifeq ($(DEB_TARGET_ARCH_CPU),m68k) + debian_patches += \ + pr29442 \ + m68k-pr52391 \ + gcc-speed-up-insn-attrtab \ + pr52714 \ + pr53573 debian_patches += pr47612 + debian_patches += m68k-revert-pr45144 + debian_patches += m68k-ada + debian_patches += m68k-mint endif ifeq ($(DEB_TARGET_ARCH),powerpcspe) @@ -231,12 +249,17 @@ debian_patches += mips-triarch endif -debian_patches += arm-dynamic-linker +debian_patches += $(if $(with_linaro_branch),,arm-dynamic-linker) ifeq ($(with_softfloat),yes) debian_patches += arm-multilib-soft-float else ifeq ($(multilib),yes) - debian_patches += arm-multilib + ifneq (,$(filter $(distrelease),lucid maverick natty oneiric precise)) + debian_patches += arm-multilib-softfp + else + debian_patches += arm-multilib-soft + endif endif +debian_patches += arm-multilib-defaults ifeq ($(DEB_CROSS),yes) ifeq ($(trunk_build),yes) @@ -257,9 +280,9 @@ debian_patches += libjava-fixed-symlinks debian_patches += libstdc++-arm-wno-abi -ifneq (,$(filter $(DEB_TARGET_ARCH), armel mipsel)) +ifneq (,$(filter $(DEB_TARGET_ARCH), armel mips mipsel)) # timeouts on the buildd's, both Debian and Ubuntu - #debian_patches += libstdc++-no-testsuite + debian_patches += libstdc++-no-testsuite endif debian_patches += ada-mips debian_patches += libffi-ro-eh_frame_sect @@ -286,7 +309,7 @@ debian_patches += gcc-powerpc-nof endif debian_patches += gcc-powerpc-undef -ifeq ($(biarch32),yes) +ifneq (,$(findstring /$(DEB_TARGET_ARCH)/,$(biarch32archs))) ifeq ($(with_multiarch_lib),yes) ifeq ($(trunk_build),yes) debian_patches += gcc-multilib64-multiarch-trunk @@ -301,7 +324,7 @@ ifeq (,$(filter $(distrelease),lenny squeeze dapper hardy intrepid jaunty karmic lucid maverick)) debian_patches += gcc-no-add-needed endif -ifeq (,$(filter $(distrelease),lenny squeeze sid experimental dapper hardy intrepid jaunty karmic lucid maverick)) +ifeq (,$(filter $(distrelease),lenny squeeze wheezy sid experimental dapper hardy intrepid jaunty karmic lucid maverick)) debian_patches += gcc-as-needed endif debian_patches += mips-fix-loongson2f-nop diff -Nru gcc-4.6-4.6.3/debian/rules2 gcc-4.6-4.6.4/debian/rules2 --- gcc-4.6-4.6.3/debian/rules2 2013-04-14 22:48:22.000000000 +0000 +++ gcc-4.6-4.6.4/debian/rules2 2013-04-14 22:48:24.000000000 +0000 @@ -220,7 +220,9 @@ endif CONFARGS += --enable-libstdcxx-time=yes -CONFARGS += --enable-gnu-unique-object +ifeq (,$(filter $(DEB_TARGET_ARCH), hurd-i386 kfreebsd-i386 kfreebsd-amd64)) + CONFARGS += --enable-gnu-unique-object +endif ifneq ($(with_ssp),yes) CONFARGS += --disable-libssp @@ -380,7 +382,7 @@ endif endif -ifeq ($(DEB_TARGET_GNU_CPU),$(findstring $(DEB_TARGET_GNU_CPU),m68k)) +ifeq ($(DEB_TARGET_ARCH_CPU),m68k) CONFARGS += --disable-werror endif # FIXME: correct fix-warnings.dpatch @@ -408,16 +410,17 @@ CONFARGS += --with-multilib-list=m4,m4-nofpu --with-cpu=sh4 endif -ifneq (,$(findstring m68k-linux,$(DEB_TARGET_GNU_TYPE))) +ifeq ($(DEB_TARGET_ARCH_CPU),m68k) CONFARGS += --disable-multilib endif ifeq ($(DEB_TARGET_ARCH_OS),linux) ifneq (,$(findstring $(DEB_TARGET_ARCH), alpha powerpc ppc64 s390 s390x sparc sparc64)) + qualifier := $(shell dpkg --assert-multi-arch >/dev/null 2>&1 && echo ':$(DEB_TARGET_ARCH)') ifeq ($(DEB_TARGET_ARCH),alpha) - glibc_version := $(shell dpkg -s libc6.1 | awk '/^Version:/ {print $$2}') + glibc_version := $(shell dpkg -s libc6.1$(qualifier) | awk '/^Version:/ {print $$2}') else - glibc_version := $(shell dpkg -s libc6 | awk '/^Version:/ {print $$2}') + glibc_version := $(shell dpkg -s libc6$(qualifier) | awk '/^Version:/ {print $$2}') endif with_ldbl128 := $(shell dpkg --compare-versions $(glibc_version) gt 2.3.99 && echo yes) ifeq ($(with_ldbl128),yes) @@ -513,6 +516,17 @@ endif endif +ifeq ($(DEB_TARGET_ARCH),mint-m68k) + # only DEB_STAGE=stage1 since mintlib is not packaged in Debian + # and does not support shared libraries either, which the gcc + # cross-package framework assumes + CONFARGS += --disable-multilib + CONFARGS += --disable-shared + CONFARGS += --disable-linker-build-id + CONFARGS += --disable-threads + CONFARGS += --disable-gnu-unique-object +endif + ifeq ($(with_bootstrap),off) bootstrap_target = else ifeq ($(with_bootstrap),) @@ -1293,6 +1307,7 @@ -chmod 755 $(srcdir)/contrib/test_summary ifneq ($(with_common_libs),yes) + ifeq ($(with_cxx),yesDISABLED) : # libstdc++6 built from newer gcc-4.x source, run testsuite against the installed lib sed 's/-L[^ ]*//g' $(buildlibdir)/libstdc++-v3/scripts/testsuite_flags \ @@ -1321,6 +1336,7 @@ echo 'END installed libstdc++-v3 test-summary' find $(buildlibdir)/libstdc++-v3/testsuite -name '*.log' -o -name '*.sum' \ | xargs -r rm -f + endif endif ifeq ($(start_logwatch),yes) @@ -1777,6 +1793,7 @@ else \ rm -f $(d)/$(PF)/bin/spu-g++-4*; \ fi + ifneq (,$(findstring fortran, $(spu_configure_args))) if [ ! -x $(d)/$(PF)/bin/spu-gfortran ]; then \ mv $(d)/$(PF)/bin/spu-gfortran-4* $(d)/$(PF)/bin/spu-gfortran; \ @@ -1846,27 +1863,6 @@ done endif -ifeq ($(biarch64)-$(with_cxx),yes-yes) - ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) - : # fix biarch C++ header installation - ifeq ($(DEB_TARGET_ARCH),i386) - mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnu/64 \ - $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ - rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnu - endif - ifeq ($(DEB_TARGET_ARCH),powerpc) - mv $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu/64 \ - $(d)/$(cxx_inc_dir)/powerpc-linux-gnu/ - rmdir $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu - endif - ifeq ($(DEB_TARGET_ARCH),s390) - mv $(d)/$(cxx_inc_dir)/s390x-linux-gnu/64 \ - $(d)/$(cxx_inc_dir)/s390-linux-gnu/ - rmdir $(d)/$(cxx_inc_dir)/s390x-linux-gnu - endif - endif -endif - # FIXME: libjava/classpath not correctly patched ifeq ($(with_java),yes) -if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \ @@ -1928,7 +1924,7 @@ mkdir -p $(d)/$(PF)/$(libn32)/debug endif -ifneq (,$(filter $(DEB_TARGET_GNU_CPU),x86_64 sparc64 s390x)) +ifneq (,$(filter $(DEB_TARGET_GNU_CPU),x86_64 sparc64 s390x powerpc64)) : # link lib to lib64 and $(PF)/lib to $(PF)/lib64 : # (this works when CONFARGS contains '--disable-multilib') ln -s $(configured_libdir) $(d)/lib64 @@ -1968,23 +1964,6 @@ done endif -ifeq ($(biarch64)-$(with_cxx),yes-yes) - ifneq (,$(filter libstdc++-v3, $(biarch_multidir_names))) - ifeq ($(DEB_TARGET_ARCH),i386) - : # fix biarch C++ header installation - mv $(d)/$(cxx_inc_dir)/x86_64-linux-gnu/64 \ - $(d)/$(cxx_inc_dir)/$(DEB_TARGET_GNU_TYPE)/ - rmdir $(d)/$(cxx_inc_dir)/x86_64-linux-gnu - endif - ifeq ($(DEB_TARGET_ARCH),powerpc) - : # fix biarch C++ header installation - mv $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu/64 \ - $(d)/$(cxx_inc_dir)/powerpc-linux-gnu/ - rmdir $(d)/$(cxx_inc_dir)/powerpc64-linux-gnu - endif - endif -endif - # FIXME: libjava/classpath not correctly patched ifeq ($(with_java),yes) -if [ -d $(d)/$(PF)/lib/gcj-$(GCC_VERSION)-$(GCJ_SONAME) ]; then \ @@ -2092,7 +2071,7 @@ : # remove files not needed rm -rf $(d_hppa64)/$(PF)/info $(d_hppa64)/$(PF)/share/info rm -rf $(d_hppa64)/$(PF)/man $(d_hppa64)/$(PF)/share/man - rm -rf $(d_hppa64)/$(PF)/$(libdir)/gcc/spu/$(GCC_VERSION)/plugin + rm -rf $(d_hppa64)/$(PF)/$(libdir)/gcc/hppa64-linux-gnu/$(GCC_VERSION)/plugin rm -f $(d_hppa64)/$(PF)/$(libdir)/libiberty.a rm -f $(d_hppa64)/$(PF)/bin/*{gcov,gccbug,gcc} @@ -2131,6 +2110,22 @@ $(LDFLAGS_TO_PASS) \ DESTDIR=$(PWD)/$(d_spu) \ install +ifneq (,$(findstring c++, $(spu_configure_args))) + mv $(d_spu)/usr/spu/lib/lib{std,sup}c++.a \ + $(d_spu)/$(gcc_spu_lib_dir)/. + ifeq ($(with_spumea64),yes) + mv $(d_spu)/usr/spu/lib/mea64/lib{std,sup}c++.a \ + $(d_spu)/$(gcc_spu_lib_dir)/mea64/. + endif +endif +ifneq (,$(findstring fortran, $(spu_configure_args))) + mv $(d_spu)/usr/spu/lib/libgfortran.a \ + $(d_spu)/$(gcc_spu_lib_dir)/. + ifeq ($(with_spumea64),yes) + mv $(d_spu)/usr/spu/lib/mea64/libgfortran.a \ + $(d_spu)/$(gcc_spu_lib_dir)/mea64/. + endif +endif ifeq ($(versioned_packages),yes) mv $(d_spu)/$(PF)/bin/spu-cpp \ Binary files /tmp/rCczIttt2S/gcc-4.6-4.6.3/gcc-4.6.3.tar.xz and /tmp/9kkd7210IW/gcc-4.6-4.6.4/gcc-4.6.3.tar.xz differ Binary files /tmp/rCczIttt2S/gcc-4.6-4.6.3/gcc-4.6.4.tar.xz and /tmp/9kkd7210IW/gcc-4.6-4.6.4/gcc-4.6.4.tar.xz differ