diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/benchmarks/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/benchmarks/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/benchmarks/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/benchmarks/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -2,14 +2,12 @@ bin_PROGRAMS = $(NULL) -if HAVE_DRM bin_PROGRAMS += \ intel_upload_blit_large \ intel_upload_blit_large_gtt \ intel_upload_blit_large_map \ intel_upload_blit_small \ $(NULL) -endif BENCHMARK_LIBS = \ ../lib/libintel_tools.la \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/benchmarks/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/benchmarks/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/benchmarks/Makefile.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/benchmarks/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -34,14 +34,10 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -bin_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) -@HAVE_DRM_TRUE@am__append_1 = \ -@HAVE_DRM_TRUE@ intel_upload_blit_large \ -@HAVE_DRM_TRUE@ intel_upload_blit_large_gtt \ -@HAVE_DRM_TRUE@ intel_upload_blit_large_map \ -@HAVE_DRM_TRUE@ intel_upload_blit_small \ -@HAVE_DRM_TRUE@ $(NULL) - +bin_PROGRAMS = $(am__EXEEXT_1) intel_upload_blit_large$(EXEEXT) \ + intel_upload_blit_large_gtt$(EXEEXT) \ + intel_upload_blit_large_map$(EXEEXT) \ + intel_upload_blit_small$(EXEEXT) $(am__EXEEXT_1) subdir = benchmarks DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -56,11 +52,6 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = am__EXEEXT_1 = -@HAVE_DRM_TRUE@am__EXEEXT_2 = intel_upload_blit_large$(EXEEXT) \ -@HAVE_DRM_TRUE@ intel_upload_blit_large_gtt$(EXEEXT) \ -@HAVE_DRM_TRUE@ intel_upload_blit_large_map$(EXEEXT) \ -@HAVE_DRM_TRUE@ intel_upload_blit_small$(EXEEXT) \ -@HAVE_DRM_TRUE@ $(am__EXEEXT_1) am__installdirs = "$(DESTDIR)$(bindir)" PROGRAMS = $(bin_PROGRAMS) intel_upload_blit_large_SOURCES = intel_upload_blit_large.c @@ -154,6 +145,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/config.h.in intel-gpu-tools-1.0.2+git20111120+2f56e96/config.h.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/config.h.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/config.h.in 2011-11-21 01:14:39.000000000 +0000 @@ -6,9 +6,6 @@ /* Define to 1 if you have the header file. */ #undef HAVE_DLFCN_H -/* Define to 1 if we have DRM support */ -#undef HAVE_DRM - /* Have glib support */ #undef HAVE_GLIB diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/configure intel-gpu-tools-1.0.2+git20111120+2f56e96/configure --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/configure 2011-07-29 14:04:36.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/configure 2011-11-21 01:14:39.000000000 +0000 @@ -635,6 +635,7 @@ CHANGELOG_CMD STRICT_CFLAGS CWARNFLAGS +GEN4ASM HAVE_SHADER_DEBUGGER_FALSE HAVE_SHADER_DEBUGGER_TRUE WARN_CFLAGS @@ -652,8 +653,6 @@ CAIRO_CFLAGS PCIACCESS_LIBS PCIACCESS_CFLAGS -HAVE_DRM_FALSE -HAVE_DRM_TRUE DRM_LIBS DRM_CFLAGS PKG_CONFIG_LIBDIR @@ -11736,12 +11735,12 @@ pkg_cv_DRM_CFLAGS="$DRM_CFLAGS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_intel >= 2.4.23\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm_intel >= 2.4.23") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_intel >= 2.4.23 libdrm\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_intel >= 2.4.23 libdrm") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_DRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm_intel >= 2.4.23" 2>/dev/null` + pkg_cv_DRM_CFLAGS=`$PKG_CONFIG --cflags "libdrm_intel >= 2.4.23 libdrm" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -11753,12 +11752,12 @@ pkg_cv_DRM_LIBS="$DRM_LIBS" elif test -n "$PKG_CONFIG"; then if test -n "$PKG_CONFIG" && \ - { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_intel >= 2.4.23\""; } >&5 - ($PKG_CONFIG --exists --print-errors "libdrm_intel >= 2.4.23") 2>&5 + { { $as_echo "$as_me:${as_lineno-$LINENO}: \$PKG_CONFIG --exists --print-errors \"libdrm_intel >= 2.4.23 libdrm\""; } >&5 + ($PKG_CONFIG --exists --print-errors "libdrm_intel >= 2.4.23 libdrm") 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then - pkg_cv_DRM_LIBS=`$PKG_CONFIG --libs "libdrm_intel >= 2.4.23" 2>/dev/null` + pkg_cv_DRM_LIBS=`$PKG_CONFIG --libs "libdrm_intel >= 2.4.23 libdrm" 2>/dev/null` test "x$?" != "x0" && pkg_failed=yes else pkg_failed=yes @@ -11779,39 +11778,45 @@ _pkg_short_errors_supported=no fi if test $_pkg_short_errors_supported = yes; then - DRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_intel >= 2.4.23" 2>&1` + DRM_PKG_ERRORS=`$PKG_CONFIG --short-errors --print-errors --cflags --libs "libdrm_intel >= 2.4.23 libdrm" 2>&1` else - DRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_intel >= 2.4.23" 2>&1` + DRM_PKG_ERRORS=`$PKG_CONFIG --print-errors --cflags --libs "libdrm_intel >= 2.4.23 libdrm" 2>&1` fi # Put the nasty error message in config.log where it belongs echo "$DRM_PKG_ERRORS" >&5 - have_drm=no + as_fn_error $? "Package requirements (libdrm_intel >= 2.4.23 libdrm) were not met: + +$DRM_PKG_ERRORS + +Consider adjusting the PKG_CONFIG_PATH environment variable if you +installed software in a non-standard prefix. + +Alternatively, you may set the environment variables DRM_CFLAGS +and DRM_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details." "$LINENO" 5 elif test $pkg_failed = untried; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } - have_drm=no + { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 +$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} +as_fn_error $? "The pkg-config script could not be found or is too old. Make sure it +is in your PATH or set the PKG_CONFIG environment variable to the full +path to pkg-config. + +Alternatively, you may set the environment variables DRM_CFLAGS +and DRM_LIBS to avoid the need to call pkg-config. +See the pkg-config man page for more details. + +To get pkg-config, see . +See \`config.log' for more details" "$LINENO" 5; } else DRM_CFLAGS=$pkg_cv_DRM_CFLAGS DRM_LIBS=$pkg_cv_DRM_LIBS { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 $as_echo "yes" >&6; } - have_drm=yes -fi -if test "x$have_drm" = "xyes"; then - -$as_echo "#define HAVE_DRM 1" >>confdefs.h fi - if test "x$have_drm" = "xyes"; then - HAVE_DRM_TRUE= - HAVE_DRM_FALSE='#' -else - HAVE_DRM_TRUE='#' - HAVE_DRM_FALSE= -fi - - pkg_failed=no { $as_echo "$as_me:${as_lineno-$LINENO}: checking for PCIACCESS" >&5 @@ -12186,9 +12191,52 @@ fi if test "x$SHADER_DEBUGGER" = xyes; then + # Extract the first word of "intel-gen4asm", so it can be a program name with args. +set dummy intel-gen4asm; ac_word=$2 +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 +$as_echo_n "checking for $ac_word... " >&6; } +if ${ac_cv_prog_GEN4ASM+:} false; then : + $as_echo_n "(cached) " >&6 +else + if test -n "$GEN4ASM"; then + ac_cv_prog_GEN4ASM="$GEN4ASM" # Let the user override the test. +else +as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +for as_dir in $PATH +do + IFS=$as_save_IFS + test -z "$as_dir" && as_dir=. + for ac_exec_ext in '' $ac_executable_extensions; do + if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then + ac_cv_prog_GEN4ASM="intel-gen4asm" + $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 + break 2 + fi +done + done +IFS=$as_save_IFS + +fi +fi +GEN4ASM=$ac_cv_prog_GEN4ASM +if test -n "$GEN4ASM"; then + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $GEN4ASM" >&5 +$as_echo "$GEN4ASM" >&6; } +else + { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 +$as_echo "no" >&6; } +fi + + + if test -z "$GEN4ASM"; then + as_fn_error $? "Cannot find intel-gen4asm in your path; please set GEN4ASM env variable" "$LINENO" 5 + else + ac_config_files="$ac_config_files debugger/system_routine/GNUmakefile" + $as_echo "#define HAVE_SHADER_DEBUGGER 1" >>confdefs.h + fi fi @@ -12568,10 +12616,6 @@ as_fn_error $? "conditional \"am__fastdepCC\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${HAVE_DRM_TRUE}" && test -z "${HAVE_DRM_FALSE}"; then - as_fn_error $? "conditional \"HAVE_DRM\" was never defined. -Usually this means the macro was only invoked conditionally." "$LINENO" 5 -fi if test -z "${HAVE_CAIRO_TRUE}" && test -z "${HAVE_CAIRO_FALSE}"; then as_fn_error $? "conditional \"HAVE_CAIRO\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 @@ -13472,6 +13516,7 @@ "config.h") CONFIG_HEADERS="$CONFIG_HEADERS config.h" ;; "depfiles") CONFIG_COMMANDS="$CONFIG_COMMANDS depfiles" ;; "libtool") CONFIG_COMMANDS="$CONFIG_COMMANDS libtool" ;; + "debugger/system_routine/GNUmakefile") CONFIG_FILES="$CONFIG_FILES debugger/system_routine/GNUmakefile" ;; "Makefile") CONFIG_FILES="$CONFIG_FILES Makefile" ;; "benchmarks/Makefile") CONFIG_FILES="$CONFIG_FILES benchmarks/Makefile" ;; "lib/Makefile") CONFIG_FILES="$CONFIG_FILES lib/Makefile" ;; diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/configure.ac intel-gpu-tools-1.0.2+git20111120+2f56e96/configure.ac --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/configure.ac 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/configure.ac 2011-11-21 01:14:32.000000000 +0000 @@ -48,12 +48,7 @@ LT_PREREQ([2.2]) LT_INIT([disable-static]) -PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.23], have_drm=yes, have_drm=no) -if test "x$have_drm" = "xyes"; then - AC_DEFINE([HAVE_DRM], 1, [Define to 1 if we have DRM support]) -fi -AM_CONDITIONAL(HAVE_DRM, test "x$have_drm" = "xyes") - +PKG_CHECK_MODULES(DRM, [libdrm_intel >= 2.4.23 libdrm]) PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10]) PKG_CHECK_MODULES(CAIRO, cairo, [HAVE_CAIRO=yes], [HAVE_CAIRO=no]) @@ -93,7 +88,13 @@ [SHADER_DEBUGGER=no]) AM_CONDITIONAL(HAVE_SHADER_DEBUGGER, [test "x$SHADER_DEBUGGER" = xyes]) if test "x$SHADER_DEBUGGER" = xyes; then - AC_DEFINE(HAVE_SHADER_DEBUGGER, 1, [Have shader debugging support]) + AC_CHECK_PROG([GEN4ASM], intel-gen4asm, intel-gen4asm) + if test -z "$GEN4ASM"; then + AC_MSG_ERROR([Cannot find intel-gen4asm in your path; please set GEN4ASM env variable]) + else + AC_CONFIG_FILES([debugger/system_routine/GNUmakefile]) + AC_DEFINE(HAVE_SHADER_DEBUGGER, 1, [Have shader debugging support]) + fi fi m4_ifndef([XORG_MACROS_VERSION], [AC_FATAL([must install xorg-macros 1.3 or later before running autoconf/autogen])]) diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/debian/changelog intel-gpu-tools-1.0.2+git20111120+2f56e96/debian/changelog --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/debian/changelog 2011-11-22 05:48:30.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/debian/changelog 2011-11-22 05:48:30.000000000 +0000 @@ -1,4 +1,10 @@ -intel-gpu-tools (1.0.2+git20110729+3b10b7b-0ubuntu1~edgers~natty) natty; urgency=low +intel-gpu-tools (1.0.2+git20111120+2f56e96-0ubuntu1~edgers~natty) natty; urgency=low + + * New git checkout. + + -- Robert Hooker Sun, 20 Nov 2011 20:16:30 -0500 + +intel-gpu-tools (1.0.2+git20110729+3b10b7b-0ubuntu1~edgers) oneiric; urgency=low * New git checkout, up to commit 3b10b7b. diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -1,10 +1,17 @@ SUBDIRS=system_routine -bin_PROGRAMS = \ +bin_PROGRAMS = # + +if HAVE_SHADER_DEBUGGER +##needed by distcheck +DIST_SUBDIRS=system_routine +EXTRA_DIST=system_routine/ + +bin_PROGRAMS += \ eudb \ debug_rdata \ $(NULL) - +endif LDADD = ../lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/Makefile.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -34,7 +34,12 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -bin_PROGRAMS = eudb$(EXEEXT) debug_rdata$(EXEEXT) +bin_PROGRAMS = $(am__EXEEXT_1) +@HAVE_SHADER_DEBUGGER_TRUE@am__append_1 = \ +@HAVE_SHADER_DEBUGGER_TRUE@ eudb \ +@HAVE_SHADER_DEBUGGER_TRUE@ debug_rdata \ +@HAVE_SHADER_DEBUGGER_TRUE@ $(NULL) + subdir = debugger DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -48,6 +53,8 @@ CONFIG_HEADER = $(top_builddir)/config.h CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = +@HAVE_SHADER_DEBUGGER_TRUE@am__EXEEXT_1 = eudb$(EXEEXT) \ +@HAVE_SHADER_DEBUGGER_TRUE@ debug_rdata$(EXEEXT) am__installdirs = "$(DESTDIR)$(bindir)" PROGRAMS = $(bin_PROGRAMS) debug_rdata_SOURCES = debug_rdata.c @@ -106,7 +113,6 @@ distdir ETAGS = etags CTAGS = ctags -DIST_SUBDIRS = $(SUBDIRS) DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) am__relativize = \ dir0=`pwd`; \ @@ -172,6 +178,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -281,6 +288,8 @@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ SUBDIRS = system_routine +@HAVE_SHADER_DEBUGGER_TRUE@DIST_SUBDIRS = system_routine +@HAVE_SHADER_DEBUGGER_TRUE@EXTRA_DIST = system_routine/ LDADD = ../lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \ -I$(srcdir)/.. \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/system_routine/GNUmakefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/system_routine/GNUmakefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/system_routine/GNUmakefile.in 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/system_routine/GNUmakefile.in 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,3 @@ +include Makefile +srcdir = @srcdir@ +VPATH = @srcdir@ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/system_routine/Makefile intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/system_routine/Makefile --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/debugger/system_routine/Makefile 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/debugger/system_routine/Makefile 2011-11-21 01:14:32.000000000 +0000 @@ -27,8 +27,7 @@ PRECPP=./pre_cpp.py CPP_FLAGS=-x assembler-with-cpp -P -GEN_AS?=~/intel-gfx/intel-gen4asm/src/intel-gen4asm -GEN_AS_FLAGS?=-g6 -a -b +GEN4ASM_FLAGS?=-g6 -a -b TEMP:=$(shell mktemp) TEMP2:=$(shell mktemp) @@ -41,7 +40,7 @@ sr.c: sr.g4a eviction_macro evict.h $(PRECPP) $^ > $(TEMP) $(CPP) $(CPP_FLAGS) $(DEFINES) -o $(TEMP2) $(TEMP) - $(GEN_AS) $(GEN_AS_FLAGS) $(TEMP2) -o $@ + $(GEN4ASM) $(GEN4ASM_FLAGS) $(TEMP2) -o $@ sr : sr.o $(OBJCOPY) -O binary -K gen_eu_bytes $^ $@ @@ -51,7 +50,7 @@ test.c: test.g4a $(PRECPP) $^ > $(TEMP) $(CPP) $(CPP_FLAGS) $(DEFINES) -o $(TEMP2) $(TEMP) - $(GEN_AS) $(GEN_AS_FLAGS) $(TEMP2) -o $@ + $(GEN4ASM) $(GEN4ASM_FLAGS) $(TEMP2) -o $@ test : test.o $(OBJCOPY) -O binary -K gen_eu_bytes $^ $@ @@ -59,7 +58,7 @@ helper: sr.g4a eviction_macro $(PRECPP) $^ > help $(CPP) $(CPP_FLAGS) $(DEFINES) -o help2 help - $(GEN_AS) $(GEN_AS_FLAGS) help2 -o $@ + $(GEN4ASM) $(GEN4ASM_FLAGS) help2 -o $@ eviction_macro : @@ -72,13 +71,14 @@ .PHONY : clean distclean: clean - $(RM) help* + $(RM) help* GNUmakefile maintainer-clean: clean EMPTY_AUTOMAKE_TARGETS = install install-data install-exec uninstall \ install-dvi install-html install-info install-ps \ install-pdf installdirs check installcheck \ - mostlyclean dvi pdf ps info html tags ctags + mostlyclean dvi pdf ps info html tags ctags \ + distdir .PHONY: $(EMPTY_AUTOMAKE_TARGETS) $(EMPTY_AUTOMAKE_TARGETS): diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/.gitignore intel-gpu-tools-1.0.2+git20111120+2f56e96/.gitignore --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/.gitignore 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/.gitignore 2011-11-21 01:14:32.000000000 +0000 @@ -34,6 +34,8 @@ tests/getstats tests/getversion tests/gem_basic +tests/gem_double_irq_loop +tests/gem_dummy_reloc_loop tests/gem_exec_blt tests/gem_exec_nop tests/gem_fence_thrash @@ -43,11 +45,17 @@ tests/gem_largeobject tests/gem_mmap tests/gem_mmap_gtt +tests/gem_pipe_control_store_loop tests/gem_pread_after_blit tests/gem_pwrite tests/gem_readwrite tests/gem_ringfill +tests/gem_ring_sync_loop tests/gem_linear_blits +tests/gem_storedw_batches_loop +tests/gem_storedw_loop_blt +tests/gem_storedw_loop_bsd +tests/gem_storedw_loop_render tests/gem_vmap_blits tests/gem_tiled_blits tests/gem_tiled_fence_blits @@ -64,6 +72,9 @@ tests/gen3_render_tiledy_blits tests/gen3_render_mixed_blits tests/gen3_mixed_blits +tests/testdisplay +tools/forcewaked +tools/intel_backlight tools/intel_disable_clock_gating tools/intel_dump_decode tools/intel_error_decode diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/drmtest.c intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/drmtest.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/drmtest.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/drmtest.c 2011-11-21 01:14:32.000000000 +0000 @@ -64,6 +64,7 @@ close(fd); } + fprintf(stderr, "failed to open any drm device. retry as root?\n"); abort(); } diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_batchbuffer.c intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_batchbuffer.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_batchbuffer.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_batchbuffer.c 2011-11-21 01:14:32.000000000 +0000 @@ -75,10 +75,9 @@ #define CMD_POLY_STIPPLE_OFFSET 0x7906 void -intel_batchbuffer_flush(struct intel_batchbuffer *batch) +intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring) { unsigned int used = batch->ptr - batch->buffer; - int ring; int ret; if (used == 0) @@ -107,15 +106,21 @@ batch->ptr = NULL; - ring = 0; - if (HAS_BLT_RING(batch->devid)) - ring = I915_EXEC_BLT; ret = drm_intel_bo_mrb_exec(batch->bo, used, NULL, 0, 0, ring); assert(ret == 0); intel_batchbuffer_reset(batch); } +void +intel_batchbuffer_flush(struct intel_batchbuffer *batch) +{ + int ring = 0; + if (HAS_BLT_RING(batch->devid)) + ring = I915_EXEC_BLT; + intel_batchbuffer_flush_on_ring(batch, ring); +} + /* This is the only way buffers get added to the validate list. */ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_batchbuffer.h intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_batchbuffer.h --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_batchbuffer.h 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_batchbuffer.h 2011-11-21 01:14:32.000000000 +0000 @@ -24,6 +24,7 @@ void intel_batchbuffer_flush(struct intel_batchbuffer *batch); +void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring); void intel_batchbuffer_reset(struct intel_batchbuffer *batch); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_chipset.h intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_chipset.h --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_chipset.h 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_chipset.h 2011-11-21 01:14:32.000000000 +0000 @@ -169,6 +169,10 @@ #define HAS_BLT_RING(devid) (IS_GEN6(devid) || \ IS_GEN7(devid)) +#define HAS_BSD_RING(devid) (IS_GEN5(devid) || \ + IS_GEN6(devid) || \ + IS_GEN7(devid)) + #define IS_BROADWATER(devid) (devid == PCI_CHIP_I946_GZ || \ devid == PCI_CHIP_I965_G_1 || \ devid == PCI_CHIP_I965_Q || \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_drm.c intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_drm.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_drm.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_drm.c 2011-11-21 01:14:32.000000000 +0000 @@ -36,6 +36,7 @@ #include #include #include +#include #include "intel_gpu_tools.h" #include "i915_drm.h" @@ -55,3 +56,37 @@ return devid; } + +int intel_gen(uint32_t devid) +{ + if (IS_GEN2(devid)) + return 2; + if (IS_GEN3(devid)) + return 3; + if (IS_GEN4(devid)) + return 4; + if (IS_GEN5(devid)) + return 5; + if (IS_GEN6(devid)) + return 6; + if (IS_GEN7(devid)) + return 7; + + return -1; +} + +uint64_t +intel_get_total_ram_mb(void) +{ + struct sysinfo sysinf; + uint64_t retval; + int ret; + + ret = sysinfo(&sysinf); + assert(ret == 0); + + retval = sysinf.totalram; + retval *= sysinf.mem_unit; + + return retval / (1024*1024); +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_gpu_tools.h intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_gpu_tools.h --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_gpu_tools.h 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_gpu_tools.h 2011-11-21 01:14:32.000000000 +0000 @@ -79,6 +79,8 @@ struct pci_device *intel_get_pci_device(void); uint32_t intel_get_drm_devid(int fd); +int intel_gen(uint32_t devid); +uint64_t intel_get_total_ram_mb(void); void intel_map_file(char *); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_pci.c intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_pci.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_pci.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_pci.c 2011-11-21 01:14:32.000000000 +0000 @@ -82,7 +82,8 @@ return; if (pch_dev->vendor_id == 0x8086 && - (pch_dev->device_id & 0xff00) == 0x1c00) + (((pch_dev->device_id & 0xff00) == 0x1c00) || + (pch_dev->device_id & 0xff00) == 0x1e00)) pch = PCH_CPT; } diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_reg.h intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_reg.h --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/intel_reg.h 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/intel_reg.h 2011-11-21 01:14:32.000000000 +0000 @@ -3261,6 +3261,7 @@ /* CPU: FDI_TX */ #define FDI_TXA_CTL 0x60100 #define FDI_TXB_CTL 0x61100 +#define FDI_TXC_CTL 0x62100 #define FDI_TX_DISABLE (0<<31) #define FDI_TX_ENABLE (1<<31) #define FDI_LINK_TRAIN_PATTERN_1 (0<<28) diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -3,24 +3,26 @@ AM_CFLAGS = $(WARN_CFLAGS) -I$(srcdir)/.. libintel_tools_la_SOURCES = \ intel_batchbuffer.h \ + intel_batchbuffer.c \ intel_chipset.h \ intel_gpu_tools.h \ intel_mmio.c \ intel_pci.c \ intel_reg.h \ + i915_3d.h \ + i915_reg.h \ + i830_reg.h \ intel_reg_map.c \ + intel_drm.c \ instdone.c \ instdone.h \ - drmtest.h - -if HAVE_DRM -libintel_tools_la_SOURCES += \ - intel_batchbuffer.c \ - intel_drm.c \ + drmtest.h \ drmtest.c \ + debug.h \ $(NULL) + AM_CFLAGS += $(DRM_CFLAGS) -endif + noinst_LTLIBRARIES = libintel_tools.la diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/lib/Makefile.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/lib/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -34,13 +34,6 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -@HAVE_DRM_TRUE@am__append_1 = \ -@HAVE_DRM_TRUE@ intel_batchbuffer.c \ -@HAVE_DRM_TRUE@ intel_drm.c \ -@HAVE_DRM_TRUE@ drmtest.c \ -@HAVE_DRM_TRUE@ $(NULL) - -@HAVE_DRM_TRUE@am__append_2 = $(DRM_CFLAGS) subdir = lib DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -56,15 +49,10 @@ CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) libintel_tools_la_LIBADD = -am__libintel_tools_la_SOURCES_DIST = intel_batchbuffer.h \ - intel_chipset.h intel_gpu_tools.h intel_mmio.c intel_pci.c \ - intel_reg.h intel_reg_map.c instdone.c instdone.h drmtest.h \ - intel_batchbuffer.c intel_drm.c drmtest.c am__objects_1 = -@HAVE_DRM_TRUE@am__objects_2 = intel_batchbuffer.lo intel_drm.lo \ -@HAVE_DRM_TRUE@ drmtest.lo $(am__objects_1) -am_libintel_tools_la_OBJECTS = intel_mmio.lo intel_pci.lo \ - intel_reg_map.lo instdone.lo $(am__objects_2) +am_libintel_tools_la_OBJECTS = intel_batchbuffer.lo intel_mmio.lo \ + intel_pci.lo intel_reg_map.lo intel_drm.lo instdone.lo \ + drmtest.lo $(am__objects_1) libintel_tools_la_OBJECTS = $(am_libintel_tools_la_OBJECTS) AM_V_lt = $(am__v_lt_$(V)) am__v_lt_ = $(am__v_lt_$(AM_DEFAULT_VERBOSITY)) @@ -96,7 +84,7 @@ am__v_GEN_ = $(am__v_GEN_$(AM_DEFAULT_VERBOSITY)) am__v_GEN_0 = @echo " GEN " $@; SOURCES = $(libintel_tools_la_SOURCES) -DIST_SOURCES = $(am__libintel_tools_la_SOURCES_DIST) +DIST_SOURCES = $(libintel_tools_la_SOURCES) ETAGS = etags CTAGS = ctags DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -139,6 +127,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -248,11 +237,27 @@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ NULL = # -AM_CFLAGS = $(WARN_CFLAGS) -I$(srcdir)/.. $(am__append_2) -libintel_tools_la_SOURCES = intel_batchbuffer.h intel_chipset.h \ - intel_gpu_tools.h intel_mmio.c intel_pci.c intel_reg.h \ - intel_reg_map.c instdone.c instdone.h drmtest.h \ - $(am__append_1) +AM_CFLAGS = $(WARN_CFLAGS) -I$(srcdir)/.. $(DRM_CFLAGS) +libintel_tools_la_SOURCES = \ + intel_batchbuffer.h \ + intel_batchbuffer.c \ + intel_chipset.h \ + intel_gpu_tools.h \ + intel_mmio.c \ + intel_pci.c \ + intel_reg.h \ + i915_3d.h \ + i915_reg.h \ + i830_reg.h \ + intel_reg_map.c \ + intel_drm.c \ + instdone.c \ + instdone.h \ + drmtest.h \ + drmtest.c \ + debug.h \ + $(NULL) + noinst_LTLIBRARIES = libintel_tools.la all: all-am diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -26,3 +26,6 @@ endif SUBDIRS = lib man tools scripts tests benchmarks $(SHADER_DEBUGGER_SUBDIR) + +test: + ${MAKE} -C tests test diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/Makefile.in 2011-07-29 14:04:38.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -57,9 +57,11 @@ subdir = . DIST_COMMON = README $(am__configure_deps) $(srcdir)/Makefile.am \ $(srcdir)/Makefile.in $(srcdir)/config.h.in \ - $(top_srcdir)/configure build-aux/compile \ - build-aux/config.guess build-aux/config.sub build-aux/depcomp \ - build-aux/install-sh build-aux/ltmain.sh build-aux/missing + $(top_srcdir)/configure \ + $(top_srcdir)/debugger/system_routine/GNUmakefile.in \ + build-aux/compile build-aux/config.guess build-aux/config.sub \ + build-aux/depcomp build-aux/install-sh build-aux/ltmain.sh \ + build-aux/missing ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 am__aclocal_m4_deps = $(top_srcdir)/m4/libtool.m4 \ $(top_srcdir)/m4/ltoptions.m4 $(top_srcdir)/m4/ltsugar.m4 \ @@ -71,7 +73,7 @@ configure.lineno config.status.lineno mkinstalldirs = $(install_sh) -d CONFIG_HEADER = config.h -CONFIG_CLEAN_FILES = +CONFIG_CLEAN_FILES = debugger/system_routine/GNUmakefile CONFIG_CLEAN_VPATH_FILES = AM_V_GEN = $(am__v_GEN_$(V)) am__v_GEN_ = $(am__v_GEN_$(AM_DEFAULT_VERBOSITY)) @@ -171,6 +173,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -337,6 +340,8 @@ distclean-hdr: -rm -f config.h stamp-h1 +debugger/system_routine/GNUmakefile: $(top_builddir)/config.status $(top_srcdir)/debugger/system_routine/GNUmakefile.in + cd $(top_builddir) && $(SHELL) ./config.status $@ mostlyclean-libtool: -rm -f *.lo @@ -777,6 +782,9 @@ ps ps-am tags tags-recursive uninstall uninstall-am +test: + ${MAKE} -C tests test + # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/intel_gpu_dump.1 intel-gpu-tools-1.0.2+git20111120+2f56e96/man/intel_gpu_dump.1 --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/intel_gpu_dump.1 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/man/intel_gpu_dump.1 1970-01-01 00:00:00.000000000 +0000 @@ -1,22 +0,0 @@ -.\" shorthand for double quote that works everywhere. -.ds q \N'34' -.TH intel_gpu_dump 1 "intel_gpu_dump 1.0" -.SH NAME -intel_gpu_dump \- Print out debugging information on the state of the -Intel GPU. -.SH SYNOPSIS -.nf -.B intel_gpu_dump -.B intel_gpu_dump [ filename ] -.fi -.SH DESCRIPTION -.B intel_gpu_dump -is a tool to log the current state of an Intel GPU -when it is hung, for later analysis. It requires kernel 2.6.30rc1 or newer, -debugfs mounted on /sys/kernel/debug or /debug, and root privilege for -mapping the device to inspect it. -.SS Options -.TP -.B filename -Decodes just one batchbuffer or ringbuffer dump, rather than dumping all -of the GPU state. diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/intel_gpu_top.1 intel-gpu-tools-1.0.2+git20111120+2f56e96/man/intel_gpu_top.1 --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/intel_gpu_top.1 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/man/intel_gpu_top.1 2011-11-21 01:14:32.000000000 +0000 @@ -4,11 +4,34 @@ .SH NAME intel_gpu_top \- Display a top-like summary of Intel GPU usage .SH SYNOPSIS +.nf .B intel_gpu_top +.B intel_gpu_top [ parameters ] .SH DESCRIPTION .B intel_gpu_top is a tool to display usage information of an Intel GPU. It requires root privilege to map the graphics device. +.SS Options +.TP +.B -s [samples per second] +number of samples to acquire per second +.TP +.B -o [output file] +collect usage statistics to [file]. If file is "-", run non-interactively +and output statistics to stdout. +.TP +.B -e ["command to profile"] +execute a command, and leave when it is finished. Note that the entire command +with all parameters should be included as one parameter. +.TP +.B -h +show usage notes +.SH EXAMPLES +.TP +intel_gpu_top -o "cairo-trace-gvim.log" -s 100 -e "cairo-perf-trace /tmp/gvim" +will run cairo-perf-trace with /tmp/gvim trace, non-interactively, saving the +statistics into cairo-trace-gvim.log file, and collecting 100 samples per +second. .PP Note that idle units are not displayed, so an entirely idle GPU will only display the ring status and diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/man/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/man/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -3,7 +3,6 @@ intel_bios_dumper.1 \ intel_bios_reader.1 \ intel_error_decode.1 \ - intel_gpu_dump.1 \ intel_gpu_top.1 \ intel_gtt.1 \ intel_lid.1 \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/man/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/man/Makefile.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/man/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -120,6 +120,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -233,7 +234,6 @@ intel_bios_dumper.1 \ intel_bios_reader.1 \ intel_error_decode.1 \ - intel_gpu_dump.1 \ intel_gpu_top.1 \ intel_gtt.1 \ intel_lid.1 \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/scripts/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/scripts/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/scripts/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/scripts/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -1,3 +1,5 @@ noinst_SCRIPTS = \ throttle.py\ $(NULL) + +EXTRA_DIST = $(noinst_SCRIPTS) diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/scripts/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/scripts/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/scripts/Makefile.in 2011-07-29 14:04:37.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/scripts/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -96,6 +96,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -208,6 +209,7 @@ throttle.py\ $(NULL) +EXTRA_DIST = $(noinst_SCRIPTS) all: all-am .SUFFIXES: diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/check_drm_clients intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/check_drm_clients --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/check_drm_clients 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/check_drm_clients 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,30 @@ +#!/bin/sh + +if [ -d /debug/dri ] ; then + debugfs_path=/debug_dri +fi + +if [ -d /sys/kernel/debug/dri ] ; then + debugfs_path=/sys/kernel/debug/dri +fi + +i915_path=x +for dir in `ls $debugfs_path` ; do + if [ -f $debugfs_path/$dir/i915_error_state ] ; then + i915_path=$debugfs_path/$dir + break + fi +done + +if [ $i915_path = "x" ] ; then + echo i915 debugfs path not found. + exit 1 +fi + +# read everything we can +if [ `cat $i915_path/clients | wc -l` -gt "2" ] ; then + echo ERROR: other drm clients running + exit 1 +fi + +exit 0 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/debugfs_emon_crash intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/debugfs_emon_crash --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/debugfs_emon_crash 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/debugfs_emon_crash 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,34 @@ +#!/bin/sh +# +# This check if we can crash the kernel with segmentation-fault +# by reading /sys/kernel/debug/dri/0/i915_emon_status too quickly +# + +if [ -d /debug/dri ] ; then + debugfs_path=/debug_dri +fi + +if [ -d /sys/kernel/debug/dri ] ; then + debugfs_path=/sys/kernel/debug/dri +fi + +i915_path=x +for dir in `ls $debugfs_path` ; do + if [ -f $debugfs_path/$dir/i915_error_state ] ; then + i915_path=$debugfs_path/$dir + break + fi +done + +if [ $i915_path = "x" ] ; then + echo i915 debugfs path not found. + exit 1 +fi + +for z in $(seq 1 1000); do + cat $i915_path/i915_emon_status > /dev/null +done + +# If we got here, we haven't crashed + +exit 0 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/debugfs_reader intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/debugfs_reader --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/debugfs_reader 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/debugfs_reader 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,27 @@ +#!/bin/sh + +if [ -d /debug/dri ] ; then + debugfs_path=/debug_dri +fi + +if [ -d /sys/kernel/debug/dri ] ; then + debugfs_path=/sys/kernel/debug/dri +fi + +i915_path=x +for dir in `ls $debugfs_path` ; do + if [ -f $debugfs_path/$dir/i915_error_state ] ; then + i915_path=$debugfs_path/$dir + break + fi +done + +if [ $i915_path = "x" ] ; then + echo i915 debugfs path not found. + exit 1 +fi + +# read everything we can +cat $i915_path/* > /dev/null 2>&1 + +exit 0 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_bad_length.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_bad_length.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_bad_length.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_bad_length.c 2011-11-21 01:14:32.000000000 +0000 @@ -42,7 +42,14 @@ #define MI_BATCH_BUFFER_END (0xA<<23) -static uint32_t gem_create(int fd, int size) +/* + * Testcase: Minmal bo_create and batchbuffer exec + * + * Originally this caught an kernel oops due to the unchecked assumption that + * objects have size > 0. + */ + +static uint32_t gem_create(int fd, int size, int *retval) { struct drm_i915_gem_create create; int ret; @@ -50,7 +57,9 @@ create.handle = 0; create.size = (size + 4095) & -4096; ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); - assert(ret == 0); + assert(retval || ret == 0); + if (retval) + *retval = errno; return create.handle; } @@ -86,17 +95,27 @@ assert(ret == 0); } +static void create0(int fd) +{ + int retval = 0; + printf("trying to create a zero-length gem object\n"); + gem_create(fd, 0, &retval); + assert(retval == EINVAL); +} + static void exec0(int fd) { struct drm_i915_gem_execbuffer2 execbuf; - struct drm_i915_gem_exec_object2 exec[2]; - uint32_t buf[2] = { MI_BATCH_BUFFER_END }; + struct drm_i915_gem_exec_object2 exec[1]; + uint32_t buf[2] = { MI_BATCH_BUFFER_END, 0 }; /* Just try executing with a zero-length bo. * We expect the kernel to either accept the nop batch, or reject it * for the zero-length buffer, but never crash. */ - exec[0].handle = gem_create(fd, 0); + + exec[0].handle = gem_create(fd, 4096, NULL); + gem_write(fd, exec[0].handle, 0, buf, sizeof(buf)); exec[0].relocation_count = 0; exec[0].relocs_ptr = 0; exec[0].alignment = 0; @@ -105,18 +124,8 @@ exec[0].rsvd1 = 0; exec[0].rsvd2 = 0; - exec[1].handle = gem_create(fd, 4096); - gem_write(fd, exec[1].handle, 0, buf, sizeof(buf)); - exec[1].relocation_count = 0; - exec[1].relocs_ptr = 0; - exec[1].alignment = 0; - exec[1].offset = 0; - exec[1].flags = 0; - exec[1].rsvd1 = 0; - exec[1].rsvd2 = 0; - execbuf.buffers_ptr = (uintptr_t)exec; - execbuf.buffer_count = 2; + execbuf.buffer_count = 1; execbuf.batch_start_offset = 0; execbuf.batch_len = sizeof(buf); execbuf.cliprects_ptr = 0; @@ -127,10 +136,10 @@ execbuf.rsvd1 = 0; execbuf.rsvd2 = 0; + printf("trying to run an empty batchbuffer\n"); gem_exec(fd, &execbuf); gem_close(fd, exec[0].handle); - gem_close(fd, exec[1].handle); } int main(int argc, char **argv) @@ -139,7 +148,9 @@ fd = drm_open_any(); - exec0(fd); + create0(fd); + + //exec0(fd); close(fd); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_double_irq_loop.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_double_irq_loop.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_double_irq_loop.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_double_irq_loop.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,147 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter (based on gem_storedw_*.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" +#include "i830_reg.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer, *blt_bo; + +/* + * Testcase: Basic check for missed irqs on blt + * + * Execs one large and then immediately a tiny batch on the blt ring. Then waits + * on the second batch. This hopefully catches races in our irq acknowledgement. + */ + + +#define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) +#define MI_DO_COMPARE (1<<21) +static void +dummy_reloc_loop(void) +{ + int i, j; + + for (i = 0; i < 0x800; i++) { + BEGIN_BATCH(8); + OUT_BATCH(XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); + OUT_BATCH((3 << 24) | /* 32 bits */ + (0xcc << 16) | /* copy ROP */ + 4*4096); + OUT_BATCH(2048 << 16 | 0); + OUT_BATCH((4096) << 16 | (2048)); + OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(0 << 16 | 0); + OUT_BATCH(4*4096); + OUT_RELOC_FENCED(blt_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + ADVANCE_BATCH(); + intel_batchbuffer_flush(batch); + + BEGIN_BATCH(4); + OUT_BATCH(MI_FLUSH_DW | 1); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); + ADVANCE_BATCH(); + intel_batchbuffer_flush(batch); + + drm_intel_bo_map(target_buffer, 0); + // map to force completion + drm_intel_bo_unmap(target_buffer); + } +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + if (!HAS_BLT_RING(devid)) { + fprintf(stderr, "not (yet) implemented for pre-snb\n"); + return 77; + } + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + blt_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4*4096*4096, 4096); + if (!blt_bo) { + fprintf(stderr, "failed to alloc blt buffer\n"); + exit(-1); + } + + dummy_reloc_loop(); + + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_dummy_reloc_loop.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_dummy_reloc_loop.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_dummy_reloc_loop.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_dummy_reloc_loop.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,194 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter (based on gem_storedw_*.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" +#include "i830_reg.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer; + +/* + * Testcase: Basic check of ring<->cpu sync using a dummy reloc + * + * The last test (that randomly switches the ring) seems to be pretty effective + * at hitting the missed irq bug that's worked around with the HWSTAM irq write. + */ + + +#define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) +#define MI_DO_COMPARE (1<<21) +static void +dummy_reloc_loop(int ring) +{ + int i; + + for (i = 0; i < 0x100000; i++) { + if (ring == I915_EXEC_RENDER) { + BEGIN_BATCH(4); + OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); + OUT_BATCH(0xffffffff); /* compare dword */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(4); + OUT_BATCH(MI_FLUSH_DW | 1); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); + ADVANCE_BATCH(); + } + intel_batchbuffer_flush_on_ring(batch, ring); + + drm_intel_bo_map(target_buffer, 0); + // map to force completion + drm_intel_bo_unmap(target_buffer); + } +} + +static void +dummy_reloc_loop_random_ring(void) +{ + int i; + + srandom(0xdeadbeef); + + for (i = 0; i < 0x100000; i++) { + int ring = random() % 3 + 1; + + if (ring == I915_EXEC_RENDER) { + BEGIN_BATCH(4); + OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); + OUT_BATCH(0xffffffff); /* compare dword */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(4); + OUT_BATCH(MI_FLUSH_DW | 1); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); + ADVANCE_BATCH(); + } + intel_batchbuffer_flush_on_ring(batch, ring); + + drm_intel_bo_map(target_buffer, 0); + // map to force waiting on rendering + drm_intel_bo_unmap(target_buffer); + } +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + if (!HAS_BLT_RING(devid)) { + fprintf(stderr, "not (yet) implemented for pre-snb\n"); + return 77; + } + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + fprintf(stderr, "running dummy loop on render\n"); + dummy_reloc_loop(I915_EXEC_RENDER); + fprintf(stderr, "dummy loop run on render completed\n"); + + if (!HAS_BSD_RING(devid)) + goto skip; + + sleep(2); + fprintf(stderr, "running dummy loop on bsd\n"); + dummy_reloc_loop(I915_EXEC_BSD); + fprintf(stderr, "dummy loop run on bsd completed\n"); + + if (!HAS_BLT_RING(devid)) + goto skip; + + sleep(2); + fprintf(stderr, "running dummy loop on blt\n"); + dummy_reloc_loop(I915_EXEC_BLT); + fprintf(stderr, "dummy loop run on blt completed\n"); + + sleep(2); + fprintf(stderr, "running dummy loop on random rings\n"); + dummy_reloc_loop_random_ring(); + fprintf(stderr, "dummy loop run on random rings completed\n"); + +skip: + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_fence_thrash.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_fence_thrash.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_fence_thrash.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_fence_thrash.c 2011-11-21 01:14:32.000000000 +0000 @@ -44,7 +44,7 @@ #include "i915_drm.h" #include "drmtest.h" -#define OBJECT_SIZE (1024*1024) /* restricted to 1MiB alignment on i915 fences */ +#define OBJECT_SIZE (128*1024) /* restricted to 1MiB alignment on i915 fences */ /* Before introduction of the LRU list for fences, allocation of a fence for a page * fault would use the first inactive fence (i.e. in preference one with no outstanding @@ -102,17 +102,15 @@ bo_copy (void *_arg) { int fd = *(int *)_arg; - int offset = 0, n; + int n; char *a, *b; a = bo_create (fd); b = bo_create (fd); - for (n = 0; n < OBJECT_SIZE; n++) { - memcpy (a + offset, b + offset, 1); + for (n = 0; n < 1000; n++) { + memcpy (a, b, OBJECT_SIZE); pthread_yield (); - offset += 4097; - offset %= OBJECT_SIZE; } return NULL; diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_hang.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_hang.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_hang.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_hang.c 2011-11-21 01:14:32.000000000 +0000 @@ -52,7 +52,7 @@ int cmd; cmd = bad_pipe ? MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW : - MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW; + MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW; BEGIN_BATCH(6); /* The documentation says that the LOAD_SCAN_LINES command diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_hangcheck_forcewake.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_hangcheck_forcewake.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_hangcheck_forcewake.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_hangcheck_forcewake.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,119 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +/* + * Testcase: Provoke the hangcheck timer on an otherwise idle system + * + * This tries to hit forcewake locking bugs when the hangcheck runs. Somehow we + * often luck out and the hangcheck runs while someone else is already holding + * the dev->struct_mutex. + * + * It's imperative that nothing else runs while this test runs, i.e. kill your X + * session, please. + */ + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; + +uint32_t blob[2048*2048]; + +#define MAX_BLT_SIZE 128 +int main(int argc, char **argv) +{ + drm_intel_bo *bo = NULL; + uint32_t tiling_mode = I915_TILING_X; + unsigned long pitch, act_size; + int fd, i, devid; + + memset(blob, 'A', sizeof(blob)); + + fd = drm_open_any(); + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + devid = intel_get_drm_devid(fd); + batch = intel_batchbuffer_alloc(bufmgr, devid); + + act_size = 2048; + printf("filling ring\n"); + drm_intel_bo_unreference(bo); + bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled bo", act_size, act_size, + 4, &tiling_mode, &pitch, 0); + + drm_intel_bo_subdata(bo, 0, act_size*act_size*4, blob); + + if (IS_965(devid)) + pitch /= 4; + + for (i = 0; i < 10000; i++) { + BEGIN_BATCH(8); + OUT_BATCH(XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB | + XY_SRC_COPY_BLT_SRC_TILED | + XY_SRC_COPY_BLT_DST_TILED); + OUT_BATCH((3 << 24) | /* 32 bits */ + (0xcc << 16) | /* copy ROP */ + pitch); + OUT_BATCH(0 << 16 | 1024); + OUT_BATCH((2048) << 16 | (2048)); + OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(0 << 16 | 0); + OUT_BATCH(pitch); + OUT_RELOC_FENCED(bo, I915_GEM_DOMAIN_RENDER, 0, 0); + ADVANCE_BATCH(); + } + + printf("waiting\n"); + sleep(10); + + printf("done waiting, check dmesg\n"); + drm_intel_bo_unreference(bo); + + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_largeobject.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_largeobject.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_largeobject.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_largeobject.c 2011-11-21 01:14:32.000000000 +0000 @@ -43,19 +43,38 @@ unsigned char data[OBJ_SIZE]; +static uint64_t +gem_aperture_size(int fd) +{ + struct drm_i915_gem_get_aperture aperture; + + aperture.aper_size = 512*1024*1024; + (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); + return aperture.aper_size; +} + static void test_large_object(int fd) { struct drm_i915_gem_create create; struct drm_i915_gem_pwrite pwrite; struct drm_i915_gem_pin pin; + uint32_t obj_size; int ret; memset(&create, 0, sizeof(create)); memset(&pwrite, 0, sizeof(pwrite)); memset(&pin, 0, sizeof(pin)); - create.size = OBJ_SIZE; + if (gem_aperture_size(fd)*3/4 < OBJ_SIZE/2) + obj_size = OBJ_SIZE / 4; + else if (gem_aperture_size(fd)*3/4 < OBJ_SIZE) + obj_size = OBJ_SIZE / 2; + else + obj_size = OBJ_SIZE; + create.size = obj_size; + printf("obj size %i\n", obj_size); + ret = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); if (ret) { fprintf(stderr, "object creation failed: %s\n", @@ -72,7 +91,7 @@ } pwrite.handle = create.handle; - pwrite.size = OBJ_SIZE; + pwrite.size = obj_size; pwrite.data_ptr = (uint64_t)data; ret = ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_linear_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_linear_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_linear_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_linear_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -248,6 +248,13 @@ count = atoi(argv[1]); if (count == 0) count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; + + if (count > intel_get_total_ram_mb() * 9 / 10) { + count = intel_get_total_ram_mb() * 9 / 10; + fprintf(stderr, "not enough RAM to run test, reducing buffer count\n"); + return 77; + } + printf("Using %d 1MiB buffers\n", count); handle = malloc(sizeof(uint32_t)*count*2); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_mmap_gtt.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_mmap_gtt.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_mmap_gtt.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_mmap_gtt.c 2011-11-21 01:14:32.000000000 +0000 @@ -97,18 +97,28 @@ assert(ret == 0); } +static void set_domain(int fd, uint32_t handle) +{ + struct drm_i915_gem_set_domain set_domain; + int ret; + + set_domain.handle = handle; + set_domain.read_domains = I915_GEM_DOMAIN_GTT; + set_domain.write_domain = I915_GEM_DOMAIN_GTT; + + ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); + assert(ret == 0); +} + static void * -create_pointer(int fd) +mmap_bo(int fd, uint32_t handle) { struct drm_i915_gem_mmap_gtt arg; - uint32_t handle; void *ptr; int ret; memset(&arg, 0, sizeof(arg)); - handle = gem_create(fd, OBJECT_SIZE); - arg.handle = handle; ret = ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &arg); assert(ret == 0); @@ -117,6 +127,19 @@ MAP_SHARED, fd, arg.offset); assert(ptr != MAP_FAILED); + return ptr; +} + +static void * +create_pointer(int fd) +{ + uint32_t handle; + void *ptr; + + handle = gem_create(fd, OBJECT_SIZE); + + ptr = mmap_bo(fd, handle); + gem_close(fd, handle); return ptr; @@ -155,6 +178,29 @@ } static void +test_write_gtt(int fd) +{ + uint32_t dst; + char *dst_gtt; + void *src; + + dst = gem_create(fd, OBJECT_SIZE); + + /* prefault object into gtt */ + dst_gtt = mmap_bo(fd, dst); + set_domain(fd, dst); + memset(dst_gtt, 0, OBJECT_SIZE); + munmap(dst_gtt, OBJECT_SIZE); + + src = create_pointer(fd); + + gem_write(fd, dst, 0, src, OBJECT_SIZE); + + gem_close(fd, dst); + munmap(src, OBJECT_SIZE); +} + +static void test_read(int fd) { void *dst; @@ -179,6 +225,7 @@ test_copy(fd); test_read(fd); test_write(fd); + test_write_gtt(fd); close(fd); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_pipe_control_store_loop.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_pipe_control_store_loop.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_pipe_control_store_loop.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_pipe_control_store_loop.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,182 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter (based on gem_storedw_*.c) + * + */ + +/* + * Testcase: (TLB-)Coherency of pipe_control QW writes + * + * Writes a counter-value into an always newly allocated target bo (by disabling + * buffer reuse). Decently trashes on tlb inconsistencies, too. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +uint32_t devid; + +#define GFX_OP_PIPE_CONTROL ((0x3<<29)|(0x3<<27)|(0x2<<24)|2) +#define PIPE_CONTROL_WRITE_IMMEDIATE (1<<14) +#define PIPE_CONTROL_WRITE_TIMESTAMP (3<<14) +#define PIPE_CONTROL_DEPTH_STALL (1<<13) +#define PIPE_CONTROL_WC_FLUSH (1<<12) +#define PIPE_CONTROL_IS_FLUSH (1<<11) /* MBZ on Ironlake */ +#define PIPE_CONTROL_TC_FLUSH (1<<10) /* GM45+ only */ +#define PIPE_CONTROL_STALL_AT_SCOREBOARD (1<<1) +#define PIPE_CONTROL_CS_STALL (1<<20) +#define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */ + +/* Like the store dword test, but we create new command buffers each time */ +static void +store_pipe_control_loop(void) +{ + int i, val = 0; + uint32_t *buf; + drm_intel_bo *target_bo; + + for (i = 0; i < 0x10000; i++) { + /* we want to check tlb consistency of the pipe_control target, + * so get a new buffer every time around */ + target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_bo) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + /* gem_storedw_batches_loop.c is a bit overenthusiastic with + * creating new batchbuffers - with buffer reuse disabled, the + * support code will do that for us. */ + if (intel_gen(devid) >= 6) { + /* work-around hw issue, see intel_emit_post_sync_nonzero_flush + * in mesa sources. */ + BEGIN_BATCH(4); + OUT_BATCH(GFX_OP_PIPE_CONTROL); + OUT_BATCH(PIPE_CONTROL_CS_STALL | + PIPE_CONTROL_STALL_AT_SCOREBOARD); + OUT_BATCH(0); /* address */ + OUT_BATCH(0); /* write data */ + ADVANCE_BATCH(); + + BEGIN_BATCH(4); + OUT_BATCH(GFX_OP_PIPE_CONTROL); + OUT_BATCH(PIPE_CONTROL_WRITE_IMMEDIATE); + OUT_RELOC(target_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + PIPE_CONTROL_GLOBAL_GTT); + OUT_BATCH(val); /* write data */ + ADVANCE_BATCH(); + } else if (intel_gen(devid) >= 4) { + BEGIN_BATCH(4); + OUT_BATCH(GFX_OP_PIPE_CONTROL | PIPE_CONTROL_WC_FLUSH | + PIPE_CONTROL_TC_FLUSH | + PIPE_CONTROL_WRITE_IMMEDIATE | 2); + OUT_RELOC(target_bo, + I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, + PIPE_CONTROL_GLOBAL_GTT); + OUT_BATCH(val); + OUT_BATCH(0xdeadbeef); + ADVANCE_BATCH(); + } + + intel_batchbuffer_flush_on_ring(batch, 0); + + drm_intel_bo_map(target_bo, 1); + + buf = target_bo->virtual; + if (buf[0] != val) + fprintf(stderr, + "value mismatch: cur 0x%08x, stored 0x%08x\n", + buf[0], val); + buf[0] = 0; /* let batch write it again */ + drm_intel_bo_unmap(target_bo); + + drm_intel_bo_unreference(target_bo); + + val++; + } + + printf("completed %d writes successfully\n", i); +} + +int main(int argc, char **argv) +{ + int fd; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + + if (IS_GEN2(devid) || IS_GEN3(devid)) { + fprintf(stderr, "no pipe_control on gen2/3\n"); + return 77; + } + if (devid == PCI_CHIP_I965_G) { + fprintf(stderr, "pipe_control totally broken on i965\n"); + return 77; + } + /* IMPORTANT: No call to + * drm_intel_bufmgr_gem_enable_reuse(bufmgr); + * here because we wan't to have fresh buffers (to trash the tlb) + * every time! */ + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + store_pipe_control_loop(); + + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_ring_sync_loop.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_ring_sync_loop.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_ring_sync_loop.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_ring_sync_loop.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,139 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter (based on gem_storedw_*.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" +#include "i830_reg.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer; + +/* + * Testcase: Basic check of ring<->ring sync using a dummy reloc + * + * Extremely efficient at catching missed irqs with semaphores=0 ... + */ + +#define MI_COND_BATCH_BUFFER_END (0x36<<23 | 1) +#define MI_DO_COMPARE (1<<21) + +static void +store_dword_loop(int ring) +{ + int i; + + srandom(0xdeadbeef); + + for (i = 0; i < 0x100000; i++) { + int ring = random() % 3 + 1; + + if (ring == I915_EXEC_RENDER) { + BEGIN_BATCH(4); + OUT_BATCH(MI_COND_BATCH_BUFFER_END | MI_DO_COMPARE); + OUT_BATCH(0xffffffff); /* compare dword */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + } else { + BEGIN_BATCH(4); + OUT_BATCH(MI_FLUSH_DW | 1); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(MI_NOOP | (1<<22) | (0xf)); + ADVANCE_BATCH(); + } + intel_batchbuffer_flush_on_ring(batch, ring); + } + + drm_intel_bo_map(target_buffer, 0); + // map to force waiting on rendering + drm_intel_bo_unmap(target_buffer); +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + if (!HAS_BLT_RING(devid)) { + fprintf(stderr, "inter ring check needs gen6+\n"); + return 77; + } + + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + store_dword_loop(I915_EXEC_RENDER); + + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_batches_loop.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_batches_loop.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_batches_loop.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_batches_loop.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,166 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Jesse Barnes (based on gem_bad_blit.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +static drm_intel_bo *target_bo; + +/* Like the store dword test, but we create new command buffers each time */ +static void +store_dword_loop(void) +{ + int cmd, i, val = 0, ret; + uint32_t *buf; + drm_intel_bo *cmd_bo; + + cmd = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; + + for (i = 0; i < 0x80000; i++) { + cmd_bo = drm_intel_bo_alloc(bufmgr, "cmd bo", 4096, 4096); + if (!cmd_bo) { + fprintf(stderr, "failed to alloc cmd bo\n"); + exit(-1); + } + + drm_intel_bo_map(cmd_bo, 1); + buf = cmd_bo->virtual; + + buf[0] = cmd; + buf[1] = 0; + buf[2] = target_bo->offset; + buf[3] = 0x42000000 + val; + + ret = drm_intel_bo_references(cmd_bo, target_bo); + if (ret) { + fprintf(stderr, "failed to link cmd & target bos\n"); + exit(-1); + } + + ret = drm_intel_bo_emit_reloc(cmd_bo, 8, target_bo, 0, + I915_GEM_DOMAIN_INSTRUCTION, + I915_GEM_DOMAIN_INSTRUCTION); + if (ret) { + fprintf(stderr, "failed to emit reloc\n"); + exit(-1); + } + + buf[4] = MI_BATCH_BUFFER_END; + buf[5] = MI_BATCH_BUFFER_END; + + drm_intel_bo_unmap(cmd_bo); + + ret = drm_intel_bo_references(cmd_bo, target_bo); + if (ret != 1) { + fprintf(stderr, "bad bo reference count: %d\n", ret); + exit(-1); + } + + ret = drm_intel_bo_exec(cmd_bo, 6 * 4, NULL, 0, 0); + if (ret) { + fprintf(stderr, "bo exec failed: %d\n", ret); + exit(-1); + } + + drm_intel_bo_wait_rendering(cmd_bo); + + drm_intel_bo_map(target_bo, 1); + + buf = target_bo->virtual; + if (buf[0] != (0x42000000 | val)) + fprintf(stderr, + "value mismatch: cur 0x%08x, stored 0x%08x\n", + buf[0], 0x42000000 | val); + buf[0] = 0; /* let batch write it again */ + drm_intel_bo_unmap(target_bo); + + drm_intel_bo_unreference(cmd_bo); + + val++; + } + + printf("completed %d writes successfully\n", i); +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + + if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) { + + fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and" + "needs snoopable mem on pre-gen6\n"); + return 77; + } + + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } +// drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + target_bo = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_bo) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + store_dword_loop(); + + drm_intel_bo_unreference(target_bo); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_blt.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_blt.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_blt.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_blt.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,144 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Jesse Barnes (based on gem_bad_blit.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer; + +/* + * Testcase: Basic blitter MI check using MI_STORE_DATA_IMM + */ + +static void +store_dword_loop(void) +{ + int cmd, i, val = 0; + uint32_t *buf; + + cmd = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; + + for (i = 0; i < 0x100000; i++) { + BEGIN_BATCH(4); + OUT_BATCH(cmd); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(val); + ADVANCE_BATCH(); + + intel_batchbuffer_flush_on_ring(batch, I915_EXEC_BLT); + + drm_intel_bo_map(target_buffer, 0); + + buf = target_buffer->virtual; + if (buf[0] != val) + fprintf(stderr, + "value mismatch: cur 0x%08x, stored 0x%08x\n", + buf[0], val); + + drm_intel_bo_unmap(target_buffer); + + val++; + } + + drm_intel_bo_map(target_buffer, 0); + buf = target_buffer->virtual; + + printf("completed %d writes successfully, current value: 0x%08x\n", i, + buf[0]); + drm_intel_bo_unmap(target_buffer); +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + + if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) { + + fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and " + "needs snoopable mem on pre-gen6\n"); + return 77; + } + + /* This supposedly only works with ppgtt */ + return 77; + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + store_dword_loop(); + + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_bsd.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_bsd.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_bsd.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_bsd.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,144 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Jesse Barnes (based on gem_bad_blit.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer; + +/* + * Testcase: Basic bsd MI check using MI_STORE_DATA_IMM + */ + +static void +store_dword_loop(void) +{ + int cmd, i, val = 0; + uint32_t *buf; + + cmd = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; + + for (i = 0; i < 0x100000; i++) { + BEGIN_BATCH(4); + OUT_BATCH(cmd); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(val); + ADVANCE_BATCH(); + + intel_batchbuffer_flush_on_ring(batch, I915_EXEC_BSD); + + drm_intel_bo_map(target_buffer, 0); + + buf = target_buffer->virtual; + if (buf[0] != val) + fprintf(stderr, + "value mismatch: cur 0x%08x, stored 0x%08x\n", + buf[0], val); + + drm_intel_bo_unmap(target_buffer); + + val++; + } + + drm_intel_bo_map(target_buffer, 0); + buf = target_buffer->virtual; + + printf("completed %d writes successfully, current value: 0x%08x\n", i, + buf[0]); + drm_intel_bo_unmap(target_buffer); +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + + if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) { + + fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and " + "needs snoopable mem on pre-gen6\n"); + return 77; + } + + /* This supposedly only works with ppgtt */ + return 77; + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + store_dword_loop(); + + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_render.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_render.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_storedw_loop_render.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_storedw_loop_render.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,141 @@ +/* + * Copyright © 2009 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Eric Anholt + * Jesse Barnes (based on gem_bad_blit.c) + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *target_buffer; + +/* + * Testcase: Basic render MI check using MI_STORE_DATA_IMM + */ + +static void +store_dword_loop(void) +{ + int cmd, i, val = 0; + uint32_t *buf; + + cmd = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; + + for (i = 0; i < 0x100000; i++) { + BEGIN_BATCH(4); + OUT_BATCH(cmd); + OUT_BATCH(0); /* reserved */ + OUT_RELOC(target_buffer, I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH(val); + ADVANCE_BATCH(); + + intel_batchbuffer_flush_on_ring(batch, 0); + + drm_intel_bo_map(target_buffer, 0); + + buf = target_buffer->virtual; + if (buf[0] != val) + fprintf(stderr, + "value mismatch: cur 0x%08x, stored 0x%08x\n", + buf[0], val); + + drm_intel_bo_unmap(target_buffer); + + val++; + } + + drm_intel_bo_map(target_buffer, 0); + buf = target_buffer->virtual; + + printf("completed %d writes successfully, current value: 0x%08x\n", i, + buf[0]); + drm_intel_bo_unmap(target_buffer); +} + +int main(int argc, char **argv) +{ + int fd; + int devid; + + if (argc != 1) { + fprintf(stderr, "usage: %s\n", argv[0]); + exit(-1); + } + + fd = drm_open_any(); + devid = intel_get_drm_devid(fd); + + if (IS_GEN2(devid) || IS_GEN3(devid) || IS_GEN4(devid) || IS_GEN5(devid)) { + + fprintf(stderr, "MI_STORE_DATA can only use GTT address on gen4+/g33 and " + "needs snoopable mem on pre-gen6\n"); + return 77; + } + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + if (!batch) { + fprintf(stderr, "failed to create batch buffer\n"); + exit(-1); + } + + target_buffer = drm_intel_bo_alloc(bufmgr, "target bo", 4096, 4096); + if (!target_buffer) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + store_dword_loop(); + + drm_intel_bo_unreference(target_buffer); + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -144,6 +144,13 @@ count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; count += (count & 1) == 0; } + + if (count > intel_get_total_ram_mb() * 9 / 10) { + count = intel_get_total_ram_mb() * 9 / 10; + fprintf(stderr, "not enough RAM to run test, reducing buffer count\n"); + return 77; + } + printf("Using %d 1MiB buffers\n", count); bo = malloc(sizeof(drm_intel_bo *)*count); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_fence_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_fence_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_fence_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_fence_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -148,6 +148,11 @@ fd = drm_open_any(); count = 3 * gem_aperture_size(fd) / (1024*1024) / 2; + if (count > intel_get_total_ram_mb() * 9 / 10) { + count = intel_get_total_ram_mb() * 9 / 10; + fprintf(stderr, "not enough RAM to run test, reducing buffer count\n"); + return 77; + } count |= 1; printf("Using %d 1MiB buffers\n", count); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_pread.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_pread.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_tiled_pread.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_tiled_pread.c 2011-11-21 01:14:32.000000000 +0000 @@ -49,6 +49,7 @@ #include "drm.h" #include "i915_drm.h" #include "drmtest.h" +#include "intel_gpu_tools.h" #define WIDTH 512 #define HEIGHT 512 @@ -56,6 +57,10 @@ #define PAGE_SIZE 4096 +static int tile_width; +static int tile_height; +static int tile_size; + static uint32_t gem_create(int fd, int size) { @@ -160,18 +165,18 @@ static uint32_t calculate_expected(int offset) { - int tile_off = offset & (PAGE_SIZE - 1); - int tile_base = offset & -PAGE_SIZE; - int tile_index = tile_base / PAGE_SIZE; - int tiles_per_row = 4*WIDTH / 512; /* X tiled = 512b rows */ + int tile_off = offset & (tile_size - 1); + int tile_base = offset & -tile_size; + int tile_index = tile_base / tile_size; + int tiles_per_row = 4*WIDTH / tile_width; /* base x,y values from the tile (page) index. */ - int base_y = tile_index / tiles_per_row * 8; - int base_x = tile_index % tiles_per_row * 128; + int base_y = tile_index / tiles_per_row * tile_height; + int base_x = tile_index % tiles_per_row * (tile_width/4); /* x, y offsets within the tile */ - int tile_y = tile_off / 512; - int tile_x = (tile_off % 512) / 4; + int tile_y = tile_off / tile_width; + int tile_x = (tile_off % tile_width) / 4; /* printf("%3d, %3d, %3d,%3d\n", base_x, base_y, tile_x, tile_y); */ return (base_y + tile_y) * WIDTH + base_x + tile_x; @@ -184,12 +189,25 @@ int i, iter = 100; uint32_t tiling, swizzle; uint32_t handle; + uint32_t devid; fd = drm_open_any(); handle = create_bo(fd); gem_get_tiling(fd, handle, &tiling, &swizzle); + devid = intel_get_drm_devid(fd); + + if (IS_GEN2(devid)) { + tile_height = 16; + tile_width = 128; + tile_size = 2048; + } else { + tile_height = 8; + tile_width = 512; + tile_size = PAGE_SIZE; + } + /* Read a bunch of random subsets of the data and check that they come * out right. */ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_unref_active_buffers.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_unref_active_buffers.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_unref_active_buffers.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_unref_active_buffers.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,107 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter + * + */ + +/* + * Testcase: Unreferencing of active buffers + * + * Execs buffers and immediately unreferences them, hence the kernel active list + * will be the last one to hold a reference on them. Usually libdrm bo caching + * prevents that by keeping another reference. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "drm.h" +#include "i915_drm.h" +#include "drmtest.h" +#include "intel_bufmgr.h" +#include "intel_batchbuffer.h" +#include "intel_gpu_tools.h" + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; +static drm_intel_bo *load_bo; + +int main(int argc, char **argv) +{ + int fd, i; + + fd = drm_open_any(); + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + if (!bufmgr) { + fprintf(stderr, "failed to init libdrm\n"); + exit(-1); + } + /* don't enable buffer reuse!! */ + //drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); + assert(batch); + + /* put some load onto the gpu to keep the light buffers active for long + * enough */ + for (i = 0; i < 1000; i++) { + load_bo = drm_intel_bo_alloc(bufmgr, "target bo", 1024*4096, 4096); + if (!load_bo) { + fprintf(stderr, "failed to alloc target buffer\n"); + exit(-1); + } + + BEGIN_BATCH(8); + OUT_BATCH(XY_SRC_COPY_BLT_CMD | + XY_SRC_COPY_BLT_WRITE_ALPHA | + XY_SRC_COPY_BLT_WRITE_RGB); + OUT_BATCH((3 << 24) | /* 32 bits */ + (0xcc << 16) | /* copy ROP */ + 4096); + OUT_BATCH(0); /* dst x1,y1 */ + OUT_BATCH((1024 << 16) | 512); + OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); + OUT_BATCH((0 << 16) | 512); /* src x1, y1 */ + OUT_BATCH(4096); + OUT_RELOC(load_bo, I915_GEM_DOMAIN_RENDER, 0, 0); + ADVANCE_BATCH(); + + intel_batchbuffer_flush(batch); + + drm_intel_bo_disable_reuse(load_bo); + drm_intel_bo_unreference(load_bo); + } + + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); + + return 0; +} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_vmap_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_vmap_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gem_vmap_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gem_vmap_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -53,6 +53,11 @@ #if !defined(I915_PARAM_HAS_VMAP) #warning No vmap support in drm, skipping +int main(int argc, char **argv) +{ + fprintf(stderr, "No vmap support in drm.\n"); + return 77; +} #else #define WIDTH 512 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_mixed_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_mixed_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_mixed_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_mixed_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -546,6 +546,11 @@ fd = drm_open_any(); + if (!IS_GEN3(intel_get_drm_devid(fd))) { + printf("gen3-only test, doing nothing\n"); + return 77; + } + count = 0; if (argc > 1) count = atoi(argv[1]); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_linear_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_linear_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_linear_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_linear_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -394,6 +394,11 @@ fd = drm_open_any(); + if (!IS_GEN3(intel_get_drm_devid(fd))) { + printf("gen3-only test, doing nothing\n"); + return 77; + } + count = 0; if (argc > 1) count = atoi(argv[1]); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_mixed_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_mixed_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_mixed_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_mixed_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -435,6 +435,11 @@ fd = drm_open_any(); + if (!IS_GEN3(intel_get_drm_devid(fd))) { + printf("gen3-only test, doing nothing\n"); + return 77; + } + count = 0; if (argc > 1) count = atoi(argv[1]); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_tiledx_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_tiledx_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_tiledx_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_tiledx_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -422,6 +422,11 @@ fd = drm_open_any(); + if (!IS_GEN3(intel_get_drm_devid(fd))) { + printf("gen3-only test, doing nothing\n"); + return 77; + } + count = 0; if (argc > 1) count = atoi(argv[1]); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_tiledy_blits.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_tiledy_blits.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/gen3_render_tiledy_blits.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/gen3_render_tiledy_blits.c 2011-11-21 01:14:32.000000000 +0000 @@ -422,6 +422,11 @@ fd = drm_open_any(); + if (!IS_GEN3(intel_get_drm_devid(fd))) { + printf("gen3-only test, doing nothing\n"); + return 77; + } + count = 0; if (argc > 1) count = atoi(argv[1]); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/getstats.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/getstats.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/getstats.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/getstats.c 2011-11-21 01:14:32.000000000 +0000 @@ -45,8 +45,6 @@ ret = ioctl(fd, DRM_IOCTL_GET_STATS, &stats); assert(ret == 0); - assert(stats.count >= 0); - close(fd); return 0; } diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -1,6 +1,7 @@ -if HAVE_DRM noinst_PROGRAMS = \ gem_stress \ + $(TESTS_progs) \ + $(HANG) \ $(NULL) gem_stress_SOURCES = \ @@ -12,7 +13,8 @@ gem_stress_gen6.c \ $(NULL) -TESTS = getversion \ +TESTS_progs = \ + getversion \ getclient \ getstats \ gem_basic \ @@ -31,8 +33,6 @@ gem_tiled_blits \ gem_tiled_fence_blits \ gem_largeobject \ - gem_bad_address \ - gem_bad_blit \ gem_bad_length \ gem_fence_thrash \ gem_fenced_exec_thrash \ @@ -42,14 +42,46 @@ gen3_render_tiledy_blits \ gen3_render_mixed_blits \ gen3_mixed_blits \ + gem_storedw_loop_render \ + gem_storedw_loop_blt \ + gem_storedw_loop_bsd \ + gem_storedw_batches_loop \ + gem_dummy_reloc_loop \ + gem_double_irq_loop \ + gem_ring_sync_loop \ + gem_pipe_control_store_loop \ + gem_hangcheck_forcewake \ + gem_unref_active_buffers \ + $(NULL) + +TESTS_scripts = \ + debugfs_reader \ + debugfs_emon_crash \ + sysfs_edid_timing \ + $(NULL) + +kernel_tests = \ + $(TESTS_progs) \ + $(TESTS_scripts) \ $(NULL) +TESTS = \ + $(NULL) + +test: + whoami | grep root || ( echo ERROR: not running as root; exit 1 ) + ./check_drm_clients + make TESTS="${kernel_tests}" check + HANG = \ gem_bad_batch \ gem_hang \ + gem_bad_blit \ + gem_bad_address \ $(NULL) -EXTRA_PROGRAMS = $(TESTS) $(HANG) +EXTRA_PROGRAMS = $(TESTS_progs) $(HANG) +EXTRA_DIST = $(TESTS_scripts) check_drm_clients CLEANFILES = $(EXTRA_PROGRAMS) AM_CFLAGS = $(DRM_CFLAGS) $(WARN_CFLAGS) \ @@ -60,7 +92,7 @@ if HAVE_CAIRO if HAVE_LIBUDEV if HAVE_GLIB -TESTS += testdisplay +TESTS_progs += testdisplay LDADD += $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(GLIB_LIBS) AM_CFLAGS += $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS) endif @@ -69,4 +101,3 @@ gem_fence_thrash_CFLAGS = $(AM_CFLAGS) -pthread gem_fence_thrash_LDADD = $(LDADD) -lpthread -endif diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/Makefile.in 2011-07-29 14:04:38.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -34,34 +34,12 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ -@HAVE_DRM_TRUE@noinst_PROGRAMS = gem_stress$(EXEEXT) -@HAVE_DRM_TRUE@TESTS = getversion$(EXEEXT) getclient$(EXEEXT) \ -@HAVE_DRM_TRUE@ getstats$(EXEEXT) gem_basic$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_exec_nop$(EXEEXT) gem_exec_blt$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_flink$(EXEEXT) gem_readwrite$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_ringfill$(EXEEXT) gem_mmap$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_mmap_gtt$(EXEEXT) gem_pwrite$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_pread_after_blit$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_pread$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_linear_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_vmap_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_fence_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_largeobject$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_bad_address$(EXEEXT) gem_bad_blit$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_bad_length$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_fence_thrash$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_fenced_exec_thrash$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_gtt_speed$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_linear_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_tiledx_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_tiledy_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_mixed_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_mixed_blits$(EXEEXT) $(am__EXEEXT_1) -@HAVE_DRM_TRUE@EXTRA_PROGRAMS = $(am__EXEEXT_2) $(am__EXEEXT_3) -@HAVE_CAIRO_TRUE@@HAVE_DRM_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_1 = testdisplay -@HAVE_CAIRO_TRUE@@HAVE_DRM_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_2 = $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(GLIB_LIBS) -@HAVE_CAIRO_TRUE@@HAVE_DRM_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_3 = $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS) +noinst_PROGRAMS = gem_stress$(EXEEXT) $(am__EXEEXT_2) $(am__EXEEXT_3) +TESTS = +EXTRA_PROGRAMS = $(am__EXEEXT_2) $(am__EXEEXT_3) +@HAVE_CAIRO_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_1 = testdisplay +@HAVE_CAIRO_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_2 = $(CAIRO_LIBS) $(LIBUDEV_LIBS) $(GLIB_LIBS) +@HAVE_CAIRO_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__append_3 = $(CAIRO_CFLAGS) $(LIBUDEV_CFLAGS) $(GLIB_CFLAGS) subdir = tests DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -75,88 +53,99 @@ CONFIG_HEADER = $(top_builddir)/config.h CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = -@HAVE_CAIRO_TRUE@@HAVE_DRM_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__EXEEXT_1 = testdisplay$(EXEEXT) -@HAVE_DRM_TRUE@am__EXEEXT_2 = getversion$(EXEEXT) getclient$(EXEEXT) \ -@HAVE_DRM_TRUE@ getstats$(EXEEXT) gem_basic$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_exec_nop$(EXEEXT) gem_exec_blt$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_flink$(EXEEXT) gem_readwrite$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_ringfill$(EXEEXT) gem_mmap$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_mmap_gtt$(EXEEXT) gem_pwrite$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_pread_after_blit$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_pread$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_linear_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_vmap_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_tiled_fence_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_largeobject$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_bad_address$(EXEEXT) gem_bad_blit$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_bad_length$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_fence_thrash$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_fenced_exec_thrash$(EXEEXT) \ -@HAVE_DRM_TRUE@ gem_gtt_speed$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_linear_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_tiledx_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_tiledy_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_render_mixed_blits$(EXEEXT) \ -@HAVE_DRM_TRUE@ gen3_mixed_blits$(EXEEXT) $(am__EXEEXT_1) -@HAVE_DRM_TRUE@am__EXEEXT_3 = gem_bad_batch$(EXEEXT) gem_hang$(EXEEXT) +@HAVE_CAIRO_TRUE@@HAVE_GLIB_TRUE@@HAVE_LIBUDEV_TRUE@am__EXEEXT_1 = testdisplay$(EXEEXT) +am__EXEEXT_2 = getversion$(EXEEXT) getclient$(EXEEXT) \ + getstats$(EXEEXT) gem_basic$(EXEEXT) gem_exec_nop$(EXEEXT) \ + gem_exec_blt$(EXEEXT) gem_flink$(EXEEXT) \ + gem_readwrite$(EXEEXT) gem_ringfill$(EXEEXT) gem_mmap$(EXEEXT) \ + gem_mmap_gtt$(EXEEXT) gem_pwrite$(EXEEXT) \ + gem_pread_after_blit$(EXEEXT) gem_tiled_pread$(EXEEXT) \ + gem_linear_blits$(EXEEXT) gem_vmap_blits$(EXEEXT) \ + gem_tiled_blits$(EXEEXT) gem_tiled_fence_blits$(EXEEXT) \ + gem_largeobject$(EXEEXT) gem_bad_length$(EXEEXT) \ + gem_fence_thrash$(EXEEXT) gem_fenced_exec_thrash$(EXEEXT) \ + gem_gtt_speed$(EXEEXT) gen3_render_linear_blits$(EXEEXT) \ + gen3_render_tiledx_blits$(EXEEXT) \ + gen3_render_tiledy_blits$(EXEEXT) \ + gen3_render_mixed_blits$(EXEEXT) gen3_mixed_blits$(EXEEXT) \ + gem_storedw_loop_render$(EXEEXT) gem_storedw_loop_blt$(EXEEXT) \ + gem_storedw_loop_bsd$(EXEEXT) \ + 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$(am__DEPENDENCIES_2) gen3_render_linear_blits_SOURCES = gen3_render_linear_blits.c gen3_render_linear_blits_OBJECTS = gen3_render_linear_blits.$(OBJEXT) gen3_render_linear_blits_LDADD = $(LDADD) -@HAVE_DRM_TRUE@gen3_render_linear_blits_DEPENDENCIES = \ -@HAVE_DRM_TRUE@ ../lib/libintel_tools.la $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) +gen3_render_linear_blits_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) gen3_render_mixed_blits_SOURCES = gen3_render_mixed_blits.c gen3_render_mixed_blits_OBJECTS = gen3_render_mixed_blits.$(OBJEXT) gen3_render_mixed_blits_LDADD = $(LDADD) -@HAVE_DRM_TRUE@gen3_render_mixed_blits_DEPENDENCIES = \ -@HAVE_DRM_TRUE@ ../lib/libintel_tools.la $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) +gen3_render_mixed_blits_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) gen3_render_tiledx_blits_SOURCES = gen3_render_tiledx_blits.c gen3_render_tiledx_blits_OBJECTS = gen3_render_tiledx_blits.$(OBJEXT) gen3_render_tiledx_blits_LDADD = $(LDADD) -@HAVE_DRM_TRUE@gen3_render_tiledx_blits_DEPENDENCIES = \ -@HAVE_DRM_TRUE@ ../lib/libintel_tools.la $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) +gen3_render_tiledx_blits_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) gen3_render_tiledy_blits_SOURCES = gen3_render_tiledy_blits.c gen3_render_tiledy_blits_OBJECTS = gen3_render_tiledy_blits.$(OBJEXT) gen3_render_tiledy_blits_LDADD = $(LDADD) -@HAVE_DRM_TRUE@gen3_render_tiledy_blits_DEPENDENCIES = \ -@HAVE_DRM_TRUE@ ../lib/libintel_tools.la $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) +gen3_render_tiledy_blits_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) getclient_SOURCES = getclient.c getclient_OBJECTS = getclient.$(OBJEXT) getclient_LDADD = $(LDADD) -@HAVE_DRM_TRUE@getclient_DEPENDENCIES = ../lib/libintel_tools.la \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_2) +getclient_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) getstats_SOURCES = getstats.c getstats_OBJECTS = getstats.$(OBJEXT) getstats_LDADD = $(LDADD) -@HAVE_DRM_TRUE@getstats_DEPENDENCIES = ../lib/libintel_tools.la \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_2) +getstats_DEPENDENCIES = ../lib/libintel_tools.la $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_2) getversion_SOURCES = getversion.c getversion_OBJECTS = getversion.$(OBJEXT) getversion_LDADD = $(LDADD) -@HAVE_DRM_TRUE@getversion_DEPENDENCIES = ../lib/libintel_tools.la \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_2) +getversion_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) testdisplay_SOURCES = testdisplay.c testdisplay_OBJECTS = testdisplay.$(OBJEXT) testdisplay_LDADD = $(LDADD) -@HAVE_DRM_TRUE@testdisplay_DEPENDENCIES = ../lib/libintel_tools.la \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ -@HAVE_DRM_TRUE@ $(am__DEPENDENCIES_2) +testdisplay_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_2) DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir) depcomp = $(SHELL) $(top_srcdir)/build-aux/depcomp am__depfiles_maybe = depfiles @@ -350,29 +380,37 @@ am__v_GEN_ = $(am__v_GEN_$(AM_DEFAULT_VERBOSITY)) am__v_GEN_0 = @echo " GEN " $@; SOURCES = gem_bad_address.c gem_bad_batch.c gem_bad_blit.c \ - gem_bad_length.c gem_basic.c gem_exec_blt.c gem_exec_nop.c \ + gem_bad_length.c gem_basic.c gem_double_irq_loop.c \ + gem_dummy_reloc_loop.c gem_exec_blt.c gem_exec_nop.c \ gem_fence_thrash.c gem_fenced_exec_thrash.c gem_flink.c \ - gem_gtt_speed.c gem_hang.c gem_largeobject.c \ - gem_linear_blits.c gem_mmap.c gem_mmap_gtt.c \ - gem_pread_after_blit.c gem_pwrite.c gem_readwrite.c \ - gem_ringfill.c $(gem_stress_SOURCES) gem_tiled_blits.c \ - gem_tiled_fence_blits.c gem_tiled_pread.c gem_vmap_blits.c \ - gen3_mixed_blits.c gen3_render_linear_blits.c \ - gen3_render_mixed_blits.c gen3_render_tiledx_blits.c \ - gen3_render_tiledy_blits.c getclient.c getstats.c getversion.c \ - testdisplay.c + gem_gtt_speed.c gem_hang.c gem_hangcheck_forcewake.c \ + gem_largeobject.c gem_linear_blits.c gem_mmap.c gem_mmap_gtt.c \ + gem_pipe_control_store_loop.c gem_pread_after_blit.c \ + gem_pwrite.c gem_readwrite.c gem_ring_sync_loop.c \ + gem_ringfill.c gem_storedw_batches_loop.c \ + gem_storedw_loop_blt.c gem_storedw_loop_bsd.c \ + gem_storedw_loop_render.c $(gem_stress_SOURCES) \ + gem_tiled_blits.c gem_tiled_fence_blits.c gem_tiled_pread.c \ + gem_unref_active_buffers.c gem_vmap_blits.c gen3_mixed_blits.c \ + gen3_render_linear_blits.c gen3_render_mixed_blits.c \ + gen3_render_tiledx_blits.c gen3_render_tiledy_blits.c \ + getclient.c getstats.c getversion.c testdisplay.c DIST_SOURCES = gem_bad_address.c gem_bad_batch.c gem_bad_blit.c \ - gem_bad_length.c gem_basic.c gem_exec_blt.c gem_exec_nop.c \ + gem_bad_length.c gem_basic.c gem_double_irq_loop.c \ + gem_dummy_reloc_loop.c gem_exec_blt.c gem_exec_nop.c \ gem_fence_thrash.c gem_fenced_exec_thrash.c gem_flink.c \ - gem_gtt_speed.c gem_hang.c gem_largeobject.c \ - gem_linear_blits.c gem_mmap.c gem_mmap_gtt.c \ - gem_pread_after_blit.c gem_pwrite.c gem_readwrite.c \ - gem_ringfill.c $(am__gem_stress_SOURCES_DIST) \ + gem_gtt_speed.c gem_hang.c gem_hangcheck_forcewake.c \ + gem_largeobject.c gem_linear_blits.c gem_mmap.c gem_mmap_gtt.c \ + gem_pipe_control_store_loop.c gem_pread_after_blit.c \ + gem_pwrite.c gem_readwrite.c gem_ring_sync_loop.c \ + gem_ringfill.c gem_storedw_batches_loop.c \ + gem_storedw_loop_blt.c gem_storedw_loop_bsd.c \ + gem_storedw_loop_render.c $(gem_stress_SOURCES) \ gem_tiled_blits.c gem_tiled_fence_blits.c gem_tiled_pread.c \ - gem_vmap_blits.c gen3_mixed_blits.c gen3_render_linear_blits.c \ - gen3_render_mixed_blits.c gen3_render_tiledx_blits.c \ - gen3_render_tiledy_blits.c getclient.c getstats.c getversion.c \ - testdisplay.c + gem_unref_active_buffers.c gem_vmap_blits.c gen3_mixed_blits.c \ + gen3_render_linear_blits.c gen3_render_mixed_blits.c \ + gen3_render_tiledx_blits.c gen3_render_tiledy_blits.c \ + getclient.c getstats.c getversion.c testdisplay.c ETAGS = etags CTAGS = ctags am__tty_colors = \ @@ -417,6 +455,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -525,27 +564,54 @@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -@HAVE_DRM_TRUE@gem_stress_SOURCES = \ -@HAVE_DRM_TRUE@ gem_stress.c \ -@HAVE_DRM_TRUE@ gem_stress.h \ -@HAVE_DRM_TRUE@ gem_stress_i915.c \ -@HAVE_DRM_TRUE@ gem_stress_i830.c \ -@HAVE_DRM_TRUE@ gen6_render.h \ -@HAVE_DRM_TRUE@ gem_stress_gen6.c \ -@HAVE_DRM_TRUE@ $(NULL) - -@HAVE_DRM_TRUE@HANG = \ -@HAVE_DRM_TRUE@ gem_bad_batch \ -@HAVE_DRM_TRUE@ gem_hang \ -@HAVE_DRM_TRUE@ $(NULL) - -@HAVE_DRM_TRUE@CLEANFILES = $(EXTRA_PROGRAMS) -@HAVE_DRM_TRUE@AM_CFLAGS = $(DRM_CFLAGS) $(WARN_CFLAGS) -I$(srcdir)/.. \ -@HAVE_DRM_TRUE@ -I$(srcdir)/../lib $(am__append_3) -@HAVE_DRM_TRUE@LDADD = ../lib/libintel_tools.la $(PCIACCESS_LIBS) \ -@HAVE_DRM_TRUE@ $(DRM_LIBS) $(am__append_2) -@HAVE_DRM_TRUE@gem_fence_thrash_CFLAGS = $(AM_CFLAGS) -pthread -@HAVE_DRM_TRUE@gem_fence_thrash_LDADD = $(LDADD) -lpthread +gem_stress_SOURCES = \ + gem_stress.c \ + gem_stress.h \ + gem_stress_i915.c \ + gem_stress_i830.c \ + gen6_render.h \ + gem_stress_gen6.c \ + $(NULL) + +TESTS_progs = getversion getclient getstats gem_basic gem_exec_nop \ + gem_exec_blt gem_flink gem_readwrite gem_ringfill gem_mmap \ + gem_mmap_gtt gem_pwrite gem_pread_after_blit gem_tiled_pread \ + gem_linear_blits gem_vmap_blits gem_tiled_blits \ + gem_tiled_fence_blits gem_largeobject gem_bad_length \ + gem_fence_thrash gem_fenced_exec_thrash gem_gtt_speed \ + gen3_render_linear_blits gen3_render_tiledx_blits \ + gen3_render_tiledy_blits gen3_render_mixed_blits \ + gen3_mixed_blits gem_storedw_loop_render gem_storedw_loop_blt \ + gem_storedw_loop_bsd gem_storedw_batches_loop \ + gem_dummy_reloc_loop gem_double_irq_loop gem_ring_sync_loop \ + gem_pipe_control_store_loop gem_hangcheck_forcewake \ + gem_unref_active_buffers $(NULL) $(am__append_1) +TESTS_scripts = \ + debugfs_reader \ + debugfs_emon_crash \ + sysfs_edid_timing \ + $(NULL) + +kernel_tests = \ + $(TESTS_progs) \ + $(TESTS_scripts) \ + $(NULL) + +HANG = \ + gem_bad_batch \ + gem_hang \ + gem_bad_blit \ + gem_bad_address \ + $(NULL) + +EXTRA_DIST = $(TESTS_scripts) check_drm_clients +CLEANFILES = $(EXTRA_PROGRAMS) +AM_CFLAGS = $(DRM_CFLAGS) $(WARN_CFLAGS) -I$(srcdir)/.. \ + -I$(srcdir)/../lib $(am__append_3) +LDADD = ../lib/libintel_tools.la $(PCIACCESS_LIBS) $(DRM_LIBS) \ + $(am__append_2) +gem_fence_thrash_CFLAGS = $(AM_CFLAGS) -pthread +gem_fence_thrash_LDADD = $(LDADD) -lpthread all: all-am .SUFFIXES: @@ -604,6 +670,12 @@ gem_basic$(EXEEXT): $(gem_basic_OBJECTS) $(gem_basic_DEPENDENCIES) @rm -f gem_basic$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_basic_OBJECTS) $(gem_basic_LDADD) $(LIBS) +gem_double_irq_loop$(EXEEXT): $(gem_double_irq_loop_OBJECTS) $(gem_double_irq_loop_DEPENDENCIES) + @rm -f gem_double_irq_loop$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_double_irq_loop_OBJECTS) $(gem_double_irq_loop_LDADD) $(LIBS) +gem_dummy_reloc_loop$(EXEEXT): $(gem_dummy_reloc_loop_OBJECTS) $(gem_dummy_reloc_loop_DEPENDENCIES) + @rm -f gem_dummy_reloc_loop$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_dummy_reloc_loop_OBJECTS) $(gem_dummy_reloc_loop_LDADD) $(LIBS) gem_exec_blt$(EXEEXT): $(gem_exec_blt_OBJECTS) $(gem_exec_blt_DEPENDENCIES) @rm -f gem_exec_blt$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_exec_blt_OBJECTS) $(gem_exec_blt_LDADD) $(LIBS) @@ -625,6 +697,9 @@ gem_hang$(EXEEXT): $(gem_hang_OBJECTS) $(gem_hang_DEPENDENCIES) @rm -f gem_hang$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_hang_OBJECTS) $(gem_hang_LDADD) $(LIBS) +gem_hangcheck_forcewake$(EXEEXT): $(gem_hangcheck_forcewake_OBJECTS) $(gem_hangcheck_forcewake_DEPENDENCIES) + @rm -f gem_hangcheck_forcewake$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_hangcheck_forcewake_OBJECTS) $(gem_hangcheck_forcewake_LDADD) $(LIBS) gem_largeobject$(EXEEXT): $(gem_largeobject_OBJECTS) $(gem_largeobject_DEPENDENCIES) @rm -f gem_largeobject$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_largeobject_OBJECTS) $(gem_largeobject_LDADD) $(LIBS) @@ -637,6 +712,9 @@ gem_mmap_gtt$(EXEEXT): $(gem_mmap_gtt_OBJECTS) $(gem_mmap_gtt_DEPENDENCIES) @rm -f gem_mmap_gtt$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_mmap_gtt_OBJECTS) $(gem_mmap_gtt_LDADD) $(LIBS) +gem_pipe_control_store_loop$(EXEEXT): $(gem_pipe_control_store_loop_OBJECTS) $(gem_pipe_control_store_loop_DEPENDENCIES) + @rm -f gem_pipe_control_store_loop$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_pipe_control_store_loop_OBJECTS) $(gem_pipe_control_store_loop_LDADD) $(LIBS) gem_pread_after_blit$(EXEEXT): $(gem_pread_after_blit_OBJECTS) $(gem_pread_after_blit_DEPENDENCIES) @rm -f gem_pread_after_blit$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_pread_after_blit_OBJECTS) $(gem_pread_after_blit_LDADD) $(LIBS) @@ -646,9 +724,24 @@ gem_readwrite$(EXEEXT): $(gem_readwrite_OBJECTS) $(gem_readwrite_DEPENDENCIES) @rm -f gem_readwrite$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_readwrite_OBJECTS) $(gem_readwrite_LDADD) $(LIBS) +gem_ring_sync_loop$(EXEEXT): $(gem_ring_sync_loop_OBJECTS) $(gem_ring_sync_loop_DEPENDENCIES) + @rm -f gem_ring_sync_loop$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_ring_sync_loop_OBJECTS) $(gem_ring_sync_loop_LDADD) $(LIBS) gem_ringfill$(EXEEXT): $(gem_ringfill_OBJECTS) $(gem_ringfill_DEPENDENCIES) @rm -f gem_ringfill$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_ringfill_OBJECTS) $(gem_ringfill_LDADD) $(LIBS) +gem_storedw_batches_loop$(EXEEXT): $(gem_storedw_batches_loop_OBJECTS) $(gem_storedw_batches_loop_DEPENDENCIES) + @rm -f gem_storedw_batches_loop$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_storedw_batches_loop_OBJECTS) $(gem_storedw_batches_loop_LDADD) $(LIBS) +gem_storedw_loop_blt$(EXEEXT): $(gem_storedw_loop_blt_OBJECTS) $(gem_storedw_loop_blt_DEPENDENCIES) + @rm -f gem_storedw_loop_blt$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_storedw_loop_blt_OBJECTS) $(gem_storedw_loop_blt_LDADD) $(LIBS) +gem_storedw_loop_bsd$(EXEEXT): $(gem_storedw_loop_bsd_OBJECTS) $(gem_storedw_loop_bsd_DEPENDENCIES) + @rm -f gem_storedw_loop_bsd$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_storedw_loop_bsd_OBJECTS) $(gem_storedw_loop_bsd_LDADD) $(LIBS) +gem_storedw_loop_render$(EXEEXT): $(gem_storedw_loop_render_OBJECTS) $(gem_storedw_loop_render_DEPENDENCIES) + @rm -f gem_storedw_loop_render$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_storedw_loop_render_OBJECTS) $(gem_storedw_loop_render_LDADD) $(LIBS) gem_stress$(EXEEXT): $(gem_stress_OBJECTS) $(gem_stress_DEPENDENCIES) @rm -f gem_stress$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_stress_OBJECTS) $(gem_stress_LDADD) $(LIBS) @@ -661,6 +754,9 @@ gem_tiled_pread$(EXEEXT): $(gem_tiled_pread_OBJECTS) $(gem_tiled_pread_DEPENDENCIES) @rm -f gem_tiled_pread$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_tiled_pread_OBJECTS) $(gem_tiled_pread_LDADD) $(LIBS) +gem_unref_active_buffers$(EXEEXT): $(gem_unref_active_buffers_OBJECTS) $(gem_unref_active_buffers_DEPENDENCIES) + @rm -f gem_unref_active_buffers$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(gem_unref_active_buffers_OBJECTS) $(gem_unref_active_buffers_LDADD) $(LIBS) gem_vmap_blits$(EXEEXT): $(gem_vmap_blits_OBJECTS) $(gem_vmap_blits_DEPENDENCIES) @rm -f gem_vmap_blits$(EXEEXT) $(AM_V_CCLD)$(LINK) $(gem_vmap_blits_OBJECTS) $(gem_vmap_blits_LDADD) $(LIBS) @@ -703,6 +799,8 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_bad_blit.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_bad_length.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_basic.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_double_irq_loop.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_dummy_reloc_loop.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_exec_blt.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_exec_nop.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_fence_thrash-gem_fence_thrash.Po@am__quote@ @@ -710,14 +808,21 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_flink.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_gtt_speed.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_hang.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_hangcheck_forcewake.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_largeobject.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_linear_blits.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_mmap.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_mmap_gtt.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_pipe_control_store_loop.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_pread_after_blit.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_pwrite.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_readwrite.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_ring_sync_loop.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_ringfill.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_storedw_batches_loop.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_storedw_loop_blt.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_storedw_loop_bsd.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_storedw_loop_render.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_stress.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_stress_gen6.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_stress_i830.Po@am__quote@ @@ -725,6 +830,7 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_tiled_blits.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_tiled_fence_blits.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_tiled_pread.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_unref_active_buffers.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gem_vmap_blits.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen3_mixed_blits.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gen3_render_linear_blits.Po@am__quote@ @@ -1075,6 +1181,11 @@ tags uninstall uninstall-am +test: + whoami | grep root || ( echo ERROR: not running as root; exit 1 ) + ./check_drm_clients + make TESTS="${kernel_tests}" check + # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/sysfs_edid_timing intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/sysfs_edid_timing --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/sysfs_edid_timing 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/sysfs_edid_timing 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,20 @@ +#!/bin/sh +# +# This check the time we take to read the content of all the possible connectors. +# Without the edid -ENXIO patch (http://permalink.gmane.org/gmane.comp.video.dri.devel/62083), +# we sometimes take a *really* long time. So let's just check for some reasonable timing here +# + +TIME1=$(date +%s%N) +cat $(find /sys/devices/|grep drm | grep /status) > /dev/null +TIME2=$(date +%s%N) + +# time in ms +RES=$[(TIME2 - TIME1) / 1000000] + +if [ $RES -gt 600 ]; then + echo "Talking to outputs took ${RES}ms, something is wrong" + exit 1 +fi + +exit 0 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/testdisplay.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/testdisplay.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tests/testdisplay.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tests/testdisplay.c 2011-11-21 01:14:32.000000000 +0000 @@ -89,6 +89,12 @@ int force_vsync_end; int force_vtotal; +int crtc_x, crtc_y, crtc_w, crtc_h; +unsigned int plane_fb_id; +unsigned int plane_crtc_id; +unsigned int plane_id; +int plane_width, plane_height; + #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) struct type_name { @@ -98,7 +104,7 @@ #define type_name_fn(res) \ static char * res##_str(int type) { \ - int i; \ + unsigned int i; \ for (i = 0; i < ARRAY_SIZE(res##_names); i++) { \ if (res##_names[i].type == type) \ return res##_names[i].name; \ @@ -158,6 +164,7 @@ drmModeEncoder *encoder; drmModeConnector *connector; int crtc; + int pipe; }; static void dump_mode(drmModeModeInfo *mode) @@ -365,6 +372,7 @@ break; } c->crtc = resources->crtcs[i]; + c->pipe = i; resources->crtcs[i] = 0; c->connector = connector; } @@ -413,8 +421,23 @@ int size, stride; if (tiled) { - stride = (width * (bpp / 8) + 511) & ~511; - size = stride * height; + int v; + + /* Round the tiling up to the next power-of-two and the + * region up to the next pot fence size so that this works + * on all generations. + * + * This can still fail if the framebuffer is too large to + * be tiled. But then that failure is expected. + */ + + v = width * bpp / 8; + for (stride = 512; stride < v; stride *= 2) + ; + + v = stride * height; + for (size = 1024*1024; size < v; size *= 2) + ; } else { /* Scan-out has a 64 byte alignment restriction */ stride = (width * (bpp / 8) + 63) & ~63; @@ -448,8 +471,8 @@ set_tiling.tiling_mode = I915_TILING_X; set_tiling.stride = stride; if (ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling)) { - fprintf(stderr, "set tiling failed: %s\n", - strerror(errno)); + fprintf(stderr, "set tiling failed: %s (stride=%d, size=%d)\n", + strerror(errno), stride, size); return NULL; } } @@ -669,7 +692,7 @@ continue; } - if (ovr->possible_crtcs & (1<possible_crtcs & (1 << c->pipe)) { id = ovr->plane_id; drmModeFreePlane(ovr); break; @@ -677,7 +700,6 @@ drmModeFreePlane(ovr); } - return 4; return id; } @@ -687,10 +709,10 @@ double gr_height, gr_width; int x, y; - y = height * 0.10; - gr_width = width * 0.75; - gr_height = height * 0.08; - x = (width / 2) - (gr_width / 2); + y = 0; + gr_width = width; + gr_height = height * 0.25; + x = 0; paint_color_gradient(cr, x, y, gr_width, gr_height, 1, 0, 0); @@ -710,52 +732,54 @@ cairo_surface_t *surface; cairo_status_t status; cairo_t *cr; - unsigned int fb_id; - uint32_t handle, x, y, plane_id; - int width, height; + uint32_t handle, x, y; int ret; + uint32_t pitches[4], offsets[4]; /* we only use [0] */ - width = c->mode.hdisplay * 0.50; - height = c->mode.vdisplay * 0.50; + plane_width = c->mode.hdisplay * 0.50; + plane_height = c->mode.vdisplay * 0.50; - x = (c->mode.hdisplay - width) / 2; - y = (c->mode.vdisplay - height) / 2; + x = (c->mode.hdisplay - plane_width) / 2; + y = (c->mode.vdisplay - plane_height) / 2; plane_id = connector_find_plane(c); if (!plane_id) { fprintf(stderr, "failed to find plane for crtc\n"); return; } + plane_crtc_id = c->crtc; - surface = allocate_surface(fd, width, height, 24, 32, &handle, 1); + surface = allocate_surface(fd, plane_width, plane_height, 24, 32, &handle, 1); if (!surface) { - fprintf(stderr, "allocation failed %dx%d\n", width, height); + fprintf(stderr, "allocation failed %dx%d\n", plane_width, plane_height); return; } cr = cairo_create(surface); - paint_plane(cr, width, height, + paint_plane(cr, plane_width, plane_height, cairo_image_surface_get_stride(surface)); status = cairo_status(cr); cairo_destroy(cr); if (status) fprintf(stderr, "failed to draw plane %dx%d: %s\n", - width, height, cairo_status_to_string(status)); + plane_width, plane_height, cairo_status_to_string(status)); - ret = drmModeAddFB2(fd, width, height, V4L2_PIX_FMT_RGB32, 24, 32, - cairo_image_surface_get_stride(surface), - handle, &fb_id); + pitches[0] = cairo_image_surface_get_stride(surface); + memset(offsets, 0, sizeof(offsets)); + ret = drmModeAddFB2(fd, plane_width, plane_height, V4L2_PIX_FMT_RGB24, + handle, pitches, offsets, &plane_fb_id); cairo_surface_destroy(surface); gem_close(fd, handle); if (ret) { fprintf(stderr, "failed to add fb (%dx%d): %s\n", - width, height, strerror(errno)); + plane_width, plane_height, strerror(errno)); return; } - if (drmModeSetPlane(fd, plane_id, c->crtc, fb_id, x, y, 0, 0)) { + if (drmModeSetPlane(fd, plane_id, plane_crtc_id, plane_fb_id, crtc_x, crtc_y, + crtc_w, crtc_h, 0, 0, plane_width, plane_height)) { fprintf(stderr, "failed to enable plane: %s\n", strerror(errno)); return; @@ -763,24 +787,61 @@ } static void -disable_plane(struct connector *c) +adjust_plane(int fd, int xdistance, int ydistance, int wdiff, int hdiff) { - uint32_t plane_id; + crtc_x += xdistance; + crtc_y += ydistance; + crtc_w += wdiff; + crtc_h += hdiff; + if (drmModeSetPlane(fd, plane_id, plane_crtc_id, plane_fb_id, crtc_x, crtc_y, + crtc_w, crtc_h, 0, 0, plane_width, plane_height)) + fprintf(stderr, "failed to adjust plane: %s\n", strerror(errno)); +} - plane_id = connector_find_plane(c); - if (!plane_id) { - fprintf(stderr, "failed to find plane for crtc\n"); +static void +disable_planes(int fd) +{ + struct connector *connectors; + int c; + + resources = drmModeGetResources(fd); + if (!resources) { + fprintf(stderr, "drmModeGetResources failed: %s\n", + strerror(errno)); return; } - if (drmModeSetPlane(fd, plane_id, c->crtc, 0, 0, 0, 0, 0)) { - fprintf(stderr, "failed to enable plane: %s\n", - strerror(errno)); + connectors = calloc(resources->count_connectors, + sizeof(struct connector)); + if (!connectors) return; + + /* Find any connected displays */ + for (c = 0; c < resources->count_connectors; c++) { + uint32_t plane_id; + + plane_id = connector_find_plane(&connectors[c]); + if (!plane_id) { + fprintf(stderr, + "failed to find plane for crtc\n"); + return; + } + if (drmModeSetPlane(fd, plane_id, connectors[c].crtc, 0, 0, 0, + 0, 0, 0, 0, 0, 0)) { + fprintf(stderr, "failed to disable plane: %s\n", + strerror(errno)); + return; + } } + drmModeFreeResources(resources); + return; } #else static void enable_plane(struct connector *c) { return; } +static void +adjust_plane(int fd, int xdistance, int ydistance, int wdiff, int hdiff) +{ return; } +static void disable_planes(int fd) { return; } #endif static void @@ -909,7 +970,7 @@ * Each connector has a corresponding encoder, except in the SDVO case * where an encoder may have multiple connectors. */ -static void update_display(void) +static int update_display(void) { struct connector *connectors; int c; @@ -918,13 +979,13 @@ if (!resources) { fprintf(stderr, "drmModeGetResources failed: %s\n", strerror(errno)); - return; + return 0; } connectors = calloc(resources->count_connectors, sizeof(struct connector)); if (!connectors) - return; + return 0; if (dump_info) { dump_connectors(); @@ -940,27 +1001,27 @@ } } drmModeFreeResources(resources); - if (dump_info || test_all_modes) - exit(0); + return 1; } extern char *optarg; extern int optind, opterr, optopt; -static char optstr[] = "hiaf:s:d:pt"; +static char optstr[] = "hiaf:s:d:p:mt"; static void usage(char *name) { - fprintf(stderr, "usage: %s [-hiafs]\n", name); + fprintf(stderr, "usage: %s [-hiasdpmtf]\n", name); fprintf(stderr, "\t-i\tdump info\n"); fprintf(stderr, "\t-a\ttest all modes\n"); fprintf(stderr, "\t-s\t\tsleep between each mode test\n"); fprintf(stderr, "\t-d\t\tbit depth of scanout buffer\n"); - fprintf(stderr, "\t-p\ttest overlay plane\n"); + fprintf(stderr, "\t-p\t, test overlay plane\n"); + fprintf(stderr, "\t-m\ttest the preferred mode\n"); fprintf(stderr, "\t-t\tuse a tiled framebuffer\n"); fprintf(stderr, "\t-f\t,,,,,\n"); fprintf(stderr, "\t\t,,,\n"); fprintf(stderr, "\t\ttest force mode\n"); - fprintf(stderr, "\tDefault is to test the preferred mode.\n"); + fprintf(stderr, "\tDefault is to test all modes.\n"); exit(0); } @@ -995,12 +1056,29 @@ static gboolean input_event(GIOChannel *source, GIOCondition condition, gpointer data) { - gchar buf[256]; + gchar buf[1]; gsize count; count = read(g_io_channel_unix_get_fd(source), buf, sizeof(buf)); - if (buf[0] == 'q' && (count == 1 || buf[1] == '\n')) + if (buf[0] == 'q' && (count == 1 || buf[1] == '\n')) { + disable_planes(fd); exit(0); + } else if (buf[0] == 'a') + adjust_plane(fd, -10, 0, 0, 0); + else if (buf[0] == 'd') + adjust_plane(fd, 10, 0, 0, 0); + else if (buf[0] == 'w') + adjust_plane(fd, 0, -10, 0, 0); + else if (buf[0] == 's') + adjust_plane(fd, 0, 10, 0, 0); + else if (buf[0] == 'j') + adjust_plane(fd, 0, 0, 10, 0); + else if (buf[0] == 'l') + adjust_plane(fd, 0, 0, -10, 0); + else if (buf[0] == 'k') + adjust_plane(fd, 0, 0, 0, -10); + else if (buf[0] == 'i') + adjust_plane(fd, 0, 0, 0, 10); return TRUE; } @@ -1010,7 +1088,7 @@ int c; int encoders = 0, connectors = 0, crtcs = 0, framebuffers = 0; char *modules[] = { "i915" }; - int i; + unsigned int i; struct udev *u; int ret = 0; GIOChannel *udevchannel, *stdinchannel; @@ -1041,8 +1119,14 @@ fprintf(stderr, "using depth %d\n", depth); break; case 'p': + if (sscanf(optarg, "%d,%d,%d,%d", &crtc_x, &crtc_y, + &crtc_w, &crtc_h) != 4) + usage(argv[0]); test_plane = 1; break; + case 'm': + test_preferred_mode = 1; + break; case 't': enable_tiling = 1; break; @@ -1054,8 +1138,9 @@ break; } } - if (!test_all_modes && !force_mode && !dump_info) - test_preferred_mode = 1; + if (!test_all_modes && !force_mode && !dump_info && + !test_preferred_mode) + test_all_modes = 1; for (i = 0; i < ARRAY_SIZE(modules); i++) { fd = drmOpen(modules[i], NULL); @@ -1133,7 +1218,16 @@ goto out_stdio_off; } - update_display(); + ret = 0; + + if (!update_display()) { + ret = 1; + goto out_stdio_off; + } + + if (dump_info || test_all_modes) + goto out_stdio_off; + g_main_loop_run(mainloop); out_stdio_off: @@ -1147,6 +1241,8 @@ out_udev_unref: udev_unref(u); out_close: + if (test_plane) + disable_planes(fd); drmClose(fd); out: return ret; diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_bios_reader.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_bios_reader.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_bios_reader.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_bios_reader.c 2011-11-21 01:14:32.000000000 +0000 @@ -38,7 +38,7 @@ #include "intel_bios.h" #include "intel_gpu_tools.h" -static uint32_t devid; +static uint32_t devid = -1; /* no bother to include "edid.h" */ #define _H_ACTIVE(x) (x[2] + ((x[4] & 0xF0) << 4)) @@ -833,12 +833,16 @@ struct stat finfo; struct bdb_block *block; char signature[17]; + char *devid_string; if (argc != 2) { printf("usage: %s \n", argv[0]); return 1; } + if ((devid_string = getenv("DEVICE"))) + devid = strtoul(devid_string, NULL, 0); + filename = argv[1]; fd = open(filename, O_RDONLY); @@ -911,7 +915,8 @@ } printf("\n"); - devid = get_device_id(VBIOS); + if (devid == -1) + devid = get_device_id(VBIOS); if (devid == -1) printf("Warning: could not find PCI device ID!\n"); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_decode.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_decode.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_decode.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_decode.c 2011-11-21 01:14:32.000000000 +0000 @@ -1,3 +1,26 @@ +/* + * Copyright © 2009-2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + #include #include #include @@ -5,6 +28,7 @@ #include "intel_decode.h" #include "intel_chipset.h" +#include "intel_gpu_tools.h" static FILE *out; static uint32_t saved_s2 = 0, saved_s4 = 0; @@ -62,7 +86,8 @@ static int decode_mi(uint32_t *data, int count, uint32_t hw_offset, int *failures) { - unsigned int opcode; + unsigned int opcode, len = -1; + char *post_sync_op = ""; struct { uint32_t opcode; @@ -94,18 +119,11 @@ { 0x0b, 0, 1, 1, "MI_SUSPEND_FLUSH" }, }; - switch ((data[0] & 0x1f800000) >> 23) { - case 0x0a: - instr_out(data, hw_offset, 0, "MI_BATCH_BUFFER_END\n"); - return -1; - } - + /* check instruction length */ for (opcode = 0; opcode < sizeof(opcodes_mi) / sizeof(opcodes_mi[0]); opcode++) { if ((data[0] & 0x1f800000) >> 23 == opcodes_mi[opcode].opcode) { - unsigned int len = 1, i; - - instr_out(data, hw_offset, 0, "%s\n", opcodes_mi[opcode].name); + len = 1; if (opcodes_mi[opcode].max_len > 1) { len = (data[0] & opcodes_mi[opcode].len_mask) + 2; if (len < opcodes_mi[opcode].min_len || @@ -117,8 +135,70 @@ opcodes_mi[opcode].max_len); } } + break; + } + } - for (i = 1; i < len; i++) { + switch ((data[0] & 0x1f800000) >> 23) { + case 0x0a: + instr_out(data, hw_offset, 0, "MI_BATCH_BUFFER_END\n"); + return -1; + case 0x16: + instr_out(data, hw_offset, 0, "MI_SEMAPHORE_MBOX%s%s%s%s %u\n", + data[0] & (1<<22) ? " global gtt," : "", + data[0] & (1<<21) ? " update semaphore," : "", + data[0] & (1<<20) ? " compare semaphore," : "", + data[0] & (1<<18) ? " use compare reg" : "", + (data[0] & (0x3<<16)) >> 16); + instr_out(data, hw_offset, 1, "value\n"); + instr_out(data, hw_offset, 2, "address\n"); + return len; + case 0x21: + instr_out(data, hw_offset, 0, "MI_STORE_DATA_INDEX%s\n", + data[0] & (1<<21) ? " use per-process HWS," : ""); + instr_out(data, hw_offset, 1, "index\n"); + instr_out(data, hw_offset, 2, "dword\n"); + if (len == 4) + instr_out(data, hw_offset, 3, "upper dword\n"); + return len; + case 0x00: + if (data[0] & (1<<22)) + instr_out(data, hw_offset, 0, "MI_NOOP write NOPID reg, val=0x%x\n", + data[0] & ((1<<22) - 1)); + else + instr_out(data, hw_offset, 0, "MI_NOOP\n"); + return len; + case 0x26: + switch (data[0] & (0x3<<14)) { + case 0: post_sync_op = "no write"; break; + case 1: post_sync_op = "write data"; break; + case 2: post_sync_op = "reserved"; break; + case 3: post_sync_op = "write TIMESTAMP"; break; + } + instr_out(data, hw_offset, 0, "MI_FLUSH_DW%s%s%s%s post_sync_op='%s' %s%s\n", + data[0] & (1<<22) ? " enable protected mem (BCS-only)," : "", + data[0] & (1<<21) ? " store in hws," : "", + data[0] & (1<<18) ? " invalidate tlb," : "", + data[0] & (1<<17) ? " flush gfdt," : "", + post_sync_op, + data[0] & (1<<8) ? " enable notify interrupt," : "", + data[0] & (1<<7) ? " invalidate video state (BCS-only)," : ""); + if (data[0] & (1<<21)) + instr_out(data, hw_offset, 1, "hws index\n"); + else + instr_out(data, hw_offset, 1, "address\n"); + instr_out(data, hw_offset, 2, "dword\n"); + if (len == 4) + instr_out(data, hw_offset, 3, "upper dword\n"); + return len; + } + + for (opcode = 0; opcode < sizeof(opcodes_mi) / sizeof(opcodes_mi[0]); + opcode++) { + if ((data[0] & 0x1f800000) >> 23 == opcodes_mi[opcode].opcode) { + + instr_out(data, hw_offset, 0, "%s\n", opcodes_mi[opcode].name); + for (int i = 1; i < len; i++) { if (i >= count) BUFFER_FAIL(count, len, opcodes_mi[opcode].name); instr_out(data, hw_offset, i, "dword %d\n", i); @@ -133,11 +213,53 @@ return 1; } +static void +decode_2d_br00(uint32_t *data, int count, uint32_t hw_offset, char *cmd) +{ + instr_out(data, hw_offset, 0, + "%s (rgb %sabled, alpha %sabled, src tile %d, dst tile %d)\n", + cmd, + (data[count] & (1 << 20)) ? "en" : "dis", + (data[count] & (1 << 21)) ? "en" : "dis", + (data[count] >> 15) & 1, + (data[count] >> 11) & 1); +} + +static void +decode_2d_br01(uint32_t *data, int count, uint32_t hw_offset) +{ + char *format; + switch ((data[count] >> 24) & 0x3) { + case 0: + format="8"; + break; + case 1: + format="565"; + break; + case 2: + format="1555"; + break; + case 3: + format="8888"; + break; + } + + instr_out(data, hw_offset, count, "format %s, pitch %d, rop 0x%02x, " + "clipping %sabled, %s%s \n", + + format, + (short)(data[count] & 0xffff), + (data[count] >> 16) &0xff, + data[count] & (1 << 30) ? "en" : "dis", + data[count] & (1 << 31) ? "solid pattern enabled, " : "", + data[count] & (1 << 31) ? "mono pattern transparency enabled, " : ""); + +} + static int decode_2d(uint32_t *data, int count, uint32_t hw_offset, int *failures) { unsigned int opcode, len; - char *format = NULL; struct { uint32_t opcode; @@ -173,38 +295,87 @@ }; switch ((data[0] & 0x1fc00000) >> 22) { - case 0x50: + case 0x25: instr_out(data, hw_offset, 0, - "XY_COLOR_BLT (rgb %sabled, alpha %sabled, dst tile %d)\n", - (data[0] & (1 << 20)) ? "en" : "dis", - (data[0] & (1 << 21)) ? "en" : "dis", + "XY_SCANLINES_BLT (pattern seed (%d, %d), dst tile %d)\n", + (data[0] >> 12) &0x8, + (data[0] >> 8) &0x8, (data[0] >> 11) & 1); len = (data[0] & 0x000000ff) + 2; + if (len != 3) + fprintf(out, "Bad count in XY_SCANLINES_BLT\n"); + if (count < 3) + BUFFER_FAIL(count, len, "XY_SCANLINES_BLT"); + + instr_out(data, hw_offset, 1, "dest (%d,%d)\n", + data[1] & 0xffff, data[1] >> 16); + instr_out(data, hw_offset, 2, "dest (%d,%d)\n", + data[2] & 0xffff, data[2] >> 16); + return len; + case 0x01: + decode_2d_br00(data, 0, hw_offset, "XY_SETUP_BLT"); + + len = (data[0] & 0x000000ff) + 2; + if (len != 8) + fprintf(out, "Bad count in XY_SETUP_BLT\n"); + if (count < 8) + BUFFER_FAIL(count, len, "XY_SETUP_BLT"); + + decode_2d_br01(data, 1, hw_offset); + instr_out(data, hw_offset, 2, "cliprect (%d,%d)\n", + data[2] & 0xffff, data[2] >> 16); + instr_out(data, hw_offset, 3, "cliprect (%d,%d)\n", + data[3] & 0xffff, data[3] >> 16); + instr_out(data, hw_offset, 4, "setup dst offset 0x%08x\n", data[4]); + instr_out(data, hw_offset, 5, "setup background color\n"); + instr_out(data, hw_offset, 6, "setup foreground color\n"); + instr_out(data, hw_offset, 7, "color pattern offset\n"); + return len; + case 0x03: + decode_2d_br00(data, 0, hw_offset, "XY_SETUP_CLIP_BLT"); + + len = (data[0] & 0x000000ff) + 2; + if (len != 3) + fprintf(out, "Bad count in XY_SETUP_CLIP_BLT\n"); + if (count < 3) + BUFFER_FAIL(count, len, "XY_SETUP_CLIP_BLT"); + + instr_out(data, hw_offset, 1, "cliprect (%d,%d)\n", + data[1] & 0xffff, data[2] >> 16); + instr_out(data, hw_offset, 2, "cliprect (%d,%d)\n", + data[2] & 0xffff, data[3] >> 16); + return len; + case 0x11: + decode_2d_br00(data, 0, hw_offset, "XY_SETUP_MONO_PATTERN_SL_BLT"); + + len = (data[0] & 0x000000ff) + 2; + if (len != 9) + fprintf(out, "Bad count in XY_SETUP_MONO_PATTERN_SL_BLT\n"); + if (count < 9) + BUFFER_FAIL(count, len, "XY_SETUP_MONO_PATTERN_SL_BLT"); + + decode_2d_br01(data, 1, hw_offset); + instr_out(data, hw_offset, 2, "cliprect (%d,%d)\n", + data[2] & 0xffff, data[2] >> 16); + instr_out(data, hw_offset, 3, "cliprect (%d,%d)\n", + data[3] & 0xffff, data[3] >> 16); + instr_out(data, hw_offset, 4, "setup dst offset 0x%08x\n", data[4]); + instr_out(data, hw_offset, 5, "setup background color\n"); + instr_out(data, hw_offset, 6, "setup foreground color\n"); + instr_out(data, hw_offset, 7, "mono pattern dw0\n"); + instr_out(data, hw_offset, 8, "mono pattern dw1\n"); + return len; + case 0x50: + decode_2d_br00(data, 0, hw_offset, "XY_COLOR_BLT"); + + len = (data[0] & 0x000000ff) + 2; if (len != 6) fprintf(out, "Bad count in XY_COLOR_BLT\n"); if (count < 6) BUFFER_FAIL(count, len, "XY_COLOR_BLT"); - switch ((data[1] >> 24) & 0x3) { - case 0: - format="8"; - break; - case 1: - format="565"; - break; - case 2: - format="1555"; - break; - case 3: - format="8888"; - break; - } - - instr_out(data, hw_offset, 1, "format %s, pitch %d, " - "clipping %sabled\n", format, - (short)(data[1] & 0xffff), - data[1] & (1 << 30) ? "en" : "dis"); + decode_2d_br01(data, 1, hw_offset); instr_out(data, hw_offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); instr_out(data, hw_offset, 3, "(%d,%d)\n", @@ -213,13 +384,7 @@ instr_out(data, hw_offset, 5, "color\n"); return len; case 0x53: - instr_out(data, hw_offset, 0, - "XY_SRC_COPY_BLT (rgb %sabled, alpha %sabled, " - "src tile %d, dst tile %d)\n", - (data[0] & (1 << 20)) ? "en" : "dis", - (data[0] & (1 << 21)) ? "en" : "dis", - (data[0] >> 15) & 1, - (data[0] >> 11) & 1); + decode_2d_br00(data, 0, hw_offset, "XY_SRC_COPY_BLT"); len = (data[0] & 0x000000ff) + 2; if (len != 8) @@ -227,25 +392,7 @@ if (count < 8) BUFFER_FAIL(count, len, "XY_SRC_COPY_BLT"); - switch ((data[1] >> 24) & 0x3) { - case 0: - format="8"; - break; - case 1: - format="565"; - break; - case 2: - format="1555"; - break; - case 3: - format="8888"; - break; - } - - instr_out(data, hw_offset, 1, "format %s, dst pitch %d, " - "clipping %sabled\n", format, - (short)(data[1] & 0xffff), - data[1] & (1 << 30) ? "en" : "dis"); + decode_2d_br01(data, 1, hw_offset); instr_out(data, hw_offset, 2, "dst (%d,%d)\n", data[2] & 0xffff, data[2] >> 16); instr_out(data, hw_offset, 3, "dst (%d,%d)\n", @@ -2509,7 +2656,7 @@ return len; case 0x7a00: - if (IS_GEN6(devid)) { + if (intel_gen(devid) >= 6) { int i; len = (data[0] & 0xff) + 2; if (len != 4 && len != 5) @@ -2525,17 +2672,27 @@ } instr_out(data, hw_offset, 0, "PIPE_CONTROL\n"); instr_out(data, hw_offset, 1, - "%s, %scs stall, %stlb invalidate, " - "%ssync gfdt, %sdepth stall, %sRC write flush, " - "%sinst flush, %sTC flush\n", + "%s, %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", desc1, - data[1] & (1 << 20) ? "" : "no ", - data[1] & (1 << 18) ? "" : "no ", - data[1] & (1 << 17) ? "" : "no ", - data[1] & (1 << 13) ? "" : "no ", - data[1] & (1 << 12) ? "" : "no ", - data[1] & (1 << 11) ? "" : "no ", - data[1] & (1 << 10) ? "" : "no "); + data[1] & (1 << 20) ? "cs stall, " : "", + data[1] & (1 << 19) ? "global snapshot count reset, " : "", + data[1] & (1 << 18) ? "tlb invalidate, " : "", + data[1] & (1 << 17) ? "gfdt flush, " : "", + data[1] & (1 << 17) ? "media state clear, " : "", + data[1] & (1 << 13) ? "depth stall, " : "", + data[1] & (1 << 12) ? "render target cache flush, " : "", + data[1] & (1 << 11) ? "instruction cache invalidate, " : "", + data[1] & (1 << 10) ? "texture cache invalidate, " : "", + data[1] & (1 << 9) ? "indirect state invalidate, " : "", + data[1] & (1 << 8) ? "notify irq, " : "", + data[1] & (1 << 7) ? "PIPE_CONTROL flush, " : "", + data[1] & (1 << 6) ? "protect mem app_id, " : "", + data[1] & (1 << 5) ? "DC flush, " : "", + data[1] & (1 << 4) ? "vf fetch invalidate, " : "", + data[1] & (1 << 3) ? "constant cache invalidate, " : "", + data[1] & (1 << 2) ? "state cache invalidate, " : "", + data[1] & (1 << 1) ? "stall at scoreboard, " : "", + data[1] & (1 << 0) ? "depth cache flush, " : ""); if (len == 5) { instr_out(data, hw_offset, 2, "destination address\n"); instr_out(data, hw_offset, 3, "immediate dword low\n"); diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_dump_decode.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_dump_decode.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_dump_decode.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_dump_decode.c 2011-11-21 01:14:32.000000000 +0000 @@ -33,16 +33,20 @@ #include #include #include +#include #include "intel_decode.h" static void -read_bin_file (uint32_t devid, const char * filename) +read_bin_file(uint32_t devid, const char * filename) { uint32_t buf[16384]; int fd, offset, ret; - fd = open (filename, O_RDONLY); + if (!strcmp(filename, "-")) + fd = fileno(stdin); + else + fd = open (filename, O_RDONLY); if (fd < 0) { fprintf (stderr, "Failed to open %s: %s\n", filename, strerror (errno)); @@ -57,18 +61,142 @@ close (fd); } +static void +read_data_file(uint32_t devid, const char * filename) +{ + FILE *file; + uint32_t *data = NULL; + int data_size = 0, count = 0, line_number = 0, matched; + char *line = NULL; + size_t line_size; + uint32_t offset, value; + uint32_t gtt_offset = 0; + + if (!strcmp(filename, "-")) + file = stdin; + else + file = fopen (filename, "r"); + + if (file == NULL) { + fprintf (stderr, "Failed to open %s: %s\n", + filename, strerror (errno)); + exit (1); + } + + while (getline (&line, &line_size, file) > 0) { + line_number++; + + matched = sscanf (line, "%08x : %08x", &offset, &value); + if (matched != 2) { + printf("ignoring line %s", line); + + continue; + } + + count++; + + if (count > data_size) { + data_size = data_size ? data_size * 2 : 1024; + data = realloc (data, data_size * sizeof (uint32_t)); + if (data == NULL) { + fprintf (stderr, "Out of memory.\n"); + exit (1); + } + } + + data[count-1] = value; + } + + if (count) { + intel_decode (data, count, gtt_offset, devid, 0); + } + + free (data); + free (line); + + fclose (file); +} + +static void +read_autodetect_file(uint32_t devid, const char * filename) +{ + int binary = 0, c; + FILE *file; + + file = fopen (filename, "r"); + if (file == NULL) { + fprintf (stderr, "Failed to open %s: %s\n", + filename, strerror (errno)); + exit (1); + } + + while ((c = fgetc(file)) != EOF) { + /* totally lazy binary detector */ + if (c < 10) { + binary = 1; + break; + } + } + + fclose(file); + + if (binary == 1) + read_bin_file(devid, filename); + else + read_data_file(devid, filename); + +} + + int main (int argc, char *argv[]) { uint32_t devid = 0xa011; - int i; + int i, c; + int option_index = 0; + int binary = -1; + + static struct option long_options[] = { + {"devid", 1, 0, 'd'}, + {"ascii", 0, 0, 'a'}, + {"binary", 0, 0, 'b'} + }; + + while((c = getopt_long(argc, argv, "ab", + long_options, &option_index)) != -1) { + switch(c) { + case 'd': + devid = strtoul(optarg, NULL, 0); + break; + case 'b': + binary = 1; + break; + case 'a': + binary = 0; + break; + default: + printf("unkown command options\n"); + break; + } + } + + if (optind == argc) { + fprintf(stderr, "no input file given\n"); + exit(-1); + } - for (i = 1; i < argc; i++) { - if (strncmp (argv[i], "--devid=", 8) == 0) { - devid = atoi(argv[i] + 8); + for (i = optind; i < argc; i++) { + /* For stdin input, let's read as data file */ + if (!strcmp(argv[i], "-")) { + read_data_file(devid, argv[i]); continue; } - read_bin_file (devid, argv[i]); + if (binary == 1) + read_bin_file(devid, argv[i]); + else if (binary == 0) + read_data_file(devid, argv[i]); + else + read_autodetect_file(devid, argv[i]); } return 0; diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_error_decode.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_error_decode.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_error_decode.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_error_decode.c 2011-11-21 01:14:32.000000000 +0000 @@ -210,6 +210,28 @@ } static void +print_snb_fence(unsigned int devid, uint64_t fence) +{ + printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", + fence & 1 ? "" : "in", + fence & (1<<1) ? 'y' : 'x', + (int)(((fence>>32)&0xfff)+1)*128, + (uint32_t)fence & 0xfffff000, + (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); +} + +static void +print_i965_fence(unsigned int devid, uint64_t fence) +{ + printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n", + fence & 1 ? "" : "in", + fence & (1<<1) ? 'y' : 'x', + (int)(((fence>>2)&0x1ff)+1)*128, + (uint32_t)fence & 0xfffff000, + (uint32_t)(((fence>>32)&0xfffff000) - (fence&0xfffff000) + 4096)); +} + +static void print_i915_fence(unsigned int devid, uint64_t fence) { unsigned tile_width; @@ -240,8 +262,10 @@ static void print_fence(unsigned int devid, uint64_t fence) { - if (IS_965(devid)) { - return; + if (IS_GEN6(devid) || IS_GEN7(devid)) { + return print_snb_fence(devid, fence); + } else if (IS_GEN4(devid) || IS_GEN5(devid)) { + return print_i965_fence(devid, fence); } else if (IS_GEN3(devid)) { return print_i915_fence(devid, fence); } else { @@ -261,6 +285,7 @@ uint32_t offset, value; uint32_t gtt_offset = 0, new_gtt_offset; char *buffer_type[2] = { "ringbuffer", "batchbuffer" }; + char *ring_name = NULL; int is_batch = 1; while (getline (&line, &line_size, file) > 0) { @@ -269,17 +294,25 @@ dashes = strstr(line, "---"); if (dashes) { + char *new_ring_name = malloc(dashes - line); + strncpy(new_ring_name, line, dashes - line); + new_ring_name[dashes - line - 1] = '\0'; + matched = sscanf (dashes, "--- gtt_offset = 0x%08x\n", &new_gtt_offset); if (matched == 1) { if (count) { - printf("%s at 0x%08x:\n", - buffer_type[is_batch], gtt_offset); + printf("%s (%s) at 0x%08x:\n", + buffer_type[is_batch], + ring_name, + gtt_offset); intel_decode (data, count, gtt_offset, devid, 0); count = 0; } gtt_offset = new_gtt_offset; is_batch = 1; + free(ring_name); + ring_name = new_ring_name; continue; } @@ -287,13 +320,17 @@ &new_gtt_offset); if (matched == 1) { if (count) { - printf("%s at 0x%08x:\n", - buffer_type[is_batch], gtt_offset); + printf("%s (%s) at 0x%08x:\n", + buffer_type[is_batch], + ring_name, + gtt_offset); intel_decode (data, count, gtt_offset, devid, 0); count = 0; } gtt_offset = new_gtt_offset; is_batch = 0; + free(ring_name); + ring_name = new_ring_name; continue; } } @@ -302,18 +339,23 @@ if (matched != 2) { unsigned int reg; + /* display reg section is after the ringbuffers, don't mix them */ + if (count) { + printf("%s (%s) at 0x%08x:\n", + buffer_type[is_batch], + ring_name, + gtt_offset); + intel_decode (data, count, gtt_offset, devid, 0); + count = 0; + } + printf("%s", line); matched = sscanf (line, "PCI ID: 0x%04x\n", ®); if (matched == 1) { devid = reg; - if (IS_965(devid)) { - printf("Detected i965+ chipset\n"); - } else if (IS_GEN3(devid)) { - printf("Detected i9xx chipset\n"); - } else { - printf("Detected i8xx chipset\n"); - } + printf("Detected GEN%i chipset\n", + intel_gen(devid)); } matched = sscanf (line, " ACTHD: 0x%08x\n", ®); @@ -332,7 +374,7 @@ if (matched == 1) print_instdone (devid, -1, reg); - matched = sscanf (line, " fence[%i] = %8Lx\n", ®, &fence); + matched = sscanf (line, " fence[%i] = %Lx\n", ®, &fence); if (matched == 2) print_fence (devid, fence); @@ -354,12 +396,16 @@ } if (count) { - printf("%s at 0x%08x:\n", buffer_type[is_batch], gtt_offset); + printf("%s (%s) at 0x%08x:\n", + buffer_type[is_batch], + ring_name, + gtt_offset); intel_decode (data, count, gtt_offset, devid, 0); } free (data); free (line); + free (ring_name); } int diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_abrt intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_abrt --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_abrt 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_abrt 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,45 @@ +#!/bin/sh + +if [ -d /debug/dri ] ; then + debugfs_path=/debug_dri +fi + +if [ -d /sys/kernel/debug/dri ] ; then + debugfs_path=/sys/kernel/debug/dri +fi + +i915_debugfs=x +for dir in `ls $debugfs_path` ; do + if [ -f $debugfs_path/$dir/i915_error_state ] ; then + i915_debugfs=$debugfs_path/$dir + break + fi +done + +if [ $i915_debugfs = "x" ] ; then + echo i915 debugfs path not found. + exit 1 +fi + +tmpdir=`mktemp -d` +tardir=$tmpdir/intel_gpu_abrt +mkdir $tardir + +mkdir $tardir/debugfs +cp $i915_debugfs/* $tardir/debugfs + +mkdir $tardir/mod_opts +cp /sys/module/i915/parameters/* $tardir/mod_opts + +mkdir $tardir/X +cp /var/log/Xorg.*.log $tardir/X +cp /etc/X11/xorg.conf $tardir/X + +dmesg > $tardir/dmesg +lspci -nn > $tardir/lspci + +(cd $tmpdir; tar -c intel_gpu_abrt ) > intel_gpu_abrt.tar + +rm $tmpdir -Rf + +exit 0 diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_dump.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_dump.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_dump.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_dump.c 1970-01-01 00:00:00.000000000 +0000 @@ -1,396 +0,0 @@ -/* -*- c-basic-offset: 4 -*- */ -/* - * Copyright © 2007 Intel Corporation - * Copyright © 2009 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Eric Anholt - * Carl Worth - * - */ - -/** @file intel_decode.c - * This file contains code to print out batchbuffer contents in a - * human-readable format. - * - * The current version only supports i915 packets, and only pretty-prints a - * subset of them. The intention is for it to make just a best attempt to - * decode, but never crash in the process. - */ - -#define _GNU_SOURCE -#include -#include -#include -#include -#include -#include -#include -#include - -#include "intel_decode.h" -#include "intel_chipset.h" -#include "intel_gpu_tools.h" -#include "instdone.h" - -static void -print_instdone (unsigned int instdone, unsigned int instdone1) -{ - int i; - - for (i = 0; i < num_instdone_bits; i++) { - int busy = 0; - - if (instdone_bits[i].reg == INST_DONE_1) { - if (!(instdone1 & instdone_bits[i].bit)) - busy = 1; - } else { - if (!(instdone & instdone_bits[i].bit)) - busy = 1; - } - - if (busy) - printf(" busy: %s\n", instdone_bits[i].name); - } -} - -/* Read a data file of the following form: - * - * Offset0 : Data0 - * Offset1 : Data1 - * ... - * - * Where both Offset and Data are ASCII representations of 8-digit - * hexadecimal numbers. - * - * After this function returns, *data will point to an allocated - * buffer, (which should be free()ed by the caller), and *count will - * indicate the number of data values read from the filename. - * - * Note: The values of the offset field are currently ignored. There - * are no guarantees that errors will be detected at all, (but for any - * error that is detected, this function is likely to just call - * exit()). - */ -static void -read_data_file (uint32_t devid, const char * filename, int is_batch) -{ - FILE *file; - uint32_t *data = NULL; - int data_size = 0, count = 0, line_number = 0, matched; - char *line = NULL; - size_t line_size; - uint32_t offset, value; - uint32_t gtt_offset = 0, new_gtt_offset; - char *buffer_type[2] = { "ringbuffer", "batchbuffer" }; - - file = fopen (filename, "r"); - if (file == NULL) { - fprintf (stderr, "Failed to open %s: %s\n", - filename, strerror (errno)); - exit (1); - } - - while (getline (&line, &line_size, file) > 0) { - line_number++; - - matched = sscanf (line, "--- gtt_offset = 0x%08x\n", &new_gtt_offset); - if (matched == 1) { - if (count) { - printf("%s at 0x%08x:\n", buffer_type[is_batch], gtt_offset); - intel_decode (data, count, gtt_offset, devid, 0); - count = 0; - } - gtt_offset = new_gtt_offset; - is_batch = 1; - continue; - } - - matched = sscanf (line, "--- ringbuffer = 0x%08x\n", &new_gtt_offset); - if (matched == 1) { - if (count) { - printf("%s at 0x%08x:\n", buffer_type[is_batch], gtt_offset); - intel_decode (data, count, gtt_offset, devid, 0); - count = 0; - } - gtt_offset = new_gtt_offset; - is_batch = 0; - continue; - } - - matched = sscanf (line, "%08x : %08x", &offset, &value); - if (matched != 2) { - unsigned int reg; - - printf("%s", line); - - matched = sscanf (line, " ACTHD: 0x%08x\n", ®); - if (matched) - intel_decode_context_set_head_tail(reg, 0xffffffff); - - matched = sscanf (line, " INSTDONE: 0x%08x\n", ®); - if (matched) - print_instdone (reg, -1); - - matched = sscanf (line, " INSTDONE1: 0x%08x\n", ®); - if (matched) - print_instdone (-1, reg); - - continue; - } - - count++; - - if (count > data_size) { - data_size = data_size ? data_size * 2 : 1024; - data = realloc (data, data_size * sizeof (uint32_t)); - if (data == NULL) { - fprintf (stderr, "Out of memory.\n"); - exit (1); - } - } - - data[count-1] = value; - } - - if (count) { - printf("%s at 0x%08x:\n", buffer_type[is_batch], gtt_offset); - intel_decode (data, count, gtt_offset, devid, 0); - } - - free (data); - free (line); - - fclose (file); -} - -/* Grab the head/tail pointers we know about so we can annotate the batch - * and ring dumps. - */ -static void -parse_ringbuffer_info(const char *filename, - uint32_t *ring_head, uint32_t *ring_tail, - uint32_t *acthd) -{ - FILE *file; - int matched; - char *line = NULL; - size_t line_size; - - *ring_head = 0xffffffff; - *ring_tail = 0xffffffff; - *acthd = 0xffffffff; - - file = fopen (filename, "r"); - if (file == NULL) { - fprintf (stderr, "Failed to open %s: %s\n", - filename, strerror (errno)); - exit (1); - } - - while (getline (&line, &line_size, file) > 0) { - uint32_t val; - - matched = sscanf (line, "RingHead : %x\n", &val); - if (matched == 1) { - *ring_head = val; - continue; - } - - matched = sscanf (line, "RingTail : %x\n", &val); - if (matched == 1) { - *ring_tail = val; - continue; - } - - matched = sscanf (line, "Acthd : %x\n", &val); - if (matched == 1) { - *acthd = val; - continue; - } - } - - free (line); - - fclose (file); -} - -/* By default, we grab the state of the current hardware - * by looking into the various debugfs nodes and grabbing all the - * relevant data. - * - * A secondary mode is to interpret a file with data captured - * previously. This is less interesting since a single file won't have - * compelte information, (we want both ringbuffer plus batchbuffer as - * well as error-status registers, etc). But for now, we'll start with - * this secondary mode as we let this program mature. - */ -int -main (int argc, char *argv[]) -{ - char filename[4096]; - const char *path; - struct stat st; - int err; - uint32_t devid; - uint32_t instdone, instdone1 = 0; - struct pci_device *pci_dev; - - if (argc > 2) { - fprintf (stderr, - "intel_gpu_dump: Parse an Intel GPU ringbuffer/batchbuffer state\n" - "\n" - "Usage:\n" - "\t%s\n" - "\t%s \n" - "\t%s \n" - "\n" - "With no arguments, debugfs-dri-directory is probed for in " - "/debug and \n" - "/sys/kernel/debug. Otherwise, it may be " - "specified. If a file is given,\n" - "it is parsed as a batchbuffer in the format of " - "/debug/dri/0/i915_batchbuffers.\n", - argv[0], argv[0], argv[0]); - return 1; - } - - pci_dev = intel_get_pci_device(); - devid = pci_dev->device_id; - intel_get_mmio(pci_dev); - init_instdone_definitions(devid); - - if (argc == 1) { - path = "/debug/dri/0"; - err = stat(path, &st); - if (err != 0) { - path = "/sys/kernel/debug/dri/0"; - err = stat(path, &st); - if (err != 0) { - errx(1, - "Couldn't find i915 debugfs directory.\n\n" - "Is debugfs mounted? You might try mounting it with a command such as:\n\n" - "\tsudo mount -t debugfs debugfs /sys/kernel/debug\n"); - } - } - } else { - path = argv[1]; - err = stat(path, &st); - if (err != 0) { - fprintf (stderr, "Error opening %s: %s\n", - path, strerror (errno)); - exit (1); - } - } - - if (S_ISDIR(st.st_mode)) { - uint32_t ring_head, ring_tail, acthd; - - snprintf(filename, sizeof(filename), - "%s/i915_ringbuffer_info", path); - - err = stat(filename, &st); - if (err != 0) { - fprintf (stderr, - "Error opening %s: %s\n\n" - "Perhaps your i915 kernel driver has no support for " - "dumping batchbuffer data?\n" - "(In kernels prior to 2.6.30 this requires " - "manually-applied patches.)\n", - filename, strerror (errno)); - exit (1); - } - - parse_ringbuffer_info(filename, &ring_head, &ring_tail, &acthd); - - printf("ACTHD: 0x%08x\n", acthd); - printf("EIR: 0x%08x\n", INREG(EIR)); - printf("EMR: 0x%08x\n", INREG(EMR)); - printf("ESR: 0x%08x\n", INREG(ESR)); - printf("PGTBL_ER: 0x%08x\n", INREG(PGTBL_ER)); - - if (IS_GEN6(devid) || IS_GEN7(devid)) { - instdone = INREG(GEN6_INSTDONE_1); - instdone1 = INREG(GEN6_INSTDONE_2); - - printf("IPEHR: 0x%08x\n", INREG(IPEHR_I965)); - printf("IPEIR: 0x%08x\n", INREG(IPEIR_I965)); - printf("INSTDONE1: 0x%08x\n", instdone); - printf("INSTDONE2: 0x%08x\n", instdone1); - } else if (IS_965(devid)) { - instdone = INREG(INST_DONE_I965); - instdone1 = INREG(INST_DONE_1); - - printf("IPEHR: 0x%08x\n", INREG(IPEHR_I965)); - printf("IPEIR: 0x%08x\n", INREG(IPEIR_I965)); - printf("INSTDONE: 0x%08x\n", instdone); - printf("INSTDONE1: 0x%08x\n", instdone1); - } else { - instdone = INREG(INST_DONE); - - printf("IPEHR: 0x%08x\n", INREG(IPEHR)); - printf("IPEIR: 0x%08x\n", INREG(IPEIR)); - printf("INSTDONE: 0x%08x\n", instdone); - } - - print_instdone (instdone, instdone1); - - snprintf(filename, sizeof(filename), "%s/i915_batchbuffers", path); - intel_decode_context_set_head_tail(acthd, 0xffffffff); - read_data_file (devid, filename, 1); - - snprintf(filename, sizeof(filename), "%s/i915_ringbuffer_data", path); - intel_decode_context_set_head_tail(ring_head, ring_tail); - printf("Ringbuffer: "); - printf("Reminder: head pointer is GPU read, tail pointer is CPU " - "write\n"); - read_data_file (devid, filename, 0); - - snprintf(filename, sizeof(filename), - "%s/i915_blt_ringbuffer_info", path); - if (stat(filename, &st) == 0) { - parse_ringbuffer_info(filename, &ring_head, &ring_tail, &acthd); - - snprintf(filename, sizeof(filename), - "%s/i915_blt_ringbuffer_data", path); - intel_decode_context_set_head_tail(ring_head, ring_tail); - printf("BLT Ringbuffer: "); - read_data_file (devid, filename, 0); - } - - snprintf(filename, sizeof(filename), - "%s/i915_bsd_ringbuffer_info", path); - if (stat(filename, &st) == 0) { - parse_ringbuffer_info(filename, &ring_head, &ring_tail, &acthd); - - snprintf(filename, sizeof(filename), - "%s/i915_bsd_ringbuffer_data", path); - intel_decode_context_set_head_tail(ring_head, ring_tail); - printf("BSD Ringbuffer: "); - read_data_file (devid, filename, 0); - } - } else { - read_data_file (devid, path, 1); - } - - return 0; -} diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_top.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_top.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_gpu_top.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_gpu_top.c 2011-11-21 01:14:32.000000000 +0000 @@ -1,5 +1,6 @@ /* * Copyright © 2007 Intel Corporation + * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -22,6 +23,7 @@ * * Authors: * Eric Anholt + * Eugeni Dodonov * */ @@ -30,6 +32,9 @@ #include #include #include +#include +#include +#include #include "intel_gpu_tools.h" #include "instdone.h" @@ -104,6 +109,14 @@ uint64_t stats[STATS_COUNT]; uint64_t last_stats[STATS_COUNT]; +static unsigned long +gettime(void) +{ + struct timeval t; + gettimeofday(&t, NULL); + return (t.tv_usec + (t.tv_sec * 1000000)); +} + static int top_bits_sort(const void *a, const void *b) { @@ -297,33 +310,6 @@ int idle; }; -static void gen6_force_wake_get(void) -{ - int count; - - if (!IS_GEN6(devid)) - return; - - /* This will probably have undesirable side-effects upon the system. */ - count = 0; - while (count++ < 50 && (INREG(FORCEWAKE_ACK) & 1)) - usleep(10); - - OUTREG(FORCEWAKE, 1); - - count = 0; - while (count++ < 50 && (INREG(FORCEWAKE_ACK) & 1) == 0) - usleep(10); -} - -static void gen6_force_wake_put(void) -{ - if (!IS_GEN6(devid)) - return; - - OUTREG(FORCEWAKE, 0); -} - static uint32_t ring_read(struct ring *ring, uint32_t reg) { return INREG(ring->mmio + reg); @@ -331,9 +317,7 @@ static void ring_init(struct ring *ring) { - gen6_force_wake_get(); ring->size = (((ring_read(ring, RING_LEN) & RING_NR_PAGES) >> 12) + 1) * 4096; - gen6_force_wake_put(); } static void ring_reset(struct ring *ring) @@ -348,10 +332,8 @@ if (!ring->size) return; - gen6_force_wake_get(); ring->head = ring_read(ring, RING_HEAD) & HEAD_ADDR; ring->tail = ring_read(ring, RING_TAIL) & TAIL_ADDR; - gen6_force_wake_put(); if (ring->tail == ring->head) ring->idle++; @@ -362,21 +344,59 @@ ring->full += full; } -static void ring_print(struct ring *ring) +static void ring_print_header(FILE *out, struct ring *ring) { - int percent, len; + fprintf(out, "%.6s%%\tops\t", + ring->name + ); +} + +static void ring_print(struct ring *ring, unsigned long samples_per_sec) +{ + int percent_busy, len; if (!ring->size) return; - percent = 100 - ring->idle / SAMPLES_TO_PERCENT_RATIO; - len = printf("%25s busy: %3d%%: ", ring->name, percent); - print_percentage_bar (percent, len); - printf("%24s space: %d/%d (%d%%)\n", - ring->name, - (int)(ring->full / SAMPLES_PER_SEC), - ring->size, - (int)((ring->full / SAMPLES_TO_PERCENT_RATIO) / ring->size)); + percent_busy = 100 - 100 * ring->idle / samples_per_sec; + + len = printf("%25s busy: %3d%%: ", ring->name, percent_busy); + print_percentage_bar (percent_busy, len); + printf("%24s space: %d/%d\n", + ring->name, + (int)(ring->full / samples_per_sec), + ring->size); +} + +static void ring_log(struct ring *ring, unsigned long samples_per_sec, + FILE *output) +{ + if (ring->size) + fprintf(output, "%3d\t%d\t", + (int)(100 - 100 * ring->idle / samples_per_sec), + (int)(ring->full / samples_per_sec)); + else + fprintf(output, "-1\t-1\t"); +} + +static void +usage(const char *appname) +{ + printf("intel_gpu_top - Display a top-like summary of Intel GPU usage\n" + "\n" + "usage: %s [parameters]\n" + "\n" + "The following parameters apply:\n" + "[-s ] samples per seconds (default %d)\n" + "[-e ] command to profile\n" + "[-o ] output statistics to file. If file is '-'," + " run in batch mode and output statistics to stdio only \n" + "[-h] show this help screen\n" + "\n", + appname, + SAMPLES_PER_SEC + ); + return; } int main(int argc, char **argv) @@ -395,19 +415,97 @@ .name = "blitter", .mmio = 0x22030, }; - int i; + int i, ch; + int samples_per_sec = SAMPLES_PER_SEC; + FILE *output = NULL; + double elapsed_time=0; + int print_headers=1; + pid_t child_pid=-1; + int child_stat; + char *cmd=NULL; + int interactive=1; + + /* Parse options? */ + while ((ch = getopt(argc, argv, "s:o:e:h")) != -1) { + switch (ch) { + case 'e': cmd = strdup(optarg); + break; + case 's': samples_per_sec = atoi(optarg); + if (samples_per_sec < 100) { + fprintf(stderr, "Error: samples per second must be >= 100\n"); + exit(1); + } + break; + case 'o': + if (!strcmp(optarg, "-")) { + /* Running in non-interactive mode */ + interactive = 0; + output = stdout; + } + else + output = fopen(optarg, "w"); + if (!output) + { + perror("fopen"); + exit(1); + } + break; + case 'h': + usage(argv[0]); + exit(0); + break; + default: + fprintf(stderr, "Invalid flag %c!\n", (char)optopt); + usage(argv[0]); + exit(1); + break; + } + } + argc -= optind; + argv += optind; pci_dev = intel_get_pci_device(); devid = pci_dev->device_id; intel_get_mmio(pci_dev); init_instdone_definitions(devid); + /* Do we have a command to run? */ + if (cmd != NULL) { + if (output) { + fprintf(output, "# Profiling: %s\n", cmd); + fflush(output); + } + child_pid = fork(); + if (child_pid < 0) { + perror("fork"); + exit(1); + } + else if (child_pid == 0) { + int res; + res = system(cmd); + free(cmd); + if (res < 0) + perror("running command"); + if (output) { + fflush(output); + fprintf(output, "# %s exited with status %d\n", cmd, res); + fflush(output); + } + exit(0); + } else { + free(cmd); + } + } + for (i = 0; i < num_instdone_bits; i++) { top_bits[i].bit = &instdone_bits[i]; top_bits[i].count = 0; top_bits_sorted[i] = &top_bits[i]; } + /* Grab access to the registers */ + intel_register_access_init(pci_dev, 1); + ring_init(&render_ring); if (IS_GEN4(devid) || IS_GEN5(devid)) ring_init(&bsd_ring); @@ -416,20 +514,43 @@ ring_init(&blt_ring); } + /* Initialize GPU stats */ + if (HAS_STATS_REGS(devid)) { + for (i = 0; i < STATS_COUNT; i++) { + uint32_t stats_high, stats_low, stats_high_2; + + do { + stats_high = INREG(stats_regs[i] + 4); + stats_low = INREG(stats_regs[i]); + stats_high_2 = INREG(stats_regs[i] + 4); + } while (stats_high != stats_high_2); + + last_stats[i] = (uint64_t)stats_high << 32 | + stats_low; + } + } + for (;;) { int j; + unsigned long long t1, ti, tf, t2; + unsigned long long def_sleep = 1000000 / samples_per_sec; + unsigned long long last_samples_per_sec = samples_per_sec; char clear_screen[] = {0x1b, '[', 'H', 0x1b, '[', 'J', 0x0}; int percent; int len; + t1 = gettime(); + ring_reset(&render_ring); ring_reset(&bsd_ring); ring_reset(&bsd6_ring); ring_reset(&blt_ring); - for (i = 0; i < SAMPLES_PER_SEC; i++) { + for (i = 0; i < samples_per_sec; i++) { + long long interval; + ti = gettime(); if (IS_965(devid)) { instdone = INREG(INST_DONE_I965); instdone1 = INREG(INST_DONE_1); @@ -443,7 +564,16 @@ ring_sample(&bsd_ring); ring_sample(&bsd6_ring); ring_sample(&blt_ring); - usleep(1000000 / SAMPLES_PER_SEC); + + tf = gettime(); + if (tf - t1 >= 1000000) { + /* We are out of sync, bail out */ + last_samples_per_sec = i+1; + break; + } + interval = def_sleep - (tf - ti); + if (interval > 0) + usleep(interval); } if (HAS_STATS_REGS(devid)) { @@ -473,39 +603,83 @@ if (max_lines >= num_instdone_bits) max_lines = num_instdone_bits; - printf("%s", clear_screen); - - print_clock_info(pci_dev); + t2 = gettime(); + elapsed_time += (t2 - t1) / 1000000.0; - ring_print(&render_ring); - ring_print(&bsd_ring); - ring_print(&bsd6_ring); - ring_print(&blt_ring); - - printf("\n%30s %s\n", "task", "percent busy"); - for (i = 0; i < max_lines; i++) { - if (top_bits_sorted[i]->count > 0) { - percent = top_bits_sorted[i]->count / - SAMPLES_TO_PERCENT_RATIO; - len = printf("%30s: %3d%%: ", - top_bits_sorted[i]->bit->name, - percent); - print_percentage_bar (percent, len); - } else { - printf("%*s", PERCENTAGE_BAR_END, ""); + if (interactive) { + printf("%s", clear_screen); + print_clock_info(pci_dev); + + ring_print(&render_ring, last_samples_per_sec); + ring_print(&bsd_ring, last_samples_per_sec); + ring_print(&bsd6_ring, last_samples_per_sec); + ring_print(&blt_ring, last_samples_per_sec); + + printf("\n%30s %s\n", "task", "percent busy"); + for (i = 0; i < max_lines; i++) { + if (top_bits_sorted[i]->count > 0) { + percent = (top_bits_sorted[i]->count * 100) / + last_samples_per_sec; + len = printf("%30s: %3d%%: ", + top_bits_sorted[i]->bit->name, + percent); + print_percentage_bar (percent, len); + } else { + printf("%*s", PERCENTAGE_BAR_END, ""); + } + + if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { + printf("%13s: %llu (%lld/sec)", + stats_reg_names[i], + (long long)stats[i], + (long long)(stats[i] - last_stats[i])); + last_stats[i] = stats[i]; + } else { + if (!top_bits_sorted[i]->count) + break; + } + printf("\n"); + } + } + if (output) { + /* Print headers for columns at first run */ + if (print_headers) { + fprintf(output, "# time\t"); + ring_print_header(output, &render_ring); + ring_print_header(output, &bsd_ring); + ring_print_header(output, &bsd6_ring); + ring_print_header(output, &blt_ring); + for (i = 0; i < MAX_NUM_TOP_BITS; i++) { + if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { + fprintf(output, "%.6s\t", + stats_reg_names[i] + ); + } + if (!top_bits[i].count) + continue; + } + fprintf(output, "\n"); + print_headers = 0; } - if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { - printf("%13s: %llu (%lld/sec)", - stats_reg_names[i], - stats[i], - stats[i] - last_stats[i]); - last_stats[i] = stats[i]; - } else { - if (!top_bits_sorted[i]->count) - break; + /* Print statistics */ + fprintf(output, "%.2f\t", elapsed_time); + ring_log(&render_ring, last_samples_per_sec, output); + ring_log(&bsd_ring, last_samples_per_sec, output); + ring_log(&bsd6_ring, last_samples_per_sec, output); + ring_log(&blt_ring, last_samples_per_sec, output); + + for (i = 0; i < MAX_NUM_TOP_BITS; i++) { + if (i < STATS_COUNT && HAS_STATS_REGS(devid)) { + fprintf(output, "%lu\t", + stats[i] - last_stats[i]); + last_stats[i] = stats[i]; + } + if (!top_bits[i].count) + continue; } - printf("\n"); + fprintf(output, "\n"); + fflush(output); } for (i = 0; i < num_instdone_bits; i++) { @@ -514,7 +688,23 @@ if (i < STATS_COUNT) last_stats[i] = stats[i]; } + + /* Check if child has gone */ + if (child_pid > 0) { + int res; + if ((res = waitpid(child_pid, &child_stat, WNOHANG)) == -1) { + perror("waitpid"); + exit(1); + } + if (res == 0) + continue; + if (WIFEXITED(child_stat)) + break; + } } + fclose(output); + + intel_register_access_fini(); return 0; } diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_reg_checker.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_reg_checker.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_reg_checker.c 1970-01-01 00:00:00.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_reg_checker.c 2011-11-21 01:14:32.000000000 +0000 @@ -0,0 +1,399 @@ +/* Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include +#include +#include "intel_gpu_tools.h" + +static uint32_t devid; +static int gen; + +static inline uint32_t +read_reg(uint32_t reg) +{ + return *(volatile uint32_t *)((volatile char *)mmio + reg); +} + +static uint32_t +read_and_print_reg(const char *name, uint32_t reg) +{ + uint32_t val = read_reg(reg); + + printf("%s (0x%x): 0x%08x\n", name, reg, val); + + return val; +} + +static void +check_chicken_unset(const char *name, uint32_t reg) +{ + uint32_t val = read_and_print_reg(name, reg); + + + if (val != 0) { + fprintf(stderr, " WARN: chicken bits set\n"); + } else { + printf(" OK: chicken bits unset\n"); + } +} + +static void +check_bit(uint32_t val, int bit, const char *bitname, bool set) +{ + if (!!(val & (1 << bit)) != set) { + fprintf(stderr, " (bit %2d) FAIL: %s must be %s\n", + bit, bitname, set ? "set" : "unset"); + } else { + printf(" (bit %2d) OK: %s\n", bit, bitname); + } +} + +static void +check_perf_bit(uint32_t val, int bit, const char *bitname, bool set) +{ + if (!!(val & (1 << bit)) != set) { + printf(" (bit %2d) PERF: %s should be %s\n", + bit, bitname, set ? "set" : "unset"); + } else { + printf(" (bit %2d) OK: %s\n", bit, bitname); + } +} + +static void +check_mi_mode(void) +{ + /* Described in page 14-16 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + + uint32_t mi_mode = read_and_print_reg("MI_MODE", 0x209c); + + /* From page 14: + * + * Async Flip Performance mode + * Project: All + * Default Value: 0h + * Format: U1 + * [DevSNB] This bit must be set to ‘1’ + */ + if (gen == 6) + check_bit(mi_mode, 14, "Async Flip Performance mode", true); + else + check_perf_bit(mi_mode, 14, "Async Flip Performance mode", + false); + + check_perf_bit(mi_mode, 13, "Flush Performance Mode", false); + + /* Our driver relies on MI_FLUSH, unfortunately. */ + if (gen >= 6) + check_bit(mi_mode, 12, "MI_FLUSH enable", true); + + /* From page 15: + * + * "1h: LRA mode of allocation. Used for validation purposes" + */ + if (gen < 7) + check_bit(mi_mode, 7, "Vertex Shader Cache Mode", false); + + /* From page 16: + * + * "To avoid deadlock conditions in hardware this bit + * needs to be set for normal operation. + */ + check_bit(mi_mode, 6, "Vertex Shader Timer Dispatch Enable", true); +} + +static void +check_gfx_mode(void) +{ + /* Described in page 17-19 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + uint32_t gfx_mode; + + if (gen < 6) + return; + + if (gen == 6) + gfx_mode = read_and_print_reg("GFX_MODE", 0x2520); + else + gfx_mode = read_and_print_reg("GFX_MODE", 0x229c); + + /* Our driver only updates page tables at batchbuffer + * boundaries, so we don't need TLB flushes at other times. + */ + check_perf_bit(gfx_mode, 13, "Flush TLB Invalidation Mode", true); +} + +static void +check_gt_mode(void) +{ + /* Described in page 20-22 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + uint32_t gt_mode; + + if (gen < 6) + return; + + if (gen == 6) + gt_mode = read_and_print_reg("GT_MODE", 0x20d0); + else + gt_mode = read_and_print_reg("GT_MODE", 0x7008); + + if (gen == 6) + check_perf_bit(gt_mode, 8, "Full Rate Sampler Disable", false); + + /* For DevSmallGT, this bit must be set, which means disable + * hashing. + */ + if (devid == PCI_CHIP_SANDYBRIDGE_GT1 || + devid == PCI_CHIP_SANDYBRIDGE_M_GT1) + check_bit(gt_mode, 6, "WIZ Hashing disable", true); + else if (gen == 6) + check_perf_bit(gt_mode, 6, "WIZ Hashing disable", false); + + if (gen == 6) { + check_perf_bit(gt_mode, 5, "TD Four Row Dispatch Disable", + false); + check_perf_bit(gt_mode, 4, "Full Size URB Disable", false); + check_perf_bit(gt_mode, 3, "Full Size SF FIFO Disable", false); + check_perf_bit(gt_mode, 1, "VS Quad Thread Dispatch Disable", + false); + } +} + +static void +check_cache_mode_0(void) +{ + /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + uint32_t cache_mode_0; + + if (gen >= 7) + cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x7000); + else + cache_mode_0 = read_and_print_reg("CACHE_MODE_0", 0x2120); + + check_perf_bit(cache_mode_0, 15, "Sampler L2 Disable", false); + check_perf_bit(cache_mode_0, 9, "Sampler L2 TLB Prefetch Enable", true); + check_perf_bit(cache_mode_0, 8, + "Depth Related Cache Pipelined Flush Disable", false); + + /* From page 24: + * + * "If this bit is set, RCCunit will have LRA as + * replacement policy. The default value i.e. ( when this + * bit is reset ) indicates that non-LRA eviction + * policy. This bit must be reset. LRA replacement policy + * is not supported." + * + * And the same for STC Eviction Policy. + */ + check_bit(cache_mode_0, 5, "STC LRA Eviction Policy", false); + if (gen >= 6) + check_bit(cache_mode_0, 4, "RCC LRA Eviction Policy", false); + + check_perf_bit(cache_mode_0, 3, "Hierarchical Z Disable", false); + + if (gen == 6) { + check_perf_bit(cache_mode_0, 2, + "Hierarchical Z RAW Stall Optimization " + "Disable", false); + } + + /* From page 25: + * + * "This bit must be 0. Operational Flushes [DevSNB] are + * not supported in [DevSNB]. SW must flush the render + * target after front buffer rendering." + */ + check_bit(cache_mode_0, 0, "Render Cache Operational Flush", false); +} + + +static void +check_cache_mode_1(void) +{ + /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + uint32_t cache_mode_1; + + if (gen >= 7) + cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x7004); + else + cache_mode_1 = read_and_print_reg("CACHE_MODE_1", 0x2124); + + if (gen >= 7) { + check_perf_bit(cache_mode_1, 13, + "STC Address Lookup Optimization Disable", + false); + } + + /* From page 24: + * + * "If this bit is set, Hizunit will have LRA as + * replacement policy. The default value i.e. (when this + * bit is reset) indicates the non-LRA eviction + * policy. For performance reasons, this bit must be + * reset." + */ + check_bit(cache_mode_1, 12, "HIZ LRA Eviction Policy", false); + + /* Page 26 describes these bits as reserved (debug only). */ + check_bit(cache_mode_1, 11, + "DAP Instruction and State Cache Invalidate", false); + check_bit(cache_mode_1, 10, + "Instruction L1 Cache and In-Flight Queue Disable", + false); + check_bit(cache_mode_1, 9, "Instruction L2 Cache Fill Buffers Disable", + false); + + + if (gen >= 7) { + check_perf_bit(cache_mode_1, 6, + "Pixel Backend sub-span collection " + "Optimization Disable", + false); + check_perf_bit(cache_mode_1, 5, "MCS Cache Disable", false); + } + check_perf_bit(cache_mode_1, 4, "Data Disable", false); + + if (gen == 6) { + /* In a later update of the documentation, it says: + * + * "[DevSNB:A0{WKA1}] [DevSNB]: This bit must be + * set for depth buffer format + * D24_UNORM_S8_UINT." + * + * XXX: Does that mean A0 only, or all DevSNB? + */ + check_perf_bit(cache_mode_1, 3, + "Depth Read Hit Write-Only Optimization " + "Disable", false); + + check_perf_bit(cache_mode_1, 2, + "Depth Cache LRA Hunt Feature Disable", + false); + } + + check_bit(cache_mode_1, 1, "Instruction and State L2 Cache Disable", + false); + check_bit(cache_mode_1, 0, "Instruction and State L1 Cache Disable", + false); +} + + +static void +check_3d_chicken4(void) +{ + /* Described in page 23-25 of the IHD_OS_Vol1_Part3.pdf + * specification. + */ + uint32_t _3d_chicken4 = read_and_print_reg("3D_CHICKEN4", 0x20d4); + + check_perf_bit(_3d_chicken4, 6, "3D Scoreboard Hashing Enable", true); + + if (_3d_chicken4 & 0x0fbf) { + fprintf(stderr, + " WARN: other non-thread deps bits set\n"); + } else { + printf(" OK: other non-thread deps bits unset\n"); + } +} + +static void +check_dpfc_control_sa(void) +{ + uint32_t dpfc_control_sa; + + if (gen != 6) + return; + + dpfc_control_sa = read_and_print_reg("DPFC_CONTROL_SA", 0x100100); + + /* This is needed for framebuffer compression for us to be + * able to access the framebuffer by the CPU through the GTT. + */ + check_bit(dpfc_control_sa, 29, "CPU Fence Enable", true); +} + +int main(int argc, char** argv) +{ + struct pci_device *dev; + + dev = intel_get_pci_device(); + devid = dev->device_id; + intel_get_mmio(dev); + + if (IS_GEN7(devid)) + gen = 7; + else if (IS_GEN6(devid)) + gen = 6; + else if (IS_GEN5(devid)) + gen = 5; + else + gen = 4; + + check_mi_mode(); + check_gfx_mode(); + check_gt_mode(); + check_cache_mode_0(); + check_cache_mode_1(); + + if (gen < 7) { + check_chicken_unset("3D_CHICKEN", 0x2084); + check_chicken_unset("3D_CHICKEN2", 0x208c); + } else { + check_chicken_unset("FF_SLICE_CHICKEN", 0x2088); + } + if (gen >= 6) + check_chicken_unset("3D_CHICKEN3", 0x2090); + if (gen == 6) + check_3d_chicken4(); + + if (gen >= 7) { + check_chicken_unset("FF_SLICE_CS_CHICKEN1", 0x20e0); + check_chicken_unset("FF_SLICE_CS_CHICKEN2", 0x20e4); + check_chicken_unset("FF_SLICE_CS_CHICKEN3", 0x20e8); + check_chicken_unset("COMMON_SLICE_CHICKEN1", 0x7010); + check_chicken_unset("COMMON_SLICE_CHICKEN2", 0x7014); + check_chicken_unset("WM_CHICKEN", 0x5580); + check_chicken_unset("HALF_SLICE_CHICKEN", 0xe100); + check_chicken_unset("HALF_SLICE_CHICKEN2", 0xe180); + check_chicken_unset("ROW_CHICKEN", 0xe4f0); + check_chicken_unset("ROW_CHICKEN2", 0xe4f4); + } + + check_chicken_unset("ECOSKPD", 0x21d0); + + check_dpfc_control_sa(); + + return 0; +} + diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_reg_dumper.c intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_reg_dumper.c --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/intel_reg_dumper.c 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/intel_reg_dumper.c 2011-11-21 01:14:32.000000000 +0000 @@ -1319,7 +1319,8 @@ DEBUGSTRING(ironlake_debug_hdmi) { - char *enable, pipe, *bpc = NULL, *encoding; + int pipe; + char *enable, *bpc = NULL, *encoding; char *mode, *audio, *vsync, *hsync, *detect; if (val & PORT_ENABLE) @@ -1328,9 +1329,9 @@ enable = "disabled"; if (HAS_CPT) - pipe = (val & (1<<29)) ? 'B' : 'A'; + pipe = (val & (3<<29)) >> 29; else - pipe = (val & TRANSCODER_B) ? 'B' : 'A'; + pipe = (val & TRANSCODER_B) >> 29; switch (val & (7 << 26)) { case COLOR_FORMAT_8bpc: @@ -1372,7 +1373,7 @@ detect = "non-detected"; snprintf(result, len, "%s pipe %c %s %s %s audio %s %s %s %s", - enable, pipe, bpc, encoding, mode, audio, vsync, hsync, detect); + enable, pipe + 'A', bpc, encoding, mode, audio, vsync, hsync, detect); } DEBUGSTRING(snb_debug_dpll_sel) @@ -1427,6 +1428,9 @@ case TRANS_DP_PORT_SEL_D: port = "D"; break; + default: + port = "none"; + break; } switch (val & (7<<9)) { @@ -1624,6 +1628,7 @@ DEFINEREG2(FDI_TXA_CTL, ironlake_debug_fdi_tx_ctl), DEFINEREG2(FDI_TXB_CTL, ironlake_debug_fdi_tx_ctl), + DEFINEREG2(FDI_TXC_CTL, ironlake_debug_fdi_tx_ctl), DEFINEREG2(FDI_RXA_CTL, ironlake_debug_fdi_rx_ctl), DEFINEREG2(FDI_RXB_CTL, ironlake_debug_fdi_rx_ctl), DEFINEREG2(FDI_RXC_CTL, ironlake_debug_fdi_rx_ctl), diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/Makefile.am intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/Makefile.am --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/Makefile.am 2011-07-29 14:04:29.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/Makefile.am 2011-11-21 01:14:32.000000000 +0000 @@ -9,6 +9,7 @@ intel_gpu_time \ intel_gtt \ intel_stepping \ + intel_reg_checker \ intel_reg_dumper \ intel_reg_snapshot \ intel_reg_write \ @@ -16,17 +17,14 @@ forcewaked \ $(NULL) +bin_SCRIPTS = intel_gpu_abrt \ + $(NULL) + noinst_PROGRAMS = \ intel_dump_decode \ - intel_gpu_dump \ intel_lid \ $(NULL) -intel_gpu_dump_SOURCES = \ - intel_gpu_dump.c \ - intel_decode.c \ - intel_decode.h - intel_dump_decode_SOURCES = \ intel_dump_decode.c \ intel_decode.c \ @@ -41,6 +39,8 @@ intel_bios_reader.c \ intel_bios.h +EXTRA_DIST = $(bin_SCRIPTS) + LDADD = ../lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \ diff -Nru intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/Makefile.in intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/Makefile.in --- intel-gpu-tools-1.0.2+git20110729+3b10b7b/tools/Makefile.in 2011-07-29 14:04:38.000000000 +0000 +++ intel-gpu-tools-1.0.2+git20111120+2f56e96/tools/Makefile.in 2011-11-21 01:14:40.000000000 +0000 @@ -15,6 +15,7 @@ @SET_MAKE@ + VPATH = @srcdir@ pkgdatadir = $(datadir)/@PACKAGE@ pkgincludedir = $(includedir)/@PACKAGE@ @@ -39,11 +40,11 @@ intel_bios_dumper$(EXEEXT) intel_bios_reader$(EXEEXT) \ intel_error_decode$(EXEEXT) intel_gpu_top$(EXEEXT) \ intel_gpu_time$(EXEEXT) intel_gtt$(EXEEXT) \ - intel_stepping$(EXEEXT) intel_reg_dumper$(EXEEXT) \ - intel_reg_snapshot$(EXEEXT) intel_reg_write$(EXEEXT) \ - intel_reg_read$(EXEEXT) forcewaked$(EXEEXT) -noinst_PROGRAMS = intel_dump_decode$(EXEEXT) intel_gpu_dump$(EXEEXT) \ - intel_lid$(EXEEXT) + intel_stepping$(EXEEXT) intel_reg_checker$(EXEEXT) \ + intel_reg_dumper$(EXEEXT) intel_reg_snapshot$(EXEEXT) \ + intel_reg_write$(EXEEXT) intel_reg_read$(EXEEXT) \ + forcewaked$(EXEEXT) +noinst_PROGRAMS = intel_dump_decode$(EXEEXT) intel_lid$(EXEEXT) subdir = tools DIST_COMMON = $(srcdir)/Makefile.am $(srcdir)/Makefile.in ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 @@ -57,7 +58,7 @@ CONFIG_HEADER = $(top_builddir)/config.h CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = -am__installdirs = "$(DESTDIR)$(bindir)" +am__installdirs = "$(DESTDIR)$(bindir)" "$(DESTDIR)$(bindir)" PROGRAMS = $(bin_PROGRAMS) $(noinst_PROGRAMS) forcewaked_SOURCES = forcewaked.c forcewaked_OBJECTS = forcewaked.$(OBJEXT) @@ -106,12 +107,6 @@ intel_error_decode_LDADD = $(LDADD) intel_error_decode_DEPENDENCIES = ../lib/libintel_tools.la \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) -am_intel_gpu_dump_OBJECTS = intel_gpu_dump.$(OBJEXT) \ - intel_decode.$(OBJEXT) -intel_gpu_dump_OBJECTS = $(am_intel_gpu_dump_OBJECTS) -intel_gpu_dump_LDADD = $(LDADD) -intel_gpu_dump_DEPENDENCIES = ../lib/libintel_tools.la \ - $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) intel_gpu_time_SOURCES = intel_gpu_time.c intel_gpu_time_OBJECTS = intel_gpu_time.$(OBJEXT) intel_gpu_time_LDADD = $(LDADD) @@ -132,6 +127,11 @@ intel_lid_LDADD = $(LDADD) intel_lid_DEPENDENCIES = ../lib/libintel_tools.la \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +intel_reg_checker_SOURCES = intel_reg_checker.c +intel_reg_checker_OBJECTS = intel_reg_checker.$(OBJEXT) +intel_reg_checker_LDADD = $(LDADD) +intel_reg_checker_DEPENDENCIES = ../lib/libintel_tools.la \ + $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) intel_reg_dumper_SOURCES = intel_reg_dumper.c intel_reg_dumper_OBJECTS = intel_reg_dumper.$(OBJEXT) intel_reg_dumper_LDADD = $(LDADD) @@ -157,6 +157,28 @@ intel_stepping_LDADD = $(LDADD) intel_stepping_DEPENDENCIES = ../lib/libintel_tools.la \ $(am__DEPENDENCIES_1) $(am__DEPENDENCIES_1) +am__vpath_adj_setup = srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; +am__vpath_adj = case $$p in \ + $(srcdir)/*) f=`echo "$$p" | sed "s|^$$srcdirstrip/||"`;; \ + *) f=$$p;; \ + esac; +am__strip_dir = f=`echo $$p | sed -e 's|^.*/||'`; +am__install_max = 40 +am__nobase_strip_setup = \ + srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'` +am__nobase_strip = \ + for p in $$list; do echo "$$p"; done | sed -e "s|$$srcdirstrip/||" +am__nobase_list = $(am__nobase_strip_setup); \ + for p in $$list; do echo "$$p $$p"; done | \ + sed "s| $$srcdirstrip/| |;"' / .*\//!s/ .*/ ./; s,\( .*\)/[^/]*$$,\1,' | \ + $(AWK) 'BEGIN { files["."] = "" } { files[$$2] = files[$$2] " " $$1; \ + if (++n[$$2] == $(am__install_max)) \ + { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \ + END { for (dir in files) print dir, files[dir] }' +am__base_list = \ + sed '$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;$$!N;s/\n/ /g' | \ + sed '$$!N;$$!N;$$!N;$$!N;s/\n/ /g' +SCRIPTS = $(bin_SCRIPTS) DEFAULT_INCLUDES = -I.@am__isrc@ -I$(top_builddir) depcomp = $(SHELL) $(top_srcdir)/build-aux/depcomp am__depfiles_maybe = depfiles @@ -186,17 +208,17 @@ SOURCES = forcewaked.c intel_audio_dump.c intel_backlight.c \ intel_bios_dumper.c $(intel_bios_reader_SOURCES) \ intel_disable_clock_gating.c $(intel_dump_decode_SOURCES) \ - $(intel_error_decode_SOURCES) $(intel_gpu_dump_SOURCES) \ - intel_gpu_time.c intel_gpu_top.c intel_gtt.c intel_lid.c \ - intel_reg_dumper.c intel_reg_read.c intel_reg_snapshot.c \ - intel_reg_write.c intel_stepping.c + $(intel_error_decode_SOURCES) intel_gpu_time.c intel_gpu_top.c \ + intel_gtt.c intel_lid.c intel_reg_checker.c intel_reg_dumper.c \ + intel_reg_read.c intel_reg_snapshot.c intel_reg_write.c \ + intel_stepping.c DIST_SOURCES = forcewaked.c intel_audio_dump.c intel_backlight.c \ intel_bios_dumper.c $(intel_bios_reader_SOURCES) \ intel_disable_clock_gating.c $(intel_dump_decode_SOURCES) \ - $(intel_error_decode_SOURCES) $(intel_gpu_dump_SOURCES) \ - intel_gpu_time.c intel_gpu_top.c intel_gtt.c intel_lid.c \ - intel_reg_dumper.c intel_reg_read.c intel_reg_snapshot.c \ - intel_reg_write.c intel_stepping.c + $(intel_error_decode_SOURCES) intel_gpu_time.c intel_gpu_top.c \ + intel_gtt.c intel_lid.c intel_reg_checker.c intel_reg_dumper.c \ + intel_reg_read.c intel_reg_snapshot.c intel_reg_write.c \ + intel_stepping.c ETAGS = etags CTAGS = ctags DISTFILES = $(DIST_COMMON) $(DIST_SOURCES) $(TEXINFOS) $(EXTRA_DIST) @@ -239,6 +261,7 @@ FGREP = @FGREP@ FILE_MAN_DIR = @FILE_MAN_DIR@ FILE_MAN_SUFFIX = @FILE_MAN_SUFFIX@ +GEN4ASM = @GEN4ASM@ GLIB_CFLAGS = @GLIB_CFLAGS@ GLIB_LIBS = @GLIB_LIBS@ GREP = @GREP@ @@ -347,10 +370,8 @@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ -intel_gpu_dump_SOURCES = \ - intel_gpu_dump.c \ - intel_decode.c \ - intel_decode.h +bin_SCRIPTS = intel_gpu_abrt \ + $(NULL) intel_dump_decode_SOURCES = \ intel_dump_decode.c \ @@ -366,6 +387,7 @@ intel_bios_reader.c \ intel_bios.h +EXTRA_DIST = $(bin_SCRIPTS) LDADD = ../lib/libintel_tools.la $(DRM_LIBS) $(PCIACCESS_LIBS) AM_CFLAGS = $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) $(WARN_CFLAGS) \ -I$(srcdir)/.. \ @@ -481,9 +503,6 @@ intel_error_decode$(EXEEXT): $(intel_error_decode_OBJECTS) $(intel_error_decode_DEPENDENCIES) @rm -f intel_error_decode$(EXEEXT) $(AM_V_CCLD)$(LINK) $(intel_error_decode_OBJECTS) $(intel_error_decode_LDADD) $(LIBS) -intel_gpu_dump$(EXEEXT): $(intel_gpu_dump_OBJECTS) $(intel_gpu_dump_DEPENDENCIES) - @rm -f intel_gpu_dump$(EXEEXT) - $(AM_V_CCLD)$(LINK) $(intel_gpu_dump_OBJECTS) $(intel_gpu_dump_LDADD) $(LIBS) intel_gpu_time$(EXEEXT): $(intel_gpu_time_OBJECTS) $(intel_gpu_time_DEPENDENCIES) @rm -f intel_gpu_time$(EXEEXT) $(AM_V_CCLD)$(LINK) $(intel_gpu_time_OBJECTS) $(intel_gpu_time_LDADD) $(LIBS) @@ -496,6 +515,9 @@ intel_lid$(EXEEXT): $(intel_lid_OBJECTS) $(intel_lid_DEPENDENCIES) @rm -f intel_lid$(EXEEXT) $(AM_V_CCLD)$(LINK) $(intel_lid_OBJECTS) $(intel_lid_LDADD) $(LIBS) +intel_reg_checker$(EXEEXT): $(intel_reg_checker_OBJECTS) $(intel_reg_checker_DEPENDENCIES) + @rm -f intel_reg_checker$(EXEEXT) + $(AM_V_CCLD)$(LINK) $(intel_reg_checker_OBJECTS) $(intel_reg_checker_LDADD) $(LIBS) intel_reg_dumper$(EXEEXT): $(intel_reg_dumper_OBJECTS) $(intel_reg_dumper_DEPENDENCIES) @rm -f intel_reg_dumper$(EXEEXT) $(AM_V_CCLD)$(LINK) $(intel_reg_dumper_OBJECTS) $(intel_reg_dumper_LDADD) $(LIBS) @@ -511,6 +533,40 @@ intel_stepping$(EXEEXT): $(intel_stepping_OBJECTS) $(intel_stepping_DEPENDENCIES) @rm -f intel_stepping$(EXEEXT) $(AM_V_CCLD)$(LINK) $(intel_stepping_OBJECTS) $(intel_stepping_LDADD) $(LIBS) +install-binSCRIPTS: $(bin_SCRIPTS) + @$(NORMAL_INSTALL) + test -z "$(bindir)" || $(MKDIR_P) "$(DESTDIR)$(bindir)" + @list='$(bin_SCRIPTS)'; test -n "$(bindir)" || list=; \ + for p in $$list; do \ + if test -f "$$p"; then d=; else d="$(srcdir)/"; fi; \ + if test -f "$$d$$p"; then echo "$$d$$p"; echo "$$p"; else :; fi; \ + done | \ + sed -e 'p;s,.*/,,;n' \ + -e 'h;s|.*|.|' \ + -e 'p;x;s,.*/,,;$(transform)' | sed 'N;N;N;s,\n, ,g' | \ + $(AWK) 'BEGIN { files["."] = ""; dirs["."] = 1; } \ + { d=$$3; if (dirs[d] != 1) { print "d", d; dirs[d] = 1 } \ + if ($$2 == $$4) { files[d] = files[d] " " $$1; \ + if (++n[d] == $(am__install_max)) { \ + print "f", d, files[d]; n[d] = 0; files[d] = "" } } \ + else { print "f", d "/" $$4, $$1 } } \ + END { for (d in files) print "f", d, files[d] }' | \ + while read type dir files; do \ + if test "$$dir" = .; then dir=; else dir=/$$dir; fi; \ + test -z "$$files" || { \ + echo " $(INSTALL_SCRIPT) $$files '$(DESTDIR)$(bindir)$$dir'"; \ + $(INSTALL_SCRIPT) $$files "$(DESTDIR)$(bindir)$$dir" || exit $$?; \ + } \ + ; done + +uninstall-binSCRIPTS: + @$(NORMAL_UNINSTALL) + @list='$(bin_SCRIPTS)'; test -n "$(bindir)" || exit 0; \ + files=`for p in $$list; do echo "$$p"; done | \ + sed -e 's,.*/,,;$(transform)'`; \ + test -n "$$list" || exit 0; \ + echo " ( cd '$(DESTDIR)$(bindir)' && rm -f" $$files ")"; \ + cd "$(DESTDIR)$(bindir)" && rm -f $$files mostlyclean-compile: -rm -f *.$(OBJEXT) @@ -527,11 +583,11 @@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_disable_clock_gating.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_dump_decode.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_error_decode.Po@am__quote@ -@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_gpu_dump.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_gpu_time.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_gpu_top.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_gtt.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_lid.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_reg_checker.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_reg_dumper.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_reg_read.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/intel_reg_snapshot.Po@am__quote@ @@ -652,9 +708,9 @@ done check-am: all-am check: check-am -all-am: Makefile $(PROGRAMS) +all-am: Makefile $(PROGRAMS) $(SCRIPTS) installdirs: - for dir in "$(DESTDIR)$(bindir)"; do \ + for dir in "$(DESTDIR)$(bindir)" "$(DESTDIR)$(bindir)"; do \ test -z "$$dir" || $(MKDIR_P) "$$dir"; \ done install: install-am @@ -711,7 +767,7 @@ install-dvi-am: -install-exec-am: install-binPROGRAMS +install-exec-am: install-binPROGRAMS install-binSCRIPTS install-html: install-html-am @@ -751,7 +807,7 @@ ps-am: -uninstall-am: uninstall-binPROGRAMS +uninstall-am: uninstall-binPROGRAMS uninstall-binSCRIPTS .MAKE: install-am install-strip @@ -760,14 +816,15 @@ distclean distclean-compile distclean-generic \ distclean-libtool distclean-tags distdir dvi dvi-am html \ html-am info info-am install install-am install-binPROGRAMS \ - install-data install-data-am install-dvi install-dvi-am \ - install-exec install-exec-am install-html install-html-am \ - install-info install-info-am install-man install-pdf \ - install-pdf-am install-ps install-ps-am install-strip \ - installcheck installcheck-am installdirs maintainer-clean \ - maintainer-clean-generic mostlyclean mostlyclean-compile \ - mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ - tags uninstall uninstall-am uninstall-binPROGRAMS + install-binSCRIPTS install-data install-data-am install-dvi \ + install-dvi-am install-exec install-exec-am install-html \ + install-html-am install-info install-info-am install-man \ + install-pdf install-pdf-am install-ps install-ps-am \ + install-strip installcheck installcheck-am installdirs \ + maintainer-clean maintainer-clean-generic mostlyclean \ + mostlyclean-compile mostlyclean-generic mostlyclean-libtool \ + pdf pdf-am ps ps-am tags uninstall uninstall-am \ + uninstall-binPROGRAMS uninstall-binSCRIPTS # Tell versions [3.59,3.63) of GNU make to not export all variables.