Cache incoherency may corrupt code pages read from filesystems on USB or PIO mass storage
Affects | Status | Importance | Assigned to | Milestone | |
---|---|---|---|---|---|
linux-fsl-imx51 (Ubuntu) |
Invalid
|
Undecided
|
Bryan Wu | ||
linux-mvl-dove (Ubuntu) |
Invalid
|
Undecided
|
Unassigned |
Bug Description
May affect all current ARM kernels.
Impact: random sporadic code execution errors in userspace when using certain types of mass storage for the filesystem.
These discussions have just been brought to to my attention --- mass storage drivers which do not use DMA write the data into the D-cache, but for code pages, the necessary requirements for propagating the code to the I-cache are not met. This may show up as unpredictable code execution errors where the contents of the I-cache are stale and do not match the page content the kernel fetched from the filesystem.
Possibly this is the cause of https:/
See:
* http://
(proposes a fix for USB-based filesystems)
* http://
(proposes a fix for the PIO-based libata drivers)
Changed in linux-fsl-imx51 (Ubuntu): | |
assignee: | nobody → Bryan Wu (cooloney) |
tags: | added: kernel-series-unknown |
I just went through the email thread and found that this issue may affect all the ARM kernel. But the patches are still under discussion. I will keep eyes on it and maybe backport them when it is ready.
For the USB fixing, it adds some flush_dcache_page operation in ISP1760 HCD. We might need similar solution in EHCI HCD for IMX51.
For the libata fixing, patch is not finalized and they agreed to create some PIO mapping API similar with DMA mapping API. It will take some time to review and merge
-Bryan