On P8 node witchita, with Eoan 5.3 kernel + git branch from upstream:
$ time sudo ./futex_bench
test: futex_bench
tags: git_version:v5.6-rc4-0-g98d54f81e
time = 46.302199
success: futex_bench
real 0m46.313s
user 0m9.172s
sys 0m37.138s
$ time sudo ./tm-unavailable
test: tm_unavailable_test
tags: git_version:v5.6-rc4-0-g98d54f81e
Checking if FP/VEC registers are sane after a FP unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
^[[1;5BIf MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VEC unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VSX unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
result: success
success: tm_unavailable_test
real 2m48.540s
user 1m55.433s
sys 0m53.083s
$ time sudo ./tm-poison
test: tm_poison_test
tags: git_version:v5.6-rc4-0-g98d54f81e
Good, no poison or leaked value into FP registers
Good, no poison or leaked value into VEC registers
success: tm_poison_test
real 4m0.025s
user 2m0.001s
sys 0m0.008s
$ time sudo ./sigfuz
test: signal_fuzzer
tags: git_version:v5.6-rc4-0-g98d54f81e
success: signal_fuzzer
On P8 node witchita, with Eoan 5.3 kernel + git branch from upstream: v5.6-rc4- 0-g98d54f81e
$ time sudo ./futex_bench
test: futex_bench
tags: git_version:
time = 46.302199
success: futex_bench
real 0m46.313s
user 0m9.172s
sys 0m37.138s
$ time sudo ./tm-unavailable v5.6-rc4- 0-g98d54f81e
test: tm_unavailable_test
tags: git_version:
Checking if FP/VEC registers are sane after a FP unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
^[[1;5BIf MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VEC unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VSX unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
result: success
success: tm_unavailable_test
real 2m48.540s
user 1m55.433s
sys 0m53.083s
$ time sudo ./tm-poison v5.6-rc4- 0-g98d54f81e
test: tm_poison_test
tags: git_version:
Good, no poison or leaked value into FP registers
Good, no poison or leaked value into VEC registers
success: tm_poison_test
real 4m0.025s
user 2m0.001s
sys 0m0.008s
$ time sudo ./sigfuz v5.6-rc4- 0-g98d54f81e
test: signal_fuzzer
tags: git_version:
success: signal_fuzzer
real 1m28.684s
user 0m6.332s
sys 0m5.206s