Comment 12 for bug 1762928

Revision history for this message
bugproxy (bugproxy) wrote : Comment bridged from LTC Bugzilla

------- Comment From <email address hidden> 2018-04-26 04:04 EDT-------
Adding to above.. in artful I see a new failure:

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test: tm_unavailable_test
tags: git_version:69bfd470
Checking if FP/VEC registers are sane after a FP unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC corrupted! high = 0 low = 0
If MSR.FP=1 MSR.VEC=0: FP ok VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC corrupted! high = 0 low = 0
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VEC unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP corrupted! high = 0 low = 0 VEC ok
If MSR.FP=1 MSR.VEC=0: FP corrupted! high = 0x2000 low = 0 VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC ok
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
Checking if FP/VEC registers are sane after a VSX unavailable exception...
If MSR.FP=0 MSR.VEC=0: FP ok VEC ok
If MSR.FP=1 MSR.VEC=0: FP corrupted! high = 0x2000 low = 0 VEC ok
If MSR.FP=0 MSR.VEC=1: FP ok VEC corrupted! high = 0 low = 0
If MSR.FP=1 MSR.VEC=1: FP ok VEC ok
result: failed!
failure: tm_unavailable_test
not ok 1..10 selftests: tm-unavailable [FAIL]
selftests: tm-trap
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where as tm_trap is a PASS...