yosys 0.5.0+20151013gitf13e387-1 source package in Ubuntu
Changelog
yosys (0.5.0+20151013gitf13e387-1) unstable; urgency=low * Uploaded to unstable - New features in yosys are needed for the Icestorm tool chain * New upstream version - Drop patches 04_installpath.patch and 06_cflags_ldflags.patch - Set PREFIX in d/rules * debian/control: Fixed Vcs-Git to use https -- Ruben Undheim <email address hidden> Sun, 07 Feb 2016 11:59:04 +0100
Upload details
- Uploaded by:
- Debian Science Team
- Uploaded to:
- Sid
- Original maintainer:
- Debian Science Team
- Architectures:
- any
- Section:
- misc
- Urgency:
- Low Urgency
See full publishing history Publishing
Series | Published | Component | Section | |
---|---|---|---|---|
Xenial | release | universe | misc |
Downloads
File | Size | SHA-256 Checksum |
---|---|---|
yosys_0.5.0+20151013gitf13e387-1.dsc | 2.1 KiB | d4d48e047ddc977f0fe602cda86bcfba50980dcc43ff1754a5bef10ba6de16bd |
yosys_0.5.0+20151013gitf13e387.orig.tar.gz | 830.8 KiB | 393ad30b6d9f8e1a90c5a1f27b93272003757fc4c160279d69008d8037849d24 |
yosys_0.5.0+20151013gitf13e387-1.debian.tar.xz | 6.8 KiB | cd91da843562128c17ad9438a9c04e0092569fdc333c1dab91dd55e1fee81bfd |
Available diffs
- diff from 0.5.0-1 to 0.5.0+20151013gitf13e387-1 (252.0 KiB)
No changes file available.
Binary packages built by this source
- yosys: Framework for Verilog RTL synthesis
This is a framework for Verilog RTL synthesis. It currently has extensive
Verilog-2005 support and provides a basic set of synthesis algorithms for
various application domains.
.
Yosys can be adapted to perform any synthesis job by combining the existing
passes (algorithms) using synthesis scripts and adding additional passes as
needed by extending the yosys C++ code base.
- yosys-dbgsym: No summary available for yosys-dbgsym in ubuntu yakkety.
No description available for yosys-dbgsym in ubuntu yakkety.