iverilog binary package in Ubuntu Focal riscv64
Icarus Verilog is intended to compile all of the Verilog HDL as
described in the IEEE-1364 standard. It is not quite there
yet. It does currently handle a mix of structural and behavioral
constructs.
.
The compiler can target either simulation, or netlist (EDIF).
Publishing history
| Date | Status | Target | Component | Section | Priority | Phased updates | Version | ||
|---|---|---|---|---|---|---|---|---|---|
| 2020-04-03 08:48:17 UTC | Published | Ubuntu Focal riscv64 | release | universe | electronics | Optional | 10.3-1build1 | ||
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