opensta 0~20191111gitc018cb2+dfsg-1build1 (s390x binary) in ubuntu focal
After synthesis, place and route of a digital circuit, it is necessary to
verify the timing of the design. OpenSTA is a tool for doing exactly that. It
has a Tcl interface for entering commands for analysing designs.
.
It typically takes as input a verilog netlist, a liberty file, and other
parasitics information from the placed and routed design.
Details
- Package version:
- 0~20191111gitc018cb2+dfsg-1build1
- Status:
- Published
- Component:
- universe
- Priority:
- Optional
Downloadable files
s390x build of opensta 0~20191111gitc018cb2+dfsg-1build1 in ubuntu focal PROPOSED produced
these files: