Linaro GCC 4.5-2011.07

2011-07-15 Michael Hope <email address hidden>

 gcc/
 Backport from mainline:

 2011-04-05 Eric Botcazou <email address hidden>

 * ifcvt.c (cond_exec_process_insns): Disallow converting a block
 that contains the prologue.

 gcc/testsuite/
 Backport from mainline:

 2011-04-01 Bernd Schmidt <email address hidden>

 * gcc.c-torture/compile/20110401-1.c: New test.

2011-07-14 Richard Sandiford <email address hidden>

 gcc/
 * config/arm/arm.h (ARM_LEGITIMIZE_RELOAD_ADDRESS): Apply the
 arm_legitimize_reload_address changes marked [*] below.

 Backport from mainline:

 2011-04-20 Chung-Lin Tang <email address hidden>

 [*] config/arm/arm.c (arm_legitimize_reload_address): For NEON
 quad-word modes, reduce to 9-bit index range when above 1016
 limit.

 2011-04-11 Chung-Lin Tang <email address hidden>
      Richard Earnshaw <email address hidden>

 PR target/48250
 [*] config/arm/arm.c (arm_legitimize_reload_address): Update cases
 to use sign-magnitude offsets. Reject unsupported unaligned
 cases. Add detailed description in comments.
 * config/arm/arm.md (reload_outdf): Disable for ARM mode; change
 condition from TARGET_32BIT to TARGET_ARM.

2011-07-14 Richard Sandiford <email address hidden>

 Backport from mainline:
 gcc/
 2011-07-07 Richard Sandiford <email address hidden>

 * reload1.c (choose_reload_regs): Use mode sizes to check whether
 an old reload register completely defines the required value.

 gcc/testsuite/
 2011-07-07 Richard Sandiford <email address hidden>

 * gcc.target/arm/neon-modes-3.c: New test.

2011-07-11 Revital Eres <email address hidden>

 Backport from mainline -r175091
 gcc/
 * modulo-sched.c (struct ps_insn): Remove row_rest_count field.
 (struct partial_schedule): Add rows_length field.
 (verify_partial_schedule): Check rows_length.
 (ps_insert_empty_row): Handle rows_length.
 (create_partial_schedule): Likewise.
 (free_partial_schedule): Likewise.
 (reset_partial_schedule): Likewise.
 (create_ps_insn): Remove rest_count argument.
 (remove_node_from_ps): Update rows_length.
 (add_node_to_ps): Update rows_length and call create_ps_insn
 without passing row_rest_count.
 (rotate_partial_schedule): Update rows_length.

2011-07-08 Richard Sandiford <email address hidden>

 gcc/
 * builtins.c (get_object_alignment): Fix comment.
 * fold-const.c (get_pointer_modulus_and_residue): Remove
 allow_func_align. Use get_object_alignment.
 (fold_binary_loc): Update caller.

2011-07-08 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-06-29 Richard Sandiford <email address hidden>

 PR tree-optimization/49545
 * builtins.c (get_object_alignment_1): Update function comment.
 Do not use DECL_ALIGN for functions, but test
 TARGET_PTRMEMFUNC_VBIT_LOCATION instead.
 * fold-const.c (get_pointer_modulus_and_residue): Don't check
 for functions here.

 gcc/testsuite/
 Backport from mainline:

 2011-06-29 Richard Sandiford <email address hidden>

 * gcc.dg/torture/pr49169.c: Restrict to ARM and MIPS targets.

2011-07-08 Richard Sandiford <email address hidden>

 gcc/
 Backport from mainline:

 2011-07-27 Richard Guenther <email address hidden>

 PR tree-optimization/49169
 * fold-const.c (get_pointer_modulus_and_residue): Don't rely on
 the alignment of function decls.

 gcc/testsuite/
 Backport from mainline:

 2011-07-27 Michael Hope <email address hidden>
      Richard Sandiford <email address hidden>

 PR tree-optimization/49169
 * gcc.dg/torture/pr49169.c: New test.

2011-07-01 Andrew Stubbs <email address hidden>

 Merge from FSF 4.5 branch r175676 (pre 4.5.4).

2011-07-01 Ramana Radhakrishnan <email address hidden>

 Backport from mainline.
 LP 744754
        2011-04-17 Chung-Lin Tang <email address hidden>

 * config/arm/arm.c (neon_struct_mem_operand):
 Support POST_INC/PRE_DEC memory operands.