Linaro GCC 4.8-2013.09

Milestone information

Project:
Linaro GCC
Series:
4.8
Version:
4.8-2013.09
Released:
2013-09-12  
Registrant:
Christophe Lyon
Release registered:
2013-09-12
Active:
No. Drivers cannot target bugs and blueprints to this milestone.  

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No blueprints or bugs assigned to you.
Assignees:
1 Christophe Lyon, 1 Mans Rullgard, 1 Matthew Gretton-Dann, 1 Zhenqiang Chen
Blueprints:
4 Informational
Bugs:
No bugs are targeted to this milestone.

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Release notes 

Linaro GCC 4.8 2013.09 is the sixth release in the 4.8 series. Based
off the latest GCC 4.8.1+svn202157 release, it includes performance
improvements and bug fixes.

Interesting changes include:
* Updates to GCC 4.8.1+svn202157
* Improved AArch64 support (instructions, intrinsics).
* Backports for bug fixes (PR56315,PR46975,PR57708,PR56979,PR57431,PR58041).

The source tarball is available from:
 https://launchpad.net/gcc-linaro/+milestone/4.8-2013.09

Downloads are available from the Linaro GCC page on Launchpad:
 https://launchpad.net/gcc-linaro

More information on the features and issues are available from the
release page:
 https://launchpad.net/gcc-linaro/4.8/4.8-2013.09

Mailing list: http://lists.linaro.org/mailman/listinfo/linaro-toolchain

Bugs: https://bugs.launchpad.net/gcc-linaro/

Questions? https://ask.linaro.org/

Interested in commercial support? Inquire at support@linaro.org

Changelog 

View the full changelog

------------------------------------------------------------------------
r202502 | clyon | 2013-09-11 17:12:09 +0200 (Wed, 11 Sep 2013) | 1 line

Make Linaro GCC 4.8-2013.09.
------------------------------------------------------------------------
r202439 | clyon | 2013-09-10 14:19:36 +0200 (Tue, 10 Sep 2013) | 3 lines

Merge from branches/gcc-4_8-branch up to rev 202157.

------------------------------------------------------------------------
r202430 | clyon | 2013-09-10 11:15:45 +0200 (Tue, 10 Sep 2013) | 24 lines

2013-09-10 Venkataramanan Kumar <email address hidden>

 gcc/
 Backport from trunk r200197, 201411.
 2013-06-19 Richard Earnshaw <email address hidden>

 arm.md (split for eq(reg, 0)): Add variants for ARMv5 and Thumb2.
 (peepholes for eq(reg, not-0)): Ensure condition register is dead after
 pattern. Use more efficient sequences on ARMv5 and Thumb2.

 2013-08-01 Kyrylo Tkachov <email address hidden>

 * config/arm/arm.md (peepholes for eq (reg1) (reg2/imm)):
 Generate canonical plus rtx with negated immediate instead of minus
 where appropriate.
 * config/arm/arm.c (thumb2_reorg): Handle ADCS <Rd>, <Rn> case.

 gcc/testsuite/
 Backport from trunk r201411.
 2013-08-01 Kyrylo Tkachov <email address hidden>

 * gcc.target/arm/pr46972-2.c: New test.

------------------------------------------------------------------------
r202424 | clyon | 2013-09-10 10:17:11 +0200 (Tue, 10 Sep 2013) | 354 lines

2013-09-10 Christophe Lyon <email address hidden>

 Backport from trunk r200593,201024,201025,201122,201124,201126.
 2013-07-02 Kyrylo Tkachov <email address hidden>

 * config/arm/arm.md (arm_andsi3_insn): Add alternatives for 16-bit
 encoding.
 (iorsi3_insn): Likewise.
 (arm_xorsi3): Likewise.

 2013-07-18 Sofiane Naci <email address hidden>

 * config/arm/arm.md (attribute "type"): Rename "simple_alu_imm" to
 "arlo_imm". Rename "alu_reg" to "arlo_reg". Rename "simple_alu_shift" to
 "extend". Split "alu_shift" into "shift" and "arlo_shift". Split
 "alu_shift_reg" into "shift_reg" and "arlo_shift_reg". List types
 in alphabetical order.
 (attribute "core_cycles"): Update for attribute changes.
 (arm_addsi3): Likewise.
 (addsi3_compare0): Likewise.
 (addsi3_compare0_scratch): Likewise.
 (addsi3_compare_op1): Likewise.
 (addsi3_compare_op2): Likewise.
 (compare_addsi2_op0): Likewise.
 (compare_addsi2_op1): Likewise.
 (addsi3_carryin_shift_<optab>): Likewise.
 (subsi3_carryin_shift): Likewise.
 (rsbsi3_carryin_shift): Likewise.
 (arm_subsi3_insn): Likewise.
 (subsi3_compare0): Likewise.
 (subsi3_compare): Likewise.
 (arm_andsi3_insn): Likewise.
 (thumb1_andsi3_insn): Likewise.
 (andsi3_compare0): Likewise.
 (andsi3_compare0_scratch): Likewise.
 (zeroextractsi_compare0_scratch
 (andsi_not_shiftsi_si): Likewise.
 (iorsi3_insn): Likewise.
 (iorsi3_compare0): Likewise.
 (iorsi3_compare0_scratch): Likewise.
 (arm_xorsi3): Likewise.
 (thumb1_xorsi3_insn): Likewise.
 (xorsi3_compare0): Likewise.
 (xorsi3_compare0_scratch): Likewise.
 (satsi_<SAT:code>_shift): Likewise.
 (rrx): Likewise.
 (arm_shiftsi3): Likewise.
 (shiftsi3_compare0): Likewise.
 (not_shiftsi): Likewise.
 (not_shiftsi_compare0): Likewise.
 (not_shiftsi_compare0_scratch): Likewise.
 (arm_one_cmplsi2): Likewise.
 (thumb_one_complsi2): Likewise.
 (notsi_compare0): Likewise.
 (notsi_compare0_scratch): Likewise.
 (thumb1_zero_extendhisi2): Likewise.
 (arm_zero_extendhisi2): Likewise.
 (arm_zero_extendhisi2_v6): Likewise.
 (arm_zero_extendhisi2addsi): Likewise.
 (thumb1_zero_extendqisi2): Likewise.
 (thumb1_zero_extendqisi2_v6): Likewise.
 (arm_zero_extendqisi2): Likewise.
 (arm_zero_extendqisi2_v6): Likewise.
 (arm_zero_extendqisi2addsi): Likewise.
 (thumb1_extendhisi2): Likewise.
 (arm_extendhisi2): Likewise.
 (arm_extendhisi2_v6): Likewise.
 (arm_extendqisi): Likewise.
 (arm_extendqisi_v6): Likewise.
 (arm_extendqisi2addsi): Likewise.
 (thumb1_extendqisi2): Likewise.
 (thumb1_movdi_insn): Likewise.
 (arm_movsi_insn): Likewise.
 (movsi_compare0): Likewise.
 (movhi_insn_arch4): Likewise.
 (movhi_bytes): Likewise.
 (arm_movqi_insn): Likewise.
 (thumb1_movqi_insn): Likewise.
 (arm32_movhf): Likewise.
 (thumb1_movhf): Likewise.
 (arm_movsf_soft_insn): Likewise.
 (thumb1_movsf_insn): Likewise.
 (movdf_soft_insn): Likewise.
 (thumb_movdf_insn): Likewise.
 (arm_cmpsi_insn): Likewise.
 (cmpsi_shiftsi): Likewise.
 (cmpsi_shiftsi_swp): Likewise.
 (arm_cmpsi_negshiftsi_si): Likewise.
 (movsicc_insn): Likewise.
 (movsfcc_soft_insn): Likewise.
 (arith_shiftsi): Likewise.
 (arith_shiftsi_compare0
 (arith_shiftsi_compare0_scratch
 (sub_shiftsi): Likewise.
 (sub_shiftsi_compare0
 (sub_shiftsi_compare0_scratch
 (and_scc): Likewise.
 (cond_move): Likewise.
 (if_plus_move): Likewise.
 (if_move_plus): Likewise.
 (if_move_not): Likewise.
 (if_not_move): Likewise.
 (if_shift_move): Likewise.
 (if_move_shift): Likewise.
 (if_shift_shift): Likewise.
 (if_not_arith): Likewise.
 (if_arith_not): Likewise.
 (cond_move_not): Likewise.
 (thumb1_ashlsi3): Set type attribute.
 (thumb1_ashrsi3): Likewise.
 (thumb1_lshrsi3): Likewise.
 (thumb1_rotrsi3): Likewise.
 (shiftsi3_compare0_scratch): Likewise.
 * config/arm/neon.md (neon_mov<mode>): Update for attribute changes.
 (neon_mov<mode>): Likewise.
 * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Update for attribute
 changes.
 (thumb2_movsi_insn): Likewise.
 (thumb2_cmpsi_neg_shiftsi): Likewise.
 (thumb2_extendqisi_v6): Likewise.
 (thumb2_zero_extendhisi2_v6): Likewise.
 (thumb2_zero_extendqisi2_v6): Likewise.
 (thumb2_shiftsi3_short): Likewise.
 (thumb2_addsi3_compare0_scratch): Likewise.
 (orsi_not_shiftsi_si): Likewise.
 * config/arm/vfp.md (arm_movsi_vfp): Update for attribute changes.
 * config/arm/arm-fixed.md (arm_ssatsihi_shift): Update for attribute
 changes.
 * config/arm/arm1020e.md (1020alu_op): Update for attribute changes.
 (1020alu_shift_op): Likewise.
 (1020alu_shift_reg_op): Likewise.
 * config/arm/arm1026ejs.md (alu_op): Update for attribute changes.
 (alu_shift_op): Likewise.
 (alu_shift_reg_op): Likewise.
 * config/arm/arm1136jfs.md (11_alu_op): Update for attribute changes.
 (11_alu_shift_op): Likewise.
 (11_alu_shift_reg_op): Likewise.
 * config/arm/arm926ejs.md (9_alu_op): Update for attribute changes.
 (9_alu_shift_reg_op): Likewise.
 * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute changes.
 (cortex_a15_alu_shift): Likewise.
 (cortex_a15_alu_shift_reg): Likewise.
 * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute changes.
 (cortex_a5_alu_shift): Likewise.
 * config/arm/cortex-a53.md (cortex_a53_alu) : Update for attribute
 changes.
 (cortex_a53_alu_shift): Likewise.
 * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute
 changes.
 (cortex_a7_alu_reg): Likewise.
 (cortex_a7_alu_shift): Likewise.
 * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute changes.
 (cortex_a8_alu_shift): Likewise.
 (cortex_a8_alu_shift_reg): Likewise.
 (cortex_a8_mov): Likewise.
 * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute changes.
 (cortex_a9_dp_shift): Likewise.
 * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute changes.
 * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute changes.
 (cortex_r4_mov): Likewise.
 (cortex_r4_alu_shift): Likewise.
 (cortex_r4_alu_shift_reg): Likewise.
 * config/arm/fa526.md (526_alu_op): Update for attribute changes.
 (526_alu_shift_op): Likewise.
 * config/arm/fa606te.md (606te_alu_op): Update for attribute changes.
 * config/arm/fa626te.md (626te_alu_op): Update for attribute changes.
 (626te_alu_shift_op): Likewise.
 * config/arm/fa726te.md (726te_shift_op): Update for attribute changes.
 (726te_alu_op): Likewise.
 (726te_alu_shift_op): Likewise.
 (726te_alu_shift_reg_op): Likewise.
 * config/arm/fmp626.md (mp626_alu_op): Update for attribute changes.
 (mp626_alu_shift_op): Likewise.
 * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute changes.
 (pj4_alu_e1_conds): Likewise.
 (pj4_alu): Likewise.
 (pj4_alu_conds): Likewise.
 (pj4_shift): Likewise.
 (pj4_shift_conds): Likewise.
 (pj4_alu_shift): Likewise.
 (pj4_alu_shift_conds): Likewise.
 * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute changes.
 (cortexa7_older_only): Likewise.
 (cortexa7_younger): Likewise.

 2013-07-18 Sofiane Naci <email address hidden>

 * config/arm/arm.md (attribute "insn"): Delete values "mrs", "msr",
 "xtab" and "sat". Move value "clz" from here to ...
 (attriubte "type"): ... here.
 (satsi_<SAT:code>): Delete "insn" attribute.
 (satsi_<SAT:code>_shift): Likewise.
 (arm_zero_extendqisi2addsi): Likewise.
 (arm_extendqisi2addsi): Likewise.
 (clzsi2): Update for attribute changes.
 (rbitsi2): Likewise.
 * config/arm/arm-fixed.md (arm_ssatsihi_shift): Delete "insn" attribute.
 (arm_usatsihi): Likewise.
 * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.

 2013-07-22 Kyrylo Tkachov <email address hidden>

 * config/arm/predicates.md (shiftable_operator_strict_it):
 New predicate.
 * config/arm/thumb2.md (thumb_andsi_not_shiftsi_si):
 Disable cond_exec version for arm_restrict_it.
 (thumb2_smaxsi3): Convert to generate cond_exec.
 (thumb2_sminsi3): Likewise.
 (thumb32_umaxsi3): Likewise.
 (thumb2_uminsi3): Likewise.
 (thumb2_abssi2): Adjust constraints for arm_restrict_it.
 (thumb2_neg_abssi2): Likewise.
 (thumb2_mov_scc): Add alternative for 16-bit encoding.
 (thumb2_movsicc_insn): Adjust alternatives.
 (thumb2_mov_negscc): Disable for arm_restrict_it.
 (thumb2_mov_negscc_strict_it): New pattern.
 (thumb2_mov_notscc_strict_it): New pattern.
 (thumb2_mov_notscc): Disable for arm_restrict_it.
 (thumb2_ior_scc): Likewise.
 (thumb2_ior_scc_strict_it): New pattern.
 (thumb2_cond_move): Adjust for arm_restrict_it.
 (thumb2_cond_arith): Disable for arm_restrict_it.
 (thumb2_cond_arith_strict_it): New pattern.
 (thumb2_cond_sub): Adjust for arm_restrict_it.
 (thumb2_movcond): Likewise.
 (thumb2_extendqisi_v6): Disable cond_exec variant for arm_restrict_it.
 (thumb2_zero_extendhisi2_v6): Likewise.
 (thumb2_zero_extendqisi2_v6): Likewise.
 (orsi_notsi_si): Likewise.
 (orsi_not_shiftsi_si): Likewise.

 2013-07-22 Sofiane Naci <email address hidden>

 * config/arm/arm.md (attribute "insn"): Delete.
 (attribute "type"): Add "mov_imm", "mov_reg", "mov_shift",
 "mov_shift_reg", "mvn_imm", "mvn_reg", "mvn_shift" and "mvn_shift_reg".
 (not_shiftsi): Update for attribute change.
 (not_shiftsi_compare0): Likewise.
 (not_shiftsi_compare0_scratch): Likewise.
 (arm_one_cmplsi2): Likewise.
 (thumb1_one_cmplsi2): Likewise.
 (notsi_compare0): Likewise.
 (notsi_compare0_scratch): Likewise.
 (thumb1_movdi_insn): Likewise.
 (arm_movsi_insn): Likewise.
 (movhi_insn_arch4): Likewise.
 (movhi_bytes): Likewise.
 (arm_movqi_insn): Likewise.
 (thumb1_movqi_insn): Likewise.
 (arm32_movhf): Likewise.
 (thumb1_movhf): Likewise.
 (arm_movsf_soft_insn): Likewise.
 (thumb1_movsf_insn): Likewise.
 (thumb_movdf_insn): Likewise.
 (movsicc_insn): Likewise.
 (movsfcc_soft_insn): Likewise.
 (and_scc): Likewise.
 (cond_move): Likewise.
 (if_move_not): Likewise.
 (if_not_move): Likewise.
 (if_shift_move): Likewise.
 (if_move_shift): Likewise.
 (if_shift_shift): Likewise.
 (if_not_arith): Likewise.
 (if_arith_not): Likewise.
 (cond_move_not): Likewise.
 * config/arm/neon.md (neon_mov<mode>): Update for attribute change.
 (neon_mov<mode>): Likewise.
 * config/arm/vfp.md (arm_movsi_vfp): Update for attribute change.
 (thumb2_movsi_vfp): Likewise.
 (movsf_vfp): Likewise.
 (thumb2_movsf_vfp): Likewise.
 * config/arm/arm.c (xscale_sched_adjust_cost): Update for attribute change.
 (cortexa7_older_only): Likewise.
 (cortexa7_younger): Likewise.
 * config/arm/arm1020e.md (1020alu_op): Update for attribute change.
 (1020alu_shift_op): Likewise.
 (1020alu_shift_reg_op): Likewise.
 * config/arm/arm1026ejs.md (alu_op): Update for attribute change.
 (alu_shift_op): Likewise.
 (alu_shift_reg_op): Likewise.
 * config/arm/arm1136jfs.md (11_alu_op): Update for attribute change.
 (11_alu_shift_op): Likewise.
 (11_alu_shift_reg_op): Likewise.
 * config/arm/arm926ejs.md (9_alu_op): Update for attribute change.
 (9_alu_shift_reg_op): Likewise.
 * config/arm/cortex-a15.md (cortex_a15_alu): Update for attribute change.
 (cortex_a15_alu_shift): Likewise.
 (cortex_a15_alu_shift_reg): Likewise.
 * config/arm/cortex-a5.md (cortex_a5_alu): Update for attribute change.
 (cortex_a5_alu_shift): Likewise.
 * config/arm/cortex-a53.md (cortex_a53_alu): Update for attribute change.
 (cortex_a53_alu_shift): Likewise.
 * config/arm/cortex-a7.md (cortex_a7_alu_imm): Update for attribute change.
 (cortex_a7_alu_reg): Likewise.
 (cortex_a7_alu_shift): Likewise.
 * config/arm/cortex-a8.md (cortex_a8_alu): Update for attribute change.
 (cortex_a8_alu_shift): Likewise.
 (cortex_a8_alu_shift_reg): Likewise.
 (cortex_a8_mov): Likewise.
 * config/arm/cortex-a9.md (cortex_a9_dp): Update for attribute change.
 (cortex_a9_dp_shift): Likewise.
 * config/arm/cortex-m4.md (cortex_m4_alu): Update for attribute change.
 * config/arm/cortex-r4.md (cortex_r4_alu): Update for attribute change.
 (cortex_r4_mov): Likewise.
 (cortex_r4_alu_shift): Likewise.
 (cortex_r4_alu_shift_reg): Likewise.
 * config/arm/fa526.md (526_alu_op): Update for attribute change.
 (526_alu_shift_op): Likewise.
 * config/arm/fa606te.md (606te_alu_op): Update for attribute change.
 * config/arm/fa626te.md (626te_alu_op): Update for attribute change.
 (626te_alu_shift_op): Likewise.
 * config/arm/fa726te.md (726te_shift_op): Update for attribute change.
 (726te_alu_op): Likewise.
 (726te_alu_shift_op): Likewise.
 (726te_alu_shift_reg_op): Likewise.
 * config/arm/fmp626.md (mp626_alu_op): Update for attribute change.
 (mp626_alu_shift_op): Likewise.
 * config/arm/marvell-pj4.md (pj4_alu_e1): Update for attribute change.
 (pj4_alu_e1_conds): Likewise.
 (pj4_alu): Likewise.
 (pj4_alu_conds): Likewise.
 (pj4_shift): Likewise.
 (pj4_shift_conds): Likewise.
 (pj4_alu_shift): Likewise.
 (pj4_alu_shift_conds): Likewise.

 2013-07-22 Kyrylo Tkachov <email address hidden>

 * config/arm/constraints.md (Pd): Allow TARGET_THUMB
 instead of TARGET_THUMB1.
 (Pz): New constraint.
 * config/arm/arm.md (arm_addsi3): Add alternatives for 16-bit
 encodings.
 (compare_negsi_si): Likewise.
 (compare_addsi2_op0): Likewise.
 (compare_addsi2_op1): Likewise.
 (addsi3_carryin_<optab>): Likewise.
 (addsi3_carryin_alt2_<optab>): Likewise.
 (addsi3_carryin_shift_<optab>): Disable cond_exec variant
 for arm_restrict_it.
 (subsi3_carryin): Likewise.
 (arm_subsi3_insn): Add alternatives for 16-bit encoding.
 (minmax_arithsi): Disable for arm_restrict_it.
 (minmax_arithsi_non_canon): Adjust for arm_restrict_it.
 (satsi_<SAT:code>): Disable cond_exec variant for arm_restrict_it.
 (satsi_<SAT:code>_shift): Likewise.
 (arm_shiftsi3): Add alternative for 16-bit encoding.
 (arm32_movhf): Disable for arm_restrict_it.
 (arm_cmpdi_unsigned): Add alternatives for 16-bit encoding.
 (arm_movtas_ze): Disable cond_exec variant for arm_restrict_it.

------------------------------------------------------------------------
r202383 | clyon | 2013-09-09 10:51:18 +0200 (Mon, 09 Sep 2013) | 10 lines

2013-09-09 Kugan Vivekanandarajah <email address hidden>

 Backport from trunk r201412.
 2013-08-01 Kyrylo Tkachov <email address hidden>

 * config/arm/arm.md (minmax_arithsi_non_canon): Emit canonical RTL form
 when subtracting a constant.

------------------------------------------------------------------------
r202295 | yroux | 2013-09-05 18:20:36 +0200 (Thu, 05 Sep 2013) | 19 lines

gcc/
2013-09-05 Yvan Roux <email address hidden>

 Backport from trunk r201249.
 2013-07-25 Kyrylo Tkachov <email address hidden>

 * config/arm/arm-fixed.md (ssmulsa3, usmulusa3):
 Adjust for arm_restrict_it.
 Remove trailing whitespace.

gcc/testsuite/
2013-09-05 Yvan Roux <email address hidden>

 Backport from trunk r201267.
 2013-07-26 Kyrylo Tkachov <email address hidden>

 * gcc.target/arm/minmax_minus.c: Scan for absence of mov.

------------------------------------------------------------------------
r202294 | yroux | 2013-09-05 18:13:02 +0200 (Thu, 05 Sep 2013) | 20 lines

gcc/
2013-09-05 Yvan Roux <email address hidden>

 Backport from trunk r201342.
 2013-07-30 Richard Earnshaw <email address hidden>

 * config.gcc (arm): Require 64-bit host-wide-int for all ARM target
 configs.

libcpp/
2013-09-05 Yvan Roux <email address hidden>

 Backport from trunk r201566.
 2013-08-07 Richard Earnshaw <email address hidden>

 * configure.ac: Set need_64bit_hwint for all arm targets.
 * configure: Regenerated.

------------------------------------------------------------------------
r202280 | clyon | 2013-09-05 14:38:03 +0200 (Thu, 05 Sep 2013) | 52 lines

gcc/
2013-09-05 Christophe Lyon <email address hidden>

 Backport from trunk r199527,199792,199814.
 2013-05-31 Kyrylo Tkachov <email address hidden>

 PR target/56315
 * config/arm/arm.c (const_ok_for_dimode_op): Handle IOR.
 * config/arm/arm.md (*iordi3_insn): Change to insn_and_split.
 * config/arm/neon.md (iordi3_neon): Remove.
 (neon_vorr<mode>): Generate iordi3 instead of iordi3_neon.
 * config/arm/predicates.md (imm_for_neon_logic_operand):
 Move to earlier in the file.
 (neon_logic_op2): Likewise.
 (arm_iordi_operand_neon): New predicate.

 2013-06-07 Kyrylo Tkachov <email address hidden>

 * config/arm/constraints.md (Df): New constraint.
 * config/arm/arm.md (iordi3_insn): Use Df constraint instead of De.
 Correct length attribute for last two alternatives.

 2013-06-07 Kyrylo Tkachov <email address hidden>

 PR target/56315
 * config/arm/arm.md (*xordi3_insn): Change to insn_and_split.
 (xordi3): Change operand 2 constraint to arm_xordi_operand.
 * config/arm/arm.c (const_ok_for_dimode_op): Handle XOR.
 * config/arm/constraints.md (Dg): New constraint.
 * config/arm/neon.md (xordi3_neon): Remove.
 (neon_veor<mode>): Generate xordi3 instead of xordi3_neon.
 * config/arm/predicates.md (arm_xordi_operand): New predicate.

gcc/testsuite/
2013-09-05 Christophe Lyon <email address hidden>

 Backport from trunk r199527,199814,201435.
 2013-05-31 Kyrylo Tkachov <email address hidden>

 PR target/56315
 * gcc.target/arm/iordi3-opt.c: New test.

 2013-06-07 Kyrylo Tkachov <email address hidden>

 PR target/56315
 * gcc.target/arm/xordi3-opt.c: New test.

 2013-08-02 Kyrylo Tkachov <email address hidden>

 * gcc.target/arm/neon-for-64bits-2.c: Delete.

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r202278 | clyon | 2013-09-05 14:33:30 +0200 (Thu, 05 Sep 2013) | 23 lines

2013-09-05 Christophe Lyon <email address hidden>

 Backport from trunk r201730,201731.

 2013-08-14 Janis Johnson <email address hidden>

 * gcc.target/arm/atomic-comp-swap-release-acquire.c: Move dg-do
 to be the first test directive.
 * gcc.target/arm/atomic-op-acq_rel.c: Likewise.
 * gcc.target/arm/atomic-op-acquire.c: Likewise.
 * gcc.target/arm/atomic-op-char.c: Likewise.
 * gcc.target/arm/atomic-op-consume.c: Likewise.
 * gcc.target/arm/atomic-op-int.c: Likewise.
 * gcc.target/arm/atomic-op-relaxed.c: Likewise.
 * gcc.target/arm/atomic-op-release.c: Likewise.
 * gcc.target/arm/atomic-op-seq_cst.c: Likewise.
 * gcc.target/arm/atomic-op-short.c: Likewise.

 2013-08-14 Janis Johnson <email address hidden>

 * gcc.target/arm/pr19599.c: Skip for -mthumb.

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r202277 | clyon | 2013-09-05 14:31:03 +0200 (Thu, 05 Sep 2013) | 10 lines

2013-09-05 Christophe Lyon <email address hidden>

 Backport from trunk r201599.
 2013-08-08 Richard Earnshaw <email address hidden>

 PR target/57431
 * arm/neon.md (neon_vld1_dupdi): New expand pattern.
 (neon_vld1_dup<mode> VD iterator): Iterate over VD not VDX.

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r202276 | clyon | 2013-09-05 14:27:56 +0200 (Thu, 05 Sep 2013) | 9 lines

2013-09-05 Christophe Lyon <email address hidden>

 Backport from trunk r201589.
 2013-08-08 Bernd Edlinger <email address hidden>

 PR target/58065
 * config/arm/arm.h (MALLOC_ABI_ALIGNMENT): Define.

------------------------------------------------------------------------
r202196 | vekumar | 2013-09-03 06:52:11 +0200 (Tue, 03 Sep 2013) | 40 lines

2013-09-03 Venkataramanan Kumar <email address hidden>

 Backport from trunk
 r201624, r201666.
 2013-08-09 James Greenhalgh <email address hidden>

 * config/aarch64/aarch64-simd-builtins.def (get_lane_signed): Remove.
 (get_lane_unsigned): Likewise.
 (dup_lane_scalar): Likewise.
 (get_lane): enable for VALL.
 * config/aarch64/aarch64-simd.md
 (aarch64_dup_lane_scalar<mode>): Remove.
 (aarch64_get_lane_signed<mode>): Likewise.
 (aarch64_get_lane_unsigned<mode>): Likewise.
 (aarch64_get_lane_extend<GPI:mode><VDQQH:mode>): New.
 (aarch64_get_lane_zero_extendsi<mode>): Likewise.
 (aarch64_get_lane<mode>): Enable for all vector modes.
 (aarch64_get_lanedi): Remove misleading constraints.
 * config/aarch64/arm_neon.h
 (__aarch64_vget_lane_any): Define.
 (__aarch64_vget<q>_lane_<fpsu><8,16,32,64>): Likewise.
 (vget<q>_lane_<fpsu><8,16,32,64>): Use __aarch64_vget_lane macros.
 (vdup<bhsd>_lane_<su><8,16,32,64>): Likewise.
 * config/aarch64/iterators.md (VDQQH): New.
 (VDQQHS): Likewise.
 (vwcore): Likewise.

 2013-08-12 James Greenhalgh <email address hidden>

 * config/aarch64/arm_none.h
 (vdup<bhsd>_lane_<su><8,16,32,64>): Fix macro call.

2013-09-03 Venkataramanan Kumar <email address hidden>

 Backport from trunk r201624.
 2013-08-09 James Greenhalgh <email address hidden>

 * gcc.target/aarch64/scalar_intrinsics.c: Update expected
  output of vdup intrinsics

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r202181 | clyon | 2013-09-02 18:23:32 +0200 (Mon, 02 Sep 2013) | 8 lines

2013-08-26 Kugan Vivekanandarajah <email address hidden>

 Backport from trunk r201341.
 2013-07-30 Richard Earnshaw <email address hidden>

 * arm.md (mulhi3): New expand pattern.

------------------------------------------------------------------------
r202176 | clyon | 2013-09-02 16:59:09 +0200 (Mon, 02 Sep 2013) | 11 lines

2013-08-26 Kugan Vivekanandarajah <email address hidden>

 Backport from trunk r201501.
 2013-08-05 Richard Earnshaw <email address hidden>

 PR rtl-optimization/57708
 * recog.c (peep2_find_free_register): Validate all regs in a
 multi-reg mode.

------------------------------------------------------------------------
r202175 | clyon | 2013-09-02 16:48:51 +0200 (Mon, 02 Sep 2013) | 8 lines

2013-08-26 Kugan Vivekanandarajah <email address hidden>

 Backport from trunk r201636.
 2013-08-09 Yufeng Zhang <email address hidden>

 * gcc.dg/lower-subreg-1.c: Skip aarch64*-*-*.

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r201788 | clyon | 2013-08-16 14:37:44 +0200 (Fri, 16 Aug 2013) | 1 line

Bump version number, post release.
------------------------------------------------------------------------

4 blueprints and 0 bugs targeted

Blueprint Priority Assignee Delivery
AArch64 bootstrap AArch64 bootstrap Informational 4 High Matthew Gretton-Dann  12 Informational
Improve generation of conditional execution instructions Improve generation of conditional execution instructions Informational 4 High Zhenqiang Chen  12 Informational
Detect smin / umin idiom Detect smin / umin idiom Informational 3 Medium Christophe Lyon  12 Informational
ARM Improve 64-bit division routines in libgcc ARM Improve 64-bit division routines in libgcc Informational 3 Medium Mans Rullgard  12 Informational
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